[all-commits] [llvm/llvm-project] 2fae9b: [PISA] Add PISA GlobalISel lowering, legalization ...
Michal Paszkowski via All-commits
all-commits at lists.llvm.org
Tue Sep 22 08:16:37 PDT 2026
Branch: refs/heads/users/michalpaszkowski/pisa_backend_upstreaming_4
Home: https://github.com/llvm/llvm-project
Commit: 2fae9bbe613da54305b2c0a356b0319660036c18
https://github.com/llvm/llvm-project/commit/2fae9bbe613da54305b2c0a356b0319660036c18
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/include/llvm/TargetParser/CMakeLists.txt
A llvm/include/llvm/TargetParser/PISATargetParser.def
A llvm/include/llvm/TargetParser/PISATargetParser.h
M llvm/lib/Target/PISA/CMakeLists.txt
M llvm/lib/Target/PISA/PISA.h
A llvm/lib/Target/PISA/PISACallLowering.cpp
A llvm/lib/Target/PISA/PISACallLowering.h
M llvm/lib/Target/PISA/PISAFrameLowering.h
A llvm/lib/Target/PISA/PISAISelLowering.cpp
A llvm/lib/Target/PISA/PISAISelLowering.h
A llvm/lib/Target/PISA/PISALegalizerInfo.cpp
A llvm/lib/Target/PISA/PISALegalizerInfo.h
A llvm/lib/Target/PISA/PISAMachineFunctionInfo.cpp
A llvm/lib/Target/PISA/PISAMachineFunctionInfo.h
A llvm/lib/Target/PISA/PISAPostLegalizerCombiner.cpp
A llvm/lib/Target/PISA/PISAPreLegalizerCombiner.cpp
A llvm/lib/Target/PISA/PISARegisterBankInfo.cpp
A llvm/lib/Target/PISA/PISARegisterBankInfo.h
M llvm/lib/Target/PISA/PISASubtarget.cpp
M llvm/lib/Target/PISA/PISASubtarget.h
M llvm/lib/Target/PISA/PISATargetMachine.cpp
M llvm/lib/Target/PISA/PISATargetMachine.h
A llvm/lib/Target/PISA/PISATargetObjectFile.h
M llvm/lib/TargetParser/CMakeLists.txt
A llvm/lib/TargetParser/PISATargetParser.cpp
A llvm/test/CodeGen/PISA/GlobalISel/build-vector-with-constants-trunc-double.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-abs-iredsmax.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-cmp-and-all-ones.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-extract-build-vector.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-fadd-constant.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-getdef-ignoring-bitcasts-novectors.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-local-id-range-trunc-zext.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-p2i-to-i2p-addrspace.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-select-trunc-one-zero.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-trunc-bool-trunc.mir
A llvm/test/CodeGen/PISA/GlobalISel/combine-truncated-shift.mir
A llvm/test/CodeGen/PISA/GlobalISel/fix-illegal-shift-amt.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalize-load-store-subbyte-scalar.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalize-threeway-cmp.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-16-32-vec.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-concat-vectors-clamp-elts.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-constant.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-subvector.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-vector-elt-illegal-size.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-fldexp.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-freeze-i96.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-frem.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-i2f.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-icmp.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-implicit-def.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-insert-subvector.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-non-power-of-2-overfetch.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-i1-vec.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-non-standard-vec.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-vec-of-large-ints.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh-i64.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-s5.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-s96.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-scalarize.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-widen.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-select-widen.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-store-long-alignment.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-udiv128-sequence.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-unmerge-vectors.mir
A llvm/test/CodeGen/PISA/GlobalISel/legalizer-zext-big.mir
A llvm/test/CodeGen/PISA/GlobalISel/mir-print-bfloat.mir
A llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-compare-select.mir
A llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-extract-subvector-partial.mir
A llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-no-commute-shift-loop.mir
A llvm/test/CodeGen/PISA/GlobalISel/postrapseudo-i1.mir
A llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-reduce-predicates.mir
A llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-zext-and.mir
A llvm/test/CodeGen/PISA/GlobalISel/retain-extractvec.mir
Log Message:
-----------
[PISA] Add PISA GlobalISel lowering, legalization and combiners
Add the PISA GlobalISel lowering path: call lowering, the legalizer rules,
register-bank information and the pre/post-legalization combiners, together
with the machine-function info, frame lowering, and the target-machine
pipeline through register-bank selection.
Adds GlobalISel LIT tests for legalization and the combiners. Instruction
selection is added in the following change.
Commit: 9fc833233d1766089c91dedc5b36575fb53101c6
https://github.com/llvm/llvm-project/commit/9fc833233d1766089c91dedc5b36575fb53101c6
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
Fix buildbot issues
Commit: 73a06dc812f249ba3df3970184a91d7978c15979
https://github.com/llvm/llvm-project/commit/73a06dc812f249ba3df3970184a91d7978c15979
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/PISATargetParser.h
M llvm/lib/Target/PISA/PISACallLowering.cpp
M llvm/lib/Target/PISA/PISAISelLowering.cpp
M llvm/lib/Target/PISA/PISALegalizerInfo.cpp
M llvm/lib/Target/PISA/PISAMachineFunctionInfo.h
M llvm/lib/Target/PISA/PISAPostLegalizerCombiner.cpp
M llvm/lib/Target/PISA/PISAPreLegalizerCombiner.cpp
M llvm/lib/Target/PISA/PISARegisterBankInfo.cpp
M llvm/lib/Target/PISA/PISASubtarget.cpp
M llvm/lib/Target/PISA/PISATargetMachine.cpp
M llvm/lib/Target/PISA/PISATargetMachine.h
M llvm/lib/TargetParser/PISATargetParser.cpp
Log Message:
-----------
Do not use auto
Commit: 92b79a105a5f3409a762bf9951662e988d84e0c5
https://github.com/llvm/llvm-project/commit/92b79a105a5f3409a762bf9951662e988d84e0c5
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/PISACallLowering.cpp
Log Message:
-----------
Change lowerReturn to use getSubtarget<PISASubtarget>()
Commit: 7eda8b0a4a1087522d82d7e512ee5a6c005b27cb
https://github.com/llvm/llvm-project/commit/7eda8b0a4a1087522d82d7e512ee5a6c005b27cb
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/CodeGen/PISA/GlobalISel/build-vector-with-constants-trunc-double.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-abs-iredsmax.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-cmp-and-all-ones.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-extract-build-vector.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-fadd-constant.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-getdef-ignoring-bitcasts-novectors.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-local-id-range-trunc-zext.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-p2i-to-i2p-addrspace.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-select-trunc-one-zero.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-trunc-bool-trunc.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-truncated-shift.mir
M llvm/test/CodeGen/PISA/GlobalISel/fix-illegal-shift-amt.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalize-load-store-subbyte-scalar.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-16-32-vec.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-concat-vectors-clamp-elts.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-constant.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-subvector.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-vector-elt-illegal-size.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-fldexp.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-freeze-i96.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-frem.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-i2f.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-icmp.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-implicit-def.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-insert-subvector.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-non-power-of-2-overfetch.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-i1-vec.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-non-standard-vec.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-vec-of-large-ints.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh-i64.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-s5.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-s96.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-scalarize.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-widen.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-select-widen.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-store-long-alignment.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-udiv128-sequence.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-unmerge-vectors.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-zext-big.mir
M llvm/test/CodeGen/PISA/GlobalISel/mir-print-bfloat.mir
M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-compare-select.mir
M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-extract-subvector-partial.mir
M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-no-commute-shift-loop.mir
M llvm/test/CodeGen/PISA/GlobalISel/postrapseudo-i1.mir
M llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-reduce-predicates.mir
M llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-zext-and.mir
M llvm/test/CodeGen/PISA/GlobalISel/retain-extractvec.mir
Log Message:
-----------
Use -mtriple=pisa and remove -verify-machineinstrs in legalizer-unmerge-vectors.mir
Commit: f96a2206eda0efa4f3215824ba202fc0ec1303b0
https://github.com/llvm/llvm-project/commit/f96a2206eda0efa4f3215824ba202fc0ec1303b0
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/PISARegisterBankInfo.cpp
Log Message:
-----------
Obtain PISARegisterInfo through PISASubtarget
Commit: de37861a7dd2a92900946858575dae149a0e33f0
https://github.com/llvm/llvm-project/commit/de37861a7dd2a92900946858575dae149a0e33f0
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/MCTargetDesc/PISARegEncoder.cpp
M llvm/lib/Target/PISA/PISAISelLowering.cpp
M llvm/lib/Target/PISA/PISALegalizerInfo.cpp
M llvm/lib/Target/PISA/PISARegisterInfo.cpp
M llvm/lib/Target/PISA/PISATargetMachine.cpp
Log Message:
-----------
Use {} instead of std::make_pair
Commit: 64f9ea0db50496bb1afb9cd68c518c0e5a46c7a2
https://github.com/llvm/llvm-project/commit/64f9ea0db50496bb1afb9cd68c518c0e5a46c7a2
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/CodeGen/PISA/GlobalISel/build-vector-with-constants-trunc-double.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-getdef-ignoring-bitcasts-novectors.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-select-trunc-one-zero.mir
M llvm/test/CodeGen/PISA/GlobalISel/combine-truncated-shift.mir
M llvm/test/CodeGen/PISA/GlobalISel/fix-illegal-shift-amt.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-vector-elt-illegal-size.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh-i64.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-store-long-alignment.mir
M llvm/test/CodeGen/PISA/GlobalISel/legalizer-zext-big.mir
M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-compare-select.mir
M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-no-commute-shift-loop.mir
M llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-reduce-predicates.mir
M llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-zext-and.mir
Log Message:
-----------
Remove IR sections from MIR tests
Commit: 3d00bdf4f9d6b75b7cf7977a02a5c2678fc02b43
https://github.com/llvm/llvm-project/commit/3d00bdf4f9d6b75b7cf7977a02a5c2678fc02b43
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/PISACallLowering.cpp
Log Message:
-----------
Use LLT::scalarOrVector
Commit: d736d5f0b6cbf6a0bb7d619a87509057edd0e360
https://github.com/llvm/llvm-project/commit/d736d5f0b6cbf6a0bb7d619a87509057edd0e360
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/PISACallLowering.cpp
Log Message:
-----------
Replace assert with reportFatalUsageError
Commit: d84ad34578280a786ef061fa1b017aeabd4cf12c
https://github.com/llvm/llvm-project/commit/d84ad34578280a786ef061fa1b017aeabd4cf12c
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/PISALegalizerInfo.cpp
Log Message:
-----------
Rename legalizeGLoad to legalizeGLoadStore (it handles both loads and stores)
Commit: fadc6595ddac93088f9fed6050d66a9548c407ee
https://github.com/llvm/llvm-project/commit/fadc6595ddac93088f9fed6050d66a9548c407ee
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/PISALegalizerInfo.cpp
Log Message:
-----------
Replace llvm_unreachable with reportFatalUsageError
Commit: b21f38cc517cdb4ffadf182411af6788ebeb921e
https://github.com/llvm/llvm-project/commit/b21f38cc517cdb4ffadf182411af6788ebeb921e
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/PISACombine.td
M llvm/lib/Target/PISA/PISAPostLegalizerCombiner.cpp
M llvm/lib/Target/PISA/PISAPreLegalizerCombiner.cpp
Log Message:
-----------
Replace /// with //
Commit: efed192cf2d1c7c6bb498b182c909406e560e6ba
https://github.com/llvm/llvm-project/commit/efed192cf2d1c7c6bb498b182c909406e560e6ba
Author: Michal Paszkowski <michal.paszkowski at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/PISA/PISAPreLegalizerCombiner.cpp
A llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-i1.mir
Log Message:
-----------
Fix PISAPreLegalizerCombiner
Compare: https://github.com/llvm/llvm-project/compare/3bdb62ea7b7b...efed192cf2d1
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