[all-commits] [llvm/llvm-project] 92d07f: [ORC] Mangle memory-access CI names as C rather th...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Tue Sep 22 07:54:20 PDT 2026
Branch: refs/heads/users/alexey-bataev/spr/slpdrop-unprofitable-splat-subtrees-before-the-profitability-trim
Home: https://github.com/llvm/llvm-project
Commit: 92d07f56b285805edb4ea6ca0d348b2b0f80aa2d
https://github.com/llvm/llvm-project/commit/92d07f56b285805edb4ea6ca0d348b2b0f80aa2d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/MemoryAccessSPSCI.h
Log Message:
-----------
[ORC] Mangle memory-access CI names as C rather than Verbatim (#225066)
Flip the memory-access wrapper descriptors (MemoryAccessSPSCI.h) from
Verbatim to C., so their names carry the target's C mangling (a leading
'_' on Darwin, no-op elsewhere). First step of moving the ORC runtime
controller-interface names to C to match an upcoming runtime change. The
controller (recordProxy) and the in-tree executor (OrcRTBootstrap,
mangledCopy) mangle these same specs, so they stay in sync; nothing else
defines these names.
Commit: dca7629f289f3dc92efb80557463f08d56255365
https://github.com/llvm/llvm-project/commit/dca7629f289f3dc92efb80557463f08d56255365
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
clang-sycl-linker: Compute the DataLayout from the triple (#224376)
Seed the module's DataLayout from the target triple directly rather than
from TargetMachine::createDataLayout().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: df7b30abf4f1976b17c4d2c1a7177608c64dc529
https://github.com/llvm/llvm-project/commit/df7b30abf4f1976b17c4d2c1a7177608c64dc529
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Don't pass the sentinel to vector::__{insert,init}_with_size (#224583)
We don't make use of the sentinel anymore, so we don't need to pass it
around.
This was originally part of #214132. However, that patch has a difficult
to track down performance issue. I'm splitting it up to make the search
easier.
Commit: a9f4d3ff18c554d29bbabc546f9a9df0376701e0
https://github.com/llvm/llvm-project/commit/a9f4d3ff18c554d29bbabc546f9a9df0376701e0
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector-compress.mir
Log Message:
-----------
[GlobalISel] Add G_VECTOR_COMPRESS support of computeKnownBits & computeNumSignBits (#223967)
Port the value tracking for ISD::VECTOR_COMPRESS to the GlobalISel
G_VECTOR_COMPRESS. Each result lane is either a lane of the source or
the passthrough operand, so:
- KnownBits is the intersection of the source and passthrough and,
- the number of sign bits is the minimum of the two.
Commit: f10b0b1554d31fdea2dd3963e179fa75ea2e262e
https://github.com/llvm/llvm-project/commit/f10b0b1554d31fdea2dd3963e179fa75ea2e262e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/Wasm.cpp
Log Message:
-----------
[clang][Interpreter] Do not overwrite the module's DataLayout (#224027)
The incremental CUDA device and Wasm executors reset the module's
DataLayout from TargetMachine::createDataLayout() before codegen. These
modules are produced by clang's own CodeGen, so already have a datalayout so
this is redundant. This also avoids using the TargetMachine copy of the datalayout,
which will eventually be removed.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d3d2960ebb9d98850662a6ce53864b10c4f94586
https://github.com/llvm/llvm-project/commit/d3d2960ebb9d98850662a6ce53864b10c4f94586
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/liboffload/CMakeLists.txt
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/CMakeLists.txt
Log Message:
-----------
[offload][omp] link libomptarget against liboffload (#221730)
This first creates a static version of liboffload and links
libomptarget against it instead of linking the plugins directly. This
allows libomptarget to access the plugins both directly and through
liboffload in the subsequent PRs to starte the migration to liboffload.
Assisted by Claude.
Commit: f5dd45d427bee1a958cfcd35b1155da9391cc4e1
https://github.com/llvm/llvm-project/commit/f5dd45d427bee1a958cfcd35b1155da9391cc4e1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/exit-value-nowrap-flags.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-correlated-end.ll
M llvm/test/Analysis/ScalarEvolution/trip-count13.ll
Log Message:
-----------
[SCEV] Use computeMaxBECountForLT for howManyGreaterThans. (#224863)
Instead of checking for overflow of IV > RHS we can instead check ~IV <
~RHS.
This allows removing canIVOverflowOnGT, by extending canIVOverflowOnLT
and computeMaxBECountForLT to invert the operands if needed, replacing
hand rolled logic in howManyGreaterThans.
This improves results in some cases, because computeMaxBECountForLT
covers some additional cases:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1371.
This is also the last step in preparation for using howManyLessThans for
howManyGreaterThans.
PR: https://github.com/llvm/llvm-project/pull/224863
Commit: 94eb926803f2fa755b3f487a4220e13ac7348c83
https://github.com/llvm/llvm-project/commit/94eb926803f2fa755b3f487a4220e13ac7348c83
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
M libsycl/unittests/event/async_handler.cpp
Log Message:
-----------
[libsycl] Integrate context to async handlers. (#224050)
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 233f1108a8235fe4568f7eae5ace8ae492825e94
https://github.com/llvm/llvm-project/commit/233f1108a8235fe4568f7eae5ace8ae492825e94
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/windows/TargetTriple.cpp
M orc-rt/test/unit/bedrock/sys/TargetTripleTest.cpp
Log Message:
-----------
[orc-rt] Implement Windows target triple detection (#224514)
Adds Windows target triple detection for ORC-RT.
Currently supports x86-64 MSVC targets only. ARM64 will be added once
tested on that platform.
Commit: 0a40cb2bbd3d7887947c9f4a8a4a0d031e0ac76c
https://github.com/llvm/llvm-project/commit/0a40cb2bbd3d7887947c9f4a8a4a0d031e0ac76c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
R libc/src/__support/CPP/vector.h
M libc/test/src/__support/CPP/CMakeLists.txt
R libc/test/src/__support/CPP/vector_test.cpp
Log Message:
-----------
[libc][CPP][NFC] Remove unused cpp::vector container (#224976)
Removed cpp::vector (added in 5afbbd04803c) and its unit tests.
The group and password database entrypoints now pack auxiliary pointer
arrays into the trailing scratch space of DynamicBuffer (7252edd9aa82),
leaving cpp::vector with no callers in the codebase.
Assisted-by: Automated tooling, human reviewed.
Commit: 69172de43c4cdf4fa9de7826f6f3e4174b33a0f2
https://github.com/llvm/llvm-project/commit/69172de43c4cdf4fa9de7826f6f3e4174b33a0f2
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
A clang/test/OpenMP/nvptx_target_teams_ompx_bare_kernel_environment_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
A clang/test/OpenMP/target_teams_host_kernel_environment_codegen.cpp
M clang/test/OpenMP/target_teams_map_codegen.cpp
M clang/test/OpenMP/target_teams_num_teams_codegen.cpp
M clang/test/OpenMP/target_teams_thread_limit_codegen.cpp
M clang/test/OpenMP/teams_codegen.cpp
M clang/test/OpenMP/teams_distribute_codegen.cpp
M clang/test/OpenMP/teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[clang][flang][omp] Always generate a kernel environment (#223772)
Currently OpenMP doesn't generate a Kernel Enviroment for host kernels
or ompx_bare kernels. This causes the runtime to have special handling
for this cases.
This patch ensures that a Kernel Environment is always generated which
will allow to simplify the RTL handling.
Done mostly by Claude.
Commit: 3e4b32a108999591908ca254ac53aa81d7a1acb9
https://github.com/llvm/llvm-project/commit/3e4b32a108999591908ca254ac53aa81d7a1acb9
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/CMakeLists.txt
A llvm/cmake/WiXPerMachinePatch.xml
M llvm/docs/ReleaseNotes.md
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
workflows/release-binaries: Improve Windows installer (#220414)
The Windows WiX installer was missing two things for its setup:
1. The "product ID" which is used to uninstall any previous installed
LLVM versions. This avoids having versions living side-by-side with each
new release. I've reused the same GUID as the current 23.1.0 Win64
installer, to continue that "line" of product. The AArch64 installation
and any prior LLVM version (NSIS) before 23.1.0 will need to be
uninstalled manually, if we want to avoid side-by-side installatin.
2. A "per machine" scope which avoids messy installations which are
installed globally, but cannot be uninstalled globally, and available
only for the current user. After this PR, the installation is available
/ uninstallable to all users on the machine.
Since LLVM currently requires cmake 3.20 for building, and hasn't been
bumped yet to 3.31, also provide a workaround for the WiX scope setup.
Added a release note to signify that users would need to uninstall the
previous versions manually.
Assisted by Claude Opus 5.
Commit: bc9e7ae8e828ffa5f59f700a8a0d5fb54e0f6ba9
https://github.com/llvm/llvm-project/commit/bc9e7ae8e828ffa5f59f700a8a0d5fb54e0f6ba9
Author: Kamlesh Kumar <kamlesh.kumar at arm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/vector-interleave-consecutive-splats.ll
Log Message:
-----------
[SelectionDAG] fold interleave of contiguous splats (#224318)
When operands of vector_interleave is splats and each splat's is from a
contiguous source , interleave operations can be folded to shuffles of
source of splat.
i.e.
interleave(splat(S[J]), splat(S[J+1]), splat(S[J+2]), ..., splat(S[J +
Factor - 1]))
can be folded to
shuffles (S[J], S[J+1], S[J+Factor -1], S[J]....)
Commit: 04b52bf1dc212b3af60d3d071defa4e034ece382
https://github.com/llvm/llvm-project/commit/04b52bf1dc212b3af60d3d071defa4e034ece382
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/Lowering/ternary.cir
Log Message:
-----------
[CIR] Fix assertion with pointer offset in ternary (#224724)
Ternary lowers into some blocks, so the values that come into it end up
being block arguments, so there is no defining op for them. As a result,
the 'optimization' of the zero/subtract isn't really possible. THis
patch uses a dyn_cast_if_present instead of a dyn_cast to make sure we
don't hit that.
Commit: ddc7d4b3b43be5ef26671c19035761fb84a40388
https://github.com/llvm/llvm-project/commit/ddc7d4b3b43be5ef26671c19035761fb84a40388
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/test/CodeGen/Hexagon/copy-to-combine-const64.mir
M llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir
Log Message:
-----------
Hexagon: Don't duplicate the PC def when converting a return to L4_return (#225059)
Commit: 1dfe26e2259d80c442f0b4be66198316e2b8229d
https://github.com/llvm/llvm-project/commit/1dfe26e2259d80c442f0b4be66198316e2b8229d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/test/LTO/ARM/runtime-library-subtarget.ll
A llvm/test/LTO/RISCV/merged-module-datalayout.ll
M llvm/test/LTO/X86/cfi_endproc.ll
M llvm/test/LTO/X86/linkonce_odr_func.ll
Log Message:
-----------
LTO: Stop overwriting the merged module's DataLayout (#223987)
LTOCodeGenerator::optimize() unconditionally reset the merged module's
DataLayout from TargetMachine::createDataLayout(). The merged module
already carries the correct DataLayout since IRMover propagates the source
module's layout into the empty destination. The module should be the source of
truth for its DataLayout.
Recomputing it from the TargetMachine is also latently wrong, since the
DataLayout depends on the target-abi module flag which the
TargetMachine's cached DataLayout cannot account for.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8bc1cbb53e6476adfc57b7ccbdda80837ac034f9
https://github.com/llvm/llvm-project/commit/8bc1cbb53e6476adfc57b7ccbdda80837ac034f9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SimpleNativeMemoryMapSPSCI.h
M llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
Log Message:
-----------
[ORC] Mangle SimpleNativeMemoryMap CI names as C (#225074)
Flip the SimpleNativeMemoryMap memory-manager descriptors (instance +
reserve/initialize/deinitialize/release) from Verbatim to C, so their
names carry the target's C mangling. The controller and in-tree executor
mangle the same specs, and no other provider defines these names, so
they stay in sync; nothing else defines these names.
Also update the CreateFromExecutionSession test to use the process
triple so that its name mangling matches the target mangling above.
Commit: 8bc145f7c62d6d426ebfba7d2e297b4ecc9d4dd7
https://github.com/llvm/llvm-project/commit/8bc145f7c62d6d426ebfba7d2e297b4ecc9d4dd7
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_err.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_t16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-real16.txt
Log Message:
-----------
[AMDGPU][MC] Upstream gfx11 true16 disassembler test coverage (#223823)
Upstream new gfx11 disassembler test cases, mostly covering true16
operand
(.l/.h) and op_sel decoding that had no upstream coverage.
Commit: 95b14f3dd3db293caec8b51fad2a93373b07c587
https://github.com/llvm/llvm-project/commit/95b14f3dd3db293caec8b51fad2a93373b07c587
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libsycl/test/usm/memset.cpp
Log Message:
-----------
[libsycl][lit] Disable usm/memset.cpp (#225093)
Sporadically failing, see
https://github.com/llvm/llvm-project/issues/225092.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: fd4bcc57cd7f2aabc409768097a976edc40ff05b
https://github.com/llvm/llvm-project/commit/fd4bcc57cd7f2aabc409768097a976edc40ff05b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
Log Message:
-----------
[AMDGPU] Do not fold clamp when only one max source has modifiers (#224517)
Fix isClamp to bail if either max source has a modifier, not only when
both do. Previously `max(x, |x|)` was wrongly folded as if it were x
Commit: b569f8d694e9cec6fef18dfde2f2a76bc9f84983
https://github.com/llvm/llvm-project/commit/b569f8d694e9cec6fef18dfde2f2a76bc9f84983
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate-nested-allocatable-mapper.f90
Log Message:
-----------
[Flang][FIR] Handle SequenceTypes in isRecordWithAllocatableMember (#224048)
Currently isRecordWithAllocatableMember does not handle sequence types,
either at the top level on the input type or in subsequent nestings, it
will effectively skip them. This is quite different to how
isRecordWithDescriptorMember handles these cases, as it does in fact
unwrap sequence types to correctly dictate if there are descriptor
members inside of a record type.
This PR simply aims to align the behaviour with
isRecordWithDescriptorMember, as there are several locations where
isRecordWithAllocatableMember is being used and the expectation is that
it will indicate if there's an allocatable member inside of the record
type irrespective of sequence types being part of the equation.
Commit: 1e635d09d53d4a8656ed92bfa139a19f1012cd3d
https://github.com/llvm/llvm-project/commit/1e635d09d53d4a8656ed92bfa139a19f1012cd3d
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/windows/CPUFeatures.cpp
M orc-rt/test/unit/bedrock/sys/CPUFeaturesTest.cpp
Log Message:
-----------
[orc-rt] Implement Windows CPU feature detection (#224516)
Adds Windows CPU feature detection for ORC-RT.
Currently supports x86-64 using the Windows/MSVC CPU feature interfaces.
Additional architectures can be added as needed.
Commit: 975b5d2336389fbf282e38158d84aa1e14a8a304
https://github.com/llvm/llvm-project/commit/975b5d2336389fbf282e38158d84aa1e14a8a304
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/test/Driver/systemz-features.cpp
M clang/test/Sema/zvector.c
Log Message:
-----------
[SystemZ][z/OS] Extend systemz-features.cpp and zvector.c with z/OS RUN lines (#224733)
Add `s390x-ibm-zos` RUN lines to
`clang/test/Driver/systemz-features.cpp`
covering the default, `-mhtm`/`-mno-htm`, and `-mvx`/`-mno-vx` cases.
The `-mvx` z/OS lines require `-march=arch11` because the default z/OS
CPU (zEC12) pre-dates vector support.
Add a second RUN in `clang/test/Sema/zvector.c` using triple
`s390x-ibm-zos` with `-target-cpu z13` so the file is exercised under
the z/OS code path.
These test extensions were carved out from
https://github.com/llvm/llvm-project/pull/223026 per reviewer request
(@uweigand): the extra test runs are good additions but are not related
to the i128 XPLINK64 change.
Commit: 9028ff14b18ea678683a4960306051044160bb67
https://github.com/llvm/llvm-project/commit/9028ff14b18ea678683a4960306051044160bb67
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sched.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/aarch64/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/riscv/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/x86_64/clone.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/sched/CMakeLists.txt
A libc/src/sched/clone.h
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/clone.cpp
M libc/src/threads/CMakeLists.txt
M libc/test/src/sched/CMakeLists.txt
A libc/test/src/sched/linux/CMakeLists.txt
A libc/test/src/sched/linux/clone_test.cpp
Log Message:
-----------
[libc] Implement clone(2) and use it in thread spawning (#224257)
This patch implements an internal clone syscall wrapper and uses it both
to implement the public clone(2) entry point and to spawn new threads in
libc's thread implementation.
Previously, thread creation in thread.cpp invoked the raw SYS_clone
syscall directly, requiring target-specific inline assembly or register
variables and subtle tricks with __builtin_frame_address to pass
arguments to start_thread in the newly spawned thread.
By introducing an inline assembly clone wrapper that sets up func and
arg on the child stack and jumps to the entry function upon clone
returning in the child, we can simplify start_thread to a normal
function taking a single void * argument and eliminate the frame pointer
hacks as well as the need to compile thread.cpp with
-fno-omit-frame-pointer or optimizations.
The public clone(2) entrypoint delegates to this wrapper after unpacking
its varargs and validating pointers (returning EINVAL like glibc).
A particularly tricky aspect of this patch is the invalidation of the
cached thread IDs. As with fork(), we do this in the parent, but we
cannot do this safely for clone() in all situations. The problematic
case is where the user does not set a custom TLS block (which means the
child uses the parent's block), does not clone the address space (no
copy-on-write), and does not suspend the parent (vfork semantics). In
this case, we just give up and don't touch the thread ID. For this
particular flag, most of the operations in the child are not safe, so
we're assuming the user is prepared for such a restricted environment.
Support is implemented for x86_64, aarch64, and riscv. The
architecture-specific assembly is split out into detail::clone_impl
inside per-architecture headers.
Assisted-by: Gemini
Commit: 6b07a4d1c81ea6cdcc1e569299b0a2a628e49f70
https://github.com/llvm/llvm-project/commit/6b07a4d1c81ea6cdcc1e569299b0a2a628e49f70
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
A clang/test/Parser/ms-lambda-capture.clcpp
A clang/test/Parser/ms-lambda-capture.cpp
A clang/test/Parser/ms-lambda-capture.hip
A clang/test/ParserHLSL/ms-lambda-capture.hlsl
Log Message:
-----------
[clang] Disambiguate lambdas from Microsoft attributes (#214247)
With -fms-extensions, a CUDA/HIP lambda capture list can be consumed as
a Microsoft attribute list. This causes attributed lambdas used in
direct initialization to be misparsed as function declarators.
Tentatively inspect the tokens following the capture list and any
trailing attributes to identify lambdas before parsing Microsoft
attributes.
Assisted by: Cursor / Claude Opus 4.8
Commit: 86bd6bf6adbb266d2f4f5e0625d57e6b983220fb
https://github.com/llvm/llvm-project/commit/86bd6bf6adbb266d2f4f5e0625d57e6b983220fb
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/docs/DirectX/SemanticSignatures.md
M llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/unittests/Frontend/HLSLSemanticSignaturePackingTest.cpp
Log Message:
-----------
[HLSLSemanticSignatures] Implement the prefix packing of elements (#218062)
Implements the prefix packing algorithm.
Resolves: #204889.
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 16f37d13492079a0740837e1d04f3841f13fcfa4
https://github.com/llvm/llvm-project/commit/16f37d13492079a0740837e1d04f3841f13fcfa4
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
Log Message:
-----------
[IR] Use `uint64_t` when assigning `getZExtValue` into `I` (#224648)
This prevents a potential multiplication overflow when a constant is
later built with `ConstantInt::get()`. This fixes an issues reported by
a CodeQL scan.
Commit: 35006688eb78eb5b601e282d21701f430d737888
https://github.com/llvm/llvm-project/commit/35006688eb78eb5b601e282d21701f430d737888
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sched.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
R libc/src/__support/OSUtil/linux/syscall_wrappers/aarch64/clone.h
R libc/src/__support/OSUtil/linux/syscall_wrappers/clone.h
R libc/src/__support/OSUtil/linux/syscall_wrappers/riscv/clone.h
R libc/src/__support/OSUtil/linux/syscall_wrappers/x86_64/clone.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/sched/CMakeLists.txt
R libc/src/sched/clone.h
M libc/src/sched/linux/CMakeLists.txt
R libc/src/sched/linux/clone.cpp
M libc/src/threads/CMakeLists.txt
M libc/test/src/sched/CMakeLists.txt
R libc/test/src/sched/linux/CMakeLists.txt
R libc/test/src/sched/linux/clone_test.cpp
Log Message:
-----------
Revert "[libc] Implement clone(2) and use it in thread spawning" (#225111)
Reverts llvm/llvm-project#224257: Fails to build on risc-v.
Commit: 525d9e9db6a49f39c4eaaad879d0464b70991ef5
https://github.com/llvm/llvm-project/commit/525d9e9db6a49f39c4eaaad879d0464b70991ef5
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libcxx/include/__iterator/capacity_aware_iterator.h
M libcxx/include/__optional/optional.h
M libcxx/include/__optional/optional_ref.h
M libcxx/test/libcxx/iterators/capacity_aware_iter/arithmetic.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/assert.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/comparison.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/contiguous.verify.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/dereference.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/types.compile.pass.cpp
Log Message:
-----------
[libc++] Remove `_Tag` template parameter from __capacity_aware_iterator (#224983)
Since it was decided that `_Tag`'s benefit of preventing iterator mixups
didn't outweigh the added compile times and extra template
instantiations, remove it and all locations that used
`__capacity_aware_iterator` (so just `optional`).
Commit: 050b5650ff5c905a8d80beb31244c72f8551ba5b
https://github.com/llvm/llvm-project/commit/050b5650ff5c905a8d80beb31244c72f8551ba5b
Author: Anirudh Mathur <126768505+anirudhmathur12 at users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplate.cpp
A clang/test/SemaCXX/GH220525.cpp
Log Message:
-----------
[Clang][Sema] Don't treat error-recovery dependence as genuine template dependence in ActOnTag (#221440)
When a template argument fails to resolve (e.g. a namespace name used
where a value is expected), Sema substitutes a RecoveryExpr with a
dependent type so downstream code can recover gracefully. This
error-induced dependence was being conflated with genuine template
parameter dependence in ActOnTag's handling of TagUseKind::Reference/
Friend, causing computeDeclContext to report failure the same way it
would for an actually-dependent nested-name-specifier. This tripped an
assert in ActOnExplicitInstantiation that assumes dependent names can't
reach explicit instantiation, when in fact the diagnostic had already
been emitted at the point the RecoveryExpr was created.
Fixes #220525
Commit: c0a7197865180e8aee11f96fd84e3c1037b69d20
https://github.com/llvm/llvm-project/commit/c0a7197865180e8aee11f96fd84e3c1037b69d20
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes aa6b03e (#224915)
This fixes aa6b03ed5a9ffe5ba6f0d945fac9961884b5c6ed (#198062).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=aa6b03ed5a9ffe5ba6f0d945fac9961884b5c6ed
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: aec1f9ce37aea8005a3b1a5d4acf4988d6487813
https://github.com/llvm/llvm-project/commit/aec1f9ce37aea8005a3b1a5d4acf4988d6487813
Author: Jan André Reuter <j.reuter at fz-juelich.de>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
A offload/test/ompt/host_op_id_emi.c
Log Message:
-----------
[Offload][OMPT][NFC] Add test for `host_op_id` consistency (#201144)
Add test to ensure that `host_op_id` is correctly passed for external
monitoring interface callbacks. A set `host_op_id` during
`ompt_scope_begin` should show up during `ompt_scope_end`.
This catches cases like 2c8ca9679e85e466e8d7105027df322d03c45e3d, where
a nested `data_op` callback caused an incorrect `host_op_id` on the
outer `ompt_scope_end` event (fixed by
9de6f9e7c8d1faabf7e7e49ba49e6d6f3af21373).
---------
Signed-off-by: Jan André Reuter <j.reuter at fz-juelich.de>
Commit: 5ed8a18c43ad9d328df1cfa08e3377933e6ea398
https://github.com/llvm/llvm-project/commit/5ed8a18c43ad9d328df1cfa08e3377933e6ea398
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Give musl LLVM tools 8 MiB worker stacks (#223989)
LLVM 23 ThinLTO can overflow musl's 128 KiB default pthread stack in
`DSEState::eliminateRedundantStoresViaDominatingConditions`, crashing
`ld.lld` on valid input. Add `-Wl,-z,stack-size=8388608` to
`Support.linkopts` for musl Bazel builds, using the
`@rules_cc//cc/libc:musl` constraint already used by `config.bzl`. [musl
supports increasing default pthread stacks through
`PT_GNU_STACK`](https://wiki.musl-libc.org/functional-differences-from-glibc.html).
Downstream validation on LLVM 23.1.0 in
https://github.com/hermeticbuild/hermetic-llvm/pull/753 reproduced the
crash with a captured link and a synthetic 1000-block ThinLTO input. A
musl linker rebuilt with the same linker option advertised an 8 MiB
`GNU_STACK` and passed both cases.
On this upstream branch, Buildifier, `git diff --check`, and
`llvm-check-pr-format` pass (no changed C/C++ files). No fresh
upstream-main LLVM build was performed.
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 3eb0f2b9251df770a0140d140d17bc6e53f69e44
https://github.com/llvm/llvm-project/commit/3eb0f2b9251df770a0140d140d17bc6e53f69e44
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/TrieRawHashMap.h
M llvm/include/llvm/CodeGen/MIRFSDiscriminator.h
M llvm/include/llvm/CodeGen/MIRSampleProfile.h
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/include/llvm/DebugInfo/CodeView/DebugFrameDataSubsection.h
M llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h
M llvm/include/llvm/DebugInfo/PDB/Native/InfoStreamBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/CompileUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/Layer.h
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/include/llvm/ExecutionEngine/RuntimeDyldChecker.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Object/GOFF.h
M llvm/include/llvm/ProfileData/GCOV.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
Log Message:
-----------
[llvm] Remove declarations without definitions (NFC) (#225020)
ThreadSafeTrieRawHashMapBase::getImpl in
llvm/include/llvm/ADT/TrieRawHashMap.h: Added on October 29, 2024 in
commit b510cdb895b9188e5819c4c85a6dab22a4d14385 without a definition or
any callers.
MIRAddFSDiscriminators::getNumFSBBs and
MIRAddFSDiscriminators::getNumFSSamples in
llvm/include/llvm/CodeGen/MIRFSDiscriminator.h: Added on May 18, 2021 in
commit 886629a8c9e58752627d8ae7abf6fa93191a3df8 without definitions or
any callers.
MIRProfileLoaderPass::init in
llvm/include/llvm/CodeGen/MIRSampleProfile.h: Added on August 18, 2021
in commit 5fdaaf7fd8f35ac9c9de50a45b09e29c7b0d48c4 without a definition
or any callers.
ModuloScheduleExpanderMVE::generateKernelPhi in
llvm/include/llvm/CodeGen/ModuloSchedule.h: Added on June 12, 2024 in
commit 0c5319e546321d7a766999e49e0ccf801ff2b3dc without a definition or
any callers.
codeview::DebugFrameDataSubsection::setFrames in
llvm/include/llvm/DebugInfo/CodeView/DebugFrameDataSubsection.h: Added
on June 14, 2017 in commit a8cfc29c9a3e39a18f576a2820a7a259654fe953
without a definition or any callers.
gsym::DwarfTransformer::parse in
llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h: Added on
February 11, 2020 in commit 19602b71949db1f840b262558c832c5f73722c7e
without a definition or any callers.
logicalview::LVLogicalVisitor::printMemberAttributes (both overloads) in
llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h:
Added on February 27, 2023 in commit
e7950fceb1e7f82370f6cff80b258e552eb410a6 without definitions or any
callers.
pdb::InfoStreamBuilder::finalize in
llvm/include/llvm/DebugInfo/PDB/Native/InfoStreamBuilder.h: Added on
January 20, 2017 in commit 60667ca0b2b95ee25dace3f8627feda5a904cd8f
without a definition or any callers.
orc::SimpleCompiler::manglingOptionsForTargetMachine in
llvm/include/llvm/ExecutionEngine/Orc/CompileUtils.h: Added on
January 21, 2020 in commit ce2207abaf9a925b35f15ef92aaff6b301ba6d22
without a definition or any callers.
orc::DLLImportDefinitionGenerator::getTargetPointerSize and
orc::DLLImportDefinitionGenerator::getEndianness in
llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h: The definitions
and callers were removed on January 14, 2025 in commit
4eaff6c58ae2f130ac8d63cf2c87bbb483114876.
orc::IRMaterializationUnit::getInitSymbol in
llvm/include/llvm/ExecutionEngine/Orc/Layer.h: Added on December 16,
2019 in commit 85fb997659b55101b58e3545733e581bf4ed9cf2 without a
definition or any callers.
orc::loadMachOLinkableFile in
llvm/include/llvm/ExecutionEngine/Orc/MachO.h: Added on August 28, 2024
in commit 7a4013f029c4d360a9374ff49b5d17479fcb03df without a definition
or any callers (when renaming loadMachORelocatableObject in the header
while leaving the definition in MachO.cpp named
loadMachORelocatableObject).
RuntimeDyldChecker::getSectionLoadAddress in
llvm/include/llvm/ExecutionEngine/RuntimeDyldChecker.h: The definition
and callers were removed on April 8, 2019 in commit
941f247d30c447903107aa614ea46fb1e4019698.
hlsl::rootsig::verifyRangeType in
llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h: The
definition and caller were removed on September 10, 2025 in commit
9e778f6cd155f64896a9a0580e96aa4814ca999b.
FenceInst::Init in llvm/include/llvm/IR/Instructions.h: Added on
July 25, 2011 in commit fee02c6c1378f7244e05157aa9b07da77061fb64 without
a definition or any callers.
initializeDXILMetadataAnalysisWrapperPrinterPass and
initializeLogicalSROALegacyPassPass in
llvm/include/llvm/InitializePasses.h:
initializeDXILMetadataAnalysisWrapperPrinterPass was added on August 12,
2024 in commit 03e6675fc78783d0d0b0a784eccbd5ff19de23a2, and
initializeLogicalSROALegacyPassPass was added on July 20, 2026 in commit
03b5c5285eaf0acdc1dc30c5be6e0a7cefeab16f, both without definitions or
any callers.
createCustomBehaviour, createInstrPostProcess, and
createInstrumentManager in llvm/include/llvm/MC/TargetRegistry.h:
createCustomBehaviour and createInstrPostProcess were added on July 24,
2021 in commit dbed061bf13b74cbbe6de3062f7f50481dd45ac4, and
createInstrumentManager was added on November 4, 2022 in commit
98e342dca23729dd4e9cdc5f25c647d617b94283, all without definitions or any
callers (only the corresponding methods on Target were defined).
object::DXContainer::parseSignature in
llvm/include/llvm/Object/DXContainer.h: Added on October 5, 2023 in
commit 9f87522b121a08b97aff433e8b53dec1acf7c9d0 without a definition or
any callers.
object::Record::getContinuousData and
object::{TXTRecord,HDRRecord,ESDRecord,RLDRecord,ENDRecord}::getData in
llvm/include/llvm/Object/GOFF.h: RLDRecord::getData was added on
April 28, 2023 in commit 2fa6bcf02f1585df3af6d0081215e23c07421f43
without a definition or any callers; the definitions and callers of
Record::getContinuousData, TXTRecord::getData, HDRRecord::getData,
ESDRecord::getData, and ENDRecord::getData were removed on August 13,
2026 in commit 5f59554a392283f9f047b51ca5e562179e2e37d8.
GCOVBlock::getLineCount in llvm/include/llvm/ProfileData/GCOV.h: The
definition and callers were removed on September 13, 2020 in commit
4d7b19454397103620394dcceaf29592ef195231.
sandboxir::CmpInst::createCommon in
llvm/include/llvm/SandboxIR/Instruction.h: Added on September 4, 2024 in
commit 840da2e8ba7e0f77938adfc6f6d315137542a1b8 without a definition or
any callers.
cl::expandResponseFiles (4-argument overload) in
llvm/include/llvm/Support/CommandLine.h: Added on August 22, 2022 in
commit b934be2c059a99351d08069bb80155e49f047b6e without a definition or
any callers.
DebugCounter::parseChunks in llvm/include/llvm/Support/DebugCounter.h:
The definition and callers were removed on January 5, 2026 in commit
7f9a00e59c569110ac2bdaa5f21d26eff9c1de65.
sys::fs::status_known (2-argument overload) in
llvm/include/llvm/Support/FileSystem.h: Added on November 24, 2010 in
commit 96bcfcf2c2907519cd765debce94082f421f0829 without a definition or
any callers.
Xtensa::getCPUFeatures and Xtensa::fillValidCPUList in
llvm/include/llvm/TargetParser/XtensaTargetParser.h: Added on August 12,
2025 in commit 48da8489f2c1d416658527f6b806d618abd5ab73 without matching
definitions or any callers (XtensaTargetParser.cpp defined overloads
taking std::vector<StringRef> & instead of
SmallVectorImpl<StringRef> &).
Assisted-by: Antigravity
Commit: 7ff51d0e1895b0b27556e3da3b15142555ce0b07
https://github.com/llvm/llvm-project/commit/7ff51d0e1895b0b27556e3da3b15142555ce0b07
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/test/Integration/Dialect/XeGPU/WG/simple_3d_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_3d_mxfp_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
[MLIR][XeGPU] Update WG integration tests to strict property syntax (#222457)
XeGPU enabled strict properties in its assembly format (b73a8b8d8c17),
so inherent attributes such as the `layout`/`layout_*` operands of
load_nd, store_nd, prefetch_nd, dpas and dpas_mx must be spelled in a
prop-dict (`<{...}>`) instead of the discardable attr-dict (`{...}`).
Several workgroup level integration tests were missed by that update and
now fail to parse.
Commit: 64dad8b0453e32472bc47c5874145b06950c9aa1
https://github.com/llvm/llvm-project/commit/64dad8b0453e32472bc47c5874145b06950c9aa1
Author: leovance <leovancekang at outlook.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
Log Message:
-----------
[mlir][OpenACC][NFC] Fix par_width syntax in code examples (#222291)
Update the acc.predicate_region documentation and the ACCCGToGPU example
to use the explicit par_dim(...) syntax required since #217298.
These examples still use the old attribute-dictionary spelling. This is
a documentation-only change; operation definitions and lowering behavior
are unchanged.
Commit: 39e01e7fab62551ff1b4f6407af80ba011948c1e
https://github.com/llvm/llvm-project/commit/39e01e7fab62551ff1b4f6407af80ba011948c1e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
Log Message:
-----------
[SCEV] Move getSCEVAtExit() into ScalarEvolution (#225102)
Exit value replacement only needs to know the value at a specific exit,
while getSCEVAtScope() provides one that is valid at *any* exit. It has
some custom code to at least handle the case of addrecs.
Uplift this code into SCEV as getSCEVAtExit(). For now it just does the
same thing the code in LoopUtils did.
Commit: 267f92f79b2de95202af0df2b4488a004e0639a5
https://github.com/llvm/llvm-project/commit/267f92f79b2de95202af0df2b4488a004e0639a5
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
Log Message:
-----------
[CIR][NFC] Fix VectorType element-type description (#224827)
Fix the VectorType element-type description
Commit: 4f611fa8e0c770753d5006d2cb934cde9a8a6831
https://github.com/llvm/llvm-project/commit/4f611fa8e0c770753d5006d2cb934cde9a8a6831
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
Fix bazel build for clang/unittests:serialization_tests (#225134)
Fixes https://github.com/llvm/llvm-project/pull/224528 (commit
f970f59a9d4e) by adding missing //clang:ast dependency.
Commit: 2e7f48adb2c1ec1fdd15486289583e4e1668bb56
https://github.com/llvm/llvm-project/commit/2e7f48adb2c1ec1fdd15486289583e4e1668bb56
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/aux_arg.ll
Log Message:
-----------
[SandboxVec][BottomUpVec][NFC] Use AuxPassArg for BundleVec pass aux args (#224777)
This patch replaces the original logic that processes the bundle-vec
auxiliary arguments with the AuxPassArg classes.
Commit: 78563625bdce600d1a4af2905ed42c17ff881a94
https://github.com/llvm/llvm-project/commit/78563625bdce600d1a4af2905ed42c17ff881a94
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Dialect/CUF/Attributes/CUFAttr.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Support/Utils.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
A flang/lib/Optimizer/Transforms/CUDA/CUFDuplicateDeviceFunc.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
A flang/test/Fir/CUDA/cuda-device-func-transform-copies.mlir
A flang/test/Fir/CUDA/cuda-duplicate-device-func.mlir
Log Message:
-----------
[flang][cuda] duplicate host_device procedures early and outline the copies under their original name (#224400)
An `attributes(host,device)` procedure is lowered as a single
`func.func`, which `cuf-transform-device-func` clones into the GPU
module at the end of the FIR pipeline. By then the optimizer has already
placed the one body under the host policy, so with `-fstack-arrays` an
automatic array stays a `fir.alloca` and overflows the device stack at
run time:
```fortran
attributes(host,device) integer function sumauto(n)
integer :: auto(n)
...
end function
attributes(global) subroutine kern(a, n)
a(1) = sumauto(n) ! device call
end subroutine
```
Procedures reached from device code only through such a procedure, and
device bodies inlined into a kernel, have the same problem.
This adds `cuf-duplicate-device-func`, meant to run before the FIR
optimizer. Every `host_device` procedure, and every procedure without a
device attribute that device code reaches through calls or procedure
references, gets a device copy in the host module, and device code is
redirected to it while host code keeps the original:
```mlir
func.func @sumauto(...) attributes {cuf.proc_attr = #cuf.cuda_proc<host_device>} {
%auto = fir.alloca !fir.array<?xi32>, %n // host copy, unchanged
}
func.func @sumauto.device(...) attributes {cuf.proc_attr = #cuf.cuda_proc<device>,
cuf.device_copy_of = @sumauto,
fir.allocation_policy = #fir.allocation_policy<stack_arrays = false, ...>} {
%auto = fir.alloca !fir.array<?xi32>, %n // placed to the heap by the optimizer
}
func.func @kern(...) attributes {cuf.proc_attr = #cuf.cuda_proc<global>} {
fir.call @sumauto.device(...) // was @sumauto
}
```
The optimizer then treats the two as ordinary functions with their own
policies, and inlining a copy into a kernel carries the heap allocation
along. Declarations are not copied, so runtime calls keep their real
names and the descriptor I/O check in `cuf-transform-device-func` still
fires.
`cuf-transform-device-func` recognizes the `cuf.device_copy_of` marker,
outlines the copy under the original name, since device symbol names are
the cross-unit ABI, restores the original names inside outlined code and
`cuf.kernel` regions, leaves the `host_device` original in the host
module and erases the copy:
```mlir
func.func @sumauto(...) { %auto = fir.alloca ... } // host module
gpu.module @cuda_device_mod {
gpu.func @sumauto(...) { %auto = fir.allocmem ... } // the copy, renamed back
gpu.func @kern(...) kernel { fir.call @sumauto(...) }
}
```
Without markers the pass behaves as before, so it is correct in either
pipeline order.
The device code gathering is factored out of `cuf-transform-device-func`
into `cuf::collectDeviceCode`, shared by both passes.
`fir::getPresentedFunction` and `fir::getPresentedCallee` let
diagnostics and remarks report a copy as the procedure it copies, and
`fir::getPresentableFunctionName` uses them, so a remark inside
`@sumauto.device` names `sumauto`. Lowering and the copies share
`cuf::setDeviceAllocationPolicy`.
Commit: 37f85ad1b302a993a6b2d3afd0a031baf64e7d9c
https://github.com/llvm/llvm-project/commit/37f85ad1b302a993a6b2d3afd0a031baf64e7d9c
Author: Adam Magier <adam.a.magier.foss at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
M clang/test/CodeGen/catch-pointer-overflow-volatile.c
M clang/test/CodeGen/catch-pointer-overflow.c
M clang/test/CodeGen/ubsan-pointer-overflow.c
Log Message:
-----------
[clang][CodeGen] Use ptrtoaddr for the pointer-overflow check (#223446)
Since 052dde9c3a62 ("[SCEV] Do not represent ptrtoint as ptrtoaddr")
SCEV treats the check's ptrtoint as opaque, so IndVarSimplify no longer
infers nuw on the reconstructed address and InstCombine no longer folds
the comparison. Provably safe checks now survive to run time.
ptrtoaddr is correct here: the address is only compared against the
recomputed one and passed to the handler, and is dead otherwise. This is
unlike the pointer subtraction in d7594bf4caa5 (reverted in
fcd814ae4357), whose result is a user-visible value that can be used to
reconstruct a pointer, e.g. via -(nullptr - ptr).
The result type becomes DL.getAddressType(), so the offset arithmetic is
done in the address width rather than the pointer width. They coincide
in every address space the check is emitted in on in-tree targets, and
where they do not the diagnostics are unaffected: EmitCheckValue
zero-extends a narrower argument to IntPtrTy before the handler call.
Assisted-by: Kiro CLI / Claude Opus 5
Commit: d6da65a5b9822dbdc8764c933334cf609655a63c
https://github.com/llvm/llvm-project/commit/d6da65a5b9822dbdc8764c933334cf609655a63c
Author: Yian Su <yiansu.developer at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-thread-private-storage-remark.mlir
Log Message:
-----------
[mlir][openacc] Report privates using thread-private storage (#224398)
ACCCGToGPU reports privates it places in GPU shared memory, but says
nothing when a private is given per-thread storage instead. Collect
those names too and emit a matching remark.
Commit: cb9286833f2b6bac93edcc258289b54b4681037b
https://github.com/llvm/llvm-project/commit/cb9286833f2b6bac93edcc258289b54b4681037b
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/test/Dialect/XeGPU/peephole-optimize.mlir
Log Message:
-----------
[mlir][xegpu] Fold memref offset in peephole create_nd_tdesc rewrite (#224459)
XeGPUCreateNdDescOpPattern in peephole optimization only extracted
strided metadata for dynamic-shape
memrefs, but hasStaticShapeAndStrides() ignores the offset — so a
static-shape memref with a nonzero or dynamic offset (e.g. from a
subview) would silently read from offset 0. This PR changes it to always
extract and fold the offset into the base pointer.
Assisted by Claude
Commit: 4791c3055214978d6acc5184bf236d75fc75ee23
https://github.com/llvm/llvm-project/commit/4791c3055214978d6acc5184bf236d75fc75ee23
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Analysis/ScalarEvolution/exit-value-nowrap-flags.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-operand-order.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-rewrite-expressions.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/nsw.ll
M llvm/test/Analysis/ScalarEvolution/ranges.ll
M llvm/test/Transforms/IndVarSimplify/exit-value-nowrap-flags.ll
Log Message:
-----------
[SCEV] Propagate a recurrence's nuw flag to mul in exit value. (#224974)
Follow-up to #217378. The same reasoning applies to the multiply emitted
as well:
A recurrence's exit value is its closed form Start + BTC * Step. The
multiply does not wrap, if the recurrence does not wrap: the recurrence
reached iteration BTC, so the value it computes there is the value the
recurrence had, and that did not wrap.
Alive2 Proof: https://alive2.llvm.org/ce/z/S3_sRh
Also includes small SCEVExpander changes to thread through operands as
SCEVUse.
PR: https://github.com/llvm/llvm-project/pull/224974
Commit: 5e14ef5d10879eafe6b412278d6d851719e62c88
https://github.com/llvm/llvm-project/commit/5e14ef5d10879eafe6b412278d6d851719e62c88
Author: Jian Li <hellothedreamer at 126.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/clmulr-rv32.ll
A llvm/test/CodeGen/RISCV/GlobalISel/clmulr-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/get-named-operand-idx.td
Log Message:
-----------
[RISCV][GlobalISel] Add G_CLMULR support (#224525)
Add G_CLMULR to represent reversed carry-less multiplication in generic
Machine IR.
Translate llvm.riscv.clmulr to G_CLMULR and mark it legal for native
XLEN scalar types when Zbc is available.
Commit: 31c70556b20ad72bcb91525448bd0821c90efc27
https://github.com/llvm/llvm-project/commit/31c70556b20ad72bcb91525448bd0821c90efc27
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Parser/options.h
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Parser/parsing.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
A flang/test/Preprocessing/fixed-c-comment01.F
A flang/test/Preprocessing/fixed-c-comment02.F
A flang/test/Preprocessing/fixed-c-comment03.f
A flang/test/Preprocessing/fixed-c-comment04.f
A flang/test/Preprocessing/fixed-c-comment05.f
A flang/test/Preprocessing/free-c-comment01.f90
M flang/tools/bbc/bbc.cpp
M flang/tools/f18-parse-demo/f18-parse-demo.cpp
Log Message:
-----------
[flang] Accept C-style comments in label fields (#207012)
The main goal of this patch is to make multi-language header files
easier to write and use in fixed format sources. For this reason, and
for simplicity, C-style comments after labels, directives and OpenMP
conditional compilation sentinels are not supported.
Fixes #127426
Assisted-by: Claude Opus 5
Commit: 854a9b8d7036ef52490edfb644f30ba043a0f238
https://github.com/llvm/llvm-project/commit/854a9b8d7036ef52490edfb644f30ba043a0f238
Author: Janet Yang <qxy11 at meta.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M .ci/green-dragon/lldb-ubuntu.groovy
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/resources/build.md
M lldb/include/lldb/Host/Config.h.cmake
R lldb/include/lldb/Host/LZMA.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/common/LZMA.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/test/CMakeLists.txt
M lldb/test/Shell/lit.cfg.py
M lldb/test/Shell/lit.site.cfg.py.in
M llvm/CMakeLists.txt
M llvm/cmake/config-ix.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/docs/CMake.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/Support/Compression.h
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Compression.cpp
M llvm/test/CMakeLists.txt
M llvm/test/lit.site.cfg.py.in
M llvm/unittests/Support/CompressionTest.cpp
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/lit/lit/llvm/config.py
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/BUILD.bazel
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
[Support][lldb] Port xz (lzma) decompression from LLDB into LLVM (#220092)
### Summary
LLDB's `lldb_private::lzma` is currently the only xz decompressor in the
tree. It reads the ELF `.gnu_debugdata` (MiniDebugInfo) section, whose
embedded symbol table can sometimes be the only source of function names
in a stripped binary. Move it to `'llvm::compression::xz` so that other
tools like llvm-gsymutil can use it.
- Only decompression is implemented and it's kept out of
`compression::Format` since it's not written by LLVM and is produced by
an extra packaging step. It also doesn't model the schemes usable for
SHF_COMPRESSED sections, which are self-describing via some type of
`ELFCOMPRESS_*` constant, which doesn't exist for XZ.
- Reformats the ported code to LLVM standards, but avoids other
functional changes unless a comment was specifically made on the PR to
address it. There is a latent bug in the ported code where
`lzma_index_buffer_decode()` was passed a pointer to the stream index
but the size of the whole stream, which could've caused it to
technically read past the end of the buffer. Valid streams aren't
currently affected since the index is self-delimiting and CRC-checked,
so this will just be addressed in a following PR.
- `LLDB_ENABLE_LZMA` is replaced by `LLVM_ENABLE_LZMA`, and is default
to ON globally. Cases where LLDB_ENABLE_LZMA and LLVM_ENABLE_LZMA are in
disagreement will fail, and otherwise, uses of LLDB_ENABLE_LZMA will
result in deprecation warnings.
- In the Bazel overlay, @llvm-project//lldb:lzma=system flag can no
longer work for the same reason, so it is replaced by
-- at llvm-project//third-party:llvm_enable_lzma=true via a new
//third-party:lzma target alongside the existing zlib and zstd wrappers.
### Testing
Added a unit test testing the decompression
Existing LLDB unit tests of minidebuginfo still passing
Tested with `LLVM_ENABLE_LZMA` both on and off, check-llvm, and
check-lldb-shell are clean.
Commit: bbbcb2eb4f793af95ba9380a2c8be1e33cb6fdb2
https://github.com/llvm/llvm-project/commit/bbbcb2eb4f793af95ba9380a2c8be1e33cb6fdb2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/AArch64/abi-classify-arg-types.c
M clang/test/CodeGen/AArch64/abi-classify-arg-types.cpp
M clang/test/CodeGen/AArch64/abi-classify-return-types.c
M clang/test/CodeGen/AArch64/abi-classify-return-types.cpp
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Types.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
Log Message:
-----------
[LLVMABI][AARCH64] Handle conditions for ignoring empty types (#224476)
This adds AArch64 ABI library handling to decide when empty records and
zero-sized (non-SVE) types can be ignored as arguments and return types.
These are always ignored as return types, but the argument handling
depends on the language and ABI kind.
Assisted-by: Cursor / various models
Commit: f5bd36ecc87a5024feeced94815518438f7344a0
https://github.com/llvm/llvm-project/commit/f5bd36ecc87a5024feeced94815518438f7344a0
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
Log Message:
-----------
[AMDGPU] Do not count AGPRs twice in the wave dispatch VGPR minimum (#225110)
The minimum applies to arch VGPRs, but it was taken against the total,
which already counts AGPRs
Commit: 520af5f67f9f6d9a5a250b04de27020b100076d3
https://github.com/llvm/llvm-project/commit/520af5f67f9f6d9a5a250b04de27020b100076d3
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/attr-musttail-ehspec-errors.cpp
M clang/test/CIR/CodeGen/ehspec-noexcept.cpp
Log Message:
-----------
[CIR] Implement exception-related musttail diagnostics (#224778)
When a musttail call occurs in a function that was marked noexcept or
has a dynamic exception specification, we must report a diagnostic to
the user saying that the call is not supported in this case. This change
adds such a diagnostic for CIR codegen.
Assisted-by: Cursor / claude-opus-5
Commit: f12afd1dcfdaddc197aeb950c0d7eead6d7d96f6
https://github.com/llvm/llvm-project/commit/f12afd1dcfdaddc197aeb950c0d7eead6d7d96f6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/kcfi-bti.ll
Log Message:
-----------
AArch64: Don't duplicate the branch's implicit defs in call pseudo expansion (#225064)
These pseudo expansions started with an implicit LR def and are replaced
with a new instruction with a different LR def. Previously this would copy the
old instruction's operand list, merging with the newly build instruction def
list. Avoid creating a redundant def with inconsistent dead flags. This avoids
failing a future verifier check.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: f0159c871942b821eb54f057a7739b4269f72b46
https://github.com/llvm/llvm-project/commit/f0159c871942b821eb54f057a7739b4269f72b46
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/AST/DeclContextInternals.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Basic/FileEntry.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Index/FileIndexRecord.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#225022)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
where the operands are known to be nonnull.
The operands are known to be nonnull in one of three ways:
- Preceding checks: A null check, assertion, or dereference a few
lines above guarantees the PointerUnion is nonnull.
- Downstream code: The else or fallthrough branch unconditionally
calls cast<...>, dereferences the pointer, or reaches
llvm_unreachable.
- By construction: In DeclContextInternals.h, FileEntry.h,
FileIndexRecord.cpp, and LifetimeSafety/Checker.cpp, only nonnull
pointers are ever stored in the PointerUnion.
Assisted-by: Antigravity
Commit: 8c5c2ccf47434b4c948e5b875c977bef4d15c84e
https://github.com/llvm/llvm-project/commit/8c5c2ccf47434b4c948e5b875c977bef4d15c84e
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGCleanup.h
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/EHScopeStack.h
M clang/test/CodeGen/compound-literal-lifetime.c
Log Message:
-----------
[clang][CodeGen] Exempt lifetime marker cleanups in musttail check (#224731)
PR #219045 started emitting @llvm.lifetime.start and @llvm.lifetime.end
markers for block-scoped compound literals in C via
pushCleanupAfterFullExpr<CallLifetimeEnd>.
When a compound literal is evaluated inside a conditional branch,
pushCleanupAfterFullExpr wraps CallLifetimeEnd inside
EHScopeStack::ConditionalCleanup, which did not override
EHScopeStack::Cleanup::isRedundantBeforeReturn(). Consequently,
CodeGenFunction::EmitCall rejected [[clang::musttail]] calls when a
conditional compound literal was in scope at -O1 and above.
Because EHScopeStack::ConditionalCleanup wraps cleanups by composition,
virtual methods on EHScopeStack::Cleanup other than Emit() do not work
for conditional cleanups. Replace the virtual
EHScopeStack::Cleanup::isRedundantBeforeReturn() method with a
StackRestore bit on CleanupKind/EHCleanupScope alongside the existing
LifetimeMarker bit, and check EHCleanupScope::isRedundantBeforeReturn()
in CodeGenFunction::EmitCall.
Assisted-by: Gemini
Fixes: 93b2629d1d1f ("[clang][CodeGen] Emit lifetime markers for
block-scoped compound literals in C (#219045)")
Fixes: https://github.com/llvm/llvm-project/issues/224337
Commit: 2c429b568e1ffa1ee7e88444fac6375d46c5d979
https://github.com/llvm/llvm-project/commit/2c429b568e1ffa1ee7e88444fac6375d46c5d979
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
Log Message:
-----------
WebAssembly: Don't duplicate implicit CALL operands in LowerCallResults (#225069)
When recombining the CALL_PARAMS/CALL_RESULTS pseudo-pair into a real
CALL, LowerCallResults copied CallParams.uses() onto the new instruction.
uses() includes the implicit operands (implicit-def $arguments and the implicit
$sp32/$sp64 uses), which the freshly created CALL already carries. This
resulted in a duplicated implicit-def of $arguments. This avoids a
future verifier error.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 6460a5605d9b73640b25bd5987dea597cd648f47
https://github.com/llvm/llvm-project/commit/6460a5605d9b73640b25bd5987dea597cd648f47
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/test/CodeGen/AArch64/sme-streaming-mode-landingpads.ll
Log Message:
-----------
AArch64: Fix duplicating VG def operands in isel pseudo expansion (#225113)
Previously MSRpstatePseudo's handling would produce a duplicate VG operand.
AdjustInstrPostInstrSelection added an implicit VG use/def and an FPMR def. It's
dubious to introduce a def in the output which wasn't already present in the input,
so fix the missing FPMR def. Also guard against re-introducing the operands for
instructions which already have the defs. Ideally there would not be any of these m
anual def add calls, but that is a larger fix.
This removes the duplicate operand and fixes potentially inconsistent
dead flags, avoiding a failure in a future verifier check.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 150f8999285d07bdebc6a73dfdeae520dbdf1468
https://github.com/llvm/llvm-project/commit/150f8999285d07bdebc6a73dfdeae520dbdf1468
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
Log Message:
-----------
[AMDGPU][NFC] Introduce TDMInsts feature for tensor load/store (#225123)
Commit: 82fb38ef98afbc21ca58c0591209e48cd6d83b37
https://github.com/llvm/llvm-project/commit/82fb38ef98afbc21ca58c0591209e48cd6d83b37
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/trimmed-subtree-schedule.ll
Log Message:
-----------
[SLP][NFC]Add a test for deleted nodes but still scheduled, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225154
Commit: 9d73c09b090939b0a94c2d156519f173734e98a0
https://github.com/llvm/llvm-project/commit/9d73c09b090939b0a94c2d156519f173734e98a0
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/mad-mix-bf16-t16-inline-imm.mir
Log Message:
-----------
[AMDGPU] Use a bf16 operand profile for v_fma_mix_bf16_t16 (#224910)
Assisted-by: Claude Code Opus 5
Commit: 583e39e96333beb6b5809c94cc0607025938644b
https://github.com/llvm/llvm-project/commit/583e39e96333beb6b5809c94cc0607025938644b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
A llvm/test/tools/llvm-dwarfdump/X86/apple-names-overflowing-entry-count.s
Log Message:
-----------
[DebugInfo] Fix 32-bit overflow in AppleAcceleratorTable::equal_range (#224866)
Computing the end offset overflowed 32 bits before widening to 64 bits.
Because SameNameIterator stops on exact equality, a wrapped offset
caused an infinite loop.
Compute the product in 64 bits and return an empty range if the end
offset exceeds the section size.
rdar://186839483
Commit: cde11153fcbda7fce2299c6fe463f21cfb4a6208
https://github.com/llvm/llvm-project/commit/cde11153fcbda7fce2299c6fe463f21cfb4a6208
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang-rt/unittests/Runtime/Assign.cpp
Log Message:
-----------
[flang-rt][unittests] Define MAP_ANONYMOUS fallback for AIX in Assign tests (#224675)
We ran into
```
flang-rt/unittests/Runtime/Assign.cpp:497:21: error: use of undeclared identifier 'MAP_ANONYMOUS'
497 | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0)};
```
On AIX, `flang-rt` is built with `_XOPEN_SOURCE=700` and without `_ALL_SOURCE`, which prevents `<sys/mman.h> `from exposing `MAP_ANONYMOUS` / `MAP_ANON`. Provide a fallback definition so mmap unit tests introduced in PR #222101 compile successfully on AIX.
Commit: 4648d33f8e759d7557fb5bb8a0978023fa67306b
https://github.com/llvm/llvm-project/commit/4648d33f8e759d7557fb5bb8a0978023fa67306b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
Log Message:
-----------
[lldb] Bounds check minidump location descriptors (#223911)
MinidumpParser::GetModuleUUID sliced the file with the RVA and DataSize
taken straight from a module's CvRecord. ArrayRef::slice asserts, but a
build without assertions still reads out of bounds.
Route both through MinidumpFile::getRawData, which range checks in 64
bits, and log the error rather than returning a slice that looks valid.
rdar://186889966
rdar://186890172
Commit: b33f5efbfbfe621d77d90308c01f4a31ccf18fb1
https://github.com/llvm/llvm-project/commit/b33f5efbfbfe621d77d90308c01f4a31ccf18fb1
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2_dpp8.txt
Log Message:
-----------
[AMDGPU][MC] Upstream gfx12 true16 disassembler test coverage (#223825)
Upstream new gfx12 disassembler test cases, covering true16 operand
(.l/.h)
and op_sel decoding for f16 opcodes that had no upstream coverage:
Commit: 5301245b7d20fc4871a3253fd235a31e69f1bdfb
https://github.com/llvm/llvm-project/commit/5301245b7d20fc4871a3253fd235a31e69f1bdfb
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86InstrFragments.td
A llvm/test/CodeGen/X86/pr222714.ll
Log Message:
-----------
[X86] Don't drop a redundant 32-bit `and` whose users were selected as def32 (#223750)
Fixes #222714
Nothing was wrong with the IR or the DAG combines here; the `and %idx,
1` survived all the way into instruction selection. Isel selects users
before operands, so the `zext` of the (narrowed, i32) `and` had already
been turned into a `SUBREG_TO_REG` through the `def32` pattern, which
assumes the i32 producer zeroes the upper 32 bits. When isel then
reached the `and`, `shrinkAndImmediate` noticed via known bits that the
mask was redundant and replaced the `and` with its operand — a
`truncate` of a 64-bit `cmov`. That truncate is just a subregister copy,
so the already-emitted `SUBREG_TO_REG` ended up reading the whole 64-bit
register, and the upper bits went straight into the scaled address. The
`_BitInt(98)` is a red herring; the same thing happens with plain `i64`.
The `def32` predicate now lives in `X86DAGToDAGISel::isDef32` (the
PatLeaf calls it), and `shrinkAndImmediate` only drops a 32-bit `and`
when its operand satisfies that predicate. Otherwise it returns false
and the `and` is selected as a normal 32-bit instruction, which zeroes
the upper half as the users expect.
Commit: b0d31f40189dbdcf8b62e2c6ef79b039c5202aba
https://github.com/llvm/llvm-project/commit/b0d31f40189dbdcf8b62e2c6ef79b039c5202aba
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_loop_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_messages.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[clang][OpenMP] ORDERED clause is allowed on FOR in 4.5+ (#225106)
Several compound directives containing FOR were missing the ORDERED
clause in the set of allowed (once) clauses.
Commit: 832df12314030ea46e1ea506cabd98d805ae7ce7
https://github.com/llvm/llvm-project/commit/832df12314030ea46e1ea506cabd98d805ae7ce7
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/Transforms/SROA/phi-and-select.ll
A llvm/test/Transforms/SROA/phi-store.ll
Log Message:
-----------
[SROA] Enable alloca promotion for stores through pointer PHIs (#222893)
A store to an alloca through a phi-node prevents promotion of that
alloca in mem2reg. Mem2reg requires all users of the alloca to be
loads/stores. Fixes https://github.com/llvm/llvm-project/issues/202670.
The following is a motivating example:
```llvm
define i32 @store_to_phi(i1 %cond, i32 %value) {
entry:
%a = alloca i32, align 4
%b = alloca i32, align 4
store i32 0, ptr %a, align 4
store i32 0, ptr %b, align 4
br i1 %cond, label %left, label %right
left:
br label %merge
right:
br label %merge
merge:
%ptr = phi ptr [ %a, %left ], [ %b, %right ]
store i32 %value, ptr %ptr, align 4
%a.value = load i32, ptr %a, align 4
%b.value = load i32, ptr %b, align 4
%result = add i32 %a.value, %b.value
ret i32 %result
}
```
To promote, we can rewrite this so that we store on each branch, before
the phi:
```llvm
define i32 @store_to_phi(i1 %cond, i32 %value) {
entry:
%a = alloca i32, align 4
%b = alloca i32, align 4
store i32 0, ptr %a, align 4
store i32 0, ptr %b, align 4
br i1 %cond, label %left, label %right
left:
store i32 %value, ptr %a, align 4
br label %merge
right:
store i32 %value, ptr %b, align 4
br label %merge
merge:
%a.value = load i32, ptr %a, align 4
%b.value = load i32, ptr %b, align 4
%result = add i32 %a.value, %b.value
ret i32 %result
}
```
Now we can promote.
```llvm
define i32 @store_to_phi(i1 %cond, i32 %value) {
entry:
br i1 %cond, label %left, label %right
left:
br label %merge
right:
br label %merge
merge:
%a.value = phi i32 [ %value, %left ], [ 0, %right ]
%b.value = phi i32 [ 0, %left ], [ %value, %right ]
%result = add i32 %a.value, %b.value
ret i32 %result
}
```
Later optimizations can reduce this to just `ret i32 %value`.
You can't always move the store directly into the phi's direct
predecessor. You can only do this if that predecessor's only has one
successor. Consider the following example:
```llvm
define void @store_to_phi_split_edge(
i1 %choose_right, i1 %take_store, i32 %value, ptr %out) {
entry:
%a = alloca i32, align 4
br i1 %choose_right, label %right, label %left
left:
br label %merge
right:
br i1 %take_store, label %merge, label %exit
merge:
%ptr = phi ptr [ %a, %left ], [ %out, %right ]
store i32 %value, ptr %ptr, align 4
br label %exit
exit:
ret void
}
```
If we moved the store into the `right` branch, then we will now execute
the store when `right` branches directly to `exit`, whereas previously
we didn't. We fix this by splitting the `right` branch:
```llvm
define void @store_to_phi_split_edge(
i1 %choose_right, i1 %take_store, i32 %value, ptr %out) {
entry:
%a = alloca i32, align 4
br i1 %choose_right, label %right, label %left
left:
store i32 %value, ptr %a, align 4
br label %merge
right:
br i1 %take_store, label %right.to.merge, label %exit
right.to.merge:
store i32 %value, ptr %out, align 4
br label %merge
merge:
br label %exit
exit:
ret void
}
```
AI assisted.
Commit: eaab73d4bbaafa471f2216d58172126d2fd7c2b6
https://github.com/llvm/llvm-project/commit/eaab73d4bbaafa471f2216d58172126d2fd7c2b6
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGen/noinline-available-externally-skip.cpp
Log Message:
-----------
[CIR] Correct the behavior of 'shouldEmitFunction' with always/noinline (#224378)
These attributes modified the linkage of functions in certain cases that
caused us to, ironically, skip emitting something when we picked it up
via PCH during self-build. This patch just copies/pastes the code from
classic codegen.
Commit: 5dfe8605911e3f0f43fe2b5c08b4ffc23f2af37a
https://github.com/llvm/llvm-project/commit/5dfe8605911e3f0f43fe2b5c08b4ffc23f2af37a
Author: Pranav Kant <prka at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/CMakeLists.txt
M clang/include/clang/Config/config.h.cmake
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/include/clang/Config/config.h
Log Message:
-----------
[clang-repl] Add CLANG_ENABLE_EMUTLS_GET_ADDRESS cmake option (#217700)
Guard the extern "C" declaration and reference to __emutls_get_address
in IncrementalExecutor.cpp behind a new CMake option
CLANG_ENABLE_EMUTLS_GET_ADDRESS, which is OFF by default.
This prevents link errors in environments/runtimes where
__emutls_get_address is not available.
Replace all other guards with the new cmake option.
Commit: 16dcf47ee4fb8a9cb6dd8759e7be6599d935b618
https://github.com/llvm/llvm-project/commit/16dcf47ee4fb8a9cb6dd8759e7be6599d935b618
Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMachObjectWriter.cpp
M llvm/test/MC/RISCV/riscv-relocs-macho-data.s
M llvm/test/MC/RISCV/riscv-relocs-macho.s
Log Message:
-----------
[RISC-V][Mach-O] Fix bogus 12-bit range check on subtraction expressions. (#222205)
Assembling a subtraction expression whose offset does not fit in a
signed 12-bit integer, such as
.word _a - _b + 5000
failed with a misleading diagnostic:
error: AUIPC out of range of corresponding %pcrel_lo instruction
The check was copied from the %pcrel_lo path, where 12 bits is a real
constraint because the offset is inlined in the immediate field of an
addi or an lw. For data, the addend is stored inline in the bytes
being relocated, and a .word has all 32 bits available to hold it.
Drop the check. No extra relocation record is needed; the
offset is simply written in the data, as otool reports in the tests:
.long 5000 @ KIND_DATA
Commit: 5306fce6c317c13a5889e6909a7e3c959747fb02
https://github.com/llvm/llvm-project/commit/5306fce6c317c13a5889e6909a7e3c959747fb02
Author: R-Goc <ryszardgoc at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
A clang/lib/CIR/CodeGen/CIRGenMicrosoftCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerMicrosoftCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
A clang/test/CIR/CodeGen/cxx-msvc-abi.cpp
Log Message:
-----------
[CIR] Add initial Microsoft C++ ABI support in ClangIR (#221038)
Stub out Microsoft C++ ABI support for ClangIR CodeGen and dialect
lowering:
- Stub out CIRGenMicrosoftCXXABI.
- Stub out LowerMicrosoftCXXABI to integrate into the TargetLowering
pass in CIR dialect transforms.
- Add error.NYI extensively.
- Add a minimal test file, mainly so that it is in tree.
Assisted-by: Gemini:gemini-3.8-flash-high
Commit: 88c276ca9da8385ceb0b343db45f9f6f4dbaf8dd
https://github.com/llvm/llvm-project/commit/88c276ca9da8385ceb0b343db45f9f6f4dbaf8dd
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/Transforms/InstCombine/atomic.ll
Log Message:
-----------
[InstCombine] Preserve elementwise atomic access sizes (#223897)
There are two cases where instcombine currently will change the atomic
access size of an unordered elementwise atomic. Note that, for example,
`load atomic elementwise <4 x i32>` and `load atomic elementwise <2 x
i64>` do not have equivalent semantics. The former has 4 atomic accesses
and the latter has 2. Rewriting the former to the latter can introduce
mixed-size, concurrent, atomic accesses, which race in LLVM. Without
`elementwise`, rewriting _is_ legal.
The two cases are:
1. `mergeStoreIntoSuccessor`:
```
/// Try to transform:
/// if () { *P = v1; } else { *P = v2 }
/// or:
/// *P = v1; if () { *P = v2; }
/// into a phi node with a store in the successor.
```
You can't do this if the stores have different atomic access sizes.
2. Load CSE and load-to-store forwarding. These are also illegal if the
memory operations in question have different atomic access sizes.
Fixes https://github.com/llvm/llvm-project/issues/223738.
AI assisted.
Commit: 364f1c3d236c2cf3c15c0d4b119e7cdd05d1b945
https://github.com/llvm/llvm-project/commit/364f1c3d236c2cf3c15c0d4b119e7cdd05d1b945
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/test/CodeGen/Sparc/sparc-vaarg.c
M clang/test/CodeGen/Sparc/sparcv8-abi.c
Log Message:
-----------
[Sparc][clang] Match GCC's SPARC V8 vector argument passing (#222254)
Pass floating-point vectors and vectors larger than 64 bits indirectly.
Assisted-by: Codex
Commit: 37e2c3bc9610b7952405ddd7c3557c93e933e554
https://github.com/llvm/llvm-project/commit/37e2c3bc9610b7952405ddd7c3557c93e933e554
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGen/lowering-lang-options.cpp
A clang/test/CIR/IR/lowering-lang-options.cir
Log Message:
-----------
[CIR] Serialize lowering-relevant LangOptions as #cir.lowering_lang_options (#224757)
Post-CIRGen lowering (LoweringPrepare, CallConvLowering)
reads a handful of LangOptions flags that have no
triple/module representation. A reloaded `.cir`
module has no live `clang::LangOptions`, so those flags must be
serialized for the file to be self-describing and lower the
same way it was compiled.
Add a module-level aggregate attribute `#cir.lowering_lang_options`
holding the LangOpts facts lowering consumes: "exceptions,
threadsafe_statics, cuda, cuda_is_device, hip, gpu_rdc, openmp,
openmp_is_target_device, and clang_abi_compat". Target-derived
facts (size_t width, CXXABI, comdat, char/pointer/atomic width,
SDK version, fp formats) are **NOT** stored: they are
rebuilt from `cir.triple`
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 27b50fc8e7908bc969635c61a96d6d3f08f79941
https://github.com/llvm/llvm-project/commit/27b50fc8e7908bc969635c61a96d6d3f08f79941
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/unittests/Optimizer/InternalNamesTest.cpp
Log Message:
-----------
[flang] Add option to exclude array literals from isCompilerGenerated (#225164)
This is used to register variables under -gpu=mem:unified and array
literals can stay as device resident.
Commit: 2e2655f10d1a05bb585e172083b448a25a5b7434
https://github.com/llvm/llvm-project/commit/2e2655f10d1a05bb585e172083b448a25a5b7434
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/mad-mix-fptrunc-rounding.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
Log Message:
-----------
[AMDGPU] Require flushed FP16 denormals for the mad-mix f16 results (#224911)
v_mad_mixlo_f16 and v_mad_mixhi_f16 are the unfused gfx900 forms and flush 16-bit denormals, so a denormal half result is written as zero even when the FP16 mode asks for it to be kept, while the patterns only required the FP32 mode to flush and that is the one a HIP compile turns off on its own.
Assisted-by: Claude Code Opus 5
Commit: e7b5aa9b5734121f94527261320fcbdb573f37f4
https://github.com/llvm/llvm-project/commit/e7b5aa9b5734121f94527261320fcbdb573f37f4
Author: Jelle Schühmacher <schuehmacher at roofline.ai>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Log Message:
-----------
[mlir][linalg] Fix exponential walk of tensor.extract indices (#222319)
`isLoopInvariantIdx` showed exponential runtime behavior. Replaced with
a worklist and a visited set.
Encountered in iree-org/iree#24886.
Assisted-by: Claude
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 1492dbc61765111d035eb5a27ea71e7527a8c6c0
https://github.com/llvm/llvm-project/commit/1492dbc61765111d035eb5a27ea71e7527a8c6c0
Author: Adam Magier <adam.a.magier.foss at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/ubsan-pointer-overflow-constant-fold.c
Log Message:
-----------
[clang][CodeGen] Compute the pointer-overflow offset from the index list (#225139)
Follow up to #223446. EmitGEPOffsetInBytes recreated the offset by
walking the GEP value that EmitCheckedInBoundsGEP had just created. That
required a separate path for the case where CreateGEP folded the result,
because a folded GEP need not be a GEP at all: `gep(null, 1)` becomes
`inttoptr(1)`, and `gep(@g, 0)` becomes `@g`.
Pass ElemTy and IdxList instead and walk those directly. This removes
the constant path, the cast to GEPOperator, and two asserts that
restated the caller's own behaviour.
This is not quite NFC. The constant path reported OffsetOverflows as
false unconditionally, so a constant GEP whose byte offset wrapped to
exactly zero satisfied the TotalOffset == Zero early return and emitted
no check. The unified path computes the flag, so such a GEP now emits
one. It is provably valid, since TotalOffset == 0 makes the computed
address equal the base, so this is extra IR at -O0 rather than a change
in behaviour.
Add constant-base cases to ubsan-pointer-overflow-constant-fold.c,
including the wraps-to-zero case: it passes before this change only
because no check is emitted at all.
Assisted-by: Kiro CLI / Claude Opus 5
Commit: b09f78de3c4163d6c52971c185dcf4ed66015d06
https://github.com/llvm/llvm-project/commit/b09f78de3c4163d6c52971c185dcf4ed66015d06
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/WasmEHPrepare.cpp
Log Message:
-----------
[WebAssembly] Remove an unnecessary variable (NFC) (#224962)
That `CPI` had a use when first written in
https://github.com/llvm/llvm-project/commit/99d60e0dabcf20f4db683da83cde905b7a1373de
but after
https://github.com/llvm/llvm-project/commit/445f4e74841e87da06743a4c126b09c9b9b05124
it's not necessary to cast it anymore.
Commit: 0b04288569e3daff0c42e302d6e024056eedb895
https://github.com/llvm/llvm-project/commit/0b04288569e3daff0c42e302d6e024056eedb895
Author: Adam Magier <adam.a.magier.foss at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
Log Message:
-----------
[clang][CodeGen] Compute the pointer-overflow offset from the index list (#225139)
Follow up to #223446. EmitGEPOffsetInBytes recreated the offset by
walking the GEP value that EmitCheckedInBoundsGEP had just created. That
required a separate path for the case where CreateGEP folded the result,
because a folded GEP need not be a GEP at all: `gep(null, 1)` becomes
`inttoptr(1)`, and `gep(@g, 0)` becomes `@g`.
Pass ElemTy and IdxList instead and walk those directly. This removes
the constant path, the cast to GEPOperator, and two asserts that
restated the caller's own behaviour.
This is not quite NFC. The constant path reported OffsetOverflows as
false unconditionally, so a constant GEP whose byte offset wrapped to
exactly zero satisfied the TotalOffset == Zero early return and emitted
no check. The unified path computes the flag, so such a GEP now emits
one. It is provably valid, since TotalOffset == 0 makes the computed
address equal the base, so this is extra IR at -O0 rather than a change
in behaviour.
Add constant-base cases to ubsan-pointer-overflow-constant-fold.c,
including the wraps-to-zero case: it passes before this change only
because no check is emitted at all.
Assisted-by: Kiro CLI / Claude Opus 5
Commit: ae22af25cef652dd1741ae720c29d2ecdf627037
https://github.com/llvm/llvm-project/commit/ae22af25cef652dd1741ae720c29d2ecdf627037
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
WebAssembly: Move target EH passes into backend (#225172)
Currently the wasm-specific EH lowering passes are added in the
generic pass configs, driven by the TargetOptions ExceptionModel.
As preparation for driving this process off the IR flag, move these
pass runs into the target. There should be no change in the relative
pass ordering.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8e635116824243b37aa1cce4a38b0203fad0a0e6
https://github.com/llvm/llvm-project/commit/8e635116824243b37aa1cce4a38b0203fad0a0e6
Author: 1s <zishun.yi.dev at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/test/Driver/fsanitize.c
Log Message:
-----------
[clang][FreeBSD] Enable KASAN and KMSAN for riscv64 (#202288)
enables KASAN and KMSAN for the riscv64 freebsd target in the Clang
driver.
The corresponding FreeBSD kernel runtime support for riscv64 KASAN is
currently under active review.
Depends on: https://reviews.freebsd.org/D57381
Co-authored-by: aokblast <aokblast at FreeBSD.org>
Commit: 9906c580517b6e22df73a6f7206de551e4883a52
https://github.com/llvm/llvm-project/commit/9906c580517b6e22df73a6f7206de551e4883a52
Author: geoffreygaren <ggaren at apple.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
Log Message:
-----------
[WebKit Checkers] Trace through temporaries in tryToFindPtrOrigin (#224877)
RefPtr checking skips temporaries, reporting a path through any
temporary as unsafe. This is mostly correct, but not always. For
example, the following is a false positive:
// makeKey() returns a temporary
RefCountable* p = condition(makeKey()) ? guardian.ptr() : nullptr;
In the upcoming Borrow checker, it's even more important to trace
through temporaries because not tracing an expression can drop a
`lifetimebound` link, resulting in false **negatives**.
This patch adds tracing through temporaries. The logic is:
* In function call arguments, temporaries are lifetime safe because the
full expression does not end until the call returns
* In ranged for loops, temporaries are lifetime safe because lifetime
extends past the full expression to the duration of the loop (C++ P2718)
* Otherwise, temporaries are not lifetime safe
Assisted-by: Claude
Commit: fbbf5d2daec93118bb5e478b7d6089fbbb857f94
https://github.com/llvm/llvm-project/commit/fbbf5d2daec93118bb5e478b7d6089fbbb857f94
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/volatile-local.ll
Log Message:
-----------
[NVPTX] Preserve volatile on atomic local loads and stores (#224719)
Local loads and stores discard atomic ordering during instruction
selection, but volatile accesses with acquire, release, or seq_cst
ordering also lose the volatile qualifier. Preserve volatile for all
valid load/store orderings when local volatile instructions are
supported. Follow up to #217764.
Commit: 4a49d09c3358c6ac54362d9a8ef8075a4b121114
https://github.com/llvm/llvm-project/commit/4a49d09c3358c6ac54362d9a8ef8075a4b121114
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
Log Message:
-----------
[DebugInfo] Fix overflow in DWARFDebugLine::SectionParser (#224770)
Adding a DWARF64 unit length can overflow and wrap back into the
section, causing an infinite loop. Saturate the addition so an
overflowing offset fails the bounds check.
rdar://186810393
Commit: 06c7e8db78adf3a5478362ba80d6bb7f25b936b0
https://github.com/llvm/llvm-project/commit/06c7e8db78adf3a5478362ba80d6bb7f25b936b0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Simplify computeKnownBits for EXTRACT_ELEMENT using KnownBits::extractBits. NFC (#225168)
Commit: e7302d9069f007ce968f6eac0a95d0f34cfc1152
https://github.com/llvm/llvm-project/commit/e7302d9069f007ce968f6eac0a95d0f34cfc1152
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/test/Transforms/SLPVectorizer/RISCV/check-node-without-vector-user.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/folded-broadcast-cost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/reordered-gather.ll
Log Message:
-----------
[SLP] Reland: More accurately cost RISCV scalar splats (#224766)
Originally #213104, reverted due to assertion failure in cases of
reordered gather nodes.
Backends may have a fast path for splatting scalar operands (i.e. rather
than generating the splat vector, the vector instruction may be able to
take a scalar operand), for example RISCV `vfoo.vx` instructions. Pass a
hint to the TTI when costing the insert/shuffle sequence in such cases.
Fixes #212413.
Assisted By: Codex
Commit: 434b00aa1d89d276b826f40afd132308ee19277f
https://github.com/llvm/llvm-project/commit/434b00aa1d89d276b826f40afd132308ee19277f
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
A llvm/test/MC/AMDGPU/gfx11_asm_opsel.s
A llvm/test/MC/AMDGPU/gfx11_asm_t16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_err.s
Log Message:
-----------
[AMDGPU][MC] Upstream gfx11/gfx12 true16 assembler test coverage (#223826)
Upstream new assembler test cases, covering true16 .l/.h operands and
op_sel
handling that had no upstream coverage.
Commit: aea2e768d7c2f5d97ae6a41c5c7469dcac4ba113
https://github.com/llvm/llvm-project/commit/aea2e768d7c2f5d97ae6a41c5c7469dcac4ba113
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/union.c
Log Message:
-----------
[CIR] Regenerate CHECK lines for two callconv opt-out tests (#225189)
Neither `union.c` nor `paren-list-agg-init.cpp` is blocked by the
calling convention lowering pass any more, and both compile clean with
it running. Remove the `-fno-clangir-call-conv-lowering` opt-out and
update their CHECK lines. The coerced parameters and returns they now
pin match classic.
The bodies still differ, since CIR round-trips the record through a
fresh coerce slot, so those fragments move to the `LLVMCIR` and `OGCG`
prefixes the file already declares. Four `define` lines in
`paren-list-agg-init.cpp` wildcarded their return type and now pin it.
Assisted-by: Cursor / claude-opus-5
Commit: 418bede1ebba8990349df1e17306a05bb3d75e51
https://github.com/llvm/llvm-project/commit/418bede1ebba8990349df1e17306a05bb3d75e51
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/NativeDylibManagerSPSCI.h
M llvm/unittests/ExecutionEngine/Orc/EPCGenericDylibManagerTest.cpp
Log Message:
-----------
[ORC] Mangle NativeDylibManager CI names as C (#225096)
Flip the NativeDylibManager descriptors (instance + load/lookup) from
Verbatim to C, so their names carry the target's C mangling. Served by
the in-tree SimpleExecutorDylibManager; controller and executor mangle
the same specs and nothing else defines these names.
Also give the CreateFromExecutionSession test EPC the process triple,
matching the memory-manager fix (its bootstrap symbols were keyed with
the process triple but the EPC had an empty target triple).
Commit: 82cf8d465a76e9fda817906a4405fb7d18eb84d5
https://github.com/llvm/llvm-project/commit/82cf8d465a76e9fda817906a4405fb7d18eb84d5
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ConnectionSpec.h
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/ConnectionSpecTest.cpp
Log Message:
-----------
[ORC] Rename ConnectionSpec's fd transport to socket:adopt (#225075)
A ConnectionSpec's transport field says what kind of thing the
descriptor names, and "fd" named a representation rather than a kind. It
also left no room for a pipe transport, which takes two descriptors and
a different server.
The transport becomes "socket", and adopting a handed-over handle
becomes an explicit "adopt" action rather than the absence of one. So
"tcp" names an endpoint to reach while "socket" names a handle already
held, and a spec states how the process came by its channel -- worth
spelling out, since "adopt", "connect" and "listen" do not carry the
same trust.
llvm-jitlink-executor takes "socket:adopt=<fd>" in place of "fd=<fd>"
and rejects any other action for that transport. The spec is an internal
handoff from llvm-jitlink in every in-tree use, so nothing else needed
updating. The class comment is rewritten around the same split and stops
describing transports that do not exist yet.
Matches the scheme the ORC runtime uses for its connector registry.
Commit: 9696514f547989b2688e73a987fb676d71f570aa
https://github.com/llvm/llvm-project/commit/9696514f547989b2688e73a987fb676d71f570aa
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/OpenMP/nvptx_target_teams_ompx_bare_kernel_environment_codegen.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[clang][openmp] Avoid generating geometry for Bare kernels (#225185)
Don't use the information from num_teams or thread_limit clauses to
initialize the Kernel Environment of bare kernels. They only support one
single dimension and for NVIDIA (only) we generate a "nnvm.maxntid"
attribute which is incompatible with the multi-dimensional launch that
happens at runtime.
Fixes a regression introduced by #223772
Commit: e22f06e20c56cb71c00acd5372c512f54616b884
https://github.com/llvm/llvm-project/commit/e22f06e20c56cb71c00acd5372c512f54616b884
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
Log Message:
-----------
[AMDGPU] Do not match an f16 extension as a bf16 mix source (#224912)
Assisted-by: Claude Code Opus 5
Commit: 32636ffa83325ca3b3c1ae3342d66abe053ddf87
https://github.com/llvm/llvm-project/commit/32636ffa83325ca3b3c1ae3342d66abe053ddf87
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGenCXX/uncopyable-args.cpp
Log Message:
-----------
[CIR] Drop the stale callconv opt-out from two CIR tests (#225180)
`bitfields.cpp` was waiting on padded, packed and over-aligned record
shapes. `uncopyable-args.cpp` was waiting on parameters of an empty or
tag class. Both files now compile and check clean with the pass running,
so the `-fno-clangir-call-conv-lowering` opt-out and its TODO header are
removed and the tests exercise the pass as written. Neither file changes
a CHECK directive.
Assisted-by: Cursor / claude-opus-5
Commit: d9b61968481a0cc6fbbef744eeecab16ff9d0c18
https://github.com/llvm/llvm-project/commit/d9b61968481a0cc6fbbef744eeecab16ff9d0c18
Author: Greg Clayton <gclayton at fb.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/DebugInfo/GSYM/ObjectFileTransformer.cpp
A llvm/test/tools/llvm-gsymutil/X86/macho-symbol-stubs.yaml
Log Message:
-----------
Add support for mach-o symbol stubs. (#225155)
This patch add support for making symbols from the symbol stubs in
mach-o files. Symbol stubs are found in sections that whose type is
S_SYMBOL_STUBS and using these setions along with the indirect symbol
table, we can make symbols for the PLT entries for external functions.
Some crashes occur in these stubs and previous to this fix those
addresses might be incorrecty associated with the last real symbol from
the symbol table and cause confusion and incorrect stack attributions in
symbolication workflows.
Commit: 54cfa2b76494491dc2e0780b7a5ffea9e55ea529
https://github.com/llvm/llvm-project/commit/54cfa2b76494491dc2e0780b7a5ffea9e55ea529
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/Value.h
M llvm/lib/SandboxIR/Value.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement Value::stripAndAccumulateConstantOffsets() (#224784)
This patch implements the Sandbox IR version of
Value::stripAndAccumulateConstantOffsets(), mirroring LLVM IR.
Commit: 3374bc31c4e293bb7037abdffacb2308e7ca2ebd
https://github.com/llvm/llvm-project/commit/3374bc31c4e293bb7037abdffacb2308e7ca2ebd
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRTransformUtils.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/CodeGen/side-effect.cpp
M clang/test/CIR/IR/call.cir
M clang/test/CIR/IR/enum-attrs.cir
A clang/test/CIR/IR/invalid-effect-attrs.cir
A clang/test/CIR/Lowering/memory-effects.cir
M clang/test/CIR/Transforms/flatten-preserve-attrs.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
Log Message:
-----------
[CIR] Split side_effect into memory effects, nounwind, and willreturn (#223890)
`side_effect` was carrying three facts at once. It described the memory
a callee may touch, and it was also the only thing lowering derived
`nounwind` and `willreturn` from, so any callee with a known memory
effect got both. That is wrong for one that can throw, and `willreturn`
had no other representation in CIR at all.
`const`, `pure` and `noalias` now record the three separately, and the
enum is replaced by a structured `#cir.memory_effects` carrying the same
six ModRef slots as the LLVM dialect. It has no keyword syntax of its
own, so on an operation it sits in the attribute dictionary.
The only change in emitted IR is for `__declspec(noalias)`, which the
old enum could not express, and which now gets
`inaccessibleOrArgMemOnly` and `nounwind` to match classic. Everything
else lowers exactly as it did.
Assisted-by: Cursor / claude-opus-5
Commit: febbf39f76caf3224dda67a5be9f92787356fdc8
https://github.com/llvm/llvm-project/commit/febbf39f76caf3224dda67a5be9f92787356fdc8
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M offload/ci/hip-tpl.py
Log Message:
-----------
[CI][AMDGPU] Add clean up step for HIP test (#224177)
The bot failed because the GPU core dumps took all the disk space. Added
a step in the HIP build script to clean them up before building the
tests in each run.
Commit: 5dc57157f12f0ff676e823d9b4d98b45c07e5df2
https://github.com/llvm/llvm-project/commit/5dc57157f12f0ff676e823d9b4d98b45c07e5df2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
Partially revert "[libcxx] Move premerge jobs to k8s mode runner set (#221395)" (#224717)
This patch partially reverts commit 028cdb4b9ec09: it only reverts
changing the runner set for the libcxx-pr-test-tools.yml workflow, which
started failing for an unknown reason since the change.
This is temporary until we figure out the problem and switch the
workflow again.
Commit: 04d36008ff346d1ff9deded1cdf275fb2fb28c69
https://github.com/llvm/llvm-project/commit/04d36008ff346d1ff9deded1cdf275fb2fb28c69
Author: Ivan Tadeu Ferreira Antunes Filho <antunesi at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/test/AST/ByteCode/module-default-ctor.cpp
Log Message:
-----------
[clang][test] Write obj file into %t in ByteCode/module-default-ctor.cpp (#225192)
Commit: 83af6956eda8e52d6dfbac143da5d5bd62fff9fe
https://github.com/llvm/llvm-project/commit/83af6956eda8e52d6dfbac143da5d5bd62fff9fe
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes d9b6196 (#225223)
This fixes d9b61968481a0cc6fbbef744eeecab16ff9d0c18 (#225155).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=d9b61968481a0cc6fbbef744eeecab16ff9d0c18
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: f677d3f38f45f318df47d5b5dd59a20c71d6a9bc
https://github.com/llvm/llvm-project/commit/f677d3f38f45f318df47d5b5dd59a20c71d6a9bc
Author: Alina Sbirlea <asbirlea at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/pointer-tighten-ne.ll
Log Message:
-----------
[ConstraintElimination] Allow pointer types in tightenBoundUsingNe (#223215)
Allow pointer types in ConstraintInfo::tightenBoundUsingNe() for the
unsigned system. When A != B is known and the system already implies A
u>= B, tighten the bound to strict inequality A u> B (symmetrically, A
u<= B becomes A u< B).
Added lit tests in
llvm/test/Transforms/ConstraintElimination/pointer-tighten-ne.ll.
Commit: d3620a08fe99370161844c11d3a288d64583446f
https://github.com/llvm/llvm-project/commit/d3620a08fe99370161844c11d3a288d64583446f
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/test/MC/AMDGPU/gfx1250_asm_unsupported.s
M llvm/test/MC/AMDGPU/gfx13_asm_vopd_errs.s
Log Message:
-----------
[AMDGPU][MC] Remove two VOPD instructions from gfx1250 and gfx13 (#225199)
V_DUAL_DOT2ACC_F32_F16 and V_DUAL_DOT2ACC_F32_BF16 were removed from
both gfx1250 and gfx13.
Fixes LCOMPILER-2684.
Commit: bf9a1bb8b032da4cfbad5db2671f1037f69a2107
https://github.com/llvm/llvm-project/commit/bf9a1bb8b032da4cfbad5db2671f1037f69a2107
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Don't require single-pred blocks on path to loop region (NFC). (#225208)
Generalize getVectorLoopRegion logic to not on single
predecessor/successor chain. This won't hold once the epilogue skeleton
is also modeled in VPlan.
Instead stop at any block with multiple predecessors. In plain CFG form,
that is the loop header, in region-based CFG the scalar preheader.
Currently NFC, but preparation to fully model epilogue vectorization in
VPlan natively.
Commit: dc0abebc8e834bceea9a467f07e124ab944e9be9
https://github.com/llvm/llvm-project/commit/dc0abebc8e834bceea9a467f07e124ab944e9be9
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/lit.md
M llvm/utils/lit/lit/Test.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/main.py
R llvm/utils/lit/tests/Inputs/rerun-failed-serially-retries/lit.cfg
R llvm/utils/lit/tests/Inputs/rerun-failed-serially-retries/needs-four-attempts.py
R llvm/utils/lit/tests/Inputs/rerun-failed-serially/always-fails.py
R llvm/utils/lit/tests/Inputs/rerun-failed-serially/fails-once.py
R llvm/utils/lit/tests/Inputs/rerun-failed-serially/lit.cfg
R llvm/utils/lit/tests/rerun-failed-serially.py
Log Message:
-----------
Revert "[lit] Add --rerun-failed-serially <REGEX> mechanism (#223504)" (#225205)
This reverts commit 49923e950b3e8f0adb693aa68b99df6a2479418b.
People reported flakyness in the LIT test for this lit change.
Commit: eb701ae7fdf5071bf4b1dbde37a41fb16df49081
https://github.com/llvm/llvm-project/commit/eb701ae7fdf5071bf4b1dbde37a41fb16df49081
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-vaarg-non-pod-nyi.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/var-arg-aggregate.c
A clang/test/CIR/CodeGen/var-arg-direct-offset.cpp
A clang/test/CIR/CodeGen/var-arg-empty.c
A clang/test/CIR/CodeGen/var-arg-int128.c
A clang/test/CIR/CodeGen/var-arg-long-double.c
A clang/test/CIR/CodeGen/var-arg-vector.c
M clang/test/CIR/CodeGen/var_arg.c
A clang/test/CIR/Transforms/abi-lowering/x86_64-vaarg-valist-shape-nyi.cir
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/lib/ABI/Targets/X86.cpp
M mlir/include/mlir/ABI/ABIRewriteContext.h
Log Message:
-----------
[CIR] Expand callee-side va_arg on x86_64 (#222420)
CallConvLowering now classifies every `cir.va_arg` on its own, as an
unnamed argument with a full register budget, and expands it in place. A
fetch that fits the budget reads from the saved register area, and
everything else reads the overflow area and bumps the cursor. An
aggregate, an x87 long double, and an `__int128` all lower correctly
now. Each fetch reads at the alignment the argument area gives it, which
for an over-aligned record is higher than its type reports.
A non-trivially-copyable type still reports NYI.
`rewriteVAArg` takes the register demand from the ABI library rather
than rebuilding it from the shape of the coerced type. The library
computes it in `classifyArgumentType` as the `NeededInt` and `NeededSSE`
out-parameters and used to drop it, so `llvm::abi::ArgInfo` and
`mlir::abi::ArgClassification` now carry it. Expanding a `cir.va_arg`
needs the inputs to that decision rather than its result, because the
choice has to become a runtime branch on the va_list cursor.
Assisted-by: Cursor / claude-opus-5
Commit: 6854d299e83c7b08d0450bcc85f13a84d3b5a29e
https://github.com/llvm/llvm-project/commit/6854d299e83c7b08d0450bcc85f13a84d3b5a29e
Author: Kunal Dubey <xakep8 at protonmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-stdc-bit-c2y.c
Log Message:
-----------
[CIR] Lowering for the C2Y `stdc` bit builtins (#218852)
Implemented CIR lowering for the C2Y `stdc` bit builtins currently
covered by this PR.
This adds support for:
- `stdc_rotate_left_*` / `__builtin_stdc_rotate_left`
- `stdc_rotate_right_*` / `__builtin_stdc_rotate_right`
- `stdc_memreverse8u8/u16/u32/u64`
- `stdc_memreverse8` / `__builtin_stdc_memreverse8`
The rotate builtins lower to `cir.rotate`, which then lowers to the LLVM
funnel-shift intrinsics.
For `stdc_memreverse8`, CIR matches classic CodeGen behavior:
- sizes `0` and `1` are no-ops, while still evaluating the pointer
argument
- sizes `2`, `4`, and `8` lower to load / byte-swap / store
- other constant sizes and dynamic sizes fall back to a
`stdc_memreverse8` library call through the isLibFunction path
Reference to discussion in PR #214931
[here](https://github.com/llvm/llvm-project/pull/214931#discussion_r3769544573)
Commit: 6fe7d97e974d96b0962fdb5f5d975ffa42c9b0ad
https://github.com/llvm/llvm-project/commit/6fe7d97e974d96b0962fdb5f5d975ffa42c9b0ad
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/target-abi-valid.ll
Log Message:
-----------
[RISC-V] Test ELF e_flags for llc -target-abi without module flag (#225128)
Verify that `llc -filetype=obj -target-abi=...` sets the ELF header
`e_flags`
according to `-target-abi` even when the input IR has no `"target-abi"`
module
flag and the enabled extensions (such as `+d`) would default to a
different ABI.
This commit was created with the help of AI tools
Commit: 215a9b006a007b315af5c4bb3f669353029da44c
https://github.com/llvm/llvm-project/commit/215a9b006a007b315af5c4bb3f669353029da44c
Author: Taufiq Rahman <taufiqrx8 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Support/RISCVISAUtils.h
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Update the canonical extension order (#192392)
Fixes #192357.
Update the canonical order of one-letter standard RISC-V extensions in
RISCVISAUtils::AllStdExts to match the updated specification order,
where `p` moves after `v`.
Commit: 31b28f55900649668bb3dad18ab90f6ce7a77c51
https://github.com/llvm/llvm-project/commit/31b28f55900649668bb3dad18ab90f6ce7a77c51
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.h
M clang/lib/CIR/Lowering/CIRPasses.cpp
A clang/test/CIR/CodeGenCUDA/lowering-lang-options.cu
Log Message:
-----------
[CIR] Consume serialized LangOptions in post-CIRGen lowering (#225224)
Post-CIRGen lowering (LoweringPrepare, CallConvLowering) read a handful
of LangOptions facts from a live clang::LangOptions via the pass's
ASTContext. That prevented a reloaded .cir from lowering the same way it
was compiled, since a serialized module has no ASTContext. PR #224757
serialized those facts onto the module as #cir.lowering_lang_options;
this change makes lowering consume them from there.
To make sure the `lowering_lang_options` attribute is always available,
I moved the constrction of langOpts from release to the constructor. The
overall approach is very close to `LowerModule::getTarget()`
Currently there is still a reliance to `astContext` which I plan to
remove in upcoming PRs. The reliance blocks consuming .cir as an input
and test `cir-opt` with some of such passes.
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 69ddc4658fe6742c023043a4760194c530bc86c8
https://github.com/llvm/llvm-project/commit/69ddc4658fe6742c023043a4760194c530bc86c8
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/test/CodeGen/AMDGPU/coexec-block-carried-latency.mir
M llvm/test/CodeGen/AMDGPU/coexec-sched-ds-fifo.mir
M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
Log Message:
-----------
[AMDGPU] Add MemoryPipeline scheduling to Coexec sched (#192325)
This adds two pieces to the new scheduler:
Stalls between ds_load and fence
tryAsyncPipe
For both of these pieces we are making some assumptions about the
pipelining of memory instructions in the incoming IR. Namely, that the
long latency memory operations are pipelined and the shorter latency
memory operations (e.g. ds_loads) aren't. Moreover, this assumes that
any user added waitcnts appear directly before fences. These assumptions
are compensating for the fact that we don't have any analysis of the
pipeline available during scheduling.
Stalls between ds_load and fence
The main concept here is that when legalizing the fences we will insert
wait_dscnts for any outstanding ds_load instructions. By teaching the
scheduler about the stall between these instructions, we can hide
latency between ds_load -> wait_dscnt. A common idiom is:
wait_loadcnt
fence
signal
fence
Since waitcnts are often included with fences, we also add stalls for
these waitcnt instructions.
tryAsyncPipe
This helps us to acheive good memory pipelining without having good
memory pipeline modelling. This assumes the pipeline has been well
designed and amdgpu-barrier-signal-wait-latency is set appropriately.
Then, this heuristic will schedule memory pipeline components as soon as
the stalls are cleared. It will, for example, keep waitcnt and fence
instructions together, and will schedule load instructions as soon as
registers from previous iterations have been consumed (ensuring max
latency between load -> consumer). It errs on the side of hiding too
much latency for long latency loads.
---------
Co-authored-by: Austin Kerbow <Austin.Kerbow at amd.com>
Commit: 2ce662d124ddf4081993c7980986207444a51305
https://github.com/llvm/llvm-project/commit/2ce662d124ddf4081993c7980986207444a51305
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] Bump libc container to Ubuntu 26.04 (#225212)
Commit: d43ef1b381ca458bb34c1e79b050db5d3d834abd
https://github.com/llvm/llvm-project/commit/d43ef1b381ca458bb34c1e79b050db5d3d834abd
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/load-rawbuffer-wide-double.ll
M llvm/test/CodeGen/DirectX/TextureLoad.ll
Log Message:
-----------
[DirectX] Fix RawBuffer Loads of double vectors (#224695)
fixes https://github.com/llvm/llvm-project/issues/224684
We need to do the same change we did for Raw Buffer Stores
(https://github.com/llvm/llvm-project/issues/223558) in
https://github.com/llvm/llvm-project/pull/224136 by Create add with the
byte index offsets because were were looking at the wrong argument.
Commit: 33fcd70991316e238e63684cd4018f618d690668
https://github.com/llvm/llvm-project/commit/33fcd70991316e238e63684cd4018f618d690668
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedMax.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedMax.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedMax.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedMax-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedMax-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedMax-errors.hlsl
Log Message:
-----------
[HLSL] Add `InterlockedMax` function and resource methods (#222160)
This PR adds the `InterlockedMax` standalone function and resource
methods.
It mimics the implementation of the `InterlockedMin` function and
resource
methods.
Like `min`, `max` is signedness aware. A signed operand lowers to
`atomicrmw max` and an unsigned operand lowers to `atomicrmw umax`. This
matches DXC, which selects between the `IMax` and `UMax` atomic binary
operations.
The PR also adds the 64-bit `InterlockedMax64` methods, which DXIL gates
on
shader model 6.6.
Fixes: https://github.com/llvm/llvm-project/issues/99124
Assisted by: Github Copilot
Commit: d28da7e5238e8bd81c609ef19170dc6b73ee48ac
https://github.com/llvm/llvm-project/commit/d28da7e5238e8bd81c609ef19170dc6b73ee48ac
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedThreadPlanInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedCommandPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFrameProviderPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStringSummaryPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedSyntheticChildrenPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedSyntheticChildrenPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPythonInterface.cpp
M lldb/source/Target/ScriptedThreadPlan.cpp
M lldb/test/API/commands/target/stop-hooks/TestStopHookScripted.py
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
Log Message:
-----------
[lldb] Make ScriptedPythonInterface::Dispatch return llvm::Expected<T> (#224988)
Until now, `Dispatch` returned the extracted value and reported failure
through a `Status &` out-parameter, which leaves the two outcomes
indistinguishable at the value level: a Python method that returns
`None` and one that raises both hand back a default-constructed `T`.
Only `error` told them apart, and because the signature advertises the
value, call sites reached for the value and dropped the error.
Three real instances of that:
- `ScriptedHookPythonInterface::HandleStop` returned `true` whenever the
object was null, discarding the backtrace of a raising `handle_stop`
(fixed separately).
- `GetStatusFromMethod` discarded `Dispatch<Status>`'s return value, so
the `SBError` returned by `ScriptedProcess.launch/attach/resume` and the
three `ScriptedPlatform` entry points was ignored entirely: a `launch()`
returning `SBError("no such file")` reported success.
- `GetThreadPlanMetadataForStepType` string-matched the exception text
to guess whether the method existed, with a FIXME asking for exactly
this.
This switches `Dispatch`, `CallStaticMethod` and
`ExtractValueFromPythonObject` to `llvm::Expected<T>` and drop the
out-parameter. `CheckStructuredDataObject` becomes dead and is removed.
An absent method now yields `UnimplementedError`. Three helpers let each
call site state its intent: `DispatchToOptional` for optional methods a
script may legitimately omit, which reports an unimplemented method as
`std::nullopt` and lets every other failure propagate; `LogAndDefault`
for entry points whose return type cannot express failure, which logs
the error and falls back to a default-constructed value instead of
discarding it; and `LogAndError`, which builds and logs the errors
`Dispatch` returns itself.
Widening the `LogAndDefault` entry points to `Expected` touches every
caller in ScriptedThread/ScriptedProcess/ScriptedFrame and is left as
follow-up.
This patch stops at the interface layer deliberately: it is about
surfacing the error and the Python exception out of `Dispatch` and into
the scripted interface classes. That has to happen to all of them at
once, because they share the same dispatch entry point, which is why
this touches every interface class together. Carrying those exceptions
the rest of the way to the user is per-extension work, and lands as a
follow-up PR for each extension.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 8d64e84bb915b900a546408143790a578ab4ac19
https://github.com/llvm/llvm-project/commit/8d64e84bb915b900a546408143790a578ab4ac19
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
Log Message:
-----------
[CIR][NFC] Route target facts in LoweringPrepare through LowerModule (#225236)
LowerModule already rebuilds a full clang::TargetInfo
from the module's cir.triple and exposes getTarget()
and getCXXABIKind(). The changes are a pure routing
change: no new attribute and no CIRGen change,
since every routed fact is derivable from the triple,
that is already included in the module.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 26c90e1588af2d70ac7cf9b51a01ea56acd9f2cc
https://github.com/llvm/llvm-project/commit/26c90e1588af2d70ac7cf9b51a01ea56acd9f2cc
Author: Andy Lim <andysjlim at chromium.org>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/MC/COFF/ir-to-imgrel.ll
Log Message:
-----------
[TargetLowering][COFF] Only check shouldAssumeDSOLocal on GlobalVariable in lowerRelativeReference (#225160)
In #220674, a check was added to lowerRelativeReference requiring that
LHS be dso_local to prevent image-relative relocations for dllimport
variables. However, this check was applied unconditionally to all
GlobalObjects, including functions.
On Windows COFF, dllimport functions are valid targets for
image-relative relocations because the linker provides import thunks in
the local image. In particular, MSVC C++ exception handling metadata
(ThrowInfo and CatchableType) references imported copy constructors and
destructors via image-relative offsets when throwing exception types
across DLL boundaries. Rejecting them caused compilation failures in
downstream projects like PyTorch with:
"error: symbol '__ImageBase' can not be undefined in a subtraction
expression"
Restrict the shouldAssumeDSOLocal check to GlobalVariables only.
Commit: d024790161549c4e45828da9fb0ea74be5786403
https://github.com/llvm/llvm-project/commit/d024790161549c4e45828da9fb0ea74be5786403
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/test/AST/ByteCode/module-redecl1.cpp
Log Message:
-----------
[clang][test] Fix module cache path in module-redecl1.cpp (#225241)
Fixes commit aa6b03ed5a9ffe5ba6f0d945fac9961884b5c6ed
Use `-fmodules-cache-path=%t` instead of `Inputs/` which fails in
read-only test sandboxes due to permission errors when writing compiled
module files. Also clean `%t` before execution and remove redundant
`-cc1`, matching the RUN lines in
test/Modules/redecl-add-after-load.cpp.
Commit: 7c47f4218d453031fb5e27b1f99846220e62536b
https://github.com/llvm/llvm-project/commit/7c47f4218d453031fb5e27b1f99846220e62536b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/CallSPSCI.h
Log Message:
-----------
[ORC] Mangle Call CI names as C (#225227)
Flip the Call descriptors (call_main, call_void_void, call_int32_void,
call_int32_int32) from Verbatim to C, so their names carry the target's
C mangling. Served by the in-tree OrcRTBootstrap; controller and
executor mangle the same specs and nothing else defines these names.
Commit: 4c36312084fea422bec96f1bdb599b38b144289d
https://github.com/llvm/llvm-project/commit/4c36312084fea422bec96f1bdb599b38b144289d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M lldb/include/lldb/Expression/LLVMUserExpression.h
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/test/API/commands/expression/memory-allocation/TestMemoryAllocSettings.py
Log Message:
-----------
[lldb] Refactor PrepareToExecuteJITExpression (#224888)
Refactor the body of PrepareToExecuteJITExpression into two methods:
AllocateInterpreterStackFrame and AllocateAndMaterializeStruct.
This change is purely mechanical, but improves readability and sets up a
future refactor: AllocateAndMaterializeStruct is generic expression
setup and should remain where it is, but AllocateInterpreterStackFrame
is only needed on the interpreter path and can be sunk into that path in
a future commit.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: bc06d87e23554f439b4010c3d88082bf5b6dfb7b
https://github.com/llvm/llvm-project/commit/bc06d87e23554f439b4010c3d88082bf5b6dfb7b
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/utils/TableGen/AsmWriterEmitter.cpp
Log Message:
-----------
[TableGen] Extract instruction grouping in AsmWriterEmitter (NFC) (#222498)
This patch extracts instruction similarity grouping into
groupInstructions, a helper function that returns an array of
InstructionGroup structs in AsmWriterEmitter.
Currently, EmitInstructions performs both instruction grouping
(scanning for instructions differing in at most one operand) and code
emission in a single step while popping elements from the Instructions
vector.
This patch decouples grouping from code emission:
- groupInstructions clusters similar instructions into
InstructionGroups.
- emitInstructions emits the case labels and dispatches to
emitInstructionOperands for each group.
This patch produces byte-identical output for all targets while
preparing for a subsequent patch that will call asm writer helper
functions through a function pointer table instead of emitting a large
switch statement.
Assisted-by: Antigravity
Commit: 86f4728feefee41e53c1037b5918fb18e12a4696
https://github.com/llvm/llvm-project/commit/86f4728feefee41e53c1037b5918fb18e12a4696
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
A llvm/test/ThinLTO/X86/cfi-import-internal-coroutine.ll
A llvm/test/Transforms/LowerTypeTests/promoted-internal.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/cfi-icall-static-inline-asm.ll
A llvm/test/Transforms/ThinLTOBitcodeWriter/cfi_dso_local_equivalent.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/comdat.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal1.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal2.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc-internal.ll
Log Message:
-----------
Reapply "[CFI] Create an external linkage alias instead of promoting i… (#220339) (#225173)
There were 3 issues with the original commit:
1. handling of `dso_local_equivalent`. This was subsequently addressed in PR #222036 as an independent fix. An earlier version of the fix, 220450, had an extra test, cfi_dso_local_equivalent.ll, which is specific to the interaction between this patch and dso_local_equivalent. That test is re-introduced here.
2. a COFF issue discovered through the original pass, uncovered on Chromium builds, and fixed by @andysjlim in PR #220674. Thank you!
3. an issue we discovered in google downstream, involving coroutines. See the `cfi-import-internal-coroutine.ll`, and the difference between the first version and the second version of this PR (in Graphite) (<- AI was used here)
Commit: a2fdb8fe0d09dbc1d543c3381f0ddacdf7054c5e
https://github.com/llvm/llvm-project/commit/a2fdb8fe0d09dbc1d543c3381f0ddacdf7054c5e
Author: Wenju He <wenju.he at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/test/OffloadTools/clang-sycl-linker/options.ll
M clang/test/OffloadTools/clang-sycl-linker/split-mode.ll
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[clang-sycl-linker] Make temp files land relative to cwd with unique names (#224506)
Derive the CodeGen/AOT stem from -o's basename instead of its full
path, so these intermediates land in cwd alongside the .bc temps
instead of splitting -save-temps output across two directories.
Route them through createTempFile instead of building
`<stem>_<index>.ext` directly, so parallel invocations sharing an
output basename don't collide. Its random suffix also makes
`_<index>` redundant, so drop it; `--spirv-dump-device-code` keeps its
index since it has no random suffix and still needs one.
---------
Co-authored-by: Claude Sonnet 5 <noreply at anthropic.com>
Commit: d6d73f1ab347574f51e03076a1c7cccd7dbfbdce
https://github.com/llvm/llvm-project/commit/d6d73f1ab347574f51e03076a1c7cccd7dbfbdce
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
Log Message:
-----------
[AMDGPU][InstCombine] Add dot zero/constant folding tests. NFC (#225001)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 4a358b89216a4fa56b08355d2b00f694657f64ba
https://github.com/llvm/llvm-project/commit/4a358b89216a4fa56b08355d2b00f694657f64ba
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
A llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-long-vector.ll
Log Message:
-----------
[SPIR-V] Fix wrong element inferred for long vectors when using ByteAdressBuffer (#222220)
fixes #222214
On the offload tests we recently switch the long vector tests from using
StructuredBuffer element loads and stores to ByteAddressBuffer vector
loads and stores With StructuredBuffer you can see we use the right type
for the vector https://hlsl.godbolt.org/z/jYhd57jvn
However with ByteAddressBuffer instead of a float vector we are infering
incorrectly an int vector https://hlsl.godbolt.org/z/KMnxfv8z6
The Fix is to use spv_bitcast instead of an llvm ir bitcast. An ordinary
LLVM bitcast i32 to float becomes a same-size GlobalISel operation. Both
i32 and float use the same low-level type, s32, so
legalization/coalescing can eliminate the bitcast. switching to
spv_bitcast solves this because it forces a `buildAssignType` which will
preserve the type and allows us to distinguish ints from floats.
Commit: b8330cd2fb91d36ffb1766989f4a227a77d00c9c
https://github.com/llvm/llvm-project/commit/b8330cd2fb91d36ffb1766989f4a227a77d00c9c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCDeclareCtorDtorConversion.cpp
A mlir/test/Dialect/OpenACC/acc-declare-ctor-dtor-extra.mlir
Log Message:
-----------
[mlir][openacc] Add extra-constructors option to declare ctor conversion (#225194)
Allow acc-declare-ctor-dtor-conversion to declare extra runtime
functions
and call them from a generated constructor. Entries are separated in two
list,
one list where the functions are always added and one where the
functions are
added only if entry-point-name is present in the module.
The extra functions stay external declarations. This is used to generate
sentinel in different compilation mode.
Commit: 281308d5666eff4b00ac743d2623dd4f018754ca
https://github.com/llvm/llvm-project/commit/281308d5666eff4b00ac743d2623dd4f018754ca
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/Options.td
M lld/ELF/Symbols.cpp
M lld/docs/ld.lld.1
M lld/test/ELF/common-archive-lookup.s
M lld/test/ELF/warn-backrefs.s
Log Message:
-----------
[ELF] Remove --fortran-common (#220813)
--fortran-common implements a legacy linker rule that lets a COMMON
symbol extract an archive member providing a STB_GLOBAL definition,
departing from the rule that only an undefined symbol extracts a member.
The option has defaulted to off since LLVM 15, complicates parallel
symbol resolution, and is deemed unneeded.
Close: #205015
Link: https://discourse.llvm.org/t/removal-of-fortran-common-option/91553
Commit: 41b7eabb4564f09d7bd7ba54d8f7a38a8f449621
https://github.com/llvm/llvm-project/commit/41b7eabb4564f09d7bd7ba54d8f7a38a8f449621
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__type_traits/is_within_lifetime.h
M libcxx/include/version
M libcxx/test/libcxx/utilities/meta/is_within_lifetime.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/type_traits.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/utilities/meta/meta.const.eval/is_within_lifetime.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P3450R1: Extend `std::is_within_lifetime` (#201053)
The implementing approach only requires the initial form of
`__builtin_is_within_lifetime` taking one pointer to the object
(necessary for P2641R4), along with `__builtin_constant_p` which is used
for the changes in this paper.
In the future, `__builtin_is_within_lifetime` is possibly enhanced to
additionally take a type, but the library implementation does not need
to be blocked on such improvement.
Commit: ce06ac932eca6a403fa2f1f84fc5724fd30dc562
https://github.com/llvm/llvm-project/commit/ce06ac932eca6a403fa2f1f84fc5724fd30dc562
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[Option] Remove OPTTABLE_STR_TABLE_CODE (#224822)
Its two users read OptionStrTable to spell an option. The unittest now
compares option IDs. lldb prepends '-' to the name it reads, which has
been the prefixed name since 501f92d34382 (2023), so it passes
"--mmacos-version-min=<ver>", which the driver rejects and drops; spell
it with the driver option table instead.
Aided by Opus 5
Commit: b4ed7af4ada75884a9b2bcaaea8691c8b286b136
https://github.com/llvm/llvm-project/commit/b4ed7af4ada75884a9b2bcaaea8691c8b286b136
Author: saloni-shinde-Q <saloshin at qti.qualcomm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Target/Target.td
M llvm/lib/Target/RISCV/RISCV.td
M llvm/test/MC/RISCV/priv-invalid.s
M llvm/test/MC/RISCV/rv32d-invalid.s
M llvm/test/MC/RISCV/rv32zclsd-invalid.s
M llvm/test/MC/RISCV/rv32zdinx-invalid.s
M llvm/test/MC/RISCV/rv32zfh-invalid.s
M llvm/test/MC/RISCV/rv32zfinx-invalid.s
M llvm/test/MC/RISCV/rv32zhinx-invalid.s
M llvm/test/MC/RISCV/rv32zhinxmin-invalid.s
M llvm/test/MC/RISCV/rv64d-invalid.s
M llvm/test/MC/RISCV/rv64f-invalid.s
M llvm/test/MC/RISCV/rv64xtheadmemidx-invalid.s
M llvm/test/MC/RISCV/rv64zdinx-invalid.s
M llvm/test/MC/RISCV/rv64zfh-invalid.s
M llvm/test/MC/RISCV/rv64zfinx-invalid.s
M llvm/test/MC/RISCV/rv64zhinx-invalid.s
M llvm/test/MC/RISCV/rv64zhinxmin-invalid.s
M llvm/test/MC/RISCV/tlsdesc.s
M llvm/test/MC/RISCV/xqcia-invalid.s
M llvm/test/MC/RISCV/xqciac-invalid.s
M llvm/test/MC/RISCV/xqciio-invalid.s
M llvm/test/MC/RISCV/xqcili-invalid.s
M llvm/test/MC/RISCV/xqcilo-invalid.s
M llvm/test/MC/RISCV/xqcilo-pseudos-invalid.s
M llvm/test/MC/RISCV/xqcilsm-invalid.s
A llvm/test/TableGen/AsmMatcherPrioritizeFeature.td
A llvm/test/TableGen/AsmMatcherPrioritizeFeatureErrors.td
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[RISCV][MC] Prioritize features in MultiMismatchFallback (#215737)
Add the `PrioritizeFeatureInMultipleNearMisses` AsmParser option and
enable it for RISCV.
When an instruction has both missing features and multiple invalid
operands, prioritize the feature entry when populating `MultiMismatchFallback` so
that diagnostics identify the missing extension.
Keep the existing `MultiMismatchFallback` behavior unchanged for targets
that do not enable the option.
This change was assisted by AI.
Commit: d677e53ba64a897a7575706c4782f9575e5ec914
https://github.com/llvm/llvm-project/commit/d677e53ba64a897a7575706c4782f9575e5ec914
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/unittests/ABI/CMakeLists.txt
A llvm/unittests/ABI/TargetInfoTest.cpp
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
Log Message:
-----------
[ABI] Hoist isSingleElementStruct into TargetInfo and fix array reduction (#224994)
Changes:
- Move `isSingleElementStruct` from `X86_64TargetInfo` into the shared
`TargetInfo` base so other targets can reuse it, and restore the
`isAggregateTypeForABI` guard from classic CodeGen so a multi-element
array field no longer reduces (e.g. struct { short a[2]; } stays i32
instead of [2 x i16]).
- Add unit tests for the reduction in to new test file `TargetInfoTest`.
Relates to : https://github.com/llvm/llvm-project/issues/220471
Assisted by: claude opus 4.8
Commit: 76301e4aa9a9dc28f0074eb9ef591e299dc319bc
https://github.com/llvm/llvm-project/commit/76301e4aa9a9dc28f0074eb9ef591e299dc319bc
Author: Wenju He <wenju.he at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/LTO/Config.h
M llvm/lib/LTO/LTOBackend.cpp
Log Message:
-----------
[LTO] Add PassBuilderCallback to Config (#224896)
This allows LTO backend to register PassBuilder extension point
callbacks, mirroring the existing PreCodeGenPassesHook.
Commit: fd979c6266fa98c5a55c2d27af697c110838c1bc
https://github.com/llvm/llvm-project/commit/fd979c6266fa98c5a55c2d27af697c110838c1bc
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/unittests/ABI/FunctionInfoTest.cpp
Log Message:
-----------
[ABI] Add IndirectAliased kind to abi::ArgInfo (#225005)
Changes:
- Mirror `clang::CodeGen::ABIArgInfo::IndirectAliased:` an indirect
argument whose pointer may alias an object referenced elsewhere and is
never byval.
- Add the kind, a `getIndirectAliased` factory, an `isIndirectAliased`
predicate, and widens the indirect align/addrspace/realign accessors to
both kinds.
- Add unit tests in FunctionInfoTest.
Relates to : https://github.com/llvm/llvm-project/issues/220471
Assisted by: claude opsu 4.8
Commit: 1f825d419c8129aa11212cd598f3f72ee38d3c44
https://github.com/llvm/llvm-project/commit/1f825d419c8129aa11212cd598f3f72ee38d3c44
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes ce06ac9 (#225288)
This fixes ce06ac932eca6a403fa2f1f84fc5724fd30dc562 (#224822).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ce06ac932eca6a403fa2f1f84fc5724fd30dc562
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: c73350f61f140739545fa9427ab0547d7463d573
https://github.com/llvm/llvm-project/commit/c73350f61f140739545fa9427ab0547d7463d573
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
M llvm/test/MC/AArch64/directives-case_insensitive.s
A llvm/test/MC/AArch64/tls-auth-relocs.s
Log Message:
-----------
[PAC][ELF] Support R_AARCH64_AUTH_TLSDESC_CALL relocation (#198327)
The R_AARCH64_AUTH_TLSDESC_CALL is introduced to allow linker relaxation
of AUTH TLSDESC call sequences for non-preemptible undefined weak
symbols.
The lld patch introducing the relaxation: #194636
Corresponding ARM docs PR:
https://github.com/ARM-software/abi-aa/pull/395
Commit: 13c5814d8006ab386881cf7f9387f4dd44e79d94
https://github.com/llvm/llvm-project/commit/13c5814d8006ab386881cf7f9387f4dd44e79d94
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
R clang/test/CodeGen/AArch64/neon-ldst-one.c
M clang/test/CodeGen/AArch64/neon/load.c
M clang/test/CodeGen/AArch64/poly64.c
Log Message:
-----------
[CIR][AArch64] Upstream load (vld[234]_*/vld[234]q_*) NEON builtins (#220476)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for load intrinsics (`vld[234]_*`/`vld[234]q_*`)
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#stride)
Port tests:
- `clang/test/CodeGen/AArch64/neon-intrinsics.c`
- `clang/test/CodeGen/AArch64/neon-ldst-one.c`
- `clang/test/CodeGen/AArch64/poly64.c`
to `clang/test/CodeGen/AArch64/neon/load.c`
Commit: b2fab5a4ec1dcd2869ed579241975ff7fd2cb6be
https://github.com/llvm/llvm-project/commit/b2fab5a4ec1dcd2869ed579241975ff7fd2cb6be
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
Log Message:
-----------
[ORC] Mangle GDBJITRegistrar alloc-action CI names as C (#225275)
Flip RegisterJITLoaderGDBAllocActionName and its deregister counterpart
from Verbatim to C, so their names carry the target's C mangling. The
register action is served in-tree by llvm_orc_registerJITLoaderGDBAlloc-
Action (DefaultHostBootstrapValues, via mangledCopy of the same spec)
and resolved by the debugger-support plugins through the same spec, so
both sides stay in sync.
Commit: 6faaea17bcd9f69c0e409e66d56422314988392b
https://github.com/llvm/llvm-project/commit/6faaea17bcd9f69c0e409e66d56422314988392b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
Log Message:
-----------
[ORC] Mangle SharedMemoryMapper CI names as C (#225277)
Flip the SharedMemoryMapper descriptors (instance +
reserve/initialize/deinitialize/release) from Verbatim to C, so their
names carry the target's C mangling. Served by the in-tree
ExecutorSharedMemoryMapperService; controller and executor mangle the
same specs and nothing else defines these names.
Commit: c04e54001b5cff87d7f89819716dbea1e7493c5f
https://github.com/llvm/llvm-project/commit/c04e54001b5cff87d7f89819716dbea1e7493c5f
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
Log Message:
-----------
[ORC] Mangle MachOUnwindInfoRegistrar CI names as C (#225278)
Flip the MachOUnwindInfoRegistrar register/deregister-sections
descriptors from Verbatim to C, so their names carry the target's C
mangling. Served in-tree by UnwindInfoManager (via mangledCopy of the
same specs) and resolved by UnwindInfoRegistrationPlugin through the
same specs, so both sides stay in sync; nothing else defines them.
Commit: 4c377436c5d688196ee97ee6888d1d96894efc60
https://github.com/llvm/llvm-project/commit/4c377436c5d688196ee97ee6888d1d96894efc60
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M .github/workflows/build-libc-container.yml
Log Message:
-----------
[Github] Rename libc container to 26.04 (#225297)
The last commit bumped it to 26.04, but I forgot to rename it.
Commit: dc21109c01ad1d52f105f892794b1995e449751b
https://github.com/llvm/llvm-project/commit/dc21109c01ad1d52f105f892794b1995e449751b
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqccmi.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/MC/RISCV/attribute-arch.s
A llvm/test/MC/RISCV/xqccmi-invalid.s
A llvm/test/MC/RISCV/xqccmi-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add assembler support for the Qualcomm Xqccmi vendor extension (#225119)
This patch adds support for assembling and disassembling the Qualcomm
Xqccmi 16-bit Instruction Lookup Table vendor extension. The extension
has a single `qc.cm.ilut` instruction which executes one or two
instructions from an instruction lookup table. The encoding overlaps
with `c.fld`, making `Xqccmi` and `Zcd` mutually exclusive.
The extension also adds two CSR's `qc.itba` and `qc.itdec` that contain
the lookup table base address and the leading double entries count
respectively.
Spec:
https://github.com/qualcomm/riscv-unified-db/releases#release-Xqccmi-0.2.0
Assisted by gpt-5.6-luna.
Commit: 22fc5f54fa0e1a16b68126329afbebcc39960311
https://github.com/llvm/llvm-project/commit/22fc5f54fa0e1a16b68126329afbebcc39960311
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
A llvm/test/MC/Disassembler/RISCV/xcvbitmanip-invalid.txt
Log Message:
-----------
[RISCV][MC] Reject invalid combined immediates for cv.insert in the disassembler (#225269)
Follow up of #224985
Commit: d11b9adc9bd2a1c8142ff134d04275c4cfce34b0
https://github.com/llvm/llvm-project/commit/d11b9adc9bd2a1c8142ff134d04275c4cfce34b0
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/collapse_ordered_instantiation_dependent.cpp
Log Message:
-----------
[Clang][OpenMP] Delay `collapse/ordered` nest walk until instantiation (#225052)
Do not fold `collapse` and `ordered` counts in `checkOpenMPLoop` until
the expression is no longer instantiation-dependent.
Clause parsing already waits. The loop walker did not. A count like
`sizeof(sizeof(T() + T()))` was folded in the template, so Clang could
walk the wrong number of loops before instantiation.
Commit: 94f5dd0eb25ed97603af1d0a501c412fcfea6696
https://github.com/llvm/llvm-project/commit/94f5dd0eb25ed97603af1d0a501c412fcfea6696
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/dllexports
M openmp/runtime/src/i18n/en_US.txt
A openmp/runtime/src/kmp_device_env.cpp
A openmp/runtime/src/kmp_device_env.h
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
A openmp/runtime/test/env/omp_default_device_all_rejected.c
A openmp/runtime/test/env/omp_denylist_extra_coverage.c
A openmp/runtime/test/env/omp_num_threads_all_demo.c
A openmp/runtime/test/env/omp_num_threads_all_host.c
A openmp/runtime/test/env/omp_num_threads_all_set_defaults.c
A openmp/runtime/test/env/omp_num_threads_dev_all_fallback.c
A openmp/runtime/test/env/omp_num_threads_dev_invalid.c
A openmp/runtime/test/env/omp_num_threads_dev_overflow.c
A openmp/runtime/test/env/omp_num_threads_dev_resolve.c
A openmp/runtime/test/env/omp_num_threads_host_overrides_all.c
A openmp/runtime/test/env/omp_num_threads_host_vs_device.c
A openmp/runtime/test/env/omp_num_threads_warnings_off.c
Log Message:
-----------
[libomp] OpenMP 6.0 Device-Scope Environment Variables (#197191)
The patch introduces `_ALL` `_DEV` `_DEV_<id>` env var suffixes to the
LLVM's OpenMP host runtime `libomp`. The eligible-list env var currently
supports `OMP_NUM_THREADS`.
Assisted by Claude Opus 4.7 / Claude 4.6 Sonnet
Commit: e0d9b608406b95d6906db68c05e04bb6e328d65b
https://github.com/llvm/llvm-project/commit/e0d9b608406b95d6906db68c05e04bb6e328d65b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
Log Message:
-----------
[orc-rt] Fix unit test. (#225299)
Use !! to convert EPI to bool, and ExecutorProcessInfo::pageSize() to
get the page size (ExecutorProcessInfo::PageSize is private).
Commit: 5587ab44938b396a01268f118fad8b32a59104a3
https://github.com/llvm/llvm-project/commit/5587ab44938b396a01268f118fad8b32a59104a3
Author: Dark Steve <Prasoon.Mishra at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-trivial-select.ll
M llvm/test/Transforms/SimpleLoopUnswitch/pr138509.ll
A llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-header-phi.ll
Log Message:
-----------
[SimpleLoopUnswitch] Allow trivial unswitch when exit LCSSA is a header PHI (#222962)
Trivial unswitch bails on a common loop shape: a loop-invariant branch
in the header that exits the loop returning a loop-carried value.
```
int acc = 0;
for (...) {
if (c)
return acc;
acc++;
}
```
After loop-rotate the `if` sits in the header, and the exit reads the
header PHI `%acc`. Trivial unswitch hoists the branch into the
preheader, so the exit value must be available there. It only accepts
loop-invariant values, and `%acc` is not one, so it gives up. But `%acc`
is safe here: the branch is invariant, so if the loop exits it exits on
the first iteration, before the latch runs. On that edge `%acc` still
holds its entry value, 0.
This is not specific to the header. The same holds for any invariant
branch whose block dominates the latch, so every header PHI still holds
its entry value.
Allow the unswitch in these cases. When an exit's LCSSA incoming is a
header PHI (and the branch's block dominates the latch), replace it with
the value the PHI takes from the preheader (its entry value), which
keeps SSA valid.
Commit: 9ac223e87234e44464d9c43ee7de188173043306
https://github.com/llvm/llvm-project/commit/9ac223e87234e44464d9c43ee7de188173043306
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 94f5dd0 (#225300)
This fixes 94f5dd0eb25ed97603af1d0a501c412fcfea6696 (#197191).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=94f5dd0eb25ed97603af1d0a501c412fcfea6696
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 9c0960684778fcfb8308a37a992633cceb3ee48c
https://github.com/llvm/llvm-project/commit/9c0960684778fcfb8308a37a992633cceb3ee48c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
A orc-rt/include/orc-rt/bedrock/ConnectionSpec.h
M orc-rt/lib/bedrock/CMakeLists.txt
A orc-rt/lib/bedrock/ConnectionSpec.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/ConnectionSpecTest.cpp
Log Message:
-----------
[orc-rt] Add ConnectionSpec, a connection-string parser (#225304)
Parses the string a process is given to describe the connection it
should establish with its peer:
<transport>[:<action>]=<descriptor>
Checking is punctuation only: the transport and action are opaque tokens
and the descriptor's syntax belongs to the transport, so a spec parses
without knowing which transports this process was built with.
The grammar is LLVM's (#225075), so the same vocabulary reaches an
orc-rt executor and an LLVM controller. A registry mapping transports to
the connectors that implement them will be added in a follow-up commit.
Commit: 639d199326c1ae95d8b2fa26390d45ade0f20a19
https://github.com/llvm/llvm-project/commit/639d199326c1ae95d8b2fa26390d45ade0f20a19
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
R llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
A llvm/test/CodeGen/AMDGPU/atomic_optimizations_mul_one.ll
Log Message:
-----------
[AMDGPU] Constant folding for wave-reduce intrinsics (#212755)
Relates to: https://github.com/llvm/llvm-project/pull/193142
A missed optimization opportunity.
While most constants to `add`, `sub` and `xor` wave reductions
cannot be folded, some identity constants(0, 1) can do with
some special handling.
Commit: d2d28852845aaf0588a4c4a9db341cb217440247
https://github.com/llvm/llvm-project/commit/d2d28852845aaf0588a4c4a9db341cb217440247
Author: Zinovy Nis <zinovy.nis at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/readability/simplify-boolean-expr-demorgan.cpp
Log Message:
-----------
[clang-tidy] Fix De Morgan for overloaded comparisons (#221432)
Before my patch:
(https://source.chromium.org/chromium/chromium/src/+/main:base/trace_event/memory_allocator_dump.cc;l=174)
```diff
- if (!(name == rhs.name && units == rhs.units &&
- entry_type == rhs.entry_type)) {
+ if (!name == rhs.name || !units == rhs.units ||
+ entry_type != rhs.entry_type) {
```
With the patch:
```diff
- if (!(name == rhs.name && units == rhs.units &&
- entry_type == rhs.entry_type)) {
+ if (name != rhs.name || units != rhs.units ||
+ entry_type != rhs.entry_type) {
```
Tests were written with the assistance of ChatGPT 5.6 Terra
Commit: b65e29010b8e05bbb916a8c0de163c9d1bb223ec
https://github.com/llvm/llvm-project/commit/b65e29010b8e05bbb916a8c0de163c9d1bb223ec
Author: David Green <david.green at arm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/Thumb2/mve-vctp.ll
Log Message:
-----------
[ARM] Fix swapped condition in PerformVSetCCToVCTPCombine. (#225112)
This was swapping the wrong condition to a SETUGT. Came up in #224857.
Also remove vctp64 as we cannot fold 64bit integers to vctp.
Commit: 9517d7182766f9d16dda05a97464660e27ce91f3
https://github.com/llvm/llvm-project/commit/9517d7182766f9d16dda05a97464660e27ce91f3
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/low-trip-count-body-size-limit.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count-ic-3.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
A llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count-body-size-limit.ll
A llvm/test/Transforms/LoopVectorize/RISCV/small-trip-count-vf-plus-one.ll
Log Message:
-----------
[LoopVectorize] Improve Vectorization of Low Trip Count Loops (#195823)
Currently, Small Loops with Trip Counts less than 16, and in situations
where the Trip Count (TC) is less than the Tail Folding Threshold are
harder to vectorize, its only possible where no epilogue will be
emitted. However, for loops with large bodies and small trip counts this
can be counterproductive to performance, often failing to vectorize
entirely. This is more prevalent with targets where
`getMinTripCountTailFoldingThreshold()` returns a value greater than 0.
To address this, the Small Loops where the TC == VF + 1 can now
vectorize, leading to a vectorized iteration (or loop if interleaving is
required) and a single scalar iteration. Later passes can then remove
the loop's entirely.
Testing an with OpenSource Fortran HPC Benchmark which includes multiple
loops with small trip counts, but large loop bodies, has shown
significant improvement to runtime after these changes.
Assisted-by: Claude Sonnet 4.6/Codex
Commit: 167761dd0d716c264a44691464fb8c4e2d52e303
https://github.com/llvm/llvm-project/commit/167761dd0d716c264a44691464fb8c4e2d52e303
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[CodeGen][ProfCheck] Mark scalable intrinsic expansion loop with unknown weights (#225050)
Commit: 3a4d8a9e6acaed193477208328be0eb8f24fd253
https://github.com/llvm/llvm-project/commit/3a4d8a9e6acaed193477208328be0eb8f24fd253
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGBuilder.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenCXX/strict-vtable-pointers.cpp
Log Message:
-----------
[Clang] Stop using strip.invariant.group (#225072)
Clang currently emits calls to llvm.strip.invariant.group under
`-fstrict-vtable-pointers` whenever a pointer to a dynamic object is
used in a comparison or might be used in a comparison through operations
we cannot track.
The purpose of the llvm.strip.invariant.group intrinsic is to make sure
that if we have a dominating condition like `a ==
launder.invariant.group(a)`, we don't end up replacing the latter with
the former, as that would allow the optimizer to assume that the memory
stays invariant, despite going through a launder operation (e.g. on
placement new).
However, since this was introduced, we've come to the understanding that
replacing pointers based on equality comparison is generally only legal
if they have the same provenance, and stopped doing such replacements.
The specific strip.invariant.group/launder.invariant.group case was
still buggy due to an implementation bug, but this was fixed in
https://github.com/llvm/llvm-project/pull/224281.
As such, I believe that we no longer need to emit
llvm.strip.invariant.group in Clang. I plan to also remove the LLVM
intrinsic in a followup.
Commit: 999b8c4e6b781768cb2bdd5595c89587dd92cef5
https://github.com/llvm/llvm-project/commit/999b8c4e6b781768cb2bdd5595c89587dd92cef5
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
R orc-rt/test/regression/darwin/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Make check-rt-process-info.test test more generic. (#225314)
Add %host-arch and %host-os substitutions to orc-rt-lit's config, and
use them to make the regression test platform agnostic.
Commit: 1833848c3e6ddc1d670cc0adea027867b9ed742b
https://github.com/llvm/llvm-project/commit/1833848c3e6ddc1d670cc0adea027867b9ed742b
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/Wasm.cpp
Log Message:
-----------
[clang-repl] Support wasm64 execution (#225311)
Emscripten-forge is adding wasm64 builds on its emscripten 6-x branch
which exposed two wasm32 hardcoded assumptions in clang-repl's
WebAssembly execution path.
`IncrementalCompilerBuilder::CreateCpp()` currently hardcodes
`wasm32-unknown-emscripten`, even when clang-repl itself is built for
wasm64.
Once Clang emits a wasm64 object, the in-process linker must also select
the correct emulation. `wasm-ld` defaults to wasm32 and otherwise fails
in `InputFile::checkArch()` with:
```text
must specify -mwasm64 to process wasm64 object files
```
The pipeline is this
```
lldMain
→ lld::wasm::link
→ LinkerDriver::linkerMain
→ createFiles
→ addFile
→ createObjectFile
→ ObjFile::ObjFile
→ InputFile::checkArch
→ fatal: must specify -mwasm64 to process wasm64 object files
```
This patch introduces 2 atomic patches fixing the only 2 buggy sources !
Commit: 2ccc678a64ecd52eace68e363f4d47935a56fb57
https://github.com/llvm/llvm-project/commit/2ccc678a64ecd52eace68e363f4d47935a56fb57
Author: David Green <david.green at arm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
A llvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769-debug.ll
Log Message:
-----------
[AArch64] Fix position of nop inserted for +fix-cortex-a53-835769 under debug. (#224830)
Make sure that the position of the nop added for +fix-cortex-a53-835769
is not dependant on debug instructions at the start of the block.
Fixes #224661
Commit: 44c4c0220a09a1468c04d9d8319197a078dfbe3b
https://github.com/llvm/llvm-project/commit/44c4c0220a09a1468c04d9d8319197a078dfbe3b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-sext.ll
Log Message:
-----------
[X86] Move PSHUF(SHIFT(X,C0),C1) -> SHIFT(PSHUF(X,C1),C0) to canonicalizeShuffleWithOp (#225313)
No need for this to be in combineTargetShuffle, and we can generalize it
to work with more shuffles in a future patch.
Commit: 80310178c079fc4ec712ace6d72a97bb5c619a12
https://github.com/llvm/llvm-project/commit/80310178c079fc4ec712ace6d72a97bb5c619a12
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/SemaCXX/aggregate-default-member-initializers.cpp
Log Message:
-----------
[clang][bytecode] Mark fields as being initialized, even without running a ctor for them (#225295)
To fix the diagnostics.
Commit: 4acbf9b61c3f0579def4ebd1c1abca1048c4c378
https://github.com/llvm/llvm-project/commit/4acbf9b61c3f0579def4ebd1c1abca1048c4c378
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
A clang/include/clang/CodeGenUtils/CallUtils.h
A clang/include/clang/CodeGenUtils/ClassUtils.h
A clang/include/clang/CodeGenUtils/ExprUtils.h
A clang/include/clang/CodeGenUtils/FunctionUtils.h
A clang/include/clang/CodeGenUtils/ItaniumCXXABIUtils.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
A clang/lib/CodeGenUtils/CallUtils.cpp
A clang/lib/CodeGenUtils/ClassUtils.cpp
A clang/lib/CodeGenUtils/ExprUtils.cpp
A clang/lib/CodeGenUtils/FunctionUtils.cpp
A clang/lib/CodeGenUtils/ItaniumCXXABIUtils.cpp
Log Message:
-----------
[CIR][CodeGen][NFCI] Move shared AST-only helpers into CodeGenUtils (#223418)
Follow-up to PR #221001. Ten more helpers that both CodeGens had
equivalent copies of, several of them already marked "should be shared"
in
CIR.
Instead of growing CodeGenUtils.h, each helper goes in a header named
for
the classic CodeGen file it came from, with the CGExpr*.cpp family
sharing
ExprUtils.h. CIR's files mirror the classic ones, so the grouping reads
the
same from both sides.
CIR's getNoFPClassTestMask returned unsigned where classic returns
llvm::FPClassTest; the shared version keeps the classic return type.
Assisted-by: Claude Code (Claude Fable 5.1).
Commit: b2ccaab8ea618082b73d23201963dce0a1c03937
https://github.com/llvm/llvm-project/commit/b2ccaab8ea618082b73d23201963dce0a1c03937
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/IR/Attributes.h
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
A llvm/test/Instrumentation/TypeSanitizer/instrumented-args-exts.ll
Log Message:
-----------
[TypeSanitizer] Properly add ext attributes on arguments where needed. (#224366)
The TypeSanitizer should add extension attributes to arguments when inserting
instrumented calls.
This also adds getExtAttrForBoolParam() (and initBoolExtensionsForTriple()) in
TargetLibraryInfo.
Commit: d7750af92b0b0df0eb4e77f82b47f9e93f29b7b1
https://github.com/llvm/llvm-project/commit/d7750af92b0b0df0eb4e77f82b47f9e93f29b7b1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/test/CodeGen/ARM/cmse-harden-call-returned-values.ll
A llvm/test/CodeGen/Thumb2/thumb2-reduce-size-cpsr.mir
Log Message:
-----------
ARM: Track CPSR liveness in Thumb2SizeReduction without kill flags (#223068)
Thumb2SizeReduction narrows a 32-bit instruction to its flag-setting
16-bit form only when CPSR is dead afterwards. It determined this from
kill flags on CPSR operands. Kill flags have been semi-deprecated
for over a decade, so avoid relying on them. Liveness should be
evaluated as a reverse walk over a block.
The existing forward walk over the block is still necessary as a
separate step for the different A9 avoidCPSRPartialUpdate optimization.
Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: b9f108134ca91564e2319ad391904b46fe5af33c
https://github.com/llvm/llvm-project/commit/b9f108134ca91564e2319ad391904b46fe5af33c
Author: Hadong Lee <hdchris765 at snu.ac.kr>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
A llvm/test/Transforms/LoopLoadElim/mixed-width-clobber.ll
Log Message:
-----------
[LoopLoadElim] Fix miscompile caused by incorrect store-to-load forwarding across mixed-width clobbers (#224833)
When LoopLoadElimination finds a non-forwardable Store -> Load
dependence, it currently handles it with continue and drops it entirely.
Although that store cannot provide a forwarded value itself, it may
partially clobber the value of another forwarding candidate before the
target load.
This change adds the load to LoadsWithUnsafeDependence when such a
dependence is found, preventing forwarding for that load.
The tests cover zero-distance and non-zero-distance clobbers, including
when a later full-width store overwrites the clobber.
Fixes #224832
Commit: bdb05e67a787048a8e2da4c019c8cdabc44771e8
https://github.com/llvm/llvm-project/commit/bdb05e67a787048a8e2da4c019c8cdabc44771e8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/IndVarSimplify/exit-value-nowrap-flags.ll
Log Message:
-----------
[SCEVExpander] Keep use flags when expanding adds to GEPs (#225148)
Update expandAddToGEP to accept and thread through operands as SCEVUse.
This properly use SCEVUse flags when expanding GEPs.
PR: https://github.com/llvm/llvm-project/pull/225148
Commit: 8ce031e29bd3df7000f4e7dba9267d83d438ea81
https://github.com/llvm/llvm-project/commit/8ce031e29bd3df7000f4e7dba9267d83d438ea81
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/test/Analysis/CostModel/AArch64/masked_compress_load.ll
Log Message:
-----------
[AArch64] Add costs of Promoted types for compressstore (#220257)
When using SVE, types that are not 128bit widths will be promoted to be
legal SVE Types. Currently, when using
llvm.masked.compressstore these types are marked as invalid for SVE Only
but these are legal types. Fixed width 128bit types are also excluded
and would be enabled by this change.
Enable these types whether they are promoted or legal types.
Commit: 6efdb9fb181cfc7650773549f97935dc84efebd4
https://github.com/llvm/llvm-project/commit/6efdb9fb181cfc7650773549f97935dc84efebd4
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Strip WrapPredicate::getImpliedFlags (NFC) (#225137)
The code in SCEVWrapPredicate::getImplied is dead, as we would never add
an increment wrap-predicate to begin with, when the much stronger
invariant of nuw/nsw is available on the AddRec. This also strips the
hasNoOverflow user.
Commit: 9073b4d71e9d66c495df5f6ec42ab0279326f762
https://github.com/llvm/llvm-project/commit/9073b4d71e9d66c495df5f6ec42ab0279326f762
Author: Marcin Radomski <marcin at mradomski.pl>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/test/Transforms/Mem2Reg/ignore-droppable.ll
M llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll
Log Message:
-----------
[PromoteMemToReg] Hoist removeIntrinsicUsers into a pre-pass before promotion (#224617)
Calling removeIntrinsicUsers(AI) inside the per-alloca promotion loop in
PromoteMem2Reg::run() inserts StoreInst(undef) instructions into basic
blocks after LargeBlockInfo (LBI) has already cached instruction indices
for those blocks during earlier iterations. Every subsequent
LBI.getInstructionIndex query on newly inserted StoreInst(undef)
instructions misses in LBI.InstNumbers and triggers a full O(|BB|) basic
block rescan, resulting in O(K * |BB|) compilation time blowup in
promoteSingleBlockAlloca when a basic block contains K scoped allocas.
Hoist removeIntrinsicUsers(AI) into a pre-pass loop over all Allocas
upfront in PromoteMem2Reg::run() before the main AllocaNum promotion
loop begins so all synthetic StoreInst(undef) instructions are inserted
prior to LBI caching.
Attached test verifies this PR doesn't change the behavior compared to
HEAD.
This improves the compile time of some CUDA kernels
(https://github.com/llvm/llvm-project/pull/191909#issuecomment-5569614846)
by ~9x.
Assisted-by: Gemini
Commit: 34a505568ca0cf7c7f90c88964548856309b86c4
https://github.com/llvm/llvm-project/commit/34a505568ca0cf7c7f90c88964548856309b86c4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/test/CodeGen/ARM/cmse-vlldm-no-reorder.mir
Log Message:
-----------
ARM: Don't duplicate the LR def when expanding call pseudos (#225062)
Several pseudo expansions in ARMExpandPseudoInsts built a real call and then
copied the pseudo's operands onto the new instruction. Each of these call opcodes
declares LR as an implicit-def, but the original instruction already had that. The original
def may have been marked as dead, so the result would be a redundant operand with an
inconsistent dead flag. This avoids a failure in a future verifier check.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 32531790756e61174d7bebb7c0543f643298f596
https://github.com/llvm/llvm-project/commit/32531790756e61174d7bebb7c0543f643298f596
Author: Milin Bhade <mbhade at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/load_store.ll
A llvm/test/Analysis/CostModel/X86/nonpow2-load-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
M llvm/test/Transforms/SLPVectorizer/X86/nonpow2-shared-weight-reduction.ll
Log Message:
-----------
[X86] Correct folded insert costs for partial vector loads (#220174)
The SLP vectorizer can form non-power-of-two trees, including width-3
trees, but relies on target costs to determine profitability: #194189
X86 getMemoryOpCost overestimated non-power-of-two vector loads by
counting a folded PINSR*(mem) chunk as both a memory operation and a
separate lane insertion.
Recognize non-0th folded load-insert chunks and charge each once.
Leading sub-dword loads, stores, and 8-byte chunks remain unchanged.
Commit: 977f915470ae98b3e7ee0fcb5555b773b31785a0
https://github.com/llvm/llvm-project/commit/977f915470ae98b3e7ee0fcb5555b773b31785a0
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp
Log Message:
-----------
[llvm-pdbutil] Avoid reading EC names from non-EC modules (#223253)
The module dumper resolves the PDB and source file name indices for
every module, even when the module does not contain Edit and Continue
information. If the DBI stream has no EC names table, `dump --modules`
fails with:
Unexpected error processing modules: Stream Error: The stream is too
short
to perform the requested operation.
Only resolve and print the EC names when the module's EC flag is set.
Commit: 3bbfa7173bbfb0a231674822efb84a3e0b9f8c23
https://github.com/llvm/llvm-project/commit/3bbfa7173bbfb0a231674822efb84a3e0b9f8c23
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopVectorize/scev-check-unknown-prof.ll
Log Message:
-----------
[SCEVExpander] Mark selects with unknown profile. (#224362)
SCEVExpander creates selects when expanding min/max expressions for
pointers and predicates. In neither case there is any information on how
likely either arm of the select is. Annotate with unknown profile.
This is part of addressing the remaining profcheck failures in
LoopVectorize: https://github.com/llvm/llvm-project/issues/161235.
PR: https://github.com/llvm/llvm-project/pull/224362
Commit: bbff6d83b2b538fc7e76813a5217affb398f8b86
https://github.com/llvm/llvm-project/commit/bbff6d83b2b538fc7e76813a5217affb398f8b86
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/mkfifoat.cpp
A libc/src/sys/stat/mkfifoat.h
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/mkfifoat_test.cpp
Log Message:
-----------
[libc] Implement mkfifoat in sys/stat (#224628)
### Summary
Implement the standard POSIX.1-2008 function `mkfifoat` in
`<sys/stat.h>`.
Fixes #224587
### Changes
- Added `mkfifoat` function specification to
`libc/include/sys/stat.yaml`.
- Added internal header `libc/src/sys/stat/mkfifoat.h`.
- Implemented `mkfifoat` in `libc/src/sys/stat/linux/mkfifoat.cpp` using
the existing `linux_syscalls::mknodat`.
- Registered `mkfifoat` entrypoint in `libc/src/sys/stat/CMakeLists.txt`
and `libc/src/sys/stat/linux/CMakeLists.txt`.
- Added entrypoint across Linux targets (`x86_64`, `aarch64`, `riscv`).
- Added hermetic unit tests in
`libc/test/src/sys/stat/mkfifoat_test.cpp` using `cpp::scope_exit`
cleanup and C++ `static_cast<mode_t>`.
### Testing
- Built and passed hermetic unit test
`libc.test.src.sys.stat.mkfifoat_test` (4/4 tests passed).
- Verified sibling tests (`mkfifo_test`, `fstat_test`).
- Ran `generate-libc-headers` and verified generated `sys/stat.h`.
- Verified `docgen.py sys/stat.h` output marks `mkfifoat` as
implemented.
- Ran `clang-format` on all touched C++ files.
Commit: 24cc35cc98486cc156170505ff1952d54713374f
https://github.com/llvm/llvm-project/commit/24cc35cc98486cc156170505ff1952d54713374f
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/sys/stat/CMakeLists.txt
A libc/src/sys/stat/fstatat.h
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/fstatat.cpp
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/fstatat_test.cpp
Log Message:
-----------
[libc] Implement fstatat in sys/stat (#224334)
### Summary
Implement the standard POSIX.1-2008 function `fstatat` in
`<sys/stat.h>`.
Fixes #224327
### Changes
- Added `fstatat` function specification to
`libc/include/sys/stat.yaml`.
- Added internal header `libc/src/sys/stat/fstatat.h`.
- Implemented `fstatat` in `libc/src/sys/stat/linux/fstatat.cpp` using
the existing `internal::stat_via_statx`.
- Registered `fstatat` entrypoint in `libc/src/sys/stat/CMakeLists.txt`
and `libc/src/sys/stat/linux/CMakeLists.txt`.
- Added entrypoint across Linux targets (`x86_64`, `aarch64`, `riscv`).
- Added hermetic unit tests in
`libc/test/src/sys/stat/fstatat_test.cpp`.
### Testing
- Built and passed hermetic unit test
`libc.test.src.sys.stat.fstatat_test` (5/5 tests passed).
- Verified stat-family suite (`stat_test`, `lstat_test`, `fstat_test`,
`fstatat_test`).
- Ran `generate-libc-headers` and verified generated `sys/stat.h`.
- Verified `docgen.py` output marks `fstatat` as implemented.
- Ran `clang-format` on all touched C++ files.
---------
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: 99988429d395e95a8f994c5307371911145d2c1d
https://github.com/llvm/llvm-project/commit/99988429d395e95a8f994c5307371911145d2c1d
Author: rgal <russell.gallop at sony.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/Options/OptionUtils.cpp
A clang/test/Driver/ps4-ps5-resource-path.cpp
Log Message:
-----------
Remove .. from clang resource path when specified with CLANG_RESOURCE_DIR (#216996)
As discussed here:
https://discourse.llvm.org/t/removing-clang-version-number-from-resource-dir-in-a-distribution/90234
If a distributor wishes to have stable include paths across LLVM
versions, then they can build with `CLANG_RESOURCE_DIR=../lib/clang`.
This results in a slightly untidy include path (E.g.`C:\Program
Files\LLVM\bin\..\lib\clang\include`). This removes the ".." to make it
`C:\Program Files\LLVM\lib\clang\include` in this configuration.
Also added test. This uses "SIE" vendor. Since
https://github.com/llvm/llvm-zorg/commit/eac6791821f5104eb4c2b32f39ef5d20cda535a9,
PS4 and PS5 buildbots use this configuration and define the vendor so
the lack of version number and ".." should be tested on at least these
buildbots.
Commit: f8e7ce4f4624daf1415f908d12e0415a83e26757
https://github.com/llvm/llvm-project/commit/f8e7ce4f4624daf1415f908d12e0415a83e26757
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/compress-idioms.ll
A llvm/test/Transforms/LoopVectorize/RISCV/compress-idioms.ll
A llvm/test/Transforms/LoopVectorize/X86/compress-idioms.ll
A llvm/test/Transforms/LoopVectorize/compress-idioms-negative-tests.ll
A llvm/test/Transforms/LoopVectorize/compress-idioms.ll
A llvm/test/Transforms/LoopVectorize/compress-store-vec-epilogue.ll
Log Message:
-----------
[LV] Pre-commit compressing pattern tests (NFC) (#225109)
This patch pre-commits tests for #214491.
Commit: 48cccbb8fec8f58ab1d0af449d4d231d53731d5e
https://github.com/llvm/llvm-project/commit/48cccbb8fec8f58ab1d0af449d4d231d53731d5e
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
A llvm/test/Analysis/CostModel/X86/shuffle-mask-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
Log Message:
-----------
[NFC][CostModel][X86] Add cost tests for vXi1 mask broadcasts (#225070)
Commit: 4faf0ae1d518d97381ed195c5e12d3923f770152
https://github.com/llvm/llvm-project/commit/4faf0ae1d518d97381ed195c5e12d3923f770152
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct___pthread_cleanup_frame.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct___pthread_cleanup_frame.h
M libc/include/pthread.yaml
M libc/src/__support/threads/CMakeLists.txt
A libc/src/__support/threads/cleanup_stack.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread_attributes.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/__pthread_cleanup_pop.cpp
A libc/src/pthread/__pthread_cleanup_pop.h
A libc/src/pthread/__pthread_cleanup_push.cpp
A libc/src/pthread/__pthread_cleanup_push.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_cleanup_test.cpp
M libc/utils/docgen/pthread.yaml
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
Log Message:
-----------
[libc] Implement pthread_cleanup_push and pthread_cleanup_pop (#223427)
This patch implements the core POSIX thread cleanup mechanism
(pthread_cleanup_push and pthread_cleanup_pop).
POSIX allows these functions to be implemented as macros opening and
closing a lexical block. We allocate an automatic
__pthread_cleanup_frame structure on the stack in the push macro and
unlink it in the pop macro, calling helper functions
(__pthread_cleanup_push and __pthread_cleanup_pop) to link/unlink the
frame on the thread's cleanup_stack.
The stack is drained in LIFO order during thread termination in
call_atexit_callbacks before running __cxa_thread_atexit and TSS key
destructors.
It's worth noting that GLIBC implements this functionality in a much
more complicated way. The cleanup functions are registered with the
unwinding machinery so that throwing an exception (or even just
returning) from the push/pop blocks triggers evaluation of the cleanup
handlers. This behavior is not required (though not forbidden either) by
POSIX, which states that all of these result in undefined behavior. The
cleanup handlers are only run upon explicit
pthread_cleanup_pop(non_zero) or pthread_exit. POSIX also requires
running them on thread cancellation, but we don't implement cancellation
(yet).
*Another* thing worth noting is that this PR causes a couple of headers
to not compile in overlay mode (because I do not provide a definition of
__pthread_cleanup_frame in that case). These are threading headers which
are never supposed to be used in overlay mode (we can't overlay that),
and this is most visible in the bazel build, where I had to mark those
targets as incompatible. There are ways to work around this (the
simplest being providing a placeholder definition of the type for
overlay mode), but that's something I'd like to avoid if possible.
Assisted-by: Gemini
Commit: 394c8dd1493308cb9add77b18987aee2219a65c1
https://github.com/llvm/llvm-project/commit/394c8dd1493308cb9add77b18987aee2219a65c1
Author: Chris Kennelly <ckennelly at ckennelly.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/lower-table-based-lowbits-mask-n32.ll
A llvm/test/Transforms/AggressiveInstCombine/lower-table-based-lowbits-mask.ll
Log Message:
-----------
[AggressiveInstCombine] Fold low-bits mask table loads to arithmetic (#222509)
Recognize a load from a constant "low bits mask" table
```
static const uintN_t tbl[K] = { 0, 1, 3, 7, ... }; // tbl[j] == (1 << j) - 1
... x & tbl[i] ...
```
and replace the load with the equivalent arithmetic mask (1 << i) - 1.
This is the target-independent form of the X86 combineAndLoadToBZHI DAG
combine: on X86 with BMI2 the surrounding and still selects to a single
bzhi.
Assisted-by: Claude Code
Commit: 24fbe6a64a112c3ab90dab54e08969f2e2640436
https://github.com/llvm/llvm-project/commit/24fbe6a64a112c3ab90dab54e08969f2e2640436
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/BasicAliasAnalysis.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
A llvm/test/Analysis/BasicAA/gep-minabs-different-scale.ll
Log Message:
-----------
[BasicAA] Extend two-variable MinAbsVarIndex heuristic to different scales (#218639)
When performing offset-based reasoning via the min abs heuristic, the
existing two-variables case requires equal absolute scaling factors.
This may be generalized to different scales by factoring the offset as
`GCD*(C0*V0 - C1*V1)`, and relying on cached KnownBits to prove that the
cofactor products differ.
Proof: https://alive2.llvm.org/ce/z/RC4LwD.
Co-authored-by: Alex MacLean <amaclean at nvidia.com>
Commit: ac904273ae4dea5a447719cacf9fae952a7db0e1
https://github.com/llvm/llvm-project/commit/ac904273ae4dea5a447719cacf9fae952a7db0e1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
Log Message:
-----------
[ORC] Remove unused rt_alt UnwindInfoManager CI names (#225329)
The rt_alt UnwindInfoManager register/deregister action names were added
as a step towards supporting an "ORC-runtime-lite" API within LLVM, but
have not been used so far. This patch removes them, rather than leaving
them to drift. Replacements can be added as part of a coherent design
when ORC-runtime-lite is revisited.
Commit: a2c203465c5c687117f6a73aaa0e580ea4a02258
https://github.com/llvm/llvm-project/commit/a2c203465c5c687117f6a73aaa0e580ea4a02258
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCA.h
M orc-rt/lib/bedrock/sps/SimpleRemoteCA.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
Log Message:
-----------
[orc-rt] Add MsgHeader, the SimpleRemote stream header (#225336)
A SimpleRemote message carries an opcode, a sequence number, a tag and a
payload. MsgHeader is how a byte-stream transport puts those on the
wire: four little-endian uint64 fields, size first, followed by the
payload.
Adding MsgHeader to SimpleRemoteCA makes it easy for stream-based
transports to reuse.
Commit: 031866ff849401f9f42c5fba1e9a84ece38dadbc
https://github.com/llvm/llvm-project/commit/031866ff849401f9f42c5fba1e9a84ece38dadbc
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/x86-64-intrcc.ll
Log Message:
-----------
[X86] Don't double count the interrupt stack alignment push in StackSize (#224029)
emitPrologue pushes a slot to give an error-code handler the
return-address parity the frame layout assumes, but StackSize counted
that push as well. NumBytes derives from StackSize, so the subq grew by
8 too and left RSP at 8 mod 16 at every call. Object addresses are
unchanged.
Fixes #44560, fixes #50195
---------
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: a22714d1867d7941681c129ea1a37c85541a1ad4
https://github.com/llvm/llvm-project/commit/a22714d1867d7941681c129ea1a37c85541a1ad4
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
M lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/ProgressEvent.cpp
M lldb/tools/lldb-dap/ProgressEvent.h
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.h
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/ProgressEventTest.cpp
M lldb/unittests/DAP/ProtocolEventsTest.cpp
Log Message:
-----------
[lldb-dap] Refactor handling progress events. (#224957)
lldb-dap now only uses one thread to receive and throttle received
progress events.
For every progress with a progressId, we delay reporting the progress
for 1000ms until we have recieved a new progress and only send an update
if the progress has a new version after 250ms.
This means for every progress integration test we do nothing for at
least 1250ms. The previous `TestDAP_progress` runs for at least 8s
regardless of how fast the computer is.
Moved most of the test to unittest where we can simulate progress delays
and time passing. We now have only one `TestDAP_progress` test to verify
the client receives progress Events.
When the ProgressEventThread reports a new progressEvent, the reporter
then.
- Create or update the `PendingProgress` with that progressId.
- Determines the action to take based on the ProgressState,
k_start_delay and k_update_interval.
- Sends the apropriate Event based on the action calculated.
Migrate the API test to the new infrastructure.
Add unit tests for the ProgressEventReporter and protocol progressXXXX
POD.
Commit: d3cce170b16abfb9cf54de4e92e5b28fdd21f0fa
https://github.com/llvm/llvm-project/commit/d3cce170b16abfb9cf54de4e92e5b28fdd21f0fa
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
A lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
A lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
A lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
M lld/test/ELF/aarch64-tlsdesc-pauth.s
Log Message:
-----------
[PAC][lld] Do not emit AUTH relocs against undef weak non-preemptible symbols (#194636)
Undefined weak non-preemptible symbols should be statically resolved and
not signed.
See the corresponding relaxation described in docs:
https://github.com/ARM-software/abi-aa/blob/6e0d6611ac977628af7b2444ff841e76931a3557/design-documents/pauthabi-tls.rst
Previously, a dynamic relocation against such symbols was emitted, which
is not a correct behavior.
The patch also implements support for `R_AARCH64_AUTH_TLSDESC_CALL`
relocation since it's required for the described mandatory relaxation.
See also: https://github.com/ARM-software/abi-aa/pull/391
Depends on: #198327
Resolves #173296
Commit: 750b967f7bf80e08306a42c5d1cfd26d5d1ba56a
https://github.com/llvm/llvm-project/commit/750b967f7bf80e08306a42c5d1cfd26d5d1ba56a
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Transforms/debug-omp-target-internal-proc.fir
Log Message:
-----------
[flang][debug] Do not scope device subprograms at the host procedure. (#225121)
A target device module holds the internal procedures and the outlined
target regions, but not the host procedure they are contained in, which
only the host runs. Scoping them at it leaves a DW_TAG_subprogram with
no code as their parent, and a debugger does not look inside such a
subtree, so the variables of a device internal procedure, and of a
kernel outlined from one, cannot be read even though they are in the
DWARF.
Scope them at the file instead when compiling for the device. Nothing on
the device reads a variable through the host procedure's scope. An
omp.target region is IsolatedFromAbove, so a variable of the host that
the region uses is brought in as one of the region's own arguments
rather than through host association, and a declare target internal
procedure that does need the host association tuple cannot be called
from a target region at all, because passing the tuple in would be the
same violation. Only the name qualification is lost: a frame prints
"add" rather than "test::add", and the full nesting is still in the
linkage name.
Fixes https://github.com/llvm/llvm-project/issues/225101
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: c8e0087998b94c57ff5031ad8107caf4b6f0b8d4
https://github.com/llvm/llvm-project/commit/c8e0087998b94c57ff5031ad8107caf4b6f0b8d4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/extracts-folded-into-fmul-users-no-credit.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fma-candidates-after-store-chains.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/reduction-root-multi-use-fma.ll
A llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
A llvm/test/Transforms/SLPVectorizer/X86/fsub-fmul-rhs-combine.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassoc-flattened-copyable-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-logical-or-and-i1-vector.ll
Log Message:
-----------
[SLP][NFC]Add/update tests for fma-based transfromations, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225367
Commit: 3578fa36b62dc4355225bd6859c0c098f52c29d4
https://github.com/llvm/llvm-project/commit/3578fa36b62dc4355225bd6859c0c098f52c29d4
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/for_collapse_stmt_expr_codegen.cpp
M clang/test/OpenMP/for_loop_messages.cpp
Log Message:
-----------
[clang][OpenMP] Fix statement expressions in loop bounds being emitted more than once (#224939)
Fixes #153987
When Sema builds the helper expressions for an OpenMP loop, a bound that
evaluates to a constant is reused directly instead of being captured
into a `.capture_expr.` variable, so the same expression node is spliced
into the init, update, final and precondition helpers. That is fine for
`10 + 1`, but a statement expression like `({int a = 0; 0;})` declares a
variable, and emitting the shared node several times re-declares `a` and
trips `Decl already exists in LocalDeclMap!` in CodeGen. The report only
looked like a bytecode-interpreter issue because the old evaluator
happened to refuse `({float a = 0; a;})` and the new one didn't; the
unused-variable form crashes with both.
The capture decision now treats any expression containing a statement
expression as non-constant, so it goes through the existing capture
path: evaluated once in the pre-init statement, with every helper
reading the captured value. A bound of a non-rectangular loop can't be
captured at all, since it is re-evaluated at every use and the original
condition doubles as the body guard, so a statement expression there is
now rejected with an error, as GCC already does.
Commit: aea9d3f15a6ea47baf76457364ec2bdea288570b
https://github.com/llvm/llvm-project/commit/aea9d3f15a6ea47baf76457364ec2bdea288570b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/test/Sema/constant-builtins-2.c
Log Message:
-----------
[clang][bytecode] Add a bytecode RUN line for constant-builtins-2.c (#225305)
So changes to this file correctly trigger changes to the bytecode
interpreter.
Commit: 50f8187e00356371353d03f9a27d5b2cf245ec55
https://github.com/llvm/llvm-project/commit/50f8187e00356371353d03f9a27d5b2cf245ec55
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP]Fix SCEV type mismatch when a checked base crosses a cross-width addrspacecast
getUnderlyingObject strips addrspacecast, so a base object can have a
different address type than the access pointer, mixing SCEV types in the
bounds computation.
Fixes #225280
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225374
Commit: 11b427b038a33f4301bdbc818ffc77c425e4494a
https://github.com/llvm/llvm-project/commit/11b427b038a33f4301bdbc818ffc77c425e4494a
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M flang/docs/ModFiles.md
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Parser/cuf-sanity-tree.CUF
A flang/test/Semantics/CUDA/cuda-managed-implicit-modfile.cuf
Log Message:
-----------
[flang][cuda] Record implicit managed attribution in module files (#224601)
An implicit attribute the compiler applied under `-gpu=mem:managed` is
written into the module file the same way a user-written one is, so a
reader cannot tell them apart. It then treats the attribute as a user
requirement: allocating such a component in a DEVICE object is rejected,
and the memory space the user did ask for on the object no longer wins.
Spell the distinction in the module file as `MANAGED(IMPLICIT)`,
modelled on `INTENT(IN)`: CUDA-data-attr gains an optional parenthesized
qualifier, carried by a new CUDADataAttrSpec parse-tree node in AttrSpec
and ComponentAttrSpec. ATTRIBUTES(...) keeps the bare attribute, so the
qualifier cannot be written there.
The attribute itself is still written out, so a component keeps the same
memory space no matter which options a consumer is compiled with.
Also stop an implicitly applied attribute from making a module a definer
of CUDA symbols. Without this, adding `-gpu=mem:managed` to a module's
build rejects its OpenACC-only consumers over an attribute the user
never wrote.
Commit: dc3d1a84aee26d1b23645f575d0e3e9130891a02
https://github.com/llvm/llvm-project/commit/dc3d1a84aee26d1b23645f575d0e3e9130891a02
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduction-same-vals-i1.ll
Log Message:
-----------
[SLP]Fix APInt assertion in emitReusedOps for narrow types
The repeat count of a reused scalar may not fit the reduction element
type (e.g. count 2 in i1), tripping the APInt isUIntN assertion when
building the to-mul scale constant. Truncate the count to the element
bitwidth; the modular reduction arithmetic keeps the result equivalent.
Fixes #225279
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225376
Commit: aff1ba103ab3006242c72af33420a3437f4ff1db
https://github.com/llvm/llvm-project/commit/aff1ba103ab3006242c72af33420a3437f4ff1db
Author: tfzee <tim.ziegler at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/lzcnt-cmp-null-deref.mir
Log Message:
-----------
[X86] Fix null dereference in optimizeCompareInstr after lzcnt/tzcnt (#224282)
#210069 added `LTZCNTInst` to the exit condition of the backward scan of
`optimizeCompareInstr()`:
```c++
if (MI || Sub || LTZCNTInst)
break;
```
but it assigns `MI = LTZCNTInst` only inside the *forward* scan's
"EFLAGS is
used by this instruction" branch. When the forward scan never reaches
that
branch, both `MI` and `Sub` stay null.
However later code was built on the idea that one of them is not null.
Added a MIR test that would crash before but gets fixed by this
additional check.
Used AI for code review and comment/PR/test formatting/writing
Commit: c3ea7c1fc5e9b5ef9c637fb9522a44c21d413a6d
https://github.com/llvm/llvm-project/commit/c3ea7c1fc5e9b5ef9c637fb9522a44c21d413a6d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/test/CodeGenCXX/cfi-stats.cpp
M llvm/include/llvm/IR/Constants.h
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Transforms/Utils/SanitizerStats.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds-super-align.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-noalias.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-precise-allocate-to-module-struct.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-single-var-unambiguous.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/Transforms/GlobalMerge/alignment-2.ll
M llvm/test/Transforms/GlobalMerge/alignment.ll
M llvm/test/Transforms/GlobalMerge/basic.ll
M llvm/test/Transforms/GlobalMerge/guid.ll
M llvm/test/Transforms/GlobalMerge/macho-symbols.ll
M llvm/test/Transforms/GlobalMerge/private-global.ll
M llvm/test/Transforms/GlobalMerge/used.ll
M llvm/unittests/IR/ConstantsTest.cpp
Log Message:
-----------
[IR] Add ConstantExpr::getGetElementPtr() accepting DataLayout (#224652)
This overload takes GEP indices but produces a canonical i8 GEP in
ptradd representation. This is intended as a simple migration path for
places currently using `ConstantExpr::getGetElementPtr()` which cannot
be trivially replaced by `ConstantExpr::getPtrAdd()`.
This method is fallible, because something like `(getelementptr i32, ptr
@p, i64 CONST_EXPR)` can't be represented in ptradd form, because there
is no multiply constant expression. Not supporting this for constant
expressions is intentional, as we would not be able to emit a
relocatable expression for this anyway.
I have migrated a couple of sample usages in this PR. These are all
simple usages where the fallibility is not relevant.
The further plan here is to migrate everything (including IRBuilder) to
this new API, and then deprecated the one without the DataLayout
argument.
Commit: cec2eeb8ff2f1075b036d9bfd06c365d006bc972
https://github.com/llvm/llvm-project/commit/cec2eeb8ff2f1075b036d9bfd06c365d006bc972
Author: Yutong Zhu <y25zhu at uwaterloo.ca>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/test/Sema/compare.c
Log Message:
-----------
[Clang] Fix assertion "unsigned range includes negative?" in AnalyzeComparison during Sema of vector comparison with mismatched signed/unsigned types and __builtin_convertvector (#182627)
The ``TryGetExprRange`` function now checks if the operand is an unsigned
vector when computing the ranges.
Fixes #173614
Commit: 25aac605a4f1fc72bd1dcf0bb8d64fbfe2db3aa9
https://github.com/llvm/llvm-project/commit/25aac605a4f1fc72bd1dcf0bb8d64fbfe2db3aa9
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/builtin_commands/cat.py
M llvm/utils/lit/lit/builtin_commands/diff.py
Log Message:
-----------
[lit] Use text mode when opening text files on z/OS (#217434)
On z/OS, we rely on autoconversion to read files correctly, and this
requires files to be opened as text.
The following change https://github.com/llvm/llvm-project/pull/208024
changed the streams to be read and piped as binary resulting in some
test regressions due to unreadable output. This patch restores the
functionality of opening and reading as a text stream.
Commit: c4045dbc18c6637ebc218fe1a82ee62288613c2c
https://github.com/llvm/llvm-project/commit/c4045dbc18c6637ebc218fe1a82ee62288613c2c
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/test/Sema/compare.c
Log Message:
-----------
Revert "[Clang] Fix assertion "unsigned range includes negative?" in AnalyzeComparison during Sema of vector comparison with mismatched signed/unsigned types and __builtin_convertvector " (#225389)
Reverts llvm/llvm-project#182627
Post-commit CI found issues:
https://lab.llvm.org/buildbot/#/builders/225/builds/19103
Commit: 5752fb836ad4beb66316fb87825257072d677d1e
https://github.com/llvm/llvm-project/commit/5752fb836ad4beb66316fb87825257072d677d1e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-extract/recursive.ll
A llvm/test/tools/llvm-extract/verify-input.ll
M llvm/tools/llvm-extract/llvm-extract.cpp
Log Message:
-----------
llvm-extract: Fix not verifying input file (#225378)
Copy the behavior from opt, and add a -disable-verify flag.
Commit: 282bee66a1d76dddf284dc2e102ea5923669bf79
https://github.com/llvm/llvm-project/commit/282bee66a1d76dddf284dc2e102ea5923669bf79
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-conformance-tests.yaml
Log Message:
-----------
[Github] Bump libcxx CI container (#225268)
Commit: 565f3f73eef2220bfa80a1894bab29fd6e579a2d
https://github.com/llvm/llvm-project/commit/565f3f73eef2220bfa80a1894bab29fd6e579a2d
Author: Matt Davis <mattd at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.h
A llvm/test/DebugInfo/X86/unknown-source-language.ll
Log Message:
-----------
[Dwarf] Don't crash in dwarf::isC() on vendor-defined languages (#223739)
isC() enumerates SourceLanguage and falls off the end of the switch into
llvm_unreachable("Unknown language kind."). DW_LANG_lo_user and
DW_LANG_hi_user are both explicit cases, but every vendor-defined code
strictly between them is not, so any of them aborts an asserts-enabled
build.
Assisted-by: LLM
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 93e1bed81a47c0b3c3df6de2d5f7d7e4f450ae87
https://github.com/llvm/llvm-project/commit/93e1bed81a47c0b3c3df6de2d5f7d7e4f450ae87
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/docs/OpenMPSupport.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaStmt.cpp
A clang/test/OpenMP/structured-bindings-ast.cpp
A clang/test/OpenMP/structured-bindings-codegen.cpp
A clang/test/OpenMP/structured-bindings-messages.cpp
A clang/test/OpenMP/structured-bindings-nontemporal.cpp
A clang/test/OpenMP/structured-bindings-target-map-different-types.cpp
A clang/test/OpenMP/structured-bindings-template-instantiation.cpp
M clang/test/SemaCXX/decomposition-openmp.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[OpenMP] Support capturing structured bindings in OpenMP regions. (#190832)
This patch adds support for capturing structured bindings (C++20) in
`OpenMP` parallel regions, which previously resulted in an error:
`error: capturing a structured binding is not yet supported in OpenMP`
Commit: daf48dd510921288c89d3b07bc642d2dd5a33998
https://github.com/llvm/llvm-project/commit/daf48dd510921288c89d3b07bc642d2dd5a33998
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
A orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
M orc-rt/lib/bedrock/CMakeLists.txt
A orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
Log Message:
-----------
[orc-rt] Add a SimpleRemote transport over POSIX sockets (#225393)
A ControllerAccess speaking SimpleRemote over a connected stream socket.
The wire format matches LLVM's SimpleRemoteEPC. POSIX only -- Windows
needs a counterpart alongside the other sys/posix sources.
It owns a reactor thread built on poll(2) over the connection and a wake
socket. IO is non-blocking, so reads and writes resume wherever a
partial transfer stopped. The reactor is the only thread that sends;
callers on other threads append to a queue and wake it.
Reached through createSimpleRemoteCAOverSocket; the implementation is
file-local to the POSIX translation unit, so a Windows version needs no
header change.
The unit test drives it over a real socket pair, playing the controller
on the far end: framing, partial transfers, teardown ordering and the
malformed-message paths. The fixture owns the pair and the Session, so a
test body starts at the interesting part. It installs no on-disconnect
handler: Session reports the disconnect reason through reportError when
none is set, so a test that ends abnormally without asking for the error
fails rather than passing quietly.
Commit: a9fe7a5e5fbc96c15f929ffd313215752bd0d36e
https://github.com/llvm/llvm-project/commit/a9fe7a5e5fbc96c15f929ffd313215752bd0d36e
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
Log Message:
-----------
[CodeGen] Prevent potential multiplication overflow (#224665)
This fixes a number of issues reported by a CodeQL scan in the `CodeGen`
directory.
Commit: 86a9a1bd8bcc53762454b7d0aadd17820bbc56d7
https://github.com/llvm/llvm-project/commit/86a9a1bd8bcc53762454b7d0aadd17820bbc56d7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
M mlir/lib/Dialect/SPIRV/IR/CastOps.cpp
M mlir/test/Dialect/SPIRV/IR/cast-ops.mlir
M mlir/test/Target/SPIRV/cast-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Let FConvert cast between same width types (#225349)
The spec requires the component type to differ, not the width, so casts
like f16 to bf16 are legal
Prerequisite for https://github.com/llvm/llvm-project/pull/212817
Commit: 55676019676cae0565d8771252f05bc2a222a0a0
https://github.com/llvm/llvm-project/commit/55676019676cae0565d8771252f05bc2a222a0a0
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
A llvm/test/MC/AArch64/retired-feature-names.s
A llvm/test/MC/AArch64/retired-register-names.s
Log Message:
-----------
[AArch64] Prevent reuse of retired architecture names (#221782)
Add negative tests preventing reuse of retired feature and system register names.
When system registers or feature names are retired, they should be appended to
this file, to ensure they're never re-used in future. `FEAT_MPAMv2` and `FEAT_TME`
are the two features which have been intentionally retired so far.
Commit: 5d8e28af588d12e374bdbe5ed62cfa9dc1fc3f06
https://github.com/llvm/llvm-project/commit/5d8e28af588d12e374bdbe5ed62cfa9dc1fc3f06
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
A orc-rt/include/orc-rt/bedrock/ConnectorRegistry.h
A orc-rt/include/orc-rt/bedrock/SocketConnector.h
M orc-rt/lib/bedrock/CMakeLists.txt
A orc-rt/lib/bedrock/ConnectorRegistry.cpp
A orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
Log Message:
-----------
[orc-rt] Add ConnectorRegistry and the socket:adopt connector (#225398)
Maps the transport named by a ConnectionSpec to the connector that
establishes it. Connectors are registered manually, so they are only
available -- and for static archive builds, only linked -- if explicitly
requested.
Clients can connect a Session to a controller by passing a
ConnectionSpec for a registered transport (provided that the
ConnectionSpec is well-formed as defined by that transport).
This commit introduces a "socket:adopt" connector, which takes a stream
socket that this process already holds and attaches a
SocketSimpleRemoteCA for it.
Commit: 2dbb7d6c55600791b7a26d0bf1ebc8daa278247d
https://github.com/llvm/llvm-project/commit/2dbb7d6c55600791b7a26d0bf1ebc8daa278247d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
Log Message:
-----------
[mlir][SPIR-V] Lower arith.convertf operation (#212817)
Lower arith.convertf (same-bitwidth casts like f16<->bf16) to
spirv.FConvert
Commit: 58dd2be9a4b535b5467b432ebd6b77e03a93b5de
https://github.com/llvm/llvm-project/commit/58dd2be9a4b535b5467b432ebd6b77e03a93b5de
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/DAPTypes.h
M lldb/tools/lldb-dap/Variables.cpp
M lldb/tools/lldb-dap/Variables.h
M lldb/unittests/DAP/DAPTypesTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap][NFC] Simplify using var_ref_t directly. (#225187)
Make var_ref_t printable, update functions that requires var_ref_t to
use var_ref_t instead of integers.
Commit: db17738290efb586b9700bbecef3a82084a9c5f4
https://github.com/llvm/llvm-project/commit/db17738290efb586b9700bbecef3a82084a9c5f4
Author: Purna Chandra <vennelapurnachandra2006 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/MultipleInheritanceCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/misc/multiple-inheritance.cpp
Log Message:
-----------
[clang-tidy] Fix infinite loop in misc-multiple-inheritance (#220223)
This PR contains the fix for the infinite loop in
`misc-multiple-inheritance`. The checker was getting stuck in an
infinite cycle when it encountered circular inheritance. I fixed this by
adding a visited map (`InterfaceMap.try_emplace(Node, false)`) to break
the cycle during the DFS traversal.
Part of #213948.
Commit: 355b371c0b15e5c5bf29459342a64d5487231500
https://github.com/llvm/llvm-project/commit/355b371c0b15e5c5bf29459342a64d5487231500
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/usm_functions.cpp
M libsycl/unittests/handler/test_helpers.hpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/usm/alloc.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.h
M offload/languages/kernel/src/LanguageRuntime.cpp
M offload/liboffload/API/Memory.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Memory.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/unittests/Conformance/include/mathtest/DeviceContext.hpp
M offload/unittests/Conformance/include/mathtest/DeviceResources.hpp
M offload/unittests/Conformance/lib/DeviceContext.cpp
M offload/unittests/Conformance/lib/DeviceResources.cpp
M offload/unittests/OffloadAPI/event/olGetEventElapsedTime.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfo.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfoSize.cpp
M offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
M offload/unittests/OffloadAPI/memory/olMemAllocAligned.cpp
M offload/unittests/OffloadAPI/memory/olMemFill.cpp
M offload/unittests/OffloadAPI/memory/olMemFree.cpp
M offload/unittests/OffloadAPI/memory/olMemPrefetch.cpp
M offload/unittests/OffloadAPI/memory/olMemcpy.cpp
M offload/unittests/OffloadAPI/queue/olLaunchHostFunction.cpp
M offload/unittests/OffloadAPI/queue/olWaitEvents.cpp
Log Message:
-----------
[offload] add context to olMemAlloc* (#224930)
This is the last part of the context refactor. This patch:
- Adds context param to all memory allocation functions.
- Routes ptr info through the plugins instead of a global map.
- Removes allocation tracking from liboffload.
- olGetMemInfo(OL_MEM_INFO_DEVICE) now returns INVALID_ARGUMENT for host
allocations, which have no per-device affinity.
Re-land of #222677 + #224622, which were reverted together in #224703.
Assisted-by: Claude Opus 4.7
Commit: ee7f51a7d00f05662716d20e451c9c25c0fe79ee
https://github.com/llvm/llvm-project/commit/ee7f51a7d00f05662716d20e451c9c25c0fe79ee
Author: purnima shrivastava <purnimashrivastava05 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
Fix recursive DI variant part (#225373)
`mlir::translateModuleToLLVMIR` could leave recursive `DICompositeType`
metadata unresolved when the composite used `DW_TAG_variant_part`.
`DW_TAG_variant_part` was not emitted as a distinct `DICompositeType`,
unlike other recursive composite type tags. This change adds it to the
distinct path and adds a regression test covering the recursive
variant-part case.
Testing:
* `mlir/test/Target/LLVMIR/llvmir-debug.mlir`
* `ninja -C build check-mlir`
Fixes: #225151
Co-authored-by: Purnima Shrivastava <purnimashrivastava05 at .com>
Commit: d61398d128190a7f67668216c9d43bff7e93e280
https://github.com/llvm/llvm-project/commit/d61398d128190a7f67668216c9d43bff7e93e280
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/test/CodeGen/AMDGPU/amdgcn-av-non-atomic.cpp
M clang/test/CodeGen/AMDGPU/amdgcn-av-none-amdgpu-atomic.cpp
M clang/test/CodeGen/AMDGPU/amdgcn-av-none-attr.cpp
M clang/test/CodeGenCUDA/amdgpu-bf16.cu
M clang/test/CodeGenHIP/hipspv-kernel.cpp
M clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl
M clang/test/CodeGenOpenCL/opencl_types.cl
M clang/test/CodeGenOpenCL/spir_version.cl
M clang/test/OpenMP/amdgcn_save_temps.c
M clang/test/SemaHIP/atomic-init.hip
Log Message:
-----------
clang/AMDGPU: Use subarch triples in more cc1 tests (#225391)
Commit: 44509a1d80b314b725b56ad3174545b1f4ddde35
https://github.com/llvm/llvm-project/commit/44509a1d80b314b725b56ad3174545b1f4ddde35
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/atomics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/b42473-r1-crash.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/branch-after-join.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/control-flow-intrinsics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/hidden_diverge.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/hidden_loopdiverge.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/inline-asm.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/interp_f16.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/branch-outside.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-basic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers-nested.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/exit-divergence.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/hidden-post-dom.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-1.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/reducible-headers.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/join-at-loop-exit.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/kernel-args.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/llvm.amdgcn.buffer.atomic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/llvm.amdgcn.image.atomic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/no-return-blocks.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/nodivergencesource.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi-undef.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi_div_branch.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi_div_loop.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/propagate-loop-live-out.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/temporal_diverge.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/trivial-join-at-loop-exit.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/uniform_intrinsic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/unreachable-loop-block.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/unstructured-branch.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/workitem-intrinsics.ll
Log Message:
-----------
AMDGPU: Use subarch triples in uniformity analysis tests (#225386)
Commit: c76fd470ddd78d79d4e09ca6628c51bfff9475f5
https://github.com/llvm/llvm-project/commit/c76fd470ddd78d79d4e09ca6628c51bfff9475f5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
Log Message:
-----------
[VectorCombine] foldShuffleOfIntrinsics - don't use I variable name for Index iteration. NFC. (#225394)
Shadows the Instruction &I argument.
Noticed in #182768
Commit: cbab69595ca6f5a1c7296985e5555b8b45a35e55
https://github.com/llvm/llvm-project/commit/cbab69595ca6f5a1c7296985e5555b8b45a35e55
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/CMakeLists.txt
A llvm/test/Feature/codegen-plugin-legacy.ll
R llvm/test/Other/codegen-plugin-loading.ll
M llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
M llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
Log Message:
-----------
[llvm][test] Small fixes around CGTestPlugin (NFC) (#225362)
We use `LLVM_ENABLE_PLUGINS` as condition to run the unit-tests in
CGPluginTest, but we used to built the required plugin under `NOT WIN32
AND NOT CYGWIN`. These only happened to be equivalent. This patch guards
the entire folder under `LLVM_ENABLE_PLUGINS`. It also moves the related
LIT test to Feature/codegen-plugin-legacy.ll and adds REQUIRES plugin.
Commit: d74c1b77c61492ef6c5dc95bcd2b23685509379b
https://github.com/llvm/llvm-project/commit/d74c1b77c61492ef6c5dc95bcd2b23685509379b
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-scc-clobber.mir
Log Message:
-----------
[AMDGPU] Unify liveness guard to prevent SCC clobber in frame index lowering in scaling path (#223789)
eliminateFrameIndex has two lowering strategies, but only one has the
proper handling for checking SCC-liveness to prevent clobbering. Unify
them with a helper function to ensure both paths handle the same
Commit: 52ccbddfd304d16f87a2749b4546b1727b1aadc3
https://github.com/llvm/llvm-project/commit/52ccbddfd304d16f87a2749b4546b1727b1aadc3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/test/regression/init.test
M orc-rt/tools/ogre/ogre.cpp
Log Message:
-----------
[orc-rt] Connect ogre to a controller via a ConnectionSpec (#225400)
ogre now takes a connection spec as its one positional argument, builds
a Session with the bootstrap services registered, registers the
"socket:adopt" connector, connects, and runs until the controller
disconnects. Arguments after "--" are reserved for the program to run
and are not consumed yet.
init.test becomes "ogre --help", since ogre now needs a spec to do
anything and has nothing to connect to under lit yet.
Commit: 70125c825468688465a4319273efd3c2a0373b91
https://github.com/llvm/llvm-project/commit/70125c825468688465a4319273efd3c2a0373b91
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-minbw.ll
Log Message:
-----------
[SLP]Fix crash costing minbw-resized splat gather subtree roots
Splat gather subtree roots have no parent entry, but the min-bitwidth
resize-cost block assumed every non-root node has one and dereferenced
a null user. Charge the resize-back cast to the node's original scalar
type instead, matching the cast emitted when the reusing gather nodes
consume the resized vector.
Fixes https://github.com/llvm/llvm-project/pull/218250#issuecomment-5776455495
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225410
Commit: 1baa43495862650e0d03780d565b8e09d57b3495
https://github.com/llvm/llvm-project/commit/1baa43495862650e0d03780d565b8e09d57b3495
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGen/class.cpp
Log Message:
-----------
[CIR] Correct how memberPath compares 'current class' (#225237)
I didn't realize in the past that `isSameEntity` didn't actually check
to make sure we were working on canonical/most recent decl, so this
patch adds those to each side of the check. If we don't, we end up
finding them not equal, and crashing later when trying to pick up the
correct index.
Commit: abecf784ec30bce9d9163bd2e0d14c4a70094045
https://github.com/llvm/llvm-project/commit/abecf784ec30bce9d9163bd2e0d14c4a70094045
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCodeGenPassBuilder.cpp
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
Log Message:
-----------
[SPIR-V][NewPM] Do not require RegBankSelect in instruction selection (#225023)
SPIR-V skips RegBankSelect and keeps virtual registers, so the property
is never set
Match the legacy pipeline
Commit: ab3ed1cc24c4e23b9a62e85759265e907fb5823b
https://github.com/llvm/llvm-project/commit/ab3ed1cc24c4e23b9a62e85759265e907fb5823b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M .ci/green-dragon/lldb-ubuntu.groovy
M .github/workflows/build-libc-container.yml
M .github/workflows/containers/libc/Dockerfile
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
M clang-tools-extra/clang-tidy/misc/MultipleInheritanceCheck.cpp
M clang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/misc/multiple-inheritance.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/simplify-boolean-expr-demorgan.cpp
M clang/CMakeLists.txt
M clang/docs/OpenMPSupport.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclContextInternals.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileEntry.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/include/clang/CodeGenUtils/CallUtils.h
A clang/include/clang/CodeGenUtils/ClassUtils.h
A clang/include/clang/CodeGenUtils/ExprUtils.h
A clang/include/clang/CodeGenUtils/FunctionUtils.h
A clang/include/clang/CodeGenUtils/ItaniumCXXABIUtils.h
M clang/include/clang/Config/config.h.cmake
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
A clang/lib/CIR/CodeGen/CIRGenMicrosoftCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRTransformUtils.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerMicrosoftCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.h
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGBuilder.h
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGCleanup.h
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/EHScopeStack.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
A clang/lib/CodeGenUtils/CallUtils.cpp
A clang/lib/CodeGenUtils/ClassUtils.cpp
A clang/lib/CodeGenUtils/ExprUtils.cpp
A clang/lib/CodeGenUtils/FunctionUtils.cpp
A clang/lib/CodeGenUtils/ItaniumCXXABIUtils.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Index/FileIndexRecord.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Options/OptionUtils.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/module-default-ctor.cpp
M clang/test/AST/ByteCode/module-redecl1.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
A clang/test/CIR/CodeGen/attr-musttail-ehspec-errors.cpp
M clang/test/CIR/CodeGen/bitfields.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-vaarg-non-pod-nyi.cpp
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/CodeGen/class.cpp
M clang/test/CIR/CodeGen/complex.cpp
A clang/test/CIR/CodeGen/cxx-msvc-abi.cpp
M clang/test/CIR/CodeGen/ehspec-noexcept.cpp
A clang/test/CIR/CodeGen/lowering-lang-options.cpp
A clang/test/CIR/CodeGen/noinline-available-externally-skip.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/side-effect.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/var-arg-aggregate.c
A clang/test/CIR/CodeGen/var-arg-direct-offset.cpp
A clang/test/CIR/CodeGen/var-arg-empty.c
A clang/test/CIR/CodeGen/var-arg-int128.c
A clang/test/CIR/CodeGen/var-arg-long-double.c
A clang/test/CIR/CodeGen/var-arg-vector.c
M clang/test/CIR/CodeGen/var_arg.c
A clang/test/CIR/CodeGenBuiltins/builtin-stdc-bit-c2y.c
A clang/test/CIR/CodeGenCUDA/lowering-lang-options.cu
M clang/test/CIR/CodeGenCXX/uncopyable-args.cpp
M clang/test/CIR/IR/call.cir
M clang/test/CIR/IR/enum-attrs.cir
A clang/test/CIR/IR/invalid-effect-attrs.cir
A clang/test/CIR/IR/lowering-lang-options.cir
A clang/test/CIR/Lowering/memory-effects.cir
M clang/test/CIR/Lowering/ternary.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-vaarg-valist-shape-nyi.cir
M clang/test/CIR/Transforms/flatten-preserve-attrs.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/test/CodeGen/AArch64/abi-classify-arg-types.c
M clang/test/CodeGen/AArch64/abi-classify-arg-types.cpp
M clang/test/CodeGen/AArch64/abi-classify-return-types.c
M clang/test/CodeGen/AArch64/abi-classify-return-types.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
R clang/test/CodeGen/AArch64/neon-ldst-one.c
M clang/test/CodeGen/AArch64/neon/load.c
M clang/test/CodeGen/AArch64/poly64.c
M clang/test/CodeGen/AMDGPU/amdgcn-av-non-atomic.cpp
M clang/test/CodeGen/AMDGPU/amdgcn-av-none-amdgpu-atomic.cpp
M clang/test/CodeGen/AMDGPU/amdgcn-av-none-attr.cpp
M clang/test/CodeGen/Sparc/sparc-vaarg.c
M clang/test/CodeGen/Sparc/sparcv8-abi.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
M clang/test/CodeGen/catch-pointer-overflow-volatile.c
M clang/test/CodeGen/catch-pointer-overflow.c
M clang/test/CodeGen/compound-literal-lifetime.c
M clang/test/CodeGen/ubsan-pointer-overflow-constant-fold.c
M clang/test/CodeGen/ubsan-pointer-overflow.c
M clang/test/CodeGenCUDA/amdgpu-bf16.cu
M clang/test/CodeGenCXX/cfi-stats.cpp
M clang/test/CodeGenCXX/strict-vtable-pointers.cpp
M clang/test/CodeGenHIP/hipspv-kernel.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedMax.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedMax.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedMax.hlsl
M clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl
M clang/test/CodeGenOpenCL/opencl_types.cl
M clang/test/CodeGenOpenCL/spir_version.cl
M clang/test/Driver/fsanitize.c
M clang/test/Driver/print-supported-extensions-riscv.c
A clang/test/Driver/ps4-ps5-resource-path.cpp
M clang/test/Driver/systemz-features.cpp
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/test/OffloadTools/clang-sycl-linker/options.ll
M clang/test/OffloadTools/clang-sycl-linker/split-mode.ll
M clang/test/OpenMP/amdgcn_save_temps.c
M clang/test/OpenMP/bug60602.cpp
A clang/test/OpenMP/collapse_ordered_instantiation_dependent.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_reduction_codegen.cpp
A clang/test/OpenMP/for_collapse_stmt_expr_codegen.cpp
M clang/test/OpenMP/for_loop_messages.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
A clang/test/OpenMP/nvptx_target_teams_ompx_bare_kernel_environment_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
A clang/test/OpenMP/structured-bindings-ast.cpp
A clang/test/OpenMP/structured-bindings-codegen.cpp
A clang/test/OpenMP/structured-bindings-messages.cpp
A clang/test/OpenMP/structured-bindings-nontemporal.cpp
A clang/test/OpenMP/structured-bindings-target-map-different-types.cpp
A clang/test/OpenMP/structured-bindings-template-instantiation.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
A clang/test/OpenMP/target_teams_host_kernel_environment_codegen.cpp
M clang/test/OpenMP/target_teams_map_codegen.cpp
M clang/test/OpenMP/target_teams_num_teams_codegen.cpp
M clang/test/OpenMP/target_teams_thread_limit_codegen.cpp
M clang/test/OpenMP/teams_codegen.cpp
M clang/test/OpenMP/teams_distribute_codegen.cpp
M clang/test/OpenMP/teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_loop_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
A clang/test/Parser/ms-lambda-capture.clcpp
A clang/test/Parser/ms-lambda-capture.cpp
A clang/test/Parser/ms-lambda-capture.hip
A clang/test/ParserHLSL/ms-lambda-capture.hlsl
M clang/test/Sema/constant-builtins-2.c
M clang/test/Sema/zvector.c
A clang/test/SemaCXX/GH220525.cpp
M clang/test/SemaCXX/aggregate-default-member-initializers.cpp
M clang/test/SemaCXX/decomposition-openmp.cpp
M clang/test/SemaHIP/atomic-init.hip
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedMax-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedMax-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedMax-errors.hlsl
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M flang-rt/unittests/Runtime/Assign.cpp
M flang/docs/Extensions.md
M flang/docs/ModFiles.md
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Dialect/CUF/Attributes/CUFAttr.h
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/options.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Support/Utils.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
A flang/lib/Optimizer/Transforms/CUDA/CUFDuplicateDeviceFunc.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/parsing.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
A flang/test/Fir/CUDA/cuda-device-func-transform-copies.mlir
A flang/test/Fir/CUDA/cuda-duplicate-device-func.mlir
A flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate-nested-allocatable-mapper.f90
M flang/test/Parser/cuf-sanity-tree.CUF
A flang/test/Preprocessing/fixed-c-comment01.F
A flang/test/Preprocessing/fixed-c-comment02.F
A flang/test/Preprocessing/fixed-c-comment03.f
A flang/test/Preprocessing/fixed-c-comment04.f
A flang/test/Preprocessing/fixed-c-comment05.f
A flang/test/Preprocessing/free-c-comment01.f90
A flang/test/Semantics/CUDA/cuda-managed-implicit-modfile.cuf
A flang/test/Transforms/debug-omp-target-internal-proc.fir
M flang/tools/bbc/bbc.cpp
M flang/tools/f18-parse-demo/f18-parse-demo.cpp
M flang/unittests/Optimizer/InternalNamesTest.cpp
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct___pthread_cleanup_frame.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct___pthread_cleanup_frame.h
M libc/include/pthread.yaml
M libc/include/sys/stat.yaml
M libc/src/__support/CPP/CMakeLists.txt
R libc/src/__support/CPP/vector.h
M libc/src/__support/threads/CMakeLists.txt
A libc/src/__support/threads/cleanup_stack.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread_attributes.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/__pthread_cleanup_pop.cpp
A libc/src/pthread/__pthread_cleanup_pop.h
A libc/src/pthread/__pthread_cleanup_push.cpp
A libc/src/pthread/__pthread_cleanup_push.h
M libc/src/sys/stat/CMakeLists.txt
A libc/src/sys/stat/fstatat.h
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/fstatat.cpp
A libc/src/sys/stat/linux/mkfifoat.cpp
A libc/src/sys/stat/mkfifoat.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_cleanup_test.cpp
M libc/test/src/__support/CPP/CMakeLists.txt
R libc/test/src/__support/CPP/vector_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/fstatat_test.cpp
A libc/test/src/sys/stat/mkfifoat_test.cpp
M libc/utils/docgen/pthread.yaml
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__iterator/capacity_aware_iterator.h
M libcxx/include/__optional/optional.h
M libcxx/include/__optional/optional_ref.h
M libcxx/include/__type_traits/is_within_lifetime.h
M libcxx/include/__vector/vector.h
M libcxx/include/version
M libcxx/test/libcxx/iterators/capacity_aware_iter/arithmetic.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/assert.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/comparison.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/contiguous.verify.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/dereference.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/types.compile.pass.cpp
M libcxx/test/libcxx/utilities/meta/is_within_lifetime.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/type_traits.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/utilities/meta/meta.const.eval/is_within_lifetime.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
M libsycl/test/usm/memset.cpp
M libsycl/unittests/event/async_handler.cpp
M libsycl/unittests/handler/test_helpers.hpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/usm/alloc.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/Options.td
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/docs/ld.lld.1
A lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
A lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
A lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
M lld/test/ELF/aarch64-tlsdesc-pauth.s
M lld/test/ELF/common-archive-lookup.s
M lld/test/ELF/warn-backrefs.s
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/resources/build.md
M lldb/include/lldb/Expression/LLVMUserExpression.h
M lldb/include/lldb/Host/Config.h.cmake
R lldb/include/lldb/Host/LZMA.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedThreadPlanInterface.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/common/LZMA.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedCommandPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFrameProviderPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStringSummaryPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedSyntheticChildrenPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedSyntheticChildrenPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPythonInterface.cpp
M lldb/source/Target/ScriptedThreadPlan.cpp
M lldb/test/API/commands/expression/memory-allocation/TestMemoryAllocSettings.py
M lldb/test/API/commands/target/stop-hooks/TestStopHookScripted.py
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
M lldb/test/API/tools/lldb-dap/progress/Progress_emitter.py
M lldb/test/API/tools/lldb-dap/progress/TestDAP_Progress.py
M lldb/test/CMakeLists.txt
M lldb/test/Shell/lit.cfg.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/ProgressEvent.cpp
M lldb/tools/lldb-dap/ProgressEvent.h
M lldb/tools/lldb-dap/Protocol/DAPTypes.h
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.h
M lldb/tools/lldb-dap/Variables.cpp
M lldb/tools/lldb-dap/Variables.h
M lldb/unittests/DAP/CMakeLists.txt
M lldb/unittests/DAP/DAPTypesTest.cpp
A lldb/unittests/DAP/ProgressEventTest.cpp
M lldb/unittests/DAP/ProtocolEventsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
M llvm/CMakeLists.txt
A llvm/cmake/WiXPerMachinePatch.xml
M llvm/cmake/config-ix.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/docs/CMake.md
M llvm/docs/CommandGuide/lit.md
M llvm/docs/DirectX/SemanticSignatures.md
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/TrieRawHashMap.h
M llvm/include/llvm/Analysis/BasicAliasAnalysis.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/MIRFSDiscriminator.h
M llvm/include/llvm/CodeGen/MIRSampleProfile.h
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/DebugInfo/CodeView/DebugFrameDataSubsection.h
M llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h
M llvm/include/llvm/DebugInfo/PDB/Native/InfoStreamBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/CompileUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/Layer.h
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ConnectionSpec.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/CallSPSCI.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/MemoryAccessSPSCI.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/NativeDylibManagerSPSCI.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SimpleNativeMemoryMapSPSCI.h
M llvm/include/llvm/ExecutionEngine/RuntimeDyldChecker.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LTO/Config.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Object/GOFF.h
M llvm/include/llvm/ProfileData/GCOV.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Value.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/Compression.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/RISCVISAUtils.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/lib/ABI/Types.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/lib/DebugInfo/GSYM/ObjectFileTransformer.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/UnwindInfoManager.cpp
M llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/SandboxIR/Value.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Compression.cpp
M llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMachObjectWriter.cpp
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
A llvm/lib/Target/RISCV/RISCVInstrInfoXqccmi.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVCodeGenPassBuilder.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SanitizerStats.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Analysis/BasicAA/gep-minabs-different-scale.ll
M llvm/test/Analysis/CostModel/AArch64/masked_compress_load.ll
M llvm/test/Analysis/CostModel/X86/load_store.ll
A llvm/test/Analysis/CostModel/X86/nonpow2-load-fold.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
A llvm/test/Analysis/CostModel/X86/shuffle-mask-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
M llvm/test/Analysis/ScalarEvolution/exit-value-nowrap-flags.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-correlated-end.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-operand-order.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-rewrite-expressions.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/nsw.ll
M llvm/test/Analysis/ScalarEvolution/ranges.ll
M llvm/test/Analysis/ScalarEvolution/trip-count13.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/atomics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/b42473-r1-crash.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/branch-after-join.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/control-flow-intrinsics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/hidden_diverge.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/hidden_loopdiverge.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/inline-asm.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/interp_f16.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/branch-outside.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-basic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers-nested.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/exit-divergence.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/hidden-post-dom.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-1.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/reducible-headers.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/join-at-loop-exit.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/kernel-args.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/llvm.amdgcn.buffer.atomic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/llvm.amdgcn.image.atomic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/no-return-blocks.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/nodivergencesource.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi-undef.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi_div_branch.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi_div_loop.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/propagate-loop-live-out.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/temporal_diverge.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/trivial-join-at-loop-exit.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/uniform_intrinsic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/unreachable-loop-block.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/unstructured-branch.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/workitem-intrinsics.ll
M llvm/test/CMakeLists.txt
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector-compress.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769-debug.ll
M llvm/test/CodeGen/AArch64/blr-bti-preserves-operands.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/kcfi-bti.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/sme-streaming-mode-landingpads.ll
A llvm/test/CodeGen/AArch64/vector-interleave-consecutive-splats.ll
R llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
A llvm/test/CodeGen/AMDGPU/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
M llvm/test/CodeGen/AMDGPU/coexec-block-carried-latency.mir
M llvm/test/CodeGen/AMDGPU/coexec-sched-ds-fifo.mir
M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds-super-align.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-noalias.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-precise-allocate-to-module-struct.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-single-var-unambiguous.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
A llvm/test/CodeGen/AMDGPU/mad-mix-bf16-t16-inline-imm.mir
M llvm/test/CodeGen/AMDGPU/mad-mix-fptrunc-rounding.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/ARM/cmse-harden-call-returned-values.ll
M llvm/test/CodeGen/ARM/cmse-vlldm-no-reorder.mir
M llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/load-rawbuffer-wide-double.ll
M llvm/test/CodeGen/DirectX/TextureLoad.ll
M llvm/test/CodeGen/Hexagon/copy-to-combine-const64.mir
M llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/volatile-local.ll
A llvm/test/CodeGen/RISCV/GlobalISel/clmulr-rv32.ll
A llvm/test/CodeGen/RISCV/GlobalISel/clmulr-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/target-abi-valid.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
A llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-long-vector.ll
M llvm/test/CodeGen/Thumb2/mve-vctp.ll
A llvm/test/CodeGen/Thumb2/thumb2-reduce-size-cpsr.mir
A llvm/test/CodeGen/X86/lzcnt-cmp-null-deref.mir
A llvm/test/CodeGen/X86/pr222714.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/x86-64-intrcc.ll
A llvm/test/DebugInfo/X86/unknown-source-language.ll
A llvm/test/Feature/codegen-plugin-legacy.ll
A llvm/test/Instrumentation/TypeSanitizer/instrumented-args-exts.ll
M llvm/test/LTO/ARM/runtime-library-subtarget.ll
A llvm/test/LTO/RISCV/merged-module-datalayout.ll
M llvm/test/LTO/X86/cfi_endproc.ll
M llvm/test/LTO/X86/linkonce_odr_func.ll
M llvm/test/MC/AArch64/directives-case_insensitive.s
A llvm/test/MC/AArch64/retired-feature-names.s
A llvm/test/MC/AArch64/retired-register-names.s
A llvm/test/MC/AArch64/tls-auth-relocs.s
A llvm/test/MC/AMDGPU/gfx11_asm_opsel.s
A llvm/test/MC/AMDGPU/gfx11_asm_t16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_features.s
M llvm/test/MC/AMDGPU/gfx1250_asm_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_err.s
M llvm/test/MC/AMDGPU/gfx13_asm_vopd_errs.s
M llvm/test/MC/COFF/ir-to-imgrel.ll
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_err.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_t16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-real16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2_dpp8.txt
A llvm/test/MC/Disassembler/RISCV/xcvbitmanip-invalid.txt
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/priv-invalid.s
M llvm/test/MC/RISCV/riscv-relocs-macho-data.s
M llvm/test/MC/RISCV/riscv-relocs-macho.s
M llvm/test/MC/RISCV/rv32d-invalid.s
M llvm/test/MC/RISCV/rv32zclsd-invalid.s
M llvm/test/MC/RISCV/rv32zdinx-invalid.s
M llvm/test/MC/RISCV/rv32zfh-invalid.s
M llvm/test/MC/RISCV/rv32zfinx-invalid.s
M llvm/test/MC/RISCV/rv32zhinx-invalid.s
M llvm/test/MC/RISCV/rv32zhinxmin-invalid.s
M llvm/test/MC/RISCV/rv64d-invalid.s
M llvm/test/MC/RISCV/rv64f-invalid.s
M llvm/test/MC/RISCV/rv64xtheadmemidx-invalid.s
M llvm/test/MC/RISCV/rv64zdinx-invalid.s
M llvm/test/MC/RISCV/rv64zfh-invalid.s
M llvm/test/MC/RISCV/rv64zfinx-invalid.s
M llvm/test/MC/RISCV/rv64zhinx-invalid.s
M llvm/test/MC/RISCV/rv64zhinxmin-invalid.s
M llvm/test/MC/RISCV/tlsdesc.s
A llvm/test/MC/RISCV/xqccmi-invalid.s
A llvm/test/MC/RISCV/xqccmi-valid.s
M llvm/test/MC/RISCV/xqcia-invalid.s
M llvm/test/MC/RISCV/xqciac-invalid.s
M llvm/test/MC/RISCV/xqciio-invalid.s
M llvm/test/MC/RISCV/xqcili-invalid.s
M llvm/test/MC/RISCV/xqcilo-invalid.s
M llvm/test/MC/RISCV/xqcilo-pseudos-invalid.s
M llvm/test/MC/RISCV/xqcilsm-invalid.s
R llvm/test/Other/codegen-plugin-loading.ll
A llvm/test/TableGen/AsmMatcherPrioritizeFeature.td
A llvm/test/TableGen/AsmMatcherPrioritizeFeatureErrors.td
M llvm/test/TableGen/get-named-operand-idx.td
A llvm/test/ThinLTO/X86/cfi-import-internal-coroutine.ll
A llvm/test/Transforms/AggressiveInstCombine/lower-table-based-lowbits-mask-n32.ll
A llvm/test/Transforms/AggressiveInstCombine/lower-table-based-lowbits-mask.ll
A llvm/test/Transforms/ConstraintElimination/pointer-tighten-ne.ll
M llvm/test/Transforms/GlobalMerge/alignment-2.ll
M llvm/test/Transforms/GlobalMerge/alignment.ll
M llvm/test/Transforms/GlobalMerge/basic.ll
M llvm/test/Transforms/GlobalMerge/guid.ll
M llvm/test/Transforms/GlobalMerge/macho-symbols.ll
M llvm/test/Transforms/GlobalMerge/private-global.ll
M llvm/test/Transforms/GlobalMerge/used.ll
M llvm/test/Transforms/IndVarSimplify/exit-value-nowrap-flags.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
M llvm/test/Transforms/InstCombine/atomic.ll
A llvm/test/Transforms/LoopLoadElim/mixed-width-clobber.ll
A llvm/test/Transforms/LoopVectorize/AArch64/compress-idioms.ll
A llvm/test/Transforms/LoopVectorize/AArch64/low-trip-count-body-size-limit.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count-ic-3.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
A llvm/test/Transforms/LoopVectorize/RISCV/compress-idioms.ll
A llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count-body-size-limit.ll
A llvm/test/Transforms/LoopVectorize/RISCV/small-trip-count-vf-plus-one.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/compress-idioms.ll
A llvm/test/Transforms/LoopVectorize/compress-idioms-negative-tests.ll
A llvm/test/Transforms/LoopVectorize/compress-idioms.ll
A llvm/test/Transforms/LoopVectorize/compress-store-vec-epilogue.ll
M llvm/test/Transforms/LoopVectorize/scev-check-unknown-prof.ll
A llvm/test/Transforms/LowerTypeTests/promoted-internal.ll
M llvm/test/Transforms/Mem2Reg/ignore-droppable.ll
M llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/extracts-folded-into-fmul-users-no-credit.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fma-candidates-after-store-chains.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/reduction-root-multi-use-fma.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-minbw.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/check-node-without-vector-user.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/folded-broadcast-cost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/reordered-gather.ll
A llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
A llvm/test/Transforms/SLPVectorizer/X86/fsub-fmul-rhs-combine.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
M llvm/test/Transforms/SLPVectorizer/X86/nonpow2-shared-weight-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassoc-flattened-copyable-operand.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduction-same-vals-i1.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-logical-or-and-i1-vector.ll
A llvm/test/Transforms/SLPVectorizer/X86/trimmed-subtree-schedule.ll
M llvm/test/Transforms/SROA/phi-and-select.ll
A llvm/test/Transforms/SROA/phi-store.ll
M llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/aux_arg.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-trivial-select.ll
M llvm/test/Transforms/SimpleLoopUnswitch/pr138509.ll
A llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-header-phi.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/cfi-icall-static-inline-asm.ll
A llvm/test/Transforms/ThinLTOBitcodeWriter/cfi_dso_local_equivalent.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/comdat.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal1.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal2.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc-internal.ll
M llvm/test/lit.site.cfg.py.in
A llvm/test/tools/llvm-dwarfdump/X86/apple-names-overflowing-entry-count.s
M llvm/test/tools/llvm-extract/recursive.ll
A llvm/test/tools/llvm-extract/verify-input.ll
A llvm/test/tools/llvm-gsymutil/X86/macho-symbol-stubs.yaml
M llvm/tools/llvm-extract/llvm-extract.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.h
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
M llvm/unittests/ABI/CMakeLists.txt
M llvm/unittests/ABI/FunctionInfoTest.cpp
A llvm/unittests/ABI/TargetInfoTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
M llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
M llvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ConnectionSpecTest.cpp
M llvm/unittests/ExecutionEngine/Orc/EPCGenericDylibManagerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
M llvm/unittests/Frontend/HLSLSemanticSignaturePackingTest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Support/CompressionTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/AsmWriterEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
M llvm/utils/lit/lit/Test.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/builtin_commands/cat.py
M llvm/utils/lit/lit/builtin_commands/diff.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/lit/lit/main.py
R llvm/utils/lit/tests/Inputs/rerun-failed-serially-retries/lit.cfg
R llvm/utils/lit/tests/Inputs/rerun-failed-serially-retries/needs-four-attempts.py
R llvm/utils/lit/tests/Inputs/rerun-failed-serially/always-fails.py
R llvm/utils/lit/tests/Inputs/rerun-failed-serially/fails-once.py
R llvm/utils/lit/tests/Inputs/rerun-failed-serially/lit.cfg
R llvm/utils/lit/tests/rerun-failed-serially.py
M llvm/utils/profcheck-xfail.txt
M llvm/utils/release/build_llvm_release.bat
M mlir/include/mlir/ABI/ABIRewriteContext.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCDeclareCtorDtorConversion.cpp
M mlir/lib/Dialect/SPIRV/IR/CastOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-thread-private-storage-remark.mlir
A mlir/test/Dialect/OpenACC/acc-declare-ctor-dtor-extra.mlir
M mlir/test/Dialect/SPIRV/IR/cast-ops.mlir
M mlir/test/Dialect/XeGPU/peephole-optimize.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_3d_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_3d_mxfp_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/SPIRV/cast-ops.mlir
M offload/CMakeLists.txt
M offload/ci/hip-tpl.py
M offload/languages/kernel/src/LanguageRuntime.cpp
M offload/liboffload/API/Memory.td
M offload/liboffload/CMakeLists.txt
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/CMakeLists.txt
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Memory.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
A offload/test/ompt/host_op_id_emi.c
M offload/unittests/Conformance/include/mathtest/DeviceContext.hpp
M offload/unittests/Conformance/include/mathtest/DeviceResources.hpp
M offload/unittests/Conformance/lib/DeviceContext.cpp
M offload/unittests/Conformance/lib/DeviceResources.cpp
M offload/unittests/OffloadAPI/event/olGetEventElapsedTime.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfo.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfoSize.cpp
M offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
M offload/unittests/OffloadAPI/memory/olMemAllocAligned.cpp
M offload/unittests/OffloadAPI/memory/olMemFill.cpp
M offload/unittests/OffloadAPI/memory/olMemFree.cpp
M offload/unittests/OffloadAPI/memory/olMemPrefetch.cpp
M offload/unittests/OffloadAPI/memory/olMemcpy.cpp
M offload/unittests/OffloadAPI/queue/olLaunchHostFunction.cpp
M offload/unittests/OffloadAPI/queue/olWaitEvents.cpp
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/dllexports
M openmp/runtime/src/i18n/en_US.txt
A openmp/runtime/src/kmp_device_env.cpp
A openmp/runtime/src/kmp_device_env.h
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
A openmp/runtime/test/env/omp_default_device_all_rejected.c
A openmp/runtime/test/env/omp_denylist_extra_coverage.c
A openmp/runtime/test/env/omp_num_threads_all_demo.c
A openmp/runtime/test/env/omp_num_threads_all_host.c
A openmp/runtime/test/env/omp_num_threads_all_set_defaults.c
A openmp/runtime/test/env/omp_num_threads_dev_all_fallback.c
A openmp/runtime/test/env/omp_num_threads_dev_invalid.c
A openmp/runtime/test/env/omp_num_threads_dev_overflow.c
A openmp/runtime/test/env/omp_num_threads_dev_resolve.c
A openmp/runtime/test/env/omp_num_threads_host_overrides_all.c
A openmp/runtime/test/env/omp_num_threads_host_vs_device.c
A openmp/runtime/test/env/omp_num_threads_warnings_off.c
A orc-rt/include/orc-rt/bedrock/ConnectionSpec.h
A orc-rt/include/orc-rt/bedrock/ConnectorRegistry.h
A orc-rt/include/orc-rt/bedrock/SocketConnector.h
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCA.h
A orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
M orc-rt/lib/bedrock/CMakeLists.txt
A orc-rt/lib/bedrock/ConnectionSpec.cpp
A orc-rt/lib/bedrock/ConnectorRegistry.cpp
M orc-rt/lib/bedrock/sps/SimpleRemoteCA.cpp
A orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
A orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
M orc-rt/lib/bedrock/sys/windows/CPUFeatures.cpp
M orc-rt/lib/bedrock/sys/windows/TargetTriple.cpp
R orc-rt/test/regression/darwin/check-rt-process-info.test
M orc-rt/test/regression/init.test
M orc-rt/test/regression/lit.cfg.py
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/ConnectionSpecTest.cpp
M orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
A orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/bedrock/sys/CPUFeaturesTest.cpp
M orc-rt/test/unit/bedrock/sys/TargetTripleTest.cpp
M orc-rt/tools/ogre/ogre.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/include/clang/Config/config.h
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/BUILD.bazel
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
Rebase
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/42ea27ba09c0...ab3ed1cc24c4
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list