[all-commits] [llvm/llvm-project] 4874e0: [𝘀𝗽𝗿] initial version

[Alexey Bataev via All-commits]

  Branch: refs/heads/users/alexey-bataev/spr/slpnfcaddupdate-tests-for-fma-based-transfromations-nfc
  Home:   https://github.com/llvm/llvm-project
  Commit: 4874e0cc4a02b9c687940992cfa55546825d10d4
      https://github.com/llvm/llvm-project/commit/4874e0cc4a02b9c687940992cfa55546825d10d4
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/extracts-folded-into-fmul-users-no-credit.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/fma-candidates-after-store-chains.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/reduction-root-multi-use-fma.ll
    A llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
    A llvm/test/Transforms/SLPVectorizer/X86/fsub-fmul-rhs-combine.ll
    M llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reassoc-flattened-copyable-operand.ll
    M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
    M llvm/test/Transforms/SLPVectorizer/X86/select-logical-or-and-i1-vector.ll

  Log Message:
  -----------
  [𝘀𝗽𝗿] initial version

Created using spr 1.3.7



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