[all-commits] [llvm/llvm-project] df719f: [PISA] Add PISA GlobalISel lowering, legalization ...

Michal Paszkowski via All-commits all-commits at lists.llvm.org
Tue Sep 22 00:30:31 PDT 2026


  Branch: refs/heads/users/michalpaszkowski/pisa_backend_upstreaming_4
  Home:   https://github.com/llvm/llvm-project
  Commit: df719f2fa35d9f875343b1bbff3a44baba3b09d9
      https://github.com/llvm/llvm-project/commit/df719f2fa35d9f875343b1bbff3a44baba3b09d9
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-21 (Mon, 21 Sep 2026)

  Changed paths:
    M llvm/include/llvm/AsmParser/LLToken.h
    M llvm/include/llvm/CodeGen/TargetFrameLowering.h
    M llvm/include/llvm/TargetParser/CMakeLists.txt
    A llvm/include/llvm/TargetParser/PISATargetParser.def
    A llvm/include/llvm/TargetParser/PISATargetParser.h
    M llvm/lib/AsmParser/LLLexer.cpp
    M llvm/lib/AsmParser/LLParser.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/Target/PISA/CMakeLists.txt
    M llvm/lib/Target/PISA/PISA.h
    A llvm/lib/Target/PISA/PISACallLowering.cpp
    A llvm/lib/Target/PISA/PISACallLowering.h
    M llvm/lib/Target/PISA/PISAFrameLowering.h
    A llvm/lib/Target/PISA/PISAISelLowering.cpp
    A llvm/lib/Target/PISA/PISAISelLowering.h
    A llvm/lib/Target/PISA/PISALegalizerInfo.cpp
    A llvm/lib/Target/PISA/PISALegalizerInfo.h
    A llvm/lib/Target/PISA/PISAMachineFunctionInfo.cpp
    A llvm/lib/Target/PISA/PISAMachineFunctionInfo.h
    A llvm/lib/Target/PISA/PISAPostLegalizerCombiner.cpp
    A llvm/lib/Target/PISA/PISAPreLegalizerCombiner.cpp
    A llvm/lib/Target/PISA/PISARegisterBankInfo.cpp
    A llvm/lib/Target/PISA/PISARegisterBankInfo.h
    M llvm/lib/Target/PISA/PISASubtarget.cpp
    M llvm/lib/Target/PISA/PISASubtarget.h
    M llvm/lib/Target/PISA/PISATargetMachine.cpp
    M llvm/lib/Target/PISA/PISATargetMachine.h
    A llvm/lib/Target/PISA/PISATargetObjectFile.h
    M llvm/lib/TargetParser/CMakeLists.txt
    A llvm/lib/TargetParser/PISATargetParser.cpp
    A llvm/test/CodeGen/PISA/GlobalISel/build-vector-with-constants-trunc-double.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-abs-iredsmax.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-cmp-and-all-ones.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-extract-build-vector.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-fadd-constant.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-getdef-ignoring-bitcasts-novectors.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-local-id-range-trunc-zext.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-p2i-to-i2p-addrspace.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-select-trunc-one-zero.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-trunc-bool-trunc.mir
    A llvm/test/CodeGen/PISA/GlobalISel/combine-truncated-shift.mir
    A llvm/test/CodeGen/PISA/GlobalISel/fix-illegal-shift-amt.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalize-load-store-subbyte-scalar.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalize-threeway-cmp.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-16-32-vec.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-concat-vectors-clamp-elts.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-constant.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-subvector.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-vector-elt-illegal-size.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-fldexp.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-freeze-i96.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-frem.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-i2f.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-icmp.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-implicit-def.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-insert-subvector.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-non-power-of-2-overfetch.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-i1-vec.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-non-standard-vec.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-vec-of-large-ints.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh-i64.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-s5.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-s96.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-scalarize.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-widen.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-select-widen.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-store-long-alignment.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-udiv128-sequence.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-unmerge-vectors.mir
    A llvm/test/CodeGen/PISA/GlobalISel/legalizer-zext-big.mir
    A llvm/test/CodeGen/PISA/GlobalISel/mir-print-bfloat.mir
    A llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-compare-select.mir
    A llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-extract-subvector-partial.mir
    A llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-no-commute-shift-loop.mir
    A llvm/test/CodeGen/PISA/GlobalISel/postrapseudo-i1.mir
    A llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-reduce-predicates.mir
    A llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-zext-and.mir
    A llvm/test/CodeGen/PISA/GlobalISel/retain-extractvec.mir

  Log Message:
  -----------
  [PISA] Add PISA GlobalISel lowering, legalization and combiners

Add the PISA GlobalISel lowering path: call lowering, the legalizer rules,
register-bank information and the pre/post-legalization combiners, together
with the machine-function info, frame lowering, and the target-machine
pipeline through register-bank selection.

Adds GlobalISel LIT tests for legalization and the combiners. Instruction
selection is added in the following change.


  Commit: 472ca27ec11a474faa97fe9fe4f1b3a5402f18f9
      https://github.com/llvm/llvm-project/commit/472ca27ec11a474faa97fe9fe4f1b3a5402f18f9
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-21 (Mon, 21 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

  Log Message:
  -----------
  Fix buildbot issues


  Commit: e40e9c5a808b485886ec992487d4142b9e654dd3
      https://github.com/llvm/llvm-project/commit/e40e9c5a808b485886ec992487d4142b9e654dd3
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/include/llvm/TargetParser/PISATargetParser.h
    M llvm/lib/Target/PISA/PISACallLowering.cpp
    M llvm/lib/Target/PISA/PISAISelLowering.cpp
    M llvm/lib/Target/PISA/PISALegalizerInfo.cpp
    M llvm/lib/Target/PISA/PISAMachineFunctionInfo.h
    M llvm/lib/Target/PISA/PISAPostLegalizerCombiner.cpp
    M llvm/lib/Target/PISA/PISAPreLegalizerCombiner.cpp
    M llvm/lib/Target/PISA/PISARegisterBankInfo.cpp
    M llvm/lib/Target/PISA/PISASubtarget.cpp
    M llvm/lib/Target/PISA/PISATargetMachine.cpp
    M llvm/lib/Target/PISA/PISATargetMachine.h
    M llvm/lib/TargetParser/PISATargetParser.cpp

  Log Message:
  -----------
  Do not use auto


  Commit: 13503187fbb814f5ff147cf348e7a28b8f2d328f
      https://github.com/llvm/llvm-project/commit/13503187fbb814f5ff147cf348e7a28b8f2d328f
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/PISA/PISACallLowering.cpp

  Log Message:
  -----------
  Change lowerReturn to use getSubtarget<PISASubtarget>()


  Commit: 32bc8be0dc93cacef438dfbdfb61213c3c9e8289
      https://github.com/llvm/llvm-project/commit/32bc8be0dc93cacef438dfbdfb61213c3c9e8289
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/test/CodeGen/PISA/GlobalISel/build-vector-with-constants-trunc-double.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-abs-iredsmax.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-cmp-and-all-ones.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-extract-build-vector.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-fadd-constant.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-getdef-ignoring-bitcasts-novectors.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-local-id-range-trunc-zext.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-p2i-to-i2p-addrspace.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-select-trunc-one-zero.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-trunc-bool-trunc.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-truncated-shift.mir
    M llvm/test/CodeGen/PISA/GlobalISel/fix-illegal-shift-amt.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalize-load-store-subbyte-scalar.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-16-32-vec.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-concat-vectors-clamp-elts.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-constant.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-subvector.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-vector-elt-illegal-size.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-fldexp.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-freeze-i96.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-frem.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-i2f.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-icmp.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-implicit-def.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-insert-subvector.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-non-power-of-2-overfetch.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-i1-vec.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-non-standard-vec.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-load-store-vec-of-large-ints.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh-i64.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-s5.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-s96.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-scalarize.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-phi-widen.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-select-widen.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-store-long-alignment.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-udiv128-sequence.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-unmerge-vectors.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-zext-big.mir
    M llvm/test/CodeGen/PISA/GlobalISel/mir-print-bfloat.mir
    M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-compare-select.mir
    M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-extract-subvector-partial.mir
    M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-no-commute-shift-loop.mir
    M llvm/test/CodeGen/PISA/GlobalISel/postrapseudo-i1.mir
    M llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-reduce-predicates.mir
    M llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-zext-and.mir
    M llvm/test/CodeGen/PISA/GlobalISel/retain-extractvec.mir

  Log Message:
  -----------
  Use -mtriple=pisa and remove -verify-machineinstrs in legalizer-unmerge-vectors.mir


  Commit: 32e9faedb15b748832d51ce862cea1805675edc0
      https://github.com/llvm/llvm-project/commit/32e9faedb15b748832d51ce862cea1805675edc0
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/PISA/PISARegisterBankInfo.cpp

  Log Message:
  -----------
  Obtain PISARegisterInfo through PISASubtarget


  Commit: 4e7636f8a4d3acdd6afde5db447d87e866da0837
      https://github.com/llvm/llvm-project/commit/4e7636f8a4d3acdd6afde5db447d87e866da0837
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/PISA/MCTargetDesc/PISARegEncoder.cpp
    M llvm/lib/Target/PISA/PISAISelLowering.cpp
    M llvm/lib/Target/PISA/PISALegalizerInfo.cpp
    M llvm/lib/Target/PISA/PISARegisterInfo.cpp
    M llvm/lib/Target/PISA/PISATargetMachine.cpp

  Log Message:
  -----------
  Use {} instead of std::make_pair


  Commit: d2df6a053e110a30a8506f55fdc74813ea28acd9
      https://github.com/llvm/llvm-project/commit/d2df6a053e110a30a8506f55fdc74813ea28acd9
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/test/CodeGen/PISA/GlobalISel/build-vector-with-constants-trunc-double.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-getdef-ignoring-bitcasts-novectors.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-select-trunc-one-zero.mir
    M llvm/test/CodeGen/PISA/GlobalISel/combine-truncated-shift.mir
    M llvm/test/CodeGen/PISA/GlobalISel/fix-illegal-shift-amt.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-extract-vector-elt-illegal-size.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-mulh-i64.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-store-long-alignment.mir
    M llvm/test/CodeGen/PISA/GlobalISel/legalizer-zext-big.mir
    M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-compare-select.mir
    M llvm/test/CodeGen/PISA/GlobalISel/postlegalizer-no-commute-shift-loop.mir
    M llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-reduce-predicates.mir
    M llvm/test/CodeGen/PISA/GlobalISel/prelegalizer-zext-and.mir

  Log Message:
  -----------
  Remove IR sections from MIR tests


  Commit: 1899433a181f28652d791252fbbff79111c50174
      https://github.com/llvm/llvm-project/commit/1899433a181f28652d791252fbbff79111c50174
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/PISA/PISACallLowering.cpp

  Log Message:
  -----------
  Use LLT::scalarOrVector


  Commit: ff7cdcab176a6792f80a9dde8755e7c7580abe68
      https://github.com/llvm/llvm-project/commit/ff7cdcab176a6792f80a9dde8755e7c7580abe68
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/PISA/PISACallLowering.cpp

  Log Message:
  -----------
  Replace assert with reportFatalUsageError


  Commit: e9ad3567fc88fa1ae2590f81df823e1956a2bfc0
      https://github.com/llvm/llvm-project/commit/e9ad3567fc88fa1ae2590f81df823e1956a2bfc0
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/PISA/PISALegalizerInfo.cpp

  Log Message:
  -----------
  Rename legalizeGLoad to legalizeGLoadStore (it handles both loads and stores)


  Commit: 9f5888734904002f793a4f60879550f9bad55667
      https://github.com/llvm/llvm-project/commit/9f5888734904002f793a4f60879550f9bad55667
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/PISA/PISALegalizerInfo.cpp

  Log Message:
  -----------
  Replace llvm_unreachable with reportFatalUsageError


  Commit: e8c46bb8c17c83b8ed6cd71f6024a6122df13193
      https://github.com/llvm/llvm-project/commit/e8c46bb8c17c83b8ed6cd71f6024a6122df13193
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/PISA/PISACombine.td
    M llvm/lib/Target/PISA/PISAPostLegalizerCombiner.cpp
    M llvm/lib/Target/PISA/PISAPreLegalizerCombiner.cpp

  Log Message:
  -----------
  Replace /// with //


Compare: https://github.com/llvm/llvm-project/compare/cb3cb3accb2c...e8c46bb8c17c

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