[all-commits] [llvm/llvm-project] 7cfa34: ARM: Track CPSR liveness in Thumb2SizeReduction wi...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/arm/thumb2-reduce-cpsr-liveness
  Home:   https://github.com/llvm/llvm-project
  Commit: 7cfa348bd7dca80827b3a0c271746b36ccdfd64e
      https://github.com/llvm/llvm-project/commit/7cfa348bd7dca80827b3a0c271746b36ccdfd64e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-21 (Mon, 21 Sep 2026)

  Changed paths:
    M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
    M llvm/test/CodeGen/ARM/cmse-harden-call-returned-values.ll
    A llvm/test/CodeGen/Thumb2/thumb2-reduce-size-cpsr.mir

  Log Message:
  -----------
  ARM: Track CPSR liveness in Thumb2SizeReduction without kill flags

Thumb2SizeReduction narrows a 32-bit instruction to its flag-setting
16-bit form only when CPSR is dead afterwards. It determined this from
kill flags on CPSR operands. Kill flags have been semi-deprecated
for over a decade, so avoid relying on them. Liveness should be evaluated
as a reverse walk over a block.

The existing forward walk over the block is still necessary as a separate
step for the different A9 avoidCPSRPartialUpdate optimization.

Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>


  Commit: 7357fd9496d365de7375c4f56feac19d37ee6202
      https://github.com/llvm/llvm-project/commit/7357fd9496d365de7375c4f56feac19d37ee6202
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-21 (Mon, 21 Sep 2026)

  Changed paths:
    M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp

  Log Message:
  -----------
  Address comments


Compare: https://github.com/llvm/llvm-project/compare/0e0a1faa946e...7357fd9496d3

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