[all-commits] [llvm/llvm-project] 6460a5: AArch64: Fix duplicating VG def operands in isel p...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6460a5605d9b73640b25bd5987dea597cd648f47
      https://github.com/llvm/llvm-project/commit/6460a5605d9b73640b25bd5987dea597cd648f47
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-21 (Mon, 21 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/test/CodeGen/AArch64/sme-streaming-mode-landingpads.ll

  Log Message:
  -----------
  AArch64: Fix duplicating VG def operands in isel pseudo expansion (#225113)

Previously MSRpstatePseudo's handling would produce a duplicate VG operand. 
AdjustInstrPostInstrSelection added an implicit VG use/def and an FPMR def. It's 
dubious to introduce a def in the output which wasn't already present in the input, 
so fix the missing FPMR def. Also guard against re-introducing the operands for 
instructions which already have the defs. Ideally  there would not be any of these m
anual def add calls, but that is a larger fix.

This removes the duplicate operand and fixes potentially inconsistent
dead flags, avoiding a failure in a future verifier check.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>



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