[all-commits] [llvm/llvm-project] 0e2786: [libc] Add getgrnam_r and getgrgid_r entrypoints (...
Steven Wu via All-commits
all-commits at lists.llvm.org
Mon Sep 21 09:37:51 PDT 2026
Branch: refs/heads/users/cachemeifyoucan/spr/llvmsupport-make-sysfsfile_t-into-a-seperate-type
Home: https://github.com/llvm/llvm-project
Commit: 0e2786dcb5b28f754a1144c27e708d1c42676af9
https://github.com/llvm/llvm-project/commit/0e2786dcb5b28f754a1144c27e708d1c42676af9
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/grp.yaml
M libc/src/grp/CMakeLists.txt
A libc/src/grp/getgrgid_r.cpp
A libc/src/grp/getgrgid_r.h
A libc/src/grp/getgrnam_r.cpp
A libc/src/grp/getgrnam_r.h
M libc/src/grp/grp_utils.cpp
M libc/src/grp/grp_utils.h
M libc/test/src/grp/CMakeLists.txt
A libc/test/src/grp/getgrgid_r_test.cpp
A libc/test/src/grp/getgrnam_r_test.cpp
Log Message:
-----------
[libc] Add getgrnam_r and getgrgid_r entrypoints (#224722)
Add the reentrant group database lookup entrypoints getgrnam_r and
getgrgid_r along with grp::find_by_name and grp::find_by_gid in
grp_utils.
Each lookup opens a ScopedFlatFileDatabase<struct group> stream so that
reentrant lookups do not disturb an in-progress getgrent iteration.
Track group_file_path alongside the iteration database so scoped streams
opened by reentrant lookups honour test path overrides.
* Add getgrnam_r and getgrgid_r entrypoints
* Add find_by_name and find_by_gid lookup helpers in grp_utils
* Define getgrnam_r and getgrgid_r in include/grp.yaml
* Add hermetic unit tests for getgrnam_r and getgrgid_r
Assisted-by: Automated tooling, human reviewed.
Commit: 123c5db6b4e9ca0ae665db29585fe3d8757c5570
https://github.com/llvm/llvm-project/commit/123c5db6b4e9ca0ae665db29585fe3d8757c5570
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M .github/workflows/libclang-abi-tests.yml
Log Message:
-----------
workflows/libclang-abi-tests: Cache baseline results (#213503)
This way we don't need to recompute them on every run.
Commit: acd9cda52648d3acd68096697eba217226875930
https://github.com/llvm/llvm-project/commit/acd9cda52648d3acd68096697eba217226875930
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M llvm/utils/release/github-upload-release.py
Log Message:
-----------
github-upload-release: Create draft releases (#209876)
https://discourse.llvm.org/t/rfc-enabling-immutable-releases-v2/91180
Commit: c89ca1ba3d3fc40343656851fe669dc80282dfdf
https://github.com/llvm/llvm-project/commit/c89ca1ba3d3fc40343656851fe669dc80282dfdf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
Log Message:
-----------
[SLP][NFC]Add a test with a missed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/224865
Commit: fd2f25d59643fac8c3249c3a48c25565df9af8f2
https://github.com/llvm/llvm-project/commit/fd2f25d59643fac8c3249c3a48c25565df9af8f2
Author: geoffreygaren <ggaren at apple.com>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
Log Message:
-----------
[WebKit Checkers][NFC] Thread the sink type through the local vars checker (#224862)
So an upcoming borrow checker can track assignment through indirection.
For example, in `out = &vec`, where `out`'s declared type is
`Vector<char>*&`, the relevant sink type is `Vector<char>*`.
Assisted-by: Claude
Commit: b03138a9bf86f311d6549133325ec74f102933d0
https://github.com/llvm/llvm-project/commit/b03138a9bf86f311d6549133325ec74f102933d0
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[bazel] Fix the build after 8c8740bd92197171d5873f77a66bb68217926fb2/2747501774ba93685fc460abafb395e585a86b13 (#224868)
Commit: 1843845752ab38a87af6fccef55ac236c2b70dd7
https://github.com/llvm/llvm-project/commit/1843845752ab38a87af6fccef55ac236c2b70dd7
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
A llvm/test/TableGen/AMDGPUTargetDefLDSAllocGranularity.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Add `getLDSAllocGranule` to TargetParser (#220051)
Commit: e3adc74921633fe089d78cb234faab892405f68c
https://github.com/llvm/llvm-project/commit/e3adc74921633fe089d78cb234faab892405f68c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 551af79c9031 (#224870)
Commit: 0ada78bc80f9a0dc46910bfd2997315d1679f707
https://github.com/llvm/llvm-project/commit/0ada78bc80f9a0dc46910bfd2997315d1679f707
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port f43368b4d45e (#224871)
Commit: e31da6ab711d043a785b340d6d9add76debd237d
https://github.com/llvm/llvm-project/commit/e31da6ab711d043a785b340d6d9add76debd237d
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[gn build] Port fce3facdfe49 (#224872)
Commit: c37874b85b4d29fe40780ac847a628cfb4a28fe1
https://github.com/llvm/llvm-project/commit/c37874b85b4d29fe40780ac847a628cfb4a28fe1
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-19 (Sat, 19 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
A llvm/test/CodeGen/AMDGPU/detect-dead-lanes-tied-undef.mir
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-regsequence-undef.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/X86/freeze.ll
A llvm/test/CodeGen/X86/process-implicit-defs-tied-undef.mir
M llvm/test/CodeGen/X86/regallocfast-undef-tied-use.mir
A llvm/test/MachineVerifier/tied-undef-use.mir
Log Message:
-----------
[CodeGen] Reject undef tied use sharing a virtual register with another read (#222832)
A virtual use operand, tied to a def of a different register, sharing
the register with another read, carries obligation that is hard to
follow by passes. For example, twoaddressinstruction would use different
physical registers, breaking the expectation of the `IsUndef` flag:
```
define void @f() {
%y = freeze i32 undef
%m = mul i32 %y, %y
call void asm sideeffect "# use $0", "{cx}"(i32 %m)
ret void
}
%2 = IMUL32rr undef %1(tied-def 0), undef %1 ; before twoaddressinstruction
%2 = IMUL32rr undef %2(tied-def 0), undef %1 ; after
imull %eax, %ecx ; different regs
```
RegAllocFast had the same issue until #222249. Let's just reject the
shape to retire the obligation. `%0 = XOR undef %0, undef %0` stays
legal, since rewriting that tie changes nothing.
ProcessImplicitDefs and DetectDeadLanes stop producing the rejected
form: such reads keep their IMPLICIT_DEF. Physical registers are
unaffected, so post-RA expansions like Expand2AddrUndef keep
`$eax = XOR32rr undef $eax, undef $eax`.
Aided by Opus 5
Commit: b1aa74ddcb34e88a2ab1a0a1d2a1295a8c487a33
https://github.com/llvm/llvm-project/commit/b1aa74ddcb34e88a2ab1a0a1d2a1295a8c487a33
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV][XQCI] Add a test that shows getInstSizeInBytes returning an incorrect instruction size. NFC (#224787)
Follow up to https://github.com/llvm/llvm-project/pull/223913 that shows
`getInstSizeInBytes` returning an incorrect instruction size of 2 when
the 6 byte `Xqci` instruction compresses to a 4 byte instruction.
An AI agent assisted in the generation of the test.
Commit: 761561a0b41fb35e6d52b3498e8ca20073753b18
https://github.com/llvm/llvm-project/commit/761561a0b41fb35e6d52b3498e8ca20073753b18
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
Log Message:
-----------
[lldb/test] Skip test_scripted_process_addressable_bits on Windows (#224878)
This test is the first one in its directory to reach `self.build()` on
Windows, where the Makefile only knows how to build a dylib, so linking
the test binary fails on an undefined `baz` symbol.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 780937f68bfd726b3e45dd2de14d0d152e075147
https://github.com/llvm/llvm-project/commit/780937f68bfd726b3e45dd2de14d0d152e075147
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
A clang/test/AST/ByteCode/Inputs/default-ctor.cppm
A clang/test/AST/ByteCode/module-default-ctor.cpp
Log Message:
-----------
[clang][bytecode] Add a special opcode for trivial default initializers (#224839)
Trivial default initializers from modules are not implicitly defined in
the AST, so we would diagnose the attached test case as an undefined
constructor. Do what the current interpreter does and special-case this.
Fixes https://github.com/llvm/llvm-project/issues/221400
Commit: c4f702aed65d0f9af31f60849846b2bb31d8fbb0
https://github.com/llvm/llvm-project/commit/c4f702aed65d0f9af31f60849846b2bb31d8fbb0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode] Remove unnecessary pointer type checks in CheckLoad/CheckStore (#224884)
Only check the pointer type once.
Commit: 08daaa8e376a5dcd9be7894dbd071920a7de154a
https://github.com/llvm/llvm-project/commit/08daaa8e376a5dcd9be7894dbd071920a7de154a
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__flat_map/flat_multimap.h
M libcxx/include/__flat_set/flat_multiset.h
M libcxx/include/__flat_set/flat_set.h
M libcxx/include/queue
M libcxx/include/stack
A libcxx/test/std/containers/container.adaptors/flat.map/types.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/types.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multiset/types.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.set/types.verify.cpp
R libcxx/test/std/containers/container.adaptors/priority.queue/priqueue.members/empty.verify.cpp
R libcxx/test/std/containers/container.adaptors/priority.queue/types.compile.fail.cpp
A libcxx/test/std/containers/container.adaptors/priority.queue/types.verify.cpp
R libcxx/test/std/containers/container.adaptors/queue/queue.defn/empty.verify.cpp
R libcxx/test/std/containers/container.adaptors/queue/queue.defn/types.compile.fail.cpp
A libcxx/test/std/containers/container.adaptors/queue/queue.defn/types.verify.cpp
R libcxx/test/std/containers/container.adaptors/stack/stack.defn/empty.verify.cpp
R libcxx/test/std/containers/container.adaptors/stack/stack.defn/types.compile.fail.cpp
A libcxx/test/std/containers/container.adaptors/stack/stack.defn/types.verify.cpp
Log Message:
-----------
[libc++] Update container adaptors' type verification tests (#224810)
1. Improves the error message for LWG2566.
2. Converts related compile.fail.cpp tests to verify.cpp tests.
3. Updates all related tests.
4. Removes some redundant tests (e.g. `[[nodiscard]]` is tested
elsewhere).
References:
- https://wg21.link/lwg2566
- https://wg21.link/container.adaptors
- https://wg21.link/flat.map.overview#7
- https://wg21.link/flat.map.overview#8
- https://wg21.link/flat.multimap.overview#7
- https://wg21.link/flat.multimap.overview#8
- https://wg21.link/flat.multiset.overview#7
- https://wg21.link/flat.multiset.overview#8
- https://wg21.link/flat.set.overview#7
- https://wg21.link/flat.set.overview#8
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 383f4cf28f19443bd4aacc7cda9d08ae6cacfa0c
https://github.com/llvm/llvm-project/commit/383f4cf28f19443bd4aacc7cda9d08ae6cacfa0c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/Dlfcn.h
A llvm/include/llvm/ExecutionEngine/Orc/DlfcnSPS.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/DlfcnSPSCI.h
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC] Drive LLJIT dlopen/dlupdate/dlclose via proxies (#224881)
Add Dlfcn proxies (Dlfcn.h), their SPS specs (DlfcnSPS.h) and CI
descriptors (DlfcnSPSCI.h), and route ORCPlatformSupport's three
callSPSWrapper sites through them via recordProxy.
Commit: d9d4b55c9157bb86b8a0bd93011bed82f67cc51f
https://github.com/llvm/llvm-project/commit/d9d4b55c9157bb86b8a0bd93011bed82f67cc51f
Author: Cyrus Ding <91178148+dingcyrus at users.noreply.github.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v2i16.ll
M llvm/test/CodeGen/NVPTX/insert-vector-elt-shuffle-i8.ll
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[DAG] canCreateUndefOrPoison/isGuaranteedNotToBeUndefOrPoison - SCALAR_TO_VECTOR upper elements are poison (#217185)
ISD::SCALAR_TO_VECTOR documents its upper elements (1..N-1) as poison,
not undef. Update both helpers to use includesPoison(Kind) instead of
includesUndef(Kind) when those elements are demanded, so PoisonOnly
queries correctly report that the upper elements can create poison and
are not guaranteed to be poison-free.
AI assistance was used for code review analysis and local build
verification.
Fixes #217028
Commit: 2ef90337355eee4384d4ac61bf038175a24583ab
https://github.com/llvm/llvm-project/commit/2ef90337355eee4384d4ac61bf038175a24583ab
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/InterpState.h
Log Message:
-----------
[clang][bytecode] Use InterpState's allocator in DynamicAllocator (#224893)
This saves us yet another BumpPtrAllocator.
Commit: 6e505dbe194cd2cfb43e6de90e1e109d448800c9
https://github.com/llvm/llvm-project/commit/6e505dbe194cd2cfb43e6de90e1e109d448800c9
Author: Demo_mod <gaurvansh133 at gmail.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M clang/test/Parser/decltype-crash.cpp
Log Message:
-----------
[clang][test] Add regression test for invalid 'int decltype {}' (#224855)
The parser crash on `int decltype {}` was fixed by #211221, but the test
it added only covers the `= 0` forms. Add the brace-init form reported
in the issue.
Fixes #165246
Commit: 67cb38c384b5e4a3a75b436259a6e20c8d9fbffd
https://github.com/llvm/llvm-project/commit/67cb38c384b5e4a3a75b436259a6e20c8d9fbffd
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/test/Transforms/HipStdPar/math-fixup.ll
Log Message:
-----------
[HIPSTDPAR] Add `sincos` support (#224620)
The math fixup pass for `hipstdpar` only supported standard library math
functions. Due to #194616, combining `sin` + `cos` into `sincos` becomes
possible, so whilst `sincos` itself is not (yet) a standard library
interface, it has to be handled as well. This extends the set of covered
intrinsics to include it.
Commit: aa6b03ed5a9ffe5ba6f0d945fac9961884b5c6ed
https://github.com/llvm/llvm-project/commit/aa6b03ed5a9ffe5ba6f0d945fac9961884b5c6ed
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/AST/ByteCode/Inputs/module.modulemap
A clang/test/AST/ByteCode/Inputs/redecl1.h
A clang/test/AST/ByteCode/module-redecl1.cpp
M clang/test/Modules/pr102360.cppm
M clang/test/Modules/redecl-add-after-load.cpp
Log Message:
-----------
[clang][bytecode] Notify bytecode interpreter after deserializing constant global declarations (#198062)
The problem looks something like this:
```c++
extern const int m;
constexpr int getm() { return m; }
const int m = 12;
static_assert(getm() == 12);
```
The generated bytecode for `getm()` references a global variable stored
in `interp::Program`. This variable is uninitialized when the bytecode
is generated, but since it's extern, that's not diagnosed (because it
might be initialized later).
When we parse the redeclaration of `m` on line 4, we evaluate its
initializer via `Expr::EvaluateAsInitializer`, which makes the bytecode
interpreter aware that `m` has been redeclared. It will create a new
global for the new declaration and make the previous global point to the
new one. When the bytecode is then evaluated in the `static_assert`,
there is no problem.
However, when the redeclaration isn't part of the TU but gets
de-serialized via a module (which is the case in
`test/Modules/redecl-add-after-load.cpp`), we don't call
`EvaluateAsInitializer`, we don't even necessarily de-serialize the
initializer expression at all. So the bytecode interpreter doesn't know
about the new declaration and the static_assert ultimately fails because
`m` is not initialized.
Marking this as a draft PR since I'm not sure this is the best way to do
this and if bytecode-specific things in other parts of the code base are
tolerated.
Commit: 5363b70ced4a88258e90a4d93e7887bf9614e53e
https://github.com/llvm/llvm-project/commit/5363b70ced4a88258e90a4d93e7887bf9614e53e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/PowerPC/extracted-subfields-be.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
Log Message:
-----------
[SLP][NFC]Add extra tests for bitcasts-based vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/224916
Commit: 335793850c499195d9af75715bbbe84ce272666b
https://github.com/llvm/llvm-project/commit/335793850c499195d9af75715bbbe84ce272666b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
Log Message:
-----------
[SCEV] Increase RewriteMap default size (NFC). (#224864)
The old automatic default of 4 inline buckets meant that in practice we
were frequently hitting the grow path to 64 buckets, causing unnecessary
memory traffic.
SCEVRewriteVisitor is used each time loop guards are applied and the new
default improves compile-time slightly for SCEV-heavy workloads. Geomean
improves by -0.03%, but mafft and lencod see bigger wins:
https://llvm-compile-time-tracker.com/compare.php?from=7c55ad084c8b1503cafa42c60d88bff65919c9fa&to=c1f14fba38c4cd7b282709d8bd9481d28642b2c6&stat=instructions:u
It mostly makes applying loop guards cheaper, making it easier to use in
more places in the future.
PR: https://github.com/llvm/llvm-project/pull/224864
Commit: 99da24b8fd7141c0eb02292e183bc5e97eb55a87
https://github.com/llvm/llvm-project/commit/99da24b8fd7141c0eb02292e183bc5e97eb55a87
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] getPSHUFShuffleMask - use PSHUFD/LW/HW decodes directly. NFC. (#224900)
Don't bother going through getTargetShuffleMask and checking for a
repeated lane mask when all we care about is the mask[4] permute mask -
PSHUFLW/HW don't even need the full 128-bit lane mask!
Commit: f28f0baf480125fd1a0b70c39c316778e3794b13
https://github.com/llvm/llvm-project/commit/f28f0baf480125fd1a0b70c39c316778e3794b13
Author: Feng Zou <feng.zou at intel.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/optimize-compare-multipred.mir
Log Message:
-----------
[X86][APX] Fix EFLAGS reuse across cycles (#223613)
optimizeCompareInstr's multi-predecessor NF reuse (added in
ab39c491430e) did not scan the below-CmpInstr region of CmpMBB when
CmpMBB was on a CFG cycle: that region is on the back-edge path but is
scanned by neither the caller nor the helper's predecessor walk. A
non-NF-convertible EFLAGS clobber there (e.g. an unrelated CMP feeding a
JCC, as in the reproducer below with VUCOMISS/CTEST/COPY-\$eflags) still
let the helper delete the redundant compare and mark \$eflags live-in on
CmpMBB. That broke the reused EFLAGS on iteration 2+ and tripped
X86FlagsCopyLowering's SuccMBB == TestMBB self-loop check with a fatal
report_fatal_error when a preexisting COPY \$eflags save/restore sat in
the cycle.
Reproducer: https://godbolt.org/z/s58j5zxqd
Detect CmpMBB on a cycle via a forward-reachability BFS on its
successors and, when so, scan from just after CmpInstr to the block's
end: bail on any non-NF-convertible EFLAGS clobber, stage NF-convertible
ones. The rest of the helper is unchanged.
Tests exercise the bail paths (selfloop_shadow_below,
twoblock_cycle_shadow_below, threeblock_cycle_shadow_below,
selfloop_nfconvertible_below_cap), the positive stage-and-succeed path
(selfloop_nfconvertible_below), and the CmpMBB-not-on-cycle skip path
(multipred_above_cmpmbb).
Fixes: https://github.com/llvm/llvm-project/issues/223282
Assisted by Claude Code.
Commit: 35a11e0d32bd6f8f4eb343a5aeeee1ef401828b8
https://github.com/llvm/llvm-project/commit/35a11e0d32bd6f8f4eb343a5aeeee1ef401828b8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/posix/DynamicLibrary.cpp
M orc-rt/lib/bedrock/sys/posix/Memory.cpp
M orc-rt/lib/bedrock/sys/posix/PageSize.cpp
M orc-rt/lib/bedrock/sys/posix/SocketHandle.cpp
Log Message:
-----------
[orc-rt] Drop emacs mode lines from .cpp files. (#224928)
These aren't needed for .cpp files where emacs can infer the mode from
the file extension.
Commit: 1e469c741cf0f4c80fdff8749336366a8a5699a4
https://github.com/llvm/llvm-project/commit/1e469c741cf0f4c80fdff8749336366a8a5699a4
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/test/MC/RISCV/corev/XCVsimd-invalid.s
M llvm/test/MC/RISCV/corev/XCVsimd.s
Log Message:
-----------
[RISCV] Fix immediate operand ranges for XCVsimd instructions (#224876)
See link:
-
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html#simd-bit-manipulation-operations
-
https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html#simd-shuffle-and-pack-operations
Commit: 04865d44edd515cd20ae7037f176e23d2b155544
https://github.com/llvm/llvm-project/commit/04865d44edd515cd20ae7037f176e23d2b155544
Author: knickish <knickish at gmail.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/M68k/M68kInstrData.td
M llvm/test/CodeGen/M68k/inline-asm.ll
M llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s
M llvm/test/MC/M68k/Data/Classes/MxMoveSR.s
Log Message:
-----------
[M68k] Add Imm source for MOVE to CCR/SR (#207590)
closes #165077, just adds the imm addressing mode to MOVE to SR/CCR
Commit: fbc222615d759435d4848e54987053fe5b614ce3
https://github.com/llvm/llvm-project/commit/fbc222615d759435d4848e54987053fe5b614ce3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
Log Message:
-----------
CodeGen: Pass instruction and operand index to isPCRelRegisterOperandLegal (#219420)
Replace the MachineOperand argument to the
TargetInstrInfo::isPCRelRegisterOperandLegal hook with the containing
instruction and operand index. The M68k implementation only used the
operand
to recover its parent instruction and operand number, so this drops the
dependence on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 0de53b0cf6500ad29ba50f64daccf0d6b91fc1fb
https://github.com/llvm/llvm-project/commit/0de53b0cf6500ad29ba50f64daccf0d6b91fc1fb
Author: hev <wangrui at loongson.cn>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
Log Message:
-----------
[LoongArch] Drop asm part from memory barrier optimization pass (#223656)
Drop the inline asm part from #218597, which violates inline assembly
semantics.
Commit: 0b44c51c08dcc096f1f1a48532c3da31ceccb036
https://github.com/llvm/llvm-project/commit/0b44c51c08dcc096f1f1a48532c3da31ceccb036
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
A llvm/test/CodeGen/AArch64/sve-vector-interleave-legalize.ll
Log Message:
-----------
[SDAG] Handle widened operands for scalable PromoteIntRes_CONCAT_VECTORS (#224274)
Commit: 5640ecf3d362b9f3bf5d2d9f98631f2c1f0da5c8
https://github.com/llvm/llvm-project/commit/5640ecf3d362b9f3bf5d2d9f98631f2c1f0da5c8
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULibFunc.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.h
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
Log Message:
-----------
[AMDGPU] Remove dead function and method declarations (NFC) (#224889)
createLowerWWMCopiesPass:
Added on July 28, 2023 in commit
4d42e8b5d1fa87e49768d100dd1bc53515391e89 without a definition or any
callers.
createAMDGPUReserveWWMRegsPass:
Added on September 30, 2024 in commit
ac0f64f06d67a93817ccd9a3c529ad40920115c9 without a definition or any
callers.
createAMDGPUStructurizeCFGPass:
The definition and callers were removed on June 19, 2013 in commit
d46fce11412636ec9cca038e1f2b1addf1690f00.
AMDGPUTargetLowering::LowerSTORE:
The definition was split into R600TargetLowering::LowerSTORE and
SITargetLowering::LowerSTORE on February 11, 2016 in commit
952456631458e638fdcc2509611c356bf0aa2bed.
AMDGPULibFuncBase::Param::mangleItanium,
AMDGPUMangledLibFunc::mangleName:
Added on August 11, 2017 in commit
7f37794ebd2c6c36224597800e4d1e5a99ad80e9 without definitions or any
callers.
AMDGPUTargetMachine::getSubtargetImpl():
The 0-argument overload definition and callers were removed on June
27, 2016 in commit 59c0ffa22ad2d0b3948c545b4eb442173a71633a.
GCNRPTracker::bumpDeadDefs:
Added on October 9, 2024 in commit
17bc959961aa5792821516b547100316fc886ab4 without a definition or any
callers.
PreRARematStage::ScoredRemat::rematerialize (3-argument overload):
The definition and callers were removed on April 11, 2026 in commit
42127fa2775ca9102d4be00cafbe0fcd6f25299d.
GCNSubtarget::getMaxLocalMemSizeWithWaveCount:
Moved to base class AMDGPUCommonSubtarget (now AMDGPUSubtarget) on
June 28, 2018 in commit c5a154db48c3cd9e16b5c74977d506415414daf7.
AMDGPUInstPrinter::printRegOperand (2-argument overload):
The definition and callers were removed on April 8, 2015 in commit
d7e6f13671e4f36c038b1a671697196b7b72db27.
AMDGPUInstPrinter::printLiteral, printLast, printNeg, printOMOD,
printRel, printUpdateExecMask, printUpdatePred, printWrite,
printBankSwizzle, printRSel, printCT, printKCache:
The definitions and callers were removed on June 28, 2018 in commit
c5a154db48c3cd9e16b5c74977d506415414daf7 after moving to
R600InstPrinter in commit a096b126285422933800f776b6eb830d40fed335.
R600TargetLowering::getSubtarget:
The definition and callers were removed on June 28, 2018 in commit
c5a154db48c3cd9e16b5c74977d506415414daf7.
R600InstrInfo::isFlagSet:
Added on December 11, 2012 in commit
75aadc2813824e18449e08a99690a6f886fadf13 without a definition or any
callers.
SIFixSGPRCopies::prepareRegSequenceAndPHIs:
Added on September 7, 2022 in commit
2e8817b90a9aa38c681ca1bb9075f9e8eed3f6e8 without a definition or any
callers.
SIScheduleBlockScheduler::schedule:
Added on January 13, 2016 in commit
02c3291566ff670d3fe1a7a20ba866cbe4c48266 without a definition or any
callers.
Assisted-by: Antigravity
Commit: 52500486a0b723a1d9528e3098901702da837c3d
https://github.com/llvm/llvm-project/commit/52500486a0b723a1d9528e3098901702da837c3d
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/test/CodeGen/Mips/cconv/arguments-float.ll
M llvm/test/CodeGen/Mips/cconv/arguments-struct.ll
M llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
M llvm/test/CodeGen/Mips/cconv/arguments.ll
M llvm/test/CodeGen/Mips/cconv/callee-saved-float.ll
M llvm/test/CodeGen/Mips/cconv/callee-saved.ll
M llvm/test/CodeGen/Mips/cconv/memory-layout.ll
A llvm/test/CodeGen/Mips/cconv/o32-fp64-gpr-moves.ll
A llvm/test/CodeGen/Mips/cconv/o32-mips64.ll
M llvm/test/CodeGen/Mips/cconv/reserved-space.ll
M llvm/test/CodeGen/Mips/cconv/return-float.ll
M llvm/test/CodeGen/Mips/cconv/return-hard-float.ll
M llvm/test/CodeGen/Mips/cconv/return-struct.ll
M llvm/test/CodeGen/Mips/cconv/return.ll
M llvm/test/CodeGen/Mips/cconv/stack-alignment.ll
Log Message:
-----------
[Mips] Fix O32 lowering on 64-bit CPUs (#224937)
Use 32-bit GPR lowering for O32 while preserving the selected ISA and
FPR mode. Handle FP64 transfers through the stack when high-half moves
are unavailable.
Commit: fa360c3b8dbfd8a449364b7a6e454878bcf00eb9
https://github.com/llvm/llvm-project/commit/fa360c3b8dbfd8a449364b7a6e454878bcf00eb9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/mul-with-overflow.ll
A llvm/test/Transforms/ConstraintElimination/uadd-with-overflow.ll
M llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll
Log Message:
-----------
[ConstraintElim] Simplify all overflow intrinsics using isKnownNoWrap. (#224848)
Use isKnownNoWrap overload added in
https://github.com/llvm/llvm-project/pull/224758 to simplify all
supported overflowing math intrinsics.
Enables additional simplifications in a few more cases in
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1368.
And more simplifications in Swift, which uses overflow intrinsics
extensively.
Compile-time impact in the noise:
https://llvm-compile-time-tracker.com/compare.php?from=7a02bcc9189b467efbb071ab25d99273fefc54da&to=9a224fd59f971aa94b0e3509dcceae3bffb7ec81&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/224848
Commit: 66155d8a7409128e8c427cf5642847e01e40cb37
https://github.com/llvm/llvm-project/commit/66155d8a7409128e8c427cf5642847e01e40cb37
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
Log Message:
-----------
[SelectionDAG] Document that ISD::ADDE/SUBE/ADDC/SUBC use glue. NFC (#224765)
Commit: 51d290508d4dd980c3ba03bcc873926c41c6e591
https://github.com/llvm/llvm-project/commit/51d290508d4dd980c3ba03bcc873926c41c6e591
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Restrict combineOrOfSetCCToUSUBOCarry to ZeroOrOneBooleanContent. (#224759)
We need to ensure the carry in matches boolean contents. We are checking
MaskedValueIsZero which is only valid for ZeroOrOneBooleanContent.
We could check ComputeNumSignBits for ZeroOrNegativeOneBooleanContent,
but no in tree target supports USUBO_CARRY and
ZeroOrNegativeOneBooleanContent.
This was an oversight in #223396 due to incorrect documentation for
USUBO_CARRY. I will fix that in a separate patch.
Commit: ffe46933084f1340211b1e4078d2920996b8e038
https://github.com/llvm/llvm-project/commit/ffe46933084f1340211b1e4078d2920996b8e038
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
Log Message:
-----------
[SelectionDAG] Document that UADDO/USUBO_CARRRY follow getBooleanContents. NFC (#224764)
Use 'true' instead of '1'.
Follow up from post commit discussion in #223396.
Commit: c2e0c82edaa4f9a5b5615b67d3ed1768556222ff
https://github.com/llvm/llvm-project/commit/c2e0c82edaa4f9a5b5615b67d3ed1768556222ff
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Add UImmLsbZeroAsmOperand class to use isUImmShifted<N, S> as the PredicateMethod. NFC (#224789)
Allows us to remove some wrappers from RISCVAsmParser.
Commit: 27eb38144a2bc40e989cdefb8265b6eb7aedb21b
https://github.com/llvm/llvm-project/commit/27eb38144a2bc40e989cdefb8265b6eb7aedb21b
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseNullptrCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseNullptrCheck.h
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-nullptr.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-t.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr.cpp
Log Message:
-----------
[clang-tidy] Add detection of decltype(nullptr) => std::nullptr_t to modernize-use-nullptr (#224591)
Hidden behind an option switch, but on by default.
Commit: d0dc3b038f526cf85fb707cc821f4db33d3cfbcb
https://github.com/llvm/llvm-project/commit/d0dc3b038f526cf85fb707cc821f4db33d3cfbcb
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
A libcxx/include/__iterator/static_packed_bounded_iter.h
M libcxx/include/module.modulemap.in
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/arithmetic.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/assert.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/comparison.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/ctor.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/dereference.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/layout.compile.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/types.compile.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/valid.verify.cpp
Log Message:
-----------
[libc++] Add a compact, bounded iterator (#208271)
- By taking advantage of unused alignment bits for a pointer of type `T`
and the static capacity known at compile time, we can make a compact
bounded iterator who's size == `sizeof(T*)` by stuffing a counter inside
those bits.
- This new iterator type is `static_packed_bounded_iterator<class _Ptr, size_t _RangeCapacity>` and is only valid if:
- `_Ptr` is a pointer
- `_RangeCapacity` is <= `(1 << (bit_width(alignof(T)) - 1)) - 1`. The
extra -1 is required, because we need to represent the end position past
the last element.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 32080ffd98b12a7f4733181790b21ff62f9f31ba
https://github.com/llvm/llvm-project/commit/32080ffd98b12a7f4733181790b21ff62f9f31ba
Author: techmetx11 <114311037+techmetx11 at users.noreply.github.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/M68k/M68kInstrControl.td
A llvm/test/MC/M68k/Control/Classes/MxDBcc.s
Log Message:
-----------
[M68k][MC] Add support for DBcc instructions (#193930)
Commit: 1d655b0b72ce2a328e9cb307dfce3048c5700d7a
https://github.com/llvm/llvm-project/commit/1d655b0b72ce2a328e9cb307dfce3048c5700d7a
Author: knickish <knickish at gmail.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Target/M68k/M68kInstrControl.td
R llvm/test/MC/M68k/Control/Classes/MxDBcc.s
Log Message:
-----------
[M68k][MC] Revert "Add support for DBcc instructions" (#224950)"
llvm/llvm-project#193930 [broke m68k
builds](https://github.com/llvm/llvm-project/pull/193930#issuecomment-5751632991),
reverting
Commit: 4ffcaf61b123ba27c71daf8da7f8eb03ffdd748b
https://github.com/llvm/llvm-project/commit/4ffcaf61b123ba27c71daf8da7f8eb03ffdd748b
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M lldb/source/API/SBProgress.cpp
M lldb/source/Core/Progress.cpp
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBProgressTest.cpp
Log Message:
-----------
[lldb][SBAPI] Fix crash when calling SBProgress constructor. (#224176)
Fix crash when calling SBProgress constructor with nullptr.
Commit: 8692dda92022dc121e720b8f096e9dfdd6c00282
https://github.com/llvm/llvm-project/commit/8692dda92022dc121e720b8f096e9dfdd6c00282
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
Log Message:
-----------
[Support] Remove cl::multi_val (#224959)
Nothing uses it: the last user, llvm-nm, moved to OptTable. The feature
would block migration to TableGen based representation.
LLM-aided
Commit: be9e98270a4948e43b6555c7a5908bc9644209f1
https://github.com/llvm/llvm-project/commit/be9e98270a4948e43b6555c7a5908bc9644209f1
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M libc/include/sys/mman.yaml
M libc/src/sys/mman/linux/mlock2.cpp
M libc/src/sys/mman/mlock2.h
Log Message:
-----------
[libc] Fix mlock, mlock2, and munlock signatures (#224905)
Updated libc/include/sys/mman.yaml so the first parameter of mlock,
mlock2, and munlock is const void * rather than void *.
Updated libc/src/sys/mman/mlock2.h and
libc/src/sys/mman/linux/mlock2.cpp so the flags parameter is unsigned
int rather than int.
Assisted-by: Automated tooling, human reviewed.
Commit: f28e7b16b90e3b6e7b38a3399b279308f636f172
https://github.com/llvm/llvm-project/commit/f28e7b16b90e3b6e7b38a3399b279308f636f172
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
A llvm/test/Analysis/CostModel/AArch64/speculative-load.ll
A llvm/test/Analysis/CostModel/X86/speculative-load.ll
A llvm/test/Transforms/LoopVectorize/AArch64/early-exit-with-speculative-load-basic.ll
A llvm/test/Transforms/LoopVectorize/AArch64/early-exit-with-speculative-load-load-types.ll
A llvm/test/Transforms/LoopVectorize/AArch64/early-exit-with-speculative-load-safety.ll
A llvm/test/Transforms/LoopVectorize/AArch64/early-exit-with-speculative-load-scalable.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/early-exit-with-speculative-load-oracle.ll
M llvm/test/Transforms/LoopVectorize/unsupported_early_exit.ll
Log Message:
-----------
[LV] Add tests for early-exit loops with faulting loads (NFC). (#224762)
Pre-committing the tests for using @llvm.speculative.load intrinsic in
LoopVectorize.
Commit: cd5a0a4f07c92c65b23436d38b5aa8aa150f06dc
https://github.com/llvm/llvm-project/commit/cd5a0a4f07c92c65b23436d38b5aa8aa150f06dc
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M libc/src/__support/File/file.cpp
M libc/src/__support/File/file.h
Log Message:
-----------
[libc] Move File::close out of line to file.cpp (#224901)
Moved File::close from src/__support/File/file.h into
src/__support/File/file.cpp and removed #include
"src/__support/CPP/new.h" from file.h, matching Dir::close in
src/__support/File/dir.h.
src/__support/CPP/new.h renames global operator delete via __asm__ to
__llvm_libc_delete (which calls free) for the entire translation unit
without renaming operator new. Including new.h in file.h leaked this
replacement operator delete into unit test translation units that
include file.h, causing an AddressSanitizer alloc-dealloc-mismatch in
Test::createCallable during death tests.
Assisted-by: Automated tooling, human reviewed.
Commit: 480adef267b7e225ea52b11d0e1b8516657309ff
https://github.com/llvm/llvm-project/commit/480adef267b7e225ea52b11d0e1b8516657309ff
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M lldb/bindings/interface/SBStringListExtensions.i
A lldb/test/API/python_api/sbstringlist/TestSBStringList.py
Log Message:
-----------
[lldb] Implement the `__repr__` method for SBStringList. (#224134)
It was annoying to working with `SBStringList` from the lldb python
repl, because printing it out will produce something like.
`<lldb.SBStringList; proxy of <Swig Object of type 'lldb::SBStringList
*' at 0x10556a7b0> >`.
This also implicitly implements `str(SBStringList)`.
Extend the `__getitem__` behaviour to cover integer slices. Add test
cases.
Commit: b9be4cc5100477dd5580e11808df046c08bc525b
https://github.com/llvm/llvm-project/commit/b9be4cc5100477dd5580e11808df046c08bc525b
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/memory-instr-ratio.ll
Log Message:
-----------
[LoopInterchange] Avoid overflow in the memory-instruction ratio check (#214920)
populateDependencyMatrix bails out if MaxMemInstrRatio * NumInsts is
less than NumMemInstr * NumMemInstr. Both products are computed in
32-bit unsigned arithmetic and can wrap, e.g., with
-loop-interchange-max-mem-instr-ratio=2147483648 and 20 instructions the
left product wraps to 0 and the pass rejects an otherwise eligible nest.
Compute both products in uint64_t instead, which cannot overflow as all
three operands are 32 bits wide.
Assisted-by: Claude Opus 5, GPT-5.6 Sol, GPT-6 Astra, Claude Fable 5.1.
Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
Commit: e1eb257d03f78c66d6055fe4b34ac5b02ab507b0
https://github.com/llvm/llvm-project/commit/e1eb257d03f78c66d6055fe4b34ac5b02ab507b0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenTargetMachineImpl.h
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/VE/VETargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
M llvm/unittests/CodeGen/MFCommon.inc
Log Message:
-----------
CodeGen: Move DataLayout computation to CodeGenTargetMachineImpl's ctor (#224894)
Commit: 5c0b781b08ac55ceb4432631add3f8965146ae86
https://github.com/llvm/llvm-project/commit/5c0b781b08ac55ceb4432631add3f8965146ae86
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
Log Message:
-----------
[NFC][AMDGPU] Add tests for fpround of fadd and fsub feeding the mix instructions (#224909)
The f32 mix patterns already fold fadd and fsub into v_mad_mix_f32 and
v_fma_mix_f32, but the f16 and bf16 forms only fold fmul, so a half or
bfloat result still pays for a separate convert.
Also cover the denormal modes an f16 result depends on and an f16
source feeding an f16 or bf16 mix. The existing mad-mix-lo and
mad-mix-hi functions now flush denormals for every type rather than
for f32 alone.
Assisted-by: Claude Code Opus 5
Commit: 6e5b86fa50d16d9d3d7cec16aebb88e449e3ee32
https://github.com/llvm/llvm-project/commit/6e5b86fa50d16d9d3d7cec16aebb88e449e3ee32
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Add VPBlockUtils::replaceSuccessor helper (NFC). (#224970)
Add a helper to redirect a single edge, keeping the successor order and
updating the predecessor links of both the old and new successor. Use it
in insertBlockBefore.
Commit: b3154dfe4786e9e6e14f9810a8af62728a9edcd0
https://github.com/llvm/llvm-project/commit/b3154dfe4786e9e6e14f9810a8af62728a9edcd0
Author: Nina Zhang <nizhang8888 at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
A llvm/test/Transforms/LoopUnroll/AMDGPU/partial-unroll-threshold.ll
Log Message:
-----------
[AMDGPU] Add partial unroll threshold function attribute (#223291)
This change adds an `amdgpu-partial-unroll-threshold` function attribute
for controlling
`TargetTransformInfo::UnrollingPreferences::PartialThreshold` on a
per-function basis.
The existing `amdgpu-unroll-threshold` function attribute initializes
`UP.Threshold`, which is used for decisions about full
unrolling. However, there is currently no corresponding AMDGPU function
attribute for configuring `UP.PartialThreshold`
independently. As a result, clients of the AMDGPU backend cannot provide
an independent per-function cost threshold for partial and runtime
unrolling.
When present, the new attribute sets the base value of
`UP.PartialThreshold` for loops in that function. This allows the cost
threshold for partial and runtime unrolling to be configured
independently of the threshold used for full unrolling. Functions that
do not use the new attribute retain their existing behavior.
The AMDGPU function attribute documentation is updated accordingly. A
regression test sets `amdgpu-unroll-threshold` to zero and
`amdgpu-partial-unroll-threshold` to 30, then verifies that the loop is
partially unrolled by a factor of two without being fully unrolled.
Commit: c1b15b54ee18d35be275f04de1a5d0c5d1cd67e3
https://github.com/llvm/llvm-project/commit/c1b15b54ee18d35be275f04de1a5d0c5d1cd67e3
Author: he32 <he at uninett.no>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/M68k.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
Log Message:
-----------
[M68k][NetBSD] Fix alignments for NetBSD/m68k. (#207602)
Linux/m68k uses the ABI from Sun Microsystems for a.out on m68k, which
aligns ints/objects/pointers/stack on 16-bit boundaries.
NetBSD/m68k on the other hand uses the ABI from SVR4 for m68k, which
aligns ints/objects/pointers/stack on 32-bit boundaries.
This is a follow-up of
https://github.com/M680x0/issues/issues/13
Commit: 0bd330675f9eb08126e467505a0800f167084473
https://github.com/llvm/llvm-project/commit/0bd330675f9eb08126e467505a0800f167084473
Author: Mintsuki <36459316+Mintsuki at users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/test/Driver/baremetal.cpp
M clang/test/Driver/loongarch-toolchain.c
Log Message:
-----------
[clang][Driver] Use the bare-metal toolchain for LoongArch (#223703)
Clang did not handle loongarch32-\*-none-elf and loongarch64-\*-none-elf
in the
bare-metal toolchain, so these targets fell back to the generic ELF
toolchain,
which links by running gcc. Any -fuse-ld or --ld-path option is
forwarded to
gcc, and linking fails when there is no gcc. On a host whose gcc does
not target
LoongArch, which is the usual case when cross compiling, gcc drives the
linker
for the host, and the link fails with errors such as "a.o is
incompatible with
elf_x86_64". The generic ELF toolchain also searches /usr/local/include
and
/usr/include of the host.
The other bare-metal targets, Arm, AArch64, RISC-V, PowerPC, and x86
since
25f0d08bafa4, use the bare-metal toolchain, which runs the selected
linker
directly and does not search host include directories.
Handle LoongArch there as well. As the GNU toolchain does for LoongArch,
and the
bare-metal toolchain already does for RISC-V, pass -X to the linker, and
--no-relax with -mno-relax.
Assisted-by: Claude Code (Claude Opus 5)
Signed-off-by: Mintsuki <mintsuki at protonmail.com>
Commit: f970f59a9d4e6b8738547d01bc33e8a12df5244b
https://github.com/llvm/llvm-project/commit/f970f59a9d4e6b8738547d01bc33e8a12df5244b
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/AST/Type.cpp
A clang/test/Modules/concept-specialization-deserialization.cppm
M clang/unittests/Serialization/LoadSpecLazilyTest.cpp
Log Message:
-----------
[C++20] [Modules] Profiling non dependent noexcept expression by pointer (#224528)
Another approach to solve
https://github.com/llvm/llvm-project/issues/191361 and
https://github.com/llvm/llvm-project/issues/224180 than
https://github.com/llvm/llvm-project/pull/222148
I want to avoid competing PR but I do feel the original one's approach
seems too workaround. And I want to emphasize that, in my experience,
finding the root cause is much more harder than find the solution to me.
Many thanks to @ispeters
For the approach itself, I described them in the comments of the PR.
Note that the real problem is we were profiling something is not
completely deserialized, so that even if it is not crash, the logic is
not correct.
Commit: 316d12deb7725d55f90c01b72799df18a7d71d81
https://github.com/llvm/llvm-project/commit/316d12deb7725d55f90c01b72799df18a7d71d81
Author: Trevor Gross <tg at trevorgross.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M compiler-rt/lib/builtins/extendhfsf2.c
M compiler-rt/lib/builtins/fp_extend.h
M compiler-rt/lib/builtins/fp_trunc.h
M compiler-rt/lib/builtins/truncsfhf2.c
M llvm/include/llvm/IR/RuntimeLibcalls.td
Log Message:
-----------
[compiler-rt] Use integers for __gnu_h2f_ieee and __gnu_f2h_ieee (#220167)
In libgcc, these conversion routines use integers in the signature. In
practice compiler-rt's definition has worked because the AAPCS calling
convention passes and returns floats the same as the same-sized integer,
but this may not be the case on all platforms. Thus, update the
signatures to match GCC.
This new version calls the inlined functions directly., changing the
generated code from:
00000000 <__extendhfsf2>:
0: ee100a10 vmov r0, s0
4: e1a01000 mov r1, r0
<snip>
60: e1800001 orr r0, r0, r1
64: ee000a10 vmov s0, r0
68: e12fff1e bx lr
0000006c <__gnu_h2f_ieee>:
6c: e92d4800 push {fp, lr}
70: ee000a10 vmov s0, r0
74: ebfffffe bl 0 <__extendhfsf2>
78: ee100a10 vmov r0, s0
7c: e8bd8800 pop {fp, pc}
To:
00000000 <__extendhfsf2>:
0: ee100a10 vmov r0, s0
4: e1a01000 mov r1, r0
<snip>
60: e1800001 orr r0, r0, r1
64: ee000a10 vmov s0, r0
68: e12fff1e bx lr
0000006c <__gnu_h2f_ieee>:
6c: e1a01000 mov r1, r0
70: e7e42550 ubfx r2, r0, #10, #5
<snip>
c8: e1800001 orr r0, r0, r1
cc: e12fff1e bx lr
This avoids an unnecessary indirection and register shuffle when calling
`__gnu_h2f_ieee`. It does mean the code is effectively duplicated
however, since any given target will only ever use `__gnu_h2f_ieee` or
`__extendhfsf2` but never mix them, this is an improvement in the final
binary. (The same logic applies to `__gnu_f2h_ieee` and `__truncsfhf2`.)
Commit: bf73ea1468d190513fb887ffad08b36a1986b12c
https://github.com/llvm/llvm-project/commit/bf73ea1468d190513fb887ffad08b36a1986b12c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/RegAllocEvictionAdvisor.h
M llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
M llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
M llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp
M llvm/test/CodeGen/MLRegAlloc/default-eviction-advisor.ll
M llvm/test/CodeGen/MLRegAlloc/default-priority-advisor.ll
Log Message:
-----------
[MLGO] Diagnose unavailable ML advisors under the new pass manager (#224585)
Without an ML model there is no release or development advisor
The legacy pass manager says so and uses the default advisor, but the
new one just crashed
Commit: 328836b340124fc45e8529d64bbd11d1de03d228
https://github.com/llvm/llvm-project/commit/328836b340124fc45e8529d64bbd11d1de03d228
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
Log Message:
-----------
[CIR][ABI] Honor abi::ArgInfo::CanBeFlattened in the call-conv lowering (#220579)
**Summary:**
- CanBeFlattened landed on abi::ArgInfo in main
(llvm/llvm-project#220558).
- Consume the abi::ArgInfo::CanBeFlattened flag in the CIR
call-convention lowering bridge.
Assisted by: Claude Opus 4.8
Commit: 5005bb7eb5d8517e9b476d94760269356a7e87d9
https://github.com/llvm/llvm-project/commit/5005bb7eb5d8517e9b476d94760269356a7e87d9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Check diagnosing() before calling diagnoseUnknownDecl() (#224906)
We can save some small preparations this way, e.g. calling
`getRootVarDecl()`.
Commit: 5e9e32dfeb4376adfe5e118080c73b170429e83a
https://github.com/llvm/llvm-project/commit/5e9e32dfeb4376adfe5e118080c73b170429e83a
Author: lrzlin <linrunze at loongson.cn>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
M llvm/test/CodeGen/LoongArch/emergency-spill-slot.ll
A llvm/test/CodeGen/LoongArch/frame-base-dedup-la32.mir
A llvm/test/CodeGen/LoongArch/frame-base-dedup-la64.mir
M llvm/test/CodeGen/LoongArch/stack-clash-prologue.ll
Log Message:
-----------
[LoongArch] Introduce PseudoAddUpperImm to deduplicate stack-frame base address materialization (#217250)
This is largely inspired by
https://github.com/llvm/llvm-project/pull/211748, except some LoongArch
specific changes, which includes merge 12-bit signed immediate into
`ld/st` instructions while materializing the frame index first to
generate a `lu12i.w + add` combo if we could, instead of a `lu12i.w +
ori + add`. So that we could use a `PseudoAddUpperImm` to replace them
for `MachineLateInstrsCleanup` to deduplicate them later on.
This patch improves SPEC CPU2026 `709.cactus_r` performance by 27% (from
1.64 to 2.09).
**edit:** After replacing some `ld/st` with `ldptr/stptr` as long as
their address offset could not fit in 12-bit imm but could fit in 14-bit
one, the `709.cactus_r` slightly improved from **2.09** to **2.16**,
however this is done by `-O3 -mlasx`, with `-O3 -mlsx`, the score
remains at **2.31**, which shows its bottleneck is no longer on address
materialization.
Commit: c1324c4b3404119e3128874351eebb3400c2b5c0
https://github.com/llvm/llvm-project/commit/c1324c4b3404119e3128874351eebb3400c2b5c0
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Semantics/check-allocate.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Lower/CUDA/cuda-gpu-managed-components-order.cuf
A flang/test/Lower/CUDA/cuda-gpu-managed-components.cuf
Log Message:
-----------
[flang][cuda] Implicitly attribute ALLOCATABLE/POINTER components as managed (#223087)
Under `-gpu=mem:managed`, `resolve-names` implicitly attributes
allocatables and
pointers declared in an ordinary scope as managed.
Apply the same attribution to components in `Post(ComponentDecl)`. An
explicitly
attributed component keeps its own attribute, and a translation unit
without
CUDA Fortran enabled is left alone.
Commit: a3d0da5c2c3cbfc1fc2d569700fd1a6b30c751dc
https://github.com/llvm/llvm-project/commit/a3d0da5c2c3cbfc1fc2d569700fd1a6b30c751dc
Author: Yangyu Chen <cyy at cyyself.name>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/cmov-unpredictable-flag.mir
A llvm/test/CodeGen/X86/cmov-unpredictable-mem.mir
Log Message:
-----------
[X86] Preserve node flags when combineCMov rebuilds a CMOV (#223469)
Commit: 5a50c15fa686c9c49b78631ac42b133340867ae3
https://github.com/llvm/llvm-project/commit/5a50c15fa686c9c49b78631ac42b133340867ae3
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-20 (Sun, 20 Sep 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M mlir/include/mlir/Pass/PassOptions.h
Log Message:
-----------
[Support] Remove cl::Sink (#224953)
Nothing uses it: the last users, clang's offloading linker wrappers,
moved to OptTable. The feature would block migration to TableGen based
representation. An unknown option is now always an error.
LLM-aided
Commit: 32150a848d65af432361296bd4a2d7b7de6f01e1
https://github.com/llvm/llvm-project/commit/32150a848d65af432361296bd4a2d7b7de6f01e1
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/AST/OpenMPClause.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
[Clang][OpenMP] NFC: Eliminate `Create/CreateEmpty` for scalar clause (#224935)
Use a normal constructor when the clause has a fixed size.
Keep `Create/CreateEmpty` only when the object needs extra tail storage.
Covers: `looprange, full, partial, bind, depobj, align`
Commit: c64686f1f0cce966ac00480dc4d1a91702536145
https://github.com/llvm/llvm-project/commit/c64686f1f0cce966ac00480dc4d1a91702536145
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[Clang][OpenMP][NFC] Use `getLimitedValue` for loop transform counts (#224940)
Use `getLimitedValue()` when reading integer counts for `unroll, split,
interchange, fuse` transforms.
It avoids direct `getZExtValue()` calls and follows the existing OpenMP
count handling style.
Commit: ea52030d57087b910f6fcfe0fa5206969b48ffbd
https://github.com/llvm/llvm-project/commit/ea52030d57087b910f6fcfe0fa5206969b48ffbd
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/corev/XCVbitmanip-invalid.s
M llvm/test/MC/RISCV/corev/XCVbitmanip.s
Log Message:
-----------
[RISCV][MC] Reject invalid combined immediates for `cv.insert` (#224985)
The CV32E40P specification requires `Is3 + Is2 < 32` for `cv.insert`.
This commit fixes the MC part problem in LLVM.
Link:
https://github.com/openhwfoundation/cv32e40p/blob/cv32e40p_v1.8.3/docs/source/instruction_set_extensions.rst#L600-L604
Commit: 3eaddb5735f63ac1bfe5e27400f457fc38435fb4
https://github.com/llvm/llvm-project/commit/3eaddb5735f63ac1bfe5e27400f457fc38435fb4
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/CMakeLists.txt
M llvm/lib/Target/SystemZ/SystemZ.h
A llvm/lib/Target/SystemZ/SystemZAlignGlobals.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/test/CodeGen/SystemZ/la-01.ll
Log Message:
-----------
[SystemZ] Try to align globals to at least 2 bytes (#224586)
s390x has a minimum ABI alignment of 2 for globals. However, private
globals introduced by optimizations (including directly in the frontend
in the case of promotion of large const variables) are not required to
respect this ABI alignment. To avoid having to go through GOT to load an
unaligned addressed, we should try to raise the alignment of such
globals in the backend. This is done through a new SystemZ-specific
module pass.
Commit: 7d8c2a2f3436df5c564b61b75cd472f2c4a18a7e
https://github.com/llvm/llvm-project/commit/7d8c2a2f3436df5c564b61b75cd472f2c4a18a7e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/test/CodeGenCXX/new_hot_cold.cpp
M clang/test/CodeGenCXX/operator-new.cpp
Log Message:
-----------
[Clang] Do not apply inaccessiblememonly to ::operator new() (#224316)
Do not apply `memory(inaccessiblemem: readwrite, errnomem: write)` to
`::operator new()` style calls (as opposed to `new T`). This matches the
cases where we mark the call as `builtin`, i.e. we only consider it
inaccessiblememonly in the cases where the allocation is also elidable.
I've left the old `noalias` handling alone, so that part keeps being
applied to `::operator new()` as before. Let me know if I should move
that to EmitNewDeleteCall() as well.
Commit: 01e57356732a91d804114acf4cb389d89e9f9635
https://github.com/llvm/llvm-project/commit/01e57356732a91d804114acf4cb389d89e9f9635
Author: Aleksandr Platonov <platonov.aleksandr at huawei.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/Diagnostics.cpp
M clang-tools-extra/clangd/Diagnostics.h
M clang-tools-extra/clangd/FeatureModule.h
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/unittests/FeatureModulesTests.cpp
Log Message:
-----------
[clangd] Extend FeatureModule hooks (#221054)
Feature modules may need to participate at points in AST construction
that `beforeExecute()` and `sawDiagnostic()` cannot represent.
This PR adds:
- `beforePPCallbacks()` for installing preprocessing observers before
clangd starts collecting include and macro events.
- `afterExecute()` for work that needs a completed AST after token
collection and traversal-scope restriction.
- `finalizeDiagnostic()` for transformations that need the complete
diagnostic, including its notes and fixes.
For example, clang-tidy needs to register preprocessing callbacks before
preamble events are replayed, run AST matchers after clangd restricts
the traversal scope, and process diagnostics after their notes and fixes
are attached.
These changes prepare moving the clang-tidy implementation into a
FeatureModule.
RFC:
https://discourse.llvm.org/t/rfc-clangd-move-clang-tidy-integration-into-a-featuremodule/91707
Commit: 1784573db1506040f89bc476fc490ce104206380
https://github.com/llvm/llvm-project/commit/1784573db1506040f89bc476fc490ce104206380
Author: ArdenYang <ardenyang0125 at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
M mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
M mlir/test/Target/LLVMIR/Import/metadata-loop.ll
M mlir/test/Target/LLVMIR/loop-metadata.mlir
Log Message:
-----------
[mlir][LLVMIR] Fix loop follow-up metadata import and export (#223376)
## Problem
MLIR currently exports loop follow-up metadata by wrapping its
properties in an additional self-referencing loop ID:
```llvm
!1 = !{!"llvm.loop.unroll.followup_unrolled", !2}
!2 = distinct !{!2, !3}
!3 = !{!"llvm.loop.mustprogress"}
```
LLVM expects the properties directly after the follow-up name:
```llvm
!1 = !{!"llvm.loop.unroll.followup_unrolled", !3}
!3 = !{!"llvm.loop.mustprogress"}
```
`makeFollowupLoopID` copies the follow-up operands without unwrapping a
nested loop ID. Consequently, properties such as
`llvm.loop.mustprogress` inside the extra wrapper are not recognized as
properties of the resulting loop.
## Changes
- Export follow-up properties directly, excluding the temporary loop
ID's self-reference.
- Update import to read direct property lists.
- Preserve explicitly empty follow-ups, multiple properties, nested
follow-ups, and debug locations.
- Diagnose malformed follow-up metadata and detect cycles to prevent
infinite recursion.
An explicitly empty follow-up is different from an absent follow-up: it
specifies an empty configuration instead of leaving the transformation
to use its default follow-up attributes. Import therefore preserves it
as a non-null, empty `LoopAnnotationAttr`.
This patch corrects MLIR's representation of existing LLVM follow-up
metadata. It does not change LLVM's transformation policies or introduce
automatic attribute inheritance.
## Testing
Built `mlir-translate`, `FileCheck`, `count`, and `not` on Linux using a
Release build with assertions enabled.
All three targeted regression tests passed:
- `mlir/test/Target/LLVMIR/loop-metadata.mlir`
- `mlir/test/Target/LLVMIR/Import/metadata-loop.ll`
- `mlir/test/Target/LLVMIR/Import/import-failure.ll`
`git diff --check` also passed. The full MLIR test suite was not run.
Assisted-by: OpenAI Codex
---------
Co-authored-by: yangzihan <yangzihan at sunmmio.com>
Commit: fe62ed5134de05e1ac19ce914b15797c95eee0dd
https://github.com/llvm/llvm-project/commit/fe62ed5134de05e1ac19ce914b15797c95eee0dd
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/wmma-ptx94-sm100f.py
A llvm/test/CodeGen/NVPTX/wmma-ptx94-sm110f.py
A llvm/test/CodeGen/NVPTX/wmma-ptx94-sm120f.py
A llvm/test/CodeGen/NVPTX/wmma-ptx94-sm90a.py
M llvm/test/CodeGen/NVPTX/wmma.py
Log Message:
-----------
[NVPTX] Add support for ldmatrix extensions introduced in PTX 9.4 (#224264)
This patch adds support for `.s8.s4` types for `ldmatrix` instruction
for `.m8n16` shape introduced in PTX 9.4.
PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-ldmatrix
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 8f0baab45375336f4c972c4800376a4938da0d97
https://github.com/llvm/llvm-project/commit/8f0baab45375336f4c972c4800376a4938da0d97
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
Log Message:
-----------
[ORC] Drive COFFPlatform bootstrap calls via proxies (#225007)
Replace the three callSPSWrapper sites in bootstrapCOFFRuntime (platform
bootstrap, register_jitdylib, register_object_sections) with Proxy
dispatch. CI descriptors are kept local to the .cpp, since these are
COFFPlatform specific.
Commit: 5612c2710b855cccaa277890a281fdd43f3ee92b
https://github.com/llvm/llvm-project/commit/5612c2710b855cccaa277890a281fdd43f3ee92b
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
A llvm/test/Transforms/GVNSink/pseudo-probe.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-emit-macho.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll
Log Message:
-----------
[IR] Mark llvm.pseudoprobe arguments as immarg (#224669)
Per LangRef, llvm.pseudoprobe requires constant integer arguments.
Enforce this by marking them as immarg.
In particular, this prevents invalid sinking of llvm.pseudprobe calls in
GVNSink, which would introduce a phi node for a pseudoprobe argument.
Fixes #166306.
Commit: 2ef17d9c2d8090771aecac3e2e0738eeedd38768
https://github.com/llvm/llvm-project/commit/2ef17d9c2d8090771aecac3e2e0738eeedd38768
Author: David Green <david.green at arm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-basic.ll
M llvm/test/CodeGen/X86/apx/kmov-postrapseudos.ll
A llvm/test/CodeGen/X86/masked-store-illegal-type.ll
M llvm/test/CodeGen/X86/pr179489.ll
M llvm/test/CodeGen/X86/pr46532.ll
Log Message:
-----------
[DAG] Optimize masked store of constant lane mask to standard store (#224255)
A masked store with a constant mask enabling the first n lanes can be
lowered to a standard store of size n.
For example a masked store with masks `<1, 1, 0, 0>` or a scalable store
with mask `llvm.get.active.lane.mask.v4i1.i32(i32 0, i32 2)`
This is a recommit of #223665 with a legal type check to protect against
v1f64 stores on X86 with +avx512.
Commit: 42b886e3f1b8c0f90f69ec16d2945dde8bfeae06
https://github.com/llvm/llvm-project/commit/42b886e3f1b8c0f90f69ec16d2945dde8bfeae06
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M mlir/test/Dialect/SparseTensor/external_direct.mlir
Log Message:
-----------
[Support] Accept only true, false, 1 and 0 for cl::opt<bool> (#224975)
For these internal developer options, accepting `-flag=` (empty
value)/`-flag=True`/`-flag=FALSE` is a weird quirk. To the best of my
knowledge, they are nearly never used. Drop the spellings. In the
future, we will migrate to `-flag`/`-no-flag` (or their double-dash
form).
LLM-aided
Commit: 50a32fcc14d36ecddf3b602530f0e615be9c9aa8
https://github.com/llvm/llvm-project/commit/50a32fcc14d36ecddf3b602530f0e615be9c9aa8
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
A clang/test/CIR/CodeGen/target-lowering-dead-block.cpp
Log Message:
-----------
[CIR] Unreacheable blocks should be target lowered (#224609)
Similar to CXXABILowering and LowerToLLVM, target lowering should also
transform unreacheable blocks to avoid legalization failures.
Commit: 3c85ce724f447a7c2e439d05817b440cb872edd3
https://github.com/llvm/llvm-project/commit/3c85ce724f447a7c2e439d05817b440cb872edd3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/test/CodeGen/LoongArch/test_bl_fixupkind.mir
Log Message:
-----------
LoongArch: Simplify handling of call pseudo operands when expanding. (#224824)
copyImplicitOperands isn't really intended for the call instruction case
where there are also variadic operands. This avoids duplicating the R1
implicit-def operand when expanding calls. This avoids having mixed dead
and not dead flags on the same register, which will fail a future
verifier check.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8f223ba273618835333666ada2a0c3145010f15b
https://github.com/llvm/llvm-project/commit/8f223ba273618835333666ada2a0c3145010f15b
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M orc-rt/CMakeLists.txt
M orc-rt/include/orc-rt-c/support/Compiler.h
M orc-rt/include/orc-rt-internal/tools/OptionParser.h
M orc-rt/include/orc-rt/support/BitmaskEnum.h
M orc-rt/include/orc-rt/support/Error.h
M orc-rt/include/orc-rt/support/ExecutorAddress.h
M orc-rt/include/orc-rt/support/bit.h
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/bedrock/sps/AllSPSCI.cpp
A orc-rt/lib/bedrock/sys/windows/DynamicLibrary.cpp
A orc-rt/lib/bedrock/sys/windows/Memory.cpp
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.cpp
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.h
M orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/bedrock/NativeDylibManagerTest.cpp
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/bedrock/sys/TargetTripleTest.cpp
M orc-rt/test/unit/support/CallableTraitsHelperTest.cpp
M orc-rt/test/unit/support/ErrorExceptionInteropTest.cpp
M orc-rt/test/unit/support/bit-test.cpp
M orc-rt/test/unit/tools/OptionParserTest.cpp
Log Message:
-----------
[orc-rt] msvc portability (#224512)
1. designated initializers are not supported under c++17 in msvc. Clang
seems to support them.
2. Fixed constexpr issues requiring everything to be constexpr in msvc.
Mostly the bit changes.
3. Add stubs for all the platform specific code, they will land in
separate patches.
4. Enabling RTTI/Exceptions for lib and tests.
5. Disable and fix up tests so they can compile and pass, future PRs
will enable and make work properly.
6. Fixed some protection issues in simpleCA.
7. Removed posix only files and darwin only files.
Various other small fixes as necessary to get compiling.
Commit: b67d4ccd1ecdecb5a625e41ee9035eac5ae14652
https://github.com/llvm/llvm-project/commit/b67d4ccd1ecdecb5a625e41ee9035eac5ae14652
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move getConstantStride to vputils (NFC). (#224972)
Move the helper from VPlanTransforms.cpp to vputils, so it can also be
used from other VPlan files.
Commit: cf40ab1dc19aa9b42e0725fec1e5cf34f898a4d4
https://github.com/llvm/llvm-project/commit/cf40ab1dc19aa9b42e0725fec1e5cf34f898a4d4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/WebAssembly.cpp
R clang/test/CodeGen/WebAssembly/exception-model-flag.c
M clang/test/CodeGen/WebAssembly/wasm-exception-model-flag-parse-ir-input.ll
M clang/test/CodeGen/exception-model-flag.c
M clang/test/CodeGenCXX/builtins-eh-wasm.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
M clang/test/CodeGenObjC/wasm32-eh-arc.m
M clang/test/CodeGenObjC/wasm32-eh.m
M clang/test/CodeGenObjCXX/wasm32-eh-objcxx.mm
M clang/test/Driver/wasm-toolchain.c
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/eh-lsda.ll
M llvm/test/CodeGen/WebAssembly/eh-option-errors.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj-phi.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/null-streamer.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-em-sjlj-error.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-invalid-personality.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-sjlj-setjmp-within-catch.ll
Log Message:
-----------
WebAssembly: Remove -wasm-enable-eh cl::opt in favor of -exception-model=wasm (#224313)
The -wasm-enable-eh backend flag was redundant with
-exception-model=wasm: every caller paired the two, and the model already
carries the intent.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 0b665c8649f49dc8e44bec3540694b1662c16ea9
https://github.com/llvm/llvm-project/commit/0b665c8649f49dc8e44bec3540694b1662c16ea9
Author: Yangyu Chen <cyy at cyyself.name>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/cmov-unpredictable-flag.mir
M llvm/test/CodeGen/X86/cmov-unpredictable-mem.mir
Log Message:
-----------
[X86] Fix cmov-unpredictable MIR tests under expensive checks (#225011)
The machine functions have no body, so the MIR parser sets NoVRegs and
leaves TracksLiveness unset, and the verifier rejects the vregs created
by instruction selection. Declare tracksRegLiveness: true and noVRegs:
false, and add -verify-machineinstrs to the RUN lines.
Fixes https://lab.llvm.org/buildbot/#/builders/187/builds/23887 after
#223469 (commit a3d0da5c2c3cbfc1fc2d569700fd1a6b30c751dc).
Assisted-by: Claude Code:claude-fable-5-1
Commit: 3783db502a743ff25462590010c4d91d17c918b3
https://github.com/llvm/llvm-project/commit/3783db502a743ff25462590010c4d91d17c918b3
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M lldb/source/Target/Memory.cpp
Log Message:
-----------
[lldb] [NFC] Fix unused variable warning in MemoryCache::InsertPartialLine (#224973)
A Release build (assertions disabled) warns:
```
lldb/source/Target/Memory.cpp:144:18: warning: unused variable 'line_size' [-Wunused-variable]
144 | const uint32_t line_size = m_L2_cache.GetLineByteSize();
| ^~~~~~~~~
```
`line_size` was read only inside the `assert` that checks a partial-line
insert does not cross a cache line boundary. `assert` expands to nothing
when `NDEBUG` is defined, so the variable becomes unused in that
configuration.
`llvm/docs/CodingStandards.md` covers this shape directly:
```
In the first case, the call to `V.size()` is only useful for the assert,
and we don't want it executed when assertions are disabled. Code like
this should move the call into the assert itself.
```
so call `GetLineByteSize()` in the assert and drop the local.
Verified by building `lldb/source/Target/Memory.cpp` with
`-DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_ASSERTIONS=OFF`: the warning
above reproduces before this change and is gone after it, with a clean
rebuild of the same object file.
Commit: 462f83ce4fff5d7fef0e6beb6b8bb2e568a5d13f
https://github.com/llvm/llvm-project/commit/462f83ce4fff5d7fef0e6beb6b8bb2e568a5d13f
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/test/CodeGen/builtin-clear-padding-codegen.c
M clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
Log Message:
-----------
[Clang] Fix padding clearing logic for packed boolean vectors in big endian (#224033)
The memory layout of packed boolean vectors in big endian mode is quite
involved. This patch adds support for determining the occupied bits of
this type in big endian mode, so that the correct bits are cleared as
padding.
Commit: 622e816cb4bf94ea99e2f1763c5c16b061ec80e2
https://github.com/llvm/llvm-project/commit/622e816cb4bf94ea99e2f1763c5c16b061ec80e2
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-non-native-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-any-of.ll
M llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-fmaxnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/fcmp-uno-fold-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/interleave_uncountable_exits.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/scalarized_conditional_ops_uncountable_exits.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
A llvm/test/Transforms/LoopVectorize/single-early-exit-anyof-fold.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-hint.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/tail_fold_uncountable_exits.ll
Log Message:
-----------
[VPlan] Fix VPInstruction::AnyOf combine undoing freeze (#223640)
There is an any-of combine for unrolled VPlans which does:
any-of (fcmp uno A, A), (fcmp uno B, B), ...-> any-of (fcmp uno A, B)
However any-of implicitly freezes each individual operand and this means
we go from `freeze (fcmp uno A, A)` to `freeze (fcmp uno A, B)` which
isn't sound: https://alive2.llvm.org/ce/z/UdQM7C
This causes miscompiles today with early exit loops that are unrolled,
see the attached test case in single-early-exit-anyof-fold.ll.
This fixes it by explicitly modelling the freeze in VPlan. There are
three places where we use AnyOf:
1) early exit loops: the freeze needs to be applied per-lane, so apply
it as `(any-of (freeze (combined-conds-to-exit)))`
2) handleMaxMinNumReductions: we need to freeze the operands to the
min/max reductions earlier since they have multiple uses introduced and
we don't check the values aren't undef
3) handleFindLastReductions: we need to freeze Cond itself since it's
got multiple uses, but I plan on fixing this in a separate PR
Fable 5.1 was used to help generate the tests
Commit: 3c8ed91159b2144284672cf490cedd7befaba3fa
https://github.com/llvm/llvm-project/commit/3c8ed91159b2144284672cf490cedd7befaba3fa
Author: Marton Moro <moro.marton at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/combine-vmnot-setcc.ll
Log Message:
-----------
[RISCV] Fold vmnot.m of an integer compare into the compare (#222553)
Fold a mask NOT of an integer vector compare into the compare by
inverting
the condition code, so `vmsne.vi` + `vmnot.m` becomes `vmseq.vi`:
(vmxor_vl (setcc_vl a, b, cc), vmset_vl) -> (setcc_vl a, b, !cc)
Only `SETCC_VL` with integer operands, one use and an undef passthru is
handled. The NOT also flips the masked-off lanes, which the inverted compare
would copy unchanged from the passthru, so the passthru must be undef.
The mask can be anything. FP compares are excluded since the inverse of an
ordered compare is unordered.
Fixes #222158
Commit: 723be9c6fceee293c9695aa07c4f9389534934e6
https://github.com/llvm/llvm-project/commit/723be9c6fceee293c9695aa07c4f9389534934e6
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/include/mlir/Analysis/DataFlow/LivenessAnalysis.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
A mlir/test/Transforms/isolated-region-branch-canonicalize.mlir
A mlir/test/Transforms/remove-dead-values-function-root.mlir
A mlir/test/Transforms/remove-dead-values-nested-root.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[MLIR] `remove-dead-values` and RegionBranchOp canononicalizations fixes around the `IsolatedFromAbove` ops (#224831)
I have a downstream op which is both `RegionBranchOpInterface` and
`IsolatedFromAbove`, trying use `remove-dead-values` on it and
especially trying to use this op as pass root uncovered various issues.
* `LivenessAnalysis` were treating yielded values as dead
* `RegionBranchOpInterface` canonicalization were just asserting on
`IsolatedFromAbove`
* When rooting on `func.func` it would leave callers invalid.
* Subsequent canonicalization could reach outside the scope.
Commit: 9e36e5a44bb5ade74202b01246cab4231d202972
https://github.com/llvm/llvm-project/commit/9e36e5a44bb5ade74202b01246cab4231d202972
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
A clang/test/Modules/pr72038.cppm
Log Message:
-----------
[C++20] [Modules] Don't check redeclaration for TagUseKind::Referencekind declaration (#194546)
Close https://github.com/llvm/llvm-project/issues/72038
The reason of the issue is ISO forbids redeclaration between GMF and the
module purview.
But "struct kevent evt;" was thought to be declaration than triggers the
above issue.
In this patch, we simply not checking for cases of TagUseKind::Reference
declaration.
Commit: 16ff0ec65655a16f9a01c20d059d1e6ddb27f6b9
https://github.com/llvm/llvm-project/commit/16ff0ec65655a16f9a01c20d059d1e6ddb27f6b9
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/dllexport.cpp
M clang/test/SemaCXX/dllimport.cpp
Log Message:
-----------
Revert "[Clang] Warn about ignored dllimport on explicit instantiations" (#224971)
Reverts llvm/llvm-project#191392
Causes wrong warnings on libc++
(https://github.com/llvm/llvm-project/pull/191392#issuecomment-5752359615).
Commit: 3d144ccf9a49b8d0f73bc32b03dd1adb2cf33830
https://github.com/llvm/llvm-project/commit/3d144ccf9a49b8d0f73bc32b03dd1adb2cf33830
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/lib/ExecutionEngine/ArmSMEStubs.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
Log Message:
-----------
[mlir] Fix ArmSME ABI stub exports (#224629)
Previously, the `MLIR_ARMSMEABISTUBS_EXPORTED` macro would expand to
`__declspec(dllimport)` when building LLVM as a dylib on Windows. This
would cause a build failure since it is an incorrect annotation on a
function definition.
The intent here is to always export the symbol, so these changes use the
`LLVM_ALWAYS_EXPORT` macro, which properly expands to the right
attribute depending on the compiler / platform.
The effort to build LLVM as a dylib is tracked in #109483.
Commit: 1758952bc409011b935ed814b36e9339f65ee006
https://github.com/llvm/llvm-project/commit/1758952bc409011b935ed814b36e9339f65ee006
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/Support/SMTAPI.h
M llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[llvm] Adjust remaining LLVM_ABI annotation issues (#224619)
Following up from #224293. Some annotations cannot be automatically
adjusted by the ids-check-helper and idt:
* Only headers under llvm/include are parsed. Source files and internal
headers are not.
* Headers are parsed in release mode, so debug-only declarations are
invisible.
* idt ignores private declarations.
These were found while performing a dylib build on Windows.
The effort to build LLVM as a dylib is tracked in #109483.
Commit: 468d2e73112a8e9f5fae4e21ad53526a7dc03262
https://github.com/llvm/llvm-project/commit/468d2e73112a8e9f5fae4e21ad53526a7dc03262
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/docs/InternalsManual.md
Log Message:
-----------
[Clang] Document when to use ExtWarn and Extension (#223440)
Commit: 419a152df732336ffac80a676a81b3cd0560936b
https://github.com/llvm/llvm-project/commit/419a152df732336ffac80a676a81b3cd0560936b
Author: SunilKuravinakop <98882378+SunilKuravinakop at users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-dispatch.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Support for dispatch construct with clauses nocontext & novariants (#215877)
Support for dispatch construct with clauses nocontext & novariants clauses in MLIR
This patch adds the omp.dispatch operation to the OpenMP dialect, along
with the nocontext and novariants clauses, the verifier, and LLVM IR
translation. It is limited to the MLIR layer. Flang lowering follows in
later patches.
Part 1 of 3 of the !$omp dispatch support.
This is derived from
[203320](https://github.com/llvm/llvm-project/pull/203320) (split into 3
parts).
This also Fixes[
#203317](https://github.com/llvm/llvm-project/issues/203317)
---------
Co-authored-by: Sunil Kuravinakop <kuravina at pe31.hpc.amslabs.hpecorp.net>
Commit: 40f30ea173b50c130c01d843b612f9563ca63930
https://github.com/llvm/llvm-project/commit/40f30ea173b50c130c01d843b612f9563ca63930
Author: Rohan Shenoy <RohanRadhesh.Shenoy at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
M llvm/test/CodeGen/X86/inc-of-add.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/sub-of-not.ll
M llvm/test/CodeGen/X86/vector-bo-select.ll
M llvm/test/CodeGen/X86/vector-shift-lut.ll
Log Message:
-----------
[X86] Prefer sub-of-not for vector inc-of-add (#207695)
Avoids lengthening the dependency chain for vector conditional
increments by preferring sub-of-not for vectors. Keeps existing
inc-of-add for scalars.
Fixes #167441
Commit: 16cbb06c5ce1f1632b6d02346147caa17093e788
https://github.com/llvm/llvm-project/commit/16cbb06c5ce1f1632b6d02346147caa17093e788
Author: unexpectedlydefined <91391114+unexpectedlydefined at users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-dwarfdump.md
M llvm/test/tools/llvm-dwarfdump/X86/Inputs/coverage-opt.ll
M llvm/test/tools/llvm-dwarfdump/X86/Inputs/coverage.ll
M llvm/test/tools/llvm-dwarfdump/X86/coverage.test
M llvm/tools/llvm-dwarfdump/Coverage.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
Log Message:
-----------
[llvm-dwarfdump][LineCov] Add --variable-coverage-maybe-undefined option (#220855)
This patch adds a `--variable-coverage-maybe-undefined` flag to
llvm-dwarfdump as part of the recently implemented feature that measures
DWARF coverage of local variables in terms of source lines. This causes
the IR-level analysis to consider variables live if they are defined on
any path, and therefore include lines where the variable may be
undefined. By default, variables must be defined on all paths to be
counted.
Additionally, it includes fixes for a few issues found by @SLTozer and
myself after merging the previous patches:
- Variables not present in the DWARF information that appear in the
baseline are now included in the output.
- The assertion that there are no `undef`/`poison` variable locations in
the IR has been removed, as in some circumstances it is possible to have
a `#dbg_declare(poison)` at `-O0`.
- A small error where entries were inserted into the file name map while
iterating through it has been fixed.
Commit: 4b99afb361a8cfd45fc17aebc637688661e9e472
https://github.com/llvm/llvm-project/commit/4b99afb361a8cfd45fc17aebc637688661e9e472
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/Remarks.h
Log Message:
-----------
[MLIR][NFC] Drop sentinel leftovers from DenseMapInfo<Remark> (#224612)
`DenseMap` no longer uses sentinel keys, and the `getEmptyKey` and
`getTombstoneKey` members of `DenseMapInfo<Remark>` were removed in
#200633 and #201991. Two leftovers stayed behind, the `"<EMPTY_KEY>"`
comparison at the top of `isEqual` and the static dummy `MLIRContext`
that used to back the sentinel remarks.
The comparison is also wrong. A remark literally named `<EMPTY_KEY>`
compares unequal to any other remark, including one with a matching
hash, which breaks the hash and equality contract. This change removes
both leftovers and adds a comment saying what the specialization
compares, which is location, remark name, combined category name and
kind.
No behaviour change for any remark with a normal name. Existing Remark
unit tests and `mlir/test/Pass/remark-final.mlir` cover the
specialization through `RemarkEmittingPolicyFinal`.
Assisted-by: Claude Code (Claude Fable 5.1).
Commit: cdae908ca061cc4bbf0d43a428107770102d460f
https://github.com/llvm/llvm-project/commit/cdae908ca061cc4bbf0d43a428107770102d460f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/elementwise-fma-operand1.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-copyable-element.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/non-power-2-subvector-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-multi-same-nodes.ll
Log Message:
-----------
[SLP]Pass operand info and context to TTI cost queries
Feed operand value info, the context instruction, cast context hints,
and the actual select condition predicate to the TTI cost queries, so
target discounts that depend on them (fused fmul/fma pricing, folded
read-modify-write, constant or uniform operands) apply to both scalar
and vector sides of the SLP cost model. Also make the reversed-store
query describe the stored value instead of the pointer, per the
getMemoryOpCost contract.
Assisted-by: Cursor
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/224931
Commit: 56e8f0393c6ace765f7ae8ca28bfe07151082a5b
https://github.com/llvm/llvm-project/commit/56e8f0393c6ace765f7ae8ca28bfe07151082a5b
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Target/Target.td
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsMachineFunction.cpp
M llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.td
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
A llvm/test/CodeGen/Mips/named-register-aliases.ll
M llvm/test/MC/Mips/mips-register-names-invalid.s
M llvm/test/MC/Mips/mips64-register-names-n32-n64.s
A llvm/test/TableGen/MatchRegisterAltNameWithIndex.td
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[Mips] Introduce ABI-specific register names and accessors (#224284)
To accommodate the P32/P64 ABIs, we need to separate machine registers
from ABI register names and calling-convention roles. The existing
register IDs use OABI names, even when another ABI assigns a different
role to the same physical register.
As a first step, describe OABI, NABI and PABI names with
RegAltNameIndices. Extend TableGen's AsmMatcherEmitter with the opt-in
ShouldEmitMatchRegisterAltNameWithIndex flag, which generates
MatchRegisterAltName(StringRef, unsigned AltIdx). It matches only names
associated with the selected index, allowing the same spelling to
identify different registers across ABIs.
Use the indexed matcher in shared MIPS register lookup for the assembler
and named-register lowering, retaining compatibility aliases and
diagnostics for deprecated spellings.
Add ABI accessors for argument, temporary, saved and return registers,
backed by shared register lists, and use them in lowering code. Keep the
existing register IDs and assembly/MIR spellings for now, with a TODO
for ABI-independent IDs.
Commit: 72e9d33d2945504159c8d316d12c187fc706b156
https://github.com/llvm/llvm-project/commit/72e9d33d2945504159c8d316d12c187fc706b156
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/arm64-zip.ll
A llvm/test/CodeGen/AArch64/vselect-widen-mask-tree.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
M llvm/test/CodeGen/X86/freeze-vector.ll
A llvm/test/CodeGen/X86/vselect-widen-mask-tree.ll
Log Message:
-----------
Reapply "[SelectionDAG] Recurse through mask expression trees in WidenVSELECTMask" (#217307)
WidenVSELECTMask currently handles only two mask shapes: a bare SETCC
or a single AND/OR/XOR of exactly two SETCCs. Anything deeper bails out
to the generic condition widening path, which often introduces
unnecessary narrow/widen roundtrips (xtn+sshll on AArch64,
packssdw+vpmovsxwd on X86).
Replace the hand-coded cases with a recursive widenMaskTree that walks
through SETCC, AND/OR/XOR, FREEZE, VECTOR_SHUFFLE, SELECT/VSELECT, and
all-ones/all-zeros BUILD_VECTORs.
I had to revert #188085 earlier this year. This PR resolves the flagged
issue and cleans up suggested approach to avoid that class of potential
errors.
Commit: 0da8b0febd7d9105a7bd8e38c576a6a469e2c40c
https://github.com/llvm/llvm-project/commit/0da8b0febd7d9105a7bd8e38c576a6a469e2c40c
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
Log Message:
-----------
[MachineScheduler](NFC) Remove separate handling for non-alias loads and stores (#224310)
The separate handling of non-alias loads and stores was always extra
complexity with no pay off. Remove this.
Split from #205689
Commit: d64a0a9effc7704962e21ede22eb0f5ba24e4390
https://github.com/llvm/llvm-project/commit/d64a0a9effc7704962e21ede22eb0f5ba24e4390
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
Log Message:
-----------
[ValueTracking] Make `getUnderlyingObjectsForCodegen()` preserve unidentified objects (#224584)
In some situations, it is useful to inspect the underlying objects of a
memory operation, even if they may alias with one another. A concrete
example comes from the approach to schedule DAG construction I've been
developing (see #205689) where these objects are used to infer that a
class of control dependencies between memory operations is redundant,
whereby eliminating the compile time cost of recording them. Update
`getUnderlyingObjectsForCodegen()` to return these objects.
Split from https://github.com/llvm/llvm-project/pull/205689
Commit: 466df937833ef60bc9f549a01059869ca7143d32
https://github.com/llvm/llvm-project/commit/466df937833ef60bc9f549a01059869ca7143d32
Author: Cheng-Chieh Liu <jay87406 at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[APFloat] Fix sign bit corrupting exponent in unsigned FP8 formats (#223286)
`convertIEEEFloatToAPInt` unconditionally ORs the sign bit into the top
bit of the encoded value. `Float8E8M0FNU` and `Float8E5M3FNU` have no
sign bit (`hasSignedRepr = false`), so that top bit actually belongs to
the exponent field. Encoding a value with sign set therefore corrupts
the exponent, in one case colliding with the reserved NaN bit pattern.
Guard the OR with `hasSignedRepr`, matching the existing check in the
decode path (`initFromIEEEAPInt`).
Extend `ConvertLosesUnrepresentableSignAndZero` to also check
`bitcastToAPInt()` after dropping an unrepresentable sign, using `-1.0`
instead of `-2.0` so the corruption is actually visible in the bits.
Commit: 8472e4556c064de7251ac82e0993bdaf05978841
https://github.com/llvm/llvm-project/commit/8472e4556c064de7251ac82e0993bdaf05978841
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang/lib/Semantics/check-omp-syntax.cpp
M flang/test/Semantics/OpenMP/allocate_do1.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/depend05.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
M flang/test/Semantics/OpenMP/from-clause-v45.f90
M flang/test/Semantics/OpenMP/map-modifiers-v60.f90
M flang/test/Semantics/OpenMP/to-clause-v45.f90
M flang/test/Semantics/OpenMP/uses-allocators-version50.f90
M flang/test/Semantics/OpenMP/uses-allocators-version51.f90
Log Message:
-----------
[flang][OpenMP] Reword some diagnostic messages, NFC (#224945)
Instead of "something...something in OpenMP vX.Y on SOME clause" say
"something...something on SOME clause in OpenMP vX.Y".
Commit: 038f5968616a3b466e790084bc72eab62d6a6743
https://github.com/llvm/llvm-project/commit/038f5968616a3b466e790084bc72eab62d6a6743
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/revec-non-pow2.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction-i1-mask.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/cmp-ptr-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-different-vf.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-vf-to-resize.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP]Cost-based choice of the i1 reduction form
i1 reductions (and/or of <n x i1>, add of zexted <n x i1>) can be
emitted as the plain target reduction or in the bitcast-based form
(bitcast to the scalar int type plus a compare for and/or, plus ctpop
for add). Choose the cheaper form by cost, estimating the bitcast-based
form from its emitted components; the ctpop form is estimated as the
cheaper of the scalar bitcast+ctpop and the vector ctpop on the mask
type.
Fixes #40657
Reviewers: michaelselehov, RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/223163
Commit: 7818c91f7151a50df614fae9211eedfbfd32e938
https://github.com/llvm/llvm-project/commit/7818c91f7151a50df614fae9211eedfbfd32e938
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/convert-ri-addi-to-ri.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
M llvm/test/CodeGen/PowerPC/fixup-kill-dead-flag-crash.mir
M llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
M llvm/test/CodeGen/PowerPC/fold-rot-and-peephole.mir
M llvm/test/CodeGen/PowerPC/jump-tables-collapse-rotate-remove-SrcMI.mir
M llvm/test/CodeGen/PowerPC/mi-peephole-forwarding-undef.mir
M llvm/test/CodeGen/PowerPC/mi-peephole.mir
M llvm/test/CodeGen/PowerPC/peephole-combineRLWINM-liveness.mir
M llvm/test/CodeGen/PowerPC/peephole-counter-XToI.mir
M llvm/test/CodeGen/PowerPC/peephole-counter-perOp.mir
M llvm/test/CodeGen/PowerPC/peephole-livevars-tracking.mir
M llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir
M llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir
M llvm/test/CodeGen/PowerPC/sext_elimination.mir
Log Message:
-----------
PowerPC: Remove LiveVariables dependency from PPCMIPeephole (#222416)
PPCMIPeephole only used LiveVariables to keep kill/dead flags valid
after its transforms, and made no real use of the analysis.
A later LiveVariables run recomputes those flags from scratch anyway, so
just clear possbly stale kill/dead flags on changed registers.
PPCMIPeephole was the only user of LiveVariables at this point in the
pipeline, so also drop the explicit LiveVariables run before
PPCTLSDynamicCallPass, whose comment references a > 10 year old build
bot failure.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 61978757eca575e2743471ddf7bcfb7e3a3979e4
https://github.com/llvm/llvm-project/commit/61978757eca575e2743471ddf7bcfb7e3a3979e4
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/test/CodeGen/SPIRV/AtomicBuiltinsFloat.ll
M llvm/test/CodeGen/SPIRV/atomicrmw-storage-class-semantics.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/unmerge-crash-0.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/unmerge-crash-1.ll
A llvm/test/CodeGen/SPIRV/fence-shader.ll
M llvm/test/CodeGen/SPIRV/fence.ll
M llvm/test/CodeGen/SPIRV/transcoding/AtomicCompareExchangeExplicit_cl20.ll
M llvm/test/CodeGen/SPIRV/transcoding/AtomicCompareExchange_cl20.ll
Log Message:
-----------
[SPIR-V] Add storage class bits to fence and generic atomic semantics (#223023)
A barrier only orders the memory it names, and we named none, so fences
ordered nothing
Name every class the target can reach, generic pointers had the same gap
in atomics
Commit: 87c971d36345c0ff4f7a7ae75080bd55e83e4fca
https://github.com/llvm/llvm-project/commit/87c971d36345c0ff4f7a7ae75080bd55e83e4fca
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-root.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
Log Message:
-----------
[SLP]Emit loop-carried horizontal reductions as loop vector accumulator
A reduction whose root is the backedge value of a loop accumulator phi
is emitted as a lane-wise vector accumulator in the loop plus a single
reduction in the exit blocks, instead of a horizontal reduction on every
iteration. The loop-carried dependency chain becomes lane-wise and the
reduction is paid once per loop execution.
Note: It is partial vectorization within the loop, LV cannot handle it.
SLP already does something similar with multi-register reductions,
this adds another level - phi-based loop accumulator reductions.
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/221598
Commit: 92d07f56b285805edb4ea6ca0d348b2b0f80aa2d
https://github.com/llvm/llvm-project/commit/92d07f56b285805edb4ea6ca0d348b2b0f80aa2d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/MemoryAccessSPSCI.h
Log Message:
-----------
[ORC] Mangle memory-access CI names as C rather than Verbatim (#225066)
Flip the memory-access wrapper descriptors (MemoryAccessSPSCI.h) from
Verbatim to C., so their names carry the target's C mangling (a leading
'_' on Darwin, no-op elsewhere). First step of moving the ORC runtime
controller-interface names to C to match an upcoming runtime change. The
controller (recordProxy) and the in-tree executor (OrcRTBootstrap,
mangledCopy) mangle these same specs, so they stay in sync; nothing else
defines these names.
Commit: dca7629f289f3dc92efb80557463f08d56255365
https://github.com/llvm/llvm-project/commit/dca7629f289f3dc92efb80557463f08d56255365
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
clang-sycl-linker: Compute the DataLayout from the triple (#224376)
Seed the module's DataLayout from the target triple directly rather than
from TargetMachine::createDataLayout().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: df7b30abf4f1976b17c4d2c1a7177608c64dc529
https://github.com/llvm/llvm-project/commit/df7b30abf4f1976b17c4d2c1a7177608c64dc529
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Don't pass the sentinel to vector::__{insert,init}_with_size (#224583)
We don't make use of the sentinel anymore, so we don't need to pass it
around.
This was originally part of #214132. However, that patch has a difficult
to track down performance issue. I'm splitting it up to make the search
easier.
Commit: a9f4d3ff18c554d29bbabc546f9a9df0376701e0
https://github.com/llvm/llvm-project/commit/a9f4d3ff18c554d29bbabc546f9a9df0376701e0
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector-compress.mir
Log Message:
-----------
[GlobalISel] Add G_VECTOR_COMPRESS support of computeKnownBits & computeNumSignBits (#223967)
Port the value tracking for ISD::VECTOR_COMPRESS to the GlobalISel
G_VECTOR_COMPRESS. Each result lane is either a lane of the source or
the passthrough operand, so:
- KnownBits is the intersection of the source and passthrough and,
- the number of sign bits is the minimum of the two.
Commit: f10b0b1554d31fdea2dd3963e179fa75ea2e262e
https://github.com/llvm/llvm-project/commit/f10b0b1554d31fdea2dd3963e179fa75ea2e262e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/Wasm.cpp
Log Message:
-----------
[clang][Interpreter] Do not overwrite the module's DataLayout (#224027)
The incremental CUDA device and Wasm executors reset the module's
DataLayout from TargetMachine::createDataLayout() before codegen. These
modules are produced by clang's own CodeGen, so already have a datalayout so
this is redundant. This also avoids using the TargetMachine copy of the datalayout,
which will eventually be removed.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d3d2960ebb9d98850662a6ce53864b10c4f94586
https://github.com/llvm/llvm-project/commit/d3d2960ebb9d98850662a6ce53864b10c4f94586
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/liboffload/CMakeLists.txt
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/CMakeLists.txt
Log Message:
-----------
[offload][omp] link libomptarget against liboffload (#221730)
This first creates a static version of liboffload and links
libomptarget against it instead of linking the plugins directly. This
allows libomptarget to access the plugins both directly and through
liboffload in the subsequent PRs to starte the migration to liboffload.
Assisted by Claude.
Commit: f5dd45d427bee1a958cfcd35b1155da9391cc4e1
https://github.com/llvm/llvm-project/commit/f5dd45d427bee1a958cfcd35b1155da9391cc4e1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/exit-value-nowrap-flags.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-correlated-end.ll
M llvm/test/Analysis/ScalarEvolution/trip-count13.ll
Log Message:
-----------
[SCEV] Use computeMaxBECountForLT for howManyGreaterThans. (#224863)
Instead of checking for overflow of IV > RHS we can instead check ~IV <
~RHS.
This allows removing canIVOverflowOnGT, by extending canIVOverflowOnLT
and computeMaxBECountForLT to invert the operands if needed, replacing
hand rolled logic in howManyGreaterThans.
This improves results in some cases, because computeMaxBECountForLT
covers some additional cases:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1371.
This is also the last step in preparation for using howManyLessThans for
howManyGreaterThans.
PR: https://github.com/llvm/llvm-project/pull/224863
Commit: 94eb926803f2fa755b3f487a4220e13ac7348c83
https://github.com/llvm/llvm-project/commit/94eb926803f2fa755b3f487a4220e13ac7348c83
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
M libsycl/unittests/event/async_handler.cpp
Log Message:
-----------
[libsycl] Integrate context to async handlers. (#224050)
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 233f1108a8235fe4568f7eae5ace8ae492825e94
https://github.com/llvm/llvm-project/commit/233f1108a8235fe4568f7eae5ace8ae492825e94
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/windows/TargetTriple.cpp
M orc-rt/test/unit/bedrock/sys/TargetTripleTest.cpp
Log Message:
-----------
[orc-rt] Implement Windows target triple detection (#224514)
Adds Windows target triple detection for ORC-RT.
Currently supports x86-64 MSVC targets only. ARM64 will be added once
tested on that platform.
Commit: 0a40cb2bbd3d7887947c9f4a8a4a0d031e0ac76c
https://github.com/llvm/llvm-project/commit/0a40cb2bbd3d7887947c9f4a8a4a0d031e0ac76c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
R libc/src/__support/CPP/vector.h
M libc/test/src/__support/CPP/CMakeLists.txt
R libc/test/src/__support/CPP/vector_test.cpp
Log Message:
-----------
[libc][CPP][NFC] Remove unused cpp::vector container (#224976)
Removed cpp::vector (added in 5afbbd04803c) and its unit tests.
The group and password database entrypoints now pack auxiliary pointer
arrays into the trailing scratch space of DynamicBuffer (7252edd9aa82),
leaving cpp::vector with no callers in the codebase.
Assisted-by: Automated tooling, human reviewed.
Commit: 69172de43c4cdf4fa9de7826f6f3e4174b33a0f2
https://github.com/llvm/llvm-project/commit/69172de43c4cdf4fa9de7826f6f3e4174b33a0f2
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
A clang/test/OpenMP/nvptx_target_teams_ompx_bare_kernel_environment_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
A clang/test/OpenMP/target_teams_host_kernel_environment_codegen.cpp
M clang/test/OpenMP/target_teams_map_codegen.cpp
M clang/test/OpenMP/target_teams_num_teams_codegen.cpp
M clang/test/OpenMP/target_teams_thread_limit_codegen.cpp
M clang/test/OpenMP/teams_codegen.cpp
M clang/test/OpenMP/teams_distribute_codegen.cpp
M clang/test/OpenMP/teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[clang][flang][omp] Always generate a kernel environment (#223772)
Currently OpenMP doesn't generate a Kernel Enviroment for host kernels
or ompx_bare kernels. This causes the runtime to have special handling
for this cases.
This patch ensures that a Kernel Environment is always generated which
will allow to simplify the RTL handling.
Done mostly by Claude.
Commit: 3e4b32a108999591908ca254ac53aa81d7a1acb9
https://github.com/llvm/llvm-project/commit/3e4b32a108999591908ca254ac53aa81d7a1acb9
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/CMakeLists.txt
A llvm/cmake/WiXPerMachinePatch.xml
M llvm/docs/ReleaseNotes.md
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
workflows/release-binaries: Improve Windows installer (#220414)
The Windows WiX installer was missing two things for its setup:
1. The "product ID" which is used to uninstall any previous installed
LLVM versions. This avoids having versions living side-by-side with each
new release. I've reused the same GUID as the current 23.1.0 Win64
installer, to continue that "line" of product. The AArch64 installation
and any prior LLVM version (NSIS) before 23.1.0 will need to be
uninstalled manually, if we want to avoid side-by-side installatin.
2. A "per machine" scope which avoids messy installations which are
installed globally, but cannot be uninstalled globally, and available
only for the current user. After this PR, the installation is available
/ uninstallable to all users on the machine.
Since LLVM currently requires cmake 3.20 for building, and hasn't been
bumped yet to 3.31, also provide a workaround for the WiX scope setup.
Added a release note to signify that users would need to uninstall the
previous versions manually.
Assisted by Claude Opus 5.
Commit: bc9e7ae8e828ffa5f59f700a8a0d5fb54e0f6ba9
https://github.com/llvm/llvm-project/commit/bc9e7ae8e828ffa5f59f700a8a0d5fb54e0f6ba9
Author: Kamlesh Kumar <kamlesh.kumar at arm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/vector-interleave-consecutive-splats.ll
Log Message:
-----------
[SelectionDAG] fold interleave of contiguous splats (#224318)
When operands of vector_interleave is splats and each splat's is from a
contiguous source , interleave operations can be folded to shuffles of
source of splat.
i.e.
interleave(splat(S[J]), splat(S[J+1]), splat(S[J+2]), ..., splat(S[J +
Factor - 1]))
can be folded to
shuffles (S[J], S[J+1], S[J+Factor -1], S[J]....)
Commit: 04b52bf1dc212b3af60d3d071defa4e034ece382
https://github.com/llvm/llvm-project/commit/04b52bf1dc212b3af60d3d071defa4e034ece382
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/Lowering/ternary.cir
Log Message:
-----------
[CIR] Fix assertion with pointer offset in ternary (#224724)
Ternary lowers into some blocks, so the values that come into it end up
being block arguments, so there is no defining op for them. As a result,
the 'optimization' of the zero/subtract isn't really possible. THis
patch uses a dyn_cast_if_present instead of a dyn_cast to make sure we
don't hit that.
Commit: ddc7d4b3b43be5ef26671c19035761fb84a40388
https://github.com/llvm/llvm-project/commit/ddc7d4b3b43be5ef26671c19035761fb84a40388
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/test/CodeGen/Hexagon/copy-to-combine-const64.mir
M llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir
Log Message:
-----------
Hexagon: Don't duplicate the PC def when converting a return to L4_return (#225059)
Commit: 1dfe26e2259d80c442f0b4be66198316e2b8229d
https://github.com/llvm/llvm-project/commit/1dfe26e2259d80c442f0b4be66198316e2b8229d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/test/LTO/ARM/runtime-library-subtarget.ll
A llvm/test/LTO/RISCV/merged-module-datalayout.ll
M llvm/test/LTO/X86/cfi_endproc.ll
M llvm/test/LTO/X86/linkonce_odr_func.ll
Log Message:
-----------
LTO: Stop overwriting the merged module's DataLayout (#223987)
LTOCodeGenerator::optimize() unconditionally reset the merged module's
DataLayout from TargetMachine::createDataLayout(). The merged module
already carries the correct DataLayout since IRMover propagates the source
module's layout into the empty destination. The module should be the source of
truth for its DataLayout.
Recomputing it from the TargetMachine is also latently wrong, since the
DataLayout depends on the target-abi module flag which the
TargetMachine's cached DataLayout cannot account for.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8bc1cbb53e6476adfc57b7ccbdda80837ac034f9
https://github.com/llvm/llvm-project/commit/8bc1cbb53e6476adfc57b7ccbdda80837ac034f9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SimpleNativeMemoryMapSPSCI.h
M llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
Log Message:
-----------
[ORC] Mangle SimpleNativeMemoryMap CI names as C (#225074)
Flip the SimpleNativeMemoryMap memory-manager descriptors (instance +
reserve/initialize/deinitialize/release) from Verbatim to C, so their
names carry the target's C mangling. The controller and in-tree executor
mangle the same specs, and no other provider defines these names, so
they stay in sync; nothing else defines these names.
Also update the CreateFromExecutionSession test to use the process
triple so that its name mangling matches the target mangling above.
Commit: 8bc145f7c62d6d426ebfba7d2e297b4ecc9d4dd7
https://github.com/llvm/llvm-project/commit/8bc145f7c62d6d426ebfba7d2e297b4ecc9d4dd7
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_err.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_t16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-real16.txt
Log Message:
-----------
[AMDGPU][MC] Upstream gfx11 true16 disassembler test coverage (#223823)
Upstream new gfx11 disassembler test cases, mostly covering true16
operand
(.l/.h) and op_sel decoding that had no upstream coverage.
Commit: 95b14f3dd3db293caec8b51fad2a93373b07c587
https://github.com/llvm/llvm-project/commit/95b14f3dd3db293caec8b51fad2a93373b07c587
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libsycl/test/usm/memset.cpp
Log Message:
-----------
[libsycl][lit] Disable usm/memset.cpp (#225093)
Sporadically failing, see
https://github.com/llvm/llvm-project/issues/225092.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: fd4bcc57cd7f2aabc409768097a976edc40ff05b
https://github.com/llvm/llvm-project/commit/fd4bcc57cd7f2aabc409768097a976edc40ff05b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
Log Message:
-----------
[AMDGPU] Do not fold clamp when only one max source has modifiers (#224517)
Fix isClamp to bail if either max source has a modifier, not only when
both do. Previously `max(x, |x|)` was wrongly folded as if it were x
Commit: b569f8d694e9cec6fef18dfde2f2a76bc9f84983
https://github.com/llvm/llvm-project/commit/b569f8d694e9cec6fef18dfde2f2a76bc9f84983
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate-nested-allocatable-mapper.f90
Log Message:
-----------
[Flang][FIR] Handle SequenceTypes in isRecordWithAllocatableMember (#224048)
Currently isRecordWithAllocatableMember does not handle sequence types,
either at the top level on the input type or in subsequent nestings, it
will effectively skip them. This is quite different to how
isRecordWithDescriptorMember handles these cases, as it does in fact
unwrap sequence types to correctly dictate if there are descriptor
members inside of a record type.
This PR simply aims to align the behaviour with
isRecordWithDescriptorMember, as there are several locations where
isRecordWithAllocatableMember is being used and the expectation is that
it will indicate if there's an allocatable member inside of the record
type irrespective of sequence types being part of the equation.
Commit: 1e635d09d53d4a8656ed92bfa139a19f1012cd3d
https://github.com/llvm/llvm-project/commit/1e635d09d53d4a8656ed92bfa139a19f1012cd3d
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/windows/CPUFeatures.cpp
M orc-rt/test/unit/bedrock/sys/CPUFeaturesTest.cpp
Log Message:
-----------
[orc-rt] Implement Windows CPU feature detection (#224516)
Adds Windows CPU feature detection for ORC-RT.
Currently supports x86-64 using the Windows/MSVC CPU feature interfaces.
Additional architectures can be added as needed.
Commit: 975b5d2336389fbf282e38158d84aa1e14a8a304
https://github.com/llvm/llvm-project/commit/975b5d2336389fbf282e38158d84aa1e14a8a304
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/test/Driver/systemz-features.cpp
M clang/test/Sema/zvector.c
Log Message:
-----------
[SystemZ][z/OS] Extend systemz-features.cpp and zvector.c with z/OS RUN lines (#224733)
Add `s390x-ibm-zos` RUN lines to
`clang/test/Driver/systemz-features.cpp`
covering the default, `-mhtm`/`-mno-htm`, and `-mvx`/`-mno-vx` cases.
The `-mvx` z/OS lines require `-march=arch11` because the default z/OS
CPU (zEC12) pre-dates vector support.
Add a second RUN in `clang/test/Sema/zvector.c` using triple
`s390x-ibm-zos` with `-target-cpu z13` so the file is exercised under
the z/OS code path.
These test extensions were carved out from
https://github.com/llvm/llvm-project/pull/223026 per reviewer request
(@uweigand): the extra test runs are good additions but are not related
to the i128 XPLINK64 change.
Commit: 9028ff14b18ea678683a4960306051044160bb67
https://github.com/llvm/llvm-project/commit/9028ff14b18ea678683a4960306051044160bb67
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sched.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/aarch64/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/riscv/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/x86_64/clone.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/sched/CMakeLists.txt
A libc/src/sched/clone.h
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/clone.cpp
M libc/src/threads/CMakeLists.txt
M libc/test/src/sched/CMakeLists.txt
A libc/test/src/sched/linux/CMakeLists.txt
A libc/test/src/sched/linux/clone_test.cpp
Log Message:
-----------
[libc] Implement clone(2) and use it in thread spawning (#224257)
This patch implements an internal clone syscall wrapper and uses it both
to implement the public clone(2) entry point and to spawn new threads in
libc's thread implementation.
Previously, thread creation in thread.cpp invoked the raw SYS_clone
syscall directly, requiring target-specific inline assembly or register
variables and subtle tricks with __builtin_frame_address to pass
arguments to start_thread in the newly spawned thread.
By introducing an inline assembly clone wrapper that sets up func and
arg on the child stack and jumps to the entry function upon clone
returning in the child, we can simplify start_thread to a normal
function taking a single void * argument and eliminate the frame pointer
hacks as well as the need to compile thread.cpp with
-fno-omit-frame-pointer or optimizations.
The public clone(2) entrypoint delegates to this wrapper after unpacking
its varargs and validating pointers (returning EINVAL like glibc).
A particularly tricky aspect of this patch is the invalidation of the
cached thread IDs. As with fork(), we do this in the parent, but we
cannot do this safely for clone() in all situations. The problematic
case is where the user does not set a custom TLS block (which means the
child uses the parent's block), does not clone the address space (no
copy-on-write), and does not suspend the parent (vfork semantics). In
this case, we just give up and don't touch the thread ID. For this
particular flag, most of the operations in the child are not safe, so
we're assuming the user is prepared for such a restricted environment.
Support is implemented for x86_64, aarch64, and riscv. The
architecture-specific assembly is split out into detail::clone_impl
inside per-architecture headers.
Assisted-by: Gemini
Commit: 6b07a4d1c81ea6cdcc1e569299b0a2a628e49f70
https://github.com/llvm/llvm-project/commit/6b07a4d1c81ea6cdcc1e569299b0a2a628e49f70
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
A clang/test/Parser/ms-lambda-capture.clcpp
A clang/test/Parser/ms-lambda-capture.cpp
A clang/test/Parser/ms-lambda-capture.hip
A clang/test/ParserHLSL/ms-lambda-capture.hlsl
Log Message:
-----------
[clang] Disambiguate lambdas from Microsoft attributes (#214247)
With -fms-extensions, a CUDA/HIP lambda capture list can be consumed as
a Microsoft attribute list. This causes attributed lambdas used in
direct initialization to be misparsed as function declarators.
Tentatively inspect the tokens following the capture list and any
trailing attributes to identify lambdas before parsing Microsoft
attributes.
Assisted by: Cursor / Claude Opus 4.8
Commit: 86bd6bf6adbb266d2f4f5e0625d57e6b983220fb
https://github.com/llvm/llvm-project/commit/86bd6bf6adbb266d2f4f5e0625d57e6b983220fb
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/docs/DirectX/SemanticSignatures.md
M llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/unittests/Frontend/HLSLSemanticSignaturePackingTest.cpp
Log Message:
-----------
[HLSLSemanticSignatures] Implement the prefix packing of elements (#218062)
Implements the prefix packing algorithm.
Resolves: #204889.
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 16f37d13492079a0740837e1d04f3841f13fcfa4
https://github.com/llvm/llvm-project/commit/16f37d13492079a0740837e1d04f3841f13fcfa4
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
Log Message:
-----------
[IR] Use `uint64_t` when assigning `getZExtValue` into `I` (#224648)
This prevents a potential multiplication overflow when a constant is
later built with `ConstantInt::get()`. This fixes an issues reported by
a CodeQL scan.
Commit: 35006688eb78eb5b601e282d21701f430d737888
https://github.com/llvm/llvm-project/commit/35006688eb78eb5b601e282d21701f430d737888
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sched.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
R libc/src/__support/OSUtil/linux/syscall_wrappers/aarch64/clone.h
R libc/src/__support/OSUtil/linux/syscall_wrappers/clone.h
R libc/src/__support/OSUtil/linux/syscall_wrappers/riscv/clone.h
R libc/src/__support/OSUtil/linux/syscall_wrappers/x86_64/clone.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/sched/CMakeLists.txt
R libc/src/sched/clone.h
M libc/src/sched/linux/CMakeLists.txt
R libc/src/sched/linux/clone.cpp
M libc/src/threads/CMakeLists.txt
M libc/test/src/sched/CMakeLists.txt
R libc/test/src/sched/linux/CMakeLists.txt
R libc/test/src/sched/linux/clone_test.cpp
Log Message:
-----------
Revert "[libc] Implement clone(2) and use it in thread spawning" (#225111)
Reverts llvm/llvm-project#224257: Fails to build on risc-v.
Commit: 525d9e9db6a49f39c4eaaad879d0464b70991ef5
https://github.com/llvm/llvm-project/commit/525d9e9db6a49f39c4eaaad879d0464b70991ef5
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M libcxx/include/__iterator/capacity_aware_iterator.h
M libcxx/include/__optional/optional.h
M libcxx/include/__optional/optional_ref.h
M libcxx/test/libcxx/iterators/capacity_aware_iter/arithmetic.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/assert.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/comparison.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/contiguous.verify.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/dereference.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/types.compile.pass.cpp
Log Message:
-----------
[libc++] Remove `_Tag` template parameter from __capacity_aware_iterator (#224983)
Since it was decided that `_Tag`'s benefit of preventing iterator mixups
didn't outweigh the added compile times and extra template
instantiations, remove it and all locations that used
`__capacity_aware_iterator` (so just `optional`).
Commit: 050b5650ff5c905a8d80beb31244c72f8551ba5b
https://github.com/llvm/llvm-project/commit/050b5650ff5c905a8d80beb31244c72f8551ba5b
Author: Anirudh Mathur <126768505+anirudhmathur12 at users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplate.cpp
A clang/test/SemaCXX/GH220525.cpp
Log Message:
-----------
[Clang][Sema] Don't treat error-recovery dependence as genuine template dependence in ActOnTag (#221440)
When a template argument fails to resolve (e.g. a namespace name used
where a value is expected), Sema substitutes a RecoveryExpr with a
dependent type so downstream code can recover gracefully. This
error-induced dependence was being conflated with genuine template
parameter dependence in ActOnTag's handling of TagUseKind::Reference/
Friend, causing computeDeclContext to report failure the same way it
would for an actually-dependent nested-name-specifier. This tripped an
assert in ActOnExplicitInstantiation that assumes dependent names can't
reach explicit instantiation, when in fact the diagnostic had already
been emitted at the point the RecoveryExpr was created.
Fixes #220525
Commit: c0a7197865180e8aee11f96fd84e3c1037b69d20
https://github.com/llvm/llvm-project/commit/c0a7197865180e8aee11f96fd84e3c1037b69d20
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes aa6b03e (#224915)
This fixes aa6b03ed5a9ffe5ba6f0d945fac9961884b5c6ed (#198062).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=aa6b03ed5a9ffe5ba6f0d945fac9961884b5c6ed
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: aec1f9ce37aea8005a3b1a5d4acf4988d6487813
https://github.com/llvm/llvm-project/commit/aec1f9ce37aea8005a3b1a5d4acf4988d6487813
Author: Jan André Reuter <j.reuter at fz-juelich.de>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
A offload/test/ompt/host_op_id_emi.c
Log Message:
-----------
[Offload][OMPT][NFC] Add test for `host_op_id` consistency (#201144)
Add test to ensure that `host_op_id` is correctly passed for external
monitoring interface callbacks. A set `host_op_id` during
`ompt_scope_begin` should show up during `ompt_scope_end`.
This catches cases like 2c8ca9679e85e466e8d7105027df322d03c45e3d, where
a nested `data_op` callback caused an incorrect `host_op_id` on the
outer `ompt_scope_end` event (fixed by
9de6f9e7c8d1faabf7e7e49ba49e6d6f3af21373).
---------
Signed-off-by: Jan André Reuter <j.reuter at fz-juelich.de>
Commit: 5ed8a18c43ad9d328df1cfa08e3377933e6ea398
https://github.com/llvm/llvm-project/commit/5ed8a18c43ad9d328df1cfa08e3377933e6ea398
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Give musl LLVM tools 8 MiB worker stacks (#223989)
LLVM 23 ThinLTO can overflow musl's 128 KiB default pthread stack in
`DSEState::eliminateRedundantStoresViaDominatingConditions`, crashing
`ld.lld` on valid input. Add `-Wl,-z,stack-size=8388608` to
`Support.linkopts` for musl Bazel builds, using the
`@rules_cc//cc/libc:musl` constraint already used by `config.bzl`. [musl
supports increasing default pthread stacks through
`PT_GNU_STACK`](https://wiki.musl-libc.org/functional-differences-from-glibc.html).
Downstream validation on LLVM 23.1.0 in
https://github.com/hermeticbuild/hermetic-llvm/pull/753 reproduced the
crash with a captured link and a synthetic 1000-block ThinLTO input. A
musl linker rebuilt with the same linker option advertised an 8 MiB
`GNU_STACK` and passed both cases.
On this upstream branch, Buildifier, `git diff --check`, and
`llvm-check-pr-format` pass (no changed C/C++ files). No fresh
upstream-main LLVM build was performed.
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 3eb0f2b9251df770a0140d140d17bc6e53f69e44
https://github.com/llvm/llvm-project/commit/3eb0f2b9251df770a0140d140d17bc6e53f69e44
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/TrieRawHashMap.h
M llvm/include/llvm/CodeGen/MIRFSDiscriminator.h
M llvm/include/llvm/CodeGen/MIRSampleProfile.h
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/include/llvm/DebugInfo/CodeView/DebugFrameDataSubsection.h
M llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h
M llvm/include/llvm/DebugInfo/PDB/Native/InfoStreamBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/CompileUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/Layer.h
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
M llvm/include/llvm/ExecutionEngine/RuntimeDyldChecker.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Object/GOFF.h
M llvm/include/llvm/ProfileData/GCOV.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
Log Message:
-----------
[llvm] Remove declarations without definitions (NFC) (#225020)
ThreadSafeTrieRawHashMapBase::getImpl in
llvm/include/llvm/ADT/TrieRawHashMap.h: Added on October 29, 2024 in
commit b510cdb895b9188e5819c4c85a6dab22a4d14385 without a definition or
any callers.
MIRAddFSDiscriminators::getNumFSBBs and
MIRAddFSDiscriminators::getNumFSSamples in
llvm/include/llvm/CodeGen/MIRFSDiscriminator.h: Added on May 18, 2021 in
commit 886629a8c9e58752627d8ae7abf6fa93191a3df8 without definitions or
any callers.
MIRProfileLoaderPass::init in
llvm/include/llvm/CodeGen/MIRSampleProfile.h: Added on August 18, 2021
in commit 5fdaaf7fd8f35ac9c9de50a45b09e29c7b0d48c4 without a definition
or any callers.
ModuloScheduleExpanderMVE::generateKernelPhi in
llvm/include/llvm/CodeGen/ModuloSchedule.h: Added on June 12, 2024 in
commit 0c5319e546321d7a766999e49e0ccf801ff2b3dc without a definition or
any callers.
codeview::DebugFrameDataSubsection::setFrames in
llvm/include/llvm/DebugInfo/CodeView/DebugFrameDataSubsection.h: Added
on June 14, 2017 in commit a8cfc29c9a3e39a18f576a2820a7a259654fe953
without a definition or any callers.
gsym::DwarfTransformer::parse in
llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h: Added on
February 11, 2020 in commit 19602b71949db1f840b262558c832c5f73722c7e
without a definition or any callers.
logicalview::LVLogicalVisitor::printMemberAttributes (both overloads) in
llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h:
Added on February 27, 2023 in commit
e7950fceb1e7f82370f6cff80b258e552eb410a6 without definitions or any
callers.
pdb::InfoStreamBuilder::finalize in
llvm/include/llvm/DebugInfo/PDB/Native/InfoStreamBuilder.h: Added on
January 20, 2017 in commit 60667ca0b2b95ee25dace3f8627feda5a904cd8f
without a definition or any callers.
orc::SimpleCompiler::manglingOptionsForTargetMachine in
llvm/include/llvm/ExecutionEngine/Orc/CompileUtils.h: Added on
January 21, 2020 in commit ce2207abaf9a925b35f15ef92aaff6b301ba6d22
without a definition or any callers.
orc::DLLImportDefinitionGenerator::getTargetPointerSize and
orc::DLLImportDefinitionGenerator::getEndianness in
llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h: The definitions
and callers were removed on January 14, 2025 in commit
4eaff6c58ae2f130ac8d63cf2c87bbb483114876.
orc::IRMaterializationUnit::getInitSymbol in
llvm/include/llvm/ExecutionEngine/Orc/Layer.h: Added on December 16,
2019 in commit 85fb997659b55101b58e3545733e581bf4ed9cf2 without a
definition or any callers.
orc::loadMachOLinkableFile in
llvm/include/llvm/ExecutionEngine/Orc/MachO.h: Added on August 28, 2024
in commit 7a4013f029c4d360a9374ff49b5d17479fcb03df without a definition
or any callers (when renaming loadMachORelocatableObject in the header
while leaving the definition in MachO.cpp named
loadMachORelocatableObject).
RuntimeDyldChecker::getSectionLoadAddress in
llvm/include/llvm/ExecutionEngine/RuntimeDyldChecker.h: The definition
and callers were removed on April 8, 2019 in commit
941f247d30c447903107aa614ea46fb1e4019698.
hlsl::rootsig::verifyRangeType in
llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h: The
definition and caller were removed on September 10, 2025 in commit
9e778f6cd155f64896a9a0580e96aa4814ca999b.
FenceInst::Init in llvm/include/llvm/IR/Instructions.h: Added on
July 25, 2011 in commit fee02c6c1378f7244e05157aa9b07da77061fb64 without
a definition or any callers.
initializeDXILMetadataAnalysisWrapperPrinterPass and
initializeLogicalSROALegacyPassPass in
llvm/include/llvm/InitializePasses.h:
initializeDXILMetadataAnalysisWrapperPrinterPass was added on August 12,
2024 in commit 03e6675fc78783d0d0b0a784eccbd5ff19de23a2, and
initializeLogicalSROALegacyPassPass was added on July 20, 2026 in commit
03b5c5285eaf0acdc1dc30c5be6e0a7cefeab16f, both without definitions or
any callers.
createCustomBehaviour, createInstrPostProcess, and
createInstrumentManager in llvm/include/llvm/MC/TargetRegistry.h:
createCustomBehaviour and createInstrPostProcess were added on July 24,
2021 in commit dbed061bf13b74cbbe6de3062f7f50481dd45ac4, and
createInstrumentManager was added on November 4, 2022 in commit
98e342dca23729dd4e9cdc5f25c647d617b94283, all without definitions or any
callers (only the corresponding methods on Target were defined).
object::DXContainer::parseSignature in
llvm/include/llvm/Object/DXContainer.h: Added on October 5, 2023 in
commit 9f87522b121a08b97aff433e8b53dec1acf7c9d0 without a definition or
any callers.
object::Record::getContinuousData and
object::{TXTRecord,HDRRecord,ESDRecord,RLDRecord,ENDRecord}::getData in
llvm/include/llvm/Object/GOFF.h: RLDRecord::getData was added on
April 28, 2023 in commit 2fa6bcf02f1585df3af6d0081215e23c07421f43
without a definition or any callers; the definitions and callers of
Record::getContinuousData, TXTRecord::getData, HDRRecord::getData,
ESDRecord::getData, and ENDRecord::getData were removed on August 13,
2026 in commit 5f59554a392283f9f047b51ca5e562179e2e37d8.
GCOVBlock::getLineCount in llvm/include/llvm/ProfileData/GCOV.h: The
definition and callers were removed on September 13, 2020 in commit
4d7b19454397103620394dcceaf29592ef195231.
sandboxir::CmpInst::createCommon in
llvm/include/llvm/SandboxIR/Instruction.h: Added on September 4, 2024 in
commit 840da2e8ba7e0f77938adfc6f6d315137542a1b8 without a definition or
any callers.
cl::expandResponseFiles (4-argument overload) in
llvm/include/llvm/Support/CommandLine.h: Added on August 22, 2022 in
commit b934be2c059a99351d08069bb80155e49f047b6e without a definition or
any callers.
DebugCounter::parseChunks in llvm/include/llvm/Support/DebugCounter.h:
The definition and callers were removed on January 5, 2026 in commit
7f9a00e59c569110ac2bdaa5f21d26eff9c1de65.
sys::fs::status_known (2-argument overload) in
llvm/include/llvm/Support/FileSystem.h: Added on November 24, 2010 in
commit 96bcfcf2c2907519cd765debce94082f421f0829 without a definition or
any callers.
Xtensa::getCPUFeatures and Xtensa::fillValidCPUList in
llvm/include/llvm/TargetParser/XtensaTargetParser.h: Added on August 12,
2025 in commit 48da8489f2c1d416658527f6b806d618abd5ab73 without matching
definitions or any callers (XtensaTargetParser.cpp defined overloads
taking std::vector<StringRef> & instead of
SmallVectorImpl<StringRef> &).
Assisted-by: Antigravity
Commit: 7ff51d0e1895b0b27556e3da3b15142555ce0b07
https://github.com/llvm/llvm-project/commit/7ff51d0e1895b0b27556e3da3b15142555ce0b07
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/test/Integration/Dialect/XeGPU/WG/simple_3d_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_3d_mxfp_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
[MLIR][XeGPU] Update WG integration tests to strict property syntax (#222457)
XeGPU enabled strict properties in its assembly format (b73a8b8d8c17),
so inherent attributes such as the `layout`/`layout_*` operands of
load_nd, store_nd, prefetch_nd, dpas and dpas_mx must be spelled in a
prop-dict (`<{...}>`) instead of the discardable attr-dict (`{...}`).
Several workgroup level integration tests were missed by that update and
now fail to parse.
Commit: 64dad8b0453e32472bc47c5874145b06950c9aa1
https://github.com/llvm/llvm-project/commit/64dad8b0453e32472bc47c5874145b06950c9aa1
Author: leovance <leovancekang at outlook.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
Log Message:
-----------
[mlir][OpenACC][NFC] Fix par_width syntax in code examples (#222291)
Update the acc.predicate_region documentation and the ACCCGToGPU example
to use the explicit par_dim(...) syntax required since #217298.
These examples still use the old attribute-dictionary spelling. This is
a documentation-only change; operation definitions and lowering behavior
are unchanged.
Commit: 39e01e7fab62551ff1b4f6407af80ba011948c1e
https://github.com/llvm/llvm-project/commit/39e01e7fab62551ff1b4f6407af80ba011948c1e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
Log Message:
-----------
[SCEV] Move getSCEVAtExit() into ScalarEvolution (#225102)
Exit value replacement only needs to know the value at a specific exit,
while getSCEVAtScope() provides one that is valid at *any* exit. It has
some custom code to at least handle the case of addrecs.
Uplift this code into SCEV as getSCEVAtExit(). For now it just does the
same thing the code in LoopUtils did.
Commit: 267f92f79b2de95202af0df2b4488a004e0639a5
https://github.com/llvm/llvm-project/commit/267f92f79b2de95202af0df2b4488a004e0639a5
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
Log Message:
-----------
[CIR][NFC] Fix VectorType element-type description (#224827)
Fix the VectorType element-type description
Commit: 4f611fa8e0c770753d5006d2cb934cde9a8a6831
https://github.com/llvm/llvm-project/commit/4f611fa8e0c770753d5006d2cb934cde9a8a6831
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
Fix bazel build for clang/unittests:serialization_tests (#225134)
Fixes https://github.com/llvm/llvm-project/pull/224528 (commit
f970f59a9d4e) by adding missing //clang:ast dependency.
Commit: 2e7f48adb2c1ec1fdd15486289583e4e1668bb56
https://github.com/llvm/llvm-project/commit/2e7f48adb2c1ec1fdd15486289583e4e1668bb56
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/aux_arg.ll
Log Message:
-----------
[SandboxVec][BottomUpVec][NFC] Use AuxPassArg for BundleVec pass aux args (#224777)
This patch replaces the original logic that processes the bundle-vec
auxiliary arguments with the AuxPassArg classes.
Commit: b9de5cffed097d5fd434d7c4b43121cc01aac4a3
https://github.com/llvm/llvm-project/commit/b9de5cffed097d5fd434d7c4b43121cc01aac4a3
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-21 (Mon, 21 Sep 2026)
Changed paths:
M .github/workflows/libclang-abi-tests.yml
M clang-tools-extra/clang-tidy/modernize/UseNullptrCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseNullptrCheck.h
M clang-tools-extra/clangd/Diagnostics.cpp
M clang-tools-extra/clangd/Diagnostics.h
M clang-tools-extra/clangd/FeatureModule.h
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/unittests/FeatureModulesTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-nullptr.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-t.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr.cpp
M clang/docs/InternalsManual.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/Parse/Parser.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Basic/Targets/M68k.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
A clang/test/AST/ByteCode/Inputs/default-ctor.cppm
A clang/test/AST/ByteCode/Inputs/module.modulemap
A clang/test/AST/ByteCode/Inputs/redecl1.h
A clang/test/AST/ByteCode/module-default-ctor.cpp
A clang/test/AST/ByteCode/module-redecl1.cpp
A clang/test/CIR/CodeGen/target-lowering-dead-block.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/Lowering/ternary.cir
R clang/test/CodeGen/WebAssembly/exception-model-flag.c
M clang/test/CodeGen/WebAssembly/wasm-exception-model-flag-parse-ir-input.ll
M clang/test/CodeGen/builtin-clear-padding-codegen.c
M clang/test/CodeGen/exception-model-flag.c
M clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
M clang/test/CodeGenCXX/builtins-eh-wasm.cpp
M clang/test/CodeGenCXX/new_hot_cold.cpp
M clang/test/CodeGenCXX/operator-new.cpp
M clang/test/CodeGenCXX/wasm-eh.cpp
M clang/test/CodeGenObjC/wasm32-eh-arc.m
M clang/test/CodeGenObjC/wasm32-eh.m
M clang/test/CodeGenObjCXX/wasm32-eh-objcxx.mm
M clang/test/Driver/baremetal.cpp
M clang/test/Driver/loongarch-toolchain.c
M clang/test/Driver/systemz-features.cpp
M clang/test/Driver/wasm-toolchain.c
A clang/test/Modules/concept-specialization-deserialization.cppm
M clang/test/Modules/pr102360.cppm
A clang/test/Modules/pr72038.cppm
M clang/test/Modules/redecl-add-after-load.cpp
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
A clang/test/OpenMP/nvptx_target_teams_ompx_bare_kernel_environment_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
A clang/test/OpenMP/target_teams_host_kernel_environment_codegen.cpp
M clang/test/OpenMP/target_teams_map_codegen.cpp
M clang/test/OpenMP/target_teams_num_teams_codegen.cpp
M clang/test/OpenMP/target_teams_thread_limit_codegen.cpp
M clang/test/OpenMP/teams_codegen.cpp
M clang/test/OpenMP/teams_distribute_codegen.cpp
M clang/test/OpenMP/teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M clang/test/Parser/decltype-crash.cpp
A clang/test/Parser/ms-lambda-capture.clcpp
A clang/test/Parser/ms-lambda-capture.cpp
A clang/test/Parser/ms-lambda-capture.hip
A clang/test/ParserHLSL/ms-lambda-capture.hlsl
M clang/test/Sema/zvector.c
A clang/test/SemaCXX/GH220525.cpp
M clang/test/SemaCXX/dllexport.cpp
M clang/test/SemaCXX/dllimport.cpp
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/unittests/Serialization/LoadSpecLazilyTest.cpp
M compiler-rt/lib/builtins/extendhfsf2.c
M compiler-rt/lib/builtins/fp_extend.h
M compiler-rt/lib/builtins/fp_trunc.h
M compiler-rt/lib/builtins/truncsfhf2.c
M flang/docs/OpenMPSupport.md
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Semantics/check-allocate.cpp
M flang/lib/Semantics/check-omp-syntax.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Lower/CUDA/cuda-gpu-managed-components-order.cuf
A flang/test/Lower/CUDA/cuda-gpu-managed-components.cuf
A flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate-nested-allocatable-mapper.f90
M flang/test/Semantics/OpenMP/allocate_do1.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/depend05.f90
M flang/test/Semantics/OpenMP/depobj-construct-v52.f90
M flang/test/Semantics/OpenMP/from-clause-v45.f90
M flang/test/Semantics/OpenMP/map-modifiers-v60.f90
M flang/test/Semantics/OpenMP/to-clause-v45.f90
M flang/test/Semantics/OpenMP/uses-allocators-version50.f90
M flang/test/Semantics/OpenMP/uses-allocators-version51.f90
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/grp.yaml
M libc/include/sys/mman.yaml
M libc/src/__support/CPP/CMakeLists.txt
R libc/src/__support/CPP/vector.h
M libc/src/__support/File/file.cpp
M libc/src/__support/File/file.h
M libc/src/grp/CMakeLists.txt
A libc/src/grp/getgrgid_r.cpp
A libc/src/grp/getgrgid_r.h
A libc/src/grp/getgrnam_r.cpp
A libc/src/grp/getgrnam_r.h
M libc/src/grp/grp_utils.cpp
M libc/src/grp/grp_utils.h
M libc/src/sys/mman/linux/mlock2.cpp
M libc/src/sys/mman/mlock2.h
M libc/test/src/__support/CPP/CMakeLists.txt
R libc/test/src/__support/CPP/vector_test.cpp
M libc/test/src/grp/CMakeLists.txt
A libc/test/src/grp/getgrgid_r_test.cpp
A libc/test/src/grp/getgrnam_r_test.cpp
M libcxx/include/CMakeLists.txt
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__flat_map/flat_multimap.h
M libcxx/include/__flat_set/flat_multiset.h
M libcxx/include/__flat_set/flat_set.h
M libcxx/include/__iterator/capacity_aware_iterator.h
A libcxx/include/__iterator/static_packed_bounded_iter.h
M libcxx/include/__optional/optional.h
M libcxx/include/__optional/optional_ref.h
M libcxx/include/__vector/vector.h
M libcxx/include/module.modulemap.in
M libcxx/include/queue
M libcxx/include/stack
M libcxx/test/libcxx/iterators/capacity_aware_iter/arithmetic.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/assert.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/comparison.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/contiguous.verify.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/dereference.pass.cpp
M libcxx/test/libcxx/iterators/capacity_aware_iter/types.compile.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/arithmetic.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/assert.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/comparison.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/ctor.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/dereference.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/layout.compile.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/types.compile.pass.cpp
A libcxx/test/libcxx/iterators/static_packed_bounded_iter/valid.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.map/types.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/types.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.multiset/types.verify.cpp
A libcxx/test/std/containers/container.adaptors/flat.set/types.verify.cpp
R libcxx/test/std/containers/container.adaptors/priority.queue/priqueue.members/empty.verify.cpp
R libcxx/test/std/containers/container.adaptors/priority.queue/types.compile.fail.cpp
A libcxx/test/std/containers/container.adaptors/priority.queue/types.verify.cpp
R libcxx/test/std/containers/container.adaptors/queue/queue.defn/empty.verify.cpp
R libcxx/test/std/containers/container.adaptors/queue/queue.defn/types.compile.fail.cpp
A libcxx/test/std/containers/container.adaptors/queue/queue.defn/types.verify.cpp
R libcxx/test/std/containers/container.adaptors/stack/stack.defn/empty.verify.cpp
R libcxx/test/std/containers/container.adaptors/stack/stack.defn/types.compile.fail.cpp
A libcxx/test/std/containers/container.adaptors/stack/stack.defn/types.verify.cpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
M libsycl/test/usm/memset.cpp
M libsycl/unittests/event/async_handler.cpp
M lldb/bindings/interface/SBStringListExtensions.i
M lldb/source/API/SBProgress.cpp
M lldb/source/Core/Progress.cpp
M lldb/source/Target/Memory.cpp
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
A lldb/test/API/python_api/sbstringlist/TestSBStringList.py
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBProgressTest.cpp
M llvm/CMakeLists.txt
A llvm/cmake/WiXPerMachinePatch.xml
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CommandGuide/llvm-dwarfdump.md
M llvm/docs/CommandLine.md
M llvm/docs/DirectX/SemanticSignatures.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/TrieRawHashMap.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/CodeGen/CodeGenTargetMachineImpl.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MIRFSDiscriminator.h
M llvm/include/llvm/CodeGen/MIRSampleProfile.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/include/llvm/CodeGen/RegAllocEvictionAdvisor.h
M llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/DebugInfo/CodeView/DebugFrameDataSubsection.h
M llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h
M llvm/include/llvm/DebugInfo/PDB/Native/InfoStreamBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/CompileUtils.h
A llvm/include/llvm/ExecutionEngine/Orc/Dlfcn.h
A llvm/include/llvm/ExecutionEngine/Orc/DlfcnSPS.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/ExecutionEngine/Orc/Layer.h
M llvm/include/llvm/ExecutionEngine/Orc/MachO.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/DlfcnSPSCI.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/MemoryAccessSPSCI.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SimpleNativeMemoryMapSPSCI.h
M llvm/include/llvm/ExecutionEngine/RuntimeDyldChecker.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Object/GOFF.h
M llvm/include/llvm/ProfileData/GCOV.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/File.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/SMTAPI.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
M llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
M llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/LTO/LTOCodeGenerator.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULibFunc.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.h
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/M68k/M68kInstrData.td
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/lib/Target/M68k/M68kTargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsMachineFunction.cpp
M llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.td
M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/SystemZ/CMakeLists.txt
M llvm/lib/Target/SystemZ/SystemZ.h
A llvm/lib/Target/SystemZ/SystemZAlignGlobals.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/VE/VETargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/XCore/XCoreTargetMachine.cpp
M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
A llvm/test/Analysis/CostModel/AArch64/speculative-load.ll
A llvm/test/Analysis/CostModel/X86/speculative-load.ll
M llvm/test/Analysis/ScalarEvolution/exit-value-nowrap-flags.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-correlated-end.ll
M llvm/test/Analysis/ScalarEvolution/trip-count13.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector-compress.mir
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
A llvm/test/CodeGen/AArch64/sve-vector-interleave-legalize.ll
A llvm/test/CodeGen/AArch64/vector-interleave-consecutive-splats.ll
A llvm/test/CodeGen/AArch64/vselect-widen-mask-tree.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
A llvm/test/CodeGen/AMDGPU/detect-dead-lanes-tied-undef.mir
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-regsequence-undef.mir
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v2i16.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-basic.ll
M llvm/test/CodeGen/Hexagon/copy-to-combine-const64.mir
M llvm/test/CodeGen/LoongArch/emergency-spill-slot.ll
A llvm/test/CodeGen/LoongArch/frame-base-dedup-la32.mir
A llvm/test/CodeGen/LoongArch/frame-base-dedup-la64.mir
M llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
M llvm/test/CodeGen/LoongArch/stack-clash-prologue.ll
M llvm/test/CodeGen/LoongArch/test_bl_fixupkind.mir
M llvm/test/CodeGen/M68k/inline-asm.ll
M llvm/test/CodeGen/MIR/Hexagon/bundled-call-site-info.mir
M llvm/test/CodeGen/MLRegAlloc/default-eviction-advisor.ll
M llvm/test/CodeGen/MLRegAlloc/default-priority-advisor.ll
M llvm/test/CodeGen/Mips/cconv/arguments-float.ll
M llvm/test/CodeGen/Mips/cconv/arguments-struct.ll
M llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
M llvm/test/CodeGen/Mips/cconv/arguments.ll
M llvm/test/CodeGen/Mips/cconv/callee-saved-float.ll
M llvm/test/CodeGen/Mips/cconv/callee-saved.ll
M llvm/test/CodeGen/Mips/cconv/memory-layout.ll
A llvm/test/CodeGen/Mips/cconv/o32-fp64-gpr-moves.ll
A llvm/test/CodeGen/Mips/cconv/o32-mips64.ll
M llvm/test/CodeGen/Mips/cconv/reserved-space.ll
M llvm/test/CodeGen/Mips/cconv/return-float.ll
M llvm/test/CodeGen/Mips/cconv/return-hard-float.ll
M llvm/test/CodeGen/Mips/cconv/return-struct.ll
M llvm/test/CodeGen/Mips/cconv/return.ll
M llvm/test/CodeGen/Mips/cconv/stack-alignment.ll
A llvm/test/CodeGen/Mips/named-register-aliases.ll
M llvm/test/CodeGen/NVPTX/insert-vector-elt-shuffle-i8.ll
A llvm/test/CodeGen/NVPTX/wmma-ptx94-sm100f.py
A llvm/test/CodeGen/NVPTX/wmma-ptx94-sm110f.py
A llvm/test/CodeGen/NVPTX/wmma-ptx94-sm120f.py
A llvm/test/CodeGen/NVPTX/wmma-ptx94-sm90a.py
M llvm/test/CodeGen/NVPTX/wmma.py
M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/convert-ri-addi-to-ri.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-out-of-range.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
M llvm/test/CodeGen/PowerPC/fixup-kill-dead-flag-crash.mir
M llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
M llvm/test/CodeGen/PowerPC/fold-rot-and-peephole.mir
M llvm/test/CodeGen/PowerPC/jump-tables-collapse-rotate-remove-SrcMI.mir
M llvm/test/CodeGen/PowerPC/mi-peephole-forwarding-undef.mir
M llvm/test/CodeGen/PowerPC/mi-peephole.mir
M llvm/test/CodeGen/PowerPC/peephole-combineRLWINM-liveness.mir
M llvm/test/CodeGen/PowerPC/peephole-counter-XToI.mir
M llvm/test/CodeGen/PowerPC/peephole-counter-perOp.mir
M llvm/test/CodeGen/PowerPC/peephole-livevars-tracking.mir
M llvm/test/CodeGen/PowerPC/peephole-miscompile-extswsli.mir
M llvm/test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir
M llvm/test/CodeGen/PowerPC/sext_elimination.mir
A llvm/test/CodeGen/RISCV/rvv/combine-vmnot-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/SPIRV/AtomicBuiltinsFloat.ll
M llvm/test/CodeGen/SPIRV/atomicrmw-storage-class-semantics.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/unmerge-crash-0.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/unmerge-crash-1.ll
A llvm/test/CodeGen/SPIRV/fence-shader.ll
M llvm/test/CodeGen/SPIRV/fence.ll
M llvm/test/CodeGen/SPIRV/transcoding/AtomicCompareExchangeExplicit_cl20.ll
M llvm/test/CodeGen/SPIRV/transcoding/AtomicCompareExchange_cl20.ll
M llvm/test/CodeGen/SystemZ/la-01.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/eh-lsda.ll
M llvm/test/CodeGen/WebAssembly/eh-option-errors.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj-phi.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/null-streamer.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-em-sjlj-error.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-invalid-personality.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-sjlj-setjmp-within-catch.ll
M llvm/test/CodeGen/X86/apx/kmov-postrapseudos.ll
M llvm/test/CodeGen/X86/apx/optimize-compare-multipred.mir
M llvm/test/CodeGen/X86/bfloat.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
A llvm/test/CodeGen/X86/cmov-unpredictable-flag.mir
A llvm/test/CodeGen/X86/cmov-unpredictable-mem.mir
M llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
M llvm/test/CodeGen/X86/freeze-vector.ll
M llvm/test/CodeGen/X86/freeze.ll
M llvm/test/CodeGen/X86/inc-of-add.ll
A llvm/test/CodeGen/X86/masked-store-illegal-type.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/pr179489.ll
M llvm/test/CodeGen/X86/pr46532.ll
A llvm/test/CodeGen/X86/process-implicit-defs-tied-undef.mir
M llvm/test/CodeGen/X86/regallocfast-undef-tied-use.mir
M llvm/test/CodeGen/X86/sub-of-not.ll
M llvm/test/CodeGen/X86/vector-bo-select.ll
M llvm/test/CodeGen/X86/vector-shift-lut.ll
A llvm/test/CodeGen/X86/vselect-widen-mask-tree.ll
M llvm/test/LTO/ARM/runtime-library-subtarget.ll
A llvm/test/LTO/RISCV/merged-module-datalayout.ll
M llvm/test/LTO/X86/cfi_endproc.ll
M llvm/test/LTO/X86/linkonce_odr_func.ll
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_err.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_t16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-real16.txt
M llvm/test/MC/M68k/Data/Classes/MxMoveCCR.s
M llvm/test/MC/M68k/Data/Classes/MxMoveSR.s
M llvm/test/MC/Mips/mips-register-names-invalid.s
M llvm/test/MC/Mips/mips64-register-names-n32-n64.s
M llvm/test/MC/RISCV/corev/XCVbitmanip-invalid.s
M llvm/test/MC/RISCV/corev/XCVbitmanip.s
M llvm/test/MC/RISCV/corev/XCVsimd-invalid.s
M llvm/test/MC/RISCV/corev/XCVsimd.s
A llvm/test/MachineVerifier/tied-undef-use.mir
A llvm/test/TableGen/AMDGPUTargetDefLDSAllocGranularity.td
A llvm/test/TableGen/MatchRegisterAltNameWithIndex.td
A llvm/test/Transforms/ConstraintElimination/mul-with-overflow.ll
A llvm/test/Transforms/ConstraintElimination/uadd-with-overflow.ll
M llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll
A llvm/test/Transforms/GVNSink/pseudo-probe.ll
M llvm/test/Transforms/HipStdPar/math-fixup.ll
M llvm/test/Transforms/LoopInterchange/memory-instr-ratio.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/partial-unroll-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/early-exit-with-speculative-load-basic.ll
A llvm/test/Transforms/LoopVectorize/AArch64/early-exit-with-speculative-load-load-types.ll
A llvm/test/Transforms/LoopVectorize/AArch64/early-exit-with-speculative-load-safety.ll
A llvm/test/Transforms/LoopVectorize/AArch64/early-exit-with-speculative-load-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-non-native-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/early-exit-with-speculative-load-oracle.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-any-of.ll
M llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-fmaxnum-reductions.ll
M llvm/test/Transforms/LoopVectorize/fcmp-uno-fold-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/interleave_uncountable_exits.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/scalarized_conditional_ops_uncountable_exits.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
A llvm/test/Transforms/LoopVectorize/single-early-exit-anyof-fold.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-hint.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/tail_fold_uncountable_exits.ll
M llvm/test/Transforms/LoopVectorize/unsupported_early_exit.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-root.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/revec-non-pow2.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/elementwise-fma-operand1.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction-i1-mask.ll
A llvm/test/Transforms/SLPVectorizer/PowerPC/extracted-subfields-be.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reduced-copyable-element.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/cmp-ptr-minmax.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/non-power-2-subvector-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-different-vf.ll
A llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-multi-same-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-vf-to-resize.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-emit-macho.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll
M llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/aux_arg.ll
M llvm/test/tools/llvm-dwarfdump/X86/Inputs/coverage-opt.ll
M llvm/test/tools/llvm-dwarfdump/X86/Inputs/coverage.ll
M llvm/test/tools/llvm-dwarfdump/X86/coverage.test
M llvm/tools/llvm-dwarfdump/Coverage.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
M llvm/unittests/Frontend/HLSLSemanticSignaturePackingTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/release/build_llvm_release.bat
M llvm/utils/release/github-upload-release.py
M mlir/include/mlir/Analysis/DataFlow/LivenessAnalysis.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/IR/Remarks.h
M mlir/include/mlir/Pass/PassOptions.h
M mlir/include/mlir/Transforms/Passes.td
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/ExecutionEngine/ArmSMEStubs.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
M mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SparseTensor/external_direct.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_3d_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_3d_mxfp_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
M mlir/test/Target/LLVMIR/Import/import-failure.ll
M mlir/test/Target/LLVMIR/Import/metadata-loop.ll
M mlir/test/Target/LLVMIR/loop-metadata.mlir
A mlir/test/Target/LLVMIR/openmp-dispatch.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
A mlir/test/Transforms/isolated-region-branch-canonicalize.mlir
A mlir/test/Transforms/remove-dead-values-function-root.mlir
A mlir/test/Transforms/remove-dead-values-nested-root.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M offload/CMakeLists.txt
M offload/liboffload/CMakeLists.txt
M offload/liboffload/src/OffloadImpl.cpp
M offload/libomptarget/CMakeLists.txt
A offload/test/ompt/host_op_id_emi.c
M orc-rt/CMakeLists.txt
M orc-rt/include/orc-rt-c/support/Compiler.h
M orc-rt/include/orc-rt-internal/tools/OptionParser.h
M orc-rt/include/orc-rt/support/BitmaskEnum.h
M orc-rt/include/orc-rt/support/Error.h
M orc-rt/include/orc-rt/support/ExecutorAddress.h
M orc-rt/include/orc-rt/support/bit.h
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/bedrock/sps/AllSPSCI.cpp
M orc-rt/lib/bedrock/sys/posix/DynamicLibrary.cpp
M orc-rt/lib/bedrock/sys/posix/Memory.cpp
M orc-rt/lib/bedrock/sys/posix/PageSize.cpp
M orc-rt/lib/bedrock/sys/posix/SocketHandle.cpp
M orc-rt/lib/bedrock/sys/windows/CPUFeatures.cpp
A orc-rt/lib/bedrock/sys/windows/DynamicLibrary.cpp
A orc-rt/lib/bedrock/sys/windows/Memory.cpp
M orc-rt/lib/bedrock/sys/windows/TargetTriple.cpp
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.cpp
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.h
M orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/bedrock/NativeDylibManagerTest.cpp
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/bedrock/sys/CPUFeaturesTest.cpp
M orc-rt/test/unit/bedrock/sys/TargetTripleTest.cpp
M orc-rt/test/unit/support/CallableTraitsHelperTest.cpp
M orc-rt/test/unit/support/ErrorExceptionInteropTest.cpp
M orc-rt/test/unit/support/bit-test.cpp
M orc-rt/test/unit/tools/OptionParserTest.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
fix windows
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/809faaf4ef9a...b9de5cffed09
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