[all-commits] [llvm/llvm-project] 56e8f0: [Mips] Introduce ABI-specific register names and a...

[Jiaxun Yang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 56e8f0393c6ace765f7ae8ca28bfe07151082a5b
      https://github.com/llvm/llvm-project/commit/56e8f0393c6ace765f7ae8ca28bfe07151082a5b
  Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
  Date:   2026-09-21 (Mon, 21 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Target/Target.td
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.h
    M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
    M llvm/lib/Target/Mips/Mips.td
    M llvm/lib/Target/Mips/MipsFastISel.cpp
    M llvm/lib/Target/Mips/MipsISelLowering.cpp
    M llvm/lib/Target/Mips/MipsISelLowering.h
    M llvm/lib/Target/Mips/MipsMachineFunction.cpp
    M llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
    M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsRegisterInfo.td
    M llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
    M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
    A llvm/test/CodeGen/Mips/named-register-aliases.ll
    M llvm/test/MC/Mips/mips-register-names-invalid.s
    M llvm/test/MC/Mips/mips64-register-names-n32-n64.s
    A llvm/test/TableGen/MatchRegisterAltNameWithIndex.td
    M llvm/utils/TableGen/AsmMatcherEmitter.cpp

  Log Message:
  -----------
  [Mips] Introduce ABI-specific register names and accessors (#224284)

To accommodate the P32/P64 ABIs, we need to separate machine registers
from ABI register names and calling-convention roles. The existing
register IDs use OABI names, even when another ABI assigns a different
role to the same physical register.

As a first step, describe OABI, NABI and PABI names with
RegAltNameIndices. Extend TableGen's AsmMatcherEmitter with the opt-in
ShouldEmitMatchRegisterAltNameWithIndex flag, which generates
MatchRegisterAltName(StringRef, unsigned AltIdx). It matches only names
associated with the selected index, allowing the same spelling to
identify different registers across ABIs.

Use the indexed matcher in shared MIPS register lookup for the assembler
and named-register lowering, retaining compatibility aliases and
diagnostics for deprecated spellings.

Add ABI accessors for argument, temporary, saved and return registers,
backed by shared register lists, and use them in lowering code. Keep the
existing register IDs and assembly/MIR spellings for now, with a TODO
for ABI-independent IDs.



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