[all-commits] [llvm/llvm-project] 2ef17d: [DAG] Optimize masked store of constant lane mask ...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2ef17d9c2d8090771aecac3e2e0738eeedd38768
      https://github.com/llvm/llvm-project/commit/2ef17d9c2d8090771aecac3e2e0738eeedd38768
  Author: David Green <david.green at arm.com>
  Date:   2026-09-21 (Mon, 21 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
    M llvm/test/CodeGen/Hexagon/autohvx/vector-align-basic.ll
    M llvm/test/CodeGen/X86/apx/kmov-postrapseudos.ll
    A llvm/test/CodeGen/X86/masked-store-illegal-type.ll
    M llvm/test/CodeGen/X86/pr179489.ll
    M llvm/test/CodeGen/X86/pr46532.ll

  Log Message:
  -----------
  [DAG] Optimize masked store of constant lane mask to standard store (#224255)

A masked store with a constant mask enabling the first n lanes can be
lowered to a standard store of size n.

For example a masked store with masks `<1, 1, 0, 0>` or a scalable store
with mask `llvm.get.active.lane.mask.v4i1.i32(i32 0, i32 2)`

This is a recommit of #223665 with a legal type check to protect against
v1f64 stores on X86 with +avx512.



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