[all-commits] [llvm/llvm-project] ea5203: [RISCV][MC] Reject invalid combined immediates for...

[Zeyi Xu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ea52030d57087b910f6fcfe0fa5206969b48ffbd
      https://github.com/llvm/llvm-project/commit/ea52030d57087b910f6fcfe0fa5206969b48ffbd
  Author: Zeyi Xu <zeyi2 at nekoarch.cc>
  Date:   2026-09-21 (Mon, 21 Sep 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/test/MC/RISCV/corev/XCVbitmanip-invalid.s
    M llvm/test/MC/RISCV/corev/XCVbitmanip.s

  Log Message:
  -----------
  [RISCV][MC] Reject invalid combined immediates for `cv.insert` (#224985)

The CV32E40P specification requires `Is3 + Is2 < 32` for `cv.insert`.
This commit fixes the MC part problem in LLVM.

Link:
https://github.com/openhwfoundation/cv32e40p/blob/cv32e40p_v1.8.3/docs/source/instruction_set_extensions.rst#L600-L604



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