[all-commits] [llvm/llvm-project] 04d87a: [mlir] Migrate AMDGPU/ROCDL to targets, not chipse...
Krzysztof Drewniak via All-commits
all-commits at lists.llvm.org
Thu Sep 17 09:04:03 PDT 2026
Branch: refs/heads/users/krzysz00/mlir-rocdl-target-info-migration
Home: https://github.com/llvm/llvm-project
Commit: 04d87a2d29d2d0b2f08fcefde1ccba1fabe004a4
https://github.com/llvm/llvm-project/commit/04d87a2d29d2d0b2f08fcefde1ccba1fabe004a4
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-17 (Thu, 17 Sep 2026)
Changed paths:
M mlir/docs/ReleaseNotes.md
M mlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h
M mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
M mlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h
M mlir/include/mlir/Conversion/MathToROCDL/MathToROCDL.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/AMDGPU/Utils/Chipset.h
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
M mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToROCDLPipeline.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/lib/Dialect/GPU/Transforms/PromoteShuffleToAMDGPU.cpp
M mlir/lib/Dialect/GPU/Transforms/ROCDLAttachTarget.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp
R mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp-gfx1170.mlir
M mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp.mlir
M mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats.mlir
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Conversion/AMDGPUToROCDL/dot-gfx11.mlir
M mlir/test/Conversion/AMDGPUToROCDL/dot-gfx12.mlir
M mlir/test/Conversion/AMDGPUToROCDL/dot-gfx9.mlir
M mlir/test/Conversion/AMDGPUToROCDL/dot-invalid.mlir
M mlir/test/Conversion/AMDGPUToROCDL/dpp.mlir
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Conversion/AMDGPUToROCDL/global-prefetch.mlir
M mlir/test/Conversion/AMDGPUToROCDL/global_transpose_load.mlir
M mlir/test/Conversion/AMDGPUToROCDL/lds-barrier-gfx90c.mlir
M mlir/test/Conversion/AMDGPUToROCDL/load_lds-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/load_lds.mlir
M mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait.mlir
M mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait_tensor.mlir
M mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait_unsupported.mlir
A mlir/test/Conversion/AMDGPUToROCDL/mfma-fp8-invalid.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir
A mlir/test/Conversion/AMDGPUToROCDL/mfma-reduce-precision-invalid.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir
M mlir/test/Conversion/AMDGPUToROCDL/packed-ext.mlir
M mlir/test/Conversion/AMDGPUToROCDL/packed-trunc-invalid.mlir
M mlir/test/Conversion/AMDGPUToROCDL/packed-trunc.mlir
A mlir/test/Conversion/AMDGPUToROCDL/permlane-gfx1200-invalid.mlir
A mlir/test/Conversion/AMDGPUToROCDL/permlane-gfx1250-invalid.mlir
A mlir/test/Conversion/AMDGPUToROCDL/permlane-gfx1250.mlir
M mlir/test/Conversion/AMDGPUToROCDL/permlane-var.mlir
M mlir/test/Conversion/AMDGPUToROCDL/permlane.mlir
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma.mlir
M mlir/test/Conversion/AMDGPUToROCDL/swizzle.mlir
M mlir/test/Conversion/AMDGPUToROCDL/swmmac-gfx12.mlir
M mlir/test/Conversion/AMDGPUToROCDL/swmmac-gfx1250.mlir
M mlir/test/Conversion/AMDGPUToROCDL/transpose_load.mlir
M mlir/test/Conversion/AMDGPUToROCDL/transpose_load_gfx1250.mlir
M mlir/test/Conversion/AMDGPUToROCDL/transpose_load_gfx1250_invalid.mlir
M mlir/test/Conversion/AMDGPUToROCDL/transpose_load_gfx950_invalid.mlir
M mlir/test/Conversion/AMDGPUToROCDL/transpose_load_reject.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx11.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx1250.mlir
M mlir/test/Conversion/ArithToAMDGPU/16-bit-floats.mlir
M mlir/test/Conversion/ArithToAMDGPU/8-bit-float-saturation-ocp.mlir
M mlir/test/Conversion/ArithToAMDGPU/8-bit-float-saturation.mlir
M mlir/test/Conversion/ArithToAMDGPU/8-bit-floats-ocp.mlir
M mlir/test/Conversion/ArithToAMDGPU/8-bit-floats.mlir
A mlir/test/Conversion/ArithToAMDGPU/deprecated-chipset-alias.mlir
M mlir/test/Conversion/ArithToAMDGPU/scaling-extf.mlir
M mlir/test/Conversion/ArithToAMDGPU/scaling-truncf-tensor.mlir
M mlir/test/Conversion/ArithToAMDGPU/scaling-truncf.mlir
M mlir/test/Conversion/GPUCommon/lower-global-id.mlir
M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
M mlir/test/Conversion/GPUCommon/memory-attrbution.mlir
M mlir/test/Conversion/GPUCommon/memref-arg-attrs.mlir
M mlir/test/Conversion/GPUCommon/memref-arg-noalias-attrs.mlir
M mlir/test/Conversion/GPUCommon/memref-arg-noalias-warning.mlir
M mlir/test/Conversion/GPUToROCDL/constant-address-space.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barrier.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barriers-gfx12.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-hip.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-invalid-ballot.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-invalid-dialect.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-invalid-named-barrier.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-named-barrier-non-const.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-opencl.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-subgroup-id.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/GPUToROCDL/memref.mlir
M mlir/test/Conversion/GPUToROCDL/private-func-no-c-interface.mlir
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
M mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
A mlir/test/Dialect/GPU/promote-shuffle-amdgpu-invalid.mlir
M mlir/test/Dialect/GPU/promote-shuffle-amdgpu.mlir
M mlir/test/Dialect/LLVMIR/attach-targets.mlir
A mlir/test/Dialect/LLVMIR/rocdl-attach-target-arch.mlir
M mlir/test/Integration/GPU/ROCM/gpu-lower-to-rocdl-pipeline.mlir
M mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir
M mlir/test/Integration/GPU/ROCM/printf.mlir
M mlir/test/Integration/GPU/ROCM/two-modules.mlir
M mlir/test/Integration/GPU/ROCM/vecadd.mlir
M mlir/test/Integration/GPU/ROCM/vector-transferops.mlir
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/unittests/Dialect/AMDGPU/AMDGPUUtilsTest.cpp
Log Message:
-----------
[mlir] Migrate AMDGPU/ROCDL to targets, not chipset versions
**migration tl;dr:** Replace usages of `amdgpu::Chipset` with `ROCDL::TargetInfo`, ideally move from `chipset=` to `arch=`. If you don't use upstream pipelines, call 'TargetInfo::migrateArchFeaturesToModuleFlags` at the appropriate location.
Further note: if you've got a build pipeline that's getting a `gfxXXX` name from something like `rocm_agent_enumerator`, using a full triple name like the ones you get from `rocminfo` is preferred.
`amdgpu::Chipset` was an awkward hack that was hard to keep up to date
with changes in the compiler/new architectures, and didn't properly
support generic targets (and has been strongly disfavored by the
compiler team).
This PR replaces `amdgpu::Chipset` with `ROCDL::TargetInfo`, a
structure that uses LLVM's TargetParser and the underlying LLVM
features tables to get the real nature of the target being compiled
for.
This also helps MLIR move to
new-style (`-mtriple=amdgpuX.YZ-amd-amdhsa`) over "old
style" (`-mtriple=amdgcn-amd-amdhsa -mcpu=gfxXYZ`) triples.
The utility structure is moved from AMDGPU to ROCDL, both because it's
tied to LLVM rather directly and because projects like Triton should
be able to use these feature tests without pulling in the AMDGPU
dialect and its memref dependencies.
This migration also fixes a few correctness issues:
- Atomic emulation was producing floating-point additions that don't
exist on gfx90c (even though it's "after" gfx90a) and gfx908's more
precise about where emulation is needed.
- gfx90c was also being handed a bare `s_barrier`, but it has no
hardware barrier back-off, so it needs the inline asm workaround.
- gfx950 won't allow xf32 MFMAs anymore.
- permlane_swap forms that don't exist on some architectures no
longer lower.
- gfx11.7 is now listed as an OCP FP8-having target.
Some checks still need to check for a generation (ex. when encoding
s_waitcnt or what the semantics of a WMMA are) go through an
`isGeneration(N)` method, which checks for having instructions from
generation N but not N+1.
(The barrier lowering has been reordered to account for gfx13 not
having, but also not needing, BackOffBarrier.)
This migration renames the `chipset` or `chip` options on most passes to `arch`, but keeps the old name for compatibility.
Please note that, because of changes to how LLVM handles xnack and sramecc (they aren't target features anymore), you need to set `rocdl.xnack` and `rocdl.sramecc` on the modules you're translating if you know the values of those modifiers. `TargetInfo::migrateArchFeaturesToModuleFlags(Operation *op)` will do this for you.
Chipset is deprecated instead of being removed so that folks have time
to migrate.
Pre-commit tests in #220104.
AI disclosure: I steered this, Claude wrote the code, I tried to clean
up the docs.
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