[all-commits] [llvm/llvm-project] 5da4b5: [AMDGPU][GISel] Notify GISel observers when splitt...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Wed Sep 16 12:21:47 PDT 2026
Branch: refs/heads/users/alexey-bataev/spr/machinecombinerreassociate-fp-accumulation-chains-to-expose-ilp
Home: https://github.com/llvm/llvm-project
Commit: 5da4b50d7a4f12c283b1253a8e4d2c1e1c68a360
https://github.com/llvm/llvm-project/commit/5da4b50d7a4f12c283b1253a8e4d2c1e1c68a360
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
M llvm/test/CodeGen/AMDGPU/trap.ll
Log Message:
-----------
[AMDGPU][GISel] Notify GISel observers when splitting trap blocks (#219128)
`legalizeTrapEndpgm` can split a MBB and move the instructions following
a trap. Since an instruction's parent block is part of its GISel CSE
profile, notify active observers around the moved instructions so they
are re-profiled with the new parent block.
CSE consistency gap exposed by #217258.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Co-authored-by: GPT-5 Codex <noreply at openai.com>
Commit: f3909e073dd93f830f842c0bfe33b443b8fa0624
https://github.com/llvm/llvm-project/commit/f3909e073dd93f830f842c0bfe33b443b8fa0624
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/MLRegAlloc/default-eviction-advisor.ll
M llvm/test/CodeGen/MLRegAlloc/rel-codepath.ll
M llvm/test/Transforms/Inline/ML/bounds-checks.ll
M llvm/test/Transforms/Inline/ML/coro-split-func-levels.ll
M llvm/test/Transforms/Inline/ML/dead-callee.ll
M llvm/test/Transforms/Inline/ML/enable-inline-advisor-printing-ml.ll
M llvm/test/Transforms/Inline/ML/fpi-update.ll
M llvm/test/Transforms/Inline/ML/ml-test-release-mode.ll
M llvm/test/Transforms/Inline/ML/recursive.ll
M llvm/test/Transforms/Inline/ML/scc-dead-accounting.ll
M llvm/test/Transforms/Inline/ML/skip-unreachable.ll
M llvm/test/Transforms/Inline/ML/state-accounting-skip-non-cold.ll
M llvm/test/Transforms/Inline/inlining-advisor-default.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[MLGO] Gate model tests on optimization-specific lit features (#217906)
### Context
`have_mlir_lowering` only indicates that `LLVM_MLGO_MODELS` is
non-empty. It does not identify which model type was compiled.
### Motivation
An inliner-only configuration incorrectly enabled regalloc-specific test
commands, and vice versa.
### Changes
Add `have_mlir_lowering_inliner` and `have_mlir_lowering_regalloc` lit
features derived from the corresponding model-generation targets. Update
MLGO tests to use the appropriate model-specific feature, including GN
configuration defaults.
I leveraged AI to write this PR.
Commit: 05e74e7b5e065d05e33efd264e6f42d9cd40f06c
https://github.com/llvm/llvm-project/commit/05e74e7b5e065d05e33efd264e6f42d9cd40f06c
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/tools/opt/opt.cpp
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[opt] Move InitLLVM ownership to the standalone entry point (#222559)
Please Read: [RFC: Embeddable LLVM tool drivers for long-lived
hosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and [Why `InitLLVM` ownership matters section in the
RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-why-initllvm-ownership-matters-7)
`LLVMOptDriver` is already separated from the standalone `opt`
executable, but `optMain` currently constructs `InitLLVM` internally.
This means its destructor calls `llvm_shutdown()` whenever one driver
invocation finishes.
That is appropriate for a standalone executable, but not for a reusable
driver called by a long-lived host. For example,
[WasmBolt](https://github.com/anutosh491/WasmBolt) (try
[here](https://anutosh21.github.io/WasmBolt/)) invokes `opt`, `llc`,
Clang and LLD within one browser-hosted LLVM process and needs the LLVM
process state to remain alive between tool invocations.
This patch moves `InitLLVM` ownership into `opt.cpp`:
```text
standalone opt:
main -> InitLLVM -> optMain -> shutdown
embedded host:
host-owned InitLLVM / LLVMToolSession -> optMain
```
Standalone opt therefore keeps the same lifetime and behaviour, while
LLVMOptDriver can borrow the lifetime owned by an embedding application.
This patch is independent of the proposed `LLVMToolSession `and
`LLVMLlcDriver` changes that I've proposed in the RFC and can be
reviewed separately.
Commit: e2955810d33ea0fb04522fc9f7cb12b71088ccc8
https://github.com/llvm/llvm-project/commit/e2955810d33ea0fb04522fc9f7cb12b71088ccc8
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
Log Message:
-----------
[MLIR]: Fix test after 70f5696e (#222601)
[MLIR]: Fix test after 70f5696e
Commit: abf3bd63bb37d00aa4cd8b5dad873e1140d06348
https://github.com/llvm/llvm-project/commit/abf3bd63bb37d00aa4cd8b5dad873e1140d06348
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/DebugInfo/CXX/verbose-trap.cpp
Log Message:
-----------
[clang][DebugInfo] Fix verbose trap source line (#222456)
The artificial inline location for `__builtin_verbose_trap` used line
zero. As a result, the emitted trap could inherit the preceding source
line in DWARF line tables.
Keep the artificial trap-message frame while assigning the builtin
call's line and column to the trap instruction.
Commit: 26012d67fef70763f6593eacfe2af41272cf7b72
https://github.com/llvm/llvm-project/commit/26012d67fef70763f6593eacfe2af41272cf7b72
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A llvm/test/Analysis/CostModel/X86/pdep.ll
A llvm/test/Analysis/CostModel/X86/pext.ll
Log Message:
-----------
[CostModel][X86] Add baseline cost test for pdep/pext intrinsics (#222603)
Slow pdep/pext targets in particular are highly inaccurate
Commit: 38fb876bf1e9ce9c5ccdc6f38fac4eb60ac66fce
https://github.com/llvm/llvm-project/commit/38fb876bf1e9ce9c5ccdc6f38fac4eb60ac66fce
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Move up getEpilogueTailLowering() (#222358)
This patch only moves up `getEpilogueTailLowering()` so that it can be
used by `planForEpilogueTF` as needed here: https://github.com/llvm/llvm-project/pull/208764
Commit: 73f0077ff60c58cae6c1f753b046ce93ebc4db3f
https://github.com/llvm/llvm-project/commit/73f0077ff60c58cae6c1f753b046ce93ebc4db3f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/records.cpp
M clang/test/CodeGen/pr4349.c
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
Revert "[clang][bytecode] Use opaque pointers for decl-based dummy pointers" (#222599)
Reverts llvm/llvm-project#220917
Looks like this breaks some memory-sanitizier builders:
https://lab.llvm.org/buildbot/#/builders/169/builds/26405
https://lab.llvm.org/buildbot/#/builders/164/builds/25236
Commit: 11cf968d0d79f5809b4f3fd6b526f0d16ec2a6d1
https://github.com/llvm/llvm-project/commit/11cf968d0d79f5809b4f3fd6b526f0d16ec2a6d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/LLVMVisualizers/llvm.natvis
Log Message:
-----------
[NATVIS] Fix ConstantInt APInt value access (#221719)
Ensure we peek through the APInt::U VAL / *pVal union
Commit: e4d40831076278ffbfc7d883510d49db8fbfaa7c
https://github.com/llvm/llvm-project/commit/e4d40831076278ffbfc7d883510d49db8fbfaa7c
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
A mlir/test/Target/LLVMIR/omptarget-debug-shared-alloc-loc.mlir
Log Message:
-----------
[OpenMP] Give the device shared memory allocations a debug location. (#221842)
Fixes https://github.com/llvm/llvm-project/issues/221831.
In generic mode on the device, the buffers that carry values into an
outlined region come from device shared memory rather than the stack, so
they are emitted as calls to `__kmpc_alloc_shared` and
`__kmpc_free_shared`. Those are definitions in the DeviceRTL, which
makes them inlinable calls, and the verifier requires an inlinable call
in a function with debug info to carry a !dbg location. None of these
calls had one, for two separate reasons.
1. `allocateVar()` and `deallocateVar()` took a bare insertion point, so
an override had no debug location to set on the runtime calls it emits
in place of the alloca the base class would have created. Fixed by
adding a `DebugLoc` parameter that carries one.
2. The `createOMPAllocShared `and `createOMPFreeShared` calls in
`createParallel` relied on the implicit conversion from an insertion
point to a `LocationDescription`, which selects the constructor that
leaves the debug location empty, and `updateToLocation` then installs
that empty location over whatever the builder had. Fixed by passing the
`Builder`, which carries the debug location along with the insertion
point. This is the same fix as #218961.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: cc45d4f54199e005db594c22cf29545a0d020bae
https://github.com/llvm/llvm-project/commit/cc45d4f54199e005db594c22cf29545a0d020bae
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/clmul.ll
Log Message:
-----------
[CostModel][X86] clmul.ll - add test coverage for vpclmulqdq targets (#222610)
Commit: 46f9c228668a406cec6160552dea699846d91fd6
https://github.com/llvm/llvm-project/commit/46f9c228668a406cec6160552dea699846d91fd6
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/Scalarizer/bitcast-scalar-to-vector.ll
M llvm/test/Transforms/Scalarizer/bitcast-vector-to-scalar.ll
Log Message:
-----------
[Scalarizer] Update tests to use update_test_checks.py (#222460)
This PR is to address feedback on this comment:
https://github.com/llvm/llvm-project/pull/221033#discussion_r3973313815
requesting the tests use utils/update_test_checks.py instead.
Commit: cb46e8530f3c45be6f968fcdef47f37e5220fe95
https://github.com/llvm/llvm-project/commit/cb46e8530f3c45be6f968fcdef47f37e5220fe95
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
A llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_many_align.s
Log Message:
-----------
[JITLink][RISCV] Avoid quadratic removal of alignment edges (#222317)
We encountered this issue while using BOLT to instrument clang on
RISC-V. JITLink spent significant time removing alignment edges during
relaxation finalization in large code blocks with many alignment
relocations.
During RISC-V relaxation finalization, finalizeBlockRelax removes
AlignRelaxable edges individually from a block's edge vector. Each erase
shifts the remaining suffix, making this cleanup quadratic when the
number of alignment edges grows with the total edge count.
Compact surviving edges once and remove the trailing entries from the
back, preserving edge order and making cleanup linear. Count the
trailing entries before erasing to avoid comparing an invalidated
iterator.
These results support the performance benefit, but they come from
**GPT-generated** synthetic benchmarks and do not represent speedups on
real BOLT workloads.
count | origin | new
-- | -- | --
16,384 | 92.6 ms | 6.2 ms
32,768 | 430.0 ms | 9.5 ms
65,536 | 1,732.3 ms | 16.2 ms
Assisted by GPT-6.
Commit: 3eeb9b2bdb2a9ac4020a8ab8729e96ecb283691c
https://github.com/llvm/llvm-project/commit/3eeb9b2bdb2a9ac4020a8ab8729e96ecb283691c
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/HLFIR/Passes.h
M flang/include/flang/Optimizer/HLFIR/Passes.td
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
A flang/include/flang/Optimizer/Support/AllocationPolicy.h
R flang/include/flang/Optimizer/Transforms/AllocationPlacementPolicy.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRCopy.cpp
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/lib/Optimizer/Support/AllocationPolicy.cpp
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
A flang/test/Driver/allocation-policy.f90
A flang/test/Fir/allocation-policy-attr.fir
A flang/test/Fir/allocation-policy-pipeline.fir
A flang/test/HLFIR/inline-hlfir-copy-stack.fir
M flang/test/HLFIR/inline-hlfir-copy.fir
M flang/test/Transforms/allocation-placement.fir
A flang/test/Transforms/allocation-policy-precedence.fir
Log Message:
-----------
[flang] add AllocationPolicy attribute to module and use it in InlineHLFIRCopy (#222013)
The StackArrays/AllocationPlacement pass cannot move fir.allocmem
created during InlineHLFIRCopy for the copy-in/cop-out buffers because
of there placement in branches.
Moving these allocmem outside of the branches is suboptimal as these
allocations may never occur at runtime (when the data is actually
already contiguous).
Extending the StackArrays pass is doable but very tedious (the data flow
analysis passes used in the pass cannot recognized "same
predicates"/understand that the two fir.if block that
allocate/deallocates will be both reached or never reached (even when
modifying InlineHLFIRCopy to use the same SSA value for both fir.if). So
this requires custom logic, and was adding 200 lines of non trivial code
to audit and I did not like it.
I decided to expose the allocation policy so that other passes can rely
on it. To make it the most flexible and future proof this is done via a
new module attribute instead of threading options in the driver to this
and that pass. This way, it will also be possible to have custom per
function policy if ever needed.
The InlineHLFIRCopy is updated to apply the small array threshold policy
(that decide when constant size arrays should always be placed on the
stack, regardless of the -fstack-array/-fno-stack-array). I also
increased this threshold from 64 to 1024 so that it cover my application
use case. This increase is in line with the industry practice (NV, IFX,
and gfortran will all allocate few Kb temporary copy-in/out buffers on
the stack, regardless of the optimization level). For now, I decided to
not apply the `-fstack-array` aspect as it is on by default with flang
and I want to measure the effect first before doing so (gfortran/ifx
also control dynamic copy-in/out buffer allocations with the stack-array
related flag, so there is a good chance we end-up doing it at some
point).
Commit: b3eab3a932118c3a462741000d2118428f5bd268
https://github.com/llvm/llvm-project/commit/b3eab3a932118c3a462741000d2118428f5bd268
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
A mlir/test/Integration/Dialect/Vector/CPU/reductions-masked-minmax-f32.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][vector] Fix mask neutral value for masked fmaximum/fminimum reductions (#222275)
Masked maximumf/minimumf reductions were lowered by replacing inactive
lanes with a neutral value before applying an unmasked reduction. The
maximumf neutral was incorrectly set to the negative subnormal closest
to zero, causing it to beat any negative active value. Similarly,
minimumf used FLT_MAX, which loses to an active +Inf.
This change adds LLVM dialect support for
llvm.vp.reduce.fmaximum/fminimum and lowers masked reductions directly
to these predicated intrinsics.
Commit: 21d80e82d137f9a30e2626a9953d63015bcb280c
https://github.com/llvm/llvm-project/commit/21d80e82d137f9a30e2626a9953d63015bcb280c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Logging.h
Log Message:
-----------
[orc-rt] Remove redundant extern keyword. (#222619)
orc_rt_log_OSLogHandles is already extern via ORC_RT_C_EXPORT.
Commit: 0afee5c04021a2c8218beb6a64f3afd5f2578c02
https://github.com/llvm/llvm-project/commit/0afee5c04021a2c8218beb6a64f3afd5f2578c02
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
A compiler-rt/test/tsan/Darwin/os_unfair_lock_deadlock.c
A compiler-rt/test/tsan/Darwin/trylock_no_deadlock.c
Log Message:
-----------
[Darwin][TSan] Use deadlock detector aware calls for Darwin-specific lock interceptors (#216040)
Currently the deadlock detector is unaware of these lock types because
the interceptors use bare Acquire-Release calls. This patch switches
them over to the Mutex(Pre|Post)Lock calls instead.
Assisted by: Claude
rdar://155410097
Commit: 3ec60e826f522bbe6b0af7c9392968a9f6c660c5
https://github.com/llvm/llvm-project/commit/3ec60e826f522bbe6b0af7c9392968a9f6c660c5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/src/stdio/gpu/vfprintf_utils.h
Log Message:
-----------
[libc] Optimize the GPU printf implementation with size hints (#222474)
Summary:
The GPU printf interface is functionally a shim to pass a `va_list` and
format string to the CPU for formatting. The size of the argument list
isn't exposed by the C ABI, but we can use `__builtin_object_size` to
try to look it up. This will bind to the `alloca` holding our arguments
in the ABI and return a positive size if it is known.
We do this opportunistically, as the check is lossy. In cases where it
is known, this saves a stack spill to store the true size. Additionally,
we can use this to detect cases where `printf` is being used as a simple
`puts`.
This saves 10 VGPRs for the `printf("string")` case. It also saves 8
bytes of stack in most all cases.
Commit: 14789f78610ab6caa79d18737185755c199e0f95
https://github.com/llvm/llvm-project/commit/14789f78610ab6caa79d18737185755c199e0f95
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M orc-rt/test/regression/darwin/check-rt-process-info.test
M orc-rt/test/regression/linux/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Generalize testcases for different target archs (#222629)
Drop the hard-coded archs from the check-rt-process-info testcases.
Instead, check against an arch value derived from the build's target
triple.
Commit: c69a5ebf6b961d1296cb42a104008df40cf3bc36
https://github.com/llvm/llvm-project/commit/c69a5ebf6b961d1296cb42a104008df40cf3bc36
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__utility/declval.h
Log Message:
-----------
[libc++] Simplify the implementation of std::declval (#222303)
The implementation of `std::declval` calling `__declval` was originally
introduced for improved compile times. However, we now have a builtin
for `add_rvalue_reference`, which makes the old implementation faster
again, since we avoid instantiating any class types _and_ avoid overload
resolution.
Commit: c363b393529bc652c97344042a3b5e6f136d41c5
https://github.com/llvm/llvm-project/commit/c363b393529bc652c97344042a3b5e6f136d41c5
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC: Remove redundant expression from getBuildVectorCost (#222547)
Gathers is initialized with the contents from VL and then not modified,
so `VL.equals(Gathers)` is always true.
Commit: 36fe08a5f92230655dd9662f121c092ced307ddd
https://github.com/llvm/llvm-project/commit/36fe08a5f92230655dd9662f121c092ced307ddd
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
Log Message:
-----------
[MLIR][CIR][NFCI] Split TestAliasAnalysis into its own library (#222174)
This is a target for the CIR alias analysis, and bringing in all of the
MLIRTestAnalysis is too heavy: it results in a significant increase in
CIR test size. This patch, plus a few little things, gets us ~850 edges
removed from the Clang Build (after Medhi's patches).
This also has CIR use it.
Commit: 8be8161a037daf2417c669336b777e986d0fc21f
https://github.com/llvm/llvm-project/commit/8be8161a037daf2417c669336b777e986d0fc21f
Author: Marcos Maronas <mmaronas at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/ConstantInitBuilder.h
M clang/lib/CodeGen/ConstantInitBuilder.cpp
M clang/test/CodeGenCXX/constructor-attr.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
Log Message:
-----------
[clang][CodeGen] Stop overriding GlobalVariable's default address space (#222367)
The `GlobalVariable` constructor used by `createGlobal` receives a
`std::optional<unsigned> AddressSpace` that, when unspecified, falls
back to `M.getDataLayout().getDefaultGlobalsAddressSpace()`. However,
`createGlobal`'s `AddressSpace` arg was a bare `unsigned` defaulting to
0. By doing that, it was effectively overriding the `GlobalVariable`'s
constructor fallback with 0. On targets whose default globals address
space is not 0 (AMDGPU, SPIR/SPIR-V), this emitted
`@llvm.global_ctors/dtors` in address space 0 causing some issues (see
https://github.com/ROCm/SPIRV-LLVM-Translator/issues/293).
Commit: 41fc4d5609d5f2414a2bbf9cf7e1ecd09fe5a01a
https://github.com/llvm/llvm-project/commit/41fc4d5609d5f2414a2bbf9cf7e1ecd09fe5a01a
Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/Decl.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/builtins.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/Sema/warn-strlcpycat-size.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for strlcpy (#221325)
Add `-Wfortify-source` diagnostics for `strlcpy` and `__builtin_strlcpy`
when the size argument exceeds the destination buffer size.
This is directly analogous to the previous PR for `strlcat` (#220341).
Also update `clang/test/Sema/warn-strlcpycat-size.c` and
`clang/test/Sema/builtins.c` to expect the `-Wfortify-source` warnings
where test calls pass sizes larger than the destination buffer capacity.
Part of #142230
Assisted-by: Gemini
Commit: da15729d2108024fc2e65fdcb17143393823d6a3
https://github.com/llvm/llvm-project/commit/da15729d2108024fc2e65fdcb17143393823d6a3
Author: Kieran B <kieran.bailey at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
Log Message:
-----------
[AArch64] Reorder ZPR stack spills to maximize ld1b/st1b pairings (#218950)
Currently, the stack allocation algorithm can order spilled ZPR
callee-saves in a way that prevents pairing.
Reorder ZPR callee-saves before frame indices are assigned to maximize
pairing opportunities. Pairing requires consecutive even/odd registers
at even stack offsets.
The remaining legality requirements are already checked when the
register pairs are formed.
The reordering algorithm primarily works by determining the parity of
the lowest ZPR spill offset. If the offset is odd, it places one
unpaired ZPR spill first so that subsequent register pairs begin at even
offsets.
Windows is not supported by this reordering algorithm for now, to keep
this change minimal.
New tests have been added to sve-callee-save-restore-pairs.ll to test
the reordering algorithm.
Commit: d7f2abda7020b4ca336732dd2984f6a668fd766a
https://github.com/llvm/llvm-project/commit/d7f2abda7020b4ca336732dd2984f6a668fd766a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
Log Message:
-----------
[SCEV] Use the refined BE-count formula if the addition cannot overflow (#221227)
Generalize the logic added in
https://github.com/llvm/llvm-project/pull/218694
to consider AddingStrideMinusOneMayOverflow (was MayAddOverflow) instead
of just the !IVMayOverflow part.
This handles 2 additional cases when Start < RHS:
* Stride is known power-of-2:
* Start == Stride and Start == Stride -1.
The patch includes a mechanical change to move up the existing
MayAddOverflow with comments, and clarifies the name to
AddingStrideMinusOneMayOverflow.
This improves trip count computations in a number of real-world cases:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1195.
End-to-end Alive2 Proofs for both cases in unsigned:
https://alive2.llvm.org/ce/z/MQ2YLf
PR: https://github.com/llvm/llvm-project/pull/221227
Commit: 148604aed3511a41af5e000b0440e0afb884daa6
https://github.com/llvm/llvm-project/commit/148604aed3511a41af5e000b0440e0afb884daa6
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel]Add missing utils/extract_symbols.py (#222653)
This was added in https://github.com/llvm/llvm-project/pull/221296
Commit: a774efbad6f74d695e37841c72b2a0175e4724e9
https://github.com/llvm/llvm-project/commit/a774efbad6f74d695e37841c72b2a0175e4724e9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/barrier
M libcxx/include/condition_variable
M libcxx/include/mutex
M libcxx/include/shared_mutex
M libcxx/test/libcxx/diagnostics/unused_variables.verify.cpp
M libcxx/test/libcxx/thread/nodiscard.verify.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.ctor.pass.cpp
M libcxx/test/std/thread/thread.condition/thread.condition.condvarany/default.pass.cpp
Log Message:
-----------
[libc++] Add [[gnu::warn_unused]] to a bunch of threading utilities (#213963)
Commit: fb69e1dcea0e527647525240af45a87420a3a593
https://github.com/llvm/llvm-project/commit/fb69e1dcea0e527647525240af45a87420a3a593
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Query waves-per-EU and flat-wg range from subarch in attributor (#222596)
The maximum flat work group range is a pair of constants and the maximum
waves per execution unit is fully known from the subarch. Use TargetParser
information and continue working to remove the dependence on codegen.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 3c478e1597c11abbdafef9c08d7e11655ba1cdd5
https://github.com/llvm/llvm-project/commit/3c478e1597c11abbdafef9c08d7e11655ba1cdd5
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/MC/MCGOFFStreamer.cpp
A llvm/test/CodeGen/SystemZ/zos-eh.ll
Log Message:
-----------
[SystemZ][z/OS] Relax check for additional symbols in PR section (#222435)
The current check in `emitLabel()` is too strict. Inside a PR, there
cannot be no other external visible label. However, temporary labels
which are used e.g. for calculating offsets can be emitted. A situation
in which this occurs is the emission of the DWARF EH tables, in which a
temporary symbol (with an empty name) is emitted at the begin of the
table, causing an error message. This change limits the error to
non-temporary labels.
Commit: 28d39b47e98af5a6fd8dc676f9ef576fe4b30724
https://github.com/llvm/llvm-project/commit/28d39b47e98af5a6fd8dc676f9ef576fe4b30724
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
CodeGen: Remove dead LiveVariables plumbing from MachineSink (#222563)
MachineSink threaded a LiveVariables pointer through to
SplitCriticalEdge so the analysis would be updated. It never used
LiveVariables for any decision, and MachineSinking runs before
LiveVariables in every pipeline.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 659faef7717be80c12e47604e61c01f2d7fc4975
https://github.com/llvm/llvm-project/commit/659faef7717be80c12e47604e61c01f2d7fc4975
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Add paging into modules request (#222122)
Added support for modules paging according to [DAP
specification](https://microsoft.github.io/debug-adapter-protocol/specification#Requests_Modules)
Commit: 26c633bf88337258f1b488bccfd74faa1efbafaa
https://github.com/llvm/llvm-project/commit/26c633bf88337258f1b488bccfd74faa1efbafaa
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/AstRestoreTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CallingConventionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ClassLayoutTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CompilandsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest0.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest1.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.h
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.ord
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionNestedBlockTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/PointerTypeTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/SimpleTypesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/TypeQualsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/add-symbols.cpp
A lldb/test/Shell/SymbolFile/NativePDB/ast-restore.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-arm.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-x86.test
A lldb/test/Shell/SymbolFile/NativePDB/class-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/compilands.test
A lldb/test/Shell/SymbolFile/NativePDB/enums-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/expressions.test
M lldb/test/Shell/SymbolFile/NativePDB/func-symbols.test
A lldb/test/Shell/SymbolFile/NativePDB/function-level-linking.test
A lldb/test/Shell/SymbolFile/NativePDB/function-nested-block.test
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-dia.cpp
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-no-dia.cpp
R lldb/test/Shell/SymbolFile/NativePDB/native-setting.cpp
A lldb/test/Shell/SymbolFile/NativePDB/pointers.test
A lldb/test/Shell/SymbolFile/NativePDB/type-quals.test
A lldb/test/Shell/SymbolFile/NativePDB/typedefs.test
A lldb/test/Shell/SymbolFile/NativePDB/variables-locations.test
A lldb/test/Shell/SymbolFile/NativePDB/variables.test
A lldb/test/Shell/SymbolFile/NativePDB/vbases2.test
R lldb/test/Shell/SymbolFile/PDB/Inputs/AstRestoreTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CallingConventionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ClassLayoutTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CompilandsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest0.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest1.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest2.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.h
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.ord
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionNestedBlockTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/PointerTypeTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/TypeQualsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
R lldb/test/Shell/SymbolFile/PDB/ast-restore.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-x86.test
R lldb/test/Shell/SymbolFile/PDB/class-layout.test
R lldb/test/Shell/SymbolFile/PDB/compilands.test
R lldb/test/Shell/SymbolFile/PDB/enums-layout.test
R lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
R lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
R lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
R lldb/test/Shell/SymbolFile/PDB/native-setting.cpp
R lldb/test/Shell/SymbolFile/PDB/pointers.test
R lldb/test/Shell/SymbolFile/PDB/type-quals.test
R lldb/test/Shell/SymbolFile/PDB/typedefs.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
R lldb/test/Shell/SymbolFile/PDB/variables-locations.test
R lldb/test/Shell/SymbolFile/PDB/variables.test
R lldb/test/Shell/SymbolFile/PDB/vbases.test
Log Message:
-----------
[lldb] Move most PDB shell tests to NativePDB (#222370)
I plan to remove the DIA PDB plugin before the 24 release - we switched
the default to the native one in 22. To avoid losing test coverage in
the process, this moves the SymbolFile/PDB tests to
SymbolFile/NativePDB. They were already running with both plugins. In
some cases, we set `env LLDB_USE_NATIVE_PDB_READER=1`, which I flipped.
The remaining shell tests are:
- `func-symbols.test`: Has a duplicate in NativePDB with different
checks, because the two plugins don't create identical types (see
comment in test)
- `udt-layout.test`: Also has a duplicate with different checks, because
the two plugins show the base classes in a different order.
Other than that, there's also a [unittest for
PDB](https://github.com/llvm/llvm-project/blob/2de38b4861ed4a7be7ddd42fc803e91d1fe81b14/lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp).
I'm not sure what we should do about it. Looking over the tests there,
most of these are already covered by the shell tests.
Commit: e6e102aa9ee5f8163d6d300614734b6c009aec34
https://github.com/llvm/llvm-project/commit/e6e102aa9ee5f8163d6d300614734b6c009aec34
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Passes/RunCodeGen.h
M llvm/lib/Passes/RunCodeGen.cpp
Log Message:
-----------
[Passes] Add DisableSimplifyLibCalls flag to runCodeGenPipeline (#222430)
This enables this abstraction to be a drop-in replacement for rustc
after some minor refactoring.
Commit: 6b706509f983459f43708c42f80ec2f152a4cc42
https://github.com/llvm/llvm-project/commit/6b706509f983459f43708c42f80ec2f152a4cc42
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/IR/pch.h
M mlir/lib/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
M mlir/lib/Tools/mlir-lsp-server/LSPServer.cpp
Log Message:
-----------
[mlir] Reuse a precompiled header for MLIRIR (NFC) (#222576)
Build a private precompiled header from the common MLIR IR headers and
use it for MLIRIR. Build Support and IR first so the PCH is available
early, and qualify the LLVM LSP Location name that the broader header
surface exposes.
On current main, clean Release builds of LLVM and MLIR with `ninja -j16`
improved as follows:
```
wall: 535.99s -> 420.41s (-21.56%)
user: 7550.29s -> 6125.97s (-18.86%)
system: 569.85s -> 481.88s (-15.44%)
```
Assisted-by: Codex
Commit: 29a48499738db1829f9a6b71a38bc4461867a3c4
https://github.com/llvm/llvm-project/commit/29a48499738db1829f9a6b71a38bc4461867a3c4
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
A llvm/test/CodeGen/Hexagon/vreduce-fminmax-nan-fixup.ll
A llvm/test/CodeGen/Hexagon/vreduce-max-lowering.ll
A llvm/test/CodeGen/Hexagon/vreduce-min-lowering.ll
Log Message:
-----------
[Hexagon] Lower vreduce(min|max)((imum)?) (#211898)
Add custom lowering for VECREDUCE_FMIN/FMAX/FMINIMUM/FMAXIMUM on HVX
float vector types. The target-independent default expansion reduces
these pairwise using the hardware min/max instruction directly, which
does not implement IEEE-754 NaN-propagation semantics: a NaN in the
input can silently corrupt the reduction result, and an all-NaN input
produces a non-NaN value instead of NaN.
The custom lowering strips NaN elements to the appropriate neutral value
(+/-Inf) before the pairwise tree reduction so a NaN can't corrupt other
lanes, then fixes up the scalar result to NaN if every input element was
NaN.
FMINNUM/FMAXNUM on HVX vector types get the same treatment: NaN operands
are replaced with the neutral value before delegating to the hardware
min/max, with a fixup to restore NaN when both operands were NaN (per
llvm.minnum/maxnum semantics).
Co-authored-by: Kaushik Kulkarni <kauskulk at qti.qualcomm.com>
Commit: 972a171dd102201089ea65673a72b832f29de297
https://github.com/llvm/llvm-project/commit/972a171dd102201089ea65673a72b832f29de297
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/InstCombine/SystemZ/libcall-arg-exts.ll
Log Message:
-----------
[InstCombine] Generate test checks (NFC) (#222670)
With UTC_ARGS --disable to preserve the declaration check lines
at the end.
Commit: 658872c4dffbe435042faee03672b5b03c620977
https://github.com/llvm/llvm-project/commit/658872c4dffbe435042faee03672b5b03c620977
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
A llvm/test/CodeGen/SystemZ/zos-align-constpool.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
Log Message:
-----------
[SystemZ][z/OS] Correctly align the constant pool and the PPA1 (#222128)
Both should be half-word aligned. However, testing revealed that both
can end up on odd addresses, which leads to relocation errors. Fix is to
change the alignment.
Commit: af00b1753fe813df84e1c262fe48a215929ea1a3
https://github.com/llvm/llvm-project/commit/af00b1753fe813df84e1c262fe48a215929ea1a3
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[BUILD]: Fix for #221812 (#222671)
[BUILD]: Fix for #221812
Commit: 5e497ce1838bd4448aa484262a00ce60c324ed4f
https://github.com/llvm/llvm-project/commit/5e497ce1838bd4448aa484262a00ce60c324ed4f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/for_reduction_task_codegen.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
Log Message:
-----------
[OpenMP] Avoid use of ConstantExpr::getSizeOf() (#222662)
Support for this will be dropped as part of the ptradd migration.
Replace with a constant size.
While I'm touching the code anyway, I also simplified the size
calculation a bit. It's computing both the size in bytes and in
elements. Avoid doing an unnecessary division followed by multiply for
the size in bytes.
Commit: 847fb5cfde68fdea490171bc24087ebb0cd90738
https://github.com/llvm/llvm-project/commit/847fb5cfde68fdea490171bc24087ebb0cd90738
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Object/GOFFObjectFile.h
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
A llvm/test/tools/llvm-ar/zos-symattrs.test
M llvm/test/tools/llvm-ar/zos-write.test
Log Message:
-----------
[llvm-ar][GOFF] Implement symbol attributes for GOFF archives (#214528)
z/OS archive symbol table entries contain a 32-bit attribute word
alongside each member offset.
The low three bits encode:
```
bit 2 (0x4): 64-bit addressing (AMODE 64)
bit 1 (0x2): XPLink calling convention
bit 0 (0x1): Writable Static Area (WSA)
```
Previously in e2c8fa0, llvm-ar wrote zero for these attributes. This
patch reads them from GOFF ESD
records and stores them in a SymbolAttrs vector parallel to the existing
Symbols vector in MemberData
to emit the correct word per symbol.
These attributes are tested using `llvm-nm --print-armap` implemented in
#214527 within the LIT test.
Commit: 746d09af26a84cdbe1e03aeb436c8ada09ac8ecf
https://github.com/llvm/llvm-project/commit/746d09af26a84cdbe1e03aeb436c8ada09ac8ecf
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/SystemZ/zos-eh.ll
Log Message:
-----------
[SystemZ][z/OS] Fix "relative immediate relocation section mismatch" (#222437)
Constants should go inside the text section, but this is not explicitly
coded. In the test case, the EH table is generated into a PR section.
Then the constant pool of function `fn_with_const_pool()` is emitted,
which goes into the PR section of the EH table instead of the code
section. When the constant is later referenced in the code, the relative
offset cannot be calculated because different sections are involved.
The fix is to explicitly return the text section for constants.
Commit: f24c52bc14c55646ce37e8e5a6e5f174e896fbf4
https://github.com/llvm/llvm-project/commit/f24c52bc14c55646ce37e8e5a6e5f174e896fbf4
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR]: Fix format after #222671 (#222674)
[MLIR]: Fix format after #222671
Commit: b879ce97a1a7b097b5ed98468ced33d543af9558
https://github.com/llvm/llvm-project/commit/b879ce97a1a7b097b5ed98468ced33d543af9558
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-warnings.ll
Log Message:
-----------
[compiler-rt][profdata] Use x86 triple in instrprof-debug-info-correlate-warnings.ll (#222668)
Test added by #163254 / 28c048ec0f0a677115a0b00a88a7d013f925f2b8.
It has been failing in Armv8 (32-bit) builds since then. I'm only just
getting to it.
warning: overriding the module target triple with
armv8a-unknown-linux-gnueabihf [-Woverride-module]
'x86-64' is not a recognized processor for this target (ignoring
processor)
'+cmov' is not a recognized feature for this target (ignoring feature)
'+cx8' is not a recognized feature for this target (ignoring feature)
<...>
error: a.c:1:0: in function main i32 (): calling convention is
hard-float, but floating-point registers are unavailable
Happens on AArch64 too, but it's not fatal there. This happens because
the ll has x86 options in it, but the RUN used whatever the host triple
was.
I don't know what's critical in this file, so I'm adding a --target x86
option to the test to fix this.
Commit: fc6a6716ed7a0b90535ad2b02abff1b041cce542
https://github.com/llvm/llvm-project/commit/fc6a6716ed7a0b90535ad2b02abff1b041cce542
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
Promote BOLT from Office hours to Online Sync-Up (#222492)
Office hours are intended for chats with individual contributors:
> A number of experienced LLVM contributors make themselves available
for a chat on a regular schedule, to anyone who is looking for some
guidance.
BOLT community has outgrown office hours format and has been operating
as sync-up.
Reflect that in the Getting Involved page.
Commit: 6e85ed2ede8bc34753e7b8740ccdf4b309a80fdf
https://github.com/llvm/llvm-project/commit/6e85ed2ede8bc34753e7b8740ccdf4b309a80fdf
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/LLVMIR/pch.h
M mlir/lib/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
Log Message:
-----------
[mlir][LLVM] Reuse a PCH for MLIRLLVMDialect (NFC) (#222578)
Build a private precompiled header from the LLVM dialect and LLVM IR
headers and use it for MLIRLLVMDialect. Build dialect libraries before
conversions so the PCH is available early and repeated parsing is
avoided.
Relative to the MLIRIR PCH parent, clean Release builds of LLVM and MLIR
with `ninja -j16` improved as follows:
```
wall: 420.41s -> 398.79s (-5.14%)
user: 6125.97s -> 5789.14s (-5.50%)
system: 481.88s -> 455.05s (-5.57%)
```
Assisted-by: Codex
Commit: a726ed254aeaae71a92fddd094130b2e1588ce42
https://github.com/llvm/llvm-project/commit/a726ed254aeaae71a92fddd094130b2e1588ce42
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
Log Message:
-----------
[AMDGPU][NFC] Fix salu use to use SGPR (#222657)
Fix tests with "salu_use" in their name to use SGPRs.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 3dfd0f8f396075678ae16f623eb01390b5b140d0
https://github.com/llvm/llvm-project/commit/3dfd0f8f396075678ae16f623eb01390b5b140d0
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/IRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
Log Message:
-----------
[IRBuilder] Remove unused AllocTy argument (#222667)
This argument is not used at all. The size is explicitly passed in a
separate argument.
Commit: 4d09d062b4fb2e22f54b1125cbcea734efda81a8
https://github.com/llvm/llvm-project/commit/4d09d062b4fb2e22f54b1125cbcea734efda81a8
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/CodeViewSymbols.def
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/DebugInfo/CodeView/SymbolDumper.cpp
M llvm/lib/DebugInfo/CodeView/SymbolRecordMapping.cpp
M llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
A llvm/test/tools/llvm-pdbutil/s-association.yaml
M llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp
Log Message:
-----------
[CodeView] Read and dump `S_ASSOCIATION` (#221034)
`S_ASSOCIATION` associates one symbol with another one. Right now, it's
only used for coroutines. The `get_associatedSymbol*` functions from
[`IDiaSymbol8`](https://learn.microsoft.com/en-us/visualstudio/debugger/debug-interface-access/idiasymbol8)
use this record. I'm not sure if the VS debugger uses this at all.
The symbol value was added earlier, but we weren't able to read/write
it. Also, lld would remove it when linking, as it didn't know if it
contained type indices.
This PR adds support for that. It's only visible in llvm-pdbutil where
we can dump it and roundtrip through yaml. I checked that it uses the
correct format when used with the DIA dump sample.
The coroutine kind is still missing. It's contained in the flags of an
`S_FRAMEPROC`. But it'd like to wait for #215887 which touches the flags
in YAML.
Commit: 8f100d2b11256fb538ace5ac45c9cd9be5d56335
https://github.com/llvm/llvm-project/commit/8f100d2b11256fb538ace5ac45c9cd9be5d56335
Author: Pablo Reble <pablo.reble at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
Log Message:
-----------
[SLP][AMDGPU] Fix test to actually exercise count-check condition (#222022)
The gfx906 RUN lines in `inst-count-heuristic.ll` never exercised the
`SLPInstCountCheck` heuristic they were meant to test.
This patch converts the test kernel from `i32` to `i16` elements so the
heuristic's `getVectorFactor() == 2` gate is actually reachable on
gfx906, and adds a `-slp-inst-count-check=false` RUN line to cover the
non-default behavior.
Commit: 5777c75fd91efa7abce23a74c4ec2381e8084b44
https://github.com/llvm/llvm-project/commit/5777c75fd91efa7abce23a74c4ec2381e8084b44
Author: Pablo Reble <pablo.reble at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
Log Message:
-----------
[SLP][AMDGPU] Fix load-address typo in v4f16 combine tests (#222112)
Patch addresses issue where tests are not performing 4 contiguous
elements load/store chain as intended.
- Correcting both typos (`%tmp6` vs. `%tmp10`) so each function
represents a contiguous 4-element chain.
- `copysign_combine_v4f16` and `canonicalize_combine_v4f16` now
vectorize identically on `GFX8` and `GFX9`.
- Adding `canonicalize_combine_v4f16_noncontiguous`, to preserve
existing test coverage, so the non-contiguous-gather path isn't silently
dropped.
Commit: 3c3c3d8141fe7582baab9c15ffd0bbfbba4ac8eb
https://github.com/llvm/llvm-project/commit/3c3c3d8141fe7582baab9c15ffd0bbfbba4ac8eb
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[LV] Strip unnecessary cl::opts from headers (NFC) (#221891)
Mark the ones which are static as such, strip declarations in headers to
avoid unnecessary dependencies, and nest the non-static ones under the
llvm namespace.
Commit: c47af0575fcfd5c3713ee009595500eb1ec0104b
https://github.com/llvm/llvm-project/commit/c47af0575fcfd5c3713ee009595500eb1ec0104b
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
Log Message:
-----------
[AMDGPU] Change physical VGPRs to 1024 for gfx13 (#222615)
GFX13 has 1024 physical VGPRs per SIMD in wave32 (512 in wave64)
Commit: fff83ec21990ed0bfee300f175b03317b1f709d6
https://github.com/llvm/llvm-project/commit/fff83ec21990ed0bfee300f175b03317b1f709d6
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
Log Message:
-----------
[AMDGPU] Add gfx13 MC support for v_cvt_scale_pk32_* instructions (#222616)
Commit: d5c0de99769824a032ef2f602f9939e28d259f06
https://github.com/llvm/llvm-project/commit/d5c0de99769824a032ef2f602f9939e28d259f06
Author: Anirudh Mathur <126768505+AnirudhMathur12 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/sys/stat/CMakeLists.txt
A libc/src/sys/stat/futimens.h
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/futimens.cpp
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/futimens_test.cpp
Log Message:
-----------
[libc] Implement futimens (#222251)
futimens(fd, times) is implemented on Linux by delegating to
the utimensat system call.
Fixes #220764
Commit: a4cff758b654b7c49c35e7445a025681b8e7a7f2
https://github.com/llvm/llvm-project/commit/a4cff758b654b7c49c35e7445a025681b8e7a7f2
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Introduce DeadInstrMorgue (#221482)
Move dead instructions collector and erasor into VecUtils, so that
it is usable by both, BundleVec and LoadStoreVec, vectorizers. NFC
Commit: 7962fc367a83caf8442a474660ab93ec5ed1ac22
https://github.com/llvm/llvm-project/commit/7962fc367a83caf8442a474660ab93ec5ed1ac22
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
Log Message:
-----------
[AMDGPU] Enable CSE in the GlobalISel post-legalizer combiner (#217258)
Enable GISel CSE in the legacy AMDGPU post-legalizer combiner so it
matches the new pass-manager path.
Use the standard CSE configuration for the optimization level. Create
correctly constrained virtual registers during legalization instead of
mutating register classes after creation, and notify GlobalISel
observers when register operands are replaced. This also updates the
affected GlobalISel checks.
More context:
https://github.com/llvm/llvm-project/pull/216274#pullrequestreview-4964537468
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 1e6f0cbabe1bce674eadb77814d98e2263823384
https://github.com/llvm/llvm-project/commit/1e6f0cbabe1bce674eadb77814d98e2263823384
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/semantics/DispatchThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ms.input.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ps.output.hlsl
M clang/test/SemaHLSL/Semantics/groupindex.hlsl
M clang/test/SemaHLSL/Semantics/invalid_entry_parameter.hlsl
A clang/test/SemaHLSL/Semantics/output-parameters.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
A clang/test/SemaHLSL/Semantics/semantic-indexing.hlsl
M clang/test/SemaHLSL/Semantics/target.ps.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.output.hlsl
M clang/test/SemaHLSL/Semantics/vertexid.ps.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M llvm/include/llvm/Frontend/HLSL/SemanticSignatures.h
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticStagesTest.cpp
Log Message:
-----------
[NFC][SemaHLSL][CGHLSL] Move semantic classification to common `HLSL/SemanticSignatures` (#218058)
Updates SemaHLSL and CGHLSL to not use stringref compares to distinguish
semantics and converts them to a common `SemanticKind` enum.
Further, it moves the classification of valid shader stages into a
common table to denote where a semantic is interpreted and how it is
used to to derive if it is valid.
This also updates tests that were using invalid semantic constructs to
use corrected versions.
This is a pre-req for the signature packing issues (#205875, etc) and
#189765
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 5784163e14db80f999a4269da2877215791e2617
https://github.com/llvm/llvm-project/commit/5784163e14db80f999a4269da2877215791e2617
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SizeOpts.cpp
Log Message:
-----------
[SizeOpts] Remove dead struct BasicBlockBFIAdapter (NFC) (#222536)
The last uses were removed on June 28, 2023 in commit
80155cbf0be1744953edf68b9729c24bd0de79c4 when hotness/coldness queries
were refactored into templated ProfileSummaryInfo member functions.
Assisted-by: Antigravity
Commit: f7dd24bbe0e94ba94e3c6feda1703544e631a485
https://github.com/llvm/llvm-project/commit/f7dd24bbe0e94ba94e3c6feda1703544e631a485
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/docs/Tutorials/transform/Ch1.md
M mlir/docs/Tutorials/transform/Ch4.md
M mlir/docs/Tutorials/transform/ChH.md
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/test/Dialect/Arith/sharding-propagation.mlir
M mlir/test/Dialect/Bufferization/canonicalize.mlir
M mlir/test/Dialect/Linalg/block-pack-matmul.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/elementwise/fold.mlir
M mlir/test/Dialect/Linalg/elementwise/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/elementwise/invalid.mlir
M mlir/test/Dialect/Linalg/elementwise/roundtrip.mlir
M mlir/test/Dialect/Linalg/fold-add-into-dest.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/scalable-unpack-producer-fusion.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-generalize.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-binary.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/Dialect/SparseTensor/encoding_with_symbols.mlir
M mlir/test/Dialect/SparseTensor/external_after_codegen.mlir
M mlir/test/Dialect/Transform/test-promote-tensors.mlir
M mlir/test/Examples/transform/Ch1/invalidation-1.mlir
M mlir/test/Examples/transform/Ch1/invalidation-2.mlir
M mlir/test/Examples/transform/Ch1/sequence.mlir
M mlir/test/Examples/transform/Ch2/sequence.mlir
M mlir/test/Examples/transform/Ch3/sequence.mlir
M mlir/test/Examples/transform/Ch4/multiple.mlir
M mlir/test/Examples/transform/Ch4/sequence.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
M mlir/test/Interfaces/TilingInterface/query-fusability.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Interfaces/TilingInterface/tile-elementwise.mlir
M mlir/test/Interfaces/TilingInterface/tile-fuse-and-yield-using-interface.mlir
M mlir/test/python/dialects/linalg/ops.py
Log Message:
-----------
[MLIR][Linalg] Change the syntax of elementwise kind attribute (#222569)
Remove the need to add a "kind=" lead for the elementwise operation
name, as well as the fully specified namespace for the attribute,
shortening the syntax from:
```
linalg.elementwise kind=#linalg.elementwise_kind<add>
```
to
```
linalg.elementwise <add>
```
Closes #221194
Assisted by: Claude Opus
Commit: e8c833b96ccd6a9e950e9a67fb59d451668532d1
https://github.com/llvm/llvm-project/commit/e8c833b96ccd6a9e950e9a67fb59d451668532d1
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/extf_truncf.mlir
Log Message:
-----------
[MLIR][XeGPU] Lower arith.truncf wider than one xevm.truncf group (#217130)
`xevm.truncf` lowers to device builtins that convert exactly 16 f16/bf16
elements
per call, so `TruncfToXeVMPattern` only matched a 16-element source. A
workgroup-level mxfp GEMM that quantizes A in the kernel produces a
wider one,
which nothing else lowers, so the module failed to build:
%r = arith.truncf %a : vector<32xbf16> to vector<32xf4E2M1FN>
// cannot be converted to LLVM IR: missing
`LLVMTranslationDialectInterface`
// registration ... for op: arith.truncf
Convert a whole number of groups at a time instead: slice the source
into
16-element groups, emit one `xevm.truncf` per group, and concatenate the
packed
results before the final bitcast. A source of exactly one group takes
the original
path with unchanged code, and a source that is not a whole number of
groups is
still left to the regular arith-to-LLVM path.
`arith.extf` carries the same restriction on its result, but no wider
case has come
up, so it is left as is.
Commit: 9d4a7d05d2ef4774f08a0f95faef510c0be469a9
https://github.com/llvm/llvm-project/commit/9d4a7d05d2ef4774f08a0f95faef510c0be469a9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Basic/LangOptions.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/test/CodeGen/Hexagon/swp-large-rec.ll
R llvm/test/CodeGen/X86/llc-fp-contract-warning.ll
M llvm/tools/llc/llcdriver.cpp
Log Message:
-----------
CodeGen: Remove AllowFPOpFusion from TargetOptions (#222683)
Commit: a56fd548f257c4fc89387ab2bb483acee7c59747
https://github.com/llvm/llvm-project/commit/a56fd548f257c4fc89387ab2bb483acee7c59747
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Tools/mlir-translate/MlirTranslateMain.h
M mlir/lib/Tools/mlir-translate/MlirTranslateMain.cpp
Log Message:
-----------
[mlir-translate] Add structured translation entry point (#222623)
Please read: [RFC: Embeddable LLVM tool drivers for long-lived
hosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and the [MLIR
section](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-mlir-13).
`mlir-opt` already separates its standalone command-line frontend from
its reusable implementation:
```text
command-line parsing
↓
MlirOptMainConfig
↓
MlirOptMain(input buffer, output stream, registry, config)
```
`mlir-translate` currently combines those responsibilities inside
`mlirTranslateMain(int argc, char **argv, ...)`: it registers and parses
its command-line options, opens the input and output files, and then
performs the translations.
This patch applies the existing mlir-opt structure to mlir-translate. It
extracts the MLIR translation executor behind a structured overload
accepting an input buffer, output stream, selected Translation objects
and an MlirTranslateMainConfig. The existing command-line entry point
continues to parse the same options and delegates to the new overload,
so its command-line behaviour remains unchanged.
Separating parsing from execution is useful for any application
embedding MLIR. Such an application already has its input, output and
selected translation, and should not be required to install another
command-line frontend into the process merely to call MLIRTranslateLib.
[WasmBolt](https://github.com/anutosh491/WasmBolt)(try
[here](https://anutosh21.github.io/WasmBolt/)) is one concrete consumer.
It runs `mlir-opt`, `opt`, `llc`, Clang and LLD inside one long-lived
browser-hosted LLVM process. Calling the complete `mlir-opt` and
`mlir-translate` command-line frontends in that process causes common
options such as `-o` to be registered twice in LLVM's process-global
command-line registry.
```
mlir-translate: CommandLine Error: Option 'o' registered more than once!
LLVM ERROR: inconsistency in registered CommandLine options
```
The structured entry point allows WasmBolt to invoke the actual MLIR
translation operation without registering another command-line frontend.
This is needed to continue naturally from the MLIR LLVM dialect to LLVM
IR inside the same compiler session.
Add a simple test where the test register its own `-o` option first,
then runs two translations through the new API and checks the output.
This confirms that the translation path works without touching the
command-line parser. **Can Improve it a bit if it looks too informal.**
Commit: 5b757b81db35e7611f0d5f242a2bd53f3894c084
https://github.com/llvm/llvm-project/commit/5b757b81db35e7611f0d5f242a2bd53f3894c084
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__configuration/compiler.h
M libcxx/include/__memory/allocator.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_temporary_buffer.h
R libcxx/include/__new/allocate.h
M libcxx/include/__utility/small_buffer.h
M libcxx/include/module.modulemap.in
M libcxx/include/new
M libcxx/src/include/aligned_alloc.h
R libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.capacity/max_size.pass.cpp
M libcxx/test/std/language.support/support.dynamic/hardware_inference_size.compile.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cons/size.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/pointer_destruction.pass.cpp
Log Message:
-----------
[libc++] Remove __libcpp_allocate (#220981)
We use `__libcpp_allocate` and friends only in very specific
circumstances. Instead of providing a private API we can make
`std::allocator` the default API for the uses of `__libcpp_allocate`.
Commit: 20ddf3e2f5a9fa2717d9cfea19660ef1f0399044
https://github.com/llvm/llvm-project/commit/20ddf3e2f5a9fa2717d9cfea19660ef1f0399044
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMerge.cpp
M compiler-rt/test/fuzzer/fuzzer-dirs.test
M compiler-rt/test/fuzzer/fuzzer-oom-with-profile.test
M compiler-rt/test/fuzzer/fuzzer-oom.test
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[libFuzzer] Use uppercase "B" for byte units in output (#220828)
Fixes issue #56766. libFuzzer printed data sizes as "b", "Kb" and "Mb",
which denote bits. Use "B", "KB" and "MB" instead.
Commit: 72f5694df7b6c9fa94f22468f5cd468d305b9917
https://github.com/llvm/llvm-project/commit/72f5694df7b6c9fa94f22468f5cd468d305b9917
Author: Tapiwa Gonga <126596199+tapiwagonga at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/docs/dev/code_coverage.md
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/HermeticTestUtils.cpp
Log Message:
-----------
[libc] Enable full-build code coverage (#221802)
Extended LIBC_ENABLE_COVERAGE to support LLVM_LIBC_FULL_BUILD=ON and
added the LIBC_ENABLE_COVERAGE_MCDC CMake option for MC/DC coverage.
This enables developers and CI pipelines to measure source-level and
MC/DC coverage directly on hermetic tests in full-build configurations
without relying on the host C library.
Updated add_libc_hermetic in LLVMLibCTestRules.cmake to link hermetic
tests with -noprofilelib, -u__llvm_profile_runtime, and compiler-rt's
profiling library. Replaced internal entrypoint objects in
link_object_files with public entrypoint objects for the C functions
referenced by libclang_rt.profile.a.
Added calloc and __errno_location to HermeticTestUtils.cpp to satisfy
remaining freestanding profiling runtime dependencies. Updated
libc/docs/dev/code_coverage.md with full-build instructions.
Assisted-by: Automated tooling, human reviewed.
Commit: 19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4
https://github.com/llvm/llvm-project/commit/19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4
Author: Bar Soloveychik <barsolo at meta.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/source/Core/Value.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.h
M lldb/source/Utility/RegisterValue.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterVector.py
M lldb/unittests/Target/RegisterTypeBuilderClangTest.cpp
M lldb/unittests/Utility/RegisterValueTest.cpp
Log Message:
-----------
[lldb] Expose vector registers through SBValue (#220707)
This is adding GDB remote vector register support.
- Build exact Clang types from parsed vector metadata.
- Use native Clang vectors where valid and arrays where required to
preserve exact layouts.
- Support nested, pointer, boolean, and non-power-of-two vectors.
- Expose vector lanes through `SBValue` children and expression paths.
- Handle typed vector data correctly across target byte orders.
- Add builder, SB API, layout, cache, and big-endian tests.
Example:
```
vector = frame.FindRegister("v0")
vector.GetNumChildren() # 4
vector.GetChildAtIndex(2).GetValue() # "3.5"
vector.GetValueForExpressionPath("[2]").GetValue() # "3.5"
v = frame.FindRegister("v0")
print([v.GetChildAtIndex(i).GetValue()
for i in range(v.GetNumChildren())])
# ['1.5', '2.5', '3.5', '4.5']
```
Structured `register read` output is added separately in patch 5.
---------
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: d23678bd45b149107e43eed3d56a02571bafef7f
https://github.com/llvm/llvm-project/commit/d23678bd45b149107e43eed3d56a02571bafef7f
Author: Ran Regev <regev.ran at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/AST/DeclPrinter.cpp
A clang/test/AST/ast-print-decomposition.cpp
M clang/test/Analysis/anonymous-decls.cpp
M clang/test/Analysis/cfg.cpp
Log Message:
-----------
[clang] Support DecompositionDecl in -ast-print (#221711)
`DeclPrinter` had no `VisitDecompositionDecl`, so `auto [a, b] = get();`
printed as `auto = get();`, silently dropping the binding list (worse
at namespace scope, where it also produced a stray empty statement per
binding).
Add `DeclPrinter::VisitDecompositionDecl`, printing the full
`type [bindings] = init;` form for all three decomposition kinds
(aggregate/member, array, tuple-like), matching what `VisitVarDecl` does
for an ordinary declaration. Specifier and initializer printing is
shared between the two via two helpers (`printVarDeclSpecifiers`,
`printVarInitializer`) so they can't drift apart.
Each binding prints correctly, including a pack's leading `...` and
per-binding attributes. `BindingDecls` are skipped when walking a
`DeclContext` directly, since each is already printed as part of its
`DecompositionDecl;` a decomposition declaration is likewise kept out of
the tag-declaration grouping in `VisitDeclContext`, which would
otherwise merge it into a preceding `struct S { ... } obj;`.
Assisted-by: AI
Commit: bdf81254f94e1449ee10e50593df1211f43ba2e1
https://github.com/llvm/llvm-project/commit/bdf81254f94e1449ee10e50593df1211f43ba2e1
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.h
M compiler-rt/lib/ubsan/ubsan_handlers.cpp
Log Message:
-----------
[compiler-rt] Handle weak interfaces with MinGW GCC (#222706)
Windows weak-function emulation uses MSVC linker /alternatename
directives, which GNU ld does not support. Use direct exported
definitions, avoid registering unsupported DLL weak aliases, and
reference UBSan's real C++ implementation.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: 8124aa1a3567930ab0823b760ec81ac2457b7477
https://github.com/llvm/llvm-project/commit/8124aa1a3567930ab0823b760ec81ac2457b7477
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix bazel build for FrontendHLSL (#222716)
Fixes #1e6f0cbabe1bce674eadb77814d98e2263823384 by adding missing
dependency.
Commit: 8c520baeb4ed4f1c8d07f84ce5d5f5922a754bed
https://github.com/llvm/llvm-project/commit/8c520baeb4ed4f1c8d07f84ce5d5f5922a754bed
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/asan/asan_globals_win.cpp
Log Message:
-----------
[compiler-rt][asan] Include intrin.h for MinGW GCC (#222709)
asan_globals_win.cpp calls __debugbreak in the runtime thunk
configurations. Include MinGW's intrinsic header so the function is
declared when this file is compiled with GCC.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: bd05ca8ca6da9a275234c59fcb1886505a5958e0
https://github.com/llvm/llvm-project/commit/bd05ca8ca6da9a275234c59fcb1886505a5958e0
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/asan/asan_win_common_runtime_thunk.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win_defs.h
Log Message:
-----------
[compiler-rt] Support GNU section attributes on Windows (#222707)
MSVC and Clang place sanitizer sentinels and CRT callbacks with
__declspec(allocate) after declaring their sections with #pragma
section. MinGW GCC uses the section attribute instead, so select the
appropriate spelling for each compiler.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: 2d51e69fd09e4bdeeed441c8c5fc256584178c79
https://github.com/llvm/llvm-project/commit/2d51e69fd09e4bdeeed441c8c5fc256584178c79
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/cmake/modules/CMakeLists.txt
M mlir/cmake/modules/CMakeLists.txt
Log Message:
-----------
[CMake] Don't reference unexported targets from dependency-only configs (#222630)
#221724 stopped exporting a project's targets file when that project is
enabled only as another project's dependency, but the build-tree
`ClangConfig.cmake` and `MLIRConfig.cmake` still include it
unconditionally. `find_package()` therefore finds the config and fails
inside it:
```
CMake Error at build/lib/cmake/clang/ClangConfig.cmake:19 (include):
include could not find requested file:
build/lib/cmake/clang/ClangTargets.cmake
Call Stack (most recent call first):
CMakeLists.txt:90 (find_package)
```
This breaks any configuration that enables Flang without also enabling
Clang or MLIR explicitly: `runtimes/CMakeLists.txt` calls
`find_package(Clang ...)`, which is deliberately not `REQUIRED` and is
expected to tolerate an unavailable package — but a *half-generated*
package is a hard error rather than a "not found". Concretely,
`-DLLVM_ENABLE_PROJECTS=flang -DLLVM_ENABLE_RUNTIMES=flang-rt` fails at
`runtimes-configure`, which is the configuration premerge uses for
flang-rt changes.
This patch guards the include the same way the export itself is guarded,
so a dependency-only project generates a config without a dangling
include. The install-tree path already handles this through
`get_config_exports_includes()`; only the build-tree path was missed.
MLIR has the same defect and is fixed here too. It is currently latent
only because `runtimes/CMakeLists.txt` calls `find_package(Clang)` and
not `find_package(MLIR)`; a `find_package(MLIR)` against a
dependency-only build tree fails identically at `MLIRConfig.cmake:33`.
Assisted-by: AI
Commit: dbeea4508e52856497e4080b1d3b265975044795
https://github.com/llvm/llvm-project/commit/dbeea4508e52856497e4080b1d3b265975044795
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang-rt/lib/cuda/init.cpp
Log Message:
-----------
[flang][cuda] Drop Mcuda_compiled definition (#222695)
Commit: bfe74bd081a4ad6322c6932c146d4d99815029ed
https://github.com/llvm/llvm-project/commit/bfe74bd081a4ad6322c6932c146d4d99815029ed
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-function-pointer-debug-none-base.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_blocking_pipes/PipeBlocking.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-select-untyped-ptr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-void-call-aggregate-arg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_kernel_attributes/max_work_group_size.ll
Log Message:
-----------
[NFC][SPIR-V] Fix missing RUN prefix that disabled spirv-val checks (#222609)
Commit: 4814e098872b365e52401a3ebb64c91b3bd0b90d
https://github.com/llvm/llvm-project/commit/4814e098872b365e52401a3ebb64c91b3bd0b90d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/Lowering/fenv.cir
M clang/test/CIR/Lowering/goto.cir
Log Message:
-----------
[Clang][CIR] Adapt tests post #217277 (#222583)
Adapt tests post #217277. Failing bot:
* https://lab.llvm.org/staging/#/builders/241/builds/13
Commit: 9974c3864e1ffb5feed8e99d4191084a96d84a09
https://github.com/llvm/llvm-project/commit/9974c3864e1ffb5feed8e99d4191084a96d84a09
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Log Message:
-----------
[gn] port 6fbfc9261c8f453 (#222726)
6fbfc9261c8f453 make c-t-extra/clangd/unittests/DiagnosticsTests.cpp
include clang-tidy-config.h.
Commit: 7c0969c0842a1b19bcffd8bf3b67a76badb2c431
https://github.com/llvm/llvm-project/commit/7c0969c0842a1b19bcffd8bf3b67a76badb2c431
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Tosa/Transforms/TosaGatherScatterHardening.cpp
A mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening-invalid.mlir
A mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening.mlir
Log Message:
-----------
[TOSA] Add pass to sanitize gather/scatter indices (#221200)
Add new TosaGatherScatterHardeningPass TOSA pass to clamp indices before
they are fed to a tosa.gather or tosa.scatter unless a suitable clamp
sequence already exists. This enables avoiding out-of-bounds accesses on
untrusted indices in tosa.gather and tosa.scatter lowering.
The pass fails if the dimension indexed by the indices tensor of any of
the tosa.gather or tosa.scatter is dynamic. The pass supports EXT-INT64
by using the same element type in the clamp min/max sequence as the
indices tensor. In case the indexed dimension is bigger than can be
represented in the element type bitwidth the maximum value in that
bitwidth is used.
Assisted-by: codex
Signed-off-by: Thomas Preud'homme <thomas.preudhomme at arm.com>
Commit: e47d10f55719cb5bc7dac81d49277938813b5ee4
https://github.com/llvm/llvm-project/commit/e47d10f55719cb5bc7dac81d49277938813b5ee4
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/__support/wctype_utils.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscasecmp.cpp
A libc/src/wchar/wcscasecmp.h
A libc/src/wchar/wcsncasecmp.cpp
A libc/src/wchar/wcsncasecmp.h
M libc/test/src/__support/wctype_utils_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscasecmp_test.cpp
A libc/test/src/wchar/wcsncasecmp_test.cpp
M libc/utils/docgen/wchar.yaml
Log Message:
-----------
[libc] Add wcscasecmp and wcsncasecmp implementations. (#222154)
Add a helper to wctype_utils.h for three-way comparison of individual
`wchar_t`s. As is the case in existing code, `wchar_t` is presumed to be
UTF-32.
Assisted-by: Automated tooling, human reviewed.
Commit: e286cb01a6ff6c01024db4e8216134b49163d1e6
https://github.com/llvm/llvm-project/commit/e286cb01a6ff6c01024db4e8216134b49163d1e6
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] fix mistake from f3909e073dd93f (#222735)
Commit: d90d78fe5ba15d66fea0fd0f9a3977f20f34aceb
https://github.com/llvm/llvm-project/commit/d90d78fe5ba15d66fea0fd0f9a3977f20f34aceb
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/HLFIR/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
Fix bazel builds (#222733)
- For flang/lib/Optimizer/HLFIR/Transforms -- fixes
https://github.com/llvm/llvm-project/pull/222013 by adding missing
dependencies.
- For lldb/source/Plugins:PluginRegisterTypeBuilderClang -- fixes
https://github.com/llvm/llvm-project/pull/220707 by adding missing
dependency
Commit: 4eae56cc40e02d55d926de8485ad846d74612449
https://github.com/llvm/llvm-project/commit/4eae56cc40e02d55d926de8485ad846d74612449
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 672843a3f2ee (#222740)
Commit: 30eac2a761a9773f970b539f9ea029c39e88b21a
https://github.com/llvm/llvm-project/commit/30eac2a761a9773f970b539f9ea029c39e88b21a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 5b757b81db35 (#222739)
Commit: 93ab99f40d86dead34ccb0d2aa45dfdd06d65cc9
https://github.com/llvm/llvm-project/commit/93ab99f40d86dead34ccb0d2aa45dfdd06d65cc9
Author: Konstantin Bogdanov <thevar1able at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/X86/ctlz.ll
M llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll
Log Message:
-----------
[LoopIdiom] Recognize the ctlz/cttz idiom when the input is known non-zero (#222373)
LoopIdiomRecognize converts a shift-until-zero loop to `ctlz`/`cttz`.
When the loop uses the count outside the loop, it needs a zero check of
the input before the loop. Without the check, the inputs 0 and 1 give
the same count. The recognizer stops when the check is not present.
The check is not necessary when the input is known non-zero. InstCombine
can remove the check for such inputs. Then the recognizer does not
convert the loop. This happens in `sbc_calc_scalefactors` from ffmpeg
with #222334: the input is an or reduction that starts at 32768, so it
is never zero, and the loop stays a loop.
This patch makes the recognizer accept a known non-zero input in place
of the zero check. The conversion is exact in this case.
`ctlz-loop.ll` in PhaseOrdering had a FIXME for a loop over `abs(n)`.
The recognizer now converts that loop too.
For the ffmpeg case, `isKnownNonZero` must also see that an or
recurrence with a non-zero start is non-zero. That change goes into
#222334.
Commit: a241c37f86cfe135cfa6c130b4aaf2ecd6a9d064
https://github.com/llvm/llvm-project/commit/a241c37f86cfe135cfa6c130b4aaf2ecd6a9d064
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 1e6f0cbabe1b (#222738)
Commit: a4f04ab5e25fa5dfebf83e3808b6ab96fd94f9bf
https://github.com/llvm/llvm-project/commit/a4f04ab5e25fa5dfebf83e3808b6ab96fd94f9bf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
Log Message:
-----------
[gn build] Port c86292488b86 (#222741)
Commit: 2d57805c92fb15e0a6c7c2f76d1927fbe3d3522a
https://github.com/llvm/llvm-project/commit/2d57805c92fb15e0a6c7c2f76d1927fbe3d3522a
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc:__support_wctype_utils (#222743)
Fixes https://github.com/llvm/llvm-project/pull/222154 (commit
e47d10f55719cb5bc7dac81d49277938813b5ee4) by adding missing dependency.
Commit: b686fb567fa4baeb810b0ae184811415daae68a1
https://github.com/llvm/llvm-project/commit/b686fb567fa4baeb810b0ae184811415daae68a1
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/delete-non-virtual-dtor.cpp
Log Message:
-----------
[clang][Sema] Don't warn about non-virtual destructors on destroying delete (#222047)
A destroying `operator delete `takes over destruction, so the delete
expression never invokes the destructor and
[[expr.delete]p3](https://eel.is/c++draft/expr.delete#3) carves it out.
Skip `CheckVirtualDtorCall` when the selected deallocation function is
destroying. `::delete` and `delete[]` keep warning.
Fixes #65524
Commit: 26609f5b95679e02d2373a7c97ff811872a4b505
https://github.com/llvm/llvm-project/commit/26609f5b95679e02d2373a7c97ff811872a4b505
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
A llvm/test/Transforms/SimpleLoopUnswitch/pr219510.ll
Log Message:
-----------
[SimpleLoopUnswitch] Fix bug in partially invariant unswitching (#222118)
Partial invariant unswitching can potentially hoist a load from header
to the preheader of the loop. If a potentially no-return function call
exists in the loop header before the load instruction, the
transformation is still performed, but this is not correct.
Commit: ffdc7df10d016542cee44dec8b777161a309bd55
https://github.com/llvm/llvm-project/commit/ffdc7df10d016542cee44dec8b777161a309bd55
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/memchr-11.ll
M llvm/test/Transforms/InstCombine/memchr-2.ll
M llvm/test/Transforms/InstCombine/memchr-3.ll
M llvm/test/Transforms/InstCombine/memchr-6.ll
M llvm/test/Transforms/InstCombine/memchr.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[SimplifyLibCalls] Explicitly annotate memchr selects (#222734)
SimplifyLibCalls creates a variety of selects when optimizing calls to
memchr. Explicitly annotate them as unknown as the conditions always
depend on a non-constant parameter to memchr with which we cannot infer
probability information without value profile data.
Commit: 1db5b9c26f5c153244e7617ad95ef140a1bdd2a0
https://github.com/llvm/llvm-project/commit/1db5b9c26f5c153244e7617ad95ef140a1bdd2a0
Author: SharonXSharon <xiaoranxu.nju at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A compiler-rt/test/sanitizer_common/TestCases/Linux/opendir_null.cpp
R compiler-rt/test/sanitizer_common/TestCases/Posix/opendir_null.cpp
Log Message:
-----------
[sanitizer] Address opendir interceptor test review comments (#222732)
Address comments on https://github.com/llvm/llvm-project/pull/221309
Move `opendir_null.cpp` to the `Linux` tests, convert the `LD_PRELOAD`
shim from `C++` to `C`, and simplify the null path construction.
Co-authored-by: Sharon Xu <sharonxu at fb.com>
Commit: aa7bd9ad7bd7f80da145af88e33acf95a7a6f671
https://github.com/llvm/llvm-project/commit/aa7bd9ad7bd7f80da145af88e33acf95a7a6f671
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/ConstantRange.h
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/CorrelatedValuePropagation/or-disjoint.ll
A llvm/test/Transforms/SCCP/or-disjoint.ll
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[ConstantRange] Add binaryOp supporting 'or disjoint'. (#222573)
Promote logic from https://github.com/llvm/llvm-project/pull/221832 to
ConstantRange::binaryOp so it can also be re-used from SCCP.
This enables a few additional folds & flag inference end-to-end:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1227
PR: https://github.com/llvm/llvm-project/pull/222573
Commit: e267729a4290b9ccd82c35dfbd2257473253b3e5
https://github.com/llvm/llvm-project/commit/e267729a4290b9ccd82c35dfbd2257473253b3e5
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-lsp-server/cir-lsp-server.cpp
Log Message:
-----------
[CIR][NFC] Reduce the dialects referenced by cir-lsp-server to minimum (#222131)
This is 1 of 2 patches that build on the work of others, and reduces the
list of dialects to just those in CIR + a handful of others. Between
this, 1 other commit, and the existing patches proposed by others, we
reduce the 'overhead' of the CIR build to +30%.
AI Disclaimer: Claude came up with this and the list. I'm not sure it is
correct, but we pass all tests.
Commit: db5421adfa1d8984bf0015ded33d12f9bbfbe80f
https://github.com/llvm/llvm-project/commit/db5421adfa1d8984bf0015ded33d12f9bbfbe80f
Author: ThePo1es <choijinbeom9 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/umask.h
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/umask.cpp
A libc/src/sys/stat/umask.h
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/umask_test.cpp
Log Message:
-----------
[libc] Implement umask (#222499)
Implement the POSIX umask() entrypoint for Linux and register it for
aarch64, riscv and x86_64. umask cannot fail, so the syscall wrapper
returns mode_t directly and the entrypoint does not touch errno.
Fixes #220759
Assisted-by: Claude Code
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 78d1301c0ffda9d2a1ebcbc90ed60ed3f0a4f04d
https://github.com/llvm/llvm-project/commit/78d1301c0ffda9d2a1ebcbc90ed60ed3f0a4f04d
Author: Oliver Old <mail at oold.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
[llvm][release] Update package versions in the Windows release script (#215749)
- Upgrade LibXML2 to version 2.15.3
- Fix clang-cl/lld-link check never failing
- Fix PYTHONHOME detection failing if no `head` utility is installed
- Fix PYTHONHOME detection failing for Python Manager-installed Python
Fixes #207197.
Fixes #215138.
Commit: 8ed9cadeb6224ca3818f4277935aca31a6c73609
https://github.com/llvm/llvm-project/commit/8ed9cadeb6224ca3818f4277935aca31a6c73609
Author: Jeong Jihyeon <84846295+JihyeonJeong129 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdio.yaml
M libc/src/stdio/CMakeLists.txt
A libc/src/stdio/fmemopen.cpp
A libc/src/stdio/fmemopen.h
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/fmemopen_test.cpp
Log Message:
-----------
[libc] Implement fmemopen (#221748)
Implement the POSIX `fmemopen` function.
### Validation
- Ran `ninja -C build-libc -j8 libc_stdio_unittests`.
- Ran `ninja -C build-libc -j8 check-libc`.
Fixes #220762
Commit: 5b6710a6cc6cca5f182a3fc4f12ce82fd2646c6e
https://github.com/llvm/llvm-project/commit/5b6710a6cc6cca5f182a3fc4f12ce82fd2646c6e
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
Log Message:
-----------
[CIR] Fix a dependency problem in ABI test (#222717)
A recent change removed mlir-translate as a dependency of CIR and
changed tests to use cir-translate instead. One test was committed after
that change and missed the update.
Commit: be9584e0dfc480193fa47645b302f630f41fb772
https://github.com/llvm/llvm-project/commit/be9584e0dfc480193fa47645b302f630f41fb772
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/test/tsan/Darwin/write-interpose.c
Log Message:
-----------
[TSan][Darwin][Test-only] Fix crash in write-interpose.c test (#222656)
Due to this test running with verbosity turned up, an early 'Report'
happened to get caught by the test's write interceptor, and on newer
macOS versions the interceptor's call to printf was attempting to
allocate before the allocator was initialized - leading to a crash.
This patch instead uses snprintf to a stack allocated buffer in order to
avoid allocating in the interceptor.
rdar://184804426
Commit: c5a4e6d87b7dcde64e1a2f4422e1eeccb0d4a509
https://github.com/llvm/llvm-project/commit/c5a4e6d87b7dcde64e1a2f4422e1eeccb0d4a509
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add packed multiply-parts accumulate intrinsics (#222571)
Support the RISC-V P packed multiply-parts accumulate instructions, which
add selected products into `rd`.
The intrinsics lower to dedicated `PMACC_HALVES_*` SelectionDAG nodes
rather than an `add` of plain products, ensuring instruction selection
does not depend on DAGCombine folding. On RV32, the word forms
accumulate into a GPR pair via new `WMACC`, `WMACCU`, and `WMACCSU`
nodes.
Also add corresponding Clang builtins and wrappers in
`riscv_packed_simd.h`.
Spec:
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-multiply-parts-accumulate
Commit: b4af99a87e1fbea9dd170c2c3bd15b9f87a69419
https://github.com/llvm/llvm-project/commit/b4af99a87e1fbea9dd170c2c3bd15b9f87a69419
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
Log Message:
-----------
[VPlan] Use VPlan-based costs for scalarized FP inductions. (#222442)
Continue the migration of induction costs to be VPlan-based by dropping
the legacy fallback in precomputeCosts for FP inductions. Widened FP
inductions were already costed by VPWidenIntOrFpInductionRecipe; the
missing piece is the scalarized form. Extend both VPDerivedIVRecipe and
VPScalarIVStepsRecipe to support FP inductions.
This also removes WidenedIVs, which becomes dead: it is only ever filled
from VPWidenIntOrFpInductionRecipe, and the legacy path now only sees
pointer inductions.
The new cost numbers should be more accurate, taking into account the
int->fp conversion cost, plus FMul and FAdds we generate.
Checking if FAdd/FMul can be folded requires a few additional checks (in
particluar the FAdd requires -0.0 to fold, FMul needs 1.0,
https://alive2.llvm.org/ce/z/g_khUS). Currently we do not yet carry
fast-math flags on the VPDerivedIVRecipes, so those are not considered
for now. The difference should be negligable in practice.
PR: https://github.com/llvm/llvm-project/pull/222442
Commit: 3d9b5d0d0f0a7affd4a5cd34523c60647b9164dc
https://github.com/llvm/llvm-project/commit/3d9b5d0d0f0a7affd4a5cd34523c60647b9164dc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Dialect/LLVMIR/invalid.mlir
Log Message:
-----------
[mlir][LLVM] Prevent vector bit-width overflow (#220898)
Compute vector bit widths from the rank-one MLIR dimension and saturate
the 64-bit product. Otherwise, large dimensions can overflow the
multiplication or be truncated by ElementCount and bypass the 2^17-bit
verifier limit.
Add regression coverage for both vector.insert and vector.extract.
Before the fix, the oversized vector.insert case was accepted and its
expected diagnostic was not produced.
Found by Coverity.
Assisted-by: Codex
Commit: 56d496fa86a8fd4be06b459c278753b4660f42d6
https://github.com/llvm/llvm-project/commit/56d496fa86a8fd4be06b459c278753b4660f42d6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
Log Message:
-----------
[RISCV] Remove TuneHasSingleElementVecFP64 has a configurable tune feature for sifive-x180. (#222496)
X180 is a DLEN=64 CPU with 1 vector ALU. By definition it is always
single element FP64.
Commit: 7d7238007b1f09bf7d4a91115173a996f7758fb1
https://github.com/llvm/llvm-project/commit/7d7238007b1f09bf7d4a91115173a996f7758fb1
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-clang-flang.py
Log Message:
-----------
[Offload] Fix AMDGPU clang/flang buildbot config (#222761)
It appears that this buildbot was misconfigured for quite some time and
not quite running the way it should have been running.
This patch should address the issue of CMake not being able to split the
two paths for the additional cache files at the ';' and thus, not
picking them up correctly.
A local test build succeeded after this fix.
Commit: fc696f791e06bdc0c0aa10afa65e2243db528409
https://github.com/llvm/llvm-project/commit/fc696f791e06bdc0c0aa10afa65e2243db528409
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
A flang/test/Fir/call-properties.fir
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/TableGen/Operator.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Math/Transforms/ExtendToSupportedTypes.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/TableGen/Operator.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
A mlir/test/Conversion/FuncToLLVM/call-attributes.mlir
M mlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir
M mlir/test/Dialect/SPIRV/IR/target-env.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTest.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
Log Message:
-----------
[mlir] Migrate aggregate builders to explicit properties (#219195)
Pass typed property structs and discardable attributes separately at ODS
aggregate builder call sites.
This is part of a general migration to use the "new" properties-based
APIs #155475
Assisted-by: Codex
Commit: 2fc19f8c9d70209bada5249632fd0d2523a59952
https://github.com/llvm/llvm-project/commit/2fc19f8c9d70209bada5249632fd0d2523a59952
Author: Colin De Vlieghere <cdevlieghere at tesla.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
Log Message:
-----------
[mlir][bufferization] Expose checkPreBufferizationAssumptions helper (#221302)
Downstream users of bufferization may want to run this check without
invoking the entire one-shot module analysis. If the check is not run
and invalid IR is encountered, OneShotBufferize tends to crash rather
than emitting a nice error message.
This patch simply exposes `checkPreBufferizationAssumptions` to the
header file so it is accessible to other users.
Commit: 041300fa05151b3819478f33daa4384922b4b74e
https://github.com/llvm/llvm-project/commit/041300fa05151b3819478f33daa4384922b4b74e
Author: Kacper Fiedorowicz <kacper at mail.openlinux.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/aarch64/headers.txt
M libc/include/llvm-libc-macros/darwin/CMakeLists.txt
A libc/include/llvm-libc-macros/darwin/signal-macros.h
M libc/include/llvm-libc-macros/signal-macros.h
M libc/include/llvm-libc-types/__jmp_buf.h
M libc/include/llvm-libc-types/fenv_t.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/sigprocmask.h
M libc/src/setjmp/aarch64/sigsetjmp.cpp
M libc/src/setjmp/darwin/CMakeLists.txt
M libc/src/setjmp/darwin/sigsetjmp_epilogue.cpp
M libc/src/setjmp/longjmp.h
M libc/src/setjmp/setjmp_impl.h
A libc/src/signal/darwin/CMakeLists.txt
A libc/src/signal/darwin/sigaddset.cpp
A libc/src/signal/darwin/sigdelset.cpp
A libc/src/signal/darwin/sigemptyset.cpp
A libc/src/signal/darwin/sigfillset.cpp
A libc/src/signal/darwin/sigprocmask.cpp
M libc/test/UnitTest/FEnvSafeTest.cpp
A libc/test/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/test/src/__support/OSUtil/darwin/sigprocmask_test.cpp
M libc/test/src/signal/sigaddset_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
Log Message:
-----------
[libc] Fix Darwin aarch64 fenv and sigsetjmp build support (#192079)
This patch fixes Darwin aarch64 build failures in libc around fenv and
sigsetjmp support.
Before this change, the Darwin aarch64 fenv implementation did not match
the public fenv_t layout and referenced several Darwin-specific
exception/control bits that were not defined in llvm-libc. This caused
libc builds to fail in fenv_darwin_impl.h with a sizeof(fenv_t) vs.
internal-state mismatch and multiple undeclared-identifier errors for
FE_FLUSHTOZERO and the FPCR trap/flush bits.
This patch fixes that by updating the internal Darwin aarch64
floating-point state layout to match fenv_t, defining the missing Darwin
FPCR bit values used by the implementation, and handling the
flush-to-zero exception bit consistently.
The patch also fixes the Darwin sigsetjmp path by enabling sigjmp_buf
support on Apple targets, adding the Darwin signal pieces needed by that
path (sigaddset, sigdelset, sigemptyset, sigfillset, sigprocmask, plus
Darwin signal macros), and updating the aarch64 sigsetjmp inline
assembly to branch through a local label before jumping to setjmp,
avoiding an assembler error from using cbz with an external symbol
target.
Commit: f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
https://github.com/llvm/llvm-project/commit/f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/test/UnitTest/CMakeLists.txt
A libc/test/UnitTest/CharLiteralUtils.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/stringview_test.cpp
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/writer_test.cpp
Log Message:
-----------
[libc] Parameterize printf_core::Writer test to cover wchar_t. (#222744)
This is a follow-up to #220669, which did the initial refactor of
`printf_core::Writer` enabling the `CharT` template parameter.
Move the helper for selecting character literals added in #203355 out of
stringview_test into a util header library.
Assisted-by: Automated tooling, human reviewed.
Commit: 240b9213c8d6dfa8a089267212bcf3964731746e
https://github.com/llvm/llvm-project/commit/240b9213c8d6dfa8a089267212bcf3964731746e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
A mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialectDecl.h
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][NVGPU] Split out the dialect declaration to improve build time (NFC) (#222767)
Move NVGPUDialect to a self-contained declaration header and use it in
three consumers that do not need generated NVGPU operations.
Median instructions fell from 221.225B to 166.874B (-24.568%) and wall
time from 34.31s to 25.61s (-25.357%).
Assisted-by: Codex
Commit: 00b8327d38e533068f78e5e8170e1c3ea4ef094a
https://github.com/llvm/llvm-project/commit/00b8327d38e533068f78e5e8170e1c3ea4ef094a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/IR/Tensor.h
A mlir/include/mlir/Dialect/Tensor/IR/TensorDialect.h
M mlir/lib/CAPI/Dialect/Tensor.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCFPass.cpp
Log Message:
-----------
[mlir][Tensor] Split out the dialect declaration to improve build time (NFC) (#222781)
Move TensorDialect to a self-contained declaration header and use it in
the two consumers that only need the dialect class.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 25.499B to 21.072B (-17.363%) and median wall
time fell from 3.55s to 2.81s (-20.845%).
Assisted-by: Codex
Commit: 50026fd902b58e6ccee33786a3a3138fbb7b0dce
https://github.com/llvm/llvm-project/commit/50026fd902b58e6ccee33786a3a3138fbb7b0dce
Author: Iasonas Karaprodromidis <iaskarapro at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/lldb-forward.h
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.cpp
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.h
Log Message:
-----------
[lldb][Fortran] Add TypeSystemFortran files (#218016)
This PR adds the foundational TypeSystemFortran class. To satisfy the
compiler, it implements all required pure virtual functions from the
base TypeSystem class as stubs (returning nullptr or 0).
Changes:
- Adds the TypeSystemFortran class.
- Provides stub implementations for all inherited pure virtual
functions.
Part of the Add Fortran support to LLDB GSoC 2026 project.
Relates to #109119.
Commit: 9d399869e907ff2ed44da3b12d2d97a6a918547b
https://github.com/llvm/llvm-project/commit/9d399869e907ff2ed44da3b12d2d97a6a918547b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
A mlir/include/mlir/Dialect/LLVMIR/LLVMDialectDecl.h
M mlir/lib/Conversion/ConvertToLLVM/ConvertToLLVMPass.cpp
M mlir/lib/Conversion/LLVMCommon/ConversionTarget.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVMPass.cpp
M mlir/lib/Dialect/Func/TransformOps/FuncTransformOps.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/test/lib/Conversion/MemRefToLLVM/TestMemRefToLLVMWithTransforms.cpp
M mlir/test/lib/Dialect/ControlFlow/TestAssert.cpp
M mlir/test/lib/Dialect/LLVM/TestPatterns.cpp
Log Message:
-----------
[mlir][LLVM] Split out the dialect declaration (NFC) (#222782)
Move LLVMDialect to a declaration header that retains its attribute and
type API but excludes generated operation classes. This narrows 12
dialect-only consumers.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 207.570B to 176.073B (-15.174%) and median wall
time fell from 30.72s to 25.52s (-16.927%).
Assisted-by: Codex
Commit: 795c3cab959f7bbe330ecec84833f3e4e227d714
https://github.com/llvm/llvm-project/commit/795c3cab959f7bbe330ecec84833f3e4e227d714
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
A mlir/include/mlir/Dialect/LLVMIR/NVVMDialectDecl.h
M mlir/lib/CAPI/Dialect/NVVM.cpp
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Conversion/NVVMToLLVM/NVVMToLLVM.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
Log Message:
-----------
[mlir][NVVM] Split out the dialect declaration to improve build time (NFC) (#222783)
Move NVVMDialect to a self-contained declaration header and use it in
five consumers that do not need generated NVVM operations.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 215.791B to 161.538B (-25.141%) and median wall
time fell from 33.40s to 24.66s (-26.168%).
Assisted-by: Codex
Commit: 40d4395bb229bd827108bfae196bc79f6c340695
https://github.com/llvm/llvm-project/commit/40d4395bb229bd827108bfae196bc79f6c340695
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Conversion/ComplexCommon/DivisionConverter.h
M mlir/include/mlir/Dialect/Affine/Analysis/AffineAnalysis.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/Arith/IR/Arith.h
A mlir/include/mlir/Dialect/Arith/IR/ArithAttributes.h
A mlir/include/mlir/Dialect/Arith/IR/ArithDialect.h
A mlir/include/mlir/Dialect/Arith/IR/ArithOpInterfaces.h
M mlir/include/mlir/Dialect/Complex/IR/Complex.h
M mlir/include/mlir/Dialect/GPU/Utils/DistributionUtils.h
M mlir/include/mlir/Dialect/Math/IR/Math.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsReduction.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACCMPCommon/Interfaces/AtomicInterfaces.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h
M mlir/lib/CAPI/Dialect/Arith.cpp
M mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitCPass.cpp
M mlir/lib/Conversion/ComplexCommon/DivisionConverter.cpp
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/TosaToArith/TosaToArithPass.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
M mlir/test/lib/Transforms/TestTransformsOps.cpp
M mlir/unittests/Interfaces/InferTypeOpInterfaceTest.cpp
Log Message:
-----------
[mlir][Arith] Split dialect and support declarations to improve build time (NFC) (#222784)
Expose the Arith dialect, attributes, and interfaces without importing
generated operation classes. This lets registration and support-only
users avoid parsing the operation umbrella and its dependencies.
Across three controlled serial rebuilds of five dialect-only TUs, median
instructions fell from 49.429B to 39.665B (-19.755%) and wall time fell
from 7.40s to 5.85s (-20.946%). Across three -j16 rebuilds of 97 support
users, instructions fell from 1,686.265B to 1,531.867B (-9.156%) and
wall time fell from 29.17s to 28.07s (-3.771%).
Assisted-by: Codex
Commit: cdc2b9445ae4f2c2f9ba19cba2cf249d1fbd2faa
https://github.com/llvm/llvm-project/commit/cdc2b9445ae4f2c2f9ba19cba2cf249d1fbd2faa
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_file_macros.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/sys-file-macros.h
A libc/include/llvm-libc-macros/sys-file-macros.h
A libc/include/sys/file.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/flock.h
M libc/src/sys/CMakeLists.txt
A libc/src/sys/file/CMakeLists.txt
A libc/src/sys/file/flock.h
A libc/src/sys/file/linux/CMakeLists.txt
A libc/src/sys/file/linux/flock.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/file/CMakeLists.txt
A libc/test/src/sys/file/linux/CMakeLists.txt
A libc/test/src/sys/file/linux/flock_test.cpp
Log Message:
-----------
[libc] Add sys/file.h and flock function. (#222737)
`flock` is a BSD function that manages advisory locks on opened files
(see https://man7.org/linux/man-pages/man2/flock.2.html)
It has enough differences from `fcntl`-based locking mechanism, and is
provided and used on Linux platforms.
* Add `<sys/file.h>` public header on Linux platforms with `flock`
declaration
and proper macro used for `op` function argument.
* Provide a Linux implementation, which is a simple syscall wrapper
around
`SYS_flock` syscall.
Assisted by: automated tooling, human-reviewed
Commit: 1e9bc138d8f3b097dd8bd343f8b325f7e1830796
https://github.com/llvm/llvm-project/commit/1e9bc138d8f3b097dd8bd343f8b325f7e1830796
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
Log Message:
-----------
[mlir][Tosa] Optimize compliance initialization for size to improve build time (NFC) (#222791)
The compliance-map constructor includes a 4,920-line generated
initializer. Mark it minsize because it runs only when creating the
validation pass and optimizing this single large function at -O3 is
expensive.
LLVM pass timing attributes most of the saving to code generation.
Greedy register allocation fell from 7.070s to 1.348s as global
live-range splitting fell from 6.403s to 0.021s after the constructor
became 47.6% smaller.
Across five controlled rebuilds of the affected TU, median instructions
fell from 205.087B to 66.157B (-67.742%) and median wall time fell from
19.83s to 7.95s (-59.909%).
Assisted-by: Codex
Commit: 65b48e45ea94568ced6d1c5d93d58f55d9e2da62
https://github.com/llvm/llvm-project/commit/65b48e45ea94568ced6d1c5d93d58f55d9e2da62
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/Affine/IR/AffineDialect.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/lib/CAPI/Dialect/Affine.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/lib/Dialect/Linalg/Transforms/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Analysis/DataFlow/TestIntegerDivisibilityAnalysis.cpp
M mlir/test/lib/Dialect/Affine/TestLoopMapping.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgDecomposeOps.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgElementwiseFusion.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgFusionTransforms.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgRankReduceContractionOps.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
M mlir/test/lib/Dialect/Linalg/TestPadFusion.cpp
M mlir/test/lib/Dialect/MemRef/TestComposeSubView.cpp
M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
M mlir/test/lib/Dialect/MemRef/TestMultiBuffer.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
Log Message:
-----------
[mlir][Affine] Split out the dialect declaration to improve build time (NFC) (#222766)
Move AffineDialect to a self-contained declaration header and narrow 23
callers that only register or reference the dialect class.
Median instructions fell from 700.601B to 681.315B (-2.753%) and wall
time from 107.36s to 104.17s (-2.971%).
Assisted-by: Codex
Commit: d9fd8ceac7a8577160a4d2ea7ff3af0acd778253
https://github.com/llvm/llvm-project/commit/d9fd8ceac7a8577160a4d2ea7ff3af0acd778253
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
A mlir/include/mlir/Dialect/Linalg/IR/LinalgDialect.h
M mlir/lib/Conversion/TensorToLinalg/TensorToLinalgPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Tensor/TestTensorTransforms.cpp
Log Message:
-----------
[mlir][Linalg] Split the dialect declaration to improve build time (NFC) (#222795)
Introduce a self-contained dialect declaration and use it in five
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 130.162B to 114.154B (-12.298%) and median wall
time fell from 20.30s to 17.85s (-12.069%).
Assisted-by: Codex
Commit: a34fddf44eca79cbbb7c04477bd9ed0825027fbc
https://github.com/llvm/llvm-project/commit/a34fddf44eca79cbbb7c04477bd9ed0825027fbc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
A mlir/include/mlir/Dialect/LLVMIR/ROCDLDialectDecl.h
M mlir/lib/CAPI/Dialect/ROCDL.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
Log Message:
-----------
[mlir][ROCDL] Split the dialect declaration to improve build time (NFC) (#222794)
Introduce a self-contained dialect declaration and use it in three
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 129.372B to 111.587B (-13.748%) and median wall
time fell from 20.62s to 17.72s (-14.064%).
Assisted-by: Codex
Commit: b89aa045ae06fa0d7729ee9883ff60503d11747f
https://github.com/llvm/llvm-project/commit/b89aa045ae06fa0d7729ee9883ff60503d11747f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h
A mlir/include/mlir/Dialect/GPU/IR/GPUDialectDecl.h
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Log Message:
-----------
[mlir][GPU] Split the dialect declaration to improve build time (NFC) (#222798)
Introduce a self-contained dialect declaration and use it in two
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 82.473B to 75.865B (-8.012%) and median wall time
fell from 12.51s to 11.34s (-9.353%).
Assisted-by: Codex
Commit: b570e2aa0aa41694d7f53988948259f39258b529
https://github.com/llvm/llvm-project/commit/b570e2aa0aa41694d7f53988948259f39258b529
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/Vector/IR/VectorDialect.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/lib/CAPI/Dialect/Vector.cpp
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Dialect/Affine/TransformOps/AffineTransformOps.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/lib/Dialect/MemRef/Transforms/EmulateWideInt.cpp
M mlir/test/lib/Conversion/VectorToSPIRV/TestVectorReductionToSPIRVDotProd.cpp
M mlir/test/lib/Dialect/Arith/TestEmulateWideInt.cpp
M mlir/test/lib/Dialect/Math/TestAlgebraicSimplification.cpp
M mlir/test/lib/Dialect/Math/TestPolynomialApproximation.cpp
Log Message:
-----------
[mlir][Vector] Split the dialect declaration to improve build time (NFC) (#222799)
Introduce a self-contained dialect declaration and use it in ten
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 209.277B to 192.946B (-7.804%) and median wall
time fell from 31.94s to 29.26s (-8.391%).
Assisted-by: Codex
Commit: 3d847b85849d88b65156fd7c252df81b322ccaf1
https://github.com/llvm/llvm-project/commit/3d847b85849d88b65156fd7c252df81b322ccaf1
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-09-09.md
Log Message:
-----------
[flang] Add notes for Sept. 9 Flang Community Call (#222436)
Co-authored-by: Eugene Epshteyn <eepshteyn at nvidia.com>
Commit: a1e8420613f12c770ad37cf72cd180f59dedc5fa
https://github.com/llvm/llvm-project/commit/a1e8420613f12c770ad37cf72cd180f59dedc5fa
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes f1706d3 (#222779)
This fixes f1706d38f8271adfc5105ddf9b2dcc1573ebfa85 (#222744).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5d1b4094534c7a7c041882380603ee0927e27082
https://github.com/llvm/llvm-project/commit/5d1b4094534c7a7c041882380603ee0927e27082
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
A mlir/include/mlir/Dialect/MemRef/IR/MemRefDialect.h
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitCPass.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp
M mlir/test/lib/Dialect/Affine/TestReifyValueBounds.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/test/lib/Dialect/OpenACC/TestOpenACCSupport.cpp
M mlir/test/lib/Dialect/OpenACC/TestPointerLikeTypeInterface.cpp
M mlir/test/lib/Dialect/OpenACC/TestRecipePopulate.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTilingTest.cpp
Log Message:
-----------
[mlir][MemRef] Split the dialect declaration to improve build time (NFC) (#222801)
Introduce a self-contained dialect declaration and use it in thirteen
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 296.237B to 278.383B (-6.027%) and median wall
time fell from 47.57s to 44.50s (-6.454%).
Assisted-by: Codex
Commit: a1cd84100bd0bd70f5b6b0c30826844aa1813350
https://github.com/llvm/llvm-project/commit/a1cd84100bd0bd70f5b6b0c30826844aa1813350
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/CodeGen/QualTypeMapper.h
M clang/unittests/CodeGen/CMakeLists.txt
A clang/unittests/CodeGen/QualTypeMapperTest.cpp
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/unittests/ABI/CMakeLists.txt
A llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/utils/gn/secondary/clang/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
Log Message:
-----------
[LLVMABI] Add support for SVE types in the LLVM ABI library (#221375)
This change extends the LLVM ABI library's VectorType to be able to
describe SVE types and updates Clang's QualTypeMapper to map them.
The AArch64 target info class in the ABI library is still a work in
progress. It will continue to report "not yet implemented" for function
signatures involving SVE types. This change is a neceasary prerequisite
for correctly handling them or correctly deferring handling of these
specific types.
Assisted-by: Cursor / claude-opus-5
Commit: 8c05a1167dd2f00cfa64966cb1572a6d97178c8b
https://github.com/llvm/llvm-project/commit/8c05a1167dd2f00cfa64966cb1572a6d97178c8b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/MLIRContext.cpp
Log Message:
-----------
[mlir] Outline registered operation-model allocation (NFC) (#222803)
Allocate operation-model storage through an out-of-line helper so every
registration TU does not instantiate the allocation machinery.
Across three controlled -j16 rebuilds of 44 registration TUs, median
instructions fell from 2.284T to 2.202T (-3.594%) and median wall time
fell from 40.44s to 38.54s (-4.698%).
Assisted-by: Codex
Commit: ec5a61a1454082773a9071c8a9db0472306a2517
https://github.com/llvm/llvm-project/commit/ec5a61a1454082773a9071c8a9db0472306a2517
Author: Dave MacLachlan <dmaclach at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/Options.td
M lld/docs/MachO/ld64-vs-lld.md
M lld/docs/ReleaseNotes.md
A lld/test/MachO/warn-missing-subsections-via-symbols.s
Log Message:
-----------
[lld][MachO] Add `--warn-missing-subsections-via-symbols` flag (#221464)
This change introduces:
* `--warn-missing-subsections-via-symbols`: Warns when an input object
file with non-empty sections is missing `MH_SUBSECTIONS_VIA_SYMBOLS`.
* `--no-warn-missing-subsections-via-symbols`: Disables the warning
(default).
Also adds documentation and lit tests.
Object files missing `MH_SUBSECTIONS_VIA_SYMBOLS` can prevent
dead-stripping and subsection splitting.
We have seen a number of cases where we are compiling assembly, and this
allows us to track them down.
Commit: 6959b7d081df5fb2349e67e0d8e8e87841fa10d9
https://github.com/llvm/llvm-project/commit/6959b7d081df5fb2349e67e0d8e8e87841fa10d9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OpDefinition.h
Log Message:
-----------
[mlir] Use pointers for static operation hooks to improve build time (NFC) (#222804)
Return raw function pointers from static operation-hook accessors to
avoid instantiating unique-function construction machinery for every
operation.
Across three controlled -j16 rebuilds of 44 registration TUs, median
instructions fell from 2.284T to 2.201T (-3.646%) and median wall time
fell from 41.04s to 38.80s (-5.458%).
Assisted-by: Codex
Commit: c027b3cff0d1cd1a9e30f72e7eba8a1cb8954a75
https://github.com/llvm/llvm-project/commit/c027b3cff0d1cd1a9e30f72e7eba8a1cb8954a75
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Error.h
Log Message:
-----------
[orc-rt] Fix typo in file header. (#222636)
Commit: 9ac5a0ffb64f80e6f5aecf430b9e62c2a300942c
https://github.com/llvm/llvm-project/commit/9ac5a0ffb64f80e6f5aecf430b9e62c2a300942c
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-attach.mlir
Log Message:
-----------
[flang][acc] Update descriptor attach rules to only pointer/allocatable (#222760)
When a clause maps only a descriptor's data, ACCMapInfoPrep should infer
an attach point and name the descriptor only for POINTER and
ALLOCATABLE, which OpenACC requires to be maintained on the device. See
flang/docs/OpenACC-descriptor-management.md.
Commit: ce0642ef834c89775fad321bdc0601163885ff1d
https://github.com/llvm/llvm-project/commit/ce0642ef834c89775fad321bdc0601163885ff1d
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fixes MLIR dialect Bazel dependencies from commit 5d1b4094534c etc (#222812)
Added missing deps.
Fixes current bazel failures in @llvm-project//flang/unittests:all
Commit: 5ce6d3a2423ef046b5d1d5e9ec699dd9fe7af377
https://github.com/llvm/llvm-project/commit/5ce6d3a2423ef046b5d1d5e9ec699dd9fe7af377
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
A lldb/test/API/functionalities/gdb_remote_client/TestBreakpointNotHit.py
M lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManyBreakpoints.py
Log Message:
-----------
[lldb][Darwin] Don't mark threads as having hit bp if not (#222488)
When a multithreaded program stops exeuction with a mach exception on
more than one thread, if one of the threads is *at* a breakpoint site,
but hasn't *hit* the breakpoint yet, lldb was incorrectly stepping over
the breakpoint instruction when it resumed execution. This would result
in TestConcurrentManyBreakpoints reporting that a breakpoint hit on 100
threads was only hit 99 times, because one of the breakpoints was
silently stepped past without being counted.
The bug happened because on Darwin/debugserver systems the stop info
packet includes a `jstopinfo` which is a JSON dictionary of all threads
that have an exception. When `jstopinfo` is present, ProcessGDBRemote
was initializing any thread not included in `jstopinfo` as having an
empty StopInfo. It did this without checking if we are _at_ a breakpoint
site, and marking the thread as "Stopped at unexecuted breakpoint
instruction". Because the threads now had an empty StopInfo already, the
other places where we might check "if stopped at unexecuted breakpoint
instruction" were never executed.
I created a gdb_remote_client API test with a synthetic test case where
four threads stop at a breakpoint; three of them have hit the
breakpoint, one has not. And confirm that lldb only registers 3
breakpoint hits initially, and then the 4th as we resume. Debugging the
"99 breakpoints hit instead of 100" failures was tricky and involved
running the test in a loop on a heavily loaded machine to get the
necessary timing, and it was easy to give up, so I wanted a much simpler
synthetic case to show the problem if we might regress.
rdar://180565704
Commit: b8007a8e4020b8bca2b12e941660e10bf5bf6716
https://github.com/llvm/llvm-project/commit/b8007a8e4020b8bca2b12e941660e10bf5bf6716
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A lld/test/MachO/arm64-x1.s
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TextAPI/Architecture.def
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
A llvm/test/tools/llvm-readobj/macho-arm64e_x1.test
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-readobj/MachODumper.cpp
M llvm/unittests/BinaryFormat/MachOTest.cpp
Log Message:
-----------
[ld64.lld, llvm-otool] Minimal arm64e.x1 support (#222721)
Just enough for `llvm-otool -hv` to dump the cpusubtype, and for
ld64.lld to not reject .tbd files that have an arm64e.x1 slice.
This is needed to link mac binaries against the macOS 27 SDK.
Commit: 5ced7fcfdb22dc6ec31d021d4b64242e7e35a397
https://github.com/llvm/llvm-project/commit/5ced7fcfdb22dc6ec31d021d4b64242e7e35a397
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
Fix bazel build for clang/unittests:codegen_tests (#222817)
Fixes https://github.com/llvm/llvm-project/pull/221375 (commit
a1cd84100bd0) by exporting QualTypeMapper.h and adding missing
dependencies.
Commit: f896082fb9ea598c548bcb63515da7b23ff40f6d
https://github.com/llvm/llvm-project/commit/f896082fb9ea598c548bcb63515da7b23ff40f6d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__configuration/compiler.h
M libcxx/include/__memory/allocator.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_temporary_buffer.h
A libcxx/include/__new/allocate.h
M libcxx/include/__utility/small_buffer.h
M libcxx/include/module.modulemap.in
M libcxx/include/new
M libcxx/src/include/aligned_alloc.h
A libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.capacity/max_size.pass.cpp
M libcxx/test/std/language.support/support.dynamic/hardware_inference_size.compile.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cons/size.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/pointer_destruction.pass.cpp
Log Message:
-----------
Revert "[libc++] Remove __libcpp_allocate" (#222814)
Reverts llvm/llvm-project#220981
This is breaking premerge. See comments on the original PR.
Commit: 4def46cc3fd51bee21f4a167a99a79c9f6bb66ba
https://github.com/llvm/llvm-project/commit/4def46cc3fd51bee21f4a167a99a79c9f6bb66ba
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/convert-fold.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
Log Message:
-----------
[flang] Fold fir.convert of an integer constant between integer types (#222188)
`fir::ConvertOp::fold` doesn't handle an integer constant converted to
another integer type. `ForwardConstantConvertPattern` covers the
neighboring case where the result is `index`, so `fir.convert %c10_i32 :
(i32) -> index` already canonicalizes to an index constant while
`fir.convert %c1_i32 : (i32) -> i64` does not. This PR adds the
integer-to-integer case.
The width change follows the rules codegen applies to a non-constant
operand (`CodeGen.cpp`'s integer-to-integer conversion): narrowing
truncates, widening zero-extends an i1 or unsigned source and
sign-extends anything else. The result must be signless because the
constant materialises as an `arith.constant`, which only accepts
signless integers.
It composes with `arith::IndexCastOp::fold`, so a value widened then
cast to `index` collapses to one index constant, and it lets other
patterns see through the constant: with a literal shift,
`simplify-hlfir-intrinsics` can now fold away `hlfir.eoshift`'s
shift-direction arithmetic.
`getIntIfConstant` only matches `arith` and `llvm` constants, which are
signless, so `isUnsignedInteger()` is never true today, but I still kept
the unsigned case anyway so that the fold cannot disagree with codegen.
Commit: c9e8899e31dba827a9c738252de1762f3b6fd3df
https://github.com/llvm/llvm-project/commit/c9e8899e31dba827a9c738252de1762f3b6fd3df
Author: wanglei <wanglei at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
Log Message:
-----------
[LoongArch] Generate more PCRel relocations for resolvable sub-symbols
Use PC-relative relocations when the sub-symbol offset can be resolved
during assembly, avoiding ADD/SUB relocation pairs.
Fixes #210052
Reviewers: SixWeining, MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/211754
Commit: e152f54b8417c5db0550b463653145f758de40d0
https://github.com/llvm/llvm-project/commit/e152f54b8417c5db0550b463653145f758de40d0
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port f896082fb9ea (#222824)
Commit: 07d67299a15ce03b053736e2d31a668ee0576987
https://github.com/llvm/llvm-project/commit/07d67299a15ce03b053736e2d31a668ee0576987
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/test/CodeGen/Mips/mips1-not-support-ldc1-sdc1.ll
Log Message:
-----------
[Mips] Fix buildbot failure of MIPS I double store using SWC1 (#221912)
Expand ExtractElementF64_FPR to FMOV_S instead of MFC1 to avoid
incorrect integer store.
Fix x86_64-expensive-checks compile error as for pr
https://github.com/llvm/llvm-project/pull/209362.
Fix #62190.
Commit: 7c3849ae3bc162f383c54e38b1ed32b733a31bd8
https://github.com/llvm/llvm-project/commit/7c3849ae3bc162f383c54e38b1ed32b733a31bd8
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250-load-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950-read-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w32.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w64.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN global/DS load builtins (#220611)
Adds codegen support for AMDGCN global and DS load/read builtins with
transpose variants. These builtins are lowered to their corresponding
`llvm.amdgcn.*` intrinsics.
Commit: fd7eac5f532128a245bcfa67aa251af784395701
https://github.com/llvm/llvm-project/commit/fd7eac5f532128a245bcfa67aa251af784395701
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
Log Message:
-----------
[AMDGPU][lld] Remove "using namespace llvm" from AMDGPU.cpp (#222818)
AMDGPU class in anonymous namespace collides with llvm::AMDGPU, causing
an error with MSVC.
Commit: 95267015df795c02d829b3545610a5f5e95609e8
https://github.com/llvm/llvm-project/commit/95267015df795c02d829b3545610a5f5e95609e8
Author: Jian Li <hellothedreamer at 126.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/get-named-operand-idx.td
Log Message:
-----------
[RISCV][GlobalISel] Add G_CLMULH support (#221686)
Add G_CLMULH to represent the high half of a carry-less multiplication
in generic Machine IR.
Translate llvm.riscv.clmulh to G_CLMULH and mark it legal for native
XLEN scalar types when Zbkc is available. Reuse the existing
SelectionDAG pattern to select the RISC-V CLMULH instruction.
Commit: 821ff7cd6803d719515c2ae9ada665c4bc3c4c35
https://github.com/llvm/llvm-project/commit/821ff7cd6803d719515c2ae9ada665c4bc3c4c35
Author: Rohit Garg <rohgarg at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/confused-dependence-subnest.ll
A llvm/test/Transforms/LoopInterchange/dependency-matrix-padding.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
A llvm/test/Transforms/LoopInterchange/missed-outer-prefix-subnest.ll
A llvm/test/Transforms/LoopInterchange/no-partially-perfect-subnest.ll
M llvm/test/Transforms/LoopInterchange/partially-perfect-loop.ll
A llvm/test/Transforms/LoopInterchange/preserve-sibling-order.ll
Log Message:
-----------
[LoopInterchange] Supported partially-perfect Loop Nests (#199511)
In the current implementation when the outermost loop contains sibling
sub-loops (i.e. multiple independent loop nests at the same depth), the
pass silently skips the entire loop nest without attempting to
interchange any of the valid sub-nests (See Below Example).
Example:
```
for(int i=0; i<n; i++){ // Loop 1
for(int j=0; j<m; j++){ // Loop 2
for(int r=0; r<m; r++){ // Loop 3
// Do something
}
}
for(int k=0; k<p; k++){ // Loop 4
for(int l=0; l<p; l++){ // Loop 5
//Access A[l][k]
}
}
}
```
In the Example , GCC 16 performs loop interchange on (Loop2, Loop3) or
(Loop4, Loop5), provided the interchange is both legal and profitable.
Fixes: https://github.com/llvm/llvm-project/issues/196006
Commit: 5f00f13eba2ededa5da62e0dd80b6d1f0c72ca84
https://github.com/llvm/llvm-project/commit/5f00f13eba2ededa5da62e0dd80b6d1f0c72ca84
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/Support/KnownFPClassTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[KnownFPClass] Refactor direct access to KnownFPClasses [NFC] (#220315)
Part of https://github.com/llvm/llvm-project/issues/217072
Follow up to https://github.com/llvm/llvm-project/pull/218514
Replaces direct uses of the `KnownFPClasses` field with getters/setters.
Commit: 426706131e7300fe67f4dac5ccc744548605f394
https://github.com/llvm/llvm-project/commit/426706131e7300fe67f4dac5ccc744548605f394
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine-analysis-invalidation.ll
Log Message:
-----------
[AMDGPU] Invalidate uniformity info after intrinsic combine (#222357)
The uniform intrinsic combine pass changed IR while preserving
uniformity information. Its result keeps references to cycle
information. Those references could be invalidated and later accessed
by another pass.
Invalidate uniformity information after a change. Before erasing an
instruction, remove it from the analysis state used by the pass. Also
report each erasure as a change so invalidation always runs.
Commit: db70744d03adbc9e76f08a66c003b6b362df888d
https://github.com/llvm/llvm-project/commit/db70744d03adbc9e76f08a66c003b6b362df888d
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvp-mul-parts-acc-fold.ll
Log Message:
-----------
[RISCV][P-ext] Fold an add of a multiply-parts product into the accumulate form (#222748)
An add of a multiply-parts product selects the accumulating instruction, so
that a loop written with `sum += __riscv_mul_h00_i32(a, b)` gets `macc.h00`
rather than a separate multiply and add.
Rewriting the add before type legalization keeps the shapes whose result is
illegal, so the existing accumulate lowering covers all of them.
Commit: 980c9bbdd3ddda88da6b8b63261c8d514c5d4306
https://github.com/llvm/llvm-project/commit/980c9bbdd3ddda88da6b8b63261c8d514c5d4306
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/features-info.ll
Log Message:
-----------
[RISCV] Remove VeyronV1 processor definition (#220623)
Processor no longer exists.
Commit: a929f4af3904d5089a7855b5f82cf019df6afd69
https://github.com/llvm/llvm-project/commit/a929f4af3904d5089a7855b5f82cf019df6afd69
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Utils/OpenMP.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/default-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/implicit-default-mapper-allocatable-field.f90
M flang/test/Lower/OpenMP/implicit-mapper-no-pointer-map.f90
R flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
R flang/test/Transforms/omp-map-info-finalization-usm.fir
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-host-ref-semantics.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-overlapping-record-member-map.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
A offload/test/offloading/fortran/implicit-map-allocatable-field.f90
Log Message:
-----------
[Flang][OpenMP] Remove target implicit allocatable member mapping from MapInfoFinalization and extend lowering to support it (#219434)
This PR aims to remove the partially implemented implicit allocatable
member mapping code from MapInfoFinalization, and move it to the
lowering.
The MapInfoFinalization code should no longer be required as the
DeclareMapper infrastructure in the frontend is capable of handling
these cases now and already does so for the majority of them, so we are
better consolidating the implementation to one location and extending it
to support more cases.
This PR removes the old code from MapInfoFinalization, and enables the
default declare mapper generation that handles most other implicit
mapping cases for derived types in the initial lowering to handle the
previously supported cases and more.
The implicit default declare mapper generation has been modified to only
map the necessary bits of a derived type, which are record types (to
hold any nested mappers and to make sure we map all non-allocatable
bits, including descriptors) and the data for any allocatable bits
(specifically just the ref_ptee and then an attach emission).
Commit: be09c15fa047178ff4818192ea97ba3a3d8254a0
https://github.com/llvm/llvm-project/commit/be09c15fa047178ff4818192ea97ba3a3d8254a0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Compiler.h
Log Message:
-----------
[orc-rt] Add a maybe-unused attribute macro. (#222834)
This will be used in upcoming commits to suppress unused function
warnings.
Commit: 2a0177189f4be62eb51ddca3fd4b8836c538dc12
https://github.com/llvm/llvm-project/commit/2a0177189f4be62eb51ddca3fd4b8836c538dc12
Author: hev <wangrui at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for memory barrier optimization (#218596)
Commit: c9a1fc8d1deee527a3ff43592ed4e0e5b81d7fca
https://github.com/llvm/llvm-project/commit/c9a1fc8d1deee527a3ff43592ed4e0e5b81d7fca
Author: hev <wangrui at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
Log Message:
-----------
[LoongArch] Add memory barrier optimization pass (#218597)
Add a machine-level pass to remove redundant DBARs and merge them with
atomic memory operations. The pass uses machine dominator and
post-dominator trees to ensure the transformation is safe across basic
blocks.
Commit: 13d63aa55eb7d8877fb3243e7f050b590e569d96
https://github.com/llvm/llvm-project/commit/13d63aa55eb7d8877fb3243e7f050b590e569d96
Author: Jeff Trull <edaskel at att.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Make the value of a true bool enum 1, not -1 (#221497)
When converted to int a bool value is either `0` or `1`, but the `enum_value`
of a bool enum was reported as either `0` or `-1` in the Python bindings.
Make bool enums take the unsigned value code path so that `0` or `+1` is
returned instead.
Resolves #221326
Commit: 816b4c13bd851e6df4416c0d41e6735760ca72df
https://github.com/llvm/llvm-project/commit/816b4c13bd851e6df4416c0d41e6735760ca72df
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable block16 conversions on gfx1250-strict (#222597)
Commit: 06a26f2ff3a2c5464a5dca8cf42314bae5e635cc
https://github.com/llvm/llvm-project/commit/06a26f2ff3a2c5464a5dca8cf42314bae5e635cc
Author: John Hui <j-hui at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/swift-attr-redeclaration.cpp
M clang/test/APINotes/swift-import-as.cpp
Log Message:
-----------
[clang][APINotes] Apply API notes 'swift_attr's idempotently (#222526)
Commit: 79775da1838e64b0a6c294ff25483484841910a1
https://github.com/llvm/llvm-project/commit/79775da1838e64b0a6c294ff25483484841910a1
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Add vputils::reconstructSSA (#212209)
Adds a simple implementation of the algorithm described in "Simple and
Efficient SSA Construction" by Braun et al.
https://www.researchgate.net/publication/236997796_Simple_and_Efficient_Construction_of_Static_Single_Assignment_Form
This can be used to reconstruct SSA form whenever the control flow graph
is changed, which #201784 plans to use to model predicated early exiting
conditions.
Added three unit tests for now which should exercise all the code paths,
including what happens when there's a cycle.
Commit: faa60cf51f1eeef568a7a111b3174375122617aa
https://github.com/llvm/llvm-project/commit/faa60cf51f1eeef568a7a111b3174375122617aa
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/Session.cpp
M orc-rt/lib/support/Error.cpp
M orc-rt/lib/support/Logging.cpp
M orc-rt/lib/support/Logging_oslog.cpp
M orc-rt/lib/support/Logging_printf.cpp
Log Message:
-----------
[orc-rt] Wrap C API implementation in `extern "C" {..}` blocks (#222846)
Adopt a consistent style for C API implementation: A banner comment and
an `extern "C" { ... }` block around the definitions.
Commit: e94a0b2a4971c381cc6f72309d1dea5350780099
https://github.com/llvm/llvm-project/commit/e94a0b2a4971c381cc6f72309d1dea5350780099
Author: shivaramaarao <58245296+shivaramaarao at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
[flang] Add driver support for x86 -m[option] target feature flags (#220159)
Added FlangOption visibility to m_x86_Features_Group so flags such as
-mavx, -mavx2, and -mavx512f are accepted by flang and forwarded as
-target-feature to -fc1 via the shared Clang driver logic.
Also extended target-cpu-features.f90 with grouped driver tests that
cover m_x86_Features_Group options, including representative -mno-*, APX
cases
Assisted by : Cursor (testcase generation)
Commit: 75ca063b3b303e499a798ef84d04d32fb96d44c8
https://github.com/llvm/llvm-project/commit/75ca063b3b303e499a798ef84d04d32fb96d44c8
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
Log Message:
-----------
[AMDGPU][GIsel][NPM] Port AMDGPUPostLegalizerCombiner to NPM (#216274)
Porting `AMDGPUPostLegalizerCombiner` to work with the New PassManager
to support GISel.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 4735d351182f874d61690f6fc2d2e3b154914ad5
https://github.com/llvm/llvm-project/commit/4735d351182f874d61690f6fc2d2e3b154914ad5
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaCUDA.cpp
M clang/test/SemaCUDA/global-initializers.cu
Log Message:
-----------
[CUDA/HIP] Fix errors for device function used in host global initializers (#222338)
The existing checker was simply looking for a call or `CXXConstructExpr`
which would miss a call to device function in case an implicit cast was
in place or if a call was a part of an expression. Use a visitor to
improve the situation.
Commit: c1b661fde124399f0484c4b39501b37613cc4757
https://github.com/llvm/llvm-project/commit/c1b661fde124399f0484c4b39501b37613cc4757
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
Log Message:
-----------
[clang][SVE][nfc] Remove spurious compare instruction (#222652)
When lowering `sve_svdup_n_bN` SVE builtins, the compare Op is not
required. In fact, that compare Op is removed by subsequent
optimisations, as evident in the tests.
Instead of relying on the middle-end to clean it up, improve the
front-end code-gen by not generating that spurious Op at all.
Commit: 68f9d8d45cad616e223ffe460404edd86dd972ca
https://github.com/llvm/llvm-project/commit/68f9d8d45cad616e223ffe460404edd86dd972ca
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Token.cpp
M mlir/lib/AsmParser/Token.h
M mlir/test/Dialect/Builtin/Bytecode/attrs.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed_0.mlirbc
M mlir/test/IR/custom-float-attr-roundtrip.mlir
M mlir/test/IR/parser.mlir
Log Message:
-----------
[MLIR][Parser] Fix precision loss when parsing f80 and f128 literals (#220267)
While analyzing this CIR issue
[216422](https://github.com/llvm/llvm-project/issues/216422), I traced
the issue to the MLIR asm parser.
For the following case:
```
%0 = arith.constant 1.0E+309 : f80
```
using `mlir-opt repro.mlir`
we get (infinity):
```
module {
%cst = arith.constant 0x7FFF8000000000000000 : f80
}
```
instead of
```
module {
%cst = arith.constant 9.99999999999999999986E+308 : f80
}
```
Currently the parser casts floats to a double before converting to the
requested semantics, as noted in the
[comments](https://github.com/llvm/llvm-project/blob/bb3b509138f4a34cb3d5c659955ccc16745ae82e/mlir/lib/AsmParser/AsmParserImpl.h#L286).
Not entirely sure why this was the default, anyway this patch instead
parses the float with the given semantics directly, so we don't lose
precision.
I used Claude to generate tests and reproducers for this patch. I've
also updated a few existing lit tests to show the improved precision
this patch introduces.
**Note:** This fixes the CIR issue I mentioned above.
Commit: 7ba3ce428af7f6e7f1e642dba128c2afc13dba90
https://github.com/llvm/llvm-project/commit/7ba3ce428af7f6e7f1e642dba128c2afc13dba90
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/Bufferization.h
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationDialect.h
M mlir/lib/CAPI/Dialect/Bufferization.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
Log Message:
-----------
[mlir][Bufferization] Split the dialect declaration (NFC) (#222859)
Introduce a self-contained dialect declaration and use it in four
consumers that do not need the generated operation umbrella.
Across three controlled serial rebuilds of the affected TUs, median
instructions fell from 97.470B to 94.887B (-2.650%) and median wall time
fell from 15.20s to 14.70s (-3.289%). Three -j16 runs confirmed a 2.623%
reduction in instructions, with wall time improving 0.722% on the
parallel critical path.
Assisted-by: Codex
Commit: 7544b08a04ce084bf34bd3f4f1e8fb6f4d3aa2e4
https://github.com/llvm/llvm-project/commit/7544b08a04ce084bf34bd3f4f1e8fb6f4d3aa2e4
Author: Teja Alaghari <teja.alaghari at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
A llvm/test/DebugInfo/MIR/InstrRef/expr-operand-count-mismatch.mir
Log Message:
-----------
[LiveDebugValues] Do not join debug values whose operand counts disagree (#221929)
Currently, `DbgValueProperties::isJoinable()` decides whether two values
could be joined by comparing their `DIExpressions` only. That was safe
when location-operand count was taken from the expression. In
instruction-referencing `LiveDebugValues`, `NumLocOps` is taken from the
`MachineInstr` (`getNumDebugOperands()`), so two values can share an
expression and still differ in operand count.
Joining pairs location operands by index. When the counts disagreed,
`pickVPHILoc` indexed past the shorter list and hit `assert(Index <
OpCount)` in `DbgValue::getDbgOpID`.
This change makes `isJoinable()` return `false` unless `NumLocOps`
**also agrees**.
Commit: fa1d3e300559d69678a66b2ddb45eb127a1b8407
https://github.com/llvm/llvm-project/commit/fa1d3e300559d69678a66b2ddb45eb127a1b8407
Author: nishant-sachdeva-amd <nishant.sachdeva at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
Log Message:
-----------
[X86][NFC] Share isDispOrCDisp8 between the encoder and CompressEVEX (#222591)
The disp8 / compressed-disp8*N size rule was written twice: as a static
helper in X86MCCodeEmitter.cpp and re-inlined in the CompressEVEX size
veto (hasShorterEVEXViaCDisp8), kept in sync only by a comment. Hoist it
into X86II::isDispOrCDisp8 in X86BaseInfo.h (ImmOffset now optional) and
call it from both, so the size model cannot drift from what the encoder
emits. No functional change.
Addresses https://github.com/llvm/llvm-project/issues/206963
Changes made here use AI model inputs
---------
Co-authored-by: Simon Pilgrim <git at redking.me.uk>
Commit: 02dc8a35a9d074613f0a262dbec00afeb9963345
https://github.com/llvm/llvm-project/commit/02dc8a35a9d074613f0a262dbec00afeb9963345
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
A mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialectDecl.h
M mlir/lib/RegisterAllDialects.cpp
Log Message:
-----------
[mlir][AMDGPU] Split the dialect declaration (NFC) (#222861)
Introduce a self-contained dialect declaration so RegisterAllDialects
does not need the generated AMDGPU operation umbrella.
Across five controlled rebuilds of the affected TU, median instructions
fell from 71.757B to 70.331B (-1.987%) and median wall time fell from
11.01s to 10.77s (-2.180%).
Assisted-by: Codex
Commit: f1bf3f217c8c006112a876cee61fe04f92f221ca
https://github.com/llvm/llvm-project/commit/f1bf3f217c8c006112a876cee61fe04f92f221ca
Author: Alexey Moksyakov <moksyakov.alexey at huawei.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/materialize-constant.s
Log Message:
-----------
[bolt] Simplify rodata/literal load for X86_64 & AArch64 (#179474)
This patch fixed the issue related to load literal for AArch64, where
constant island move to the end of a function (emitCI), available
address range for ldr instruction is limited +/- 1MB, and can be out of
range. For AArch64 the available data sizes are 4, 8 bytes. For X86_64
this patch materializes the constants with sizes 2, 4 and 8 bytes.
Note: SimplifyRODataLoads is turn off for non-relocation binary
Co-authored-by: yavtuk <yavtuk at ya.ru>
Commit: 4f56a89ad74f82403500d6392e2d3a90ba912f37
https://github.com/llvm/llvm-project/commit/4f56a89ad74f82403500d6392e2d3a90ba912f37
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
A mlir/include/mlir/Dialect/Func/IR/FuncDialect.h
M mlir/include/mlir/Dialect/Func/IR/FuncOps.h
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Target/Cpp/TranslateRegistration.cpp
M mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
M mlir/lib/Target/SMTLIB/ExportSMTLIB.cpp
M mlir/test/lib/Conversion/ConvertToSPIRV/TestSPIRVFuncSignatureConversion.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/unittests/Dialect/Linalg/InferConvolutionDimsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
M mlir/unittests/Dialect/Transform/BuildOnlyExtensionTest.cpp
Log Message:
-----------
[mlir][Func] Split the dialect declaration (NFC) (#222860)
Introduce a self-contained dialect declaration and use it in ten
configured consumers that do not need the generated operation umbrella.
Across three controlled -j16 rebuilds of the affected TUs, median
instructions fell from 224.883B to 220.787B (-1.821%) and median wall
time fell from 8.44s to 8.31s (-1.540%).
Assisted-by: Codex
Commit: 3ec1c433b3a4bacbb055f2a2ce2d5ef3ca4172ae
https://github.com/llvm/llvm-project/commit/3ec1c433b3a4bacbb055f2a2ce2d5ef3ca4172ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
A llvm/test/Transforms/ConstraintElimination/strengthen-flags-at-uses.ll
Log Message:
-----------
[ConstraintElim] Strengthen flags at the closest dominator of all uses. (#220918)
Flags are currently only strengthened using the facts that hold on entry
to the block defining the instruction. This overly pessimistic. It is
sufficient to check at the closest instruction dominating all uses.
Extend FactOrCheck to carry this point as context instruction (in union
with the mutually exclusive DoesHold to avoid size growth) and retrieve
the common dominating instruction when queuing instructions for flag
strengthening.
This strengthens flag inference in a number of real-world cases, as well
as enables additional folds due stronger flags:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1171
Compile-time impact is in the noise
https://llvm-compile-time-tracker.com/compare.php?from=11bc6ce46e227718c3b54aa6889d7458656e8ab4&to=6f67fdcdb62a5fe56060cb266448db8b763e13d7&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/220918
Commit: f284ae2ed3f9b74b213633b0e5cab52b490728f2
https://github.com/llvm/llvm-project/commit/f284ae2ed3f9b74b213633b0e5cab52b490728f2
Author: Yongqiang Tian <yqtian668 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
A llvm/test/CodeGen/RISCV/shrinkwrap-save-restore-debug.ll
Log Message:
-----------
[RISCV] Ignore debug instructions in epilogue block checks (#219401)
A debug instruction in a return-only block can make
`RISCVFrameLowering::canUseAsEpilogue` reject an otherwise valid
shrink-wrap
point. This moves the save and restore libcalls onto the fast path.
Ignore debug instructions in the successor cardinality check while
continuing
to count bundle interiors, pseudo probes, and other non-debug
instructions.
The first commit records the existing behavior. The second applies the
fix and
updates the test expectations to require localized save and restore
calls.
Fixes #219378
Testing:
- Verified that the regression test fails on an affected compiler.
- Verified the targeted test after the fix.
- RISC-V CodeGen: 2654/2654 passed.
Assisted-by: OpenAI Codex 5.6 Sol, co-reviewed by Claude and Yongqiang
Tian.
Commit: e8a0d25ac75b3123f98e7dce16f6d096f2179b97
https://github.com/llvm/llvm-project/commit/e8a0d25ac75b3123f98e7dce16f6d096f2179b97
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
Log Message:
-----------
[CostModel][X86] Cleanup unary shuffle cost tests to use poison instead of undef in second operand (#222718)
Commit: c382571b2b3cede5de97cbbd314597db21f89435
https://github.com/llvm/llvm-project/commit/c382571b2b3cede5de97cbbd314597db21f89435
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/cmake/modules/CrossCompile.cmake
Log Message:
-----------
[CMake] Forward CLANG_ENABLE_CIR to native tool builds (#222771)
Commit: 5e64eb8ffffa3e845ca01d81c1e45ef68d07d306
https://github.com/llvm/llvm-project/commit/5e64eb8ffffa3e845ca01d81c1e45ef68d07d306
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
Log Message:
-----------
[Clang] Improve error recovery for indexed template names (#222328)
There were a few issues here:
- Names that are not templates were not diagnosed and led to a crash (in
part because clang think they can be template names that will be later
resolved by ADL)
- Names that refer to a variable template decl, etc also led to a crash.
Fixes #220502
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: e4b9c07d30119fa37202233973629e3143c27685
https://github.com/llvm/llvm-project/commit/e4b9c07d30119fa37202233973629e3143c27685
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
Log Message:
-----------
[GlobalISel] Fast path exact LLT equality (NFC) (#222550)
Improves CTMark geomean -0.05% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=87d9c3c24ff5941ac08799850a6549b561c98a81&to=a5391cd5be815299b2cddcabf62a86369b247f72&stat=instructions:u
Assisted-by: codex
Commit: 19dad062e98520c641617fda2cec07592764d5dc
https://github.com/llvm/llvm-project/commit/19dad062e98520c641617fda2cec07592764d5dc
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/StopPointSiteList.h
M lldb/test/API/functionalities/breakpoint/write_over_software_breakpoint/TestWriteOverSoftwareBreakpoint.py
Log Message:
-----------
[lldb] Fix handling of lldb managed software breakpoints (#222009)
Fixes #217910.
When the debug server can manage its own breakpoints this is called an
"external" breakpoint. When it cannot, lldb must manage the breakpoint
itself from the client side.
Part of doing that is FindInRange which is used to patch reads and
writes over software breakpoint sites. It had an issue where it would
not account for a breakpoint that started before the range, but extended
into the range. For example:
```
Memory content: ABCDEFGHIJKL
Read range: ----[--]----
Breakpoint location: -BKPT-------
Overlap with read: ---- at -------
Expected read result: ----EFGH----
Would actually get: ----TFGH----
```
This change fixes that mistake:
* Exit early if there are no sites to check.
* Exit early if the lower_bound result is beyond the upper bound of the
range - only if the result is not the end of the list. In the result was
end(), there may be one site before which we must also check.
The existing "Over end of breakpoint" test covers the bug I'm fixing.
The tests have been refactored to run normally and via. a proxy that
refuses breakpoint packets.
We could instead use two different proxies where one supports the
packets and one doesn't. However, that's more overhead per test and you
can't run proxy tests remotely.
Due to https://github.com/llvm/llvm-project/issues/222284, the proxy
tests cannot be run everywhere, but it can run on AArch64 which is
common.
Commit: 2684037ea97ebb068941b699ef9639334958c509
https://github.com/llvm/llvm-project/commit/2684037ea97ebb068941b699ef9639334958c509
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
Log Message:
-----------
[AMDGPU] Update buildbot cmake cache files (#222807)
This fixes one issue where the compiler-rt entry was not propagated to
the build.
We also want to select libgcc as the default unwindlib explicitly (as
this is what we do downstream).
Commit: 9f634aa12509462631e9dc799b987c2aac617a2c
https://github.com/llvm/llvm-project/commit/9f634aa12509462631e9dc799b987c2aac617a2c
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 7ba3ce4 (#222865)
This fixes 7ba3ce428af7f6e7f1e642dba128c2afc13dba90 (#222859).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=7ba3ce428af7f6e7f1e642dba128c2afc13dba90
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4f32e473933d4a039d13fe2c0a4ccdde73c8b929
https://github.com/llvm/llvm-project/commit/4f32e473933d4a039d13fe2c0a4ccdde73c8b929
Author: yamash-fj <yamashita.ta-16 at fujitsu.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
Log Message:
-----------
[AArch64] Parameterize repeated FP divisor combine threshold by subtarget (#216930)
Changes:
This patch makes the threshold for combining repeated FP divisors
configurable per AArch64 subtarget, instead of using a single fixed
value 3 for all CPUs. Additionaly, set this value 2 for A64FX based on
observed profitability for this transform on A64FX.
Motivation:
Today, AArch64 uses a fixed threshold of 3 for reciprocal transform.
This means the transform runs when there are 3 FDIVs with the same
divisor (not 2). That is conservative for some subtargets, and it can
miss profitable opportunities on CPUs such as A64FX, where a lower
threshold appears to produce better code generation.
```
a / D; b / D; ...
=>
recip = 1.0 / D; a * recip; b * recip; ...
```
Note:
It does not change the semantics of the reciprocal transform itself.
Commit: 478b91b6f8a2b08dce9673555e3f6da8e6e69051
https://github.com/llvm/llvm-project/commit/478b91b6f8a2b08dce9673555e3f6da8e6e69051
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][ComplexToStandard] Fix Conj and Neg ops fmf propagation (#222622)
Commit: 7bb74b19b7f0bbe491898de2289e72d09e4a6b26
https://github.com/llvm/llvm-project/commit/7bb74b19b7f0bbe491898de2289e72d09e4a6b26
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
Log Message:
-----------
[mlir][ComplexToLLVM] Fix abs op fmf propagation (#222621)
Commit: 12f00f9cd311a910a84f3e8a05b5b0c96e2bdf78
https://github.com/llvm/llvm-project/commit/12f00f9cd311a910a84f3e8a05b5b0c96e2bdf78
Author: Nikhil Ludder <72620320+badnikhil at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/pre-coerced-value-not-numbered.ll
Log Message:
-----------
[GVN] Skip instructions without value numbers in `processNonLocalLoad` (#219851)
GVN may insert coercion instructions (MaterializeAdjustedValue) without
assigning them value numbers. If one becomes a GEP index of a PRE'd load
in the same processBlock sweep, the GEP-index scalar PRE in
processNonLocalLoad reaches it before the next re-numbering iteration
and the verifying VN.lookup() may assert. Avoid performing PRE on such
instructions.
Fixes: #216265.
Commit: 6700445cfe301eb079e13ed1079fb86d1f7b1402
https://github.com/llvm/llvm-project/commit/6700445cfe301eb079e13ed1079fb86d1f7b1402
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
A llvm/test/CodeGen/RISCV/rvv/vsetvli-dead-vl-vtype-liveness.mir
Log Message:
-----------
RISCV: Maintain VL/VTYPE liveness when clearing dead flags in InsertVSETVLI (#222862)
Drop the stale VL/VTYPE ranges when a dead flag is cleared.
RISCVInsertVSETVLI marks the VL and VTYPE defs of an explicit VSETVLI as
live by clearing their dead flags, but did not update LiveIntervals. When a def
was previously a dead def, its live range is a zero-length dead-def segment
ending at the def slot; clearing the flag extends the def past that slot
without extending the range leaving a segment that references no instruction.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 18b9d7282c067d83edda8006c25542d9490e3c6e
https://github.com/llvm/llvm-project/commit/18b9d7282c067d83edda8006c25542d9490e3c6e
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
M llvm/test/Transforms/Attributor/nofpclass-log.ll
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Add sNaN deductions for log/log2/log10 (#219703)
`log(x)` can only produce `sNaN` if `x` is `sNaN`.
This also affects tests for `llvm.amdgcn.log.f16` and
`llvm.amdgcn.log.f32`.
Commit: 5f604ff568a9493f1eee44441ef475a2aaad329c
https://github.com/llvm/llvm-project/commit/5f604ff568a9493f1eee44441ef475a2aaad329c
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[BUILD] Fix for 02dc8a35 (#222876)
[BUILD] Fix for 02dc8a35
Commit: 3d6ae4bdf4c6d45d5e2f2c55c06f84568fde0fe0
https://github.com/llvm/llvm-project/commit/3d6ae4bdf4c6d45d5e2f2c55c06f84568fde0fe0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/IR/Builders.cpp
M mlir/test/Transforms/test-legalizer.mlir
Log Message:
-----------
[MLIR] Fix infinite loop in tryFold in Graph Regions (#189232)
In a graph region (e.g. the module body), an op may use its own result
as an operand, creating a circular SSA dependency. When such an op was
passed to OpBuilder::tryFold, the do-while loop could spin forever:
1. foldCommutative moved the constant operand to the RHS (in-place fold,
foldResults still empty).
2. The next fold call returned the op's own result, signalling an
in-place fold, but foldSingleResultHook re-ran trait folds, found
nothing to swap, and returned success with empty foldResults.
3. Step 2 repeated without end.
Fix: cap the number of in-place fold iterations at 64. Legitimate chains
are very short in practice (foldCommutative swaps once, then the op folds to
a value or constant), so the cap is never reached for correct IR. For the
circular-SSA case the loop now terminates and tryFold returns failure,
letting dialect conversion fall through to a conversion pattern instead of
looping.
An alternative could be for each iteration of the loop, snapshot the
operand list and attributes/properties. If a fold returns empty results
but the operands are unchanged, we have reached a fixpoint. Stop the
loop and return failure.
However this is more expensive for the common case, while fixing an edge
case.
Fixes #159675
Assisted-by: Claude Code
Commit: 63cc989e0f7c4d7965fea43ac72c1bc713fbc967
https://github.com/llvm/llvm-project/commit/63cc989e0f7c4d7965fea43ac72c1bc713fbc967
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
Log Message:
-----------
[ORC] Move ExecutorSharedMemoryMapperService names to sps_ci (#222835)
Relocate the service's interface names and SPS signatures from rt:: in
OrcRTBridge into a new Shared/SPSCI/SharedMemoryMapperSPSCI.h, matching
the existing SPSCI descriptor convention. Name-neutral: the symbol
strings are unchanged.
Commit: 58c46bae21181fb4240cf964461bea738d96d50e
https://github.com/llvm/llvm-project/commit/58c46bae21181fb4240cf964461bea738d96d50e
Author: David Green <david.green at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/bcmp.ll
M llvm/test/CodeGen/AArch64/i128-imm-compare-ccmp.ll
Log Message:
-----------
[AArch64] Guard against large types in performOrXorChainCombine (#222146)
Larger type sizes will be legalized to i64, and will hit a crash in
checking constants.
Fixes #222089
Commit: 1821d5d4fcabdd878e8c0278b59105802fe47d51
https://github.com/llvm/llvm-project/commit/1821d5d4fcabdd878e8c0278b59105802fe47d51
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
R clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [3/5] (#221533)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the third part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: e885b0d31b1e9d5dd83620d09ee76a92c8c38c39
https://github.com/llvm/llvm-project/commit/e885b0d31b1e9d5dd83620d09ee76a92c8c38c39
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
M clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
M clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [3/5] (#221534)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the third part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
Commit: bc9886e720f178e0d35db1c2e11f17739b5106ce
https://github.com/llvm/llvm-project/commit/bc9886e720f178e0d35db1c2e11f17739b5106ce
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
Log Message:
-----------
[flang][OpenACC] Don't emit unstructured-loop TODO for wrappable loops (#222260)
`genOpenACCLoopFromDoConstruct` raised an NYI for any unstructured DO
inside `acc kernels`. That check ran before the wrapping in
`genFIR(DoConstruct)`, so a loop whose CFG is self-contained aborted
lowering even though the fall-back path would have wrapped it in an
`scf.execute_region`.
Skip the TODO when `isWrappableConstruct()` accepts the loop. Such a
loop is not attached to a directive; it is only nested inside the
kernels region.
Correspondingly, a DO loop sitting directly in an `acc kernels` body is
no longer wrappable, since it is the loop the directive parallelizes and
hiding its CFG would leave the kernels region with nothing to partition.
Commit: 6e25eaedeee9ee4845565514dce823988ac7f23c
https://github.com/llvm/llvm-project/commit/6e25eaedeee9ee4845565514dce823988ac7f23c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getschedpolicy.cpp
A libc/src/pthread/pthread_attr_getschedpolicy.h
M libc/src/pthread/pthread_attr_init.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etschedpolicy (#222682)
This patch implements pthread_attr_setschedpolicy and
pthread_attr_getschedpolicy.
This commit only operates on the pthread_attr_t object. It does not
attempt to install the scheduling policy when creating a new thread. I'm
leaving that for a separate patch as it requires a moderately
complicated startup dance to ensure that the scheduling policy takes
effect before the startup code runs.
The validation of inputs in pthread_attr_setschedpolicy is an
interesting question. Glibc accepts only policies explicitly declared in
POSIX, while other implementations let the user pass anything, and rely
on the kernel to validate the arguments. Interestingly, even glibc does
not validate the arguments in pthread_setschedparam.
For llvm-libc, I chose not to validate the arguments either. This is
*mostly* consistent with POSIX, which says (emphasis mine):
> The supported values of policy shall *include* SCHED_FIFO, SCHED_RR,
and
> SCHED_OTHER, which are defined in the <sched.h> header.
I say mostly, because the spec does say we should return ENOTSUP if "an
attempt was made to set the attribute to an unsupported value", but I'm
not sure that's worthwhile, as it means we would need to update our list
of supported policies whenever the kernel adds a new one (and anyway, we
cannot be sure that our understanding of supported policies matches what
the running kernel actually supports).
Assisted-by: Gemini
Commit: eb6fe5a664bfa6813223d4a71b088d53900404d4
https://github.com/llvm/llvm-project/commit/eb6fe5a664bfa6813223d4a71b088d53900404d4
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/neon-addsub-long-reassoc.ll
Log Message:
-----------
[AArch64] Reassociate adds/subs of extends for [SU](ADD|SUB)L. (#222561)
We do this for expressions that can't use widening add/sub.
Commit: dc6825047c42442c5e18dd09d260bee983bc5712
https://github.com/llvm/llvm-project/commit/dc6825047c42442c5e18dd09d260bee983bc5712
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
Log Message:
-----------
[SLP] Limit second pass to register VF in vectorizeNonVectorizableInsts. (#222755)
The second tryToVectorizeList pass in vectorizeNonVectorizableInsts
would try all roots for each possible VF between 1 and the number of
entries in the list.
This can cause super-linear compile-time, for example when there are
basic blocks with calls taking a large number of loads as arguments.
For example, running SLPVectorizer on a block with 1024 loads passed to
calls (https://llvm.godbolt.org/z/8M53G6WzW) will take a large amount of
time (timeout on godbolt, locally on Apple M1 it takes ~30s). With the
fix, it only takes 0.01s.
On large IR corpus, I did not see any difference in vectorization
decisions on AArch64.
PR: https://github.com/llvm/llvm-project/pull/222755
Commit: 5d6c7162093204a3cf6914acafa73dea59134cc2
https://github.com/llvm/llvm-project/commit/5d6c7162093204a3cf6914acafa73dea59134cc2
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
A llvm/test/Transforms/LoopVectorize/RISCV/interleaved-load-masked-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/nested-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_contiguous.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
Log Message:
-----------
[VPlan] Narrow VPWidenGEPRecipe if only its first lane is used. (#221171)
Extend existing narrowing in legalizeAndOptimizeInductions, already
applied to VPReplicateRecipe and VPWidenRecipe, to VPWidenGEPRecipe as
well. This improves cases where an interleaved access's insert position
shares an address calculation with a strided access (see
RISCV/interleaved-load-masked-store.ll), which previously caused the
legacy cost model to classify the address as non-uniform.
Commit: 884f70e221f529439544ddb2bddba4c4eed14742
https://github.com/llvm/llvm-project/commit/884f70e221f529439544ddb2bddba4c4eed14742
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Error.h
M orc-rt/include/orc-rt-c/support/WrapperFunction.h
Log Message:
-----------
[orc-rt] Fix C++ comments in C header. NFC. (#222887)
Commit: 764a4f4176bdebb5b8aa1ad9a4c4c8b46de85b2d
https://github.com/llvm/llvm-project/commit/764a4f4176bdebb5b8aa1ad9a4c4c8b46de85b2d
Author: AJMullen <andreas.mullen at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/lib/Passes/MCF.cpp
A bolt/test/AArch64/edge-weight-estimation-fixes.s
Log Message:
-----------
[BOLT] Fixed BOLT edge weight estimation in non-LBR mode. (#222538)
Before: When estimating edge weights within `computeEdgeWeights` in
`MCF.cpp`, if the `TotalChildrenCount` is 0, the default edge weight is
`1 / (GraphT::child_end(BB)_ - GraphT::child_begin(BB))` resulting in
integer division and incorrect distribution of estimated edge weights.
After: Correctly estimate edge weights with zero and non-zero values of
`TotalChildrenCount` by enforcing floating point division.
---------
Co-authored-by: Thrrreeee <shijinrui at bytedance.com>
Commit: c8655a8e7c00df0e5433c2434aad56320c0d1ee1
https://github.com/llvm/llvm-project/commit/c8655a8e7c00df0e5433c2434aad56320c0d1ee1
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/unittests/Utility/RegisterValueTest.cpp
Log Message:
-----------
[lldb][test] Fix RegisterValueTest.cpp compile with GCC (#222889)
Avoid some most vexing parse problems.
Fixes #220707 / 19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4.
Commit: c45192cefe1cd3bf167d975f0f9949ba323845de
https://github.com/llvm/llvm-project/commit/c45192cefe1cd3bf167d975f0f9949ba323845de
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/include/__config
M libcxx/include/__locale_dir/ctype_base.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/aix.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/llvm_libc.h
M libcxx/include/__locale_dir/support/newlib.h
M libcxx/include/__locale_dir/support/openbsd.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Make _LIBCPP_PROVIDES_DEFAULT_RUNE_TABLE part of the locale base API (#219196)
Whether libc++ has to provide a rune table is really part of the
localization of a platform. Move it there instead of `<__config>`.
Commit: f276d8f00313f593ab9d8f3a1d242b6754f0a436
https://github.com/llvm/llvm-project/commit/f276d8f00313f593ab9d8f3a1d242b6754f0a436
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/openmp-task-depend-loc.mlir
Log Message:
-----------
[OMPIRBuilder] Don't leak a foreign debug loc into the taskwait call (#222586)
A kmp_depend_info array is hoisted to the entry block of the enclosing
function. Pointing the builder into that block also adopts the location
of what is already there, which belongs to whichever construct put it
there rather than to the construct being emitted. restoreIP does not put
the location back either, since it adopts the location of the
instruction it lands on, so in createTaskwait the leak outlives the
excursion and reaches the __kmpc_omp_taskwait_deps_51 call.
Use InsertPointGuard, which restores the location along with the
insertion point.
Fixes https://github.com/llvm/llvm-project/issues/222044
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 3aeaa598286a3271cf02107b751d8e1b0a629d6f
https://github.com/llvm/llvm-project/commit/3aeaa598286a3271cf02107b751d8e1b0a629d6f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/include/__atomic/to_gcc_order.h
Log Message:
-----------
[libc++][NFC] Simplify __to_gcc_order by avoiding constexprness (#220940)
We never make use of the fact that these functions are `constexpr`, so
we might as well avoid complicating them for it. Even if we need them to
be `constexpr` at some point, we likely won't require them to be
`constexpr` in C++11, which is the only language mode with the single
statement restriction that caused this to be more complicated.
Commit: 0046d7fcaa5ce7a55b7f9be65f9dca4f055c76f8
https://github.com/llvm/llvm-project/commit/0046d7fcaa5ce7a55b7f9be65f9dca4f055c76f8
Author: Chris Kennelly <ckennelly at ckennelly.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/negative-lower-table-based-cttz.ll
Log Message:
-----------
[AggressiveInstCombine] Require a definitive initializer for table folds (#222826)
tryToRecognizeTableBasedCttzOrLog2 accepted any global that isConstant()
and hasInitializer(), but isConstant() only means the value does not
change at run time -- it does not mean the initializer that is read is
the one that gets linked. An interposable (weak/linkonce) constant, or
an externally_initialized constant, can be replaced with a different
constant table at link or load time, so folding tbl[i] against the
observed initializer is unsound for those.
Assisted-by: Claude Code
Commit: d7f2a9df46058dedfa97d35ba6596a01f8ecebe3
https://github.com/llvm/llvm-project/commit/d7f2a9df46058dedfa97d35ba6596a01f8ecebe3
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/unittests/ObjectContainer/CMakeLists.txt
M lldb/unittests/ObjectContainer/ObjectContainerUniversalMachOTest.cpp
Log Message:
-----------
[lldb] Validate universal Mach-O slice bounds before parsing (#221493)
Opening a corrupt universal (fat) Mach-O file can crash lldb. A fat-arch
header entry's (offset, size) pair is untrusted, and `GetObjectFile()`
passes it straight to `ObjectFile::FindPlugin()` with no check against
the
container's own size.
A slice whose offset is 0 points back at the start of the same fat
header,
so `GetObjectFile()` recurses into itself until the stack is exhausted:
```
$ ./ObjectContainerTests --gtest_filter=GetObjectFileSelfReferentialSlice
#230 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
#231 CreateObjectFromContainer(...) ObjectFile.cpp:43
#232 lldb_private::ObjectFile::FindPlugin(...) ObjectFile.cpp:146
#233 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
(repeats until the stack is exhausted)
SUMMARY: AddressSanitizer: stack-overflow (libsystem_trace.dylib:arm64e+0x16bd8) in os_log_fmt_flatten+0x6d4
```
A slice whose declared size is far larger than the file reaches the
allocator instead, with the untrusted size unchanged:
```
$ ./ObjectContainerTests --gtest_filter=GetObjectFileOversizedSlice
==89958==ERROR: AddressSanitizer: requested allocation size 0xffffffffffff0046
(0xffffffffffff1048 after adjustments for alignment, red zones etc.) exceeds
maximum supported size of 0x10000000000 (thread T0)
#9 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
SUMMARY: AddressSanitizer: allocation-size-too-big MemoryBuffer.cpp:343 in
llvm::WritableMemoryBuffer::getNewUninitMemBuffer(unsigned long, llvm::Twine const&, std::__1::optional<llvm::Align>)
```
`GetModuleSpecifications()` in the same file already guards its own
recursion this way: it only follows a slice that starts strictly past
the
container's current offset, and clamps the recursive call to the bytes
remaining in the container. Apply the same check to `GetObjectFile()`.
Found with lldb-target-fuzzer. The commands above are the two regression
tests added here.
Commit: 41c11fa5c016886d5858a1aba03a5980688ad5a1
https://github.com/llvm/llvm-project/commit/41c11fa5c016886d5858a1aba03a5980688ad5a1
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/test/std/utilities/variant/variant.relops/three_way.pass.cpp
Log Message:
-----------
[libc++][test] Remove non-functional `constexpr` in three-way comparison test for `variant` (#222837)
When we are just testing SFINAE and do not provide definitions for these
comparison operators, or make them deleted, it is unhelpful to mark them
`constexpr`.
If the implementation uses `std::compare_three_way`, which uses deduced
return type in its `operator()`, in the `operator<=>` for `variant`,
more things in the function body would be instantiated and detected. As
a result, the `-Wundefined-inline` warning or something similar could be
raised. Currently, MSVC STL is doing so.
Commit: 18ea5b09a2494d0bb4edf2f6946d8ad11ab36cc3
https://github.com/llvm/llvm-project/commit/18ea5b09a2494d0bb4edf2f6946d8ad11ab36cc3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/combine-shl.ll
Log Message:
-----------
[X86] combine-shl.ll - regenerate asm comments (#222729)
Reduces diff in upcoming patch
Commit: 46348fd3006282cc00b6b448a54456092c1cad4b
https://github.com/llvm/llvm-project/commit/46348fd3006282cc00b6b448a54456092c1cad4b
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/program_manager/CMakeLists.txt
A libsycl/unittests/program_manager/program_cache.cpp
M libsycl/unittests/queue/queue.cpp
Log Message:
-----------
[libsycl] Add queue constructors with context. (#221763)
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Co-authored-by: Sergey Semenov <sergey.semenov at intel.com>
Commit: 3407850c31e556ffb52d22b09c9405ad67a59f64
https://github.com/llvm/llvm-project/commit/3407850c31e556ffb52d22b09c9405ad67a59f64
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/signal.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/raise.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/tgkill.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/signal/CMakeLists.txt
M libc/src/signal/linux/CMakeLists.txt
A libc/src/signal/linux/pthread_kill.cpp
A libc/src/signal/pthread_kill.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_kill_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Implement pthread_kill (#222625)
The implementation delegates to Thread::kill, which uses tgkill to
target the thread ID.
The main complication is handling zombie threads. POSIX.1-2024 requires
that pthread_kill on a terminated (zombie) thread does not return ESRCH
because the pthread_t handle is still valid. The Linux kernel reaps
threads immediately on exit, so calling tgkill on an exited thread would
return ESRCH (or worse, target a recycled TID). To handle this:
- we check the thread's detach_state first. If it's already EXITING, we
simply return success without calling tgkill (a zombie thread cannot
handle signals anyway).
- if the thread exits concurrently and tgkill returns -ESRCH, we assume
it transitioned to a zombie and treat it as success.
I've also added a tgkill syscall wrapper and replaced one raw usage of
SYS_tgkill.
I've added an integration test covering signal delivery to self and
other threads, signal 0 checks, invalid signals, zombie threads, and
signal mask interactions.
Commit: 2fa51898b1a77dba4a6a397b296732009771e2d6
https://github.com/llvm/llvm-project/commit/2fa51898b1a77dba4a6a397b296732009771e2d6
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A libsycl/include/sycl/__impl/group_barrier.hpp
A libsycl/include/sycl/__spirv/spirv_types.hpp
M libsycl/include/sycl/sycl.hpp
A libsycl/test/basic/group_barrier.cpp
A libsycl/test/basic/group_barrier_device_code.cpp
Log Message:
-----------
[libsycl] Add group_barrier function. (#218971)
Assisted-by: Claude Code and GitHub Copilot
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: c61dda2b6137c618a6f196502512cd8989ab8f6b
https://github.com/llvm/llvm-project/commit/c61dda2b6137c618a6f196502512cd8989ab8f6b
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
Log Message:
-----------
[LLVM][CodeGen][SME] Make FMA decision independent of streaming mode. (#222598)
The relevant bfloat instructions are available in streaming mode and
thus we can benefit from the same BFMLAL based lowering.
Commit: 246194f32b17db4e43cc115f035619b0930e3787
https://github.com/llvm/llvm-project/commit/246194f32b17db4e43cc115f035619b0930e3787
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
Log Message:
-----------
[AArch64] Cache repeated subtarget queries (NFC) (#222637)
The existing SubtargetMap caches subtargets using a key built from a subset of
relevant function attributes. Add a single-entry cache keyed by the full
function attribute set to avoid rebuilding that key for repeated queries. This
covers both repeated queries for the same function and queries for different
functions with identical attributes.
Improves CTMark geomean -0.10% on aarch64-O3 and -0.17 on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=87d9c3c24ff5941ac08799850a6549b561c98a81&to=544bb3d9ac28bc1a28248f6b03bcd95fa85b20e0&stat=instructions:u
Assisted-by: codex
Commit: 9df4e9be49c213f8df306469fae1f50c98df6d4e
https://github.com/llvm/llvm-project/commit/9df4e9be49c213f8df306469fae1f50c98df6d4e
Author: Robert <robertvuia06 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/docs/index.md
M libsycl/include/sycl/__impl/usm_functions.hpp
M libsycl/src/usm_functions.cpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/unittests/CMakeLists.txt
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
A libsycl/unittests/usm/CMakeLists.txt
A libsycl/unittests/usm/alloc.cpp
Log Message:
-----------
[libsycl] USM Aligned allocation functions (#213468)
Adds the `aligned_*` versions of the USM functions, specifically for the
`device` `host` `shared` and free standing `aligned_alloc`.
Most of the overloads delegate between each other, but they slowly end
up being mapped to `aligned` version of API.
Adds more LIT tests in `alloc_functions.cpp` to cover the aligned
version.
Adds unittests for USM in `usm/alloc.cpp`
Assisted by AI for documentation, validation of logic in overloads and
alignment specifications from latest SYCL-Docs and unit tests
Commit: 4245b1dbc9d439c16c378486544f47a77b72ca53
https://github.com/llvm/llvm-project/commit/4245b1dbc9d439c16c378486544f47a77b72ca53
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/force-instruction-cost.ll
Log Message:
-----------
[LV] Add cost printing test with forced instruction costs (NFC). (#222895)
Add a test printing the cost of all recipes in the vector loop region
with -force-target-instruction-cost. Currently the flag is ignored for
VPDerivedIVRecipe and VPScalarIVStepsRecipe.
Commit: 18120564aae0d968a7b08e4b69f4f635fc91ab9c
https://github.com/llvm/llvm-project/commit/18120564aae0d968a7b08e4b69f4f635fc91ab9c
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/SystemZ/misched-prera-cmp-elim.mir
M llvm/test/CodeGen/SystemZ/misched-prera-latencies.mir
M llvm/test/CodeGen/SystemZ/misched-prera-loads.mir
Log Message:
-----------
[MISched] Dump SU node number on `tracePick` (#222631)
Print picked SU node number inline in `tracePick` for convenience.
Otherwise its may be a bit more confusing, for example if we have 2 best
candidates with a similar reason under a single direction.
Printing node number directly as it cannot be an ExitSU (and EntrySU is
effectively unused in-tree).
Commit: 26e41fdf58e9b41a13dc0c22a107100469b59d35
https://github.com/llvm/llvm-project/commit/26e41fdf58e9b41a13dc0c22a107100469b59d35
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/Attributor/nofpclass-fadd-fsub.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
Log Message:
-----------
[KnownFPClass] Move `fadd`/`fsub` tests to `nofpclass-fadd-fsub.ll` (#221872)
- Moved the lit tests for `fadd`/`fsub` to their own dedicated file.
- Updated the lit tests for `fadd`/`fsub` from version 2 to version 6.
- `fadd_p0_ftz_daz #3` was actually testing `positivezero|positivezero`,
so I fixed the name of the test to be `fadd_p0_ftpz_dapz #3`. Then added
a separate `fadd_p0_ftz_daz #0` test.
- `nofpclass-fadd-fsub.ll` uses attributes 1-9 except for 6, so I added
`fadd_p0_dynamic_dynamic #6` so I wouldn't have to change the attributes
for other tests (i.e. changing `test #7 --> test #6`, `test #8 --> test
#7`, etc)
The only tests for `fadd` that remain in `nofpclass.ll` are not related
to testing `KnownFPClass::fadd`.
I have split the PR into 3 commits to make it easier to review (4
commits due to the `undef` false positive).
After this PR lands I plan to open this PR
https://github.com/llvm/llvm-project/pull/221876
Commit: 32dd4e7e8e375cf983ffcf49e72f3abd6158a1b1
https://github.com/llvm/llvm-project/commit/32dd4e7e8e375cf983ffcf49e72f3abd6158a1b1
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/exception.hpp
M libsycl/src/exception.cpp
M libsycl/unittests/CMakeLists.txt
A libsycl/unittests/exception/CMakeLists.txt
A libsycl/unittests/exception/exception.cpp
Log Message:
-----------
[libsycl] Add sycl::exception constructors with context. (#220551)
Assisted-by:: GitHub Copilot for test & doxygen comments.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 092ac4c2626af97a09d768a63a32a2b4b96f754c
https://github.com/llvm/llvm-project/commit/092ac4c2626af97a09d768a63a32a2b4b96f754c
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
A clang/test/OpenMP/debug-info-ompirbuilder-handoff.c
Log Message:
-----------
[clang][OpenMP] Don't drop debug location when handing off to OMPIRBuilder. (#219548)
All the clang callsites that hand a `LocationDescription` to the
`OpenMPIRBuilder` pass `CGF.Builder`. That selects
`LocationDescription(const IRBuilderBase &)`, which carries both the
insertion point and the current debug location.
The 2 call sites fixed in this PR used `CGF.Builder.saveIP()` which
passes only an insertion point, selecting `LocationDescription(const
InsertPointTy &)`, which leaves `DL` empty. As a result, the IR the
builder emitted on clang's behalf came out without `!dbg`.
Fixed by passing `CGF.Builder`, as the other callsites do.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 1f6182764499a3007a8f703f2cae635d21b5e7fe
https://github.com/llvm/llvm-project/commit/1f6182764499a3007a8f703f2cae635d21b5e7fe
Author: Kiva <zengtao at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/strided-load-common-alignment.ll
Log Message:
-----------
[RISCV][SLP] Precommit strided-load alignment tests (NFC) (#222863)
Commit: 476e717c0484b464085f8cc468b0b35fdeea7815
https://github.com/llvm/llvm-project/commit/476e717c0484b464085f8cc468b0b35fdeea7815
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/transform/Ch2/lib/MyExtension.cpp
M mlir/examples/transform/Ch3/lib/MyExtension.cpp
M mlir/include/mlir/Dialect/SCF/IR/SCF.h
A mlir/include/mlir/Dialect/SCF/IR/SCFDialect.h
M mlir/lib/CAPI/Dialect/SCF.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCFPass.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
Log Message:
-----------
[mlir][SCF] Split the dialect declaration (NFC) (#222802)
Introduce a self-contained dialect declaration and use it in nine
configured consumers that do not need the generated operation umbrella.
Across three controlled -j16 rebuilds of the affected TUs, median
instructions fell from 162.029B to 150.032B (-7.404%) and median wall
time fell from 8.82s to 8.73s (-1.020%).
Assisted-by: Codex
Commit: 152917c9555d4da0171e7d992b38196e2fb9f5aa
https://github.com/llvm/llvm-project/commit/152917c9555d4da0171e7d992b38196e2fb9f5aa
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/test/Dialect/Linalg/vectorization/insert-slice.mlir
Log Message:
-----------
[mlir][linalg] Add `insert_slice` vectorization tests for leading/trailing dropped dims (#221966)
Follow-up to #219192, addressing review feedback after merge.
This PR _simply_ add tests for vectorizing rank-reducing
`tensor.insert_slice` where the dropped unit dim is:
1. leading, e.g., `dest = 1x8x4, source = ?x4`,
2. trailing, e.g., `dest = 8x4x1, source = ?x4`, and
3. both (leading + trailing), e.g., `dest = 1x8x4x1, source = ?x4`.
It complements the test introduced in #219192.
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: 3c003512ef20a066ee864fb20c31496859b75061
https://github.com/llvm/llvm-project/commit/3c003512ef20a066ee864fb20c31496859b75061
Author: yamash-fj <yamashita.ta-16 at fujitsu.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/targetattr.c
A clang/test/Driver/aarch64-mcpu-no-feat.c
M clang/test/Driver/arm-sb.c
M llvm/lib/TargetParser/AArch64TargetParser.cpp
Log Message:
-----------
[AArch64][Driver] Fix behaviour of +nofeat modifier on -mcpu
Honour explicit +no<feature> modifiers for features implied by a CPU's
base architecture, both in -mcpu and target("cpu=...") attributes.
For example, -mcpu=neoverse-v2+nosb now disables SB instead of silently
ignoring the modifier.
Fixes #192186.
Commit: d5f6426a52af4966bd6902634648ba40c23bdc35
https://github.com/llvm/llvm-project/commit/d5f6426a52af4966bd6902634648ba40c23bdc35
Author: Vladimir Miloserdov <milosvova at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-and-or-with-all-true.ll
Log Message:
-----------
[AArch64][SVE] Optimize logical ops with convert.to.svbool (#160408)
When both operands of a logical operation (and/or/xor) are
convert.to.svbool
from the same narrower type, unwrap to that type, simplify using
simplifyBinOp,
and rewrap the result. This eliminates redundant instructions in cases
like:
svand_z(svptrue_b8(), svpnext_b16(prev, pg), svptrue_b16());
Fixes https://github.com/llvm/llvm-project/issues/160279.
---------
Co-authored-by: Paul Walker <paul.walker at arm.com>
Commit: e6b77e6ce7b2cc5625f83fc9e09d273b1ca7693a
https://github.com/llvm/llvm-project/commit/e6b77e6ce7b2cc5625f83fc9e09d273b1ca7693a
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-records-and-retained.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-retained-nodes.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-skip-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable.ll
Log Message:
-----------
[SPIRV] Add support for NSDI DebugLocalVariable. (#221706)
This PR adds support for
[DebugLocalVariable](https://registry.khronos.org/SPIR-V/specs/unified1/DebugInfo.html#DebugLocalVariable).
Commit: 11ef37f9b78e121a11cab841ba2ee0069fba4149
https://github.com/llvm/llvm-project/commit/11ef37f9b78e121a11cab841ba2ee0069fba4149
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Log Message:
-----------
[lldb][AArch64][Linux] Remove unused SVE variable (#222935)
Commit: 2e023c8e922d2b03c0cd39c1dbb6e594ab01d856
https://github.com/llvm/llvm-project/commit/2e023c8e922d2b03c0cd39c1dbb6e594ab01d856
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h.inc
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Make all syntactic properties explicit (#222375)
For clauses, modifiers, and modifier sets/groups, make sure that either
the syntactic proprty or its inverse is explicitily listed, with the
missing properties added according to the following table.
```
| Modifier
Inverse | Clause Modifier group
Property property | defaults defaults defaults
----------+------------+------------+------------+-----------
required optional | optional optional optional
unique repeatable | repeatable unique unique
exclusive compatible | compatible compatible compatible
ultimate free | free free free
```
Commit: 5603248c95d69e31889f9eca8ce5254c3a2484bd
https://github.com/llvm/llvm-project/commit/5603248c95d69e31889f9eca8ce5254c3a2484bd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/symbol.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h
M llvm/unittests/Frontend/EnumSetTest.cpp
Log Message:
-----------
[OpenMP] Rename ClauseSet to Clauses and DirectiveSet to Directives, NFC (#222440)
The ClauseSet name was an alias of an EnumSet of clause ids. However, it
collides with a "clause set" concept in OpenMP, which is a set of
clauses,
but with properties and additional information. To resolve the naming
conflict, rename ClauseSet to Clauses.
Although there is no "directive set" in OpenMP, rename DirectiveSet in
an analogous way for uniformity.
Commit: 9d3f81dadfcd509eadd16213a7f428e081214147
https://github.com/llvm/llvm-project/commit/9d3f81dadfcd509eadd16213a7f428e081214147
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Remove deprecated hasStdExtCOrZcd/hasStdExtCOrZcfOrZce (#222925)
These two methods were marked LLVM_DEPRECATED in favor of
hasStdExtZcd/hasStdExtZcf respectively 7 months ago. There are no
remaining in tree callers, so remove them.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: e0d944d2dda0df304505947278304a628ff824fb
https://github.com/llvm/llvm-project/commit/e0d944d2dda0df304505947278304a628ff824fb
Author: Shoreshen <372660931 at qq.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
Log Message:
-----------
[AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (#203150)
Implied by
https://github.com/llvm/llvm-project/pull/202917#discussion_r3388089034
This PR apply legalization change for DAG. Case changes can be explained
in https://github.com/llvm/llvm-project/pull/202917
---------
Co-authored-by: shore <shorshen at amd.com>
Commit: 21ef0ade496fcaf20cfcb32f4a7e46f4f38abafd
https://github.com/llvm/llvm-project/commit/21ef0ade496fcaf20cfcb32f4a7e46f4f38abafd
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/typo-correction.c
Log Message:
-----------
[clang][Sema] Add diagnostic note for reference of function-like macros requiring without parentheses (#123495)
This PR enhances the Clang diagnostics to provide better guidance when
function-like macros are used without parentheses. Additionally, it
updates the relevant test cases to reflect these changes (#123038 ).
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Co-authored-by: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Commit: be60b244d1f9fa798c8922e313679035ad9c2ee5
https://github.com/llvm/llvm-project/commit/be60b244d1f9fa798c8922e313679035ad9c2ee5
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libunwind/test/dwarf_expression_stack.pass.cpp
Log Message:
-----------
[libunwind] Mark test as requiring Unix headers (#222679)
Test `libunwind/test/dwarf_expression_stack.pass.cpp` requires a POSIX
environment because it uses `signal.h` and associated functions. Because
of this, the test fails in baremetal targets.
This change adjusts the requirements of the test. `has-unix-headers`
does not map exactly to the requirements here, but it seems to be enough
for this case.
Commit: 176ab0177fb9acf749b90634cae84936fcfac2c5
https://github.com/llvm/llvm-project/commit/176ab0177fb9acf749b90634cae84936fcfac2c5
Author: Yue Huang <2292398666 at qq.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/ControlFlowToSCF/ControlFlowToSCF.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Transforms/CFGToSCF.h
M mlir/lib/Conversion/ControlFlowToSCF/CMakeLists.txt
M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
M mlir/lib/Transforms/Utils/CFGToSCF.cpp
M mlir/test/Conversion/ControlFlowToSCF/test.mlir
Log Message:
-----------
[MLIR][Conversion] Remove func dialect dependency for CF to SCF conversion (#222594)
The pass used to target only `func.func` and generates a `func.return`
with poison values. Now we change it to `ub.unreachable`, as the TODO
suggests.
But this change alone can cause the following pattern to appear after
lifting:
```mlir
func.func @f(%arg0: f32, %arg1: i1) -> f32 {
cf.cond_br %arg1, ^bb1(%arg0 : f32), ^bb2
^bb1(%0: f32): // pred: ^bb0
ub.unreachable
^bb2: // pred: ^bb0
return %arg0 : f32
}
```
This `cf.cond_br` cannot be raised further into `scf.if`, because we
need something as the operand of `return`, while `ub.unreachable`
doesn't provide this. Therefore we reused the code of synthesizing
poison values when `ub.unreachable` can be merged to other return
operations.
---------
Co-authored-by: Markus Böck <markus.boeck02 at gmail.com>
Commit: f2d4b9dfc7e5bba16f6b3b46469e6cad619370db
https://github.com/llvm/llvm-project/commit/f2d4b9dfc7e5bba16f6b3b46469e6cad619370db
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
Log Message:
-----------
[AMDGPU][NFC] Convert v2f16 inreg fabs/fneg tests to have SGPR uses (#222785)
Update v2f16 inreg fabs/fneg tests to have SGPR uses.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 94dcd357325f05a47537794bae692998ec059cdf
https://github.com/llvm/llvm-project/commit/94dcd357325f05a47537794bae692998ec059cdf
Author: Kristina Bessonova <kbessonova at accesssoftek.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
Log Message:
-----------
[AArch64][GlobalISel] Add support for TLS for ELF (#220236)
Mirror the existing DAGISel lowering for the TLS access sequences.
'AArch64 local-dynamic TLS cleanup pass' moved to
`AArch64PassConfig::addMachineSSAOptimization()` hook to make it running
for both instruction selection pipelines.
The generated by GlobalISel code matches DAGISel for the existing TLS
test cases.
Commit: 57bf08dc0f318ce50e6c9fdc0d7c9e770f247ee8
https://github.com/llvm/llvm-project/commit/57bf08dc0f318ce50e6c9fdc0d7c9e770f247ee8
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/scmp.ll
Log Message:
-----------
[PowerPC] simplify the asm of scmp builtin (#200024)
for the IR
```
define noundef signext range(i32 -1, 2) i32 @test_scmp(i64 noundef %a, i64 noundef %b) local_unnamed_addr #0 {
entry:
%cond2 = tail call i32 @llvm.scmp.i32.i64(i64 %a, i64 %b)
ret i32 %cond2
}
```
when compile -mcpu=pwr8 and 64bit
it generated as asm following orginal
sradi 5, 4, 63
rldicl 6, 3, 1, 63
subc 7, 4, 3
adde 5, 6, 5
cmpd 3, 4
li 3, -1
xori 5, 5, 1
isellt 3, 3, 5
extsw 3, 3
blr
the patch will let it generate as
```
cmpd 7, 3, 4
mfocrf 3, 1
rlwinm 4, 3, 30, 31, 31
rlwinm 3, 3, 29, 31, 31
sub 3, 4, 3
blr
```
Commit: bf1b598fff82413353b3ad45c4df06b243c1e6a1
https://github.com/llvm/llvm-project/commit/bf1b598fff82413353b3ad45c4df06b243c1e6a1
Author: Stanislav Bardyuk <6258615+kodlan at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAlignment.cpp
M llvm/test/Transforms/InferAlignment/masked.ll
M llvm/test/Transforms/InferAlignment/memintrinsics.ll
Log Message:
-----------
[InferAlignment] Do not use intrinsic align attributes as base pointer alignment (#221018)
InferAlignment propagates alignment between accesses of the same base
pointer: each load/store records how aligned the base must be, and later
accesses of that base are upgraded. Since #156057 (masked.load/store)
and
#217172 (memcpy/memmove/memset), the align parameter attribute of these
intrinsics is fed into the same table.
That is not sound. A memset with a zero length (or a masked store with
an
all-false mask) does not access memory, and its pointer argument is
allowed
to be poison, so an align attribute on it proves nothing about the
pointer.
For
```llvm
define void @test(ptr %p, i64 %n) {
call void @llvm.memset(ptr align 16 %p, i8 0, i64 %n, i1 false)
store i32 0, ptr %p
ret void
}
```
the store was upgraded to align 16, which is UB when %p is only 4-byte
aligned and %n is 0.
Stop presenting the attribute alignment to the base pointer logic: the
intrinsic branch now passes align 1, the same convention the
and(ptrtoint)/trunc(ptrtoint) patterns use for "this instruction proves
nothing". The attribute can still be improved from a dominating real
access or from known bits. A constant non-zero length would be a
provable access, but it is deliberately not special-cased, as suggested
in the issue.
Fixes #220520
Commit: 2a7919ef03d3d389064a56531bcb3ce7a87afd4c
https://github.com/llvm/llvm-project/commit/2a7919ef03d3d389064a56531bcb3ce7a87afd4c
Author: kwyatt-ext <kwyatt.external at hpe.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/stat.h
M flang-rt/lib/runtime/stat.cpp
M flang/docs/Extensions.md
M flang/docs/Intrinsics.md
M flang/include/flang/Evaluate/common.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-namelist.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/type.cpp
A flang/test/Semantics/enumeration-type-intrinsics-array-fold.f90
A flang/test/Semantics/enumeration-type-intrinsics-gating.f90
A flang/test/Semantics/enumeration-type-intrinsics-keyword.f90
A flang/test/Semantics/enumeration-type-intrinsics-nonenum.f90
A flang/test/Semantics/enumeration-type-intrinsics.f90
A flang/test/Semantics/enumeration-type-io-pdt-order.f90
A flang/test/Semantics/enumeration-type-io.f90
A flang/test/Semantics/enumeration-type-mod-readback.F90
A flang/test/Semantics/enumeration-type-mod.f90
Log Message:
-----------
[flang] Enumeration Type: (PR 3/5) Intrinsics + I/O + Modules (#193235)
This PR adds intrinsics: HUGE, INT, NEXT, and PREVIOUS. It adds support
for I/O, specifically formatted I/O with explicit format. Also, it adds
module support.
It is the 3rd of 5 stacked PRs.
Assisted-by: AI
---------
Co-authored-by: Kevin Wyatt <kwyatt at hpe.com>
Commit: 1cfa469ad1b9a00500e94eac8ec65b1f0041f3ce
https://github.com/llvm/llvm-project/commit/1cfa469ad1b9a00500e94eac8ec65b1f0041f3ce
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOverload.cpp
A clang/test/AST/ast-print-deducing-this.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
Log Message:
-----------
[clang] Add missing information to AST for calling explicit object member functions (#220463)
For `E1.E2()` and `E1->E2()`,
1. A `MemberExpr` is created to represent `E1.E2` and `E1->E2`.
If overload resolution is performed, it is created using information
from a `UnresolvedMemberExpr`.
2. If `E2` is an explicit object member function, a `DeclRefExpr` is
created to represent `E2` using information from the `MemberExpr`.
This PR adds missed information to the `DeclRefExpr`.
Fixes #218829.
Commit: 8328d74f3a96e70c917a796780b2d7e2ac159958
https://github.com/llvm/llvm-project/commit/8328d74f3a96e70c917a796780b2d7e2ac159958
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/records.cpp
M clang/test/CodeGen/pr4349.c
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
[clang][bytecode] Use opaque pointers for decl-based dummy pointer (#222897)
This uses the recently introduced opaque pointers for what we used to
use dummy pointers for, if the base of the pointer is a declaration.
This of course means we see opaque pointers in a lot more places.
However, we don't need to actually allocate anything for their data
anymore, resulting in a lot fewer allocations for such pointers.
Commit: 1fe126ef2d6330b7459704e28b2cb3f9bb92b63c
https://github.com/llvm/llvm-project/commit/1fe126ef2d6330b7459704e28b2cb3f9bb92b63c
Author: Andrew Ng <andrew.ng at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lld/Common/CommonLinkerContext.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
A lld/test/ELF/dynamic-debug.test
A lld/test/ELF/invalid-dynamic-debug.test
A lld/test/ELF/trace-symbols-dynamic-debug.test
M llvm/include/llvm/BinaryFormat/ELF.h
Log Message:
-----------
[dyndbg][LLD][ELF] Initial LLD support for dynamic debugging (#214188)
LLVM's Dynamic Debugging feature (`llvm/docs/DynamicDebugging.md`)
generates optimized relocatable files with an unoptimized relocatable
copy of the functions from its translation unit embedded in a
`SHT_LLVM_DYNDBG_ELF` section named `.debug_llvm_dyndbg`. The
unoptimized functions in the "inner" embedded relocatable reference the
functions and data of the "outer" optimized relocatable.
When LLD encounters dynamic debugging objects, a nested "inner"
relocatable link is run with the embedded "inner" unoptimized objects.
The output is embedded in a `SHT_LLVM_DYNDBG_ELF` section named
`.debug_llvm_dyndbg` and described by an `NT_LLVM_DYNAMIC_DEBUGGING`
note in the "outer" output. The "inner" relocatable link more closely
resembles a final link rather than a regular relocatable `-r` one,
unless the "outer" link is itself a relocatable `-r` link.
The embedded "inner" objects' undefined symbols are added to the "outer"
symbol table so that the "outer" link resolves the dependencies of the
"inner" relocatable link. Symbols referenced by "inner" relocations from
an allocated section are assigned a PLT/GOT entry as appropriate and are
diagnosed when unresolved. In this initial implementation, these symbols
also act as `--gc-sections` roots for the "outer" link and
`--gc-sections` is not supported for the "inner" relocatable link.
ICF is disabled so that individual functions can be patched when
debugging with dynamic debugging without affecting other identical
functions.
RFC: https://discourse.llvm.org/t/90113
Commit: 4ec3afcec324456abdda0e75a3cfbbbcabff9714
https://github.com/llvm/llvm-project/commit/4ec3afcec324456abdda0e75a3cfbbbcabff9714
Author: Adam Paszke <apaszke at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/IR/parser.mlir
Log Message:
-----------
[mlir] Accept OpaqueAttr as a valid memory space if the context allows unregistered dialects (#187682)
When a context allows unregistered dialects and an unknown attribute is
encountered, it is wrapped in OpaqueAttr from the builtin dialect.
Commit: c89359b132c086c1a98d9b6ec73461e48c004481
https://github.com/llvm/llvm-project/commit/c89359b132c086c1a98d9b6ec73461e48c004481
Author: Robert <robertvuia06 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/docs/index.md
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
A libsycl/test/basic/context.cpp
M libsycl/unittests/CMakeLists.txt
A libsycl/unittests/context/CMakeLists.txt
A libsycl/unittests/context/context_ctors.cpp
Log Message:
-----------
[libsycl] Add constructors for context (#214538)
Adds public `constructors` API for the `context` class.
It also adds E2E and unit tests.
Assisted by AI for documentation and testing
---------
Co-authored-by: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Commit: 853a7fc14e85659be5b5ac6cfd3481712e3795d1
https://github.com/llvm/llvm-project/commit/853a7fc14e85659be5b5ac6cfd3481712e3795d1
Author: Chris Copeland <chris at chrisnc.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll
M llvm/test/CodeGen/ARM/eabihf-no-fpregs.ll
M llvm/test/CodeGen/ARM/inlineasm-operand-implicit-cast.ll
Log Message:
-----------
[ARM] Prevent use of the VFP calling convention when +soft-float is enabled (#221434)
This check was implemented in #111334 for -fpregs and Thumb1 cases, but
+soft-float is a distinct case that can lead to the same silent calling
convention mismatches.
Fix tests that were using +soft-float and the VFP calling convention.
Clarify comment about hard-float support on mve+nofp cores.
Commit: cfa4135a9d324b3c539d9f874509ba03a8b0106f
https://github.com/llvm/llvm-project/commit/cfa4135a9d324b3c539d9f874509ba03a8b0106f
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP] Don't reserve the generic mode warp on SPIR-V (#222763)
#218790 widened a generic mode kernel's thread bound by a warp so that
the main
thread has one of its own. The bound is what lets the runtime's own warp
addition through: `getEffectiveNumThreads()` adds a warp and then clamps
to the
bound, so before that change the addition was clamped straight back off,
which
is why a `thread_limit` below one wavefront ended up with no workers.
Widening
the bound is the fix, and it is also what makes every generic mode
kernel launch
a warp wider than it used to.
`hasGridValue()` covers SPIR-V, so that geometry change reached Level
Zero.
@sarnex reports hangs and intermittent failures there and asked about a
revert
in
https://github.com/llvm/llvm-project/pull/222097#issuecomment-5609354538.
The
motivating bug was on AMDGPU, so this restricts the reservation to the
targets
it was written for and gives SPIR-V back the launch geometry it had
before.
Measured on gfx90a, generic mode, threads per block for a given
`thread_limit`:
| `thread_limit` | launched |
| --- | --- |
| 1 | 65 |
| 4 | 68 |
| 64 | 128 |
| 256 | 320 |
| 1024 | 1024 (clamped) |
Before #218790 each of those launched exactly `thread_limit`, because
the clamp
removed the runtime's warp again. SPIR-V goes back to that with this
patch:
`thread_limit(4)` writes a bound of 4 rather than 68, while AMDGPU keeps
68.
I have not reproduced the Level Zero failures — I have no Intel device,
and
OpenMP offload to `spirv64-amd-amdhsa` is not a working path, so AMD
hardware
cannot stand in. What this patch does establish is that SPIR-V's bound
returns
to its pre-#218790 value, so it undoes the geometry change whether or
not that
is the whole story. @sarnex, could you try it on the Level Zero runner?
This is a narrowing rather than a claim that SPIR-V never wants the
reserved
warp. Without it a SPIR-V `thread_limit` below a warp has the same
no-workers
problem #218790 fixed elsewhere; it is just not reachable today. If
Level Zero
grows the handling, this can come back.
Testing: `clang/test/OpenMP` 1613 passed,
`llvm/test/Transforms/{OpenMP,Attributor}`
263 passed, `LLVMFrontendTests` 1322 passed. Two tests needed updating,
both of
which encode SPIR-V thread bounds.
Commit: ad72da24e242b6bf5c73b5fcd267a86cefcead12
https://github.com/llvm/llvm-project/commit/ad72da24e242b6bf5c73b5fcd267a86cefcead12
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/force-instruction-cost.ll
Log Message:
-----------
[VPlan] Consider VPDerivedIV & VPScalarIVSteps for forced costs. (#222918)
Now that we compute VPDerivedIV and VPScalarIVSteps costs directly in
VPlan, also account for them with forced costs. They never have
underlying instructions, so always add the forced cost for them.
Previously they would have been accounted for in precomputeCosts.
PR: https://github.com/llvm/llvm-project/pull/222918
Commit: 59658bea07648e2ec4c32ec15e03e13ed130b803
https://github.com/llvm/llvm-project/commit/59658bea07648e2ec4c32ec15e03e13ed130b803
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManySignals.py
Log Message:
-----------
[lldb][test] Disable TestConcurrentManySignals.py on AArch64 Linux (#222948)
It is flakey in pre-commit CI
(https://github.com/llvm/llvm-project/issues/171210) and blocking
https://github.com/llvm/llvm-project/issues/171202 as a result.
No one is going to have time to dig into this soon, so disable it for
now.
Commit: 0bf534a7b76c7623edb7785cd8b21d89ec63e5d9
https://github.com/llvm/llvm-project/commit/0bf534a7b76c7623edb7785cd8b21d89ec63e5d9
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-subreg-index-aligned-vgpr-check.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir
Log Message:
-----------
[AMDGPU] Remove the VGPR-alignment check from the machine verifier (#219230)
The machine verifier had a check that a 64-bit-or-wider VALU operand uses an even-aligned VGPR/AGPR tuple on subtargets that require it. Now that most operands express their alignment requirement through `_AlignTarget`, the check is redundant: the generic verifier already rejects a register that does not fit its operand's class.
This removes the "Subtarget requires even aligned vector registers" and "Operand has incorrect register class" diagnostics, leaving the generic "Illegal virtual/physical register for instruction".
The image `vaddr` parity check is left in place: single-VGPR alignment cannot be expressed as a register class, so it still needs an explicit check.
Commit: f55cb17894f605f8045d74f7ed13322776530acc
https://github.com/llvm/llvm-project/commit/f55cb17894f605f8045d74f7ed13322776530acc
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
Log Message:
-----------
[Clang][NFC] Add regression tests for a couple resolved issues (#222944)
Fixes #38721 (Clang 18)
Fixes #58682 (Clang 18)
Commit: c44ac9eedba61129a76ff5964db9a0d6bf639b64
https://github.com/llvm/llvm-project/commit/c44ac9eedba61129a76ff5964db9a0d6bf639b64
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
A clang/test/APINotes/Inputs/Headers/RedeclAnnotation.apinotes
A clang/test/APINotes/Inputs/Headers/RedeclAnnotation.h
A clang/test/APINotes/Inputs/Headers/RedeclDefinition.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/redecl-after-definition.c
Log Message:
-----------
[clang][APINotes] Do not drop attributes applied after a definition (#222902)
API notes are matched against whichever declaration the compiler
reaches, which can be a redeclaration that follows the definition. When
the definition lives in one module and the annotated redeclaration in
another, that is exactly what happens: checkNewAttributesAfterDef()
warns "attribute declaration must precede definition" and erases the
attribute, so the annotation is silently lost.
The warning exists to tell users that an attribute they wrote has no
effect. Attributes from API notes are not written in the source, so the
warning has nowhere to point and there is nothing for the user to
correct. Skip attributes with an invalid location, alongside the
existing exceptions.
rdar://186930250
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: 1d3366b2f4b641cdff078d51d49cfc849dacbf84
https://github.com/llvm/llvm-project/commit/1d3366b2f4b641cdff078d51d49cfc849dacbf84
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M openmp/runtime/test/transform/split/fill_first.c
M openmp/runtime/test/transform/split/foreach.cpp
M openmp/runtime/test/transform/split/intfor.c
M openmp/runtime/test/transform/split/intfor_negstart.c
M openmp/runtime/test/transform/split/iterfor.cpp
M openmp/runtime/test/transform/split/leq_bound.c
R openmp/runtime/test/transform/split/lit.local.cfg
M openmp/runtime/test/transform/split/negative_incr.c
M openmp/runtime/test/transform/split/nonconstant_incr.c
M openmp/runtime/test/transform/split/parallel-split-intfor.c
M openmp/runtime/test/transform/split/single_fill.c
M openmp/runtime/test/transform/split/three_segments.c
M openmp/runtime/test/transform/split/trip_one.c
M openmp/runtime/test/transform/split/unsigned_iv.c
M openmp/runtime/test/transform/split/zero_first_segment.c
Log Message:
-----------
[OpenMP][NFC] Explicit run-checks for OpenMP 6.0 loop-splitting (#221651)
Move OpenMP 6.0 test flag to RUN lines for loop splitting
Commit: da252a8b6fb505e2395bbb01c2e62037dae95eb3
https://github.com/llvm/llvm-project/commit/da252a8b6fb505e2395bbb01c2e62037dae95eb3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Allow pointer type mismatch in SubPtr op (#222940)
The result of the attached test case is 1, which then gets divided by 8
and the end result is 0. This should evaluate.
Commit: 90466334d0eaabb7debd36cd26cd17c7d2850567
https://github.com/llvm/llvm-project/commit/90466334d0eaabb7debd36cd26cd17c7d2850567
Author: David Green <david.green at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
Log Message:
-----------
[AArch64][GlobalISel] Copy flags in reduction fewerElements (#221608)
Commit: 1952c705fad0187fc0c6fbd1460dbd56d56c8087
https://github.com/llvm/llvm-project/commit/1952c705fad0187fc0c6fbd1460dbd56d56c8087
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/sys-mman-macros.h
M libc/include/sys/mman.yaml
Log Message:
-----------
[libc] Add MAP_ANON as a synonym for MAP_ANONYMOUS. (#222789)
`MAP_ANON` is specified in POSIX, but may not be present in Linux kernel
headers,
which we rely on to get the values of other `MAP_` values. Provide this
macro
ourselves to ensure the user code including `<sys/mman.h>` can use it.
Commit: 185ff0c972cbdf0f221fbf1f45b8554810da79eb
https://github.com/llvm/llvm-project/commit/185ff0c972cbdf0f221fbf1f45b8554810da79eb
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/bfloat-int64-cvt-i686.ll
Log Message:
-----------
[X86] Fix i64-to-bf16 conversion crash on 32-bit targets (#222934)
Converting a loaded `i64` to `bfloat` can crash instruction selection on
i686:
```llvm
define bfloat @convert(ptr %p) {
%value = load i64, ptr %p
%result = sitofp i64 %value to bfloat
ret bfloat %result
}
```
With `llc -mtriple=i686-linux-gnu`, this hits:
```text
Do not know how to custom type legalize this operation!
```
The X86 DAG combine folds the load and conversion into an x87 `FILD`
node
before type legalization. It already excludes `f16` and `f128`, but was
missing
`bf16`, leaving the legalizer with an unsupported result type.
Add `bf16` to that exclusion. This lets the existing legalization
promote the
conversion through `f32` and then round to bf16. The change also covers
the
constrained signed conversion, which uses the same combine.
Assisted by: Fable 5.1, Astra 6
Commit: dceef547706bcc82ad8681b03f2871707e4c3384
https://github.com/llvm/llvm-project/commit/dceef547706bcc82ad8681b03f2871707e4c3384
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 176ab01 (#222943)
This fixes 176ab0177fb9acf749b90634cae84936fcfac2c5 (#222594).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=176ab0177fb9acf749b90634cae84936fcfac2c5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 6acc635735efc0a6bec1e38194d22b6e1061f495
https://github.com/llvm/llvm-project/commit/6acc635735efc0a6bec1e38194d22b6e1061f495
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
Log Message:
-----------
[AMDGPU][NFC] Refactor integer to float lowering (#222898)
Factor common code out of LowerUINT_TO_FP and LowerSINT_TO_FP.
Commit: cc5e9d63b4dcb572483479ed2368783faff416ee
https://github.com/llvm/llvm-project/commit/cc5e9d63b4dcb572483479ed2368783faff416ee
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACCLoop.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR][NFC] Fix CIR build after #219195 (#222822)
https://github.com/llvm/llvm-project/pull/219195 marked certain forms of
the create function, and CIR was using those (most
unintentionally/indirectly).
This change updates the CIR code to use non-deprecated forms
Assisted-by: Cursor / claude-opus-5
Commit: 2078cc8bfe5cdabc47a744810efc52bcca977cb7
https://github.com/llvm/llvm-project/commit/2078cc8bfe5cdabc47a744810efc52bcca977cb7
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M offload/test/jit/type_punning.c
M offload/test/offloading/bug64959_compile_only.c
M offload/test/offloading/complex_reduction.cpp
M offload/test/offloading/ctor_dtor_api.cpp
M offload/test/offloading/nested_parallel_reduction.c
Log Message:
-----------
[offload][lit] Fix failing/hanging/XPASSing tests on Intel GPU (#222342)
The buildbot was down for a few days due to changes that broke it and we
saw some required changes come up during that time. With this PR merged
we can reenable the buildbot as everything consistently passes.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 27d26292f819e2215c1421a41ac19d4b59a2adf2
https://github.com/llvm/llvm-project/commit/27d26292f819e2215c1421a41ac19d4b59a2adf2
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
Log Message:
-----------
Fix Bazel build for 176ab01 (#222963)
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=176ab0177fb9acf749b90634cae84936fcfac2c5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: c83c8de32a9790f313f1017db2c6d5902341b411
https://github.com/llvm/llvm-project/commit/c83c8de32a9790f313f1017db2c6d5902341b411
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb][Windows] Make RM_RF actually delete files (#222950)
On Windows `RM_RF` was `rd /s /q`, which only removes directories — so
any `$(call RM_RF,...)` naming files silently did nothing, and `|| (exit
0)` hid it. POSIX gets `rm -rf`, which removes both.
`clean::` recipes pass file globs and usually run before the build
(`all: clean ...`), so stale artifacts survived into the next run. Hits
upstream `functionalities/disassembler-variables` too.
Fix adds `del /f /q`, joined with `&` not `&&` so `rd` still runs when
the glob matched no files.
This is a follow up to 7d42028e806ab2b17af22ddb8417432e4781d4aa
Commit: 7591f9a5d59eb11293d503fcf01345b10d40eaa7
https://github.com/llvm/llvm-project/commit/7591f9a5d59eb11293d503fcf01345b10d40eaa7
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[NFC][LICM] Hoist `isPotentiallyPromotable` to reusable function (#222684)
Commit: 5d4d6b1692fa21af823c1a8ed00b9dfe4a306964
https://github.com/llvm/llvm-project/commit/5d4d6b1692fa21af823c1a8ed00b9dfe4a306964
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
Log Message:
-----------
[NFC][LICM] Pre-commit tests for loop-invariant store AA (#222685)
Commit: 68f9d9c076d18a2def73035bee18fe9ed6b3d222
https://github.com/llvm/llvm-project/commit/68f9d9c076d18a2def73035bee18fe9ed6b3d222
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
Log Message:
-----------
[LICM] Do not strip invariant AA tags (#222686)
This patch refines #218031 by keeping AA tags of promotable stores when
they are valid for aliasing checks, as determined by ensuring that all
exiting blocks are dominated by a store to the same location, with the
same AA tags.
Commit: a0ad24fcdca9722bdd6bb5770eb5986d15e2e9c1
https://github.com/llvm/llvm-project/commit/a0ad24fcdca9722bdd6bb5770eb5986d15e2e9c1
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-access-chain.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dead-alloca.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-unsupported.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-xderef.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-int-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-line-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-module-scope-variable.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-null-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-poison-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-skip-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-bit-piece.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-cache.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-operation-cache.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-operations.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-out-of-range.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-constant-value.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-init-expr.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugDeclare, DebugExpression and DebugOperation (#222011)
Add support for
[DebugDeclare](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugDeclare),
[DebugExpression](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugExpression)
and
[DebugOperation](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugOperation).
Changes:
- Emit DebugDeclare from an indirect DBG_VALUE whose location register
is defined by OpVariable, which is what the spec requires of the
Variable operand. LLVM IR `#dbg_declare` does not survive as its own
opcode in MIR, `IRTranslator` [lowers
it](https://github.com/llvm/llvm-project/blob/06d0711313b763b65c7e4a9e8613893d7760b6f6/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp#L4592-L4596)
to an indirect DBG_VALUE.
- DebugDeclare has a `Indexes` operand that didn't find necessary to
implement. The SPIRV-LLVM Translator has no support for it either in
both modes (ir <-> spv).
- The following cases are unhandled to avoid emitting invalid code (see
below comment about spirv-val):
- an access chain into a field
([debug-declare-access-chain.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-access-chain.ll))
- an OpFunctionParameter for a byval argument
([debug-declare-function-parameter.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll))
- a constant address
([debug-declare-int-storage.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-int-storage.ll))
- a register left without a def after dead storage was erased
([debug-declare-dead-alloca.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dead-alloca.ll))
- a variadic #dbg_value
([debug-declare-dbg-value-variadic.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll))
- an expression using an unmapped operation
([debug-declare-expression-unsupported.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-unsupported.ll))
- a variable whose DebugLocalVariable was not emitted
([debug-declare-skip-type.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-skip-type.ll))
- Collect expressions from MIR, so DebugExpression and DebugOperation
are emitted at module scope and shared by every declare using the same
DIExpression.
- Map the nine operations the instruction set defines, and reject an
expression whole when an argument does not fit in 32 bits (as per spec).
- Cache DebugLocalVariable result ids, which emitDebugLocalVariable
already returned but nothing stored.
- Add tests for each emitted and skipped case, for the interaction with
DebugLine and DebugScope, and for the expression operations.
spirv-val and the spec disagree in two places, in opposite directions:
- DebugDeclare's Variable operand: spirv-val accepts an
OpFunctionParameter, while the spec names only OpVariable. This patch
follows the spec, so the byval case is skipped even though spirv-val
would take it, see
[debug-declare-function-parameter.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll).
- DebugGlobalVariable's Variable operand: spirv-val rejects a
DebugExpression there although the spec permits one,
KhronosGroup/SPIRV-Tools#6469, see
[debug-global-variable-constant-value.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-constant-value.ll).
Commit: a969579a9129891bccb63fcc69e76d74b299f322
https://github.com/llvm/llvm-project/commit/a969579a9129891bccb63fcc69e76d74b299f322
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/kdivi.cpp
A libc/src/stdfix/kdivi.h
A libc/src/stdfix/lkdivi.cpp
A libc/src/stdfix/lkdivi.h
A libc/src/stdfix/lrdivi.cpp
A libc/src/stdfix/lrdivi.h
M libc/src/stdfix/rdivi.cpp
M libc/src/stdfix/rdivi.h
A libc/src/stdfix/ukdivi.cpp
A libc/src/stdfix/ukdivi.h
A libc/src/stdfix/ulkdivi.cpp
A libc/src/stdfix/ulkdivi.h
A libc/src/stdfix/ulrdivi.cpp
A libc/src/stdfix/ulrdivi.h
A libc/src/stdfix/urdivi.cpp
A libc/src/stdfix/urdivi.h
M libc/test/src/stdfix/CMakeLists.txt
R libc/test/src/stdfix/DivITest.h
A libc/test/src/stdfix/FxDiviTest.h
A libc/test/src/stdfix/kdivi_test.cpp
A libc/test/src/stdfix/lkdivi_test.cpp
A libc/test/src/stdfix/lrdivi_test.cpp
M libc/test/src/stdfix/rdivi_test.cpp
A libc/test/src/stdfix/ukdivi_test.cpp
A libc/test/src/stdfix/ulkdivi_test.cpp
A libc/test/src/stdfix/ulrdivi_test.cpp
A libc/test/src/stdfix/urdivi_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point fxdivi functions in llvm-libc (#210020)
This PR implements the following 8 functions along with unit tests.
```cpp
fract rdivi(int, int);
long fract lrdivi(long int, long int);
accum kdivi(int, int);
long accum lkdivi(long int, long int);
unsigned fract urdivi(unsigned int, unsigned int);
unsigned long fract ulrdivi(unsigned long int, unsigned long int);
unsigned accum ukdivi(unsigned int, unsigned int);
unsigned long accum ulkdivi(unsigned long int, unsigned long int);
```
Fixes #129126.
Commit: e403b76a16bd8dd7bd4e776b119afae9fa56f803
https://github.com/llvm/llvm-project/commit/e403b76a16bd8dd7bd4e776b119afae9fa56f803
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/stackTrace/Makefile
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
A lldb/test/API/tools/lldb-dap/stackTrace/other.c
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_Types.py
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/unittests/DAP/ProtocolRequestsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Report the compile unit of a stack frame (#222512)
Add StackFrame.compileUnitId, an id that names the frame's compile unit
within the module already reported as StackFrame.moduleId. Clients
resolve it through the compileUnits request, which now reports the same
id on each CompileUnit and takes an optional compileUnitIds filter to
ask for individual compile units instead of the module's full list.
CompileUnitsRequestHandler declared its arguments optional but
dereferenced them unconditionally, so a compileUnits request carrying no
arguments crashed the adapter. Drop the optional and let the request
framework reject the request instead.
Commit: 67d857636c0e9e847f5c777f026908fbf52d9a04
https://github.com/llvm/llvm-project/commit/67d857636c0e9e847f5c777f026908fbf52d9a04
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Init BE vars to CouldNotCompute in howManyLT (NFC) (#222892)
This avoids the risk of initializing ExitLimit with nullptr BE
variables, and cast-asserts on nullptr. This makes the null-BE check
unnecessary, and it can be handled by the common code that follows.
Commit: 06a2917904110ac4cd5ecaab59355ee8bbf54501
https://github.com/llvm/llvm-project/commit/06a2917904110ac4cd5ecaab59355ee8bbf54501
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getscope.cpp
A libc/src/pthread/pthread_attr_getscope.h
A libc/src/pthread/pthread_attr_setscope.cpp
A libc/src/pthread/pthread_attr_setscope.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etscope (#222956)
This patch implements pthread_attr_getscope and pthread_attr_setscope.
Same as other libraries, we only support the system contention scope
(PTHREAD_SCOPE_SYSTEM). Process contention scope (PTHREAD_SCOPE_PROCESS)
is not supported, and would basically require a userspace N:M threading
implementation. Since this value cannot be checked in the kernel, I
reject it directly during the attribute set operation, and don't even
bother storing it in the attribute object.
Assisted-by: Gemini
Commit: d031c595935b6a697e94b55fddbf59261733eb16
https://github.com/llvm/llvm-project/commit/d031c595935b6a697e94b55fddbf59261733eb16
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb][debugserver][NFC] Share the expedited-memory type and emitters (#222911)
Expedited memory had two representations:
- The frame pointer backchain used `StackMemory`, a fixed
`uint8_t[2 * sizeof(nub_addr_t)]` plus a length, held in a `std::map`
keyed
by frame address.
- Frame 0's window used `ExpeditedMemory`, which owns a
`std::vector<uint8_t>`.
Three call sites then open-coded the same emit loop, twice into a JSON
array
and once into a stop reply.
Keep `ExpeditedMemory` for both and emit through
`AppendExpeditedMemoryToJSON`
and `AppendExpeditedMemoryToStopReply`. `ReadFrameZeroStackMemory`'s
local
`read_range` lambda becomes `AppendExpeditedMemory`. `ReadStackMemory`
keeps
its own read, because it needs the bytes to continue the walk.
`ReadStackMemory` gains an explicit `visited` set. It previously relied
on its
`std::map` to stop a corrupt frame pointer chain that loops back on
itself, by
testing whether the key was already present. A `std::vector` has no such
test,
so the guard becomes explicit. This keeps the existing behavior rather
than
changing it.
Chunk count and chunk sizes are unchanged. Backchain chunks now go out
in
frame-walk order rather than ascending frame address; the bytes for a
given
address are the same either way, so the cache the client builds is
unchanged.
This prepares for expediting the another memory read range, which have
arbitrary address and length. `StackMemory`'s fixed buffer cannot hold a
range
of a few hundred bytes, and appending and emitting one costs three lines
with
these functions in place rather than a fourth copy of the emit loop.
Assited-by: claude
Commit: cc511140cf7437110de89e779e8328ad565aa2f1
https://github.com/llvm/llvm-project/commit/cc511140cf7437110de89e779e8328ad565aa2f1
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/QualTypeMapper.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-atomic.c
A clang/test/CodeGen/X86/x86_64-atomic-abi.c
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/lib/ABI/TargetInfo.cpp
M llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/unittests/ABI/X86TargetInfoTest.cpp
Log Message:
-----------
[LLVMABI] Handle Atomic types in the LLVM ABI library (#221367)
The LLVM ABI library's type system had no way to represent atomic types,
so Clang's QualTypeMapper was just mapping them directly to the
underlying value type. This resulted in mis-classification of some
function signatures involving atomic types.
This change adds AtomicType to the ABI type system and QualTypeMapper.
The actual classification didn't require any updates. Simply having the
atomic type as a distinct type was sufficient for it to produce the
expected results.
Assisted-by: Cursor / various models
Commit: 9ae81d242e2e77c8b7dc50cbd4769e9edf84b59b
https://github.com/llvm/llvm-project/commit/9ae81d242e2e77c8b7dc50cbd4769e9edf84b59b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
Log Message:
-----------
ARM: Constify Thumb2SizeReduction (#222973)
Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 3b5f12df5d6b0eba63be43bdfdb34af5fde20c6e
https://github.com/llvm/llvm-project/commit/3b5f12df5d6b0eba63be43bdfdb34af5fde20c6e
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Update full state of scheduler when IR changes (#222180)
Up until now the scheduler state has not been maintained fully upon IR
changes.
This is not really needed for correct operation of the current
vectorizer because scheduling happens before emitting the vectorized IR,
so there is no real need for updating the scheduler with the current
implementation. Nevertheless, the implementation may change so the right
thing to do is to make sure the scheduler's state is always correct.
So this patch implements the missing callbacks for erase, move and set
use and updates the scheduler state accordingly.
Commit: 4e72f2cb637eaf16e1b6f506c36f036f2f865c9c
https://github.com/llvm/llvm-project/commit/4e72f2cb637eaf16e1b6f506c36f036f2f865c9c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/unittests/CodeGen/SelectionDAGTestBase.h
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
M llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
M llvm/unittests/Target/X86/X86SelectionDAGTest.cpp
Log Message:
-----------
[SelectionDAG] Remove dead accessors, variables, and init parameters (NFC) (#222864)
This patch removes several dead accessors in SelectionDAG. It also
adjusts init() and its callers to remove transitively dead variables
and parameters.
SDAGISelPass / getPass:
The last use of SelectionDAG::getPass was removed on February 23, 2026
in commit 9e6a6be8a84f32072e40b27e146fa9076560274e.
RuntimeLibcallInfo / getRuntimeLibcallInfo:
Introduced on January 16, 2026 in commit
01e6245af481dac4604e8a25be6bec0dbe36f99d without any callers, and never
initialized or assigned anywhere.
ORE / getORE:
Introduced on March 30, 2017 in commit
6dd6082472d11b1e1af21e4e4e0789e49de56537 without any callers
for getORE in or out of tree.
MMI / getMMI:
The last use of SelectionDAG::getMMI was removed on July 26, 2024 in
commit 6f83a031e452bb33c0ee23b8c5c4dee97ce2bf52.
Assisted-by: Antigravity
Commit: 1b8f1a297004d99e7f9ad7188b8529153c693b3b
https://github.com/llvm/llvm-project/commit/1b8f1a297004d99e7f9ad7188b8529153c693b3b
Author: Andre Sun <andsun9999 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/index/YAMLSerialization.cpp
M clang-tools-extra/clangd/unittests/SerializationTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
Log Message:
-----------
[clangd] Add missing SymbolKind cases to YAML serialization (#222070)
The YAML index writer maps index::SymbolKind to strings through a list
of enumCase calls that was not updated when Concept, IncludeDirective,
and the template parameter kinds were added to the enum. Writing a
symbol with one of these kinds matches no case, so nothing is emitted
for the value and the next key lands on the same line, producing Kind:
Lang: C. With assertions enabled, the writer aborts rather than emitting
malformed YAML. This affects clangd-indexer --format=yaml when indexing
C++20 concepts.
Add the missing cases so the list mirrors the enum, drop the duplicate
Function entry, and add a test that round-trips every current SymbolKind
through YAML. The binary index format stores the kind as a raw byte and
is unaffected.
Fixes #206875
Commit: 445028c28190b9c883c08cb2ef69e002b65e5af9
https://github.com/llvm/llvm-project/commit/445028c28190b9c883c08cb2ef69e002b65e5af9
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Refactor instantiation of declarations within concepts (#221707)
After implementation of CWG2369, declarations are instantiated on demand
when evaluating a concept.
This was hinged on TemplateInstantiator, where we intercepted most calls
that need an instantiated declaration. This is almost identity to
SetupConstraintScope, which tries to re-instantiate any declarations to
the current scope. This patch removes SetupConstraintScope because we
can instantiate anything on demand.
The concept normalization patch brings us more troubles when we have to
deal with sugars: declarations instantiated outside of the scope (e.g. a
typedef declaration) are never added/instantiated during instantiation
of concepts: this patch makes that function also look up outer scopes
for those declarations. Note that we couldn't simply make the scope of
concepts 'transparent', since we don't want clashes of instantiated
function parameters.
Also also this added a call to instantiateMissingDeclsToScopeForConcepts
for C++26 fold expressions, before checking any pack sizes.
Fixes https://github.com/llvm/llvm-project/issues/198052
Fixes https://github.com/llvm/llvm-project/issues/209632
Commit: 2bb1a24978caa46b5d6105f4527be85a10449940
https://github.com/llvm/llvm-project/commit/2bb1a24978caa46b5d6105f4527be85a10449940
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
Rename my office hours; NFC (#222982)
Other Clang maintainers routinely come to my office hours to help field
questions, so instead of claiming these are my office hours, I'm turning
them into a more general "Clang Maintainers" office hours. I will
continue to chair them as usual, but this is a more accurate way of
describing the office hours and will hopefully encourage other Clang
maintainers to attend periodically if they have time and interest in
doing so.
Commit: 325f2558aea72388cfa3762a8efa184eba7dd3da
https://github.com/llvm/llvm-project/commit/325f2558aea72388cfa3762a8efa184eba7dd3da
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
A flang/test/Fir/OpenACC/support-analysis-varname.mlir
M flang/test/lib/OpenACC/CMakeLists.txt
A flang/test/lib/OpenACC/TestOpenACCSupport.cpp
M flang/tools/fir-opt/fir-opt.cpp
M mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
M mlir/lib/Dialect/OpenACC/Analysis/OpenACCSupport.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
M mlir/test/Dialect/OpenACC/support-analysis-varname.mlir
Log Message:
-----------
[flang][acc] Let getVariableName choose mangled or source names (#222815)
OpenACCSupport can now ask for the name the source spells or the name
the variable is emitted under. Recover names from acc.map_info and
globals, and teach Flang to demangle FIR symbols while still walking the
referenced variable for a mangled data-clause name.
Commit: 177eb76979760d4c3920dc7fa7b2976db545040b
https://github.com/llvm/llvm-project/commit/177eb76979760d4c3920dc7fa7b2976db545040b
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[NFC][Attributor] Drop the comment on the indirect-call address space cast (#222139)
Follow-up to #222097, which merged before this was addressed.
@efriedma-quic pointed out that the comment described the change rather
than the
code, and that address space zero is not relevant to the fixed code.
Removing
it; `getProgramAddressSpace()` and the cast say what is happening.
Commit: 565107727b351606963adc3f7732eaae37a0bbdb
https://github.com/llvm/llvm-project/commit/565107727b351606963adc3f7732eaae37a0bbdb
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
Log Message:
-----------
[CIR][NFC] Fix VectorElementType constraints (#222736)
Remove `CIR_AnyPtrType` from the supported types in VectorElementType
constraints
Commit: 9c809473e1a2c39b3b78e8c155e85d58f302bd79
https://github.com/llvm/llvm-project/commit/9c809473e1a2c39b3b78e8c155e85d58f302bd79
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/symstore/TestSymStore.py
Log Message:
-----------
[lldb] Add test variants to build directory name (#222792)
Fix testing with shared build directories to no longer share build
directories between build variants.
For example, use a different build directory for dwarf and dsym
variants, to prevent one variant's build artifacts from being used by
the other.
Assisted-by: claude
Commit: 10c6f34d268cc7af5a160465604dcd40a68d71e1
https://github.com/llvm/llvm-project/commit/10c6f34d268cc7af5a160465604dcd40a68d71e1
Author: Kristina Bessonova <kbessonova at accesssoftek.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
Log Message:
-----------
Revert "[AArch64][GlobalISel] Add support for TLS for ELF" (#222989)
Reverts llvm/llvm-project#220236
It seems to break scudo tests.
Commit: 0f47e798205bbaa84d12073c56d5d8c07ea65f59
https://github.com/llvm/llvm-project/commit/0f47e798205bbaa84d12073c56d5d8c07ea65f59
Author: Iasonas Karaprodromidis <iaskarapro at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.cpp
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.h
Log Message:
-----------
[lldb][Fortran] Added DWARFASTParser for Fortran (#218024)
This PR adds the DWARFASTParserFortran class returning nullptr. This is
intended to add the necessary classes for subsequent PRs to add
features.
Changes:
- Adds DWARFASTParserFortran class.
Part of the Add Fortran support to LLDB GSoC 2026 project.
Relates to #109119.
Commit: 4214b4601f498387214d5aa4ca4898fd88c28da6
https://github.com/llvm/llvm-project/commit/4214b4601f498387214d5aa4ca4898fd88c28da6
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/DirectX/SemanticSignatures.md
A llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/lib/Frontend/HLSL/CMakeLists.txt
A llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticSignaturePackingTest.cpp
Log Message:
-----------
[HLSLSemanticSignatures] Implement the stacked packing of elements (#218060)
This change defines a testing harness for the packing algorithms of
semantic signatures.
Then implements the stacked packing algorithm.
Resolves: https://github.com/llvm/llvm-project/issues/205875
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 6c68a1661af7dce1f121fd20dfce72f4ddc4afc9
https://github.com/llvm/llvm-project/commit/6c68a1661af7dce1f121fd20dfce72f4ddc4afc9
Author: Adam Scott <adamscott200322 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/X86/div-rem-i64.ll
A llvm/test/Analysis/CostModel/X86/div-rem-strictfp.ll
M llvm/test/Analysis/CostModel/X86/div.ll
A llvm/test/Analysis/CostModel/X86/masked-divrem.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/size-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-nodes-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-split-non-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[CostModel][X86] Add variable divisor div/rem costs for scalar and <=i32 vectors (#215124)
Div and rem by a variable divisor have no X86 cost entry at all, so they
fall through to the BasicTTI default and cost 1. A 20 to 40 cycle
unpipelined instruction ends up priced the same as an add.
That mattered less while vector integer division always scalarized,
since the price was wrong but the decision was usually right anyway.
After #205263 the <=i32 shapes lower through a float divide, so the
vector cost model is now describing a sequence that really exists and it
still prices it as scalarization.
This adds scalar entries plus five feature gated vector tables.
Numbers are the maximum llvm-mca Block RThroughput across the CPUs that
fold the shape with the low power lines excluded (atom and jaguar).
Vector entries take the max within the tier a CPU's feature level
selects, since the lookup takes the first matching table. Scalar takes
it across all of them.
rem is priced the same as div because a variable rem is the same
instruction and the hardware hands back the remainder in rdx or AH. For
vector the fold pays a multiply and subtract to recover it but the
divide dominates the throughput so the number doesnt change.
div-rem-strictfp.ll is new and pins the strictfp gate. Two SLP tests run
on forced negative thresholds and needed those raised so both produce
output identical to before at the new value.
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: a930601b854d881876a1b953f05f8632ade87304
https://github.com/llvm/llvm-project/commit/a930601b854d881876a1b953f05f8632ade87304
Author: Gauarv Chaudhary <137998824+ANAMASGARD at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
A llvm/test/CodeGen/WebAssembly/simd-relaxed-fptoint.ll
Log Message:
-----------
[WebAssembly] Select relaxed_trunc for vector fptosi/fptoui with +relaxed-simd (#214148)
Fixes #211273
When `+relaxed-simd` is enabled, plain vector `fptosi`/`fptoui` from `<4
x float>` to `<4 x i32>` is still lowered to
`i32x4.trunc_sat_f32x4_{s,u}`. The relaxed SIMD instructions already
exist in the backend, but they were only wired to the
WebAssembly-specific `llvm.wasm.relaxed.trunc.*` intrinsics—not to
generic `fptosi`/`fptoui` IR.
This matters for frontends like LDC that emit ordinary `fptosi` for SIMD
casts (e.g. `_mm_cvttps_epi32`-style code). With
`+simd128,+relaxed-simd`, we should prefer
`i32x4.relaxed_trunc_f32x4_{s,u}`, which typically lowers more
efficiently
on native SIMD hardware.
The fix adds two TableGen selection patterns in
`WebAssemblyInstrSIMD.td`, gated on `HasRelaxedSIMD` with
`AddedComplexity = 1`, so they win over the existing
`fp_to_sint`/`fp_to_uint` → `trunc_sat` patterns when relaxed SIMD is
available.
This does not require fast-math: for representable inputs, relaxed
truncation matches LLVM semantics; for NaN/out-of-range inputs,
`fptosi`/`fptoui` already produce poison, so the backend is not required
to preserve `trunc_sat`'s
saturating behavior.
Explicit saturating conversions (`llvm.fptosi.sat` / `fp_to_sint_sat`)
and `+simd128`-only targets are unchanged.
## Test plan
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-relaxed-fptoint.ll`
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-conversions.ll`
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll`
Signed-off-by: Gaurav Chaudhary <chaudharygaurav2004 at gmail.com>
Commit: 0a8a6c4d77ec8b103d2718f936724179246b9540
https://github.com/llvm/llvm-project/commit/0a8a6c4d77ec8b103d2718f936724179246b9540
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/lib/OpenACC/CMakeLists.txt
Log Message:
-----------
[flang][acc] Add missing dependencies for TestOpenACCSupport (#222996)
Adds missing dependencies to avoid:
undefined reference to `mlir::acc::getOrCreateGPUModule` undefined
reference to `mlir::acc::OpenACCSupport::getVariableName` after
https://github.com/llvm/llvm-project/pull/222815
Commit: 8a36fb2bfef788e6448af7791edd68fd3c0afc56
https://github.com/llvm/llvm-project/commit/8a36fb2bfef788e6448af7791edd68fd3c0afc56
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
Log Message:
-----------
[Bazel] Fixes 0f47e79 (#222999)
This fixes 0f47e798205bbaa84d12073c56d5d8c07ea65f59 (#218024).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=0f47e798205bbaa84d12073c56d5d8c07ea65f59
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5e77e2f8bc888b40753e5add3fa1bcf6e50d9b60
https://github.com/llvm/llvm-project/commit/5e77e2f8bc888b40753e5add3fa1bcf6e50d9b60
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmuladd-absorbed-copyable-sched-deps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/lcssa-phi-extract-scale.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/extractelement-insertpoint.ll
Log Message:
-----------
[SLP]Treat 2-element FP reductions as always associative
A reduction of exactly 2 elements is a single operation, so no
reassociation is possible and the associativity check is not needed.
Emit vector.reduce.fadd/fmul with the reassoc flag for such
reductions even when the scalar operation lacks it, instead of
2 extracts + scalar operation.
Reviewers: bababuck, MrSidims
Pull Request: https://github.com/llvm/llvm-project/pull/222715
Commit: 374a8320bf21962b6749965b97294e4815641cb6
https://github.com/llvm/llvm-project/commit/374a8320bf21962b6749965b97294e4815641cb6
Author: Leo Camus <leo.camus23 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/utils/cmake_format.py
M libc/utils/cmake_format_test.py
Log Message:
-----------
[libc] Write LF line endings from cmake_format.py on every platform (#222742)
I ran the libc CMake formatter on Windows and it gave back a file whose
every line had changed:
```
$ printf 'add_library(foo STATIC\n a.c\n)\n' > CMakeLists.txt
$ python libc/utils/cmake_format.py -i CMakeLists.txt
Formatted CMakeLists.txt
$ python -c "print(open('CMakeLists.txt','rb').read())"
b'add_library(foo STATIC\r\n a.c\r\n)\r\n'
```
`format_cmake_content()` joins its lines with `"\n"`, but
`process_file()` hands that string to `open(temp_file, "w",
encoding="utf-8")`, and a text-mode write substitutes the platform line
separator. So on Windows, reformatting one command in a file rewrites
the endings of the whole file. `.gitattributes` declares no `text`/`eol`
rules and `llvm/docs/GettingStarted.md` tells people to clone with
`core.autocrlf=false`, so nothing normalizes those endings back before
the commit.
The read side already normalizes: `open(..., "r")` gives universal
newlines, so a CRLF file is LF by the time the formatter sees it.
Passing `newline="\n"` on the write makes both ends agree and gives the
same bytes on every platform.
The same substitution applies to stdout, which affects the piped output
and the `--diff` text (a CRLF diff does not apply against an LF file),
so I configured stdout the same way in `main()`.
One behaviour change worth flagging: on Windows, a CMake file that
currently has CRLF endings and needs reformatting now comes out with LF
rather than CRLF. Files that are already formatted are not written at
all, before or after, since the comparison is made on the LF-normalized
read.
For the tests, everything in `cmake_format_test.py` today asserts on the
string returned by `format_cmake_content()`, so nothing covers what
lands on disk. I added two cases that compare the bytes on disk and on
stdout against that string. They fail on Windows before this change (the
assertion prints `b'...\r\n...' != b'...\n...'`) and pass after; on
Linux and macOS they pass either way, since the separator is already LF.
The file went from 47 to 49 tests, all passing under `python -m unittest
cmake_format_test`.
I did not have `black` available on that machine, so the added code
follows the surrounding style by hand rather than by running the
formatter.
AI tools used
Commit: ba1687b72476eb368641b9a9f565a38cf41b7393
https://github.com/llvm/llvm-project/commit/ba1687b72476eb368641b9a9f565a38cf41b7393
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBFile.h
M lldb/source/API/SBFile.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
Log Message:
-----------
[lldb][Windows] Remove use of unstable ABI and fix SB API visibility (#222665)
Addresses the post-commit review comments from the original PR
(https://github.com/llvm/llvm-project/pull/217126#pullrequestreview-5162589053).
- `SBFile::OpenFdFromHandle` is now visible on all platforms (just
`#ifndef SWIG`) and returns -1 by default.
- Removed non-stable `PyLong_Check` in favor of `PyErr_Occurred` and
`PyErr_Clear`.
Commit: 93b2629d1d1f52e90549e6e12901c3f51ceba273
https://github.com/llvm/llvm-project/commit/93b2629d1d1f52e90549e6e12901c3f51ceba273
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/AST/ast-dump-expr-json.c
M clang/test/C/C11/n1285_1.c
M clang/test/CodeGen/attr-counted-by-with-sanitizers.c
M clang/test/CodeGen/attr-counted-by-without-sanitizers.c
A clang/test/CodeGen/compound-literal-lifetime.c
M clang/test/CodeGenObjC/arc-ternary-op.m
M clang/test/Sema/scope-check.c
Log Message:
-----------
[clang][CodeGen] Emit lifetime markers for block-scoped compound literals in C (#219045)
In C (C99/C11/C23 §6.2.4.5), block-scoped compound literals have
automatic storage duration extending to the end of the enclosing block
scope. Previously, Clang emitted alloca storage without lifetime
markers (@llvm.lifetime.start / @llvm.lifetime.end), preventing LLVM's
StackColoring pass from merging stack slots across disjoint scopes and
inflating stack frame size.
Following John McCall's guidance in #68746:
1. In Sema, record block-scoped compound literals in ExprCleanupObjects
so
the enclosing full-expression is wrapped in an ExprWithCleanups.
2. In CodeGen, emit @llvm.lifetime.start before evaluating initializers
and
schedule CallLifetimeEnd as a cleanup.
Checking a build of an x86_64 Linux kernel defconfig build, this shaves
448 bytes off the stack usage for azx_probe(), one of the larger stack
users in the kernel.
Assisted-by: Gemini
Fixes: https://github.com/llvm/llvm-project/issues/68746
Commit: cb029994abbda52adf1986df5c6198c3e1fff4da
https://github.com/llvm/llvm-project/commit/cb029994abbda52adf1986df5c6198c3e1fff4da
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/fma-reassociate-pairs.ll
M llvm/test/Transforms/SLPVectorizer/X86/fma-operand-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassociated-fma-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/revectorized_rdx_crash.ll
Log Message:
-----------
[SLP]Allow min-VF vectorization of seed-level reduction groups
Small reduced-value groups of single-use seed-level reductions may
vectorize at VF=2, if the values are used by the reduction operations
only and no scalar leftovers remain. For fadd this replaces the
ordered reduction fallback; for the other kinds trunk leaves such
groups scalar.
Reviewers: RKSimon, bababuck, MrSidims
Pull Request: https://github.com/llvm/llvm-project/pull/222757
Commit: 4e3bec11527cdbca2e79909f7a5badd12db191a7
https://github.com/llvm/llvm-project/commit/4e3bec11527cdbca2e79909f7a5badd12db191a7
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
Log Message:
-----------
[SPIRV] Refactor implicit binding legalization (#222848)
This change rewrites the `SPIRVLegalizeImplicitBinding` pass so that
binding collection is driven by intrinsic declarations rather than a
full-module instruction walk.
Previously, the pass used an `InstVisitor` to visit every instruction in
the module and find calls to a small set of intrinsics. The new
implementation iterates over the intrinsic declarations and their users,
making the cost proportional to the number of relevant resource calls
rather than the size of the module.
There is no change to the SPIR-V emitted for existing shaders. Implicit
bindings are still assigned the same numbers.
Other improvements include:
- Order IDs are extracted once into a `SmallVector` instead of being
recomputed on each sort comparisons.
- The separate `verifyUniqueOrderIdPerResource` walk is folded into the
binding assignment loop.
- Make helpers that replace implicit binding calls static.
- Added a `HasImplicitBinding` flag for early exit and accurate
`Changed` reporting, so a module with no implicit bindings (or with a
declaration that has no users) now returns `PreservedAnalyses::all()`
instead of unconditionally invalidating analyses.
Assisted by Claude Opus 5.
This is a second attempt to land this - I accidentally merged the first
one into a stack branch:
https://github.com/llvm/llvm-project/pull/221662
Commit: 8ad4ac7d28c618d8a35229c480fc8ea912dea1ec
https://github.com/llvm/llvm-project/commit/8ad4ac7d28c618d8a35229c480fc8ea912dea1ec
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/startup/linux/startup_rules.bzl
A utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add targets for startup objects on linux (#218995)
This PR adds Bazel targets for `crt{1,i,n}.o` startup objects on Linux
x86-64.
Commit: 800e7f8f308196b27cec5880789a1519e0bee70a
https://github.com/llvm/llvm-project/commit/800e7f8f308196b27cec5880789a1519e0bee70a
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
Log Message:
-----------
[clangd] Offer Extract to Function for single expression-statements (#219945)
The tweak refused to trigger whenever the extraction zone contained a
single statement that was an expression, e.g. a lone call like
`log("connection failed");` or an overloaded-operator statement like
`std::cout << "x";`. The former was blocked by an overly broad check in
validSingleChild(); the latter additionally required
getParentOfRootStmts() to recognize that such a statement can be its own
root statement even while marked Unselected, rather than being treated
as a container of root statements.
Fixes clangd/clangd#698
Fixes clangd/clangd#1254
Assisted-by: Claude
Commit: 83d02acbcde4c84e448a4b1d52878b7bcf8ecf6f
https://github.com/llvm/llvm-project/commit/83d02acbcde4c84e448a4b1d52878b7bcf8ecf6f
Author: Dennis Duda <git at seri.tools>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/RISCV/fadd-fmul-dagcombine.ll
Log Message:
-----------
[DAGCombine] Do not gate a pre-legalization FADD fold on FMUL legality (#218748)
Now follows the same check as `fold (fadd A, (fneg B)) -> (fsub A, B)`
and `fold (fadd (fneg A), B) -> (fsub B, A)` a few lines above
Co-authored-by: Claude (Claude-Opus-5) <noreply at anthropic.com>
Commit: 18db3eee9d04da389180f907bfb1bf84bb589abd
https://github.com/llvm/llvm-project/commit/18db3eee9d04da389180f907bfb1bf84bb589abd
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/src/__support/printf_core/CMakeLists.txt
M libc/src/__support/printf_core/core_structs.h
M libc/src/__support/printf_core/parser.h
M libc/src/__support/printf_core/printf_main.h
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/UnitTest/StringUtils.h
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/parser_test.cpp
Log Message:
-----------
[libc] Template printf_core::Parser to support wchar_t. (#222988)
This is the next step in the ongoing refactor to support wide character
printf functions.
`printf_core::FormatSection` is also templated on character type as it
is required for parser_test. `FormatSection` is named in many more
places. In order to keep this PR on the smaller side, it also gets a
rename + `char` alias in the pattern of `basic_string_view` /
`string_view`.
Assisted-by: Automated tooling, human reviewed.
Commit: 241e034bcc466e368d5f61fe1836598390c58e69
https://github.com/llvm/llvm-project/commit/241e034bcc466e368d5f61fe1836598390c58e69
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/lib/Headers/altivec.h
M clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
A clang/test/SemaCXX/altivec-vec-msum-p9.cpp
Log Message:
-----------
[PowerPC] Add missing vec_msum and vec_vmsumudm builtins for POWER9 (#221199)
This patch exposes `__builtin_altivec_vmsumudm` in `BuiltinsPPC.def` and
adds the missing `vec_msum` and `vec_vmsumudm` intrinsics in
`<altivec.h>` matching GCC 11+ behavior.
Commit: abf41391777c822d4f5010b1f38d5a0f09102ea1
https://github.com/llvm/llvm-project/commit/abf41391777c822d4f5010b1f38d5a0f09102ea1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/AArch64/combine_ignore_debug.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/RISCV/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/RISCV/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Use DL.fitsInLegalInteger instead of TTI.isTypeLegal in consecutive load/store combine. (#220310)
riscv64 doesn't have a legal i32 type in the backend, but we
support i16, and i32 loads/stores. AArch64 also supports i16
loads/stores even though i16 isn't legal.
Replace TTI.isTypeLegal with DL.fitsInLegalInteger and a check for
a power of 2 number of bytes. This covers i16 and i32 for RISC-V
and i16 for AArch64.
We could further relax this to cover types that the backend can handle
by splitting, but I'd like to leave that for a future patch.
I had to update some existing tests to have more accurate datalayouts.
The RISC-V tests are reduced from existing tests from AArch64 or X86 to
show some of the load sizes that can now be matched.
Commit: 40de2ac09e4083b773c7fc4f9c701a864baad6be
https://github.com/llvm/llvm-project/commit/40de2ac09e4083b773c7fc4f9c701a864baad6be
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 18db3ee (#223009)
This fixes 18db3eee9d04da389180f907bfb1bf84bb589abd (#222988).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=18db3eee9d04da389180f907bfb1bf84bb589abd
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 318e5ab66c1496784eb16ed1af193a58c75efd59
https://github.com/llvm/llvm-project/commit/318e5ab66c1496784eb16ed1af193a58c75efd59
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-gfx11.mir
Log Message:
-----------
[AMDGPU] Do not commute DPP instructions with a non-identity dpp_ctrl (#218393)
DPP only swizzles src0, and that does not move with the operands, so
commuting changes which value each lane actually reads
Commit: dc7e9b16f229adbad90bafe1bd5685794ffb4710
https://github.com/llvm/llvm-project/commit/dc7e9b16f229adbad90bafe1bd5685794ffb4710
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/release.h
M compiler-rt/lib/scudo/standalone/tests/release_test.cpp
Log Message:
-----------
[scudo] Refactor BufferPool code slightly. (#222811)
Pass the Buffer object in buffer creation functions. Add an error
message if the dynamic buffer creation fails.
Add a threaded unit test to verify the BufferPool handles concurrent
buffer creation properly.
Also, fix a few typos in the code.
Commit: 57ad7898dc17e228c3ce1d34a53626080131f384
https://github.com/llvm/llvm-project/commit/57ad7898dc17e228c3ce1d34a53626080131f384
Author: Kiva <zengtao at iscas.ac.cn>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-load-common-alignment.ll
Log Message:
-----------
[RISCV][SLP] Use common alignment when checking constant-stride loads (#222520)
Fix SLP's constant-stride load legality check, which can widen naturally
aligned 32-bit loads into misaligned 64-bit RVV accesses and cause
`SIGBUS`.
In `BoUpSLP::canVectorizeLoads`, the check uses the first sorted load's
alignment, which may be stronger than that of later widened groups. Pass
`CommonAlignment` to `analyzeConstantStrideCandidate` instead, matching
the existing cost model and code generation. This is conservative: it
fixes the legality check without deriving a more precise alignment for
each widened group's starting address, so it may reject some otherwise
legal widening.
### Reproducer
The following reproduces the failure on the tested [SpacemiT K1 / Banana
Pi F3](https://docs.banana-pi.org/en/BPI-F3/BananaPi_BPI-F3) running
RV64 Linux, compiled with `-O3 -march=rv64gcv -mabi=lp64d
-mstrict-align`:
```c
struct Row {
unsigned x, y, padding[5];
};
_Static_assert(sizeof(unsigned) == 4, "requires 32-bit unsigned");
_Static_assert(sizeof(struct Row) == 28, "requires a 28-byte row");
__attribute__((noinline))
void gather_fields(const struct Row *p, unsigned *restrict out) {
p = __builtin_assume_aligned(p, 16);
out[0] = p[0].x + 3;
out[1] = p[0].y + 3;
out[2] = p[1].x + 3;
out[3] = p[1].y + 3;
}
int main(void) {
_Alignas(16) struct Row rows[2] = {
{5, 9, {0}}, {11, 17, {0}}};
unsigned out[4];
gather_fields(rows, out);
return out[0] != 8 || out[1] != 12 ||
out[2] != 14 || out[3] != 20;
}
```
The alignment assumption is satisfied, and the four loads at byte
offsets `0`, `4`, `28`, and `32` are naturally aligned and in bounds.
SLP widens the adjacent pairs into:
```llvm
%v = call <2 x i64> @llvm.experimental.vp.strided.load.v2i64.p0.i64(
ptr align 4 %p, i64 28, <2 x i1> splat (i1 true), i32 2)
```
On RV64 this lowers to:
```asm
li a2, 28
vsetivli zero, 2, e64, m1, ta, ma
vlse64.v v8, (a0), a2
```
whose second active lane accesses `base + 28`, which is not eight-byte
aligned. The legality check incorrectly uses alignment 16, although the
emitted intrinsic already carries `align 4`.
On the tested machine, the example raises `SIGBUS` before the fix and
returns zero afterward. The fixed compiler uses 32-bit vector loads and
retains vectorized arithmetic.
Commit: 78ae84025be3bc2e711e803b79b8515075c97a80
https://github.com/llvm/llvm-project/commit/78ae84025be3bc2e711e803b79b8515075c97a80
Author: Ambrose Leeb <aleeb at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Headers/__clang_hip_runtime_wrapper.h
A clang/test/CodeGenCUDA/pure_deleted_virtual.cu
M clang/test/Headers/hip-header.hip
M clang/test/OpenMP/nvptx_target_pure_deleted_codegen.cpp
Log Message:
-----------
[Clang] [CUDA] Provide device-side definitions of `__cxa_[pure|deleted]_virtual()` (#217427)
Currently, we don't provide definitions of these on the device side, and
since there is also no C++ runtime on the device side, if a call to a
pure or deleted virtual function makes it into the final IR, the program
will fail to assemble because `ptxas` can’t find a definition of
`__cxa_pure_virtual()` or `__cxa_deleted_virtual()`.
This patch updates Clang to emit weak definitions of these functions
that trap.
Fixes #49183, fixes #67533.
Commit: f47e8e7f5e028c0e441caa2973e5971817927a05
https://github.com/llvm/llvm-project/commit/f47e8e7f5e028c0e441caa2973e5971817927a05
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/test/CIR/CodeGen/array-ctor.cpp
R clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byref.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-vptr.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
M clang/test/CIR/CodeGen/lambda-dtor-field.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
M clang/test/CIR/CodeGenOpenACC/declare-present.cpp
M clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-byref-forward-param.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-byref-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-empty-class.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-record-packed.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-padded.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-vptr.cir
Log Message:
-----------
[CIR] Emit classic's attributes for a non-byval indirect argument (#222445)
CallConvLowering marked an indirect argument that is not byval with
llvm.byref. Classic gives this argument llvm.nofreeobj, llvm.noundef,
llvm.align, and llvm.dereferenceable instead.
A call site forwarding such a parameter used to identify it by reading
llvm.byref back, so the pass now records the parameter where the
signature rewrite creates it. The "byref" vocabulary is removed, since
it no longer names anything CIR emits.
Assisted-by: Cursor / claude-opus-5
Commit: 2e19a54753db13719d99fa126ef1a9cb2d3cc240
https://github.com/llvm/llvm-project/commit/2e19a54753db13719d99fa126ef1a9cb2d3cc240
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/cxx23.cpp
A clang/test/SemaCXX/vector-shuffle.cpp
Log Message:
-----------
[Clang][Sema] Report diagnostic for invalid mask in shufflevector (#221558)
Clang used to accept a vector with an integer representation as a valid
mask; otherwise, it reported a type mismatch. This led to accepting a
vector of booleans as a valid mask and reporting that types are not
equal if both arguments are equal but not vectors of integers.
Currently, it checks for the mask type and reports a clear error message
if the mask is a vector of bool or not a vector of integers
Fixes: #218132
Commit: 0a5aa293a4e76add0a3abefbf41320b70cb77c1f
https://github.com/llvm/llvm-project/commit/0a5aa293a4e76add0a3abefbf41320b70cb77c1f
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profdata.md
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
A llvm/test/Transforms/SampleProfile/Inputs/composite-cs-profile.proftext
A llvm/test/Transforms/SampleProfile/composite-cs-profile.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline-icall.ll
A llvm/test/tools/llvm-profdata/Inputs/composite-duplicate-type.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-empty-section.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-head-only.proftext
A llvm/test/tools/llvm-profdata/Inputs/composite-mixed-empty.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-mixed-nonempty.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-payload-oversized.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-payload-undersized.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-prepended-unknown.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-nested.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-oob.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-top.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-version-103.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-version-104.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-zero-block.proftext
A llvm/test/tools/llvm-profdata/Inputs/sample-composite-empty-lbr.proftext
A llvm/test/tools/llvm-profdata/composite-compress.test
A llvm/test/tools/llvm-profdata/composite-compressed-info.test
A llvm/test/tools/llvm-profdata/composite-empty-lbr.test
A llvm/test/tools/llvm-profdata/composite-eytzinger-split-nametable-partition.test
A llvm/test/tools/llvm-profdata/composite-head-only.test
A llvm/test/tools/llvm-profdata/composite-mixed-sections.test
A llvm/test/tools/llvm-profdata/composite-multiple-blocks.test
A llvm/test/tools/llvm-profdata/composite-payload-boundaries.test
A llvm/test/tools/llvm-profdata/composite-unknown-resume-nested.test
A llvm/test/tools/llvm-profdata/composite-version-reader.test
A llvm/test/tools/llvm-profdata/composite-vtable.test
A llvm/test/tools/llvm-profdata/composite-zero-block.test
M llvm/test/tools/llvm-profdata/sample-flatten-profile.test
M llvm/test/tools/llvm-profdata/sample-split-layout.test
A llvm/test/tools/llvm-profdata/show-composite-profile-info.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
Introduction of Composite Profile section in ExtBinary format (#166553)
New sections are introduced for storing profile of vairous types:
* SecCompositeProfile (like SecLBRProfile but can conain multi-type
profile)
* SecCompositeFuncOffsetTable (like SecFuncOffsetTable but offsets point
to SecCompositeProfile)
The only change in the structure of ExtBinary is a substitution of
SecLBRProfile and SecFuncOffsetTable sections by new (composite) ones,
so, to void duplication of layout description and handling, all changes
are done on low-level: section types are modified in the existing layout
right before profile writing.
No new profile types are introduced - this change is rather a
preparation for future profiling extentions: only LBR profile can be
inside currently.
Processing of VTable profile is unmodified.
Extended description is here:
https://discourse.llvm.org/t/rfc-typifiedprofilesection-generalized-per-function-profile-blocks-in-extbinary-format/87881
Testing of the new scenario is added to
llvm/test/tools/llvm-profdata/sample-flatten-profile.test and also new
tests are introduced.
Assisted by GPT-5.
Commit: 5afbbd04803cc2e30d6026c98b245a1599d09ac9
https://github.com/llvm/llvm-project/commit/5afbbd04803cc2e30d6026c98b245a1599d09ac9
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
A libc/src/__support/CPP/vector.h
M libc/test/src/__support/CPP/CMakeLists.txt
A libc/test/src/__support/CPP/vector_test.cpp
Log Message:
-----------
[libc][CPP] Add vector container and unit tests (#222972)
Sequential group database entrypoints require dynamically resizable
buffers to parse arbitrary-length records and member lists reliably.
Rather than managing raw heap reallocations manually within subsystem
parsers, dynamic growth is encapsulated in a dedicated cpp::vector
container.
Add cpp::vector in libc/src/__support/CPP/vector.h with move semantics,
safe fallible allocation (returning bool for out-of-memory handling
without C++ exceptions), and RAII clean-up for trivially and
non-trivially destructible types.
* Add vector header library in libc/src/__support/CPP/CMakeLists.txt
* Implement vector container in libc/src/__support/CPP/vector.h
* Add comprehensive unit tests in
libc/test/src/__support/CPP/vector_test.cpp
* Register vector_test in libc/test/src/__support/CPP/CMakeLists.txt
Assisted-by: Automated tooling, human reviewed.
Commit: 33578bd6698a455c2faef2c5a5a9652f621ec9d5
https://github.com/llvm/llvm-project/commit/33578bd6698a455c2faef2c5a5a9652f621ec9d5
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Fix lambda added in #222755 which did not build with VS2019. (#223016)
PR #222755 added a lambda which fails to compile with VS2019 as can be
seen on our bot https://lab.llvm.org/buildbot/#/builders/46/builds/41157.
This change fixes the error by explicitly adding the variable Limit to
the lambda capture list.
Commit: 652436711805b4aa035341324465c880f19d297d
https://github.com/llvm/llvm-project/commit/652436711805b4aa035341324465c880f19d297d
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/callback_parallel_regions.ll
M llvm/test/Transforms/OpenMP/custom_state_machines.ll
M llvm/test/Transforms/OpenMP/spmdization.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
M openmp/device/include/Interface.h
M openmp/device/src/Mapping.cpp
Log Message:
-----------
[OpenMPOpt] Ask the runtime how many of a block's threads can be workers (#221450)
The custom state machine gates a thread on `InitCB < BlockHwSize -
WarpSize`,
reconstructing the worker count from the block size on the assumption
that the
main thread occupies a whole warp above them. That arithmetic has to be
kept in
step with whatever launch geometry the toolchain uses, and when it is
not, the
workers in between are left in neither group, waiting for no parallel
region
while the runtime hands them iterations.
Export the number the device runtime already computes in
`mapping::getMaxTeamThreads()`, which its own generic state machine
gates on, as
`__kmpc_get_max_team_threads()`, and gate on that instead. The new entry
point is
added to the virtual-use callback that keeps the state machine's callees
alive,
and the existing `runtimeFnsAvailable()` check skips the rewrite against
an older
device runtime.
NFC upstream, where `getMaxTeamThreads()` is `BlockSize - WarpSize`. It
matters
for a toolchain whose block is not laid out that way, and it is what
lets the
arithmetic live in one place.
Depends on #221449; the first commit is from that PR.
Tested on gfx90a: `llvm/test/Transforms/{OpenMP,Attributor}` 260 passed,
1
unsupported. No kernel in the AOMP smoke and smoke-fort suites changes
execution
mode.
Commit: ecb96165dc0f95cb81267e1178f7e60a4ab7faa6
https://github.com/llvm/llvm-project/commit/ecb96165dc0f95cb81267e1178f7e60a4ab7faa6
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc:__support_fputil_fenv_impl (#223031)
Fixes https://github.com/llvm/llvm-project/pull/192079 (commit
041300fa0515) by adding missing dependency.
Commit: 4371ce908668ab70cbf9cc938657a2230cb9f417
https://github.com/llvm/llvm-project/commit/4371ce908668ab70cbf9cc938657a2230cb9f417
Author: Kevin McAfee <kmcafee at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[NFC][SLPVectorizer] Capture TTI explicitly in the cost-caching lambdas (#223020)
Follow-up to #122348, which converted a number of lambdas in this file
to capture the TTI member explicitly. Covers a couple sites that have
been added since.
Commit: e0d48310ce627ffb85c708c9c3c93d135f14de9e
https://github.com/llvm/llvm-project/commit/e0d48310ce627ffb85c708c9c3c93d135f14de9e
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
Log Message:
-----------
[CIR] Remove the NYI test case for a pointer-element vector (#223019)
#222736 removed CIR_AnyPtrType from VectorElementType, so `!cir.vector<2
x !cir.ptr<!s32i>>` no longer verifies. That stops
x86_64-aggregate-nyi.cir parsing at all, so the whole test fails rather
than just that case.
The case only pinned that the x86_64 bridge refuses the shape. No C or
C++ source produces it, since clang rejects a pointer element with
"invalid vector element type", so the verifier is the earlier and better
place for that rejection. The comment in isSupportedType justifying the
bridge-side exclusion is also removed.
Assisted-by: Cursor / claude-opus-5
Commit: 73abf955baf6a19491c1e70947b63ff411dc94aa
https://github.com/llvm/llvm-project/commit/73abf955baf6a19491c1e70947b63ff411dc94aa
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/bindings/python/get-python-config.py
Log Message:
-----------
[lldb] Use lowercase for path "lib\site-packages" on Windows. (#222816)
Using an uppercase "L" doesn't have any visible effect for most uses.
But if you create a zip file with `set(cpack_generator ZIP)`, you get a
zip file which contains both "lib/" and "Lib/". That produces odd
results if you extract it on Linux.
Commit: 64b7dfef40e59b8596a272a431aa3a4abcef33c1
https://github.com/llvm/llvm-project/commit/64b7dfef40e59b8596a272a431aa3a4abcef33c1
Author: Clemens Wasser <clemens.wasser at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/lib/Transforms/Scalar/InferAlignment.cpp
M llvm/tools/llubi/lib/Interpreter.cpp
M polly/include/polly/ScopInfo.h
Log Message:
-----------
[PassManager] Store analysis results in contiguous storage (#222003)
Store per-IR analysis results in a `SmallVector` instead of `std::list`
to avoid a heap allocation per cached analysis. The lookup map stores
the raw result pointer, which stays stable behind the unique_ptr.
geomean -0.12% for optimizing builds, clang build -0.34%
https://llvm-compile-time-tracker.com/compare.php?from=e6734a41bb41d91cb880fe7abce46d8146182518&to=4fc43802817cf8daddbebadb0b7fbfaa6286e7fe&stat=instructions:u
Commit: 2eb8c73f47c7bf6560fc6458713099fd5e1921a3
https://github.com/llvm/llvm-project/commit/2eb8c73f47c7bf6560fc6458713099fd5e1921a3
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
[AMDGPU] Expose buffer resource num_records width in TargetParser (#220103)
This also fixes the conflict in gfx12.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 9a9ed337c81c4ca2b95e5f8f7fcb449220c722ae
https://github.com/llvm/llvm-project/commit/9a9ed337c81c4ca2b95e5f8f7fcb449220c722ae
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/tools/dsymutil/Inputs/member-hash/2.o
A llvm/test/tools/dsymutil/Inputs/member-hash/debug-map.map
A llvm/test/tools/dsymutil/X86/member-hash.cpp
Log Message:
-----------
[dsymutil] Test qualified name hashing for members (#223017)
hashFullyQualifiedName walks DW_AT_specification to reach a member's
enclosing struct, so the accelerator table entry for a type nested in an
out-of-line member function definition depends on that walk. Pin the
resulting hash.
The test has lived downstream since the fix that made the function take
its DWARFDie by value instead of by pointer, where the pointee went out
of scope during the walk. Give it a debug map of its own describing
member-hash/2.o rather than extending the shared dummy-debug-map.map,
which describes a different set of objects.
rdar://184990209
Commit: e41147d567ee1f3eddc77ff3cbf505a4d5158e84
https://github.com/llvm/llvm-project/commit/e41147d567ee1f3eddc77ff3cbf505a4d5158e84
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
R llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/condbinops.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/pr148084.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/zicond-opts.ll
M llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
R llvm/test/MC/RISCV/XVentanaCondOps-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Remove Ventana Conditional Ops (#221042)
This extension is used by any silicon as far as I am aware.
If any person/company was reliant on this extension, the extension
can be added back in under the same/different name.
AI Usage: Assisted by Codex
Commit: ecb66ef84fc881eb8bea392cbd9b61f83605b196
https://github.com/llvm/llvm-project/commit/ecb66ef84fc881eb8bea392cbd9b61f83605b196
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenSYCL.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGenCXX/init-priority-attr.cpp
M clang/test/CIR/CodeGenHIP/ternary-struct-addrspace.hip
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
Log Message:
-----------
[CIR][NFCI] Refactor uses of 'mlir::Location' vs 'SourceRange' on calls/etc (#222981)
As a prerequisite to an upcoming patch, emitCall needs access to the
Clang source locations, not just the mlir::Location. We're going to need
this in quite a few more places in the future, since there are various
diagnostics that use clang locations in the code generation.
This patch also has to change the RAII source location stuff, which I
switched to SourceRange. This should improve the amount of data we give
for our source information.
I DID have to remove the assertion on it though, because we do have a
few places that intentionally wanted an invalid location if other stuff
wasn't available (see the CUDA use in particular), but otherwise this
should allow us to improve our source location info, AND use it for
diagnostics in the future.
Commit: 9a762fce97374fb1ce5d2f21f99b5a7ed584ba71
https://github.com/llvm/llvm-project/commit/9a762fce97374fb1ce5d2f21f99b5a7ed584ba71
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Implement 'simple' atomic inc/dec. (#222730)
This only works for types where a compare-exchange instruction (or just
a lock-free implementation matters) is possible, and a loop isn't
necessary. This is basically just a conversion of classic-codegen,
except it clarifies some of the logic (particularly around bools).
Commit: 28efe19f92567ec666e205b860cfd77f6f1764fc
https://github.com/llvm/llvm-project/commit/28efe19f92567ec666e205b860cfd77f6f1764fc
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/UsersManual.md
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/keep-inline-functions.c
A clang/test/CodeGen/keep-inline-functions.cpp
A clang/test/CodeGen/keep-inline-functions.cppm
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/fkeep-inline-functions.c
Log Message:
-----------
[Clang] Implement -fkeep-inline-functions (#218533)
Implement the -fkeep-inline-functions flag, which forces selected inline
function definitions to be emitted into the object file even if they
have been inlined into all their callers. The function retention
behavior follows GCC's semantics.
The front-end has been modified to:
- emit the selected functions even if they are unused; and
- add the selected functions to llvm.compiler.used/llvm.used to ensure
they are retained.
The functions selected for emission are inline function definitions that
are available in the current translation unit. available_externally
definitions are excluded because their authoritative definitions are
expected to be emitted by another translation unit.
This is also done for C99 inline function external definitions with
external linkage, which would normally be emitted into the object file
anyway, to ensure the functions are retained for LTO purposes.
See the proposed Clang documentation update for details on the function
selection criteria.
Commit: 204b703adb18599fc7f5d7b1bc0b0b410ca1ce15
https://github.com/llvm/llvm-project/commit/204b703adb18599fc7f5d7b1bc0b0b410ca1ce15
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc/test/UnitTest:string_utils (#223051)
Fixes https://github.com/llvm/llvm-project/pull/222988 (commit
18db3eee9d04) by adding missing dependencies.
Commit: 105ff16f816ffdce14b1d4895d8584971ef5192c
https://github.com/llvm/llvm-project/commit/105ff16f816ffdce14b1d4895d8584971ef5192c
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lld/test/ELF/lto/riscv-target-abi.ll
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
M llvm/test/CodeGen/RISCV/target-abi-invalid.ll
M llvm/test/MC/RISCV/target-abi-invalid.s
M llvm/unittests/Target/RISCV/RISCVBaseInfoTest.cpp
Log Message:
-----------
[RISCV] Change RISCVABI::computeTargetABI() to return Expected<ABI>
Return Expected<ABI> instead of printing to errs()/reportFatalUsageError
internally, so callers decide whether to fall back to the default ABI
or treat the failure as fatal, and so it's unit-testable. Also fold the
duplicated Hard-float 'f'/'d' ABI checks from RISCVAsmParser.cpp and
RISCVISelLowering.cpp into computeTargetABI(), and add RISCVBaseInfoTest
coverage for the error paths.
This change was created with the help of AI tools
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/213410
Commit: 51450333e1fd156fcdb20b61d7c70ed96461812b
https://github.com/llvm/llvm-project/commit/51450333e1fd156fcdb20b61d7c70ed96461812b
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
Log Message:
-----------
[BOLT][AArch64][Android] Only the dumping thread can longjmp (#222719)
`__bolt_instr_recovery_active` is a process global flag and the reader
in `boltHandleFatalAndRecover()` runs on any thread. When a dump is in
flight, another thread that fails `assert()` or exhausts `GlobalAlloc`
in `instrumentIndirectCall()` could see the flag set, longjmp with the
dumping thread's buffer and restore the dump thread's sp/fp/lr. This
is wrong since the thread would then run on the dumping thread's stack
and later release a mutex that it does not own or hold.
`GlobalWriteProfileMutex` already serializes the writers, so one buffer
would be sufficient; only the reader side needs to know who owns the
buffer. Replace the flag with `__bolt_instr_recovery_tid` holding the
owner's thread ID, and longjmp only when it matches `__gettid()`. Other
threads will fall through to just record the failure and return.
Added a `__gettid()` syscall wrapper, for aarch64 only.
Assited-by: opus
Commit: 5c27600b852b9a86b7811142482a09defd963ad3
https://github.com/llvm/llvm-project/commit/5c27600b852b9a86b7811142482a09defd963ad3
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-nonscalar.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-unsupported-kind.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture.ll
M llvm/test/CodeGen/DirectX/ResourceAtomicBinOp.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/atomic64-typed-resource.ll
Log Message:
-----------
[DirectX] Add texture support to atomicrmw lowering (#221369)
Fixes https://github.com/llvm/llvm-project/issues/218034
Fixes https://github.com/llvm/llvm-project/issues/186154
atomicrmw lowering didn't support textures. This PR adds that missing
support.
Assisted by: Claude Opus 5
Commit: 364bed30971df7fb50d7aadfc21f3996a97bf3a4
https://github.com/llvm/llvm-project/commit/364bed30971df7fb50d7aadfc21f3996a97bf3a4
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Cygwin.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
Log Message:
-----------
(NFC)[Clang][Driver] Add ToolChain::GetFilePathIfExists and use it (#221063)
Replaces patterns like `if (TC.GetFilePath("file") != "file")` to avoid
repeating `"file"`.
Commit: 393710bbf74c4e7b92226603a18ead0bba70a8a0
https://github.com/llvm/llvm-project/commit/393710bbf74c4e7b92226603a18ead0bba70a8a0
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
A llvm/test/CodeGen/AArch64/sme-za-tailcall-fpdiff-align.ll
Log Message:
-----------
Reland "[llvm][AArch64] Ensure stack alignment in non-sibcall tail calls with FPDiff" (#220406)
When a caller has a non-multiple of the minimum stack alignment more
argument stack space than the callee it is tail calling, we need to ensure that
the resulting FPDiff's magnitude has been rounded up to a multiple of the
platform's minimum stack alignment.
In this re-land there is a fixup to 234ce03692ede13ffd2fcb35570d801c1e332814,
which, because of the wrong order, wasn't actually moving NumBytes after
FPDiff had been re-aligned.
rdar://184474075
Commit: f77ec648706b957698a61e54a715bd69042ce491
https://github.com/llvm/llvm-project/commit/f77ec648706b957698a61e54a715bd69042ce491
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Fix -Wunused-lambda-capture in #223016 (#223053)
Clang will warn on this despite this being required for MSVC, so add a
workaround for now.
Commit: d42c701dc3d00dacff3806ea428a274aae39fed0
https://github.com/llvm/llvm-project/commit/d42c701dc3d00dacff3806ea428a274aae39fed0
Author: Kunal Pathak <kunalspathak at hotmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
A llvm/test/Transforms/SampleProfile/Inputs/non-probe-stale-profile-indirect-call-anchor.prof
A llvm/test/Transforms/SampleProfile/Inputs/profile-mismatch-indirect-call.prof
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-profile-mismatch-multiple-sampled-callees.prof
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-profile-mismatch-zero-callee.prof
A llvm/test/Transforms/SampleProfile/non-probe-stale-profile-indirect-call-anchor.ll
A llvm/test/Transforms/SampleProfile/profile-mismatch-indirect-call.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-profile-mismatch.ll
Log Message:
-----------
[SampleProfile] Ignore unsampled callees in profile anchors (#219335)
Sample profiles can retain zero-count callee entries in both flattened
body call targets and
unflattened callsite samples:
```text
probe 12:
foo: 10
cleanup: 0
```
Counting every entry as a distinct callee converts the uniquely sampled
foo callsite into
UnknownIndirectCallee. It then fails to match the direct IR call to foo,
causing valid
samples to be reported as stale.
Ignore zero-count entries when the same location has a sampled callee.
Preserve the existing
behavior for genuine multi-callee sites and locations where every callee
has zero samples.
```text
foo: 10, cleanup: 0 -> foo
foo: 10, bar: 1 -> UnknownIndirectCallee
foo: 0, cleanup: 0 -> unchanged
```
The change covers both:
- flattened call targets from body samples;
- inline callees from unflattened callsite samples.
## Related fixes
This is downstream profile-matching robustness related to #219079.
Those changes prevent invalid pseudo-probe context earlier in the
pipeline. This change
ensures that any zero-sample entries reaching the profile matcher are
not treated as
evidence of another executed callee.
## Tests
Added regression coverage for zero-sample callees, genuine multiple
sampled callees,
flattened body targets, and unflattened callsite samples.
Assisted by: Claude
Commit: 55221f7a2baca65325ad073eabdaf8cc18472e12
https://github.com/llvm/llvm-project/commit/55221f7a2baca65325ad073eabdaf8cc18472e12
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/Driver/flang-f-opts.f90
Log Message:
-----------
[Flang/CI] Hotfix of flang/test/Driver/flang-f-opts.f90. (#223076)
The test started failing in Flang CI after #218533. This is just a
hotfix.
Commit: 17de86741560e43304c8c013092d80ae91d401ff
https://github.com/llvm/llvm-project/commit/17de86741560e43304c8c013092d80ae91d401ff
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/IR/Dominators.cpp
Log Message:
-----------
[IR] Make verify<domtree> work in non-asserts builds (#223066)
It doesn't make sense to lose this test coverage in non-assert builds,
and I would expect a release build of opt to have a working
verify<domtree> pass. This also better matches the behavior of the other
verify<*> passes.
Commit: 242ccbf6b6d9d090762a87138c854f2d93b6ab60
https://github.com/llvm/llvm-project/commit/242ccbf6b6d9d090762a87138c854f2d93b6ab60
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
Log Message:
-----------
[BOLT] Fix -Wunused-template (#222439)
This was enabled by default in LLVM 23.1.0. It was disabled in LLVM
23.1.1, but it makes sense to fix the outstanding issues given they are
real.
Commit: 44d1d020a920341903e726506f3efefe27ea3145
https://github.com/llvm/llvm-project/commit/44d1d020a920341903e726506f3efefe27ea3145
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
Add standard libc package features to libc subpackages (#223079)
Commit: 04a04612e6696d36cd26edadddf20d1329794d2e
https://github.com/llvm/llvm-project/commit/04a04612e6696d36cd26edadddf20d1329794d2e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
Log Message:
-----------
[mlir][Cpp] Stop using Operation::getAttrs (NFC) (#223080)
Only discardable attributes on multi-result func.return operations are
C++ tuple arguments; the operation has no inherent attributes relevant
to the translation.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: b5874129d921518823d257770c742da2a860b2cf
https://github.com/llvm/llvm-project/commit/b5874129d921518823d257770c742da2a860b2cf
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Do not hoist fir.field_index out of loops (#222891)
Lowering a consumer of a !fir.field value inspects its defining
operation: for a record whose layout is known at compile time the field
becomes an LLVM GEP struct index, which must be a constant, and
otherwise the `field` attribute is read off the defining op. A field
value therefore may not be a block argument.
LICM broke that. fir.field_index is Pure and takes no operands, so it is
trivially loop-invariant and was hoisted out of the loop. Lowering emits
one inside each arm of a construct -- for example the CASEs of a SELECT
CASE that each pass a different component of the same derived type as an
actual argument -- so hoisting them left those arms as
otherwise-identical blocks differing only in that operand. Block merging
then merged them and threaded the field through a new block argument,
and codegen aborted with "must be a constant".
Leave producers of a !fir.field where they are. The arms then differ by
an operation rather than by an operand, so they are no longer merge
candidates. Consumers are unaffected and still hoist: fir.coordinate_of
uses the attribute form of the field, so it does not depend on the
fir.field_index value.
The check keys on the result type rather than on FieldIndexOp so that
any operation producing a !fir.field is covered, and sits in the
predicate shared by the direct-loop and nested-region hoisting paths.
Commit: f795e9526254f4d1cee4855b40041d5797d2f676
https://github.com/llvm/llvm-project/commit/f795e9526254f4d1cee4855b40041d5797d2f676
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Shape/IR/Shape.cpp
Log Message:
-----------
[mlir][Shape] Stop using Operation::getAttrs in printers (NFC) (#223083)
Print only discardable attributes after inherent fields are handled by
the custom assembly formats.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: bb14dc958cbb7f9742f37cbae6d290a0997e7299
https://github.com/llvm/llvm-project/commit/bb14dc958cbb7f9742f37cbae6d290a0997e7299
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/toy/Ch2/mlir/Dialect.cpp
M mlir/examples/toy/Ch3/mlir/Dialect.cpp
M mlir/examples/toy/Ch4/mlir/Dialect.cpp
M mlir/examples/toy/Ch5/mlir/Dialect.cpp
M mlir/examples/toy/Ch6/mlir/Dialect.cpp
M mlir/examples/toy/Ch7/mlir/Dialect.cpp
Log Message:
-----------
[mlir][Toy] Stop using Operation::getAttrs (NFC) (#223082)
Print only discardable attributes in Toy custom operation printers.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: c7a7f8364a1335b8938af2113fd8ec43cd3a2c47
https://github.com/llvm/llvm-project/commit/c7a7f8364a1335b8938af2113fd8ec43cd3a2c47
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Utils/StructuredOpsUtils.cpp
Log Message:
-----------
[mlir] Stop using Operation::getAttrs in dialect utilities (NFC) (#223081)
Copy operation properties and discardable attributes separately.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 4cec7e6e3082e8abbee08f90db3c353c4c379bdb
https://github.com/llvm/llvm-project/commit/4cec7e6e3082e8abbee08f90db3c353c4c379bdb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SMT/IR/SMTOps.cpp
Log Message:
-----------
[mlir][SMT] Stop using Operation::getAttrs (NFC) (#223086)
Print only discardable attributes after inherent fields are handled by
the custom operation printers.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 0cc524fdf4becec3763cd50930de5156d76ba1d4
https://github.com/llvm/llvm-project/commit/0cc524fdf4becec3763cd50930de5156d76ba1d4
Author: nvptm <pmathew at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-declare-globals.f90
M flang/test/Lower/module-parameter-linkonce-odr.f90
Log Message:
-----------
[flang][OpenACC] Do not emit declare ctor/dtor for module PARAMETER variables (#222993)
A module PARAMETER in !$acc declare is already emitted as an initialized
device global. A host ctor/dtor would still register that same symbol
with the runtime. Skip the registration pair and keep acc.declare so the
constant is
still emitted as an initialized global in the GPU module.
Commit: 5f09d40446ffbcd92d9e1a2a14bae974eb445cdb
https://github.com/llvm/llvm-project/commit/5f09d40446ffbcd92d9e1a2a14bae974eb445cdb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp
Log Message:
-----------
[mlir][PDLInterp] Stop using Operation::getAttrs (NFC) (#223088)
Print the discardable dictionary after the inherent fields handled by
the custom assembly format.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 641dc586869b21dc42785aa72949ed57c408204e
https://github.com/llvm/llvm-project/commit/641dc586869b21dc42785aa72949ed57c408204e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/docs/CodingConventions.md
M orc-rt/include/orc-rt-c/support/CoreTypes.h
M orc-rt/include/orc-rt-c/support/Error.h
A orc-rt/include/orc-rt-c/support/RTTI.h
M orc-rt/include/orc-rt/support/Error.h
M orc-rt/include/orc-rt/support/RTTI.h
M orc-rt/lib/support/Error.cpp
M orc-rt/lib/support/RTTI.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/Inputs/RTTICrossDylibTestError.h
A orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.cpp
A orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.h
M orc-rt/test/unit/support/CAPICompileTest.c
M orc-rt/test/unit/support/ErrorCAPITest.cpp
M orc-rt/test/unit/support/ErrorExceptionInteropTest.cpp
M orc-rt/test/unit/support/ErrorTest.cpp
A orc-rt/test/unit/support/RTTICrossDylibTest.cpp
M orc-rt/test/unit/support/RTTITest.cpp
Log Message:
-----------
[orc-rt] Refactor RTTI for cross-library support, add C API (#222946)
Identify types by name rather than by the address of a per-type ID
object, so that a type's identity survives crossing a library boundary:
an object may be constructed by one library and have its type queried by
another, each with its own copy of orc-rt, where per-type addresses
would not agree. Participating classes now declare an RTTIName, which
must be unique across the process.
RTTIRoot records which library produced each value, so same-library
queries still resolve by pointer comparison, and only cross-library ones
fall back to strcmp.
Adds orc-rt-c/support/RTTI.h to expose this to C.
ORC_RT_RTTI_PARTICIPANT and ORC_RT_C_RTTI_IMPL declare and define a
per-type cast entry point, reached via ORC_RT_DYNCAST, alongside
orc_rt_RTTIRoot_getTypeName for logging. This replaces the
orc_rt_Error_TypeId API (orc_rt_Error_getTypeId,
orc_rt_StringError_getTypeId), which exposed ID addresses and so could
not work across libraries. orc_rt_ErrorRef moves from CoreTypes.h to
Error.h.
RTTICrossDylibTest checks identity across a real boundary: its helper
library links its own copy of orc-rt-bedrock, giving it a distinct
library ID.
Commit: 80bc02604c4ecec507c906552db3e03e5efdaee3
https://github.com/llvm/llvm-project/commit/80bc02604c4ecec507c906552db3e03e5efdaee3
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/lib/Optimizer/OpenACC/Transforms/ACCRecipeBufferization.cpp
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
Log Message:
-----------
[flang][OpenACC] Allocate bufferized recipe descriptors in device memory (#223028)
ACCRecipeBufferization places the descriptor of a bufferized recipe
clause next to the variable it holds. When the clause sits inside a
compute construct and the variable is already produced by a data entry
operation, that memory is host memory no data clause maps, so device
code reading the descriptor through it gets a host address.
Place the descriptor in the construct region in that case. The region is
device memory and needs no data clause of its own, and the mapped
variable is a legal live-in since a data entry operation produces it.
The region entry block is used rather than the clause operation so that
a clause on a nested loop does not allocate on every iteration.
Assisted-by: Cursor
Commit: a8e989fe377385906abdda1f965622fe83941fd4
https://github.com/llvm/llvm-project/commit/a8e989fe377385906abdda1f965622fe83941fd4
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir
M mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
Log Message:
-----------
[mlir][OpenACC] Preserve reduction mappings during materialization. (#222189)
Create or reuse structured reduction mappings before compute-construct
reduction recipes are consumed. Materialize initialization and
combination against the mapped value while leaving nested loop
reductions unchanged.
Assisted-by: Cursor
Commit: 4d10444e7d4c8fcb6533522f39cd0ffb88497253
https://github.com/llvm/llvm-project/commit/4d10444e7d4c8fcb6533522f39cd0ffb88497253
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
Log Message:
-----------
[mlir][OpenACC] Restrict implicit data to compute constructs (#222759)
acc.kernel_environment contains host-side preparation around an outlined
compute region; it is not itself an OpenACC compute construct. Treating
all of its live-ins as implicit device mappings can map
compiler-generated host operations and assign them kernels-style copy
semantics.
Limit ACCImplicitData to parallel, kernels, and serial. In particular,
do not process kernel_environment or the lowered compute_region form.
Assisted-by: Cursor
Commit: 329f45430835fe803b753ac78fc823b5dfc5df69
https://github.com/llvm/llvm-project/commit/329f45430835fe803b753ac78fc823b5dfc5df69
Author: Douglas <Douglas.Gliner at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SafeStack.cpp
A llvm/test/Transforms/SafeStack/X86/pointer-address-domtree.ll
Log Message:
-----------
[CodeGen][SafeStack] Successful InlineFunction should force a recalculation of potentially stale DominatorTree (#222820)
In commit 51a25846c198, Safe Stack began preserving the `DominatorTree`
by the end of the pass' run. Updates to the `DominatorTree` were then
made lazily via inclusion of `DomTreeUpdater` and its use with
`SplitBlockAndInsertIfThen`. Preservation was maintained when updated to
the new pass manager in 3bd517205799. However, there was an overlooked
case where the `DominatorTree` would remain stale by the end of the Safe
Stack pass if the actions under `TryInlinePointerAddress` completed
successfully and modified the caller's CFG.
The conditions for a stale `DominatorTree` to exist are roughly:
1. Safe Stack obtains the Unsafe Stack pointer location as a `CallInst`
(i.e. one way is `-safestack-use-pointer-address`)
2. `__safestack_pointer_address` is defined and inlined successfully.
3. The inlining changes the CFG such that a recalculated `DominatorTree`
would differ.
4. `DominatorTree` remains unchanged since it is preserved and currently
not recalculated.
Here's a simple example that demonstrates the issue:
```
@unsafe_stack_pointer_a = thread_local global ptr null
@unsafe_stack_pointer_b = thread_local global ptr null
declare i32 @get_runtime_mode() nounwind willreturn memory(none)
declare void @escape(ptr)
define ptr @__safestack_pointer_address() alwaysinline {
entry:
%first = call i32 @get_runtime_mode()
%use_a = icmp eq i32 %first, 0
br i1 %use_a, label %a, label %b
a:
ret ptr @unsafe_stack_pointer_a
b:
ret ptr @unsafe_stack_pointer_b
}
define i32 @caller() safestack {
entry:
%unsafe = alloca i32, align 4
call void @escape(ptr %unsafe)
%second = call i32 @get_runtime_mode()
ret i32 %second
}
```
```
> opt -mtriple=x86_64-pc-linux-gnu -safestack-use-pointer-address -passes=require<libcall-lowering-info>,function(safe-stack,verify<domtree>) -disable-output example.ll
DominatorTree is different than a freshly computed one!
Current:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
[1] %entry {4294967295,4294967295} [0]
Roots: %entry
Freshly computed tree:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
[1] %entry {4294967295,4294967295} [0]
[2] %a.i {4294967295,4294967295} [1]
[2] %__safestack_pointer_address.exit {4294967295,4294967295} [1]
[2] %b.i {4294967295,4294967295} [1]
Roots: %entry
```
To avoid a stale `DominatorTree` by the end of the Safe Stack pass, I
propose calling `recalculate` on the `DominatorTree` for the function
which will have the call to `__safestack_pointer_address` inlined
assuming the inlining was successful and `DomTreeUpdater` is non-NULL.
Commit: 923902483c7a6937a65b9679795a247ae2a2ad56
https://github.com/llvm/llvm-project/commit/923902483c7a6937a65b9679795a247ae2a2ad56
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/Host/SafeMachO.h
Log Message:
-----------
[lldb] Attempt to unbreak building lldb with the 27 SDK (#223090)
See this report:
https://github.com/llvm/llvm-project/pull/222721#issuecomment-5636252813
Commit: 4e3b379b6cfcd13a11e26834756519430a9f9377
https://github.com/llvm/llvm-project/commit/4e3b379b6cfcd13a11e26834756519430a9f9377
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/CAPI/Wrap.h
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Query/Matcher/Marshallers.h
M mlir/include/mlir/Support/DebugStringHelper.h
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/lib/Dialect/Shard/Transforms/Partition.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Tools/mlir-pdll-lsp-server/Protocol.cpp
Log Message:
-----------
[MLIR] Fix -Wunused-template (#221480) (#223094)
This warning was enabled by default for clang 23 (although reverted in
23.1.1). Given someone might enable it in the future and the cleanup
seemed nice, we should just do it.
This was done primarily by removing static from templates in headers and
then deleting any unused templates in translation units.
Previously attempted to land this in #221480, but accidentally merged
into a user branch rather than main.
Commit: 675cfb91660e20bfc17456f347c01c310322fc9d
https://github.com/llvm/llvm-project/commit/675cfb91660e20bfc17456f347c01c310322fc9d
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
A llvm/test/CodeGen/NVPTX/atomics-system-scope-sm50.err.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
Log Message:
-----------
[NVPTX] Error on atomics with system scope pre-sm60 (#222458)
Pre-SM60, atomics could only have device scope.
`NVPTXDAGToDAGISel::getAtomicScope` can conservatively emit device scope
for all scopes that are not system scope. For system scope, we need to
error out.
This resolves a TODO in llvm/test/CodeGen/NVPTX/cmpxchg.ll. Update that
and llvm/test/CodeGen/NVPTX/cmpxchg.ll to use SM60 now, demonstrating
correct lowering for system scope.
Commit: 5618cfdae27157a48ea670e6d817310404afb746
https://github.com/llvm/llvm-project/commit/5618cfdae27157a48ea670e6d817310404afb746
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Remove hasCZEROLike() in favor of directly checking for Zicond Extension (#221053)
Only Zicond implements a CZero-Like instruction now that Ventana
Conditional Operations have been removed.
Commit: 7727fb8eaed54b90d08a35fca4896a21a04349b2
https://github.com/llvm/llvm-project/commit/7727fb8eaed54b90d08a35fca4896a21a04349b2
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
Log Message:
-----------
[NFC][AMDGPU] Add tests for converting an i64 that fits in 32 bits (#223030)
It is converted with the full i64 expansion. The shifts by 31 leave a
value that does not fit.
The idea is to optimize conversion of an i64 that fits in 32 bits from
its low half.
Commit: 355cbe15b1c7694cab8590ecd773087b78a31121
https://github.com/llvm/llvm-project/commit/355cbe15b1c7694cab8590ecd773087b78a31121
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[IVDescriptors] Implement MonotonicDescriptor (#214490)
RFC link:
https://discourse.llvm.org/t/rfc-loop-vectorization-of-compress-store-expand-load-patterns/86442
"Monotonic" variable is similar to induction variable, but its value is
updated under some condition, e.g.:
```
int idx = 0;
for(int i = 0; i < n; ++i) {
// some uses of idx
if (cond)
++idx;
}
```
In this example, `i` is induction variable and `idx` is monotonic
variable: it's updated only when cond == true. In LLVM IR, this looks
like:
```
loop_header:
%monotonic_phi = phi [ %start, %preheader ], [ %update, %latch ]
br i1 %do_step, label %step_bb, label %latch
step_bb:
%step = add/gep %monotonic_phi, %step_val
br label %latch
latch:
%update = phi [ %monotonic_phi, %loop_header ], [ %step, %step_bb ]
br label %loop_header
```
This initial patch only matches the case where `%update` directly
selects between the `%monotonic_phi` or the step. We also limit the
descriptor to only matching cases where all users of the
`%monotonic_phi` are loads/stores that can be mapped to expandloads or
compresstores.
This is a continuation Sergey Kachkov's patch (#140720).
---------
Co-authored-by: Sergey Kachkov <sergey.kachkov at syntacore.com>
Commit: 4e865028f0563584bde4e54858855ba4f45946ad
https://github.com/llvm/llvm-project/commit/4e865028f0563584bde4e54858855ba4f45946ad
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.ll
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.mir
Log Message:
-----------
[AArch64] Form CCMP for CBB and CBH (#221113)
AArch64ConditionalCompares forms CMP/CCMP chains to transform patterns
such as
Head Head
/ | CmpBB
/ | / |
| CmpBB => / |
| / | Tail |
| / | | |
Tail | | |
| | | |
... ... ... ...
where Head is terminated by a conditional branch and CmpBB contains
a cmp + conditional branch.
We usually try to split any fused conditional branches to be able to
form CCMP. However, in the case of CBB and CBH, splitting the fused
conditional branch in CmpBB could require the insertion of explicit
zero- or sign-extensions for both operands. In the Head block we can
cheaply fuse at least one of the extensions into cmp.
We therefore convert CBB and CBH unconditionally when we find them in
the Head block. In the CmpBB block, we only do the transformation if
neither operands needs an extension.
Commit: 2c30f74239871203b0a998cd4797e01c3338a9fa
https://github.com/llvm/llvm-project/commit/2c30f74239871203b0a998cd4797e01c3338a9fa
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
A llvm/test/Transforms/RelLookupTableConverter/AArch64/dynamic_relocs.ll
M llvm/test/Transforms/RelLookupTableConverter/AArch64/no_relative_lookup_table.ll
R llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
A llvm/test/Transforms/RelLookupTableConverter/relative_lookup_table.ll
Log Message:
-----------
[llvm] Avoid PREL32 overflow to .data.rel.ro on AArch64 and re-enable (#222809)
Under the [AArch64 Small Code
Model](https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst#code-models),
the text segment (containing .text and .rodata) is limited to 2GB, but
the combined span of text and data segments can be up to 4GB.
When a relative lookup table is emitted in .rodata but references target
operands that require dynamic relocations (placed in .data.rel.ro in the
data segment), the distance between .rodata and .data.rel.ro can legally
exceed the 2GB range of signed 32-bit R_AARCH64_PREL32 relocations.
In this PR:
1. Ensure that on AArch64, lookup table operands do not need dynamic
relocations. If the lookup table were in `.rodata` (text segment), then
any of the target components would need to be in the data segment, so
the dynamic reloc check would suffice.
2. Re-enable RelLookupTableConverter for AArch64 (while keeping Darwin
disabled as before).
3. Limit the existing `AArch64/no_relative_lookup_table.ll` test to just
darwin aarch64.
4. Move the `X86/relative_lookup_table.ll` into the parent dir since
those checks are (mostly) generic, and allow those same checks to be run
for aarch64. That also includes a minor refactor for not checking the
`unnamed_addr` bit since `unnamed_addr` is
[dropped](https://github.com/llvm/llvm-project/blob/6959b7d081df5fb2349e67e0d8e8e87841fa10d9/llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp#L82)
for aarch64.
AI: Gemini was used to help make this patch and debug the issue. I
reviewed this PR to the best of my ability before submitting.
Commit: f471750e042c5da3daf947169c0125e58300df0d
https://github.com/llvm/llvm-project/commit/f471750e042c5da3daf947169c0125e58300df0d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/CIR/CleanupAndEHDesign.md
Log Message:
-----------
[CIR] Document dynamic exception specification design (#222451)
This change adds documentation for the CIR handling of dynamic exception
specification handling in pre-C++17 code. This is not yet implemented.
The implementation will follow in a series of changes based on this
design.
This documentation was generated by Claude Opus 5, based on an
interactive planning session in which I worked out the details of how I
want to implement this feature. I have carefully read the entire
document to verify that it correctly matches my intended implementation.
Commit: 5b1d7415a6cf8f4799b4f586417346abf0c56e84
https://github.com/llvm/llvm-project/commit/5b1d7415a6cf8f4799b4f586417346abf0c56e84
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
A flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Synchronize context before finalization (#223058)
Commit: e471938cf2c9647a33458eed6ad5647b6323d153
https://github.com/llvm/llvm-project/commit/e471938cf2c9647a33458eed6ad5647b6323d153
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/AggressiveInstCombine/RISCV/lit.local.cfg
Log Message:
-----------
[AggressiveInstCombine] Add lit.local.cfg to RISCV test directory. NFC (#223067)
To fix buildbot failures after #220310.
Commit: fe36473cb62cca28c14b7174c0797cb74bcdfc7e
https://github.com/llvm/llvm-project/commit/fe36473cb62cca28c14b7174c0797cb74bcdfc7e
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Let amdgcn_lerp and ds_swizzle use the generic codegen path (#222204)
__builtin_amdgcn_lerp and __builtin_amdgcn_ds_swizzle both map 1:1 onto
concrete (non-overloaded) intrinsics and carry the ClangBuiltin<> marker
in IntrinsicsAMDGPU.td, so EmitBuiltinExpr already lowers them
automatically by forwarding the arguments to the intrinsic.
Commit: bb962e790106c624e0668118d0b7d92c706c2da4
https://github.com/llvm/llvm-project/commit/bb962e790106c624e0668118d0b7d92c706c2da4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/bedrock/SocketHandle.h
M orc-rt/lib/bedrock/CMakeLists.txt
A orc-rt/lib/bedrock/sys/posix/SocketHandle.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/SocketHandleTest.cpp
A orc-rt/test/unit/bedrock/SocketTestUtils.h
A orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp
Log Message:
-----------
[orc-rt] Add SocketHandle, NativeSocketHandle APIs (#223114)
SocketHandle is an owning wrapper for a NativeSocketHandle value, and
closes the native socket on destruction.
NativeSocketHandle is a typedef for the platform's native socket handle
type.
Only POSIX is implemented in this patch (in sys/posix/SocketHandle.cpp).
Windows support will be added later.
This will be used for an upcoming SimpleRemote-based ControllerAccess
implementation that uses sockets for transport (SocketSimpleRemoteCA).
Commit: 25fe99bf939c50c7064e714a7edcbeb445bb9dc1
https://github.com/llvm/llvm-project/commit/25fe99bf939c50c7064e714a7edcbeb445bb9dc1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
M llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
Log Message:
-----------
[ORC] Retire rt::SimpleExecutorMemoryManager* for sps_ci (#223113)
Move all clients to the sps_ci SimpleNativeMemoryMap / MemMgr
counterparts and retire the old rt::SimpleExecutorMemoryManager*
interface names.
Commit: 64a6af1666c9bbb63eb86c0697a3709a4cca8e50
https://github.com/llvm/llvm-project/commit/64a6af1666c9bbb63eb86c0697a3709a4cca8e50
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIROpenCLAttrs.cpp
A clang/test/CIR/IR/invalid-version.cir
A clang/test/CIR/IR/version.cir
M clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
Log Message:
-----------
[CIR][OpenCL] Add OpenCL language version module attributes (#219687)
Add structured CIR module attributes for OpenCL and C++ for OpenCL
language versions. Verify their module-level placement and version
components so lowering can consume explicit source-language version
state.
Assisted-by: Codex / GPT-5.6 Sol
Commit: ba3010d7e4520b6aee926f878c5c1771f1c2a6f3
https://github.com/llvm/llvm-project/commit/ba3010d7e4520b6aee926f878c5c1771f1c2a6f3
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
A clang/test/CIR/CodeGenOpenCL/version.cl
M clang/test/CodeGenCUDASPIRV/kernel-cc.cu
M clang/test/CodeGenHIP/hipspv-kernel.cpp
A clang/test/SemaHIP/atomic-init.hip
Log Message:
-----------
[CIR][OpenCL] Emit OpenCL language version metadata in CIR (#219688)
Emit OpenCL and C++ for OpenCL language version attributes from CIRGen.
Preserve the compatible OpenCL version and the C++ for OpenCL version
separately so later lowering does not infer one from the other.
Assisted-by: Codex / GPT-5.6 Sol
Commit: 070455b3f2f77dbd1d5121a9d1bc3d9a3e3f65bc
https://github.com/llvm/llvm-project/commit/070455b3f2f77dbd1d5121a9d1bc3d9a3e3f65bc
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ConvertMemberFunctionsToStaticCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/readability/convert-member-functions-to-static.cpp
Log Message:
-----------
[clang-tidy] Fix convert-member-functions-to-static crash on attributed methods (#223007)
Fixes #222951
Commit: 78f557806dca9c81453e94c038409fb9ad49d063
https://github.com/llvm/llvm-project/commit/78f557806dca9c81453e94c038409fb9ad49d063
Author: shivaramaarao <58245296+shivaramaarao at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/omp-lib-integer-wrappers.f90
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M openmp/device/include/Interface.h
M openmp/device/src/State.cpp
M openmp/module/omp_lib.F90.var
M openmp/runtime/src/dllexports
M openmp/runtime/src/include/omp.h.var
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_csupport.cpp
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_ftn_os.h
M openmp/runtime/src/kmp_stub.cpp
A openmp/runtime/test/api/kmp_integer_8_apis.f90
Log Message:
-----------
[OpenMP] [Flang] Add Fortran integer(kind=8) overloads for omp_lib APIs (#221451)
Fortran code that uses integer(8) arguments, including
-fdefault-integer-8, did not match omp_lib interfaces declared with
omp_integer_kind (typically kind 4). Added *_8 specific procedures to
named generic interfaces in omp_lib, exported matching Fortran and C
runtime entry points, and implemented the *_8 functions as thin wrappers
that saturate-convert arguments to 32-bit and call the existing APIs.
Commit: a67c8f208e8710ad8b6b6e2ca4de57e4e0db7178
https://github.com/llvm/llvm-project/commit/a67c8f208e8710ad8b6b6e2ca4de57e4e0db7178
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Frontend/FrontendActions.cpp
M flang/test/Driver/frame-pointer-forwarding.f90
A flang/test/Transforms/function-attr-frame-pointer.fir
Log Message:
-----------
[Flang][Driver]Implemented support for option -momit-leaf-frame-pointer/-mno-omit-leaf-frame-pointer in flang (#216700)
Added support for `-momit-leaf-frame-pointer` /
`-mno-omit-leaf-frame-pointer` in the Flang compiler.
- The driver resolves the flags via `getFramePointerKind()` and forwards
`-mframe-pointer=<kind>` to flang -fc1, resulting in the LLVM IR
function attribute "frame-pointer"
- These options, used with `-fno-omit-frame-pointer`, control whether
leaf functions (functions that don't call other functions) retain or
omit the frame pointer.
- `fno-omit-frame-pointer -momit-leaf-frame-pointe`r : Keep the frame
pointer in non-leaf functions, but omit it in leaf functions (produces
"frame-pointer"="non-leaf").
- `fno-omit-frame-pointer -mno-omit-leaf-frame-pointe`r : Keep the frame
pointer in all functions, including leaf functions (produces
"frame-pointer"="all").
Commit: 4388400c3d0a95b75a36f81c7edd2eb95c6d63ea
https://github.com/llvm/llvm-project/commit/4388400c3d0a95b75a36f81c7edd2eb95c6d63ea
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/IR/TypeDetail.h
M mlir/test/IR/invalid-builtin-types.mlir
M mlir/test/IR/parser.mlir
Log Message:
-----------
[mlir] Remove the memory space attribute restriction on memref types (#222995)
Follow-up to #187682. `isSupportedMemorySpace` only rejected builtin
attributes other than IntegerAttr/StringAttr/DictionaryAttr. This is a
leftover from when memory spaces were restricted to integers, and is now
inconsistent.
Commit: eff88db8f004bf74c54c65bd39a3fc2fb27969f0
https://github.com/llvm/llvm-project/commit/eff88db8f004bf74c54c65bd39a3fc2fb27969f0
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
M clang/test/CIR/CodeGenOpenCL/version.cl
A clang/test/CIR/Lowering/opencl-version-metadata.cir
Log Message:
-----------
[CIR][OpenCL] Lower OpenCL language version metadata to LLVM dialect (#219689)
Propagate CIR OpenCL language version module attributes as LLVM dialect
named metadata before LLVM IR translation.
Assisted-by: Codex / GPT-5.6 Sol
Commit: cebfe6c25f45c81f7be238c835828b97f48730ab
https://github.com/llvm/llvm-project/commit/cebfe6c25f45c81f7be238c835828b97f48730ab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/IR/Verifier.cpp
A llvm/test/Assembler/llvm.loop.align.ll
A llvm/test/Verifier/llvm.loop.align.ll
Log Message:
-----------
IR: Add verifier checks and LangRef for llvm.loop.align (#221933)
Verify the nested !{!"llvm.loop.align", i32 N} tag.
Require exactly two operands, an integer constant of type i32 or
smaller, and a positive power-of-two value
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 1f13035dd3bec940226402c59bbb086ab703caeb
https://github.com/llvm/llvm-project/commit/1f13035dd3bec940226402c59bbb086ab703caeb
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.verify.cpp
Log Message:
-----------
[libc++] Test LWG4113: Disallow `has_unique_object_representations<Incomplete[]>` (#169446)
We have been rejecting `has_unique_object_representations<Incomplete[]>`
since LLVM 6.
Some related change landed in Clang 19 due to
6451806ef73bb033be3f6e1599f3bcb224943206, and then a follow-up change
ae9990ed965118e7274a52399b43e3b9fb419a54 simplified error messages.
Test coverage for incomplete enumeration types is skipped for Clang-cl
mode, because an incomplete enumeration type is incorrectly considered
to be complete. See https://llvm.org/PR169472.
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 25728f8e380096df53f3aa966068ec3a24271b30
https://github.com/llvm/llvm-project/commit/25728f8e380096df53f3aa966068ec3a24271b30
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
A llvm/test/CodeGen/AArch64/misched-postra-only1.mir
Log Message:
-----------
[MISched] Fix post-RA pickOnlyChoice debug logs (#222927)
On the way, adding a stable test for `pickOnlyChoice()` scheduling paths
directly, which has been missing, while filechecking the fixed tracing.
Commit: cad1b33322a4000bad6974b4c40ee5bff987eb89
https://github.com/llvm/llvm-project/commit/cad1b33322a4000bad6974b4c40ee5bff987eb89
Author: lntue <lntue at google.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
Log Message:
-----------
[libc] Pass correct system include flag for macOS. (#223116)
Commit: e17b8cb5341d42f805c538236771edafa737a87e
https://github.com/llvm/llvm-project/commit/e17b8cb5341d42f805c538236771edafa737a87e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/TargetParser/Triple.cpp
A llvm/test/Assembler/module-flags-thread-model.ll
A llvm/test/Linker/module-flags-thread-model.ll
A llvm/test/Verifier/module-flags-thread-model.ll
Log Message:
-----------
IR: Introduce "thread-model" module flag (#222768)
Introduce the replacement for TargetOptions::ThreadModel, but
does not yet wire up the uses. This maintains the current values,
but I question if it makes sense to retain "posix" as the default.
POSIX sounds very target opinionated, but isn't used in a non-binary
way anywhere. Alternatively we could have a simple singlethread binary
flag, or name this something more general.
Follows the precedent of float-abi. It happens the triple default
is just POSIX, but theoretically targets like AVR should be defaulting
to singlethread.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 2706780356665d560cc5a38dee91e7377a6d6002
https://github.com/llvm/llvm-project/commit/2706780356665d560cc5a38dee91e7377a6d6002
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
[InstCombine] support trunc condition in foldSelectICmpAndAnd (#223132)
Reland https://github.com/llvm/llvm-project/pull/220690 with the fix for
asan failure see fixup commit
Commit: d41121260c37b1be088995b375d074f198942114
https://github.com/llvm/llvm-project/commit/d41121260c37b1be088995b375d074f198942114
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/machine-outliner-lpad.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/MC/RISCV/tail-call.s
Log Message:
-----------
[RISCV] Add PseudoTAILX7, PseudoTAILReg for cf-protection-branch (#220657)
Previously, PseudoTAIL selected between X6 and X7 at encode time by
checking the Zicfilp feature bit via getTailExpandUseRegNo. This is
incorrect for the codegen path because -fcf-protection=branch can emit
lpad without requiring Zicfilp to be enabled.
Add PseudoTAILX7 for codegen: when cf-protection-branch is active,
ISelLowering and the machine outliner now emit PseudoTAILX7 which
always expands using X7. The existing PseudoTAIL behavior is unchanged
— it still selects X6 or X7 based on Zicfilp at encode time, as
documented in the assembler manual.
Also add PseudoTAILReg ("tail address, register") assembly form that
lets users explicitly specify the scratch register for AUIPC+JALR
expansion, per the proposed syntax in
https://github.com/riscv-non-isa/riscv-asm-manual/pull/227.
Commit: 3569a1f1d2cee5616a15a992ca49646447efaa47
https://github.com/llvm/llvm-project/commit/3569a1f1d2cee5616a15a992ca49646447efaa47
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Fix placement of FeatureSupportsXNACK (#223111)
This can't be put into 12_50_Common because of conflict in downstream
code.
Commit: 5eff11f8e9b56b1653950409355d829f48547127
https://github.com/llvm/llvm-project/commit/5eff11f8e9b56b1653950409355d829f48547127
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCA.h
M orc-rt/lib/bedrock/sps/SimpleRemoteCA.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
Log Message:
-----------
[orc-rt] Reduce SimpleRemoteCA to transport-independent utils (#223141)
Reduce SimpleRemoteCA to the transport-independent parts: opcodes, setup
and hang-up payload encoding, message validation and dispatch, and the
table of calls awaiting a result. Subclasses are now responsible for the
connection state and synchronization, since they'll usually want to
implement these things for their transports anyway (or the transport
will already manage connection-state/synchronization).
takePendingCall becomes pure virtual, since subclasses must synchronize
access to the pending-call table.
The header moves from orc-rt-internal/ to orc-rt/: with the transport a
subclass concern, there's no reason to preclude library clients from
writing one.
Commit: 1ae00a52bbe432ff8174664ce28fb33cc600f6f0
https://github.com/llvm/llvm-project/commit/1ae00a52bbe432ff8174664ce28fb33cc600f6f0
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libc/src/__support/FPUtil/float80.h
Log Message:
-----------
[libc] Enable Float80-type for x86_32 (#221408)
Enables for x86_32 by using Uint<96>
```CPP
struct Float80 {
#if __SIZEOF_LONG_DOUBLE__ == 12
UInt<96> bits;
#else
UInt128 bits;
#endif
```
for testing it on x86_32
it needs -m32 and --msse2 extra flags other than your usual cmake for x86_32
Commit: 0adddbb3a5f7f57614e8c59c87d37cec5421e514
https://github.com/llvm/llvm-project/commit/0adddbb3a5f7f57614e8c59c87d37cec5421e514
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode][NFC] Move Remove unused CheckExtern prototype (#223146)
And add an overload taking only a Block.
Commit: 66573c1ecdc0ce1dc5f1cbd7d22974a7eb4ccf5d
https://github.com/llvm/llvm-project/commit/66573c1ecdc0ce1dc5f1cbd7d22974a7eb4ccf5d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/pointer-iv-addrec.ll
Log Message:
-----------
[SCEV] Directly form add recurrences for simple pointer IVs. (#222915)
Add support for PN = PHI(Start, gep Self, LoopInvariant) to
createSimpleAffineAddRec.
This allows to handle simple pointer IVs without going through the more
expensive createAddRecFromPHI machinery in many cases.
This is not completely NFC: previously we created SCEVUnknown for a
trivial AddRec with step 0, now we return the start value.
This gives a modest geomean compile-time decrease
* stage1-O3: -0.05%
* stage1-ReleaseThinLTO: -0.06%
* stage1-ReleaseLTO-g: -0.06%
* stage1-aarch64-O3: -0.07%
* stage2-O3: -0.05%
* clang build: -0.08%
With larger decreases for more SCEV-heavy workloads.
https://llvm-compile-time-tracker.com/compare.php?from=c1b661fde124399f0484c4b39501b37613cc4757&to=5cd19e23596c86eae9607286efe86b7a3e885a86&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/222915
Commit: e1b6027992df8846729ebfaacc9d3ac8573dd106
https://github.com/llvm/llvm-project/commit/e1b6027992df8846729ebfaacc9d3ac8573dd106
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
Log Message:
-----------
[LV] Add test for cost of widened pointer induction (NFC). (#223153)
Add a cost test where the pointer induction is used as a value and
remains a VPWidenPointerInductionRecipe.
PR: https://github.com/llvm/llvm-project/pull/223153
Commit: 345d699de809ee2962307df4ae0bd95f791275b3
https://github.com/llvm/llvm-project/commit/345d699de809ee2962307df4ae0bd95f791275b3
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Remove dead functions and declarations (NFC) (#223126)
SelectionDAG::getStore (with Offset): Added on July 31, 2026 in commit
c57b2b6103cb4bb6c4c2bee901c1eee2b966e5f0 without a definition or any
callers.
SelectionDAG::getIndexedLoadVP, SelectionDAG::getIndexedStoreVP: Added
on August 31, 2021 in commit 524ded7d01a700aa6473d09a877be13fe45b85a3
without any callers.
SelectionDAG::getTruncStridedStoreVP: Added on March 10, 2022 in commit
28cfa764c2e3d36b856b3e70d49f17088b90c1f5 without any callers.
Assisted-by: Antigravity
Commit: d7d7992e58674a2e9ad1ae42e4a627b7fff24cef
https://github.com/llvm/llvm-project/commit/d7d7992e58674a2e9ad1ae42e4a627b7fff24cef
Author: Zhige Chen <zhige_chen at outlook.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/tools/llubi/fp_cast.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Implement fast-math flags for `uitofp`/`sitofp` (#222858)
Closes #203773
Commit: eb9844b5ceee01c9d9fad92cbcd027c5798c5ed4
https://github.com/llvm/llvm-project/commit/eb9844b5ceee01c9d9fad92cbcd027c5798c5ed4
Author: Hamed <hamedghorbani17 at live.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/ms-setjmp.c
Log Message:
-----------
[clang][ARM] Use sponentry for setjmp on Windows ARM32 (#222366)
On Windows, _setjmp and _setjmpex take a second argument, the frame,
which the CRT stores in the jmp_buf and which longjmp later hands to
RtlUnwindEx as the frame to unwind. On aarch64, this is the stack pointer
on entry to the function, while x86_64 takes the function frame address.
ARM expects the same as aarch64 here, the stack pointer on entry.
Assisted-by: Claude Opus 5 (Anthropic)
Commit: 148ee2b266b73a49f1f31d0bd17d4818b91bee9f
https://github.com/llvm/llvm-project/commit/148ee2b266b73a49f1f31d0bd17d4818b91bee9f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/cancelled-copyable-self-use-deps.ll
Log Message:
-----------
[SLP] Fix dep accounting when cancelling a bundle with copyable elements
Restore the parent-edge copyable data as a user of the instruction only
if the cancelled element displaced it at creation (chained copyable
self-use); otherwise the extra user dependency is never released and
scheduling asserts.
Fixes #223139
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223174
Commit: ca8f82b625494996d4f9f61f30d25b62a5660dca
https://github.com/llvm/llvm-project/commit/ca8f82b625494996d4f9f61f30d25b62a5660dca
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/unittests/Support/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Restrict KnownFPClass::bitcast/toKnownBits deductions to verified FP semantics (#221133)
`KnownFPClass::bitcast` and `KnownFPClass::toKnownBits` previously made
deductions for floating-point semantics whose bit representations had
not been verified.
I have made it so `KnownFPClass::bitcast` and
`KnownFPClass::toKnownBits` return `fcAllFlags`/unknown for any
`APFloat` semantics we have not verified. Currently, this prevents
potentially invalid deductions for `PPCDoubleDouble` (mostly in regards
to the signbit and endianess). It also allows these functions to be
"safely" used with the 4/6/8 bit floating point types since we
conservatively return unknown.
Currently the list of supported/verified semantics for both `bitcast`
and `toKnownBits` are:
```
IEEEhalf
BFloat
IEEEsingle
IEEEdouble
IEEEquad
x87DoubleExtended
```
Commit: d65afea7b5c25b7be41dd86eaedaac263f04cd40
https://github.com/llvm/llvm-project/commit/d65afea7b5c25b7be41dd86eaedaac263f04cd40
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
Log Message:
-----------
[gn build] Port 0f47e798205b (#223189)
Commit: b6ca452aea0d805fd1f2f98a609e30692184a5bf
https://github.com/llvm/llvm-project/commit/b6ca452aea0d805fd1f2f98a609e30692184a5bf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Frontend/HLSL/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 4214b4601f49 (#223190)
Commit: 5d188c401f7d64daf08b7aac887d93aa5073e1dd
https://github.com/llvm/llvm-project/commit/5d188c401f7d64daf08b7aac887d93aa5073e1dd
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/SymbolTable.cpp
Log Message:
-----------
[ELF] Version scripts: simplify version suffix handling. NFC (#223194)
Use StringRef::split instead of index arithmetic.
Commit: 387c965bb013d14dbcee52098e714c27d6f98249
https://github.com/llvm/llvm-project/commit/387c965bb013d14dbcee52098e714c27d6f98249
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
R lld/test/ELF/dynamic-list-cpp.s
M lld/test/ELF/dynamic-list-glob.s
R lld/test/ELF/version-script-reassign-glob.s
A lld/test/ELF/version-script-wildcard-precedence.s
Log Message:
-----------
[ELF,test] Cover wildcard precedence in version scripts and dynamic lists (#223195)
version-script-wildcard-precedence.s, renamed from
version-script-reassign-glob.s, covers more cases.
dynamic-list-glob.s absorbs dynamic-list-cpp.s and adds an extern "C++"
wildcard, which had no --dynamic-list coverage.
Commit: 474b7358a90e4f22b04e6a0933381d239fb7044e
https://github.com/llvm/llvm-project/commit/474b7358a90e4f22b04e6a0933381d239fb7044e
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/tools/llc/CMakeLists.txt
R llvm/tools/llc/NewPMDriver.cpp
R llvm/tools/llc/NewPMDriver.h
A llvm/tools/llc/lib/CMakeLists.txt
A llvm/tools/llc/lib/NewPMDriver.cpp
A llvm/tools/llc/lib/NewPMDriver.h
A llvm/tools/llc/lib/llcdriver.cpp
R llvm/tools/llc/llcdriver.cpp
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llc] Move LLVMLlcDriver implementation into lib (#222840)
Addressing comment
[here](https://github.com/llvm/llvm-project/pull/221896#discussion_r3982250858)
Commit: 745ff71c706f6a55c7fa1cda660860925e0b2739
https://github.com/llvm/llvm-project/commit/745ff71c706f6a55c7fa1cda660860925e0b2739
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Consistently use RISCVSubtarget::is64Bit() instead of isRV32/isRV64. (#223038)
99% of code uses RISCVSubtarget::is64Bit().
Maybe we should consider removing is64Bit(), and using isRV64() instead
but right now I think we should be consistent.
Commit: 7a7cea921c3e450903b57e5f4b2992f1dce4c410
https://github.com/llvm/llvm-project/commit/7a7cea921c3e450903b57e5f4b2992f1dce4c410
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
Log Message:
-----------
[ELF] Version script: simplify wildcard matching. NFC (#223202)
Replace a loop over non-"*" wildcard patterns and another loop over "*"
with a single loop that calls the inlined
`SymbolTable::assignWildcardVersion`.
Commit: 051c49202368a8478661548b5b8de03549d9d183
https://github.com/llvm/llvm-project/commit/051c49202368a8478661548b5b8de03549d9d183
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/test/SemaCXX/ms-ctor-closure.cpp
Log Message:
-----------
[clang][test] Remove an uninitialized read in a test case (#223120)
This test case was added in
https://github.com/llvm/llvm-project/pull/222212. Its purpose is to
check that explicit constructor calls work at compile time.
However, the test case left var.a uninitialized and the copy constructor
reads an unitialized value. MSVC diagnoses this, but clang currently
fails to do so.
Change the test case to remove the unrelated problem of an uninitialized
read.
Commit: 0d55d0bf81ce2e0d6d3c46b7835efb788bde634a
https://github.com/llvm/llvm-project/commit/0d55d0bf81ce2e0d6d3c46b7835efb788bde634a
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/ICF.cpp
Log Message:
-----------
[ELF] Parallelize ICF's section sort. NFC (#223216)
All candidate sections are sorted by a serial stable_sort, which is a
scalability bottleneck. Switch to parallel sort using Schwartzian
transform. Linking Chromium with --icf=all (--threads=8) drops from
4.47s to 3.18s.
Commit: 8ea78db3c1bf6522ccaf6d75e73a03d80f08a00b
https://github.com/llvm/llvm-project/commit/8ea78db3c1bf6522ccaf6d75e73a03d80f08a00b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/Driver/wasm-toolchain.c
Log Message:
-----------
clang/WebAssembly: Add -femscripten-exceptions driver flag (#221431)
Commit: c4628f0385efd0d0d3c9d9ee0b88f89fdd4bd1f3
https://github.com/llvm/llvm-project/commit/c4628f0385efd0d0d3c9d9ee0b88f89fdd4bd1f3
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] Disable linker version scripts for Emscripten (#221647)
Emscripten reports itself as a Unix-like CMake platform, causing LLVM to
set `LLVM_HAVE_LINK_VERSION_SCRIPT` and pass GNU/ELF `--version-script`
options when linking shared libraries.
Emscripten uses `wasm-ld`, which does not support GNU version scripts
and currently reports:
```
em++: warning: ignoring unsupported linker flag: `--version-script`
```
Treat Emscripten like the other platforms without version-script
support. This prevents LLVM and Clang shared-library targets from
passing an unsupported linker option.
This was encountered while building LLVM 23.1.0 for both wasm32 and
wasm64 with Emscripten 6.x in emscripten-forge.
```
[ 45%] Building CXX object tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaExceptionSpec.cpp.o
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
.....
[100%] Linking CXX shared library ../../lib/libLTO.so
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
.....
[100%] Linking CXX shared library ../../../../lib/libclang.so
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
```
Commit: 4dd595b99e4e0a9c7994726065ab99d6c2b071c2
https://github.com/llvm/llvm-project/commit/4dd595b99e4e0a9c7994726065ab99d6c2b071c2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
Wasm: Remove incorrect assumption that intrinsics cannot throw (#221180)
A few intrinsics are marked as Throws
Commit: 709ef4b96668471c7be0bd67abece4ebfce62a22
https://github.com/llvm/llvm-project/commit/709ef4b96668471c7be0bd67abece4ebfce62a22
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
A llvm/test/CodeGen/ARM/cbz-no-kill-flag.mir
Log Message:
-----------
ARM: Avoid relying on kill flags for determining CPSR liveness (#222873)
When forming CBZ/CBNZ in ARMConstantIslands, check if CPSR is live-out
of the block instead of relying on the kill flag. Kill flags have been
soft deprecated for over a decade.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 31a1c03fe67cccd917f11e5ab50cc425770c1400
https://github.com/llvm/llvm-project/commit/31a1c03fe67cccd917f11e5ab50cc425770c1400
Author: Brad Smith <brad at comstyle.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Unix/Path.inc
Log Message:
-----------
[Support] Implement getMainExecutable for OpenBSD with getexecpath() (#220141)
OpenBSD now has a proper function to retrieve the executable and path.
Commit: eae1ec7b1d6752d7d94214e4beaf724ce560aed2
https://github.com/llvm/llvm-project/commit/eae1ec7b1d6752d7d94214e4beaf724ce560aed2
Author: Pkuyo <miku_mi at foxmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
Log Message:
-----------
[SelectionDAG] Handle scalable INSERT_SUBVECTOR in ComputeNumSignBits (#221631)
Handle scalable INSERT_SUBVECTOR in SelectionDAG as a pre-fix for
#220976.
Add coverage for scalable subvectors and fixed subvectors inserted into
scalable vectors.
Commit: 3deeb018ed1d1c61ad9e1798161128e0202e7920
https://github.com/llvm/llvm-project/commit/3deeb018ed1d1c61ad9e1798161128e0202e7920
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/cancelled-copyable-self-use-deps-2.ll
Log Message:
-----------
[SLP]Fix dep accounting when cancelling a bundle with repeated copyable users
Skip duplicate users instead of stopping at the first one when walking
the operand lanes; an early stop misses a trailing self-use lane, the
displaced parent-edge copyable data is never restored, and scheduling
asserts.
Fixes #223225
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223236
Commit: f8a96032096158c992ea4cd369e43068b2b072a7
https://github.com/llvm/llvm-project/commit/f8a96032096158c992ea4cd369e43068b2b072a7
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
Log Message:
-----------
[lldb] Bound Mach-O symtab allocation to the file size (#222955)
Opening a Mach-O file whose LC_SYMTAB claims far more symbols than the
file could possibly hold makes lldb ask for hundreds of gigabytes. A
128-byte file with LC_SYMTAB.nsyms = 0x80000000 (the new unit test's
input, built with yaml2obj) reproduces it through `lldb-target-fuzzer`,
the harness that found this bug:
```
==45515== ERROR: libFuzzer: out-of-memory (malloc(171798691840))
#8 std::__1::__split_buffer<lldb_private::Symbol,...>::__split_buffer(...)
#9 std::__1::vector<lldb_private::Symbol,...>::resize(unsigned long)
#10 lldb_private::Symtab::Resize(unsigned long)
#11 ObjectFileMachO::ParseSymtab(lldb_private::Symtab&)
```
`ParseSymtab()` sizes the destination `Symtab`'s `vector<Symbol>`
directly
from `nsyms` and `nindirectsyms`, two counts read from the file's
`LC_SYMTAB` and `LC_DYSYMTAB` commands. `nlist_data`, the view already
built earlier in the function from the bytes the file actually has at
`symoff`, is far smaller than what those counts claim; the guard gating
this code only checks that it is non-empty, not how many nlist records
it can back.
Bound both counts by what `nlist_data` and `indirect_symbol_index_data`
(already clipped to the available bytes) can hold, instead of trusting
the file's counts outright.
Add a unit test whose LC_SYMTAB claims about two billion symbols in a
128-byte file; completing quickly instead of reserving that much space
is the regression check.
Assited-by: claude
Commit: 3c77eb3a3f2793a75e0ce86d96076637d5989bea
https://github.com/llvm/llvm-project/commit/3c77eb3a3f2793a75e0ce86d96076637d5989bea
Author: Stanislav Bardyuk <6258615+kodlan at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
Log Message:
-----------
[DAGCombiner] Only fold shift+mask compare to rotate if the shift amount divides the bit width (#220743)
DAGCombiner::visitSETCC can turn `(X << S) == (X & -(1 << S))` (or the
srl variant) into `rotl(X, S) == X`, and the other way around, when the
target prefers one form over the other. The two forms are only equivalent when
S divides the bit width. The check used `isPowerOf2(S)`, which is the same
thing for i8/i16/i32/i64 but not for odd widths like i3, where S = 2 is a
power of two that does not divide 3. On x86, which prefers the rotate,
the reporter's i3 function returned the wrong value for two of its eight
inputs.
This changes the `MayTransformRotate` flag passed to
`preferedOpcodeForCmpEqPiecesOfOperand` to check `NumBits % S == 0`
(with S != 0) and fixes the two comments that described the old rule. For legal
scalar types nothing changes. On illegal non power of two widths this
also lets a non power of two amount that divides the width use the rotate
(like i6 with S = 3); that is correct for the same reason and legalizes
through the usual rotate promotion, same as i6 with S = 2 did before. The x86
hook already honors the flag in both directions, so the fix lives in the
target independent code.
Tests: the i3 shl and lshr cases from the issue (must stay shift+mask), an
i6 / S = 3 case (3 divides 6, so the rotate is still allowed), and the
reporter's function.
Fixes #220542
Commit: baec9c34d1ecdbabca0cc100ed6de73986174938
https://github.com/llvm/llvm-project/commit/baec9c34d1ecdbabca0cc100ed6de73986174938
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
Log Message:
-----------
[AMDGPU] Fix fneg fold with multi use fadd/fma (#217573)
Commit: db65ace07649b2beb8cdbdfd6af4901809df9966
https://github.com/llvm/llvm-project/commit/db65ace07649b2beb8cdbdfd6af4901809df9966
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
Revert "[Clang] Refactor instantiation of declarations within concepts" (#223235)
This reverts llvm/llvm-project#221707
This broke std::map as reported in
https://github.com/llvm/llvm-project/issues/223220
Commit: d283a555109576cd92b35a88b4d110166043fb77
https://github.com/llvm/llvm-project/commit/d283a555109576cd92b35a88b4d110166043fb77
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/OffloadTools/clang-nvlink-wrapper/nvlink-wrapper.c
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
Log Message:
-----------
[clang-nvlink-wrapper] Fix response file handling for the nvlink wrapper (#220249)
Summary:
Response files were not handled correctly because the copied support
used the `nvlink` argument which is not supported by the argument
parser. Pass to the nvlink wrapper using the canonical format and then
reconstruct it when we execute the sub jobs
Fixes: https://github.com/llvm/llvm-project/issues/219914
Commit: 3409d079b5b76d0cdd51526b29aebd4143ecca64
https://github.com/llvm/llvm-project/commit/3409d079b5b76d0cdd51526b29aebd4143ecca64
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/logical-binops-booleanized-leaves.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed widened boolean optimization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223245
Commit: ca2424325cd9247ac0c11cd2d1c8ea3fb07ab16e
https://github.com/llvm/llvm-project/commit/ca2424325cd9247ac0c11cd2d1c8ea3fb07ab16e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Reject guaranteed tail calls in call lowering (#216260)
The FPDiff immediate was being written to the wrong operand, corrupting
the callee GlobalAddress
Reject required tail calls like SelectionDAG does, and fix the stale
index for the one path that still needs it (cs.chain lowering)
Commit: 0c324f10322b490d66de738d73458f6f65460cdb
https://github.com/llvm/llvm-project/commit/0c324f10322b490d66de738d73458f6f65460cdb
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
Log Message:
-----------
[Support] Fix the return type of AddOverflow, SubOverflow, and MulOverflow (#223217)
This patch fixes the return type of the 3-argument overloads of
AddOverflow, SubOverflow, and MulOverflow to bool.
Without this patch, these functions are declared with a return type
of T:
template <typename T>
std::enable_if_t<std::is_signed_v<T>, T> AddOverflow(T X, T Y, T
&Result);
even though they return a boolean indicating whether an overflow
occurred, as stated in the comment:
/// Add two signed integers, computing the two's complement truncated
result,
/// returning true if overflow occurred.
Assisted-by: Antigravity
Commit: 23f2e449afa0b0de43939a03ea241bc17dfe1141
https://github.com/llvm/llvm-project/commit/23f2e449afa0b0de43939a03ea241bc17dfe1141
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Log Message:
-----------
[SelectionDAG] Remove unused float promotion in DAGTypeLegalizer (NFC) (#223219)
This patch removes PromotedFloats along with GetPromotedFloat and
SetPromotedFloat. The Mapped bitmask in PerformExpensiveChecks is
adjusted accordingly, shifting the bit for SoftPromotedHalfs.
The last uses of DAGTypeLegalizer::GetPromotedFloat and
DAGTypeLegalizer::SetPromotedFloat were removed on January 26, 2026 in
commit a7d48bd305ef3aa4bd543da6f4cd8682a3d35c32 when TypePromoteFloat
and its associated DAG machinery were removed.
With these accessors gone, DAGTypeLegalizer::PromotedFloats is no longer
populated.
Assisted-by: Antigravity
Commit: c67808cf4426290e259f2cd4bd1a48516f9b8d7b
https://github.com/llvm/llvm-project/commit/c67808cf4426290e259f2cd4bd1a48516f9b8d7b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[OpenMP] Change association of some directives from "none" to "explicit" (#222703)
Certain declarative directives are associated with base language
declarations by having the declared entities explicitly listed as
arguments.
Previously these had "none" in OMP.td. Change them to "explicit" to be
consistent with the spec. The existing code does not require any
changes, since the only potentially affected code would be that which
checked the assocation for "none", and the only such cases were applied
to executable directives.
Commit: 483af6c1be7ca13eda7cc5314bb93185d21b272a
https://github.com/llvm/llvm-project/commit/483af6c1be7ca13eda7cc5314bb93185d21b272a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[OpenMP] Add definitions for REDUCTION_KIND and SHIFT clauses (#222745)
This is a barebones change to introduce the enum identifiers for these
clauses.
Commit: 240670d0d5dcd649bd3728871087c938b5e097f2
https://github.com/llvm/llvm-project/commit/240670d0d5dcd649bd3728871087c938b5e097f2
Author: MaoJiaping <maojiaping1 at huawei.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A llvm/include/llvm/Transforms/Utils/SplitModuleCommon.h
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/SplitModule.cpp
A llvm/lib/Transforms/Utils/SplitModuleCommon.cpp
M llvm/test/tools/llvm-split/unnamed.ll
Log Message:
-----------
[NFC][ModuleUtils] Move externalize() from module splitting utilities (#221181)
`SplitModule.cpp` and `AMDGPUSplitModule.cpp` each carry an identical
static `externalize()` helper that promotes local-linkage globals to
external + hidden visibility and assigns a stable name to unnamed
entities, so they are named consistently across module partitions.
This patch removes the duplication by moving the helper into
`ModuleUtils` as `llvm::externalize`, and updates both users to call the
shared implementation. No functional changes are intended.
This also prepares for upcoming module splitting utilities to reuse a
single, canonical implementation.
Development of this patch was assisted by AI and reviewed by me.
Commit: 860fb775d3d626af6e4a45ea5d62039718957d26
https://github.com/llvm/llvm-project/commit/860fb775d3d626af6e4a45ea5d62039718957d26
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.h
M llvm/test/Transforms/SLPVectorizer/X86/logical-reduction-booleanized-leaves.ll
Log Message:
-----------
[SLP]Reduce logical and/or reductions in the wide leaf type
Logical and/or reductions on i1 with booleanized wide leaves (truncs
of same-op chains, zero-tests of values from [0, 1]) are performed in
the wide type, exposing the underlying consecutive values to the tree;
bit 0 of the result is the final value. Fixes the fragmented reduction
and the gather-of-scalars regression for compile-time-expanded Boolean
reductions.
Fixes #221167
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/221321
Commit: 588304bdb9ee0a9c8229db8c702415e80d05ad33
https://github.com/llvm/llvm-project/commit/588304bdb9ee0a9c8229db8c702415e80d05ad33
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/and-neg-pow2-copyable.ll
Log Message:
-----------
[SLP]Model copyable lanes of idempotent binops as op(V, V) when the operand column has a constant lane
The op(V, identity) form lets the reorder move the lane out of the
joined column, breaking the opcode-peer node; the symmetric form is
reorder-proof.
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/220252
Commit: f4ecba36726d6bede2ab58890dfcc861c2bb28a9
https://github.com/llvm/llvm-project/commit/f4ecba36726d6bede2ab58890dfcc861c2bb28a9
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Unify and refine interested classes for `KnownFPClass::log` (#219751)
Previously, `ValueTracking` and `GISelValueTracking` only called
`KnownFPClass::log` when the requested classes included NaN or infinity.
As a result, narrowly interested queries could miss unconditional
deductions, for example, `log(x)` is never subnormal or negative zero
(With the exception of `PPCDoubleDouble`
https://github.com/llvm/llvm-project/issues/217658).
This change makes the interested-class handling consistent between
`ValueTracking` and `GISelValueTracking`. The source is queried only
when its classes are needed, but `KnownFPClass::log` is always called so
its unconditional deductions are preserved.
Future work:
- Fixing `KnownFPClass::log` for `PPCDoubleDouble`.
AI disclosure:
I used OpenAI Codex (sol 5.6) to help write the unit tests, which I
reviewed and ran locally.
Commit: c1f1a288ccd67f9b9dadefda9c510aa7568022e7
https://github.com/llvm/llvm-project/commit/c1f1a288ccd67f9b9dadefda9c510aa7568022e7
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Complete upstream vector saturating shift left NEON builtins (#221507)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for the vector saturating shift left intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-saturating-shift-left).
This completes the family.
Port tests from `clang/test/CodeGen/AArch64/neon-intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/intrinsics.c`.
Commit: 0eac970fa7478ddf0083dc2a0a5c476ca3bb615a
https://github.com/llvm/llvm-project/commit/0eac970fa7478ddf0083dc2a0a5c476ca3bb615a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
Log Message:
-----------
RegisterCoalescer: Remove empty subranges after merging subranges (#222050)
Merging subranges in joinVirtRegs didn't try to clear empty ranges after
refineSubRanges, manifesting in an assert in overlaps checks later.
Exposed with subregister liveness once LiveIntervals runs before
TwoAddress.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: cff226a5716e4bc3589d4869066ea6687ed142ce
https://github.com/llvm/llvm-project/commit/cff226a5716e4bc3589d4869066ea6687ed142ce
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/sadd-with-overflow.ll
Log Message:
-----------
[ConstraintElim] Fold sadd.with.overflow with a constant op. (#223239)
Generalize the overflow-math simplification to also allow simplifying
sadd.with.overflow if the second operand is constant, using
makeGuaranteedNoWrapRegion.
Note that this partially overlaps with the flag strengthening logic.
I'll share a patch soon to try to unify the code more.
No improvements in llvm-opt-benchmarks-nightly. It improves end-to-end
optimizations for Swift (which emits a lot of checked arithmetic) and
also Clang + UBsan.
An end-to-end improvement with overflow intrinsics is
https://llvm.godbolt.org/z/6nrj7aodd.
PR: https://github.com/llvm/llvm-project/pull/223239
Commit: 979b374a7ca7adc936d9339c1db79b0d6cda06db
https://github.com/llvm/llvm-project/commit/979b374a7ca7adc936d9339c1db79b0d6cda06db
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
Log Message:
-----------
[AggressiveInstCombine] Fix terminology in a few comments (NFC) (#222327)
Fix the comments (and a debug print) that say "dominated by trunc"
rather than "post-dominated".
Also fixes a Doxygen syntax (use \p instead of /p) and fix
capitalization in the middle of a sentence.
Commit: d36b94ae1dc4a61d3ccff73330adbe571ef1ccd6
https://github.com/llvm/llvm-project/commit/d36b94ae1dc4a61d3ccff73330adbe571ef1ccd6
Author: Taimuraz Kaitmazov <5769345+atassis at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
A llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid11.mir
Log Message:
-----------
[MIRParser] Reject a one-element fixed-length vector type (#213290)
MIParser accepts `<1 x sN>` and then asserts while building the LLT, so
llc aborts during parsing instead of reporting a parse error:
```
Assertion `!EC.isScalar() && "invalid number of vector elements"' failed.
```
LLT has no one-element fixed-length vector. `getLLTForType`,
`getLLTForMVT` and
`LLT::changeElementCount` all map a one-element `ElementCount` to the
element
type through `LLT::scalarOrVector`, nothing calls `LLT::fixed_vector(1,
...)`,
and no in-tree .mir test uses the syntax. `verifyVectorElementCount`
already rejects 0 and anything above 2^16, so 1 was the remaining hole; it now
gets the same diagnostic instead of aborting the parser.
Scalable vectors are unaffected: `<vscale x 1 x sN>` is a valid type and
stays legal through the `HasVScale` check.
AI assistance: drafted with AI help; reviewed and validated by me.
Commit: ce73dba9552c93d1cc3abc481dff63a4ab6d0579
https://github.com/llvm/llvm-project/commit/ce73dba9552c93d1cc3abc481dff63a4ab6d0579
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHIP/amdgcnspirv-uses-amdgpu-abi.cpp
Log Message:
-----------
[clang][SPIR-V][AMDGPU] Fix variadic aggregate ABI classification for AMDGCN (#216326)
Mirror AMDGPUABIInfo fixed/variadic split
AMDGCNSPIRVABIInfo::classifyArgumentType did not distinguish fixed from
variadic arguments, so aggregates passed through `...` were
misclassified as indirect byref instead of direct
Commit: d91624c19074e219d5a5c5af45f48afd4cd9052a
https://github.com/llvm/llvm-project/commit/d91624c19074e219d5a5c5af45f48afd4cd9052a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
Log Message:
-----------
[AMDGPU] Fix MAI hazard scan missing 19-instruction-old hazards (#222040)
The scan only looked back 19 instructions, but gfx950 can need a gap of
20 after some MFMAs
A hazard exactly 19 instructions back was missed, so no wait was
inserted
Commit: 8864a4bb996d6bb541b0974d34991da40a643c90
https://github.com/llvm/llvm-project/commit/8864a4bb996d6bb541b0974d34991da40a643c90
Author: neoto <48843913+neoto at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/srem.ll
M llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/urem.ll
Log Message:
-----------
[Mips] Handle division by zero trap on MIPS1 (#201133)
LLVM currently emits the `teq` instruction for every arch version, but
`teq` is unsupported on MIPS1.
This special cases MIPS1 so that `bne(z)` and `break` are emitted
instead.
Compared to https://github.com/llvm/llvm-project/pull/81311, this should
also handle liveness as far as I can tell.
I didn't want to add another bool to the argument list so I combined
`IsMicroMips` and what was supposed to be `IsMips1` into an enum, which
feels much nicer in this case.
Besides that and the main change, I also changed the `hasSideEffects`
bit for `PseudoSDIV` and `PseudoUDIV`,
which allows the delay slot to be usefully filled - well, at least with
`-O1`+. This seems to be in line with what GCC does:
https://godbolt.org/z/zqcG5ha35
Tested using clang directly and through Zig's LLVM backend.
Closes https://github.com/llvm/llvm-project/issues/80554
Supersedes https://github.com/llvm/llvm-project/pull/81311
Commit: 85f694b3eeafc07e5c586fa15715facefba71094
https://github.com/llvm/llvm-project/commit/85f694b3eeafc07e5c586fa15715facefba71094
Author: ʟᴜɴᴇx <thisissamir04 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll
Log Message:
-----------
[ASan] Convert pointer-pair operands based on type (#218494)
`CreatePointerCast` was being called on everything without checking what
it actually is, so if the operand came from ptrtoint ... to i32 it just
crashes (its not a pointer).
now it check the type first - pointers get pointer-cast, ints get
zext/trunc'd to intptr width.
Fixes #217544
also edited regression tests for this
Commit: 4098f568c46e06b6df470111868b4c165dd80f4d
https://github.com/llvm/llvm-project/commit/4098f568c46e06b6df470111868b4c165dd80f4d
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Don't fold in_bounds for negative constant indices (#219681)
`isInBounds` checked only that the transfer *ends* inside the source:
return cstOp.value() + vectorSize <= sourceSize;
The `in_bounds` attribute promises more than that. Its definition in
VectorOps.td says accesses "(including the starting point)" may run
out-of-bounds when it is "false", so setting it to "true" is a claim
about the start of the transfer as well as its end.
With a negative constant index the two disagree. For
vector.transfer_read %m[-1] : memref<8xf32>, vector<4xf32>
`-1 + 4 <= 8` holds, so the fold set `in_bounds = [true]`, even though
element -1 is read from outside `%m`.
The same expression also overflows for a large enough index: at `index =
2^63 - 1` the addition wraps and the fold again reports `in_bounds =
[true]`. Computing the bound as `sourceSize - vectorSize` instead avoids
the addition entirely; both operands are static, non-negative dimension
sizes, so the subtraction cannot overflow.
This is a spec-conformance fix, not a live miscompile report. A negative
index into a memref is already undefined behaviour, and the masked
lowering would not have caught it either: the guard
`generateInBoundsCheck` emits in VectorToSCF is `memrefDim > index +
iv`, an upper-bound check only.
Adds three regression tests, each of which fails without the change.
Assisted-by: Claude
Commit: b7877e01cb1087d81fd72eb320c3c7d3f8e03500
https://github.com/llvm/llvm-project/commit/b7877e01cb1087d81fd72eb320c3c7d3f8e03500
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-relational-predicate-latch.ll
Log Message:
-----------
[ConstraintElim] Derive an unsigned IV bound from a signed relational latch. (#222762)
For a known non-negative backedge (either via isKnownNonNegative or
because the increment is increasing), 0 <=s PN <= B holds and implies
that B is non-negative as well.
Use that to translate a signed condition to the equivalent unsigned one.
Note that the general signed->unsigned rewrite cannot catch this,
because the precondition also needs rewriting to unsigned.
No llvm-opt-benchmark-nightly impact, but it can help remove runtime
checks generated by sanitizers or Swift code. An end-to-end C example is
https://clang.godbolt.org/z/vbd91MjaM.
Alive2 Proof: https://alive2.llvm.org/ce/z/G3Mv7t
PR: https://github.com/llvm/llvm-project/pull/222762
Commit: 914e15cd29f78e01e15378cfccff97d42e6e9e82
https://github.com/llvm/llvm-project/commit/914e15cd29f78e01e15378cfccff97d42e6e9e82
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[IR] Move the LLVMContext out of ReplaceableMetadataImpl. NFC (#222085)
No ReplaceableMetadataImpl method reads its LLVMContext reference, and
ValueAsMetadata reaches the context through the wrapped Value. Keep the
reference in a derived ReplaceableUsesWithContext, used by the two
owners with no other route to it: MDNode's on-demand RAUW support and
DIArgList.
Rename the base to ReplaceableUses: it is the use map behind RAUW for
the metadata kinds that support it, not a pimpl, and the name matches
ContextAndReplaceableUses and getReplaceableUses().
Make the base destructor protected, since getOrCreate() hands out
ReplaceableUses pointers that must never be deleted. Delete copy
assignment explicitly; the LLVMContext reference suppresses it
implicitly.
sizeof(ValueAsMetadata) 152 -> 144.
Aided by Opus 5
Commit: d44791d35a4b15f3da7855790203ca14f7953410
https://github.com/llvm/llvm-project/commit/d44791d35a4b15f3da7855790203ca14f7953410
Author: averne <45773016+averne at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
Log Message:
-----------
[AMDGPU] IGLP: Sanitize user schedule hints (#221256)
Fixes the following ICE:
```cpp
extern __shared__ int lds[];
__global__
void kern_ice() {
auto _ = lds[threadIdx.x];
__builtin_amdgcn_sched_barrier(~0x380); // Allow all except DS instructions
}
```
See: https://godbolt.org/z/oGfT1TTa4
Commit: cba24d6a935382154b0487d09c1d91a0e2bda04b
https://github.com/llvm/llvm-project/commit/cba24d6a935382154b0487d09c1d91a0e2bda04b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Generalize folding IV increment into phi start value (NFC). (#223260)
simplifyRecipe folds
X = phi(0, IVInc)
IVInc = X + Step
Def = IVInc + Y
into a phi starting at Y, but only if Y is a live-in. Also allow values
defined in the block the phi's start value is coming from, which is
where the value conservatively has to be available.
NFC today, but preparation for modeling the full epilogue skeleton in
VPlan.
Commit: 8e23b6dfccb42a599e82c6a6c1a13bfb0a546c9e
https://github.com/llvm/llvm-project/commit/8e23b6dfccb42a599e82c6a6c1a13bfb0a546c9e
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
Log Message:
-----------
[NFC][AMDGPU] Fix clang-tidy warnings in VOPD related files (#223261)
Commit: 86858de86cb28299ebc9c0ce8a06e5a61ed6b261
https://github.com/llvm/llvm-project/commit/86858de86cb28299ebc9c0ce8a06e5a61ed6b261
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/test/Headers/__clang_hip_math.hip
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[ValueTracking] Propagate non-negativity through fptosi (#217868)
Fixes #217442
`fptosi` is poison when the rounded value does not fit in the result
type, so `computeKnownBits` can assume the conversion rounds towards
zero without wrapping. Negative subnormals and negative zero always
round to 0, so only sources known to never be a negative normal or
negative infinity (i.e. values <= -1.0) can produce a negative result.
This lets InstCombine fold `(int)fabs(x) < 0` to `false`, matching GCC,
and also benefits other magnitude-clamping intrinsics such as sqrt.
Commit: 667efaee701ae5345f4cde42f8b3e5b7f98549ee
https://github.com/llvm/llvm-project/commit/667efaee701ae5345f4cde42f8b3e5b7f98549ee
Author: Benji Smith <6193112+Benjins at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-rotate.ll
Log Message:
-----------
[InstCombine] Fix fold of comparison of rotates (#223263)
rotate(X, AmtX) == rotate(Y, AmtY) -> rotate(X, AmtX - AmtY) == Y
This fold is usually valid, but implicitly assumed that the bit width
was a power of two. This is now checked and the transform doesn't fire
if the bit width isn't a power of two.
Fixes https://github.com/llvm/llvm-project/issues/223262
Commit: 0485ad7e469a56443094872c0f57f2870eccb654
https://github.com/llvm/llvm-project/commit/0485ad7e469a56443094872c0f57f2870eccb654
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/thread-model.c
Log Message:
-----------
clang: Emit the "thread-model" module flag (#223156)
Commit: eb5c148b1cbc89c75a57a505d2533ae52e5bde44
https://github.com/llvm/llvm-project/commit/eb5c148b1cbc89c75a57a505d2533ae52e5bde44
Author: zhouguangyuan0718 <zhouguangyuan.xian at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AArch64/cluster-frame-index.mir
Log Message:
-----------
[MachineScheduler] Order fixed-FI memory operations by object offset (#219669)
## Summary
- sort fixed frame-index memory operands by their explicit stack offsets
- preserve the existing frame-index ordering for ordinary stack objects
and as a tie-breaker
- add an AArch64 MIR regression with fixed objects created out of offset
order
## Background
`BaseMemOpClusterMutation` currently orders frame-index bases by
frame-index number, adjusted for the stack growth direction. Fixed frame
objects are different from ordinary stack objects: they carry explicit
offsets, and their creation order is not required to match address
order.
As a result, a target clustering hook can receive two fixed objects in
reverse address order. AArch64's `shouldClusterFI` expects the incoming
fixed-object offsets to be ordered and aborts with `Object offsets are
not ordered` in an assertions-enabled build.
When both operands refer to fixed frame objects, compare their
`MachineFrameInfo` object offsets first. The existing frame-index
comparison remains the fallback, so the ordering of ordinary stack
objects is unchanged.
Make the ordering between fixed and non-fixed frame-index bases
explicit: non-fixed bases precede fixed bases for downward-growing
stacks, while fixed bases precede non-fixed bases for upward-growing
stacks. This preserves the existing cross-category ordering without
relying on non-fixed object offsets before frame layout.
The regression deliberately creates two fixed objects in an order that
disagrees with their explicit offsets. It covers both the legacy and new
machine-scheduler pass forms.
## AI assistance
OpenAI Codex was used to assist with the investigation, patch
preparation, testing, and drafting this PR description.
Commit: a129f830b8727c51c087db8278035d2c6f08da25
https://github.com/llvm/llvm-project/commit/a129f830b8727c51c087db8278035d2c6f08da25
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Use BitVector for RegisterSet in AsmMatcherEmitter (NFC) (#222525)
This patch replaces std::set with BitVector for RegisterSet in
AsmMatcherEmitter.
Without this patch, RegisterSet is represented as
std::set<const Record *, LessRecordByID>. On targets with large
register files like AMDGPU (~3,000 registers), repeatedly computing set
intersections and subset checks using std::set nodes incurs
significant overhead.
This patch assigns each register record a dense bit index ordered by
LessRecordByID. This allows us to represent RegisterSet as a
BitVector, enabling fast bitwise operations for set intersections and
subset checks.
This reduces the wall-clock time of generating AMDGPUGenAsmMatcher.inc
from 39.53s to 31.32s (a 20.8% speedup) across 3 runs while producing
bit-for-bit identical output across all targets.
Assisted-by: Antigravity
Commit: ac8aca03372551f8a8c999e86e5cb6cbfae3e307
https://github.com/llvm/llvm-project/commit/ac8aca03372551f8a8c999e86e5cb6cbfae3e307
Author: Yousef <yousef.idris01 at bcmail.cuny.edu>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-insert-subvector.mir
M llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
Log Message:
-----------
[GlobalISel] Add KnownBits support for G_INSERT_SUBVECTOR (#215048)
## Summary
Add KnownBits support for `G_INSERT_SUBVECTOR` in GlobalISel value
tracking.
The implementation splits the demanded elements between the original
vector and inserted subvector, ignores overwritten source elements, and
intersects the KnownBits information from the contributing operands.
Part of #150515.
## Testing
- `llvm-lit
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-insert-subvector.mir`
- `llvm-lit llvm/test/CodeGen/AArch64/GlobalISel/knownbits-*.mir`
- 40/40 passed
Commit: 8497b7a259bbc8239d7358dc7bf83eb04b363c76
https://github.com/llvm/llvm-project/commit/8497b7a259bbc8239d7358dc7bf83eb04b363c76
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.d16.tfe.ll
Log Message:
-----------
[AMDGPU] Support TFE D16 format buffer loads on gfx8/10/11/12 (#211465)
gfx90a has no hardware encoding for TFE D16 format buffer loads, so
reject the combination there with a diagnostic. Other targets
(gfx8/10/11/12) do have real encodings, so add codegen support for them
instead of rejecting unconditionally.
Commit: 89c4368a5dab1fe3bbd3fbc4b9717b56154ef64f
https://github.com/llvm/llvm-project/commit/89c4368a5dab1fe3bbd3fbc4b9717b56154ef64f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
Log Message:
-----------
[VPlan] Don't create no-op casts in truncateToMinimalBitwidths. (#223271)
No-op casts get folded to the input operand, which caused applyFlags to
crash if that was not a cast. Fix by avoiding creating such trivial
casts in the first place.
Commit: 82a18cf0c030a1c82ad32f74f1cb8bf67adf1649
https://github.com/llvm/llvm-project/commit/82a18cf0c030a1c82ad32f74f1cb8bf67adf1649
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
A clang/test/Driver/Inputs/mingw_msys2_tree/msys64/mingw32/lib/default-manifest.o
M clang/test/Driver/mingw.cpp
Log Message:
-----------
[Clang][MinGW] Link default-manifest.o if exists (#223084)
Some MinGW distributions provide a pre-compiled manifest xml to disable
the UAC escalation dialog.
Link automatically the manifest only if it exists when linking an
executable.
Do the same as Cygwin (#220875) and align with GCC.
Commit: 9bf40ce33523745e19328924593134e4510bfa5f
https://github.com/llvm/llvm-project/commit/9bf40ce33523745e19328924593134e4510bfa5f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.s.buffer.load.illegal-types.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.illegal-types.ll
Log Message:
-----------
[AMDGPU] Fix s_buffer_load crash for illegal result types (#215483)
i1, i4, v2i1, v3i16, v6i8, and i128 had no SBUFFER_LOAD selection
pattern and crashed
Load a legal i32/vNi32 carrier instead and narrow/bitcast down to the
requested type
Commit: cf530065be1fccbd9ac1d5ccc7d55d80681de41d
https://github.com/llvm/llvm-project/commit/cf530065be1fccbd9ac1d5ccc7d55d80681de41d
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
Log Message:
-----------
[lldb][Process/FreeBSD-Kernel-Core] Dereference stoppcbs based on target kernel version (#222977)
As of `__FreeBSD_version 1400089` stoppcbs is a pointer to the pcbs
array. Dereference stoppcbs on sufficiently new kernels.
Obtained-from:
https://cgit.freebsd.org/src/commit/?id=0f2bb40bc7ddee7ba329d9b344623e2a186b4046
Commit: 4b08871f7ffe6ad818147145f8b6103e6c9b2c95
https://github.com/llvm/llvm-project/commit/4b08871f7ffe6ad818147145f8b6103e6c9b2c95
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A clang/test/Analysis/Scalable/source-edit-generation/multi-tu-conflict-edits-merge.cpp
A clang/test/Analysis/Scalable/source-edit-generation/multi-tu-edits-merge.cpp
Log Message:
-----------
[SSAF][SourceEdit] Wire in 'clang-ssaf-src-edit-merge' and add multi-TU tests (#220372)
With 'clang-ssaf-src-edit-merge', we can test source edits over multiple
translation units: their Replacements are merged before apply. This
covers both clean merges and conflicts.
Commit: e476e76df9b17ace8d12f85616482718901d4854
https://github.com/llvm/llvm-project/commit/e476e76df9b17ace8d12f85616482718901d4854
Author: David Green <david.green at arm.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M llvm/lib/Target/AArch64/AArch64ExpandImm.cpp
M llvm/lib/Target/AArch64/AArch64ExpandImm.h
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Make ImmInsnModel operands optional. NFC (#223280)
This helps make sure we do not use them incorrectly, and should allow
them to
be checked for values in the future.
Commit: e33c1e82dfa3b9f091d5ff8ba81bfb8f6b87134d
https://github.com/llvm/llvm-project/commit/e33c1e82dfa3b9f091d5ff8ba81bfb8f6b87134d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/narrow-to-per-lane-replicates.ll
Log Message:
-----------
[VPlan] Add tests for narrowing users of a widened induction (NFC). (#223277)
Add additional narrowing tests for wide IV including pointer inductions
and FP inductions.
Commit: cc6d78e8eea21e0ddc5376b1700af00e33a77e17
https://github.com/llvm/llvm-project/commit/cc6d78e8eea21e0ddc5376b1700af00e33a77e17
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-scev-address-idioms.ll
M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/predicated-udiv.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
Log Message:
-----------
[VPlan] Fold shifts by zero. (#223276)
Add trivial folds of shifts by zero. This allows us to match IR SCEV
behavior (which looks through trivial shifts), w/o explicitly handling
those in getSCEVExprForVPValue.
Commit: 0c4e1a6b8941babd458e803041abc4d5186361e8
https://github.com/llvm/llvm-project/commit/0c4e1a6b8941babd458e803041abc4d5186361e8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Set the containing plan when creating blocks (NFC). (#223269)
Now that we funnel all VP block creation through VPlan helpers, make
sure the Plan field is set for each block. This means we can remove the
CFG walk to find a Plan's entry.
Also drop an assertion in VPSlotTracker::getOrCreateName: a block now
knows its plan as soon as it is created.
This has a very small positive compile-time impact.
Commit: 462535b1455c639bfb1875b71720d94586a5f650
https://github.com/llvm/llvm-project/commit/462535b1455c639bfb1875b71720d94586a5f650
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A llvm/test/Transforms/InstCombine/known-bits-bitcast-from-fp.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[InstCombine][NFC] Move bitcast from float tests into their own file (#223196)
Commit: c577c6c3f88baddcb2f5368c5cf7f2ca6137b5be
https://github.com/llvm/llvm-project/commit/c577c6c3f88baddcb2f5368c5cf7f2ca6137b5be
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A lldb/test/Shell/Unwind/Inputs/signal-frame-undefined-ra.s
A lldb/test/Shell/Unwind/signal-frame-undefined-ra.test
Log Message:
-----------
[lldb] Test undefined return addresses in signal frames (#223046)
Signal-frame CFI can explicitly mark its return-address register
undefined to represent a terminal synthetic context. This is useful for
contexts such as newly created FreeBSD kernel threads that do not have
an interrupted caller.
Verify that LLDB keeps the signal frame in the backtrace and terminates
the unwind without creating a caller.
Assisted-by: GPT
Commit: bce20f538caf18619a825c689883f652471091d3
https://github.com/llvm/llvm-project/commit/bce20f538caf18619a825c689883f652471091d3
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/machine-csr-names.s
M llvm/test/MC/RISCV/supervisor-csr-names.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Add experimental Smidctrl, Ssidctrl, Smnip, and Ssnip support (#218108)
Add experimental MC support for Smidctrl, Ssidctrl, Smnip, and Ssnip
extensions.
This completes MC support for the ACLIC v0.20 extensions.
Commit: 63d2e62707e8ec6c070a3b258ea81f320920525c
https://github.com/llvm/llvm-project/commit/63d2e62707e8ec6c070a3b258ea81f320920525c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/include/clang/Lex/MacroInfo.h
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPMacroExpansion.cpp
Log Message:
-----------
[clang][Lex] Unique ModuleMacros with a UniquingSet (NFC) (#223270)
This patch migrates ModuleMacros in Preprocessor from llvm::FoldingSet
to llvm::UniquingSet.
ModuleMacro keys on a pair of Module * and const IdentifierInfo *.
Switching to UniquingSet allows us to look up macros with a typed key,
eliminating FoldingSetNodeID serialization at lookup sites and removing
ModuleMacro::Profile.
Assisted-by: Antigravity
Commit: 6d7e7fbafd8d010a3a4146b24e8cca2c8b7dc831
https://github.com/llvm/llvm-project/commit/6d7e7fbafd8d010a3a4146b24e8cca2c8b7dc831
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
A llvm/test/Transforms/InstCombine/uitofp.ll
Log Message:
-----------
[InstCombine] Fold uitofp of masked truncations (#222592)
Fold an unsigned integer-to-floating-point conversion of a masked
truncation by widening the mask and eliminating the truncation:
`uitofp((trunc X) & C)` → `uitofp(X & zext(C))`
Apply the fold when the intermediate instructions have one use and
widening the integer operation is desirable.
This reduces the instruction count on both AMDGPU and NVPTX.
AMDGPU example: https://godbolt.org/z/rTYhM61ce
NVPTX example: https://godbolt.org/z/fWhsrne19
Commit: 9e70d8f070ba046b8e09388fa84b3a65eb2073e3
https://github.com/llvm/llvm-project/commit/9e70d8f070ba046b8e09388fa84b3a65eb2073e3
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/test/SemaCXX/blocks.cpp
Log Message:
-----------
[Clang][NFC] add additional test coverage for default argument parsing errors (#222556)
Fixes #115280
Commit: 291b60a5bc416c8dd81731954680ebd41f599ab5
https://github.com/llvm/llvm-project/commit/291b60a5bc416c8dd81731954680ebd41f599ab5
Author: wanglei <wanglei at loongson.cn>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
Log Message:
-----------
[LoongArch][test] Test 1- and 2-byte subtraction relocations. NFC (#222825)
Add MC tests for 1- and 2-byte subtraction relocations enabled by
#211754.
Commit: dbac421efa19a5901f2511958040e18e8188b112
https://github.com/llvm/llvm-project/commit/dbac421efa19a5901f2511958040e18e8188b112
Author: lntue <lntue at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/src/__support/math/cos.h
M libc/src/__support/math/sin.h
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/cos.bin
A libc/test/src/math/exhaustive/cos.wc
A libc/test/src/math/exhaustive/cos_test.cpp
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/math/exhaustive/exhaustive_test_static_rounding.h
A libc/test/src/math/exhaustive/sin.bin
A libc/test/src/math/exhaustive/sin.wc
A libc/test/src/math/exhaustive/sin_test.cpp
A libc/test/src/math/exhaustive/worst_case_test.h
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
A libc/utils/mathtools/wc_to_bin.py
Log Message:
-----------
[libc][math] Fix fast path with small inputs for double precision sin/cos. (#221012)
https://github.com/llvm/llvm-project/pull/201748 added a fast branch for
small inputs to double precision sin/cos,
but the Ziv error bounds were too tight.
Fixes in this PR:
- Updating the Ziv error bounds to accommodate rounding errors.
- Copy binary64 sin/cos hard-to-round cases from the CORE-MATH project.
- Add python tool to convert textual hard to round cases to binary
files, and add those binary files.
- Add hard-to-round tests for double precision sin/cos in the exhaustive
test folder.
Fixes https://github.com/llvm/llvm-project/issues/220934.
Assisted-by: Gemini is used to generate the worst-case text-to-binary
tool.
Commit: a92db5feb9eb78ae7bf37d969391d9f94f181afb
https://github.com/llvm/llvm-project/commit/a92db5feb9eb78ae7bf37d969391d9f94f181afb
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/TableGen/RegisterByHwMode.td
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[TableGen] Declare <TargetName>RegClassByHwModeTables in MC header (#223292)
When a target uses RegClassByHwMode in CompressPat, the generated
functions reference <TargetName>RegClassByHwModeTables.
Declare it under GET_INSTRINFO_MC_HELPER_DECLS (<Target>MCTargetDesc.h)
so it is visible to MC-layer users such as RISCVBaseInfo.cpp.
Fixes: 700d1f029d00 ("[TableGen] Support RegClassByHwMode in
CompressPat")
Commit: 10b2437880e6d3365f973174f6bce8e07f54f549
https://github.com/llvm/llvm-project/commit/10b2437880e6d3365f973174f6bce8e07f54f549
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M orc-rt/test/unit/CMakeLists.txt
Log Message:
-----------
[orc-rt] Build RTTICrossDylibTestLib with ORC_RT_COMPILE_FLAGS (#223144)
Without ORC_RT_COMPILE_FLAGS, the test library builds with C++ RTTI on
by default. This leads to link errors when the ORC runtime is built with
C++ RTTI turned off.
Commit: 72d03332c0cd0579ad09d00f9086c7cb6035fce0
https://github.com/llvm/llvm-project/commit/72d03332c0cd0579ad09d00f9086c7cb6035fce0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M orc-rt/CMakeLists.txt
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/test/tools/CMakeLists.txt
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/tools/ogre/CMakeLists.txt
Log Message:
-----------
[orc-rt] Add ORC_RT_BEDROCK_LIBRARY_TYPE (STATIC/SHARED) (#223288)
Add CMake options to build bedrock as either a static or shared library.
Default is static.
This is CMake infrastructure only. Shared library builds aren't actually
useable yet: bedrock doesn't export its C++ API, and its C API is
insufficient to do anything interesting. Tools and test code are updated
to link against the -object libraries directly, since they use the
(unexported) C++ API.
Commit: 5fa83314adddbd13e4347ec8fc22e235d5710978
https://github.com/llvm/llvm-project/commit/5fa83314adddbd13e4347ec8fc22e235d5710978
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/test/Driver/sparc-as.c
M clang/test/Misc/target-invalid-cpu-note/sparc.c
M llvm/lib/Target/Sparc/Sparc.td
M llvm/test/CodeGen/SPARC/LeonCASAInstructionUT.ll
M llvm/test/CodeGen/SPARC/readcycle.ll
M llvm/test/MC/Sparc/leon-pwrpsr-instruction.s
Log Message:
-----------
[SPARC] Add LEON5 processor (#222912)
Same target exists in GCC.
Commit: f0f76dbbc4c79e7f05e9ba96e7e0171e0444362e
https://github.com/llvm/llvm-project/commit/f0f76dbbc4c79e7f05e9ba96e7e0171e0444362e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/EHFrameRegistrationPlugin.cpp
Log Message:
-----------
[ORC] Resolve EHFrame registration symbols via lookupAndApply (#223304)
EHFrameRegistrationPlugin::Create resolved its register/deregister
alloc-action addresses with EPC.getBootstrapSymbols. For consistency,
switch to lookupAndApply/recordAddr on the bootstrap JITDylib instead.
Commit: bdf664cf900fcf7aa0d30b730c7e0b752bcd3c89
https://github.com/llvm/llvm-project/commit/bdf664cf900fcf7aa0d30b730c7e0b752bcd3c89
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_attr_getschedparam.cpp
M libc/src/pthread/pthread_attr_getschedparam.h
M libc/src/pthread/pthread_attr_init.cpp
M libc/src/pthread/pthread_attr_setschedparam.cpp
M libc/src/pthread/pthread_attr_setschedparam.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etschedparam (#222991)
This patch implements pthread_attr_setschedparam and
pthread_attr_getschedparam.
Like the schedpolicy patch, this commit only operates on the
pthread_attr_t object and does not attempt to install scheduling
parameters when creating a new thread.
I also don't attempt to validate the priority value here. The valid
priority range depends on the scheduling policy (which may not even be
set yet or could change later), and we can let the kernel validate the
parameters when creating the thread or setting scheduler settings.
While in there:
- update the file headers to the modern llvm format
- use proxy headers instead of direct pthread.h inclusion
Assisted-by: Gemini
Commit: aeefb10b01fb7cf11a1917230f10b663d5ec109b
https://github.com/llvm/llvm-project/commit/aeefb10b01fb7cf11a1917230f10b663d5ec109b
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/IR/Metadata.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[IR] Simplify ValueAsMetadata::handleRAUW. NFC (#223301)
Metadata refers to a Value through its unique ValueAsMetadata wrapper.
When a Value is RAUW'd, handleRAUW reuses the old value's wrapper for
the new value if the new value has none yet; otherwise it moves the uses
to the new value's wrapper, with special cases for a local becoming a
constant, a constant becoming a local, and a value moving to another
function.
Always move the uses (or drop them in the last two cases) and delete the
old wrapper, so that a ValueAsMetadata wraps the same value for its
whole life.
Instruction counts for SLPVectorizer.cpp and X86ISelLowering.cpp at -O2
-g are unchanged (-0.04%, -0.01%).
Aided by Opus 5
Commit: 9a7c7f2b3a40c32e53dcaf2637087851d694cc60
https://github.com/llvm/llvm-project/commit/9a7c7f2b3a40c32e53dcaf2637087851d694cc60
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-widening-add-acc.ll
Log Message:
-----------
[Clang][RISCV] Add packed widening add accumulate intrinsics (#221622)
Add Clang header intrinsics for the RISC-V P-extension packed widening
add accumulate operations:
- __riscv_pwadda_i16x4
- __riscv_pwadda_i32x2
- __riscv_pwaddau_u16x4
- __riscv_pwaddau_u32x2
The header wrappers use generic LLVM IR. RV32 selects the direct
`pwadda.*` / `pwaddau.*` instructions. RV64 lowers the generic IR to the
decomposition specified by the P-extension intrinsic spec, including
`zip16p + pli.h + pm2adda.h/pm2addau.h` for the halfword forms.
Commit: f8c52ad174682e05e222c1456a9f3ad177cf464b
https://github.com/llvm/llvm-project/commit/f8c52ad174682e05e222c1456a9f3ad177cf464b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
Log Message:
-----------
[TargetInstrInfo] Enable instruction size verification by default (#221687)
Enable verification for instruction sizes by default. When emitting
machine code, this checks that the reported instruction size is not
smaller than the actual instruction size. Not under-reporting
instruction sizes is critical for any target that does branch relaxation
(or similar) on MIR.
The default allows over-estimating the size. Targets can opt-in to
precise instruction sizes if they want.
Exclude two instructions on ARM, which report incorrect sizes, but
fixing those sizes breaks the constant islands pass for some reason.
Commit: a9253c774aae777f5c0135d063a3a044612ae48f
https://github.com/llvm/llvm-project/commit/a9253c774aae777f5c0135d063a3a044612ae48f
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/Allocator.h
M llvm/unittests/Support/AllocatorTest.cpp
Log Message:
-----------
[Allocator] Don't overestimate alignment for operator new (#223300)
On many platforms with alignof(max_align_t)=16, when sizeof(T) == 24,
The placement new overestimates the alignment to 16:
`std::min(llvm::bit_ceil(Size), alignof(std::max_align_t)) = min(32, 16) = 16`.
We can use a better estimate: `min(countr_zero(Size),
alignof(max_align_t))`, which is hand-optimized to the form in the code.
Commit: 93d89033cddd47fc512dbe14917fd62d302f4f1d
https://github.com/llvm/llvm-project/commit/93d89033cddd47fc512dbe14917fd62d302f4f1d
Author: ʟᴜɴᴇx <thisissamir04 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
A llvm/test/Transforms/GlobalOpt/CallInst-users-in-GlobalOpt.ll
Log Message:
-----------
[GlobalOpt] Fix assertion failure with CallInst user (#221955)
By removing the unnecessary assertion, which can get
out of sync with GlobalStatus.
Fixes: #221589
Commit: b357d1a4a3573f202b8a1a1cb6ac56c18b7b6faf
https://github.com/llvm/llvm-project/commit/b357d1a4a3573f202b8a1a1cb6ac56c18b7b6faf
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
Log Message:
-----------
[RISCV] Lower f16 to i64 fp_to_[su]int via i32 on RV32 (#222829)
i64 is not a legal type on RV32, so f16 to i64 conversions used to be expanded to a __fixhfdi/__fixunshfdi libcall, which compiler-rt does not provide. f16 is the only FP type whose finite values always fit in an i32 after truncation towards zero, so custom expand them to an i32 conversion plus an extension instead; out of range values and NaN are poison, so the fcvt clamping is acceptable. With only Zfhmin/Zhinxmin the i32 conversion promotes f16 to f32, and both imply F/Zfinx so f32 is always legal. Other FP source types keep using the libcall.
Commit: bc985edd777ff8efab9f161444d4a9ff00c25574
https://github.com/llvm/llvm-project/commit/bc985edd777ff8efab9f161444d4a9ff00c25574
Author: Chris Copeland <chris at chrisnc.net>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
Log Message:
-----------
[CodeGen][test] use -float-abi=soft in 2009-03-29-SoftFloatVectorExtract.ll (#223122)
In #221434, using +soft-float with a hard-float ABI is now an error on
ARM.
This test does not specify a target triple, so it will fail when the
default triple is hard-float ARM. Explicitly specify -float-abi=soft
so the test will continue to use the host triple but force the
soft-float ABI
where applicable.
Commit: badec9b619f3f7d6090d5ae84a60adf416139a15
https://github.com/llvm/llvm-project/commit/badec9b619f3f7d6090d5ae84a60adf416139a15
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.cpp
Log Message:
-----------
[ORC] Resolve unwind-info alloc-actions via lookupAndApply (#223312)
UnwindInfoRegistrationPlugin::Create resolved its register- /
deregister-section alloc-actions with EPC.getBootstrapSymbols. For
consistency, switch to lookupAndApply/recordAddr on the bootstrap
JITDylib instead.
Commit: 109f29a7c0a3910a768fa7dd490ac8f51708b858
https://github.com/llvm/llvm-project/commit/109f29a7c0a3910a768fa7dd490ac8f51708b858
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_uniform_group_instructions/uniform-group-instructions.ll
Log Message:
-----------
[SPIR-V] Print group operation of uniform group instructions as enum (#222540)
Opcodes typed `$groupOp` as i32imm, so the printer emitted 0 instead of
"Reduce" and spirv-as rejected the output
Commit: 20b53106931742d2e5e64132f06994980fe94d7d
https://github.com/llvm/llvm-project/commit/20b53106931742d2e5e64132f06994980fe94d7d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OMPIRBuilder] Avoid use of ConstantExpr::getSizeOf() (#223323)
This will not be supported in ptradd representation. Directly
create a constant with the type size instead.
Commit: a872c86cf07ad71cc4e05a98c5169a27d600d16c
https://github.com/llvm/llvm-project/commit/a872c86cf07ad71cc4e05a98c5169a27d600d16c
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/test/Parser/cxx-extra-semi.cpp
Log Message:
-----------
[Clang][NFC] add test coverage for extra semicolons in parameter lists (#222572)
Fixes #112377
Commit: 61519bf9fa07fed0546c2985a6884b60ca71ca2b
https://github.com/llvm/llvm-project/commit/61519bf9fa07fed0546c2985a6884b60ca71ca2b
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/test/SemaCXX/enum.cpp
Log Message:
-----------
[Clang][NFC] add test coverage for parameter declaration errors (#222562)
Fixes #113465
Commit: ce4f831c9e951be16e80ac83465eb5f6d4dfe3c7
https://github.com/llvm/llvm-project/commit/ce4f831c9e951be16e80ac83465eb5f6d4dfe3c7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
Log Message:
-----------
[CGP] Clear poison generating flags when freezing icmp of constants (#223326)
Followup to https://github.com/llvm/llvm-project/pull/222314. That
PR only dropped the flags for the case where a new freeze instruction
was created, but of course we also need to do this if both operands
are constant and the freeze is dropped entirely.
Commit: fff8f393a9aa7c6199a3efa4e2d8f439f8c0f06e
https://github.com/llvm/llvm-project/commit/fff8f393a9aa7c6199a3efa4e2d8f439f8c0f06e
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_logpoints.py
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Fix logpoint to breakpoint conversion (#222906)
When user sets logpoint and after that removes `logMessage`, which
implicitly converts it to usual breakpoint, breakpoint still has
`BreakpointHitCallback`, which leads to missed stops.
Commit: 0f89e7a6027b9fc93032aa4d154028045ed9018f
https://github.com/llvm/llvm-project/commit/0f89e7a6027b9fc93032aa4d154028045ed9018f
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/lib/Frontend/FrontendActions.cpp
M flang/test/Driver/do_concurrent_to_omp_cli.f90
Log Message:
-----------
[Flang][OpenMP] Show warning for -fdoconcurrent-to-openmp in SIMD only mode (#220943)
The OpenMP feature is considered enabled if either `-fopenmp` or
`-fopenmp-simd` have been passed. However, full OpenMP support is
required in order for the `-fdoconcurrent-to-openmp` option to take
effect.
A warning message that wasn't shown when SIMD-only OpenMP support was
enabled is fixed.
Commit: 860d945db8787845349096521157eabf09be81cb
https://github.com/llvm/llvm-project/commit/860d945db8787845349096521157eabf09be81cb
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[IVDescriptors] Address MonotonicDescriptor post-commit comments (NFC) (#223328)
Commit: 6e071ab17caa0058a83cdd1580026259fdaecb4f
https://github.com/llvm/llvm-project/commit/6e071ab17caa0058a83cdd1580026259fdaecb4f
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/add-imm64-to-sub.ll
Log Message:
-----------
[RISCV] Rewrite ADD to SUB to reuse a materialized negated constant (#221027)
When an ADD needs a large constant whose negation is already
present in the DAG, rewrite (add X, C) into (sub X, -C) so both
share one materialization of -C instead of building it twice.
selectNegImm already does a related rewrite, but only when -C is
strictly cheaper than C and during instruction selection, where the
sibling constant may already have been selected into instructions.
Do it in PreprocessISelDAG instead, before selection, while both are
still ConstantSDNodes that getConstant can unique together. The
rewrite only fires when -C is no more expensive than C and a node
holding -C already exists, so it never adds a materialization.
Fixes https://github.com/llvm/llvm-project/issues/220555
Assisted-by: TRAE CLI (Opus 4.8)
Commit: 6d4ad3383e9b235c0f07a82be141bb57278650af
https://github.com/llvm/llvm-project/commit/6d4ad3383e9b235c0f07a82be141bb57278650af
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
A llvm/test/CodeGen/AMDGPU/si-optimize-exec-masking-andn2-wrexec.mir
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
A llvm/test/CodeGen/AMDGPU/waterfall-loop-exec-update-terminator.mir
Log Message:
-----------
[AMDGPU] Model waterfall loop EXEC update as a terminator (#219519)
Defining a register normally disqualifies an instruction from being a
terminator, so mark it unspillable instead
Skip this at -O0, since RegAllocFast ignores that and spills right after
the def
Commit: 6b5912a441c2236859a7cfe1e5ce3e02a547b588
https://github.com/llvm/llvm-project/commit/6b5912a441c2236859a7cfe1e5ce3e02a547b588
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
Revert "[IVDescriptors] Address MonotonicDescriptor post-commit comments (NFC)" (#223341)
Reverts llvm/llvm-project#223328 (looking into buildbot error, e.g.
https://github.com/llvm/llvm-project/pull/223328#issuecomment-5661919431)
Commit: 1042f3cd8299003876babb567d78540d30c019aa
https://github.com/llvm/llvm-project/commit/1042f3cd8299003876babb567d78540d30c019aa
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][ComplexToStandard] Use negf/subf instead of multiplying by -1 (#222877)
Commit: e8d2def7e7ed18f22a493b72435468225c1047ba
https://github.com/llvm/llvm-project/commit/e8d2def7e7ed18f22a493b72435468225c1047ba
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libcxx/include/__config
M libcxx/include/__new/align_val_t.h
M libcxx/include/__new/global_new_delete.h
M libcxx/src/include/aligned_alloc.h
M libcxx/src/support/new.ipp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.except.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.except.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align.except.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.except.pass.cpp
M libcxx/test/support/test_macros.h
M libcxxabi/src/fallback_malloc.cpp
Log Message:
-----------
[libc++] Provide aligned allocation function iff the compiler claims support (#219199)
There isn't much of a point to providing declarations for aligned
allocation functions but not allowing the compiler to use them. So
either aligned allocations should be allowed to be used via
`-faligned-allocation` or not provided at all.
Commit: 1a2ee398b1fb7c36317a5ad6ae4f92b9f4097c69
https://github.com/llvm/llvm-project/commit/1a2ee398b1fb7c36317a5ad6ae4f92b9f4097c69
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/docs/OpenMP-declare-target.md
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/AutomapToTargetData.cpp
M flang/lib/Optimizer/OpenMP/UnimplementedDeviceCheck.cpp
M flang/test/Integration/OpenMP/declare-target-funcs.f90
M flang/test/Integration/OpenMP/declare-target-named-main-interface.f90
M flang/test/Lower/OpenMP/declare-target-multiple-entry.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPAttrDefs.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/OpenMP/Transforms/FunctionFiltering.cpp
M mlir/lib/Dialect/OpenMP/Transforms/HostOpFiltering.cpp
M mlir/lib/Dialect/OpenMP/Transforms/MarkDeclareTarget.cpp
M mlir/lib/Dialect/OpenMP/Utils/Utils.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid-interface.mlir
Log Message:
-----------
[MLIR][OpenMP] DeclareTargetInterface and DeclareTargetAttr cleanup (#217295)
The changes introduced by this patch are intended to avoid triggering
multiple by name lookups to the "omp.declare_target" attribute every
time any data from the `DeclareTargetInterface` is queried, remove the
need for keeping multiple default values for the same data, clean up the
assembly format and generally improve the usage of the interface.
List of changes:
- `DeclareTargetInterface` only provides `setDeclareTarget` and
`getDeclareTarget` methods to handle the "omp.declare_target" attribute,
maintaining a single canonical way of accessing it.
- `DeclareTargetAttr` provides direct access to the capture clause and
device type enums, rather than wrapping them into an `Attribute`. These
are now mandatory as well. Both changes together make accessing them
more straightforward and simplify the attribute representation.
Commit: 37fe7024f2944f71d58b8608d209bda3254fa43a
https://github.com/llvm/llvm-project/commit/37fe7024f2944f71d58b8608d209bda3254fa43a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/read_image.ll
Log Message:
-----------
[SPIR-V] Add missing read_imageh builtin mapping (#222549)
Commit: c4c4bbaf14303d3e5399487c16ec6a0ff4754386
https://github.com/llvm/llvm-project/commit/c4c4bbaf14303d3e5399487c16ec6a0ff4754386
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libcxx/include/__charconv/to_chars_integral.h
Log Message:
-----------
[libc++][NFC] Remove some unused functions from to_chars_integral.h (#223130)
Commit: d873afedebd0726700ba7f42a5d6e54dba288557
https://github.com/llvm/llvm-project/commit/d873afedebd0726700ba7f42a5d6e54dba288557
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__assert
A libcxx/include/__utility/assume.h
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/test/libcxx/assertions/single_expression.pass.cpp
Log Message:
-----------
[libc++] Optimize string copy construction (#222021)
We know that the string size provided to `__init_copy_ctor_external` is
less than or equal to `max_size()`, so we don't need to do that check
again. Removing that check allows the compiler to ShrinkWrap the small
size path and also removes some unnecessary work in the allocating path.
Commit: 1a31493a5cc8c05db3473ffa35f6c1d1289fcd22
https://github.com/llvm/llvm-project/commit/1a31493a5cc8c05db3473ffa35f6c1d1289fcd22
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
Log Message:
-----------
[libc++] Move _LIBCPP_HAS_COND_CLOCKWAIT into condition_variable.h (#222904)
`_LIBCPP_HAS_COND_CLOCKWAIT` is only used inside
`<__condition_variable/condition_variable.h>`, so we might as well move
it there.
Commit: 59f4a867528eeb8cd8823afb0ee4e5c4d2843741
https://github.com/llvm/llvm-project/commit/59f4a867528eeb8cd8823afb0ee4e5c4d2843741
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pseudo_cmov_lower-bf16.ll
Log Message:
-----------
[X86] Fix `"Cannot select"` for `bf16` vector selects on a scalar condition under `AVX10.2` (#222854)
Fixes #222673
A `select i1 %c, <8 x bfloat> %a, <8 x bfloat> %b` failed instruction
selection with `+avx10.2-512` on a `v8bf16 X86ISD::CMOV`. Selects on a
scalar condition are lowered to the `CMOV_VR*` pseudos and expanded to a
branch, but those pseudos only have patterns for integer and f16
vectors. Before #101603 bf16 vectors were treated as "soft" everywhere,
so `LowerSELECT` bitcast them to `v8i16` first and never produced a bf16
CMOV. That PR made bf16 non-soft under AVX10.2 to enable native
arithmetic, which silently removed the only bf16-aware path in
`LowerSELECT` without adding a replacement. `v16bf16` and `v32bf16` hit
the same thing.
`LowerSELECT` now takes the integer-bitcast path for every bf16 vector,
using the existing `isBF16orSoftF16` helper, so the select is lowered
exactly as it is on every other bf16 target and as `v8f16` is on FP16
targets. Scalar `bf16` is soft-promoted to `f32` before lowering, so it
is unaffected. Added `pseudo_cmov_lower-bf16.ll` alongside the f16
sibling, covering the reproducer plus `v8/v16/v32bf16` on both
`+avx512bf16,+avx512vl` and `+avx10.2-512`.
Commit: 1b97c0daeb67ef7895034a1702ccc04562283ecc
https://github.com/llvm/llvm-project/commit/1b97c0daeb67ef7895034a1702ccc04562283ecc
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.cpp
Log Message:
-----------
[ORC] Resolve JITLoaderGDB alloc actions via lookupAndApply (#223325)
ELFDebugObjectPlugin resolved its RegisterJITLoaderGDB alloc-action
address with EPC.getBootstrapSymbols. For consistency, switch to
lookupAndApply/recordAddr on the bootstrap JITDylib instead.
Commit: eb6d5dd90eb596f8b82632d03d2ad8517df2d764
https://github.com/llvm/llvm-project/commit/eb6d5dd90eb596f8b82632d03d2ad8517df2d764
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[IVDescriptors] Address MonotonicDescriptor post-commit comments (NFC) (#223346)
Commit: f477555c212d2eddd65f5a791b19efe075e2c708
https://github.com/llvm/llvm-project/commit/f477555c212d2eddd65f5a791b19efe075e2c708
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/Memory.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Target/Memory.cpp
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] Memory cache: no overlap and read across cache entries (#222688)
The memory cache keeps two collections of cached bytes, L1 and L2, which
are named confusingly. L2 holds cache lines at aligned addresses, but
each line size is less than or equal to the fixed line size. L1 holds
pieces from arbitrary addresses with arbitrary lengths. This caused two
problems:
1. A lookup had to find every byte it wanted inside a *single*
entry. A range that spanned two adjacent entries missed even when the
two collections together already held every byte of it. The lookup
rejected such a read rather than take part of it from each entry.
2. The pieces could also overlap each other, which made the lookup
incomplete as well as ambiguous. It examined only the piece starting at
or below the address, so a short piece hid a longer one that covered the
whole read. The read missed with the bytes resident.
This change fixes these problems by introducing these properties to the
cache:
- At most one collection holds any given address.
- The line collection holds only whole, aligned lines (`LineCache`).
- The piece collection holds only fragments smaller than a line, and
they never overlap each other (`ChunkCache`).
- A read takes what it needs from consecutive entries in turn until a
miss (`ReadFromCaches`).
- `AddCacheData` (renamed from `AddL1CacheData`) splits incoming bytes
at line boundaries and drops bytes already held, so callers no longer
pick the cache tier.
Disjoint entries make the cache simple to reason about:
- A read no longer depends on which copy of an address is found first,
because there is only one.
- Probing one candidate is now complete. Since entries cannot
overlap, the entry starting at or below an address is the only one
that can hold it. No byte is stored twice.
- Invalidating an address touches one entry, with no second copy
elsewhere to find and drop.
- Callers of the cache need no knowledge of cache internals.
`ReadRanges` also uses `ReadFromCaches`. Previously, each requested
range had to fit entirely within a single cache entry. Ranges can now
be served across multiple entries and line boundaries. For example,
`Process::ReadCStringsFromMemory` reads strings in 256-byte windows.
Because strings start at arbitrary offsets, these windows frequently
span
two adjacent cache lines. Under the old lookup, such a window missed in
`ReadRanges` even when both lines were resident. It now hits from cache
across the line boundary.
`Flush` now drops all cached entries that intersect the range instead of
erasing only the entry matching the start address. It uses saturating
addition to prevent address wraparound. Its runtime is bounded by the
number of cached entries rather than the range size.
`GrowReadRange` isolates the read-ahead policy from `Read`. It aligns
the read address down to the line base so fetches land in `LineCache` as
whole lines. It caps read-ahead to two lines, skips the last line if
already resident, and clips the read at invalid ranges.
Assited-by: claude
Commit: 9271a73e189508743b4b2ad4393f12d5a8132fa9
https://github.com/llvm/llvm-project/commit/9271a73e189508743b4b2ad4393f12d5a8132fa9
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
Log Message:
-----------
[AMDGPU] Mark `SI_WATERFALL_LOOP` as divergent in `hasDivergentBranch` (#218969)
When a vector instruction takes an SGPR source operand, sinking it out
of a loop with divergent exit would cause the vector instruction to only
get the value from the last iteration in the SGPR. However, in a
divergent loop the value of the SGPR operand may vary across iterations,
so the instruction cannot be sink out of the loop as only using the last
value is incorrect. Before this change `SI_LOOP` was marked as divergent
but `SI_WATERFALL_LOOP` was not, allowing such incorrect sinking for
waterfall loops.
Assisted-by: Claude Code
Commit: 611db63efe0456cca4745930977fcdfe64cc25a9
https://github.com/llvm/llvm-project/commit/611db63efe0456cca4745930977fcdfe64cc25a9
Author: MarkVeerasingam <122292447+MarkVeerasingam at users.noreply.github.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
A llvm/test/Instrumentation/DataFlowSanitizer/origin_load_big_endian.ll
Log Message:
-----------
[dfsan] Fix big-endian origin mask (#223247)
Fix the mask used when loading wide shadows on big-endian targets.
The previous expression used a 32-bit integer for the shift, producing
an incorrect zero mask for 64-bit wide shadows. Changed the expression
to use 1ULL so that a 64-bit mask is constructed correctly. The
resulting mask keeps the upper 32 bits and clears the lower 32 bits.
Previously, the big-endian path generated:
```ll
%10 = load i64, ptr %6, align 1
%11 = and i64 %10, 0
```
With this change, it generates:
```ll
%10 = load i64, ptr %6, align 1
%11 = and i64 %10, -4294967296
```
Added a SystemZ big-endian regression test.
cc: @uweigand @anoopkg6
Commit: c46d8f243727b467d8803c4b2430534b348daed1
https://github.com/llvm/llvm-project/commit/c46d8f243727b467d8803c4b2430534b348daed1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/logical-binops-booleanized-leaves.ll
Log Message:
-----------
[SLP]Booleanize logical and/or nodes in the wide leaf type
i1 and/or tree nodes with booleanized wide leaves (one-use truncs of
wide values, zero-tests of values from [0, 1]) are registered in MinBWs
and emitted in the wide type; bit 0 of the result is the final value.
Reviewers: bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/223250
Commit: 27c38b80934067471d7aa7477f894bcb8461a4f3
https://github.com/llvm/llvm-project/commit/27c38b80934067471d7aa7477f894bcb8461a4f3
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/build_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
A llvm/test/CodeGen/AMDGPU/extract-hi16-true16.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-f16-hw.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/frexp-inf-nan-combine.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/scmp.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-vector-shuffle.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fpext.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/ucmp.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector_rebroadcast.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
Log Message:
-----------
[AMDGPU] Select trunc(srl x, 16) as hi16 subregister on true16 (#221960)
Use the high 16 bits of a VGPR directly instead of shifting.
Before:
```
v_lshrrev_b32_e32 v1, 16, v0
v_add_f16_e32 v0.l, v0.l, v1.l
```
After:
```
v_add_f16_e32 v0.l, v0.l, v0.h
```
Example: https://godbolt.org/z/c7bE46hzb
Commit: e9d50d35104db2a3ac87e1280e043a0e7f4f7e4d
https://github.com/llvm/llvm-project/commit/e9d50d35104db2a3ac87e1280e043a0e7f4f7e4d
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/Analysis/explicit-lambda-capture.cpp
Log Message:
-----------
[analyzer] Resolve lambda captures for explicit object parameters (#219726)
Currently explicit object parameters are not modeled in the
`VisitCommonDeclRefExpr` function in `ExprEngine`. Because of this when
a lambda has an explicit object parameter and a possible division by
zero the `core.DivideZero` checker does not emit warning. This PR solves
that issue by deciding if the lambda has an explicit object parameter
and then records the binding (if the parameter has the reference type)
between the parameter and the argument's expression otherwise it returns
the captured field's lvalue.
This PR fixes #218708
Commit: eaab447acac971ed7fbcb51c11343db899ad5ffe
https://github.com/llvm/llvm-project/commit/eaab447acac971ed7fbcb51c11343db899ad5ffe
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/source/Host/common/XML.cpp
Log Message:
-----------
[lldb] Parse XML files without the deprecated SAX1 API (#222974)
SAX1 is deprecated, switch to SAX2 instead.
Commit: 9fda68e41dcb8d19751bc042508eeee8bd9c596a
https://github.com/llvm/llvm-project/commit/9fda68e41dcb8d19751bc042508eeee8bd9c596a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[Clang] Document the interaction of malloc_span and alloc_size (#216967)
The `malloc_span` attribute is intended to be used for
`allocate_at_least`-like functions. Part of that interface is a
guarantee that the number of bytes returned are actually
dereferenceable. Document that, so that we can optimize on it in the
future.
Commit: e9f9afc6042da7cbbf1252702e86783f07cb46f4
https://github.com/llvm/llvm-project/commit/e9f9afc6042da7cbbf1252702e86783f07cb46f4
Author: John Brawn <john.brawn at arm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
A llvm/test/Transforms/SROA/large-alloca.ll
Log Message:
-----------
[SROA] Use SparseBitVector for splittable offsets (#222306)
Doing this means we consume memory proportional to the number of
offsets, not the size of the alloca as before. Inverting the logic so
that rather than initially marking all offsets as splittable then
removing those that aren't, we instead initially have all offsets
unsplittable and only add those that are splittable, means we should
take time proportional to the number of slices, not to the combined size
of slices.
This means we can remove the limit on alloca size, and this approach
should also be faster.
Commit: 0eaa2e690c85224b0afb700e2e33bbf242e55192
https://github.com/llvm/llvm-project/commit/0eaa2e690c85224b0afb700e2e33bbf242e55192
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
A llvm/utils/gn/secondary/llvm/tools/llc/lib/BUILD.gn
Log Message:
-----------
[gn] port 474b7358a90e4f2 (llvm/tools/llc/lib) (#223370)
Commit: 77a26fadb88bdc523ef82bcaec8c7e6217701a57
https://github.com/llvm/llvm-project/commit/77a26fadb88bdc523ef82bcaec8c7e6217701a57
Author: Hung-Kuan Tseng <tseng.tim096 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/test/Dialect/MemRef/elide-reinterpret-cast-load.mlir
Log Message:
-----------
[mlir][memref] Keep memref.load attributes when eliding reinterpret_cast (#221314)
`RewriteLoadFromReinterpretCast` rebuilds the load on the source of the
`memref.reinterpret_cast` with the indices remapped to the non-unit
dimensions, but the rebuilt load carries none of `nontemporal`,
`alignment` or `invariant`:
```mlir
%rc = memref.reinterpret_cast %src to offset: [0], sizes: [1, 1, 8], strides: [8, 8, 1] : memref<1x8xf32> to memref<1x1x8xf32>
%0 = memref.load %rc[%c0, %c0, %i] alignment(16) nontemporal(true) invariant(true) : memref<1x1x8xf32>
// -memref-elide-reinterpret-cast today
%0 = memref.load %src[%c0, %i] : memref<1x8xf32>
```
The rewrite only changes how the same element is addressed, so the three
attributes describe the same access. This forwards them. Same shape of
fix as #221312 for `gpu-decompose-memrefs`.
Commit: 26b9d50cbdff788b70a743da97be30c278c5d79b
https://github.com/llvm/llvm-project/commit/26b9d50cbdff788b70a743da97be30c278c5d79b
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Select the GFX80 encoding family from the subtarget. NFCI. (#219190)
pseudoToMCOpcode() used the D16Buf TSFlag to switch individual instructions to
the GFX80 encoding family on subtargets with UnpackedD16VMem. Select GFX80 for
the whole subtarget instead, and fall back on VI when a pseudo has no GFX80
real. That is what the flag was encoding anyway: only buffer instructions with
unpacked D16 data have a GFX80 encoding.
D16Buf is now unused, so remove it and free up TSFlags bit 50.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 7b579a91dc6b7df584f021e283004043a402571c
https://github.com/llvm/llvm-project/commit/7b579a91dc6b7df584f021e283004043a402571c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port 240670d0d5dc (#223371)
Commit: 1adf54c67fff78a552e5554f0f8fd783511f8334
https://github.com/llvm/llvm-project/commit/1adf54c67fff78a552e5554f0f8fd783511f8334
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port d873afedebd0 (#223372)
Commit: dbe4e7e799bc5e5707334e31dfbc19542388c2ac
https://github.com/llvm/llvm-project/commit/dbe4e7e799bc5e5707334e31dfbc19542388c2ac
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
Log Message:
-----------
[X86] zero-call-used-regs-simd.ll - add baseline test coverage from #212147 (#223339)
Commit: c013403e8eace0714ded0202be1a220c358233d8
https://github.com/llvm/llvm-project/commit/c013403e8eace0714ded0202be1a220c358233d8
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/sve/dup.c
Log Message:
-----------
[clang][cir] Updates SVE tests for dup intrinsics (#222681)
Updates tests for dup intrinsics to match the tests used for classical
code-gen in
* clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c.
This is in preparation for merging the two files.
Commit: 900b3d6aae5735ba040951d0029161c42da52417
https://github.com/llvm/llvm-project/commit/900b3d6aae5735ba040951d0029161c42da52417
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Diagnostic.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/C/C23/n2508.c
M clang/test/C/C2y/n3259.c
M clang/test/C/C2y/n3260.c
M clang/test/C/C2y/n3273.c
M clang/test/C/C2y/n3298.c
M clang/test/C/C2y/n3353.c
M clang/test/C/C2y/n3409.c
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/Lexer/cxx2c-raw-strings.cpp
M clang/test/Lexer/hexfloat.cpp
M clang/test/Misc/warning-flags.c
M clang/test/Parser/cxx2c-delete-with-message.cpp
M clang/test/Sema/c2x-attr.c
M clang/test/Sema/fixed-enum.c
M clang/test/Sema/for.c
M clang/test/Sema/pre-c2x-restrict-qualifier.c
M clang/test/SemaCXX/cxx98-compat-pedantic.cpp
M clang/test/SemaCXX/cxx98-compat.cpp
M clang/test/SemaCXX/reinterpret-fn-obj-pedantic.cpp
Log Message:
-----------
[Clang] Put compat diagnostics in the pedantic group iff ext_warn==false (#220670)
The `compat-pedantic` groups are supposed to be used if a given
extension is only diagnosed in `-Wpedantic`. Update the compat
diagnostics to reflect this and move various diagnostics that already
adhere to this pattern to compat diagnostics.
Commit: bc5c36113551b13e41606573da58334ea17db1ab
https://github.com/llvm/llvm-project/commit/bc5c36113551b13e41606573da58334ea17db1ab
Author: Bastian Hagedorn <bhagedorn at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Target/LLVMIR/nvvm/ex2_invalid.mlir
M mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
Log Message:
-----------
[mlir][NVVM] Add packed EX2 operations (#220501)
Add NVVM dialect operations for the public packed EX2 PTX instructions:
* `nvvm.ex2.f16x2` lowers to `ex2.approx.f16x2`
* `nvvm.ex2.bf16x2` lowers to `ex2.approx.ftz.bf16x2`
The existing scalar `nvvm.ex2` operation is unchanged. Includes LLVM IR
translation tests for both overloads.
Commit: 7421fba54dea2d03ea7b756cc4f0ba248c4e30b3
https://github.com/llvm/llvm-project/commit/7421fba54dea2d03ea7b756cc4f0ba248c4e30b3
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M bolt/lib/Core/Relocation.cpp
A bolt/test/RISCV/relr.s
Log Message:
-----------
[BOLT][RISCV] Support reading RV64 RELR relocations (#222265)
Clang linked with packed relative dynamic relocations aborts when the
RELR reader requests the target relative relocation type. Return
`R_RISCV_RELATIVE` for RV64, preserving the RV32 restriction and other
targets.
Assisted by GPT-6.
Commit: fe72b9678b037eaa71627a503dcc17288f9c3811
https://github.com/llvm/llvm-project/commit/fe72b9678b037eaa71627a503dcc17288f9c3811
Author: Yoni Katzuv <yoni.katzuv at quantum-machines.co>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/test/Analysis/DataFlow/test-staged-analyses.mlir
M mlir/test/Analysis/test-foo-analysis.mlir
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
Log Message:
-----------
[mlir][dataflow] Deduplicate data-flow solver worklist items (#221983)
The solver enqueues a work item every time a state it depends on
changes, so the same item can appear in the worklist many times.
A duplicate work item is re-processed even though its inputs have not
changed since the previous processing. For example, a dense analysis can
visit a join point with N predecessors up to N times in a row.
To deduplicate the worklist, pending items are tracked using a
`DenseSet`, and an item that is already pending is not pushed again.
Items are removed from the set when dequeued, before being visited, so
an analysis can still re-enqueue the point it is currently visiting.
Since analyses already have to be monotone to reach a fixed point, this
change does not affect analysis results, only the number of visits until
convergence. The test `FooState` used XOR for the join operation, which
is not monotone; the join operation was switched to OR and dependent
tests were updated.
A test that counts how many times a join block with several predecessors
is visited was added to check the deduplication.
Commit: b18c59ead34b97b087146cce7513a060d9ea1b85
https://github.com/llvm/llvm-project/commit/b18c59ead34b97b087146cce7513a060d9ea1b85
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
[clang][bytecode] Improve array index and offset add/sub bounds checks wrt. opaque pointers (#223353)
We were previously causing an assertion since the index had more than 64
bits.
Commit: 013599011a6cc2f5a9d4cbeefc24ee44f3023317
https://github.com/llvm/llvm-project/commit/013599011a6cc2f5a9d4cbeefc24ee44f3023317
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGenBuiltins/X86/bmi-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/lzcnt-builtins.c
Log Message:
-----------
[CIR][X86] Emit cir.clz/cir.ctz for lzcnt/tzcnt builtins (#222669)
These x86 builtins were lowered through cir.call_llvm_intrinsic even
though dedicated CIR bit-count ops already exist.
Assisted-by: grok-4.6
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: f196f6a12bf431a28f76d873e4bdeb3dceac679c
https://github.com/llvm/llvm-project/commit/f196f6a12bf431a28f76d873e4bdeb3dceac679c
Author: Matteo Di Iorio <104271382+splicer3 at users.noreply.github.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][Bazel] Add missing F16 math targets (#222937)
Addresses #221799 by adding all existing F16 tests that were missing
Bazel targets.
Validated by running all 184 F16 tests with bazel test.
Commit: b8c7806bd5e3a40ce3fabd8743d73d77e7a417ab
https://github.com/llvm/llvm-project/commit/b8c7806bd5e3a40ce3fabd8743d73d77e7a417ab
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/test/Lower/OpenMP/target-data-use-device-addr-descriptor.f90
Log Message:
-----------
[Flang][OpenMP] Fix use_device_addr descriptor types (#222961)
Fix invalid FIR for assumed-shape arrays in use_device_addr by using
matching descriptor-reference types and loading the descriptor inside
the region. Added tests.
Co-authored-by: Codex <codex at openai.com>
Commit: 26462ac6c2b0a5932a4354957e6e0ba8f4824383
https://github.com/llvm/llvm-project/commit/26462ac6c2b0a5932a4354957e6e0ba8f4824383
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M bolt/unittests/Core/BinaryContext.cpp
M bolt/unittests/Core/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
M bolt/unittests/Core/MemoryMaps.cpp
M bolt/unittests/Profile/CMakeLists.txt
M bolt/unittests/Profile/PerfScripts.cpp
Log Message:
-----------
[BOLT][RISCV] Add basic RISC-V initialization support for unit tests (#222883)
This change addresses the uninstantiated test suite failures in
RISC-V-only builds discussed in #217604. That PR proposed a temporary
workaround using GTEST_ALLOW_UNINSTANTIATED_PARAMETERIZED_TEST.
Add the basic setup needed to instantiate and initialize the existing
test suites for riscv64, including the correct ELF machine type and
subtarget features, and remove the temporary allowances.
Commit: 67397010eb5541f08fcdbb8be86b8b799ca88142
https://github.com/llvm/llvm-project/commit/67397010eb5541f08fcdbb8be86b8b799ca88142
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
Log Message:
-----------
[ORC] Use lookupAndApply for EPCGenericRTDyldMemoryManager (#223377)
EPCGenericRTDyldMemoryManager::CreateWithDefaultBootstrapSymbols
resolved its memory-manager and EH-frame symbol addresses with
EPC.getBootstrapSymbols. For consistency, switch to
lookupAndApply/recordAddr on the bootstrap JITDylib instead.
Commit: 9008f496e3dd414cb25aedd47168bc83bf52f470
https://github.com/llvm/llvm-project/commit/9008f496e3dd414cb25aedd47168bc83bf52f470
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
M llvm/test/CodeGen/AMDGPU/barrier-addrspace-dereference.ll
M llvm/test/CodeGen/AMDGPU/null-named-barrier-gv.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-byte-ptr-cast.ll
Log Message:
-----------
AMDGPU: Use subarch triples in new tests added since all were converted (#223385)
Commit: 004d5960e8e187b1e2b4a55e6221399aa076c258
https://github.com/llvm/llvm-project/commit/004d5960e8e187b1e2b4a55e6221399aa076c258
Author: Zihao Wang <rekind133 at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
A llvm/test/CodeGen/X86/vector-partial-reduce-fmla-bf16.ll
A llvm/test/CodeGen/X86/vector-partial-reduce-fmla-f16.ll
A llvm/test/CodeGen/X86/vector-partial-reduce-smla.ll
A llvm/test/CodeGen/X86/vector-partial-reduce-sumla.ll
A llvm/test/CodeGen/X86/vector-partial-reduce-umla.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/partial-reduce-dot-product.ll
Log Message:
-----------
[X86][CodeGen] Support partial-reduce dot products (#205373)
Part of #187779
Lower the llvm.vector.partial.reduce dot product shapes onto the X86 dot
product instructions:
i8 x i8 -> i32: vpdpbusd (AVX512-VNNI, AVX-VNNI)
vpdpbssd / vpdpbuud (AVX-VNNI-INT8, AVX10.2)
i16 x i16 -> i32: vpdpwssd (AVX512-VNNI, AVX-VNNI)
vpdpwsud / vpdpwuud (AVX-VNNI-INT16, AVX10.2)
bf16 x bf16 -> f32: vdpbf16ps (AVX512-BF16)
f16 x f16 -> f32: vdpphps (AVX10.2)
The 128/256-bit shapes, and the 512-bit shapes on targets using 512-bit
registers, are registered as Custom. 512-bit shapes for which only the
VEX
encoding exists are split into two 256-bit dot products, and the
128/256-bit
shapes are widened to 512 bits on targets without VLX.
Teach X86TTIImpl::getPartialReductionCost about these shapes, costing
one
dot product per legal accumulator vector and otherwise falling back to
the
generic expansion cost, so that LoopVectorize can form partial
reductions
for them.
The DAG combiner forms partial reductions with narrower-than-legal types
when the widened shape is supported, so also widen the integer
PARTIAL_REDUCE_*MLA results the same way as PARTIAL_REDUCE_FMLA (expand,
then widen).
Commit: a55e86582aeac1d4af64fa315ed49764c3981fad
https://github.com/llvm/llvm-project/commit/a55e86582aeac1d4af64fa315ed49764c3981fad
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN permlane builtins (#223161)
Adds codegen for the following AMDGCN permlane builtins:
- __builtin_amdgcn_permlane_bcast
- __builtin_amdgcn_permlane_up
- __builtin_amdgcn_permlane_down
- __builtin_amdgcn_permlane_xor
These are lowered to the corresponding `llvm.amdgcn.permlane.*`
intrinsics.
Assisted by: Claude Opus 5
Commit: 1af17ef01973f915ccbd168c01da1718097fd7f8
https://github.com/llvm/llvm-project/commit/1af17ef01973f915ccbd168c01da1718097fd7f8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h
M llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/SimpleRemoteEPCUtilsTest.cpp
Log Message:
-----------
[ORC] Carry out-of-band errors in SimpleRemoteEPC results (#223378)
ORC Wrapper functions may produce out-of-band error results (e.g. due to
serialization errors), but SimpleRemoteEPC / SimpleRemoteEPCServer never
handled these cases (they incorrectly asserted that they never
appeared).
Update the SimpleRemote protocol to use the TagAddr field (previously
unused for result messages) to encode Result message kinds: either a
Value, or an OutOfBandError. This allows out-of-band errors to flow
across the wire and be passed as results to their callers.
encodeResultMessage and decodeResultMessage implement the format /
handling: out-of-band errors (or failures to deserialize out-of-band
errors) are now passed to handlers as out-of-band error results. An
invalid Result message kind in the TagAddr field results in an
llvm::Error, ending the session.
SimpleRemoteEPCUtilsTest covers both kinds' round-trips, an unrecognized
kind, and a malformed out-of-band payload.
Commit: ea4b78c309418a395d3a36e3319d65c4cfd9f2b4
https://github.com/llvm/llvm-project/commit/ea4b78c309418a395d3a36e3319d65c4cfd9f2b4
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
Log Message:
-----------
[analyzer] Chain checkers in runCheckersForEndFunction (#220970)
The function `runCheckersForEndFunction` had an unusual behavior that it
invoked the callbacks in parallel (introducing a new execution path for
each checker callback that produced a transition), unlike all other
analogous functions, which "chained" the checkers, executing them after
each other.
This behavior was introduced before 2011, when this callback was called
`check::EndPath`, to ensure that the `EndPath` callbacks are _final_ and
nodes created by them end up at the end of the execution path. When
interprocedural analysis (inlining functions) was introduced in 2013,
the callback was renamed to `EndFunction` (to reflect that it also
activates at the end of inlined functions), but the unusual behavior was
preserved.
There were 8 "real" checkers with `check::EndFunction` callbacks, but
most of them only created error nodes or did "nice to have" cleanup, so
the irregular behavior of this callback did not cause visible trouble.
However, none of the checkers actually _relies_ on the parallel
execution of the callbacks and the unusual transition pattern seriously
violates the established patterns of the analyzer; so this commit
rewrites `runCheckersForEndFunction` to follow the standard logic.
This may slightly perturb the analysis results (because it changes the
"shape" of the exploded graph), but -- based on my review of the
upstream EndFunction checkers -- should not cause any directed
functional changes.
For more background details see also the github review comments at
https://github.com/llvm/llvm-project/pull/217319#discussion_r3812950071
Commit: d57b857099bddf47c83317e64195d795015cabbd
https://github.com/llvm/llvm-project/commit/d57b857099bddf47c83317e64195d795015cabbd
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN] Deduplicate compare expressions creation (NFC) (#223389)
Minor opportunity to create GVN expressions for cmp instructions via
existing dedicated `createCmpExpr` handler.
Commit: 8ab8773287c30cedd6e4cd60d044c73243f3e64f
https://github.com/llvm/llvm-project/commit/8ab8773287c30cedd6e4cd60d044c73243f3e64f
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Use lookupAndApply for SharedMemoryMapper syms (#223379)
createSharedMemoryManager resolved the SharedMemoryMapper instance and
wrapper addresses with EPC.getBootstrapSymbols. For consistency, switch
to lookupAndApply/recordAddr on the bootstrap JITDylib instead.
Commit: af6169a51a30d46ff5daaca3f7d4e7cf41a17ce4
https://github.com/llvm/llvm-project/commit/af6169a51a30d46ff5daaca3f7d4e7cf41a17ce4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
Log Message:
-----------
[clang-repl] Resolve mapper symbols via lookupAndApply (#223383)
IncrementalExecutor's createSharedMemoryManager resolved the
SharedMemoryMapper instance and wrapper addresses with
EPC.getBootstrapSymbols. For consistency, switch to
lookupAndApply/recordAddr on the bootstrap JITDylib instead.
Commit: 4df93e3b7b1ece75ec6b93971fc1d86fb093a72d
https://github.com/llvm/llvm-project/commit/4df93e3b7b1ece75ec6b93971fc1d86fb093a72d
Author: robertvirany <robertvirany at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
A llvm/test/CodeGen/NVPTX/clmad.ll
Log Message:
-----------
[NVPTX] Add clmad instruction selection (#216412)
Add instruction selection for the PTX 9.3 `clmad.{lo,hi}.u64`
instructions on SM80 and newer targets.
Select `clmad` for `i64` carryless multiply-add expressions represented
as an XOR of `ISD::CLMUL` or `ISD::CLMULH` with an accumulator.
Standalone carryless multiplies are selected as `clmad` with an
immediate zero-accumulator.
The first commit precommits tests showing the existing SelectionDAG
expansion.
Commit: 41a620da5a34d3e6256dc25e0c7c51c4afa8576d
https://github.com/llvm/llvm-project/commit/41a620da5a34d3e6256dc25e0c7c51c4afa8576d
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/source/Target/Memory.cpp
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] Fix 32-bit narrowing conversions in the memory cache (#223402)
#222688 broke the 32-bit Arm bots. `lldb-arm-ubuntu` fails to
build `Memory.cpp`:
```
lldb/source/Target/Memory.cpp:187:49: error: non-constant-expression cannot be narrowed from type 'lldb::offset_t' (aka 'unsigned long long') to 'size_t' (aka 'unsigned int') in initializer list [-Wc++11-narrowing]
187 | InsertData(addr, {data_buffer_sp->GetBytes(), data_buffer_sp->GetByteSize()});
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
`DataBuffer::GetByteSize` returns `lldb::offset_t`, which is always 64
bits wide, while the `llvm::ArrayRef` constructor takes a `size_t`.
Where
`size_t` is 32 bits the conversion narrows, and a braced initializer
list
rejects a narrowing conversion that is not a constant expression. The
same code compiles on a 64-bit host because there `size_t` is just as
wide
as `offset_t` and nothing narrows.
`DataBuffer::GetData` already returns the whole buffer as an
`llvm::ArrayRef<uint8_t>`, so use it rather than build the same
`ArrayRef`
from a pointer and a length.
`MemoryTest.cpp` has eight more of the same error, which the bot never
reported because the build stopped at the first one. They share a single
cause: `line` holds the cache line size, but it was declared `addr_t`
and
the `Chunk` field it initializes is a `size_t`. Give it the type
`MemoryCache::GetMemoryCacheLineSize` returns, `uint32_t`, which is also
the right domain for a size rather than an address.
Assisted-by: claude
Commit: 6fd0ee2150ab3297ae89cbc64e98f588886906c9
https://github.com/llvm/llvm-project/commit/6fd0ee2150ab3297ae89cbc64e98f588886906c9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
M llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Return a SCEVUse from getAddExpr and propagate use flags. (#220007)
Add option to pass SCEVUse-specific flags to getAddExpr and propagate
them through, if valid conservatively. That is, the final expression
adds the same operands (potentially in different order). For example, it
is not valid to propagate the use flags if other (sub-)expressions have
been inlined.
It also includes a few mechanical changes, to update users that still
expected const SCEV *.
This slightly simplifies
https://github.com/llvm/llvm-project/pull/217378, which introduces the
first end-to-end user of SCEVUse.
PR: https://github.com/llvm/llvm-project/pull/220007
Commit: 16884524477d711aabd67b9d4417667463f62603
https://github.com/llvm/llvm-project/commit/16884524477d711aabd67b9d4417667463f62603
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/test/CodeGen/SystemZ/zos-align-constpool.ll
Log Message:
-----------
[SystemZ][z/OS] Align constant pool (#222980)
Follow-up to #222128: The call to emit the alignment was places on the
wrong line but the test did not catch it because it checked only the
textual output (which never emits the error message). Fix is to move the
call and update the test.
Commit: 59f5719cac1c1781988255aca7d598a8a48651f9
https://github.com/llvm/llvm-project/commit/59f5719cac1c1781988255aca7d598a8a48651f9
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/FunctionCognitiveComplexityCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
A clang-tools-extra/test/clang-tidy/checkers/readability/function-cognitive-complexity-alias.cpp
Log Message:
-----------
[clang-tidy] Fix function-cognitive-complexity crash on aliases (#222965)
Only match function definitions that have a body, since declarations
with the alias attribute satisfy `isDefinition()` without providing one.
Fixes #222958
Commit: 68a20cedb4548b5d8c89f4676bd80cb480ae3591
https://github.com/llvm/llvm-project/commit/68a20cedb4548b5d8c89f4676bd80cb480ae3591
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode] Simplify Pointer::getByteOffset() (#223382)
Return `Offset` directly, except for block pointers. This also allows us
to remove `getRawOffset()`.
Commit: b3aa937cf54fe348a550cb6017f825d63af7dd49
https://github.com/llvm/llvm-project/commit/b3aa937cf54fe348a550cb6017f825d63af7dd49
Author: Xu <1483685464 at qq.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bit-counting.ll
M llvm/test/CodeGen/PowerPC/popcnt-zext.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/pr56457.ll
M llvm/test/CodeGen/X86/ctpop-mask.ll
M llvm/test/CodeGen/X86/masked_compressstore.ll
M llvm/test/CodeGen/X86/masked_expandload.ll
M llvm/test/CodeGen/X86/popcnt.ll
Log Message:
-----------
[CodeGen] Optimize ctpop expansion using computeKnownBits (#221671)
The current SWAR popcount implementation always uses the full register
width for the final accumulation step. Even when the input type is much
smaller, such as when counting the bits of an `i8` value, we still use
32-bit operations to extract the result. This patch uses
`computeKnownBits` to determine the minimum number of bits actually
needed to represent the popcount result, and uses this information to
optimize the SWAR popcount expansion.
Commit: 8e6039458ad08d5ed7aaaac08a7db19499a98882
https://github.com/llvm/llvm-project/commit/8e6039458ad08d5ed7aaaac08a7db19499a98882
Author: Hung-Kuan Tseng <tseng.tim096 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
A mlir/test/Integration/GPU/CUDA/TensorCore/wmma-transposed-store-f16.mlir
Log Message:
-----------
[mlir][vector-to-gpu] Lower transposed transfer_write to a transposed MMA store (#221248)
`convert-vector-to-gpu` lowers a `vector.transfer_read` whose
permutation
map puts the most minor dimension first to a `transpose` MMA load since
18ecdbfe6c74, but still rejects the same shape of
`vector.transfer_write`:
```mlir
// Lowered to gpu.subgroup_mma_load_matrix ... leadDimension 3 transpose
%0 = vector.transfer_read %a[%c0, %c0], %f {in_bounds = [true, true], permutation_map = affine_map<(d0, d1) -> (d1, d0)>} : memref<5x3xf16>, vector<3x5xf16>
// Left alone
vector.transfer_write %1, %b[%c0, %c0] {in_bounds = [true, true], permutation_map = affine_map<(d0, d1) -> (d1, d0)>} : vector<3x5xf16>, memref<5x3xf16>
```
The TODO in `transferWriteSupportsMMAMatrixType` waits for a transpose
attribute on the GPU dialect op. `gpu.subgroup_mma_store_matrix` has had
one since 3d35546cd168, and both the NVVM and the SPIR-V lowerings
honour
it, so this classifies the write the same way as the read and sets the
attribute. `leadDimension` already comes from the position of the map
dimensions, so the stride helper is unchanged.
Tests: the existing `no_convert_write_transpose` becomes a positive
test,
plus the 3-D and 4-D strided cases and a not-last-dim negative case,
mirroring the read side. A tensor core integration test runs a
transposed
`transfer_write` through `convert-vector-to-gpu` and the NVVM pipeline
and
checks the stored matrix; it passes on an RTX 3070 (sm_86).
Commit: 1fc9d6f0272f5bd6213170b0b50ac745b14c5b18
https://github.com/llvm/llvm-project/commit/1fc9d6f0272f5bd6213170b0b50ac745b14c5b18
Author: Owen Anderson <resistor at mac.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/test/CodeGen/RISCV/cheri-global-bounds.ll
Log Message:
-----------
[CHERI][RISCV] Do not attempt to pass in an alignment granule for globals with explicit sections. (#218189)
This can break existing code where that depends on the lack of padding
between variables, e.g. linker sets.
Commit: 86204df4a5d7eeb28b017ac3ebe9a07a7a088e28
https://github.com/llvm/llvm-project/commit/86204df4a5d7eeb28b017ac3ebe9a07a7a088e28
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/CodeGen/WebAssembly/wasm-exception-model-flag-parse-ir-input.ll
M clang/test/Driver/ir-exception-model.c
M clang/test/Driver/wasm-toolchain.c
M llvm/include/llvm/Support/CodeGen.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/test/CodeGen/WebAssembly/eh-option-errors.ll
Log Message:
-----------
WebAssembly: Introduce ExceptionHandling::EmscriptenEH model (#221443)
Add a dedicated EmscriptenEH exception model so the control uses
the standard exception model control, instead of relying on a backend
specific cl::opt. This will later migrate to a module flag and
remove -enable-emscripten-cxx-exceptions
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: beffe43b9edbf24b2066b9e556263eec19d51ba9
https://github.com/llvm/llvm-project/commit/beffe43b9edbf24b2066b9e556263eec19d51ba9
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
Log Message:
-----------
[AMDGPU][GISel] Do not scalarize uniform v2f16/v2bf16 operations (#222359)
Previously, register bank legalization would scalarize uniform v2f16 and
v2bf16
floating-point operations on targets with hasSALUFloat (GFX12+) using
the ScalarizeToS16 action. This approach had two problems:
1. It fails for v2bf16 types because there are no scalar bf16
instructions - the scalarization produces illegal bf16 operations
that cannot be selected.
2. Scalar f16 instructions exist, but scalarization is suboptimal.
Packed instructions
like v_pk_add_f16, v_pk_mul_f16, etc. are more efficient than
unpacking to two separate s16 operations.
This patch removes the ScalarizeToS16 rules and instead adds
unconditional .Uni(V2S16) rules that always use
packed VGPR operations for uniform cases.
Operations modified:
- G_FADD, G_FMUL, G_STRICT_FADD, G_STRICT_FMUL
- G_FSUB, G_STRICT_FSUB
- G_FMA, G_STRICT_FMA
- G_FNEG, G_FABS
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 9f3417b8e4ef6dfdfe3cdadf9447d7e108f9410f
https://github.com/llvm/llvm-project/commit/9f3417b8e4ef6dfdfe3cdadf9447d7e108f9410f
Author: laoshd <shandong.lao at hpe.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/clause-validity01.f90
Log Message:
-----------
[FLANG][OMP] Add error message for invalid dependence type in taskwait construct (#219234). (#220837)
This PR is to fix #219234.
Commit: c4a8bda414e835652b3a75a83660e70419d0c8af
https://github.com/llvm/llvm-project/commit/c4a8bda414e835652b3a75a83660e70419d0c8af
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-sret-res-attrs.c
A clang/test/CIR/Transforms/abi-lowering/dropped-return-res-attrs.cir
Log Message:
-----------
[CIR] Drop res_attrs when a rewritten return has no result (#222465)
An Indirect return moves the value to an sret pointer argument the pass
inserts, and an Ignore return drops it, so the rewritten func or call
has no result for the per-result `res_attrs` array to describe. The
function rewrite and both call rewrites now remove it.
Assisted-by: Cursor / claude-opus-5
Commit: 0e8fd3609aae9dab8e24953a126c1a97871cc7fc
https://github.com/llvm/llvm-project/commit/0e8fd3609aae9dab8e24953a126c1a97871cc7fc
Author: Liza Burakova <liza at chromium.org>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lld/MachO/SyntheticSections.cpp
Log Message:
-----------
[lld-macho] Parallelize ObjFile::sourceFile() during STABS emission. (#222087)
This is part of the ld64.lld performance improvements tracked by #222068
Currently, SymtabSection::emitStabs() calls emitBeginSourceStab() it
passes in file->sourceFile(), which will call
ObjFile::sourceFile(). This method reads the component's root DIE, which
is a bottleneck when done serially as at this stage the DWARF sections
have not been parsed yet.
This commit parallelizes the calls to ObjFile::sourceFile(), as we
already have the file ids stable sorted.
AI tool use: this is one of the commits that was prototyped by AI. I
rewrote this commit and ran the benchmarking myself.
**Benchmark for mac_debug_component_sym_2**
LLD Baseline
Time (mean ± σ): 8.630 s ± 0.479 s [User: 7.170 s, System: 2.012 s]
Range (min … max): 8.147 s … 9.661 s 20 runs
LLD Optimized
Time (mean ± σ): 8.149 s ± 0.373 s [User: 7.410 s, System: 2.206 s]
Range (min … max): 7.804 s … 9.507 s 20 runs
LLD Baseline 2
Time (mean ± σ): 8.365 s ± 0.347 s [User: 7.097 s, System: 1.922 s]
Range (min … max): 8.036 s … 9.146 s 20 runs
Commit: c9e11e5cfa1216f2eebb2f11eaf84cd081790926
https://github.com/llvm/llvm-project/commit/c9e11e5cfa1216f2eebb2f11eaf84cd081790926
Author: Hung-Kuan Tseng <tseng.tim096 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/test/Dialect/GPU/decompose-memrefs.mlir
Log Message:
-----------
[mlir][gpu] Keep memref.load/store attributes in decompose-memrefs (#221312)
`gpu-decompose-memrefs` rewrites a `memref.load`/`memref.store` inside a
`gpu.launch` into a `reinterpret_cast` to the linearised offset plus a
0-d access, but rebuilds the op from the new memref only. `nontemporal`,
`alignment` and `invariant` are dropped from the load, `nontemporal` and
`alignment` from the store:
```mlir
%res = memref.load %arg0[%tx, %ty, %tz] alignment(16) nontemporal(true) invariant(true) : memref<?x?x?xf32>
// becomes
%1 = memref.load %reinterpret_cast[] : memref<f32, strided<[], offset: ?>>
```
The rewrite accesses the same element with the same type, so all of
them still hold on the new op. Pass them to the builder; the attribute
form is the one that also carries `invariant`.
Tests: a load and a store case next to the existing `@decompose_load`
and `@decompose_store`.
AI tool use: I worked on this patch together with an AI assistant
(Claude Code).
Every line of the change and the tests was reviewed and verified by me,
and I am
accountable for it.
Assisted-by: Claude Code
Commit: 00904375820021cc66686504b861f9c0f428a960
https://github.com/llvm/llvm-project/commit/00904375820021cc66686504b861f9c0f428a960
Author: Hugo Pompougnac <tech at hugo-pompougnac.fr>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
M mlir/lib/Dialect/MemRef/Utils/CMakeLists.txt
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
A mlir/test/Dialect/Linalg/hoist-redundant-vector-transfers.mlir
M mlir/test/Dialect/Linalg/hoisting.mlir
Log Message:
-----------
[mlir][linalg] Hoist transfer pairs through disjoint subview slices (#220244)
`hoistRedundantVectorTransfers` previously bailed whenever a transfer
pair was based on a view like `memref.subview`, since another view of
the same buffer could alias it. This patch replaces that blanket bail
with an actual aliasing check: the pair is hoisted when no other access
to the base's underlying buffer in the loop conflicts with it, i.e.
every other access is either the matching read/write or a slice provably
disjoint from the base's static per-dimension footprint. When the base
has no static footprint (e.g. a dynamic subview offset or a
collapse_shape root), the pair still hoists as long as nothing else in
the loop touches the buffer; otherwise it conservatively bails.
The check is implemented as a reusable utility
`memref::hasNoAliasingAccessInScope` in MemRefUtils, and the existing
lone-read path (noAliasingUseInLoop) is unified onto it.
Adds lit tests: positive cases for disjoint static subviews, a dynamic
(loop-invariant) offset, and a collapse_shape root; negative cases for
overlapping subviews and an aliasing non-transfer memory effect.
Assisted-by: Claude Code (Anthropic)
Commit: be6a2b4fddb62515049789e292fa166790a5707b
https://github.com/llvm/llvm-project/commit/be6a2b4fddb62515049789e292fa166790a5707b
Author: Utpal Bora <utpal.bora at cl.cam.ac.uk>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/sve-non-native-interleaved-accesses.ll
Log Message:
-----------
[AArch64] Prohibit vectorizing non-native [de]interleaved pattern for fixed-length SVE (#219244)
This patch prevents LoopVectorize from using non-native interleaved
memory access groups with wider fixed-length SVE.
For wider fixed-length SVE, non-native factors produce awkward wide
shuffles that lower poorly with extra permutes, scalar lane moves, and
sometimes stack traffic. Native interleave factors and NEON-sized fixed
vectors remain allowed.
Commit: 09be00c800cf9ae03a2c8fbdc215c259ac39f30f
https://github.com/llvm/llvm-project/commit/09be00c800cf9ae03a2c8fbdc215c259ac39f30f
Author: David Green <david.green at arm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/fptrunc.ll
A llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerTypes.td
M llvm/utils/TableGen/Common/GlobalISel/MatchTable/Matchers.cpp
Log Message:
-----------
[GlobalISel][AArch64] Do not remove dst type predicates from pattern children nodes. (#221576)
Given an instruction with a non-concrete type (G_CONCAT_VECTOR), with a
child pattern instruction with a concrete type (G_FPTRUNC), the concrete
type check for the child would incorrectly be removed. This patch makes
sure they remain. This makes the match table a little larger, but many
should be able to be optimized away (providing that the two operands
with the same type can be matched up).
Fixes #221458
Commit: dcb540e0f268e0de3f22940bd854d079be24415d
https://github.com/llvm/llvm-project/commit/dcb540e0f268e0de3f22940bd854d079be24415d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-variant.cpp
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[OpenMP] Rename Assocation::LoopSeq to Association::LoopSequence, NFC (#223405)
This will match the name used in spec.
Commit: bb3861e8e155eee3f403e290f633d5a4a04570db
https://github.com/llvm/llvm-project/commit/bb3861e8e155eee3f403e290f633d5a4a04570db
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 0090437 (#223437)
This fixes 00904375820021cc66686504b861f9c0f428a960 (#220244).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=00904375820021cc66686504b861f9c0f428a960
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 3b8919bc85f33419acd3ac096a4265db3f41a32f
https://github.com/llvm/llvm-project/commit/3b8919bc85f33419acd3ac096a4265db3f41a32f
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Add `getLocalMemorySize` and `getAddressableLocalMemorySize` to TargetParser (#220718)
The number of SIMDs a work-group runs on is a per-kernel mode rather
than a property of the GPU, so it stays a parameter.
Commit: 4eba5bce282ded21bb912b22aae4aa91e27818da
https://github.com/llvm/llvm-project/commit/4eba5bce282ded21bb912b22aae4aa91e27818da
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/cgp-usubo.ll
M llvm/test/CodeGen/X86/subcarry.ll
Log Message:
-----------
[DAGCombiner] Require a 0/1 carry-in when rebuilding a borrow chain (#223396)
combineOrOfSetCCToUSUBOCarry (aae871ba1224) rewrites
carry_out = (A <u B) | ((A == B) & carry_in)
to USUBO_CARRY(A, B, carry_in), accepting any value as carry_in.
USUBO_CARRY's third operand is specified as "1 if and only if there is
an incoming carry/borrow", so 0 and 1 are its only meaningful values.
Unlike SADDO_CARRY/SSUBO_CARRY it does not fall back to
getBooleanContents for wider types. The matched `and` is bitwise against
a 0/1 setcc, so only bit 0 of carry_in reaches carry_out and nothing
else constrains it; a carry_in with any other bit set is outside the
operand's contract and miscompiles.
Require carry_in to be known 0/1. Check known bits rather than look for
an `and carry_in, 1`: only bit 0 is demanded inside the `and`, so such a
mask is usually folded away before this combine runs. An i1 carry_in,
which is what a real borrow chain produces, passes trivially.
Fixes #222839.
Assisted-by: Claude Code
Commit: b3f2a866c206f2976cb2c3b551f6f3e3e261516d
https://github.com/llvm/llvm-project/commit/b3f2a866c206f2976cb2c3b551f6f3e3e261516d
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/configuration.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/Makefile
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/TestStepThroughTrampolineWithSymbol.py
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/add.c
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/add.h
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/main.c
Log Message:
-----------
[lldb] Fix library step-in when the binary is linked with MOLD (#178695)
The mold linker adds a function symbol to the symbol table (.symtab) for
every shared library exported function.
So if we try to step into a library, lldb will fail because the symbol
at the address is not a trampline function.
Example:
```cpp
// lib.c
int lib_add(int a, int b);
```
when we link the library to an executable, mold will create the normal
trampoline functions in the .plt section but add an extra symbol in
symbol table `lib_add$plt`.
Commit: 688119653fd40fa46244e1c300e728677a4f001a
https://github.com/llvm/llvm-project/commit/688119653fd40fa46244e1c300e728677a4f001a
Author: jon-gibney <jonathon.gibney at hpe.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/test/Fir/convert-to-llvm-unsafe-fp-conversion.fir
Log Message:
-----------
[flang] Respect math flags during conversions (#214311)
We normally use saturating intrinsics when converting from fp to
integers, but when running with -ffast-math we can just use
fptosi/fptoui, which avoids generating expensive overflow/NAN checks.
Assisted-by: Claude Opus
Commit: 3d91765f54e9c461c3f979a5ea7c302f59303489
https://github.com/llvm/llvm-project/commit/3d91765f54e9c461c3f979a5ea7c302f59303489
Author: Rohan Shenoy <RohanRadhesh.Shenoy at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/avx512fp16-combine-fmsubadd-fadd.ll
Log Message:
-----------
[X86] Fold FMSUBADD + FADD into VFCMADDC for fp16 (#222896)
Complex multiply by conjugate and accumulate fp16 (c += a * ~b) is
lowered into vfmsubadd + vaddph, failing to emit native vfcmaddcph in
avx512fp16. We can reuse the pattern for FSUBADD and extend
combineFaddCFmul to perform this fold.
Fixes #216290
Commit: 21f4aca751cd2e3ff81b0d96c0450f82c26db1b8
https://github.com/llvm/llvm-project/commit/21f4aca751cd2e3ff81b0d96c0450f82c26db1b8
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
A llvm/test/CodeGen/SystemZ/zos-section-readonlywithrel.ll
Log Message:
-----------
[SystemZ][z/OS] Handle constants with initializers with relocations (#223055)
When the initializer of a constant needs relocations, the constant
cannot be placed into the code section, because the loader needs a
writable section to fixup the relocation.
This change
- sets the relocation model for z/OS to `DynamicNoPIC`, which better
fits the relocation handling than `Static`, and
- treats section kind `ReadOnlyWithRel` like a variable.
Assisted by IBM Bob.
Commit: f90096de56d7864cfda3554403f1ef0b8edcb20a
https://github.com/llvm/llvm-project/commit/f90096de56d7864cfda3554403f1ef0b8edcb20a
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/MC/AMDGPU/gfx1250_asm_bf16_inline_const_err-fake16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_bf16_inline_const_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
A llvm/test/MC/AMDGPU/gfx13_asm_bf16_inline_const_err-fake16.s
A llvm/test/MC/AMDGPU/gfx13_asm_bf16_inline_const_err.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/literals.s
Log Message:
-----------
[AMDGPU][MC] Diagnose bf16 inline constants without op_sel in the ass… (#223035)
…embler
GFX1250 generates a bf16 inline constant in the high half of the
corresponding fp32 inline constant. The VOP1 bf16 opcodes therefore only
read it correctly in the VOP3 encoding with op_sel[0] set:
v_cvt_f32_bf16, v_rcp_bf16, v_sqrt_bf16, v_rsq_bf16, v_log_bf16,
v_exp_bf16, v_sin_bf16, v_cos_bf16 and v_tanh_bf16.
Codegen has applied this workaround since 57a9c4f939e5, but hand-written
assembly and inline asm had no protection at all and silently assembled
to instructions that read the wrong half. Reject those forms in the
assembler.
Only single-source bf16 opcodes are affected. Multi-source and packed
bf16 instructions such as v_fma_mix*_bf16, which also have a scalar bf16
src0, are explicitly excluded.
GFX1310 has the same FeatureBF16InlineConstFromUpperFP32 behaviour, so
the gfx1250 and gfx13 MC tests are updated together.
Assisted-by: Claude Code:claude-opus-5[1m]
Commit: e4315a87a4128cc36470b2cb5c6009672df5f447
https://github.com/llvm/llvm-project/commit/e4315a87a4128cc36470b2cb5c6009672df5f447
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-union-bitfield.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-union-bitfield.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
Log Message:
-----------
[CIR] Accept a union covered only by a bit-field's declared type (#222108)
The size of a union is calculated by its largest member. When that
member is a bit-field, the unit storing it can be narrower than the type
it was declared with, and it is the declared type that accounts for the
union's bytes. BitFieldType gains a query for that declared type, and
the x86_64 union rule reads it rather than the stored size, so `union {
int x : 3; }` and `union { int x : 3; char c; }` now both pass as i32.
A union larger than one eightbyte still needs a member covering it
outright, since the coerce basis skips the entry carrying the
declaration.
Assisted-by: Cursor / claude-opus-5
Commit: 9fb47eebc6c5e03de72a46f74b3d583156f7dfad
https://github.com/llvm/llvm-project/commit/9fb47eebc6c5e03de72a46f74b3d583156f7dfad
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/test/MC/AMDGPU/gfx1250_asm_vopd_errs.s
M llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
Log Message:
-----------
[AMDGPU] Make custom AsmParser matchers alignment aware (#221988)
Currently custom matchers accept registers belonging to unaligned classes, leaving the alignment check and its diagnostic to validateVGPRAlign. The problem is that validateVGPRAlign does not account for the operand register class, which may have a different alignment requirement on mixed-alignment targets.
The fix is to add a custom matcher that resolves the operand's `_AlignTarget` class via HwMode and uses that resolved class to accept a register. The drawback is that this changes the diagnostic from the more specific "error: invalid register class: vgpr tuples must be 64 bit aligned" to the generic "error: invalid operand for instruction" — but keeping the specific one doesn't seem worth the effort.
This commit converts the input-mods and DP-ALU DPP matchers. The no-modifier reg-or-inline operands come next. validateVGPRAlign stays as a catch-all until every operand is converted.
Co-Authored-By: Claude [noreply at anthropic.com](mailto:noreply at anthropic.com)
Commit: 788ae654bebaff36741220c613fb413bb569bc1f
https://github.com/llvm/llvm-project/commit/788ae654bebaff36741220c613fb413bb569bc1f
Author: Evgenii Podkorytov <epodkorytov at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
A llvm/test/Transforms/InferAddressSpaces/infer-address-spaces-overlapping-dead.ll
Log Message:
-----------
[InferAddressSpaces] Safely delete duplicate dead instructions (#222115)
Track deletion candidates with WeakTrackingVH so recursive deletion
cannot leave dangling pointers in later duplicate or overlapping
worklist entries.
Commit: 8c50e52593d6d8f7eb01962d7a6f43a4dae2f4e8
https://github.com/llvm/llvm-project/commit/8c50e52593d6d8f7eb01962d7a6f43a4dae2f4e8
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
Log Message:
-----------
[mlir][NFC] Prune unused copyArrayRefInto template (#222365)
`copyArrayRefInto` has internal linkage, so it is only reachable from
MLIRContext.cpp, and it has no callers there. It is the only mention of
the name in the MLIR tree.
An unused internal-linkage template fires -Wunused-template. That
warning is not in -Wall on main today, having been reverted by
8710728e0418, but it did ship enabled in clang 23.1.0, so building MLIR
with that released compiler under -Werror fails here:
mlir/lib/IR/MLIRContext.cpp:379:20: error: unused function template
'copyArrayRefInto' [-Werror,-Wunused-template]
This is the same deletion as one hunk of #221480, which cleans up the
same warning across 21 MLIR files and is still open. Landing that PR is
the better outcome; this is split out only because the file blocks a
release/23.x build today.
Assisted-by: Claude
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 7fcd868fff7a6b06fd51c7d3b24220d23ac061f7
https://github.com/llvm/llvm-project/commit/7fcd868fff7a6b06fd51c7d3b24220d23ac061f7
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Utility/XcodeSDK.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
Log Message:
-----------
[LLDB] fix a crash when dealing with prefix-remapped sysroot attributes (#223085)
rdar://165704312
Commit: 90f36e05255e9ca5906f21c188f8562b397ed60f
https://github.com/llvm/llvm-project/commit/90f36e05255e9ca5906f21c188f8562b397ed60f
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
Log Message:
-----------
[OpenMP] Remove the LocationDescription constructor that dropped the location. (#221949)
LocationDescription had an implicit conversion from a bare insertion
point, so `ompBuilder->emitSomething(someInsertPoint, ...)` compiled
happily and silently produced an empty debug location. Because
updateToLocation() installs the location unconditionally, this was worse
than a missing assignment: it cleared whatever the builder was carrying,
and the emitted runtime call ended up with no !dbg. On the device those
calls are inlinable, so the verifier rejects them once the runtime
carries debug info -- which is how this kept turning up as bug reports
rather than as anything visible at the callsite.
With the callers in OMPIRBuilder, OpenMPOpt, the MLIR translation and
clang all converted, the constructor can go, and the compiler will now
refuse the shape that caused the problem. Callers have to say which
location they mean: pass the IRBuilder to take its current one, or spell
out the insertion point and location as a pair.
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 8eec838ca247c411c30b3452bc403b42e6d521e2
https://github.com/llvm/llvm-project/commit/8eec838ca247c411c30b3452bc403b42e6d521e2
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M openmp/docs/Building.md
M openmp/libompd/gdb-plugin/CMakeLists.txt
M openmp/libompd/gdb-plugin/README.txt
R openmp/libompd/gdb-plugin/ompdDLService.c
A openmp/libompd/gdb-plugin/ompdDLService.cpp
M openmp/libompd/test/lit.cfg
M openmp/libompd/test/lit.site.cfg.in
M openmp/libompd/test/ompd_dl_service.c
Log Message:
-----------
[OpenMP][OMPD] Load `libompd` with LLVM dynamic lib (#222455)
OMPD loads `libompd.so` through a small helper, but that helper still
uses `dlopen/dlsym` under the hood. We have already laid the foundation
by making libraries load behind helpers in the current state; this one
is simply a cleanup that moves helpers to LLVM's loader, which is LLVM's
standard.
The current state has few issues:
1: Still tied to Unix-style APIs.
2: Windows support has to separately deal with loader differences.
3: Future shared-lib work would need more loader changes later.
This patch keeps the same OMPD API and call sites, but replaces the
implementation with LLVM's DynamicLibrary. Error handling remains
unchanged.
Commit: 797d62d47c361d2658c57523f8a2de4d42906ff4
https://github.com/llvm/llvm-project/commit/797d62d47c361d2658c57523f8a2de4d42906ff4
Author: Miguel A. Arroyo <miguel.arroyo at rockstargames.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/Other/print-on-crash.ll
Log Message:
-----------
[llvm][test] Extend -print-on-crash testing granularity (#222725)
* Extends the testing for `-print-on-crash` based on the additional
granularity of `trigger-crash` introduced by
https://github.com/llvm/llvm-project/pull/220073
Commit: d86120d1b83e8ff36ced6c2379f07efeacfa040c
https://github.com/llvm/llvm-project/commit/d86120d1b83e8ff36ced6c2379f07efeacfa040c
Author: Kunal Pathak <kunalspathak at hotmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
Add reference of llvm.pseudoprobe in LangRef.md (#223065)
The reference for `llvm.pseudoprobe` intrinsic was missing in `LangRef.md`. Added it.
Assisted-by: Claude
Commit: 9bb24f0654921737fd07b3ac4b2efc03eac8f359
https://github.com/llvm/llvm-project/commit/9bb24f0654921737fd07b3ac4b2efc03eac8f359
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lld/ELF/Driver.cpp
M lld/test/ELF/driver.test
R lld/test/ELF/early-exit-for-bad-paths.s
M lld/test/ELF/map-file.s
Log Message:
-----------
[ELF] Remove tryCreateFile probe for -o/-Map/--why-extract (#222831)
https://reviews.llvm.org/D31603 added an error to fail early for slow
links. However, it would incorrectly reject links that would succeed in
a library use: `--mmap-output-file -o /proc/self/fd/N`.
It also creates and unlinks a temporary file in the output directory for
each of the three paths, and it would mask any change to the output file
strategy, such as rewriting the existing output in place.
Commit: 6ad887ba7827245de1a438cb6dd9149d39ab027d
https://github.com/llvm/llvm-project/commit/6ad887ba7827245de1a438cb6dd9149d39ab027d
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
Log Message:
-----------
[ELF] Parallelize version script and dynamic list matching (#223208)
scanVersionScript and handleDynamicList make one serial pass over
symVector per wildcard pattern, which is inefficient when there are
multiple wildcard patterns.
Parallelize this process: for each symbol, match against all wildcard
patterns and take the first match. This drops the TensorFlow link from
4.8s to 1.8s (--threads=8; its version script has 24 `*foo*` and most
time was in scanVersionScript).
Commit: 298b7a4b8c5a61302634bd657e1d1e471a257f4c
https://github.com/llvm/llvm-project/commit/298b7a4b8c5a61302634bd657e1d1e471a257f4c
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
Log Message:
-----------
[RISCV] Don't use VL node when lowering scalable mask reductions (#223392)
Using ISD::XOR gives us the generic not (setcc cc) -> setcc inverse-cc
combine. With the VL optimizer we still get the same VL propagated.
Restricted to just scalable vectors since some fixed vector patterns
break without the VL node.
The VP test doesn't improve because
1) VP reductions get legalized during regular op legalization, not
vector legalization
2) so generic DAGCombines don't get a chance to run before the
(splat_vector 1) is legalized to vmset_vl.
We can fix this by keeping the (splat_vector 1) legal, but this is left
to another PR.
Commit: f016371f8339c37c7e8f228324a56a15a66ac21b
https://github.com/llvm/llvm-project/commit/f016371f8339c37c7e8f228324a56a15a66ac21b
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/mem2reg.mlir
Log Message:
-----------
[flang] Promote scalar slots reached through fir.convert and fir.declare (#219314)
Neither `fir.declare` nor `fir.convert` implements
`PromotableAliaserInterface`, so mem2reg does not see accesses made
through them as touching the slot behind. A cast anywhere in the chain
blocks promotion outright, even when it only changes the flavor of a
reference to the same scalar. So a scalar slot reached as `memref.alloca
-> fir.convert -> fir.declare -> fir.convert -> store/load` stays in
memory today.
This patch implements `PromotableAliaserInterface` for both operations.
mem2reg collects defining blocks from the alias map, so writes through a
`fir.declare` are now seen and the single-block restriction from
https://github.com/llvm/llvm-project/pull/182933 is no longer needed. An
operation reports an alias only when it carries the pointee through
unchanged, so that the default value projections of the interface apply;
for a `fir.convert` that limits it to a reference or a rank-0 memref of
a simple scalar with an identity layout and no memory space, and never
when either side is volatile.
A `fir.convert` additionally requires every read of the slot to be
preceded, in its own block, by a write. A read that no write reaches
takes the default value of the allocation, which is `fir.undefined` for
`fir.alloca` but poison for the memref allocations a cast can reach.
Without this requirement, promoting through a cast would change what
reading an uninitialized variable produces.
Commit: 8347fb3908a17762f8c0b604a5f25a7d10f6acb6
https://github.com/llvm/llvm-project/commit/8347fb3908a17762f8c0b604a5f25a7d10f6acb6
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.bf16.ll
Log Message:
-----------
[AMDGPU] Add gfx1310 coverage to the bf16 transcendental tests (#223054)
57a9c4f939e5 made codegen emit the VOP3 encoding with op_sel[0] set when
a bf16 inline constant reaches one of the single-source VOP1 bf16
opcodes, because the hardware generates the constant in the high half of
the corresponding fp32 inline constant.
GFX1310 has the same FeatureBF16InlineConstFromUpperFP32 behaviour.
Mirror the enabled gfx1250 SelectionDAG RUN lines with gfx1310 ones so
the workaround is covered there too. Test-only change, no functional
change.
Assisted-by: Claude Code:claude-opus-5[1m]
Commit: 6e551ef78bd85e71f364f890b245061d394d66a8
https://github.com/llvm/llvm-project/commit/6e551ef78bd85e71f364f890b245061d394d66a8
Author: DeanSturtevant1 <dsturtevant at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Expose public inline memory headers and generic/builtin.h in string_memory_utils (#223439)
Following commit 041300fa05151b3819478f33daa4384922b4b74e (#192079),
`libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h` includes
`src/string/memory_utils/inline_memcpy.h`.
In the Bazel overlay, `string_memory_utils` declared inline memory
dispatcher headers under `textual_hdrs` rather than `hdrs`, preventing
transitive consumers from accessing them. Additionally,
`src/string/memory_utils/generic/builtin.h` was missing from
`string_memory_utils`.
This patch:
- Moves public inline memory headers from `textual_hdrs` to `hdrs` in
`string_memory_utils`:
- `src/string/memory_utils/inline_bcmp.h`
- `src/string/memory_utils/inline_bzero.h`
- `src/string/memory_utils/inline_memcmp.h`
- `src/string/memory_utils/inline_memcpy.h`
- `src/string/memory_utils/inline_memmem.h`
- `src/string/memory_utils/inline_memmove.h`
- `src/string/memory_utils/inline_memset.h`
- `src/string/memory_utils/inline_strcmp.h`
- Adds `src/string/memory_utils/generic/builtin.h` to `textual_hdrs`.
Commit: 2bd15245d5ce07145ddd7e7363ae8552a560db3d
https://github.com/llvm/llvm-project/commit/2bd15245d5ce07145ddd7e7363ae8552a560db3d
Author: Bar Soloveychik <barsolo at meta.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
Log Message:
-----------
[lldb] Fix batched breakpoint step-over mock (#223000)
This PR fixes the test that printed an `UnexpectedPacketException`
because its mock GDB server did not handle LLDB’s final continue packet.
It adds a normal exit response for that packet and verifies that the
process exits successfully with status zero.
Before:
```
An exception happened when receiving the response from the gdb server. Closing the client...
Traceback (most recent call last):
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
694, in run
self._receive(data)
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
714, in _receive
self._handlePacket(packet)
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
807, in _handlePacket
response = self.responder.respond(packet)
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
218, in respond
response = self._respond_impl(packet)
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
231, in _respond_impl
return self.cont()
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
383, in cont
raise self.UnexpectedPacketException()
lldbsuite.test.gdbclientutils.MockGDBServerResponder.UnexpectedPacketException
PASS: LLDB (...) :: test (TestBatchedBreakpointStepOver.TestBatchedBreakpointStepOver.test)
----------------------------------------------------------------------
Ran 1 test in 0.070s
OK
```
After:
```
PASS: LLDB (...) :: test (TestBatchedBreakpointStepOver.TestBatchedBreakpointStepOver.test)
----------------------------------------------------------------------
Ran 1 test in 0.065s
OK
```
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: 28844a2fcb7ad1a078047b90a286a3ecf02ded5d
https://github.com/llvm/llvm-project/commit/28844a2fcb7ad1a078047b90a286a3ecf02ded5d
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
Log Message:
-----------
[SelectionDAG] Remove dead functions and declarations (NFC) (#223318)
DAGTypeLegalizer::WidenVecOp_ExpOp: Added on April 26, 2023 in commit
eece6ba283bd763e6d7109ae9e155e81cfee0651 without a definition or any
callers.
ScheduleDAGRRList::AddPred: The last uses were removed on April 17, 2019
in commit 258a425c69f0f611ae237ad507252ad18048d2ab when callers were
switched to AddPredQueued.
RegsForValue::append: The last use was removed on January 18, 2019 in
commit 0a45bf0e558e93205a514c856d543fd667099496 when inline asm output
handling was refactored.
Assisted-by: Antigravity
Commit: c5c0b83e6691634bc4ea4dca4303ab8e1deddfd3
https://github.com/llvm/llvm-project/commit/c5c0b83e6691634bc4ea4dca4303ab8e1deddfd3
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 1af17ef01973 (#223467)
Commit: 2a6bd296a0e90bd579ec1874c964781916ec26e9
https://github.com/llvm/llvm-project/commit/2a6bd296a0e90bd579ec1874c964781916ec26e9
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Support/AllocationPolicy.h
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Optimizer/Support/AllocationPolicy.cpp
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/test/Lower/CUDA/cuda-allocatable.cuf
A flang/test/Lower/CUDA/cuda-allocation-policy.cuf
M flang/test/Lower/CUDA/cuda-atomicadd.cuf
M flang/test/Lower/CUDA/cuda-cdevloc.cuf
M flang/test/Lower/CUDA/cuda-cluster.cuf
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-mod.cuf
M flang/test/Lower/CUDA/cuda-module-use.cuf
M flang/test/Lower/CUDA/cuda-proc-attribute.cuf
M flang/test/Lower/CUDA/cuda-shared.cuf
M flang/test/Lower/CUDA/cuda-synchronization.cuf
M flang/test/Transforms/allocation-policy-precedence.fir
A flang/test/Transforms/stack-arrays-policy-opt-out.fir
Log Message:
-----------
[flang][cuda] do not honor -fstack-arrays in device procedures (#223040)
The device stack is far smaller than the host one, so an automatic array
that fits the host stack easily overflows it. With `-fstack-arrays`
(implied by `-Ofast`) automatic arrays in CUDA Fortran `global` and
`device` procedures were kept on the device stack and overflowed it at
runtime.
Lowering now records a `fir.allocation_policy` with `stack_arrays`
disabled on those procedures, and `getAllocationPolicy` honors a policy
on the enclosing function instead of only the one on the module. The
size based part of the policy is unchanged, so small constant size
arrays still go on the device stack. Host procedures, including the host
copy of `attributes(host,device)`, are unaffected.
Commit: a02146be15a8a44aac0e202bcdb449835ebf06f0
https://github.com/llvm/llvm-project/commit/a02146be15a8a44aac0e202bcdb449835ebf06f0
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/cmp-folds.ll
Log Message:
-----------
[RISCV] Consider vmandn.mm in hasAndNot (#223408)
There's a few generic combines that we can take advantage of if we
return true for hasAndNot, e.g. not (setcc x, y, cc) -> setcc x y !cc.
Found with Opus 5
Commit: b16a0c1d3488ddc7d0e406288aae2e363a8af537
https://github.com/llvm/llvm-project/commit/b16a0c1d3488ddc7d0e406288aae2e363a8af537
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
M mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl-module-flags.mlir
Log Message:
-----------
[mlir][ROCDL] Add `rocdl.xnack` and `rocdl.sramecc` module attributes (#222444)
Since 27eeb7370281, the AMDGPU backend takes the xnack
and sramecc target-ID settings from the `amdgpu.xnack` and
`amdgpu.sramecc` module flags instead subtarget features, making the
old usage a hard error.
This commit adds `rocdl.xnack` and `rocdl.sramecc` module attributes
to the discardable attribute list the ROCDL dialect defines in order
to represent these flags and adds translations for them.
Omitting them means to leave these modifiers at
their default "either" state, which isn't the same as setting them to
false.
AI disclosure: Claude wrote this code and I reviewed it and tried to
reword the comments to something better.
Commit: d5104593c0b17a961fb1de465a5fd881a52ebc54
https://github.com/llvm/llvm-project/commit/d5104593c0b17a961fb1de465a5fd881a52ebc54
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member.cpp
Log Message:
-----------
[CIR] Support pointer-to-data-member binary operators for aggregates (#221784)
Implement support for pointer-to-data-member binary operators (`.*` and
`->*`) when the result is an aggregate type.
Issue #221783
Commit: 37c1f3fcd867587ccd2a1845d685d8bb4ab105bb
https://github.com/llvm/llvm-project/commit/37c1f3fcd867587ccd2a1845d685d8bb4ab105bb
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
M clang/test/CIR/CodeGen/bitint.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-bitint.c
M clang/test/CIR/CodeGenBuiltins/builtin-bit.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-bitint.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-int-nyi.cir
Log Message:
-----------
[CIR] Accept `_BitInt` wider than 128 bits in x86_64 callconv lowering (#223069)
With byval in place, a `_BitInt` wider than 128 bits can classify
Indirect and flow through the same byval/sret path as an oversized
aggregate.
That turned up a latent bug, fixed here since it was not reachable or
testable before: the byval/sret pointee type was using the raw declared
width instead of the padded storage width (e.g. `i200` instead of
`i256`), understating the copy size.
Widths whose padded storage integer is not a whole number of 16 bytes,
such as `_BitInt(129)` at `i192`, still have no in-memory layout in CIR
and now reach that gap through the byval and sret pointee instead of
through the classifier. They stay NYI.
Drop the opt-out from the three CIR lit tests gated on this.
Assisted-by: Cursor / claude-opus-5
Depends on #222465
Commit: e012338b436a8c7933d3c99924bbbb4cdbcb12d8
https://github.com/llvm/llvm-project/commit/e012338b436a8c7933d3c99924bbbb4cdbcb12d8
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/bindings/interface/SBValueDocstrings.i
M lldb/include/lldb/API/SBExpressionOptions.h
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/Target/Target.h
M lldb/source/API/SBExpressionOptions.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
A lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/Makefile
A lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/TestCreateValueFromExpression.py
A lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/main.cpp
Log Message:
-----------
[lldb] Speed up `SBValue::CreateValueFromExpression` by using DIL (#222192)
The goal of this patch is to significantly speed up the evaluation of
expressions in the SB API call `SBValue::CreateValueFromExpression`. DIL
is called first and attempts to evaluate the expression, and if it
fails, the function falls back to full expression evaluator. The call to
DIL can be disabled by setting
`target.experimental.use-DIL-for-creating-values` to `false`.
The need for this change comes from `SBValue::CreateValueFromExpression`
often being used in Python data formatters for other projects, where
running the full expression evaluator even for some simple expression
dramatically slows down the entire formatter. The performance overhead
if DIL fails to evaluate the expression is only marginal.
Commit: 46072765883ed39743a16d59cf4303e7f2e23f04
https://github.com/llvm/llvm-project/commit/46072765883ed39743a16d59cf4303e7f2e23f04
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/source/ValueObject/DILEval.cpp
M lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/TestCreateValueFromExpression.py
Log Message:
-----------
[lldb] Fix DIL losing StackFrame context after casting to pointer (#222386)
When casting to pointer type, `CreateValueObjectFromAddress` is called
with Target context only, so the resulting `ValueObject` doesn't have
StackFrame context anymore, which can cause problems when it is returned
as a final result from DIL. This patch fixes the issue.
Commit: 5f653742770a13e3f2b8428b31df7bc226406739
https://github.com/llvm/llvm-project/commit/5f653742770a13e3f2b8428b31df7bc226406739
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
Log Message:
-----------
[Flang][HLFIR] Bail out of EOSHIFT simplification for polymorphic arrays (#223118)
Consider the following code
```
module m
type Base
integer :: i = 8
end type
type, extends(Base) :: Child
integer :: j = 9
end type
end module
program argumentKeyword002
use m
class(*), pointer :: b1(:,:,:), boundVal
allocate(b1(3,2,2), SOURCE=reshape((/(i,i=1,12)/), &
(/3,2,2/)))
allocate (boundVal, source=0)
select type(name1=>eoshift(SHIFT=reshape((/1,-2,2,-1/),(/2,2/)), &
ARRAY=b1,DIM=1, BOUNDARY=boundVal))
type is (integer)
print *, name1
print *, shape(name1)
class default
ERROR STOP(1_4)
end select
end
```
it passed at `-O0` but failed at `-O3` as
```
argumentKeyword002.f":38:5): error: 'fir.result' op types mismatch between result op and its parent
error: Lowering to LLVM IR failed
```
The reason is that the `SimplifyHLFIRIntrinsics` is trying to inline
`EOSHIFT` of a `CLASS(*)` array as an `hlfir.elemental` produces a
`fir.if` with mismatched types on the branches (e.g., `!fir.class<none>`
vs. pointer-qualified `!fir.class<!fir.ptr<none>>`).
By looking at the code, we currently bail-out derived type array so it
falls back to the runtime code. Polymorphic array should be bailed-out
also for now and handled with derived type together in the future.
Commit: e226b9ea3e4c2e87ab36209f3c1dd83faa98e429
https://github.com/llvm/llvm-project/commit/e226b9ea3e4c2e87ab36209f3c1dd83faa98e429
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/unistd/linux/sysconf.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/msync_test.cpp
M libc/test/src/sys/mman/linux/remap_file_pages_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/mman/BUILD.bazel
Log Message:
-----------
[libc] Restrict sysconf/confstr to full-build mode. (#223103)
`sysconf` (and its sibling `confstr`) from `<unistd.h>` return some
values specific to the kernel/environment,
and some values specific to the system library (e.g. features available
in system library's pthread implementation).
Using LLVM-libc sysconf in overlay mode is inherently problematic - we
don't know what features host libc has,
and trying to reverse-engineer it would be brittle. Since we include
host libc's `<unistd.h>`, we can't even know in
advance what `_SC_` values or what macros would be available there, so
the portable implementation of `sysconf`
will be convoluted, and there's little benefits to it anyway.
Conversely, making sure that our `sysconf` implementation only compiles
against LLVM-libc's own headers will allow
us to precisely handle macro / features that we know are available /
supported.
Migrate four tests from sys/mman.h to use `getpagesize()` function
instead of generic `sysconf` to ensure those
tests won't be auto-excluded in overlay mode.
Remove the workarounds for overlay-mode added to sysconf(), since those
are no longer needed.
Commit: 45e9b1a1baea960e4a0d549df558ee0333c9edd4
https://github.com/llvm/llvm-project/commit/45e9b1a1baea960e4a0d549df558ee0333c9edd4
Author: Bar Soloveychik <barsolo at meta.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/include/lldb/Core/DumpRegisterValue.h
M lldb/source/Commands/CommandObjectRegister.cpp
M lldb/source/Core/DumpRegisterValue.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterVector.py
Log Message:
-----------
[lldb] Display GDB remote register vector values (#222724)
This completes GDB remote vector support in LLDB’s CLI.
- `register read <vector>` prints the raw register followed by typed
lanes.
- Supports direct, nested, three lane, byte, bool, and pointer vectors.
- Handles target byte order correctly.
- Explicit `--format` continues to show only the requested format.
- Bulk register reads remain compact.
- Unsupported flag widths safely remain raw.
Examples:
```
(lldb) register read v0
v0 = {0x00 0x00 0xc0 0x3f 0x00 0x00 0x20 0x40 0x00 0x00 0x60 0x40 0x00 0x00 0x90 0x40}
= ([0] = 1.5, [1] = 2.5, [2] = 3.5, [3] = 4.5)
(lldb) register read nested
nested = {0x00 0x00 0xc0 0x3f 0x00 0x00 0x20 0x40 0x00 0x00 0x60 0x40 0x00 0x00 0x90 0x40}
= {
[0] = ([0] = 1.5, [1] = 2.5)
[1] = ([0] = 3.5, [1] = 4.5)
}
(lldb) register read v3
v3 = {0x00 0x00 0xc0 0x3f 0x00 0x00 0x20 0x40 0x00 0x00 0x60 0x40}
= ([0] = 1.5, [1] = 2.5, [2] = 3.5)
(lldb) register read bytes
bytes = {0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f}
= ([0] = 0x00, [1] = 0x01, [2] = 0x02, [3] = 0x03, [4] = 0x04, [5] = 0x05, [6] = 0x06, [7] = 0x07, [8] = 0x08, [9] = 0x09, [10] = 0x0a, [11] = 0x0b, [12] = 0x0c, [13] = 0x0d, [14] = 0x0e, [15] = 0x0f, [16] = 0x10, [17] = 0x11, [18] = 0x12, [19] = 0x13, [20] = 0x14, [21] = 0x15, [22] = 0x16, [23] = 0x17, ...)
(lldb) register read bools
bools = {0x00 0x00 0xc0 0x3f 0xff 0xff 0xff 0xff 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
= {
[0] = false
[1] = false
[2] = true
[3] = true
[4] = true
[5] = true
[6] = true
[7] = true
[8] = false
[9] = false
[10] = false
[11] = false
[12] = false
[13] = false
[14] = false
[15] = false
}
(lldb) register read ptrs
ptrs = {0x00 0x00 0xc0 0x3f 0x00 0x00 0x20 0x40 0x00 0x00 0x60 0x40 0x00 0x00 0x90 0x40}
= ([0] = 0x402000003fc00000, [1] = 0x4090000040600000)
(lldb) register read -f hex v0
v0 = 0x4090000040600000402000003fc00000
```
---------
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: 9fdb3bbd29ea03834f325373efe5ee0ea9fe4061
https://github.com/llvm/llvm-project/commit/9fdb3bbd29ea03834f325373efe5ee0ea9fe4061
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils][NFC] BndlRef helper class (#223074)
During debugging we need to be able to easily print a bundle of
instructions or values. Up until now we would use VecUtils::dump(Bndl).
But a much nicer API would be Bndl.dump().
To support such an API this patch is introducing BndlRef, a subclass of
ArrayRef with the additional feature of supporting print(OS) and dump()
for Value and Instruction contents.
Commit: 7b8bb9d1f379da437eacfa7f4de96957e41956c6
https://github.com/llvm/llvm-project/commit/7b8bb9d1f379da437eacfa7f4de96957e41956c6
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[TableGen] Expose remapRegClassByHwMode() helper in AsmMatcher
This is useful to map from a ByHwMode MCK_* value to the actual resolved
MCK_* type. This is needed for #177073 where we would otherwise have to
add the manual logic to do this remapping (which is the approach I
previously used). Move RegClassByHwModeMatchTable to file scope and
provide a remapRegClassByHwMode() helper function in the generated
AsmMatcher. Currently only used for RISC-V, but I assume other targets
could also make use of this in the future. But even if not, I think it's
cleaner to have this as a helper rather than an inline array inside the
matcher function.
This change was created with the help of AI tools.
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/223302
Commit: 1d073217b664263f62ff01db623ed7542fde6fda
https://github.com/llvm/llvm-project/commit/1d073217b664263f62ff01db623ed7542fde6fda
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
Revert "[SandboxVec][VecUtils][NFC] BndlRef helper class" (#223483)
Reverts llvm/llvm-project#223074
Reason: unittest failure in NDEBUG
Commit: 2a51b6c31ba45a3be70001b71f7f7dc517288bca
https://github.com/llvm/llvm-project/commit/2a51b6c31ba45a3be70001b71f7f7dc517288bca
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/Other/print-on-crash.ll
Log Message:
-----------
[llvm][test] Quote args in -print-on-crash test (#223472)
Passing `-passes=cgscc(trigger-crash-cgscc)` in lit works because of its
shell handling, but fails when passing directly to a shell: ` syntax
error near unexpected token '('`.
Commit: 9ee32f72f4415b3e2b7acbf4237b8cc0daa3c8b7
https://github.com/llvm/llvm-project/commit/9ee32f72f4415b3e2b7acbf4237b8cc0daa3c8b7
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/Frontend/TextDiagnostic.cpp
Log Message:
-----------
[NFC] Hoist DiagOpts.showColors(OS.has_colors()) out of emitSnippet's per-character loop (#223095)
The result of DiagOpts.showColors(OS.has_colors()) does not change while
printing a single source snippet, so recomputing it for every character
is unnecessary. Compute it once per snippet instead.
rdar://186469856
Co-authored-by: Fred Riss <friss at apple.com>
Commit: faae30dc2c7aab136b366b5ee1b2adfcf4c2021b
https://github.com/llvm/llvm-project/commit/faae30dc2c7aab136b366b5ee1b2adfcf4c2021b
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/FormattedStream.h
M llvm/unittests/Support/formatted_raw_ostream_test.cpp
Log Message:
-----------
[Support] Make formatted_raw_ostream::has_colors() delegate to the wrapped stream (#223092)
Without this override, has_colors() falls back to is_displayed(), which
isn't always expected to give the same answer as the underlying stream's
has_colors().
This also fixes a compile-time regression when the underlying stream is
a raw_fd_ostream: raw_fd_ostream::has_colors() memoizes its result, but
without this override that memoization was bypassed in favor of the
uncached is_displayed(), issuing an isatty() syscall on every call.
#202441 is what surfaced this, by adding a has_colors() call to
TextDiagnostic's per-character hot loop.
rdar://186469856
Co-authored-by: Fred Riss <friss at apple.com>
Commit: 18795f5c5596f783c18f8483848b632084885756
https://github.com/llvm/llvm-project/commit/18795f5c5596f783c18f8483848b632084885756
Author: Laxman Sole <lsole at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
A llvm/test/CodeGen/NVPTX/inline-asm-line-info-per-inst-compiler-generated.ll
Log Message:
-----------
[DebugInfo][NVPTX]Avoid adding per line .loc in the ptx output for the compiler-generated inline ptx block. (#222764)
`NVPTXAsmPrinter::emitInlineAsm` splits the asm string on newlines and
emits a `.loc` per PTX instruction, incrementing the source line for
every physical line of the block. For a compiler-generated block, this
attributes the generated code to unrelated source lines, and for a long
enough block, to lines beyond the end of the file.
A DSL frontend can lower one source-level construct -- an assert, a
barrier, an intrinsic -- into a single block of inline PTX. The
individual lines of that block have no source correspondence; they all
belong to the one construct.
This change adds a check for isImplicitCode on the inline asm's
DILocation and skips the per-line path when it is set.
Commit: b3000bf61b40b945c196e76bfa7cd722adf09dac
https://github.com/llvm/llvm-project/commit/b3000bf61b40b945c196e76bfa7cd722adf09dac
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp
M compiler-rt/lib/ubsan/CMakeLists.txt
A compiler-rt/lib/ubsan/offload/CMakeLists.txt
A compiler-rt/lib/ubsan/offload/hsa.h
A compiler-rt/lib/ubsan/offload/ubsan_offload.h
A compiler-rt/lib/ubsan/offload/ubsan_offload_hsa.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_hsa.h
A compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_report.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_rpc.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_rpc.h
A compiler-rt/lib/ubsan/offload/ubsan_offload_symbolize.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_symbolize.h
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/lib/ubsan/ubsan_diag.h
M compiler-rt/lib/ubsan/ubsan_handlers.cpp
A compiler-rt/lib/ubsan/ubsan_handlers_internal.h
M compiler-rt/lib/ubsan/ubsan_interface.inc
A compiler-rt/lib/ubsan/ubsan_offload.cpp
A compiler-rt/lib/ubsan/ubsan_offload_checks.inc
A compiler-rt/lib/ubsan/ubsan_offload_packet.h
M compiler-rt/lib/ubsan/ubsan_value.h
M compiler-rt/test/CMakeLists.txt
A compiler-rt/test/ubsan/AMDGPU/abort.hip
A compiler-rt/test/ubsan/AMDGPU/dedup.hip
A compiler-rt/test/ubsan/AMDGPU/host-and-device.hip
A compiler-rt/test/ubsan/AMDGPU/lit.local.cfg.py
A compiler-rt/test/ubsan/AMDGPU/openmp-overflow.cpp
A compiler-rt/test/ubsan/AMDGPU/overflow-i128.hip
A compiler-rt/test/ubsan/AMDGPU/overflow.hip
A compiler-rt/test/ubsan/AMDGPU/shift.hip
M compiler-rt/test/ubsan/CMakeLists.txt
A compiler-rt/test/ubsan/Inputs/hip.h
M compiler-rt/test/ubsan/lit.common.cfg.py
M compiler-rt/test/ubsan/lit.site.cfg.py.in
M llvm/utils/gn/secondary/compiler-rt/lib/ubsan/BUILD.gn
Log Message:
-----------
[compiler-rt] Add AMDGPU Device UndefinedBehaviorSanitizer runtime (#219972)
Summary:
This adds support for full UBSan on the AMDGPU target. The GPU build of
`compiler-rt` will now build `libclang_rt.ubsan_standalone.a` and the
host build will now provide `libclang_rt.ubsan_offload.a` for the
host-side formatting.
The **core** approach is to simply gather arguments from the device and
replay them on the host. The RPC interface acts as the narrow shim to
pass data between the CPU and GPU.
The changes to the core runtime are kept minimal, only exposing a few
needed hooks to re-run and symbolize reports coming from an external
caller. The device archive is a side-library which will only be present
for GPU offloading builds.
Putting this in `compiler-rt` via interceptors avoids an ABI edge
between many consumers, (OpenMP, HIP, Pytorch, etc). The runtime code is
specifically built around HSA, but as more features grow this could be
refactored into a shim layer for SPIR-V / CUDA and factored out to a
common sanitizer utility. Leaving that as future work.
```console
clang -xhip -fsanitize=undefined --offload-arch=native app.hip
clang -fopenmp -fsanitize=undefined --offload-arch=native app.cpp
```
---
Tested using the HIP suite in https://github.com/ORNL/HeCBench. Ran
against 162 programs on my gfx1030 vs an unsanitized `-O3` baseline:
| Metric | Geomean |
| ----------------- | ------: |
| Kernel time | 2.12x |
| Wall time | 1.58x |
| Device image size | 3.22x |
| Host binary size | 20.43x |
| Compile time | 1.19x |
| Resource | Change |
| ---------------------- | -----: |
| VGPR | +19 |
| SGPR | +32 |
| Scratch (B/lane) | 52/140 |
| Occupancy (waves/SIMD) | 11/140 |
The tool identified three instances of UB on the HIP device with zero
false positives.
```
atomicAggregate (6 reports)
Device: main.cu:29 signed overflow -2147483648 - 1 (int)
background-subtract (6 reports)
Device: main.cu:75 259.48 does not fit in unsigned char
particlefilter (39 reports)
Device: kernel_likelihood.h:37 signed overflow in the LCG (1103515245 * …)
```
---
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 83cb8bd4c9b17d031d6a4519d74c76650e850427
https://github.com/llvm/llvm-project/commit/83cb8bd4c9b17d031d6a4519d74c76650e850427
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Driver/CommonArgs.h
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Cygwin.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Haiku.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Driver/ToolChains/UEFI.cpp
A clang/test/Driver/Inputs/resource_dir_with_amdgpu_per_target_subdir/lib/amdgpu-amd-amdhsa/libclang_rt.ubsan_standalone.a
A clang/test/Driver/Inputs/resource_dir_with_amdgpu_per_target_subdir/lib/x86_64-unknown-linux-gnu/libclang_rt.ubsan_offload.a
A clang/test/Driver/Inputs/resource_dir_with_amdgpu_per_target_subdir/lib/x86_64-unknown-linux-gnu/libclang_rt.ubsan_standalone.a
A clang/test/Driver/fsanitize-undefined-offload.c
Log Message:
-----------
[Clang] Enable UBSan for AMDGPU device offload (#219973)
Summary:
This enables the device UBSan runtime for AMDGPU devices. Primarily this
required modifications to the `addSanitizerRuntime` interface so we can
query the compilation's offload status. Also need to forward it through
the linker wrapper interface. Works on all AMDGPU offload, slight hacks
around the other targets as they do not advertise sanitizer
runtimes properly.
This is linked in via a new `-u __ubsan_offload_init` hook to pull
in the side library. This is standard behavior and keeps the core logic
mostly unchanged and re-used.
---
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 23dac5c4f996a314184ab5edb0bbadad93e32f6b
https://github.com/llvm/llvm-project/commit/23dac5c4f996a314184ab5edb0bbadad93e32f6b
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M offload/ci/hip-tpl.py
Log Message:
-----------
[HIP] Use new spelling in buildbot script (#223491)
This adds the new spelling to enable HIP Kokkos tests in the buildbot
script.
The old spelling will be removed.
Commit: 20fe9f35da9952f60188212c5f51debb07af24ca
https://github.com/llvm/llvm-project/commit/20fe9f35da9952f60188212c5f51debb07af24ca
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/src/__support/macros/properties/cpu_features.h
M libc/src/string/memory_utils/op_generic.h
Log Message:
-----------
[libc] Don't declare vector_size types that cannot be compiled (#221119)
On machines where [[gnu::vector_size(N)]] types are generally
supported, each given N can only be used when the corresponding
CPU features are enabled by the particular -m switches et al.
Don't make any use of a type that's not enabled for native
register use according to the predefines reflecting -m switches.
Even inline and template functions that wind up being unused can
make the compiler give errors about the use of a type whose use
is disabled for ABI or ISA configuration reasons.
Commit: 198cabe1180311b0ec9c1969632e9647c316729c
https://github.com/llvm/llvm-project/commit/198cabe1180311b0ec9c1969632e9647c316729c
Author: jiel-nv <37816794+jiel-nv at users.noreply.github.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.h
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/Dialect/FIRCG/CMakeLists.txt
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/test/Fir/declare-codegen.fir
A flang/test/Transforms/debug-cuf-device-variable.fir
Log Message:
-----------
[flang][cuda] Exclude device variables from host debug info (#222241)
Commit: def780a5607b989a7a0b665418beb945f2474ef9
https://github.com/llvm/llvm-project/commit/def780a5607b989a7a0b665418beb945f2474ef9
Author: Petr Hosek <phosek at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/cookie_io_functions_t.h
M libc/src/stdio/fopencookie.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fopencookie_test.cpp
Log Message:
-----------
[libc] Change cookie_seek_function_t to take off_t argument (#223306)
cookie_seek_function_t is defined as taking off_t rather than off64_t
for offset argument in all C library implementations that support
fopencookie.
Commit: 724968e60fcf2a0dca3c18a9faa2b639185f7656
https://github.com/llvm/llvm-project/commit/724968e60fcf2a0dca3c18a9faa2b639185f7656
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
Log Message:
-----------
[Offload] Link against specific HSA library and then fallback (#223454)
Summary:
HSA uses a versioning system, the `.1` is usually a more specific
release while one without is a generic or untested version. We should
use the specific one and fall back.
Commit: aa261b730fe1dd212160de5ba64ed2a71a20b72c
https://github.com/llvm/llvm-project/commit/aa261b730fe1dd212160de5ba64ed2a71a20b72c
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/int_to_fp_narrow_i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
Log Message:
-----------
[NFC][AMDGPU] Move i64 int to fp narrowing tests into their own file (#223463)
Commit: e219016c1903fe0f4877ef0f6f2f9ce1f4351d5c
https://github.com/llvm/llvm-project/commit/e219016c1903fe0f4877ef0f6f2f9ce1f4351d5c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M compiler-rt/test/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Fix host-only AMDGPU tests being added to GPU build (#223505)
Summray:
We do have AMDPGU tests, but these are for the standalone / minimal
configurations that don't require any host runtime. The tests added in
the previous patch are for offloading, i.e. HIP or OpenMP, not C/C++
compiled fro the GPU.
Commit: 9fad63f308b5a6e1cf0b1599e606732915201cac
https://github.com/llvm/llvm-project/commit/9fad63f308b5a6e1cf0b1599e606732915201cac
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma-mix-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[AMDGPU][True16][GlobalISel] Update True16 handling for FMA_MIX instructions in GlobalISel (#205431)
The FMA_MIX instructions can extend 16-bit input values, but must have
32-bit registers as operands. This patch handles cases in True16 mode
where the 16-bit input value lives in a VGPR-16 and must be widened.
Commit: 54ce74d9a41991b2a00eb4d373aa3b8d45b34851
https://github.com/llvm/llvm-project/commit/54ce74d9a41991b2a00eb4d373aa3b8d45b34851
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/ubsan/BUILD.gn
Log Message:
-----------
[gn build] Port b3000bf6 (#223509)
Commit: f7028e8a2ef42f26e89a5938bc6b2e7b3fcb4504
https://github.com/llvm/llvm-project/commit/f7028e8a2ef42f26e89a5938bc6b2e7b3fcb4504
Author: Bhavesh M <85327930+beamandala at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/execv.cpp
Log Message:
-----------
[libc] Use execve syscall wrapper in execv.cpp (#223181)
Use the existing execve syscall wrapper in `execv.cpp` instead of
invoking SYS_execve directly.
Commit: 80cbdafb4f39ef539366c13436b266398176af6d
https://github.com/llvm/llvm-project/commit/80cbdafb4f39ef539366c13436b266398176af6d
Author: Bhavesh M <85327930+beamandala at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/execve.cpp
Log Message:
-----------
[libc] Use execve syscall wrapper in execve.cpp (#223186)
Use the existing execve syscall wrapper in `execve.cpp` instead of
invoking SYS_execve directly.
Commit: a3c0080c816b0225a20a3c3aac3da5d91391f1e7
https://github.com/llvm/llvm-project/commit/a3c0080c816b0225a20a3c3aac3da5d91391f1e7
Author: jiel-nv <37816794+jiel-nv at users.noreply.github.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIRCG/CMakeLists.txt
Log Message:
-----------
[flang][cuda][NFC] Link FIRCodeGenDialect against CUFAttrs (#223511)
Fix the build issue triggered by #222241. Add the missing link
dependency.
Commit: 70f2f92830622086356f59a462c1d362c329be2a
https://github.com/llvm/llvm-project/commit/70f2f92830622086356f59a462c1d362c329be2a
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
R llvm/test/Transforms/RelLookupTableConverter/relative_lookup_table.ll
Log Message:
-----------
[RelLookupTableConverter] Restore X86/relative_lookup_table.ll and add AArch64 test (#223494)
Move relative_lookup_table.ll back to X86/ and restore the original
assertions, undoing manual edits to generated check lines and addressing
post-commit review feedback on #222809. Note that PR already added a
test which checks for the minor `unnamed_addr` difference between x86
and arm.
Commit: 1ce16b4a5fd640ba44518980e3391789d3ab30fa
https://github.com/llvm/llvm-project/commit/1ce16b4a5fd640ba44518980e3391789d3ab30fa
Author: Quentin Colombet <quentin.colombet at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
M llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
Log Message:
-----------
[RegAllocEvictionAdvisor] Make the local reassign option more useful (#223115)
Prior to this patch the CLI option for the local reassignment heuristic
could only force enabling the local reassignment heuristic. In other
words, there was no way to disable the heuristic if the target hook said
otherwise, which defeated the purpose of the option.
Fix this by ensuring that when the option is set it takes precedence
over the target hook. This makes experimenting with the local
reassignment heuristic much easier.
The patch is NFC unless you set the option.
Test by: Daniil Fukalov <daniil.fukalov at amd.com> assisted by GPT-6 Astra
Commit: 46f16a308de7b933bbeb83e69d1b8bac2d2889c9
https://github.com/llvm/llvm-project/commit/46f16a308de7b933bbeb83e69d1b8bac2d2889c9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
Log Message:
-----------
[compiler-rt] Do not intercept 'dlsym' for PowerPC due to musttail (#223516)
Summary:
musttail is not supportedi n PPC but it required to faithfully implement
RTLD_NEXT, so just disable intercepting `dlsym`, means that
Offload-brand ubsan usage will not work on PPC without dictating direct
linking.
Commit: c115db8da9fe007bd7804c12bb7bb62a9ca569ba
https://github.com/llvm/llvm-project/commit/c115db8da9fe007bd7804c12bb7bb62a9ca569ba
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
R libcxx/test/libcxx/diagnostics/unused_variables.compile.pass.cpp
R libcxx/test/libcxx/diagnostics/unused_variables.verify.cpp
A libcxx/test/libcxx/unused_variables.compile.pass.cpp
A libcxx/test/libcxx/unused_variables.verify.cpp
Log Message:
-----------
[libc++][test-suite][NFC] Move `unused_variables` tests (#223234)
`[diagnostics]` is a section in The Standard
https://wg21.link/diagnostics. According to libc++ test-suite
organization `libcxx/test/libcxx/diagnostics/` should contain related
tests.
The following tests:
- `unused_variables.compile.pass.cpp`
- `unused_variables.verify.cpp`
should live in:
- `libcxx/test/libcxx/`
This is a follow-up to the re-organization of `nodiscard.verify.cpp`
tests, which initially were also placed in `diagnostics`.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 1e089918fca00a683921f0f45b32cce8d1f9026b
https://github.com/llvm/llvm-project/commit/1e089918fca00a683921f0f45b32cce8d1f9026b
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/src/__support/big_int.h
M libc/src/__support/math_extras.h
Log Message:
-----------
[libc][baremetal][BigInt] fix codegen issue for UInt128 (#220389)
`BigInt::operator*` always computes the full 2N-word product (`ful_mul`,
i.e. `multiword::multiply_with_carry`) and then truncates. In order to
scalarize the process to generate efficient code, the loop needs to be
fully unrolled, which fails on 32-bit targets for int128 due to LLVM's
default threshold. This patch adjust the hint to allow int128 to be
unrolled while gating larger integers away.
### 64-bit targets: roughly okay
aarch64 is byte-identical before/after; x86-64 gets one `mov` shorter.
After the patch, 128×128→128 (lo/hi in memory):
```asm
; aarch64 ; x86-64
ldp x8, x12, [x0] movq (%rdi), %r9
ldp x9, x10, [x1] movq (%rsi), %r8
mul x10, x10, x8 movq %r8, %rax
mul x11, x9, x8 mulq %r9
umulh x8, x9, x8 imulq 8(%rsi), %r9
madd x9, x9, x12, x10 imulq 8(%rdi), %r8
add x8, x9, x8 addq %r9, %r8
stp x11, x8, [x2] addq %rdx, %r8
ret ...
```
### 32-bit targets (e.g. cortex-m85): badly bloated
A 64-byte stack frame, carry selection through IT blocks, and a call
into an outlined `ful_mul`. Kernel is the folded multiply (`lo ^ hi` of
the `UInt<128>` product):
```asm
; before ; after
sub sp, #64 umull r12, lr, r2, r0
mov.w r12, #0 umull r2, r4, r2, r1
strd r12, r12, [sp, #24] umull r0, r5, r3, r0
orrs.w lr, r0, r1 umaal r4, r5, r3, r1
it ne adds.w r1, lr, r2
strdne r0, r1, [sp, #16] adcs r2, r4, #0
... (5 more stores) adc r3, r5, #0
bl BigInt<128>::ful_mul adds r0, r0, r1
ldm r3, {r0, r1, r2, r3} adcs r2, r2, #0
eors r1, r3 adc r1, r3, #0
eors r0, r2 eors r1, r0
add sp, #64 eor.w r0, r2, r12
```
llvm-mca (cortex-m85): **114 → 11 cycles** per folded multiply.
### Benchmarks
| environment | before | after | speedup |
|---|---|---|---|
| EK-RA8M2 (Cortex-M85 r1p1, DWT cycle counter, I-cache on) | 250
cyc/mul | 20 cyc/mul | 12.5× |
| wasm32 under wasmer 7.3, `-U__SIZEOF_INT128__` (see notes) | 0.70 s /
100M muls | 0.28 s | 2.5× |
Bench kernel (dependent chain, identical results before/after):
```cpp
using B = LIBC_NAMESPACE::BigInt<128, false, uint64_t>;
B x = (B(a) << 64) | B(~a);
B y = (B(b) << 64) | B(~b);
for (int i = 0; i < n; i++) {
x = x * y;
y.val[0] ^= x.val[1];
}
return x.val[0] ^ x.val[1];
```
### Carry builtin dispatch fix
Additionally, fix a typo in the `add_with_carry` / `sub_with_borrow`
builtin dispatch: the `#if`/`#elif` chain over `__has_builtin`.
### Notes
1. Another workaround for such targets is to force-enable native 128-bit
integers (clang's `-fforce-enable-int128`)
2. The wasm number above is benched with 128-bit integers forcibly
disabled (`-U__SIZEOF_INT128__`), just to check its effect.
---
Guided and reviewed by human
Co-Authored-By: Claude Fable 5 <noreply at anthropic.com>
---------
Co-authored-by: Claude Fable 5 <noreply at anthropic.com>
Commit: 199ade2027a2f0b20504d288db6388aa11332a40
https://github.com/llvm/llvm-project/commit/199ade2027a2f0b20504d288db6388aa11332a40
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
M llvm/test/Transforms/LoopVectorize/phi-cost.ll
Log Message:
-----------
[VPlan] Use VPlan-based costs for pointer inductions. (#223394)
Drop the last legacy induction fallback in precomputeCosts, completing
the migration of induction costs to be VPlan-based.
The fallback charged the cost of the IV phi. The cost of the GEP
incrementing the IV was considered free.
VPWidenPointerInduction::computeCost now charges the cost of the phi
plus a TODO to also consider cost of the increment and wide pointer add.
For scalarized pointer inductions, we do not charge any cost for the
scalar GEPs, like before, assuming they can be folded into the
addressing mode.
Test changes are due to the fact that scalarized pointer inductions do
not require an extra phi (on most platforms, phis are considered free,
so not many tests are impacted).
PR: https://github.com/llvm/llvm-project/pull/223394
Commit: 081a3f0ca08e60747bf90620c0644af44321b9a4
https://github.com/llvm/llvm-project/commit/081a3f0ca08e60747bf90620c0644af44321b9a4
Author: Avi Kivity <avi at scylladb.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
A clang/test/PCH/flag-enum.c
Log Message:
-----------
Revert "[clang][NFC] Refactor flag enum caching (#210632)" (#223244)
This reverts commit f5437c4d4f2e9920614d856158d9683d650acffa.
That change moved population of Sema::FlagBitsCache out of
IsValueInFlagEnum and into ActOnEnumBody, and turned the lookup into
DenseMap::at(). ActOnEnumBody only runs for enum definitions that are
parsed in the current translation unit, so an EnumDecl deserialized from
a PCH never gets a cache entry and DenseMap::at() dereferences end(),
crashing clang in builds without assertions.
A switch over any enum with the flag_enum attribute that is defined in a
PCH is enough to reproduce. The crash cannot be avoided by turning the
switch diagnostics off: unlike DiagnoseAssignmentEnum, the switch path
in ActOnFinishSwitchStmt has no Diags.isIgnored() guard, because it runs
the analysis regardless in order to record the result in the AST.
In practice this breaks any translation unit that instantiates
std::basic_regex<char> while <regex> is in a PCH, since libstdc++ marks
std::regex_constants::syntax_option_type as a flag enum and
_Compiler<_TraitsT>::_S_validate switches over it. That became reachable
with 44b33260a38c, which made clang honor the gnu:: spelling of the
attribute, but the underlying defect is the one reverted here.
Add a regression test for the PCH path. It checks the computed flag bits
rather than just the absence of a crash, so that a silently empty cache
entry fails the test instead of passing it.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
Fixes #223243
Commit: 44ebda796ec9b6a43d5bef01efe58c0c67b8c971
https://github.com/llvm/llvm-project/commit/44ebda796ec9b6a43d5bef01efe58c0c67b8c971
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-loop-extracts.ll
Log Message:
-----------
[SLP][NFC]Add a test with the overoptimistic vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223523
Commit: eb13b3f197bd2537160cc29aa56495a1117ba64e
https://github.com/llvm/llvm-project/commit/eb13b3f197bd2537160cc29aa56495a1117ba64e
Author: Florian Mayer <fmayer at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
Log Message:
-----------
[SelectionDAG] [NFC] fix inaccurate docstring (#223515)
`getNode` calls FoldBUILD_VECTOR, which simplifies all-POSION or
all-UNDEF vectors.
Commit: 020e9fe44ac8887bb3891511b801111bdf1ab6ae
https://github.com/llvm/llvm-project/commit/020e9fe44ac8887bb3891511b801111bdf1ab6ae
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-loop-extracts.ll
Log Message:
-----------
[SLP]Loop-scale the extract cost in the splat subtree keep/drop check
The unscaled extract estimate kept extract-heavy subtrees in hot loops,
rejecting profitable trees.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223524
Commit: e5d9e4d7d3208dd2450f185d30c383a1806383b8
https://github.com/llvm/llvm-project/commit/e5d9e4d7d3208dd2450f185d30c383a1806383b8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/stack-protector-guard.c
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
A llvm/test/CodeGen/PowerPC/target-abi-module-flag.ll
Log Message:
-----------
PPC: Read the ELF ABI from the "target-abi" module flag (#221669)
Resolve the ELFv2 ABI from the effective ABI name module flag,
rather than strictly relying on the -target-abi flag.
Also start emitting "target-abi" for PPC from clang.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 737462135d1c9c854484e2fac4eade107cf3b7fa
https://github.com/llvm/llvm-project/commit/737462135d1c9c854484e2fac4eade107cf3b7fa
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp-gfx1170.mlir
A mlir/test/Conversion/AMDGPUToROCDL/lds-barrier-gfx90c.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/permlane.mlir
M mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
Log Message:
-----------
[mlir][AMDGPU][NFC] Pre-commit tests for incorrect version checks (#220104)
There'll be a refactoring from `amdgpu::Chipset` to
`ROCDL::TargetInfo`, thus also moving from chip version checks to
features checks. This commit adds tests for incorrect lowerings that
were allowed by the current code.
- gfx90c is >= gfx90a but stil needs atomic emulation (it doesn't
have buffer fmax and so on).
- gfx90c is also >= gfx90a but has no barrier back-off, so it needs
the inline asm workaround around `s_barrier` that it isn't getting
- gfx908 doesn't have a packed fp16 atomic add but we thought it did
- gfx950 is mistakenly allowing xf32 MFMAs
- gfx1200 is allowing permlane_swap instructions that it doesn't have
- gfx11.7 should be allowing OCP FP8 conversions but isn't on the list
This also cleans up some redundant tests with a --check-prefixes
AI disclosure: Claude found these and wrote the tests.
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 3b479f9529d605b3c05337a62fae04bd4f7e0495
https://github.com/llvm/llvm-project/commit/3b479f9529d605b3c05337a62fae04bd4f7e0495
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Lower/LoweringOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/acc-combined-loop-firstprivate-flag.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
Log Message:
-----------
[flang][openacc] Attach firstprivate scalar onto combined parallel loop (#222777)
Combined `parallel loop firstprivate` currently puts firstprivate only
on `acc.parallel`, the compute region. Independent iterations then share
that one copy when v is updated. Attach also an implicit loop
firstprivate whose varPtr is the remapped compute copy.
Attach only when: 1) the loop is combined parallel loop, 2) and
independent (the default; not seq/auto), and 3) the firstprivate is an
OpenACC scalar. Arrays, sections, derived/character/boxed types, serial
loop, and non-combined parallel+loop stay compute-only.
Commit: 2b680eecc9f7fad9fee351219aa3c45320f609ea
https://github.com/llvm/llvm-project/commit/2b680eecc9f7fad9fee351219aa3c45320f609ea
Author: Bruno De Fraine <bruno.defraine at globalfoundries.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/RegionInfo.h
M llvm/lib/Analysis/DominanceFrontier.cpp
M llvm/lib/Analysis/RegionInfo.cpp
Log Message:
-----------
[Analysis] Fix GCC warnings on ABI annotations (#222286)
The GCC build is cluttered by type attribute warnings on some header
files:
```
llvm/include/llvm/Analysis/RegionInfo.h:898:41: warning: type attributes ignored after type is already defined [-Wattributes]
898 | extern template class LLVM_TEMPLATE_ABI RegionBase<RegionTraits<Function>>;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
The type attributes originate from PR #199019. The warnings occur
because the
specific template instantiation is triggered implicitly earlier, without
the
type attribute. This can be fixed by placing the extern template
declaration
before the implicit use.
Also, the implementation files were using `LLVM_TEMPLATE_ABI` instead of
`LLVM_EXPORT_TEMPLATE`, contrary to the guidance in
`llvm/docs/InterfaceExportAnnotations.rst` ("Explicitly Instantiated
Template
Classes"). This would trigger the same type of GCC warning in the
implementation file.
Commit: 84ee9b56ba3947cacd3aff40c6dce622cc1bff6b
https://github.com/llvm/llvm-project/commit/84ee9b56ba3947cacd3aff40c6dce622cc1bff6b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
Log Message:
-----------
[VPlan] Bail out on chained reductions in handleMaxMinNumReductions. (#223521)
handleMaxMinNumReductions does not support reduction chains, as the NaN
check directly checks the operand of the single min/max reduction.
Bail out for now to fix a crash.
Fixes https://github.com/llvm/llvm-project/issues/223430.
Commit: 3f83cc8881839fa7b7a6f8ec37c5cba2e687855d
https://github.com/llvm/llvm-project/commit/3f83cc8881839fa7b7a6f8ec37c5cba2e687855d
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
Reapply "[SandboxVec][VecUtils][NFC] BndlRef helper class" (#223483) (#223487)
This reverts commit 1d073217b664263f62ff01db623ed7542fde6fda.
Commit: 3377fbdd341a30c57c7a5e3ff11aeb21f9d2e6d4
https://github.com/llvm/llvm-project/commit/3377fbdd341a30c57c7a5e3ff11aeb21f9d2e6d4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineBasicBlock.cpp
A llvm/test/CodeGen/WebAssembly/splitcriticaledge-physreg-liveness.mir
Log Message:
-----------
CodeGen: Clear physreg ranges after SplitCriticalEdge (#223172)
After critical edge spliting replaces a terminator, clear referenced
physreg ranges. The block's terminators may be replaced, and may
reference physical registers (e.g. WebAssebly's ARGUMENTS. When
LiveIntervals is available, repairIntervalsInRange only repairs virtual
registers, so the tracked physreg units were stale.
It feels like a bug that repairIntervalsInRange doesn't touch physregs,
but I've left that for a future change.
Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 4698a5193eccf41f2f81bdb4c1004b1e05811d95
https://github.com/llvm/llvm-project/commit/4698a5193eccf41f2f81bdb4c1004b1e05811d95
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/BinaryFormat/Dwarf.cpp
A llvm/test/tools/llvm-dwarfdump/AMDGPU/DW_AT_LLVM_memory_space.yaml
Log Message:
-----------
[DWARF] Add DW_MSPACE_LLVM_* memory space encodings (#220766)
DW_AT_LLVM_memory_space is already defined in Dwarf.def, and the memory
space encodings it takes are already specified in
docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst, but the values
had no names in the source, so llvm-dwarfdump printed the attribute as a
bare integer.
Add the encodings via a HANDLE_DW_MSPACE macro alongside the existing
HANDLE_DW_ASPACE, define the MemorySpace enum, and add MemorySpaceString
and getMemorySpace. AttributeValueString then resolves the attribute, so
no changes are needed in the DWARF consumers themselves.
Unlike address spaces, memory space encodings are target-independent, so
MemorySpaceString takes no triple.
Commit: 2e5fa3ac6919234d90c99a5ae943cac85a2ea727
https://github.com/llvm/llvm-project/commit/2e5fa3ac6919234d90c99a5ae943cac85a2ea727
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx9.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN fmed3 builtins (#223101)
Adds codegen for the following AMDGCN fmed3 builtins:
- __builtin_amdgcn_fmed3f (float)
- __builtin_amdgcn_fmed3h (half)
These are lowered to the corresponding `llvm.amdgcn.fmed3` intrinsic.
Commit: 8f887e33d2b18328885716bcbdc568680335f43e
https://github.com/llvm/llvm-project/commit/8f887e33d2b18328885716bcbdc568680335f43e
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/resources/Textures-Gather.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_gather-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_load-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_sample-errors.hlsl
Log Message:
-----------
[HLSL] Add CustomTypeChecking and improve sema for texture builtins (#221060)
This PR makes the texture builtins (for load, sample, gather) use
CustomTypeChecking, and adds additional semantic checks for them to make
them more strict and conform with the way sema checks are done for other
builtins.
The main benefit of CustomTypeChecking is preventing
DefaultArgumentPromotion from occurring due to the builtins being
declared `void(...)`; primarily, the promotion of float/half to double
is undesirable.
Floating-point scalar operands in codegen (`CGHLSLBuiltins.cpp`) for
these builtins always had a check and cast of the form `if
(Op->getType() != FloatTy) Op = CreateFPCast(Op, FloatTy);` to
compensate for that, which looked like a code smell to me.
The DefaultArgumentPromotion also affected diagnostics, which would
report the promoted type (double) instead of the type the user provided
(float) (e.g., https://hlsl.godbolt.org/z/Yec3dKh14). These diagnostics
were not exercised before, and this PR adds tests to exercise them.
Sema checks for the texture builtin args have also been made more strict
and rewritten to be like sema for other builtins, using
`CheckArgTypeMatches` rather than only checking vector element count.
Finally, in preparation for 1D texture types, the sema for texture
builtins now allow scalar args where it is relevant.
Assisted by: Claude Opus 5
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Commit: 3bb668718fc42be84ae4165d947d1de99a3c179b
https://github.com/llvm/llvm-project/commit/3bb668718fc42be84ae4165d947d1de99a3c179b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
A clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c
M clang/test/Driver/lto-aix.c
M flang/include/flang/Frontend/TargetOptions.h
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Integration/PowerPC/aix-vec-extabi.f90
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll
M llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
M llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll
M llvm/test/CodeGen/PowerPC/aix-csr-vector-extabi.ll
M llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll
M llvm/test/CodeGen/PowerPC/aix-insert-extract.ll
M llvm/test/CodeGen/PowerPC/aix-spills-for-eh.ll
M llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll
M llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-mir.ll
M llvm/test/CodeGen/PowerPC/aix-vec-arg-spills.ll
M llvm/test/CodeGen/PowerPC/aix-vec_extract_p9.ll
M llvm/test/CodeGen/PowerPC/aix-vec_extract_p9_2.ll
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/aix-vector-stack-caller.ll
M llvm/test/CodeGen/PowerPC/aix-vector-stack.ll
M llvm/test/CodeGen/PowerPC/aix-vector-vararg-caller.ll
M llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll
M llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-pair-cc-spills.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee-split.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll
M llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll
M llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll
M llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
M llvm/test/CodeGen/PowerPC/aix64-virtual-call-no-spills.ll
M llvm/test/CodeGen/PowerPC/bswap64.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
M llvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll
M llvm/test/CodeGen/PowerPC/cmpb-ppc32.ll
M llvm/test/CodeGen/PowerPC/cmpb.ll
M llvm/test/CodeGen/PowerPC/constants-i64.ll
M llvm/test/CodeGen/PowerPC/fdiv.ll
M llvm/test/CodeGen/PowerPC/fma-assoc.ll
M llvm/test/CodeGen/PowerPC/ftrunc-vec.ll
M llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll
M llvm/test/CodeGen/PowerPC/maddld.ll
M llvm/test/CodeGen/PowerPC/mi-peephole-splat.ll
M llvm/test/CodeGen/PowerPC/mmaplus-intrinsics.ll
M llvm/test/CodeGen/PowerPC/mulli.ll
M llvm/test/CodeGen/PowerPC/p10-handle-split-promote-vec.ll
M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/pr33093.ll
M llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
M llvm/test/CodeGen/PowerPC/setcc-to-sub.ll
M llvm/test/CodeGen/PowerPC/unal-vec-ldst.ll
M llvm/test/CodeGen/PowerPC/vec-bswap.ll
M llvm/test/CodeGen/PowerPC/vec_clz.ll
M llvm/test/CodeGen/PowerPC/vec_constants.ll
M llvm/test/CodeGen/PowerPC/vec_revb.ll
M llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll
M llvm/test/CodeGen/PowerPC/vmladduhm.ll
M llvm/test/CodeGen/PowerPC/xxpermdi_mnemonics.s
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/PGOProfile/ppc-prevent-mma-types.ll
Log Message:
-----------
PPC: Replace EnableAIXExtendedAltivecABI with "target-abi" module flag (#221670)
Continue purging ABI-influencing TargetOptions fields. Eliminate this
case by migrating to a module flag, reusing the generic target-abi module
flag with a new value.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: c5086962da8f36f69ad04ed81fce5aa2f19cec66
https://github.com/llvm/llvm-project/commit/c5086962da8f36f69ad04ed81fce5aa2f19cec66
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Interpreter/Value.cpp
Log Message:
-----------
[clang-repl] Use ExecutorAddr::toPtr to get function ptr (#223395)
Fixes the pretty-print.cpp testcase on Darwin/arm64e.
This testcase was crashing on Darwin/arm64e when it tried to call a
value's destructor via an unauthenticated pointer.
Fix the issue by updating Value::Value to use ExecutorAddr::toPtr to get
an authenticated pointer to the destructor (rather than using
ExecutorAddr::getValue, which yields a raw address with no
authentication bits)
Commit: b80623b0255ae13c2d8337ea96d1bf2c673ea3c8
https://github.com/llvm/llvm-project/commit/b80623b0255ae13c2d8337ea96d1bf2c673ea3c8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions-vs-first-order-recurrences.ll
Log Message:
-----------
[LV] Add more tests with phis that could be FORs or predicated IVS (NFC) (#223539)
Extend test coverage with more cases where a phi can be both a FOR and a
predicated IV.
Test coverage for https://github.com/llvm/llvm-project/pull/201208.
Commit: d6ae821f93ca35b8d2d67d4ce9f7391c7e2fe9fc
https://github.com/llvm/llvm-project/commit/d6ae821f93ca35b8d2d67d4ce9f7391c7e2fe9fc
Author: Michael Jones <michaelrj at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/src/sys/sendfile/linux/sendfile.cpp
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/sendfile/sendfile_test.cpp
Log Message:
-----------
[libc] Fix sendfile argument order (#223059)
The previous implementation had the arguments swapped. This PR fixes it
and also adds a test to ensure we don't regress.
Commit: 060aa57d39e12fd3b91113197d6ed78cf998158a
https://github.com/llvm/llvm-project/commit/060aa57d39e12fd3b91113197d6ed78cf998158a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
M clang/test/lit.cfg.py
Log Message:
-----------
[clang-repl] XFAIL simple-exception test on Darwin/arm64e (#223401)
ORC doesn't support unwinding on arm46e yet.
Commit: 66971239af0417693927880df128d01b89491171
https://github.com/llvm/llvm-project/commit/66971239af0417693927880df128d01b89491171
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Fix FindMangledNameSymbol test on Darwin/arm64e (#223410)
Fix the FindMangledNameSymbol unit test by comparing values as
llvm::orc::ExecutorAddrs.
This test was using comparing a pointer cast to uintptr_t and the result
of an ExecutorAddr::getValue call, but those can be different on
Darwin/arm64e due to pointer authentication. Comparing as ExecutorAddr
values eliminates this difference (pointer authentication bits are
stripped from both sides).
Commit: 46e24dbc4475f42c0f8a6b4e0ccb7e57ea3d1cde
https://github.com/llvm/llvm-project/commit/46e24dbc4475f42c0f8a6b4e0ccb7e57ea3d1cde
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/InferAddressSpaces.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/Other/new-pm-print-pipeline.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/noop-ptrint-pair.ll
M llvm/test/Transforms/InferAddressSpaces/X86/noop-ptrint-pair.ll
M llvm/test/Transforms/InferAddressSpaces/fake-use.ll
M llvm/test/Transforms/InferAddressSpaces/infer-address-spaces-overlapping-dead.ll
M llvm/test/Transforms/InferAddressSpaces/masked-gather-scatter.ll
M llvm/test/Transforms/InferAddressSpaces/optnone-func-unchanged.ll
A llvm/test/Transforms/InferAddressSpaces/pass-param-parse-errors.ll
M llvm/test/Transforms/InferAddressSpaces/vector-of-pointers.ll
Log Message:
-----------
InferAddressSpaces: Replace -assume-default-is-flat-addrspace cl::opt with pass parameter (#223480)
Migrate the pass-specific command-line option to a new pass manager
pass parameter, exposed as
infer-address-spaces<assume-default-is-flat-addrspace>.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: a5815099928aa1aa95bfe93201bc8c0b864fa10c
https://github.com/llvm/llvm-project/commit/a5815099928aa1aa95bfe93201bc8c0b864fa10c
Author: David Green <david.green at arm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
Log Message:
-----------
[AArch64] Add test coverage for constant mask and extract of a vector store. NFC (#223552)
Commit: 6fb04b665761e3dc99264b040ecd4781a49afd32
https://github.com/llvm/llvm-project/commit/6fb04b665761e3dc99264b040ecd4781a49afd32
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
Log Message:
-----------
[RISCV] Add SRLI+PACK pattern for (or (and rs1, 0xffffffff), (and rs2, 0xffffffff00000000)). (#223507)
Fixes #223455.
Commit: da8d3b78f6865ef6ce893f1690b9151851a43aed
https://github.com/llvm/llvm-project/commit/da8d3b78f6865ef6ce893f1690b9151851a43aed
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/Textures-AST.hlsl
M clang/test/AST/HLSL/Textures-scalar-AST.hlsl
M clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
M clang/test/AST/HLSL/Textures-vector-AST.hlsl
M clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Gather.hlsl
M clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default.hlsl
M clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmp.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
Log Message:
-----------
[HLSL] Implement Texture1D and its variants (#221061)
Fixes https://github.com/llvm/llvm-project/issues/194738
Fixes https://github.com/llvm/llvm-project/issues/194741
Fixes https://github.com/llvm/llvm-project/issues/194943
Fixes https://github.com/llvm/llvm-project/issues/194945
This PR implements the Texture1D type and its variants: RWTexture1D,
Texture1DArray, and RWTexture1DArray.
It also implements the codegen for the texture builtins so that they can
handle scalars where they otherwise always assumed a vector before the
existence of 1D textures.
Assisted by: Claude Opus 5
---
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Commit: 4ae3c053973d611ba106b060ae4b1dd8cacba0ef
https://github.com/llvm/llvm-project/commit/4ae3c053973d611ba106b060ae4b1dd8cacba0ef
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN bitop3 builtins (#223104)
Adds codegen for the following AMDGCN bitop3 builtins:
- __builtin_amdgcn_bitop3_b32
- __builtin_amdgcn_bitop3_b16
These are lowered to the corresponding `llvm.amdgcn.bitop3` intrinsic.
Commit: 87afb37e3f032af3107dbda6bc0da53460f0407f
https://github.com/llvm/llvm-project/commit/87afb37e3f032af3107dbda6bc0da53460f0407f
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/trip-count-stride-positive-from-guard.ll
A llvm/test/Transforms/IndVarSimplify/exit-value-guarded-positive-stride.ll
Log Message:
-----------
[ScalarEvolution] howManyLessThans infer stride isPositive from guard (#214014)
Infer Stride is positive from loop guard.
This enables SCEV to compute symbolic-max backedge-taken count for
multi-exit loops.
Motivating example:
void example(int *p, int n, int stride, int bound) {
if (stride <= 0) __builtin_trap(); // dominating guard => stride > 0
for (int i = 0; i < n; i += stride) {
if (i > bound) __builtin_trap(); // per-iteration bounds check (2nd
exit)
p[i] = 0;
}
}
Commit: a636e928c1d63c7eabe140832446f22e360ae001
https://github.com/llvm/llvm-project/commit/a636e928c1d63c7eabe140832446f22e360ae001
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV] Teach RISCVOptWInstrs that zext.w is fixable to sext.w. (#223559)
Note, in some cases erasing the zext.w and fixing an earlier
instruction would be even better but that requires more extensive
changes.
Commit: 52b2e03278f103f5baaa14a43bd9be380301de94
https://github.com/llvm/llvm-project/commit/52b2e03278f103f5baaa14a43bd9be380301de94
Author: David Dada <davidtofunmidada at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/src/__support/File/file.cpp
M libc/src/__support/File/file.h
A libc/src/__support/File/file_mode.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/File/linux/file.h
A libc/src/__support/File/linux/file_flags.h
M libc/src/stdio/fmemopen.cpp
M libc/src/stdio/fopencookie.cpp
M libc/src/stdio/linux/stderr.cpp
M libc/src/stdio/linux/stdin.cpp
M libc/src/stdio/linux/stdout.cpp
M libc/test/src/__support/File/CMakeLists.txt
A libc/test/src/__support/File/file_mode_test.cpp
M libc/test/src/__support/File/file_test.cpp
Log Message:
-----------
[libc] feat(filemode): implement class and helper functions to handle file modes for an opened file (#220906)
I moved the logic from `mode_flags` function to the `FileMode`
constructor.
The `FileMode` class has several helper methods to work with modes which
can then be called in `File` class.
Issue: #213374
---------
Signed-off-by: tdadadavid <davidtofunmidada at gmail.com>
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 37d9648ca786af803a4921aadbf842c7e12ec7f8
https://github.com/llvm/llvm-project/commit/37d9648ca786af803a4921aadbf842c7e12ec7f8
Author: Florian Mayer <fmayer at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
Log Message:
-----------
[NFC] [SelectionDAG] fix typo in comment (#223560)
Commit: 35d553bdd51c01effb0f7c4c161a77cc88b6b7a0
https://github.com/llvm/llvm-project/commit/35d553bdd51c01effb0f7c4c161a77cc88b6b7a0
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 52b2e03 (#223567)
This fixes 52b2e03278f103f5baaa14a43bd9be380301de94 (#220906).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=52b2e03278f103f5baaa14a43bd9be380301de94
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5cc8a513b417ab7dd791b78863e2f5f834f818d8
https://github.com/llvm/llvm-project/commit/5cc8a513b417ab7dd791b78863e2f5f834f818d8
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGen/forward-decls.cpp
Log Message:
-----------
[CIR] Fix 'isConstant' calc when looking at an incomplete type (#223444)
This popped up in a benchmark. Classic codegen ALWAYS sets this as
'excludeCtor'/'excludeDtor', but CIR tried 'harder' to get this right.
However, with an incomplete type, we can't actually look into it to see
if it has any mutable members, so determining 'constness' isn't
possible.
We could PROBABLY do better with enums since I would assume they can be
constant most of the time, but we fall-back to classic-codegen's
behavior here instead: which marks it as non-const.
Thanks to 'trying harder' than classic codegen as mentioned above, there
IS a slight LLVM-IR difference, but for the better.
Also note: Claude helped me with the tests.
Commit: 86dfc32f0defb728cf3cdabc346fa5e4939eae9e
https://github.com/llvm/llvm-project/commit/86dfc32f0defb728cf3cdabc346fa5e4939eae9e
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic-libcall.c
Log Message:
-----------
[CIR] Atomic compare-and-exchange via libcall (#206073)
This patch adds support for atomic compare-and-exchange operations via libcall.
Assisted-by: Codex / gpt-5.5 xhigh
Commit: 45c113d869c69ccf17b368e087c744713cf26bfa
https://github.com/llvm/llvm-project/commit/45c113d869c69ccf17b368e087c744713cf26bfa
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
Log Message:
-----------
[BOLT][AArch64] Make Android instrumentation runtime fail safe (#223110)
Profiling failure in BOLT instrumentation runtime should not kill the
host app on Android. Under `ANDROID_AARCH64`, we now handle failures
in instrumentation setup, memory allocation, hash table operations,
data dumping, opening profile output file, zero-counter binary, etc..
Since the first failure, we will disable profiling and directly return
from various instrumentation entry points, instead of assert/exit.
Only for Android AArch64; the behavior is unchanged otherwise.
Commit: 0d91c104dde79e5f4467c90cf109d16aabe45c99
https://github.com/llvm/llvm-project/commit/0d91c104dde79e5f4467c90cf109d16aabe45c99
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
Log Message:
-----------
[lldb] Fix use-after-free in jThreadsInfo stop info cache (#223488)
WillPublicStop iterates over the array borrowed from m_jthreadsinfo_sp
while WillResume concurrently resets the pointer on another thread,
freeing the array during the walk.
Protect the cached stop info with a mutex and copy the shared pointer
out before processing. Also modernize m_shared_cache_info to Guarded.
rdar://186776438
Commit: d6b0c1b9a79d5fdd3d6f94ae36adb266930bd68e
https://github.com/llvm/llvm-project/commit/d6b0c1b9a79d5fdd3d6f94ae36adb266930bd68e
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/test/AArch64/validate-branch-target.s
M bolt/test/X86/validate-branch-target.s
Log Message:
-----------
[BOLT] Prevent missing ExternalBranch validation (#221927)
#165406 introduced validation to check whether a branch target is a
valid instruction to detect corrupted CFGs. However, as described in
[165406#discussion](https://github.com/llvm/llvm-project/pull/165406#discussion_r2601459105),
it can miss validations when a function contains multiple invalid
ExternalBranches.
Therefore, this patch introduces a branch-level set to prevent duplicate
validations while ensuring no branches are missed.
Commit: 40ab38adced10d38446b8fe0912e2039436f5adb
https://github.com/llvm/llvm-project/commit/40ab38adced10d38446b8fe0912e2039436f5adb
Author: Haowei <haowei at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/test/Driver/modules-driver-depscan-log.cpp
Log Message:
-----------
Use -fsyntax-only for modules-driver-depscan-log.cpp test (#223014)
The modules-driver-depscan-log.cpp is failing after PR#222209 was landed
on mac when building LLVM with libcxx. This patch changed the `-o` flag
to `-fsyntax-only` to mitigate this issue.
Commit: 61a8c98594dbce9e09f39614b89cb74e563bcbbc
https://github.com/llvm/llvm-project/commit/61a8c98594dbce9e09f39614b89cb74e563bcbbc
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/default-flat-work-group-size-overrides-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Fix maximum physical LDS reporting for gfx6 (#223185)
Reference:
https://docs.amd.com/api/khub/documents/VeItSxvoJNzy28rl~JwEAQ/content#page=77
> “The maximum LDS allocation size for a work-group is still 32 kB,
however each compute unit has a total of 64 kB of LDS.”
Reference:
https://docs.amd.com/api/khub/documents/J4foK5jvufN9rTHf_DlCPw/content#page=22
> “Each compute unit has a 64 kB of Local Data Share (LDS) memory
space…”
> “Each workgroup can allocate up to 32 kB of this space, and can read
and write any portion of the LDS space allocated to it.”
Commit: 7e8ce3bd5b7460685e060a3b86d054cfdc22f2bf
https://github.com/llvm/llvm-project/commit/7e8ce3bd5b7460685e060a3b86d054cfdc22f2bf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
Log Message:
-----------
[lldb] Bound JSON object file text by buffer size (#223575)
ObjectFileJSON created a StringRef from a bare pointer without a length.
Mapped buffers lack a NULL terminator, causing strlen to read past
page-aligned mappings.
Pass the buffer size and stop at the first NULL to handle unterminated
mappings and zero-padded probe reads.
rdar://186899370
Commit: 95ecc0a5736632f9cea75ad445a537979d3fc429
https://github.com/llvm/llvm-project/commit/95ecc0a5736632f9cea75ad445a537979d3fc429
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A compiler-rt/test/fuzzer/MinimizeCrashCustomMutatorTest.cpp
A compiler-rt/test/fuzzer/minimize_crash_custom_mutator.test
Log Message:
-----------
[libFuzzer] Add test for stale size passed to Mutate in MinimizeCrashLoop (#223502)
Add tests for the fix in #223470.
Commit: 3493720eca95cf844a8d7e58fdd12e0e5644e7d0
https://github.com/llvm/llvm-project/commit/3493720eca95cf844a8d7e58fdd12e0e5644e7d0
Author: Ryunosuke (Rick) Yanashita <ryunosukeyanashita at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Add fold combining adjacent extracted bit fields to restore optimization for separate truncations (#219598)
This restores the InstCombine optimization that was lost (regression)
starting from Clang 14, when assembling adjacent bit fields extracted
from a wider integer.
The fold combines:
```
(trunc (lshr X, S) & M0) | (lshr (trunc X), S & M1) --> (trunc (lshr X, S) & (C0 | C1))
```
The fold handles both orderings. I implemented tests for this fold in
trunc.ll
alive2 proof: https://alive2.llvm.org/ce/z/rPQN4D
Fixes #215254
Commit: cecd28d75cf5407287085e4042ef4fc7ed7feadd
https://github.com/llvm/llvm-project/commit/cecd28d75cf5407287085e4042ef4fc7ed7feadd
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvy/rvy-invalid-operands.mir
M llvm/unittests/Target/RISCV/RISCVBaseInfoTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Select the capability ABI by default when the Y extension is enabled
computeDefaultABI() previously had no knowledge of the RVY (CHERI) base,
so a target with Y enabled and no explicit -target-abi
would fall back to the plain integer ABI instead of il32pc64(d)/
l64pc128(d).
This adds explicit non-RVY ABIs to two tests since otherwise those would
hit the assertion that the ABI is not supported yet. As the ABI does not
matter for these tests, we can safely use the non-RVY ones.
This change was created with the help of AI tools
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/213411
Commit: b557f073f1ea9fab14102cfc93edb40285599670
https://github.com/llvm/llvm-project/commit/b557f073f1ea9fab14102cfc93edb40285599670
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
Log Message:
-----------
[mlir][tosa] Use optnone for compliance initialization under MSan (NFC) (#223586)
The compliance-map constructor includes a ~5,000-line generated
initializer.
Under MemorySanitizer, shadow and origin tracking instrumentation on
this single mega-function causes extreme compilation times (>3.5
minutes),
dominated by InstCombine (~68s) and greedy register allocation (~71s).
Recently, LLVM_ATTRIBUTE_MINSIZE was added to optimize for size, but
MSan
instrumentation still inflates the function enough to trigger severe
slowdowns in the backend.
Mark the constructor with optnone under LLVM_MEMORY_SANITIZER_BUILD to
skip
expensive optimization and register allocation passes, bringing
compilation
time under MSan down from 3m38s to ~30s.
This is done to fix
http://lab.llvm.org/buildbot/#/builders/aarch64-linux-msan,
though it is very slow on x86_64 as well.
Assisted-by: Gemini
Commit: 712ec9ed515a15d347f2feafd8bdb5032ed2c15a
https://github.com/llvm/llvm-project/commit/712ec9ed515a15d347f2feafd8bdb5032ed2c15a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
Log Message:
-----------
[ORC] Fix OrcCAPITestBase.ExecutionTest on Darwin/arm64e (#223577)
Switch to ExecutorAddr::toPtr to sign the function pointer. We'll need a
C API solution for this eventually, but this will do for now to get the
test passing.
rdar://186687669
Commit: ac2fb41926f9f7723517670788800d448970151a
https://github.com/llvm/llvm-project/commit/ac2fb41926f9f7723517670788800d448970151a
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/LEB128.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
M llvm/unittests/Support/LEB128Test.cpp
Log Message:
-----------
[ProfileData] Bound binary sample profile primitive reads (#215476)
Fix pre-existing latent memory-safety issues that could cause
out-of-bounds reads or invalid pointer arithmetic on malformed,
truncated, or non-null-terminated buffers:
* unbounded ULEB128 decoding in readNumber() and Raw/Ext format probes;
* unbounded terminator searches in readString() and GCC format
detection;
* unsafe bounds checking in readUnencodedNumber().
Use bounded decoding, memchr, overflow-safe size checks, and typed
ULEB128 errors. Preserve the existing decodeULEB128 interface and avoid
test-only ABI exports.
Add functional and guard-page tests that detect boundary regressions
without requiring sanitizers.
Assisted by GPT-5
Commit: d041ef4182361ca50c6744f8e48854c416e079bd
https://github.com/llvm/llvm-project/commit/d041ef4182361ca50c6744f8e48854c416e079bd
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M utils/docs/__main__.py
A utils/docs/llvm_sphinx/ext/absolute_links.py
A utils/docs/llvm_sphinx/ext/absolute_links_test/conf.py
A utils/docs/llvm_sphinx/ext/absolute_links_test/index.rst
A utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md
A utils/docs/llvm_sphinx/ext/absolute_links_test/rest.rst
A utils/docs/llvm_sphinx/ext/absolute_links_test/target.md
M utils/docs/llvm_sphinx/ext/checks.py
Log Message:
-----------
[docs] Check for absolute self-documentation links (#222504)
Add an opt-in llvm_sphinx check that diagnoses absolute links to
documents in the current Sphinx project. Operate on the parsed doctree
so the check works for both reStructuredText and MyST without flagging
examples in literal blocks.
For example, restoring one absolute link in the LLVM documentation makes
a warnings-as-errors build report:
llvm/docs/ReleaseNotes.md:321: WARNING: absolute URL points to document
'index' in this Sphinx project; use an internal 'doc' or 'ref' role
instead: https://llvm.org/docs/ [llvm_sphinx.absolute-doc-link]
Part of #214861
Assisted-by: codex
Commit: d13e4a13abe3e7ed3dacb0ec771c8eaa7dadb861
https://github.com/llvm/llvm-project/commit/d13e4a13abe3e7ed3dacb0ec771c8eaa7dadb861
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/test/CodeGen/NVPTX/tcgen05-mma-block-scale.ll
M llvm/test/CodeGen/NVPTX/tcgen05-mma-collector-b.ll
M llvm/test/CodeGen/NVPTX/tcgen05-mma.ll
Log Message:
-----------
[NVPTX] Add default value to collector_b ImmArg in tcgen05.mma intrinsics (#220237)
This patch adds default value for the `collector_b` flag in
`tcgen05.mma` intrinsics.
Also adds lit tests to verify that calls without explicit `collector_b`
operands correctly materialized with default value.
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 08c860ba2d7719ec825c70c26bc032c577b85757
https://github.com/llvm/llvm-project/commit/08c860ba2d7719ec825c70c26bc032c577b85757
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/TypeMetadataUtils.h
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
Log Message:
-----------
[NFC][LowerTypeTests] Move CFI metadata creation and helpers to LowerTypeTests (#223581)
Move enum CfiFunctionLinkage from llvm/Analysis/TypeMetadataUtils.h into
llvm/Transforms/IPO/LowerTypeTests.h (in namespace lowertypetests).
Move hasTypeMetadata and findCfiFunctions from ThinLTOBitcodeWriter into
LowerTypeTests.
Encapsulate cfi.functions, aliases, and symvers metadata creation into
lowertypetests::createCfiMetadata in LowerTypeTests.cpp, removing the
manual metadata generation from ThinLTOBitcodeWriter.
PR Stack:
* ➤ https://github.com/llvm/llvm-project/pull/223581
* https://github.com/llvm/llvm-project/pull/223582
Assisted-by: Gemini
Commit: 6ce57ce40b2ce2b466d658a289427d7817e6c468
https://github.com/llvm/llvm-project/commit/6ce57ce40b2ce2b466d658a289427d7817e6c468
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
A llvm/test/CodeGen/AArch64/complex-deinterleaving-fmf-intersection.ll
Log Message:
-----------
[ComplexDeinterleaving] Use FMF intersection instead of requiring strict equality (#219158)
Commit: 636a86aa046df9ed800c7b125f1c67e5028a75d8
https://github.com/llvm/llvm-project/commit/636a86aa046df9ed800c7b125f1c67e5028a75d8
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-exp.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-log.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-multi-result.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/expand-fp-math.ll
Log Message:
-----------
[CodeGen] Add scalarization fallback for multi-result scalable intrinsics (#218634)
Commit: 8e38a37adaf935561d6fe8d7e2323a4042cee556
https://github.com/llvm/llvm-project/commit/8e38a37adaf935561d6fe8d7e2323a4042cee556
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vloxei-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vloxei.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vluxei-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vluxei.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/nontemporal-vp-scalable.ll
M llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vloxei.ll
M llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vluxei.ll
M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
Log Message:
-----------
[RISCV] Improve the earlyclobber constraint for vector index load. (#223565)
When the data EEW is smaller than the index EEW, the destination may
overlap the index operand as long as the overlap is in the
lowest-numbered part of the index register group. If the index EMUL is
no larger than 1 then both operands are a single register, so any
overlap is necessarily the lowest-numbered part and no constraint is
needed.
Assisted-by: Claude
Commit: a1c0e0b64fe2db17d4be70b4da0f73d3c1c942a9
https://github.com/llvm/llvm-project/commit/a1c0e0b64fe2db17d4be70b4da0f73d3c1c942a9
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes ac2fb41 (#223601)
This fixes ac2fb41926f9f7723517670788800d448970151a (#215476).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ac2fb41926f9f7723517670788800d448970151a
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 0db5329758ea658bb5580408560c6333ed815bbb
https://github.com/llvm/llvm-project/commit/0db5329758ea658bb5580408560c6333ed815bbb
Author: Sachin 🗲 <s4chinjha at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Adds missing targets for bf16 public headers to bazel files (#222071)
Adds the missing public `libc_math_function` targets for:
* `canonicalizebf16`
* `getpayloadbf16`
* `setpayloadbf16`
* `setpayloadsigbf16`
Commit: f5e3036d5f89e9eb4e9f4c391045241cbfa4c7f7
https://github.com/llvm/llvm-project/commit/f5e3036d5f89e9eb4e9f4c391045241cbfa4c7f7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/lib/Transforms/IPO/CrossDSOCFI.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[NFC][CrossDSOCFI] Move findCfiTypeIds to LowerTypeTests (#223582)
Move 64-bit numeric type identifier collection logic and
extractNumericTypeId
from CrossDSOCFI.cpp into LowerTypeTests.cpp, exposing it as
lowertypetests::findCfiTypeIds in llvm/Transforms/IPO/LowerTypeTests.h.
Encapsulate Cross-DSO CFI type ID discovery so CrossDSOCFI no longer
directly parses cfi.functions metadata.
PR Stack:
* https://github.com/llvm/llvm-project/pull/223581
* ➤ https://github.com/llvm/llvm-project/pull/223582
Assisted-by: Gemini
Commit: 414086d82a0873800deba69fcc006f79a41aeed1
https://github.com/llvm/llvm-project/commit/414086d82a0873800deba69fcc006f79a41aeed1
Author: David Green <david.green at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/docs/GlobalISel/Legalizer.md
Log Message:
-----------
[GlobalISel][Docs] Remove footnote about legacy legalizer rules. (#223460)
Commit: bfab06044d7923aedbc615c0c098767ad2a81df2
https://github.com/llvm/llvm-project/commit/bfab06044d7923aedbc615c0c098767ad2a81df2
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/flags.ll
Log Message:
-----------
[MergeFunc] Fix poison flag merging for varargs functions (#223347)
This is a followup to https://github.com/llvm/llvm-project/pull/220015.
writeThunkOrAliasIfNeeded() has an early exit for the case where none of
erase/thunk/alias apply, and we failed to merge the poison flags in that
case. I've opted to fix this by moving the annotation merging logic out
of writeThunkOrAliasIfNeeded() entirely, because I don't think it
logically fits there (it's not related to thunk/alias creation at all).
This is the minimal fix to address the miscompile. There is a potential
larger change we could make here, which is to avoid "merging" the
functions in this case in the first place. We don't actually merge the
functions here, but just rewrite all uses to one of them. This seems
kind of dubious to me, though I could see an argument that this can
still be beneficial in conjunction with --gc-sections (i.e. linker-level
dead function elimination).
Commit: ee33e90d1a1a064a0e21d28a27fbdb450490686c
https://github.com/llvm/llvm-project/commit/ee33e90d1a1a064a0e21d28a27fbdb450490686c
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvm] Add llvm.intr.modf intrinsic (#222355)
Assisted-by: grok-4.6 and gpt-5.6-sol
---------
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: b0e8a6f3d77950082ad13dfc8666a8994188b3fd
https://github.com/llvm/llvm-project/commit/b0e8a6f3d77950082ad13dfc8666a8994188b3fd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
Log Message:
-----------
AMDGPU: Remove volatile from some atomic tests (#223528)
Commit: 6526e5bc64b15efd1c972f6035f34a432637948e
https://github.com/llvm/llvm-project/commit/6526e5bc64b15efd1c972f6035f34a432637948e
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FloatingPoint.cpp
A llvm/test/CodeGen/X86/pr149371.ll
Log Message:
-----------
[X86] Fix FP `stackifier` crash on invalid `x87` inline `asm` constraints (#221881)
Fixes #149371
When an x87 inline asm uses the stack registers in a layout the FP
stackifier can't model, for example an input tied to `st(1)` while
`st(0)` and `st(1)` are both outputs, the pass reports "fixed input regs
must be last on the x87 stack" and then keeps going as if nothing
happened. It simulates the pops and pushes with counts taken from masks
it has just found to be non-contiguous, so the input never leaves the
stack model and the same register gets pushed again as an output. The
model now holds a duplicate entry, and the next `adjustLiveRegs` trips
"Live count mismatch". The odd `R0` constraint in the report isn't the
culprit, by the way; it resolves to a plain integer register and leaves
the tied `1` as the only x87 input.
Once any of these errors has been reported, the asm is no longer
simulated. The pass pops the inputs the asm kills and pushes its
outputs, which keeps the stack model consistent with what the register
allocator expects, and then lets compilation fail normally with the
diagnostic. The old trick of rounding the output mask up to a contiguous
range is gone too, since it only papered over one of the four cases. The
new test covers all four diagnostics plus the two-asm sequence that used
to assert.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: b2ef8caec3c2add664cbe88978793f44ed662ae3
https://github.com/llvm/llvm-project/commit/b2ef8caec3c2add664cbe88978793f44ed662ae3
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/test/CodeGen/RISCV/riscv-cf-protection.c
Log Message:
-----------
[Clang] Make Unlabeled the default control flow branch label scheme (#223297)
The work on "func-sig" label scheme is discontinued, so it's better to
switch the default to unlabeled at this time.
Commit: 95bdf4cc24c0109f4ad3ea383081786d21880445
https://github.com/llvm/llvm-project/commit/95bdf4cc24c0109f4ad3ea383081786d21880445
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/IR/Metadata.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[IR] Do not track metadata uses of ConstantData (#223303)
A ConstantData is never RAUW'd or deleted (#137313 removed its use list
for that reason), so the use list of its ConstantAsMetadata node is
written but never read. Stop tracking these uses.
In a module with debug info the PoisonValue node had the largest use
lists: a debug record is retargeted to poison when the instruction it
describes is deleted (`Instruction::~Instruction`) or its location is
killed.
Aided by Opus 5
Commit: f123e15308929c0ed49183821db5a21a34e1b713
https://github.com/llvm/llvm-project/commit/f123e15308929c0ed49183821db5a21a34e1b713
Author: Utpal Bora <utpal.bora2 at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-insert-extract.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/sve-vls-shuffle-extract.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-non-native-interleaved-accesses.ll
Log Message:
-----------
[AArch64][CostModel] Update SVE inserelement/extractelement costs (#220627)
This updates the costs for inserting/extracting elements into/from
fixed-length SVE vectors when the lane exceeds the index for the
NEON mov lane (dup/ins) instructions.
Commit: c7e741b9f8d372bdfe04c19425faa64c3c496bb4
https://github.com/llvm/llvm-project/commit/c7e741b9f8d372bdfe04c19425faa64c3c496bb4
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/test/MC/RISCV/hinval-invalid.s
Log Message:
-----------
[RISCV][MC] Require H for HINVAL instructions (#223588)
HINVAL.VVMA and HINVAL.GVMA are provided by Svinval only when the
Hypervisor extension is implemented.
This commit fixes the incorrect extension dependency.
See:
https://github.com/riscv/riscv-isa-manual/blob/be8cb008612ce2ac1712e4ba3f09fc2109c0d462/src/priv/svinval.adoc?plain=1#L45-L46
Commit: 74bdb1594ec40502b46dd12d8c0ee096561869cb
https://github.com/llvm/llvm-project/commit/74bdb1594ec40502b46dd12d8c0ee096561869cb
Author: Gábor Tóthvári <gabor.tothvari at ericsson.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[NFC][analyzer] Do not spell out unreachable statement kinds in `shouldJustCallCheckers` (#223473)
The function `shouldJustCallCheckers` introduced recently in
e829049823905405779c6b908437b200e7ed1b2e returns true by default and
returns false for statement kinds where it is inappropriate to call the
PreStmt and PostStmt checkers in the "normal" pattern.
Unreachable statement kinds (e.g. control flow statements that never
appear as non-terminator statements in a CFGBlock) were covered by
explicit cases in `shouldJustCallCheckers`, but this was needless
complexity, so this commit removes it. These statement kinds run into
`llvm_unreachable` in `ExprEngine::Visit`, so the behavior of
`shouldJustCallCheckers` is completely inconsequential.
Commit: f0907c3d807f08a34f45e106c3f28b034b8e8c8e
https://github.com/llvm/llvm-project/commit/f0907c3d807f08a34f45e106c3f28b034b8e8c8e
Author: Vimal Patel <vimal.patel at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
M llvm/test/CodeGen/AArch64/fcvt-fixed.ll
Log Message:
-----------
[AArch64] Improve scalar fixed-point int-to-fp codegen (#220299)
[AArch64] Improve scalar fixed-point int-to-fp codegen
Select the scalar FPR shifted conversion forms when the integer input
is already in an FPR, and keep the GPR forms for integer inputs in
GPRs.
Add coverage for intrinsic and sitofp/uitofp fixed-point conversions.
Select scalar FP/SIMD-register conversion forms when a fixed-point
int-to-fp conversion uses a value extracted from a SIMD vector.
This avoids moving the reduction result through a GPR before
converting to floating point.
Commit: 65692520212abd878ec0c3dbe9fbfccfc4439c96
https://github.com/llvm/llvm-project/commit/65692520212abd878ec0c3dbe9fbfccfc4439c96
Author: David Green <david.green at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/ARM/shuffle.ll
Log Message:
-----------
[ARM] Add cost test coverage for uzp/zip/trn shuffles. NFC (#223621)
Commit: 08169f5fb1b7386002cdb66e52192580fc0fcf24
https://github.com/llvm/llvm-project/commit/08169f5fb1b7386002cdb66e52192580fc0fcf24
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Return a SCEVUse from getMulExpr and propagate use flags. (#221486)
Same as https://github.com/llvm/llvm-project/pull/220007 but for
getMulExpr:
add option to pass SCEVUse-specific flags to getMulExpr and propagate
them through, if valid conservatively. That is, the final expression
multiples the same operands (potentially in different order). For
example, it is not valid to propagate the use flags if other
(sub-)expressions have been inlined.
It also includes a few mechanical changes, to update users that still
expected const SCEV *.
PR: https://github.com/llvm/llvm-project/pull/221486
Commit: 5fee83dfe895db41930566a9146fdade0e30dd8c
https://github.com/llvm/llvm-project/commit/5fee83dfe895db41930566a9146fdade0e30dd8c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll
Log Message:
-----------
[AArch64] Promote unpacked SVE f16/bf16 compressstores 32/64-bit (#222321)
To support compressstore for unpacked 16-bit SVE floats (e.g., nxv2f16),
we need to expand the compressstore before type legalization. If we
expand after type legalization the `VECTOR_COMPRESS` node inserted won't
be promoted to a 32/64-bit element size (which means we'd have to
duplicate some type legalization in the lowering).
Commit: 0431cbe627d8000a49843965a9c22115c178e5d5
https://github.com/llvm/llvm-project/commit/0431cbe627d8000a49843965a9c22115c178e5d5
Author: Vimal Patel <vimal.patel at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
Log Message:
-----------
[AArch64] Use firstp for SVE2.2 cttz.elts (#221182)
Preserve zero-is-poison cttz.elts as a distinct AArch64ISD node.
This lets instruction selection choose firstp for SVE2.2 and SME2.2.
Keep brkb/cntp for no-poison uses and for older targets.
Commit: 105edd81b1f11e18bbb0db377135093ebc38fd3b
https://github.com/llvm/llvm-project/commit/105edd81b1f11e18bbb0db377135093ebc38fd3b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerAtomic.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-flat-i64-private-volatile.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-private-gas.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll
Log Message:
-----------
LowerAtomic: Preserve the volatile flag when lowering atomicrmw and cmpxchg (#223544)
These utility functions built the replacements without copying the
volatile flag from the original instruction.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 710d0c3ee1689e5cfb029ab0e6fd7be0e14fcb73
https://github.com/llvm/llvm-project/commit/710d0c3ee1689e5cfb029ab0e6fd7be0e14fcb73
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M polly/test/ScopDetect/simple_loop_with_param.ll
M polly/test/ScopDetect/simple_loop_with_param_2.ll
M polly/test/ScopInfo/inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra_bb_scalar_dep.ll
M polly/test/ScopInfo/tempscop-printing.ll
Log Message:
-----------
[Polly][NFC] Fix loop index in C comments of tests with nested loops (#220589)
The C pseudo-code in tests declares `long i, j`, but the inner loop
reuses `i` instead of `j`, which would overwrite the outer loop counter
and describe a different program than the IR below it.
Commit: 7cfdd2a6f4a1eef5715fca3055351cf6bc8958b1
https://github.com/llvm/llvm-project/commit/7cfdd2a6f4a1eef5715fca3055351cf6bc8958b1
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
Log Message:
-----------
[NFC][AMDGPU] Replace undef with poison in cast.ll, fptosi.ll and fptoui.ll (#223570)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 0f639380ff1e1c43ae54be282df3b565382c94a7
https://github.com/llvm/llvm-project/commit/0f639380ff1e1c43ae54be282df3b565382c94a7
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/Sema/riscv-pset-index-out-of-range.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Element Insert (#222268)
Commit: 44b2bd2ace3e43784256dccf7a755029fce71774
https://github.com/llvm/llvm-project/commit/44b2bd2ace3e43784256dccf7a755029fce71774
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/TypeSanitizer.md
Log Message:
-----------
[Docs][TySan] Correct optimisation remarks (#205577)
I think I got my wires crossed here between TySan and other sanitizers
when I was using their docs for reference on how to structure this file.
If a strict aliasing violation was going to cause problems, by the time
higher level optimizations come through and restructure the code, say by
removing a load/store, you no longer have the behaviour TySan would pick
up on.
Commit: aa7f41715403dc6c8018524ca1806a86b70014fb
https://github.com/llvm/llvm-project/commit/aa7f41715403dc6c8018524ca1806a86b70014fb
Author: Hadong Lee <hdchris765 at snu.ac.kr>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
A llvm/test/Analysis/LoopAccessAnalysis/zero-distance-mixed-width.ll
Log Message:
-----------
[LAA] Allow zero-distance dependences between mixed-width accesses (#221531)
Allow zero-distance dependences between mixed-width accesses to be
classified as `Forward` when they have a common byte stride.
`getDependenceDistanceStrideAndSize` already requires non-zero strides
in the same direction, each a multiple of the corresponding type's
allocation size. A common byte stride is therefore at least as large as
either access. With equal starting addresses, accesses from different
iterations cannot overlap.
Alive2: https://alive2.llvm.org/ce/z/KN6Hke
Fixes #218320
Commit: c6bad7c79642fdef2cc997b44f6e5c7db8508530
https://github.com/llvm/llvm-project/commit/c6bad7c79642fdef2cc997b44f6e5c7db8508530
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
A llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
Log Message:
-----------
[AMDGPU] Scale the frame register in place when lowering scalar frame indices (#221972)
Lowering a scalar frame index needs a scalar temporary, and under full
SGPR pressure the scavenger emergency-spills instead, which flips EXEC
with `s_not_b64` and clobbers SCC, With SCC live the spill builder gives
up with `error: unhandled SGPR spill to memory`.
Use `FrameReg` itself as the temporary and restore it after the
instruction with `S_MUL_I32`, which unlike `S_LSHL_B32` does not write
SCC, folding a non-zero offset back through an
`S_ADDC_U32`/`S_BITCMP1_B32`/`S_BITSET0_B32` sequence when SCC is still
live.
This is restricted to SALU instructions with a single frame index that
do not otherwise touch `FrameReg`; everything else keeps the existing
path, including the emergency spill.
Assisted-by: Claude Opus 5
Commit: 88107b203b9e02a2d6ce87bf8ba0d98cb6ff53ec
https://github.com/llvm/llvm-project/commit/88107b203b9e02a2d6ce87bf8ba0d98cb6ff53ec
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Add expand-multi-result.ll to profcheck-xfail.txt (#223614)
>From #218634
Added for the same reason as other
`PreISelIntrinsicLowering/AArch64/expand-*` tests. Fixes `profcheck`
failure.
Commit: f8ae252564bd052d4bb235a65b4c5a6db48f234b
https://github.com/llvm/llvm-project/commit/f8ae252564bd052d4bb235a65b4c5a6db48f234b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
Log Message:
-----------
[X86] zero-call-used-regs-simd.ll - add baseline no-vlx test coverage from #212147 (#223634)
Commit: 11576edbc8ab574ceacd9a624c08f730a5a7676b
https://github.com/llvm/llvm-project/commit/11576edbc8ab574ceacd9a624c08f730a5a7676b
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/OpenMP/trailing-cycle.f90
A flang/test/Lower/trailing-cycle.f90
Log Message:
-----------
[flang] Delete a trailing CYCLE that is the last statement of its DO (#223399)
A CycleStmt at the end of the body of its own DoConstruct is a no-op:
branching to the EndDoStmt and falling through to it are the same thing.
Branch analysis nonetheless marks the DoConstruct unstructured, which
costs the structured form of the loop and the induction variable
semantics that later passes rely on.
Delete such a CycleStmt in the PFT. The statement must be unlabeled, so
that it is not itself a branch target, and it must name either no
construct or this one.
Commit: e733cebdf7c9c87bec77547f3c377f514a22c9b3
https://github.com/llvm/llvm-project/commit/e733cebdf7c9c87bec77547f3c377f514a22c9b3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/CodeGen/ARM/atomic-op.ll
A llvm/test/Transforms/AtomicExpand/ARM/thread-model-single.ll
Log Message:
-----------
CodeGen: Replace TargetOptions::ThreadModel with module flag (#223157)
Migrate the threading-model consumers off TargetOptions::ThreadModel and
onto the "thread-model" module flag. The main user was ARM's pass config,
which is moved into AtomicExpand, which now performs the single-thread
expansion directly.
Few tests use the -thread-model flag, so delete it and migrate those
cases to use the module flag.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: f1450b2d298826abdff1660d0e1747935529357f
https://github.com/llvm/llvm-project/commit/f1450b2d298826abdff1660d0e1747935529357f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
Log Message:
-----------
[clang][bytecode] Allocate records fields and bases via Program allocator (#223433)
They have the same lifetime as other things in `Program`. And we know
the number of things to allocate in advance, apart from some small
overallocations with explicitly specified virtual bases.
Commit: a125e6ed795798ee87376a82f90cb3fd897b25ca
https://github.com/llvm/llvm-project/commit/a125e6ed795798ee87376a82f90cb3fd897b25ca
Author: Kristina Bessonova <kbessonova at accesssoftek.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
A llvm/test/CodeGen/AArch64/GlobalISel/localizer-tls.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
Log Message:
-----------
Reland "[AArch64][GlobalISel] Add support for TLS for ELF" (#223443)
This relands #220236.
The original patch missed a case where TLS-related computations could be
localized into the middle of a call-frame adjustment sequence.
The fix prevents TLS variable localization on ELF, in the same way as on
Mach-O (see the second patch in this PR).
Commit: f6f250a3b58eb3a0862b57210a5bd0b7a092b132
https://github.com/llvm/llvm-project/commit/f6f250a3b58eb3a0862b57210a5bd0b7a092b132
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/DeclOrExpr.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.cpp
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
Log Message:
-----------
[clang][bytecode] Use opaque pointers for expr-based dummy pointers (#221218)
Similar to https://github.com/llvm/llvm-project/pull/220917, but for
expressions.
Commit: 263bbd476c9fce30acb9c70d5dae556dd994b08b
https://github.com/llvm/llvm-project/commit/263bbd476c9fce30acb9c70d5dae556dd994b08b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/test/Frontend/gnu-mcount.c
Log Message:
-----------
clang/ARM: Derive -pg mcount name from the triple environment (#220822)
For a glibc/gnueabi ARM and AArch64 targets, GCC's -pg instrumentation
always calls __gnu_mcount_nc (with the caller pushing LR, per the "nc"
no-LR-clobber ABI). clang only produced this when -meabi=gnu was passed
explicitly; a separate gnueabi triple wrongly called plain "mcount".
On ARM, glibc's EABI profiling entry point is __gnu_mcount_nc
(sysdeps/arm/arm-mcount.S, exported since GLIBC_2.8). It does provide
plain mcount/_mcount, but only as a legacy APCS compat alias
(__mcount_arm_compat, gated on GCC_COMPAT(4,3)/SHLIB_COMPAT)
that reads an APCS frame-pointer record rather than following the EABI push-LR
convention. Calling it from EABI -pg code is thus an ABI mismatch, not the intended
entry point.
Derive the GNU-vs-plain mcount name from the triple environment in
addition to the explicit -meabi=gnu, so a gnueabi target gets the correct
__gnu_mcount_nc call by default, matching GCC:
push {lr}
bl __gnu_mcount_nc
clang vs. gcc mismatch: https://godbolt.org/z/erEqfxs3s
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 9b5b5ff2251c19c5e05dfd8447d295966baf2a8b
https://github.com/llvm/llvm-project/commit/9b5b5ff2251c19c5e05dfd8447d295966baf2a8b
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M compiler-rt/resources/windows_version_resource.rc
Log Message:
-----------
[compiler-rt] Set FILEOS and FILETYPE in windows_version_resource.rc (#223387)
This is a follow-up to #216408 which added version info to runtime DLLs.
We have a test (in Crashpad) that expects the FILEOS and FILETYPE to be
set. I suppose it was getting default values from somewhere before, but
after #216408 it fails unless we set them explicitly.
Commit: 57c40b76a884df783f807588fa0b9bd92bca2a6b
https://github.com/llvm/llvm-project/commit/57c40b76a884df783f807588fa0b9bd92bca2a6b
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
A llvm/test/CodeGen/Mips/msa/f16vec-insertelement.ll
A llvm/test/CodeGen/RISCV/rvv/insertelt-fp-soft-promote.ll
Log Message:
-----------
[SelectionDAG] Soft promote the element operand of INSERT_VECTOR_ELT (#223612)
When f16/bf16 is soft promoted but a vector of that type is legal,
INSERT_VECTOR_ELT is left with a soft promoted i16 element operand.
SoftPromoteHalfOperand had no case for it and failed with "Do not know
how to soft promote this operator's operand!".
Legalize it like BUILD_VECTOR and the inverse EXTRACT_VECTOR_ELT:
bitcast
the vector to its integer counterpart, insert the promoted element there
and bitcast the result back. This also covers scalable vectors.
This is reachable on MIPS MSA and on RISC-V with Zvfhmin/Zvfbfmin but
without Zfhmin/Zfbfmin. X86, Hexagon and WebAssembly avoid it by custom
lowering INSERT_VECTOR_ELT on the scalar type; that still takes
precedence and can be removed separately.
Fixes https://github.com/llvm/llvm-project/issues/198104.
Assisted-by: Claude Code
Commit: 821dc0a3b170d79597a95e17fa10c2a6959c42b2
https://github.com/llvm/llvm-project/commit/821dc0a3b170d79597a95e17fa10c2a6959c42b2
Author: Vito Kortbeek <vito.kortbeek at globalfoundries.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/test/Transforms/TypePromotion/ARM/casts.ll
Log Message:
-----------
[TypePromotion] Drop invalid nsw from promoted trunc-to-i1 conditions (#223637)
Fix a miscompile introduced in #216311. TypePromotion zero-extends the
operand of a trunc to i1. When doing so, drop nsw unless nuw is also
set, as the original operand might be all ones.
Preserve nuw because it remains valid when zero-extending. Preserve nuw
nsw as well, since it implies an all-zero operand when truncating to i1.
Alive2 proofs: https://alive2.llvm.org/ce/z/GHTZXg
Commit: 1232d0e8539a2c50bc3f40335ade86b34408b476
https://github.com/llvm/llvm-project/commit/1232d0e8539a2c50bc3f40335ade86b34408b476
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-fp-constrained-intrinsics.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Add isel for constrained cast operations. (#221976)
Implements lowering for constrained variants of fpext, fptosi, fptoui,
fptrunc, rint, sitofp and uitofp. Support covers scalable vectors of
half, float and double element type, with bfloat support due in a
follow-up PR.
Commit: f215866b883b0394c4093d163834366e4635180c
https://github.com/llvm/llvm-project/commit/f215866b883b0394c4093d163834366e4635180c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
A llvm/test/Transforms/LICM/Inputs/thread-model-single.ll
M llvm/test/Transforms/LICM/promote-single-thread.ll
Log Message:
-----------
LICM: Drop -licm-force-thread-model-single in favor of the module flag (#223158)
Now that the threading model is carried by the "thread-model" IR module
flag, the hidden -licm-force-thread-model-single override is redundant: a test
can select the single-threaded model by setting the module flag directly.
isThreadLocalObject reads only Module::getThreadModel.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: fe479338a7abbe93d9c4bc32d44a53a17a7e2f6e
https://github.com/llvm/llvm-project/commit/fe479338a7abbe93d9c4bc32d44a53a17a7e2f6e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
A llvm/test/Assembler/module-flags-exception-model.ll
A llvm/test/Linker/module-flags-exception-model.ll
A llvm/test/Verifier/module-flags-exception-model.ll
Log Message:
-----------
IR: Introduce "exception-model" module flag (#220052)
Add an "exception-model" IR module flag intended to replace
TargetOptions::ExceptionModel, such that the ABI is fully
computable from the IR alone. Add the basic documentation and
verifier/linker tests, but doesn't wire up the consumers.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 3d2514f8e7f322bb520f904857268a27c086ca2e
https://github.com/llvm/llvm-project/commit/3d2514f8e7f322bb520f904857268a27c086ca2e
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[NFC][LLVM][AArch64TTI] Remove redundant type checking of convert_to_svbool operand. (#222945)
Commit: c6ec955ea331a089169fd2ffb8b08af88c0cb350
https://github.com/llvm/llvm-project/commit/c6ec955ea331a089169fd2ffb8b08af88c0cb350
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
A llvm/test/CodeGen/AArch64/wineh-async-eh-pad-instr-size.ll
Log Message:
-----------
[TargetInstrInfo] Disable size verification for EH_LABEL (#223641)
EH_LABEL may produce a nop if using async exceptions and followed
by a trapping instruction.
Suppress the verification error until the incorrect size reporting
is fixed.
Commit: 492410de73b0b99b1778bfcd746bc8735bdaba58
https://github.com/llvm/llvm-project/commit/492410de73b0b99b1778bfcd746bc8735bdaba58
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Basic/TargetID.h
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
Reapply "clang: Use TargetID parsing from AMDGPUTargetParser" (#213824) (#213847)
This reverts commit 8f82ba2c79f4e6a69a884cc9e19bd0b8c0bbe932.
Clang subarch patches have landed, so the prematurely build bots should be OK now.
Commit: 1e6a620b20b34ac9e254207a604259e150e92205
https://github.com/llvm/llvm-project/commit/1e6a620b20b34ac9e254207a604259e150e92205
Author: tfzee <tim.ziegler at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-chained-bf16.ll
Log Message:
-----------
Make extract vector for bf16 types legal (#222913)
Fixes #222585
Makes EXTRACT_SUBVECTOR legal for bf16 types leading to this new codegen
```asm
# $ ./build/bin/clang test.c -O3 -march=novalake -mprefer-vector-width=512 -ffast-math -S -o -
foo:
vmovups (%rsi), %zmm0
vmulph (%rdi), %zmm0, %zmm0
vextractf64x4 $1, %zmm0, %ymm1
vaddph %zmm1, %zmm0, %zmm0
vextractf128 $1, %ymm0, %xmm1
vaddph %xmm1, %xmm0, %xmm0
vshufpd $1, %xmm0, %xmm0, %xmm1 # xmm1 = xmm0[1,0]
vaddph %xmm1, %xmm0, %xmm0
vmovshdup %xmm0, %xmm1 # xmm1 = xmm0[1,1,3,3]
vaddph %xmm1, %xmm0, %xmm0
vpsrld $16, %xmm0, %xmm1
vaddsh %xmm1, %xmm0, %xmm0
vzeroupper
retq
bar:
vmovups (%rsi), %zmm0
vmulbf16 (%rdi), %zmm0, %zmm0
vextractf64x4 $1, %zmm0, %ymm1
vaddbf16 %zmm1, %zmm0, %zmm0
vextractf32x4 $1, %zmm0, %xmm1
vaddbf16 %xmm1, %xmm0, %xmm0
vshufpd $1, %xmm0, %xmm0, %xmm1 # xmm1 = xmm0[1,0]
vaddbf16 %xmm1, %xmm0, %xmm0
vmovshdup %xmm0, %xmm1 # xmm1 = xmm0[1,1,3,3]
vaddbf16 %xmm1, %xmm0, %xmm0
vpsrld $16, %xmm0, %xmm1
vaddbf16 %xmm1, %xmm0, %xmm0
vzeroupper
retq
```
Commit: e78970f80f1041de8948cb0b665a9aaae682f6c6
https://github.com/llvm/llvm-project/commit/e78970f80f1041de8948cb0b665a9aaae682f6c6
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_err-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
Log Message:
-----------
[AMDGPU] MC support for v_wave_match_b32 on gfx13 (#223360)
Commit: 2eb384fccbf866b34a84f86c0e1355a6caed0f0e
https://github.com/llvm/llvm-project/commit/2eb384fccbf866b34a84f86c0e1355a6caed0f0e
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
M mlir/lib/Dialect/Linalg/Transforms/MorphOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
A mlir/test/Dialect/Linalg/categorize-named-ops.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
Log Message:
-----------
[MLIR][Linalg] Improve morphism semantics (#222959)
As exposed on the issues linked, the linalg morphism semantics could be
improved.
This PR changes the following semantics:
* Completes support for `-linalg-morph-ops` to include contractions and
ternary elementwise.
* Adds a `-linalg-categorize-ops`, which moves both named and generic
ops to category.
* Adds the possibility of "stopping at category" for both specialization
and generalization (not accessible from command line options but used by
the new categorize / old morph-ops pass).
* Removes the morphism options structure, since it's just a Boolean
flag.
* Improve test coverage, and make sure that `-linalg-morph-ops` does the
same thing as the other options.
It does NOT:
* Change the semantics of generalization, which continues to generalize
everything.
* Change the semantics of specialization, which continues to convert to
named or category whenever possible.
There's also come cleanups for the matching of elementwise that was
simpler as a `TypeSwitch`.
Fixes #221266 and #221191
Assisted by: Claude Opus
Commit: 66ec80c99d36c2b53d3c5e2b895e2f1eba8bfbe7
https://github.com/llvm/llvm-project/commit/66ec80c99d36c2b53d3c5e2b895e2f1eba8bfbe7
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libcxx/include/deque
M libcxx/test/libcxx/containers/sequences/deque/nodiscard.verify.cpp
Log Message:
-----------
[libc++][deque] Apply `[[nodiscard]]` to `deque::get_allocator` (#223599)
Added the missing `[[nodiscard]]`.
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Commit: fe69e138ee0ed61b69ea2de846d550798fe69e2e
https://github.com/llvm/llvm-project/commit/fe69e138ee0ed61b69ea2de846d550798fe69e2e
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Simplify getElementSz using getLoadStore-helpers (NFC) (#222908)
Commit: 4510d555b04130df9fee7af75c34955d1b0d156a
https://github.com/llvm/llvm-project/commit/4510d555b04130df9fee7af75c34955d1b0d156a
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
A llvm/test/CodeGen/AArch64/smulh.ll
A llvm/test/CodeGen/AArch64/sve-smulh.ll
A llvm/test/CodeGen/AArch64/sve-umulh.ll
A llvm/test/CodeGen/AArch64/umulh.ll
A llvm/test/CodeGen/RISCV/smulh.ll
A llvm/test/CodeGen/RISCV/umulh.ll
A llvm/test/CodeGen/X86/smulh.ll
A llvm/test/CodeGen/X86/umulh.ll
Log Message:
-----------
[LLVM] Add llvm.[su]mulh intrinsics. (#220293)
These intrinsics correspond to (un)signed multiply-high operations. The
motivation for introducing them is to allow more accurate costing
(particularly for vectorisation) and to simplify code generation for
chained multiply-high operations.
Together with subsequent patches to combine and cost the intrinsics,
this gives an 8% speedup on 750.sealcrypto_r on Neoverse V2.
Commit: aef91d6bcd7a7524ddc0f20b892381b5a3f3ebaf
https://github.com/llvm/llvm-project/commit/aef91d6bcd7a7524ddc0f20b892381b5a3f3ebaf
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/conditional-subtract.ll
Log Message:
-----------
[AArch64] Reuse SUBS results for conditional subtraction (#223391)
For C++ code such as:
uint64_t conditional_subtract(uint64_t x, uint64_t q) {
return x - (x >= q ? q : 0);
}
AArch64 currently uses three instructions for the conditional
subtraction (omitting the return):
cmp x0, x1
csel x8, x1, xzr, hs
sub x0, x0, x8
The comparison already computes x - q to set the condition flags, but
its arithmetic result is discarded. Preserve that result with SUBS and
select between it and x, reducing the sequence to two instructions:
subs x8, x0, x1
csel x0, x8, x0, hs
Apply this combine to i32 and i64 single-use selects with zero in either
arm. Keep the original flags and condition code, allowing signed,
unsigned, equality, and overflow conditions while preserving other users
of the comparison.
This gives an approximately 3% performance improvement in the
750.sealcrypto_r benchmark from SPEC CPU 2026.
Commit: 8397594236fb24502944a02c9662f4120f347843
https://github.com/llvm/llvm-project/commit/8397594236fb24502944a02c9662f4120f347843
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Move ISD::FP_TO_*INT_SAT actions to be with a Subtarget's other ops. (#223657)
Don't treat them differently to the general pattern we try to keep to
based on grouping each Subtarget abilities - they shouldn't allow
soft-float either.
Cleanup to reduce diff in #199416
Commit: d8e5c98e4e1e581d61c3c791b3d337c7f2d720ec
https://github.com/llvm/llvm-project/commit/d8e5c98e4e1e581d61c3c791b3d337c7f2d720ec
Author: David Green <david.green at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/ARM/shuffle.ll
Log Message:
-----------
[ARM] Add Neon costs for vrev shuffles (#223310)
This, like for AArch64 and MVE, allows some of the legal vrev shuffle
masks to be costed as if they are a single instruction, which can help
prevent the mid end from deoptimizing the code.
Commit: 3a42f8a335269c4d01274f8b04057fa66c87d969
https://github.com/llvm/llvm-project/commit/3a42f8a335269c4d01274f8b04057fa66c87d969
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/builtins-arm.c
M clang/test/CodeGen/builtins-arm64.c
Log Message:
-----------
[ARM] Emit llvm.clear_cache for __clear_cache() (#223398)
It looks like the ARM-specific __clear_cache() builtin emits different
IR than the generic __builtin___clear_cache() builtin (added later),
which uses the llvm.clear_cache intrinsic (which will typically lower to
a __clear_cache libcall, of course).
Use llvm.clear_cache for __clear_cache() as well, for consistency and to
slightly simplify the code.
Commit: 184ef35f1d4fd0433b50c953f0495f4199d22223
https://github.com/llvm/llvm-project/commit/184ef35f1d4fd0433b50c953f0495f4199d22223
Author: Naveen <navehs at qti.qualcomm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/memset.ll
Log Message:
-----------
[AggressiveInstCombine] Guard memset with length in [0, 1] (#213240)
Use computeKnownBits to identify nonconstant memset lengths whose
possible values are limited to zero and one. The check is integrated
into the existing instruction loop in foldUnusualPatterns via the
dedicated helper foldMemSetZeroOrOneLength.
Insert a conditional branch around the memset and specialize the
executed path to a constant length of one. A following InstCombine
pass can then replace it with a byte store, including for a
nonconstant fill value.
Do not transform wider ranges such as [0, 2].
Fixes #213027.
Assisted by GPT-5
Commit: 92d4f66a26fc434b186df29df9a6695420b60ebb
https://github.com/llvm/llvm-project/commit/92d4f66a26fc434b186df29df9a6695420b60ebb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerFP_TO_INT_SAT - use original SDValue directly. NFC. (#223651)
No need to access everything via the SDNode
Cleanup to reduce diff in #199416
Commit: 5bf2127dac5c77a4368cc23fd445fae248f65b9a
https://github.com/llvm/llvm-project/commit/5bf2127dac5c77a4368cc23fd445fae248f65b9a
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
A llvm/test/CodeGen/AArch64/misched-prera-only1.mir
Log Message:
-----------
[MISched] Fix pre-RA pickOnlyChoice tracing (#223182)
Add missing tracePick calls. Now GenericScheduler and
PostGenericScheduler tracing coverage is complete. Add a stable only1
test for pre-RA scheduling.
Commit: d940cd62a7851220d60d50c6e140b52e3462b242
https://github.com/llvm/llvm-project/commit/d940cd62a7851220d60d50c6e140b52e3462b242
Author: Fred Tingaud <95592999+frederic-tingaud-sonarsource at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
M llvm/unittests/Demangle/MicrosoftDemangleTest.cpp
Log Message:
-----------
[MSVC][Demangling] Respect MSDF_NoCallingConvention for function pointers (#209113)
The goal is to update MSVC demangling so that we control whether we
display a function pointer as `void (__cdecl *funcPtr)(void)` or `void
(*funcPtr)(void)`, by abiding by the `MSDF_NoCallingConvention` flag.
It is not a one-liner because function pointers used to use a trick
where it would unconditionally drop all the flags and pass
`OF_NoCallingConvention` to output the calling convention inside the
parentheses. In order to respect `MSDF_NoCallingConvention`, we need to
get rid of this trick.
A side effect of the trick was that OF_NoReturnType was also lost, which
is actually good because dropping the return type of a named function is
unambiguous, but dropping the return type of a function pointer loses
important information. The fix enforces that behavior explicitly.
This change can have impact for end-users who always passed
MSDF_NoCallingConvention, but I believe that this new behavior is the
one they were expecting.
Assisted-by: Claude
Commit: 9362acaf8cc97977d51ef09aaf6a2c6fe46a5361
https://github.com/llvm/llvm-project/commit/9362acaf8cc97977d51ef09aaf6a2c6fe46a5361
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
A llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
Log Message:
-----------
[NFC][AMDGPU] Add cost tests for integer to/from floating point casts (#223571)
Cover i48, i64, i128, bf16, fp128 and narrow vector lanes across FP64
rates, 16 bit instructions, sdwa and both cost kinds.
Assisted-by: Claude Code Opus 5
Commit: be1ca5fcce2b2c91342b691b79fb5c30ba28688e
https://github.com/llvm/llvm-project/commit/be1ca5fcce2b2c91342b691b79fb5c30ba28688e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/test/CodeGen/ARM/setjmp_longjmp.ll
M llvm/unittests/Target/ARM/InstSizes.cpp
Log Message:
-----------
[ARM] Fix Int_eh_sjlj_longjmp instruction size (#223639)
These pseudos expand to one more instruction on non-darwin/windows
platforms.
See: https://github.com/llvm/llvm-project/blob/88107b203b9e02a2d6ce87bf8ba0d98cb6ff53ec/llvm/lib/Target/ARM/ARMAsmPrinter.cpp#L2738-L2764
Commit: 637ead9bec3593e96141b22e6f49a59abb45be91
https://github.com/llvm/llvm-project/commit/637ead9bec3593e96141b22e6f49a59abb45be91
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
Log Message:
-----------
[MLIR][Linalg] Fix ASAN bug from #222959 (#223683)
Commit: eccf6a14a802f941acc3fde5950c20992874f542
https://github.com/llvm/llvm-project/commit/eccf6a14a802f941acc3fde5950c20992874f542
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Return a SCEVUse from getAddRecExpr and propagate use flags. (#221606)
Same as https://github.com/llvm/llvm-project/pull/220007 but for
getAddRecExpr:
Pass both expression and use specific flags to getAddRecExpr and
propagate the use flags, if valid conservatively. That is, the final expression
forms an AddRec with the same operands. For example, it is not valid to
propagate the use flags if other (sub-)expressions have been inlined.
It also includes a few mechanical changes, to update users that still
expected const SCEV *.
PR: https://github.com/llvm/llvm-project/pull/221606
Commit: b249b47fad295131dc005435c895459e25719806
https://github.com/llvm/llvm-project/commit/b249b47fad295131dc005435c895459e25719806
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[Profcheck] Exclude two new tests (#223690)
Exclude these tests for now. We haven't gotten to AtomicExpand/ARM yet,
and the AggressiveInstCombine change is overlapping.
Commit: b15f58cd8bcbd29156ff2cc8c6c89effba12c293
https://github.com/llvm/llvm-project/commit/b15f58cd8bcbd29156ff2cc8c6c89effba12c293
Author: ahmed mohamed kamel <109012086+AhmedKamel10 at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/warn-shadow.cpp
Log Message:
-----------
[clang][Sema] Fix false-positive -Wshadow for friend functions (#221249)
A friend function defined inline in a class body has no implicit `this`,
so a parameter with the same name as a field cannot actually shadow it.
`CheckShadow` only exempted static members and members with an explicit
object parameter, it never handled the case where the enclosing function
isn't a member function at all, which fell through to the generic
diagnostic. In this PR I extend the exemption to cover that case and
added the regression test.
In this PR, I used Claude to help navigate the codebase and explain key
functions.
Fixes #221190
Commit: ad1a3f3a488f1d0ff89e5c5f4cdf59d71a8218b5
https://github.com/llvm/llvm-project/commit/ad1a3f3a488f1d0ff89e5c5f4cdf59d71a8218b5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/test/CodeGen/builtins-arm64.c
Log Message:
-----------
clang: Fix a test assuming single digit metadata numbers (#223688)
Commit: 677a4c33ba942fe7aec6a1be15ba388f1b74d855
https://github.com/llvm/llvm-project/commit/677a4c33ba942fe7aec6a1be15ba388f1b74d855
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/concept-crash-on-diagnostic.cpp
Log Message:
-----------
[Clang] Handle unsatisfied NestedRequirement correctly (#223001)
Sema::BuildNestedRequirement(Expr *Constraint) built an incorrect
NestedRequirement even when unsatisfied. It was never triggered because
they were never diagnosed (we didn't diagnose concept details for
static_assert until ab896c6c6f2) and the other error handlings were done
properly in instantiator.
No release note because of regression-on-trunk.
Fixes https://github.com/llvm/llvm-project/issues/222954
Commit: 3eb8d17174638ccc5d0d6711b433c042fbddf66d
https://github.com/llvm/llvm-project/commit/3eb8d17174638ccc5d0d6711b433c042fbddf66d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Partially reapply "Refactor instantiation of declarations within concepts" (#223311)
This partially reverts db65ace07
It turns out that we cannot simply reuse the instantiated declarations
on stack, and our LIS is lack of ability of distinguishing different
template arguments.
This PR relands the refactoring part of the previous attempt, still
making it possible to have instantiated parameters before checking C++26
fold expression constraints, plus a regression test.
Fixes #198052
Closes #223220
Commit: bcf12a5af6b24122ce93d93080bcbaa4f3c9140d
https://github.com/llvm/llvm-project/commit/bcf12a5af6b24122ce93d93080bcbaa4f3c9140d
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-declare-target-declaration.mlir
Log Message:
-----------
[Flang][OpenMP] Prevent internal linkage on declarations for declare target variables (#222487)
It's illegal to have a global variable declaration with any linkage
other than external or weak, in certain cross module situations we were
applying internal linkage to declarations which breaks the verification
step.
Commit: f9627febe7ec6a558370e5a0374cb90459479a42
https://github.com/llvm/llvm-project/commit/f9627febe7ec6a558370e5a0374cb90459479a42
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
Log Message:
-----------
[AMDGPU] Optimize PreRARematStage candidate initialization (#220924)
The computation of the LiveIn/LiveOut sets in
PreRARematStage::ScoredRemat::init showed up as a significant compile
time bottleneck in code using kernels from composable_kernel.
Compute the LiveIn/LiveOut sets for all candidates in a single iteration
of the all regions and DAG LiveIns/LiveOuts without iterating the
candidates.
Commit: 01d59ab35faf33cc50c66290206a9bcbc6aed936
https://github.com/llvm/llvm-project/commit/01d59ab35faf33cc50c66290206a9bcbc6aed936
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-iterator.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-task-charbox.mlir
M mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-charbox.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
Log Message:
-----------
[OpenMPToLLVMIRTranslation] Avoid use of ConstantExpr::getSizeOf() (#223363)
This will no longer be supported in ptradd representation. Directly
produce constants with the correct size instead.
Commit: 1a8797bc8a24663747c17d9308a82d7fb987a922
https://github.com/llvm/llvm-project/commit/1a8797bc8a24663747c17d9308a82d7fb987a922
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaCXX/ctad.cpp
Log Message:
-----------
[Clang] Fix synthesis of alias CTAD constraints (#223340)
buildAssociatedConstraints reconstructs a template parameter list
relative to its primary template. However it didn't match the
construction of the CTAD guide very precisely.
Fixes https://github.com/llvm/llvm-project/issues/124715
Commit: e2c2e9705d86455920173185bc40863940f8b0f3
https://github.com/llvm/llvm-project/commit/e2c2e9705d86455920173185bc40863940f8b0f3
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[offload][amd] Fix inconsistent DynBlock MemSize usage (#223452)
The AMD plugin is using two (potentially) different Dynamic Block memory
sizes:
* `LaunchArgs.DynCGroupMem` (this the original value passed to launch)
as an implicit argument
* `DynBlockMemSize` (this is the adjusted value in PluginInterface and
pass to the RTLs) as the `TotalBlockMemSize`.
Changing the first usage as this seems a leftover from #152831 where
usages in the plugins where changed to `DynBlockMemSize`.
Commit: 449bc5ac6348c72c48fdccd3fad9d2dc2968af2b
https://github.com/llvm/llvm-project/commit/449bc5ac6348c72c48fdccd3fad9d2dc2968af2b
Author: Sachin 🗲 <s4chinjha at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
Log Message:
-----------
[libc][bazel] Adds missing bf16 MPFR test targets for bazel (#223342)
This pr addresses #221026 and adds the missing bazel targets for the
bf16 MPFR tests.
Co-authored-by: Zorojuro <sawantsukumar at gmail.com>
Commit: 36ce6fd0da77365f4e36baacc79f744f6eb589fb
https://github.com/llvm/llvm-project/commit/36ce6fd0da77365f4e36baacc79f744f6eb589fb
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
Log Message:
-----------
[NFC][AMDGPU] Fix two code quality issues in AMDGPUSwLowerLDS (#223685)
- NumStaticLDS is always a positive number, so it was always true
- Potential `Changed = true` was dropped in the loop
Commit: b4c81d59773bd4f13b26b861d3ba5e173a2d11ee
https://github.com/llvm/llvm-project/commit/b4c81d59773bd4f13b26b861d3ba5e173a2d11ee
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerFP_TO_INT_SAT - use MVT src/dst types directly. NFC. (#223689)
Only the saturation type needs to be EVT during lowering
Cleanup to reduce diff in #199416
Commit: bde5e74309f6d66253a8a1360df575daa19e5b55
https://github.com/llvm/llvm-project/commit/bde5e74309f6d66253a8a1360df575daa19e5b55
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterPressure.cpp
A llvm/test/CodeGen/X86/dead-register-pr76416.mir
A llvm/test/CodeGen/X86/inline-asm-pr149144.ll
A llvm/test/CodeGen/X86/inline-asm-pr155807.ll
A llvm/test/CodeGen/X86/inline-asm-pr76416.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
A llvm/test/CodeGen/X86/pr205272.ll
M llvm/test/CodeGen/X86/ssub_sat_plus.ll
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/CodeGen/X86/usub_sat_plus.ll
M llvm/test/CodeGen/X86/vector-idiv-strictfp.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/xmulo.ll
Log Message:
-----------
RegisterPressure: Remove dead defs correctly (#222627)
When an instruction has overlapping register defs where only some carry
the dead flag (for example a dead super-register def alongside a live
sub-register def), the collector left the shared register units in both the live and
dead def sets. That produced a PressureDiff decrement with no matching increment
and tripped the "PSet overflow/underflow" assertion in getUpwardPressureDelta.
A register unit is dead if any def covering it is dead, regardless of
operand order. Reconcile by subtracting the dead defs from the live defs instead
of the reverse: removeRegLanes only clears the overlapping units, so a def
keeps any units a dead def does not cover.
Fixes #155807.
Fixes #149144.
Fixes #76416.
Fixes #205272.
Co-authored-by: XChy <xxs_chy at outlook.com>
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 4456696e795c86549682f1908c5b1adeb7b0295c
https://github.com/llvm/llvm-project/commit/4456696e795c86549682f1908c5b1adeb7b0295c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CodeGen/AArch64/sve/dup.c
Log Message:
-----------
[clang][CIR] Add code-gen for DUP intrinsics for bool types (#223459)
As per SVE ABI, the storage type for svbool_t is `vector<vscale x 16 x i1>` (i.e. full predicate register) and that's what the change in `emitToMemory` reflects (see LowerToLLVM.cpp).
Commit: 058ca1274446c7fa27b193237a90c21dddf7833c
https://github.com/llvm/llvm-project/commit/058ca1274446c7fa27b193237a90c21dddf7833c
Author: Jan Schultke <me at eisenwave.net>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx29Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__bit/shift.h
M libcxx/include/bit
M libcxx/include/module.modulemap.in
M libcxx/include/version
M libcxx/modules/std/bit.inc
M libcxx/test/libcxx/utilities/bit/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/bit.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/numerics/bit/bitops.shift/shl.pass.cpp
A libcxx/test/std/numerics/bit/bitops.shift/shr.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement `<bit>` parts of P3793R2 Better shifting (#219389)
Partially implements #204401
That is, the scalar `<bit>` parts are implemented, but the `<simd>`
overloads are missing. Notice that only `__cpp_lib_bitops` is set to
`202606L`. `__cpp_lib_simd_bitops` is missing.
The implementations of `shl` and `shr` are based on the reference
implementation in the paper. The test code is partially AI-generated and
inspired by the test code for `rotl` or `rotr`, but comes with
significant modernizations.
Commit: c5c7a6b1381b24b6a6ceb7c2297f8a99569c8b0e
https://github.com/llvm/llvm-project/commit/c5c7a6b1381b24b6a6ceb7c2297f8a99569c8b0e
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/sve-fp-constrained-intrinsics.ll
Log Message:
-----------
[NFC][LLVM] Add fmul coverage to sve-fp-constrained-intrinsics.ll (#223658)
Commit: 6f304f56c86382c2ad296d440c87f24abb05b4c3
https://github.com/llvm/llvm-project/commit/6f304f56c86382c2ad296d440c87f24abb05b4c3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
Log Message:
-----------
[clang][bytecode] Fix castBackMemberPointer with null member pointers (#223680)
Do the same thing the current interpreter does: nothing.
Commit: 4600d3ed9189fa45e586daad813a043f3de8b85c
https://github.com/llvm/llvm-project/commit/4600d3ed9189fa45e586daad813a043f3de8b85c
Author: Sachin 🗲 <s4chinjha at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][bazel] Adds missing targets for bf16 smoke tests (#223343)
This pr addresses #221026 and adds the missing bazel targets for the
bf16 smoke tests.
Commit: 73e97a620892c9d5df8bafbc3af9a084be35ac98
https://github.com/llvm/llvm-project/commit/73e97a620892c9d5df8bafbc3af9a084be35ac98
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
M flang/test/Lower/OpenACC/acc-private.f90
Log Message:
-----------
[flang][acc] Ensure private recipe optional yields expected type (#223542)
Updates private recipe lowering so that locally allocated variables are
converted to the recipe result type.
Commit: 83290d61f6ead40a5c38297a0442b63291ce7a48
https://github.com/llvm/llvm-project/commit/83290d61f6ead40a5c38297a0442b63291ce7a48
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libcxx/include/__algorithm/find_if.h
A libcxx/test/libcxx/algorithms/unaligned_empty_range.pass.cpp
Log Message:
-----------
[libc++] Don't assume a valid range in find_if for empty inputs (#213752)
Iterators for empty ranges are sometimes implemented using a
non-aligned sentinel value. Requiring proper alignment in that
case (which is part of the valid range assumption) causes a
hardening failure. Instead, don't make the assumption of a
valid range when the input range is empty in find_if.
Commit: 78cff11b235dac5dfd0e98f457a338d6d0fbd8b8
https://github.com/llvm/llvm-project/commit/78cff11b235dac5dfd0e98f457a338d6d0fbd8b8
Author: Michał Górny <mgorny at gentoo.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/test/lib/Analysis/CMakeLists.txt
Log Message:
-----------
[mlir] Fix linking `MLIRTestAliasAnalysis` to libMLIR (#223711)
Fixes regression introduced in 36fe08a5f92230655dd9662f121c092ced307ddd.
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Commit: 0e91ec7b66a14838361f5746273626320317d159
https://github.com/llvm/llvm-project/commit/0e91ec7b66a14838361f5746273626320317d159
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Analysis/BasicAA/vscale.ll
M llvm/test/Transforms/GVN/vscale.ll
M llvm/test/Transforms/NewGVN/vscale.ll
Log Message:
-----------
[BasicAA] Remove obsolete TODOs (NFC) (#223715)
We intentionally do not support non-canonical vscale GEPs in
BasicAA.
Commit: 1eff7f0039ee4d0b47cd60fa9f60fb3b75e55c41
https://github.com/llvm/llvm-project/commit/1eff7f0039ee4d0b47cd60fa9f60fb3b75e55c41
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/test/CodeGen/link-builtin-bitcode.c
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Expose more subtarget features for MLIR (#223561)
- `FeatureAtomitFaddNoRtnInsts` is needed to control when atomic
emulation
for buffer operations happens
- `FeatureBackOffBarrier` controls an inline-assembly workaround for
LDS-only barriers on old gfx9
- `FeatureLfsBarrierArriveAtomic` is a precise flag compared to arch
versions
- `FeatureORPFP8ConversionInsts` controls which MLIR FP8 types can be
lowered to LLVM
- `FeaturePermlane16Insts`is another feature check
Clang and flang tests are updated since they look at the feature set
AI disclosure: Claude made these changes, I wrote this message
Commit: 5c2e0a03ee47754f4a13dfd1a50dcb0459010aea
https://github.com/llvm/llvm-project/commit/5c2e0a03ee47754f4a13dfd1a50dcb0459010aea
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Add descriptors for REDUCTION_KIND and SHIFT (#223702)
Commit: 270c5d9a5ac69fdb97ca3fe6d7a82167b3459194
https://github.com/llvm/llvm-project/commit/270c5d9a5ac69fdb97ca3fe6d7a82167b3459194
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/fold-fmac-to-fmaak.mir
Log Message:
-----------
[AMDGPU] Prevent folding of FMAC into FMAAK with two literals (#217438)
Currently the `foldImmediate` function can fold FMAC into FMAAK with two
literals causing a verifier failure:
```
*** Bad machine code: VOP2/VOP3 instruction uses more than one literal ***
- function: fold_fmac_to_fmaak
- basic block: %bb.0 (0x627ad4dd40d0)
- instruction: %3:vgpr_16_lo128 = contract nofpexcept V_FMAAK_F16_t16 10526, killed %4:vgpr_16_lo128, 8478, implicit $mode, implicit $exec
```
This change checks if a newly formed FMAAK is valid, and in a case two
literals are used it introduces a MOV to legalize the instruction.
Commit: 9805babd4ca82557d5e258180c27d201e06ae12c
https://github.com/llvm/llvm-project/commit/9805babd4ca82557d5e258180c27d201e06ae12c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Log Message:
-----------
[GlobalISel] Remove dead declarations and functions in CombinerHelper (NFC) (#223624)
CombinerHelper::getDataLayout: Added on July 25, 2024 in commit
db8c84fc7a75dd60bcfff7160b51e1a55e7e0f73 without any callers.
CombinerHelper::tryCombineCopy: The last caller was removed on
September 24, 2023 in commit bc6e7f057340ab0b995cc17a170e34545a295f03.
CombinerHelper::matchCombineMergeUnmerge: The last use was removed on
January 30, 2026 in commit 369e78774aef11f8e1215bb41fdf8db138ce315e.
CombinerHelper::matchCombineAddP2IToPtrAdd,
CombinerHelper::applyCombineAddP2IToPtrAdd: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchCombineConstPtrAddToI2P,
CombinerHelper::applyCombineConstPtrAddToI2P: The last use was removed
on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchUndefSelectCmp: The last use was removed on
August 11, 2023 in commit 2d87319f06efa15949a0e6983796fc784e1b4028.
CombinerHelper::matchConstantOp: The last use was removed on
January 29, 2026 in commit d8d4096c0be07b993322d4f20bf82aaee498e578.
CombinerHelper::matchBinOpSameVal: The last use was removed on
September 2, 2026 in commit a7dc3296e484a0d92237e899cbce24dbbc7d0e45.
CombinerHelper::matchSimplifyAddToSub,
CombinerHelper::applySimplifyAddToSub: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchAddSubSameReg: The last use was removed on
August 11, 2023 in commit 2d87319f06efa15949a0e6983796fc784e1b4028.
Commit: 9f660520e7db162f18c4ad515c0b0efce37df3e9
https://github.com/llvm/llvm-project/commit/9f660520e7db162f18c4ad515c0b0efce37df3e9
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Basic/IdentifierTable.h
M clang/lib/Basic/IdentifierTable.cpp
Log Message:
-----------
[clang] Unique MultiKeywordSelector with a UniquingSet (NFC) (#223626)
This patch migrates MultiKeywordSelector in SelectorTable from
llvm::FoldingSet to llvm::UniquingSet.
MultiKeywordSelector keys on an ArrayRef<const IdentifierInfo *>.
Switching to UniquingSet allows us to look up multi-keyword selectors
with a typed key, eliminating FoldingSetNodeID serialization at lookup
sites and removing MultiKeywordSelector::Profile.
Assisted-by: Antigravity
Commit: b016343155d61e9bcfcb64799987503b06b55381
https://github.com/llvm/llvm-project/commit/b016343155d61e9bcfcb64799987503b06b55381
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libcxxabi/src/private_typeinfo.cpp
Log Message:
-----------
[libc++abi][NFC] Format private_typeinfo.cpp (#223734)
I'm planning to work on `private_typeinfo.cpp` a bit, so this formats
the file to reduce the diff in later patches.
Commit: 3396648b577809c197a3da335affde1c772924d5
https://github.com/llvm/llvm-project/commit/3396648b577809c197a3da335affde1c772924d5
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
Log Message:
-----------
[alpha.webkit.UncountedLocalVarsChecker] Ignore lambda captures (#223617)
Ignore a variable declaration for a lambda capture as that is explicitly
checked by webkit.UncountedLambdaCapturesChecker instead.
Commit: f0d41abb33b6c4681dfd56c5804d8bab8dc5c77d
https://github.com/llvm/llvm-project/commit/f0d41abb33b6c4681dfd56c5804d8bab8dc5c77d
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-select-remap.ll
Log Message:
-----------
[SimplifyCFG] Fix use-after-free in switch-on-select remap when the compared value is a PHI (#223632)
Fixes #223138
`simplifySwitchOnSelectRemap` turns `switch (select (X == C), K, X)`
into `switch X` and retargets case `C` to wherever `K` goes. It dropped
the old edge for `C` with `removePredecessor` before it installed `X` as
the switch condition. When `X` is a PHI in that old destination, which
is what happens when case `C` branches back to the switch's own block,
dropping the edge leaves the PHI with a single input, so it gets folded
and erased. The switch was then made to use the erased PHI. Everything
after that was reading freed memory, which is why the reported assertion
moves around between SimplifyCFG's dominator tree update,
ScalarEvolution's `isSCEVable` check and instcombine depending on the
run.
The fix is to set the switch condition to `X` before touching the CFG.
If the PHI fold happens, its RAUW now rewrites the switch operand along
with the compare and select, and the stale pointer is never used again.
Commit: f0dc664fe9c80ba64f315f81d5de0d72c88b81dd
https://github.com/llvm/llvm-project/commit/f0dc664fe9c80ba64f315f81d5de0d72c88b81dd
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/declare-target-entry-iface.f90
M flang/test/Lower/OpenMP/declare-target-interface.f90
R flang/test/Lower/OpenMP/declare-target-multiple-entry.f90
Log Message:
-----------
[Flang][OpenMP] Support declare target on interfaces local to procedures (#218877)
Declarative directives implicitly affecting the surrounding procedures
are handled differently for interface procedures in Flang due to the
fact that the corresponding evaluation during lowering is attached to
the parent program unit, rather than the interface.
However, the current implementation to handle this edge case for
`declare_target` is based on the incorrect assumption that this can be
detected by comparing the owning procedure's symbol to the symbol of the
program unit lexically containing the directive. This fails whenever an
interface is located anywhere except for the main program.
Instead, this patch queries the details of the program unit containing
the directive to check directly whether it's an interface. Anything
else, including alternative entries to a procedure, is handled in the
regular way.
Commit: 44864513ceeb6a24f2050da3e929446a8a20f9d1
https://github.com/llvm/llvm-project/commit/44864513ceeb6a24f2050da3e929446a8a20f9d1
Author: tfzee <tim.ziegler at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/avx10_2bf16-rounding.ll
Log Message:
-----------
[X86] Lower bf16 round-to-integer on AVX10.2 via vrndscalebf16 (#213276)
Follow-up to #212245.
floor/ceil/trunc/rint/nearbyint/roundeven on bf16 are currently treated
as illegal causing them to be
promoted and causing scalarization of the vector cases.
AVX10.2 has packed vrndscalebf16, so mark these operations Legal for
v8bf16/v16bf16/v32bf16. The existing patterns already turns them into
X86ISD::VRNDSCALE with the matching immediate, so no new patterns are
needed.
Scalar bf16 reuses the path previously added in #212245.
llvm.round is left out since it is round-half-away-from-zero, which
vrndscale cannot encode.
For the strict version I kept the the old legalization for now since the
avx10.2 Instructions have hardcoded rounding and exception behavior.
(Further todo from my testing some of the strict versions need also some
extra handling since they currently will fail to select and crash the
compiler)
Used AI to code review and reword text.
Commit: eee3badbda422abdb6809353f95c7a3e22868561
https://github.com/llvm/llvm-project/commit/eee3badbda422abdb6809353f95c7a3e22868561
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/CIRPasses.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-win64-skipped.c
Log Message:
-----------
[CIR] Skip call-conv lowering on Windows x86_64 (#223583)
The x86-64 classifier implements SysV. We do not support Windows yet.
Assisted-by: Cursor / claude-opus-5
Commit: 30a496b8d0c9b2c9dc1d22df9550d04c8ead589f
https://github.com/llvm/llvm-project/commit/30a496b8d0c9b2c9dc1d22df9550d04c8ead589f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
A clang/test/CodeGen/exception-model-flag.c
Log Message:
-----------
clang: Emit "exception-model" module flag (#220053)
Record the exception-handling model as an "exception-model" IR module
flag when it differs from the target triple's default, mirroring how
other target ABI properties are recorded.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 9dffc7a230c3623284cc2a4184abe5beeca99681
https://github.com/llvm/llvm-project/commit/9dffc7a230c3623284cc2a4184abe5beeca99681
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Strip bitcasts in unmerge half-extraction matching (#223534)
isExtractHiElt/isExtractLoElt run their result through stripBitCast on
every path except the G_UNMERGE_VALUES ones, which returned the unmerge
source register raw. This change makes the handling uniform in all cases
Commit: 81353cba9f68d1beb5fe220b693f9dc3646d990c
https://github.com/llvm/llvm-project/commit/81353cba9f68d1beb5fe220b693f9dc3646d990c
Author: nudt_yixiao <1272950933 at qq.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve46.f90
Log Message:
-----------
[Flang] Avoid crash resolving restricted specific intrinsics (#217852)
Name resolution assumed that every specific intrinsic function handled
in a procedure context was unrestricted and had a numeric result. An
undeclared LLT used as a procedure pointer target therefore triggered a
CHECK because LLT is restricted and returns LOGICAL.
Rename the handler to reflect that it resolves both restricted and
unrestricted specific intrinsic functions. Preserve result types only
for unrestricted intrinsics; restricted intrinsics retain an untyped
symbol so later semantic checks can issue the appropriate diagnostic.
Fixes https://github.com/llvm/llvm-project/issues/208825
Co-authored-by: yixiao <yixiao at hygon.cn>
Commit: 1f83538aa13d9a622c36226e7c8a60ba58bb68f0
https://github.com/llvm/llvm-project/commit/1f83538aa13d9a622c36226e7c8a60ba58bb68f0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/builtin-object-size-codegen.c
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Apply pointer casts to opaque pointers (#223607)
For `((char *)&sqlite3Prepare_sParse) + 4`, the final byte offset should
be `4`, not `4 * sizeof(sqlite3Prepare_sParse)`. To handle that, we need
to actually pass the cast along to the opaque pointer.
Commit: 408a094bece64f8c8e98194f8359ced5ae31e4b9
https://github.com/llvm/llvm-project/commit/408a094bece64f8c8e98194f8359ced5ae31e4b9
Author: Ryotaro Kasuga <ryotaro.kasuga at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/test/CodeGen/PowerPC/sms-regpress.mir
Log Message:
-----------
[MachinePipeliner] Use VirtRegOrUnit instead of Register appropriately (#177535)
Resolve the FIXMEs in MachinePipeliner added in #167730, primarily by
replacing `Register` with `VirtRegOrUnit` where necessary to remove
invalid `static_cast`s. Based on my local testing, there was no
noticeable performance impact.
---------
Co-authored-by: Harsha Jagasia <harsha.jagasia at amd.com>
Commit: ad413891c0985b7e19bbd55c6ba193203e16281e
https://github.com/llvm/llvm-project/commit/ad413891c0985b7e19bbd55c6ba193203e16281e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
A llvm/test/TableGen/RuntimeLibcallEmitter-library-ref.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcalls: Add LibraryRef for dispatch-with-exclusion (#218869)
Let a SystemRuntimeLibrary dispatch a shared provider library while
dropping the impls the target replaces, since a library reference cannot nest
inside (sub ...). This is a compromise from the ideal of explicitly listing all calls,
but getting to that point is prooving to be difficult.
The opt-out is emitted inside setAvailableLibFuncs_<lib>, so the single library's
logic is self contained.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 277099f74c789dee10524ab57112444d8df38187
https://github.com/llvm/llvm-project/commit/277099f74c789dee10524ab57112444d8df38187
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
M llvm/test/Transforms/AtomicExpand/ARM/thread-model-single.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[LowerAtomic] Mark cmpxchg select with unknown branch weights (#223736)
LowerAtomic in cmpxchg lowering creates a select to figure out what to
store. This is conditioned on whether or not the compare value is equal
to the value in memory, which we currently have no way of knowing the
probability of. So mark the branch weights explicitly unknown.
It seems like we were lacking coverage of this case before #223157,
which made this test pop up on the profcheck bot.
Commit: 7d003d11953c0fee6bccf3e75bd9dedf45bbaf54
https://github.com/llvm/llvm-project/commit/7d003d11953c0fee6bccf3e75bd9dedf45bbaf54
Author: Mian Miftah <miftah.gungnir at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-uniform-vector.ll
Log Message:
-----------
[AMDGPU] Skip vector atomicrmw operands in AtomicOptimizer (#223309)
A uniform `<2 x i32>` `atomicrmw add` reaches a scalar-to-vector
lane-count cast and asserts in AMDGPUAtomicOptimizer.
The divergent-value path rejects types in `isLegalCrossLaneType`,
but the uniform-value path does not.
Returned vectors also enter scalar result construction.
Reject vector types in `visitAtomicRMWInst` and `visitIntrinsicInst`
before either value path. The regression covers unused
global `add`, returned LDS `and`,
and a uniform scalar `i16` control that must still optimize, using DPP
and iterative strategies on wave64 and wave32 subtargets.
Commit: 1dd934d123066d6d996bde5943b2136e621ba215
https://github.com/llvm/llvm-project/commit/1dd934d123066d6d996bde5943b2136e621ba215
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/utils/TableGen/Basic/RuntimeLibcalls.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
Log Message:
-----------
RuntimeLibcalls: Remove the dead IsDefault emitter machinery (#219947)
The IsDefault bit on RuntimeLibcallImpl fed a LibCallToDefaultImpl map
in the TableGen backend that was populated but never read.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8e39842f45ad190d87d098b92aad940941d98151
https://github.com/llvm/llvm-project/commit/8e39842f45ad190d87d098b92aad940941d98151
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/memset.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[AggressiveInstCombine] Preserve Profile Info for [0,1] Memset Guard (#223728)
This showed up as a profcheck failure from #213240. If the memset has
profile information, we can use that to synthesize appropriate branch
weights.
Commit: 0f4f7affa58186bd8e5721e773b34f8bfee55d4f
https://github.com/llvm/llvm-project/commit/0f4f7affa58186bd8e5721e773b34f8bfee55d4f
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/matrix-type.cpp
Log Message:
-----------
[Clang][Sema] Add Diagnostic for using matrix logical on non HLSL targets (#223252)
Make Clang emit an error message instead of crashing when using matrix
logical operations on non-HLSL targets.
Issue #222381
Commit: cdd52918379532618fe25368cfbe12b2334c5f9c
https://github.com/llvm/llvm-project/commit/cdd52918379532618fe25368cfbe12b2334c5f9c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/abs.ll
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
A llvm/test/Transforms/ConstraintElimination/decompose-signed-preconditions.ll
A llvm/test/Transforms/ConstraintElimination/decompose-unsigned-preconditions.ll
M llvm/test/Transforms/ConstraintElimination/gep-arithmetic-different-types.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/induction-exit-condition-or-and.ll
M llvm/test/Transforms/ConstraintElimination/induction-nowrap-from-scev-not-ir.ll
M llvm/test/Transforms/ConstraintElimination/induction-relational-predicate-latch.ll
M llvm/test/Transforms/ConstraintElimination/induction-symbolic-start-postinc.ll
M llvm/test/Transforms/ConstraintElimination/loops-header-tested-base.ll
M llvm/test/Transforms/ConstraintElimination/minmax.ll
M llvm/test/Transforms/ConstraintElimination/ne-tightening.ll
M llvm/test/Transforms/ConstraintElimination/or-non-negative.ll
M llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
M llvm/test/Transforms/ConstraintElimination/sext-signed-predicates.ll
M llvm/test/Transforms/ConstraintElimination/trunc.ll
M llvm/test/Transforms/ConstraintElimination/wrapping-math.ll
Log Message:
-----------
[ConstraintElim] Unify no-wrap queries. (#223537)
Unify no-wrap queries in new isKnownNoWrap helper, which checks both
wrap flags on instructions and query-based reasoning in a single place.
Checks signed/unsigned wrap depending on a flag.
Update both decompose and tryToStrengthenFlags to use shared helper.
This improves results in a number of cases, because some rules were only
implemented for tryToStrengthenFlags and others in decompose:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1313
Note that there are 2-3 small regressions due added flags/removed
branches pessimizing other parts of the pipeline.
Compile-time impact in the noise for geomean. Notable individual changes
is mafft -0.05% in stage1-ReleaseThinLTO, and lencod +0.05% for
stage2-O3.
https://llvm-compile-time-tracker.com/compare.php?from=54005dacf264d79e403808a704b18bcf1cbe956f&to=507624eb897062648a907245c46885d8af15359d&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/223537
Commit: f1dac288ccc5304dad0cfaf9b198239c2af5a6b0
https://github.com/llvm/llvm-project/commit/f1dac288ccc5304dad0cfaf9b198239c2af5a6b0
Author: ayaan <138162656+def3r at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/ARM/divmod-eabi.ll
M llvm/test/CodeGen/Mips/divrem.ll
M llvm/test/CodeGen/NVPTX/divrem-combine.ll
M llvm/test/CodeGen/PowerPC/p10-vector-modulo.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll
M llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
M llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/X86/divide-by-constant.ll
M llvm/test/CodeGen/X86/divrem.ll
Log Message:
-----------
[DAGCombiner] Port custom DAG combine for `rem` from NVPTX (#210344)
Part of #116695
Supersedes #167147
Port NVPTX combine for `rem` to DAGCombine. Folds `Num % Den -> Num -
(Num / Den) * Den` if `DIVREM` is not supported by the backend.
Commit: 8aa00e2756885f888f1ec36c249f37b171b5bc57
https://github.com/llvm/llvm-project/commit/8aa00e2756885f888f1ec36c249f37b171b5bc57
Author: David Green <david.green at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/shift-mod.ll
Log Message:
-----------
[AArch64][GlobalISel] Add GISel test coverage for shift-mod.ll. NFC (#223753)
Commit: be5f7cb792e55be1540d50bb19ab0eaee621f349
https://github.com/llvm/llvm-project/commit/be5f7cb792e55be1540d50bb19ab0eaee621f349
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A lldb/source/Plugins/Process/Windows/Common/LoadedModuleList.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
M lldb/unittests/Process/CMakeLists.txt
A lldb/unittests/Process/Windows/CMakeLists.txt
A lldb/unittests/Process/Windows/LoadedModuleListTest.cpp
Log Message:
-----------
[lldb][Windows] Key lldb-server's loaded-module list by base address (#223445)
`NativeProcessWindows` keys `m_loaded_modules` by `FileSpec`, so a
second mapping of an already-loaded DLL overwrites the first one's base
address, and `OnUnloadDll` then erases by address. The wrong mapping
gets dropped.
This reproduces reliably in swiftlang where `swiftCore.dll` is loaded
twice.
This patch maps by base address instead (the identity `UNLOAD_DLL`
carries), so an unload resolves to the right file and only retires the
reported entry when it is that file's last mapping.
It introduces the `LoadedModuleList` class to key the modules correctly
and 9 regression unit tests.
---------
Co-authored-by: Nerixyz <nero.9 at hotmail.de>
Commit: a949919bcf5bf634b50de503cdc85ef423d799c6
https://github.com/llvm/llvm-project/commit/a949919bcf5bf634b50de503cdc85ef423d799c6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/CMakeLists.txt
Log Message:
-----------
[AggressiveInstCombine] Fix shared libraries build (#223756)
Broken by #223728 by depending upon a function in ProfileData. Add that
as a dependency to fix the build.
Commit: 3cbae1632e6ca6f8436fcbc49d059cc924f883b0
https://github.com/llvm/llvm-project/commit/3cbae1632e6ca6f8436fcbc49d059cc924f883b0
Author: Kohei Yamaguchi <fix7211 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
A mlir/test/Dialect/SparseTensor/sparsifier_lower_affine.mlir
Log Message:
-----------
[mlir][sparse] Lower affine before SCF to CF in sparsifier (#219860)
Fix the lowering order in the sparsifier pipeline by running
`convert-scf-to-cf` after `lower-affine`.
Previously, `convert-scf-to-cf` ran while Affine control-flow operations
could still be present. For example, lowering an `scf.if` nested inside
an `affine.for` introduces multiple blocks into the loop body, violating
`affine.for`'s single-block region requirement and causing verification
to fail.
Running `lower-affine` first converts Affine control flow to SCF. The
subsequent `convert-scf-to-cf` pass can then lower both the existing SCF
operations and those introduced by Affine lowering to CFG-based control
flow.
Fixes #217895
Commit: 95bcf5d16a63e534e8ce0f039d8572734f87b5cd
https://github.com/llvm/llvm-project/commit/95bcf5d16a63e534e8ce0f039d8572734f87b5cd
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/include/lldb/ValueObject/ValueObjectRegister.h
M lldb/source/ValueObject/ValueObjectRegister.cpp
Log Message:
-----------
[lldb] Compare registers by LLDB register number (#223704)
Fix `GetIndexOfChildWithName`/`GetChildMemberWithName` on `Windows
x86_64` (Release builds), where comparing registers by RegisterInfo
pointer identity could spuriously fail to find sp/rsp in the GPR set.
Compare by `eRegisterKindLLDB` number instead.
Failing bot: https://ci-external.swift.org/job/lldb-windows/job/main
Commit: b2175ea5306fe59d8e82f8259d4d285ccd8644a3
https://github.com/llvm/llvm-project/commit/b2175ea5306fe59d8e82f8259d4d285ccd8644a3
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/non-type-template-param.cpp
Log Message:
-----------
[CIR] Support SubstNonTypeTemplateParmExpr for aggregates (#223603)
Lower `SubstNonTypeTemplateParmExpr` in `AggExprEmitter` by visiting its
replacement expression, matching classic Clang codegen (`CGExprAgg.cpp`)
and existing scalar (#146751), complex (#146755), and lvalue (#182920)
implementations.
The missing aggregate NTTP gap was analyzed with LLM assistance.
Fixes #223533
Commit: b623a0c6d49f2c8e1031216ead5641c3bf57f1d1
https://github.com/llvm/llvm-project/commit/b623a0c6d49f2c8e1031216ead5641c3bf57f1d1
Author: Kunal Dubey <xakep8 at protonmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/compound_literal.c
A clang/test/CIR/CodeGen/global-address-to-int.c
Log Message:
-----------
[CIR] Support pointer-to-int global initializers (#220643)
This allows CIR to emit global initializers where a constant address is
cast to an integer.
This fixes compound literals like `unsigned long addr = (unsigned
long)(int[]){1, 2, 3}` and also handles global variable, array element
and function addresses cast to integers.
Fixes #216618
Commit: 0c8394de73dc4111713674dc5608b43ab4e72b53
https://github.com/llvm/llvm-project/commit/0c8394de73dc4111713674dc5608b43ab4e72b53
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/llvm/config.bzl
Log Message:
-----------
[bazel] Use new rules_cc API to determine musl targeting (#223549)
This avoids requiring hermetic-llvm in the public BUILD file API.
Downstream users need to update to this version of rules_cc
Commit: 73b9d5341de05b0b433c1c133104ab1b74ab6e13
https://github.com/llvm/llvm-project/commit/73b9d5341de05b0b433c1c133104ab1b74ab6e13
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A openmp/docs/CommandLineArgumentReference.md
R openmp/docs/CommandLineArgumentReference.rst
A openmp/docs/ReleaseNotes.md
R openmp/docs/ReleaseNotes.rst
A openmp/docs/SupportAndFAQ.md
R openmp/docs/SupportAndFAQ.rst
A openmp/docs/design/GPUGenericMode.md
R openmp/docs/design/GPUGenericMode.rst
A openmp/docs/design/GPUSPMDMode.md
R openmp/docs/design/GPUSPMDMode.rst
A openmp/docs/design/Offloading.md
R openmp/docs/design/Offloading.rst
A openmp/docs/design/Overview.md
R openmp/docs/design/Overview.rst
A openmp/docs/design/Runtimes.md
R openmp/docs/design/Runtimes.rst
A openmp/docs/index.md
R openmp/docs/index.rst
A openmp/docs/openacc/OpenMPExtensions.md
R openmp/docs/openacc/OpenMPExtensions.rst
A openmp/docs/openacc/Overview.md
R openmp/docs/openacc/Overview.rst
A openmp/docs/optimizations/OpenMPOpt.md
R openmp/docs/optimizations/OpenMPOpt.rst
A openmp/docs/optimizations/OpenMPUnawareOptimizations.md
R openmp/docs/optimizations/OpenMPUnawareOptimizations.rst
A openmp/docs/optimizations/Overview.md
R openmp/docs/optimizations/Overview.rst
A openmp/docs/remarks/OMP100.md
R openmp/docs/remarks/OMP100.rst
A openmp/docs/remarks/OMP101.md
R openmp/docs/remarks/OMP101.rst
A openmp/docs/remarks/OMP102.md
R openmp/docs/remarks/OMP102.rst
A openmp/docs/remarks/OMP110.md
R openmp/docs/remarks/OMP110.rst
A openmp/docs/remarks/OMP111.md
R openmp/docs/remarks/OMP111.rst
A openmp/docs/remarks/OMP112.md
R openmp/docs/remarks/OMP112.rst
A openmp/docs/remarks/OMP113.md
R openmp/docs/remarks/OMP113.rst
A openmp/docs/remarks/OMP120.md
R openmp/docs/remarks/OMP120.rst
A openmp/docs/remarks/OMP121.md
R openmp/docs/remarks/OMP121.rst
A openmp/docs/remarks/OMP130.md
R openmp/docs/remarks/OMP130.rst
A openmp/docs/remarks/OMP131.md
R openmp/docs/remarks/OMP131.rst
A openmp/docs/remarks/OMP132.md
R openmp/docs/remarks/OMP132.rst
A openmp/docs/remarks/OMP133.md
R openmp/docs/remarks/OMP133.rst
A openmp/docs/remarks/OMP140.md
R openmp/docs/remarks/OMP140.rst
A openmp/docs/remarks/OMP150.md
R openmp/docs/remarks/OMP150.rst
A openmp/docs/remarks/OMP160.md
R openmp/docs/remarks/OMP160.rst
A openmp/docs/remarks/OMP170.md
R openmp/docs/remarks/OMP170.rst
A openmp/docs/remarks/OMP180.md
R openmp/docs/remarks/OMP180.rst
A openmp/docs/remarks/OMP190.md
R openmp/docs/remarks/OMP190.rst
A openmp/docs/remarks/OptimizationRemarks.md
R openmp/docs/remarks/OptimizationRemarks.rst
Log Message:
-----------
[OpenMP][docs] Rename reStructuredText files to Markdown (#222191)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Validation:
- Confirmed this commit contains exactly 34 `.rst` to `.md` renames and
no content changes.
- The complete stacked migration is validated in the follow-up PR.
Commit: d0e55509a1cdfec0802d8b9e254ca2456a04175c
https://github.com/llvm/llvm-project/commit/d0e55509a1cdfec0802d8b9e254ca2456a04175c
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M openmp/docs/CommandLineArgumentReference.md
M openmp/docs/README.txt
M openmp/docs/ReleaseNotes.md
M openmp/docs/SupportAndFAQ.md
M openmp/docs/design/GPUGenericMode.md
M openmp/docs/design/GPUSPMDMode.md
M openmp/docs/design/Offloading.md
M openmp/docs/design/Overview.md
M openmp/docs/design/Runtimes.md
M openmp/docs/index.md
M openmp/docs/openacc/OpenMPExtensions.md
M openmp/docs/openacc/Overview.md
M openmp/docs/optimizations/OpenMPOpt.md
M openmp/docs/optimizations/OpenMPUnawareOptimizations.md
M openmp/docs/optimizations/Overview.md
M openmp/docs/remarks/OMP100.md
M openmp/docs/remarks/OMP101.md
M openmp/docs/remarks/OMP102.md
M openmp/docs/remarks/OMP110.md
M openmp/docs/remarks/OMP111.md
M openmp/docs/remarks/OMP112.md
M openmp/docs/remarks/OMP113.md
M openmp/docs/remarks/OMP120.md
M openmp/docs/remarks/OMP121.md
M openmp/docs/remarks/OMP130.md
M openmp/docs/remarks/OMP131.md
M openmp/docs/remarks/OMP132.md
M openmp/docs/remarks/OMP133.md
M openmp/docs/remarks/OMP140.md
M openmp/docs/remarks/OMP150.md
M openmp/docs/remarks/OMP160.md
M openmp/docs/remarks/OMP170.md
M openmp/docs/remarks/OMP180.md
M openmp/docs/remarks/OMP190.md
M openmp/docs/remarks/OptimizationRemarks.md
Log Message:
-----------
[OpenMP][docs] Finish MyST migration for OpenMP docs (#222194)
This was prepared with rst2myst plus LLM-assisted cleanup. The main
manual intervention was porting CommandLineArgumentReference.(rst|md) to
the semantic [`option`
directive](https://www.sphinx-doc.org/en/master/usage/domains/standard.html#directive-option),
which causes some rendering differences.
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #222191, which is a standalone commit that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
Please spot check my work and approve if it looks good. You can use the
HTML links below to confirm it renders properly.
-----
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---------
Co-authored-by: Michael Kruse <llvm-project at meinersbur.de>
Commit: 3714d5062c1ab2cbb4469c30eaef89989e9bc8df
https://github.com/llvm/llvm-project/commit/3714d5062c1ab2cbb4469c30eaef89989e9bc8df
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/struct-return-splat-gathered-scalars.ll
Log Message:
-----------
[SLP]Fix insert point for struct-call extractvalue entries with multi-block scalars
Emit the vector extractvalue right after the vectorized call it depends
on, so it dominates all uses.
Fixes #223726
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223766
Commit: 36de8b20fc6cb5edf4f0fe6e686c984e40bed35f
https://github.com/llvm/llvm-project/commit/36de8b20fc6cb5edf4f0fe6e686c984e40bed35f
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/recip-sqrt-estimate-illegal-scalar-types.ll
A llvm/test/CodeGen/X86/recip-sqrt-estimate-illegal-types.ll
Log Message:
-----------
[X86] Require legal result types for f32 estimates
The single-precision paths in `getRecipEstimate` and `getSqrtEstimate`
match a fixed set of scalar and vector f32 types, then check the
corresponding subtarget features. Those checks do not imply that the
result type is legal. Soft-float makes these result types illegal. Scalar
f32 is also illegal on a 32-bit SSE1 target without SSE2 or x87. The hooks
can then build an X86-specific estimate node with an illegal result type
before type legalization. Type legalization has no rule for that node, so
compilation fails.
Require a legal result type before entering the single-precision estimate
paths. The f16 paths in these hooks already require a legal type. After
this patch, the f32 paths match that behavior. The hooks return no estimate
for an illegal result type, so the original division or square root stays
in the DAG and follows its normal lowering. Estimate code generation for
legal result types is unchanged.
Fixes https://github.com/llvm/llvm-project/issues/217801
Assisted-by: Claude Opus 5, GPT-5.6 Sol.
Commit: 8ef69555af1ca20dd5c933bcf88d6185e6558b35
https://github.com/llvm/llvm-project/commit/8ef69555af1ca20dd5c933bcf88d6185e6558b35
Author: Justin Stitt <justinstitt at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/OverflowBehaviorTypes.md
M clang/include/clang/AST/TypeBase.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/test/Sema/attr-overflow-behavior.cpp
A clang/test/Sema/overflow-behavior-qualifiers.c
M clang/test/SemaCXX/sugar-common-types.cpp
Log Message:
-----------
[Clang] Keep qualifiers outside of OverflowBehaviorType nodes (#222190)
`__typeof_unqual__` wasn't stripping `const` off of an overflow behavior
type:
```c
__typeof_unqual__(const __ob_trap int) x; // '__ob_trap const int'
```
The canonical type was always right, so `x` really is writable -- we
just printed it as const, which is the opposite of the truth.
`getOverflowBehaviorType()` hoisted qualifiers out for the canonical
type but stored the underlying type verbatim in the sugar node, so
`const __ob_trap int` became `OBT{const int}` with nothing qualified at
the `QualType` level. `getUnqualifiedType()` checks the canonical type
to decide there's something to strip, then strips it by desugaring one
step at a time. `OverflowBehaviorType` isn't sugar, so that walk
dead-ends on it and the qualifiers never come off.
So the rule is: a type node you can't desugar through shouldn't have a
canonical type with local qualifiers on it. Split the qualifiers off at
construction and put them back outside the node, which is where the
canonical already puts them.
Local qualifiers alone aren't enough here. `__ob_trap cint`, where
`cint` is a `typedef const int`, has the const in its canonical type but
not in its local qualifier set, and it's broken the same way.
`getSplitUnqualifiedType()` gets both. We lose the `cint` spelling in
that case but I think that's fine... that typedef is what was hiding the
qualifier in the first place.
While here, let `canPrefixQualifiers()` prefix an OBT so we print `const
__ob_trap int` instead of `__ob_trap int const`. That list is for types
that wrap the declarator, and an OBT just puts a keyword in front of an
integer like `_BitInt` and `_Atomic` do. We were already printing the
same type two different ways in attr-overflow-behavior.cpp, which is a
pretty good hint it was in the wrong list.
Note the new test checks the *printed* types. Since the canonical type
was never wrong, anything that only looks at canonical types passes
either way and doesn't actually test this.
Also spell out in the docs that an OBT is a type specifier and not a
qualifier.
Assisted-by: claude
Signed-off-by: Justin Stitt <justinstitt at google.com>
Commit: 00323c9d8fc6101091dda1cf8c53c2a774b27fa3
https://github.com/llvm/llvm-project/commit/00323c9d8fc6101091dda1cf8c53c2a774b27fa3
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/test/CIR/IR/invalid-try-catch.cir
M clang/test/CIR/IR/try-catch.cir
A clang/test/CIR/Transforms/eh-abi-lowering-eh-spec-nyi.cir
A clang/test/CIR/Transforms/flatten-eh-spec-nyi.cir
Log Message:
-----------
[CIR][EH] Add dialect elements for dynamic exception specification (#223503)
This change introduces the CIR dialect elements that will be needed to
implement dynamic exception specification handling. At this point
nothing generates any of these elements, and they are not handled in CFG
flattening or EH ABI lowering. Those will be implemented in follow-up
changes.
See clang/docs/CIR/CleanupAndEHDesign.md for the design of this feature.
Assisted-by: Cursor / various models
Commit: bb08625cb147f07de93ff6ae933336d8c4b3b8e3
https://github.com/llvm/llvm-project/commit/bb08625cb147f07de93ff6ae933336d8c4b3b8e3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/arm-eabi.c
M clang/test/Driver/eabi.c
M flang/lib/Frontend/FrontendActions.cpp
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/Analysis/RuntimeLibcallInfo.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Passes/RunCodeGen.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/test/CodeGen/ARM/arm-eabi.ll
M llvm/test/CodeGen/ARM/float-helpers.ll
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-dispatch.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-grouping.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-name-merge.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-ref.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/codegen-opt-flags.ll
M llvm/tools/llc/lib/NewPMDriver.cpp
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
CodeGen: Remove TargetOptions::EABIVersion (#222672)
The field's only effect was gating the __aeabi_mem*[4|8] libcalls via
the IsEABI4/IsEABI5 predicates. That distinction is derivable from the
triple's environment, so replace the two predicates with a single
triple-derived IsEABIVersion and delete the field.
The clang -meabi option and clang::TargetOptions::EABIVersion are
retained (now codegen-inert); the llc/opt -meabi flag is removed. -meabi
now only takes effect on triples with a bare-EABI/GNU environment pair
(arm-none-eabi <-> gnueabi), which is the only case with a triple
representation.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 88cab6bfc4e0a3829fdedeabcb21e977a1cf3e98
https://github.com/llvm/llvm-project/commit/88cab6bfc4e0a3829fdedeabcb21e977a1cf3e98
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A llvm/test/TableGen/RuntimeLibcallEmitter-variant-beats-exclusion.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcallsEmitter: Let a consumer's own library variant beat its exclusion (#221953)
A target can pull a shared library via LibraryRef<Lib, [impls]> to drop
some impls, then re-add its own versions through a same-name library variant
guarded on that target. Previously the exclusion's setUnavailable calls were
emitted at the end of setAvailableLibFuncs_<name>, after every variant, so they
clobbered the target's own re-adds.
Defer emitting a variant until after the exclusions when it re-adds an
impl its own consumer excludes (same predicates), so the target's re-add wins
while the exclusion still suppresses every other variant's contribution.
This is yet unused infrastructure for future changes.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 5fbcd6e37671e5c6d950494a6bb434e27d28f840
https://github.com/llvm/llvm-project/commit/5fbcd6e37671e5c6d950494a6bb434e27d28f840
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/Config/config.h.cmake
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Support/PrettyStackTrace.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Valgrind.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/config.bzl
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
[CMake] Prune dead and unnecessary try_compiles from config.h (#223765)
This relands the change directly on `main` after #223600 was
accidentally
merged into its stacked base branch. This reuses the approvals from
@aengelke and @MaskRay on #223600.
Several config-ix checks either have no consumer or can be performed
directly by the source that needs the feature. Remove six compiler
invocations from a typical Linux configure:
* HAVE_PTHREAD_MUTEX_LOCK has been unused since LLVM switched its mutex
implementation to std::recursive_mutex in 2019.
* The Linux magic-header results have never been propagated to config.h,
so CMake builds already use Path.inc's fallback constants.
* FE_ALL_EXCEPT and FE_INEXACT can be tested directly after including
cfenv.
* The Valgrind and CrashReporter headers can be detected with
__has_include in their only consuming translation units.
Also remove the obsolete definitions from the GN and Bazel
configurations.
In a fresh minimal LLVM configure, CMake profiling attributed 2067.1 ms
to 45 config-ix probes before this change and 1846.9 ms to 39 probes
after it.
Assisted-by: Codex
Commit: 2323ab283b13decfdb9edb24745edcf8951913fb
https://github.com/llvm/llvm-project/commit/2323ab283b13decfdb9edb24745edcf8951913fb
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/update_test_checks.py
Log Message:
-----------
[UTC] Strip only standalone positional %s in update_test_checks.py (#221153)
Previously, update_test_checks.py used tool_cmd_args.replace("%s", "")
to strip the input file when passing the IR via stdin. However, this
blindly removed "%s" from any option argument, leaving an empty value
(e.g., -lowertypetests-read-summary=).
Update the argument stripping to only remove standalone positional
"< %s" or "%s", preserving option arguments with "%s" values so they can
be expanded via common substitutions.
This enables update_test_checks.py to work for tests such as
llvm/test/Transforms/LowerTypeTests/cfi-jumptable-hotness-summary.ll,
which passes -lowertypetests-read-summary=%s on the RUN line.
Assisted-by: Gemini
Commit: a3d2f4b4a0aee08f26aa218e4e4d9dae1afa1d7a
https://github.com/llvm/llvm-project/commit/a3d2f4b4a0aee08f26aa218e4e4d9dae1afa1d7a
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp
A mlir/test/Dialect/Linalg/pad-neutral.mlir
Log Message:
-----------
[[mlir][linalg] Infer reduction-neutral padding values in rewriteAsPaddedOp (#216517)
**Problem**:
with no explicit options.paddingValues, rewriteAsPaddedOp padded every
operand with zero — silently corrupting reductions (a padded
maximumf/mulf element gets combined).
**Change**:
Added a new public linalg::inferPaddingValues(builder, toPad) to pick a
semantics-preserving value per operand:
- no reduction dim → zero;
- contraction → zero (0 annihilates through the multiply);
- other reductions → the combiner's neutral (-inf for maximumf, 1 for
mulf, …), found via matchReduction so the real accumulator combiner is
used.
rewriteAsPaddedOp calls it when options.paddingValues is empty. If no
value can be inferred, it returns failure() with the error "could not
infer a padding value"; the caller is then expected to determine the
value and supply it explicitly through options.paddingValues.
assited-by-claude
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: b0f50174f52d02eb68a1194ed93ec89507ef2fe1
https://github.com/llvm/llvm-project/commit/b0f50174f52d02eb68a1194ed93ec89507ef2fe1
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang-rt/lib/cuda/allocatable.cpp
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/include/flang/Runtime/CUDA/allocatable.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
Log Message:
-----------
[flang][cuda][NFC] Move CUFDeviceIsActive function to the right place (#223453)
The definition and declaration were done in different files (descriptor
and allocator). Move all to allocatable as this check is used for the
automatic deallocation.
Commit: b6912258891caefffbf15edb1bceff3724b75af5
https://github.com/llvm/llvm-project/commit/b6912258891caefffbf15edb1bceff3724b75af5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A clang/test/CodeGen/WebAssembly/exception-model-flag.c
M clang/test/CodeGen/exception-model-flag.c
Log Message:
-----------
clang: Fix exception model flag tests if webassembly isn't build (#223770)
The wasm and emscripten RUN lines require the WebAssembly backend due to
the use of -mllvm -wasm-enable-eh, until that flag is fully replaced with
the new exception model flag.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: a2239cbf89c9c8187a6deb83423eafad44e4a6d1
https://github.com/llvm/llvm-project/commit/a2239cbf89c9c8187a6deb83423eafad44e4a6d1
Author: Owen Anderson <resistor at mac.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
A llvm/test/CodeGen/RISCV/cheri-global-cap-init.ll
Log Message:
-----------
[CHERI][RISCV][AsmPrinter] Use pointer index size rather than pointer size in AsmPrinter constant lowering. (#220100)
This prevents a crash due to APInt width mismatches during
accumulateConstantOffset for CHERI targets.
Commit: 57186afd172250f0c1695b809505947382f227cd
https://github.com/llvm/llvm-project/commit/57186afd172250f0c1695b809505947382f227cd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
M llvm/lib/IR/PassManager.cpp
Log Message:
-----------
[NewPM] Add helper function to skip for opt-bisect
With the introduction of CodeGen passes to the NewPM infrastructure, we
get the concept of required passes that perform optimizations and want
to skip them when running under opt bisect. This occurs for passes like
SelectionDAG and StackColoring. Add a helper function to make it easy to
query, although make it specific to opt bisect unlike the LegacyPM
skipFunction. A helper function is slightly more convenient (i.e., no
need to forward the pass name explicitly).
Reviewers: nikic, arsenm, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/223486
Commit: 5bfcaeb68eb16e72128a69cdf0c671187a6afaa5
https://github.com/llvm/llvm-project/commit/5bfcaeb68eb16e72128a69cdf0c671187a6afaa5
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/Sema/riscv-pst-pointer-types.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Store (#223619)
See also
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-store.
Commit: bb189b9bea4469d7f950745fd8b8c65c5acf21c9
https://github.com/llvm/llvm-project/commit/bb189b9bea4469d7f950745fd8b8c65c5acf21c9
Author: Martin Storsjö <martin at martin.st>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/source/API/SBFile.cpp
Log Message:
-----------
[lldb] [Windows] Add a missing include. NFC. (#223727)
_open_osfhandle is defined in io.h, which wasn't explicitly included
before.
This built fine in practice with both WinSDK and recent mingw-w64
headers, but failed with older versions of mingw-w64 (older than August
2026).
Also change an accidental #if into #ifdef.
This fixes regressions from 1ca6698be7708121f987d0acf896c7dc4cf63a51 and
ba1687b72476eb368641b9a9f565a38cf41b7393.
Commit: 68fab9c6089f2e64343e8408147eb01c32ba6d3f
https://github.com/llvm/llvm-project/commit/68fab9c6089f2e64343e8408147eb01c32ba6d3f
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[clang][ReleaseNotes] document -fstack-clash-protection for Android (#223786)
Link: #209279
Commit: 03b0c4320aafa7e930f1f7aed392af7648682ea6
https://github.com/llvm/llvm-project/commit/03b0c4320aafa7e930f1f7aed392af7648682ea6
Author: Christian Sigg <csigg at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenHIP/amdgpu-flat-atomic-fadd.hip
M clang/test/CodeGenHIP/amdgpu-global-atomic-fadd.hip
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx942.cl
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
M flang/test/Driver/atomic-control-options.f90
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/Bitcode/amdgcn-atomic.ll
M llvm/test/Bitcode/amdgpu-unsafe-fp-atomics-upgrade.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/SPIRV/amdgcnspirv-atomic-metadata-decoration.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization-preserve-name.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/global-atomicrmw-fadd.ll
M mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-atomic-update-control-options.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[IR] Generalize !amdgpu.ignore.denormal.mode into !atomic.ignore.denormal.mode (#217585)
The !amdgpu.ignore.denormal.mode metadata tells the backend that an
atomicrmw fadd need not honor the function's denormal mode, so a native
atomic instruction whose denormal behavior is fixed in hardware may be
used instead of a CAS loop. Nothing about that is AMDGPU specific: NVPTX
has exactly the same problem with atom.add, whose FTZ behavior depends
on
the address space and cannot be controlled.
Promote it to a target independent fixed metadata kind,
!atomic.ignore.denormal.mode, and switch the AMDGPU, SPIR-V and OpenMP
producers and consumers over to it. Document it in LangRef, and point
AMDGPUUsage at that description rather than duplicating it.
Existing IR keeps working: AutoUpgrade renames the metadata on atomicrmw
instructions when parsing textual IR and when materializing bitcode. The
upgrade is deliberately scoped to atomicrmw rather than being applied to
every attachment of that name, since that is the only place the metadata
was ever meaningful. Because bitcode can be materialized one function at
a time, the bitcode side hooks into BitcodeReader::materialize() rather
than a module-wide pass, which is the path clang's bitcode linking
takes.
This is not intended to change behavior for any existing target.
Co-authored-by: Artem Belevich <tra at google.com>
Commit: 8301c241d7fa0c0d737fe3a01a1213da8687f90b
https://github.com/llvm/llvm-project/commit/8301c241d7fa0c0d737fe3a01a1213da8687f90b
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/flang-f-opts.f90
Log Message:
-----------
[Flang] Keep -fkeep-inline-functions as an ignored option (#223733)
55221f7 removed the warning check for -fkeep-inline-functions and
-fno-keep-inline-functions from flang-f-opts.f90 after the test started
failing when the option was implemented for Clang in 28efe19.
The options are currently only supported by Clang, so keep
-fkeep-inline-functions and -fno-keep-inline-functions as unsupported
options for Flang and emit the appropriate warnings.
Commit: c9f6b2e48b9c021d44cdfd70b49ce6abb2fcbd26
https://github.com/llvm/llvm-project/commit/c9f6b2e48b9c021d44cdfd70b49ce6abb2fcbd26
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/mismatched-bound-types.f90
Log Message:
-----------
[flang][test][NFC] Add OpenMP test for mismatched loop bound types (#221097)
Adds a regression test that lowering succeeds when an OpenMP loop mixes
bound types: the loop trip count comes from an integer(kind=INT64)
module
variable while the lower bound and step are i32 literals, so both are
converted to i64 before being passed through host_eval.
Commit: 748bb124441967238cc4b0190d617cd2c8ec9af3
https://github.com/llvm/llvm-project/commit/748bb124441967238cc4b0190d617cd2c8ec9af3
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
M llvm/test/Transforms/Attributor/nofpclass-fadd-fsub.ll
M llvm/test/Transforms/Attributor/nofpclass-fdiv.ll
M llvm/test/Transforms/Attributor/nofpclass-fma.ll
M llvm/test/Transforms/Attributor/nofpclass-fmul.ll
M llvm/test/Transforms/Attributor/nofpclass-nan-fmul.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[KnownFPClass] Propagate non-`sNaN` for `fadd`/`fsub`, `fmul`, `fdiv`, and `fma` (#221876)
`fadd`, `fsub`, `fmul`, `fdiv`, and `fma` can only return `sNaN` if at
least one of their inputs are `sNaN`. This means that we can rule out
`sNaN` from the result if all of the arguments are known to never be
`sNaN`.
`sNaN` propagation for `frem` is handled in this PR:
https://github.com/llvm/llvm-project/pull/219303
Commit: 1cc3b19d5500070b42ba5f0f1d51f00f64d0be15
https://github.com/llvm/llvm-project/commit/1cc3b19d5500070b42ba5f0f1d51f00f64d0be15
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/nofpclass-atan2.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-atan2.ll
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Add sign preserving deductions to `atan2(y, x)` (#223176)
`atan2(y, x)` should return the same sign as `y` (up to the denormal
mode):
- If `y >= +0.0`, then `atan2(y, x) >= +0.0`
- If `y <= -0.0`, then `atan2(y, x) <= -0.0`
AI Disclosure:
I used ChatGPT Codex (5.6 sol) to help write the tests.
Commit: 4cbd7f8300cab44d8847ab2b7db7ef2caa5b2942
https://github.com/llvm/llvm-project/commit/4cbd7f8300cab44d8847ab2b7db7ef2caa5b2942
Author: Alexander Viand <alexander.viand at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/MathToEmitC/MathToEmitC.h
M mlir/lib/Conversion/ConvertToEmitC/CMakeLists.txt
M mlir/lib/Conversion/MathToEmitC/CMakeLists.txt
M mlir/lib/Conversion/MathToEmitC/MathToEmitC.cpp
M mlir/lib/Dialect/Math/IR/MathDialect.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/test/Conversion/MathToEmitC/math-to-emitc.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][emitc] Add a ConvertToEmitCPatternInterface for the math dialect (#223666)
MathToEmitC wasn't registered for `--convert-to-emitc`. This registers
an interface matching the other *ToEmitC interfaces.
Commit: fcc6118dc91ba05a1ad30b0f406e42a8eb62f859
https://github.com/llvm/llvm-project/commit/fcc6118dc91ba05a1ad30b0f406e42a8eb62f859
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/CodeGenUtils/CodeGenUtils.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGenUtils/CodeGenUtils.cpp
A clang/test/CIR/CodeGen/avx512-error.c
A clang/test/CIR/CodeGen/target-builtin-error-2.c
A clang/test/CIR/CodeGen/target-builtin-error-3.c
A clang/test/CIR/CodeGen/target-builtin-error.c
A clang/test/CIR/CodeGen/target-builtin-noerror.c
A clang/test/CIR/CodeGen/target-features-error-2.c
A clang/test/CIR/CodeGen/target-features-error-3.c
A clang/test/CIR/CodeGen/target-features-error-4.c
A clang/test/CIR/CodeGen/target-features-error-5.c
A clang/test/CIR/CodeGen/target-features-error.c
A clang/test/CIR/CodeGen/target-features-no-error-2.c
A clang/test/CIR/CodeGen/target-features-no-error.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlvbmi2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sqrt-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtin-undef-rvalue.cpp
Log Message:
-----------
[CIR][CodeGen] Implement target-features checking(CodeGenUtils!) (#223056)
This DOES move checking functions out of CodeGen and into CodeGenUtils
so both can use it.
This is a diagnostic for builtins/etc that is built in to classic
codegen. We have to implement it, because otherwise autoconfig thinks
that we support AVX without a flag, and thus causes us to fail builds
later on that now expect __AVX__/etc to be defined without enabling
them.
Commit: 37248da89922524e04ed72bd8389179d9b99cbfb
https://github.com/llvm/llvm-project/commit/37248da89922524e04ed72bd8389179d9b99cbfb
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/ABIInfo.cpp
A clang/test/CodeGen/AArch64/matrix-hfa.c
A clang/test/CodeGen/ARM/matrix-hfa.c
A clang/test/CodeGen/PowerPC/matrix-hfa.c
A clang/test/CodeGen/X86/matrix-vectorcall.c
Log Message:
-----------
[Clang][ABI] Classify floating-point matrix types as homogeneous aggregates (#222429)
The `ABIInfo::isHomogeneousAggregate()` function did not have explicit
handling for `ConstantMatrixType` and so, by default, these types were
rejected as potential homogeneous aggregates.
This change adds handling for `ConstantMatrixType` and classifies such
matrix types depending on whether they otherwise meet the criteria.
Fixes: https://github.com/llvm/llvm-project/issues/222417
Assisted-by: Cursor / Grok 4.6
Commit: 247db2420326c288690592088596db9435098261
https://github.com/llvm/llvm-project/commit/247db2420326c288690592088596db9435098261
Author: Justin Stitt <justinstitt at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/OverflowBehaviorTypes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaType.cpp
A clang/test/Sema/overflow-behavior-atomic.c
Log Message:
-----------
[Clang] Reject overflow behavior types on _Atomic (#222179)
atomic read-modify-write operations aren't instrumented for overflow. `counter++` on an `_Atomic` object lowers to a single `atomicrmw`, and this is true for plain atomic types under `-fsanitize=signed-integer-overflow` too.
That's a problem for `__ob_trap`, which is supposed to be checked no matter what the global flags say:
```c
typedef int __ob_trap trapping_int;
_Atomic trapping_int counter;
int x = counter + 1; // checked
counter++; // not checked
```
A guarantee that only holds for some expressions is worse than none, so reject the combination outriht. Let's also reject `__ob_wrap` too so the rule doesn't depend on the behavior kind... wrap has minimal use here anyways.
Applying an OBT specifier over an atomic type was already an error, though it unhelpfully reported `_Atomic(int)` as a non-integer type even though it is. Applying `_Atomic` over an existing OBT was accepted, which is where the unchecked read-modify-write came from... this was a bug that is now fixed because we are no longer trying to apply OBT on top of `_Atomic`. This is all made more clear by better diagnostics too :)
We can relax this later if someone needs it. I think instrumenting checked atomic rmws would mean lowering to a cmpxchg/CAS loop.
Assisted-by: claude
Signed-off-by: Justin Stitt <justinstitt at google.com>
Commit: e847bd0f770f36a457c8ccd38aa171980ad25dd7
https://github.com/llvm/llvm-project/commit/e847bd0f770f36a457c8ccd38aa171980ad25dd7
Author: lntue <lntue at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/off64_t.h
M libc/include/CMakeLists.txt
M libc/include/fcntl.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/posix_fadvise.h
M libc/src/fcntl/CMakeLists.txt
M libc/src/fcntl/linux/CMakeLists.txt
A libc/src/fcntl/linux/posix_fadvise64.cpp
A libc/src/fcntl/posix_fadvise64.h
M libc/test/src/fcntl/CMakeLists.txt
A libc/test/src/fcntl/posix_fadvise64_test.cpp
M libc/test/src/fcntl/posix_fadvise_test.cpp
Log Message:
-----------
[libc] Implement posix_fadvise64. (#223294)
Commit: 61222a694c948b667ca8be4acd79e8594f51bb82
https://github.com/llvm/llvm-project/commit/61222a694c948b667ca8be4acd79e8594f51bb82
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
Log Message:
-----------
[RelLookupTableConverter][NFC] Fix typo GlovalVarOp -> GlobalVarOp (#223555)
Fixes the misspelling of GlovalVarOp with a 'v' in
shouldConvertToRelLookupTable.
Commit: a84250b63d2a731da76a25e091bb9c5374651625
https://github.com/llvm/llvm-project/commit/a84250b63d2a731da76a25e091bb9c5374651625
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/unittests/ABI/CMakeLists.txt
A llvm/unittests/ABI/FunctionInfoTest.cpp
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
Log Message:
-----------
[LLVMABI] Add CanBeFlattened to abi::ArgInfo (#220558)
Mirror `clang::CodeGen::ABIArgInfo::CanBeFlattened` on `abi::ArgInfo` so
a classifier can keep a Direct record coercion in one piece, as
AAPCS-VFP homogeneous aggregates, AMDGPU direct aggregates and x86
vectorcall HVAs require. The bit defaults to true, so existing
classifiers are unchanged. It is exposed through `getCanBeFlattened()`
and a chainable `setCanBeFlattened()`, both Direct-only like the classic
accessor.
The MLIR `ArgClassification::canFlatten` and the CIR rewriter already
honour the flag; the CIR bridge will read the new bit with the first
classifier that clears it.
Commit: e270ee55cce78c61bda92d78b69869a53d1f36f7
https://github.com/llvm/llvm-project/commit/e270ee55cce78c61bda92d78b69869a53d1f36f7
Author: cui fliter <imcusg at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/RunInTerminalTest.cpp
Log Message:
-----------
[lldb-dap] Fix runInTerminal error message serialization (#221504)
`RunInTerminalMessageError::ToJSON()` serializes the error message using
the `"value"` field, while `ParseJSONMessage()` expects the `"error"`
field.
When the runInTerminal launcher fails, the debug adapter cannot
deserialize the launcher error and reports an `Incorrect JSON message`
error instead of preserving the original diagnostic.
This patch makes the serialized field name match the parser and adds a
round-trip test covering launcher error propagation.
Signed-off-by: cuishuang <imcusg at gmail.com>
Commit: 919f058fe8d4edfe9806b1f2a2cf553f93f60182
https://github.com/llvm/llvm-project/commit/919f058fe8d4edfe9806b1f2a2cf553f93f60182
Author: Adrian Kuegel <akuegel at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/bindings/python/.git_archival.txt
Log Message:
-----------
[clang][python] Make .git_archival.txt deterministic. (#223362)
Without an explicit `abbrev` option, `$Format:%(describe:...)` uses
Git's dynamic object abbreviation length (`find_unique_abbrev`). In a
large, rapidly growing repository like `llvm-project`, new commits can
potentially collide with existing short-SHA prefixes, causing GitHub's
`git archive` servers to emit longer short-SHAs over time for historical
commits. This mutates `clang/bindings/python/.git_archival.txt` inside
GitHub's dynamically generated `.tar.gz`/`.zip` source archives,
breaking downstream builds (such as OpenXLA/Bazel) that verify archive
SHA-256 checksums.
Specify `abbrev=40` so `describe-name` always uses the full 40-character
commit hash. `hatch-vcs` slices the parsed node ID to 10 characters when
formatting versions, so the resulting Python package version is
unchanged.
Commit: 1d84c1b18df8c49484e5bbfa267a63e350e573de
https://github.com/llvm/llvm-project/commit/1d84c1b18df8c49484e5bbfa267a63e350e573de
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-keep-drop.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-satd.ll
Log Message:
-----------
[SLP][NFC]Add extra tests with missed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223810
Commit: 7800bec8a155c3f88518b25fa4241320721911b0
https://github.com/llvm/llvm-project/commit/7800bec8a155c3f88518b25fa4241320721911b0
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][SchedulerTest][NFC] Fix unused variable warning (#223751)
Commit: 404d35af4d588e03941c8fe524f881749059edcb
https://github.com/llvm/llvm-project/commit/404d35af4d588e03941c8fe524f881749059edcb
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump CI containers to LLVM 23.1.1 (#223775)
This means we no longer have -Wunused-template enabled by default, for
which the LLVM tree is still not clean.
Commit: 60dd6268bcbcb36256526273dfea4145d68cbedd
https://github.com/llvm/llvm-project/commit/60dd6268bcbcb36256526273dfea4145d68cbedd
Author: Andre Sun <andsun9999 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestMacroExpansion.cpp
Log Message:
-----------
[clang-format] Fix crash on adjacent configured macro calls (#221352)
`parseMacroCall()` used `nextToken()` to consume the end of a configured
macro call, which also processed the following token. For adjacent macro
calls, this could expand the second call first and leave macro
reconstruction state out of order, causing a crash when the second
expansion starts with a comment.
This commit changes `parseMacroCall()` to consume the last token without
processing the following token, preserving source-order expansion. It
also prevents trailing comments from becoming part of the reconstructed
macro call.
Fixes #190721
Assisted-by: DeepSeek Flash v4
Commit: 712196951e77eea330269d3c2267c571e07f4577
https://github.com/llvm/llvm-project/commit/712196951e77eea330269d3c2267c571e07f4577
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
R flang/test/Lower/OpenMP/mismatched-bound-types.f90
Log Message:
-----------
Revert "[flang][test][NFC] Add OpenMP test for mismatched loop bound types" (#223813)
Reverts llvm/llvm-project#221097
This fails buildbots
https://lab.llvm.org/buildbot/#/builders/80/builds/24748 and precommit
CI.
@doru1004 please look at it and remand when fixed.
Commit: 4f4110d0be5601eb6c62e18110009cddb0573051
https://github.com/llvm/llvm-project/commit/4f4110d0be5601eb6c62e18110009cddb0573051
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
A mlir/test/Conversion/XeVMToLLVM/mxfp_scale_binary_hoist.mlir
Log Message:
-----------
[MLIR][XeVM] Hoist contiguous-slice shuffles through n-ary elementwise ops (#222452)
XeGPU expresses vector operands in their logical element type, so
per-lane compute chains can end up wider than the SPIR-V backend can
legalize as a single operand. HandleVectorExtractPattern already narrows
such chains by hoisting a contiguous-slice shufflevector upward through
unary element-wise ops (fpext/fptrunc/bitcast), merging shuffle chains,
and folding into smaller loads. But it stops at n-ary ops, so a chain
like
%0 = llvm.fdiv %a, %b : vector<32xf32> // wide, binary
%1 = llvm.shufflevector %0, %0 [0..15] : vector<32xf32> // legal 16-wide
slice
keeps a wide vector<32xf32> compute that the backend rejects.
This extends the pattern to hoist a contiguous slice through n-ary
element-wise ops as well: slice each same-length vector operand with the
same mask and re-create the op at the narrow width. The freshly created
operand slices keep hoisting upward (merging, or folding into loads)
until they reach operands that are already legal width, so the whole
compute chain collapses to the slice width - with no target-specific
width limit, since the width is inherited from the slice.
Length-changing and packed-payload ops (e.g. bitcast, truncf) are left
untouched.
Commit: 7a75731966966c175d01204fb88ffd4c236a4f35
https://github.com/llvm/llvm-project/commit/7a75731966966c175d01204fb88ffd4c236a4f35
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A utils/bazel/tools/check_bazel_inputs.py
Log Message:
-----------
[bazel] Add script for finding files not in the graph (#220343)
This is useful to make sure that globs cover all files in a given
subdirectory. Right now this doesn't cover many directories because we
don't have tons of tests in bazel but if we eventually add those we can
more easily spot ones we miss with this script.
Assisted by: codex
Commit: cf09a7688ec47cc30c36381834e1c99fe34d2e20
https://github.com/llvm/llvm-project/commit/cf09a7688ec47cc30c36381834e1c99fe34d2e20
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 4f4110d (#223824)
This fixes 4f4110d0be5601eb6c62e18110009cddb0573051 (#222452).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=4f4110d0be5601eb6c62e18110009cddb0573051
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 2f852016addf27fd9eb83ff9faba66633b0fafe8
https://github.com/llvm/llvm-project/commit/2f852016addf27fd9eb83ff9faba66633b0fafe8
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/unbounded-struct-arr.ll
Log Message:
-----------
[SPIRV] Emit RuntimeDescriptorArrayEXT capability for all unbounded array types (#222819)
Previously, the `RuntimeDescriptorArrayEXT` capability was emitted only
for image descriptor arrays. This change emits the capability for the
shader whenever resource array has `ArraySize == 0`.
This covers all supported runtime descriptor array types, including
images, structured buffers, samplers, and counter descriptor arrays.
Emitting the capability for these arrays is necessary to support dynamic
resources in SPIR-V.
Assisted by GPT-5.6 Sol.
Commit: 320bc620c46b0fd49a9976e499cd4252d78297b8
https://github.com/llvm/llvm-project/commit/320bc620c46b0fd49a9976e499cd4252d78297b8
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
Log Message:
-----------
[AMDGPU] Fix for GFX11 VOPD interlock hazard (#220348)
On GFX11, a VOPD consumer whose X/Y sources share a gather class (srcA
or srcB) and the same VGPR parity can lose the destination-buffer interlock
for one of those sources. Thus, use parity as bank mask instead.
Commit: 89ec1e3f5388e22c0a372798b7dbe48ba408d60b
https://github.com/llvm/llvm-project/commit/89ec1e3f5388e22c0a372798b7dbe48ba408d60b
Author: Dan Liew <dan at su-root.co.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGen/attr-counted-by-or-null-for-pointers.c
M clang/test/CodeGen/attr-sized-by-for-pointers.c
M clang/test/CodeGen/attr-sized-by-or-null-for-pointers.c
Log Message:
-----------
[CodeGen] Fix -fsanitize=array-bounds for __sized_by / _or_null pointers (#213795)
`EmitCountedByBoundsChecking()` assumed a CountAttributedType is always
a __counted_by pointer. That isn't true; there are four versions of the
attribute:
* `__counted_by`: Already handled correctly.
* `__counted_by_or_null`: Incorrectly handled.
* `__sized_by`: Incorrectly handled.
* `__sized_by_or_null`: Incorrectly handled.
In particular:
* __sized_by / __sized_by_or_null: the loaded bound is a byte count, but
the
element index was compared against it directly, so an access was only
flagged once the index exceeded the byte count -- missing out-of-bounds
accesses for a pointee larger than one byte. Convert the loaded byte
count
into an element count by dividing it by the element size (`bound /
sizeof(element)`) so the check can compare the (element) index directly.
`counted_by` already counts elements and is unchanged; a void (or
otherwise
zero-/unknown-sized) pointee uses the GNU convention of element size 1,
i.e.
no conversion. Signed division is used for a signed count field so a
negative
byte count stays non-positive and is still rejected by the
negative-bounds
guard in EmitBoundsCheckImpl (unsigned division would turn it into a
large
positive count).
* __counted_by_or_null / __sized_by_or_null: a null pointer describes no
accessible memory, but the null case was ignored, so an access through a
null pointer with a non-zero count was not trapped. Treat the bound as 0
when the pointer is null.
Both adjustments are applied to the loaded bound in
EmitCountedByBoundsChecking before it is handed to EmitBoundsCheckImpl;
the bounds-checking machinery and the runtime handler are left unchanged
and continue to work in terms of the element index. Plain `__counted_by`
and the general array-bounds path are unaffected.
I did try an alternative implementation where the comparison was done in
terms of bytes (rather than elements which this patch does), but this
had several disadvantages:
* It was less correct. Because the element-count implementation uses
truncating division, a `__sized_by()` whose size is not a multiple of
the
pointee size rounds the bound down, so an access to a partially
in-bounds
object is caught. A byte-level check would instead only verify that the
first byte of the object is in bounds, which would allow accessing a
partially in-bounds object.
* When benchmarking (small microbenchmarks targetting arm64e), it
appeared that the division implementation was faster. Note that an
unsigned count field and an element size that is a power 2 produces
the best LLVM IR because unsigned division by a power of 2 can be
turned by the optimizer into a `lshr` instruction.
* It required changes in `CodeGenFunction::EmitBoundsCheckImpl` as well,
which made the change more invasive.
Note while working on this I did discover an existing bug where if the
base (e.g. `side_effect()->ptr[0]`) has a side-effect it is incorrectly
evaluated multiple times. Fixing that is out-of-scope for this patch and
will be handled later.
Assisted-by: Claude Code
rdar://184139694
Commit: bd695f75fc1f46bdc032a982f9c849f6365a5af2
https://github.com/llvm/llvm-project/commit/bd695f75fc1f46bdc032a982f9c849f6365a5af2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-keep-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-satd.ll
Log Message:
-----------
[SLP]Fix splat gather subtree keep/drop to restore lost vectorization
The splat gather subtrees were kept on cost ties and resurrected by the
trimming revert without a profitability re-check, and dropping them left
the gathered loads built for them orphaned and forcing extracts. This
rejected otherwise profitable VF=2 trees. Keep subtrees only when
strictly profitable, re-evaluate them against the restored tree on a
revert, and delete the gathered loads left dead by a drop.
Fixes the remaining regressions from #220250 reported in #221717.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223833
Commit: 1e522aa33cc216e65d7b4ea7c687059554b2ff4d
https://github.com/llvm/llvm-project/commit/1e522aa33cc216e65d7b4ea7c687059554b2ff4d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
Log Message:
-----------
Require X86 for DeclareRuntimeLibcalls test (#223832)
Commit: f0b5bfb908f22fc8d7199f868a822e6d40c1369a
https://github.com/llvm/llvm-project/commit/f0b5bfb908f22fc8d7199f868a822e6d40c1369a
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
R clang/test/CIR/Transforms/flatten-eh-spec-nyi.cir
A clang/test/CIR/Transforms/flatten-eh-spec.cir
Log Message:
-----------
[CIR][EH] Implement flattening for dynamic exception specification (#223780)
This change implements the CFG flattening for try operations with filter
and unexpected exception handlers. The flattening dispatches unexpected
exceptions to an operation that will later be lowered to target-specific
IR to call std::unexpected, while exceptions that match the dynamic
exception specification are routed to normal unwind handling.
Target-specific EH ABI lowering will be added in a follow-up change.
Assisted-by: Cursor / various models
Commit: 6c334efd9df6cacb2c5b5ca7fc3533db95e5fff7
https://github.com/llvm/llvm-project/commit/6c334efd9df6cacb2c5b5ca7fc3533db95e5fff7
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
Log Message:
-----------
[RelLookupTableConverter][NFC] Hoist loop invariants in createRelLookupTable (#223557)
IntPtrTy, Int32Ty, and Base (ptrtoint of the relative lookup table) are
invariant across all elements of the lookup table. Hoist them out of the
element iteration loop to avoid redundant recomputations.
Commit: 576e56a6ac966699ce857bf34309bdf1c6d636d1
https://github.com/llvm/llvm-project/commit/576e56a6ac966699ce857bf34309bdf1c6d636d1
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
Log Message:
-----------
[RelLookupTableConverter][NFC] Remove unused Func parameter from createRelLookupTable (#223556)
The Function &Func parameter was only used to access the parent Module
via Func.getParent(). However, createRelLookupTable already takes
GlobalVariable &LookupTable, which has the same parent Module.
Remove the redundant parameter and the now-unused Func reference at the
callsite in convertToRelLookupTable.
Commit: 3018c32171d439dec1b76ef961cc60c0d8db2c6c
https://github.com/llvm/llvm-project/commit/3018c32171d439dec1b76ef961cc60c0d8db2c6c
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Lower/OpenMP/close-map-derived-members.f90
M flang/test/Semantics/OpenMP/map-modifiers.f90
A offload/test/offloading/fortran/usm_map_close_derived_type_members.f90
Log Message:
-----------
[Flang][OpenMP] Remove close map type member removal code from MapInfoFinalization (#219438)
This should no longer be required as we removed the application of close
automatically in USM mode in a prior PR. So they bug this was originally
put in place for is now addressed without the need for this PR. And
whilst it was fine to put in place for a bug the user had no control of
(automatic application of close to descriptor members), it's not our
place to intervene in scenarios where a user is making explicit errors
in their mapping, e.g.
map(to: dtype) map(close, to: dtype%x, dtype%y)
A user should be left to shoot themselves in the foot if that's there
goal (or perhaps there's some really wild or single memory system
architectures that would allow this), we'd ideally prevent this as a
compiler warning or error as opposed to fixing the problem
under-the-hood for them. Otherwise we help create unportable code for
the user, alongside forcing ourselves to maintain the underlying fix.
Commit: 299a09b38b4bd9d6b78e4c7a0c73b0cd671ce081
https://github.com/llvm/llvm-project/commit/299a09b38b4bd9d6b78e4c7a0c73b0cd671ce081
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Analysis/TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/vararg-intrinsic.ll
Log Message:
-----------
[TTI] Keep ParamTys and Arguments matching for variadic intrinsics. (#223693)
For variadic functions, the function's argument types do not include any
variadic arguments.
Always push types of arguments in to ParamTys, so sizes of ParamTys and
Arguments match.
PR: https://github.com/llvm/llvm-project/pull/223693
Commit: 728d1c058b3ee1407eb4e8bf26ddc1aff03e48f8
https://github.com/llvm/llvm-project/commit/728d1c058b3ee1407eb4e8bf26ddc1aff03e48f8
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A mlir/include/mlir/Conversion/OpenACCToLLVM/ACCDataRuntime.h
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVMUtils.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeDescriptors.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeFunctions.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeUtils.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
A mlir/lib/Conversion/OpenACCToLLVM/ACCDataDirectivePatterns.cpp
A mlir/lib/Conversion/OpenACCToLLVM/ACCDataRuntime.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCExecutableDirectivePatterns.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVM.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVMUtils.cpp
M mlir/lib/Conversion/OpenACCToLLVM/CMakeLists.txt
M mlir/lib/Dialect/OpenACC/Utils/OpenACCRuntimeUtils.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
A mlir/test/Conversion/OpenACCToLLVM/data-diagnostics.mlir
A mlir/test/Conversion/OpenACCToLLVM/data-runtime.mlir
A mlir/test/Conversion/OpenACCToLLVM/data.mlir
M mlir/test/Conversion/OpenACCToLLVM/init-shutdown-set.mlir
M mlir/test/Conversion/OpenACCToLLVM/runtime-declaration-mismatch.mlir
M mlir/test/Conversion/OpenACCToLLVM/wait.mlir
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCRuntimeUtilsTest.cpp
Log Message:
-----------
[mlir][acc] Add data directive codegen to ACCToLLVM (#223043)
Extends the acc to LLVM conversion with codegen for the OpenACC data
constructs - data, enter data, exit data and update. Each construct
becomes calls to the libacctarget data entry points that establish the
mappings its clauses ask for and tear them down again, on the queue its
async clause selects and after the wait its wait clause asks for. As
with the executable directives, these runtime APIs are not yet
finalized; the draft proposal can be found at
https://github.com/llvm/llvm-project/pull/197894.
A mapping is handed to the runtime as parallel argument arrays holding
one entry per mapped object, together with a descriptor for the objects
whose extent or layout cannot be stated as a size. The descriptor
layouts are declared next to the entry points they are passed to, as
they are equally part of the runtime interface.
Clause handling the data constructs share with the executable
directives, such as async, wait and if, now lives in the common
conversion utilities.
Co-authored-by: Matsu <kmatsumura at nvidia.com>
Commit: 620168eaa2718bde5e8e09470758f881f6e25a66
https://github.com/llvm/llvm-project/commit/620168eaa2718bde5e8e09470758f881f6e25a66
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-managed-func-result.cuf
Log Message:
-----------
[flang][cuda] Save function result descriptor before function exit (#223484)
The cuf.free was called before the AbstractResult pass spies the result
over the passed argument. Make sure the result is saved before the
descriptor is freed.
Commit: 7576379fdd2a6652dabda1cc8f21fdf11356f5a7
https://github.com/llvm/llvm-project/commit/7576379fdd2a6652dabda1cc8f21fdf11356f5a7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
Log Message:
-----------
[IR] Remove isRequired from PassInfoMixin (#223818)
This is no longer needed after 80a1e2125c7ec7db402925d153c0dbd6041d3004
and will not have any downstream difference given no one should be
inheriting directly from PassInfoMixin given it is in the detail
namespace.
Commit: 08390c01e301987e0ae7ba903fdc5c477a687728
https://github.com/llvm/llvm-project/commit/08390c01e301987e0ae7ba903fdc5c477a687728
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
R clang/test/CIR/CodeGen/call-conv-lowering-win64-skipped.c
Log Message:
-----------
[CIR][NFC] Remove bad test (#223840)
This removes a test that was checking to see whether calling convention
lowering was applied for a Windows target. This test was causing CI
failures. We don't have enough Windows support implemented in CIR for
this to reliably even get to the point of making this negative check.
The test will end up being unstable, so I am just removing it.
Commit: b0c4d416e5189e45eb09b79c681ecaa65080f73e
https://github.com/llvm/llvm-project/commit/b0c4d416e5189e45eb09b79c681ecaa65080f73e
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 728d1c0 (#223855)
This fixes 728d1c058b3ee1407eb4e8bf26ddc1aff03e48f8 (#223043).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=728d1c058b3ee1407eb4e8bf26ddc1aff03e48f8
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 218b71e3d4de375ea487ab45faecb8fea9cec1fe
https://github.com/llvm/llvm-project/commit/218b71e3d4de375ea487ab45faecb8fea9cec1fe
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
Log Message:
-----------
[VPlan] Remove dead cycles until none are left. (#223845)
Follow-up to https://github.com/llvm/llvm-project/pull/213632. Removing
a dead cycle may expose another dead cycle, which also needs removing.
Stop after cycle is remover to avoid crashing on invalid iterator, and
repeat until no cycles are left.
Commit: 05a60d8a36893ae4f64604576a8493cd2ba74eb5
https://github.com/llvm/llvm-project/commit/05a60d8a36893ae4f64604576a8493cd2ba74eb5
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecInfo.h
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
Log Message:
-----------
[AMDGPU][NFC] Centralize co-execution stall calculation (#220335)
Commit: c2fa65d33f124526bfe61d5125e203547076f4ce
https://github.com/llvm/llvm-project/commit/c2fa65d33f124526bfe61d5125e203547076f4ce
Author: junfengd-nv <junfengd at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Optimizer/Dialect/FIRAttr.h
M flang/include/flang/Support/LangOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Driver/check-integer-mod-zero-divisor.f90
M flang/test/Lower/Intrinsics/mod.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/dummy-procedure.f90
Log Message:
-----------
[flang] Diagnose integer MOD/MODULO when the divisor is zero (#222790)
Flang currently prints a garbage integer when the divisor of integer
MOD/MODULO is zero. For example:
```
program mod0_var
integer :: a, p, r
a = 5
p = 0
r = mod(a, p)
print *, r
end program
```
Integer MOD/MODULO lower to arith.remsi. A zero divisor is undefined
behavior in LLVM, so the remainder can become poison and the program
neither crashes nor reports an error.
This change checks the second argument P when lowering integer
MOD/MODULO. If P is not a compile-time nonzero constant, a P == 0 test
is inserted. On that path, _FortranAReportFatalUserError is called with
the same messages as IntMod in flang-rt (MOD with P==0 / MODULO with
P==0). The fast path remains arith.remsi.
Before:
```
func.func private @fir.mod.i32.ref_i32.ref_i32(%arg0, %arg1) {
%a = fir.load %arg0
%p = fir.load %arg1
%r = arith.remsi %a, %p : i32
return %r
}
```
After:
```
func.func private @fir.mod.i32.ref_i32.ref_i32(%arg0, %arg1) {
%a = fir.load %arg0
%p = fir.load %arg1
%zero = arith.constant 0 : i32
%bad = arith.cmpi eq, %p, %zero : i32
fir.if %bad {
// fatal: same text as IntMod in
// llvm-project/flang-rt/lib/runtime/numeric.cpp
}
%r = arith.remsi %a, %p : i32
return %r
}
```
Commit: 71cb3f47f9a296eacf4e0391b0e645d894ec7e2c
https://github.com/llvm/llvm-project/commit/71cb3f47f9a296eacf4e0391b0e645d894ec7e2c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions-stress-test-tower.cpp
M compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M compiler-rt/test/orc/TestCases/Darwin/Generic/llvm-jitlink-force-link-objc.m
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-category.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-cross-file-method-call.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-nonlazy-class.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S
M compiler-rt/test/orc/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/orc/lit.cfg.py
Log Message:
-----------
[orc-rt] Disable old ORC runtime testcases on arm64e (#223670)
These regression tests are unsupported on arm64e. Disable them.
rdar://186687669
Commit: 35c6acb89abf0ca576b63e544885cdb0cb010443
https://github.com/llvm/llvm-project/commit/35c6acb89abf0ca576b63e544885cdb0cb010443
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-maxnum-minnum.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
Log Message:
-----------
[CIR] Implement elementwise min/max/minimum/maximum/minnum/maxnum/etc (#222481)
These ended up being simple translations to llvm intrinsics, so other
than a single small 'magic decoder ring', this is a very trivial
implementation. The tests are taken from classic-codegen with some mild
modifications (as vector types don't work in arguments yet, and we are
testing more appropriately, as those were generated check lines).
This was found in an application we're trying to build.
Commit: e35d15fe53ff0450e79de13f649f196b98547916
https://github.com/llvm/llvm-project/commit/e35d15fe53ff0450e79de13f649f196b98547916
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
Log Message:
-----------
WebAssembly: Avoid using createDataLayout (#223836)
Find the datalayout from the IR context instead of copying one
from the TargetMachine
Commit: 6a8b946a43c5ded4a1055cdd36f23fef11812fa0
https://github.com/llvm/llvm-project/commit/6a8b946a43c5ded4a1055cdd36f23fef11812fa0
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/XtensaTargetParser.def
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/Xtensa.td
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrFormats.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaProcessors.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
A llvm/lib/Target/Xtensa/XtensaS3DSPInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
A llvm/test/MC/Xtensa/xtensa-esp32s3-invalid.s
A llvm/test/MC/Xtensa/xtensa-esp32s3-valid.s
Log Message:
-----------
[Xtensa] Implement esp32s3 target. (#220393)
- Add esp32s3 CPU support
- Implement esp32s3 DSP operations with test
- Improve asm register parsing
Commit: d027db3ca9e9fa7a494d56491e57365c859bffa9
https://github.com/llvm/llvm-project/commit/d027db3ca9e9fa7a494d56491e57365c859bffa9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/MC/RISCV/rvzimop-valid.s
M llvm/test/MC/RISCV/zicfiss-valid.s
Log Message:
-----------
[RISCV] Add more tests for Zimop. NFC (#223797)
Exposes bug in disassembly of mop.r.28 and mop.rr.7 which partially
overlap with Zicfiss.
Assisted-by: Claude
Commit: 73a4eae01c881603a880c3eb46ca34e11f534db8
https://github.com/llvm/llvm-project/commit/73a4eae01c881603a880c3eb46ca34e11f534db8
Author: cmtice <cmtice at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/source/API/SystemInitializerFull.cpp
Log Message:
-----------
[LLDB] Initialize language categories as part of general initialization. (#223474)
This prevents needless slowdown later when looking up variable values.
Commit: c7d4921b39bf5710968872213935198efbb310fd
https://github.com/llvm/llvm-project/commit/c7d4921b39bf5710968872213935198efbb310fd
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/test/fuzzer/minimize_crash_custom_mutator.test
Log Message:
-----------
[libFuzzer] Pass the current size to Mutate in MinimizeCrashLoop (#223470)
Fixes #149942. MinimizeCrashLoop passed U.size() to every MD.Mutate call
in the mutate_depth loop, so following mutations operated on a stale
size. Track the size across mutations, like MutateAndTestOne already
does.
Commit: 99f7a3ee4b76e0b77552f57a7cc9a4262ceddbd9
https://github.com/llvm/llvm-project/commit/99f7a3ee4b76e0b77552f57a7cc9a4262ceddbd9
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
A clang/test/CIR/CodeGenSYCL/kernel-caller-address-space.cpp
Log Message:
-----------
[CIR][SYCL] Emit generic address space for default pointers in device code (#223464)
Commit: dcd33090385467717fc3aaba6a72b36c759f2d18
https://github.com/llvm/llvm-project/commit/dcd33090385467717fc3aaba6a72b36c759f2d18
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/Lowering/unlowered-address-spaces.cir
Log Message:
-----------
[CIR] Reject unlowered language address spaces on CIR globals (#223660)
Diagnose a `LangAddressSpaceAttr` on `cir.global` before selecting the
LLVM global address space. This keeps standalone global attributes from
bypassing pointer conversion and silently falling back to address space
zero.
Assisted-by: Codex / GPT-5.6 Sol
Commit: 057f3ee1b4f32ccc348f1c64142dcf0e4c5e9b69
https://github.com/llvm/llvm-project/commit/057f3ee1b4f32ccc348f1c64142dcf0e4c5e9b69
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
Log Message:
-----------
[RISCV] Use bits<5> for rs1 in c.sspopchk and c.sspush. NFC (#223856)
These instructions are encoded so that bits 11-7 match the register they
operate on. We can put 1 or 5 in rs1 and then assign rs1 to bits 11-7.
This match c.addi16sp which only allows SP.
Commit: acd72302ca682b7f7b514fdb8a1417c12eb15a2c
https://github.com/llvm/llvm-project/commit/acd72302ca682b7f7b514fdb8a1417c12eb15a2c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC] Skip ReOptimize unit tests on arm64e. (#223605)
The ReOptimize layer doesn't support arm64e yet.
rdar://186687659
Commit: 98684c0871860447a51d9bc35e73f5bd53050ec0
https://github.com/llvm/llvm-project/commit/98684c0871860447a51d9bc35e73f5bd53050ec0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github] Bump AArch64 Premerge Runners to LLVM 23.1.1 (#223869)
This should work now given 23.1.1 disabled -Wunused-template.
Landed in llvm-zorg for x86 Linux/Windows in
https://github.com/llvm/llvm-zorg/commit/2236c4c3a51207f1cf002b9092a54dd676e8ed19.
Commit: 124e476295e62296a012f35b192644d1a2c3244c
https://github.com/llvm/llvm-project/commit/124e476295e62296a012f35b192644d1a2c3244c
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfbin
M llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfscript
M llvm/test/tools/llvm-profgen/X86/coroutine.test
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
Log Message:
-----------
[llvm-profgen] Strip coroutine suffixes from DWARF info (#217980)
https://github.com/llvm/llvm-project/pull/141889 preserves coroutine
suffixes into the DWARF linkage name, which may unexpectedly pass down
those suffixes into the profile in llvm-profgen. The logging also shows
extremely high percentages of samples being recovered from symbol table
because of the unstripped suffixes introduced from DWARF linkage name.
```
warning: 45.38%(754559/1662830) of samples are from ranges that belong to functions recovered from symbol table.
```
This fix strips the coroutine in: 1) the inital
`loadSymbolsFromDWARFUnit` for profiled functions and 2) the stack
`symbolize` that constructs the context trie
Also updates the coroutine unittest to move coroutine header from
experimental to standard.
Commit: 7d29a9258695cc958bd63dc70176a38cb87fe4d6
https://github.com/llvm/llvm-project/commit/7d29a9258695cc958bd63dc70176a38cb87fe4d6
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
Log Message:
-----------
[CIR] Accept a union whose empty member is [[no_unique_address]] (#223538)
The record-wide reject for a member CIRGen marks empty is there for the
struct arm of mapCIRType, which reads such a member as an unnamed
bit-field standing for the bytes it occupies. This does not apply to a
union, so the reject moves into the struct branch.
Which variants the classifier sees then falls to the union arm, and it
now reads that from each variant's own storage rather than from its
mark. A zero-sized variant and one that is empty for the ABI are
skipped. One whose mark says empty over storage that holds data is not.
Assisted-by: Cursor / claude-opus-5
Commit: 8a3e7cdcd2fba1ea2ba91f8e3c7755afc2f481e5
https://github.com/llvm/llvm-project/commit/8a3e7cdcd2fba1ea2ba91f8e3c7755afc2f481e5
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
Log Message:
-----------
[MLIR][XeVM] Fix mask lifetime in HandleVectorExtractPattern (#223879)
When a contiguous-slice shuffle is hoisted through a bitcast that
changes
the element count, the slice is rewritten against the bitcast source by
rescaling the mask into a local SmallVector and rebinding the `mask`
ArrayRef to it. That SmallVector was declared inside the
`if (maskScale != 1)` block, so it was destroyed before the two uses of
`mask` that follow the block - a stack-use-after-scope.
It is benign on uninstrumented builds, which is why precommit did not
catch it, but the sanitizer bots trap it on
Conversion/XeVMToLLVM/mxfp_scale_binary_hoist.mlir, the first test whose
chain drives the length-changing bitcast path:
ERROR: AddressSanitizer: stack-use-after-scope
READ of size 4
#23 mlir::detail::DenseArrayAttrImpl<int>::get(MLIRContext*,
ArrayRef<int>)
#24 mlir::LLVM::ShuffleVectorOp::build(..., ArrayRef<int>)
#26 HandleVectorExtractPattern::matchAndRewrite
XeVMToLLVM.cpp:1866:27
Address is located in stack of thread T0 at offset 304 in frame
#0 HandleVectorExtractPattern::matchAndRewrite XeVMToLLVM.cpp:1801
[288, 352) 'newMask' (line 1856) <== Memory access at offset 304 is
inside this variable
SUMMARY: AddressSanitizer: stack-use-after-scope
ASan reports the above, MSan reports a read of uninitialized memory and
HWASan a tag mismatch. In each case mlir-opt dies partway through
--split-input-file, so the surface symptom is the CHECK-LABEL of the
second module in that file not being found:
https://lab.llvm.org/buildbot/#/builders/52/builds/20099
https://lab.llvm.org/buildbot/#/builders/164/builds/25415
https://lab.llvm.org/buildbot/#/builders/169/builds/26571
https://lab.llvm.org/buildbot/#/builders/55/builds/33165
Hoist the declaration so it outlives the uses, and add a lit test for
the
length-changing bitcast path, which previously had no direct coverage -
the existing tests only bitcast between equal element counts.
Commit: 6c31f6446a55e0cc603c3eca5c5ebd47c2f5327a
https://github.com/llvm/llvm-project/commit/6c31f6446a55e0cc603c3eca5c5ebd47c2f5327a
Author: Maxim Potapchik <maximp1012 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/PerfHelper.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.h
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/unittests/tools/llvm-exegesis/CMakeLists.txt
A llvm/unittests/tools/llvm-exegesis/PerfHelperTest.cpp
Log Message:
-----------
[llvm-exegesis] Add RawPerfEvent raw PMU counter path in createCounter (#208364)
Introduces RawPerfEvent, a PerfEvent derived class that constructs
perf_event_attr directly from EventSelect and UMask, bypassing
pfm_get_os_event_encoding for cycle and uops events.
createCounter routes to RawPerfEvent when PfmCountersInfo contains a
non-negative EventSelect for the cycle or uops counter slot, falling
back to the existing libpfm symbolic path otherwise. Extended
createBenchmarkRunner gate checks to allow raw-only counters in latency
and uops modes.
This wiring is opt-in. Existing behavior is unchanged.
Adds unit tests covering RawPerfEvent construction, config field
encoding, and kernel exclusion flag correctness.
Validated on AMD Zen2: latency measurements via the raw path match the
libpfm symbolic path on identical hardware.
Towards #187930
Commit: 82004b076831331b0567bc9d8b53263a4fabd74b
https://github.com/llvm/llvm-project/commit/82004b076831331b0567bc9d8b53263a4fabd74b
Author: purnima shrivastava <purnimashrivastava05 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A mlir/test/Dialect/SCF/parallel-loop-unroll-invalid.mlir
M mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
Log Message:
-----------
[mlir][SCF] Avoid crash in parallel loop unrolling test pass (#222644)
This fixes crashes in `--test-parallel-loop-unrolling` when
`unroll-factors` is missing or contains zero.
Previously, the test pass forwarded an empty or invalid factor list to
the parallel-loop unrolling utility, violating its preconditions and
triggering an assertion.
The pass now emits an error and signals pass failure when:
* `unroll-factors` is not provided.
* Any unroll factor is zero.
Regression tests verify the diagnostics for both invalid inputs using
`-verify-diagnostics`.
Fixes #222535.
Co-authored-by: Purnima Shrivastava <purnimashrivastava05 at .com>
Commit: 3ce76320daf6cd93e6fbcecf037e9ac620d7cc34
https://github.com/llvm/llvm-project/commit/3ce76320daf6cd93e6fbcecf037e9ac620d7cc34
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 058ca1274446 (#223885)
Commit: 1daae8bcd3bbed8c673518477ba7cd047fe27d82
https://github.com/llvm/llvm-project/commit/1daae8bcd3bbed8c673518477ba7cd047fe27d82
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/tools/llvm-exegesis/BUILD.gn
Log Message:
-----------
[gn build] Port 6c31f6446a55 (#223886)
Commit: 6f6bbfb5e63e8cf4f051c7e5f773c41fe5ddbf19
https://github.com/llvm/llvm-project/commit/6f6bbfb5e63e8cf4f051c7e5f773c41fe5ddbf19
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-profiles.c
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV]Add RVA23.1 and RVB23.1 experimental profiles (#217199)
RVA23.1 state: https://riscv.atlassian.net/browse/RVS-4180
RVB23.1 state: https://riscv.atlassian.net/browse/RVS-4184
---------
Co-authored-by: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Commit: de9ad513460a1a5439b0b8d6d5c7a51a3634bc20
https://github.com/llvm/llvm-project/commit/de9ad513460a1a5439b0b8d6d5c7a51a3634bc20
Author: Michael Jones <michaelrj at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/mknodat.h
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/mkfifo.cpp
A libc/src/sys/stat/mkfifo.h
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/mkfifo_test.cpp
Log Message:
-----------
[libc] Implement mkfifo (#223566)
Implements the mkfifo function from POSIX, and tests.
Fixes: #220758
Assisted-by: Automated Tooling, Human Reviewed
Commit: 32a8fd50bd8d1dc52764730e9f8c491c8fd7a277
https://github.com/llvm/llvm-project/commit/32a8fd50bd8d1dc52764730e9f8c491c8fd7a277
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
[bazel] Fix 82004b076831331b0567bc9d8b53263a4fabd74b (#223892)
Add split-file dep for mlir test in
82004b076831331b0567bc9d8b53263a4fabd74b
Commit: 59ae8d382261e84d95e67e4f9f43fd5c71ae1397
https://github.com/llvm/llvm-project/commit/59ae8d382261e84d95e67e4f9f43fd5c71ae1397
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[CI] Use Ubuntu 26.04 for Premerge Image (#223883)
Mainly so that we pull in a newer CMake version given the minimum is
getting bumped soon, but also to get the upgrade over with.
Commit: eb5f248268fb9d2337a2b85139017fc94eb61ce6
https://github.com/llvm/llvm-project/commit/eb5f248268fb9d2337a2b85139017fc94eb61ce6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
A lldb/test/Shell/SymbolFile/DWARF/missing-oso.cpp
Log Message:
-----------
[lldb] Report an error when a debug map object file is missing (#223576)
When an OSO in the debug map does not exist on disk, LLDB records the
load error on the CompileUnitInfo but never surfaces it. The sibling
mod-time-mismatch branch does report, so a stale .o produces a
diagnostic while a deleted one fails silently.
This is easy to hit with LTO. The linker writes the merged object to a
temporary path and deletes it, so unless the build passes
-object_path_lto the debug map points at a file that is already gone.
rdar://162327417
Commit: c793abb8bb6233dea287748a96ea7c2b8f447fa1
https://github.com/llvm/llvm-project/commit/c793abb8bb6233dea287748a96ea7c2b8f447fa1
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/test/Conversion/MathToXeVM/math-to-ocl.mlir
M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
Log Message:
-----------
[mlir][MathToXeVM] Route math ops by fastmath: native for `afn`, OCL otherwise. (#223816)
The pass had two lowerings for the same math ops. `afn` fastmath ops
went to the OpenCL `native_` intrinsics. Everything else was only
lowered when the `convert-to-ocl` option was set, which defaulted to
off, so those ops were left untouched.
Make `convert-to-ocl` default to true. The fastmath flag now picks the
intrinsic on its own:
- `afn` set -> `__spirv_ocl_native_*`, fast but approximate.
- `afn` unset -> `__spirv_ocl_*`, precise.
`fastmath<fast>` is a group that expands to include `afn`, so it takes
the native path too. Other flags without `afn` do not.
The precedence already worked: the native patterns get a higher pattern
benefit than the precise ones, so an `afn` op still gets the native
intrinsic when both pattern sets are live. Spell the benefits out
instead of deriving one from the option value.
Set `convert-to-ocl=false` to get the old behavior of leaving non-`afn`
ops alone. math-to-xevm.mlir pins the native half, so it now passes that
flag. math-to-ocl.mlir gains a routing case covering all five flag
states, since the benefit tie only has to be broken when both pattern
sets are live.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: bb651180e3b17b374c5fc0ceb7f3b8c09bc61156
https://github.com/llvm/llvm-project/commit/bb651180e3b17b374c5fc0ceb7f3b8c09bc61156
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/include/lldb/Interpreter/Interfaces/ScriptedFrameInterface.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
A lldb/include/lldb/ValueObject/ValueObjectSynthesizedValue.h
M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/ValueObject/CMakeLists.txt
A lldb/source/ValueObject/ValueObjectSynthesizedValue.cpp
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
Log Message:
-----------
[lldb] Report a scripted frame's variables with the frame's value type (#221708)
A scripted frame's variable exists as two objects: a Variable holding
the scope the frame assigned it, and a ValueObject holding what the
frame built. SBValue::GetValueType() reports the ValueObject's, and
GetValueObjectForFrameVariable handed that ValueObject back unchanged,
so the scope never reached a client. A ValueObject built in Python is a
ValueObjectConstResult, which reports how it was produced rather than
which variable it stands for, leaving anything that groups a frame's
variables by scope unable to place it. `frame variable` was unaffected
because it reads the Variables directly.
This patch presents the ValueObject under that scope instead. A class
for this already existed as ValueObjectRecognizerSynthesizedValue, which
frame recognizers use to name an argument: both take a ValueObject that
cannot report the ValueType it is being presented as and supply that
ValueType for it, so generalize that one into
ValueObjectSynthesizedValue and use it for both. ValueObjectVariable is
the other class that pairs a ValueObject with a ValueType, but it cannot
serve here because it recovers its data from a DWARF location
expression, and a frame that builds its own ValueObjects supplies none.
The presented ValueObject is not a parent, so it is no longer held as
one. It is the same ValueObject seen differently, which makes the
presenting object a root: constructing it as one keeps GetParent()
reporting no parent, as it does for any other ValueObject obtained from
a frame, and keeps the walks over m_parent (for a symbol context scope,
a root, a dynamic ValueObject or format information) from finding a
container that does not exist.
Recognized arguments change behaviour slightly as a result: the shared
UpdateValue propagates an error from the presented ValueObject, fills in
the data and sets validity, none of which the recognizer's copy did.
Reaching a variable by name goes through Variable::NameMatches, which
dereferences m_owner_scope for every entry whose name does not match. A
null owner scope is a legal state, CalculateSymbolContext handles it
explicitly and a frame that makes up its own variables has none, so drop
that lookup. The SymbolContext it filled in has had no reader since
22b044877d23, which dropped the language argument to
Mangled::NameMatches along with the only use of it.
Also document that the synthetic flag in GetValueTypeForVariable's
return is what exempts a variable from the scope rules a declared
variable is subject to. A ValueObject with no storage behind it is
filtered out of an in-scope-only listing without it.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: ef326fec1daefa425f2ffd025cbda56e8300354d
https://github.com/llvm/llvm-project/commit/ef326fec1daefa425f2ffd025cbda56e8300354d
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/test/CodeGenHLSL/builtins/asdouble.hlsl
M clang/test/CodeGenHLSL/builtins/ddx.hlsl
M clang/test/CodeGenHLSL/builtins/ddy.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/mad.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
Log Message:
-----------
[HLSL][LongVec] Add more intrinsic support (#222043)
resolves #220699
resolves #220655
resolves #220639
resolves #220638
resolves #220614
Commit: 182ca95eed3feb7c7ba83ed2b35a0c5f29517b9b
https://github.com/llvm/llvm-project/commit/182ca95eed3feb7c7ba83ed2b35a0c5f29517b9b
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
A llvm/test/Verifier/funclet-unreachable-block.ll
Log Message:
-----------
[Verifier] Don't look up the funclet color of an unreachable block (#222500)
Fixes #192015.
Commit: 8723e4a1bc0b6078e35c17532952f79fb8480f53
https://github.com/llvm/llvm-project/commit/8723e4a1bc0b6078e35c17532952f79fb8480f53
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
A llvm/test/CodeGen/AMDGPU/coexec-block-carried-latency.mir
M llvm/test/CodeGen/AMDGPU/coexec-mfma-interleave-gfx950.ll
M llvm/test/CodeGen/AMDGPU/coexec-sched-ds-fifo.mir
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
Log Message:
-----------
[AMDGPU] Add block carried latency to CoExecSched (#192324)
This adds some rudimentary logic to check for load dependencies across
blocks. Since the scheduling algorithm is local scheduling per region,
we do not have about latencies carried from other blocks. Rather than
constructing a global DAG to accurately measure these latencies, this PR
uses a heuristic to estimate the incoming latency.
We limit our incoming dependencies to load instructions, as these are
expected to be the ones that cause problems. This uses the full latency
of the instruction as the incoming latency to cover. We check for any
use that occurred later in the def block - if we find such a use then we
do not have incoming latency as we have already waited for the load.
Using the incoming latency assumes that the load is the last instruction
in the block, and that the branch takes 0 cycles. Aside from not fully
understanding the dependencies of other blocks, a challenge in defining
a more accurate incoming latency is that it is possible that the block
with the load may be rescheduled.
---------
Co-authored-by: Austin Kerbow <Austin.Kerbow at amd.com>
Commit: 12992dca3ccbd2c4c3fc67528467ac73a1da292d
https://github.com/llvm/llvm-project/commit/12992dca3ccbd2c4c3fc67528467ac73a1da292d
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/Decl.cpp
M clang/test/CodeGenCXX/cxx1z-inline-variables.cpp
M clang/test/SemaTemplate/class-template-spec.cpp
Log Message:
-----------
[clang] Fix handling of constexpr static data member template. (#220469)
[temp.expl.spec] says "An explicit specialization of a static data
member of a template or an explicit specialization of a static data
member template is a definition if the declaration includes an
initializer." The code did not match this rule for constexpr variables.
The check in question was only supposed to match the cases from
[depr.static.constexpr].
Fixes #219796
Commit: 46f08d7878f7a5a943355c4c02fb7a67bf532709
https://github.com/llvm/llvm-project/commit/46f08d7878f7a5a943355c4c02fb7a67bf532709
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
Log Message:
-----------
[RISCV] Remove Zicfiss DecoderNamespace. NFC (#223891)
This used to be needed to prioritize c.sspopchk and c.sspush over
c.mop.1 and c.mop.5, but those are treated as InstAliases now.
Commit: 4150e90b0f597e64303d2d3a8ee2c2d83ee1ddab
https://github.com/llvm/llvm-project/commit/4150e90b0f597e64303d2d3a8ee2c2d83ee1ddab
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Log Message:
-----------
[RISCV] Call DecodeGPRPairRegisterClass from DecodeGPRPairCRegisterClass. NFC (#223882)
GPRPairC is a subset of GPRPair. We just need to do the range check and
let DecodeGPRPairRegisterClass do the rest of the work.
Commit: dec17c44def4439db47a888341191d49f33e6891
https://github.com/llvm/llvm-project/commit/dec17c44def4439db47a888341191d49f33e6891
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
Log Message:
-----------
[flang][cuda] Fix matching distance for use_device and none (#223849)
https://docs.nvidia.com/hpc-sdk/compilers/cuda-fortran-prog-guide/#unified-data
the table set the matching distance for actual `use_device` and dummy
argument `none` to 1 but the implementation set it to 3.
@wangzpgi Was there a specific reason to set 3 instead of 1?
Commit: 4ee9dafceb16232b5c06857551228ee5471dc5cd
https://github.com/llvm/llvm-project/commit/4ee9dafceb16232b5c06857551228ee5471dc5cd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Log Message:
-----------
[RISCV] Use DecodeFilteredRegisterClass for DecodeGPRX1X5RegisterClass. (#223878)
Commit: c20428cbb5f551d54520d492b1d27011e4076f5b
https://github.com/llvm/llvm-project/commit/c20428cbb5f551d54520d492b1d27011e4076f5b
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/mbar_arrive_drop.mlir
Log Message:
-----------
[MLIR][NVVM] Fix the lowering of legacy mbar.arrive_drop (#222916)
`nvvm.mbarrier.arrive_drop` fails to compile for sm_80:
LLVM ERROR: Cannot select: intrinsic
%llvm.nvvm.mbarrier.arrive.drop.scope.cta.space.cta
The op always lowers to the `scope.*.space.*` intrinsics, which need
sm_90. The legacy `llvm.nvvm.mbarrier.arrive.drop{,.shared}` intrinsics
work from sm_80 but are never used.
This uses the legacy intrinsic for the basic case only, space=cta,
scope=cta, no relaxed, no explicit count, the same fix as #172476 for
`mbarrier.arrive`. The count forms need sm_90, so they are unchanged.
Assisted-by: Claude
Commit: 262cf39197f4748693ea7bae7b788208bcb21621
https://github.com/llvm/llvm-project/commit/262cf39197f4748693ea7bae7b788208bcb21621
Author: Matt Turner <mattst88 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/test/MC/AsmParser/macro-max-depth.s
Log Message:
-----------
[MC] Increase asm-macro-max-nesting-depth default to 100 (#218455)
GNU as accepts assembly we reject at the current default of 20, e.g.
glibc's
`sysdeps/unix/sysv/linux/alpha/rt_sigaction.S`, which nests 31 deep.
Raise the
default to 100, matching GNU as.
Assisted-by: Claude Code
Commit: 8b66604bb8e699820c7f1fd06a43a3c6ed2cac76
https://github.com/llvm/llvm-project/commit/8b66604bb8e699820c7f1fd06a43a3c6ed2cac76
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/zicfiss-valid.s
Log Message:
-----------
[RISCV] Remap mop.rr.7 and mop.r.28 to sspush/sspopchk/ssrdp in the assembler. (#223894)
This makes llvm-mc output match llvm-objdump. And is more consistent
with the InstAliases we use c.mop.
Commit: 6c1d20c5e29776e365e6a83e4a15b421b8552755
https://github.com/llvm/llvm-project/commit/6c1d20c5e29776e365e6a83e4a15b421b8552755
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/blend-i1.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
Log Message:
-----------
[VPlan] Process combineRecipes in a worklist (#213899)
This brings combineRecipes further in line with InstCombine, and asides
from unlocking more simplifications it also helps avoid test churn
whenever passes are moved around combineRecipes.
For now just push the new recipe onto the worklist, not its users.
This uses a post order traversal so we maintain the same simplification
order as before.
Commit: c7ddefdcc81c32c2a05b636817fcb5d5e4cc0c40
https://github.com/llvm/llvm-project/commit/c7ddefdcc81c32c2a05b636817fcb5d5e4cc0c40
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/MC/RISCV/attribute-arch.s
Log Message:
-----------
[MC][RISCV] Make Zve32x a dependency of Zvabd (#223901)
The Zvabd specification defines Zve32x as a dependency. This commit
fixes the dependency problem in MC's implementation.
See:
https://github.com/riscv/integer-vector-absolute-difference/blob/0092c8451bb24b957d8358f261c0535ece88defb/src/unpriv/zvabd.adoc#L26
Commit: 83066e0d57798b10c759fea6ab77346dabc0e1dc
https://github.com/llvm/llvm-project/commit/83066e0d57798b10c759fea6ab77346dabc0e1dc
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-invalid.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-oob.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-relaxed.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-validate-data.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-invalid.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-mc32.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-relaxed.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-validate-data.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-override.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-validate-data.ll
A llvm/test/Verifier/NVPTX/cp-async-bulk-g2s-cta.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cluster_im2col.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cluster_tile.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cta_im2col.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cta_tile.mlir
Log Message:
-----------
[LLVM][NVPTX] Add async bulk copy global to shared extensions (#222323)
This change adds following things to bulk copy intrinsics.
1. Relaxed memory ordering semantics with a scope argument.
2. Data-validity reporting patterns (introduced in Rubin).
3. 32-bit multicast mask for global to shared::cluster variants
(introduced in Rubin).
4. Ignore out of bound checks for global to shared::cta variants.
Note: MLIR lowering is updated to emit the new intrinsic signatures.
Support for the new features in MLIR will be done in a separate change.
Commit: bf89dd2637f367316b1fb67e515ff28782222822
https://github.com/llvm/llvm-project/commit/bf89dd2637f367316b1fb67e515ff28782222822
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Rename createScalarFreeze -> createFreeze. NFC (#223648)
It works for vector operands too. We can also use it in
preparePlanForMainVectorLoop
Commit: df997d219210bf0ef546f85f43c38cfa92607e80
https://github.com/llvm/llvm-project/commit/df997d219210bf0ef546f85f43c38cfa92607e80
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Add DecodeSingleRegister template class to replace DecodeSPRegisterClass and similar. (#223889)
This can avoid adding more explicitly written decode functions for
https://github.com/llvm/llvm-project/pull/177073
Commit: 78bbf2229d2a5b8dc84b1b2b83cab9c2239a47ba
https://github.com/llvm/llvm-project/commit/78bbf2229d2a5b8dc84b1b2b83cab9c2239a47ba
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/include/lldb/Host/HostInfo.h
A lldb/include/lldb/Host/emscripten/HostInfoEmscripten.h
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/emscripten/HostInfoEmscripten.cpp
Log Message:
-----------
[lldb] Add HostInfoEmscripten (#223169)
Emscripten currently selects `HostInfoLinux`. That was useful as an initial bootstrap, but it also introduces Linux-specific assumptions such as `/proc/self/exe`, invoking `lsb_releas`e through `popen`, and
Linux-specific architecture handling.
This patch introduces a small `HostInfoEmscripten` implementation derived from `HostInfoPosix` and selects it when LLDB is built with Emscripten.
The implementation intentionally remains minimal. A browser-hosted LLDB process does not currently have a meaningful native executable path, so `GetProgramFileSpec()` returns an empty FileSpec.
A dedicated PlatformEmscripten and browser-specific process behavior will be handled separately so this change remains atomic !
Commit: b27d9d29615f6a8e784ed705f8e241f6a7c4adbf
https://github.com/llvm/llvm-project/commit/b27d9d29615f6a8e784ed705f8e241f6a7c4adbf
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
Log Message:
-----------
[llvm-jitlink] Fix a memory leak in llvm-jitlink-executor. (#223904)
In openListener, use a scope_exit to call freeaddrinfo on the struct
allocated by getaddrinfo.
No testcase: We have no in-tree tests for llvm-jitlink-executor. This
bug was found by inspection.
Commit: dedfd0eb94dcd8da26a0bcce928037ae32e5616d
https://github.com/llvm/llvm-project/commit/dedfd0eb94dcd8da26a0bcce928037ae32e5616d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctlz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/cttz.ll
Log Message:
-----------
[SPIR-V] Fix bit count intrinsics on narrow integer types (#223358)
Widening i24 to i32 relabels the type without clearing the high bits, so
ctlz, cttz and ctpop counted them too
Commit: 862885765ac2d854ec5ec1ed38f422f99414688e
https://github.com/llvm/llvm-project/commit/862885765ac2d854ec5ec1ed38f422f99414688e
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/Plugins/Platform/CMakeLists.txt
A lldb/source/Plugins/Platform/Emscripten/CMakeLists.txt
A lldb/source/Plugins/Platform/Emscripten/PlatformEmscripten.cpp
A lldb/source/Plugins/Platform/Emscripten/PlatformEmscripten.h
M lldb/unittests/Platform/CMakeLists.txt
A lldb/unittests/Platform/PlatformEmscriptenTest.cpp
Log Message:
-----------
[lldb] Add PlatformEmscripten (#223200)
This follows #223169, where I introduced `HostInfoEmscripten`.
While getting libLLDB and its SB API working in the browser, I initially used `PlatformLinux` as the host platform under Emscripten. That was enough for the first experiment, but Emscripten is not really Linux and we shouldn't keep inheriting Linux-specific behavior going forward.
This patch introduces a separate `PlatformEmscripten`, based on `PlatformPOSIX`, and makes it the host platform when LLDB itself is running under Emscripten.
For now, it:
- reports the Emscripten host architecture;
- supports `wasm32` and `wasm64` Emscripten targets;
- moves Emscripten host initialization out of `PlatformLinux`;
- does not claim that live process debugging works yet.
`PlatformWasm` remains separate. My understanding is that `PlatformEmscripten` describes the environment in which LLDB itself is running, while `PlatformWasm` describes the WebAssembly program being
debugged.
I am keeping this patch small on purpose. Browser-specific launching, attachment and live execution can be added separately once we connect LLDB to an actual in-browser execution backend.
I added a small test confirming that an Emscripten triple selects this platform, and also compiled the new plugin source successfully with Emscripten 6.0.8.
Commit: c8fdb5f8b93c3e1da5e2ff3ba8b18627d6147b51
https://github.com/llvm/llvm-project/commit/c8fdb5f8b93c3e1da5e2ff3ba8b18627d6147b51
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCA.h
M orc-rt/lib/bedrock/sps/SimpleRemoteCA.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
Log Message:
-----------
[orc-rt] SimpleRemoteCA updates for out-of-band error results (#223916)
Executor-side counterpart to #223378: adds ResultKind, the discriminator
a result message's tag field now carries, so that out-of-band errors can
travel as results despite having no byte representation of their own.
encodeResult and decodeResult own the encoding. handleMessage rejects a
tag that does not name a known kind, ending the session as an
unrecognized opcode does; a payload that will not decode is not fatal,
and comes back as an out-of-band error describing itself.
Nothing sends a non-zero kind yet -- SocketSimpleRemoteCA will, when it
frames a result. SimpleRemoteCATest covers the round-trips and both
malformed cases.
Commit: ab8a9f9127cc0fbccd24a1e44a4e2e73c616d65e
https://github.com/llvm/llvm-project/commit/ab8a9f9127cc0fbccd24a1e44a4e2e73c616d65e
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR][NFC] Restore LoadOp builders, LowerToLLVM, and CIRGenBuiltin fixes lost in #222481 (#223896)
Commit 35c6acb89abf (#222481) accidentally reverted parts of
cc5e9d63b4dc (#222822) in `CIROps.td`, `LowerToLLVM.cpp`, and
`CIRGenBuiltin.cpp`, which broke Linux CI with deprecation and template
instantiation errors.
This change restores those lost changes:
1. Re-adds `LoadOp` custom builders in `CIROps.td` so calls to
`cir::LoadOp::create(builder, loc, addr)` and
`cir::LoadOp::create(builder, loc, resultTy, addr)` do not resolve to
deprecated MLIR collective builders.
2. Restores `lowerConstrainableFPOp` in `LowerToLLVM.cpp` to pass
default properties and type range to `replaceOpWithNewOp`.
3. Restores `emitUnaryFPBuiltin` in `CIRGenBuiltin.cpp` to use
non-deprecated `Operation::create(cgf.getBuilder(), arg.getLoc(), arg)`.
Diagnosed by Antigravity, formatted with Gemini
Commit: 5835ef200a1fdd0aa92578ee824772eea4143279
https://github.com/llvm/llvm-project/commit/5835ef200a1fdd0aa92578ee824772eea4143279
Author: Emery Conrad <conrade.ctc at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/CodeGenCXX/top-level-stmt-local-names.cpp
A clang/test/Interpreter/lambda-top-level-stmt.cpp
Log Message:
-----------
[clang] Fix Itanium mangler crash on lambdas in top-level statements (#217041)
`clang-repl` asserts when a lambda in a top-level statement needs a
mangled name, for example `ns::call([]{});`. Since #84150 a
`TopLevelStmtDecl` is a `DeclContext`, and `manglePrefix` casts it to
`NamedDecl`.
Treat `TopLevelStmtDecl` as a local container and give it a synthesized
internal encoding (`L9__stmt__0v`), like `Ub_` for block literals.
Entities in a top-level statement then mangle as `<local-name>`s with
discriminators, so same-named locals in two statements do not collide.
Each `TopLevelStmtDecl` gets an ordinal at creation, in parse order; it
is serialized.
Tests: `Interpreter/lambda-top-level-stmt.cpp` (crashes without the fix)
and `CodeGenCXX/top-level-stmt-local-names.cpp` (two lambdas, two
same-named local classes). The interpreter test is `UNSUPPORTED:
system-windows`: MSVC compat enables `-fdelayed-template-parsing`, and
clang-repl asserts on any late-parsed template in a later fragment,
lambda or not.
Co-authored-by: Emery Conrad <emery.conrad at chicagotrading.com>
Commit: 54e36c83bc42b2a15d75eee3fc7a61eaf44a4e3a
https://github.com/llvm/llvm-project/commit/54e36c83bc42b2a15d75eee3fc7a61eaf44a4e3a
Author: renndong <liumingliang.dev at bytedance.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vzip.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/utils/TableGen/RISCVVEmitter.cpp
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvzip.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zvzip-zve32f.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/vpairo.ll
M llvm/test/CodeGen/RISCV/rvv/vunzipe.ll
M llvm/test/CodeGen/RISCV/rvv/vunzipo.ll
M llvm/test/CodeGen/RISCV/rvv/vzip.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/rvv/zvzip-invalid.s
M llvm/test/MC/RISCV/rvv/zvzip.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Update Zvzip support to v0.3 (#210603)
This updates the experimental Zvzip implementation to match the
v0.3 draft specification from RISC-V ISA manual PR:
https://github.com/riscv/riscv-isa-manual/pull/3233
In Zvzip 0.3, `vtype` and `vl` describe the destination vector for all
five instructions:
- `vzip.vv` produces a destination with EMUL=LMUL from two source
operands with EMUL=LMUL/2. Its mask is indexed by destination
elements and therefore has the mask type associated with the result
vector. The overlap rule of `vzip.vv` matches widening vector
arithmetic instructions;
- `vunzipe.v` and `vunzipo.v` produce a destination with EMUL=LMUL
from a source operand with EMUL=2*LMUL.
- `vunzipe.v` and `vunzipo.v` no longer have masked forms and are
always encoded with `vm=1`. Their overlap rule matches narrowing
arithmetic instructions.
- The instruction encoding of `zip.vv` is illegal when
`2*SEW > LMUL*min(ELEN, VLEN)`, and the unzips when LMUL = 8.
- The destination of `vpaire.vv` and `vpairo.vv` may not overlap either
source register group.
This PR is developed with @wangpc-pp and is based on his draft PR
https://github.com/llvm/llvm-project/pull/207971.
This PR is assisted by AI.
---------
Co-authored-by: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Commit: d3e5f97569f0d058b4a58f5fab37e50f115e339d
https://github.com/llvm/llvm-project/commit/d3e5f97569f0d058b4a58f5fab37e50f115e339d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
Log Message:
-----------
[RISCV] Replace decodeImmThreeOperand/decodeImmFourOperand with a template function. NFC (#223924)
Make the immediate a template argument that we can be provided in the
DecoderMethod name.
Commit: 1c1edc2d34e181ac8cdd5aa81e218464e1e2a642
https://github.com/llvm/llvm-project/commit/1c1edc2d34e181ac8cdd5aa81e218464e1e2a642
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/Host/CMakeLists.txt
M lldb/source/Host/common/Host.cpp
A lldb/source/Host/emscripten/Host.cpp
Log Message:
-----------
[lldb] Support building lldbHost under Emscripten (#223206)
This builds on the new `HostInfoEmscripten` and `PlatformEmscripten`
support.
Emscripten provides many POSIX APIs, but it does not support `fork` or
native host process management. This patch allows `lldbHost` to build
under Emscripten without treating it as Linux.
It:
- avoids building the `ProcessLauncherPosixFork` implementation;
- adds a small Emscripten Host implementation;
- reports process enumeration, process lookup, launching and shell
expansion as unsupported.
The remaining generic POSIX Host functionality continues to be used.
This is enough for the current libLLDB and SB API experiment, while live
process debugging will be handled separately once we have an in-browser
execution backend.
Commit: 3b8ee89006f5a228fce75528f8dd80b4229abcc1
https://github.com/llvm/llvm-project/commit/3b8ee89006f5a228fce75528f8dd80b4229abcc1
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Analysis/MustExecute.cpp
A llvm/test/Analysis/MustExecute/no-preheader.ll
Log Message:
-----------
[MustExecute] Use the loop predecessor instead of the preheader (#222096)
CanProveNotTakenFirstIteration() gets the IV start value via
LHS->getIncomingValueForBlock(CurLoop->getLoopPreheader()). If the loop
is not in simplified form, getLoopPreheader() returns null and the
lookup asserts. This is reachable from print<must-execute> on IR that is
not in LoopSimplify form (see the reproducer in #166488).
Fixed: use getLoopPredecessor() instead: it returns the unique
out-of-loop predecessor of the header even when it is not a dedicated
preheader, consequently the start value is still known. If there is no
such predecessor, bail out.
Fixes #166488.
Commit: 3b42a54e4be903ab6e0ef996d0800ed4b75650bd
https://github.com/llvm/llvm-project/commit/3b42a54e4be903ab6e0ef996d0800ed4b75650bd
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/misched-postra-only1.mir
Log Message:
-----------
[MISched] Remove verify-machineinstrs from test(NFC) (#223679)
Commit: 8d6f4149c163132024cf716a8eb1ef3ec4fad433
https://github.com/llvm/llvm-project/commit/8d6f4149c163132024cf716a8eb1ef3ec4fad433
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
Log Message:
-----------
AArch64: Avoid depending on createDataLayout in a pass (#223776)
This should read directly from the context IR's module.
Commit: 76bb77e45a478f91bef1ea7369119974c6449c94
https://github.com/llvm/llvm-project/commit/76bb77e45a478f91bef1ea7369119974c6449c94
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/pr83017.ll
M llvm/test/CodeGen/RISCV/rvv/pr90559.ll
Log Message:
-----------
[RISCV] Merge zeroing stores into wider LMUL vector stores (#223908)
memset lowers to LMUL1 vector stores (v2i64 for e64) that we rely on
store merging to widen. `storeOfVectorConstantIsCheap` counted the
number of MemVT-sized stores, so a v2i64 MemVT needed 4 stores before
merging kicked in, leaving two VL=2 m1 stores for a 32B zero region.
Use the total element count for zeroing stores so two v2i64 stores
merge into one VL=4 e64 m2 store.
Partially fixes #223906
Assisted-by: TRAE CLI (Opus 4.8)
Commit: dd58c11c641d3e592331e57837fdd674d36dee82
https://github.com/llvm/llvm-project/commit/dd58c11c641d3e592331e57837fdd674d36dee82
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[IR] Simplify DIAssignID by storing its links in the node. NFC (#223324)
AssignmentTrackingPass generates DIAssignID metadata. A DIAssignID links
the instructions it is attached to, kept in
LLVMContextImpl::AssignmentIDToInstrs, with the dbg_assign records that
refer to it, found through a permanent use list (#78300 made DIAssignID
the only always-replaceable MDNode for this). Keep both lists in the
node as TinyPtrVector members instead (98% of instruction lists and
88-96% of record lists hold exactly one pointer), and drop the map and
`isAlwaysReplaceable()`.
Aided by Opus 5
Commit: 6e180ea23fe0c2ddcc9e7972ec52b7fc1383d973
https://github.com/llvm/llvm-project/commit/6e180ea23fe0c2ddcc9e7972ec52b7fc1383d973
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/test/CodeGen/AMDGPU/opt-vgpr-live-range-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
Log Message:
-----------
AMDGPU: Use LiveIntervals in SIOptimizeVGPRLiveRange when available (#222385)
LiveVariables has been long deprecated. Use LiveIntervals if available.
With the current pass structure, this will use LiveVariables.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 10c37146ce3b3f850fb9afa9f00d02eb860ff237
https://github.com/llvm/llvm-project/commit/10c37146ce3b3f850fb9afa9f00d02eb860ff237
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
Log Message:
-----------
[RISCV] Do not verify size for some Xqci instructions (#223913)
After instruction size verification was enabled by default in
https://github.com/llvm/llvm-project/pull/221687/ we were running into
crashes for certain 48-bit Xqci instructions. This was happening because
we have compress patterns for these 48-bit instructions to compress them
into 32-bit instructions which `getInstSizeInBytes` was not taking into
account.
The crash looks like:
```
Size mismatch for: QC_E_SW $x0, $x14, 0 :: (store (s32) into %stack.0)
Expected maximum size: 2
Actual size: 4
```
Do not verify size for such instructions until we can return the correct
size for them.
Commit: f7cc8c8407551aabcd013555bafaafd62f0494fa
https://github.com/llvm/llvm-project/commit/f7cc8c8407551aabcd013555bafaafd62f0494fa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SlotIndexes.h
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
A llvm/test/CodeGen/AMDGPU/si-lower-control-flow-remove-redundant-block-liveintervals.mir
Log Message:
-----------
AMDGPU: Maintain LiveIntervals when removing blocks in SILowerControlFlow (#223642)
removeMBBifRedundant removed a redundant block's instructions from the
LiveIntervals maps but not the block itself, leaving a stale idx2MBBMap
entry that crashed getMBBFromIndex in the verifier.
Add SlotIndexes::removeMBBFromMaps to drop the erased block's slot
range, and recompute the intervals that spanned it.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 5a0c86a17b467e867bf1c0cd8fd6b5bacb82f1d1
https://github.com/llvm/llvm-project/commit/5a0c86a17b467e867bf1c0cd8fd6b5bacb82f1d1
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/and-vgpr-s32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
Log Message:
-----------
[AMDGPU] Fix GlobalISel VGPR-to-VCC lowering types (#220987)
Register-bank legalization synthesized an untyped G_AND s32, but
instruction-selection patterns only matched typed G_AND i32, causing:
```
LLVM ERROR: cannot select: %:vgpr_32(s32) = G_AND ...
```
The source-level and i32 was valid; the incorrect type was introduced by
AMDGPU `VgprToVccCopy` lowering. SelectionDAG was unaffected because it
retained typed DAG nodes.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 4beeff3c2bf125de9dda8b374ffc9ec052d02810
https://github.com/llvm/llvm-project/commit/4beeff3c2bf125de9dda8b374ffc9ec052d02810
Author: Mintsuki <36459316+Mintsuki at users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/LoongArch/target-abi-module-flag.c
Log Message:
-----------
[clang][LoongArch] Emit "target-abi" module flag (#223647)
The LoongArch backend reads the ABI from the "target-abi" module flag,
but clang only emits that flag for ARM, PowerPC and RISC-V. Since LTO code
generation doesn't see the -target-abi option passed to clang, it falls
back to the default ABI of the target, which is lp64d for
loongarch64-unknown-elf, regardless of the ABI the code was compiled for.
When an FPU is enabled, this silently miscompiles code built for another
ABI. For example, with -mabi=lp64s, functions get the lp64d calling
convention after LTO, passing and returning floating-point values in FP registers
instead of general-purpose ones, and the output is marked as double-float. Nothing
reports this if every object goes through LTO. For instance, a shared library
built this way links without error, and so does lp64s code built without LTO that
uses it. Without an FPU, the generated code keeps the soft-float calling
convention, but the output is still marked as double-float.
The mismatch only shows up as an error when LTO output is linked
together with relocatable objects built without LTO, which LLD rejects with "cannot
link object files with different ABI".
This patch adds LoongArch to the targets for which clang emits the flag,
so LTO uses the ABI the code was compiled for. It follows the per-target
approach taken for ARM (#217601) and PowerPC (#221669), and leaves the existing
TODO about emitting the flag for every target with a non-empty ABI name as is.
With the flag present, LTO-linking bitcode built for different LoongArch
ABIs now fails with "linking module flags 'target-abi': IDs have conflicting
values" instead of silently picking a single ABI. A -target-abi given to the LTO
backend that disagrees with the flag is now also an error. Both match the
existing RISC-V behavior.
Assisted-by: Claude Code (Claude Opus 5)
Signed-off-by: Mintsuki <mintsuki at protonmail.com>
Commit: 39732305282242041dad8c8edad6a6b5804f1d3a
https://github.com/llvm/llvm-project/commit/39732305282242041dad8c8edad6a6b5804f1d3a
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
A llvm/test/CodeGen/AArch64/interleaved-load-combine-crossblock.ll
Log Message:
-----------
[InterleavedLoadCombine] Do not combine loads across basic blocks (#223915)
This pass turns a group of interleaved loads into a single wide load
inserted at the first load. That is only valid when all of the loads are
in the same basic block. Otherwise the wide load can read memory that
the original program only accessed on a conditional path.
The offset index keyed candidates on base pointer, type and offset only,
so it could pair loads from different blocks. Restrict each block's
matching to candidates whose loads are in that block. This also keeps
the candidate list and index per block, so they stay small.
Fixes a miscompile introduced by #213053.
Commit: e94698b83a74e6ee40438898b17bc49cbd47fcf5
https://github.com/llvm/llvm-project/commit/e94698b83a74e6ee40438898b17bc49cbd47fcf5
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[AMDGPU][GISel][NPM] Complete Global ISel pipeline (#222552)
Commit: 4126b9cf36c826ddf584fec395e0ee796b9db294
https://github.com/llvm/llvm-project/commit/4126b9cf36c826ddf584fec395e0ee796b9db294
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/cxx14.cpp
M clang/test/AST/ByteCode/cxx26.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
Log Message:
-----------
[clang][bytecode] Use a special opcode for trivial defaulted copy/move operator calls (#222332)
The default code that clang synthesizes for them contains calls to
`__builtin_memcpy`, e.g. in
```
CXXMethodDecl 0x7d471ee7cc90 <array.cpp:1983:10> col:10 implicit used constexpr operator= 'array &(const array &) noexcept' inline default trivial external-linkage
|-ParmVarDecl 0x7d471ee7cdd0 <col:10> col:10 used 'const array &'
`-CompoundStmt 0x7d471ee7e340 <col:10>
|-CallExpr 0x7d471ee7e268 <col:10> 'void *'
| |-ImplicitCastExpr 0x7d471ee7e248 <col:10> 'void *(*)(void *, const void *, __size_t) noexcept' <BuiltinFnToFnPtr>
| | `-DeclRefExpr 0x7d471ee7e160 <col:10> '<builtin fn type>' Function 0x7d471ee7de88 '__builtin_memcpy' 'void *(void *, const void *, __size_t) noexcept'
| |-ImplicitCastExpr 0x7d471ee7e2b0 <col:10> 'void *' <BitCast>
| | `-UnaryOperator 0x7d471ee7dd18 <col:10> 'int (*)[4]' prefix '&' cannot overflow
| | `-MemberExpr 0x7d471ee7dca0 <col:10> 'int[4]' lvalue ->_M_elems 0x7d471ee52780
| | `-CXXThisExpr 0x7d471ee7dc88 <col:10> 'array *' this
| |-ImplicitCastExpr 0x7d471ee7e2d0 <col:10> 'const void *' <BitCast>
| | `-UnaryOperator 0x7d471ee7db38 <col:10> 'const int (*)[4]' prefix '&' cannot overflow
| | `-MemberExpr 0x7d471ee7dac0 <col:10> 'const int[4]' lvalue ._M_elems 0x7d471ee52780
| | `-DeclRefExpr 0x7d471ee7da98 <col:10> 'const array' lvalue ParmVar 0x7d471ee7cdd0 depth 0 index 0 'const array &'
| `-IntegerLiteral 0x7d471ee7e1a8 <col:10> '__size_t':'unsigned long' 16
`-ReturnStmt 0x7d471ee7e328 <col:10>
`-UnaryOperator 0x7d471ee7e308 <col:10> 'array' lvalue prefix '*' cannot overflow
`-CXXThisExpr 0x7d471ee7e2f0 <col:10> 'array *' this
```
However, this violates a contract of `__builtin_memcpy` if source and
destination are the same pointer, as in `*__first = *__first`, which is
happening in one of the attached test cases. The check for this is
correct though, so add a new opcode for this case. The functionality is
similar to `__builtin_memcpy` but it doesn't check for overlapping
regions (among others).
Fixes https://github.com/llvm/llvm-project/issues/221403
Commit: 52ae463fb3ebb5de414fcd8a660ed035c40e9272
https://github.com/llvm/llvm-project/commit/52ae463fb3ebb5de414fcd8a660ed035c40e9272
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/Preprocessor/riscv-cf-protection-return.c
Log Message:
-----------
[Clang][RISCV] Loose the requirement of cf-protection=return to Zimop (#223671)
Commit: 72e9411e1bd481669ca9d6f7a55fe900ea5f4b36
https://github.com/llvm/llvm-project/commit/72e9411e1bd481669ca9d6f7a55fe900ea5f4b36
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/Interpreter/Wasm.cpp
Log Message:
-----------
[clang-repl] Respect LLD's canRunAgain result (#223926)
Clang-Repl’s Wasm executor calls `lld::lldMain()` for every incremental
input, but currently ignores `Result.canRunAgain`.
Ordinary linker errors remain recoverable:
```text
retCode=1 canRunAgain=1
```
A fatal LLD error can instead return:
```text
retCode=1 canRunAgain=0
```
In that case, LLD’s state may no longer be safe. This patch follows
LLD’s standalone driver and calls `lld::exitLld()` rather than allowing
Clang-Repl to perform another incremental link.
I verified this with the real Emscripten `lldWasm` library: a normal
invalid wasm file input remained reusable (ordinary error), while a
valid but non-relocatable Wasm module triggered `canRunAgain=false`
(fatal error) and terminated the runtime with status 1.
Commit: 59e842209b868ca110a285c92b8917a3e223995d
https://github.com/llvm/llvm-project/commit/59e842209b868ca110a285c92b8917a3e223995d
Author: Fady Farag <com.webkit.iidmsa at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
A clang/test/Analysis/Checkers/WebKit/call-args-checked-unique-ptr.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-unique-ptr.cpp
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Look through unique_ptr::get() when finding a pointer's origin (#223568)
Previously, the checker only looked through `operator->` and `operator*`
on `std::unique_ptr`, `UniqueRef` and `LazyUniqueRef` when walking a
call argument back to its origin. It didn't include `get()` and `ptr()`
on those types, which caused an unnecessary warning. This includes
`get()` and `ptr()` on those types such that they are recognized and are
consistent with ref-counted and checked pointers.
Commit: f2615d5db071454f1575d57db1e630afb77f6cb1
https://github.com/llvm/llvm-project/commit/f2615d5db071454f1575d57db1e630afb77f6cb1
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/cttz-elts.ll
M llvm/test/tools/llubi/intr_experimental_vector.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[IR][InstSimplify] Clarify poison elements in cttz.elts results in poison (#223935)
The generic expansion for cttz.elts in LegalizeVectorOps is
(reduce.umax (select input, step_vector, 0))
Because reductions produce poison if any element is poison, this will
also produce poison.
ConstantFolding currently has short circuiting behaviour, e.g.
`cttz.elts <0, 1, poison, poison> -> 1`, but we should probably make
this consistent with reductions and just return poison. This updates
LangRef and ConstantFolding to be more explicit about this.
Commit: 353ab070f8b122df06c5aa40a5833e9639d4c9ca
https://github.com/llvm/llvm-project/commit/353ab070f8b122df06c5aa40a5833e9639d4c9ca
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Transforms/AggressiveInstCombine/trunc_illegal_type.ll
Log Message:
-----------
[test][AggressiveInstCombine] Test type legality handling in `TruncInstCombine` (NFC) (#222930)
I noticed that this block of code that checks type legality in
`TruncInstCombine::getMinBitWidth` is not tested:
```
else { // MinBitWidth == TruncBitWidth
// In this case the expression can be evaluated with the trunc instruction
// destination type, and trunc instruction can be omitted. However, we
// should not perform the evaluation if the original type is a legal scalar
// type and the target type is illegal.
bool FromLegal = MinBitWidth == 1 || DL.isLegalInteger(OrigBitWidth);
bool ToLegal = MinBitWidth == 1 || DL.isLegalInteger(MinBitWidth);
if (!DstTy->isVectorTy() && FromLegal && !ToLegal)
return OrigBitWidth;
}
```
This commit adds tests.
Commit: c53000a7282bedb125ffaab8cb072df85596d095
https://github.com/llvm/llvm-project/commit/c53000a7282bedb125ffaab8cb072df85596d095
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/fchmodat.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/fchmodat.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/fchmodat_test.cpp
Log Message:
-----------
[libc] Reject unsupported flags in fchmodat with ENOTSUP (#223165)
### Summary
The Linux kernel's `SYS_fchmodat` system call only takes 3 arguments
(`dirfd`, `pathname`, `mode`), but our syscall wrapper was passing a 4th
`flags` argument that the kernel simply dropped.
This PR cleans up the wrapper to pass the 3 arguments expected by the
kernel, and adds a check to `fchmodat` to return `-1` with `ENOTSUP`
whenever non-zero flags (like `AT_SYMLINK_NOFOLLOW`) are passed.
Fixes #223072
### Changes
- Cleaned up `linux_syscalls::fchmodat` to pass only 3 arguments to
`SYS_fchmodat`.
- Added a check in `fchmodat` entrypoint to set `libc_errno = ENOTSUP`
and return `-1` if `flags != 0`.
- Added `libc.hdr.errno_macros` to the CMake dependencies for `fchmodat`
and its unit test.
- Added tests in `fchmodat_test.cpp` to verify that passing non-zero
flags fails with `ENOTSUP`.
### Testing
- Ran `clang-format` on touched files.
- Built and ran hermetic tests: `libc.test.src.sys.stat.fchmodat_test`
(all 3 tests pass: `ChangeAndOpen`, `NonExistentFile`,
`UnsupportedFlags`).
Commit: d1e261e574e9612fe3f4056730809617323f1758
https://github.com/llvm/llvm-project/commit/d1e261e574e9612fe3f4056730809617323f1758
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/test/src/stdfix/FxDiviTest.h
Log Message:
-----------
[libc] Fix fxdivi tests on 32-bit targets (#223675)
Guard saturation operands against overflow and correct boundary
expectations for the range and precision of 32-bit long.
Fixes issue introduced in a969579a9129891bccb63fcc69e76d74b299f322.
Assisted-by: Codex. Entirely done by the AI and reviewed by me.
Commit: 43cb5e4766869fc13a104498f63906a64e37cf79
https://github.com/llvm/llvm-project/commit/43cb5e4766869fc13a104498f63906a64e37cf79
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[IVDescriptors] Rename MonotonicDescriptor ConditionalInductionDescriptor (NFC) (#223707)
Rename `MonotonicDescriptor` to `ConditionalInductionDescriptor` to
acknowledge that the phi may wrap, so is not strictly monotonic.
Assisted-by: Codex
Commit: 327153dcd71bbec2fa827b84fa513c7c6cf88ce0
https://github.com/llvm/llvm-project/commit/327153dcd71bbec2fa827b84fa513c7c6cf88ce0
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/cmake/modules/FindCursesAndPanel.cmake
M lldb/cmake/modules/FindLuaAndSwig.cmake
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/cmake/modules/LLDBConfig.cmake
Log Message:
-----------
[lldb][cmake] Accept config-mode packages in add_optional_dependency (#222976)
`add_optional_dependency` copies the caller-supplied `<found>` variable
after `find_package`, and callers name the Find module's result
variable, which is usually all-caps (`LIBXML2_FOUND`, `CURSES_FOUND`). A
package located in config mode only sets `<PackageName>_FOUND`
(`LibXml2_FOUND`), so the copy comes back empty and the dependency is
reported as missing and silently disabled even though `find_package`
succeeded.
Set the result variable to TRUE when either `${found}` or
`${package}_FOUND` is set, FALSE otherwise.
Behavior for module-mode finds is unchanged; only the config-mode case,
which previously always evaluated to false, is affected.
Commit: 05bc41ee93d1ca6b690edf7e5d6913b2c31e246d
https://github.com/llvm/llvm-project/commit/05bc41ee93d1ca6b690edf7e5d6913b2c31e246d
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
Log Message:
-----------
[CIR] Fix address space of dest cleanup slot (#222628)
Make sure that flatten cfg creates new allocas for dest cleanup slot in
correct address space. This is important for address-space aware targets
like amdgpu.
Commit: dabd9fe738cc20e8f4364c7b07a1f7f45d2a537d
https://github.com/llvm/llvm-project/commit/dabd9fe738cc20e8f4364c7b07a1f7f45d2a537d
Author: jiel-nv <37816794+jiel-nv at users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/main_location.f90
Log Message:
-----------
[flang] Attribute the generated entry point to the main program's start (#223742)
The `main` entry point that lowering generates for a Fortran main
program is attributed to the end-stmt of the last function-like unit
that was lowered. e.g.
```fortran
subroutine foo(x)
real :: x
x = x + 1.0
end subroutine foo
program demo
real :: a
a = 1.0
call foo(a)
print *, a
end program demo
```
`PROGRAM` is on line 6 and `end program` on line 11.
The loc info shows up in FIR for the compiler generated C `main`
wrapper:
```
before this PR: } loc("repro.f90":11:1)
after this PR: } loc("repro.f90":6:1)
```
Commit: 2c930a5f80d8c52e396b2bb53ba526729ca41796
https://github.com/llvm/llvm-project/commit/2c930a5f80d8c52e396b2bb53ba526729ca41796
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/aarch64/tcb.h
M libc/src/__support/threads/linux/riscv/tcb.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/linux/x86_64/tcb.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/threads/thread_attributes.h
M libc/src/stdlib/exit.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/aarch64/tls.cpp
M libc/startup/linux/do_start.cpp
M libc/startup/linux/riscv/tls.cpp
M libc/startup/linux/x86_64/tls.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_tls_align_test.cpp
Log Message:
-----------
[libc] Store ThreadAttributes in the TCB (#220921)
This patch replaces the `thread_local self` object with the
ThreadAttributes pointer stored in the TCB. current_thread() now
fetches this pointer directly via get_current_thread_attrib().
Since every thread now needs a TCB, init_tls can no longer bail out
when app.tls.size == 0 (this was actually dead code before this patch
since every binary contained at least one thread-local variable
(`self)`). I've removed that check and updated do_start to always set up
a TCB (defaulting to alignment 1 if there is no TLS segment).
The motivation for this change is to make the pthread_self function
async-signal-safe (as required by POSIX), including in the cases where
the function is invoked from a signal hander on the newly created thread
-- before pthread_create returns. This requires making sure that the
thread attribute pointer is initialized from the very first instruction
of the new thread -- something which is hard to do when the attributes
are stored in a TLS variable. This also aligns us with how other C
libraries operate.
While in there, I also remove atexit_callback_mgr from ThreadAttributes.
It simplifies thread startup, and the field was always initialized to
point to the same object anyway. If needed, this can always be changed
later.
Since aligning the various parts of the TLS block is the trickiest part
of this patch, I also add a test that verifies that we've done that
correctly.
Assisted-by: Gemini.
Commit: 251e728cfae889b0e3f8e74d8a5dca2260da494b
https://github.com/llvm/llvm-project/commit/251e728cfae889b0e3f8e74d8a5dca2260da494b
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Suppress annotation inference for owner-capturing constructors (#223635)
Commit: 25564da401e7a93404bd116fe81ded7c94544a05
https://github.com/llvm/llvm-project/commit/25564da401e7a93404bd116fe81ded7c94544a05
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getinheritsched.cpp
A libc/src/pthread/pthread_attr_getinheritsched.h
M libc/src/pthread/pthread_attr_init.cpp
M libc/src/pthread/pthread_attr_init.h
A libc/src/pthread/pthread_attr_setinheritsched.cpp
A libc/src/pthread/pthread_attr_setinheritsched.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etinheritsched (#223322)
This patch implements pthread_attr_setinheritsched and
pthread_attr_getinheritsched.
Like the previous scheduler attribute patches, this commit only operates
on the pthread_attr_t object and does not attempt to install scheduling
parameters when creating a new thread.
Unlike schedpolicy and schedparam, where the validity of arguments is
checked by the kernel, inheritsched is purely a userspace pthread
concept. Therefore, we validate the inheritsched argument and reject
unsupported values with EINVAL.
While in there:
- update the file headers in pthread_attr_init to the modern llvm format
- use proxy headers instead of direct pthread.h inclusion
Assisted-by: Gemini
Commit: 49fd850587bf7d6f235687f348a1e0b201738dba
https://github.com/llvm/llvm-project/commit/49fd850587bf7d6f235687f348a1e0b201738dba
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Add make_isa_range to filter and downcast a range by type (NFC) (#223414)
Add a range adaptor that keeps only the elements of a range that isa<T>
holds for, casting each of them to T.
This replaces the common idiom of filtering by type in the loop body
```
for (Instruction &I : *BB) {
auto *PN = dyn_cast<PHINode>(&I);
if (!PN)
continue;
... use PN ...
}
```
with
```
for (PHINode &PN : make_isa_range<PHINode>(*BB))
... use PN ...
```
This pattern is quite widespread in the LLVM codebase, and follow-up
commits will migrate use-sites step-by-step.
This is the helper from
https://github.com/llvm/llvm-project/pull/222770, moved to STL.
PR: https://github.com/llvm/llvm-project/pull/223414
Commit: 91d09ca8162338ab5cccd7f199275db9805b95bd
https://github.com/llvm/llvm-project/commit/91d09ca8162338ab5cccd7f199275db9805b95bd
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/test/API/python_api/value/TestValueAPI.py
Log Message:
-----------
[lldb] Look up register set children by their own name too (#223857)
On Windows x86_64, LLDB's register tables only list the full width
registers, so the ABI adds the sub-registers itself and puts them in a
separate "supplementary registers" set. That set contains `sp`, but
looking up `sp` in it failed: the lookup first turns `sp` into `rsp`,
and `rsp` is in the general purpose set, not this one. Linux doesn't hit
this because its tables already define the sub-registers next to `rsp`.
Now the lookup falls back to matching the name as written against the
registers of that set, so a register you can reach with
`GetChildAtIndex` can also be found by name. Lookups that already worked
are unchanged.
Fixes https://ci-external.swift.org/job/lldb-windows/job/main/3879/
Commit: c02715b01a9d42d5391c8eb230d72c590681cc8e
https://github.com/llvm/llvm-project/commit/c02715b01a9d42d5391c8eb230d72c590681cc8e
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunc-ssat-usat.mir
Log Message:
-----------
[GlobalISel] Add saturating G_TRUNC support for computeKnownBits (#223929)
Port the saturating-truncate KnownBits handling to the GlobalISel. Look
through G_TRUNC_SSAT_S, G_TRUNC_SSAT_U and G_TRUNC_USAT_U by recursing
into the source operand and applying KnownBits::truncSSat, truncSSatU
and truncUSat respectively.
Commit: f1078606d2e7d6da56b584c5acb61077ed824c6f
https://github.com/llvm/llvm-project/commit/f1078606d2e7d6da56b584c5acb61077ed824c6f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-volatile.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
Log Message:
-----------
[AMDGPU] Skip volatile atomics in the atomic optimizer (#223927)
Folding a wavefront into one atomic changes the number of volatile
operations, which is not allowed
Commit: 1e0f6b00bd0a899737a88c875d67d7484f1bc892
https://github.com/llvm/llvm-project/commit/1e0f6b00bd0a899737a88c875d67d7484f1bc892
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
AArch64: Avoid createDataLayout just to check endianness (#223946)
The endianness can be checked from the triple, avoiding a datalayout
copy.
Commit: 98bfb41e304b868e308dae8834c8fdbe1e220677
https://github.com/llvm/llvm-project/commit/98bfb41e304b868e308dae8834c8fdbe1e220677
Author: Oscar Priego <oscar.priegov at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Remove unreachable DUPLANE lowering. NFC (#222418)
`LowerBUILD_VECTOR` handles non-constant `BUILD_VECTOR` splats by
emitting
`AArch64ISD::DUP`.
The following `DUPLANE` path checks `Value.getValueType()` against `VT`.
`Value` is a scalar `BUILD_VECTOR` operand while `VT` is the vector
result
type, so this condition cannot be false and the `DUPLANE` path is
unreachable.
Remove the dead path. `DUP`s of `EXTRACT_VECTOR_ELT` are already
converted
to `DUPLANE` by `performDUPCombine()` after legalization.
No codegen changes intended.
Fixes #222138
Commit: eb9091da5c418a5c383a5da7fb39a1e22ba7c60d
https://github.com/llvm/llvm-project/commit/eb9091da5c418a5c383a5da7fb39a1e22ba7c60d
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
A llvm/test/CodeGen/AArch64/interleaved-load-combine-may-not-return.ll
Log Message:
-----------
[InterleavedLoadCombine] Do not widen loads past a may-not-return instr (#223954)
The combined load reads the whole span at once and is inserted at the
first load, so it effectively hoists the later loads up to that point.
If an instruction between them may not transfer control to its successor
-- a call that might not return, or might throw -- then a load the
original program reached only conditionally would run unconditionally.
All combined loads are in one block, so bail unless the span from the
first to the last load is guaranteed to transfer execution to its
successor.
This gap predates the offset-index change; the old findPattern() did not
check for it either.
Assisted by AI tools.
Commit: 59a1a3289d90b76bedb1013c8ac47b0a9ad5c95f
https://github.com/llvm/llvm-project/commit/59a1a3289d90b76bedb1013c8ac47b0a9ad5c95f
Author: Philip742 <philip.wilkinson at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP in SLICE (#220557)
Adds support to profile compliance for MXFP variants of SLICE
Change-Id: I184fbd49ef667d8d4e0ee09a2e65a72095d61daa
---------
Signed-off-by: Philip Wilkinson <philip.wilkinson at arm.com>
Commit: fd63167bbd7f0193f21129abe49604b98f777cdc
https://github.com/llvm/llvm-project/commit/fd63167bbd7f0193f21129abe49604b98f777cdc
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
Log Message:
-----------
[clangd] Include the operator name in documentHighlight (#220518)
## Summary
- Placing the cursor on an overloaded operator's declaration (e.g.
`operator new`, `operator[]`) and requesting
`textDocument/documentHighlight` only highlighted the `operator` keyword
itself, not the name or symbol that follows it (`new`, `[]`, etc.), even
though that name is what's actually significant to the user.
- `ReferenceFinder` already splits some references into several spelled
tokens (used for Objective-C's split selector syntax); this reuses that
mechanism for the operator name too, extracting the tokens spelled in
the operator name's source range. This only applies to the declaration's
own occurrence.
## Test plan
- [x] `ninja check-clangd` passes
- [x] New cases added to `HighlightsTest.All` in
`clang-tools-extra/clangd/unittests/XRefsTests.cpp` covering `operator
new`, `operator delete` (clicking on either the keyword or the name),
and a multi-token operator (`operator()`)
Commit: 3723ac3407bc09d0b822df08f17228eed8fa76a3
https://github.com/llvm/llvm-project/commit/3723ac3407bc09d0b822df08f17228eed8fa76a3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxxabi/src/private_typeinfo.cpp
Log Message:
-----------
[libc++abi][NFC] Return const void* from __dynamic_cast (#223737)
`__dynamic_cast` is only called magically by the compiler, so it really
doesn't matter what the exact protoype is as long as it's ABI
compatible. Making the return type a `const void*` simplifies the
implementation a bit though.
Commit: 0aa2a2f2451052f1f43a26f3c545b705e2702d87
https://github.com/llvm/llvm-project/commit/0aa2a2f2451052f1f43a26f3c545b705e2702d87
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 2c930a5 (#223955)
This fixes 2c930a5f80d8c52e396b2bb53ba526729ca41796 (#220921).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=2c930a5f80d8c52e396b2bb53ba526729ca41796
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: e5fa11f89ebe04877fdab1d5b1274a771e760ae5
https://github.com/llvm/llvm-project/commit/e5fa11f89ebe04877fdab1d5b1274a771e760ae5
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/Host/common/Socket.cpp
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.h
Log Message:
-----------
[lldb][Windows] Support AF_UNIX domain sockets (#205618)
Enable the Windows `AF_UNIX` domain-socket support added in #205864 by
flipping the `#if LLDB_ENABLE_POSIX` guards to `#if LLDB_ENABLE_POSIX ||
defined(_WIN32)`.
Also updates `SocketTest.cpp` to exercise `ProtocolUnixDomain` on
Windows (while still excluding ProtocolUnixAbstract, which has no
Windows equivalent).
This is part of a longer set of patches to fix tests on
`LLDB_USE_LLDB_SERVER=1`.
Commit: 150eb1f1c8a70b121d0c22de47a6496b2a7551bb
https://github.com/llvm/llvm-project/commit/150eb1f1c8a70b121d0c22de47a6496b2a7551bb
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[NFC][AArch64ISelLowering] Use get{Extract/Insert}VectorElt helpers. (#222979)
Commit: 7e960a831b1aca0f74ba9937bb08cf27ea420e81
https://github.com/llvm/llvm-project/commit/7e960a831b1aca0f74ba9937bb08cf27ea420e81
Author: EuphoricThinking <agata.momot at intel.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/MemoryManager.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[offload] add handling of memory alignment to MemoryManagerTy (#218418)
Previously, memory alignment was handled internally by the device. The
`MemoryManagerTy` either redirected large allocation requests directly
to the device or stored pointers to the smaller memory chunks in pools.
The information about the alignment expected by the user was just passed
by the `MemoryManagerTy` to the device allocators. However, most vendors
do not provide an API for specifying the alignment of the memory
allocation (except for the Level Zero plugin), allowing only for
verification of whether the returned pointer is correctly aligned. In
this patch, `MemoryManagerTy` allocates excess memory and performs
pointer arithmetic on the pointer returned by the device allocator, so
that the final pointer is aligned accordingly regardless of the plugin.
NodeTy has two new fields:
- `BasePtr`: the pointer to the originally allocated memory
- `Ptr`: the pointer returned to the caller, possibly after pointer
arithmetic operations on `BasePtr` for ensuring the requested alignment.
Pointer arithmetic is performed when a specific alignment is requested
or when the chosen pointer from the memory pool is being reused after an
aligned allocation, since `Ptr`s are not reset to `BasePtr`s during
deallocation.
The Alignment parameter is preserved in the plugin-side implementations
of `allocate()` for validation purposes, since the device allocations
might have granularity which is not compatible with the requested
alignment.
The presented changes are part of the series of patches introducing
memory alignment. The next patch will remove the doubling of the memory
alignment management in the `MemoryManagerTy` and the Level Zero plugin,
leaving the implementation in `MemoryManagerTy`.
Commit: c7d4c008350c6b66112de0278aa74cd72fedc180
https://github.com/llvm/llvm-project/commit/c7d4c008350c6b66112de0278aa74cd72fedc180
Author: RachinskiyMaksim <rachinskii.mv at phystech.edu>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/Relocation.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/runtime/X86/rela-plt-order.c
Log Message:
-----------
[BOLT] Prevent rela.plt reordering (#219447)
[BOLT] Preserve the original order of DT_JMPREL relocations.
BOLT reorders .rela.plt entries without also updating the corresponding
PLT stub relocation indices. This patch preserves the original order of
DT_JMPREL relocations by recording their original indices and using
those indices when emitting them. We store the original `DT_JMPREL`
index directly on each relocation.
AI tools (codex) were used to assist with implementation.
Related to https://github.com/llvm/llvm-project/issues/207222
Commit: 0a8eb54dd990f8d9649f01aee1d2c0cbff3b68ac
https://github.com/llvm/llvm-project/commit/0a8eb54dd990f8d9649f01aee1d2c0cbff3b68ac
Author: Tulio Magno Quites Machado Filho <tuliom at redhat.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
[OpenMP][OMPT] Fixes current_address printing on RV64GC (#223681)
A previous commit increased the number of arguments passed to printf in
print_possible_return_addresses(addr) but forgot to change the format in
order to include the new argument.
Fixes: 4e19543b1a85 (FIX some OMPT tests that fail on RISC-V (#156914),
2026-07-24)
Commit: 762aa86b8ebff9b840e2ec76e015b28051ea7158
https://github.com/llvm/llvm-project/commit/762aa86b8ebff9b840e2ec76e015b28051ea7158
Author: David Green <david.green at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-build-vector.ll
M llvm/test/CodeGen/AArch64/cttz-of-bool-vector-bitcast.ll
M llvm/test/CodeGen/AArch64/partial-reduction-add-predicated.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64] Canonicalize NVCAST to bitcast under LE (#223388)
A NVCAST is equivalent to a BITCAST under LE. This canonicalises the
NVCAST to BITCAST under LE like we do for ARM, so there is only one
representation, then fixes up the places that were assuming nvcast.
Commit: 09f4207015216928e92bbcdef1f954db1daab7e9
https://github.com/llvm/llvm-project/commit/09f4207015216928e92bbcdef1f954db1daab7e9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/bool-mask.ll
Log Message:
-----------
[SLP][NFC]Add extra bool mask tests, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223984
Commit: de1d4bafa475f2206fffe878789dd29d22197b2f
https://github.com/llvm/llvm-project/commit/de1d4bafa475f2206fffe878789dd29d22197b2f
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/dllexport.cpp
M clang/test/SemaCXX/dllimport.cpp
Log Message:
-----------
[Clang] Warn about ignored dllimport on explicit instantiations (#191392)
Diagnose about a non-effective dllimport attribute on an explicit
instantiation declaration for a specialization which
was already (implicitly) instantiated somewhere, rather than ignoring it
silently.
related to #21132
Commit: 89d02eebfb7d3c01f9a500a1682be6e5e58a4c17
https://github.com/llvm/llvm-project/commit/89d02eebfb7d3c01f9a500a1682be6e5e58a4c17
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/test/CodeGen/SPIRV/transcoding/func_param_attr.ll
Log Message:
-----------
[SPIR-V] Emit NoReadWrite decoration for readnone function parameters (#223699)
Commit: 8167678860e17c5c20aaaf0f863ef70861b3b9f1
https://github.com/llvm/llvm-project/commit/8167678860e17c5c20aaaf0f863ef70861b3b9f1
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
Log Message:
-----------
[lldb][windows] support long path in loaded modules cache (#206117)
`NativeProcessWindows::CacheLoadedModules` truncates paths longer than
260 characters.
This patch changes how modules are resolved:
- Query the untruncated image path with `GetModuleFileNameExW`.
- Canonicalize it through a handle to the image file with
`GetFinalPathNameByHandleW(FILE_NAME_NORMALIZED | VOLUME_NAME_DOS)`.
- Strip the extended length prefixes so the cached path matches the
ordinary Win32 form lldb produces elsewhere.
Commit: b1076da7495e46e7a28eb82f26931028bf47aaed
https://github.com/llvm/llvm-project/commit/b1076da7495e46e7a28eb82f26931028bf47aaed
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Replace pipes with unix domain sockets. (#223941)
Replace pipes with unix domain sockets for basic out-of-process
execution.
The new ORC runtime doesn't support pipes -- this changes will enable
llvm-jitlink to connect to the new ORC runtime's executor (once it
lands).
Commit: e3974cd35965a239fc75644f249cbd24377959db
https://github.com/llvm/llvm-project/commit/e3974cd35965a239fc75644f249cbd24377959db
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/X86/dagcombine-concat-undef-vs-poison.ll
Log Message:
-----------
Avoid making vector more poisonous in visitCONCAT_VECTORS (#223492)
Fix a miscompile bug found in visitCONCAT_VECTORS.
In commit 544c300f43961 (from January 25 2026) the DAGCombiner started
to use poison instead of undef when rewriting a CONCAT_VECTORS as a
BUILD_VECTOR. Problem was that it was using poison also for elements
that were undef before the fold, making the result more poisonous. That
caused miscompiles as reported in PR #222857.
The fix is to make sure we only use a poison value as operand in the new
BUILD_VECTOR if the input to CONCAT_VECTORS also is poison.
Same kind of fixup is done for combineConcatVectorOfConcatVectors and
combineConcatVectorOfShuffleAndItsOperands (both helpers used by
visitCONCAT_VECTORS). Those funtions were also modified in commit
544c300f43961, all without any motivating test cases showing that it is
correct to use poison. I do not have any test cases proving that those
two helpers also could cause miscompiles, but neither that the rewrites
was correct after commit 544c300f43.
Fixes https://github.com/llvm/llvm-project/issues/222857
Commit: 938754a27588b581f4c62532ff84b2f253f31a24
https://github.com/llvm/llvm-project/commit/938754a27588b581f4c62532ff84b2f253f31a24
Author: Jan Trusiłło <jan.trusillo at intel.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M offload/plugins-nextgen/common/include/MemoryManager.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/offloading/struct_mapping_with_pointers.cpp
Log Message:
-----------
[offload] Fix minor memory manager alignment bugs (#223979)
The alignment handling introduced in #218418 left three minor issues:
- Adding alignment padding could overflow size_t, potentially turning an
excessive allocation (most feasibly caused by erroneous caller-side
underflow) into a small one.
- struct_mapping_with_pointers.cpp still expected the old allocation log
format.
- When the memory manager was disabled, GenericDeviceTy::dataAlloc() did
not verify that the device allocator returned a suitably aligned
pointer.
This patch:
- Checks for overflow before calculating the padded allocation size.
- Updates the log checks to accept the requested and padded sizes.
(Worth considering: should these checks even exist?)
- Validates alignment on the direct device-allocation path. A misaligned
allocation is freed and reported as unsupported. (A cleanup patch will
be made later that will decouple alignment-related behavior from pooling
behavior.)
See #218418 comments for additional discussion on the issues.
Assisted-by: Codex
Commit: b8e720436725e1386985b7bdeabaca677ff498bb
https://github.com/llvm/llvm-project/commit/b8e720436725e1386985b7bdeabaca677ff498bb
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
Log Message:
-----------
[CIR][NFC] Cleanup unhandled NYI in atomic libcall codegen (#223732)
This patch cleans up the unhandled NYIs in the CIRGen path for atomic
operation library calls. This patch should be NFC.
Commit: 77aa4b9ac117acfcd7384166cccd4a333829bf81
https://github.com/llvm/llvm-project/commit/77aa4b9ac117acfcd7384166cccd4a333829bf81
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
A lldb/test/API/macosx/expedited-recent-reads/Makefile
A lldb/test/API/macosx/expedited-recent-reads/TestExpeditedRecentReads.py
A lldb/test/API/macosx/expedited-recent-reads/main.c
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/debugserver/source/RNBRemote.h
Log Message:
-----------
[lldb][debugserver] Expedite the memory ranges lldb read most recently (#223417)
The rationale of this change is that if user/ide/lldb reads memory on
some address, it more likely to read them again in next stop. If
debugserver expedites the memory of recent reads in public stop, lldb
won't send memory read packet to read them again. Those addresses are
already known when the previous stop ends.
Expedite up to 16 memory ranges (at most 512 bytes each) read by `m`,
`x`, and `MultiMemRead` in `jThreadsInfo` for the stopped thread, and
advertise `ExpediteRecentReads+` via `qSupported`. Re-reading a range
moves it to the newest slot, and the ring is cleared on exec.
The gain is large in three use cases:
- TLS variables. `DynamicLoaderDarwin::GetThreadLocalData` reads the TLS
thunk and then calls its `get_addr` in the target, and each such call
surfaces as a public stop, in `ProcessEventData::DoOnRemoval`. lldb
clears its memory cache at every stop, so the thunk and its data block
were read again at each one. Three `frame variable tls_var tls_double`
commands on a two-variable test program send 205 memory-read packets
before this change and 9 after; the reads at that one call site go
from 22 to 2.
- conditional breakpoints: one every stop, lldb reads the same variables
evaluate the condition, and resumes the execution if condition is
false. After this change, these variables are expedited in stop, and
lldb doesn't need to send memory read packets, `x` packet is reduced
from 473 to 432.
- pointer-chase reads. Printing an Objective-C object reads the isa
pointer, then walks the class and its method lists, in
`ClassDescriptorV2::method_list_t::Read` and `method_t::ReadNames`.
None of that is on the stack that the frame 0 expedite covers. A `po`
of one object sends 387 memory-read packets before and 368 after.
Assisted-by: claude
Commit: 9438c6f46ec922d81d4a98f0bab50ecbd27d4ead
https://github.com/llvm/llvm-project/commit/9438c6f46ec922d81d4a98f0bab50ecbd27d4ead
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/load-latency-fallback.ll
Log Message:
-----------
[AArch64] Fix load latency costs without a usable scheduling class (#223416)
#201567 made AArch64TTIImpl::getMemoryOpCost query the scheduling model
for the latency of loads, but that information isn't always available:
* CPUs without a scheduling model (carmel, which uses NoSchedModel) call
getSchedClassDesc on a null table. This asserts with "No scheduling
machine model" and segfaults in release builds. It is reachable from
SelectionDAGBuilder::shouldKeepJumpConditionsTogether when compiling
functions with target-cpu=carmel.
* Invalid scheduling classes (integer loads on oryon-1, and LDR_ZXI on
the models without SVE when +sve is enabled) give a latency of 0 for
single loads and very large latencies for loads split into several.
* Variant scheduling classes (FP/vector loads on c1-nano, c1-premium and
c1-ultra) can't be resolved without an instruction and give the same
bogus values.
In these cases fall back to the default load latency of the scheduling
model, using the same formula as the fixed load latency path. CPUs whose
scheduling model describes the loads are unaffected.
Commit: a2b905f109ae2c80ddfc90ab7a8a56edece5d950
https://github.com/llvm/llvm-project/commit/a2b905f109ae2c80ddfc90ab7a8a56edece5d950
Author: Michał Górny <mgorny at gentoo.org>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-pass-statistics.mlir
M mlir/test/Dialect/LLVMIR/sroa-statistics.mlir
M mlir/test/Dialect/MemRef/mem2reg-statistics.mlir
M mlir/test/Dialect/Tensor/fold-consecutive-insert-extract-slice.mlir
M mlir/test/Dialect/Tensor/fold-tensor-subset-ops.mlir
M mlir/test/Dialect/Tensor/tracking-listener.mlir
M mlir/test/Pass/pipeline-stats-nested.mlir
M mlir/test/Pass/pipeline-stats.mlir
M mlir/test/mlir-runner/async-error.mlir
M mlir/test/mlir-runner/async-func.mlir
M mlir/test/mlir-runner/async-group.mlir
M mlir/test/mlir-runner/async-value.mlir
M mlir/test/mlir-runner/async.mlir
M mlir/test/mlir-runner/x86-varargs.mlir
Log Message:
-----------
[mlir] Mark tests broken on x86 appropriately (#223981)
See https://github.com/llvm/llvm-project/issues/124541 and the
discussion on https://github.com/llvm/llvm-project/pull/220741.
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Commit: 6ebc12bb7d5764c08765caeb82c559e9b209ba7d
https://github.com/llvm/llvm-project/commit/6ebc12bb7d5764c08765caeb82c559e9b209ba7d
Author: Serval MARTINOT-LAGARDE <serval.ml6 at live.fr>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
A llvm/test/CodeGen/AArch64/sve-interleave-of-splat.ll
Log Message:
-----------
[SDAG] Add scalable vector support to WidenVecOp_CONCAT_VECTORS (#219146)
This fixes a crash when lowering:
```
; llc -mattr=+sve crash.ll
define <vscale x 2 x float> @interleave2_nxv2f32(<vscale x 1 x float> %vec0, <vscale x 1 x float> %vec1) {
%retval = call <vscale x 2 x float> @llvm.vector.interleave2.nxv2f32(<vscale x 1 x float> %vec0, <vscale x 1 x float> %vec1)
ret <vscale x 2 x float> %retval
}
```
---------
Co-authored-by: Benjamin Maxwell <macdue at dueutil.tech>
Commit: a91a4c7a7562637b3ed8af5e03788c503e1f0f65
https://github.com/llvm/llvm-project/commit/a91a4c7a7562637b3ed8af5e03788c503e1f0f65
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M offload/ci/hip-tpl.py
Log Message:
-----------
[HIP] Remove old LLVM test suite option spelling (#223943)
After a series of refactorings, we can remove the now obsolete option
spelling for the HIP kokkos tests.
Commit: 2a4149803d3fe72e28ddae2962e6cf1569330944
https://github.com/llvm/llvm-project/commit/2a4149803d3fe72e28ddae2962e6cf1569330944
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn] port 1c1edc2d34e1 and 78bbf2229d2a (lldb emscripten) (#224003)
Commit: 65b0cc5ec1a5694408978882be455d564b918b7a
https://github.com/llvm/llvm-project/commit/65b0cc5ec1a5694408978882be455d564b918b7a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/ValueObject/BUILD.gn
Log Message:
-----------
[gn build] Port bb651180e3b1 (#224004)
Commit: 2819c4e7933fa39599c527d5a07ca72b02da91e6
https://github.com/llvm/llvm-project/commit/2819c4e7933fa39599c527d5a07ca72b02da91e6
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Support/APFloat.cpp
A llvm/lib/Support/APFloatPowerOfFiveTable.inc
M llvm/unittests/ADT/APFloatTest.cpp
A llvm/utils/generate-apfloat-pow5-table.py
Log Message:
-----------
[APFloat][Perf] Improve FP literal parsing speed and stack usage (#221701)
Rewrite APFloat decimal conversion to reduce stack use and speed up
floating-point literal parsing.
On an `llvm-as` test of 100k randomized half/float/double/fp128 global
constants, assembly time fell from 666 ms to 551 ms (17.3%) and peak
stack use fell from 25,912 B to 6,640 B (74.4%).
To achieve these results, there are several optimizations:
- Precomputing the powers-of-five factors, replacing a 1,205-word
runtime workspace with a 601-word constant table sufficient to construct
powers through 5^16383.
- Replacing the two fixed 600-word stack-based scratch/destination
buffers with SmallVectors that are dynamically sized based on the input,
drastically reducing stack usage.
- These SmallVectors allow for 16 64-bit words to be stored on the stack
(enough to cover ordinary f16/f32 inputs, which only need 2-6 words),
and larger doubles and fp128s get allocated on the heap instead.
Assisted-by: gpt-5.6-terra
Commit: 988c5a95ffa7d118d3c67f21b78d52efbc7b0cfd
https://github.com/llvm/llvm-project/commit/988c5a95ffa7d118d3c67f21b78d52efbc7b0cfd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/sanitizer_offload.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_hsa.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_image.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload_opcodes.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_rpc.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload_rpc.h
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
R compiler-rt/lib/ubsan/offload/hsa.h
M compiler-rt/lib/ubsan/offload/ubsan_offload.h
R compiler-rt/lib/ubsan/offload/ubsan_offload_hsa.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_hsa.h
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
M compiler-rt/lib/ubsan/offload/ubsan_offload_report.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_rpc.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_rpc.h
R compiler-rt/lib/ubsan/offload/ubsan_offload_symbolize.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_symbolize.h
M compiler-rt/lib/ubsan/ubsan_offload.cpp
M compiler-rt/lib/ubsan/ubsan_offload_packet.h
M compiler-rt/test/CMakeLists.txt
A compiler-rt/test/Inputs/hip.h
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lit.common.configured.in
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/ubsan/AMDGPU/abort.hip
M compiler-rt/test/ubsan/AMDGPU/dedup.hip
M compiler-rt/test/ubsan/AMDGPU/host-and-device.hip
M compiler-rt/test/ubsan/AMDGPU/openmp-overflow.cpp
M compiler-rt/test/ubsan/AMDGPU/overflow-i128.hip
M compiler-rt/test/ubsan/AMDGPU/overflow.hip
M compiler-rt/test/ubsan/AMDGPU/shift.hip
M compiler-rt/test/ubsan/CMakeLists.txt
R compiler-rt/test/ubsan/Inputs/hip.h
M compiler-rt/test/ubsan/lit.common.cfg.py
M compiler-rt/test/ubsan/lit.site.cfg.py.in
Log Message:
-----------
[compiler-rt] Factor HSA layer into common helpers (#223532)
Summary:
This factors the UBSan HSA layer into a common layer so it can be
re-used for other sanitizers. The primary goal is to provide the
simplified interface into HSA (discovery, allocation, copying) and
manage the state that all sanitizers will need (RPC and symbolization).
This is intended as an NFC refactoring.
Commit: 6327754ad4eb21b3c27034bc170e8b9944e5e318
https://github.com/llvm/llvm-project/commit/6327754ad4eb21b3c27034bc170e8b9944e5e318
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/Basic/TargetID.h
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
Revert "Reapply "clang: Use TargetID parsing from AMDGPUTargetParser" (#213824)" (#223983)
Reverts llvm/llvm-project#213847
Matt please look into our downstream failure :
https://amd-hub.atlassian.net/browse/LCOMPILER-2800
Commit: cc0efa4e820e7b54ac97f00021d0cf39cc6915e4
https://github.com/llvm/llvm-project/commit/cc0efa4e820e7b54ac97f00021d0cf39cc6915e4
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
Log Message:
-----------
[mlir][SPIR-V] Add folder for spirv.SMulExtended(x, 1) (#214137)
Commit: 3693a9b748c55b94994ff8ad6f48deffb1c90d40
https://github.com/llvm/llvm-project/commit/3693a9b748c55b94994ff8ad6f48deffb1c90d40
Author: Bruno De Fraine <bruno.defraine at globalfoundries.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.h
M clang/include/clang/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowFormat.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageFormat.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowWPATest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageWPATest.cpp
M clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
Log Message:
-----------
[SSAF][PointerFlow] Properly declare functions in header (#223390)
In a GCC build, this fixes some warnings of the following kind:
clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.cpp:15:1: warning: ‘clang::ssaf::PointerFlowEntitySummary clang::ssaf::buildPointerFlowEntitySummary(EdgeSet)’ has not been declared within ‘clang::ssaf’
15 | ssaf::buildPointerFlowEntitySummary(EdgeSet Edges) {
| ^~~~
In file included from clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.cpp:9:
clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.h:29:35: note: only here as a ‘friend’
29 | friend PointerFlowEntitySummary buildPointerFlowEntitySummary(EdgeSet Edges);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Fixed by centralizing the function declarations in the header, which
also removes the duplication across multiple files/tests.
Commit: 9c972b8fdee869b7602c305bc96ceedbcd26fc5a
https://github.com/llvm/llvm-project/commit/9c972b8fdee869b7602c305bc96ceedbcd26fc5a
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
Add maintainers for the MIPS backend (#223338)
As discussed in:
https://discourse.llvm.org/t/rfc-upstreaming-nanomips-support-to-llvm/91713/16
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 3892d6e6a1c538aab3ab3646bc162ae37bc0e64a
https://github.com/llvm/llvm-project/commit/3892d6e6a1c538aab3ab3646bc162ae37bc0e64a
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[ProfileData] Fix uint8_t loop index truncating bitmap byte count (#220620)
## Summary
`TextInstrProfReader::readNextRecord` reads a record's bitmap bytes with
a
`uint8_t` loop index compared against a `uint64_t` count:
```cpp
for (uint8_t I = 0; I < NumBitmapBytes; ++I) {
```
`NumBitmapBytes` is `uint64_t`, so when a text profile declares more
than 255
bitmap bytes the `uint8_t` index wraps around at 256 back to 0 and the
condition `I < NumBitmapBytes` can never become false. The loop then
stops only
when the input runs out (via the `is_at_end()` truncation check), so the
record
is mis-parsed: the reader runs past the intended `NumBitmapBytes` values
and
reports the profile as truncated instead of reading it correctly.
## Fix
Widen the loop index to `uint64_t` to match `NumBitmapBytes`, consistent
with the sibling counter loop a few lines above (`for (uint64_t I = 0; I
< NumCounters; ++I)`):
```cpp
for (uint64_t I = 0; I < NumBitmapBytes; ++I) {
```
#### Assisted by: Claude
#### I don't have commit access, could you please merge this?
Co-authored-by: Ahmed Radwan <ahradwan at amd.com>
Commit: 975e7e325515013227bd94b5d30b1fa4414b6e1a
https://github.com/llvm/llvm-project/commit/975e7e325515013227bd94b5d30b1fa4414b6e1a
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/host-eval.f90
A flang/test/Lower/OpenMP/target-spmd-reduction.f90
Log Message:
-----------
[flang][OpenMP][NFC] Add missing lowering test coverage (#221079)
Adds three tests for behavior that already works but is untested:
- target-generic-spmd.f90: whether host_eval is emitted for separate,
non-combined target/teams/distribute directive nests, covering the
generic versus SPMD kernel classification. The existing host-eval.f90
covers only combined constructs.
- hlfir-to-fir-conv-omp.mlir: alloca block selection for OpenMP regions
during HLFIR-to-FIR conversion.
- reduction-target-spmd.f90: a reduction on target teams distribute
parallel do is placed on omp.teams.
Commit: 869d8b74ff2b1b823005e9b7ac57c2bf78904503
https://github.com/llvm/llvm-project/commit/869d8b74ff2b1b823005e9b7ac57c2bf78904503
Author: Milin Bhade <mbhade at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/nonpow2-shared-weight-reduction.ll
Log Message:
-----------
[SLP][X86][NFC] Add pre-commit test for width-3 shared-weight reduction (#222243)
Pre-commit test for three independent reductions over contiguous bytes
sharing a single broadcast weight. It captures current codegen: even
with -slp-vectorize-non-power-of-2=true the width-3 tree is discarded to
scalar because the non-power-of-2 <3 x i8> load is over-priced (the
folded vpinsr*(mem) is double-counted). A follow-up X86 cost fix flips
the NPOT run to the width-3 vector form.
cc @alexey-bataev
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: f9a3a90a693874572fa89636476d70787a0bca30
https://github.com/llvm/llvm-project/commit/f9a3a90a693874572fa89636476d70787a0bca30
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ItaniumMangle.cpp
M clang/test/CodeGenCXX/mangle-concept.cpp
Log Message:
-----------
[clang] Fix mangling of constrained auto referring to a parameter when the return type has an ABI tag (#223121)
Fixes #204178
Mangling `template<typename T> auto f(T t, c<decltype(t)> auto) -> s;`
asserts with `ParmVarDecl is not visible in current parameter
environment` when `s` carries an ABI tag, as `std::string` does under
libstdc++. The invented template parameter's constraint refers to the
function parameter `t`, and the mangler encodes that reference by its
nesting depth, so the function's parameter scope has to be entered
before the name is mangled. `mangleFunctionEncoding` does that in the
common case, but when the return type has a tag it first mangles the
name with a temporary mangler to collect the tags in use, and the scope
was pushed on the outer mangler after the temporary one had already
copied its depth state. The temporary mangler saw depth zero. Without
assertions this didn't crash but produced `fp_` instead of `fL0p_`, a
symbol GCC doesn't emit and that differs from clang's own mangling of
the same declaration without the tag.
The scope is now pushed on the mangler that actually mangles the name,
the same pattern `makeFunctionReturnTypeTags` already uses for its own
temporary mangler. Both branches of `mangleFunctionEncoding` now
establish the same depth state before mangling the name, so the tagged
and untagged manglings agree and the assertion stays as it is.
Commit: 0ca85cb9a1f764970106e86f1aba2aff36789b9a
https://github.com/llvm/llvm-project/commit/0ca85cb9a1f764970106e86f1aba2aff36789b9a
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-clmul.mir
Log Message:
-----------
[GlobalISel] Add computeKnownBits for G_CLMUL opcode (#223980)
Port the computeKnownBits support for ISD::CLMUL from SelectionDAG path
to the GlobalISel G_CLMUL.
Commit: ab2b7a8f930b5ea54a300efc512562770dccae79
https://github.com/llvm/llvm-project/commit/ab2b7a8f930b5ea54a300efc512562770dccae79
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
Log Message:
-----------
[NFC] Use logical && instead of bitwise & with a logical NOT operand (#223798)
## Summary
Two spots computed `x & !y`, mixing a bitwise AND with a logical NOT:
* CodeGen: `MachineOperand::isKill()` — `IsDeadOrKill & !IsDef`
* OpenMP/Attributor: `AAExecutionDomainFunction::updateImpl` —
`StoredED.IsReachingAlignedBarrierOnly &
!IsEndAndNotReachingAlignedBarriersOnly`
In both cases all operands are booleans (1-bit bitfields / `bool`), so
the
computed value is unchanged. Switch to the logical AND (`&&`) to express
the
intended logical conjunction and restore short-circuiting.
NFC. Resolves CodeQL `cpp/incorrect-not-operator-usage` reports on these
lines.
#### Assisted-by: Cline
#### I don't have write access - please merge on my behalf once
approved. Thanks.
---------
Co-authored-by: Ahmed Radwan <ahradwan at amd.com>
Commit: 9dd84b417c7619030e530d1a4396a9fac618297d
https://github.com/llvm/llvm-project/commit/9dd84b417c7619030e530d1a4396a9fac618297d
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVMUtils.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeFunctions.def
M mlir/lib/Conversion/OpenACCToLLVM/ACCDataDirectivePatterns.cpp
A mlir/lib/Conversion/OpenACCToLLVM/ACCHostDataPatterns.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVM.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVMUtils.cpp
M mlir/lib/Conversion/OpenACCToLLVM/CMakeLists.txt
M mlir/test/Conversion/OpenACCToLLVM/data-diagnostics.mlir
M mlir/test/Conversion/OpenACCToLLVM/data.mlir
A mlir/test/Conversion/OpenACCToLLVM/host-data.mlir
Log Message:
-----------
[mlir][acc] Add host_data codegen to ACCToLLVM (#223887)
Extends the acc to LLVM conversion with codegen for the `host_data`
construct. Each use_device clause becomes a call to the libacctarget
entry point that gives the device address its object is mapped to, so
that the body of the construct works on device addresses. As with the
data directives, this runtime API is not yet finalized; the draft
proposal can be found at
https://github.com/llvm/llvm-project/pull/197894
Co-authored-by: Matsu <kmatsumura at nvidia.com>
Co-authored-by: nvptm <pmathew at nvidia.com>
Commit: 9b42c077c209202d4eabdadec461c73c548e822b
https://github.com/llvm/llvm-project/commit/9b42c077c209202d4eabdadec461c73c548e822b
Author: nudt_yixiao <1272950933 at qq.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/resolve94.f90
Log Message:
-----------
[Flang] Diagnose nonvariable STAT= specifiers (#219696)
An image selector STAT= operand can be parsed as a variable but later
resolve to a nonpointer function reference. Passing this expression to
CoarrayRef::set_stat() violates its invariant and triggers a CHECK.
Verify that the analyzed STAT= expression is a variable before calling
set_stat(), and emit a semantic error when it is not.
Add a regression test to resolve94.f90 covering an implicitly typed
nonpointer function reference used as a STAT= specifier.
Fixes https://github.com/llvm/llvm-project/issues/208889
Co-authored-by: yixiao <yixiao at hygon.cn>
Commit: 95ead5f4928d555ec88b992b4a39849cee9867a9
https://github.com/llvm/llvm-project/commit/95ead5f4928d555ec88b992b4a39849cee9867a9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[MLIR] Use false instead of nullptr for boolean args. (NFC) (#224009)
This fixes a build failure on macOS with -Werror:
error: implicit conversion of nullptr constant to 'bool'
[-Werror,-Wnull-conversion]
PR: https://github.com/llvm/llvm-project/pull/224009
Commit: 649e3d638e2f2c68c31683ab1f705d04d6ef2a6d
https://github.com/llvm/llvm-project/commit/649e3d638e2f2c68c31683ab1f705d04d6ef2a6d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Unify signed and unsigned decomposition paths (NFC) (#223835)
NFCI clean-up after https://github.com/llvm/llvm-project/pull/223537.
Unify signed/unsigned decomposition via isKnownNoWrap.
PR: https://github.com/llvm/llvm-project/pull/223835
Commit: 503e108f373e1fbd64bbf025cd74d98426d4f566
https://github.com/llvm/llvm-project/commit/503e108f373e1fbd64bbf025cd74d98426d4f566
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[VPlan] Create VPSlotTracker's ModuleSlotTracker for the plan (NFC). (#223952)
Move the lazy creation of VPSlotTracker's ModuleSlotTracker into a new
getOrCreateMST helper, so it can be shared with other users in the
future (https://github.com/llvm/llvm-project/pull/203982).
Also get the function and module directly from the plan Create it for
the cached module and get the function to incorporate from the plan,
instead of using the module and function of the first unnamed
instruction printed.
PR: https://github.com/llvm/llvm-project/pull/223952
Commit: 1892ec00f9f30f17794cbbe0947ce4a47bead65f
https://github.com/llvm/llvm-project/commit/1892ec00f9f30f17794cbbe0947ce4a47bead65f
Author: miyan <1138989048 at qq.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/cmake/config-ix.cmake
Log Message:
-----------
[cmake] Use the C++ linker when checking libxml2 (#221970)
When libxml2 is built statically with ICU support, its link interface
contains C++ libraries. `check_symbol_exists()` uses the C linker
driver, causing the libxml2 check to fail on unresolved C++ runtime
symbols and incorrectly report that `xmlReadMemory` is unavailable.
This issue was found in https://github.com/microsoft/vcpkg/pull/53727
Commit: e364b9da263dcd9a4dcda0d183f403d3f138bb51
https://github.com/llvm/llvm-project/commit/e364b9da263dcd9a4dcda0d183f403d3f138bb51
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/include/__configuration/abi.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_result_type.pass.cpp
M libcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_sseq.pass.cpp
M libcxx/utils/libcxx/test/features/libcxx_macros.py
Log Message:
-----------
[libc++] Take the mersenne twister ABI break unconditionally (#222700)
Technically this is ABI breaking, since we change the meaning of the
bytes inside the mersenne twister. However, this doesn't cause changes
in the size of any objects and is only an issue in very specific
circumstances. Specifically, the mersenne twister has to be passed on an
ABI boundary and be used on both sides of that ABI boundary. If it's
only used on one side, the values will continue to be correct, since
only a single algorithm is used. Even then, the only issue is that the
values aren't properly randomized, since both versions of the mersenne
twister implementation read the same type of data and produce the same
kind of output with it.
Fixes #209514
Commit: 9dc532b79f8676ad1a7795d0869feb05b558267f
https://github.com/llvm/llvm-project/commit/9dc532b79f8676ad1a7795d0869feb05b558267f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++] Optimize string::erase (#223721)
This change allows the `traits_type::move` (i.e. `memmove`) call to be
tail-called, removing the need for allocating any stack space and a
call. We also copy the null terminator through `memmove` instead of
inserting it manually.
Commit: 3906e0a8aa31a083af51eb886d5b9b210e182495
https://github.com/llvm/llvm-project/commit/3906e0a8aa31a083af51eb886d5b9b210e182495
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/ABI/Targets/X86.cpp
M llvm/unittests/ABI/X86TargetInfoTest.cpp
Log Message:
-----------
[LLVMABI] Narrow the eightbyte past a union's storage member (#223859)
`getIntegerTypeAtOffset` sized the eightbyte from the storage member the
union reduction picked, even at an offset that member does not reach. A
union whose second eightbyte holds one data byte then coerced to `i64`
where clang coerces to `i8`:
```c
union { char c[9]; void *p; };
```
Clang lowers it to `{ ptr, [8 x i8] }`, so that offset lands on padding
and the coercion narrows to a byte. The classifier now does the same,
and sizes the coercion from the union's remaining bytes otherwise.
Assisted-by: Cursor / claude-opus-5
Commit: e250f3473062ce61843550df00a1843710bc4d2f
https://github.com/llvm/llvm-project/commit/e250f3473062ce61843550df00a1843710bc4d2f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/IR/Constants.h
M llvm/lib/IR/Core.cpp
M llvm/test/Bindings/OCaml/core.ml
Log Message:
-----------
[IR] Deprecate ConstantExpr::getSizeOf() and getAlignOf() (#223710)
These cannot be represented in terms of ptradd. They should be replaced
with plain constants with the size/alignment (based on DataLayout, or
direct frontend knowledge).
The C API wrappers `LLVMSizeOf()` and `LLVMAlignOf()` are deprecated for
the same reason.
The C APIs `LLVMBuildMalloc()` and `LLVMBuildArrayMalloc()` create a
constant with the size based on data layout now.
Commit: e0f6d55ec93678e9d87bd633c48001c3e6f4b8ce
https://github.com/llvm/llvm-project/commit/e0f6d55ec93678e9d87bd633c48001c3e6f4b8ce
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
Log Message:
-----------
SPIRV: Avoid TargetMachine::createDataLayout in SPIRVTranslate (#224017)
Commit: 0b6050761b5e53cd1c2f825814b46f202c9a83de
https://github.com/llvm/llvm-project/commit/0b6050761b5e53cd1c2f825814b46f202c9a83de
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/mismatched-bound-types.f90
Log Message:
-----------
[flang][test][NFC] Re-add OpenMP test for mismatched loop bound types (#223876)
Lowering now materialises the literal at the loop variable's kind, so
there is a single i64 constant and no fir.convert. Updated the checks to
match and re-added the test.
Commit: 1b66ee2a70cd85897a006ac00365f936178d38d7
https://github.com/llvm/llvm-project/commit/1b66ee2a70cd85897a006ac00365f936178d38d7
Author: satyanarayana reddy janga <satyajanga at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A lldb/test/API/accelerator/mock/TestMockAcceleratorAddressSpaces.py
M lldb/tools/lldb-server/Plugins/Accelerator/Mock/ProcessMockAccelerator.cpp
M lldb/tools/lldb-server/Plugins/Accelerator/Mock/ProcessMockAccelerator.h
Log Message:
-----------
[lldb] End to end test for address spaces using lldb-server mock accelerator plugin (#217092)
Relevant RFC:
https://discourse.llvm.org/t/rfc-address-spaces-support-in-lldb/91222/
Add an end to end test using a mock accelerator that advertises multiple
address spaces.
Commit: 4d00c7b10559e5d4f75fd2c00fa0a29e2be937f4
https://github.com/llvm/llvm-project/commit/4d00c7b10559e5d4f75fd2c00fa0a29e2be937f4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Analysis/CostModel/X86/arith-mulh.ll
Log Message:
-----------
[CostModel][X86] Add baseline costs for smulh/umulh intrinsics (#224022)
Commit: a37f19abd0927b5e7a2a59c42bb4dfdb6a2f043e
https://github.com/llvm/llvm-project/commit/a37f19abd0927b5e7a2a59c42bb4dfdb6a2f043e
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/unistd-macros.h
M libc/include/unistd.yaml
M libc/src/unistd/linux/sysconf.cpp
M libc/test/src/unistd/sysconf_test.cpp
Log Message:
-----------
[libc] Add macro / sysconf support for POSIX threads features. (#223543)
Define all `_POSIX_THREAD_*` macro and corresponding `_SC_THREAD_`
sysconf names that provide information on availability of certain
POSIX threads features.
* Explicitly provide all relevant macro from POSIX standard:
https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/unistd.h.html
to either 202405L (current POSIX version supported by LLVM-libc), or -1
(if the feature is unsupported)
* Support returning these features via `sysconf` for matching `_SC_`
name values;
* Add unit tests that validate the actual numerical values.
Commit: 64d1f1a696f223e47c3df168197b2a48d6c8917b
https://github.com/llvm/llvm-project/commit/64d1f1a696f223e47c3df168197b2a48d6c8917b
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/CodeGen/MIRPrintingPass.cpp
M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
M llvm/lib/Target/ARC/ARCOptAddrMode.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
Log Message:
-----------
[llvm] Remove dead INITIALIZE_PASS instances and declarations (NFC) (#223938)
initializeARCOptAddrModePass:
Introduced on March 20, 2019 in commit
b062239d638ba668d277dd0ec735497b71321d3f without any callers.
initializeResetMachineFunctionPass:
Introduced on August 27, 2016 in commit
374796d6785311f93ba38ebce1b22e11a3df3ec7 without any callers.
initializeCFGuardPass:
Introduced on October 28, 2019 in commit
e59f7488c772c91ba0f7457ef67ffb4b455047b8 without any callers.
initializeMIRPrintingPassPass, MIRPrintingPassID:
Introduced on May 27, 2015 in commit
2bdb4e1063f5cbc8bb1262d90cca056e9fb31fbb without any callers.
initializeRegToMemWrapperPassPass:
Introduced on October 21, 2024 in commit
e26d9070d3eaee587b3ef0da6d12200a5b994765 without any callers.
Assisted-by: Antigravity
Commit: eac6cdf2fffaa000d022f8d504508bd95c52c852
https://github.com/llvm/llvm-project/commit/eac6cdf2fffaa000d022f8d504508bd95c52c852
Author: Vito Secona <secona00 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
Log Message:
-----------
[mlir][SparseTensor][NFC] Improve documentation for SparseTensor_LvlOp (#223307)
Update the `sparse_tensor.lvl` documentation to correctly describe the
level mapping for `%j floordiv 3`.
Commit: 1a8b98e4017ba8cbe51c362f65a1932c7da9aa1e
https://github.com/llvm/llvm-project/commit/1a8b98e4017ba8cbe51c362f65a1932c7da9aa1e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github] Bump AArch64 premerge to Ubuntu 26.04 (#224016)
Mainly so that we pull in a new CMake. x86 Linux needs to be handled in
zorg.
Commit: 91a87531f26b989863517e07f0648733029c7cfe
https://github.com/llvm/llvm-project/commit/91a87531f26b989863517e07f0648733029c7cfe
Author: google-yfyang <yfyang at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/include/__locale_dir/support/linux.h
Log Message:
-----------
[libc++] Skip including langinfo.h when unused (#223749)
A previous change unconditionally includes <langinfo.h>.
__get_locale_encoding() only uses langinfo when compiling shared
libraries, and hardcodes "UTF-8" on Android.
glibc's <langinfo.h> defines POSIX nl_item constants as raw numeric
preprocessor macros (#define ERA 46).
This causes Bionic's #define ERA 46 leaks into C++ translation units on
Android and fails the compilation with:
```
error: expected member name or ';' after declaration specifiers
static constexpr typename ERA = random_value;
```
Commit: f84aee6257bd37def74ce179252ce38c19323fc8
https://github.com/llvm/llvm-project/commit/f84aee6257bd37def74ce179252ce38c19323fc8
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/python/mlir/dialects/linalg/__init__.py
M mlir/test/python/dialects/linalg/ops.py
Log Message:
-----------
[mlir][python] Register linalg.ElementwiseOp wrapper as op view (#223806)
Register the wrapper for `ElementwiseOp` with
`@_ods_cext.register_operation(_Dialect, replace=True)` so the exported
class is the one the registry instantiates.
Fixes #223673
Assisted by: Claude
Commit: 02bd47db9d3c4313fe1b5054ed8a1a081f1b7f78
https://github.com/llvm/llvm-project/commit/02bd47db9d3c4313fe1b5054ed8a1a081f1b7f78
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Log Message:
-----------
[SDAG][NFC] Replace initialization UNDEF by POISON (#224015)
Commit: e5e30255b4cfe0684741b45b16c20ff64e01bca3
https://github.com/llvm/llvm-project/commit/e5e30255b4cfe0684741b45b16c20ff64e01bca3
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/unittests/CAS/OnDiskGraphDBTest.cpp
Log Message:
-----------
[CAS] Check StandaloneData before reopening a standalone object (#223807)
OnDiskGraphDB::load() inserted every standalone object it mapped into
StandaloneData but never read from it: lookup() and count() had no
callers anywhere. So each load of an object stored outside the data pool
repeated the open, fstat, mmap and close, and then insert() saw the hash
was already present, dropped the freshly created mapping, and returned
the pointer it already had. The whole sequence was wasted.
Consult lookup() before touching the filesystem to make loading already
opened CAS objects much faster.
Commit: 8ee79595a91fa0abcba887decb439e36dc94b0a0
https://github.com/llvm/llvm-project/commit/8ee79595a91fa0abcba887decb439e36dc94b0a0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Simplify isSImm18() in RISCVAsmParser. NFC (#223928)
Use isSImm<18>() instead of isSImmPred.
Commit: 05117eb95d60873ce575af564ce2532ab0343bb9
https://github.com/llvm/llvm-project/commit/05117eb95d60873ce575af564ce2532ab0343bb9
Author: janr-bay <jrehders at baylibre.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/AArch64/AArch64SRLTDefineSuperRegs.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
Log Message:
-----------
[AArch64] Replace uses of AArch64::NoRegister with Register() or isValid() NFC (#220227)
This came up during work on another PR, @topperc suggested it as ongoing
work
[here](https://github.com/llvm/llvm-project/pull/210992#discussion_r3738407180).
This replaces all remaining uses for aarch64, similar to previous
changes for the [RISCV
backend](https://github.com/llvm/llvm-project/commit/62791b43774615b24d565130c8c3f1e6e5145dd8#diff-b2797a1529366b39522e2b80e2719e331875ec3f70214b2a4ce9524821d471b9)
and [AMDGPU
backend](https://github.com/llvm/llvm-project/commit/191d70f2f52d9cd38e0c57f8319b466eff1ac023)
Commit: ae9feeea47f191cce37ef408ee0a692652c1c62a
https://github.com/llvm/llvm-project/commit/ae9feeea47f191cce37ef408ee0a692652c1c62a
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
M flang/test/Lower/split-sum-expression-tree-subscripts.f90
Log Message:
-----------
[flang] Join reassociated sums with the head first (#223966)
After #222302 we saw a small regression in bwaves with -ffast-math on
some CI machines. I'm quite surprised that this expression ordering has
any effect when reassociation is enabled in the middle-end. The change
in this commit is a bit arbitrary but it restores bwaves performance
without regressing anything else.
Keep the first two terms in the left operand of the final signed join.
Retain both right-associated folds and the existing eligibility guards.
This preserves the source order between the two groups, allowing a
head-first alternative to the code shape produced by tail-first joining.
Update lowering order checks and use four terms in nested-expression
coverage so enabled reassociation remains distinct from the opt-out.
Assisted-by: codex
Commit: e141b669757bd795015b22e02f28f19d4b4759a3
https://github.com/llvm/llvm-project/commit/e141b669757bd795015b22e02f28f19d4b4759a3
Author: Kiroo (Chanung) <ung at zlfn.space>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/builtin-frame-address-arg-type.c
A clang/test/CodeGen/builtin-prefetch-arg-type.c
M clang/test/Sema/builtin-prefetch.c
Log Message:
-----------
[clang][CodeGen] Emit prefetch hints and frame address depth as i32 (#221477)
The hint operands of `llvm.prefetch` and the depth operand of
`llvm.frameaddress` and `llvm.returnaddress` are declared as i32, but
clang emitted the values at the width of the C argument's type.
`__builtin_prefetch` is declared with a variadic prototype, `void(void
const*, ...)`, so its hint arguments are never converted to a parameter
type; only the default argument promotions apply. The depth argument is
emitted at the type of `unsigned int`. Two cases end up with a width
other than 32 bits:
- Targets whose `int` is 16 bits, such as MSP430 and AVR.
Plain `__builtin_prefetch(p, 1, 3)` or `__builtin_frame_address(0)` is
hit this.
- An argument written with a type wider than 32 bits, on any target.
`__builtin_prefetch(p, 1L, 3L)` reproduces this on LP64 targets
`__builtin_prefetch(p, 0 * sizeof(int))` is the same on LP64
#202061
`__builtin_prefetch(p, 1LL, 3LL)` reproduces this on 32 bit targets
Either way the emitted call does not match the intrinsic's signature.
With assertions enabled this trips
`assert(... "Calling a function with a bad signature!")` in
`CallInst::init`;
without them the verifier rejects the module:
```console
$ clang -cc1 -triple msp430 -emit-llvm t.c -o -
call void @llvm.prefetch.p0(ptr %0, i16 1, i16 3, i32 1)
%0 = call ptr @llvm.frameaddress.p0(i16 0)
fatal error: error in backend: Broken module found, compilation aborted!
```
Zero-extend or truncate them to i32 before building the intrinsic call.
The conversion is a no-op where the widths already match, and folds back
to a constant, since Sema already requires these arguments to be
constants in range.
This also removes the FIXME that pointed at the mismatch.
AI assistance helped me find the problem and work out the fix, but I
wrote the code myself.
Assisted-by: Claude Opus 5
Fixes #202061, Fixes #222910
Co-authored-by: mygitljf <2410316423 at qq.com>
Commit: 7971e862b32032d2d049da76bee6cf42bd0efc07
https://github.com/llvm/llvm-project/commit/7971e862b32032d2d049da76bee6cf42bd0efc07
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/lit.local.cfg
A llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/unsupported_alignment.ll
Log Message:
-----------
[SandboxVec][BundleVec][NFC] Precommit test (#223880)
This is a test for a follow-up patch that adds alignment checks.
Commit: f175521aad0e82e632516ccb7bd7a14d5ab31363
https://github.com/llvm/llvm-project/commit/f175521aad0e82e632516ccb7bd7a14d5ab31363
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for s_bitreplicate (#189138)
Add uniform and divergent rules for s_bitreplicate intrinsic.
Assisted-By: Claude
Commit: 998c6e2511a4806ea1c37af6e1f1b776f5205455
https://github.com/llvm/llvm-project/commit/998c6e2511a4806ea1c37af6e1f1b776f5205455
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/cmake/caches/Apple.cmake
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/test/libcxx/algorithms/pstl.libdispatch.chunk_partitions.pass.cpp
Log Message:
-----------
[libc++][pstl] Use libdispatch on Apple platforms by default (#223240)
Currently the default on Apple platforms is "std_thread", which is a
serial dummy.
To enable automatic benchmarking of PSTL, set the backend to
"libdispatch" by default, so it doesn't require specific overrides in
`libcxx/utils/ci/lnt/cmake`.
As a drive-by, fixes some of the minor issues with this backend that
surfaced once more pipelines started using it.
Commit: 1f1c824ad1844bbac5b65cdf78d7c1d6e28bd1b0
https://github.com/llvm/llvm-project/commit/1f1c824ad1844bbac5b65cdf78d7c1d6e28bd1b0
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
A llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/load_store_vec_load_seeds.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][LoadStoreVec] Vectorize load seed chains (#215944)
LoadStoreVec previously only vectorized store bundles. SeedCollection
already emits homogeneous store and load slices separately, so
runOnRegion() now dispatches on the seed kind and calls
vectorizeStores()
or vectorizeLoads() accordingly.
Add vectorizeLoads() to combine consecutive load chains into a single
vector load, unpack for remaining uses, and clean up dead scalar loads
and pointer operands.
Add load_store_vec_load_seeds.ll covering load-only seeds (no uses,
single use, general uses, vector-typed loads, and mixed-type cases), and
extend load_store_vec.ll with a trivial load-then-store case.
Commit: 9e39a5e4a606e2ef8e46bd4a947f0b39feacecc7
https://github.com/llvm/llvm-project/commit/9e39a5e4a606e2ef8e46bd4a947f0b39feacecc7
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/include/__configuration/compiler.h
Log Message:
-----------
[libc++] Reword confusing warning message about AppleClang version (#222380)
AppleClang 26.4 is not a thing -- it's AppleClang 21.0 that shipped with
Xcode 26.4.
Commit: f9de9e4735b386b7def972915e4c166505d4e361
https://github.com/llvm/llvm-project/commit/f9de9e4735b386b7def972915e4c166505d4e361
Author: Sivapriya <sivapriyaofficial2005 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/Targets/NVPTX.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenCUDA/surface.cu
Log Message:
-----------
[CIR][CUDA] Add semantic surface reference type (#223013)
Commit: 40057479b2894cf56e65992a007d679c0c4d639c
https://github.com/llvm/llvm-project/commit/40057479b2894cf56e65992a007d679c0c4d639c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
M libcxx/test/benchmarks/containers/associative/flat_map.bench.cpp
M libcxx/test/benchmarks/containers/associative/flat_multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/multiset.bench.cpp
M libcxx/test/benchmarks/containers/associative/set.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_multiset.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_set.bench.cpp
Log Message:
-----------
[libc++] Return a const reference from get_key in benchmarks (#216088)
It was unnecessary to create a temporary string, and in fact it would
have a negative impact on some benchmarks like `erase(key) (existent)`
which called get_key in the hot loop.
Commit: 28cf18776b433264c7f19919c035f9f8a3143e1b
https://github.com/llvm/llvm-project/commit/28cf18776b433264c7f19919c035f9f8a3143e1b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Fix query benchmarks for associative containers (#216065)
We were calling get_key and the random number generator in the hot loop.
Instead, create a pool of keys to draw from in the initial setup phase,
and then query these keys in a round-robin fashion.
Commit: 9f6791b42d91f72592133e470a4408ae49026ab7
https://github.com/llvm/llvm-project/commit/9f6791b42d91f72592133e470a4408ae49026ab7
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
Log Message:
-----------
[lldb-dap][test] Only check compile units from stack frames for main.c (#223450)
The `test_stack_frame_compile_unit_id` test case added in #222512 checks
that compileUnitId in a stack frame points to the source file. However,
it does so by checking there is only one unique compileUnitId in the
whole stack trace. This may not be true if start.S is included as a
compile unit.
Relax the check by only looking for stack frames that point to main.c.
Also check the other way, i.e. ensure the same compile unit id isn't
referenced by a stack frame that doesn't point to main.c. This way the
test retains its stated goal of making sure the compile unit id resolves
to its source file while also allowing start.S from a different compile
unit to be present.
Commit: db96dfae2a4fd74cb1dba7b4f9dec2dba4c83864
https://github.com/llvm/llvm-project/commit/db96dfae2a4fd74cb1dba7b4f9dec2dba4c83864
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/FIRToMemRefTypeConverter.h
M flang/unittests/Optimizer/OpenACC/FIROpenACCPointerLikeTypeInterfaceTest.cpp
Log Message:
-----------
[flang][FIRToMemRef] Treat heap-pointer allocas as static, not as dynamic arrays (#223821)
Whole-array assignment of an allocatable inside !$acc kernels with
-Mstack_arrays aborted on !fir.ref<!fir.heap<!fir.array<?xf32>>>. A
fir.alloca !fir.heap<array> is a local heap pointer, but it was
unwrapped and handled as a dynamic array. The memref converter then
peeled only the outer ref and asserted because !fir.heap is not a memref
element.
Keep the pointer as a static allocation. Make convertibleMemrefType use
the same one-pointer peel as convertMemrefType so a nested pointer is
not treated as an f32 array.
Commit: fd2f003b399675d0e6cf135ebc3b97cb138b699d
https://github.com/llvm/llvm-project/commit/fd2f003b399675d0e6cf135ebc3b97cb138b699d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-inst-count.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed vectorization because of instcount check, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/224074
Commit: 9df3e81cb2eefa2559eb9989bfdbd475dc23d0a2
https://github.com/llvm/llvm-project/commit/9df3e81cb2eefa2559eb9989bfdbd475dc23d0a2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/AArch64/abi-classify-return-types.c
A clang/test/CodeGen/AArch64/abi-classify-return-types.cpp
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
Log Message:
-----------
[LLVMAABI][AARCH64] Handle homogeneous aggregate return types (#218799)
This change implements the IsHomogenousAggregate() function, which is
shared across targets, and uses it to implement direct passthrough of
return values that meet the homogeneous aggregate criteria.
I'm also adding a new AArch64ABIOptions object that will be used to
track various conditions that are derived from target settings and must
be accounted for in the ABI handling. This change adds only two options,
IsILP32 and IsMicrosoftCXXABI. Other options are expected and will be
added as they are needed.
This change also revises the not-yet-implemented cases, having them
return Ignore rather than Direct so that they fail in more obvious ways.
This was necessary in order to be able to distinguish a return type that
was classified as Direct because it was a homogeneous aggregate from one
that was classified as Direct because it was an unhandled type.
Assisted-by: Cursor / various models
Commit: c14e0afbc1318afb8c4a17f32bfc5fa3ff079658
https://github.com/llvm/llvm-project/commit/c14e0afbc1318afb8c4a17f32bfc5fa3ff079658
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-09-17 (Thu, 17 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Element Join (#223931)
See also
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-element-join.
Commit: 2bef9bbff02d44a5c3431b3a3c4634702662208d
https://github.com/llvm/llvm-project/commit/2bef9bbff02d44a5c3431b3a3c4634702662208d
Author: DeanSturtevant1 <dsturtevant at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
Log Message:
-----------
[bazel][compiler-rt] Exclude sanitizer_offload sources from sanitizer_common (#224078)
Fixes build failure introduced by 988c5a95ffa7 ("[compiler-rt] Factor
HSA layer into common helpers (#223532)").
Commit: c1ee481199adc4c388d2321cd8d16080256ae7a6
https://github.com/llvm/llvm-project/commit/c1ee481199adc4c388d2321cd8d16080256ae7a6
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Separate getCoExecInfo opcode classification (#220329)
Extract WMMA opcode classification from getCoExecInfo into a dedicated
helper. Also track functional unit occupancy separately from the
co-execution window.
Commit: 630b6b92235ea34a50efd1c4d9f101af25547141
https://github.com/llvm/llvm-project/commit/630b6b92235ea34a50efd1c4d9f101af25547141
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/BackendUtil.h
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
A clang/test/CodeGen/Inputs/riscv-ilp32e-no-datalayout.ll
M clang/test/CodeGen/PR44896.ll
M clang/test/CodeGen/asan-unified-lto.ll
A clang/test/CodeGen/riscv-ir-datalayout-preserve.ll
M lldb/test/API/functionalities/inline-sourcefile/inline.ll
Log Message:
-----------
clang: Do not overwrite a module's DataLayout in the backend (#224012)
emitAssembly() unconditionally reset the module's DataLayout from
TargetMachine::createDataLayout(). The TargetMachine's DataLayout is
unreliable given the existence of the "target-abi" module flag, so it
should not be used.
For -x ir input modules this would discard the correct datalayout in
favor of a possibly wrong one.
The post-codegen consistency check compared the module's DataLayout
against clang's frontend getDataLayoutString(), which likewise ignores the
target-abi flag. Recompute the expected layout from the module's own ABI via
Triple::computeDataLayout(getTargetABIName(M)) so the check stays
meaningful without assuming the DataLayout is a fixed property of the target
options. This still detects frontend/LLVM DataLayout drift for generated modules.
PR44896.ll and asan-unified-lto.ll declared x86_64 modules but ran without an
explicit triple, relying on the old overwrite to convert them to the default target.
Pin them to their declared triple and refresh their stale DataLayout strings.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 98bee8bfad61f006d966bcce16e12c520ea03c9c
https://github.com/llvm/llvm-project/commit/98bee8bfad61f006d966bcce16e12c520ea03c9c
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
Log Message:
-----------
[VectorUtils] Allow trivially vectorising llvm.[su]mulh. (#223998)
Commit: b8f1eeb6a61ace4a4ef06687e13424876fd109cd
https://github.com/llvm/llvm-project/commit/b8f1eeb6a61ace4a4ef06687e13424876fd109cd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/MC/RISCV/rvzimop-valid.s
Log Message:
-----------
[RISCV] Add hasCompleteDecoder to sspopchk, sspush, and ssrdp operands. (#223847)
This allows them to disassemble as mop.r.28 or mop.rr.7 when the
operands are not valid for the Zicfiss mnemonic.
Assisted-by: Claude
Commit: 5a01e5e8db22dbab1b41f2ee7e76f243b8f0d952
https://github.com/llvm/llvm-project/commit/5a01e5e8db22dbab1b41f2ee7e76f243b8f0d952
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
Log Message:
-----------
[RISCV] Merge decodeUImmOperand and decodeUImmOperandGE. NFC (#223925)
Add the LowerBound template argument to decodeUImmOperand with a default
value of 0.
Similar for decodeUImmPlus1Operand and decodeUImmPlus1OperandGE, but
default the LowerBound to 1.
Commit: 214f9e4abe156f39350b458002e11ec44cecacd3
https://github.com/llvm/llvm-project/commit/214f9e4abe156f39350b458002e11ec44cecacd3
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-09-17 (Thu, 17 Sep 2026)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[Workflows] Mark miscompilation:undef as uninteresting (#220300)
Address comment
https://github.com/llvm/llvm-project/issues/218908#issuecomment-5470741016.
Commit: 062f3b88efdb0b8cf311a88cc5f72f72eacfc371
https://github.com/llvm/llvm-project/commit/062f3b88efdb0b8cf311a88cc5f72f72eacfc371
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
M llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
Log Message:
-----------
[gn] "port" 988c5a95ffa7 (sanitizer_offload compiler-rt) (#224091)
Commit: 616ec370aa2dd576d5469baf312c284bcefb4f6f
https://github.com/llvm/llvm-project/commit/616ec370aa2dd576d5469baf312c284bcefb4f6f
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/compare.c
Log Message:
-----------
[Clang] Fix `-Wsign-compare` assertion when negating a vector of unsigned integers (#223295)
Fixes #203575
`-1 == -*c`, where `c` points to a vector of `unsigned`, hit the
`unsigned range includes negative?` assertion in `AnalyzeComparison`.
The range analysis for unary `-` and `~` (added in #126846) checks
whether the result type is unsigned with `isUnsignedIntegerType()`,
which never looks through vector types. So the negated unsigned vector
was treated as a signed negation and came back with a possibly-negative
range, even though the operand's own range was correctly unsigned. Same
story for `~*c`.
The check now uses `hasUnsignedIntegerRepresentation()`, which looks
through vector and matrix element types the same way
`IntRange::forValueOfType` and the caller in `AnalyzeComparison` already
do. The binary-operator result gets the same predicate for its
non-negative fixup, since it had the identical blind spot. With that, a
negated unsigned vector takes the same path as a negated `unsigned`
scalar, and the comparison warns about mixed signs again as it did
before Clang 21.
Commit: cc0e7853b3d6c01b0ba954ed3578c6a6376840f7
https://github.com/llvm/llvm-project/commit/cc0e7853b3d6c01b0ba954ed3578c6a6376840f7
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
Fix bazel build for llvm_exegesis_tests (#224085)
- llvm/unittests:llvm_exegesis_tests: Fixes
https://github.com/llvm/llvm-project/pull/208364 (commit 6c31f6446a55)
Root cause: Adding PerfHelperTest.cpp introduced an include of
<perfmon/perf_event.h> under HAVE_LIBPFM, which failed layering_check
and was missing a dependency on libpfm. Fix: Disable layering_check
Commit: ea5b2be249599ba4e7fc6c6c574ee6a936bafd3f
https://github.com/llvm/llvm-project/commit/ea5b2be249599ba4e7fc6c6c574ee6a936bafd3f
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
M llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
Log Message:
-----------
[RelLookupTableConverter] Allow multiple uses of loaded value (#223853)
RelLookupTableConverter previously required `!Load ||
!Load->hasOneUse()`, which prevented converting lookup tables if the
loaded pointer was used more than once in the function.
This restriction is unnecessary since the loaded value itself can be
used many times. The check was likely an over-zealous carryover from
`GV->hasOneUse()` and `GEP->hasOneUse()`.
Remove the check and add a test verifying that lookup tables with
multiple uses of the loaded pointer are converted.
Commit: 01edf187213105e35db8aef724a63f86241b6bd4
https://github.com/llvm/llvm-project/commit/01edf187213105e35db8aef724a63f86241b6bd4
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/utils/ci/buildkite-pipeline.yml
Log Message:
-----------
[libc++][ci] Retarget the ARM BuildKite runners (#224107)
I enabled agent clusters in BuildKite since unclustered agents are not
supported anymore. As part of that, I created a new libcxx-builders-arm
queue to replace the existing queue. This patch switches the pipeline
definition so that new jobs start targeting the new queue with clustered
agents.
Commit: 9cc2e03045417d4a2cf53385c58da724604e673e
https://github.com/llvm/llvm-project/commit/9cc2e03045417d4a2cf53385c58da724604e673e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/test/CodeGen/WebAssembly/function-bitcasts.ll
M llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions-allowed.ll
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions-resume-only.ll
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions.ll
Log Message:
-----------
CodeGen: Read the exception model from the module flag in EH lowering (#223970)
Resolve the exception model as the exception-model module flag if
present, otherwise the TargetOptions default.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: b3aeb4134640d21f98ad2f18ae74263032d7289c
https://github.com/llvm/llvm-project/commit/b3aeb4134640d21f98ad2f18ae74263032d7289c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/premerge.yaml
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Core/Relocation.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/MCF.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
A bolt/test/AArch64/edge-weight-estimation-fixes.s
A bolt/test/AArch64/materialize-constant.s
M bolt/test/AArch64/validate-branch-target.s
M bolt/test/RISCV/call-relocation-pair.s
A bolt/test/RISCV/relr.s
A bolt/test/X86/icp-pic.s
M bolt/test/X86/validate-branch-target.s
A bolt/test/runtime/X86/rela-plt-order.c
M bolt/unittests/Core/BinaryContext.cpp
M bolt/unittests/Core/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
M bolt/unittests/Core/MemoryMaps.cpp
M bolt/unittests/Profile/CMakeLists.txt
M bolt/unittests/Profile/PerfScripts.cpp
M clang-tools-extra/clang-tidy/readability/ConvertMemberFunctionsToStaticCheck.cpp
M clang-tools-extra/clang-tidy/readability/FunctionCognitiveComplexityCheck.cpp
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/YAMLSerialization.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
M clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/clangd/unittests/SerializationTests.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
R clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.rst
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/convert-member-functions-to-static.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/function-cognitive-complexity-alias.cpp
M clang/CMakeLists.txt
M clang/bindings/python/.git_archival.txt
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/cmake/modules/CMakeLists.txt
M clang/docs/CIR/CleanupAndEHDesign.md
M clang/docs/OverflowBehaviorTypes.md
M clang/docs/ReleaseNotes.md
M clang/docs/TypeSanitizer.md
M clang/docs/UsersManual.md
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/Diagnostic.td
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/CodeGen/BackendUtil.h
M clang/include/clang/CodeGen/ConstantInitBuilder.h
M clang/include/clang/CodeGenUtils/CodeGenUtils.h
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Lex/MacroInfo.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.h
M clang/include/clang/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/DeclOrExpr.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.cpp
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/IdentifierTable.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/CIR/CodeGen/Address.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenSYCL.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACCLoop.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/Targets/NVPTX.cpp
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIROpenCLAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Interfaces/CMakeLists.txt
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/ConstantInitBuilder.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/CodeGen/QualTypeMapper.h
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGenUtils/CodeGenUtils.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.h
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Cygwin.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Haiku.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Driver/ToolChains/UEFI.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/TextDiagnostic.cpp
M clang/lib/Headers/__clang_hip_runtime_wrapper.h
M clang/lib/Headers/altivec.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/Value.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowFormat.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageFormat.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RunLoopAutoreleaseLeakChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelConsumer.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
A clang/test/APINotes/Inputs/Headers/RedeclAnnotation.apinotes
A clang/test/APINotes/Inputs/Headers/RedeclAnnotation.h
A clang/test/APINotes/Inputs/Headers/RedeclDefinition.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/redecl-after-definition.c
A clang/test/APINotes/swift-attr-redeclaration.cpp
M clang/test/APINotes/swift-import-as.cpp
M clang/test/AST/ByteCode/builtin-object-size-codegen.c
M clang/test/AST/ByteCode/c.c
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx14.cpp
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/AST/ByteCode/cxx26.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/HLSL/Textures-AST.hlsl
M clang/test/AST/HLSL/Textures-scalar-AST.hlsl
M clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
M clang/test/AST/HLSL/Textures-vector-AST.hlsl
M clang/test/AST/ast-dump-expr-json.c
A clang/test/AST/ast-print-decomposition.cpp
A clang/test/AST/ast-print-deducing-this.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-checked-unique-ptr.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-unique-ptr.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
A clang/test/Analysis/Scalable/source-edit-generation/multi-tu-conflict-edits-merge.cpp
A clang/test/Analysis/Scalable/source-edit-generation/multi-tu-edits-merge.cpp
M clang/test/Analysis/anonymous-decls.cpp
M clang/test/Analysis/cfg.cpp
A clang/test/Analysis/explicit-lambda-capture.cpp
M clang/test/C/C11/n1285_1.c
M clang/test/C/C23/n2508.c
M clang/test/C/C2y/n3259.c
M clang/test/C/C2y/n3260.c
M clang/test/C/C2y/n3273.c
M clang/test/C/C2y/n3298.c
M clang/test/C/C2y/n3353.c
M clang/test/C/C2y/n3409.c
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/atomic-libcall.c
M clang/test/CIR/CodeGen/atomic.c
A clang/test/CIR/CodeGen/avx512-error.c
M clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
M clang/test/CIR/CodeGen/bitint.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-atomic.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-bitint.c
R clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byref.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-sret-res-attrs.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-union-bitfield.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-union-bitfield.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-vptr.cpp
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M clang/test/CIR/CodeGen/compound_literal.c
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A clang/test/CIR/CodeGen/global-address-to-int.c
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M clang/test/CIR/CodeGen/non-type-template-param.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member.cpp
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A clang/test/CIR/CodeGen/target-builtin-error-3.c
A clang/test/CIR/CodeGen/target-builtin-error.c
A clang/test/CIR/CodeGen/target-builtin-noerror.c
A clang/test/CIR/CodeGen/target-features-error-2.c
A clang/test/CIR/CodeGen/target-features-error-3.c
A clang/test/CIR/CodeGen/target-features-error-4.c
A clang/test/CIR/CodeGen/target-features-error-5.c
A clang/test/CIR/CodeGen/target-features-error.c
A clang/test/CIR/CodeGen/target-features-no-error-2.c
A clang/test/CIR/CodeGen/target-features-no-error.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlvbmi2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/bmi-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/lzcnt-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sqrt-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtin-bit.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-maxnum-minnum.c
M clang/test/CIR/CodeGenBuiltins/builtin-undef-rvalue.cpp
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
M clang/test/CIR/CodeGenCUDA/surface.cu
M clang/test/CIR/CodeGenCXX/init-priority-attr.cpp
M clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CIR/CodeGenCXX/typeid-should-throw.cpp
M clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
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A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250-load-tr.hip
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A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx9.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950-read-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w32.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w64.hip
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A clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
M clang/test/CIR/CodeGenHIP/ternary-struct-addrspace.hip
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
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M clang/test/CIR/CodeGenOpenACC/combined-copyin-copyout-create.c
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M clang/test/CIR/CodeGenOpenACC/compute-copy.c
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M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceptr.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
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M clang/test/CIR/CodeGenOpenACC/kernels.c
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M clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
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M clang/test/CIR/CodeGenOpenACC/routine-locals.cpp
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A clang/test/CIR/IR/version.cir
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M clang/test/CIR/Lowering/goto.cir
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A clang/test/CIR/Lowering/opencl-version-metadata.cir
M clang/test/CIR/Lowering/poison.cir
M clang/test/CIR/Lowering/select.cir
M clang/test/CIR/Lowering/strictfp.cir
M clang/test/CIR/Lowering/ternary.cir
A clang/test/CIR/Lowering/unlowered-address-spaces.cir
M clang/test/CIR/Tools/warn-default-triple.cir
M clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
A clang/test/CIR/Transforms/abi-lowering/dropped-return-res-attrs.cir
M clang/test/CIR/Transforms/abi-lowering/expand-struct-arg.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-byref-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-bitint.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-empty-class.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-int-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-record-packed.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-padded.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
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M clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
A clang/test/CIR/Transforms/eh-abi-lowering-eh-spec-nyi.cir
A clang/test/CIR/Transforms/flatten-eh-spec.cir
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M clang/test/CIR/Transforms/lib-opt.cpp
M clang/test/CIR/lib/Analysis/CMakeLists.txt
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
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A clang/test/CodeGen/AArch64/neon/rounding.c
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M clang/test/CodeGen/AArch64/targetattr.c
R clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
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A clang/test/CodeGen/ARM/matrix-hfa.c
A clang/test/CodeGen/Inputs/riscv-ilp32e-no-datalayout.ll
A clang/test/CodeGen/LoongArch/target-abi-module-flag.c
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A clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c
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A clang/test/CodeGen/PowerPC/matrix-hfa.c
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M clang/test/CodeGen/RISCV/riscv-cf-protection.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vzip.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipo.c
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M clang/test/CodeGen/attr-counted-by-without-sanitizers.c
M clang/test/CodeGen/attr-sized-by-for-pointers.c
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A clang/test/CodeGen/builtin-frame-address-arg-type.c
A clang/test/CodeGen/builtin-prefetch-arg-type.c
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M clang/test/CodeGen/builtins-arm64.c
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/compound-literal-lifetime.c
A clang/test/CodeGen/exception-model-flag.c
A clang/test/CodeGen/keep-inline-functions.c
A clang/test/CodeGen/keep-inline-functions.cpp
A clang/test/CodeGen/keep-inline-functions.cppm
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/ms-setjmp.c
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A clang/test/CodeGen/riscv-ir-datalayout-preserve.ll
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A clang/test/CodeGen/thread-model.c
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A clang/test/CodeGenCUDA/pure_deleted_virtual.cu
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A clang/test/CodeGenCXX/GH128985.cpp
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M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
A clang/test/PCH/flag-enum.c
M clang/test/Parser/cxx-extra-semi.cpp
M clang/test/Parser/cxx2c-delete-with-message.cpp
M clang/test/Preprocessor/riscv-cf-protection-return.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/Sema/attr-c2x.c
M clang/test/Sema/attr-overflow-behavior.cpp
M clang/test/Sema/builtin-prefetch.c
M clang/test/Sema/builtins.c
M clang/test/Sema/c2x-attr.c
M clang/test/Sema/compare.c
M clang/test/Sema/constant-conversion.c
M clang/test/Sema/fixed-enum.c
M clang/test/Sema/for.c
A clang/test/Sema/overflow-behavior-atomic.c
A clang/test/Sema/overflow-behavior-qualifiers.c
M clang/test/Sema/pre-c2x-restrict-qualifier.c
A clang/test/Sema/riscv-pset-index-out-of-range.c
A clang/test/Sema/riscv-pst-pointer-types.c
M clang/test/Sema/scope-check.c
M clang/test/Sema/typo-correction.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/Sema/warn-strlcpycat-size.c
M clang/test/SemaCUDA/global-initializers.cu
A clang/test/SemaCXX/GH128985.cpp
A clang/test/SemaCXX/altivec-vec-msum-p9.cpp
M clang/test/SemaCXX/blocks.cpp
M clang/test/SemaCXX/builtin_vectorelements.cpp
M clang/test/SemaCXX/concept-crash-on-diagnostic.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/ctad.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
M clang/test/SemaCXX/cxx98-compat-pedantic.cpp
M clang/test/SemaCXX/cxx98-compat.cpp
M clang/test/SemaCXX/delete-non-virtual-dtor.cpp
M clang/test/SemaCXX/dllexport.cpp
M clang/test/SemaCXX/dllimport.cpp
M clang/test/SemaCXX/enum.cpp
A clang/test/SemaCXX/imag-lvalue-with-non-complex-operand.cpp
M clang/test/SemaCXX/matrix-type.cpp
M clang/test/SemaCXX/ms-ctor-closure.cpp
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaCXX/ptrauth-type-discriminator.cpp
M clang/test/SemaCXX/reinterpret-fn-obj-pedantic.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
A clang/test/SemaCXX/vector-shuffle.cpp
M clang/test/SemaCXX/warn-shadow.cpp
A clang/test/SemaHIP/atomic-init.hip
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_gather-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_load-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_sample-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmp.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ms.input.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ps.output.hlsl
M clang/test/SemaHLSL/Semantics/groupindex.hlsl
M clang/test/SemaHLSL/Semantics/invalid_entry_parameter.hlsl
A clang/test/SemaHLSL/Semantics/output-parameters.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
A clang/test/SemaHLSL/Semantics/semantic-indexing.hlsl
M clang/test/SemaHLSL/Semantics/target.ps.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.output.hlsl
M clang/test/SemaHLSL/Semantics/vertexid.ps.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
A clang/test/SemaOpenCLCXX/vec_step.clcpp
M clang/test/SemaTemplate/class-template-spec.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/test/lit.cfg.py
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-lsp-server/cir-lsp-server.cpp
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
M clang/unittests/CodeGen/CMakeLists.txt
A clang/unittests/CodeGen/QualTypeMapperTest.cpp
M clang/unittests/Format/FormatTestMacroExpansion.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowWPATest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageWPATest.cpp
M clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/asan/asan_win_common_runtime_thunk.h
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMerge.cpp
M compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_hsa.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_image.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload_opcodes.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_rpc.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload_rpc.h
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.h
M compiler-rt/lib/scudo/standalone/release.h
M compiler-rt/lib/scudo/standalone/tests/release_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/ubsan/CMakeLists.txt
A compiler-rt/lib/ubsan/offload/CMakeLists.txt
A compiler-rt/lib/ubsan/offload/ubsan_offload.h
A compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_report.cpp
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/lib/ubsan/ubsan_diag.h
M compiler-rt/lib/ubsan/ubsan_handlers.cpp
A compiler-rt/lib/ubsan/ubsan_handlers_internal.h
M compiler-rt/lib/ubsan/ubsan_interface.inc
A compiler-rt/lib/ubsan/ubsan_offload.cpp
A compiler-rt/lib/ubsan/ubsan_offload_checks.inc
A compiler-rt/lib/ubsan/ubsan_offload_packet.h
M compiler-rt/lib/ubsan/ubsan_value.h
M compiler-rt/resources/windows_version_resource.rc
M compiler-rt/test/CMakeLists.txt
A compiler-rt/test/Inputs/hip.h
M compiler-rt/test/asan/TestCases/complete_stack_trace.c
A compiler-rt/test/fuzzer/MinimizeCrashCustomMutatorTest.cpp
M compiler-rt/test/fuzzer/fuzzer-dirs.test
M compiler-rt/test/fuzzer/fuzzer-finalstats.test
M compiler-rt/test/fuzzer/fuzzer-oom-with-profile.test
M compiler-rt/test/fuzzer/fuzzer-oom.test
A compiler-rt/test/fuzzer/minimize_crash_custom_mutator.test
M compiler-rt/test/fuzzer/stop-file.test
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lit.common.configured.in
M compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions-stress-test-tower.cpp
M compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M compiler-rt/test/orc/TestCases/Darwin/Generic/llvm-jitlink-force-link-objc.m
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-category.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-cross-file-method-call.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-nonlazy-class.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S
M compiler-rt/test/orc/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/orc/lit.cfg.py
M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-warnings.ll
M compiler-rt/test/profile/lit.cfg.py
A compiler-rt/test/sanitizer_common/TestCases/Linux/opendir_null.cpp
R compiler-rt/test/sanitizer_common/TestCases/Posix/opendir_null.cpp
A compiler-rt/test/tsan/Darwin/os_unfair_lock_deadlock.c
A compiler-rt/test/tsan/Darwin/trylock_no_deadlock.c
M compiler-rt/test/tsan/Darwin/write-interpose.c
A compiler-rt/test/tsan/Linux/epoll_oneshot_norace.cpp
A compiler-rt/test/ubsan/AMDGPU/abort.hip
A compiler-rt/test/ubsan/AMDGPU/dedup.hip
A compiler-rt/test/ubsan/AMDGPU/host-and-device.hip
A compiler-rt/test/ubsan/AMDGPU/lit.local.cfg.py
A compiler-rt/test/ubsan/AMDGPU/openmp-overflow.cpp
A compiler-rt/test/ubsan/AMDGPU/overflow-i128.hip
A compiler-rt/test/ubsan/AMDGPU/overflow.hip
A compiler-rt/test/ubsan/AMDGPU/shift.hip
M compiler-rt/test/ubsan/lit.common.cfg.py
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/include/flang-rt/runtime/stat.h
A flang-rt/include/flang-rt/runtime/unit.h
M flang-rt/lib/cuda/allocatable.cpp
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/execute.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api-common.h
M flang-rt/lib/runtime/io-api-minimal.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt-minimal.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/stat.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/unit-map.h
M flang-rt/lib/runtime/unit.cpp
R flang-rt/lib/runtime/unit.h
A flang-rt/test/Driver/iotype.f90
M flang-rt/unittests/Runtime/CMakeLists.txt
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
A flang-rt/unittests/Runtime/ChildIO.cpp
M flang/CMakeLists.txt
M flang/docs/Extensions.md
M flang/docs/Intrinsics.md
A flang/docs/MeetingNotes/2026/2026-09-09.md
M flang/docs/OpenACC-extensions.md
M flang/docs/OpenMP-declare-target.md
M flang/docs/OpenMPSupport.md
M flang/include/flang/Evaluate/common.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
A flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.h
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/HLFIR/Passes.h
M flang/include/flang/Optimizer/HLFIR/Passes.td
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
A flang/include/flang/Optimizer/Support/AllocationPolicy.h
R flang/include/flang/Optimizer/Transforms/AllocationPlacementPolicy.h
M flang/include/flang/Optimizer/Transforms/FIRToMemRefTypeConverter.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/CUDA/allocatable.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Support/LangOptions.def
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
A flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/FIRCG/CMakeLists.txt
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRCopy.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCRecipeBufferization.cpp
M flang/lib/Optimizer/OpenMP/AutomapToTargetData.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/UnimplementedDeviceCheck.cpp
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/lib/Optimizer/Support/AllocationPolicy.cpp
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-namelist.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/type.cpp
M flang/lib/Utils/OpenMP.cpp
A flang/test/Driver/allocation-policy.f90
M flang/test/Driver/atomic-control-options.f90
A flang/test/Driver/check-integer-mod-zero-divisor.f90
M flang/test/Driver/do_concurrent_to_omp_cli.f90
M flang/test/Driver/frame-pointer-forwarding.f90
M flang/test/Driver/target-cpu-features.f90
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-attach.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-privatize.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep.mlir
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
A flang/test/Fir/OpenACC/support-analysis-varname.mlir
A flang/test/Fir/allocation-policy-attr.fir
A flang/test/Fir/allocation-policy-pipeline.fir
A flang/test/Fir/call-properties.fir
M flang/test/Fir/convert-fold.fir
M flang/test/Fir/convert-nontemporal-to-llvm.fir
M flang/test/Fir/convert-to-llvm-access-group.fir
A flang/test/Fir/convert-to-llvm-unsafe-fp-conversion.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/declare-codegen.fir
M flang/test/Fir/mem2reg.mlir
M flang/test/Fir/tbaa.fir
M flang/test/Fir/vector-always-cfg.fir
A flang/test/HLFIR/inline-hlfir-copy-stack.fir
M flang/test/HLFIR/inline-hlfir-copy.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
M flang/test/Integration/OpenMP/declare-target-funcs.f90
M flang/test/Integration/OpenMP/declare-target-named-main-interface.f90
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
A flang/test/Integration/PowerPC/aix-vec-extabi.f90
M flang/test/Lower/CUDA/cuda-allocatable.cuf
A flang/test/Lower/CUDA/cuda-allocation-policy.cuf
M flang/test/Lower/CUDA/cuda-atomicadd.cuf
M flang/test/Lower/CUDA/cuda-cdevloc.cuf
M flang/test/Lower/CUDA/cuda-cluster.cuf
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-managed-func-result.cuf
M flang/test/Lower/CUDA/cuda-mod.cuf
M flang/test/Lower/CUDA/cuda-module-use.cuf
M flang/test/Lower/CUDA/cuda-proc-attribute.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/CUDA/cuda-shared.cuf
M flang/test/Lower/CUDA/cuda-synchronization.cuf
M flang/test/Lower/Intrinsics/mod.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
A flang/test/Lower/OpenACC/acc-combined-loop-firstprivate-flag.f90
M flang/test/Lower/OpenACC/acc-declare-globals.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/threadset.f90
A flang/test/Lower/OpenMP/close-map-derived-members.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
A flang/test/Lower/OpenMP/declare-target-entry-iface.f90
M flang/test/Lower/OpenMP/declare-target-interface.f90
R flang/test/Lower/OpenMP/declare-target-multiple-entry.f90
M flang/test/Lower/OpenMP/default-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/host-eval.f90
A flang/test/Lower/OpenMP/implicit-default-mapper-allocatable-field.f90
M flang/test/Lower/OpenMP/implicit-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/mismatched-bound-types.f90
A flang/test/Lower/OpenMP/omp-lib-integer-wrappers.f90
A flang/test/Lower/OpenMP/target-data-use-device-addr-descriptor.f90
A flang/test/Lower/OpenMP/target-spmd-reduction.f90
M flang/test/Lower/OpenMP/target_cpu_features.f90
A flang/test/Lower/OpenMP/threadset.f90
A flang/test/Lower/OpenMP/trailing-cycle.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/main_location.f90
M flang/test/Lower/module-parameter-linkonce-odr.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
A flang/test/Lower/split-sum-expression-tree-subscripts.f90
A flang/test/Lower/trailing-cycle.f90
A flang/test/Parser/recovery10.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure-version.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure.f90
M flang/test/Semantics/OpenMP/map-modifiers.f90
M flang/test/Semantics/OpenMP/pure-procedure.f90
A flang/test/Semantics/OpenMP/threadset-clause-v60.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
A flang/test/Semantics/enumeration-type-intrinsics-array-fold.f90
A flang/test/Semantics/enumeration-type-intrinsics-gating.f90
A flang/test/Semantics/enumeration-type-intrinsics-keyword.f90
A flang/test/Semantics/enumeration-type-intrinsics-nonenum.f90
A flang/test/Semantics/enumeration-type-intrinsics.f90
A flang/test/Semantics/enumeration-type-io-pdt-order.f90
A flang/test/Semantics/enumeration-type-io.f90
A flang/test/Semantics/enumeration-type-mod-readback.F90
A flang/test/Semantics/enumeration-type-mod.f90
M flang/test/Semantics/resolve46.f90
M flang/test/Semantics/resolve94.f90
A flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M flang/test/Transforms/allocation-placement.fir
A flang/test/Transforms/allocation-policy-precedence.fir
A flang/test/Transforms/debug-cuf-device-variable.fir
A flang/test/Transforms/function-attr-frame-pointer.fir
M flang/test/Transforms/licm.fir
R flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
R flang/test/Transforms/omp-map-info-finalization-usm.fir
A flang/test/Transforms/stack-arrays-policy-opt-out.fir
M flang/test/lib/OpenACC/CMakeLists.txt
A flang/test/lib/OpenACC/TestOpenACCSupport.cpp
M flang/tools/fir-opt/fir-opt.cpp
M flang/unittests/Optimizer/OpenACC/FIROpenACCPointerLikeTypeInterfaceTest.cpp
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/aarch64/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/dev/code_coverage.md
M libc/docs/headers/stdfix.rst
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/hdr/CMakeLists.txt
A libc/hdr/glob_macros.h
A libc/hdr/sys_file_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/glob_t.h
A libc/hdr/types/off64_t.h
M libc/include/CMakeLists.txt
M libc/include/fcntl.yaml
A libc/include/glob.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/darwin/CMakeLists.txt
A libc/include/llvm-libc-macros/darwin/signal-macros.h
A libc/include/llvm-libc-macros/glob-macros.h
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/sys-file-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-macros/signal-macros.h
A libc/include/llvm-libc-macros/sys-file-macros.h
M libc/include/llvm-libc-macros/sys-mman-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/__jmp_buf.h
M libc/include/llvm-libc-types/cookie_io_functions_t.h
M libc/include/llvm-libc-types/fenv_t.h
A libc/include/llvm-libc-types/glob_t.h
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/include/signal.yaml
M libc/include/stdfix.yaml
M libc/include/stdio.yaml
M libc/include/stdlib.yaml
A libc/include/sys/file.yaml
M libc/include/sys/mman.yaml
M libc/include/sys/stat.yaml
M libc/include/unistd.yaml
M libc/include/wchar.yaml
M libc/src/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
A libc/src/__support/CPP/vector.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/float80.h
M libc/src/__support/File/file.cpp
M libc/src/__support/File/file.h
A libc/src/__support/File/file_mode.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/File/linux/file.h
A libc/src/__support/File/linux/file_flags.h
M libc/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/sigprocmask.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/fchmodat.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/flock.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/mknodat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/posix_fadvise.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/raise.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/tgkill.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/umask.h
M libc/src/__support/big_int.h
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/__support/macros/properties/cpu_features.h
M libc/src/__support/math/cos.h
M libc/src/__support/math/sin.h
M libc/src/__support/math_extras.h
M libc/src/__support/printf_core/CMakeLists.txt
M libc/src/__support/printf_core/core_structs.h
M libc/src/__support/printf_core/parser.h
M libc/src/__support/printf_core/printf_main.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/aarch64/tcb.h
M libc/src/__support/threads/linux/riscv/tcb.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/linux/x86_64/tcb.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/threads/thread_attributes.h
M libc/src/__support/tlsf_table.h
M libc/src/__support/wctype_utils.h
M libc/src/fcntl/CMakeLists.txt
M libc/src/fcntl/linux/CMakeLists.txt
A libc/src/fcntl/linux/posix_fadvise64.cpp
A libc/src/fcntl/posix_fadvise64.h
A libc/src/glob/CMakeLists.txt
A libc/src/glob/glob.cpp
A libc/src/glob/glob.h
A libc/src/glob/globfree.cpp
A libc/src/glob/globfree.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getinheritsched.cpp
A libc/src/pthread/pthread_attr_getinheritsched.h
M libc/src/pthread/pthread_attr_getschedparam.cpp
M libc/src/pthread/pthread_attr_getschedparam.h
A libc/src/pthread/pthread_attr_getschedpolicy.cpp
A libc/src/pthread/pthread_attr_getschedpolicy.h
A libc/src/pthread/pthread_attr_getscope.cpp
A libc/src/pthread/pthread_attr_getscope.h
M libc/src/pthread/pthread_attr_init.cpp
M libc/src/pthread/pthread_attr_init.h
A libc/src/pthread/pthread_attr_setinheritsched.cpp
A libc/src/pthread/pthread_attr_setinheritsched.h
M libc/src/pthread/pthread_attr_setschedparam.cpp
M libc/src/pthread/pthread_attr_setschedparam.h
A libc/src/pthread/pthread_attr_setschedpolicy.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.h
A libc/src/pthread/pthread_attr_setscope.cpp
A libc/src/pthread/pthread_attr_setscope.h
M libc/src/setjmp/aarch64/sigsetjmp.cpp
M libc/src/setjmp/darwin/CMakeLists.txt
M libc/src/setjmp/darwin/sigsetjmp_epilogue.cpp
M libc/src/setjmp/longjmp.h
M libc/src/setjmp/setjmp_impl.h
M libc/src/signal/CMakeLists.txt
A libc/src/signal/darwin/CMakeLists.txt
A libc/src/signal/darwin/sigaddset.cpp
A libc/src/signal/darwin/sigdelset.cpp
A libc/src/signal/darwin/sigemptyset.cpp
A libc/src/signal/darwin/sigfillset.cpp
A libc/src/signal/darwin/sigprocmask.cpp
M libc/src/signal/linux/CMakeLists.txt
A libc/src/signal/linux/pthread_kill.cpp
A libc/src/signal/pthread_kill.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/kdivi.cpp
A libc/src/stdfix/kdivi.h
A libc/src/stdfix/lkdivi.cpp
A libc/src/stdfix/lkdivi.h
A libc/src/stdfix/lrdivi.cpp
A libc/src/stdfix/lrdivi.h
M libc/src/stdfix/rdivi.cpp
M libc/src/stdfix/rdivi.h
A libc/src/stdfix/ukdivi.cpp
A libc/src/stdfix/ukdivi.h
A libc/src/stdfix/ulkdivi.cpp
A libc/src/stdfix/ulkdivi.h
A libc/src/stdfix/ulrdivi.cpp
A libc/src/stdfix/ulrdivi.h
A libc/src/stdfix/urdivi.cpp
A libc/src/stdfix/urdivi.h
M libc/src/stdio/CMakeLists.txt
A libc/src/stdio/fmemopen.cpp
A libc/src/stdio/fmemopen.h
M libc/src/stdio/fopencookie.cpp
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdio/linux/stderr.cpp
M libc/src/stdio/linux/stdin.cpp
M libc/src/stdio/linux/stdout.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/exit.cpp
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/mkdtemp.cpp
A libc/src/stdlib/linux/mkstemp.cpp
A libc/src/stdlib/linux/mktemp_util.h
A libc/src/stdlib/mkdtemp.h
R libc/src/stdlib/mkstemp.cpp
M libc/src/stdlib/mkstemp.h
M libc/src/string/memory_utils/op_generic.h
M libc/src/sys/CMakeLists.txt
A libc/src/sys/file/CMakeLists.txt
A libc/src/sys/file/flock.h
A libc/src/sys/file/linux/CMakeLists.txt
A libc/src/sys/file/linux/flock.cpp
M libc/src/sys/sendfile/linux/sendfile.cpp
M libc/src/sys/stat/CMakeLists.txt
A libc/src/sys/stat/futimens.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/fchmodat.cpp
A libc/src/sys/stat/linux/futimens.cpp
A libc/src/sys/stat/linux/mkfifo.cpp
A libc/src/sys/stat/linux/umask.cpp
A libc/src/sys/stat/mkfifo.h
A libc/src/sys/stat/umask.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/execv.cpp
M libc/src/unistd/linux/execve.cpp
M libc/src/unistd/linux/sysconf.cpp
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscasecmp.cpp
A libc/src/wchar/wcscasecmp.h
A libc/src/wchar/wcsncasecmp.cpp
A libc/src/wchar/wcsncasecmp.h
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/aarch64/tls.cpp
M libc/startup/linux/do_start.cpp
M libc/startup/linux/riscv/tls.cpp
M libc/startup/linux/x86_64/tls.cpp
M libc/test/UnitTest/CMakeLists.txt
A libc/test/UnitTest/CharLiteralUtils.h
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/UnitTest/StringUtils.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_kill_test.cpp
A libc/test/integration/src/pthread/pthread_tls_align_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/stringview_test.cpp
A libc/test/src/__support/CPP/vector_test.cpp
M libc/test/src/__support/File/CMakeLists.txt
A libc/test/src/__support/File/file_mode_test.cpp
M libc/test/src/__support/File/file_test.cpp
A libc/test/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/test/src/__support/OSUtil/darwin/sigprocmask_test.cpp
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/parser_test.cpp
M libc/test/src/__support/printf_core/writer_test.cpp
M libc/test/src/__support/tlsf_table_test.cpp
M libc/test/src/__support/wctype_utils_test.cpp
M libc/test/src/fcntl/CMakeLists.txt
A libc/test/src/fcntl/posix_fadvise64_test.cpp
M libc/test/src/fcntl/posix_fadvise_test.cpp
A libc/test/src/glob/CMakeLists.txt
A libc/test/src/glob/glob_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/cos.bin
A libc/test/src/math/exhaustive/cos.wc
A libc/test/src/math/exhaustive/cos_test.cpp
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/math/exhaustive/exhaustive_test_static_rounding.h
A libc/test/src/math/exhaustive/sin.bin
A libc/test/src/math/exhaustive/sin.wc
A libc/test/src/math/exhaustive/sin_test.cpp
A libc/test/src/math/exhaustive/worst_case_test.h
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
M libc/test/src/signal/sigaddset_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
M libc/test/src/stdfix/CMakeLists.txt
R libc/test/src/stdfix/DivITest.h
A libc/test/src/stdfix/FxDiviTest.h
A libc/test/src/stdfix/kdivi_test.cpp
A libc/test/src/stdfix/lkdivi_test.cpp
A libc/test/src/stdfix/lrdivi_test.cpp
M libc/test/src/stdfix/rdivi_test.cpp
A libc/test/src/stdfix/ukdivi_test.cpp
A libc/test/src/stdfix/ulkdivi_test.cpp
A libc/test/src/stdfix/ulrdivi_test.cpp
A libc/test/src/stdfix/urdivi_test.cpp
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/fmemopen_test.cpp
M libc/test/src/stdio/fopencookie_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/mkdtemp_test.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/file/CMakeLists.txt
A libc/test/src/sys/file/linux/CMakeLists.txt
A libc/test/src/sys/file/linux/flock_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/msync_test.cpp
M libc/test/src/sys/mman/linux/remap_file_pages_test.cpp
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/sendfile/sendfile_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/fchmodat_test.cpp
A libc/test/src/sys/stat/futimens_test.cpp
A libc/test/src/sys/stat/mkfifo_test.cpp
A libc/test/src/sys/stat/umask_test.cpp
M libc/test/src/unistd/sysconf_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscasecmp_test.cpp
A libc/test/src/wchar/wcsncasecmp_test.cpp
M libc/utils/cmake_format.py
M libc/utils/cmake_format_test.py
M libc/utils/docgen/wchar.yaml
A libc/utils/mathtools/wc_to_bin.py
M libclc/clc/lib/generic/math/clc_fmod.cl
M libcxx/CMakeLists.txt
M libcxx/cmake/caches/Apple.cmake
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/docs/Status/Cxx29Papers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/find_if.h
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__assert
M libcxx/include/__atomic/to_gcc_order.h
A libcxx/include/__bit/shift.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/compiler.h
M libcxx/include/__configuration/language.h
M libcxx/include/__hash_table
M libcxx/include/__locale_dir/ctype_base.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/aix.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/llvm_libc.h
M libcxx/include/__locale_dir/support/newlib.h
M libcxx/include/__locale_dir/support/openbsd.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/include/__locale_dir/wbuffer_convert.h
M libcxx/include/__locale_dir/wstring_convert.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/__new/align_val_t.h
M libcxx/include/__new/global_new_delete.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/minmax_element.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/__tree
A libcxx/include/__utility/assume.h
M libcxx/include/__utility/declval.h
M libcxx/include/__utility/try_key_extraction.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/barrier
M libcxx/include/bit
M libcxx/include/condition_variable
M libcxx/include/deque
M libcxx/include/locale
M libcxx/include/module.modulemap.in
M libcxx/include/mutex
M libcxx/include/shared_mutex
M libcxx/include/string
M libcxx/include/vector
M libcxx/include/version
M libcxx/modules/std/bit.inc
M libcxx/src/include/aligned_alloc.h
M libcxx/src/locale.cpp
M libcxx/src/support/new.ipp
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
M libcxx/test/benchmarks/containers/associative/flat_map.bench.cpp
M libcxx/test/benchmarks/containers/associative/flat_multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/multiset.bench.cpp
M libcxx/test/benchmarks/containers/associative/set.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_multiset.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_set.bench.cpp
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.libdispatch.chunk_partitions.pass.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/libcxx/algorithms/unaligned_empty_range.pass.cpp
M libcxx/test/libcxx/assertions/single_expression.pass.cpp
M libcxx/test/libcxx/atomics/clear_padding.pass.cpp
M libcxx/test/libcxx/containers/sequences/deque/nodiscard.verify.cpp
R libcxx/test/libcxx/diagnostics/unused_variables.compile.pass.cpp
R libcxx/test/libcxx/diagnostics/unused_variables.verify.cpp
M libcxx/test/libcxx/thread/nodiscard.verify.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.ctor.pass.cpp
A libcxx/test/libcxx/unused_variables.compile.pass.cpp
A libcxx/test/libcxx/unused_variables.verify.cpp
M libcxx/test/libcxx/utilities/bit/nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_until_comp.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element_comp.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
M libcxx/test/std/containers/associative/set/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace_back.pass.cpp
M libcxx/test/std/containers/unord/unord.set/emplace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.except.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.except.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align.except.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.except.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/bit.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/ctor.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_codecvt.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_err_string.pass.cpp
A libcxx/test/std/numerics/bit/bitops.shift/shl.pass.cpp
A libcxx/test/std/numerics/bit/bitops.shift/shr.pass.cpp
M libcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_result_type.pass.cpp
M libcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_sseq.pass.cpp
M libcxx/test/std/thread/thread.condition/thread.condition.condvarany/default.pass.cpp
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.verify.cpp
M libcxx/test/std/utilities/variant/variant.relops/three_way.pass.cpp
M libcxx/test/support/test_macros.h
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/features/libcxx_macros.py
M libcxxabi/src/fallback_malloc.cpp
M libcxxabi/src/private_typeinfo.cpp
M libsycl/Maintainers.md
M libsycl/docs/index.md
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/exception.hpp
A libsycl/include/sycl/__impl/group_barrier.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
A libsycl/include/sycl/__spirv/spirv_types.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/exception.cpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
A libsycl/test/basic/context.cpp
A libsycl/test/basic/group_barrier.cpp
A libsycl/test/basic/group_barrier_device_code.cpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/unittests/CMakeLists.txt
A libsycl/unittests/context/CMakeLists.txt
A libsycl/unittests/context/context_ctors.cpp
A libsycl/unittests/exception/CMakeLists.txt
A libsycl/unittests/exception/exception.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/program_manager/CMakeLists.txt
A libsycl/unittests/program_manager/program_cache.cpp
M libsycl/unittests/queue/queue.cpp
A libsycl/unittests/usm/CMakeLists.txt
A libsycl/unittests/usm/alloc.cpp
M libunwind/test/dwarf_expression_stack.pass.cpp
M lld/.clang-format
M lld/Common/CommonLinkerContext.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/Options.td
M lld/MachO/SyntheticSections.cpp
M lld/docs/MachO/ld64-vs-lld.md
M lld/docs/ReleaseNotes.md
M lld/test/ELF/driver.test
A lld/test/ELF/dynamic-debug.test
R lld/test/ELF/dynamic-list-cpp.s
M lld/test/ELF/dynamic-list-glob.s
R lld/test/ELF/early-exit-for-bad-paths.s
A lld/test/ELF/invalid-dynamic-debug.test
M lld/test/ELF/lto/riscv-target-abi.ll
M lld/test/ELF/map-file.s
A lld/test/ELF/trace-symbols-dynamic-debug.test
R lld/test/ELF/version-script-reassign-glob.s
A lld/test/ELF/version-script-wildcard-precedence.s
A lld/test/MachO/arm64-x1.s
A lld/test/MachO/warn-missing-subsections-via-symbols.s
M lldb/bindings/interface/SBCompileUnitDocstrings.i
M lldb/bindings/interface/SBValueDocstrings.i
M lldb/bindings/python/get-python-config.py
M lldb/cmake/modules/FindCursesAndPanel.cmake
M lldb/cmake/modules/FindLuaAndSwig.cmake
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/include/lldb/API/SBExpressionOptions.h
M lldb/include/lldb/API/SBFile.h
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/Breakpoint/StopPointSiteList.h
M lldb/include/lldb/Core/DumpRegisterValue.h
M lldb/include/lldb/Host/HostInfo.h
M lldb/include/lldb/Host/SafeMachO.h
A lldb/include/lldb/Host/emscripten/HostInfoEmscripten.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedFrameInterface.h
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/include/lldb/Target/Memory.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/include/lldb/ValueObject/ValueObjectRegister.h
A lldb/include/lldb/ValueObject/ValueObjectSynthesizedValue.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/configuration.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
R lldb/scripts/convert-lldb-header-to-rpc-header.py
M lldb/scripts/framework-header-fix.py
M lldb/source/API/CMakeLists.txt
M lldb/source/API/SBCompileUnit.cpp
M lldb/source/API/SBExpressionOptions.cpp
M lldb/source/API/SBFile.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Commands/CommandObjectRegister.cpp
M lldb/source/Core/DumpRegisterValue.cpp
M lldb/source/Core/Value.cpp
M lldb/source/Host/CMakeLists.txt
M lldb/source/Host/common/Host.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/common/XML.cpp
A lldb/source/Host/emscripten/Host.cpp
A lldb/source/Host/emscripten/HostInfoEmscripten.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/CMakeLists.txt
A lldb/source/Plugins/Platform/Emscripten/CMakeLists.txt
A lldb/source/Plugins/Platform/Emscripten/PlatformEmscripten.cpp
A lldb/source/Plugins/Platform/Emscripten/PlatformEmscripten.h
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
A lldb/source/Plugins/Process/Windows/Common/LoadedModuleList.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.cpp
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.cpp
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.h
M lldb/source/Symbol/SymbolFile.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/Target/Memory.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Utility/RegisterValue.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/source/ValueObject/CMakeLists.txt
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
A lldb/source/ValueObject/ValueObjectSynthesizedValue.cpp
A lldb/test/API/accelerator/mock/TestMockAcceleratorAddressSpaces.py
A lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/Makefile
A lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/TestCreateValueFromExpression.py
A lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/main.cpp
M lldb/test/API/functionalities/breakpoint/write_over_software_breakpoint/TestWriteOverSoftwareBreakpoint.py
M lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
A lldb/test/API/functionalities/gdb_remote_client/TestBreakpointNotHit.py
M lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterVector.py
M lldb/test/API/functionalities/inline-sourcefile/inline.ll
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManyBreakpoints.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManySignals.py
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/Makefile
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/TestStepThroughTrampolineWithSymbol.py
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/add.c
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/add.h
A lldb/test/API/lang/c/step-through-trampoline-with-symbol/main.c
A lldb/test/API/macosx/expedited-recent-reads/Makefile
A lldb/test/API/macosx/expedited-recent-reads/TestExpeditedRecentReads.py
A lldb/test/API/macosx/expedited-recent-reads/main.c
M lldb/test/API/python_api/compile_unit/Makefile
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
A lldb/test/API/python_api/compile_unit/other.c
M lldb/test/API/python_api/value/TestValueAPI.py
M lldb/test/API/symstore/TestSymStore.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_logpoints.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/API/tools/lldb-dap/stackTrace/Makefile
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
A lldb/test/API/tools/lldb-dap/stackTrace/other.c
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_Types.py
M lldb/test/CMakeLists.txt
R lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckBasicIncludesEmit.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckConstCharPointer.h
R lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckBasicIncludesEmit.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckConstCharPointer.test
R lldb/test/Shell/RPC/Generator/lit.local.cfg
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBEnumerations.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBTypes.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckSBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/SBDefines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-defines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-enumerations.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-types.h
R lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
M lldb/test/Shell/Scripts/TestFrameworkFixScript.test
M lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
R lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
A lldb/test/Shell/SymbolFile/DWARF/missing-oso.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/AstRestoreTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CallingConventionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ClassLayoutTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CompilandsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest0.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest1.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.h
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.ord
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionNestedBlockTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/PointerTypeTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/SimpleTypesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/TypeQualsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/add-symbols.cpp
A lldb/test/Shell/SymbolFile/NativePDB/ast-restore.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-arm.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-x86.test
A lldb/test/Shell/SymbolFile/NativePDB/class-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/compilands.test
A lldb/test/Shell/SymbolFile/NativePDB/enums-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/expressions.test
M lldb/test/Shell/SymbolFile/NativePDB/func-symbols.test
A lldb/test/Shell/SymbolFile/NativePDB/function-level-linking.test
A lldb/test/Shell/SymbolFile/NativePDB/function-nested-block.test
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-dia.cpp
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-no-dia.cpp
R lldb/test/Shell/SymbolFile/NativePDB/native-setting.cpp
A lldb/test/Shell/SymbolFile/NativePDB/pointers.test
A lldb/test/Shell/SymbolFile/NativePDB/type-quals.test
A lldb/test/Shell/SymbolFile/NativePDB/typedefs.test
A lldb/test/Shell/SymbolFile/NativePDB/variables-locations.test
A lldb/test/Shell/SymbolFile/NativePDB/variables.test
A lldb/test/Shell/SymbolFile/NativePDB/vbases2.test
R lldb/test/Shell/SymbolFile/PDB/Inputs/AstRestoreTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CallingConventionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ClassLayoutTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CompilandsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest0.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest1.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest2.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.h
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.ord
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionNestedBlockTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/PointerTypeTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/TypeQualsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
R lldb/test/Shell/SymbolFile/PDB/ast-restore.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-x86.test
R lldb/test/Shell/SymbolFile/PDB/class-layout.test
R lldb/test/Shell/SymbolFile/PDB/compilands.test
R lldb/test/Shell/SymbolFile/PDB/enums-layout.test
R lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
R lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
R lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
R lldb/test/Shell/SymbolFile/PDB/native-setting.cpp
R lldb/test/Shell/SymbolFile/PDB/pointers.test
R lldb/test/Shell/SymbolFile/PDB/type-quals.test
R lldb/test/Shell/SymbolFile/PDB/typedefs.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
R lldb/test/Shell/SymbolFile/PDB/variables-locations.test
R lldb/test/Shell/SymbolFile/PDB/variables.test
R lldb/test/Shell/SymbolFile/PDB/vbases.test
A lldb/test/Shell/Unwind/Inputs/signal-frame-undefined-ra.s
A lldb/test/Shell/Unwind/signal-frame-undefined-ra.test
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/debugserver/source/RNBRemote.h
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
R lldb/tools/lldb-rpc-gen/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/RPCCommon.cpp
R lldb/tools/lldb-rpc-gen/RPCCommon.h
R lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
R lldb/tools/lldb-rpc/CMakeLists.txt
R lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
R lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
M lldb/tools/lldb-server/Plugins/Accelerator/Mock/ProcessMockAccelerator.cpp
M lldb/tools/lldb-server/Plugins/Accelerator/Mock/ProcessMockAccelerator.h
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/DAP/CMakeLists.txt
M lldb/unittests/DAP/ProtocolRequestsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
A lldb/unittests/DAP/RunInTerminalTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/ObjectContainer/CMakeLists.txt
M lldb/unittests/ObjectContainer/ObjectContainerUniversalMachOTest.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
M lldb/unittests/Platform/CMakeLists.txt
A lldb/unittests/Platform/PlatformEmscriptenTest.cpp
M lldb/unittests/Process/CMakeLists.txt
A lldb/unittests/Process/Windows/CMakeLists.txt
A lldb/unittests/Process/Windows/LoadedModuleListTest.cpp
M lldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
M lldb/unittests/Target/MemoryTest.cpp
M lldb/unittests/Target/RegisterTypeBuilderClangTest.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.h
M lldb/unittests/Utility/RegisterValueTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/cmake/config-ix.cmake
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/CrossCompile.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CMake.md
M llvm/docs/CommandGuide/llvm-profdata.md
M llvm/docs/DirectX/SemanticSignatures.md
M llvm/docs/GettingInvolved.md
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/docs/GlobalISel/Legalizer.md
M llvm/docs/HowToSubmitABug.rst
M llvm/docs/LangRef.md
M llvm/docs/LibFuzzer.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/PDB/PdbStream.md
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/examples/BrainF/BrainF.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/lto.h
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/Analysis/CallGraph.h
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/RegionInfo.h
M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/TypeMetadataUtils.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/SlotIndexes.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/Config/config.h.cmake
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/CodeViewSymbols.def
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
A llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/include/llvm/Frontend/HLSL/SemanticSignatures.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h.inc
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/ConstantRange.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Object/GOFFObjectFile.h
M llvm/include/llvm/Passes/RunCodeGen.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/include/llvm/Support/Allocator.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Support/FormattedStream.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/include/llvm/Support/LEB128.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/XtensaTargetParser.def
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
M llvm/include/llvm/TextAPI/Architecture.def
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Scalar/InferAddressSpaces.h
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/include/llvm/Transforms/Utils/LowerAtomic.h
M llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
A llvm/include/llvm/Transforms/Utils/SplitModuleCommon.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DominanceFrontier.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/RegionInfo.cpp
M llvm/lib/Analysis/RuntimeLibcallInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRPrintingPass.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/DebugInfo/CodeView/SymbolDumper.cpp
M llvm/lib/DebugInfo/CodeView/SymbolRecordMapping.cpp
M llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp
M llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/EHFrameRegistrationPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
M llvm/lib/ExecutionEngine/Orc/UnwindInfoRegistrationPlugin.cpp
M llvm/lib/Frontend/HLSL/CMakeLists.txt
A llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/IR/PassManager.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/IR/VerifierInternal.h
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/MCGOFFStreamer.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/RunCodeGen.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/APFloat.cpp
A llvm/lib/Support/APFloatPowerOfFiveTable.inc
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/PrettyStackTrace.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Valgrind.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64ExpandImm.cpp
M llvm/lib/Target/AArch64/AArch64ExpandImm.h
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/AArch64/AArch64SRLTDefineSuperRegs.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARC/ARCOptAddrMode.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
R llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvzip.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/Xtensa.td
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrFormats.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaProcessors.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
A llvm/lib/Target/Xtensa/XtensaS3DSPInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h
M llvm/lib/Transforms/AggressiveInstCombine/CMakeLists.txt
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/CrossDSOCFI.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/InferAlignment.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/SizeOpts.cpp
M llvm/lib/Transforms/Utils/SplitModule.cpp
A llvm/lib/Transforms/Utils/SplitModuleCommon.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.h
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/BasicAA/call-attrs.ll
M llvm/test/Analysis/BasicAA/vscale.ll
A llvm/test/Analysis/CostModel/AArch64/load-latency-fallback.ll
M llvm/test/Analysis/CostModel/AArch64/sve-insert-extract.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/sve-vls-shuffle-extract.ll
A llvm/test/Analysis/CostModel/AArch64/vararg-intrinsic.ll
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
A llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
M llvm/test/Analysis/CostModel/ARM/shuffle.ll
A llvm/test/Analysis/CostModel/X86/arith-mulh.ll
M llvm/test/Analysis/CostModel/X86/clmul.ll
A llvm/test/Analysis/CostModel/X86/div-rem-i64.ll
A llvm/test/Analysis/CostModel/X86/div-rem-strictfp.ll
M llvm/test/Analysis/CostModel/X86/div.ll
A llvm/test/Analysis/CostModel/X86/masked-divrem.ll
A llvm/test/Analysis/CostModel/X86/pdep.ll
A llvm/test/Analysis/CostModel/X86/pext.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
M llvm/test/Analysis/CostModel/X86/size-cost.ll
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
A llvm/test/Analysis/LoopAccessAnalysis/zero-distance-mixed-width.ll
A llvm/test/Analysis/MustExecute/no-preheader.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
A llvm/test/Analysis/ScalarEvolution/pointer-iv-addrec.ll
A llvm/test/Analysis/ScalarEvolution/trip-count-stride-positive-from-guard.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/Assembler/llvm.loop.align.ll
A llvm/test/Assembler/module-flags-exception-model.ll
A llvm/test/Assembler/module-flags-thread-model.ll
M llvm/test/Bindings/OCaml/core.ml
M llvm/test/Bitcode/amdgcn-atomic.ll
M llvm/test/Bitcode/amdgpu-unsafe-fp-atomics-upgrade.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-clmul.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-insert-subvector.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunc-ssat-usat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
A llvm/test/CodeGen/AArch64/GlobalISel/localizer-tls.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-build-vector.ll
M llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
M llvm/test/CodeGen/AArch64/bcmp.ll
M llvm/test/CodeGen/AArch64/cgp-usubo.ll
M llvm/test/CodeGen/AArch64/cluster-frame-index.mir
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.ll
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.mir
A llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
A llvm/test/CodeGen/AArch64/complex-deinterleaving-fmf-intersection.ll
A llvm/test/CodeGen/AArch64/conditional-subtract.ll
M llvm/test/CodeGen/AArch64/cttz-of-bool-vector-bitcast.ll
A llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/AArch64/fcvt-fixed.ll
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/i128-imm-compare-ccmp.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
A llvm/test/CodeGen/AArch64/interleaved-load-combine-crossblock.ll
A llvm/test/CodeGen/AArch64/interleaved-load-combine-may-not-return.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
A llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
A llvm/test/CodeGen/AArch64/misched-postra-only1.mir
A llvm/test/CodeGen/AArch64/misched-prera-only1.mir
A llvm/test/CodeGen/AArch64/neon-addsub-long-reassoc.ll
A llvm/test/CodeGen/AArch64/neon-implicit-zero-filling.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
A llvm/test/CodeGen/AArch64/optimization-remark-target-features.ll
M llvm/test/CodeGen/AArch64/overflow-vec.ll
M llvm/test/CodeGen/AArch64/partial-reduction-add-predicated.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/shift-mod.ll
A llvm/test/CodeGen/AArch64/sme-za-tailcall-fpdiff-align.ll
M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
A llvm/test/CodeGen/AArch64/smulh.ll
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
M llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
M llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-int-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-reductions.ll
M llvm/test/CodeGen/AArch64/sve-bf16-rounding.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sve-fp-constrained-intrinsics.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
A llvm/test/CodeGen/AArch64/sve-interleave-of-splat.ll
M llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll
A llvm/test/CodeGen/AArch64/sve-smulh.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-bit-counting.ll
A llvm/test/CodeGen/AArch64/sve-umulh.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
A llvm/test/CodeGen/AArch64/umulh.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
A llvm/test/CodeGen/AArch64/wineh-async-eh-pad-instr-size.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/and-vgpr-s32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fma-mix-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine-analysis-invalidation.ll
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-uniform-vector.ll
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-volatile.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/barrier-addrspace-dereference.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/build_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
A llvm/test/CodeGen/AMDGPU/coexec-block-carried-latency.mir
M llvm/test/CodeGen/AMDGPU/coexec-mfma-interleave-gfx950.ll
M llvm/test/CodeGen/AMDGPU/coexec-sched-ds-fifo.mir
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/default-flat-work-group-size-overrides-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
A llvm/test/CodeGen/AMDGPU/extract-hi16-true16.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-f16-hw.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
A llvm/test/CodeGen/AMDGPU/fold-fmac-to-fmaak.mir
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/frexp-inf-nan-combine.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
A llvm/test/CodeGen/AMDGPU/int_to_fp_narrow_i64.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.s.buffer.load.illegal-types.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.illegal-types.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.d16.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
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M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
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M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
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M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
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M llvm/test/CodeGen/AMDGPU/minmax.ll
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M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
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M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
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M llvm/test/CodeGen/AMDGPU/opt-vgpr-live-range-verifier-error.mir
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M llvm/test/CodeGen/AMDGPU/promote-alloca-byte-ptr-cast.ll
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M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/scmp.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
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M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-vector-shuffle.ll
M llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
A llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-gfx11.mir
A llvm/test/CodeGen/AMDGPU/si-lower-control-flow-remove-redundant-block-liveintervals.mir
M llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
A llvm/test/CodeGen/AMDGPU/si-optimize-exec-masking-andn2-wrexec.mir
M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fpext.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/ucmp.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector_rebroadcast.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
Log Message:
-----------
Rebase, improvements
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/acc42b37abb0...b3aeb4134640
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