[all-commits] [llvm/llvm-project] 081a3f: Revert "[clang][NFC] Refactor flag enum caching (#...
Adam Smith via All-commits
all-commits at lists.llvm.org
Wed Sep 16 11:48:18 PDT 2026
Branch: refs/heads/users/adams381/cir-callconv-argmem-memory-effects
Home: https://github.com/llvm/llvm-project
Commit: 081a3f0ca08e60747bf90620c0644af44321b9a4
https://github.com/llvm/llvm-project/commit/081a3f0ca08e60747bf90620c0644af44321b9a4
Author: Avi Kivity <avi at scylladb.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
A clang/test/PCH/flag-enum.c
Log Message:
-----------
Revert "[clang][NFC] Refactor flag enum caching (#210632)" (#223244)
This reverts commit f5437c4d4f2e9920614d856158d9683d650acffa.
That change moved population of Sema::FlagBitsCache out of
IsValueInFlagEnum and into ActOnEnumBody, and turned the lookup into
DenseMap::at(). ActOnEnumBody only runs for enum definitions that are
parsed in the current translation unit, so an EnumDecl deserialized from
a PCH never gets a cache entry and DenseMap::at() dereferences end(),
crashing clang in builds without assertions.
A switch over any enum with the flag_enum attribute that is defined in a
PCH is enough to reproduce. The crash cannot be avoided by turning the
switch diagnostics off: unlike DiagnoseAssignmentEnum, the switch path
in ActOnFinishSwitchStmt has no Diags.isIgnored() guard, because it runs
the analysis regardless in order to record the result in the AST.
In practice this breaks any translation unit that instantiates
std::basic_regex<char> while <regex> is in a PCH, since libstdc++ marks
std::regex_constants::syntax_option_type as a flag enum and
_Compiler<_TraitsT>::_S_validate switches over it. That became reachable
with 44b33260a38c, which made clang honor the gnu:: spelling of the
attribute, but the underlying defect is the one reverted here.
Add a regression test for the PCH path. It checks the computed flag bits
rather than just the absence of a crash, so that a silently empty cache
entry fails the test instead of passing it.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
Fixes #223243
Commit: 44ebda796ec9b6a43d5bef01efe58c0c67b8c971
https://github.com/llvm/llvm-project/commit/44ebda796ec9b6a43d5bef01efe58c0c67b8c971
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-loop-extracts.ll
Log Message:
-----------
[SLP][NFC]Add a test with the overoptimistic vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223523
Commit: eb13b3f197bd2537160cc29aa56495a1117ba64e
https://github.com/llvm/llvm-project/commit/eb13b3f197bd2537160cc29aa56495a1117ba64e
Author: Florian Mayer <fmayer at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
Log Message:
-----------
[SelectionDAG] [NFC] fix inaccurate docstring (#223515)
`getNode` calls FoldBUILD_VECTOR, which simplifies all-POSION or
all-UNDEF vectors.
Commit: 020e9fe44ac8887bb3891511b801111bdf1ab6ae
https://github.com/llvm/llvm-project/commit/020e9fe44ac8887bb3891511b801111bdf1ab6ae
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-loop-extracts.ll
Log Message:
-----------
[SLP]Loop-scale the extract cost in the splat subtree keep/drop check
The unscaled extract estimate kept extract-heavy subtrees in hot loops,
rejecting profitable trees.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223524
Commit: e5d9e4d7d3208dd2450f185d30c383a1806383b8
https://github.com/llvm/llvm-project/commit/e5d9e4d7d3208dd2450f185d30c383a1806383b8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/stack-protector-guard.c
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
A llvm/test/CodeGen/PowerPC/target-abi-module-flag.ll
Log Message:
-----------
PPC: Read the ELF ABI from the "target-abi" module flag (#221669)
Resolve the ELFv2 ABI from the effective ABI name module flag,
rather than strictly relying on the -target-abi flag.
Also start emitting "target-abi" for PPC from clang.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 737462135d1c9c854484e2fac4eade107cf3b7fa
https://github.com/llvm/llvm-project/commit/737462135d1c9c854484e2fac4eade107cf3b7fa
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp-gfx1170.mlir
A mlir/test/Conversion/AMDGPUToROCDL/lds-barrier-gfx90c.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/permlane.mlir
M mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
Log Message:
-----------
[mlir][AMDGPU][NFC] Pre-commit tests for incorrect version checks (#220104)
There'll be a refactoring from `amdgpu::Chipset` to
`ROCDL::TargetInfo`, thus also moving from chip version checks to
features checks. This commit adds tests for incorrect lowerings that
were allowed by the current code.
- gfx90c is >= gfx90a but stil needs atomic emulation (it doesn't
have buffer fmax and so on).
- gfx90c is also >= gfx90a but has no barrier back-off, so it needs
the inline asm workaround around `s_barrier` that it isn't getting
- gfx908 doesn't have a packed fp16 atomic add but we thought it did
- gfx950 is mistakenly allowing xf32 MFMAs
- gfx1200 is allowing permlane_swap instructions that it doesn't have
- gfx11.7 should be allowing OCP FP8 conversions but isn't on the list
This also cleans up some redundant tests with a --check-prefixes
AI disclosure: Claude found these and wrote the tests.
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 3b479f9529d605b3c05337a62fae04bd4f7e0495
https://github.com/llvm/llvm-project/commit/3b479f9529d605b3c05337a62fae04bd4f7e0495
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Lower/LoweringOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/acc-combined-loop-firstprivate-flag.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
Log Message:
-----------
[flang][openacc] Attach firstprivate scalar onto combined parallel loop (#222777)
Combined `parallel loop firstprivate` currently puts firstprivate only
on `acc.parallel`, the compute region. Independent iterations then share
that one copy when v is updated. Attach also an implicit loop
firstprivate whose varPtr is the remapped compute copy.
Attach only when: 1) the loop is combined parallel loop, 2) and
independent (the default; not seq/auto), and 3) the firstprivate is an
OpenACC scalar. Arrays, sections, derived/character/boxed types, serial
loop, and non-combined parallel+loop stay compute-only.
Commit: 2b680eecc9f7fad9fee351219aa3c45320f609ea
https://github.com/llvm/llvm-project/commit/2b680eecc9f7fad9fee351219aa3c45320f609ea
Author: Bruno De Fraine <bruno.defraine at globalfoundries.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/RegionInfo.h
M llvm/lib/Analysis/DominanceFrontier.cpp
M llvm/lib/Analysis/RegionInfo.cpp
Log Message:
-----------
[Analysis] Fix GCC warnings on ABI annotations (#222286)
The GCC build is cluttered by type attribute warnings on some header
files:
```
llvm/include/llvm/Analysis/RegionInfo.h:898:41: warning: type attributes ignored after type is already defined [-Wattributes]
898 | extern template class LLVM_TEMPLATE_ABI RegionBase<RegionTraits<Function>>;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
The type attributes originate from PR #199019. The warnings occur
because the
specific template instantiation is triggered implicitly earlier, without
the
type attribute. This can be fixed by placing the extern template
declaration
before the implicit use.
Also, the implementation files were using `LLVM_TEMPLATE_ABI` instead of
`LLVM_EXPORT_TEMPLATE`, contrary to the guidance in
`llvm/docs/InterfaceExportAnnotations.rst` ("Explicitly Instantiated
Template
Classes"). This would trigger the same type of GCC warning in the
implementation file.
Commit: 84ee9b56ba3947cacd3aff40c6dce622cc1bff6b
https://github.com/llvm/llvm-project/commit/84ee9b56ba3947cacd3aff40c6dce622cc1bff6b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
Log Message:
-----------
[VPlan] Bail out on chained reductions in handleMaxMinNumReductions. (#223521)
handleMaxMinNumReductions does not support reduction chains, as the NaN
check directly checks the operand of the single min/max reduction.
Bail out for now to fix a crash.
Fixes https://github.com/llvm/llvm-project/issues/223430.
Commit: 3f83cc8881839fa7b7a6f8ec37c5cba2e687855d
https://github.com/llvm/llvm-project/commit/3f83cc8881839fa7b7a6f8ec37c5cba2e687855d
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
Reapply "[SandboxVec][VecUtils][NFC] BndlRef helper class" (#223483) (#223487)
This reverts commit 1d073217b664263f62ff01db623ed7542fde6fda.
Commit: 3377fbdd341a30c57c7a5e3ff11aeb21f9d2e6d4
https://github.com/llvm/llvm-project/commit/3377fbdd341a30c57c7a5e3ff11aeb21f9d2e6d4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineBasicBlock.cpp
A llvm/test/CodeGen/WebAssembly/splitcriticaledge-physreg-liveness.mir
Log Message:
-----------
CodeGen: Clear physreg ranges after SplitCriticalEdge (#223172)
After critical edge spliting replaces a terminator, clear referenced
physreg ranges. The block's terminators may be replaced, and may
reference physical registers (e.g. WebAssebly's ARGUMENTS. When
LiveIntervals is available, repairIntervalsInRange only repairs virtual
registers, so the tracked physreg units were stale.
It feels like a bug that repairIntervalsInRange doesn't touch physregs,
but I've left that for a future change.
Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 4698a5193eccf41f2f81bdb4c1004b1e05811d95
https://github.com/llvm/llvm-project/commit/4698a5193eccf41f2f81bdb4c1004b1e05811d95
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/BinaryFormat/Dwarf.cpp
A llvm/test/tools/llvm-dwarfdump/AMDGPU/DW_AT_LLVM_memory_space.yaml
Log Message:
-----------
[DWARF] Add DW_MSPACE_LLVM_* memory space encodings (#220766)
DW_AT_LLVM_memory_space is already defined in Dwarf.def, and the memory
space encodings it takes are already specified in
docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst, but the values
had no names in the source, so llvm-dwarfdump printed the attribute as a
bare integer.
Add the encodings via a HANDLE_DW_MSPACE macro alongside the existing
HANDLE_DW_ASPACE, define the MemorySpace enum, and add MemorySpaceString
and getMemorySpace. AttributeValueString then resolves the attribute, so
no changes are needed in the DWARF consumers themselves.
Unlike address spaces, memory space encodings are target-independent, so
MemorySpaceString takes no triple.
Commit: 2e5fa3ac6919234d90c99a5ae943cac85a2ea727
https://github.com/llvm/llvm-project/commit/2e5fa3ac6919234d90c99a5ae943cac85a2ea727
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx9.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN fmed3 builtins (#223101)
Adds codegen for the following AMDGCN fmed3 builtins:
- __builtin_amdgcn_fmed3f (float)
- __builtin_amdgcn_fmed3h (half)
These are lowered to the corresponding `llvm.amdgcn.fmed3` intrinsic.
Commit: 8f887e33d2b18328885716bcbdc568680335f43e
https://github.com/llvm/llvm-project/commit/8f887e33d2b18328885716bcbdc568680335f43e
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/resources/Textures-Gather.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_gather-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_load-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_sample-errors.hlsl
Log Message:
-----------
[HLSL] Add CustomTypeChecking and improve sema for texture builtins (#221060)
This PR makes the texture builtins (for load, sample, gather) use
CustomTypeChecking, and adds additional semantic checks for them to make
them more strict and conform with the way sema checks are done for other
builtins.
The main benefit of CustomTypeChecking is preventing
DefaultArgumentPromotion from occurring due to the builtins being
declared `void(...)`; primarily, the promotion of float/half to double
is undesirable.
Floating-point scalar operands in codegen (`CGHLSLBuiltins.cpp`) for
these builtins always had a check and cast of the form `if
(Op->getType() != FloatTy) Op = CreateFPCast(Op, FloatTy);` to
compensate for that, which looked like a code smell to me.
The DefaultArgumentPromotion also affected diagnostics, which would
report the promoted type (double) instead of the type the user provided
(float) (e.g., https://hlsl.godbolt.org/z/Yec3dKh14). These diagnostics
were not exercised before, and this PR adds tests to exercise them.
Sema checks for the texture builtin args have also been made more strict
and rewritten to be like sema for other builtins, using
`CheckArgTypeMatches` rather than only checking vector element count.
Finally, in preparation for 1D texture types, the sema for texture
builtins now allow scalar args where it is relevant.
Assisted by: Claude Opus 5
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Commit: 3bb668718fc42be84ae4165d947d1de99a3c179b
https://github.com/llvm/llvm-project/commit/3bb668718fc42be84ae4165d947d1de99a3c179b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
A clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c
M clang/test/Driver/lto-aix.c
M flang/include/flang/Frontend/TargetOptions.h
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
A flang/test/Integration/PowerPC/aix-vec-extabi.f90
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll
M llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
M llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll
M llvm/test/CodeGen/PowerPC/aix-csr-vector-extabi.ll
M llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll
M llvm/test/CodeGen/PowerPC/aix-insert-extract.ll
M llvm/test/CodeGen/PowerPC/aix-spills-for-eh.ll
M llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-callee.ll
M llvm/test/CodeGen/PowerPC/aix-vec-arg-spills-mir.ll
M llvm/test/CodeGen/PowerPC/aix-vec-arg-spills.ll
M llvm/test/CodeGen/PowerPC/aix-vec_extract_p9.ll
M llvm/test/CodeGen/PowerPC/aix-vec_extract_p9_2.ll
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/aix-vector-stack-caller.ll
M llvm/test/CodeGen/PowerPC/aix-vector-stack.ll
M llvm/test/CodeGen/PowerPC/aix-vector-vararg-caller.ll
M llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll
M llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-pair-cc-spills.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee-split.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-fixed-callee.ll
M llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll
M llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll
M llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
M llvm/test/CodeGen/PowerPC/aix64-virtual-call-no-spills.ll
M llvm/test/CodeGen/PowerPC/bswap64.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll
M llvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll
M llvm/test/CodeGen/PowerPC/cmpb-ppc32.ll
M llvm/test/CodeGen/PowerPC/cmpb.ll
M llvm/test/CodeGen/PowerPC/constants-i64.ll
M llvm/test/CodeGen/PowerPC/fdiv.ll
M llvm/test/CodeGen/PowerPC/fma-assoc.ll
M llvm/test/CodeGen/PowerPC/ftrunc-vec.ll
M llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll
M llvm/test/CodeGen/PowerPC/maddld.ll
M llvm/test/CodeGen/PowerPC/mi-peephole-splat.ll
M llvm/test/CodeGen/PowerPC/mmaplus-intrinsics.ll
M llvm/test/CodeGen/PowerPC/mulli.ll
M llvm/test/CodeGen/PowerPC/p10-handle-split-promote-vec.ll
M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/pr33093.ll
M llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
M llvm/test/CodeGen/PowerPC/setcc-to-sub.ll
M llvm/test/CodeGen/PowerPC/unal-vec-ldst.ll
M llvm/test/CodeGen/PowerPC/vec-bswap.ll
M llvm/test/CodeGen/PowerPC/vec_clz.ll
M llvm/test/CodeGen/PowerPC/vec_constants.ll
M llvm/test/CodeGen/PowerPC/vec_revb.ll
M llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll
M llvm/test/CodeGen/PowerPC/vmladduhm.ll
M llvm/test/CodeGen/PowerPC/xxpermdi_mnemonics.s
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/Transforms/PGOProfile/ppc-prevent-mma-types.ll
Log Message:
-----------
PPC: Replace EnableAIXExtendedAltivecABI with "target-abi" module flag (#221670)
Continue purging ABI-influencing TargetOptions fields. Eliminate this
case by migrating to a module flag, reusing the generic target-abi module
flag with a new value.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: c5086962da8f36f69ad04ed81fce5aa2f19cec66
https://github.com/llvm/llvm-project/commit/c5086962da8f36f69ad04ed81fce5aa2f19cec66
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Interpreter/Value.cpp
Log Message:
-----------
[clang-repl] Use ExecutorAddr::toPtr to get function ptr (#223395)
Fixes the pretty-print.cpp testcase on Darwin/arm64e.
This testcase was crashing on Darwin/arm64e when it tried to call a
value's destructor via an unauthenticated pointer.
Fix the issue by updating Value::Value to use ExecutorAddr::toPtr to get
an authenticated pointer to the destructor (rather than using
ExecutorAddr::getValue, which yields a raw address with no
authentication bits)
Commit: b80623b0255ae13c2d8337ea96d1bf2c673ea3c8
https://github.com/llvm/llvm-project/commit/b80623b0255ae13c2d8337ea96d1bf2c673ea3c8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions-vs-first-order-recurrences.ll
Log Message:
-----------
[LV] Add more tests with phis that could be FORs or predicated IVS (NFC) (#223539)
Extend test coverage with more cases where a phi can be both a FOR and a
predicated IV.
Test coverage for https://github.com/llvm/llvm-project/pull/201208.
Commit: d6ae821f93ca35b8d2d67d4ce9f7391c7e2fe9fc
https://github.com/llvm/llvm-project/commit/d6ae821f93ca35b8d2d67d4ce9f7391c7e2fe9fc
Author: Michael Jones <michaelrj at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/src/sys/sendfile/linux/sendfile.cpp
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/sendfile/sendfile_test.cpp
Log Message:
-----------
[libc] Fix sendfile argument order (#223059)
The previous implementation had the arguments swapped. This PR fixes it
and also adds a test to ensure we don't regress.
Commit: 060aa57d39e12fd3b91113197d6ed78cf998158a
https://github.com/llvm/llvm-project/commit/060aa57d39e12fd3b91113197d6ed78cf998158a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/test/Interpreter/simple-exception.cpp
M clang/test/lit.cfg.py
Log Message:
-----------
[clang-repl] XFAIL simple-exception test on Darwin/arm64e (#223401)
ORC doesn't support unwinding on arm46e yet.
Commit: 66971239af0417693927880df128d01b89491171
https://github.com/llvm/llvm-project/commit/66971239af0417693927880df128d01b89491171
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Fix FindMangledNameSymbol test on Darwin/arm64e (#223410)
Fix the FindMangledNameSymbol unit test by comparing values as
llvm::orc::ExecutorAddrs.
This test was using comparing a pointer cast to uintptr_t and the result
of an ExecutorAddr::getValue call, but those can be different on
Darwin/arm64e due to pointer authentication. Comparing as ExecutorAddr
values eliminates this difference (pointer authentication bits are
stripped from both sides).
Commit: 46e24dbc4475f42c0f8a6b4e0ccb7e57ea3d1cde
https://github.com/llvm/llvm-project/commit/46e24dbc4475f42c0f8a6b4e0ccb7e57ea3d1cde
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/InferAddressSpaces.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/Other/new-pm-print-pipeline.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/noop-ptrint-pair.ll
M llvm/test/Transforms/InferAddressSpaces/X86/noop-ptrint-pair.ll
M llvm/test/Transforms/InferAddressSpaces/fake-use.ll
M llvm/test/Transforms/InferAddressSpaces/infer-address-spaces-overlapping-dead.ll
M llvm/test/Transforms/InferAddressSpaces/masked-gather-scatter.ll
M llvm/test/Transforms/InferAddressSpaces/optnone-func-unchanged.ll
A llvm/test/Transforms/InferAddressSpaces/pass-param-parse-errors.ll
M llvm/test/Transforms/InferAddressSpaces/vector-of-pointers.ll
Log Message:
-----------
InferAddressSpaces: Replace -assume-default-is-flat-addrspace cl::opt with pass parameter (#223480)
Migrate the pass-specific command-line option to a new pass manager
pass parameter, exposed as
infer-address-spaces<assume-default-is-flat-addrspace>.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: a5815099928aa1aa95bfe93201bc8c0b864fa10c
https://github.com/llvm/llvm-project/commit/a5815099928aa1aa95bfe93201bc8c0b864fa10c
Author: David Green <david.green at arm.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
Log Message:
-----------
[AArch64] Add test coverage for constant mask and extract of a vector store. NFC (#223552)
Commit: 6fb04b665761e3dc99264b040ecd4781a49afd32
https://github.com/llvm/llvm-project/commit/6fb04b665761e3dc99264b040ecd4781a49afd32
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
Log Message:
-----------
[RISCV] Add SRLI+PACK pattern for (or (and rs1, 0xffffffff), (and rs2, 0xffffffff00000000)). (#223507)
Fixes #223455.
Commit: da8d3b78f6865ef6ce893f1690b9151851a43aed
https://github.com/llvm/llvm-project/commit/da8d3b78f6865ef6ce893f1690b9151851a43aed
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/Textures-AST.hlsl
M clang/test/AST/HLSL/Textures-scalar-AST.hlsl
M clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
M clang/test/AST/HLSL/Textures-vector-AST.hlsl
M clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Gather.hlsl
M clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default.hlsl
M clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmp.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
Log Message:
-----------
[HLSL] Implement Texture1D and its variants (#221061)
Fixes https://github.com/llvm/llvm-project/issues/194738
Fixes https://github.com/llvm/llvm-project/issues/194741
Fixes https://github.com/llvm/llvm-project/issues/194943
Fixes https://github.com/llvm/llvm-project/issues/194945
This PR implements the Texture1D type and its variants: RWTexture1D,
Texture1DArray, and RWTexture1DArray.
It also implements the codegen for the texture builtins so that they can
handle scalars where they otherwise always assumed a vector before the
existence of 1D textures.
Assisted by: Claude Opus 5
---
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Commit: 4ae3c053973d611ba106b060ae4b1dd8cacba0ef
https://github.com/llvm/llvm-project/commit/4ae3c053973d611ba106b060ae4b1dd8cacba0ef
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN bitop3 builtins (#223104)
Adds codegen for the following AMDGCN bitop3 builtins:
- __builtin_amdgcn_bitop3_b32
- __builtin_amdgcn_bitop3_b16
These are lowered to the corresponding `llvm.amdgcn.bitop3` intrinsic.
Commit: 87afb37e3f032af3107dbda6bc0da53460f0407f
https://github.com/llvm/llvm-project/commit/87afb37e3f032af3107dbda6bc0da53460f0407f
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/trip-count-stride-positive-from-guard.ll
A llvm/test/Transforms/IndVarSimplify/exit-value-guarded-positive-stride.ll
Log Message:
-----------
[ScalarEvolution] howManyLessThans infer stride isPositive from guard (#214014)
Infer Stride is positive from loop guard.
This enables SCEV to compute symbolic-max backedge-taken count for
multi-exit loops.
Motivating example:
void example(int *p, int n, int stride, int bound) {
if (stride <= 0) __builtin_trap(); // dominating guard => stride > 0
for (int i = 0; i < n; i += stride) {
if (i > bound) __builtin_trap(); // per-iteration bounds check (2nd
exit)
p[i] = 0;
}
}
Commit: a636e928c1d63c7eabe140832446f22e360ae001
https://github.com/llvm/llvm-project/commit/a636e928c1d63c7eabe140832446f22e360ae001
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV] Teach RISCVOptWInstrs that zext.w is fixable to sext.w. (#223559)
Note, in some cases erasing the zext.w and fixing an earlier
instruction would be even better but that requires more extensive
changes.
Commit: 52b2e03278f103f5baaa14a43bd9be380301de94
https://github.com/llvm/llvm-project/commit/52b2e03278f103f5baaa14a43bd9be380301de94
Author: David Dada <davidtofunmidada at gmail.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M libc/src/__support/File/file.cpp
M libc/src/__support/File/file.h
A libc/src/__support/File/file_mode.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/File/linux/file.h
A libc/src/__support/File/linux/file_flags.h
M libc/src/stdio/fmemopen.cpp
M libc/src/stdio/fopencookie.cpp
M libc/src/stdio/linux/stderr.cpp
M libc/src/stdio/linux/stdin.cpp
M libc/src/stdio/linux/stdout.cpp
M libc/test/src/__support/File/CMakeLists.txt
A libc/test/src/__support/File/file_mode_test.cpp
M libc/test/src/__support/File/file_test.cpp
Log Message:
-----------
[libc] feat(filemode): implement class and helper functions to handle file modes for an opened file (#220906)
I moved the logic from `mode_flags` function to the `FileMode`
constructor.
The `FileMode` class has several helper methods to work with modes which
can then be called in `File` class.
Issue: #213374
---------
Signed-off-by: tdadadavid <davidtofunmidada at gmail.com>
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 37d9648ca786af803a4921aadbf842c7e12ec7f8
https://github.com/llvm/llvm-project/commit/37d9648ca786af803a4921aadbf842c7e12ec7f8
Author: Florian Mayer <fmayer at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
Log Message:
-----------
[NFC] [SelectionDAG] fix typo in comment (#223560)
Commit: 35d553bdd51c01effb0f7c4c161a77cc88b6b7a0
https://github.com/llvm/llvm-project/commit/35d553bdd51c01effb0f7c4c161a77cc88b6b7a0
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 52b2e03 (#223567)
This fixes 52b2e03278f103f5baaa14a43bd9be380301de94 (#220906).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=52b2e03278f103f5baaa14a43bd9be380301de94
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5cc8a513b417ab7dd791b78863e2f5f834f818d8
https://github.com/llvm/llvm-project/commit/5cc8a513b417ab7dd791b78863e2f5f834f818d8
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGen/forward-decls.cpp
Log Message:
-----------
[CIR] Fix 'isConstant' calc when looking at an incomplete type (#223444)
This popped up in a benchmark. Classic codegen ALWAYS sets this as
'excludeCtor'/'excludeDtor', but CIR tried 'harder' to get this right.
However, with an incomplete type, we can't actually look into it to see
if it has any mutable members, so determining 'constness' isn't
possible.
We could PROBABLY do better with enums since I would assume they can be
constant most of the time, but we fall-back to classic-codegen's
behavior here instead: which marks it as non-const.
Thanks to 'trying harder' than classic codegen as mentioned above, there
IS a slight LLVM-IR difference, but for the better.
Also note: Claude helped me with the tests.
Commit: 86dfc32f0defb728cf3cdabc346fa5e4939eae9e
https://github.com/llvm/llvm-project/commit/86dfc32f0defb728cf3cdabc346fa5e4939eae9e
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic-libcall.c
Log Message:
-----------
[CIR] Atomic compare-and-exchange via libcall (#206073)
This patch adds support for atomic compare-and-exchange operations via libcall.
Assisted-by: Codex / gpt-5.5 xhigh
Commit: 45c113d869c69ccf17b368e087c744713cf26bfa
https://github.com/llvm/llvm-project/commit/45c113d869c69ccf17b368e087c744713cf26bfa
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
Log Message:
-----------
[BOLT][AArch64] Make Android instrumentation runtime fail safe (#223110)
Profiling failure in BOLT instrumentation runtime should not kill the
host app on Android. Under `ANDROID_AARCH64`, we now handle failures
in instrumentation setup, memory allocation, hash table operations,
data dumping, opening profile output file, zero-counter binary, etc..
Since the first failure, we will disable profiling and directly return
from various instrumentation entry points, instead of assert/exit.
Only for Android AArch64; the behavior is unchanged otherwise.
Commit: 0d91c104dde79e5f4467c90cf109d16aabe45c99
https://github.com/llvm/llvm-project/commit/0d91c104dde79e5f4467c90cf109d16aabe45c99
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
Log Message:
-----------
[lldb] Fix use-after-free in jThreadsInfo stop info cache (#223488)
WillPublicStop iterates over the array borrowed from m_jthreadsinfo_sp
while WillResume concurrently resets the pointer on another thread,
freeing the array during the walk.
Protect the cached stop info with a mutex and copy the shared pointer
out before processing. Also modernize m_shared_cache_info to Guarded.
rdar://186776438
Commit: d6b0c1b9a79d5fdd3d6f94ae36adb266930bd68e
https://github.com/llvm/llvm-project/commit/d6b0c1b9a79d5fdd3d6f94ae36adb266930bd68e
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/test/AArch64/validate-branch-target.s
M bolt/test/X86/validate-branch-target.s
Log Message:
-----------
[BOLT] Prevent missing ExternalBranch validation (#221927)
#165406 introduced validation to check whether a branch target is a
valid instruction to detect corrupted CFGs. However, as described in
[165406#discussion](https://github.com/llvm/llvm-project/pull/165406#discussion_r2601459105),
it can miss validations when a function contains multiple invalid
ExternalBranches.
Therefore, this patch introduces a branch-level set to prevent duplicate
validations while ensuring no branches are missed.
Commit: 40ab38adced10d38446b8fe0912e2039436f5adb
https://github.com/llvm/llvm-project/commit/40ab38adced10d38446b8fe0912e2039436f5adb
Author: Haowei <haowei at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M clang/test/Driver/modules-driver-depscan-log.cpp
Log Message:
-----------
Use -fsyntax-only for modules-driver-depscan-log.cpp test (#223014)
The modules-driver-depscan-log.cpp is failing after PR#222209 was landed
on mac when building LLVM with libcxx. This patch changed the `-o` flag
to `-fsyntax-only` to mitigate this issue.
Commit: 61a8c98594dbce9e09f39614b89cb74e563bcbbc
https://github.com/llvm/llvm-project/commit/61a8c98594dbce9e09f39614b89cb74e563bcbbc
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/default-flat-work-group-size-overrides-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Fix maximum physical LDS reporting for gfx6 (#223185)
Reference:
https://docs.amd.com/api/khub/documents/VeItSxvoJNzy28rl~JwEAQ/content#page=77
> “The maximum LDS allocation size for a work-group is still 32 kB,
however each compute unit has a total of 64 kB of LDS.”
Reference:
https://docs.amd.com/api/khub/documents/J4foK5jvufN9rTHf_DlCPw/content#page=22
> “Each compute unit has a 64 kB of Local Data Share (LDS) memory
space…”
> “Each workgroup can allocate up to 32 kB of this space, and can read
and write any portion of the LDS space allocated to it.”
Commit: 7e8ce3bd5b7460685e060a3b86d054cfdc22f2bf
https://github.com/llvm/llvm-project/commit/7e8ce3bd5b7460685e060a3b86d054cfdc22f2bf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
Log Message:
-----------
[lldb] Bound JSON object file text by buffer size (#223575)
ObjectFileJSON created a StringRef from a bare pointer without a length.
Mapped buffers lack a NULL terminator, causing strlen to read past
page-aligned mappings.
Pass the buffer size and stop at the first NULL to handle unterminated
mappings and zero-padded probe reads.
rdar://186899370
Commit: 95ecc0a5736632f9cea75ad445a537979d3fc429
https://github.com/llvm/llvm-project/commit/95ecc0a5736632f9cea75ad445a537979d3fc429
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
A compiler-rt/test/fuzzer/MinimizeCrashCustomMutatorTest.cpp
A compiler-rt/test/fuzzer/minimize_crash_custom_mutator.test
Log Message:
-----------
[libFuzzer] Add test for stale size passed to Mutate in MinimizeCrashLoop (#223502)
Add tests for the fix in #223470.
Commit: 3493720eca95cf844a8d7e58fdd12e0e5644e7d0
https://github.com/llvm/llvm-project/commit/3493720eca95cf844a8d7e58fdd12e0e5644e7d0
Author: Ryunosuke (Rick) Yanashita <ryunosukeyanashita at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Add fold combining adjacent extracted bit fields to restore optimization for separate truncations (#219598)
This restores the InstCombine optimization that was lost (regression)
starting from Clang 14, when assembling adjacent bit fields extracted
from a wider integer.
The fold combines:
```
(trunc (lshr X, S) & M0) | (lshr (trunc X), S & M1) --> (trunc (lshr X, S) & (C0 | C1))
```
The fold handles both orderings. I implemented tests for this fold in
trunc.ll
alive2 proof: https://alive2.llvm.org/ce/z/rPQN4D
Fixes #215254
Commit: cecd28d75cf5407287085e4042ef4fc7ed7feadd
https://github.com/llvm/llvm-project/commit/cecd28d75cf5407287085e4042ef4fc7ed7feadd
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvy/rvy-invalid-operands.mir
M llvm/unittests/Target/RISCV/RISCVBaseInfoTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Select the capability ABI by default when the Y extension is enabled
computeDefaultABI() previously had no knowledge of the RVY (CHERI) base,
so a target with Y enabled and no explicit -target-abi
would fall back to the plain integer ABI instead of il32pc64(d)/
l64pc128(d).
This adds explicit non-RVY ABIs to two tests since otherwise those would
hit the assertion that the ABI is not supported yet. As the ABI does not
matter for these tests, we can safely use the non-RVY ones.
This change was created with the help of AI tools
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/213411
Commit: b557f073f1ea9fab14102cfc93edb40285599670
https://github.com/llvm/llvm-project/commit/b557f073f1ea9fab14102cfc93edb40285599670
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
Log Message:
-----------
[mlir][tosa] Use optnone for compliance initialization under MSan (NFC) (#223586)
The compliance-map constructor includes a ~5,000-line generated
initializer.
Under MemorySanitizer, shadow and origin tracking instrumentation on
this single mega-function causes extreme compilation times (>3.5
minutes),
dominated by InstCombine (~68s) and greedy register allocation (~71s).
Recently, LLVM_ATTRIBUTE_MINSIZE was added to optimize for size, but
MSan
instrumentation still inflates the function enough to trigger severe
slowdowns in the backend.
Mark the constructor with optnone under LLVM_MEMORY_SANITIZER_BUILD to
skip
expensive optimization and register allocation passes, bringing
compilation
time under MSan down from 3m38s to ~30s.
This is done to fix
http://lab.llvm.org/buildbot/#/builders/aarch64-linux-msan,
though it is very slow on x86_64 as well.
Assisted-by: Gemini
Commit: 712ec9ed515a15d347f2feafd8bdb5032ed2c15a
https://github.com/llvm/llvm-project/commit/712ec9ed515a15d347f2feafd8bdb5032ed2c15a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
Log Message:
-----------
[ORC] Fix OrcCAPITestBase.ExecutionTest on Darwin/arm64e (#223577)
Switch to ExecutorAddr::toPtr to sign the function pointer. We'll need a
C API solution for this eventually, but this will do for now to get the
test passing.
rdar://186687669
Commit: ac2fb41926f9f7723517670788800d448970151a
https://github.com/llvm/llvm-project/commit/ac2fb41926f9f7723517670788800d448970151a
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/LEB128.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
M llvm/unittests/Support/LEB128Test.cpp
Log Message:
-----------
[ProfileData] Bound binary sample profile primitive reads (#215476)
Fix pre-existing latent memory-safety issues that could cause
out-of-bounds reads or invalid pointer arithmetic on malformed,
truncated, or non-null-terminated buffers:
* unbounded ULEB128 decoding in readNumber() and Raw/Ext format probes;
* unbounded terminator searches in readString() and GCC format
detection;
* unsafe bounds checking in readUnencodedNumber().
Use bounded decoding, memchr, overflow-safe size checks, and typed
ULEB128 errors. Preserve the existing decodeULEB128 interface and avoid
test-only ABI exports.
Add functional and guard-page tests that detect boundary regressions
without requiring sanitizers.
Assisted by GPT-5
Commit: d041ef4182361ca50c6744f8e48854c416e079bd
https://github.com/llvm/llvm-project/commit/d041ef4182361ca50c6744f8e48854c416e079bd
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M utils/docs/__main__.py
A utils/docs/llvm_sphinx/ext/absolute_links.py
A utils/docs/llvm_sphinx/ext/absolute_links_test/conf.py
A utils/docs/llvm_sphinx/ext/absolute_links_test/index.rst
A utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md
A utils/docs/llvm_sphinx/ext/absolute_links_test/rest.rst
A utils/docs/llvm_sphinx/ext/absolute_links_test/target.md
M utils/docs/llvm_sphinx/ext/checks.py
Log Message:
-----------
[docs] Check for absolute self-documentation links (#222504)
Add an opt-in llvm_sphinx check that diagnoses absolute links to
documents in the current Sphinx project. Operate on the parsed doctree
so the check works for both reStructuredText and MyST without flagging
examples in literal blocks.
For example, restoring one absolute link in the LLVM documentation makes
a warnings-as-errors build report:
llvm/docs/ReleaseNotes.md:321: WARNING: absolute URL points to document
'index' in this Sphinx project; use an internal 'doc' or 'ref' role
instead: https://llvm.org/docs/ [llvm_sphinx.absolute-doc-link]
Part of #214861
Assisted-by: codex
Commit: d13e4a13abe3e7ed3dacb0ec771c8eaa7dadb861
https://github.com/llvm/llvm-project/commit/d13e4a13abe3e7ed3dacb0ec771c8eaa7dadb861
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/test/CodeGen/NVPTX/tcgen05-mma-block-scale.ll
M llvm/test/CodeGen/NVPTX/tcgen05-mma-collector-b.ll
M llvm/test/CodeGen/NVPTX/tcgen05-mma.ll
Log Message:
-----------
[NVPTX] Add default value to collector_b ImmArg in tcgen05.mma intrinsics (#220237)
This patch adds default value for the `collector_b` flag in
`tcgen05.mma` intrinsics.
Also adds lit tests to verify that calls without explicit `collector_b`
operands correctly materialized with default value.
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 08c860ba2d7719ec825c70c26bc032c577b85757
https://github.com/llvm/llvm-project/commit/08c860ba2d7719ec825c70c26bc032c577b85757
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/TypeMetadataUtils.h
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
Log Message:
-----------
[NFC][LowerTypeTests] Move CFI metadata creation and helpers to LowerTypeTests (#223581)
Move enum CfiFunctionLinkage from llvm/Analysis/TypeMetadataUtils.h into
llvm/Transforms/IPO/LowerTypeTests.h (in namespace lowertypetests).
Move hasTypeMetadata and findCfiFunctions from ThinLTOBitcodeWriter into
LowerTypeTests.
Encapsulate cfi.functions, aliases, and symvers metadata creation into
lowertypetests::createCfiMetadata in LowerTypeTests.cpp, removing the
manual metadata generation from ThinLTOBitcodeWriter.
PR Stack:
* ➤ https://github.com/llvm/llvm-project/pull/223581
* https://github.com/llvm/llvm-project/pull/223582
Assisted-by: Gemini
Commit: 6ce57ce40b2ce2b466d658a289427d7817e6c468
https://github.com/llvm/llvm-project/commit/6ce57ce40b2ce2b466d658a289427d7817e6c468
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
A llvm/test/CodeGen/AArch64/complex-deinterleaving-fmf-intersection.ll
Log Message:
-----------
[ComplexDeinterleaving] Use FMF intersection instead of requiring strict equality (#219158)
Commit: 636a86aa046df9ed800c7b125f1c67e5028a75d8
https://github.com/llvm/llvm-project/commit/636a86aa046df9ed800c7b125f1c67e5028a75d8
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-exp.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-log.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-multi-result.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/expand-fp-math.ll
Log Message:
-----------
[CodeGen] Add scalarization fallback for multi-result scalable intrinsics (#218634)
Commit: 8e38a37adaf935561d6fe8d7e2323a4042cee556
https://github.com/llvm/llvm-project/commit/8e38a37adaf935561d6fe8d7e2323a4042cee556
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-14 (Mon, 14 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vloxei-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vloxei.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vluxei-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vluxei.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/nontemporal-vp-scalable.ll
M llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vloxei.ll
M llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vluxei.ll
M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
Log Message:
-----------
[RISCV] Improve the earlyclobber constraint for vector index load. (#223565)
When the data EEW is smaller than the index EEW, the destination may
overlap the index operand as long as the overlap is in the
lowest-numbered part of the index register group. If the index EMUL is
no larger than 1 then both operands are a single register, so any
overlap is necessarily the lowest-numbered part and no constraint is
needed.
Assisted-by: Claude
Commit: a1c0e0b64fe2db17d4be70b4da0f73d3c1c942a9
https://github.com/llvm/llvm-project/commit/a1c0e0b64fe2db17d4be70b4da0f73d3c1c942a9
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes ac2fb41 (#223601)
This fixes ac2fb41926f9f7723517670788800d448970151a (#215476).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ac2fb41926f9f7723517670788800d448970151a
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 0db5329758ea658bb5580408560c6333ed815bbb
https://github.com/llvm/llvm-project/commit/0db5329758ea658bb5580408560c6333ed815bbb
Author: Sachin 🗲 <s4chinjha at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Adds missing targets for bf16 public headers to bazel files (#222071)
Adds the missing public `libc_math_function` targets for:
* `canonicalizebf16`
* `getpayloadbf16`
* `setpayloadbf16`
* `setpayloadsigbf16`
Commit: f5e3036d5f89e9eb4e9f4c391045241cbfa4c7f7
https://github.com/llvm/llvm-project/commit/f5e3036d5f89e9eb4e9f4c391045241cbfa4c7f7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/lib/Transforms/IPO/CrossDSOCFI.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
Log Message:
-----------
[NFC][CrossDSOCFI] Move findCfiTypeIds to LowerTypeTests (#223582)
Move 64-bit numeric type identifier collection logic and
extractNumericTypeId
from CrossDSOCFI.cpp into LowerTypeTests.cpp, exposing it as
lowertypetests::findCfiTypeIds in llvm/Transforms/IPO/LowerTypeTests.h.
Encapsulate Cross-DSO CFI type ID discovery so CrossDSOCFI no longer
directly parses cfi.functions metadata.
PR Stack:
* https://github.com/llvm/llvm-project/pull/223581
* ➤ https://github.com/llvm/llvm-project/pull/223582
Assisted-by: Gemini
Commit: 414086d82a0873800deba69fcc006f79a41aeed1
https://github.com/llvm/llvm-project/commit/414086d82a0873800deba69fcc006f79a41aeed1
Author: David Green <david.green at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/docs/GlobalISel/Legalizer.md
Log Message:
-----------
[GlobalISel][Docs] Remove footnote about legacy legalizer rules. (#223460)
Commit: bfab06044d7923aedbc615c0c098767ad2a81df2
https://github.com/llvm/llvm-project/commit/bfab06044d7923aedbc615c0c098767ad2a81df2
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/flags.ll
Log Message:
-----------
[MergeFunc] Fix poison flag merging for varargs functions (#223347)
This is a followup to https://github.com/llvm/llvm-project/pull/220015.
writeThunkOrAliasIfNeeded() has an early exit for the case where none of
erase/thunk/alias apply, and we failed to merge the poison flags in that
case. I've opted to fix this by moving the annotation merging logic out
of writeThunkOrAliasIfNeeded() entirely, because I don't think it
logically fits there (it's not related to thunk/alias creation at all).
This is the minimal fix to address the miscompile. There is a potential
larger change we could make here, which is to avoid "merging" the
functions in this case in the first place. We don't actually merge the
functions here, but just rewrite all uses to one of them. This seems
kind of dubious to me, though I could see an argument that this can
still be beneficial in conjunction with --gc-sections (i.e. linker-level
dead function elimination).
Commit: ee33e90d1a1a064a0e21d28a27fbdb450490686c
https://github.com/llvm/llvm-project/commit/ee33e90d1a1a064a0e21d28a27fbdb450490686c
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvm] Add llvm.intr.modf intrinsic (#222355)
Assisted-by: grok-4.6 and gpt-5.6-sol
---------
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: b0e8a6f3d77950082ad13dfc8666a8994188b3fd
https://github.com/llvm/llvm-project/commit/b0e8a6f3d77950082ad13dfc8666a8994188b3fd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
Log Message:
-----------
AMDGPU: Remove volatile from some atomic tests (#223528)
Commit: 6526e5bc64b15efd1c972f6035f34a432637948e
https://github.com/llvm/llvm-project/commit/6526e5bc64b15efd1c972f6035f34a432637948e
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FloatingPoint.cpp
A llvm/test/CodeGen/X86/pr149371.ll
Log Message:
-----------
[X86] Fix FP `stackifier` crash on invalid `x87` inline `asm` constraints (#221881)
Fixes #149371
When an x87 inline asm uses the stack registers in a layout the FP
stackifier can't model, for example an input tied to `st(1)` while
`st(0)` and `st(1)` are both outputs, the pass reports "fixed input regs
must be last on the x87 stack" and then keeps going as if nothing
happened. It simulates the pops and pushes with counts taken from masks
it has just found to be non-contiguous, so the input never leaves the
stack model and the same register gets pushed again as an output. The
model now holds a duplicate entry, and the next `adjustLiveRegs` trips
"Live count mismatch". The odd `R0` constraint in the report isn't the
culprit, by the way; it resolves to a plain integer register and leaves
the tied `1` as the only x87 input.
Once any of these errors has been reported, the asm is no longer
simulated. The pass pops the inputs the asm kills and pushes its
outputs, which keeps the stack model consistent with what the register
allocator expects, and then lets compilation fail normally with the
diagnostic. The old trick of rounding the output mask up to a contiguous
range is gone too, since it only papered over one of the four cases. The
new test covers all four diagnostics plus the two-asm sequence that used
to assert.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: b2ef8caec3c2add664cbe88978793f44ed662ae3
https://github.com/llvm/llvm-project/commit/b2ef8caec3c2add664cbe88978793f44ed662ae3
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/test/CodeGen/RISCV/riscv-cf-protection.c
Log Message:
-----------
[Clang] Make Unlabeled the default control flow branch label scheme (#223297)
The work on "func-sig" label scheme is discontinued, so it's better to
switch the default to unlabeled at this time.
Commit: 95bdf4cc24c0109f4ad3ea383081786d21880445
https://github.com/llvm/llvm-project/commit/95bdf4cc24c0109f4ad3ea383081786d21880445
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/IR/Metadata.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[IR] Do not track metadata uses of ConstantData (#223303)
A ConstantData is never RAUW'd or deleted (#137313 removed its use list
for that reason), so the use list of its ConstantAsMetadata node is
written but never read. Stop tracking these uses.
In a module with debug info the PoisonValue node had the largest use
lists: a debug record is retargeted to poison when the instruction it
describes is deleted (`Instruction::~Instruction`) or its location is
killed.
Aided by Opus 5
Commit: f123e15308929c0ed49183821db5a21a34e1b713
https://github.com/llvm/llvm-project/commit/f123e15308929c0ed49183821db5a21a34e1b713
Author: Utpal Bora <utpal.bora2 at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-insert-extract.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/sve-vls-shuffle-extract.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-non-native-interleaved-accesses.ll
Log Message:
-----------
[AArch64][CostModel] Update SVE inserelement/extractelement costs (#220627)
This updates the costs for inserting/extracting elements into/from
fixed-length SVE vectors when the lane exceeds the index for the
NEON mov lane (dup/ins) instructions.
Commit: c7e741b9f8d372bdfe04c19425faa64c3c496bb4
https://github.com/llvm/llvm-project/commit/c7e741b9f8d372bdfe04c19425faa64c3c496bb4
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/test/MC/RISCV/hinval-invalid.s
Log Message:
-----------
[RISCV][MC] Require H for HINVAL instructions (#223588)
HINVAL.VVMA and HINVAL.GVMA are provided by Svinval only when the
Hypervisor extension is implemented.
This commit fixes the incorrect extension dependency.
See:
https://github.com/riscv/riscv-isa-manual/blob/be8cb008612ce2ac1712e4ba3f09fc2109c0d462/src/priv/svinval.adoc?plain=1#L45-L46
Commit: 74bdb1594ec40502b46dd12d8c0ee096561869cb
https://github.com/llvm/llvm-project/commit/74bdb1594ec40502b46dd12d8c0ee096561869cb
Author: Gábor Tóthvári <gabor.tothvari at ericsson.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[NFC][analyzer] Do not spell out unreachable statement kinds in `shouldJustCallCheckers` (#223473)
The function `shouldJustCallCheckers` introduced recently in
e829049823905405779c6b908437b200e7ed1b2e returns true by default and
returns false for statement kinds where it is inappropriate to call the
PreStmt and PostStmt checkers in the "normal" pattern.
Unreachable statement kinds (e.g. control flow statements that never
appear as non-terminator statements in a CFGBlock) were covered by
explicit cases in `shouldJustCallCheckers`, but this was needless
complexity, so this commit removes it. These statement kinds run into
`llvm_unreachable` in `ExprEngine::Visit`, so the behavior of
`shouldJustCallCheckers` is completely inconsequential.
Commit: f0907c3d807f08a34f45e106c3f28b034b8e8c8e
https://github.com/llvm/llvm-project/commit/f0907c3d807f08a34f45e106c3f28b034b8e8c8e
Author: Vimal Patel <vimal.patel at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
M llvm/test/CodeGen/AArch64/fcvt-fixed.ll
Log Message:
-----------
[AArch64] Improve scalar fixed-point int-to-fp codegen (#220299)
[AArch64] Improve scalar fixed-point int-to-fp codegen
Select the scalar FPR shifted conversion forms when the integer input
is already in an FPR, and keep the GPR forms for integer inputs in
GPRs.
Add coverage for intrinsic and sitofp/uitofp fixed-point conversions.
Select scalar FP/SIMD-register conversion forms when a fixed-point
int-to-fp conversion uses a value extracted from a SIMD vector.
This avoids moving the reduction result through a GPR before
converting to floating point.
Commit: 65692520212abd878ec0c3dbe9fbfccfc4439c96
https://github.com/llvm/llvm-project/commit/65692520212abd878ec0c3dbe9fbfccfc4439c96
Author: David Green <david.green at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/ARM/shuffle.ll
Log Message:
-----------
[ARM] Add cost test coverage for uzp/zip/trn shuffles. NFC (#223621)
Commit: 08169f5fb1b7386002cdb66e52192580fc0fcf24
https://github.com/llvm/llvm-project/commit/08169f5fb1b7386002cdb66e52192580fc0fcf24
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Return a SCEVUse from getMulExpr and propagate use flags. (#221486)
Same as https://github.com/llvm/llvm-project/pull/220007 but for
getMulExpr:
add option to pass SCEVUse-specific flags to getMulExpr and propagate
them through, if valid conservatively. That is, the final expression
multiples the same operands (potentially in different order). For
example, it is not valid to propagate the use flags if other
(sub-)expressions have been inlined.
It also includes a few mechanical changes, to update users that still
expected const SCEV *.
PR: https://github.com/llvm/llvm-project/pull/221486
Commit: 5fee83dfe895db41930566a9146fdade0e30dd8c
https://github.com/llvm/llvm-project/commit/5fee83dfe895db41930566a9146fdade0e30dd8c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll
Log Message:
-----------
[AArch64] Promote unpacked SVE f16/bf16 compressstores 32/64-bit (#222321)
To support compressstore for unpacked 16-bit SVE floats (e.g., nxv2f16),
we need to expand the compressstore before type legalization. If we
expand after type legalization the `VECTOR_COMPRESS` node inserted won't
be promoted to a 32/64-bit element size (which means we'd have to
duplicate some type legalization in the lowering).
Commit: 0431cbe627d8000a49843965a9c22115c178e5d5
https://github.com/llvm/llvm-project/commit/0431cbe627d8000a49843965a9c22115c178e5d5
Author: Vimal Patel <vimal.patel at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
Log Message:
-----------
[AArch64] Use firstp for SVE2.2 cttz.elts (#221182)
Preserve zero-is-poison cttz.elts as a distinct AArch64ISD node.
This lets instruction selection choose firstp for SVE2.2 and SME2.2.
Keep brkb/cntp for no-poison uses and for older targets.
Commit: 105edd81b1f11e18bbb0db377135093ebc38fd3b
https://github.com/llvm/llvm-project/commit/105edd81b1f11e18bbb0db377135093ebc38fd3b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerAtomic.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-flat-i64-private-volatile.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-private-gas.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll
Log Message:
-----------
LowerAtomic: Preserve the volatile flag when lowering atomicrmw and cmpxchg (#223544)
These utility functions built the replacements without copying the
volatile flag from the original instruction.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 710d0c3ee1689e5cfb029ab0e6fd7be0e14fcb73
https://github.com/llvm/llvm-project/commit/710d0c3ee1689e5cfb029ab0e6fd7be0e14fcb73
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M polly/test/ScopDetect/simple_loop_with_param.ll
M polly/test/ScopDetect/simple_loop_with_param_2.ll
M polly/test/ScopInfo/inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra_bb_scalar_dep.ll
M polly/test/ScopInfo/tempscop-printing.ll
Log Message:
-----------
[Polly][NFC] Fix loop index in C comments of tests with nested loops (#220589)
The C pseudo-code in tests declares `long i, j`, but the inner loop
reuses `i` instead of `j`, which would overwrite the outer loop counter
and describe a different program than the IR below it.
Commit: 7cfdd2a6f4a1eef5715fca3055351cf6bc8958b1
https://github.com/llvm/llvm-project/commit/7cfdd2a6f4a1eef5715fca3055351cf6bc8958b1
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
Log Message:
-----------
[NFC][AMDGPU] Replace undef with poison in cast.ll, fptosi.ll and fptoui.ll (#223570)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 0f639380ff1e1c43ae54be282df3b565382c94a7
https://github.com/llvm/llvm-project/commit/0f639380ff1e1c43ae54be282df3b565382c94a7
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/Sema/riscv-pset-index-out-of-range.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Element Insert (#222268)
Commit: 44b2bd2ace3e43784256dccf7a755029fce71774
https://github.com/llvm/llvm-project/commit/44b2bd2ace3e43784256dccf7a755029fce71774
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/TypeSanitizer.md
Log Message:
-----------
[Docs][TySan] Correct optimisation remarks (#205577)
I think I got my wires crossed here between TySan and other sanitizers
when I was using their docs for reference on how to structure this file.
If a strict aliasing violation was going to cause problems, by the time
higher level optimizations come through and restructure the code, say by
removing a load/store, you no longer have the behaviour TySan would pick
up on.
Commit: aa7f41715403dc6c8018524ca1806a86b70014fb
https://github.com/llvm/llvm-project/commit/aa7f41715403dc6c8018524ca1806a86b70014fb
Author: Hadong Lee <hdchris765 at snu.ac.kr>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
A llvm/test/Analysis/LoopAccessAnalysis/zero-distance-mixed-width.ll
Log Message:
-----------
[LAA] Allow zero-distance dependences between mixed-width accesses (#221531)
Allow zero-distance dependences between mixed-width accesses to be
classified as `Forward` when they have a common byte stride.
`getDependenceDistanceStrideAndSize` already requires non-zero strides
in the same direction, each a multiple of the corresponding type's
allocation size. A common byte stride is therefore at least as large as
either access. With equal starting addresses, accesses from different
iterations cannot overlap.
Alive2: https://alive2.llvm.org/ce/z/KN6Hke
Fixes #218320
Commit: c6bad7c79642fdef2cc997b44f6e5c7db8508530
https://github.com/llvm/llvm-project/commit/c6bad7c79642fdef2cc997b44f6e5c7db8508530
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
A llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
Log Message:
-----------
[AMDGPU] Scale the frame register in place when lowering scalar frame indices (#221972)
Lowering a scalar frame index needs a scalar temporary, and under full
SGPR pressure the scavenger emergency-spills instead, which flips EXEC
with `s_not_b64` and clobbers SCC, With SCC live the spill builder gives
up with `error: unhandled SGPR spill to memory`.
Use `FrameReg` itself as the temporary and restore it after the
instruction with `S_MUL_I32`, which unlike `S_LSHL_B32` does not write
SCC, folding a non-zero offset back through an
`S_ADDC_U32`/`S_BITCMP1_B32`/`S_BITSET0_B32` sequence when SCC is still
live.
This is restricted to SALU instructions with a single frame index that
do not otherwise touch `FrameReg`; everything else keeps the existing
path, including the emergency spill.
Assisted-by: Claude Opus 5
Commit: 88107b203b9e02a2d6ce87bf8ba0d98cb6ff53ec
https://github.com/llvm/llvm-project/commit/88107b203b9e02a2d6ce87bf8ba0d98cb6ff53ec
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Add expand-multi-result.ll to profcheck-xfail.txt (#223614)
>From #218634
Added for the same reason as other
`PreISelIntrinsicLowering/AArch64/expand-*` tests. Fixes `profcheck`
failure.
Commit: f8ae252564bd052d4bb235a65b4c5a6db48f234b
https://github.com/llvm/llvm-project/commit/f8ae252564bd052d4bb235a65b4c5a6db48f234b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
Log Message:
-----------
[X86] zero-call-used-regs-simd.ll - add baseline no-vlx test coverage from #212147 (#223634)
Commit: 11576edbc8ab574ceacd9a624c08f730a5a7676b
https://github.com/llvm/llvm-project/commit/11576edbc8ab574ceacd9a624c08f730a5a7676b
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/OpenMP/trailing-cycle.f90
A flang/test/Lower/trailing-cycle.f90
Log Message:
-----------
[flang] Delete a trailing CYCLE that is the last statement of its DO (#223399)
A CycleStmt at the end of the body of its own DoConstruct is a no-op:
branching to the EndDoStmt and falling through to it are the same thing.
Branch analysis nonetheless marks the DoConstruct unstructured, which
costs the structured form of the loop and the induction variable
semantics that later passes rely on.
Delete such a CycleStmt in the PFT. The statement must be unlabeled, so
that it is not itself a branch target, and it must name either no
construct or this one.
Commit: e733cebdf7c9c87bec77547f3c377f514a22c9b3
https://github.com/llvm/llvm-project/commit/e733cebdf7c9c87bec77547f3c377f514a22c9b3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/CodeGen/ARM/atomic-op.ll
A llvm/test/Transforms/AtomicExpand/ARM/thread-model-single.ll
Log Message:
-----------
CodeGen: Replace TargetOptions::ThreadModel with module flag (#223157)
Migrate the threading-model consumers off TargetOptions::ThreadModel and
onto the "thread-model" module flag. The main user was ARM's pass config,
which is moved into AtomicExpand, which now performs the single-thread
expansion directly.
Few tests use the -thread-model flag, so delete it and migrate those
cases to use the module flag.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: f1450b2d298826abdff1660d0e1747935529357f
https://github.com/llvm/llvm-project/commit/f1450b2d298826abdff1660d0e1747935529357f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
Log Message:
-----------
[clang][bytecode] Allocate records fields and bases via Program allocator (#223433)
They have the same lifetime as other things in `Program`. And we know
the number of things to allocate in advance, apart from some small
overallocations with explicitly specified virtual bases.
Commit: a125e6ed795798ee87376a82f90cb3fd897b25ca
https://github.com/llvm/llvm-project/commit/a125e6ed795798ee87376a82f90cb3fd897b25ca
Author: Kristina Bessonova <kbessonova at accesssoftek.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
A llvm/test/CodeGen/AArch64/GlobalISel/localizer-tls.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
Log Message:
-----------
Reland "[AArch64][GlobalISel] Add support for TLS for ELF" (#223443)
This relands #220236.
The original patch missed a case where TLS-related computations could be
localized into the middle of a call-frame adjustment sequence.
The fix prevents TLS variable localization on ELF, in the same way as on
Mach-O (see the second patch in this PR).
Commit: f6f250a3b58eb3a0862b57210a5bd0b7a092b132
https://github.com/llvm/llvm-project/commit/f6f250a3b58eb3a0862b57210a5bd0b7a092b132
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/DeclOrExpr.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.cpp
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
Log Message:
-----------
[clang][bytecode] Use opaque pointers for expr-based dummy pointers (#221218)
Similar to https://github.com/llvm/llvm-project/pull/220917, but for
expressions.
Commit: 263bbd476c9fce30acb9c70d5dae556dd994b08b
https://github.com/llvm/llvm-project/commit/263bbd476c9fce30acb9c70d5dae556dd994b08b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/test/Frontend/gnu-mcount.c
Log Message:
-----------
clang/ARM: Derive -pg mcount name from the triple environment (#220822)
For a glibc/gnueabi ARM and AArch64 targets, GCC's -pg instrumentation
always calls __gnu_mcount_nc (with the caller pushing LR, per the "nc"
no-LR-clobber ABI). clang only produced this when -meabi=gnu was passed
explicitly; a separate gnueabi triple wrongly called plain "mcount".
On ARM, glibc's EABI profiling entry point is __gnu_mcount_nc
(sysdeps/arm/arm-mcount.S, exported since GLIBC_2.8). It does provide
plain mcount/_mcount, but only as a legacy APCS compat alias
(__mcount_arm_compat, gated on GCC_COMPAT(4,3)/SHLIB_COMPAT)
that reads an APCS frame-pointer record rather than following the EABI push-LR
convention. Calling it from EABI -pg code is thus an ABI mismatch, not the intended
entry point.
Derive the GNU-vs-plain mcount name from the triple environment in
addition to the explicit -meabi=gnu, so a gnueabi target gets the correct
__gnu_mcount_nc call by default, matching GCC:
push {lr}
bl __gnu_mcount_nc
clang vs. gcc mismatch: https://godbolt.org/z/erEqfxs3s
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 9b5b5ff2251c19c5e05dfd8447d295966baf2a8b
https://github.com/llvm/llvm-project/commit/9b5b5ff2251c19c5e05dfd8447d295966baf2a8b
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M compiler-rt/resources/windows_version_resource.rc
Log Message:
-----------
[compiler-rt] Set FILEOS and FILETYPE in windows_version_resource.rc (#223387)
This is a follow-up to #216408 which added version info to runtime DLLs.
We have a test (in Crashpad) that expects the FILEOS and FILETYPE to be
set. I suppose it was getting default values from somewhere before, but
after #216408 it fails unless we set them explicitly.
Commit: 57c40b76a884df783f807588fa0b9bd92bca2a6b
https://github.com/llvm/llvm-project/commit/57c40b76a884df783f807588fa0b9bd92bca2a6b
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
A llvm/test/CodeGen/Mips/msa/f16vec-insertelement.ll
A llvm/test/CodeGen/RISCV/rvv/insertelt-fp-soft-promote.ll
Log Message:
-----------
[SelectionDAG] Soft promote the element operand of INSERT_VECTOR_ELT (#223612)
When f16/bf16 is soft promoted but a vector of that type is legal,
INSERT_VECTOR_ELT is left with a soft promoted i16 element operand.
SoftPromoteHalfOperand had no case for it and failed with "Do not know
how to soft promote this operator's operand!".
Legalize it like BUILD_VECTOR and the inverse EXTRACT_VECTOR_ELT:
bitcast
the vector to its integer counterpart, insert the promoted element there
and bitcast the result back. This also covers scalable vectors.
This is reachable on MIPS MSA and on RISC-V with Zvfhmin/Zvfbfmin but
without Zfhmin/Zfbfmin. X86, Hexagon and WebAssembly avoid it by custom
lowering INSERT_VECTOR_ELT on the scalar type; that still takes
precedence and can be removed separately.
Fixes https://github.com/llvm/llvm-project/issues/198104.
Assisted-by: Claude Code
Commit: 821dc0a3b170d79597a95e17fa10c2a6959c42b2
https://github.com/llvm/llvm-project/commit/821dc0a3b170d79597a95e17fa10c2a6959c42b2
Author: Vito Kortbeek <vito.kortbeek at globalfoundries.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/test/Transforms/TypePromotion/ARM/casts.ll
Log Message:
-----------
[TypePromotion] Drop invalid nsw from promoted trunc-to-i1 conditions (#223637)
Fix a miscompile introduced in #216311. TypePromotion zero-extends the
operand of a trunc to i1. When doing so, drop nsw unless nuw is also
set, as the original operand might be all ones.
Preserve nuw because it remains valid when zero-extending. Preserve nuw
nsw as well, since it implies an all-zero operand when truncating to i1.
Alive2 proofs: https://alive2.llvm.org/ce/z/GHTZXg
Commit: 1232d0e8539a2c50bc3f40335ade86b34408b476
https://github.com/llvm/llvm-project/commit/1232d0e8539a2c50bc3f40335ade86b34408b476
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-fp-constrained-intrinsics.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Add isel for constrained cast operations. (#221976)
Implements lowering for constrained variants of fpext, fptosi, fptoui,
fptrunc, rint, sitofp and uitofp. Support covers scalable vectors of
half, float and double element type, with bfloat support due in a
follow-up PR.
Commit: f215866b883b0394c4093d163834366e4635180c
https://github.com/llvm/llvm-project/commit/f215866b883b0394c4093d163834366e4635180c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
A llvm/test/Transforms/LICM/Inputs/thread-model-single.ll
M llvm/test/Transforms/LICM/promote-single-thread.ll
Log Message:
-----------
LICM: Drop -licm-force-thread-model-single in favor of the module flag (#223158)
Now that the threading model is carried by the "thread-model" IR module
flag, the hidden -licm-force-thread-model-single override is redundant: a test
can select the single-threaded model by setting the module flag directly.
isThreadLocalObject reads only Module::getThreadModel.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: fe479338a7abbe93d9c4bc32d44a53a17a7e2f6e
https://github.com/llvm/llvm-project/commit/fe479338a7abbe93d9c4bc32d44a53a17a7e2f6e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
A llvm/test/Assembler/module-flags-exception-model.ll
A llvm/test/Linker/module-flags-exception-model.ll
A llvm/test/Verifier/module-flags-exception-model.ll
Log Message:
-----------
IR: Introduce "exception-model" module flag (#220052)
Add an "exception-model" IR module flag intended to replace
TargetOptions::ExceptionModel, such that the ABI is fully
computable from the IR alone. Add the basic documentation and
verifier/linker tests, but doesn't wire up the consumers.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 3d2514f8e7f322bb520f904857268a27c086ca2e
https://github.com/llvm/llvm-project/commit/3d2514f8e7f322bb520f904857268a27c086ca2e
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[NFC][LLVM][AArch64TTI] Remove redundant type checking of convert_to_svbool operand. (#222945)
Commit: c6ec955ea331a089169fd2ffb8b08af88c0cb350
https://github.com/llvm/llvm-project/commit/c6ec955ea331a089169fd2ffb8b08af88c0cb350
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
A llvm/test/CodeGen/AArch64/wineh-async-eh-pad-instr-size.ll
Log Message:
-----------
[TargetInstrInfo] Disable size verification for EH_LABEL (#223641)
EH_LABEL may produce a nop if using async exceptions and followed
by a trapping instruction.
Suppress the verification error until the incorrect size reporting
is fixed.
Commit: 492410de73b0b99b1778bfcd746bc8735bdaba58
https://github.com/llvm/llvm-project/commit/492410de73b0b99b1778bfcd746bc8735bdaba58
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Basic/TargetID.h
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
Reapply "clang: Use TargetID parsing from AMDGPUTargetParser" (#213824) (#213847)
This reverts commit 8f82ba2c79f4e6a69a884cc9e19bd0b8c0bbe932.
Clang subarch patches have landed, so the prematurely build bots should be OK now.
Commit: 1e6a620b20b34ac9e254207a604259e150e92205
https://github.com/llvm/llvm-project/commit/1e6a620b20b34ac9e254207a604259e150e92205
Author: tfzee <tim.ziegler at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-chained-bf16.ll
Log Message:
-----------
Make extract vector for bf16 types legal (#222913)
Fixes #222585
Makes EXTRACT_SUBVECTOR legal for bf16 types leading to this new codegen
```asm
# $ ./build/bin/clang test.c -O3 -march=novalake -mprefer-vector-width=512 -ffast-math -S -o -
foo:
vmovups (%rsi), %zmm0
vmulph (%rdi), %zmm0, %zmm0
vextractf64x4 $1, %zmm0, %ymm1
vaddph %zmm1, %zmm0, %zmm0
vextractf128 $1, %ymm0, %xmm1
vaddph %xmm1, %xmm0, %xmm0
vshufpd $1, %xmm0, %xmm0, %xmm1 # xmm1 = xmm0[1,0]
vaddph %xmm1, %xmm0, %xmm0
vmovshdup %xmm0, %xmm1 # xmm1 = xmm0[1,1,3,3]
vaddph %xmm1, %xmm0, %xmm0
vpsrld $16, %xmm0, %xmm1
vaddsh %xmm1, %xmm0, %xmm0
vzeroupper
retq
bar:
vmovups (%rsi), %zmm0
vmulbf16 (%rdi), %zmm0, %zmm0
vextractf64x4 $1, %zmm0, %ymm1
vaddbf16 %zmm1, %zmm0, %zmm0
vextractf32x4 $1, %zmm0, %xmm1
vaddbf16 %xmm1, %xmm0, %xmm0
vshufpd $1, %xmm0, %xmm0, %xmm1 # xmm1 = xmm0[1,0]
vaddbf16 %xmm1, %xmm0, %xmm0
vmovshdup %xmm0, %xmm1 # xmm1 = xmm0[1,1,3,3]
vaddbf16 %xmm1, %xmm0, %xmm0
vpsrld $16, %xmm0, %xmm1
vaddbf16 %xmm1, %xmm0, %xmm0
vzeroupper
retq
```
Commit: e78970f80f1041de8948cb0b665a9aaae682f6c6
https://github.com/llvm/llvm-project/commit/e78970f80f1041de8948cb0b665a9aaae682f6c6
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_err-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
Log Message:
-----------
[AMDGPU] MC support for v_wave_match_b32 on gfx13 (#223360)
Commit: 2eb384fccbf866b34a84f86c0e1355a6caed0f0e
https://github.com/llvm/llvm-project/commit/2eb384fccbf866b34a84f86c0e1355a6caed0f0e
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
M mlir/lib/Dialect/Linalg/Transforms/MorphOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
A mlir/test/Dialect/Linalg/categorize-named-ops.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
Log Message:
-----------
[MLIR][Linalg] Improve morphism semantics (#222959)
As exposed on the issues linked, the linalg morphism semantics could be
improved.
This PR changes the following semantics:
* Completes support for `-linalg-morph-ops` to include contractions and
ternary elementwise.
* Adds a `-linalg-categorize-ops`, which moves both named and generic
ops to category.
* Adds the possibility of "stopping at category" for both specialization
and generalization (not accessible from command line options but used by
the new categorize / old morph-ops pass).
* Removes the morphism options structure, since it's just a Boolean
flag.
* Improve test coverage, and make sure that `-linalg-morph-ops` does the
same thing as the other options.
It does NOT:
* Change the semantics of generalization, which continues to generalize
everything.
* Change the semantics of specialization, which continues to convert to
named or category whenever possible.
There's also come cleanups for the matching of elementwise that was
simpler as a `TypeSwitch`.
Fixes #221266 and #221191
Assisted by: Claude Opus
Commit: 66ec80c99d36c2b53d3c5e2b895e2f1eba8bfbe7
https://github.com/llvm/llvm-project/commit/66ec80c99d36c2b53d3c5e2b895e2f1eba8bfbe7
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libcxx/include/deque
M libcxx/test/libcxx/containers/sequences/deque/nodiscard.verify.cpp
Log Message:
-----------
[libc++][deque] Apply `[[nodiscard]]` to `deque::get_allocator` (#223599)
Added the missing `[[nodiscard]]`.
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Commit: fe69e138ee0ed61b69ea2de846d550798fe69e2e
https://github.com/llvm/llvm-project/commit/fe69e138ee0ed61b69ea2de846d550798fe69e2e
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Simplify getElementSz using getLoadStore-helpers (NFC) (#222908)
Commit: 4510d555b04130df9fee7af75c34955d1b0d156a
https://github.com/llvm/llvm-project/commit/4510d555b04130df9fee7af75c34955d1b0d156a
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
A llvm/test/CodeGen/AArch64/smulh.ll
A llvm/test/CodeGen/AArch64/sve-smulh.ll
A llvm/test/CodeGen/AArch64/sve-umulh.ll
A llvm/test/CodeGen/AArch64/umulh.ll
A llvm/test/CodeGen/RISCV/smulh.ll
A llvm/test/CodeGen/RISCV/umulh.ll
A llvm/test/CodeGen/X86/smulh.ll
A llvm/test/CodeGen/X86/umulh.ll
Log Message:
-----------
[LLVM] Add llvm.[su]mulh intrinsics. (#220293)
These intrinsics correspond to (un)signed multiply-high operations. The
motivation for introducing them is to allow more accurate costing
(particularly for vectorisation) and to simplify code generation for
chained multiply-high operations.
Together with subsequent patches to combine and cost the intrinsics,
this gives an 8% speedup on 750.sealcrypto_r on Neoverse V2.
Commit: aef91d6bcd7a7524ddc0f20b892381b5a3f3ebaf
https://github.com/llvm/llvm-project/commit/aef91d6bcd7a7524ddc0f20b892381b5a3f3ebaf
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/conditional-subtract.ll
Log Message:
-----------
[AArch64] Reuse SUBS results for conditional subtraction (#223391)
For C++ code such as:
uint64_t conditional_subtract(uint64_t x, uint64_t q) {
return x - (x >= q ? q : 0);
}
AArch64 currently uses three instructions for the conditional
subtraction (omitting the return):
cmp x0, x1
csel x8, x1, xzr, hs
sub x0, x0, x8
The comparison already computes x - q to set the condition flags, but
its arithmetic result is discarded. Preserve that result with SUBS and
select between it and x, reducing the sequence to two instructions:
subs x8, x0, x1
csel x0, x8, x0, hs
Apply this combine to i32 and i64 single-use selects with zero in either
arm. Keep the original flags and condition code, allowing signed,
unsigned, equality, and overflow conditions while preserving other users
of the comparison.
This gives an approximately 3% performance improvement in the
750.sealcrypto_r benchmark from SPEC CPU 2026.
Commit: 8397594236fb24502944a02c9662f4120f347843
https://github.com/llvm/llvm-project/commit/8397594236fb24502944a02c9662f4120f347843
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Move ISD::FP_TO_*INT_SAT actions to be with a Subtarget's other ops. (#223657)
Don't treat them differently to the general pattern we try to keep to
based on grouping each Subtarget abilities - they shouldn't allow
soft-float either.
Cleanup to reduce diff in #199416
Commit: d8e5c98e4e1e581d61c3c791b3d337c7f2d720ec
https://github.com/llvm/llvm-project/commit/d8e5c98e4e1e581d61c3c791b3d337c7f2d720ec
Author: David Green <david.green at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/ARM/shuffle.ll
Log Message:
-----------
[ARM] Add Neon costs for vrev shuffles (#223310)
This, like for AArch64 and MVE, allows some of the legal vrev shuffle
masks to be costed as if they are a single instruction, which can help
prevent the mid end from deoptimizing the code.
Commit: 3a42f8a335269c4d01274f8b04057fa66c87d969
https://github.com/llvm/llvm-project/commit/3a42f8a335269c4d01274f8b04057fa66c87d969
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/builtins-arm.c
M clang/test/CodeGen/builtins-arm64.c
Log Message:
-----------
[ARM] Emit llvm.clear_cache for __clear_cache() (#223398)
It looks like the ARM-specific __clear_cache() builtin emits different
IR than the generic __builtin___clear_cache() builtin (added later),
which uses the llvm.clear_cache intrinsic (which will typically lower to
a __clear_cache libcall, of course).
Use llvm.clear_cache for __clear_cache() as well, for consistency and to
slightly simplify the code.
Commit: 184ef35f1d4fd0433b50c953f0495f4199d22223
https://github.com/llvm/llvm-project/commit/184ef35f1d4fd0433b50c953f0495f4199d22223
Author: Naveen <navehs at qti.qualcomm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/memset.ll
Log Message:
-----------
[AggressiveInstCombine] Guard memset with length in [0, 1] (#213240)
Use computeKnownBits to identify nonconstant memset lengths whose
possible values are limited to zero and one. The check is integrated
into the existing instruction loop in foldUnusualPatterns via the
dedicated helper foldMemSetZeroOrOneLength.
Insert a conditional branch around the memset and specialize the
executed path to a constant length of one. A following InstCombine
pass can then replace it with a byte store, including for a
nonconstant fill value.
Do not transform wider ranges such as [0, 2].
Fixes #213027.
Assisted by GPT-5
Commit: 92d4f66a26fc434b186df29df9a6695420b60ebb
https://github.com/llvm/llvm-project/commit/92d4f66a26fc434b186df29df9a6695420b60ebb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerFP_TO_INT_SAT - use original SDValue directly. NFC. (#223651)
No need to access everything via the SDNode
Cleanup to reduce diff in #199416
Commit: 5bf2127dac5c77a4368cc23fd445fae248f65b9a
https://github.com/llvm/llvm-project/commit/5bf2127dac5c77a4368cc23fd445fae248f65b9a
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
A llvm/test/CodeGen/AArch64/misched-prera-only1.mir
Log Message:
-----------
[MISched] Fix pre-RA pickOnlyChoice tracing (#223182)
Add missing tracePick calls. Now GenericScheduler and
PostGenericScheduler tracing coverage is complete. Add a stable only1
test for pre-RA scheduling.
Commit: d940cd62a7851220d60d50c6e140b52e3462b242
https://github.com/llvm/llvm-project/commit/d940cd62a7851220d60d50c6e140b52e3462b242
Author: Fred Tingaud <95592999+frederic-tingaud-sonarsource at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
M llvm/unittests/Demangle/MicrosoftDemangleTest.cpp
Log Message:
-----------
[MSVC][Demangling] Respect MSDF_NoCallingConvention for function pointers (#209113)
The goal is to update MSVC demangling so that we control whether we
display a function pointer as `void (__cdecl *funcPtr)(void)` or `void
(*funcPtr)(void)`, by abiding by the `MSDF_NoCallingConvention` flag.
It is not a one-liner because function pointers used to use a trick
where it would unconditionally drop all the flags and pass
`OF_NoCallingConvention` to output the calling convention inside the
parentheses. In order to respect `MSDF_NoCallingConvention`, we need to
get rid of this trick.
A side effect of the trick was that OF_NoReturnType was also lost, which
is actually good because dropping the return type of a named function is
unambiguous, but dropping the return type of a function pointer loses
important information. The fix enforces that behavior explicitly.
This change can have impact for end-users who always passed
MSDF_NoCallingConvention, but I believe that this new behavior is the
one they were expecting.
Assisted-by: Claude
Commit: 9362acaf8cc97977d51ef09aaf6a2c6fe46a5361
https://github.com/llvm/llvm-project/commit/9362acaf8cc97977d51ef09aaf6a2c6fe46a5361
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
A llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
Log Message:
-----------
[NFC][AMDGPU] Add cost tests for integer to/from floating point casts (#223571)
Cover i48, i64, i128, bf16, fp128 and narrow vector lanes across FP64
rates, 16 bit instructions, sdwa and both cost kinds.
Assisted-by: Claude Code Opus 5
Commit: be1ca5fcce2b2c91342b691b79fb5c30ba28688e
https://github.com/llvm/llvm-project/commit/be1ca5fcce2b2c91342b691b79fb5c30ba28688e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/test/CodeGen/ARM/setjmp_longjmp.ll
M llvm/unittests/Target/ARM/InstSizes.cpp
Log Message:
-----------
[ARM] Fix Int_eh_sjlj_longjmp instruction size (#223639)
These pseudos expand to one more instruction on non-darwin/windows
platforms.
See: https://github.com/llvm/llvm-project/blob/88107b203b9e02a2d6ce87bf8ba0d98cb6ff53ec/llvm/lib/Target/ARM/ARMAsmPrinter.cpp#L2738-L2764
Commit: 637ead9bec3593e96141b22e6f49a59abb45be91
https://github.com/llvm/llvm-project/commit/637ead9bec3593e96141b22e6f49a59abb45be91
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
Log Message:
-----------
[MLIR][Linalg] Fix ASAN bug from #222959 (#223683)
Commit: eccf6a14a802f941acc3fde5950c20992874f542
https://github.com/llvm/llvm-project/commit/eccf6a14a802f941acc3fde5950c20992874f542
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Return a SCEVUse from getAddRecExpr and propagate use flags. (#221606)
Same as https://github.com/llvm/llvm-project/pull/220007 but for
getAddRecExpr:
Pass both expression and use specific flags to getAddRecExpr and
propagate the use flags, if valid conservatively. That is, the final expression
forms an AddRec with the same operands. For example, it is not valid to
propagate the use flags if other (sub-)expressions have been inlined.
It also includes a few mechanical changes, to update users that still
expected const SCEV *.
PR: https://github.com/llvm/llvm-project/pull/221606
Commit: b249b47fad295131dc005435c895459e25719806
https://github.com/llvm/llvm-project/commit/b249b47fad295131dc005435c895459e25719806
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[Profcheck] Exclude two new tests (#223690)
Exclude these tests for now. We haven't gotten to AtomicExpand/ARM yet,
and the AggressiveInstCombine change is overlapping.
Commit: b15f58cd8bcbd29156ff2cc8c6c89effba12c293
https://github.com/llvm/llvm-project/commit/b15f58cd8bcbd29156ff2cc8c6c89effba12c293
Author: ahmed mohamed kamel <109012086+AhmedKamel10 at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/warn-shadow.cpp
Log Message:
-----------
[clang][Sema] Fix false-positive -Wshadow for friend functions (#221249)
A friend function defined inline in a class body has no implicit `this`,
so a parameter with the same name as a field cannot actually shadow it.
`CheckShadow` only exempted static members and members with an explicit
object parameter, it never handled the case where the enclosing function
isn't a member function at all, which fell through to the generic
diagnostic. In this PR I extend the exemption to cover that case and
added the regression test.
In this PR, I used Claude to help navigate the codebase and explain key
functions.
Fixes #221190
Commit: ad1a3f3a488f1d0ff89e5c5f4cdf59d71a8218b5
https://github.com/llvm/llvm-project/commit/ad1a3f3a488f1d0ff89e5c5f4cdf59d71a8218b5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/test/CodeGen/builtins-arm64.c
Log Message:
-----------
clang: Fix a test assuming single digit metadata numbers (#223688)
Commit: 677a4c33ba942fe7aec6a1be15ba388f1b74d855
https://github.com/llvm/llvm-project/commit/677a4c33ba942fe7aec6a1be15ba388f1b74d855
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/concept-crash-on-diagnostic.cpp
Log Message:
-----------
[Clang] Handle unsatisfied NestedRequirement correctly (#223001)
Sema::BuildNestedRequirement(Expr *Constraint) built an incorrect
NestedRequirement even when unsatisfied. It was never triggered because
they were never diagnosed (we didn't diagnose concept details for
static_assert until ab896c6c6f2) and the other error handlings were done
properly in instantiator.
No release note because of regression-on-trunk.
Fixes https://github.com/llvm/llvm-project/issues/222954
Commit: 3eb8d17174638ccc5d0d6711b433c042fbddf66d
https://github.com/llvm/llvm-project/commit/3eb8d17174638ccc5d0d6711b433c042fbddf66d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Partially reapply "Refactor instantiation of declarations within concepts" (#223311)
This partially reverts db65ace07
It turns out that we cannot simply reuse the instantiated declarations
on stack, and our LIS is lack of ability of distinguishing different
template arguments.
This PR relands the refactoring part of the previous attempt, still
making it possible to have instantiated parameters before checking C++26
fold expression constraints, plus a regression test.
Fixes #198052
Closes #223220
Commit: bcf12a5af6b24122ce93d93080bcbaa4f3c9140d
https://github.com/llvm/llvm-project/commit/bcf12a5af6b24122ce93d93080bcbaa4f3c9140d
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-declare-target-declaration.mlir
Log Message:
-----------
[Flang][OpenMP] Prevent internal linkage on declarations for declare target variables (#222487)
It's illegal to have a global variable declaration with any linkage
other than external or weak, in certain cross module situations we were
applying internal linkage to declarations which breaks the verification
step.
Commit: f9627febe7ec6a558370e5a0374cb90459479a42
https://github.com/llvm/llvm-project/commit/f9627febe7ec6a558370e5a0374cb90459479a42
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
Log Message:
-----------
[AMDGPU] Optimize PreRARematStage candidate initialization (#220924)
The computation of the LiveIn/LiveOut sets in
PreRARematStage::ScoredRemat::init showed up as a significant compile
time bottleneck in code using kernels from composable_kernel.
Compute the LiveIn/LiveOut sets for all candidates in a single iteration
of the all regions and DAG LiveIns/LiveOuts without iterating the
candidates.
Commit: 01d59ab35faf33cc50c66290206a9bcbc6aed936
https://github.com/llvm/llvm-project/commit/01d59ab35faf33cc50c66290206a9bcbc6aed936
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-iterator.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-task-charbox.mlir
M mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop-charbox.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
Log Message:
-----------
[OpenMPToLLVMIRTranslation] Avoid use of ConstantExpr::getSizeOf() (#223363)
This will no longer be supported in ptradd representation. Directly
produce constants with the correct size instead.
Commit: 1a8797bc8a24663747c17d9308a82d7fb987a922
https://github.com/llvm/llvm-project/commit/1a8797bc8a24663747c17d9308a82d7fb987a922
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/test/SemaCXX/ctad.cpp
Log Message:
-----------
[Clang] Fix synthesis of alias CTAD constraints (#223340)
buildAssociatedConstraints reconstructs a template parameter list
relative to its primary template. However it didn't match the
construction of the CTAD guide very precisely.
Fixes https://github.com/llvm/llvm-project/issues/124715
Commit: e2c2e9705d86455920173185bc40863940f8b0f3
https://github.com/llvm/llvm-project/commit/e2c2e9705d86455920173185bc40863940f8b0f3
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[offload][amd] Fix inconsistent DynBlock MemSize usage (#223452)
The AMD plugin is using two (potentially) different Dynamic Block memory
sizes:
* `LaunchArgs.DynCGroupMem` (this the original value passed to launch)
as an implicit argument
* `DynBlockMemSize` (this is the adjusted value in PluginInterface and
pass to the RTLs) as the `TotalBlockMemSize`.
Changing the first usage as this seems a leftover from #152831 where
usages in the plugins where changed to `DynBlockMemSize`.
Commit: 449bc5ac6348c72c48fdccd3fad9d2dc2968af2b
https://github.com/llvm/llvm-project/commit/449bc5ac6348c72c48fdccd3fad9d2dc2968af2b
Author: Sachin 🗲 <s4chinjha at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
Log Message:
-----------
[libc][bazel] Adds missing bf16 MPFR test targets for bazel (#223342)
This pr addresses #221026 and adds the missing bazel targets for the
bf16 MPFR tests.
Co-authored-by: Zorojuro <sawantsukumar at gmail.com>
Commit: 36ce6fd0da77365f4e36baacc79f744f6eb589fb
https://github.com/llvm/llvm-project/commit/36ce6fd0da77365f4e36baacc79f744f6eb589fb
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
Log Message:
-----------
[NFC][AMDGPU] Fix two code quality issues in AMDGPUSwLowerLDS (#223685)
- NumStaticLDS is always a positive number, so it was always true
- Potential `Changed = true` was dropped in the loop
Commit: b4c81d59773bd4f13b26b861d3ba5e173a2d11ee
https://github.com/llvm/llvm-project/commit/b4c81d59773bd4f13b26b861d3ba5e173a2d11ee
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerFP_TO_INT_SAT - use MVT src/dst types directly. NFC. (#223689)
Only the saturation type needs to be EVT during lowering
Cleanup to reduce diff in #199416
Commit: bde5e74309f6d66253a8a1360df575daa19e5b55
https://github.com/llvm/llvm-project/commit/bde5e74309f6d66253a8a1360df575daa19e5b55
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterPressure.cpp
A llvm/test/CodeGen/X86/dead-register-pr76416.mir
A llvm/test/CodeGen/X86/inline-asm-pr149144.ll
A llvm/test/CodeGen/X86/inline-asm-pr155807.ll
A llvm/test/CodeGen/X86/inline-asm-pr76416.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
A llvm/test/CodeGen/X86/pr205272.ll
M llvm/test/CodeGen/X86/ssub_sat_plus.ll
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/CodeGen/X86/usub_sat_plus.ll
M llvm/test/CodeGen/X86/vector-idiv-strictfp.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/xmulo.ll
Log Message:
-----------
RegisterPressure: Remove dead defs correctly (#222627)
When an instruction has overlapping register defs where only some carry
the dead flag (for example a dead super-register def alongside a live
sub-register def), the collector left the shared register units in both the live and
dead def sets. That produced a PressureDiff decrement with no matching increment
and tripped the "PSet overflow/underflow" assertion in getUpwardPressureDelta.
A register unit is dead if any def covering it is dead, regardless of
operand order. Reconcile by subtracting the dead defs from the live defs instead
of the reverse: removeRegLanes only clears the overlapping units, so a def
keeps any units a dead def does not cover.
Fixes #155807.
Fixes #149144.
Fixes #76416.
Fixes #205272.
Co-authored-by: XChy <xxs_chy at outlook.com>
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 4456696e795c86549682f1908c5b1adeb7b0295c
https://github.com/llvm/llvm-project/commit/4456696e795c86549682f1908c5b1adeb7b0295c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CodeGen/AArch64/sve/dup.c
Log Message:
-----------
[clang][CIR] Add code-gen for DUP intrinsics for bool types (#223459)
As per SVE ABI, the storage type for svbool_t is `vector<vscale x 16 x i1>` (i.e. full predicate register) and that's what the change in `emitToMemory` reflects (see LowerToLLVM.cpp).
Commit: 058ca1274446c7fa27b193237a90c21dddf7833c
https://github.com/llvm/llvm-project/commit/058ca1274446c7fa27b193237a90c21dddf7833c
Author: Jan Schultke <me at eisenwave.net>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx29Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__bit/shift.h
M libcxx/include/bit
M libcxx/include/module.modulemap.in
M libcxx/include/version
M libcxx/modules/std/bit.inc
M libcxx/test/libcxx/utilities/bit/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/bit.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/numerics/bit/bitops.shift/shl.pass.cpp
A libcxx/test/std/numerics/bit/bitops.shift/shr.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement `<bit>` parts of P3793R2 Better shifting (#219389)
Partially implements #204401
That is, the scalar `<bit>` parts are implemented, but the `<simd>`
overloads are missing. Notice that only `__cpp_lib_bitops` is set to
`202606L`. `__cpp_lib_simd_bitops` is missing.
The implementations of `shl` and `shr` are based on the reference
implementation in the paper. The test code is partially AI-generated and
inspired by the test code for `rotl` or `rotr`, but comes with
significant modernizations.
Commit: c5c7a6b1381b24b6a6ceb7c2297f8a99569c8b0e
https://github.com/llvm/llvm-project/commit/c5c7a6b1381b24b6a6ceb7c2297f8a99569c8b0e
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/sve-fp-constrained-intrinsics.ll
Log Message:
-----------
[NFC][LLVM] Add fmul coverage to sve-fp-constrained-intrinsics.ll (#223658)
Commit: 6f304f56c86382c2ad296d440c87f24abb05b4c3
https://github.com/llvm/llvm-project/commit/6f304f56c86382c2ad296d440c87f24abb05b4c3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
Log Message:
-----------
[clang][bytecode] Fix castBackMemberPointer with null member pointers (#223680)
Do the same thing the current interpreter does: nothing.
Commit: 4600d3ed9189fa45e586daad813a043f3de8b85c
https://github.com/llvm/llvm-project/commit/4600d3ed9189fa45e586daad813a043f3de8b85c
Author: Sachin 🗲 <s4chinjha at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][bazel] Adds missing targets for bf16 smoke tests (#223343)
This pr addresses #221026 and adds the missing bazel targets for the
bf16 smoke tests.
Commit: 73e97a620892c9d5df8bafbc3af9a084be35ac98
https://github.com/llvm/llvm-project/commit/73e97a620892c9d5df8bafbc3af9a084be35ac98
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
M flang/test/Lower/OpenACC/acc-private.f90
Log Message:
-----------
[flang][acc] Ensure private recipe optional yields expected type (#223542)
Updates private recipe lowering so that locally allocated variables are
converted to the recipe result type.
Commit: 83290d61f6ead40a5c38297a0442b63291ce7a48
https://github.com/llvm/llvm-project/commit/83290d61f6ead40a5c38297a0442b63291ce7a48
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libcxx/include/__algorithm/find_if.h
A libcxx/test/libcxx/algorithms/unaligned_empty_range.pass.cpp
Log Message:
-----------
[libc++] Don't assume a valid range in find_if for empty inputs (#213752)
Iterators for empty ranges are sometimes implemented using a
non-aligned sentinel value. Requiring proper alignment in that
case (which is part of the valid range assumption) causes a
hardening failure. Instead, don't make the assumption of a
valid range when the input range is empty in find_if.
Commit: 78cff11b235dac5dfd0e98f457a338d6d0fbd8b8
https://github.com/llvm/llvm-project/commit/78cff11b235dac5dfd0e98f457a338d6d0fbd8b8
Author: Michał Górny <mgorny at gentoo.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/test/lib/Analysis/CMakeLists.txt
Log Message:
-----------
[mlir] Fix linking `MLIRTestAliasAnalysis` to libMLIR (#223711)
Fixes regression introduced in 36fe08a5f92230655dd9662f121c092ced307ddd.
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Commit: 0e91ec7b66a14838361f5746273626320317d159
https://github.com/llvm/llvm-project/commit/0e91ec7b66a14838361f5746273626320317d159
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Analysis/BasicAA/vscale.ll
M llvm/test/Transforms/GVN/vscale.ll
M llvm/test/Transforms/NewGVN/vscale.ll
Log Message:
-----------
[BasicAA] Remove obsolete TODOs (NFC) (#223715)
We intentionally do not support non-canonical vscale GEPs in
BasicAA.
Commit: 1eff7f0039ee4d0b47cd60fa9f60fb3b75e55c41
https://github.com/llvm/llvm-project/commit/1eff7f0039ee4d0b47cd60fa9f60fb3b75e55c41
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/test/CodeGen/link-builtin-bitcode.c
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Expose more subtarget features for MLIR (#223561)
- `FeatureAtomitFaddNoRtnInsts` is needed to control when atomic
emulation
for buffer operations happens
- `FeatureBackOffBarrier` controls an inline-assembly workaround for
LDS-only barriers on old gfx9
- `FeatureLfsBarrierArriveAtomic` is a precise flag compared to arch
versions
- `FeatureORPFP8ConversionInsts` controls which MLIR FP8 types can be
lowered to LLVM
- `FeaturePermlane16Insts`is another feature check
Clang and flang tests are updated since they look at the feature set
AI disclosure: Claude made these changes, I wrote this message
Commit: 5c2e0a03ee47754f4a13dfd1a50dcb0459010aea
https://github.com/llvm/llvm-project/commit/5c2e0a03ee47754f4a13dfd1a50dcb0459010aea
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Add descriptors for REDUCTION_KIND and SHIFT (#223702)
Commit: 270c5d9a5ac69fdb97ca3fe6d7a82167b3459194
https://github.com/llvm/llvm-project/commit/270c5d9a5ac69fdb97ca3fe6d7a82167b3459194
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/fold-fmac-to-fmaak.mir
Log Message:
-----------
[AMDGPU] Prevent folding of FMAC into FMAAK with two literals (#217438)
Currently the `foldImmediate` function can fold FMAC into FMAAK with two
literals causing a verifier failure:
```
*** Bad machine code: VOP2/VOP3 instruction uses more than one literal ***
- function: fold_fmac_to_fmaak
- basic block: %bb.0 (0x627ad4dd40d0)
- instruction: %3:vgpr_16_lo128 = contract nofpexcept V_FMAAK_F16_t16 10526, killed %4:vgpr_16_lo128, 8478, implicit $mode, implicit $exec
```
This change checks if a newly formed FMAAK is valid, and in a case two
literals are used it introduces a MOV to legalize the instruction.
Commit: 9805babd4ca82557d5e258180c27d201e06ae12c
https://github.com/llvm/llvm-project/commit/9805babd4ca82557d5e258180c27d201e06ae12c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Log Message:
-----------
[GlobalISel] Remove dead declarations and functions in CombinerHelper (NFC) (#223624)
CombinerHelper::getDataLayout: Added on July 25, 2024 in commit
db8c84fc7a75dd60bcfff7160b51e1a55e7e0f73 without any callers.
CombinerHelper::tryCombineCopy: The last caller was removed on
September 24, 2023 in commit bc6e7f057340ab0b995cc17a170e34545a295f03.
CombinerHelper::matchCombineMergeUnmerge: The last use was removed on
January 30, 2026 in commit 369e78774aef11f8e1215bb41fdf8db138ce315e.
CombinerHelper::matchCombineAddP2IToPtrAdd,
CombinerHelper::applyCombineAddP2IToPtrAdd: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchCombineConstPtrAddToI2P,
CombinerHelper::applyCombineConstPtrAddToI2P: The last use was removed
on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchUndefSelectCmp: The last use was removed on
August 11, 2023 in commit 2d87319f06efa15949a0e6983796fc784e1b4028.
CombinerHelper::matchConstantOp: The last use was removed on
January 29, 2026 in commit d8d4096c0be07b993322d4f20bf82aaee498e578.
CombinerHelper::matchBinOpSameVal: The last use was removed on
September 2, 2026 in commit a7dc3296e484a0d92237e899cbce24dbbc7d0e45.
CombinerHelper::matchSimplifyAddToSub,
CombinerHelper::applySimplifyAddToSub: The last use was removed on
September 8, 2026 in commit 3741dacd195aa08b082570077ca89547cb062bc5.
CombinerHelper::matchAddSubSameReg: The last use was removed on
August 11, 2023 in commit 2d87319f06efa15949a0e6983796fc784e1b4028.
Commit: 9f660520e7db162f18c4ad515c0b0efce37df3e9
https://github.com/llvm/llvm-project/commit/9f660520e7db162f18c4ad515c0b0efce37df3e9
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Basic/IdentifierTable.h
M clang/lib/Basic/IdentifierTable.cpp
Log Message:
-----------
[clang] Unique MultiKeywordSelector with a UniquingSet (NFC) (#223626)
This patch migrates MultiKeywordSelector in SelectorTable from
llvm::FoldingSet to llvm::UniquingSet.
MultiKeywordSelector keys on an ArrayRef<const IdentifierInfo *>.
Switching to UniquingSet allows us to look up multi-keyword selectors
with a typed key, eliminating FoldingSetNodeID serialization at lookup
sites and removing MultiKeywordSelector::Profile.
Assisted-by: Antigravity
Commit: b016343155d61e9bcfcb64799987503b06b55381
https://github.com/llvm/llvm-project/commit/b016343155d61e9bcfcb64799987503b06b55381
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libcxxabi/src/private_typeinfo.cpp
Log Message:
-----------
[libc++abi][NFC] Format private_typeinfo.cpp (#223734)
I'm planning to work on `private_typeinfo.cpp` a bit, so this formats
the file to reduce the diff in later patches.
Commit: 3396648b577809c197a3da335affde1c772924d5
https://github.com/llvm/llvm-project/commit/3396648b577809c197a3da335affde1c772924d5
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
Log Message:
-----------
[alpha.webkit.UncountedLocalVarsChecker] Ignore lambda captures (#223617)
Ignore a variable declaration for a lambda capture as that is explicitly
checked by webkit.UncountedLambdaCapturesChecker instead.
Commit: f0d41abb33b6c4681dfd56c5804d8bab8dc5c77d
https://github.com/llvm/llvm-project/commit/f0d41abb33b6c4681dfd56c5804d8bab8dc5c77d
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-select-remap.ll
Log Message:
-----------
[SimplifyCFG] Fix use-after-free in switch-on-select remap when the compared value is a PHI (#223632)
Fixes #223138
`simplifySwitchOnSelectRemap` turns `switch (select (X == C), K, X)`
into `switch X` and retargets case `C` to wherever `K` goes. It dropped
the old edge for `C` with `removePredecessor` before it installed `X` as
the switch condition. When `X` is a PHI in that old destination, which
is what happens when case `C` branches back to the switch's own block,
dropping the edge leaves the PHI with a single input, so it gets folded
and erased. The switch was then made to use the erased PHI. Everything
after that was reading freed memory, which is why the reported assertion
moves around between SimplifyCFG's dominator tree update,
ScalarEvolution's `isSCEVable` check and instcombine depending on the
run.
The fix is to set the switch condition to `X` before touching the CFG.
If the PHI fold happens, its RAUW now rewrites the switch operand along
with the compare and select, and the stale pointer is never used again.
Commit: f0dc664fe9c80ba64f315f81d5de0d72c88b81dd
https://github.com/llvm/llvm-project/commit/f0dc664fe9c80ba64f315f81d5de0d72c88b81dd
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/declare-target-entry-iface.f90
M flang/test/Lower/OpenMP/declare-target-interface.f90
R flang/test/Lower/OpenMP/declare-target-multiple-entry.f90
Log Message:
-----------
[Flang][OpenMP] Support declare target on interfaces local to procedures (#218877)
Declarative directives implicitly affecting the surrounding procedures
are handled differently for interface procedures in Flang due to the
fact that the corresponding evaluation during lowering is attached to
the parent program unit, rather than the interface.
However, the current implementation to handle this edge case for
`declare_target` is based on the incorrect assumption that this can be
detected by comparing the owning procedure's symbol to the symbol of the
program unit lexically containing the directive. This fails whenever an
interface is located anywhere except for the main program.
Instead, this patch queries the details of the program unit containing
the directive to check directly whether it's an interface. Anything
else, including alternative entries to a procedure, is handled in the
regular way.
Commit: 44864513ceeb6a24f2050da3e929446a8a20f9d1
https://github.com/llvm/llvm-project/commit/44864513ceeb6a24f2050da3e929446a8a20f9d1
Author: tfzee <tim.ziegler at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/avx10_2bf16-rounding.ll
Log Message:
-----------
[X86] Lower bf16 round-to-integer on AVX10.2 via vrndscalebf16 (#213276)
Follow-up to #212245.
floor/ceil/trunc/rint/nearbyint/roundeven on bf16 are currently treated
as illegal causing them to be
promoted and causing scalarization of the vector cases.
AVX10.2 has packed vrndscalebf16, so mark these operations Legal for
v8bf16/v16bf16/v32bf16. The existing patterns already turns them into
X86ISD::VRNDSCALE with the matching immediate, so no new patterns are
needed.
Scalar bf16 reuses the path previously added in #212245.
llvm.round is left out since it is round-half-away-from-zero, which
vrndscale cannot encode.
For the strict version I kept the the old legalization for now since the
avx10.2 Instructions have hardcoded rounding and exception behavior.
(Further todo from my testing some of the strict versions need also some
extra handling since they currently will fail to select and crash the
compiler)
Used AI to code review and reword text.
Commit: eee3badbda422abdb6809353f95c7a3e22868561
https://github.com/llvm/llvm-project/commit/eee3badbda422abdb6809353f95c7a3e22868561
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/CIRPasses.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-win64-skipped.c
Log Message:
-----------
[CIR] Skip call-conv lowering on Windows x86_64 (#223583)
The x86-64 classifier implements SysV. We do not support Windows yet.
Assisted-by: Cursor / claude-opus-5
Commit: 30a496b8d0c9b2c9dc1d22df9550d04c8ead589f
https://github.com/llvm/llvm-project/commit/30a496b8d0c9b2c9dc1d22df9550d04c8ead589f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
A clang/test/CodeGen/exception-model-flag.c
Log Message:
-----------
clang: Emit "exception-model" module flag (#220053)
Record the exception-handling model as an "exception-model" IR module
flag when it differs from the target triple's default, mirroring how
other target ABI properties are recorded.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 9dffc7a230c3623284cc2a4184abe5beeca99681
https://github.com/llvm/llvm-project/commit/9dffc7a230c3623284cc2a4184abe5beeca99681
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Strip bitcasts in unmerge half-extraction matching (#223534)
isExtractHiElt/isExtractLoElt run their result through stripBitCast on
every path except the G_UNMERGE_VALUES ones, which returned the unmerge
source register raw. This change makes the handling uniform in all cases
Commit: 81353cba9f68d1beb5fe220b693f9dc3646d990c
https://github.com/llvm/llvm-project/commit/81353cba9f68d1beb5fe220b693f9dc3646d990c
Author: nudt_yixiao <1272950933 at qq.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve46.f90
Log Message:
-----------
[Flang] Avoid crash resolving restricted specific intrinsics (#217852)
Name resolution assumed that every specific intrinsic function handled
in a procedure context was unrestricted and had a numeric result. An
undeclared LLT used as a procedure pointer target therefore triggered a
CHECK because LLT is restricted and returns LOGICAL.
Rename the handler to reflect that it resolves both restricted and
unrestricted specific intrinsic functions. Preserve result types only
for unrestricted intrinsics; restricted intrinsics retain an untyped
symbol so later semantic checks can issue the appropriate diagnostic.
Fixes https://github.com/llvm/llvm-project/issues/208825
Co-authored-by: yixiao <yixiao at hygon.cn>
Commit: 1f83538aa13d9a622c36226e7c8a60ba58bb68f0
https://github.com/llvm/llvm-project/commit/1f83538aa13d9a622c36226e7c8a60ba58bb68f0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/builtin-object-size-codegen.c
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Apply pointer casts to opaque pointers (#223607)
For `((char *)&sqlite3Prepare_sParse) + 4`, the final byte offset should
be `4`, not `4 * sizeof(sqlite3Prepare_sParse)`. To handle that, we need
to actually pass the cast along to the opaque pointer.
Commit: 408a094bece64f8c8e98194f8359ced5ae31e4b9
https://github.com/llvm/llvm-project/commit/408a094bece64f8c8e98194f8359ced5ae31e4b9
Author: Ryotaro Kasuga <ryotaro.kasuga at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/test/CodeGen/PowerPC/sms-regpress.mir
Log Message:
-----------
[MachinePipeliner] Use VirtRegOrUnit instead of Register appropriately (#177535)
Resolve the FIXMEs in MachinePipeliner added in #167730, primarily by
replacing `Register` with `VirtRegOrUnit` where necessary to remove
invalid `static_cast`s. Based on my local testing, there was no
noticeable performance impact.
---------
Co-authored-by: Harsha Jagasia <harsha.jagasia at amd.com>
Commit: ad413891c0985b7e19bbd55c6ba193203e16281e
https://github.com/llvm/llvm-project/commit/ad413891c0985b7e19bbd55c6ba193203e16281e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
A llvm/test/TableGen/RuntimeLibcallEmitter-library-ref.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcalls: Add LibraryRef for dispatch-with-exclusion (#218869)
Let a SystemRuntimeLibrary dispatch a shared provider library while
dropping the impls the target replaces, since a library reference cannot nest
inside (sub ...). This is a compromise from the ideal of explicitly listing all calls,
but getting to that point is prooving to be difficult.
The opt-out is emitted inside setAvailableLibFuncs_<lib>, so the single library's
logic is self contained.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 277099f74c789dee10524ab57112444d8df38187
https://github.com/llvm/llvm-project/commit/277099f74c789dee10524ab57112444d8df38187
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
M llvm/test/Transforms/AtomicExpand/ARM/thread-model-single.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[LowerAtomic] Mark cmpxchg select with unknown branch weights (#223736)
LowerAtomic in cmpxchg lowering creates a select to figure out what to
store. This is conditioned on whether or not the compare value is equal
to the value in memory, which we currently have no way of knowing the
probability of. So mark the branch weights explicitly unknown.
It seems like we were lacking coverage of this case before #223157,
which made this test pop up on the profcheck bot.
Commit: 7d003d11953c0fee6bccf3e75bd9dedf45bbaf54
https://github.com/llvm/llvm-project/commit/7d003d11953c0fee6bccf3e75bd9dedf45bbaf54
Author: Mian Miftah <miftah.gungnir at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-uniform-vector.ll
Log Message:
-----------
[AMDGPU] Skip vector atomicrmw operands in AtomicOptimizer (#223309)
A uniform `<2 x i32>` `atomicrmw add` reaches a scalar-to-vector
lane-count cast and asserts in AMDGPUAtomicOptimizer.
The divergent-value path rejects types in `isLegalCrossLaneType`,
but the uniform-value path does not.
Returned vectors also enter scalar result construction.
Reject vector types in `visitAtomicRMWInst` and `visitIntrinsicInst`
before either value path. The regression covers unused
global `add`, returned LDS `and`,
and a uniform scalar `i16` control that must still optimize, using DPP
and iterative strategies on wave64 and wave32 subtargets.
Commit: 1dd934d123066d6d996bde5943b2136e621ba215
https://github.com/llvm/llvm-project/commit/1dd934d123066d6d996bde5943b2136e621ba215
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/utils/TableGen/Basic/RuntimeLibcalls.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
Log Message:
-----------
RuntimeLibcalls: Remove the dead IsDefault emitter machinery (#219947)
The IsDefault bit on RuntimeLibcallImpl fed a LibCallToDefaultImpl map
in the TableGen backend that was populated but never read.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8e39842f45ad190d87d098b92aad940941d98151
https://github.com/llvm/llvm-project/commit/8e39842f45ad190d87d098b92aad940941d98151
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/memset.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[AggressiveInstCombine] Preserve Profile Info for [0,1] Memset Guard (#223728)
This showed up as a profcheck failure from #213240. If the memset has
profile information, we can use that to synthesize appropriate branch
weights.
Commit: 0f4f7affa58186bd8e5721e773b34f8bfee55d4f
https://github.com/llvm/llvm-project/commit/0f4f7affa58186bd8e5721e773b34f8bfee55d4f
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/matrix-type.cpp
Log Message:
-----------
[Clang][Sema] Add Diagnostic for using matrix logical on non HLSL targets (#223252)
Make Clang emit an error message instead of crashing when using matrix
logical operations on non-HLSL targets.
Issue #222381
Commit: cdd52918379532618fe25368cfbe12b2334c5f9c
https://github.com/llvm/llvm-project/commit/cdd52918379532618fe25368cfbe12b2334c5f9c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/abs.ll
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
A llvm/test/Transforms/ConstraintElimination/decompose-signed-preconditions.ll
A llvm/test/Transforms/ConstraintElimination/decompose-unsigned-preconditions.ll
M llvm/test/Transforms/ConstraintElimination/gep-arithmetic-different-types.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/induction-exit-condition-or-and.ll
M llvm/test/Transforms/ConstraintElimination/induction-nowrap-from-scev-not-ir.ll
M llvm/test/Transforms/ConstraintElimination/induction-relational-predicate-latch.ll
M llvm/test/Transforms/ConstraintElimination/induction-symbolic-start-postinc.ll
M llvm/test/Transforms/ConstraintElimination/loops-header-tested-base.ll
M llvm/test/Transforms/ConstraintElimination/minmax.ll
M llvm/test/Transforms/ConstraintElimination/ne-tightening.ll
M llvm/test/Transforms/ConstraintElimination/or-non-negative.ll
M llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
M llvm/test/Transforms/ConstraintElimination/sext-signed-predicates.ll
M llvm/test/Transforms/ConstraintElimination/trunc.ll
M llvm/test/Transforms/ConstraintElimination/wrapping-math.ll
Log Message:
-----------
[ConstraintElim] Unify no-wrap queries. (#223537)
Unify no-wrap queries in new isKnownNoWrap helper, which checks both
wrap flags on instructions and query-based reasoning in a single place.
Checks signed/unsigned wrap depending on a flag.
Update both decompose and tryToStrengthenFlags to use shared helper.
This improves results in a number of cases, because some rules were only
implemented for tryToStrengthenFlags and others in decompose:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1313
Note that there are 2-3 small regressions due added flags/removed
branches pessimizing other parts of the pipeline.
Compile-time impact in the noise for geomean. Notable individual changes
is mafft -0.05% in stage1-ReleaseThinLTO, and lencod +0.05% for
stage2-O3.
https://llvm-compile-time-tracker.com/compare.php?from=54005dacf264d79e403808a704b18bcf1cbe956f&to=507624eb897062648a907245c46885d8af15359d&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/223537
Commit: f1dac288ccc5304dad0cfaf9b198239c2af5a6b0
https://github.com/llvm/llvm-project/commit/f1dac288ccc5304dad0cfaf9b198239c2af5a6b0
Author: ayaan <138162656+def3r at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/ARM/divmod-eabi.ll
M llvm/test/CodeGen/Mips/divrem.ll
M llvm/test/CodeGen/NVPTX/divrem-combine.ll
M llvm/test/CodeGen/PowerPC/p10-vector-modulo.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll
M llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
M llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/X86/divide-by-constant.ll
M llvm/test/CodeGen/X86/divrem.ll
Log Message:
-----------
[DAGCombiner] Port custom DAG combine for `rem` from NVPTX (#210344)
Part of #116695
Supersedes #167147
Port NVPTX combine for `rem` to DAGCombine. Folds `Num % Den -> Num -
(Num / Den) * Den` if `DIVREM` is not supported by the backend.
Commit: 8aa00e2756885f888f1ec36c249f37b171b5bc57
https://github.com/llvm/llvm-project/commit/8aa00e2756885f888f1ec36c249f37b171b5bc57
Author: David Green <david.green at arm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/shift-mod.ll
Log Message:
-----------
[AArch64][GlobalISel] Add GISel test coverage for shift-mod.ll. NFC (#223753)
Commit: be5f7cb792e55be1540d50bb19ab0eaee621f349
https://github.com/llvm/llvm-project/commit/be5f7cb792e55be1540d50bb19ab0eaee621f349
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A lldb/source/Plugins/Process/Windows/Common/LoadedModuleList.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
M lldb/unittests/Process/CMakeLists.txt
A lldb/unittests/Process/Windows/CMakeLists.txt
A lldb/unittests/Process/Windows/LoadedModuleListTest.cpp
Log Message:
-----------
[lldb][Windows] Key lldb-server's loaded-module list by base address (#223445)
`NativeProcessWindows` keys `m_loaded_modules` by `FileSpec`, so a
second mapping of an already-loaded DLL overwrites the first one's base
address, and `OnUnloadDll` then erases by address. The wrong mapping
gets dropped.
This reproduces reliably in swiftlang where `swiftCore.dll` is loaded
twice.
This patch maps by base address instead (the identity `UNLOAD_DLL`
carries), so an unload resolves to the right file and only retires the
reported entry when it is that file's last mapping.
It introduces the `LoadedModuleList` class to key the modules correctly
and 9 regression unit tests.
---------
Co-authored-by: Nerixyz <nero.9 at hotmail.de>
Commit: a949919bcf5bf634b50de503cdc85ef423d799c6
https://github.com/llvm/llvm-project/commit/a949919bcf5bf634b50de503cdc85ef423d799c6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/CMakeLists.txt
Log Message:
-----------
[AggressiveInstCombine] Fix shared libraries build (#223756)
Broken by #223728 by depending upon a function in ProfileData. Add that
as a dependency to fix the build.
Commit: 3cbae1632e6ca6f8436fcbc49d059cc924f883b0
https://github.com/llvm/llvm-project/commit/3cbae1632e6ca6f8436fcbc49d059cc924f883b0
Author: Kohei Yamaguchi <fix7211 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
A mlir/test/Dialect/SparseTensor/sparsifier_lower_affine.mlir
Log Message:
-----------
[mlir][sparse] Lower affine before SCF to CF in sparsifier (#219860)
Fix the lowering order in the sparsifier pipeline by running
`convert-scf-to-cf` after `lower-affine`.
Previously, `convert-scf-to-cf` ran while Affine control-flow operations
could still be present. For example, lowering an `scf.if` nested inside
an `affine.for` introduces multiple blocks into the loop body, violating
`affine.for`'s single-block region requirement and causing verification
to fail.
Running `lower-affine` first converts Affine control flow to SCF. The
subsequent `convert-scf-to-cf` pass can then lower both the existing SCF
operations and those introduced by Affine lowering to CFG-based control
flow.
Fixes #217895
Commit: 95bcf5d16a63e534e8ce0f039d8572734f87b5cd
https://github.com/llvm/llvm-project/commit/95bcf5d16a63e534e8ce0f039d8572734f87b5cd
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/include/lldb/ValueObject/ValueObjectRegister.h
M lldb/source/ValueObject/ValueObjectRegister.cpp
Log Message:
-----------
[lldb] Compare registers by LLDB register number (#223704)
Fix `GetIndexOfChildWithName`/`GetChildMemberWithName` on `Windows
x86_64` (Release builds), where comparing registers by RegisterInfo
pointer identity could spuriously fail to find sp/rsp in the GPR set.
Compare by `eRegisterKindLLDB` number instead.
Failing bot: https://ci-external.swift.org/job/lldb-windows/job/main
Commit: b2175ea5306fe59d8e82f8259d4d285ccd8644a3
https://github.com/llvm/llvm-project/commit/b2175ea5306fe59d8e82f8259d4d285ccd8644a3
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/non-type-template-param.cpp
Log Message:
-----------
[CIR] Support SubstNonTypeTemplateParmExpr for aggregates (#223603)
Lower `SubstNonTypeTemplateParmExpr` in `AggExprEmitter` by visiting its
replacement expression, matching classic Clang codegen (`CGExprAgg.cpp`)
and existing scalar (#146751), complex (#146755), and lvalue (#182920)
implementations.
The missing aggregate NTTP gap was analyzed with LLM assistance.
Fixes #223533
Commit: b623a0c6d49f2c8e1031216ead5641c3bf57f1d1
https://github.com/llvm/llvm-project/commit/b623a0c6d49f2c8e1031216ead5641c3bf57f1d1
Author: Kunal Dubey <xakep8 at protonmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/compound_literal.c
A clang/test/CIR/CodeGen/global-address-to-int.c
Log Message:
-----------
[CIR] Support pointer-to-int global initializers (#220643)
This allows CIR to emit global initializers where a constant address is
cast to an integer.
This fixes compound literals like `unsigned long addr = (unsigned
long)(int[]){1, 2, 3}` and also handles global variable, array element
and function addresses cast to integers.
Fixes #216618
Commit: 0c8394de73dc4111713674dc5608b43ab4e72b53
https://github.com/llvm/llvm-project/commit/0c8394de73dc4111713674dc5608b43ab4e72b53
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/llvm/config.bzl
Log Message:
-----------
[bazel] Use new rules_cc API to determine musl targeting (#223549)
This avoids requiring hermetic-llvm in the public BUILD file API.
Downstream users need to update to this version of rules_cc
Commit: 73b9d5341de05b0b433c1c133104ab1b74ab6e13
https://github.com/llvm/llvm-project/commit/73b9d5341de05b0b433c1c133104ab1b74ab6e13
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A openmp/docs/CommandLineArgumentReference.md
R openmp/docs/CommandLineArgumentReference.rst
A openmp/docs/ReleaseNotes.md
R openmp/docs/ReleaseNotes.rst
A openmp/docs/SupportAndFAQ.md
R openmp/docs/SupportAndFAQ.rst
A openmp/docs/design/GPUGenericMode.md
R openmp/docs/design/GPUGenericMode.rst
A openmp/docs/design/GPUSPMDMode.md
R openmp/docs/design/GPUSPMDMode.rst
A openmp/docs/design/Offloading.md
R openmp/docs/design/Offloading.rst
A openmp/docs/design/Overview.md
R openmp/docs/design/Overview.rst
A openmp/docs/design/Runtimes.md
R openmp/docs/design/Runtimes.rst
A openmp/docs/index.md
R openmp/docs/index.rst
A openmp/docs/openacc/OpenMPExtensions.md
R openmp/docs/openacc/OpenMPExtensions.rst
A openmp/docs/openacc/Overview.md
R openmp/docs/openacc/Overview.rst
A openmp/docs/optimizations/OpenMPOpt.md
R openmp/docs/optimizations/OpenMPOpt.rst
A openmp/docs/optimizations/OpenMPUnawareOptimizations.md
R openmp/docs/optimizations/OpenMPUnawareOptimizations.rst
A openmp/docs/optimizations/Overview.md
R openmp/docs/optimizations/Overview.rst
A openmp/docs/remarks/OMP100.md
R openmp/docs/remarks/OMP100.rst
A openmp/docs/remarks/OMP101.md
R openmp/docs/remarks/OMP101.rst
A openmp/docs/remarks/OMP102.md
R openmp/docs/remarks/OMP102.rst
A openmp/docs/remarks/OMP110.md
R openmp/docs/remarks/OMP110.rst
A openmp/docs/remarks/OMP111.md
R openmp/docs/remarks/OMP111.rst
A openmp/docs/remarks/OMP112.md
R openmp/docs/remarks/OMP112.rst
A openmp/docs/remarks/OMP113.md
R openmp/docs/remarks/OMP113.rst
A openmp/docs/remarks/OMP120.md
R openmp/docs/remarks/OMP120.rst
A openmp/docs/remarks/OMP121.md
R openmp/docs/remarks/OMP121.rst
A openmp/docs/remarks/OMP130.md
R openmp/docs/remarks/OMP130.rst
A openmp/docs/remarks/OMP131.md
R openmp/docs/remarks/OMP131.rst
A openmp/docs/remarks/OMP132.md
R openmp/docs/remarks/OMP132.rst
A openmp/docs/remarks/OMP133.md
R openmp/docs/remarks/OMP133.rst
A openmp/docs/remarks/OMP140.md
R openmp/docs/remarks/OMP140.rst
A openmp/docs/remarks/OMP150.md
R openmp/docs/remarks/OMP150.rst
A openmp/docs/remarks/OMP160.md
R openmp/docs/remarks/OMP160.rst
A openmp/docs/remarks/OMP170.md
R openmp/docs/remarks/OMP170.rst
A openmp/docs/remarks/OMP180.md
R openmp/docs/remarks/OMP180.rst
A openmp/docs/remarks/OMP190.md
R openmp/docs/remarks/OMP190.rst
A openmp/docs/remarks/OptimizationRemarks.md
R openmp/docs/remarks/OptimizationRemarks.rst
Log Message:
-----------
[OpenMP][docs] Rename reStructuredText files to Markdown (#222191)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Validation:
- Confirmed this commit contains exactly 34 `.rst` to `.md` renames and
no content changes.
- The complete stacked migration is validated in the follow-up PR.
Commit: d0e55509a1cdfec0802d8b9e254ca2456a04175c
https://github.com/llvm/llvm-project/commit/d0e55509a1cdfec0802d8b9e254ca2456a04175c
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M openmp/docs/CommandLineArgumentReference.md
M openmp/docs/README.txt
M openmp/docs/ReleaseNotes.md
M openmp/docs/SupportAndFAQ.md
M openmp/docs/design/GPUGenericMode.md
M openmp/docs/design/GPUSPMDMode.md
M openmp/docs/design/Offloading.md
M openmp/docs/design/Overview.md
M openmp/docs/design/Runtimes.md
M openmp/docs/index.md
M openmp/docs/openacc/OpenMPExtensions.md
M openmp/docs/openacc/Overview.md
M openmp/docs/optimizations/OpenMPOpt.md
M openmp/docs/optimizations/OpenMPUnawareOptimizations.md
M openmp/docs/optimizations/Overview.md
M openmp/docs/remarks/OMP100.md
M openmp/docs/remarks/OMP101.md
M openmp/docs/remarks/OMP102.md
M openmp/docs/remarks/OMP110.md
M openmp/docs/remarks/OMP111.md
M openmp/docs/remarks/OMP112.md
M openmp/docs/remarks/OMP113.md
M openmp/docs/remarks/OMP120.md
M openmp/docs/remarks/OMP121.md
M openmp/docs/remarks/OMP130.md
M openmp/docs/remarks/OMP131.md
M openmp/docs/remarks/OMP132.md
M openmp/docs/remarks/OMP133.md
M openmp/docs/remarks/OMP140.md
M openmp/docs/remarks/OMP150.md
M openmp/docs/remarks/OMP160.md
M openmp/docs/remarks/OMP170.md
M openmp/docs/remarks/OMP180.md
M openmp/docs/remarks/OMP190.md
M openmp/docs/remarks/OptimizationRemarks.md
Log Message:
-----------
[OpenMP][docs] Finish MyST migration for OpenMP docs (#222194)
This was prepared with rst2myst plus LLM-assisted cleanup. The main
manual intervention was porting CommandLineArgumentReference.(rst|md) to
the semantic [`option`
directive](https://www.sphinx-doc.org/en/master/usage/domains/standard.html#directive-option),
which causes some rendering differences.
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #222191, which is a standalone commit that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
Please spot check my work and approve if it looks good. You can use the
HTML links below to confirm it renders properly.
-----
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---------
Co-authored-by: Michael Kruse <llvm-project at meinersbur.de>
Commit: 3714d5062c1ab2cbb4469c30eaef89989e9bc8df
https://github.com/llvm/llvm-project/commit/3714d5062c1ab2cbb4469c30eaef89989e9bc8df
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/struct-return-splat-gathered-scalars.ll
Log Message:
-----------
[SLP]Fix insert point for struct-call extractvalue entries with multi-block scalars
Emit the vector extractvalue right after the vectorized call it depends
on, so it dominates all uses.
Fixes #223726
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223766
Commit: 36de8b20fc6cb5edf4f0fe6e686c984e40bed35f
https://github.com/llvm/llvm-project/commit/36de8b20fc6cb5edf4f0fe6e686c984e40bed35f
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/recip-sqrt-estimate-illegal-scalar-types.ll
A llvm/test/CodeGen/X86/recip-sqrt-estimate-illegal-types.ll
Log Message:
-----------
[X86] Require legal result types for f32 estimates
The single-precision paths in `getRecipEstimate` and `getSqrtEstimate`
match a fixed set of scalar and vector f32 types, then check the
corresponding subtarget features. Those checks do not imply that the
result type is legal. Soft-float makes these result types illegal. Scalar
f32 is also illegal on a 32-bit SSE1 target without SSE2 or x87. The hooks
can then build an X86-specific estimate node with an illegal result type
before type legalization. Type legalization has no rule for that node, so
compilation fails.
Require a legal result type before entering the single-precision estimate
paths. The f16 paths in these hooks already require a legal type. After
this patch, the f32 paths match that behavior. The hooks return no estimate
for an illegal result type, so the original division or square root stays
in the DAG and follows its normal lowering. Estimate code generation for
legal result types is unchanged.
Fixes https://github.com/llvm/llvm-project/issues/217801
Assisted-by: Claude Opus 5, GPT-5.6 Sol.
Commit: 8ef69555af1ca20dd5c933bcf88d6185e6558b35
https://github.com/llvm/llvm-project/commit/8ef69555af1ca20dd5c933bcf88d6185e6558b35
Author: Justin Stitt <justinstitt at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/OverflowBehaviorTypes.md
M clang/include/clang/AST/TypeBase.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/test/Sema/attr-overflow-behavior.cpp
A clang/test/Sema/overflow-behavior-qualifiers.c
M clang/test/SemaCXX/sugar-common-types.cpp
Log Message:
-----------
[Clang] Keep qualifiers outside of OverflowBehaviorType nodes (#222190)
`__typeof_unqual__` wasn't stripping `const` off of an overflow behavior
type:
```c
__typeof_unqual__(const __ob_trap int) x; // '__ob_trap const int'
```
The canonical type was always right, so `x` really is writable -- we
just printed it as const, which is the opposite of the truth.
`getOverflowBehaviorType()` hoisted qualifiers out for the canonical
type but stored the underlying type verbatim in the sugar node, so
`const __ob_trap int` became `OBT{const int}` with nothing qualified at
the `QualType` level. `getUnqualifiedType()` checks the canonical type
to decide there's something to strip, then strips it by desugaring one
step at a time. `OverflowBehaviorType` isn't sugar, so that walk
dead-ends on it and the qualifiers never come off.
So the rule is: a type node you can't desugar through shouldn't have a
canonical type with local qualifiers on it. Split the qualifiers off at
construction and put them back outside the node, which is where the
canonical already puts them.
Local qualifiers alone aren't enough here. `__ob_trap cint`, where
`cint` is a `typedef const int`, has the const in its canonical type but
not in its local qualifier set, and it's broken the same way.
`getSplitUnqualifiedType()` gets both. We lose the `cint` spelling in
that case but I think that's fine... that typedef is what was hiding the
qualifier in the first place.
While here, let `canPrefixQualifiers()` prefix an OBT so we print `const
__ob_trap int` instead of `__ob_trap int const`. That list is for types
that wrap the declarator, and an OBT just puts a keyword in front of an
integer like `_BitInt` and `_Atomic` do. We were already printing the
same type two different ways in attr-overflow-behavior.cpp, which is a
pretty good hint it was in the wrong list.
Note the new test checks the *printed* types. Since the canonical type
was never wrong, anything that only looks at canonical types passes
either way and doesn't actually test this.
Also spell out in the docs that an OBT is a type specifier and not a
qualifier.
Assisted-by: claude
Signed-off-by: Justin Stitt <justinstitt at google.com>
Commit: 00323c9d8fc6101091dda1cf8c53c2a774b27fa3
https://github.com/llvm/llvm-project/commit/00323c9d8fc6101091dda1cf8c53c2a774b27fa3
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/test/CIR/IR/invalid-try-catch.cir
M clang/test/CIR/IR/try-catch.cir
A clang/test/CIR/Transforms/eh-abi-lowering-eh-spec-nyi.cir
A clang/test/CIR/Transforms/flatten-eh-spec-nyi.cir
Log Message:
-----------
[CIR][EH] Add dialect elements for dynamic exception specification (#223503)
This change introduces the CIR dialect elements that will be needed to
implement dynamic exception specification handling. At this point
nothing generates any of these elements, and they are not handled in CFG
flattening or EH ABI lowering. Those will be implemented in follow-up
changes.
See clang/docs/CIR/CleanupAndEHDesign.md for the design of this feature.
Assisted-by: Cursor / various models
Commit: bb08625cb147f07de93ff6ae933336d8c4b3b8e3
https://github.com/llvm/llvm-project/commit/bb08625cb147f07de93ff6ae933336d8c4b3b8e3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/arm-eabi.c
M clang/test/Driver/eabi.c
M flang/lib/Frontend/FrontendActions.cpp
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/Analysis/RuntimeLibcallInfo.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Passes/RunCodeGen.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/test/CodeGen/ARM/arm-eabi.ll
M llvm/test/CodeGen/ARM/float-helpers.ll
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-dispatch.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-grouping.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-name-merge.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-ref.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/codegen-opt-flags.ll
M llvm/tools/llc/lib/NewPMDriver.cpp
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
CodeGen: Remove TargetOptions::EABIVersion (#222672)
The field's only effect was gating the __aeabi_mem*[4|8] libcalls via
the IsEABI4/IsEABI5 predicates. That distinction is derivable from the
triple's environment, so replace the two predicates with a single
triple-derived IsEABIVersion and delete the field.
The clang -meabi option and clang::TargetOptions::EABIVersion are
retained (now codegen-inert); the llc/opt -meabi flag is removed. -meabi
now only takes effect on triples with a bare-EABI/GNU environment pair
(arm-none-eabi <-> gnueabi), which is the only case with a triple
representation.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 88cab6bfc4e0a3829fdedeabcb21e977a1cf3e98
https://github.com/llvm/llvm-project/commit/88cab6bfc4e0a3829fdedeabcb21e977a1cf3e98
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A llvm/test/TableGen/RuntimeLibcallEmitter-variant-beats-exclusion.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcallsEmitter: Let a consumer's own library variant beat its exclusion (#221953)
A target can pull a shared library via LibraryRef<Lib, [impls]> to drop
some impls, then re-add its own versions through a same-name library variant
guarded on that target. Previously the exclusion's setUnavailable calls were
emitted at the end of setAvailableLibFuncs_<name>, after every variant, so they
clobbered the target's own re-adds.
Defer emitting a variant until after the exclusions when it re-adds an
impl its own consumer excludes (same predicates), so the target's re-add wins
while the exclusion still suppresses every other variant's contribution.
This is yet unused infrastructure for future changes.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 5fbcd6e37671e5c6d950494a6bb434e27d28f840
https://github.com/llvm/llvm-project/commit/5fbcd6e37671e5c6d950494a6bb434e27d28f840
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/Config/config.h.cmake
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Support/PrettyStackTrace.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Valgrind.cpp
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/config.bzl
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
[CMake] Prune dead and unnecessary try_compiles from config.h (#223765)
This relands the change directly on `main` after #223600 was
accidentally
merged into its stacked base branch. This reuses the approvals from
@aengelke and @MaskRay on #223600.
Several config-ix checks either have no consumer or can be performed
directly by the source that needs the feature. Remove six compiler
invocations from a typical Linux configure:
* HAVE_PTHREAD_MUTEX_LOCK has been unused since LLVM switched its mutex
implementation to std::recursive_mutex in 2019.
* The Linux magic-header results have never been propagated to config.h,
so CMake builds already use Path.inc's fallback constants.
* FE_ALL_EXCEPT and FE_INEXACT can be tested directly after including
cfenv.
* The Valgrind and CrashReporter headers can be detected with
__has_include in their only consuming translation units.
Also remove the obsolete definitions from the GN and Bazel
configurations.
In a fresh minimal LLVM configure, CMake profiling attributed 2067.1 ms
to 45 config-ix probes before this change and 1846.9 ms to 39 probes
after it.
Assisted-by: Codex
Commit: 2323ab283b13decfdb9edb24745edcf8951913fb
https://github.com/llvm/llvm-project/commit/2323ab283b13decfdb9edb24745edcf8951913fb
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/update_test_checks.py
Log Message:
-----------
[UTC] Strip only standalone positional %s in update_test_checks.py (#221153)
Previously, update_test_checks.py used tool_cmd_args.replace("%s", "")
to strip the input file when passing the IR via stdin. However, this
blindly removed "%s" from any option argument, leaving an empty value
(e.g., -lowertypetests-read-summary=).
Update the argument stripping to only remove standalone positional
"< %s" or "%s", preserving option arguments with "%s" values so they can
be expanded via common substitutions.
This enables update_test_checks.py to work for tests such as
llvm/test/Transforms/LowerTypeTests/cfi-jumptable-hotness-summary.ll,
which passes -lowertypetests-read-summary=%s on the RUN line.
Assisted-by: Gemini
Commit: a3d2f4b4a0aee08f26aa218e4e4d9dae1afa1d7a
https://github.com/llvm/llvm-project/commit/a3d2f4b4a0aee08f26aa218e4e4d9dae1afa1d7a
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp
A mlir/test/Dialect/Linalg/pad-neutral.mlir
Log Message:
-----------
[[mlir][linalg] Infer reduction-neutral padding values in rewriteAsPaddedOp (#216517)
**Problem**:
with no explicit options.paddingValues, rewriteAsPaddedOp padded every
operand with zero — silently corrupting reductions (a padded
maximumf/mulf element gets combined).
**Change**:
Added a new public linalg::inferPaddingValues(builder, toPad) to pick a
semantics-preserving value per operand:
- no reduction dim → zero;
- contraction → zero (0 annihilates through the multiply);
- other reductions → the combiner's neutral (-inf for maximumf, 1 for
mulf, …), found via matchReduction so the real accumulator combiner is
used.
rewriteAsPaddedOp calls it when options.paddingValues is empty. If no
value can be inferred, it returns failure() with the error "could not
infer a padding value"; the caller is then expected to determine the
value and supply it explicitly through options.paddingValues.
assited-by-claude
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: b0f50174f52d02eb68a1194ed93ec89507ef2fe1
https://github.com/llvm/llvm-project/commit/b0f50174f52d02eb68a1194ed93ec89507ef2fe1
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang-rt/lib/cuda/allocatable.cpp
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/include/flang/Runtime/CUDA/allocatable.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
Log Message:
-----------
[flang][cuda][NFC] Move CUFDeviceIsActive function to the right place (#223453)
The definition and declaration were done in different files (descriptor
and allocator). Move all to allocatable as this check is used for the
automatic deallocation.
Commit: b6912258891caefffbf15edb1bceff3724b75af5
https://github.com/llvm/llvm-project/commit/b6912258891caefffbf15edb1bceff3724b75af5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A clang/test/CodeGen/WebAssembly/exception-model-flag.c
M clang/test/CodeGen/exception-model-flag.c
Log Message:
-----------
clang: Fix exception model flag tests if webassembly isn't build (#223770)
The wasm and emscripten RUN lines require the WebAssembly backend due to
the use of -mllvm -wasm-enable-eh, until that flag is fully replaced with
the new exception model flag.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: a2239cbf89c9c8187a6deb83423eafad44e4a6d1
https://github.com/llvm/llvm-project/commit/a2239cbf89c9c8187a6deb83423eafad44e4a6d1
Author: Owen Anderson <resistor at mac.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
A llvm/test/CodeGen/RISCV/cheri-global-cap-init.ll
Log Message:
-----------
[CHERI][RISCV][AsmPrinter] Use pointer index size rather than pointer size in AsmPrinter constant lowering. (#220100)
This prevents a crash due to APInt width mismatches during
accumulateConstantOffset for CHERI targets.
Commit: 57186afd172250f0c1695b809505947382f227cd
https://github.com/llvm/llvm-project/commit/57186afd172250f0c1695b809505947382f227cd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
M llvm/lib/IR/PassManager.cpp
Log Message:
-----------
[NewPM] Add helper function to skip for opt-bisect
With the introduction of CodeGen passes to the NewPM infrastructure, we
get the concept of required passes that perform optimizations and want
to skip them when running under opt bisect. This occurs for passes like
SelectionDAG and StackColoring. Add a helper function to make it easy to
query, although make it specific to opt bisect unlike the LegacyPM
skipFunction. A helper function is slightly more convenient (i.e., no
need to forward the pass name explicitly).
Reviewers: nikic, arsenm, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/223486
Commit: 5bfcaeb68eb16e72128a69cdf0c671187a6afaa5
https://github.com/llvm/llvm-project/commit/5bfcaeb68eb16e72128a69cdf0c671187a6afaa5
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/Sema/riscv-pst-pointer-types.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Store (#223619)
See also
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-store.
Commit: bb189b9bea4469d7f950745fd8b8c65c5acf21c9
https://github.com/llvm/llvm-project/commit/bb189b9bea4469d7f950745fd8b8c65c5acf21c9
Author: Martin Storsjö <martin at martin.st>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/source/API/SBFile.cpp
Log Message:
-----------
[lldb] [Windows] Add a missing include. NFC. (#223727)
_open_osfhandle is defined in io.h, which wasn't explicitly included
before.
This built fine in practice with both WinSDK and recent mingw-w64
headers, but failed with older versions of mingw-w64 (older than August
2026).
Also change an accidental #if into #ifdef.
This fixes regressions from 1ca6698be7708121f987d0acf896c7dc4cf63a51 and
ba1687b72476eb368641b9a9f565a38cf41b7393.
Commit: 68fab9c6089f2e64343e8408147eb01c32ba6d3f
https://github.com/llvm/llvm-project/commit/68fab9c6089f2e64343e8408147eb01c32ba6d3f
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[clang][ReleaseNotes] document -fstack-clash-protection for Android (#223786)
Link: #209279
Commit: 03b0c4320aafa7e930f1f7aed392af7648682ea6
https://github.com/llvm/llvm-project/commit/03b0c4320aafa7e930f1f7aed392af7648682ea6
Author: Christian Sigg <csigg at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenHIP/amdgpu-flat-atomic-fadd.hip
M clang/test/CodeGenHIP/amdgpu-global-atomic-fadd.hip
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx942.cl
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
M flang/test/Driver/atomic-control-options.f90
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/Bitcode/amdgcn-atomic.ll
M llvm/test/Bitcode/amdgpu-unsafe-fp-atomics-upgrade.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/SPIRV/amdgcnspirv-atomic-metadata-decoration.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization-preserve-name.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/global-atomicrmw-fadd.ll
M mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-atomic-update-control-options.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[IR] Generalize !amdgpu.ignore.denormal.mode into !atomic.ignore.denormal.mode (#217585)
The !amdgpu.ignore.denormal.mode metadata tells the backend that an
atomicrmw fadd need not honor the function's denormal mode, so a native
atomic instruction whose denormal behavior is fixed in hardware may be
used instead of a CAS loop. Nothing about that is AMDGPU specific: NVPTX
has exactly the same problem with atom.add, whose FTZ behavior depends
on
the address space and cannot be controlled.
Promote it to a target independent fixed metadata kind,
!atomic.ignore.denormal.mode, and switch the AMDGPU, SPIR-V and OpenMP
producers and consumers over to it. Document it in LangRef, and point
AMDGPUUsage at that description rather than duplicating it.
Existing IR keeps working: AutoUpgrade renames the metadata on atomicrmw
instructions when parsing textual IR and when materializing bitcode. The
upgrade is deliberately scoped to atomicrmw rather than being applied to
every attachment of that name, since that is the only place the metadata
was ever meaningful. Because bitcode can be materialized one function at
a time, the bitcode side hooks into BitcodeReader::materialize() rather
than a module-wide pass, which is the path clang's bitcode linking
takes.
This is not intended to change behavior for any existing target.
Co-authored-by: Artem Belevich <tra at google.com>
Commit: 8301c241d7fa0c0d737fe3a01a1213da8687f90b
https://github.com/llvm/llvm-project/commit/8301c241d7fa0c0d737fe3a01a1213da8687f90b
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/flang-f-opts.f90
Log Message:
-----------
[Flang] Keep -fkeep-inline-functions as an ignored option (#223733)
55221f7 removed the warning check for -fkeep-inline-functions and
-fno-keep-inline-functions from flang-f-opts.f90 after the test started
failing when the option was implemented for Clang in 28efe19.
The options are currently only supported by Clang, so keep
-fkeep-inline-functions and -fno-keep-inline-functions as unsupported
options for Flang and emit the appropriate warnings.
Commit: c9f6b2e48b9c021d44cdfd70b49ce6abb2fcbd26
https://github.com/llvm/llvm-project/commit/c9f6b2e48b9c021d44cdfd70b49ce6abb2fcbd26
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/mismatched-bound-types.f90
Log Message:
-----------
[flang][test][NFC] Add OpenMP test for mismatched loop bound types (#221097)
Adds a regression test that lowering succeeds when an OpenMP loop mixes
bound types: the loop trip count comes from an integer(kind=INT64)
module
variable while the lower bound and step are i32 literals, so both are
converted to i64 before being passed through host_eval.
Commit: 748bb124441967238cc4b0190d617cd2c8ec9af3
https://github.com/llvm/llvm-project/commit/748bb124441967238cc4b0190d617cd2c8ec9af3
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
M llvm/test/Transforms/Attributor/nofpclass-fadd-fsub.ll
M llvm/test/Transforms/Attributor/nofpclass-fdiv.ll
M llvm/test/Transforms/Attributor/nofpclass-fma.ll
M llvm/test/Transforms/Attributor/nofpclass-fmul.ll
M llvm/test/Transforms/Attributor/nofpclass-nan-fmul.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[KnownFPClass] Propagate non-`sNaN` for `fadd`/`fsub`, `fmul`, `fdiv`, and `fma` (#221876)
`fadd`, `fsub`, `fmul`, `fdiv`, and `fma` can only return `sNaN` if at
least one of their inputs are `sNaN`. This means that we can rule out
`sNaN` from the result if all of the arguments are known to never be
`sNaN`.
`sNaN` propagation for `frem` is handled in this PR:
https://github.com/llvm/llvm-project/pull/219303
Commit: 1cc3b19d5500070b42ba5f0f1d51f00f64d0be15
https://github.com/llvm/llvm-project/commit/1cc3b19d5500070b42ba5f0f1d51f00f64d0be15
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/nofpclass-atan2.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-atan2.ll
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Add sign preserving deductions to `atan2(y, x)` (#223176)
`atan2(y, x)` should return the same sign as `y` (up to the denormal
mode):
- If `y >= +0.0`, then `atan2(y, x) >= +0.0`
- If `y <= -0.0`, then `atan2(y, x) <= -0.0`
AI Disclosure:
I used ChatGPT Codex (5.6 sol) to help write the tests.
Commit: 4cbd7f8300cab44d8847ab2b7db7ef2caa5b2942
https://github.com/llvm/llvm-project/commit/4cbd7f8300cab44d8847ab2b7db7ef2caa5b2942
Author: Alexander Viand <alexander.viand at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/MathToEmitC/MathToEmitC.h
M mlir/lib/Conversion/ConvertToEmitC/CMakeLists.txt
M mlir/lib/Conversion/MathToEmitC/CMakeLists.txt
M mlir/lib/Conversion/MathToEmitC/MathToEmitC.cpp
M mlir/lib/Dialect/Math/IR/MathDialect.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/test/Conversion/MathToEmitC/math-to-emitc.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][emitc] Add a ConvertToEmitCPatternInterface for the math dialect (#223666)
MathToEmitC wasn't registered for `--convert-to-emitc`. This registers
an interface matching the other *ToEmitC interfaces.
Commit: fcc6118dc91ba05a1ad30b0f406e42a8eb62f859
https://github.com/llvm/llvm-project/commit/fcc6118dc91ba05a1ad30b0f406e42a8eb62f859
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/CodeGenUtils/CodeGenUtils.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGenUtils/CodeGenUtils.cpp
A clang/test/CIR/CodeGen/avx512-error.c
A clang/test/CIR/CodeGen/target-builtin-error-2.c
A clang/test/CIR/CodeGen/target-builtin-error-3.c
A clang/test/CIR/CodeGen/target-builtin-error.c
A clang/test/CIR/CodeGen/target-builtin-noerror.c
A clang/test/CIR/CodeGen/target-features-error-2.c
A clang/test/CIR/CodeGen/target-features-error-3.c
A clang/test/CIR/CodeGen/target-features-error-4.c
A clang/test/CIR/CodeGen/target-features-error-5.c
A clang/test/CIR/CodeGen/target-features-error.c
A clang/test/CIR/CodeGen/target-features-no-error-2.c
A clang/test/CIR/CodeGen/target-features-no-error.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlvbmi2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sqrt-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtin-undef-rvalue.cpp
Log Message:
-----------
[CIR][CodeGen] Implement target-features checking(CodeGenUtils!) (#223056)
This DOES move checking functions out of CodeGen and into CodeGenUtils
so both can use it.
This is a diagnostic for builtins/etc that is built in to classic
codegen. We have to implement it, because otherwise autoconfig thinks
that we support AVX without a flag, and thus causes us to fail builds
later on that now expect __AVX__/etc to be defined without enabling
them.
Commit: 37248da89922524e04ed72bd8389179d9b99cbfb
https://github.com/llvm/llvm-project/commit/37248da89922524e04ed72bd8389179d9b99cbfb
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/ABIInfo.cpp
A clang/test/CodeGen/AArch64/matrix-hfa.c
A clang/test/CodeGen/ARM/matrix-hfa.c
A clang/test/CodeGen/PowerPC/matrix-hfa.c
A clang/test/CodeGen/X86/matrix-vectorcall.c
Log Message:
-----------
[Clang][ABI] Classify floating-point matrix types as homogeneous aggregates (#222429)
The `ABIInfo::isHomogeneousAggregate()` function did not have explicit
handling for `ConstantMatrixType` and so, by default, these types were
rejected as potential homogeneous aggregates.
This change adds handling for `ConstantMatrixType` and classifies such
matrix types depending on whether they otherwise meet the criteria.
Fixes: https://github.com/llvm/llvm-project/issues/222417
Assisted-by: Cursor / Grok 4.6
Commit: 247db2420326c288690592088596db9435098261
https://github.com/llvm/llvm-project/commit/247db2420326c288690592088596db9435098261
Author: Justin Stitt <justinstitt at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/OverflowBehaviorTypes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaType.cpp
A clang/test/Sema/overflow-behavior-atomic.c
Log Message:
-----------
[Clang] Reject overflow behavior types on _Atomic (#222179)
atomic read-modify-write operations aren't instrumented for overflow. `counter++` on an `_Atomic` object lowers to a single `atomicrmw`, and this is true for plain atomic types under `-fsanitize=signed-integer-overflow` too.
That's a problem for `__ob_trap`, which is supposed to be checked no matter what the global flags say:
```c
typedef int __ob_trap trapping_int;
_Atomic trapping_int counter;
int x = counter + 1; // checked
counter++; // not checked
```
A guarantee that only holds for some expressions is worse than none, so reject the combination outriht. Let's also reject `__ob_wrap` too so the rule doesn't depend on the behavior kind... wrap has minimal use here anyways.
Applying an OBT specifier over an atomic type was already an error, though it unhelpfully reported `_Atomic(int)` as a non-integer type even though it is. Applying `_Atomic` over an existing OBT was accepted, which is where the unchecked read-modify-write came from... this was a bug that is now fixed because we are no longer trying to apply OBT on top of `_Atomic`. This is all made more clear by better diagnostics too :)
We can relax this later if someone needs it. I think instrumenting checked atomic rmws would mean lowering to a cmpxchg/CAS loop.
Assisted-by: claude
Signed-off-by: Justin Stitt <justinstitt at google.com>
Commit: e847bd0f770f36a457c8ccd38aa171980ad25dd7
https://github.com/llvm/llvm-project/commit/e847bd0f770f36a457c8ccd38aa171980ad25dd7
Author: lntue <lntue at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/off64_t.h
M libc/include/CMakeLists.txt
M libc/include/fcntl.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/posix_fadvise.h
M libc/src/fcntl/CMakeLists.txt
M libc/src/fcntl/linux/CMakeLists.txt
A libc/src/fcntl/linux/posix_fadvise64.cpp
A libc/src/fcntl/posix_fadvise64.h
M libc/test/src/fcntl/CMakeLists.txt
A libc/test/src/fcntl/posix_fadvise64_test.cpp
M libc/test/src/fcntl/posix_fadvise_test.cpp
Log Message:
-----------
[libc] Implement posix_fadvise64. (#223294)
Commit: 61222a694c948b667ca8be4acd79e8594f51bb82
https://github.com/llvm/llvm-project/commit/61222a694c948b667ca8be4acd79e8594f51bb82
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
Log Message:
-----------
[RelLookupTableConverter][NFC] Fix typo GlovalVarOp -> GlobalVarOp (#223555)
Fixes the misspelling of GlovalVarOp with a 'v' in
shouldConvertToRelLookupTable.
Commit: a84250b63d2a731da76a25e091bb9c5374651625
https://github.com/llvm/llvm-project/commit/a84250b63d2a731da76a25e091bb9c5374651625
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/unittests/ABI/CMakeLists.txt
A llvm/unittests/ABI/FunctionInfoTest.cpp
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
Log Message:
-----------
[LLVMABI] Add CanBeFlattened to abi::ArgInfo (#220558)
Mirror `clang::CodeGen::ABIArgInfo::CanBeFlattened` on `abi::ArgInfo` so
a classifier can keep a Direct record coercion in one piece, as
AAPCS-VFP homogeneous aggregates, AMDGPU direct aggregates and x86
vectorcall HVAs require. The bit defaults to true, so existing
classifiers are unchanged. It is exposed through `getCanBeFlattened()`
and a chainable `setCanBeFlattened()`, both Direct-only like the classic
accessor.
The MLIR `ArgClassification::canFlatten` and the CIR rewriter already
honour the flag; the CIR bridge will read the new bit with the first
classifier that clears it.
Commit: e270ee55cce78c61bda92d78b69869a53d1f36f7
https://github.com/llvm/llvm-project/commit/e270ee55cce78c61bda92d78b69869a53d1f36f7
Author: cui fliter <imcusg at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/RunInTerminalTest.cpp
Log Message:
-----------
[lldb-dap] Fix runInTerminal error message serialization (#221504)
`RunInTerminalMessageError::ToJSON()` serializes the error message using
the `"value"` field, while `ParseJSONMessage()` expects the `"error"`
field.
When the runInTerminal launcher fails, the debug adapter cannot
deserialize the launcher error and reports an `Incorrect JSON message`
error instead of preserving the original diagnostic.
This patch makes the serialized field name match the parser and adds a
round-trip test covering launcher error propagation.
Signed-off-by: cuishuang <imcusg at gmail.com>
Commit: 919f058fe8d4edfe9806b1f2a2cf553f93f60182
https://github.com/llvm/llvm-project/commit/919f058fe8d4edfe9806b1f2a2cf553f93f60182
Author: Adrian Kuegel <akuegel at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/bindings/python/.git_archival.txt
Log Message:
-----------
[clang][python] Make .git_archival.txt deterministic. (#223362)
Without an explicit `abbrev` option, `$Format:%(describe:...)` uses
Git's dynamic object abbreviation length (`find_unique_abbrev`). In a
large, rapidly growing repository like `llvm-project`, new commits can
potentially collide with existing short-SHA prefixes, causing GitHub's
`git archive` servers to emit longer short-SHAs over time for historical
commits. This mutates `clang/bindings/python/.git_archival.txt` inside
GitHub's dynamically generated `.tar.gz`/`.zip` source archives,
breaking downstream builds (such as OpenXLA/Bazel) that verify archive
SHA-256 checksums.
Specify `abbrev=40` so `describe-name` always uses the full 40-character
commit hash. `hatch-vcs` slices the parsed node ID to 10 characters when
formatting versions, so the resulting Python package version is
unchanged.
Commit: 1d84c1b18df8c49484e5bbfa267a63e350e573de
https://github.com/llvm/llvm-project/commit/1d84c1b18df8c49484e5bbfa267a63e350e573de
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-keep-drop.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-satd.ll
Log Message:
-----------
[SLP][NFC]Add extra tests with missed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223810
Commit: 7800bec8a155c3f88518b25fa4241320721911b0
https://github.com/llvm/llvm-project/commit/7800bec8a155c3f88518b25fa4241320721911b0
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][SchedulerTest][NFC] Fix unused variable warning (#223751)
Commit: 404d35af4d588e03941c8fe524f881749059edcb
https://github.com/llvm/llvm-project/commit/404d35af4d588e03941c8fe524f881749059edcb
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump CI containers to LLVM 23.1.1 (#223775)
This means we no longer have -Wunused-template enabled by default, for
which the LLVM tree is still not clean.
Commit: 60dd6268bcbcb36256526273dfea4145d68cbedd
https://github.com/llvm/llvm-project/commit/60dd6268bcbcb36256526273dfea4145d68cbedd
Author: Andre Sun <andsun9999 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestMacroExpansion.cpp
Log Message:
-----------
[clang-format] Fix crash on adjacent configured macro calls (#221352)
`parseMacroCall()` used `nextToken()` to consume the end of a configured
macro call, which also processed the following token. For adjacent macro
calls, this could expand the second call first and leave macro
reconstruction state out of order, causing a crash when the second
expansion starts with a comment.
This commit changes `parseMacroCall()` to consume the last token without
processing the following token, preserving source-order expansion. It
also prevents trailing comments from becoming part of the reconstructed
macro call.
Fixes #190721
Assisted-by: DeepSeek Flash v4
Commit: 712196951e77eea330269d3c2267c571e07f4577
https://github.com/llvm/llvm-project/commit/712196951e77eea330269d3c2267c571e07f4577
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
R flang/test/Lower/OpenMP/mismatched-bound-types.f90
Log Message:
-----------
Revert "[flang][test][NFC] Add OpenMP test for mismatched loop bound types" (#223813)
Reverts llvm/llvm-project#221097
This fails buildbots
https://lab.llvm.org/buildbot/#/builders/80/builds/24748 and precommit
CI.
@doru1004 please look at it and remand when fixed.
Commit: 4f4110d0be5601eb6c62e18110009cddb0573051
https://github.com/llvm/llvm-project/commit/4f4110d0be5601eb6c62e18110009cddb0573051
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
A mlir/test/Conversion/XeVMToLLVM/mxfp_scale_binary_hoist.mlir
Log Message:
-----------
[MLIR][XeVM] Hoist contiguous-slice shuffles through n-ary elementwise ops (#222452)
XeGPU expresses vector operands in their logical element type, so
per-lane compute chains can end up wider than the SPIR-V backend can
legalize as a single operand. HandleVectorExtractPattern already narrows
such chains by hoisting a contiguous-slice shufflevector upward through
unary element-wise ops (fpext/fptrunc/bitcast), merging shuffle chains,
and folding into smaller loads. But it stops at n-ary ops, so a chain
like
%0 = llvm.fdiv %a, %b : vector<32xf32> // wide, binary
%1 = llvm.shufflevector %0, %0 [0..15] : vector<32xf32> // legal 16-wide
slice
keeps a wide vector<32xf32> compute that the backend rejects.
This extends the pattern to hoist a contiguous slice through n-ary
element-wise ops as well: slice each same-length vector operand with the
same mask and re-create the op at the narrow width. The freshly created
operand slices keep hoisting upward (merging, or folding into loads)
until they reach operands that are already legal width, so the whole
compute chain collapses to the slice width - with no target-specific
width limit, since the width is inherited from the slice.
Length-changing and packed-payload ops (e.g. bitcast, truncf) are left
untouched.
Commit: 7a75731966966c175d01204fb88ffd4c236a4f35
https://github.com/llvm/llvm-project/commit/7a75731966966c175d01204fb88ffd4c236a4f35
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A utils/bazel/tools/check_bazel_inputs.py
Log Message:
-----------
[bazel] Add script for finding files not in the graph (#220343)
This is useful to make sure that globs cover all files in a given
subdirectory. Right now this doesn't cover many directories because we
don't have tons of tests in bazel but if we eventually add those we can
more easily spot ones we miss with this script.
Assisted by: codex
Commit: cf09a7688ec47cc30c36381834e1c99fe34d2e20
https://github.com/llvm/llvm-project/commit/cf09a7688ec47cc30c36381834e1c99fe34d2e20
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 4f4110d (#223824)
This fixes 4f4110d0be5601eb6c62e18110009cddb0573051 (#222452).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=4f4110d0be5601eb6c62e18110009cddb0573051
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 2f852016addf27fd9eb83ff9faba66633b0fafe8
https://github.com/llvm/llvm-project/commit/2f852016addf27fd9eb83ff9faba66633b0fafe8
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/unbounded-struct-arr.ll
Log Message:
-----------
[SPIRV] Emit RuntimeDescriptorArrayEXT capability for all unbounded array types (#222819)
Previously, the `RuntimeDescriptorArrayEXT` capability was emitted only
for image descriptor arrays. This change emits the capability for the
shader whenever resource array has `ArraySize == 0`.
This covers all supported runtime descriptor array types, including
images, structured buffers, samplers, and counter descriptor arrays.
Emitting the capability for these arrays is necessary to support dynamic
resources in SPIR-V.
Assisted by GPT-5.6 Sol.
Commit: 320bc620c46b0fd49a9976e499cd4252d78297b8
https://github.com/llvm/llvm-project/commit/320bc620c46b0fd49a9976e499cd4252d78297b8
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
Log Message:
-----------
[AMDGPU] Fix for GFX11 VOPD interlock hazard (#220348)
On GFX11, a VOPD consumer whose X/Y sources share a gather class (srcA
or srcB) and the same VGPR parity can lose the destination-buffer interlock
for one of those sources. Thus, use parity as bank mask instead.
Commit: 89ec1e3f5388e22c0a372798b7dbe48ba408d60b
https://github.com/llvm/llvm-project/commit/89ec1e3f5388e22c0a372798b7dbe48ba408d60b
Author: Dan Liew <dan at su-root.co.uk>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGen/attr-counted-by-or-null-for-pointers.c
M clang/test/CodeGen/attr-sized-by-for-pointers.c
M clang/test/CodeGen/attr-sized-by-or-null-for-pointers.c
Log Message:
-----------
[CodeGen] Fix -fsanitize=array-bounds for __sized_by / _or_null pointers (#213795)
`EmitCountedByBoundsChecking()` assumed a CountAttributedType is always
a __counted_by pointer. That isn't true; there are four versions of the
attribute:
* `__counted_by`: Already handled correctly.
* `__counted_by_or_null`: Incorrectly handled.
* `__sized_by`: Incorrectly handled.
* `__sized_by_or_null`: Incorrectly handled.
In particular:
* __sized_by / __sized_by_or_null: the loaded bound is a byte count, but
the
element index was compared against it directly, so an access was only
flagged once the index exceeded the byte count -- missing out-of-bounds
accesses for a pointee larger than one byte. Convert the loaded byte
count
into an element count by dividing it by the element size (`bound /
sizeof(element)`) so the check can compare the (element) index directly.
`counted_by` already counts elements and is unchanged; a void (or
otherwise
zero-/unknown-sized) pointee uses the GNU convention of element size 1,
i.e.
no conversion. Signed division is used for a signed count field so a
negative
byte count stays non-positive and is still rejected by the
negative-bounds
guard in EmitBoundsCheckImpl (unsigned division would turn it into a
large
positive count).
* __counted_by_or_null / __sized_by_or_null: a null pointer describes no
accessible memory, but the null case was ignored, so an access through a
null pointer with a non-zero count was not trapped. Treat the bound as 0
when the pointer is null.
Both adjustments are applied to the loaded bound in
EmitCountedByBoundsChecking before it is handed to EmitBoundsCheckImpl;
the bounds-checking machinery and the runtime handler are left unchanged
and continue to work in terms of the element index. Plain `__counted_by`
and the general array-bounds path are unaffected.
I did try an alternative implementation where the comparison was done in
terms of bytes (rather than elements which this patch does), but this
had several disadvantages:
* It was less correct. Because the element-count implementation uses
truncating division, a `__sized_by()` whose size is not a multiple of
the
pointee size rounds the bound down, so an access to a partially
in-bounds
object is caught. A byte-level check would instead only verify that the
first byte of the object is in bounds, which would allow accessing a
partially in-bounds object.
* When benchmarking (small microbenchmarks targetting arm64e), it
appeared that the division implementation was faster. Note that an
unsigned count field and an element size that is a power 2 produces
the best LLVM IR because unsigned division by a power of 2 can be
turned by the optimizer into a `lshr` instruction.
* It required changes in `CodeGenFunction::EmitBoundsCheckImpl` as well,
which made the change more invasive.
Note while working on this I did discover an existing bug where if the
base (e.g. `side_effect()->ptr[0]`) has a side-effect it is incorrectly
evaluated multiple times. Fixing that is out-of-scope for this patch and
will be handled later.
Assisted-by: Claude Code
rdar://184139694
Commit: bd695f75fc1f46bdc032a982f9c849f6365a5af2
https://github.com/llvm/llvm-project/commit/bd695f75fc1f46bdc032a982f9c849f6365a5af2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-keep-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-satd.ll
Log Message:
-----------
[SLP]Fix splat gather subtree keep/drop to restore lost vectorization
The splat gather subtrees were kept on cost ties and resurrected by the
trimming revert without a profitability re-check, and dropping them left
the gathered loads built for them orphaned and forcing extracts. This
rejected otherwise profitable VF=2 trees. Keep subtrees only when
strictly profitable, re-evaluate them against the restored tree on a
revert, and delete the gathered loads left dead by a drop.
Fixes the remaining regressions from #220250 reported in #221717.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223833
Commit: 1e522aa33cc216e65d7b4ea7c687059554b2ff4d
https://github.com/llvm/llvm-project/commit/1e522aa33cc216e65d7b4ea7c687059554b2ff4d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
Log Message:
-----------
Require X86 for DeclareRuntimeLibcalls test (#223832)
Commit: f0b5bfb908f22fc8d7199f868a822e6d40c1369a
https://github.com/llvm/llvm-project/commit/f0b5bfb908f22fc8d7199f868a822e6d40c1369a
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
R clang/test/CIR/Transforms/flatten-eh-spec-nyi.cir
A clang/test/CIR/Transforms/flatten-eh-spec.cir
Log Message:
-----------
[CIR][EH] Implement flattening for dynamic exception specification (#223780)
This change implements the CFG flattening for try operations with filter
and unexpected exception handlers. The flattening dispatches unexpected
exceptions to an operation that will later be lowered to target-specific
IR to call std::unexpected, while exceptions that match the dynamic
exception specification are routed to normal unwind handling.
Target-specific EH ABI lowering will be added in a follow-up change.
Assisted-by: Cursor / various models
Commit: 6c334efd9df6cacb2c5b5ca7fc3533db95e5fff7
https://github.com/llvm/llvm-project/commit/6c334efd9df6cacb2c5b5ca7fc3533db95e5fff7
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
Log Message:
-----------
[RelLookupTableConverter][NFC] Hoist loop invariants in createRelLookupTable (#223557)
IntPtrTy, Int32Ty, and Base (ptrtoint of the relative lookup table) are
invariant across all elements of the lookup table. Hoist them out of the
element iteration loop to avoid redundant recomputations.
Commit: 576e56a6ac966699ce857bf34309bdf1c6d636d1
https://github.com/llvm/llvm-project/commit/576e56a6ac966699ce857bf34309bdf1c6d636d1
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
Log Message:
-----------
[RelLookupTableConverter][NFC] Remove unused Func parameter from createRelLookupTable (#223556)
The Function &Func parameter was only used to access the parent Module
via Func.getParent(). However, createRelLookupTable already takes
GlobalVariable &LookupTable, which has the same parent Module.
Remove the redundant parameter and the now-unused Func reference at the
callsite in convertToRelLookupTable.
Commit: 3018c32171d439dec1b76ef961cc60c0d8db2c6c
https://github.com/llvm/llvm-project/commit/3018c32171d439dec1b76ef961cc60c0d8db2c6c
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Lower/OpenMP/close-map-derived-members.f90
M flang/test/Semantics/OpenMP/map-modifiers.f90
A offload/test/offloading/fortran/usm_map_close_derived_type_members.f90
Log Message:
-----------
[Flang][OpenMP] Remove close map type member removal code from MapInfoFinalization (#219438)
This should no longer be required as we removed the application of close
automatically in USM mode in a prior PR. So they bug this was originally
put in place for is now addressed without the need for this PR. And
whilst it was fine to put in place for a bug the user had no control of
(automatic application of close to descriptor members), it's not our
place to intervene in scenarios where a user is making explicit errors
in their mapping, e.g.
map(to: dtype) map(close, to: dtype%x, dtype%y)
A user should be left to shoot themselves in the foot if that's there
goal (or perhaps there's some really wild or single memory system
architectures that would allow this), we'd ideally prevent this as a
compiler warning or error as opposed to fixing the problem
under-the-hood for them. Otherwise we help create unportable code for
the user, alongside forcing ourselves to maintain the underlying fix.
Commit: 299a09b38b4bd9d6b78e4c7a0c73b0cd671ce081
https://github.com/llvm/llvm-project/commit/299a09b38b4bd9d6b78e4c7a0c73b0cd671ce081
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Analysis/TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/vararg-intrinsic.ll
Log Message:
-----------
[TTI] Keep ParamTys and Arguments matching for variadic intrinsics. (#223693)
For variadic functions, the function's argument types do not include any
variadic arguments.
Always push types of arguments in to ParamTys, so sizes of ParamTys and
Arguments match.
PR: https://github.com/llvm/llvm-project/pull/223693
Commit: 728d1c058b3ee1407eb4e8bf26ddc1aff03e48f8
https://github.com/llvm/llvm-project/commit/728d1c058b3ee1407eb4e8bf26ddc1aff03e48f8
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
A mlir/include/mlir/Conversion/OpenACCToLLVM/ACCDataRuntime.h
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVMUtils.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeDescriptors.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeFunctions.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeUtils.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
A mlir/lib/Conversion/OpenACCToLLVM/ACCDataDirectivePatterns.cpp
A mlir/lib/Conversion/OpenACCToLLVM/ACCDataRuntime.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCExecutableDirectivePatterns.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVM.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVMUtils.cpp
M mlir/lib/Conversion/OpenACCToLLVM/CMakeLists.txt
M mlir/lib/Dialect/OpenACC/Utils/OpenACCRuntimeUtils.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
A mlir/test/Conversion/OpenACCToLLVM/data-diagnostics.mlir
A mlir/test/Conversion/OpenACCToLLVM/data-runtime.mlir
A mlir/test/Conversion/OpenACCToLLVM/data.mlir
M mlir/test/Conversion/OpenACCToLLVM/init-shutdown-set.mlir
M mlir/test/Conversion/OpenACCToLLVM/runtime-declaration-mismatch.mlir
M mlir/test/Conversion/OpenACCToLLVM/wait.mlir
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCRuntimeUtilsTest.cpp
Log Message:
-----------
[mlir][acc] Add data directive codegen to ACCToLLVM (#223043)
Extends the acc to LLVM conversion with codegen for the OpenACC data
constructs - data, enter data, exit data and update. Each construct
becomes calls to the libacctarget data entry points that establish the
mappings its clauses ask for and tear them down again, on the queue its
async clause selects and after the wait its wait clause asks for. As
with the executable directives, these runtime APIs are not yet
finalized; the draft proposal can be found at
https://github.com/llvm/llvm-project/pull/197894.
A mapping is handed to the runtime as parallel argument arrays holding
one entry per mapped object, together with a descriptor for the objects
whose extent or layout cannot be stated as a size. The descriptor
layouts are declared next to the entry points they are passed to, as
they are equally part of the runtime interface.
Clause handling the data constructs share with the executable
directives, such as async, wait and if, now lives in the common
conversion utilities.
Co-authored-by: Matsu <kmatsumura at nvidia.com>
Commit: 620168eaa2718bde5e8e09470758f881f6e25a66
https://github.com/llvm/llvm-project/commit/620168eaa2718bde5e8e09470758f881f6e25a66
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-managed-func-result.cuf
Log Message:
-----------
[flang][cuda] Save function result descriptor before function exit (#223484)
The cuf.free was called before the AbstractResult pass spies the result
over the passed argument. Make sure the result is saved before the
descriptor is freed.
Commit: 7576379fdd2a6652dabda1cc8f21fdf11356f5a7
https://github.com/llvm/llvm-project/commit/7576379fdd2a6652dabda1cc8f21fdf11356f5a7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
Log Message:
-----------
[IR] Remove isRequired from PassInfoMixin (#223818)
This is no longer needed after 80a1e2125c7ec7db402925d153c0dbd6041d3004
and will not have any downstream difference given no one should be
inheriting directly from PassInfoMixin given it is in the detail
namespace.
Commit: 08390c01e301987e0ae7ba903fdc5c477a687728
https://github.com/llvm/llvm-project/commit/08390c01e301987e0ae7ba903fdc5c477a687728
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
R clang/test/CIR/CodeGen/call-conv-lowering-win64-skipped.c
Log Message:
-----------
[CIR][NFC] Remove bad test (#223840)
This removes a test that was checking to see whether calling convention
lowering was applied for a Windows target. This test was causing CI
failures. We don't have enough Windows support implemented in CIR for
this to reliably even get to the point of making this negative check.
The test will end up being unstable, so I am just removing it.
Commit: b0c4d416e5189e45eb09b79c681ecaa65080f73e
https://github.com/llvm/llvm-project/commit/b0c4d416e5189e45eb09b79c681ecaa65080f73e
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 728d1c0 (#223855)
This fixes 728d1c058b3ee1407eb4e8bf26ddc1aff03e48f8 (#223043).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=728d1c058b3ee1407eb4e8bf26ddc1aff03e48f8
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 218b71e3d4de375ea487ab45faecb8fea9cec1fe
https://github.com/llvm/llvm-project/commit/218b71e3d4de375ea487ab45faecb8fea9cec1fe
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
Log Message:
-----------
[VPlan] Remove dead cycles until none are left. (#223845)
Follow-up to https://github.com/llvm/llvm-project/pull/213632. Removing
a dead cycle may expose another dead cycle, which also needs removing.
Stop after cycle is remover to avoid crashing on invalid iterator, and
repeat until no cycles are left.
Commit: 05a60d8a36893ae4f64604576a8493cd2ba74eb5
https://github.com/llvm/llvm-project/commit/05a60d8a36893ae4f64604576a8493cd2ba74eb5
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecInfo.h
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
Log Message:
-----------
[AMDGPU][NFC] Centralize co-execution stall calculation (#220335)
Commit: c2fa65d33f124526bfe61d5125e203547076f4ce
https://github.com/llvm/llvm-project/commit/c2fa65d33f124526bfe61d5125e203547076f4ce
Author: junfengd-nv <junfengd at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Optimizer/Dialect/FIRAttr.h
M flang/include/flang/Support/LangOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Driver/check-integer-mod-zero-divisor.f90
M flang/test/Lower/Intrinsics/mod.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/dummy-procedure.f90
Log Message:
-----------
[flang] Diagnose integer MOD/MODULO when the divisor is zero (#222790)
Flang currently prints a garbage integer when the divisor of integer
MOD/MODULO is zero. For example:
```
program mod0_var
integer :: a, p, r
a = 5
p = 0
r = mod(a, p)
print *, r
end program
```
Integer MOD/MODULO lower to arith.remsi. A zero divisor is undefined
behavior in LLVM, so the remainder can become poison and the program
neither crashes nor reports an error.
This change checks the second argument P when lowering integer
MOD/MODULO. If P is not a compile-time nonzero constant, a P == 0 test
is inserted. On that path, _FortranAReportFatalUserError is called with
the same messages as IntMod in flang-rt (MOD with P==0 / MODULO with
P==0). The fast path remains arith.remsi.
Before:
```
func.func private @fir.mod.i32.ref_i32.ref_i32(%arg0, %arg1) {
%a = fir.load %arg0
%p = fir.load %arg1
%r = arith.remsi %a, %p : i32
return %r
}
```
After:
```
func.func private @fir.mod.i32.ref_i32.ref_i32(%arg0, %arg1) {
%a = fir.load %arg0
%p = fir.load %arg1
%zero = arith.constant 0 : i32
%bad = arith.cmpi eq, %p, %zero : i32
fir.if %bad {
// fatal: same text as IntMod in
// llvm-project/flang-rt/lib/runtime/numeric.cpp
}
%r = arith.remsi %a, %p : i32
return %r
}
```
Commit: 71cb3f47f9a296eacf4e0391b0e645d894ec7e2c
https://github.com/llvm/llvm-project/commit/71cb3f47f9a296eacf4e0391b0e645d894ec7e2c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions-stress-test-tower.cpp
M compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M compiler-rt/test/orc/TestCases/Darwin/Generic/llvm-jitlink-force-link-objc.m
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-category.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-cross-file-method-call.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-nonlazy-class.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S
M compiler-rt/test/orc/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/orc/lit.cfg.py
Log Message:
-----------
[orc-rt] Disable old ORC runtime testcases on arm64e (#223670)
These regression tests are unsupported on arm64e. Disable them.
rdar://186687669
Commit: 35c6acb89abf0ca576b63e544885cdb0cb010443
https://github.com/llvm/llvm-project/commit/35c6acb89abf0ca576b63e544885cdb0cb010443
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-maxnum-minnum.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
Log Message:
-----------
[CIR] Implement elementwise min/max/minimum/maximum/minnum/maxnum/etc (#222481)
These ended up being simple translations to llvm intrinsics, so other
than a single small 'magic decoder ring', this is a very trivial
implementation. The tests are taken from classic-codegen with some mild
modifications (as vector types don't work in arguments yet, and we are
testing more appropriately, as those were generated check lines).
This was found in an application we're trying to build.
Commit: e35d15fe53ff0450e79de13f649f196b98547916
https://github.com/llvm/llvm-project/commit/e35d15fe53ff0450e79de13f649f196b98547916
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
Log Message:
-----------
WebAssembly: Avoid using createDataLayout (#223836)
Find the datalayout from the IR context instead of copying one
from the TargetMachine
Commit: 6a8b946a43c5ded4a1055cdd36f23fef11812fa0
https://github.com/llvm/llvm-project/commit/6a8b946a43c5ded4a1055cdd36f23fef11812fa0
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/XtensaTargetParser.def
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/Xtensa.td
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrFormats.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaProcessors.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
A llvm/lib/Target/Xtensa/XtensaS3DSPInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
A llvm/test/MC/Xtensa/xtensa-esp32s3-invalid.s
A llvm/test/MC/Xtensa/xtensa-esp32s3-valid.s
Log Message:
-----------
[Xtensa] Implement esp32s3 target. (#220393)
- Add esp32s3 CPU support
- Implement esp32s3 DSP operations with test
- Improve asm register parsing
Commit: d027db3ca9e9fa7a494d56491e57365c859bffa9
https://github.com/llvm/llvm-project/commit/d027db3ca9e9fa7a494d56491e57365c859bffa9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/test/MC/RISCV/rvzimop-valid.s
M llvm/test/MC/RISCV/zicfiss-valid.s
Log Message:
-----------
[RISCV] Add more tests for Zimop. NFC (#223797)
Exposes bug in disassembly of mop.r.28 and mop.rr.7 which partially
overlap with Zicfiss.
Assisted-by: Claude
Commit: 73a4eae01c881603a880c3eb46ca34e11f534db8
https://github.com/llvm/llvm-project/commit/73a4eae01c881603a880c3eb46ca34e11f534db8
Author: cmtice <cmtice at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/source/API/SystemInitializerFull.cpp
Log Message:
-----------
[LLDB] Initialize language categories as part of general initialization. (#223474)
This prevents needless slowdown later when looking up variable values.
Commit: c7d4921b39bf5710968872213935198efbb310fd
https://github.com/llvm/llvm-project/commit/c7d4921b39bf5710968872213935198efbb310fd
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/test/fuzzer/minimize_crash_custom_mutator.test
Log Message:
-----------
[libFuzzer] Pass the current size to Mutate in MinimizeCrashLoop (#223470)
Fixes #149942. MinimizeCrashLoop passed U.size() to every MD.Mutate call
in the mutate_depth loop, so following mutations operated on a stale
size. Track the size across mutations, like MutateAndTestOne already
does.
Commit: 99f7a3ee4b76e0b77552f57a7cc9a4262ceddbd9
https://github.com/llvm/llvm-project/commit/99f7a3ee4b76e0b77552f57a7cc9a4262ceddbd9
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
A clang/test/CIR/CodeGenSYCL/kernel-caller-address-space.cpp
Log Message:
-----------
[CIR][SYCL] Emit generic address space for default pointers in device code (#223464)
Commit: dcd33090385467717fc3aaba6a72b36c759f2d18
https://github.com/llvm/llvm-project/commit/dcd33090385467717fc3aaba6a72b36c759f2d18
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/Lowering/unlowered-address-spaces.cir
Log Message:
-----------
[CIR] Reject unlowered language address spaces on CIR globals (#223660)
Diagnose a `LangAddressSpaceAttr` on `cir.global` before selecting the
LLVM global address space. This keeps standalone global attributes from
bypassing pointer conversion and silently falling back to address space
zero.
Assisted-by: Codex / GPT-5.6 Sol
Commit: 057f3ee1b4f32ccc348f1c64142dcf0e4c5e9b69
https://github.com/llvm/llvm-project/commit/057f3ee1b4f32ccc348f1c64142dcf0e4c5e9b69
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
Log Message:
-----------
[RISCV] Use bits<5> for rs1 in c.sspopchk and c.sspush. NFC (#223856)
These instructions are encoded so that bits 11-7 match the register they
operate on. We can put 1 or 5 in rs1 and then assign rs1 to bits 11-7.
This match c.addi16sp which only allows SP.
Commit: acd72302ca682b7f7b514fdb8a1417c12eb15a2c
https://github.com/llvm/llvm-project/commit/acd72302ca682b7f7b514fdb8a1417c12eb15a2c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC] Skip ReOptimize unit tests on arm64e. (#223605)
The ReOptimize layer doesn't support arm64e yet.
rdar://186687659
Commit: 98684c0871860447a51d9bc35e73f5bd53050ec0
https://github.com/llvm/llvm-project/commit/98684c0871860447a51d9bc35e73f5bd53050ec0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github] Bump AArch64 Premerge Runners to LLVM 23.1.1 (#223869)
This should work now given 23.1.1 disabled -Wunused-template.
Landed in llvm-zorg for x86 Linux/Windows in
https://github.com/llvm/llvm-zorg/commit/2236c4c3a51207f1cf002b9092a54dd676e8ed19.
Commit: 124e476295e62296a012f35b192644d1a2c3244c
https://github.com/llvm/llvm-project/commit/124e476295e62296a012f35b192644d1a2c3244c
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfbin
M llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfscript
M llvm/test/tools/llvm-profgen/X86/coroutine.test
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
Log Message:
-----------
[llvm-profgen] Strip coroutine suffixes from DWARF info (#217980)
https://github.com/llvm/llvm-project/pull/141889 preserves coroutine
suffixes into the DWARF linkage name, which may unexpectedly pass down
those suffixes into the profile in llvm-profgen. The logging also shows
extremely high percentages of samples being recovered from symbol table
because of the unstripped suffixes introduced from DWARF linkage name.
```
warning: 45.38%(754559/1662830) of samples are from ranges that belong to functions recovered from symbol table.
```
This fix strips the coroutine in: 1) the inital
`loadSymbolsFromDWARFUnit` for profiled functions and 2) the stack
`symbolize` that constructs the context trie
Also updates the coroutine unittest to move coroutine header from
experimental to standard.
Commit: 7d29a9258695cc958bd63dc70176a38cb87fe4d6
https://github.com/llvm/llvm-project/commit/7d29a9258695cc958bd63dc70176a38cb87fe4d6
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
Log Message:
-----------
[CIR] Accept a union whose empty member is [[no_unique_address]] (#223538)
The record-wide reject for a member CIRGen marks empty is there for the
struct arm of mapCIRType, which reads such a member as an unnamed
bit-field standing for the bytes it occupies. This does not apply to a
union, so the reject moves into the struct branch.
Which variants the classifier sees then falls to the union arm, and it
now reads that from each variant's own storage rather than from its
mark. A zero-sized variant and one that is empty for the ABI are
skipped. One whose mark says empty over storage that holds data is not.
Assisted-by: Cursor / claude-opus-5
Commit: 8a3e7cdcd2fba1ea2ba91f8e3c7755afc2f481e5
https://github.com/llvm/llvm-project/commit/8a3e7cdcd2fba1ea2ba91f8e3c7755afc2f481e5
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
Log Message:
-----------
[MLIR][XeVM] Fix mask lifetime in HandleVectorExtractPattern (#223879)
When a contiguous-slice shuffle is hoisted through a bitcast that
changes
the element count, the slice is rewritten against the bitcast source by
rescaling the mask into a local SmallVector and rebinding the `mask`
ArrayRef to it. That SmallVector was declared inside the
`if (maskScale != 1)` block, so it was destroyed before the two uses of
`mask` that follow the block - a stack-use-after-scope.
It is benign on uninstrumented builds, which is why precommit did not
catch it, but the sanitizer bots trap it on
Conversion/XeVMToLLVM/mxfp_scale_binary_hoist.mlir, the first test whose
chain drives the length-changing bitcast path:
ERROR: AddressSanitizer: stack-use-after-scope
READ of size 4
#23 mlir::detail::DenseArrayAttrImpl<int>::get(MLIRContext*,
ArrayRef<int>)
#24 mlir::LLVM::ShuffleVectorOp::build(..., ArrayRef<int>)
#26 HandleVectorExtractPattern::matchAndRewrite
XeVMToLLVM.cpp:1866:27
Address is located in stack of thread T0 at offset 304 in frame
#0 HandleVectorExtractPattern::matchAndRewrite XeVMToLLVM.cpp:1801
[288, 352) 'newMask' (line 1856) <== Memory access at offset 304 is
inside this variable
SUMMARY: AddressSanitizer: stack-use-after-scope
ASan reports the above, MSan reports a read of uninitialized memory and
HWASan a tag mismatch. In each case mlir-opt dies partway through
--split-input-file, so the surface symptom is the CHECK-LABEL of the
second module in that file not being found:
https://lab.llvm.org/buildbot/#/builders/52/builds/20099
https://lab.llvm.org/buildbot/#/builders/164/builds/25415
https://lab.llvm.org/buildbot/#/builders/169/builds/26571
https://lab.llvm.org/buildbot/#/builders/55/builds/33165
Hoist the declaration so it outlives the uses, and add a lit test for
the
length-changing bitcast path, which previously had no direct coverage -
the existing tests only bitcast between equal element counts.
Commit: 6c31f6446a55e0cc603c3eca5c5ebd47c2f5327a
https://github.com/llvm/llvm-project/commit/6c31f6446a55e0cc603c3eca5c5ebd47c2f5327a
Author: Maxim Potapchik <maximp1012 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/PerfHelper.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.h
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/unittests/tools/llvm-exegesis/CMakeLists.txt
A llvm/unittests/tools/llvm-exegesis/PerfHelperTest.cpp
Log Message:
-----------
[llvm-exegesis] Add RawPerfEvent raw PMU counter path in createCounter (#208364)
Introduces RawPerfEvent, a PerfEvent derived class that constructs
perf_event_attr directly from EventSelect and UMask, bypassing
pfm_get_os_event_encoding for cycle and uops events.
createCounter routes to RawPerfEvent when PfmCountersInfo contains a
non-negative EventSelect for the cycle or uops counter slot, falling
back to the existing libpfm symbolic path otherwise. Extended
createBenchmarkRunner gate checks to allow raw-only counters in latency
and uops modes.
This wiring is opt-in. Existing behavior is unchanged.
Adds unit tests covering RawPerfEvent construction, config field
encoding, and kernel exclusion flag correctness.
Validated on AMD Zen2: latency measurements via the raw path match the
libpfm symbolic path on identical hardware.
Towards #187930
Commit: 82004b076831331b0567bc9d8b53263a4fabd74b
https://github.com/llvm/llvm-project/commit/82004b076831331b0567bc9d8b53263a4fabd74b
Author: purnima shrivastava <purnimashrivastava05 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A mlir/test/Dialect/SCF/parallel-loop-unroll-invalid.mlir
M mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
Log Message:
-----------
[mlir][SCF] Avoid crash in parallel loop unrolling test pass (#222644)
This fixes crashes in `--test-parallel-loop-unrolling` when
`unroll-factors` is missing or contains zero.
Previously, the test pass forwarded an empty or invalid factor list to
the parallel-loop unrolling utility, violating its preconditions and
triggering an assertion.
The pass now emits an error and signals pass failure when:
* `unroll-factors` is not provided.
* Any unroll factor is zero.
Regression tests verify the diagnostics for both invalid inputs using
`-verify-diagnostics`.
Fixes #222535.
Co-authored-by: Purnima Shrivastava <purnimashrivastava05 at .com>
Commit: 3ce76320daf6cd93e6fbcecf037e9ac620d7cc34
https://github.com/llvm/llvm-project/commit/3ce76320daf6cd93e6fbcecf037e9ac620d7cc34
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 058ca1274446 (#223885)
Commit: 1daae8bcd3bbed8c673518477ba7cd047fe27d82
https://github.com/llvm/llvm-project/commit/1daae8bcd3bbed8c673518477ba7cd047fe27d82
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/tools/llvm-exegesis/BUILD.gn
Log Message:
-----------
[gn build] Port 6c31f6446a55 (#223886)
Commit: 6f6bbfb5e63e8cf4f051c7e5f773c41fe5ddbf19
https://github.com/llvm/llvm-project/commit/6f6bbfb5e63e8cf4f051c7e5f773c41fe5ddbf19
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-profiles.c
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV]Add RVA23.1 and RVB23.1 experimental profiles (#217199)
RVA23.1 state: https://riscv.atlassian.net/browse/RVS-4180
RVB23.1 state: https://riscv.atlassian.net/browse/RVS-4184
---------
Co-authored-by: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Commit: de9ad513460a1a5439b0b8d6d5c7a51a3634bc20
https://github.com/llvm/llvm-project/commit/de9ad513460a1a5439b0b8d6d5c7a51a3634bc20
Author: Michael Jones <michaelrj at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/mknodat.h
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/mkfifo.cpp
A libc/src/sys/stat/mkfifo.h
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/mkfifo_test.cpp
Log Message:
-----------
[libc] Implement mkfifo (#223566)
Implements the mkfifo function from POSIX, and tests.
Fixes: #220758
Assisted-by: Automated Tooling, Human Reviewed
Commit: 32a8fd50bd8d1dc52764730e9f8c491c8fd7a277
https://github.com/llvm/llvm-project/commit/32a8fd50bd8d1dc52764730e9f8c491c8fd7a277
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
[bazel] Fix 82004b076831331b0567bc9d8b53263a4fabd74b (#223892)
Add split-file dep for mlir test in
82004b076831331b0567bc9d8b53263a4fabd74b
Commit: 59ae8d382261e84d95e67e4f9f43fd5c71ae1397
https://github.com/llvm/llvm-project/commit/59ae8d382261e84d95e67e4f9f43fd5c71ae1397
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[CI] Use Ubuntu 26.04 for Premerge Image (#223883)
Mainly so that we pull in a newer CMake version given the minimum is
getting bumped soon, but also to get the upgrade over with.
Commit: eb5f248268fb9d2337a2b85139017fc94eb61ce6
https://github.com/llvm/llvm-project/commit/eb5f248268fb9d2337a2b85139017fc94eb61ce6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
A lldb/test/Shell/SymbolFile/DWARF/missing-oso.cpp
Log Message:
-----------
[lldb] Report an error when a debug map object file is missing (#223576)
When an OSO in the debug map does not exist on disk, LLDB records the
load error on the CompileUnitInfo but never surfaces it. The sibling
mod-time-mismatch branch does report, so a stale .o produces a
diagnostic while a deleted one fails silently.
This is easy to hit with LTO. The linker writes the merged object to a
temporary path and deletes it, so unless the build passes
-object_path_lto the debug map points at a file that is already gone.
rdar://162327417
Commit: c793abb8bb6233dea287748a96ea7c2b8f447fa1
https://github.com/llvm/llvm-project/commit/c793abb8bb6233dea287748a96ea7c2b8f447fa1
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/test/Conversion/MathToXeVM/math-to-ocl.mlir
M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
Log Message:
-----------
[mlir][MathToXeVM] Route math ops by fastmath: native for `afn`, OCL otherwise. (#223816)
The pass had two lowerings for the same math ops. `afn` fastmath ops
went to the OpenCL `native_` intrinsics. Everything else was only
lowered when the `convert-to-ocl` option was set, which defaulted to
off, so those ops were left untouched.
Make `convert-to-ocl` default to true. The fastmath flag now picks the
intrinsic on its own:
- `afn` set -> `__spirv_ocl_native_*`, fast but approximate.
- `afn` unset -> `__spirv_ocl_*`, precise.
`fastmath<fast>` is a group that expands to include `afn`, so it takes
the native path too. Other flags without `afn` do not.
The precedence already worked: the native patterns get a higher pattern
benefit than the precise ones, so an `afn` op still gets the native
intrinsic when both pattern sets are live. Spell the benefits out
instead of deriving one from the option value.
Set `convert-to-ocl=false` to get the old behavior of leaving non-`afn`
ops alone. math-to-xevm.mlir pins the native half, so it now passes that
flag. math-to-ocl.mlir gains a routing case covering all five flag
states, since the benefit tie only has to be broken when both pattern
sets are live.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: bb651180e3b17b374c5fc0ceb7f3b8c09bc61156
https://github.com/llvm/llvm-project/commit/bb651180e3b17b374c5fc0ceb7f3b8c09bc61156
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/include/lldb/Interpreter/Interfaces/ScriptedFrameInterface.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
A lldb/include/lldb/ValueObject/ValueObjectSynthesizedValue.h
M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/ValueObject/CMakeLists.txt
A lldb/source/ValueObject/ValueObjectSynthesizedValue.cpp
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
Log Message:
-----------
[lldb] Report a scripted frame's variables with the frame's value type (#221708)
A scripted frame's variable exists as two objects: a Variable holding
the scope the frame assigned it, and a ValueObject holding what the
frame built. SBValue::GetValueType() reports the ValueObject's, and
GetValueObjectForFrameVariable handed that ValueObject back unchanged,
so the scope never reached a client. A ValueObject built in Python is a
ValueObjectConstResult, which reports how it was produced rather than
which variable it stands for, leaving anything that groups a frame's
variables by scope unable to place it. `frame variable` was unaffected
because it reads the Variables directly.
This patch presents the ValueObject under that scope instead. A class
for this already existed as ValueObjectRecognizerSynthesizedValue, which
frame recognizers use to name an argument: both take a ValueObject that
cannot report the ValueType it is being presented as and supply that
ValueType for it, so generalize that one into
ValueObjectSynthesizedValue and use it for both. ValueObjectVariable is
the other class that pairs a ValueObject with a ValueType, but it cannot
serve here because it recovers its data from a DWARF location
expression, and a frame that builds its own ValueObjects supplies none.
The presented ValueObject is not a parent, so it is no longer held as
one. It is the same ValueObject seen differently, which makes the
presenting object a root: constructing it as one keeps GetParent()
reporting no parent, as it does for any other ValueObject obtained from
a frame, and keeps the walks over m_parent (for a symbol context scope,
a root, a dynamic ValueObject or format information) from finding a
container that does not exist.
Recognized arguments change behaviour slightly as a result: the shared
UpdateValue propagates an error from the presented ValueObject, fills in
the data and sets validity, none of which the recognizer's copy did.
Reaching a variable by name goes through Variable::NameMatches, which
dereferences m_owner_scope for every entry whose name does not match. A
null owner scope is a legal state, CalculateSymbolContext handles it
explicitly and a frame that makes up its own variables has none, so drop
that lookup. The SymbolContext it filled in has had no reader since
22b044877d23, which dropped the language argument to
Mangled::NameMatches along with the only use of it.
Also document that the synthetic flag in GetValueTypeForVariable's
return is what exempts a variable from the scope rules a declared
variable is subject to. A ValueObject with no storage behind it is
filtered out of an in-scope-only listing without it.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: ef326fec1daefa425f2ffd025cbda56e8300354d
https://github.com/llvm/llvm-project/commit/ef326fec1daefa425f2ffd025cbda56e8300354d
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/test/CodeGenHLSL/builtins/asdouble.hlsl
M clang/test/CodeGenHLSL/builtins/ddx.hlsl
M clang/test/CodeGenHLSL/builtins/ddy.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/mad.hlsl
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
Log Message:
-----------
[HLSL][LongVec] Add more intrinsic support (#222043)
resolves #220699
resolves #220655
resolves #220639
resolves #220638
resolves #220614
Commit: 182ca95eed3feb7c7ba83ed2b35a0c5f29517b9b
https://github.com/llvm/llvm-project/commit/182ca95eed3feb7c7ba83ed2b35a0c5f29517b9b
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
A llvm/test/Verifier/funclet-unreachable-block.ll
Log Message:
-----------
[Verifier] Don't look up the funclet color of an unreachable block (#222500)
Fixes #192015.
Commit: 8723e4a1bc0b6078e35c17532952f79fb8480f53
https://github.com/llvm/llvm-project/commit/8723e4a1bc0b6078e35c17532952f79fb8480f53
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
A llvm/test/CodeGen/AMDGPU/coexec-block-carried-latency.mir
M llvm/test/CodeGen/AMDGPU/coexec-mfma-interleave-gfx950.ll
M llvm/test/CodeGen/AMDGPU/coexec-sched-ds-fifo.mir
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
Log Message:
-----------
[AMDGPU] Add block carried latency to CoExecSched (#192324)
This adds some rudimentary logic to check for load dependencies across
blocks. Since the scheduling algorithm is local scheduling per region,
we do not have about latencies carried from other blocks. Rather than
constructing a global DAG to accurately measure these latencies, this PR
uses a heuristic to estimate the incoming latency.
We limit our incoming dependencies to load instructions, as these are
expected to be the ones that cause problems. This uses the full latency
of the instruction as the incoming latency to cover. We check for any
use that occurred later in the def block - if we find such a use then we
do not have incoming latency as we have already waited for the load.
Using the incoming latency assumes that the load is the last instruction
in the block, and that the branch takes 0 cycles. Aside from not fully
understanding the dependencies of other blocks, a challenge in defining
a more accurate incoming latency is that it is possible that the block
with the load may be rescheduled.
---------
Co-authored-by: Austin Kerbow <Austin.Kerbow at amd.com>
Commit: 12992dca3ccbd2c4c3fc67528467ac73a1da292d
https://github.com/llvm/llvm-project/commit/12992dca3ccbd2c4c3fc67528467ac73a1da292d
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/Decl.cpp
M clang/test/CodeGenCXX/cxx1z-inline-variables.cpp
M clang/test/SemaTemplate/class-template-spec.cpp
Log Message:
-----------
[clang] Fix handling of constexpr static data member template. (#220469)
[temp.expl.spec] says "An explicit specialization of a static data
member of a template or an explicit specialization of a static data
member template is a definition if the declaration includes an
initializer." The code did not match this rule for constexpr variables.
The check in question was only supposed to match the cases from
[depr.static.constexpr].
Fixes #219796
Commit: 46f08d7878f7a5a943355c4c02fb7a67bf532709
https://github.com/llvm/llvm-project/commit/46f08d7878f7a5a943355c4c02fb7a67bf532709
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
Log Message:
-----------
[RISCV] Remove Zicfiss DecoderNamespace. NFC (#223891)
This used to be needed to prioritize c.sspopchk and c.sspush over
c.mop.1 and c.mop.5, but those are treated as InstAliases now.
Commit: 4150e90b0f597e64303d2d3a8ee2c2d83ee1ddab
https://github.com/llvm/llvm-project/commit/4150e90b0f597e64303d2d3a8ee2c2d83ee1ddab
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Log Message:
-----------
[RISCV] Call DecodeGPRPairRegisterClass from DecodeGPRPairCRegisterClass. NFC (#223882)
GPRPairC is a subset of GPRPair. We just need to do the range check and
let DecodeGPRPairRegisterClass do the rest of the work.
Commit: dec17c44def4439db47a888341191d49f33e6891
https://github.com/llvm/llvm-project/commit/dec17c44def4439db47a888341191d49f33e6891
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
Log Message:
-----------
[flang][cuda] Fix matching distance for use_device and none (#223849)
https://docs.nvidia.com/hpc-sdk/compilers/cuda-fortran-prog-guide/#unified-data
the table set the matching distance for actual `use_device` and dummy
argument `none` to 1 but the implementation set it to 3.
@wangzpgi Was there a specific reason to set 3 instead of 1?
Commit: 4ee9dafceb16232b5c06857551228ee5471dc5cd
https://github.com/llvm/llvm-project/commit/4ee9dafceb16232b5c06857551228ee5471dc5cd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Log Message:
-----------
[RISCV] Use DecodeFilteredRegisterClass for DecodeGPRX1X5RegisterClass. (#223878)
Commit: c20428cbb5f551d54520d492b1d27011e4076f5b
https://github.com/llvm/llvm-project/commit/c20428cbb5f551d54520d492b1d27011e4076f5b
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/mbar_arrive_drop.mlir
Log Message:
-----------
[MLIR][NVVM] Fix the lowering of legacy mbar.arrive_drop (#222916)
`nvvm.mbarrier.arrive_drop` fails to compile for sm_80:
LLVM ERROR: Cannot select: intrinsic
%llvm.nvvm.mbarrier.arrive.drop.scope.cta.space.cta
The op always lowers to the `scope.*.space.*` intrinsics, which need
sm_90. The legacy `llvm.nvvm.mbarrier.arrive.drop{,.shared}` intrinsics
work from sm_80 but are never used.
This uses the legacy intrinsic for the basic case only, space=cta,
scope=cta, no relaxed, no explicit count, the same fix as #172476 for
`mbarrier.arrive`. The count forms need sm_90, so they are unchanged.
Assisted-by: Claude
Commit: 262cf39197f4748693ea7bae7b788208bcb21621
https://github.com/llvm/llvm-project/commit/262cf39197f4748693ea7bae7b788208bcb21621
Author: Matt Turner <mattst88 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/test/MC/AsmParser/macro-max-depth.s
Log Message:
-----------
[MC] Increase asm-macro-max-nesting-depth default to 100 (#218455)
GNU as accepts assembly we reject at the current default of 20, e.g.
glibc's
`sysdeps/unix/sysv/linux/alpha/rt_sigaction.S`, which nests 31 deep.
Raise the
default to 100, matching GNU as.
Assisted-by: Claude Code
Commit: 8b66604bb8e699820c7f1fd06a43a3c6ed2cac76
https://github.com/llvm/llvm-project/commit/8b66604bb8e699820c7f1fd06a43a3c6ed2cac76
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/zicfiss-valid.s
Log Message:
-----------
[RISCV] Remap mop.rr.7 and mop.r.28 to sspush/sspopchk/ssrdp in the assembler. (#223894)
This makes llvm-mc output match llvm-objdump. And is more consistent
with the InstAliases we use c.mop.
Commit: 6c1d20c5e29776e365e6a83e4a15b421b8552755
https://github.com/llvm/llvm-project/commit/6c1d20c5e29776e365e6a83e4a15b421b8552755
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/blend-i1.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
Log Message:
-----------
[VPlan] Process combineRecipes in a worklist (#213899)
This brings combineRecipes further in line with InstCombine, and asides
from unlocking more simplifications it also helps avoid test churn
whenever passes are moved around combineRecipes.
For now just push the new recipe onto the worklist, not its users.
This uses a post order traversal so we maintain the same simplification
order as before.
Commit: c7ddefdcc81c32c2a05b636817fcb5d5e4cc0c40
https://github.com/llvm/llvm-project/commit/c7ddefdcc81c32c2a05b636817fcb5d5e4cc0c40
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/MC/RISCV/attribute-arch.s
Log Message:
-----------
[MC][RISCV] Make Zve32x a dependency of Zvabd (#223901)
The Zvabd specification defines Zve32x as a dependency. This commit
fixes the dependency problem in MC's implementation.
See:
https://github.com/riscv/integer-vector-absolute-difference/blob/0092c8451bb24b957d8358f261c0535ece88defb/src/unpriv/zvabd.adoc#L26
Commit: 83066e0d57798b10c759fea6ab77346dabc0e1dc
https://github.com/llvm/llvm-project/commit/83066e0d57798b10c759fea6ab77346dabc0e1dc
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-invalid.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-oob.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-relaxed.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-validate-data.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-invalid.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-mc32.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-relaxed.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-validate-data.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-override.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-validate-data.ll
A llvm/test/Verifier/NVPTX/cp-async-bulk-g2s-cta.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cluster_im2col.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cluster_tile.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cta_im2col.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cta_tile.mlir
Log Message:
-----------
[LLVM][NVPTX] Add async bulk copy global to shared extensions (#222323)
This change adds following things to bulk copy intrinsics.
1. Relaxed memory ordering semantics with a scope argument.
2. Data-validity reporting patterns (introduced in Rubin).
3. 32-bit multicast mask for global to shared::cluster variants
(introduced in Rubin).
4. Ignore out of bound checks for global to shared::cta variants.
Note: MLIR lowering is updated to emit the new intrinsic signatures.
Support for the new features in MLIR will be done in a separate change.
Commit: bf89dd2637f367316b1fb67e515ff28782222822
https://github.com/llvm/llvm-project/commit/bf89dd2637f367316b1fb67e515ff28782222822
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Rename createScalarFreeze -> createFreeze. NFC (#223648)
It works for vector operands too. We can also use it in
preparePlanForMainVectorLoop
Commit: df997d219210bf0ef546f85f43c38cfa92607e80
https://github.com/llvm/llvm-project/commit/df997d219210bf0ef546f85f43c38cfa92607e80
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Add DecodeSingleRegister template class to replace DecodeSPRegisterClass and similar. (#223889)
This can avoid adding more explicitly written decode functions for
https://github.com/llvm/llvm-project/pull/177073
Commit: 78bbf2229d2a5b8dc84b1b2b83cab9c2239a47ba
https://github.com/llvm/llvm-project/commit/78bbf2229d2a5b8dc84b1b2b83cab9c2239a47ba
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/include/lldb/Host/HostInfo.h
A lldb/include/lldb/Host/emscripten/HostInfoEmscripten.h
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/emscripten/HostInfoEmscripten.cpp
Log Message:
-----------
[lldb] Add HostInfoEmscripten (#223169)
Emscripten currently selects `HostInfoLinux`. That was useful as an initial bootstrap, but it also introduces Linux-specific assumptions such as `/proc/self/exe`, invoking `lsb_releas`e through `popen`, and
Linux-specific architecture handling.
This patch introduces a small `HostInfoEmscripten` implementation derived from `HostInfoPosix` and selects it when LLDB is built with Emscripten.
The implementation intentionally remains minimal. A browser-hosted LLDB process does not currently have a meaningful native executable path, so `GetProgramFileSpec()` returns an empty FileSpec.
A dedicated PlatformEmscripten and browser-specific process behavior will be handled separately so this change remains atomic !
Commit: b27d9d29615f6a8e784ed705f8e241f6a7c4adbf
https://github.com/llvm/llvm-project/commit/b27d9d29615f6a8e784ed705f8e241f6a7c4adbf
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
Log Message:
-----------
[llvm-jitlink] Fix a memory leak in llvm-jitlink-executor. (#223904)
In openListener, use a scope_exit to call freeaddrinfo on the struct
allocated by getaddrinfo.
No testcase: We have no in-tree tests for llvm-jitlink-executor. This
bug was found by inspection.
Commit: dedfd0eb94dcd8da26a0bcce928037ae32e5616d
https://github.com/llvm/llvm-project/commit/dedfd0eb94dcd8da26a0bcce928037ae32e5616d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctlz.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/cttz.ll
Log Message:
-----------
[SPIR-V] Fix bit count intrinsics on narrow integer types (#223358)
Widening i24 to i32 relabels the type without clearing the high bits, so
ctlz, cttz and ctpop counted them too
Commit: 862885765ac2d854ec5ec1ed38f422f99414688e
https://github.com/llvm/llvm-project/commit/862885765ac2d854ec5ec1ed38f422f99414688e
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/Plugins/Platform/CMakeLists.txt
A lldb/source/Plugins/Platform/Emscripten/CMakeLists.txt
A lldb/source/Plugins/Platform/Emscripten/PlatformEmscripten.cpp
A lldb/source/Plugins/Platform/Emscripten/PlatformEmscripten.h
M lldb/unittests/Platform/CMakeLists.txt
A lldb/unittests/Platform/PlatformEmscriptenTest.cpp
Log Message:
-----------
[lldb] Add PlatformEmscripten (#223200)
This follows #223169, where I introduced `HostInfoEmscripten`.
While getting libLLDB and its SB API working in the browser, I initially used `PlatformLinux` as the host platform under Emscripten. That was enough for the first experiment, but Emscripten is not really Linux and we shouldn't keep inheriting Linux-specific behavior going forward.
This patch introduces a separate `PlatformEmscripten`, based on `PlatformPOSIX`, and makes it the host platform when LLDB itself is running under Emscripten.
For now, it:
- reports the Emscripten host architecture;
- supports `wasm32` and `wasm64` Emscripten targets;
- moves Emscripten host initialization out of `PlatformLinux`;
- does not claim that live process debugging works yet.
`PlatformWasm` remains separate. My understanding is that `PlatformEmscripten` describes the environment in which LLDB itself is running, while `PlatformWasm` describes the WebAssembly program being
debugged.
I am keeping this patch small on purpose. Browser-specific launching, attachment and live execution can be added separately once we connect LLDB to an actual in-browser execution backend.
I added a small test confirming that an Emscripten triple selects this platform, and also compiled the new plugin source successfully with Emscripten 6.0.8.
Commit: c8fdb5f8b93c3e1da5e2ff3ba8b18627d6147b51
https://github.com/llvm/llvm-project/commit/c8fdb5f8b93c3e1da5e2ff3ba8b18627d6147b51
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCA.h
M orc-rt/lib/bedrock/sps/SimpleRemoteCA.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
Log Message:
-----------
[orc-rt] SimpleRemoteCA updates for out-of-band error results (#223916)
Executor-side counterpart to #223378: adds ResultKind, the discriminator
a result message's tag field now carries, so that out-of-band errors can
travel as results despite having no byte representation of their own.
encodeResult and decodeResult own the encoding. handleMessage rejects a
tag that does not name a known kind, ending the session as an
unrecognized opcode does; a payload that will not decode is not fatal,
and comes back as an out-of-band error describing itself.
Nothing sends a non-zero kind yet -- SocketSimpleRemoteCA will, when it
frames a result. SimpleRemoteCATest covers the round-trips and both
malformed cases.
Commit: ab8a9f9127cc0fbccd24a1e44a4e2e73c616d65e
https://github.com/llvm/llvm-project/commit/ab8a9f9127cc0fbccd24a1e44a4e2e73c616d65e
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-15 (Tue, 15 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR][NFC] Restore LoadOp builders, LowerToLLVM, and CIRGenBuiltin fixes lost in #222481 (#223896)
Commit 35c6acb89abf (#222481) accidentally reverted parts of
cc5e9d63b4dc (#222822) in `CIROps.td`, `LowerToLLVM.cpp`, and
`CIRGenBuiltin.cpp`, which broke Linux CI with deprecation and template
instantiation errors.
This change restores those lost changes:
1. Re-adds `LoadOp` custom builders in `CIROps.td` so calls to
`cir::LoadOp::create(builder, loc, addr)` and
`cir::LoadOp::create(builder, loc, resultTy, addr)` do not resolve to
deprecated MLIR collective builders.
2. Restores `lowerConstrainableFPOp` in `LowerToLLVM.cpp` to pass
default properties and type range to `replaceOpWithNewOp`.
3. Restores `emitUnaryFPBuiltin` in `CIRGenBuiltin.cpp` to use
non-deprecated `Operation::create(cgf.getBuilder(), arg.getLoc(), arg)`.
Diagnosed by Antigravity, formatted with Gemini
Commit: 5835ef200a1fdd0aa92578ee824772eea4143279
https://github.com/llvm/llvm-project/commit/5835ef200a1fdd0aa92578ee824772eea4143279
Author: Emery Conrad <conrade.ctc at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/CodeGenCXX/top-level-stmt-local-names.cpp
A clang/test/Interpreter/lambda-top-level-stmt.cpp
Log Message:
-----------
[clang] Fix Itanium mangler crash on lambdas in top-level statements (#217041)
`clang-repl` asserts when a lambda in a top-level statement needs a
mangled name, for example `ns::call([]{});`. Since #84150 a
`TopLevelStmtDecl` is a `DeclContext`, and `manglePrefix` casts it to
`NamedDecl`.
Treat `TopLevelStmtDecl` as a local container and give it a synthesized
internal encoding (`L9__stmt__0v`), like `Ub_` for block literals.
Entities in a top-level statement then mangle as `<local-name>`s with
discriminators, so same-named locals in two statements do not collide.
Each `TopLevelStmtDecl` gets an ordinal at creation, in parse order; it
is serialized.
Tests: `Interpreter/lambda-top-level-stmt.cpp` (crashes without the fix)
and `CodeGenCXX/top-level-stmt-local-names.cpp` (two lambdas, two
same-named local classes). The interpreter test is `UNSUPPORTED:
system-windows`: MSVC compat enables `-fdelayed-template-parsing`, and
clang-repl asserts on any late-parsed template in a later fragment,
lambda or not.
Co-authored-by: Emery Conrad <emery.conrad at chicagotrading.com>
Commit: 54e36c83bc42b2a15d75eee3fc7a61eaf44a4e3a
https://github.com/llvm/llvm-project/commit/54e36c83bc42b2a15d75eee3fc7a61eaf44a4e3a
Author: renndong <liumingliang.dev at bytedance.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vzip.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/utils/TableGen/RISCVVEmitter.cpp
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvzip.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zvzip-zve32f.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/vpairo.ll
M llvm/test/CodeGen/RISCV/rvv/vunzipe.ll
M llvm/test/CodeGen/RISCV/rvv/vunzipo.ll
M llvm/test/CodeGen/RISCV/rvv/vzip.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/rvv/zvzip-invalid.s
M llvm/test/MC/RISCV/rvv/zvzip.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Update Zvzip support to v0.3 (#210603)
This updates the experimental Zvzip implementation to match the
v0.3 draft specification from RISC-V ISA manual PR:
https://github.com/riscv/riscv-isa-manual/pull/3233
In Zvzip 0.3, `vtype` and `vl` describe the destination vector for all
five instructions:
- `vzip.vv` produces a destination with EMUL=LMUL from two source
operands with EMUL=LMUL/2. Its mask is indexed by destination
elements and therefore has the mask type associated with the result
vector. The overlap rule of `vzip.vv` matches widening vector
arithmetic instructions;
- `vunzipe.v` and `vunzipo.v` produce a destination with EMUL=LMUL
from a source operand with EMUL=2*LMUL.
- `vunzipe.v` and `vunzipo.v` no longer have masked forms and are
always encoded with `vm=1`. Their overlap rule matches narrowing
arithmetic instructions.
- The instruction encoding of `zip.vv` is illegal when
`2*SEW > LMUL*min(ELEN, VLEN)`, and the unzips when LMUL = 8.
- The destination of `vpaire.vv` and `vpairo.vv` may not overlap either
source register group.
This PR is developed with @wangpc-pp and is based on his draft PR
https://github.com/llvm/llvm-project/pull/207971.
This PR is assisted by AI.
---------
Co-authored-by: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Commit: d3e5f97569f0d058b4a58f5fab37e50f115e339d
https://github.com/llvm/llvm-project/commit/d3e5f97569f0d058b4a58f5fab37e50f115e339d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
Log Message:
-----------
[RISCV] Replace decodeImmThreeOperand/decodeImmFourOperand with a template function. NFC (#223924)
Make the immediate a template argument that we can be provided in the
DecoderMethod name.
Commit: 1c1edc2d34e181ac8cdd5aa81e218464e1e2a642
https://github.com/llvm/llvm-project/commit/1c1edc2d34e181ac8cdd5aa81e218464e1e2a642
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/Host/CMakeLists.txt
M lldb/source/Host/common/Host.cpp
A lldb/source/Host/emscripten/Host.cpp
Log Message:
-----------
[lldb] Support building lldbHost under Emscripten (#223206)
This builds on the new `HostInfoEmscripten` and `PlatformEmscripten`
support.
Emscripten provides many POSIX APIs, but it does not support `fork` or
native host process management. This patch allows `lldbHost` to build
under Emscripten without treating it as Linux.
It:
- avoids building the `ProcessLauncherPosixFork` implementation;
- adds a small Emscripten Host implementation;
- reports process enumeration, process lookup, launching and shell
expansion as unsupported.
The remaining generic POSIX Host functionality continues to be used.
This is enough for the current libLLDB and SB API experiment, while live
process debugging will be handled separately once we have an in-browser
execution backend.
Commit: 3b8ee89006f5a228fce75528f8dd80b4229abcc1
https://github.com/llvm/llvm-project/commit/3b8ee89006f5a228fce75528f8dd80b4229abcc1
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Analysis/MustExecute.cpp
A llvm/test/Analysis/MustExecute/no-preheader.ll
Log Message:
-----------
[MustExecute] Use the loop predecessor instead of the preheader (#222096)
CanProveNotTakenFirstIteration() gets the IV start value via
LHS->getIncomingValueForBlock(CurLoop->getLoopPreheader()). If the loop
is not in simplified form, getLoopPreheader() returns null and the
lookup asserts. This is reachable from print<must-execute> on IR that is
not in LoopSimplify form (see the reproducer in #166488).
Fixed: use getLoopPredecessor() instead: it returns the unique
out-of-loop predecessor of the header even when it is not a dedicated
preheader, consequently the start value is still known. If there is no
such predecessor, bail out.
Fixes #166488.
Commit: 3b42a54e4be903ab6e0ef996d0800ed4b75650bd
https://github.com/llvm/llvm-project/commit/3b42a54e4be903ab6e0ef996d0800ed4b75650bd
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/misched-postra-only1.mir
Log Message:
-----------
[MISched] Remove verify-machineinstrs from test(NFC) (#223679)
Commit: 8d6f4149c163132024cf716a8eb1ef3ec4fad433
https://github.com/llvm/llvm-project/commit/8d6f4149c163132024cf716a8eb1ef3ec4fad433
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
Log Message:
-----------
AArch64: Avoid depending on createDataLayout in a pass (#223776)
This should read directly from the context IR's module.
Commit: 76bb77e45a478f91bef1ea7369119974c6449c94
https://github.com/llvm/llvm-project/commit/76bb77e45a478f91bef1ea7369119974c6449c94
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/pr83017.ll
M llvm/test/CodeGen/RISCV/rvv/pr90559.ll
Log Message:
-----------
[RISCV] Merge zeroing stores into wider LMUL vector stores (#223908)
memset lowers to LMUL1 vector stores (v2i64 for e64) that we rely on
store merging to widen. `storeOfVectorConstantIsCheap` counted the
number of MemVT-sized stores, so a v2i64 MemVT needed 4 stores before
merging kicked in, leaving two VL=2 m1 stores for a 32B zero region.
Use the total element count for zeroing stores so two v2i64 stores
merge into one VL=4 e64 m2 store.
Partially fixes #223906
Assisted-by: TRAE CLI (Opus 4.8)
Commit: dd58c11c641d3e592331e57837fdd674d36dee82
https://github.com/llvm/llvm-project/commit/dd58c11c641d3e592331e57837fdd674d36dee82
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[IR] Simplify DIAssignID by storing its links in the node. NFC (#223324)
AssignmentTrackingPass generates DIAssignID metadata. A DIAssignID links
the instructions it is attached to, kept in
LLVMContextImpl::AssignmentIDToInstrs, with the dbg_assign records that
refer to it, found through a permanent use list (#78300 made DIAssignID
the only always-replaceable MDNode for this). Keep both lists in the
node as TinyPtrVector members instead (98% of instruction lists and
88-96% of record lists hold exactly one pointer), and drop the map and
`isAlwaysReplaceable()`.
Aided by Opus 5
Commit: 6e180ea23fe0c2ddcc9e7972ec52b7fc1383d973
https://github.com/llvm/llvm-project/commit/6e180ea23fe0c2ddcc9e7972ec52b7fc1383d973
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/test/CodeGen/AMDGPU/opt-vgpr-live-range-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
Log Message:
-----------
AMDGPU: Use LiveIntervals in SIOptimizeVGPRLiveRange when available (#222385)
LiveVariables has been long deprecated. Use LiveIntervals if available.
With the current pass structure, this will use LiveVariables.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 10c37146ce3b3f850fb9afa9f00d02eb860ff237
https://github.com/llvm/llvm-project/commit/10c37146ce3b3f850fb9afa9f00d02eb860ff237
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
Log Message:
-----------
[RISCV] Do not verify size for some Xqci instructions (#223913)
After instruction size verification was enabled by default in
https://github.com/llvm/llvm-project/pull/221687/ we were running into
crashes for certain 48-bit Xqci instructions. This was happening because
we have compress patterns for these 48-bit instructions to compress them
into 32-bit instructions which `getInstSizeInBytes` was not taking into
account.
The crash looks like:
```
Size mismatch for: QC_E_SW $x0, $x14, 0 :: (store (s32) into %stack.0)
Expected maximum size: 2
Actual size: 4
```
Do not verify size for such instructions until we can return the correct
size for them.
Commit: f7cc8c8407551aabcd013555bafaafd62f0494fa
https://github.com/llvm/llvm-project/commit/f7cc8c8407551aabcd013555bafaafd62f0494fa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SlotIndexes.h
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
A llvm/test/CodeGen/AMDGPU/si-lower-control-flow-remove-redundant-block-liveintervals.mir
Log Message:
-----------
AMDGPU: Maintain LiveIntervals when removing blocks in SILowerControlFlow (#223642)
removeMBBifRedundant removed a redundant block's instructions from the
LiveIntervals maps but not the block itself, leaving a stale idx2MBBMap
entry that crashed getMBBFromIndex in the verifier.
Add SlotIndexes::removeMBBFromMaps to drop the erased block's slot
range, and recompute the intervals that spanned it.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 5a0c86a17b467e867bf1c0cd8fd6b5bacb82f1d1
https://github.com/llvm/llvm-project/commit/5a0c86a17b467e867bf1c0cd8fd6b5bacb82f1d1
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/and-vgpr-s32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
Log Message:
-----------
[AMDGPU] Fix GlobalISel VGPR-to-VCC lowering types (#220987)
Register-bank legalization synthesized an untyped G_AND s32, but
instruction-selection patterns only matched typed G_AND i32, causing:
```
LLVM ERROR: cannot select: %:vgpr_32(s32) = G_AND ...
```
The source-level and i32 was valid; the incorrect type was introduced by
AMDGPU `VgprToVccCopy` lowering. SelectionDAG was unaffected because it
retained typed DAG nodes.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 4beeff3c2bf125de9dda8b374ffc9ec052d02810
https://github.com/llvm/llvm-project/commit/4beeff3c2bf125de9dda8b374ffc9ec052d02810
Author: Mintsuki <36459316+Mintsuki at users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/LoongArch/target-abi-module-flag.c
Log Message:
-----------
[clang][LoongArch] Emit "target-abi" module flag (#223647)
The LoongArch backend reads the ABI from the "target-abi" module flag,
but clang only emits that flag for ARM, PowerPC and RISC-V. Since LTO code
generation doesn't see the -target-abi option passed to clang, it falls
back to the default ABI of the target, which is lp64d for
loongarch64-unknown-elf, regardless of the ABI the code was compiled for.
When an FPU is enabled, this silently miscompiles code built for another
ABI. For example, with -mabi=lp64s, functions get the lp64d calling
convention after LTO, passing and returning floating-point values in FP registers
instead of general-purpose ones, and the output is marked as double-float. Nothing
reports this if every object goes through LTO. For instance, a shared library
built this way links without error, and so does lp64s code built without LTO that
uses it. Without an FPU, the generated code keeps the soft-float calling
convention, but the output is still marked as double-float.
The mismatch only shows up as an error when LTO output is linked
together with relocatable objects built without LTO, which LLD rejects with "cannot
link object files with different ABI".
This patch adds LoongArch to the targets for which clang emits the flag,
so LTO uses the ABI the code was compiled for. It follows the per-target
approach taken for ARM (#217601) and PowerPC (#221669), and leaves the existing
TODO about emitting the flag for every target with a non-empty ABI name as is.
With the flag present, LTO-linking bitcode built for different LoongArch
ABIs now fails with "linking module flags 'target-abi': IDs have conflicting
values" instead of silently picking a single ABI. A -target-abi given to the LTO
backend that disagrees with the flag is now also an error. Both match the
existing RISC-V behavior.
Assisted-by: Claude Code (Claude Opus 5)
Signed-off-by: Mintsuki <mintsuki at protonmail.com>
Commit: 39732305282242041dad8c8edad6a6b5804f1d3a
https://github.com/llvm/llvm-project/commit/39732305282242041dad8c8edad6a6b5804f1d3a
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
A llvm/test/CodeGen/AArch64/interleaved-load-combine-crossblock.ll
Log Message:
-----------
[InterleavedLoadCombine] Do not combine loads across basic blocks (#223915)
This pass turns a group of interleaved loads into a single wide load
inserted at the first load. That is only valid when all of the loads are
in the same basic block. Otherwise the wide load can read memory that
the original program only accessed on a conditional path.
The offset index keyed candidates on base pointer, type and offset only,
so it could pair loads from different blocks. Restrict each block's
matching to candidates whose loads are in that block. This also keeps
the candidate list and index per block, so they stay small.
Fixes a miscompile introduced by #213053.
Commit: e94698b83a74e6ee40438898b17bc49cbd47fcf5
https://github.com/llvm/llvm-project/commit/e94698b83a74e6ee40438898b17bc49cbd47fcf5
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[AMDGPU][GISel][NPM] Complete Global ISel pipeline (#222552)
Commit: 4126b9cf36c826ddf584fec395e0ee796b9db294
https://github.com/llvm/llvm-project/commit/4126b9cf36c826ddf584fec395e0ee796b9db294
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/cxx14.cpp
M clang/test/AST/ByteCode/cxx26.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
Log Message:
-----------
[clang][bytecode] Use a special opcode for trivial defaulted copy/move operator calls (#222332)
The default code that clang synthesizes for them contains calls to
`__builtin_memcpy`, e.g. in
```
CXXMethodDecl 0x7d471ee7cc90 <array.cpp:1983:10> col:10 implicit used constexpr operator= 'array &(const array &) noexcept' inline default trivial external-linkage
|-ParmVarDecl 0x7d471ee7cdd0 <col:10> col:10 used 'const array &'
`-CompoundStmt 0x7d471ee7e340 <col:10>
|-CallExpr 0x7d471ee7e268 <col:10> 'void *'
| |-ImplicitCastExpr 0x7d471ee7e248 <col:10> 'void *(*)(void *, const void *, __size_t) noexcept' <BuiltinFnToFnPtr>
| | `-DeclRefExpr 0x7d471ee7e160 <col:10> '<builtin fn type>' Function 0x7d471ee7de88 '__builtin_memcpy' 'void *(void *, const void *, __size_t) noexcept'
| |-ImplicitCastExpr 0x7d471ee7e2b0 <col:10> 'void *' <BitCast>
| | `-UnaryOperator 0x7d471ee7dd18 <col:10> 'int (*)[4]' prefix '&' cannot overflow
| | `-MemberExpr 0x7d471ee7dca0 <col:10> 'int[4]' lvalue ->_M_elems 0x7d471ee52780
| | `-CXXThisExpr 0x7d471ee7dc88 <col:10> 'array *' this
| |-ImplicitCastExpr 0x7d471ee7e2d0 <col:10> 'const void *' <BitCast>
| | `-UnaryOperator 0x7d471ee7db38 <col:10> 'const int (*)[4]' prefix '&' cannot overflow
| | `-MemberExpr 0x7d471ee7dac0 <col:10> 'const int[4]' lvalue ._M_elems 0x7d471ee52780
| | `-DeclRefExpr 0x7d471ee7da98 <col:10> 'const array' lvalue ParmVar 0x7d471ee7cdd0 depth 0 index 0 'const array &'
| `-IntegerLiteral 0x7d471ee7e1a8 <col:10> '__size_t':'unsigned long' 16
`-ReturnStmt 0x7d471ee7e328 <col:10>
`-UnaryOperator 0x7d471ee7e308 <col:10> 'array' lvalue prefix '*' cannot overflow
`-CXXThisExpr 0x7d471ee7e2f0 <col:10> 'array *' this
```
However, this violates a contract of `__builtin_memcpy` if source and
destination are the same pointer, as in `*__first = *__first`, which is
happening in one of the attached test cases. The check for this is
correct though, so add a new opcode for this case. The functionality is
similar to `__builtin_memcpy` but it doesn't check for overlapping
regions (among others).
Fixes https://github.com/llvm/llvm-project/issues/221403
Commit: 52ae463fb3ebb5de414fcd8a660ed035c40e9272
https://github.com/llvm/llvm-project/commit/52ae463fb3ebb5de414fcd8a660ed035c40e9272
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/Preprocessor/riscv-cf-protection-return.c
Log Message:
-----------
[Clang][RISCV] Loose the requirement of cf-protection=return to Zimop (#223671)
Commit: 72e9411e1bd481669ca9d6f7a55fe900ea5f4b36
https://github.com/llvm/llvm-project/commit/72e9411e1bd481669ca9d6f7a55fe900ea5f4b36
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/Interpreter/Wasm.cpp
Log Message:
-----------
[clang-repl] Respect LLD's canRunAgain result (#223926)
Clang-Repl’s Wasm executor calls `lld::lldMain()` for every incremental
input, but currently ignores `Result.canRunAgain`.
Ordinary linker errors remain recoverable:
```text
retCode=1 canRunAgain=1
```
A fatal LLD error can instead return:
```text
retCode=1 canRunAgain=0
```
In that case, LLD’s state may no longer be safe. This patch follows
LLD’s standalone driver and calls `lld::exitLld()` rather than allowing
Clang-Repl to perform another incremental link.
I verified this with the real Emscripten `lldWasm` library: a normal
invalid wasm file input remained reusable (ordinary error), while a
valid but non-relocatable Wasm module triggered `canRunAgain=false`
(fatal error) and terminated the runtime with status 1.
Commit: 59e842209b868ca110a285c92b8917a3e223995d
https://github.com/llvm/llvm-project/commit/59e842209b868ca110a285c92b8917a3e223995d
Author: Fady Farag <com.webkit.iidmsa at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
A clang/test/Analysis/Checkers/WebKit/call-args-checked-unique-ptr.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-unique-ptr.cpp
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Look through unique_ptr::get() when finding a pointer's origin (#223568)
Previously, the checker only looked through `operator->` and `operator*`
on `std::unique_ptr`, `UniqueRef` and `LazyUniqueRef` when walking a
call argument back to its origin. It didn't include `get()` and `ptr()`
on those types, which caused an unnecessary warning. This includes
`get()` and `ptr()` on those types such that they are recognized and are
consistent with ref-counted and checked pointers.
Commit: f2615d5db071454f1575d57db1e630afb77f6cb1
https://github.com/llvm/llvm-project/commit/f2615d5db071454f1575d57db1e630afb77f6cb1
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/cttz-elts.ll
M llvm/test/tools/llubi/intr_experimental_vector.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[IR][InstSimplify] Clarify poison elements in cttz.elts results in poison (#223935)
The generic expansion for cttz.elts in LegalizeVectorOps is
(reduce.umax (select input, step_vector, 0))
Because reductions produce poison if any element is poison, this will
also produce poison.
ConstantFolding currently has short circuiting behaviour, e.g.
`cttz.elts <0, 1, poison, poison> -> 1`, but we should probably make
this consistent with reductions and just return poison. This updates
LangRef and ConstantFolding to be more explicit about this.
Commit: 353ab070f8b122df06c5aa40a5833e9639d4c9ca
https://github.com/llvm/llvm-project/commit/353ab070f8b122df06c5aa40a5833e9639d4c9ca
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Transforms/AggressiveInstCombine/trunc_illegal_type.ll
Log Message:
-----------
[test][AggressiveInstCombine] Test type legality handling in `TruncInstCombine` (NFC) (#222930)
I noticed that this block of code that checks type legality in
`TruncInstCombine::getMinBitWidth` is not tested:
```
else { // MinBitWidth == TruncBitWidth
// In this case the expression can be evaluated with the trunc instruction
// destination type, and trunc instruction can be omitted. However, we
// should not perform the evaluation if the original type is a legal scalar
// type and the target type is illegal.
bool FromLegal = MinBitWidth == 1 || DL.isLegalInteger(OrigBitWidth);
bool ToLegal = MinBitWidth == 1 || DL.isLegalInteger(MinBitWidth);
if (!DstTy->isVectorTy() && FromLegal && !ToLegal)
return OrigBitWidth;
}
```
This commit adds tests.
Commit: c53000a7282bedb125ffaab8cb072df85596d095
https://github.com/llvm/llvm-project/commit/c53000a7282bedb125ffaab8cb072df85596d095
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/fchmodat.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/fchmodat.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/fchmodat_test.cpp
Log Message:
-----------
[libc] Reject unsupported flags in fchmodat with ENOTSUP (#223165)
### Summary
The Linux kernel's `SYS_fchmodat` system call only takes 3 arguments
(`dirfd`, `pathname`, `mode`), but our syscall wrapper was passing a 4th
`flags` argument that the kernel simply dropped.
This PR cleans up the wrapper to pass the 3 arguments expected by the
kernel, and adds a check to `fchmodat` to return `-1` with `ENOTSUP`
whenever non-zero flags (like `AT_SYMLINK_NOFOLLOW`) are passed.
Fixes #223072
### Changes
- Cleaned up `linux_syscalls::fchmodat` to pass only 3 arguments to
`SYS_fchmodat`.
- Added a check in `fchmodat` entrypoint to set `libc_errno = ENOTSUP`
and return `-1` if `flags != 0`.
- Added `libc.hdr.errno_macros` to the CMake dependencies for `fchmodat`
and its unit test.
- Added tests in `fchmodat_test.cpp` to verify that passing non-zero
flags fails with `ENOTSUP`.
### Testing
- Ran `clang-format` on touched files.
- Built and ran hermetic tests: `libc.test.src.sys.stat.fchmodat_test`
(all 3 tests pass: `ChangeAndOpen`, `NonExistentFile`,
`UnsupportedFlags`).
Commit: d1e261e574e9612fe3f4056730809617323f1758
https://github.com/llvm/llvm-project/commit/d1e261e574e9612fe3f4056730809617323f1758
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/test/src/stdfix/FxDiviTest.h
Log Message:
-----------
[libc] Fix fxdivi tests on 32-bit targets (#223675)
Guard saturation operands against overflow and correct boundary
expectations for the range and precision of 32-bit long.
Fixes issue introduced in a969579a9129891bccb63fcc69e76d74b299f322.
Assisted-by: Codex. Entirely done by the AI and reviewed by me.
Commit: 43cb5e4766869fc13a104498f63906a64e37cf79
https://github.com/llvm/llvm-project/commit/43cb5e4766869fc13a104498f63906a64e37cf79
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[IVDescriptors] Rename MonotonicDescriptor ConditionalInductionDescriptor (NFC) (#223707)
Rename `MonotonicDescriptor` to `ConditionalInductionDescriptor` to
acknowledge that the phi may wrap, so is not strictly monotonic.
Assisted-by: Codex
Commit: 327153dcd71bbec2fa827b84fa513c7c6cf88ce0
https://github.com/llvm/llvm-project/commit/327153dcd71bbec2fa827b84fa513c7c6cf88ce0
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/cmake/modules/FindCursesAndPanel.cmake
M lldb/cmake/modules/FindLuaAndSwig.cmake
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/cmake/modules/LLDBConfig.cmake
Log Message:
-----------
[lldb][cmake] Accept config-mode packages in add_optional_dependency (#222976)
`add_optional_dependency` copies the caller-supplied `<found>` variable
after `find_package`, and callers name the Find module's result
variable, which is usually all-caps (`LIBXML2_FOUND`, `CURSES_FOUND`). A
package located in config mode only sets `<PackageName>_FOUND`
(`LibXml2_FOUND`), so the copy comes back empty and the dependency is
reported as missing and silently disabled even though `find_package`
succeeded.
Set the result variable to TRUE when either `${found}` or
`${package}_FOUND` is set, FALSE otherwise.
Behavior for module-mode finds is unchanged; only the config-mode case,
which previously always evaluated to false, is affected.
Commit: 05bc41ee93d1ca6b690edf7e5d6913b2c31e246d
https://github.com/llvm/llvm-project/commit/05bc41ee93d1ca6b690edf7e5d6913b2c31e246d
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
Log Message:
-----------
[CIR] Fix address space of dest cleanup slot (#222628)
Make sure that flatten cfg creates new allocas for dest cleanup slot in
correct address space. This is important for address-space aware targets
like amdgpu.
Commit: dabd9fe738cc20e8f4364c7b07a1f7f45d2a537d
https://github.com/llvm/llvm-project/commit/dabd9fe738cc20e8f4364c7b07a1f7f45d2a537d
Author: jiel-nv <37816794+jiel-nv at users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/main_location.f90
Log Message:
-----------
[flang] Attribute the generated entry point to the main program's start (#223742)
The `main` entry point that lowering generates for a Fortran main
program is attributed to the end-stmt of the last function-like unit
that was lowered. e.g.
```fortran
subroutine foo(x)
real :: x
x = x + 1.0
end subroutine foo
program demo
real :: a
a = 1.0
call foo(a)
print *, a
end program demo
```
`PROGRAM` is on line 6 and `end program` on line 11.
The loc info shows up in FIR for the compiler generated C `main`
wrapper:
```
before this PR: } loc("repro.f90":11:1)
after this PR: } loc("repro.f90":6:1)
```
Commit: 2c930a5f80d8c52e396b2bb53ba526729ca41796
https://github.com/llvm/llvm-project/commit/2c930a5f80d8c52e396b2bb53ba526729ca41796
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/aarch64/tcb.h
M libc/src/__support/threads/linux/riscv/tcb.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/linux/x86_64/tcb.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/threads/thread_attributes.h
M libc/src/stdlib/exit.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/aarch64/tls.cpp
M libc/startup/linux/do_start.cpp
M libc/startup/linux/riscv/tls.cpp
M libc/startup/linux/x86_64/tls.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_tls_align_test.cpp
Log Message:
-----------
[libc] Store ThreadAttributes in the TCB (#220921)
This patch replaces the `thread_local self` object with the
ThreadAttributes pointer stored in the TCB. current_thread() now
fetches this pointer directly via get_current_thread_attrib().
Since every thread now needs a TCB, init_tls can no longer bail out
when app.tls.size == 0 (this was actually dead code before this patch
since every binary contained at least one thread-local variable
(`self)`). I've removed that check and updated do_start to always set up
a TCB (defaulting to alignment 1 if there is no TLS segment).
The motivation for this change is to make the pthread_self function
async-signal-safe (as required by POSIX), including in the cases where
the function is invoked from a signal hander on the newly created thread
-- before pthread_create returns. This requires making sure that the
thread attribute pointer is initialized from the very first instruction
of the new thread -- something which is hard to do when the attributes
are stored in a TLS variable. This also aligns us with how other C
libraries operate.
While in there, I also remove atexit_callback_mgr from ThreadAttributes.
It simplifies thread startup, and the field was always initialized to
point to the same object anyway. If needed, this can always be changed
later.
Since aligning the various parts of the TLS block is the trickiest part
of this patch, I also add a test that verifies that we've done that
correctly.
Assisted-by: Gemini.
Commit: 251e728cfae889b0e3f8e74d8a5dca2260da494b
https://github.com/llvm/llvm-project/commit/251e728cfae889b0e3f8e74d8a5dca2260da494b
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Suppress annotation inference for owner-capturing constructors (#223635)
Commit: 25564da401e7a93404bd116fe81ded7c94544a05
https://github.com/llvm/llvm-project/commit/25564da401e7a93404bd116fe81ded7c94544a05
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getinheritsched.cpp
A libc/src/pthread/pthread_attr_getinheritsched.h
M libc/src/pthread/pthread_attr_init.cpp
M libc/src/pthread/pthread_attr_init.h
A libc/src/pthread/pthread_attr_setinheritsched.cpp
A libc/src/pthread/pthread_attr_setinheritsched.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etinheritsched (#223322)
This patch implements pthread_attr_setinheritsched and
pthread_attr_getinheritsched.
Like the previous scheduler attribute patches, this commit only operates
on the pthread_attr_t object and does not attempt to install scheduling
parameters when creating a new thread.
Unlike schedpolicy and schedparam, where the validity of arguments is
checked by the kernel, inheritsched is purely a userspace pthread
concept. Therefore, we validate the inheritsched argument and reject
unsupported values with EINVAL.
While in there:
- update the file headers in pthread_attr_init to the modern llvm format
- use proxy headers instead of direct pthread.h inclusion
Assisted-by: Gemini
Commit: 49fd850587bf7d6f235687f348a1e0b201738dba
https://github.com/llvm/llvm-project/commit/49fd850587bf7d6f235687f348a1e0b201738dba
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M llvm/unittests/ADT/STLExtrasTest.cpp
Log Message:
-----------
[ADT] Add make_isa_range to filter and downcast a range by type (NFC) (#223414)
Add a range adaptor that keeps only the elements of a range that isa<T>
holds for, casting each of them to T.
This replaces the common idiom of filtering by type in the loop body
```
for (Instruction &I : *BB) {
auto *PN = dyn_cast<PHINode>(&I);
if (!PN)
continue;
... use PN ...
}
```
with
```
for (PHINode &PN : make_isa_range<PHINode>(*BB))
... use PN ...
```
This pattern is quite widespread in the LLVM codebase, and follow-up
commits will migrate use-sites step-by-step.
This is the helper from
https://github.com/llvm/llvm-project/pull/222770, moved to STL.
PR: https://github.com/llvm/llvm-project/pull/223414
Commit: 91d09ca8162338ab5cccd7f199275db9805b95bd
https://github.com/llvm/llvm-project/commit/91d09ca8162338ab5cccd7f199275db9805b95bd
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/test/API/python_api/value/TestValueAPI.py
Log Message:
-----------
[lldb] Look up register set children by their own name too (#223857)
On Windows x86_64, LLDB's register tables only list the full width
registers, so the ABI adds the sub-registers itself and puts them in a
separate "supplementary registers" set. That set contains `sp`, but
looking up `sp` in it failed: the lookup first turns `sp` into `rsp`,
and `rsp` is in the general purpose set, not this one. Linux doesn't hit
this because its tables already define the sub-registers next to `rsp`.
Now the lookup falls back to matching the name as written against the
registers of that set, so a register you can reach with
`GetChildAtIndex` can also be found by name. Lookups that already worked
are unchanged.
Fixes https://ci-external.swift.org/job/lldb-windows/job/main/3879/
Commit: c02715b01a9d42d5391c8eb230d72c590681cc8e
https://github.com/llvm/llvm-project/commit/c02715b01a9d42d5391c8eb230d72c590681cc8e
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunc-ssat-usat.mir
Log Message:
-----------
[GlobalISel] Add saturating G_TRUNC support for computeKnownBits (#223929)
Port the saturating-truncate KnownBits handling to the GlobalISel. Look
through G_TRUNC_SSAT_S, G_TRUNC_SSAT_U and G_TRUNC_USAT_U by recursing
into the source operand and applying KnownBits::truncSSat, truncSSatU
and truncUSat respectively.
Commit: f1078606d2e7d6da56b584c5acb61077ed824c6f
https://github.com/llvm/llvm-project/commit/f1078606d2e7d6da56b584c5acb61077ed824c6f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-volatile.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
Log Message:
-----------
[AMDGPU] Skip volatile atomics in the atomic optimizer (#223927)
Folding a wavefront into one atomic changes the number of volatile
operations, which is not allowed
Commit: 1e0f6b00bd0a899737a88c875d67d7484f1bc892
https://github.com/llvm/llvm-project/commit/1e0f6b00bd0a899737a88c875d67d7484f1bc892
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Log Message:
-----------
AArch64: Avoid createDataLayout just to check endianness (#223946)
The endianness can be checked from the triple, avoiding a datalayout
copy.
Commit: 98bfb41e304b868e308dae8834c8fdbe1e220677
https://github.com/llvm/llvm-project/commit/98bfb41e304b868e308dae8834c8fdbe1e220677
Author: Oscar Priego <oscar.priegov at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Remove unreachable DUPLANE lowering. NFC (#222418)
`LowerBUILD_VECTOR` handles non-constant `BUILD_VECTOR` splats by
emitting
`AArch64ISD::DUP`.
The following `DUPLANE` path checks `Value.getValueType()` against `VT`.
`Value` is a scalar `BUILD_VECTOR` operand while `VT` is the vector
result
type, so this condition cannot be false and the `DUPLANE` path is
unreachable.
Remove the dead path. `DUP`s of `EXTRACT_VECTOR_ELT` are already
converted
to `DUPLANE` by `performDUPCombine()` after legalization.
No codegen changes intended.
Fixes #222138
Commit: eb9091da5c418a5c383a5da7fb39a1e22ba7c60d
https://github.com/llvm/llvm-project/commit/eb9091da5c418a5c383a5da7fb39a1e22ba7c60d
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
A llvm/test/CodeGen/AArch64/interleaved-load-combine-may-not-return.ll
Log Message:
-----------
[InterleavedLoadCombine] Do not widen loads past a may-not-return instr (#223954)
The combined load reads the whole span at once and is inserted at the
first load, so it effectively hoists the later loads up to that point.
If an instruction between them may not transfer control to its successor
-- a call that might not return, or might throw -- then a load the
original program reached only conditionally would run unconditionally.
All combined loads are in one block, so bail unless the span from the
first to the last load is guaranteed to transfer execution to its
successor.
This gap predates the offset-index change; the old findPattern() did not
check for it either.
Assisted by AI tools.
Commit: 59a1a3289d90b76bedb1013c8ac47b0a9ad5c95f
https://github.com/llvm/llvm-project/commit/59a1a3289d90b76bedb1013c8ac47b0a9ad5c95f
Author: Philip742 <philip.wilkinson at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP in SLICE (#220557)
Adds support to profile compliance for MXFP variants of SLICE
Change-Id: I184fbd49ef667d8d4e0ee09a2e65a72095d61daa
---------
Signed-off-by: Philip Wilkinson <philip.wilkinson at arm.com>
Commit: fd63167bbd7f0193f21129abe49604b98f777cdc
https://github.com/llvm/llvm-project/commit/fd63167bbd7f0193f21129abe49604b98f777cdc
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
Log Message:
-----------
[clangd] Include the operator name in documentHighlight (#220518)
## Summary
- Placing the cursor on an overloaded operator's declaration (e.g.
`operator new`, `operator[]`) and requesting
`textDocument/documentHighlight` only highlighted the `operator` keyword
itself, not the name or symbol that follows it (`new`, `[]`, etc.), even
though that name is what's actually significant to the user.
- `ReferenceFinder` already splits some references into several spelled
tokens (used for Objective-C's split selector syntax); this reuses that
mechanism for the operator name too, extracting the tokens spelled in
the operator name's source range. This only applies to the declaration's
own occurrence.
## Test plan
- [x] `ninja check-clangd` passes
- [x] New cases added to `HighlightsTest.All` in
`clang-tools-extra/clangd/unittests/XRefsTests.cpp` covering `operator
new`, `operator delete` (clicking on either the keyword or the name),
and a multi-token operator (`operator()`)
Commit: 3723ac3407bc09d0b822df08f17228eed8fa76a3
https://github.com/llvm/llvm-project/commit/3723ac3407bc09d0b822df08f17228eed8fa76a3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxxabi/src/private_typeinfo.cpp
Log Message:
-----------
[libc++abi][NFC] Return const void* from __dynamic_cast (#223737)
`__dynamic_cast` is only called magically by the compiler, so it really
doesn't matter what the exact protoype is as long as it's ABI
compatible. Making the return type a `const void*` simplifies the
implementation a bit though.
Commit: 0aa2a2f2451052f1f43a26f3c545b705e2702d87
https://github.com/llvm/llvm-project/commit/0aa2a2f2451052f1f43a26f3c545b705e2702d87
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 2c930a5 (#223955)
This fixes 2c930a5f80d8c52e396b2bb53ba526729ca41796 (#220921).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=2c930a5f80d8c52e396b2bb53ba526729ca41796
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: e5fa11f89ebe04877fdab1d5b1274a771e760ae5
https://github.com/llvm/llvm-project/commit/e5fa11f89ebe04877fdab1d5b1274a771e760ae5
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/Host/common/Socket.cpp
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.h
Log Message:
-----------
[lldb][Windows] Support AF_UNIX domain sockets (#205618)
Enable the Windows `AF_UNIX` domain-socket support added in #205864 by
flipping the `#if LLDB_ENABLE_POSIX` guards to `#if LLDB_ENABLE_POSIX ||
defined(_WIN32)`.
Also updates `SocketTest.cpp` to exercise `ProtocolUnixDomain` on
Windows (while still excluding ProtocolUnixAbstract, which has no
Windows equivalent).
This is part of a longer set of patches to fix tests on
`LLDB_USE_LLDB_SERVER=1`.
Commit: 150eb1f1c8a70b121d0c22de47a6496b2a7551bb
https://github.com/llvm/llvm-project/commit/150eb1f1c8a70b121d0c22de47a6496b2a7551bb
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[NFC][AArch64ISelLowering] Use get{Extract/Insert}VectorElt helpers. (#222979)
Commit: 7e960a831b1aca0f74ba9937bb08cf27ea420e81
https://github.com/llvm/llvm-project/commit/7e960a831b1aca0f74ba9937bb08cf27ea420e81
Author: EuphoricThinking <agata.momot at intel.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/MemoryManager.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[offload] add handling of memory alignment to MemoryManagerTy (#218418)
Previously, memory alignment was handled internally by the device. The
`MemoryManagerTy` either redirected large allocation requests directly
to the device or stored pointers to the smaller memory chunks in pools.
The information about the alignment expected by the user was just passed
by the `MemoryManagerTy` to the device allocators. However, most vendors
do not provide an API for specifying the alignment of the memory
allocation (except for the Level Zero plugin), allowing only for
verification of whether the returned pointer is correctly aligned. In
this patch, `MemoryManagerTy` allocates excess memory and performs
pointer arithmetic on the pointer returned by the device allocator, so
that the final pointer is aligned accordingly regardless of the plugin.
NodeTy has two new fields:
- `BasePtr`: the pointer to the originally allocated memory
- `Ptr`: the pointer returned to the caller, possibly after pointer
arithmetic operations on `BasePtr` for ensuring the requested alignment.
Pointer arithmetic is performed when a specific alignment is requested
or when the chosen pointer from the memory pool is being reused after an
aligned allocation, since `Ptr`s are not reset to `BasePtr`s during
deallocation.
The Alignment parameter is preserved in the plugin-side implementations
of `allocate()` for validation purposes, since the device allocations
might have granularity which is not compatible with the requested
alignment.
The presented changes are part of the series of patches introducing
memory alignment. The next patch will remove the doubling of the memory
alignment management in the `MemoryManagerTy` and the Level Zero plugin,
leaving the implementation in `MemoryManagerTy`.
Commit: c7d4c008350c6b66112de0278aa74cd72fedc180
https://github.com/llvm/llvm-project/commit/c7d4c008350c6b66112de0278aa74cd72fedc180
Author: RachinskiyMaksim <rachinskii.mv at phystech.edu>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/Relocation.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/runtime/X86/rela-plt-order.c
Log Message:
-----------
[BOLT] Prevent rela.plt reordering (#219447)
[BOLT] Preserve the original order of DT_JMPREL relocations.
BOLT reorders .rela.plt entries without also updating the corresponding
PLT stub relocation indices. This patch preserves the original order of
DT_JMPREL relocations by recording their original indices and using
those indices when emitting them. We store the original `DT_JMPREL`
index directly on each relocation.
AI tools (codex) were used to assist with implementation.
Related to https://github.com/llvm/llvm-project/issues/207222
Commit: 0a8eb54dd990f8d9649f01aee1d2c0cbff3b68ac
https://github.com/llvm/llvm-project/commit/0a8eb54dd990f8d9649f01aee1d2c0cbff3b68ac
Author: Tulio Magno Quites Machado Filho <tuliom at redhat.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
[OpenMP][OMPT] Fixes current_address printing on RV64GC (#223681)
A previous commit increased the number of arguments passed to printf in
print_possible_return_addresses(addr) but forgot to change the format in
order to include the new argument.
Fixes: 4e19543b1a85 (FIX some OMPT tests that fail on RISC-V (#156914),
2026-07-24)
Commit: 762aa86b8ebff9b840e2ec76e015b28051ea7158
https://github.com/llvm/llvm-project/commit/762aa86b8ebff9b840e2ec76e015b28051ea7158
Author: David Green <david.green at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-build-vector.ll
M llvm/test/CodeGen/AArch64/cttz-of-bool-vector-bitcast.ll
M llvm/test/CodeGen/AArch64/partial-reduction-add-predicated.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64] Canonicalize NVCAST to bitcast under LE (#223388)
A NVCAST is equivalent to a BITCAST under LE. This canonicalises the
NVCAST to BITCAST under LE like we do for ARM, so there is only one
representation, then fixes up the places that were assuming nvcast.
Commit: 09f4207015216928e92bbcdef1f954db1daab7e9
https://github.com/llvm/llvm-project/commit/09f4207015216928e92bbcdef1f954db1daab7e9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/bool-mask.ll
Log Message:
-----------
[SLP][NFC]Add extra bool mask tests, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223984
Commit: de1d4bafa475f2206fffe878789dd29d22197b2f
https://github.com/llvm/llvm-project/commit/de1d4bafa475f2206fffe878789dd29d22197b2f
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/dllexport.cpp
M clang/test/SemaCXX/dllimport.cpp
Log Message:
-----------
[Clang] Warn about ignored dllimport on explicit instantiations (#191392)
Diagnose about a non-effective dllimport attribute on an explicit
instantiation declaration for a specialization which
was already (implicitly) instantiated somewhere, rather than ignoring it
silently.
related to #21132
Commit: 89d02eebfb7d3c01f9a500a1682be6e5e58a4c17
https://github.com/llvm/llvm-project/commit/89d02eebfb7d3c01f9a500a1682be6e5e58a4c17
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/test/CodeGen/SPIRV/transcoding/func_param_attr.ll
Log Message:
-----------
[SPIR-V] Emit NoReadWrite decoration for readnone function parameters (#223699)
Commit: 8167678860e17c5c20aaaf0f863ef70861b3b9f1
https://github.com/llvm/llvm-project/commit/8167678860e17c5c20aaaf0f863ef70861b3b9f1
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
Log Message:
-----------
[lldb][windows] support long path in loaded modules cache (#206117)
`NativeProcessWindows::CacheLoadedModules` truncates paths longer than
260 characters.
This patch changes how modules are resolved:
- Query the untruncated image path with `GetModuleFileNameExW`.
- Canonicalize it through a handle to the image file with
`GetFinalPathNameByHandleW(FILE_NAME_NORMALIZED | VOLUME_NAME_DOS)`.
- Strip the extended length prefixes so the cached path matches the
ordinary Win32 form lldb produces elsewhere.
Commit: b1076da7495e46e7a28eb82f26931028bf47aaed
https://github.com/llvm/llvm-project/commit/b1076da7495e46e7a28eb82f26931028bf47aaed
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Replace pipes with unix domain sockets. (#223941)
Replace pipes with unix domain sockets for basic out-of-process
execution.
The new ORC runtime doesn't support pipes -- this changes will enable
llvm-jitlink to connect to the new ORC runtime's executor (once it
lands).
Commit: e3974cd35965a239fc75644f249cbd24377959db
https://github.com/llvm/llvm-project/commit/e3974cd35965a239fc75644f249cbd24377959db
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/X86/dagcombine-concat-undef-vs-poison.ll
Log Message:
-----------
Avoid making vector more poisonous in visitCONCAT_VECTORS (#223492)
Fix a miscompile bug found in visitCONCAT_VECTORS.
In commit 544c300f43961 (from January 25 2026) the DAGCombiner started
to use poison instead of undef when rewriting a CONCAT_VECTORS as a
BUILD_VECTOR. Problem was that it was using poison also for elements
that were undef before the fold, making the result more poisonous. That
caused miscompiles as reported in PR #222857.
The fix is to make sure we only use a poison value as operand in the new
BUILD_VECTOR if the input to CONCAT_VECTORS also is poison.
Same kind of fixup is done for combineConcatVectorOfConcatVectors and
combineConcatVectorOfShuffleAndItsOperands (both helpers used by
visitCONCAT_VECTORS). Those funtions were also modified in commit
544c300f43961, all without any motivating test cases showing that it is
correct to use poison. I do not have any test cases proving that those
two helpers also could cause miscompiles, but neither that the rewrites
was correct after commit 544c300f43.
Fixes https://github.com/llvm/llvm-project/issues/222857
Commit: 938754a27588b581f4c62532ff84b2f253f31a24
https://github.com/llvm/llvm-project/commit/938754a27588b581f4c62532ff84b2f253f31a24
Author: Jan Trusiłło <jan.trusillo at intel.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M offload/plugins-nextgen/common/include/MemoryManager.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/offloading/struct_mapping_with_pointers.cpp
Log Message:
-----------
[offload] Fix minor memory manager alignment bugs (#223979)
The alignment handling introduced in #218418 left three minor issues:
- Adding alignment padding could overflow size_t, potentially turning an
excessive allocation (most feasibly caused by erroneous caller-side
underflow) into a small one.
- struct_mapping_with_pointers.cpp still expected the old allocation log
format.
- When the memory manager was disabled, GenericDeviceTy::dataAlloc() did
not verify that the device allocator returned a suitably aligned
pointer.
This patch:
- Checks for overflow before calculating the padded allocation size.
- Updates the log checks to accept the requested and padded sizes.
(Worth considering: should these checks even exist?)
- Validates alignment on the direct device-allocation path. A misaligned
allocation is freed and reported as unsupported. (A cleanup patch will
be made later that will decouple alignment-related behavior from pooling
behavior.)
See #218418 comments for additional discussion on the issues.
Assisted-by: Codex
Commit: b8e720436725e1386985b7bdeabaca677ff498bb
https://github.com/llvm/llvm-project/commit/b8e720436725e1386985b7bdeabaca677ff498bb
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
Log Message:
-----------
[CIR][NFC] Cleanup unhandled NYI in atomic libcall codegen (#223732)
This patch cleans up the unhandled NYIs in the CIRGen path for atomic
operation library calls. This patch should be NFC.
Commit: 77aa4b9ac117acfcd7384166cccd4a333829bf81
https://github.com/llvm/llvm-project/commit/77aa4b9ac117acfcd7384166cccd4a333829bf81
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
A lldb/test/API/macosx/expedited-recent-reads/Makefile
A lldb/test/API/macosx/expedited-recent-reads/TestExpeditedRecentReads.py
A lldb/test/API/macosx/expedited-recent-reads/main.c
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/debugserver/source/RNBRemote.h
Log Message:
-----------
[lldb][debugserver] Expedite the memory ranges lldb read most recently (#223417)
The rationale of this change is that if user/ide/lldb reads memory on
some address, it more likely to read them again in next stop. If
debugserver expedites the memory of recent reads in public stop, lldb
won't send memory read packet to read them again. Those addresses are
already known when the previous stop ends.
Expedite up to 16 memory ranges (at most 512 bytes each) read by `m`,
`x`, and `MultiMemRead` in `jThreadsInfo` for the stopped thread, and
advertise `ExpediteRecentReads+` via `qSupported`. Re-reading a range
moves it to the newest slot, and the ring is cleared on exec.
The gain is large in three use cases:
- TLS variables. `DynamicLoaderDarwin::GetThreadLocalData` reads the TLS
thunk and then calls its `get_addr` in the target, and each such call
surfaces as a public stop, in `ProcessEventData::DoOnRemoval`. lldb
clears its memory cache at every stop, so the thunk and its data block
were read again at each one. Three `frame variable tls_var tls_double`
commands on a two-variable test program send 205 memory-read packets
before this change and 9 after; the reads at that one call site go
from 22 to 2.
- conditional breakpoints: one every stop, lldb reads the same variables
evaluate the condition, and resumes the execution if condition is
false. After this change, these variables are expedited in stop, and
lldb doesn't need to send memory read packets, `x` packet is reduced
from 473 to 432.
- pointer-chase reads. Printing an Objective-C object reads the isa
pointer, then walks the class and its method lists, in
`ClassDescriptorV2::method_list_t::Read` and `method_t::ReadNames`.
None of that is on the stack that the frame 0 expedite covers. A `po`
of one object sends 387 memory-read packets before and 368 after.
Assisted-by: claude
Commit: 9438c6f46ec922d81d4a98f0bab50ecbd27d4ead
https://github.com/llvm/llvm-project/commit/9438c6f46ec922d81d4a98f0bab50ecbd27d4ead
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/load-latency-fallback.ll
Log Message:
-----------
[AArch64] Fix load latency costs without a usable scheduling class (#223416)
#201567 made AArch64TTIImpl::getMemoryOpCost query the scheduling model
for the latency of loads, but that information isn't always available:
* CPUs without a scheduling model (carmel, which uses NoSchedModel) call
getSchedClassDesc on a null table. This asserts with "No scheduling
machine model" and segfaults in release builds. It is reachable from
SelectionDAGBuilder::shouldKeepJumpConditionsTogether when compiling
functions with target-cpu=carmel.
* Invalid scheduling classes (integer loads on oryon-1, and LDR_ZXI on
the models without SVE when +sve is enabled) give a latency of 0 for
single loads and very large latencies for loads split into several.
* Variant scheduling classes (FP/vector loads on c1-nano, c1-premium and
c1-ultra) can't be resolved without an instruction and give the same
bogus values.
In these cases fall back to the default load latency of the scheduling
model, using the same formula as the fixed load latency path. CPUs whose
scheduling model describes the loads are unaffected.
Commit: a2b905f109ae2c80ddfc90ab7a8a56edece5d950
https://github.com/llvm/llvm-project/commit/a2b905f109ae2c80ddfc90ab7a8a56edece5d950
Author: Michał Górny <mgorny at gentoo.org>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-pass-statistics.mlir
M mlir/test/Dialect/LLVMIR/sroa-statistics.mlir
M mlir/test/Dialect/MemRef/mem2reg-statistics.mlir
M mlir/test/Dialect/Tensor/fold-consecutive-insert-extract-slice.mlir
M mlir/test/Dialect/Tensor/fold-tensor-subset-ops.mlir
M mlir/test/Dialect/Tensor/tracking-listener.mlir
M mlir/test/Pass/pipeline-stats-nested.mlir
M mlir/test/Pass/pipeline-stats.mlir
M mlir/test/mlir-runner/async-error.mlir
M mlir/test/mlir-runner/async-func.mlir
M mlir/test/mlir-runner/async-group.mlir
M mlir/test/mlir-runner/async-value.mlir
M mlir/test/mlir-runner/async.mlir
M mlir/test/mlir-runner/x86-varargs.mlir
Log Message:
-----------
[mlir] Mark tests broken on x86 appropriately (#223981)
See https://github.com/llvm/llvm-project/issues/124541 and the
discussion on https://github.com/llvm/llvm-project/pull/220741.
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Commit: 6ebc12bb7d5764c08765caeb82c559e9b209ba7d
https://github.com/llvm/llvm-project/commit/6ebc12bb7d5764c08765caeb82c559e9b209ba7d
Author: Serval MARTINOT-LAGARDE <serval.ml6 at live.fr>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
A llvm/test/CodeGen/AArch64/sve-interleave-of-splat.ll
Log Message:
-----------
[SDAG] Add scalable vector support to WidenVecOp_CONCAT_VECTORS (#219146)
This fixes a crash when lowering:
```
; llc -mattr=+sve crash.ll
define <vscale x 2 x float> @interleave2_nxv2f32(<vscale x 1 x float> %vec0, <vscale x 1 x float> %vec1) {
%retval = call <vscale x 2 x float> @llvm.vector.interleave2.nxv2f32(<vscale x 1 x float> %vec0, <vscale x 1 x float> %vec1)
ret <vscale x 2 x float> %retval
}
```
---------
Co-authored-by: Benjamin Maxwell <macdue at dueutil.tech>
Commit: a91a4c7a7562637b3ed8af5e03788c503e1f0f65
https://github.com/llvm/llvm-project/commit/a91a4c7a7562637b3ed8af5e03788c503e1f0f65
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M offload/ci/hip-tpl.py
Log Message:
-----------
[HIP] Remove old LLVM test suite option spelling (#223943)
After a series of refactorings, we can remove the now obsolete option
spelling for the HIP kokkos tests.
Commit: 2a4149803d3fe72e28ddae2962e6cf1569330944
https://github.com/llvm/llvm-project/commit/2a4149803d3fe72e28ddae2962e6cf1569330944
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[gn] port 1c1edc2d34e1 and 78bbf2229d2a (lldb emscripten) (#224003)
Commit: 65b0cc5ec1a5694408978882be455d564b918b7a
https://github.com/llvm/llvm-project/commit/65b0cc5ec1a5694408978882be455d564b918b7a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/ValueObject/BUILD.gn
Log Message:
-----------
[gn build] Port bb651180e3b1 (#224004)
Commit: 2819c4e7933fa39599c527d5a07ca72b02da91e6
https://github.com/llvm/llvm-project/commit/2819c4e7933fa39599c527d5a07ca72b02da91e6
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Support/APFloat.cpp
A llvm/lib/Support/APFloatPowerOfFiveTable.inc
M llvm/unittests/ADT/APFloatTest.cpp
A llvm/utils/generate-apfloat-pow5-table.py
Log Message:
-----------
[APFloat][Perf] Improve FP literal parsing speed and stack usage (#221701)
Rewrite APFloat decimal conversion to reduce stack use and speed up
floating-point literal parsing.
On an `llvm-as` test of 100k randomized half/float/double/fp128 global
constants, assembly time fell from 666 ms to 551 ms (17.3%) and peak
stack use fell from 25,912 B to 6,640 B (74.4%).
To achieve these results, there are several optimizations:
- Precomputing the powers-of-five factors, replacing a 1,205-word
runtime workspace with a 601-word constant table sufficient to construct
powers through 5^16383.
- Replacing the two fixed 600-word stack-based scratch/destination
buffers with SmallVectors that are dynamically sized based on the input,
drastically reducing stack usage.
- These SmallVectors allow for 16 64-bit words to be stored on the stack
(enough to cover ordinary f16/f32 inputs, which only need 2-6 words),
and larger doubles and fp128s get allocated on the heap instead.
Assisted-by: gpt-5.6-terra
Commit: 988c5a95ffa7d118d3c67f21b78d52efbc7b0cfd
https://github.com/llvm/llvm-project/commit/988c5a95ffa7d118d3c67f21b78d52efbc7b0cfd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/sanitizer_offload.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_hsa.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_image.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload_opcodes.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_rpc.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload_rpc.h
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
R compiler-rt/lib/ubsan/offload/hsa.h
M compiler-rt/lib/ubsan/offload/ubsan_offload.h
R compiler-rt/lib/ubsan/offload/ubsan_offload_hsa.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_hsa.h
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
M compiler-rt/lib/ubsan/offload/ubsan_offload_report.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_rpc.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_rpc.h
R compiler-rt/lib/ubsan/offload/ubsan_offload_symbolize.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_symbolize.h
M compiler-rt/lib/ubsan/ubsan_offload.cpp
M compiler-rt/lib/ubsan/ubsan_offload_packet.h
M compiler-rt/test/CMakeLists.txt
A compiler-rt/test/Inputs/hip.h
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lit.common.configured.in
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/ubsan/AMDGPU/abort.hip
M compiler-rt/test/ubsan/AMDGPU/dedup.hip
M compiler-rt/test/ubsan/AMDGPU/host-and-device.hip
M compiler-rt/test/ubsan/AMDGPU/openmp-overflow.cpp
M compiler-rt/test/ubsan/AMDGPU/overflow-i128.hip
M compiler-rt/test/ubsan/AMDGPU/overflow.hip
M compiler-rt/test/ubsan/AMDGPU/shift.hip
M compiler-rt/test/ubsan/CMakeLists.txt
R compiler-rt/test/ubsan/Inputs/hip.h
M compiler-rt/test/ubsan/lit.common.cfg.py
M compiler-rt/test/ubsan/lit.site.cfg.py.in
Log Message:
-----------
[compiler-rt] Factor HSA layer into common helpers (#223532)
Summary:
This factors the UBSan HSA layer into a common layer so it can be
re-used for other sanitizers. The primary goal is to provide the
simplified interface into HSA (discovery, allocation, copying) and
manage the state that all sanitizers will need (RPC and symbolization).
This is intended as an NFC refactoring.
Commit: 6327754ad4eb21b3c27034bc170e8b9944e5e318
https://github.com/llvm/llvm-project/commit/6327754ad4eb21b3c27034bc170e8b9944e5e318
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/Basic/TargetID.h
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
Revert "Reapply "clang: Use TargetID parsing from AMDGPUTargetParser" (#213824)" (#223983)
Reverts llvm/llvm-project#213847
Matt please look into our downstream failure :
https://amd-hub.atlassian.net/browse/LCOMPILER-2800
Commit: cc0efa4e820e7b54ac97f00021d0cf39cc6915e4
https://github.com/llvm/llvm-project/commit/cc0efa4e820e7b54ac97f00021d0cf39cc6915e4
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
Log Message:
-----------
[mlir][SPIR-V] Add folder for spirv.SMulExtended(x, 1) (#214137)
Commit: 3693a9b748c55b94994ff8ad6f48deffb1c90d40
https://github.com/llvm/llvm-project/commit/3693a9b748c55b94994ff8ad6f48deffb1c90d40
Author: Bruno De Fraine <bruno.defraine at globalfoundries.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.h
M clang/include/clang/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowFormat.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageFormat.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowWPATest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageWPATest.cpp
M clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
Log Message:
-----------
[SSAF][PointerFlow] Properly declare functions in header (#223390)
In a GCC build, this fixes some warnings of the following kind:
clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.cpp:15:1: warning: ‘clang::ssaf::PointerFlowEntitySummary clang::ssaf::buildPointerFlowEntitySummary(EdgeSet)’ has not been declared within ‘clang::ssaf’
15 | ssaf::buildPointerFlowEntitySummary(EdgeSet Edges) {
| ^~~~
In file included from clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.cpp:9:
clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.h:29:35: note: only here as a ‘friend’
29 | friend PointerFlowEntitySummary buildPointerFlowEntitySummary(EdgeSet Edges);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Fixed by centralizing the function declarations in the header, which
also removes the duplication across multiple files/tests.
Commit: 9c972b8fdee869b7602c305bc96ceedbcd26fc5a
https://github.com/llvm/llvm-project/commit/9c972b8fdee869b7602c305bc96ceedbcd26fc5a
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
Add maintainers for the MIPS backend (#223338)
As discussed in:
https://discourse.llvm.org/t/rfc-upstreaming-nanomips-support-to-llvm/91713/16
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 3892d6e6a1c538aab3ab3646bc162ae37bc0e64a
https://github.com/llvm/llvm-project/commit/3892d6e6a1c538aab3ab3646bc162ae37bc0e64a
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[ProfileData] Fix uint8_t loop index truncating bitmap byte count (#220620)
## Summary
`TextInstrProfReader::readNextRecord` reads a record's bitmap bytes with
a
`uint8_t` loop index compared against a `uint64_t` count:
```cpp
for (uint8_t I = 0; I < NumBitmapBytes; ++I) {
```
`NumBitmapBytes` is `uint64_t`, so when a text profile declares more
than 255
bitmap bytes the `uint8_t` index wraps around at 256 back to 0 and the
condition `I < NumBitmapBytes` can never become false. The loop then
stops only
when the input runs out (via the `is_at_end()` truncation check), so the
record
is mis-parsed: the reader runs past the intended `NumBitmapBytes` values
and
reports the profile as truncated instead of reading it correctly.
## Fix
Widen the loop index to `uint64_t` to match `NumBitmapBytes`, consistent
with the sibling counter loop a few lines above (`for (uint64_t I = 0; I
< NumCounters; ++I)`):
```cpp
for (uint64_t I = 0; I < NumBitmapBytes; ++I) {
```
#### Assisted by: Claude
#### I don't have commit access, could you please merge this?
Co-authored-by: Ahmed Radwan <ahradwan at amd.com>
Commit: 975e7e325515013227bd94b5d30b1fa4414b6e1a
https://github.com/llvm/llvm-project/commit/975e7e325515013227bd94b5d30b1fa4414b6e1a
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/host-eval.f90
A flang/test/Lower/OpenMP/target-spmd-reduction.f90
Log Message:
-----------
[flang][OpenMP][NFC] Add missing lowering test coverage (#221079)
Adds three tests for behavior that already works but is untested:
- target-generic-spmd.f90: whether host_eval is emitted for separate,
non-combined target/teams/distribute directive nests, covering the
generic versus SPMD kernel classification. The existing host-eval.f90
covers only combined constructs.
- hlfir-to-fir-conv-omp.mlir: alloca block selection for OpenMP regions
during HLFIR-to-FIR conversion.
- reduction-target-spmd.f90: a reduction on target teams distribute
parallel do is placed on omp.teams.
Commit: 869d8b74ff2b1b823005e9b7ac57c2bf78904503
https://github.com/llvm/llvm-project/commit/869d8b74ff2b1b823005e9b7ac57c2bf78904503
Author: Milin Bhade <mbhade at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/nonpow2-shared-weight-reduction.ll
Log Message:
-----------
[SLP][X86][NFC] Add pre-commit test for width-3 shared-weight reduction (#222243)
Pre-commit test for three independent reductions over contiguous bytes
sharing a single broadcast weight. It captures current codegen: even
with -slp-vectorize-non-power-of-2=true the width-3 tree is discarded to
scalar because the non-power-of-2 <3 x i8> load is over-priced (the
folded vpinsr*(mem) is double-counted). A follow-up X86 cost fix flips
the NPOT run to the width-3 vector form.
cc @alexey-bataev
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: f9a3a90a693874572fa89636476d70787a0bca30
https://github.com/llvm/llvm-project/commit/f9a3a90a693874572fa89636476d70787a0bca30
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ItaniumMangle.cpp
M clang/test/CodeGenCXX/mangle-concept.cpp
Log Message:
-----------
[clang] Fix mangling of constrained auto referring to a parameter when the return type has an ABI tag (#223121)
Fixes #204178
Mangling `template<typename T> auto f(T t, c<decltype(t)> auto) -> s;`
asserts with `ParmVarDecl is not visible in current parameter
environment` when `s` carries an ABI tag, as `std::string` does under
libstdc++. The invented template parameter's constraint refers to the
function parameter `t`, and the mangler encodes that reference by its
nesting depth, so the function's parameter scope has to be entered
before the name is mangled. `mangleFunctionEncoding` does that in the
common case, but when the return type has a tag it first mangles the
name with a temporary mangler to collect the tags in use, and the scope
was pushed on the outer mangler after the temporary one had already
copied its depth state. The temporary mangler saw depth zero. Without
assertions this didn't crash but produced `fp_` instead of `fL0p_`, a
symbol GCC doesn't emit and that differs from clang's own mangling of
the same declaration without the tag.
The scope is now pushed on the mangler that actually mangles the name,
the same pattern `makeFunctionReturnTypeTags` already uses for its own
temporary mangler. Both branches of `mangleFunctionEncoding` now
establish the same depth state before mangling the name, so the tagged
and untagged manglings agree and the assertion stays as it is.
Commit: 0ca85cb9a1f764970106e86f1aba2aff36789b9a
https://github.com/llvm/llvm-project/commit/0ca85cb9a1f764970106e86f1aba2aff36789b9a
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-clmul.mir
Log Message:
-----------
[GlobalISel] Add computeKnownBits for G_CLMUL opcode (#223980)
Port the computeKnownBits support for ISD::CLMUL from SelectionDAG path
to the GlobalISel G_CLMUL.
Commit: ab2b7a8f930b5ea54a300efc512562770dccae79
https://github.com/llvm/llvm-project/commit/ab2b7a8f930b5ea54a300efc512562770dccae79
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
Log Message:
-----------
[NFC] Use logical && instead of bitwise & with a logical NOT operand (#223798)
## Summary
Two spots computed `x & !y`, mixing a bitwise AND with a logical NOT:
* CodeGen: `MachineOperand::isKill()` — `IsDeadOrKill & !IsDef`
* OpenMP/Attributor: `AAExecutionDomainFunction::updateImpl` —
`StoredED.IsReachingAlignedBarrierOnly &
!IsEndAndNotReachingAlignedBarriersOnly`
In both cases all operands are booleans (1-bit bitfields / `bool`), so
the
computed value is unchanged. Switch to the logical AND (`&&`) to express
the
intended logical conjunction and restore short-circuiting.
NFC. Resolves CodeQL `cpp/incorrect-not-operator-usage` reports on these
lines.
#### Assisted-by: Cline
#### I don't have write access - please merge on my behalf once
approved. Thanks.
---------
Co-authored-by: Ahmed Radwan <ahradwan at amd.com>
Commit: 9dd84b417c7619030e530d1a4396a9fac618297d
https://github.com/llvm/llvm-project/commit/9dd84b417c7619030e530d1a4396a9fac618297d
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVMUtils.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeFunctions.def
M mlir/lib/Conversion/OpenACCToLLVM/ACCDataDirectivePatterns.cpp
A mlir/lib/Conversion/OpenACCToLLVM/ACCHostDataPatterns.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVM.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVMUtils.cpp
M mlir/lib/Conversion/OpenACCToLLVM/CMakeLists.txt
M mlir/test/Conversion/OpenACCToLLVM/data-diagnostics.mlir
M mlir/test/Conversion/OpenACCToLLVM/data.mlir
A mlir/test/Conversion/OpenACCToLLVM/host-data.mlir
Log Message:
-----------
[mlir][acc] Add host_data codegen to ACCToLLVM (#223887)
Extends the acc to LLVM conversion with codegen for the `host_data`
construct. Each use_device clause becomes a call to the libacctarget
entry point that gives the device address its object is mapped to, so
that the body of the construct works on device addresses. As with the
data directives, this runtime API is not yet finalized; the draft
proposal can be found at
https://github.com/llvm/llvm-project/pull/197894
Co-authored-by: Matsu <kmatsumura at nvidia.com>
Co-authored-by: nvptm <pmathew at nvidia.com>
Commit: 9b42c077c209202d4eabdadec461c73c548e822b
https://github.com/llvm/llvm-project/commit/9b42c077c209202d4eabdadec461c73c548e822b
Author: nudt_yixiao <1272950933 at qq.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/resolve94.f90
Log Message:
-----------
[Flang] Diagnose nonvariable STAT= specifiers (#219696)
An image selector STAT= operand can be parsed as a variable but later
resolve to a nonpointer function reference. Passing this expression to
CoarrayRef::set_stat() violates its invariant and triggers a CHECK.
Verify that the analyzed STAT= expression is a variable before calling
set_stat(), and emit a semantic error when it is not.
Add a regression test to resolve94.f90 covering an implicitly typed
nonpointer function reference used as a STAT= specifier.
Fixes https://github.com/llvm/llvm-project/issues/208889
Co-authored-by: yixiao <yixiao at hygon.cn>
Commit: 95ead5f4928d555ec88b992b4a39849cee9867a9
https://github.com/llvm/llvm-project/commit/95ead5f4928d555ec88b992b4a39849cee9867a9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[MLIR] Use false instead of nullptr for boolean args. (NFC) (#224009)
This fixes a build failure on macOS with -Werror:
error: implicit conversion of nullptr constant to 'bool'
[-Werror,-Wnull-conversion]
PR: https://github.com/llvm/llvm-project/pull/224009
Commit: 649e3d638e2f2c68c31683ab1f705d04d6ef2a6d
https://github.com/llvm/llvm-project/commit/649e3d638e2f2c68c31683ab1f705d04d6ef2a6d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Unify signed and unsigned decomposition paths (NFC) (#223835)
NFCI clean-up after https://github.com/llvm/llvm-project/pull/223537.
Unify signed/unsigned decomposition via isKnownNoWrap.
PR: https://github.com/llvm/llvm-project/pull/223835
Commit: 503e108f373e1fbd64bbf025cd74d98426d4f566
https://github.com/llvm/llvm-project/commit/503e108f373e1fbd64bbf025cd74d98426d4f566
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[VPlan] Create VPSlotTracker's ModuleSlotTracker for the plan (NFC). (#223952)
Move the lazy creation of VPSlotTracker's ModuleSlotTracker into a new
getOrCreateMST helper, so it can be shared with other users in the
future (https://github.com/llvm/llvm-project/pull/203982).
Also get the function and module directly from the plan Create it for
the cached module and get the function to incorporate from the plan,
instead of using the module and function of the first unnamed
instruction printed.
PR: https://github.com/llvm/llvm-project/pull/223952
Commit: 1892ec00f9f30f17794cbbe0947ce4a47bead65f
https://github.com/llvm/llvm-project/commit/1892ec00f9f30f17794cbbe0947ce4a47bead65f
Author: miyan <1138989048 at qq.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/cmake/config-ix.cmake
Log Message:
-----------
[cmake] Use the C++ linker when checking libxml2 (#221970)
When libxml2 is built statically with ICU support, its link interface
contains C++ libraries. `check_symbol_exists()` uses the C linker
driver, causing the libxml2 check to fail on unresolved C++ runtime
symbols and incorrectly report that `xmlReadMemory` is unavailable.
This issue was found in https://github.com/microsoft/vcpkg/pull/53727
Commit: e364b9da263dcd9a4dcda0d183f403d3f138bb51
https://github.com/llvm/llvm-project/commit/e364b9da263dcd9a4dcda0d183f403d3f138bb51
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/include/__configuration/abi.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_result_type.pass.cpp
M libcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_sseq.pass.cpp
M libcxx/utils/libcxx/test/features/libcxx_macros.py
Log Message:
-----------
[libc++] Take the mersenne twister ABI break unconditionally (#222700)
Technically this is ABI breaking, since we change the meaning of the
bytes inside the mersenne twister. However, this doesn't cause changes
in the size of any objects and is only an issue in very specific
circumstances. Specifically, the mersenne twister has to be passed on an
ABI boundary and be used on both sides of that ABI boundary. If it's
only used on one side, the values will continue to be correct, since
only a single algorithm is used. Even then, the only issue is that the
values aren't properly randomized, since both versions of the mersenne
twister implementation read the same type of data and produce the same
kind of output with it.
Fixes #209514
Commit: 9dc532b79f8676ad1a7795d0869feb05b558267f
https://github.com/llvm/llvm-project/commit/9dc532b79f8676ad1a7795d0869feb05b558267f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++] Optimize string::erase (#223721)
This change allows the `traits_type::move` (i.e. `memmove`) call to be
tail-called, removing the need for allocating any stack space and a
call. We also copy the null terminator through `memmove` instead of
inserting it manually.
Commit: 3906e0a8aa31a083af51eb886d5b9b210e182495
https://github.com/llvm/llvm-project/commit/3906e0a8aa31a083af51eb886d5b9b210e182495
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/ABI/Targets/X86.cpp
M llvm/unittests/ABI/X86TargetInfoTest.cpp
Log Message:
-----------
[LLVMABI] Narrow the eightbyte past a union's storage member (#223859)
`getIntegerTypeAtOffset` sized the eightbyte from the storage member the
union reduction picked, even at an offset that member does not reach. A
union whose second eightbyte holds one data byte then coerced to `i64`
where clang coerces to `i8`:
```c
union { char c[9]; void *p; };
```
Clang lowers it to `{ ptr, [8 x i8] }`, so that offset lands on padding
and the coercion narrows to a byte. The classifier now does the same,
and sizes the coercion from the union's remaining bytes otherwise.
Assisted-by: Cursor / claude-opus-5
Commit: e250f3473062ce61843550df00a1843710bc4d2f
https://github.com/llvm/llvm-project/commit/e250f3473062ce61843550df00a1843710bc4d2f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/IR/Constants.h
M llvm/lib/IR/Core.cpp
M llvm/test/Bindings/OCaml/core.ml
Log Message:
-----------
[IR] Deprecate ConstantExpr::getSizeOf() and getAlignOf() (#223710)
These cannot be represented in terms of ptradd. They should be replaced
with plain constants with the size/alignment (based on DataLayout, or
direct frontend knowledge).
The C API wrappers `LLVMSizeOf()` and `LLVMAlignOf()` are deprecated for
the same reason.
The C APIs `LLVMBuildMalloc()` and `LLVMBuildArrayMalloc()` create a
constant with the size based on data layout now.
Commit: e0f6d55ec93678e9d87bd633c48001c3e6f4b8ce
https://github.com/llvm/llvm-project/commit/e0f6d55ec93678e9d87bd633c48001c3e6f4b8ce
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
Log Message:
-----------
SPIRV: Avoid TargetMachine::createDataLayout in SPIRVTranslate (#224017)
Commit: 0b6050761b5e53cd1c2f825814b46f202c9a83de
https://github.com/llvm/llvm-project/commit/0b6050761b5e53cd1c2f825814b46f202c9a83de
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/mismatched-bound-types.f90
Log Message:
-----------
[flang][test][NFC] Re-add OpenMP test for mismatched loop bound types (#223876)
Lowering now materialises the literal at the loop variable's kind, so
there is a single i64 constant and no fir.convert. Updated the checks to
match and re-added the test.
Commit: 1b66ee2a70cd85897a006ac00365f936178d38d7
https://github.com/llvm/llvm-project/commit/1b66ee2a70cd85897a006ac00365f936178d38d7
Author: satyanarayana reddy janga <satyajanga at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A lldb/test/API/accelerator/mock/TestMockAcceleratorAddressSpaces.py
M lldb/tools/lldb-server/Plugins/Accelerator/Mock/ProcessMockAccelerator.cpp
M lldb/tools/lldb-server/Plugins/Accelerator/Mock/ProcessMockAccelerator.h
Log Message:
-----------
[lldb] End to end test for address spaces using lldb-server mock accelerator plugin (#217092)
Relevant RFC:
https://discourse.llvm.org/t/rfc-address-spaces-support-in-lldb/91222/
Add an end to end test using a mock accelerator that advertises multiple
address spaces.
Commit: 4d00c7b10559e5d4f75fd2c00fa0a29e2be937f4
https://github.com/llvm/llvm-project/commit/4d00c7b10559e5d4f75fd2c00fa0a29e2be937f4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Analysis/CostModel/X86/arith-mulh.ll
Log Message:
-----------
[CostModel][X86] Add baseline costs for smulh/umulh intrinsics (#224022)
Commit: a37f19abd0927b5e7a2a59c42bb4dfdb6a2f043e
https://github.com/llvm/llvm-project/commit/a37f19abd0927b5e7a2a59c42bb4dfdb6a2f043e
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/unistd-macros.h
M libc/include/unistd.yaml
M libc/src/unistd/linux/sysconf.cpp
M libc/test/src/unistd/sysconf_test.cpp
Log Message:
-----------
[libc] Add macro / sysconf support for POSIX threads features. (#223543)
Define all `_POSIX_THREAD_*` macro and corresponding `_SC_THREAD_`
sysconf names that provide information on availability of certain
POSIX threads features.
* Explicitly provide all relevant macro from POSIX standard:
https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/unistd.h.html
to either 202405L (current POSIX version supported by LLVM-libc), or -1
(if the feature is unsupported)
* Support returning these features via `sysconf` for matching `_SC_`
name values;
* Add unit tests that validate the actual numerical values.
Commit: 64d1f1a696f223e47c3df168197b2a48d6c8917b
https://github.com/llvm/llvm-project/commit/64d1f1a696f223e47c3df168197b2a48d6c8917b
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/CodeGen/MIRPrintingPass.cpp
M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
M llvm/lib/Target/ARC/ARCOptAddrMode.cpp
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
Log Message:
-----------
[llvm] Remove dead INITIALIZE_PASS instances and declarations (NFC) (#223938)
initializeARCOptAddrModePass:
Introduced on March 20, 2019 in commit
b062239d638ba668d277dd0ec735497b71321d3f without any callers.
initializeResetMachineFunctionPass:
Introduced on August 27, 2016 in commit
374796d6785311f93ba38ebce1b22e11a3df3ec7 without any callers.
initializeCFGuardPass:
Introduced on October 28, 2019 in commit
e59f7488c772c91ba0f7457ef67ffb4b455047b8 without any callers.
initializeMIRPrintingPassPass, MIRPrintingPassID:
Introduced on May 27, 2015 in commit
2bdb4e1063f5cbc8bb1262d90cca056e9fb31fbb without any callers.
initializeRegToMemWrapperPassPass:
Introduced on October 21, 2024 in commit
e26d9070d3eaee587b3ef0da6d12200a5b994765 without any callers.
Assisted-by: Antigravity
Commit: eac6cdf2fffaa000d022f8d504508bd95c52c852
https://github.com/llvm/llvm-project/commit/eac6cdf2fffaa000d022f8d504508bd95c52c852
Author: Vito Secona <secona00 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
Log Message:
-----------
[mlir][SparseTensor][NFC] Improve documentation for SparseTensor_LvlOp (#223307)
Update the `sparse_tensor.lvl` documentation to correctly describe the
level mapping for `%j floordiv 3`.
Commit: 1a8b98e4017ba8cbe51c362f65a1932c7da9aa1e
https://github.com/llvm/llvm-project/commit/1a8b98e4017ba8cbe51c362f65a1932c7da9aa1e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github] Bump AArch64 premerge to Ubuntu 26.04 (#224016)
Mainly so that we pull in a new CMake. x86 Linux needs to be handled in
zorg.
Commit: 91a87531f26b989863517e07f0648733029c7cfe
https://github.com/llvm/llvm-project/commit/91a87531f26b989863517e07f0648733029c7cfe
Author: google-yfyang <yfyang at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/include/__locale_dir/support/linux.h
Log Message:
-----------
[libc++] Skip including langinfo.h when unused (#223749)
A previous change unconditionally includes <langinfo.h>.
__get_locale_encoding() only uses langinfo when compiling shared
libraries, and hardcodes "UTF-8" on Android.
glibc's <langinfo.h> defines POSIX nl_item constants as raw numeric
preprocessor macros (#define ERA 46).
This causes Bionic's #define ERA 46 leaks into C++ translation units on
Android and fails the compilation with:
```
error: expected member name or ';' after declaration specifiers
static constexpr typename ERA = random_value;
```
Commit: f84aee6257bd37def74ce179252ce38c19323fc8
https://github.com/llvm/llvm-project/commit/f84aee6257bd37def74ce179252ce38c19323fc8
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M mlir/python/mlir/dialects/linalg/__init__.py
M mlir/test/python/dialects/linalg/ops.py
Log Message:
-----------
[mlir][python] Register linalg.ElementwiseOp wrapper as op view (#223806)
Register the wrapper for `ElementwiseOp` with
`@_ods_cext.register_operation(_Dialect, replace=True)` so the exported
class is the one the registry instantiates.
Fixes #223673
Assisted by: Claude
Commit: 02bd47db9d3c4313fe1b5054ed8a1a081f1b7f78
https://github.com/llvm/llvm-project/commit/02bd47db9d3c4313fe1b5054ed8a1a081f1b7f78
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Log Message:
-----------
[SDAG][NFC] Replace initialization UNDEF by POISON (#224015)
Commit: e5e30255b4cfe0684741b45b16c20ff64e01bca3
https://github.com/llvm/llvm-project/commit/e5e30255b4cfe0684741b45b16c20ff64e01bca3
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/unittests/CAS/OnDiskGraphDBTest.cpp
Log Message:
-----------
[CAS] Check StandaloneData before reopening a standalone object (#223807)
OnDiskGraphDB::load() inserted every standalone object it mapped into
StandaloneData but never read from it: lookup() and count() had no
callers anywhere. So each load of an object stored outside the data pool
repeated the open, fstat, mmap and close, and then insert() saw the hash
was already present, dropped the freshly created mapping, and returned
the pointer it already had. The whole sequence was wasted.
Consult lookup() before touching the filesystem to make loading already
opened CAS objects much faster.
Commit: 8ee79595a91fa0abcba887decb439e36dc94b0a0
https://github.com/llvm/llvm-project/commit/8ee79595a91fa0abcba887decb439e36dc94b0a0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Simplify isSImm18() in RISCVAsmParser. NFC (#223928)
Use isSImm<18>() instead of isSImmPred.
Commit: 05117eb95d60873ce575af564ce2532ab0343bb9
https://github.com/llvm/llvm-project/commit/05117eb95d60873ce575af564ce2532ab0343bb9
Author: janr-bay <jrehders at baylibre.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/AArch64/AArch64SRLTDefineSuperRegs.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
Log Message:
-----------
[AArch64] Replace uses of AArch64::NoRegister with Register() or isValid() NFC (#220227)
This came up during work on another PR, @topperc suggested it as ongoing
work
[here](https://github.com/llvm/llvm-project/pull/210992#discussion_r3738407180).
This replaces all remaining uses for aarch64, similar to previous
changes for the [RISCV
backend](https://github.com/llvm/llvm-project/commit/62791b43774615b24d565130c8c3f1e6e5145dd8#diff-b2797a1529366b39522e2b80e2719e331875ec3f70214b2a4ce9524821d471b9)
and [AMDGPU
backend](https://github.com/llvm/llvm-project/commit/191d70f2f52d9cd38e0c57f8319b466eff1ac023)
Commit: ae9feeea47f191cce37ef408ee0a692652c1c62a
https://github.com/llvm/llvm-project/commit/ae9feeea47f191cce37ef408ee0a692652c1c62a
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
M flang/test/Lower/split-sum-expression-tree-subscripts.f90
Log Message:
-----------
[flang] Join reassociated sums with the head first (#223966)
After #222302 we saw a small regression in bwaves with -ffast-math on
some CI machines. I'm quite surprised that this expression ordering has
any effect when reassociation is enabled in the middle-end. The change
in this commit is a bit arbitrary but it restores bwaves performance
without regressing anything else.
Keep the first two terms in the left operand of the final signed join.
Retain both right-associated folds and the existing eligibility guards.
This preserves the source order between the two groups, allowing a
head-first alternative to the code shape produced by tail-first joining.
Update lowering order checks and use four terms in nested-expression
coverage so enabled reassociation remains distinct from the opt-out.
Assisted-by: codex
Commit: e141b669757bd795015b22e02f28f19d4b4759a3
https://github.com/llvm/llvm-project/commit/e141b669757bd795015b22e02f28f19d4b4759a3
Author: Kiroo (Chanung) <ung at zlfn.space>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/builtin-frame-address-arg-type.c
A clang/test/CodeGen/builtin-prefetch-arg-type.c
M clang/test/Sema/builtin-prefetch.c
Log Message:
-----------
[clang][CodeGen] Emit prefetch hints and frame address depth as i32 (#221477)
The hint operands of `llvm.prefetch` and the depth operand of
`llvm.frameaddress` and `llvm.returnaddress` are declared as i32, but
clang emitted the values at the width of the C argument's type.
`__builtin_prefetch` is declared with a variadic prototype, `void(void
const*, ...)`, so its hint arguments are never converted to a parameter
type; only the default argument promotions apply. The depth argument is
emitted at the type of `unsigned int`. Two cases end up with a width
other than 32 bits:
- Targets whose `int` is 16 bits, such as MSP430 and AVR.
Plain `__builtin_prefetch(p, 1, 3)` or `__builtin_frame_address(0)` is
hit this.
- An argument written with a type wider than 32 bits, on any target.
`__builtin_prefetch(p, 1L, 3L)` reproduces this on LP64 targets
`__builtin_prefetch(p, 0 * sizeof(int))` is the same on LP64
#202061
`__builtin_prefetch(p, 1LL, 3LL)` reproduces this on 32 bit targets
Either way the emitted call does not match the intrinsic's signature.
With assertions enabled this trips
`assert(... "Calling a function with a bad signature!")` in
`CallInst::init`;
without them the verifier rejects the module:
```console
$ clang -cc1 -triple msp430 -emit-llvm t.c -o -
call void @llvm.prefetch.p0(ptr %0, i16 1, i16 3, i32 1)
%0 = call ptr @llvm.frameaddress.p0(i16 0)
fatal error: error in backend: Broken module found, compilation aborted!
```
Zero-extend or truncate them to i32 before building the intrinsic call.
The conversion is a no-op where the widths already match, and folds back
to a constant, since Sema already requires these arguments to be
constants in range.
This also removes the FIXME that pointed at the mismatch.
AI assistance helped me find the problem and work out the fix, but I
wrote the code myself.
Assisted-by: Claude Opus 5
Fixes #202061, Fixes #222910
Co-authored-by: mygitljf <2410316423 at qq.com>
Commit: 7971e862b32032d2d049da76bee6cf42bd0efc07
https://github.com/llvm/llvm-project/commit/7971e862b32032d2d049da76bee6cf42bd0efc07
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/lit.local.cfg
A llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/unsupported_alignment.ll
Log Message:
-----------
[SandboxVec][BundleVec][NFC] Precommit test (#223880)
This is a test for a follow-up patch that adds alignment checks.
Commit: f175521aad0e82e632516ccb7bd7a14d5ab31363
https://github.com/llvm/llvm-project/commit/f175521aad0e82e632516ccb7bd7a14d5ab31363
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for s_bitreplicate (#189138)
Add uniform and divergent rules for s_bitreplicate intrinsic.
Assisted-By: Claude
Commit: 998c6e2511a4806ea1c37af6e1f1b776f5205455
https://github.com/llvm/llvm-project/commit/998c6e2511a4806ea1c37af6e1f1b776f5205455
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/cmake/caches/Apple.cmake
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/test/libcxx/algorithms/pstl.libdispatch.chunk_partitions.pass.cpp
Log Message:
-----------
[libc++][pstl] Use libdispatch on Apple platforms by default (#223240)
Currently the default on Apple platforms is "std_thread", which is a
serial dummy.
To enable automatic benchmarking of PSTL, set the backend to
"libdispatch" by default, so it doesn't require specific overrides in
`libcxx/utils/ci/lnt/cmake`.
As a drive-by, fixes some of the minor issues with this backend that
surfaced once more pipelines started using it.
Commit: 1f1c824ad1844bbac5b65cdf78d7c1d6e28bd1b0
https://github.com/llvm/llvm-project/commit/1f1c824ad1844bbac5b65cdf78d7c1d6e28bd1b0
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
A llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/load_store_vec_load_seeds.ll
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][LoadStoreVec] Vectorize load seed chains (#215944)
LoadStoreVec previously only vectorized store bundles. SeedCollection
already emits homogeneous store and load slices separately, so
runOnRegion() now dispatches on the seed kind and calls
vectorizeStores()
or vectorizeLoads() accordingly.
Add vectorizeLoads() to combine consecutive load chains into a single
vector load, unpack for remaining uses, and clean up dead scalar loads
and pointer operands.
Add load_store_vec_load_seeds.ll covering load-only seeds (no uses,
single use, general uses, vector-typed loads, and mixed-type cases), and
extend load_store_vec.ll with a trivial load-then-store case.
Commit: 9e39a5e4a606e2ef8e46bd4a947f0b39feacecc7
https://github.com/llvm/llvm-project/commit/9e39a5e4a606e2ef8e46bd4a947f0b39feacecc7
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/include/__configuration/compiler.h
Log Message:
-----------
[libc++] Reword confusing warning message about AppleClang version (#222380)
AppleClang 26.4 is not a thing -- it's AppleClang 21.0 that shipped with
Xcode 26.4.
Commit: f9de9e4735b386b7def972915e4c166505d4e361
https://github.com/llvm/llvm-project/commit/f9de9e4735b386b7def972915e4c166505d4e361
Author: Sivapriya <sivapriyaofficial2005 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/Targets/NVPTX.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenCUDA/surface.cu
Log Message:
-----------
[CIR][CUDA] Add semantic surface reference type (#223013)
Commit: 40057479b2894cf56e65992a007d679c0c4d639c
https://github.com/llvm/llvm-project/commit/40057479b2894cf56e65992a007d679c0c4d639c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
M libcxx/test/benchmarks/containers/associative/flat_map.bench.cpp
M libcxx/test/benchmarks/containers/associative/flat_multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/multiset.bench.cpp
M libcxx/test/benchmarks/containers/associative/set.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_multiset.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_set.bench.cpp
Log Message:
-----------
[libc++] Return a const reference from get_key in benchmarks (#216088)
It was unnecessary to create a temporary string, and in fact it would
have a negative impact on some benchmarks like `erase(key) (existent)`
which called get_key in the hot loop.
Commit: 28cf18776b433264c7f19919c035f9f8a3143e1b
https://github.com/llvm/llvm-project/commit/28cf18776b433264c7f19919c035f9f8a3143e1b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Fix query benchmarks for associative containers (#216065)
We were calling get_key and the random number generator in the hot loop.
Instead, create a pool of keys to draw from in the initial setup phase,
and then query these keys in a round-robin fashion.
Commit: 9f6791b42d91f72592133e470a4408ae49026ab7
https://github.com/llvm/llvm-project/commit/9f6791b42d91f72592133e470a4408ae49026ab7
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
Log Message:
-----------
[lldb-dap][test] Only check compile units from stack frames for main.c (#223450)
The `test_stack_frame_compile_unit_id` test case added in #222512 checks
that compileUnitId in a stack frame points to the source file. However,
it does so by checking there is only one unique compileUnitId in the
whole stack trace. This may not be true if start.S is included as a
compile unit.
Relax the check by only looking for stack frames that point to main.c.
Also check the other way, i.e. ensure the same compile unit id isn't
referenced by a stack frame that doesn't point to main.c. This way the
test retains its stated goal of making sure the compile unit id resolves
to its source file while also allowing start.S from a different compile
unit to be present.
Commit: db96dfae2a4fd74cb1dba7b4f9dec2dba4c83864
https://github.com/llvm/llvm-project/commit/db96dfae2a4fd74cb1dba7b4f9dec2dba4c83864
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/FIRToMemRefTypeConverter.h
M flang/unittests/Optimizer/OpenACC/FIROpenACCPointerLikeTypeInterfaceTest.cpp
Log Message:
-----------
[flang][FIRToMemRef] Treat heap-pointer allocas as static, not as dynamic arrays (#223821)
Whole-array assignment of an allocatable inside !$acc kernels with
-Mstack_arrays aborted on !fir.ref<!fir.heap<!fir.array<?xf32>>>. A
fir.alloca !fir.heap<array> is a local heap pointer, but it was
unwrapped and handled as a dynamic array. The memref converter then
peeled only the outer ref and asserted because !fir.heap is not a memref
element.
Keep the pointer as a static allocation. Make convertibleMemrefType use
the same one-pointer peel as convertMemrefType so a nested pointer is
not treated as an f32 array.
Commit: fd2f003b399675d0e6cf135ebc3b97cb138b699d
https://github.com/llvm/llvm-project/commit/fd2f003b399675d0e6cf135ebc3b97cb138b699d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-inst-count.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed vectorization because of instcount check, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/224074
Commit: 9df3e81cb2eefa2559eb9989bfdbd475dc23d0a2
https://github.com/llvm/llvm-project/commit/9df3e81cb2eefa2559eb9989bfdbd475dc23d0a2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/AArch64/abi-classify-return-types.c
A clang/test/CodeGen/AArch64/abi-classify-return-types.cpp
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
Log Message:
-----------
[LLVMAABI][AARCH64] Handle homogeneous aggregate return types (#218799)
This change implements the IsHomogenousAggregate() function, which is
shared across targets, and uses it to implement direct passthrough of
return values that meet the homogeneous aggregate criteria.
I'm also adding a new AArch64ABIOptions object that will be used to
track various conditions that are derived from target settings and must
be accounted for in the ABI handling. This change adds only two options,
IsILP32 and IsMicrosoftCXXABI. Other options are expected and will be
added as they are needed.
This change also revises the not-yet-implemented cases, having them
return Ignore rather than Direct so that they fail in more obvious ways.
This was necessary in order to be able to distinguish a return type that
was classified as Direct because it was a homogeneous aggregate from one
that was classified as Direct because it was an unhandled type.
Assisted-by: Cursor / various models
Commit: c14e0afbc1318afb8c4a17f32bfc5fa3ff079658
https://github.com/llvm/llvm-project/commit/c14e0afbc1318afb8c4a17f32bfc5fa3ff079658
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-09-17 (Thu, 17 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Element Join (#223931)
See also
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-element-join.
Commit: 2bef9bbff02d44a5c3431b3a3c4634702662208d
https://github.com/llvm/llvm-project/commit/2bef9bbff02d44a5c3431b3a3c4634702662208d
Author: DeanSturtevant1 <dsturtevant at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
Log Message:
-----------
[bazel][compiler-rt] Exclude sanitizer_offload sources from sanitizer_common (#224078)
Fixes build failure introduced by 988c5a95ffa7 ("[compiler-rt] Factor
HSA layer into common helpers (#223532)").
Commit: c1ee481199adc4c388d2321cd8d16080256ae7a6
https://github.com/llvm/llvm-project/commit/c1ee481199adc4c388d2321cd8d16080256ae7a6
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Separate getCoExecInfo opcode classification (#220329)
Extract WMMA opcode classification from getCoExecInfo into a dedicated
helper. Also track functional unit occupancy separately from the
co-execution window.
Commit: 630b6b92235ea34a50efd1c4d9f101af25547141
https://github.com/llvm/llvm-project/commit/630b6b92235ea34a50efd1c4d9f101af25547141
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/BackendUtil.h
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
A clang/test/CodeGen/Inputs/riscv-ilp32e-no-datalayout.ll
M clang/test/CodeGen/PR44896.ll
M clang/test/CodeGen/asan-unified-lto.ll
A clang/test/CodeGen/riscv-ir-datalayout-preserve.ll
M lldb/test/API/functionalities/inline-sourcefile/inline.ll
Log Message:
-----------
clang: Do not overwrite a module's DataLayout in the backend (#224012)
emitAssembly() unconditionally reset the module's DataLayout from
TargetMachine::createDataLayout(). The TargetMachine's DataLayout is
unreliable given the existence of the "target-abi" module flag, so it
should not be used.
For -x ir input modules this would discard the correct datalayout in
favor of a possibly wrong one.
The post-codegen consistency check compared the module's DataLayout
against clang's frontend getDataLayoutString(), which likewise ignores the
target-abi flag. Recompute the expected layout from the module's own ABI via
Triple::computeDataLayout(getTargetABIName(M)) so the check stays
meaningful without assuming the DataLayout is a fixed property of the target
options. This still detects frontend/LLVM DataLayout drift for generated modules.
PR44896.ll and asan-unified-lto.ll declared x86_64 modules but ran without an
explicit triple, relying on the old overwrite to convert them to the default target.
Pin them to their declared triple and refresh their stale DataLayout strings.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 98bee8bfad61f006d966bcce16e12c520ea03c9c
https://github.com/llvm/llvm-project/commit/98bee8bfad61f006d966bcce16e12c520ea03c9c
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
Log Message:
-----------
[VectorUtils] Allow trivially vectorising llvm.[su]mulh. (#223998)
Commit: b8f1eeb6a61ace4a4ef06687e13424876fd109cd
https://github.com/llvm/llvm-project/commit/b8f1eeb6a61ace4a4ef06687e13424876fd109cd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/MC/RISCV/rvzimop-valid.s
Log Message:
-----------
[RISCV] Add hasCompleteDecoder to sspopchk, sspush, and ssrdp operands. (#223847)
This allows them to disassemble as mop.r.28 or mop.rr.7 when the
operands are not valid for the Zicfiss mnemonic.
Assisted-by: Claude
Commit: 5a01e5e8db22dbab1b41f2ee7e76f243b8f0d952
https://github.com/llvm/llvm-project/commit/5a01e5e8db22dbab1b41f2ee7e76f243b8f0d952
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
Log Message:
-----------
[RISCV] Merge decodeUImmOperand and decodeUImmOperandGE. NFC (#223925)
Add the LowerBound template argument to decodeUImmOperand with a default
value of 0.
Similar for decodeUImmPlus1Operand and decodeUImmPlus1OperandGE, but
default the LowerBound to 1.
Commit: 214f9e4abe156f39350b458002e11ec44cecacd3
https://github.com/llvm/llvm-project/commit/214f9e4abe156f39350b458002e11ec44cecacd3
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-09-17 (Thu, 17 Sep 2026)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[Workflows] Mark miscompilation:undef as uninteresting (#220300)
Address comment
https://github.com/llvm/llvm-project/issues/218908#issuecomment-5470741016.
Commit: 062f3b88efdb0b8cf311a88cc5f72f72eacfc371
https://github.com/llvm/llvm-project/commit/062f3b88efdb0b8cf311a88cc5f72f72eacfc371
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
M llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
Log Message:
-----------
[gn] "port" 988c5a95ffa7 (sanitizer_offload compiler-rt) (#224091)
Commit: 616ec370aa2dd576d5469baf312c284bcefb4f6f
https://github.com/llvm/llvm-project/commit/616ec370aa2dd576d5469baf312c284bcefb4f6f
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/compare.c
Log Message:
-----------
[Clang] Fix `-Wsign-compare` assertion when negating a vector of unsigned integers (#223295)
Fixes #203575
`-1 == -*c`, where `c` points to a vector of `unsigned`, hit the
`unsigned range includes negative?` assertion in `AnalyzeComparison`.
The range analysis for unary `-` and `~` (added in #126846) checks
whether the result type is unsigned with `isUnsignedIntegerType()`,
which never looks through vector types. So the negated unsigned vector
was treated as a signed negation and came back with a possibly-negative
range, even though the operand's own range was correctly unsigned. Same
story for `~*c`.
The check now uses `hasUnsignedIntegerRepresentation()`, which looks
through vector and matrix element types the same way
`IntRange::forValueOfType` and the caller in `AnalyzeComparison` already
do. The binary-operator result gets the same predicate for its
non-negative fixup, since it had the identical blind spot. With that, a
negated unsigned vector takes the same path as a negated `unsigned`
scalar, and the comparison warns about mixed signs again as it did
before Clang 21.
Commit: cc0e7853b3d6c01b0ba954ed3578c6a6376840f7
https://github.com/llvm/llvm-project/commit/cc0e7853b3d6c01b0ba954ed3578c6a6376840f7
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
Fix bazel build for llvm_exegesis_tests (#224085)
- llvm/unittests:llvm_exegesis_tests: Fixes
https://github.com/llvm/llvm-project/pull/208364 (commit 6c31f6446a55)
Root cause: Adding PerfHelperTest.cpp introduced an include of
<perfmon/perf_event.h> under HAVE_LIBPFM, which failed layering_check
and was missing a dependency on libpfm. Fix: Disable layering_check
Commit: ea5b2be249599ba4e7fc6c6c574ee6a936bafd3f
https://github.com/llvm/llvm-project/commit/ea5b2be249599ba4e7fc6c6c574ee6a936bafd3f
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
M llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
Log Message:
-----------
[RelLookupTableConverter] Allow multiple uses of loaded value (#223853)
RelLookupTableConverter previously required `!Load ||
!Load->hasOneUse()`, which prevented converting lookup tables if the
loaded pointer was used more than once in the function.
This restriction is unnecessary since the loaded value itself can be
used many times. The check was likely an over-zealous carryover from
`GV->hasOneUse()` and `GEP->hasOneUse()`.
Remove the check and add a test verifying that lookup tables with
multiple uses of the loaded pointer are converted.
Commit: 01edf187213105e35db8aef724a63f86241b6bd4
https://github.com/llvm/llvm-project/commit/01edf187213105e35db8aef724a63f86241b6bd4
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M libcxx/utils/ci/buildkite-pipeline.yml
Log Message:
-----------
[libc++][ci] Retarget the ARM BuildKite runners (#224107)
I enabled agent clusters in BuildKite since unclustered agents are not
supported anymore. As part of that, I created a new libcxx-builders-arm
queue to replace the existing queue. This patch switches the pipeline
definition so that new jobs start targeting the new queue with clustered
agents.
Commit: 9cc2e03045417d4a2cf53385c58da724604e673e
https://github.com/llvm/llvm-project/commit/9cc2e03045417d4a2cf53385c58da724604e673e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/test/CodeGen/WebAssembly/function-bitcasts.ll
M llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions-allowed.ll
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions-resume-only.ll
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions.ll
Log Message:
-----------
CodeGen: Read the exception model from the module flag in EH lowering (#223970)
Resolve the exception model as the exception-model module flag if
present, otherwise the TargetOptions default.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 3bc966a73f04e05d6e9e9720e8b7ba6431fe47e7
https://github.com/llvm/llvm-project/commit/3bc966a73f04e05d6e9e9720e8b7ba6431fe47e7
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
Log Message:
-----------
[Offload] Minor changes to address build issues (#224047)
This patch includes a few changes to fix customized build process of
offload components with relatively old build compilers. Current LLVM
build does not need this change since it uses just-built clang to build
offload components, but it does not hurt to make the code buildable with
other compilers.
Assisted by Claude Code.
Commit: d8a3beaf45538daa59294e7c59987f6fbfe3f491
https://github.com/llvm/llvm-project/commit/d8a3beaf45538daa59294e7c59987f6fbfe3f491
Author: MaoJiaping <maojiaping1 at huawei.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/GlobalValue.h
R llvm/include/llvm/Transforms/Utils/SplitModuleCommon.h
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/SplitModule.cpp
R llvm/lib/Transforms/Utils/SplitModuleCommon.cpp
M llvm/test/tools/llvm-split/unnamed.ll
Log Message:
-----------
[NFC][IR][GlobalValue] Move externalize helpers to GlobalValue (#223654)
This PR is a revised refactoring of #221181.
To improve generality, it makes the splitting helpers
externalizeGlobal() and nameUnnamedGlobalValue() generic members of
GlobalValue and removes SplitModuleCommon:
- GlobalValue::externalize() promotes a local-linkage global to external
+ hidden and names it if unnamed.
- GlobalValue::nameUnnamed() names unnamed globals __llvm_unnamed.
Co-authored-by: maojiaping <maojiaping1.huawei.com>
Commit: ef7c0b519df40c2e3d46d493b7f7863e43102fd8
https://github.com/llvm/llvm-project/commit/ef7c0b519df40c2e3d46d493b7f7863e43102fd8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
Log Message:
-----------
CodeGen: Replace some getPointerRegClass() uses with operand reg classes (#223930)
Try to take the register class from the contexual instruction being
emitted instead. This is a step towards fully replacing PointerLikeRegClass with
RegClassByHwMode.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 543f4c964c423f78b1f1589a7c38b0273bcef1d6
https://github.com/llvm/llvm-project/commit/543f4c964c423f78b1f1589a7c38b0273bcef1d6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenACC/acc-routine-bind-cuda-modfile.cuf
Log Message:
-----------
[flang][openacc][cuda] Recover acc routine bind info in CUDA Fortran module reads (#223595)
CUDA Fortran device code can call a procedure whose device-side symbol
is given by `acc routine bind(...)` in the module that declares it.
The using translation unit is often compiled with CUDA Fortran enabled
and without an OpenACC target, so the `$acc` sentinel was never
recognized when re-parsing the module file and the bind clause was
dropped.
Enable OpenACC while reading module files under CUDA Fortran as well,
and resolve the recovered directives onto the imported symbols. User
`$acc` in the main source remains ignored without `-fopenacc`; only
directives that already survived into the `.mod` are honored.
A bind(C) host name and an acc bind device name on the same procedure
is the dual-name rule in OpenACC §2.15.1.
Commit: 64b49cb91b9c90e5fe3fb1c153b84e01928548c4
https://github.com/llvm/llvm-project/commit/64b49cb91b9c90e5fe3fb1c153b84e01928548c4
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/premerge.yaml
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/Relocation.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/test/AArch64/validate-branch-target.s
M bolt/test/X86/validate-branch-target.s
A bolt/test/runtime/X86/rela-plt-order.c
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang/bindings/python/.git_archival.txt
M clang/docs/OverflowBehaviorTypes.md
M clang/docs/ReleaseNotes.md
M clang/docs/TypeSanitizer.md
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CodeGen/BackendUtil.h
M clang/include/clang/CodeGenUtils/CodeGenUtils.h
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlow.h
M clang/include/clang/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/DeclOrExpr.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.cpp
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Basic/IdentifierTable.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/Targets/NVPTX.cpp
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGenUtils/CodeGenUtils.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/Value.cpp
M clang/lib/Interpreter/Wasm.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowFormat.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageFormat.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/AST/ByteCode/builtin-object-size-codegen.c
M clang/test/AST/ByteCode/c.c
M clang/test/AST/ByteCode/cxx14.cpp
M clang/test/AST/ByteCode/cxx26.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
M clang/test/AST/HLSL/Textures-AST.hlsl
M clang/test/AST/HLSL/Textures-scalar-AST.hlsl
M clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
M clang/test/AST/HLSL/Textures-vector-AST.hlsl
A clang/test/Analysis/Checkers/WebKit/call-args-checked-unique-ptr.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-counted-unique-ptr.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/CIR/CodeGen/atomic-libcall.c
A clang/test/CIR/CodeGen/avx512-error.c
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
M clang/test/CIR/CodeGen/compound_literal.c
M clang/test/CIR/CodeGen/forward-decls.cpp
A clang/test/CIR/CodeGen/global-address-to-int.c
M clang/test/CIR/CodeGen/non-type-template-param.cpp
A clang/test/CIR/CodeGen/target-builtin-error-2.c
A clang/test/CIR/CodeGen/target-builtin-error-3.c
A clang/test/CIR/CodeGen/target-builtin-error.c
A clang/test/CIR/CodeGen/target-builtin-noerror.c
A clang/test/CIR/CodeGen/target-features-error-2.c
A clang/test/CIR/CodeGen/target-features-error-3.c
A clang/test/CIR/CodeGen/target-features-error-4.c
A clang/test/CIR/CodeGen/target-features-error-5.c
A clang/test/CIR/CodeGen/target-features-error.c
A clang/test/CIR/CodeGen/target-features-no-error-2.c
A clang/test/CIR/CodeGen/target-features-no-error.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlvbmi2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sqrt-builtins.c
A clang/test/CIR/CodeGenBuiltins/builtin-maxnum-minnum.c
M clang/test/CIR/CodeGenBuiltins/builtin-undef-rvalue.cpp
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
M clang/test/CIR/CodeGenCUDA/surface.cu
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx9.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
A clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
A clang/test/CIR/CodeGenSYCL/kernel-caller-address-space.cpp
M clang/test/CIR/IR/invalid-try-catch.cir
M clang/test/CIR/IR/try-catch.cir
A clang/test/CIR/Lowering/unlowered-address-spaces.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
A clang/test/CIR/Transforms/eh-abi-lowering-eh-spec-nyi.cir
A clang/test/CIR/Transforms/flatten-eh-spec.cir
M clang/test/CodeGen/AArch64/abi-classify-return-types.c
A clang/test/CodeGen/AArch64/abi-classify-return-types.cpp
A clang/test/CodeGen/AArch64/matrix-hfa.c
M clang/test/CodeGen/AArch64/sve/dup.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
A clang/test/CodeGen/ARM/matrix-hfa.c
A clang/test/CodeGen/Inputs/riscv-ilp32e-no-datalayout.ll
A clang/test/CodeGen/LoongArch/target-abi-module-flag.c
M clang/test/CodeGen/PR44896.ll
A clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c
A clang/test/CodeGen/PowerPC/matrix-hfa.c
M clang/test/CodeGen/RISCV/riscv-cf-protection.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/non-policy/overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/non-overloaded/vzip.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpaire.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vpairo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipe.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vunzipo.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvzip/policy/overloaded/vzip.c
A clang/test/CodeGen/WebAssembly/exception-model-flag.c
A clang/test/CodeGen/X86/matrix-vectorcall.c
M clang/test/CodeGen/arm-eabi.c
M clang/test/CodeGen/asan-unified-lto.ll
M clang/test/CodeGen/attr-counted-by-or-null-for-pointers.c
M clang/test/CodeGen/attr-sized-by-for-pointers.c
M clang/test/CodeGen/attr-sized-by-or-null-for-pointers.c
A clang/test/CodeGen/builtin-frame-address-arg-type.c
A clang/test/CodeGen/builtin-prefetch-arg-type.c
M clang/test/CodeGen/builtins-arm.c
M clang/test/CodeGen/builtins-arm64.c
A clang/test/CodeGen/exception-model-flag.c
M clang/test/CodeGen/link-builtin-bitcode.c
A clang/test/CodeGen/riscv-ir-datalayout-preserve.ll
M clang/test/CodeGen/stack-protector-guard.c
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCXX/cxx1z-inline-variables.cpp
M clang/test/CodeGenCXX/mangle-concept.cpp
A clang/test/CodeGenCXX/top-level-stmt-local-names.cpp
M clang/test/CodeGenHIP/amdgpu-flat-atomic-fadd.hip
M clang/test/CodeGenHIP/amdgpu-global-atomic-fadd.hip
M clang/test/CodeGenHLSL/builtins/asdouble.hlsl
M clang/test/CodeGenHLSL/builtins/ddx.hlsl
M clang/test/CodeGenHLSL/builtins/ddy.hlsl
M clang/test/CodeGenHLSL/builtins/ldexp.hlsl
M clang/test/CodeGenHLSL/builtins/mad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Gather.hlsl
M clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default.hlsl
M clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx942.cl
M clang/test/Driver/eabi.c
M clang/test/Driver/lto-aix.c
M clang/test/Driver/modules-driver-depscan-log.cpp
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-profiles.c
M clang/test/Frontend/gnu-mcount.c
A clang/test/Interpreter/lambda-top-level-stmt.cpp
M clang/test/Interpreter/simple-exception.cpp
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
A clang/test/PCH/flag-enum.c
M clang/test/Preprocessor/riscv-cf-protection-return.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/Sema/attr-overflow-behavior.cpp
M clang/test/Sema/builtin-prefetch.c
M clang/test/Sema/compare.c
A clang/test/Sema/overflow-behavior-atomic.c
A clang/test/Sema/overflow-behavior-qualifiers.c
A clang/test/Sema/riscv-pset-index-out-of-range.c
A clang/test/Sema/riscv-pst-pointer-types.c
M clang/test/SemaCXX/concept-crash-on-diagnostic.cpp
M clang/test/SemaCXX/ctad.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/dllexport.cpp
M clang/test/SemaCXX/dllimport.cpp
M clang/test/SemaCXX/matrix-type.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
M clang/test/SemaCXX/warn-shadow.cpp
M clang/test/SemaHLSL/BuiltIns/ldexp-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_gather-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_load-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/resource_sample-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmp.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmpLevelZero.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
M clang/test/SemaTemplate/class-template-spec.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/lit.cfg.py
M clang/unittests/Format/FormatTestMacroExpansion.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowWPATest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageWPATest.cpp
M clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
A compiler-rt/lib/sanitizer_common/sanitizer_offload.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_hsa.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_image.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload_opcodes.h
A compiler-rt/lib/sanitizer_common/sanitizer_offload_rpc.cpp
A compiler-rt/lib/sanitizer_common/sanitizer_offload_rpc.h
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
R compiler-rt/lib/ubsan/offload/hsa.h
M compiler-rt/lib/ubsan/offload/ubsan_offload.h
R compiler-rt/lib/ubsan/offload/ubsan_offload_hsa.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_hsa.h
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
M compiler-rt/lib/ubsan/offload/ubsan_offload_report.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_rpc.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_rpc.h
R compiler-rt/lib/ubsan/offload/ubsan_offload_symbolize.cpp
R compiler-rt/lib/ubsan/offload/ubsan_offload_symbolize.h
M compiler-rt/lib/ubsan/ubsan_offload.cpp
M compiler-rt/lib/ubsan/ubsan_offload_packet.h
M compiler-rt/resources/windows_version_resource.rc
M compiler-rt/test/CMakeLists.txt
A compiler-rt/test/Inputs/hip.h
A compiler-rt/test/fuzzer/MinimizeCrashCustomMutatorTest.cpp
A compiler-rt/test/fuzzer/minimize_crash_custom_mutator.test
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lit.common.configured.in
M compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions-stress-test-tower.cpp
M compiler-rt/test/orc/TestCases/Darwin/Generic/exceptions.cpp
M compiler-rt/test/orc/TestCases/Darwin/Generic/llvm-jitlink-force-link-objc.m
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-category.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-cross-file-method-call.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/objc-nonlazy-class.S
M compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-objc-methods.S
M compiler-rt/test/orc/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/orc/lit.cfg.py
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/ubsan/AMDGPU/abort.hip
M compiler-rt/test/ubsan/AMDGPU/dedup.hip
M compiler-rt/test/ubsan/AMDGPU/host-and-device.hip
M compiler-rt/test/ubsan/AMDGPU/openmp-overflow.cpp
M compiler-rt/test/ubsan/AMDGPU/overflow-i128.hip
M compiler-rt/test/ubsan/AMDGPU/overflow.hip
M compiler-rt/test/ubsan/AMDGPU/shift.hip
M compiler-rt/test/ubsan/CMakeLists.txt
R compiler-rt/test/ubsan/Inputs/hip.h
M compiler-rt/test/ubsan/lit.common.cfg.py
M compiler-rt/test/ubsan/lit.site.cfg.py.in
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/lib/cuda/allocatable.cpp
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.h
M flang/include/flang/Optimizer/Transforms/FIRToMemRefTypeConverter.h
M flang/include/flang/Runtime/CUDA/allocatable.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/include/flang/Support/LangOptions.def
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Driver/atomic-control-options.f90
A flang/test/Driver/check-integer-mod-zero-divisor.f90
M flang/test/Driver/flang-f-opts.f90
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
A flang/test/Integration/PowerPC/aix-vec-extabi.f90
M flang/test/Lower/CUDA/cuda-managed-func-result.cuf
M flang/test/Lower/Intrinsics/mod.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/OpenACC/acc-combined-loop-firstprivate-flag.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-private.f90
A flang/test/Lower/OpenACC/acc-routine-bind-cuda-modfile.cuf
M flang/test/Lower/OpenACC/acc-serial-loop.f90
A flang/test/Lower/OpenMP/close-map-derived-members.f90
A flang/test/Lower/OpenMP/declare-target-entry-iface.f90
M flang/test/Lower/OpenMP/declare-target-interface.f90
R flang/test/Lower/OpenMP/declare-target-multiple-entry.f90
A flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/host-eval.f90
A flang/test/Lower/OpenMP/mismatched-bound-types.f90
A flang/test/Lower/OpenMP/target-spmd-reduction.f90
M flang/test/Lower/OpenMP/target_cpu_features.f90
A flang/test/Lower/OpenMP/trailing-cycle.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/main_location.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
M flang/test/Lower/split-sum-expression-tree-subscripts.f90
A flang/test/Lower/trailing-cycle.f90
M flang/test/Semantics/OpenMP/map-modifiers.f90
M flang/test/Semantics/resolve46.f90
M flang/test/Semantics/resolve94.f90
M flang/unittests/Optimizer/OpenACC/FIROpenACCPointerLikeTypeInterfaceTest.cpp
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/off64_t.h
M libc/include/CMakeLists.txt
M libc/include/fcntl.yaml
M libc/include/llvm-libc-macros/linux/unistd-macros.h
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/include/sys/stat.yaml
M libc/include/unistd.yaml
M libc/src/__support/File/file.cpp
M libc/src/__support/File/file.h
A libc/src/__support/File/file_mode.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/File/linux/file.h
A libc/src/__support/File/linux/file_flags.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/fchmodat.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/mknodat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/posix_fadvise.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/aarch64/tcb.h
M libc/src/__support/threads/linux/riscv/tcb.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/linux/x86_64/tcb.h
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/threads/thread_attributes.h
M libc/src/fcntl/CMakeLists.txt
M libc/src/fcntl/linux/CMakeLists.txt
A libc/src/fcntl/linux/posix_fadvise64.cpp
A libc/src/fcntl/posix_fadvise64.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getinheritsched.cpp
A libc/src/pthread/pthread_attr_getinheritsched.h
M libc/src/pthread/pthread_attr_init.cpp
M libc/src/pthread/pthread_attr_init.h
A libc/src/pthread/pthread_attr_setinheritsched.cpp
A libc/src/pthread/pthread_attr_setinheritsched.h
M libc/src/stdio/fmemopen.cpp
M libc/src/stdio/fopencookie.cpp
M libc/src/stdio/linux/stderr.cpp
M libc/src/stdio/linux/stdin.cpp
M libc/src/stdio/linux/stdout.cpp
M libc/src/stdlib/exit.cpp
M libc/src/sys/sendfile/linux/sendfile.cpp
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/fchmodat.cpp
A libc/src/sys/stat/linux/mkfifo.cpp
A libc/src/sys/stat/mkfifo.h
M libc/src/unistd/linux/sysconf.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/aarch64/tls.cpp
M libc/startup/linux/do_start.cpp
M libc/startup/linux/riscv/tls.cpp
M libc/startup/linux/x86_64/tls.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_tls_align_test.cpp
M libc/test/src/__support/File/CMakeLists.txt
A libc/test/src/__support/File/file_mode_test.cpp
M libc/test/src/__support/File/file_test.cpp
M libc/test/src/fcntl/CMakeLists.txt
A libc/test/src/fcntl/posix_fadvise64_test.cpp
M libc/test/src/fcntl/posix_fadvise_test.cpp
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
M libc/test/src/stdfix/FxDiviTest.h
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/sendfile/sendfile_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/fchmodat_test.cpp
A libc/test/src/sys/stat/mkfifo_test.cpp
M libc/test/src/unistd/sysconf_test.cpp
M libcxx/CMakeLists.txt
M libcxx/cmake/caches/Apple.cmake
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx29Papers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/find_if.h
A libcxx/include/__bit/shift.h
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/compiler.h
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/bit
M libcxx/include/deque
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/include/version
M libcxx/modules/std/bit.inc
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
M libcxx/test/benchmarks/containers/associative/flat_map.bench.cpp
M libcxx/test/benchmarks/containers/associative/flat_multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/map.bench.cpp
M libcxx/test/benchmarks/containers/associative/multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/multiset.bench.cpp
M libcxx/test/benchmarks/containers/associative/set.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_map.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_multimap.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_multiset.bench.cpp
M libcxx/test/benchmarks/containers/associative/unordered_set.bench.cpp
M libcxx/test/libcxx/algorithms/pstl.libdispatch.chunk_partitions.pass.cpp
A libcxx/test/libcxx/algorithms/unaligned_empty_range.pass.cpp
M libcxx/test/libcxx/containers/sequences/deque/nodiscard.verify.cpp
M libcxx/test/libcxx/utilities/bit/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/bit.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/numerics/bit/bitops.shift/shl.pass.cpp
A libcxx/test/std/numerics/bit/bitops.shift/shr.pass.cpp
M libcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_result_type.pass.cpp
M libcxx/test/std/numerics/rand/rand.eng/rand.eng.mers/ctor_sseq.pass.cpp
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/features/libcxx_macros.py
M libcxxabi/src/private_typeinfo.cpp
M lldb/cmake/modules/FindCursesAndPanel.cmake
M lldb/cmake/modules/FindLuaAndSwig.cmake
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/Host/HostInfo.h
A lldb/include/lldb/Host/emscripten/HostInfoEmscripten.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedFrameInterface.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/ValueObject/ValueObjectRegister.h
A lldb/include/lldb/ValueObject/ValueObjectSynthesizedValue.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/source/API/SBFile.cpp
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Host/CMakeLists.txt
M lldb/source/Host/common/Host.cpp
M lldb/source/Host/common/Socket.cpp
A lldb/source/Host/emscripten/Host.cpp
A lldb/source/Host/emscripten/HostInfoEmscripten.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/Platform/CMakeLists.txt
A lldb/source/Plugins/Platform/Emscripten/CMakeLists.txt
A lldb/source/Plugins/Platform/Emscripten/PlatformEmscripten.cpp
A lldb/source/Plugins/Platform/Emscripten/PlatformEmscripten.h
A lldb/source/Plugins/Process/Windows/Common/LoadedModuleList.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/ValueObject/CMakeLists.txt
M lldb/source/ValueObject/ValueObjectRegister.cpp
A lldb/source/ValueObject/ValueObjectSynthesizedValue.cpp
A lldb/test/API/accelerator/mock/TestMockAcceleratorAddressSpaces.py
M lldb/test/API/functionalities/inline-sourcefile/inline.ll
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
A lldb/test/API/macosx/expedited-recent-reads/Makefile
A lldb/test/API/macosx/expedited-recent-reads/TestExpeditedRecentReads.py
A lldb/test/API/macosx/expedited-recent-reads/main.c
M lldb/test/API/python_api/value/TestValueAPI.py
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
A lldb/test/Shell/SymbolFile/DWARF/missing-oso.cpp
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/debugserver/source/RNBRemote.h
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-server/Plugins/Accelerator/Mock/ProcessMockAccelerator.cpp
M lldb/tools/lldb-server/Plugins/Accelerator/Mock/ProcessMockAccelerator.h
M lldb/tools/lldb-server/lldb-platform.cpp
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/RunInTerminalTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Platform/CMakeLists.txt
A lldb/unittests/Platform/PlatformEmscriptenTest.cpp
M lldb/unittests/Process/CMakeLists.txt
A lldb/unittests/Process/Windows/CMakeLists.txt
A lldb/unittests/Process/Windows/LoadedModuleListTest.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.cpp
M lldb/unittests/TestingSupport/Host/SocketTestUtilities.h
M llvm/Maintainers.md
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/cmake/config-ix.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/GlobalISel/Legalizer.md
M llvm/docs/LangRef.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/RegionInfo.h
M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/TypeMetadataUtils.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SlotIndexes.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Config/config.h.cmake
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/GlobalValue.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Support/LEB128.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/XtensaTargetParser.def
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/include/llvm/Transforms/Scalar/InferAddressSpaces.h
M llvm/include/llvm/Transforms/Utils/LowerAtomic.h
M llvm/include/llvm/Transforms/Utils/LowerVectorIntrinsics.h
R llvm/include/llvm/Transforms/Utils/SplitModuleCommon.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DominanceFrontier.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/RegionInfo.cpp
M llvm/lib/Analysis/RuntimeLibcallInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
M llvm/lib/CodeGen/MIRPrintingPass.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/IR/PassManager.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/MCParser/MCAsmParser.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/RunCodeGen.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/Support/APFloat.cpp
A llvm/lib/Support/APFloatPowerOfFiveTable.inc
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/PrettyStackTrace.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Valgrind.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/AArch64/AArch64SRLTDefineSuperRegs.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARC/ARCOptAddrMode.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvzip.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/XCore/XCoreFrameLowering.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
M llvm/lib/Target/Xtensa/Xtensa.td
M llvm/lib/Target/Xtensa/XtensaFeatures.td
M llvm/lib/Target/Xtensa/XtensaInstrFormats.td
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaOperands.td
M llvm/lib/Target/Xtensa/XtensaProcessors.td
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
M llvm/lib/Target/Xtensa/XtensaRegisterInfo.td
A llvm/lib/Target/Xtensa/XtensaS3DSPInstrInfo.td
M llvm/lib/Target/Xtensa/XtensaSubtarget.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/AggressiveInstCombine/CMakeLists.txt
M llvm/lib/Transforms/CFGuard/CFGuard.cpp
M llvm/lib/Transforms/IPO/CrossDSOCFI.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/LowerAtomic.cpp
M llvm/lib/Transforms/Utils/LowerVectorIntrinsics.cpp
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SplitModule.cpp
R llvm/lib/Transforms/Utils/SplitModuleCommon.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Analysis/BasicAA/vscale.ll
A llvm/test/Analysis/CostModel/AArch64/load-latency-fallback.ll
M llvm/test/Analysis/CostModel/AArch64/sve-insert-extract.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AArch64/sve-vls-shuffle-extract.ll
A llvm/test/Analysis/CostModel/AArch64/vararg-intrinsic.ll
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
A llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
M llvm/test/Analysis/CostModel/ARM/shuffle.ll
A llvm/test/Analysis/CostModel/X86/arith-mulh.ll
M llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
A llvm/test/Analysis/LoopAccessAnalysis/zero-distance-mixed-width.ll
A llvm/test/Analysis/MustExecute/no-preheader.ll
A llvm/test/Analysis/ScalarEvolution/trip-count-stride-positive-from-guard.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/Assembler/module-flags-exception-model.ll
M llvm/test/Bindings/OCaml/core.ml
M llvm/test/Bitcode/amdgcn-atomic.ll
M llvm/test/Bitcode/amdgpu-unsafe-fp-atomics-upgrade.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-clmul.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunc-ssat-usat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
A llvm/test/CodeGen/AArch64/GlobalISel/localizer-tls.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-build-vector.ll
M llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
A llvm/test/CodeGen/AArch64/complex-deinterleaving-fmf-intersection.ll
A llvm/test/CodeGen/AArch64/conditional-subtract.ll
M llvm/test/CodeGen/AArch64/cttz-of-bool-vector-bitcast.ll
M llvm/test/CodeGen/AArch64/fcvt-fixed.ll
A llvm/test/CodeGen/AArch64/interleaved-load-combine-crossblock.ll
A llvm/test/CodeGen/AArch64/interleaved-load-combine-may-not-return.ll
M llvm/test/CodeGen/AArch64/intrinsic-cttz-elts-sve.ll
A llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/misched-postra-only1.mir
A llvm/test/CodeGen/AArch64/misched-prera-only1.mir
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
M llvm/test/CodeGen/AArch64/partial-reduction-add-predicated.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/shift-mod.ll
A llvm/test/CodeGen/AArch64/smulh.ll
M llvm/test/CodeGen/AArch64/sve-fp-constrained-intrinsics.ll
A llvm/test/CodeGen/AArch64/sve-interleave-of-splat.ll
M llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll
A llvm/test/CodeGen/AArch64/sve-smulh.ll
A llvm/test/CodeGen/AArch64/sve-umulh.ll
A llvm/test/CodeGen/AArch64/umulh.ll
A llvm/test/CodeGen/AArch64/wineh-async-eh-pad-instr-size.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/and-vgpr-s32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-uniform-vector.ll
A llvm/test/CodeGen/AMDGPU/atomic-optimizer-volatile.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
A llvm/test/CodeGen/AMDGPU/coexec-block-carried-latency.mir
M llvm/test/CodeGen/AMDGPU/coexec-mfma-interleave-gfx950.ll
M llvm/test/CodeGen/AMDGPU/coexec-sched-ds-fifo.mir
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/default-flat-work-group-size-overrides-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
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M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
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M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
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M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
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M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
A llvm/test/CodeGen/AMDGPU/fold-fmac-to-fmaak.mir
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M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
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M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
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M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
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M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
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M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
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M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/opt-vgpr-live-range-verifier-error.mir
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M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
A llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
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A llvm/test/CodeGen/AMDGPU/si-lower-control-flow-remove-redundant-block-liveintervals.mir
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M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
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M llvm/test/CodeGen/ARM/divmod-eabi.ll
M llvm/test/CodeGen/ARM/float-helpers.ll
M llvm/test/CodeGen/ARM/setjmp_longjmp.ll
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A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-oob.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-relaxed.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-cta-validate-data.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-invalid.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-mc32.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-relaxed.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-g2s-validate-data.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-override.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-validate-data.ll
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M llvm/test/CodeGen/NVPTX/tcgen05-mma-collector-b.ll
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M llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
M llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll
M llvm/test/CodeGen/PowerPC/aix-csr-vector-extabi.ll
M llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll
M llvm/test/CodeGen/PowerPC/aix-insert-extract.ll
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M llvm/test/CodeGen/PowerPC/aix-vector-stack.ll
M llvm/test/CodeGen/PowerPC/aix-vector-vararg-caller.ll
M llvm/test/CodeGen/PowerPC/aix-vector-vararg-fixed-caller.ll
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M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee-split.ll
M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll
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M llvm/test/CodeGen/PowerPC/p10-handle-split-promote-vec.ll
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A llvm/test/CodeGen/PowerPC/target-abi-module-flag.ll
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M llvm/test/CodeGen/PowerPC/vec_revb.ll
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M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vloxei.ll
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A llvm/test/CodeGen/RISCV/cheri-global-cap-init.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zvzip-zve32f.ll
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M llvm/test/CodeGen/RISCV/rvv/pr90559.ll
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M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
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A llvm/test/CodeGen/SPIRV/hlsl-resources/unbounded-struct-arr.ll
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M llvm/test/CodeGen/WebAssembly/function-bitcasts.ll
M llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
M llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions-allowed.ll
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions-resume-only.ll
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A llvm/test/CodeGen/WebAssembly/splitcriticaledge-physreg-liveness.mir
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M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-chained-bf16.ll
A llvm/test/CodeGen/X86/dagcombine-concat-undef-vs-poison.ll
A llvm/test/CodeGen/X86/dead-register-pr76416.mir
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A llvm/test/CodeGen/X86/inline-asm-pr149144.ll
A llvm/test/CodeGen/X86/inline-asm-pr155807.ll
A llvm/test/CodeGen/X86/inline-asm-pr76416.ll
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A llvm/test/CodeGen/X86/pr149371.ll
A llvm/test/CodeGen/X86/pr205272.ll
A llvm/test/CodeGen/X86/recip-sqrt-estimate-illegal-scalar-types.ll
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M llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
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A llvm/test/MC/RISCV/hinval-invalid.s
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A llvm/test/Transforms/AggressiveInstCombine/trunc_illegal_type.ll
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A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-flat-i64-private-volatile.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll
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M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization-preserve-name.ll
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M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-agent.ll
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A llvm/test/Transforms/AtomicExpand/ARM/thread-model-single.ll
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A llvm/test/Transforms/IndVarSimplify/exit-value-guarded-positive-stride.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/global-atomicrmw-fadd.ll
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M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
M llvm/test/Transforms/MergeFunc/flags.ll
M llvm/test/Transforms/NewGVN/vscale.ll
M llvm/test/Transforms/PGOProfile/ppc-prevent-mma-types.ll
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M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-log.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-multi-result.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/expand-fp-math.ll
M llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-inst-count.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-keep-drop.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-loop-extracts.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-satd.ll
M llvm/test/Transforms/SLPVectorizer/X86/bool-mask.ll
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A llvm/test/Transforms/SLPVectorizer/X86/struct-return-splat-gathered-scalars.ll
A llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/lit.local.cfg
A llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/unsupported_alignment.ll
A llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/load_store_vec_load_seeds.ll
M llvm/test/Transforms/SimplifyCFG/switch-select-remap.ll
M llvm/test/Transforms/TypePromotion/ARM/casts.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/codegen-opt-flags.ll
A llvm/test/Verifier/NVPTX/cp-async-bulk-g2s-cta.ll
A llvm/test/Verifier/funclet-unreachable-block.ll
A llvm/test/Verifier/module-flags-exception-model.ll
M llvm/test/tools/llubi/intr_experimental_vector.ll
A llvm/test/tools/llvm-dwarfdump/AMDGPU/DW_AT_LLVM_memory_space.yaml
M llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfbin
M llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfscript
M llvm/test/tools/llvm-profgen/X86/coroutine.test
M llvm/test/tools/llvm-split/unnamed.ll
M llvm/tools/llc/lib/NewPMDriver.cpp
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.h
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
M llvm/unittests/ABI/CMakeLists.txt
A llvm/unittests/ABI/FunctionInfoTest.cpp
M llvm/unittests/ABI/X86TargetInfoTest.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/ADT/STLExtrasTest.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CAS/OnDiskGraphDBTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/Demangle/MicrosoftDemangleTest.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
M llvm/unittests/Support/LEB128Test.cpp
M llvm/unittests/Target/ARM/InstSizes.cpp
M llvm/unittests/Target/RISCV/RISCVBaseInfoTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/unittests/tools/llvm-exegesis/CMakeLists.txt
A llvm/unittests/tools/llvm-exegesis/PerfHelperTest.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcalls.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
A llvm/utils/generate-apfloat-pow5-table.py
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/ValueObject/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/tools/llvm-exegesis/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M llvm/utils/update_test_checks.py
M mlir/include/mlir/Conversion/MathToEmitC/MathToEmitC.h
A mlir/include/mlir/Conversion/OpenACCToLLVM/ACCDataRuntime.h
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVMUtils.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeDescriptors.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeFunctions.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeUtils.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/lib/Conversion/ConvertToEmitC/CMakeLists.txt
M mlir/lib/Conversion/MathToEmitC/CMakeLists.txt
M mlir/lib/Conversion/MathToEmitC/MathToEmitC.cpp
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
A mlir/lib/Conversion/OpenACCToLLVM/ACCDataDirectivePatterns.cpp
A mlir/lib/Conversion/OpenACCToLLVM/ACCDataRuntime.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCExecutableDirectivePatterns.cpp
A mlir/lib/Conversion/OpenACCToLLVM/ACCHostDataPatterns.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVM.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVMUtils.cpp
M mlir/lib/Conversion/OpenACCToLLVM/CMakeLists.txt
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
M mlir/lib/Dialect/Linalg/Transforms/MorphOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Math/IR/MathDialect.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCRuntimeUtils.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
M mlir/python/mlir/dialects/linalg/__init__.py
A mlir/test/Conversion/AMDGPUToROCDL/8-bit-floats-ocp-gfx1170.mlir
A mlir/test/Conversion/AMDGPUToROCDL/lds-barrier-gfx90c.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/permlane.mlir
M mlir/test/Conversion/MathToEmitC/math-to-emitc.mlir
M mlir/test/Conversion/MathToXeVM/math-to-ocl.mlir
M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
A mlir/test/Conversion/OpenACCToLLVM/data-diagnostics.mlir
A mlir/test/Conversion/OpenACCToLLVM/data-runtime.mlir
A mlir/test/Conversion/OpenACCToLLVM/data.mlir
A mlir/test/Conversion/OpenACCToLLVM/host-data.mlir
M mlir/test/Conversion/OpenACCToLLVM/init-shutdown-set.mlir
M mlir/test/Conversion/OpenACCToLLVM/runtime-declaration-mismatch.mlir
M mlir/test/Conversion/OpenACCToLLVM/wait.mlir
M mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
A mlir/test/Conversion/XeVMToLLVM/mxfp_scale_binary_hoist.mlir
M mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-pass-statistics.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/LLVMIR/sroa-statistics.mlir
A mlir/test/Dialect/Linalg/categorize-named-ops.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
A mlir/test/Dialect/Linalg/pad-neutral.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/MemRef/mem2reg-statistics.mlir
A mlir/test/Dialect/SCF/parallel-loop-unroll-invalid.mlir
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
A mlir/test/Dialect/SparseTensor/sparsifier_lower_affine.mlir
M mlir/test/Dialect/Tensor/fold-consecutive-insert-extract-slice.mlir
M mlir/test/Dialect/Tensor/fold-tensor-subset-ops.mlir
M mlir/test/Dialect/Tensor/tracking-listener.mlir
M mlir/test/Dialect/Tosa/ops.mlir
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M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Pass/pipeline-stats-nested.mlir
M mlir/test/Pass/pipeline-stats.mlir
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
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M mlir/test/Target/LLVMIR/nvvm/tma_bulk_copy.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cluster_im2col.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cluster_tile.mlir
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M mlir/test/Target/LLVMIR/omptarget-atomic-update-control-options.mlir
A mlir/test/Target/LLVMIR/omptarget-declare-target-declaration.mlir
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M mlir/test/Target/LLVMIR/openmp-llvm.mlir
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M mlir/test/Target/LLVMIR/openmp-task-privatization.mlir
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M mlir/test/Target/LLVMIR/openmp-taskloop-charbox.mlir
M mlir/test/Target/LLVMIR/openmp-taskloop.mlir
M mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/test/mlir-runner/async-error.mlir
M mlir/test/mlir-runner/async-func.mlir
M mlir/test/mlir-runner/async-group.mlir
M mlir/test/mlir-runner/async-value.mlir
M mlir/test/mlir-runner/async.mlir
M mlir/test/mlir-runner/x86-varargs.mlir
M mlir/test/python/dialects/linalg/ops.py
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCRuntimeUtilsTest.cpp
M offload/ci/hip-tpl.py
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/MemoryManager.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Device.h
A offload/test/offloading/fortran/usm_map_close_derived_type_members.f90
M offload/test/offloading/struct_mapping_with_pointers.cpp
A openmp/docs/CommandLineArgumentReference.md
R openmp/docs/CommandLineArgumentReference.rst
M openmp/docs/README.txt
A openmp/docs/ReleaseNotes.md
R openmp/docs/ReleaseNotes.rst
A openmp/docs/SupportAndFAQ.md
R openmp/docs/SupportAndFAQ.rst
A openmp/docs/design/GPUGenericMode.md
R openmp/docs/design/GPUGenericMode.rst
A openmp/docs/design/GPUSPMDMode.md
R openmp/docs/design/GPUSPMDMode.rst
A openmp/docs/design/Offloading.md
R openmp/docs/design/Offloading.rst
A openmp/docs/design/Overview.md
R openmp/docs/design/Overview.rst
A openmp/docs/design/Runtimes.md
R openmp/docs/design/Runtimes.rst
A openmp/docs/index.md
R openmp/docs/index.rst
A openmp/docs/openacc/OpenMPExtensions.md
R openmp/docs/openacc/OpenMPExtensions.rst
A openmp/docs/openacc/Overview.md
R openmp/docs/openacc/Overview.rst
A openmp/docs/optimizations/OpenMPOpt.md
R openmp/docs/optimizations/OpenMPOpt.rst
A openmp/docs/optimizations/OpenMPUnawareOptimizations.md
R openmp/docs/optimizations/OpenMPUnawareOptimizations.rst
A openmp/docs/optimizations/Overview.md
R openmp/docs/optimizations/Overview.rst
A openmp/docs/remarks/OMP100.md
R openmp/docs/remarks/OMP100.rst
A openmp/docs/remarks/OMP101.md
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A openmp/docs/remarks/OMP131.md
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A openmp/docs/remarks/OMP132.md
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A openmp/docs/remarks/OMP133.md
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A openmp/docs/remarks/OMP140.md
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A openmp/docs/remarks/OMP150.md
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A openmp/docs/remarks/OMP160.md
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A openmp/docs/remarks/OMP170.md
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A openmp/docs/remarks/OMP180.md
R openmp/docs/remarks/OMP180.rst
A openmp/docs/remarks/OMP190.md
R openmp/docs/remarks/OMP190.rst
A openmp/docs/remarks/OptimizationRemarks.md
R openmp/docs/remarks/OptimizationRemarks.rst
M openmp/runtime/test/ompt/callback.h
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCA.h
M orc-rt/lib/bedrock/sps/SimpleRemoteCA.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M polly/test/ScopDetect/simple_loop_with_param.ll
M polly/test/ScopDetect/simple_loop_with_param_2.ll
M polly/test/ScopInfo/inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra_bb_scalar_dep.ll
M polly/test/ScopInfo/tempscop-printing.ll
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/config.bzl
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
M utils/bazel/llvm_configs/config.h.cmake
A utils/bazel/tools/check_bazel_inputs.py
M utils/docs/__main__.py
A utils/docs/llvm_sphinx/ext/absolute_links.py
A utils/docs/llvm_sphinx/ext/absolute_links_test/conf.py
A utils/docs/llvm_sphinx/ext/absolute_links_test/index.rst
A utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md
A utils/docs/llvm_sphinx/ext/absolute_links_test/rest.rst
A utils/docs/llvm_sphinx/ext/absolute_links_test/target.md
M utils/docs/llvm_sphinx/ext/checks.py
Log Message:
-----------
Merge branch 'main' into users/adams381/cir-callconv-argmem-memory-effects
Compare: https://github.com/llvm/llvm-project/compare/f23949a79148...64b49cb91b9c
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