[all-commits] [llvm/llvm-project] acdad1: synthetic-praddle-commit
Scott Linder via All-commits
all-commits at lists.llvm.org
Wed Sep 16 10:43:41 PDT 2026
Branch: refs/heads/users/slinder1/I35182f658b713ffdcccbe8b9e8ac079e6335649d
Home: https://github.com/llvm/llvm-project
Commit: acdad1473f6aa3979396a09e9ff9f6335e43a015
https://github.com/llvm/llvm-project/commit/acdad1473f6aa3979396a09e9ff9f6335e43a015
Author: Scott Linder <Scott.Linder at amd.com>
Date: 2026-09-16 (Wed, 16 Sep 2026)
Changed paths:
M clang/docs/conf.py
M clang/docs/index.md
M clang/include/clang/CodeGen/BackendUtil.h
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ObjectFilePCHContainerWriter.cpp
M clang/lib/Headers/riscv_packed_simd.h
R clang/test/CodeGen/Inputs/riscv-ilp32e-no-datalayout.ll
M clang/test/CodeGen/PR44896.ll
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/asan-unified-lto.ll
R clang/test/CodeGen/riscv-ir-datalayout-preserve.ll
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M lldb/test/API/functionalities/inline-sourcefile/inline.ll
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/MC/RISCV/rvzimop-valid.s
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
Log Message:
-----------
synthetic-praddle-commit
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