[all-commits] [llvm/llvm-project] 49ece8: [AMDGPU] Add DSLatencyMode flag + attr to control ...

Jeffrey Byrnes via All-commits all-commits at lists.llvm.org
Tue Sep 15 14:10:58 PDT 2026


  Branch: refs/heads/users/jebyrnes/DSLatencyModeRebase0
  Home:   https://github.com/llvm/llvm-project
  Commit: 49ece85e7a83e68ad4dd678ca73b44a2fe82e04e
      https://github.com/llvm/llvm-project/commit/49ece85e7a83e68ad4dd678ca73b44a2fe82e04e
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2026-09-15 (Tue, 15 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
    M llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
    M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
    A llvm/test/CodeGen/AMDGPU/ds-latency-mode-attr.mir
    A llvm/test/CodeGen/AMDGPU/ds-latency-mode-branch-cost.mir
    A llvm/test/CodeGen/AMDGPU/ds-latency-mode-default-scheduler.mir
    A llvm/test/CodeGen/AMDGPU/ds-latency-mode-flag.mir

  Log Message:
  -----------
  [AMDGPU] Add DSLatencyMode flag + attr to control LDS latency

Change-Id: Ia5fee7983adffdb837ba2e876a64d805263b60c3


  Commit: 21cdedb2a9029ed1d212e14166f69bd7f0b61968
      https://github.com/llvm/llvm-project/commit/21cdedb2a9029ed1d212e14166f69bd7f0b61968
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2026-09-15 (Tue, 15 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h

  Log Message:
  -----------
  More documentation

Change-Id: I65ff1a1b605796d21a52766dcf04c64bc64aaa4e


Compare: https://github.com/llvm/llvm-project/compare/3f913cfe6ee3...21cdedb2a902

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