[all-commits] [llvm/llvm-project] 1e6a62: Make extract vector for bf16 types legal (#222913)

[tfzee via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1e6a620b20b34ac9e254207a604259e150e92205
      https://github.com/llvm/llvm-project/commit/1e6a620b20b34ac9e254207a604259e150e92205
  Author: tfzee <tim.ziegler at intel.com>
  Date:   2026-09-15 (Tue, 15 Sep 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-chained-bf16.ll

  Log Message:
  -----------
  Make extract vector for bf16 types legal (#222913)

Fixes #222585

Makes EXTRACT_SUBVECTOR legal for bf16 types leading to this new codegen
```asm
# $ ./build/bin/clang test.c -O3 -march=novalake -mprefer-vector-width=512 -ffast-math -S -o -
foo:
        vmovups (%rsi), %zmm0
        vmulph  (%rdi), %zmm0, %zmm0
        vextractf64x4   $1, %zmm0, %ymm1
        vaddph  %zmm1, %zmm0, %zmm0
        vextractf128    $1, %ymm0, %xmm1
        vaddph  %xmm1, %xmm0, %xmm0
        vshufpd $1, %xmm0, %xmm0, %xmm1         # xmm1 = xmm0[1,0]
        vaddph  %xmm1, %xmm0, %xmm0
        vmovshdup       %xmm0, %xmm1            # xmm1 = xmm0[1,1,3,3]
        vaddph  %xmm1, %xmm0, %xmm0
        vpsrld  $16, %xmm0, %xmm1
        vaddsh  %xmm1, %xmm0, %xmm0
        vzeroupper
        retq

bar:
        vmovups (%rsi), %zmm0
        vmulbf16        (%rdi), %zmm0, %zmm0
        vextractf64x4   $1, %zmm0, %ymm1
        vaddbf16        %zmm1, %zmm0, %zmm0
        vextractf32x4   $1, %zmm0, %xmm1
        vaddbf16        %xmm1, %xmm0, %xmm0
        vshufpd $1, %xmm0, %xmm0, %xmm1         # xmm1 = xmm0[1,0]
        vaddbf16        %xmm1, %xmm0, %xmm0
        vmovshdup       %xmm0, %xmm1            # xmm1 = xmm0[1,1,3,3]
        vaddbf16        %xmm1, %xmm0, %xmm0
        vpsrld  $16, %xmm0, %xmm1
        vaddbf16        %xmm1, %xmm0, %xmm0
        vzeroupper
        retq
```



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