[all-commits] [llvm/llvm-project] 8347fb: [AMDGPU] Add gfx1310 coverage to the bf16 transcen...

Joe Nash via All-commits all-commits at lists.llvm.org
Mon Sep 14 10:10:55 PDT 2026


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8347fb3908a17762f8c0b604a5f25a7d10f6acb6
      https://github.com/llvm/llvm-project/commit/8347fb3908a17762f8c0b604a5f25a7d10f6acb6
  Author: Joe Nash <joseph.nash at amd.com>
  Date:   2026-09-14 (Mon, 14 Sep 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.bf16.ll

  Log Message:
  -----------
  [AMDGPU] Add gfx1310 coverage to the bf16 transcendental tests (#223054)

57a9c4f939e5 made codegen emit the VOP3 encoding with op_sel[0] set when
a bf16 inline constant reaches one of the single-source VOP1 bf16
opcodes, because the hardware generates the constant in the high half of
the corresponding fp32 inline constant.

GFX1310 has the same FeatureBF16InlineConstFromUpperFP32 behaviour.
Mirror the enabled gfx1250 SelectionDAG RUN lines with gfx1310 ones so
the workaround is covered there too. Test-only change, no functional
change.

Assisted-by: Claude Code:claude-opus-5[1m]



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