[all-commits] [llvm/llvm-project] f90096: [AMDGPU][MC] Diagnose bf16 inline constants withou...

[Joe Nash via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f90096de56d7864cfda3554403f1ef0b8edcb20a
      https://github.com/llvm/llvm-project/commit/f90096de56d7864cfda3554403f1ef0b8edcb20a
  Author: Joe Nash <joseph.nash at amd.com>
  Date:   2026-09-14 (Mon, 14 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    A llvm/test/MC/AMDGPU/gfx1250_asm_bf16_inline_const_err-fake16.s
    A llvm/test/MC/AMDGPU/gfx1250_asm_bf16_inline_const_err.s
    M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
    M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
    M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
    M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
    A llvm/test/MC/AMDGPU/gfx13_asm_bf16_inline_const_err-fake16.s
    A llvm/test/MC/AMDGPU/gfx13_asm_bf16_inline_const_err.s
    M llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
    M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1-fake16.s
    M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
    M llvm/test/MC/AMDGPU/literals.s

  Log Message:
  -----------
  [AMDGPU][MC] Diagnose bf16 inline constants without op_sel in the ass… (#223035)

…embler

GFX1250 generates a bf16 inline constant in the high half of the
corresponding fp32 inline constant. The VOP1 bf16 opcodes therefore only
read it correctly in the VOP3 encoding with op_sel[0] set:
v_cvt_f32_bf16, v_rcp_bf16, v_sqrt_bf16, v_rsq_bf16, v_log_bf16,
v_exp_bf16, v_sin_bf16, v_cos_bf16 and v_tanh_bf16.

Codegen has applied this workaround since 57a9c4f939e5, but hand-written
assembly and inline asm had no protection at all and silently assembled
to instructions that read the wrong half. Reject those forms in the
assembler.

Only single-source bf16 opcodes are affected. Multi-source and packed
bf16 instructions such as v_fma_mix*_bf16, which also have a scalar bf16
src0, are explicitly excluded.

GFX1310 has the same FeatureBF16InlineConstFromUpperFP32 behaviour, so
the gfx1250 and gfx13 MC tests are updated together.

Assisted-by: Claude Code:claude-opus-5[1m]



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