[all-commits] [llvm/llvm-project] 7c3849: [CIR][AMDGPU] Add support for AMDGCN global/DS loa...
Ziqing Luo via All-commits
all-commits at lists.llvm.org
Sun Sep 13 12:21:21 PDT 2026
Branch: refs/heads/users/ziqingluo/PR-187125348-3
Home: https://github.com/llvm/llvm-project
Commit: 7c3849ae3bc162f383c54e38b1ed32b733a31bd8
https://github.com/llvm/llvm-project/commit/7c3849ae3bc162f383c54e38b1ed32b733a31bd8
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250-load-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950-read-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w32.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w64.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN global/DS load builtins (#220611)
Adds codegen support for AMDGCN global and DS load/read builtins with
transpose variants. These builtins are lowered to their corresponding
`llvm.amdgcn.*` intrinsics.
Commit: fd7eac5f532128a245bcfa67aa251af784395701
https://github.com/llvm/llvm-project/commit/fd7eac5f532128a245bcfa67aa251af784395701
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
Log Message:
-----------
[AMDGPU][lld] Remove "using namespace llvm" from AMDGPU.cpp (#222818)
AMDGPU class in anonymous namespace collides with llvm::AMDGPU, causing
an error with MSVC.
Commit: 95267015df795c02d829b3545610a5f5e95609e8
https://github.com/llvm/llvm-project/commit/95267015df795c02d829b3545610a5f5e95609e8
Author: Jian Li <hellothedreamer at 126.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/get-named-operand-idx.td
Log Message:
-----------
[RISCV][GlobalISel] Add G_CLMULH support (#221686)
Add G_CLMULH to represent the high half of a carry-less multiplication
in generic Machine IR.
Translate llvm.riscv.clmulh to G_CLMULH and mark it legal for native
XLEN scalar types when Zbkc is available. Reuse the existing
SelectionDAG pattern to select the RISC-V CLMULH instruction.
Commit: 821ff7cd6803d719515c2ae9ada665c4bc3c4c35
https://github.com/llvm/llvm-project/commit/821ff7cd6803d719515c2ae9ada665c4bc3c4c35
Author: Rohit Garg <rohgarg at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/confused-dependence-subnest.ll
A llvm/test/Transforms/LoopInterchange/dependency-matrix-padding.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
A llvm/test/Transforms/LoopInterchange/missed-outer-prefix-subnest.ll
A llvm/test/Transforms/LoopInterchange/no-partially-perfect-subnest.ll
M llvm/test/Transforms/LoopInterchange/partially-perfect-loop.ll
A llvm/test/Transforms/LoopInterchange/preserve-sibling-order.ll
Log Message:
-----------
[LoopInterchange] Supported partially-perfect Loop Nests (#199511)
In the current implementation when the outermost loop contains sibling
sub-loops (i.e. multiple independent loop nests at the same depth), the
pass silently skips the entire loop nest without attempting to
interchange any of the valid sub-nests (See Below Example).
Example:
```
for(int i=0; i<n; i++){ // Loop 1
for(int j=0; j<m; j++){ // Loop 2
for(int r=0; r<m; r++){ // Loop 3
// Do something
}
}
for(int k=0; k<p; k++){ // Loop 4
for(int l=0; l<p; l++){ // Loop 5
//Access A[l][k]
}
}
}
```
In the Example , GCC 16 performs loop interchange on (Loop2, Loop3) or
(Loop4, Loop5), provided the interchange is both legal and profitable.
Fixes: https://github.com/llvm/llvm-project/issues/196006
Commit: 5f00f13eba2ededa5da62e0dd80b6d1f0c72ca84
https://github.com/llvm/llvm-project/commit/5f00f13eba2ededa5da62e0dd80b6d1f0c72ca84
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/Support/KnownFPClassTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[KnownFPClass] Refactor direct access to KnownFPClasses [NFC] (#220315)
Part of https://github.com/llvm/llvm-project/issues/217072
Follow up to https://github.com/llvm/llvm-project/pull/218514
Replaces direct uses of the `KnownFPClasses` field with getters/setters.
Commit: 426706131e7300fe67f4dac5ccc744548605f394
https://github.com/llvm/llvm-project/commit/426706131e7300fe67f4dac5ccc744548605f394
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine-analysis-invalidation.ll
Log Message:
-----------
[AMDGPU] Invalidate uniformity info after intrinsic combine (#222357)
The uniform intrinsic combine pass changed IR while preserving
uniformity information. Its result keeps references to cycle
information. Those references could be invalidated and later accessed
by another pass.
Invalidate uniformity information after a change. Before erasing an
instruction, remove it from the analysis state used by the pass. Also
report each erasure as a change so invalidation always runs.
Commit: db70744d03adbc9e76f08a66c003b6b362df888d
https://github.com/llvm/llvm-project/commit/db70744d03adbc9e76f08a66c003b6b362df888d
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvp-mul-parts-acc-fold.ll
Log Message:
-----------
[RISCV][P-ext] Fold an add of a multiply-parts product into the accumulate form (#222748)
An add of a multiply-parts product selects the accumulating instruction, so
that a loop written with `sum += __riscv_mul_h00_i32(a, b)` gets `macc.h00`
rather than a separate multiply and add.
Rewriting the add before type legalization keeps the shapes whose result is
illegal, so the existing accumulate lowering covers all of them.
Commit: 980c9bbdd3ddda88da6b8b63261c8d514c5d4306
https://github.com/llvm/llvm-project/commit/980c9bbdd3ddda88da6b8b63261c8d514c5d4306
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/features-info.ll
Log Message:
-----------
[RISCV] Remove VeyronV1 processor definition (#220623)
Processor no longer exists.
Commit: a929f4af3904d5089a7855b5f82cf019df6afd69
https://github.com/llvm/llvm-project/commit/a929f4af3904d5089a7855b5f82cf019df6afd69
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Utils/OpenMP.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/default-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/implicit-default-mapper-allocatable-field.f90
M flang/test/Lower/OpenMP/implicit-mapper-no-pointer-map.f90
R flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
R flang/test/Transforms/omp-map-info-finalization-usm.fir
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-host-ref-semantics.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-overlapping-record-member-map.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
A offload/test/offloading/fortran/implicit-map-allocatable-field.f90
Log Message:
-----------
[Flang][OpenMP] Remove target implicit allocatable member mapping from MapInfoFinalization and extend lowering to support it (#219434)
This PR aims to remove the partially implemented implicit allocatable
member mapping code from MapInfoFinalization, and move it to the
lowering.
The MapInfoFinalization code should no longer be required as the
DeclareMapper infrastructure in the frontend is capable of handling
these cases now and already does so for the majority of them, so we are
better consolidating the implementation to one location and extending it
to support more cases.
This PR removes the old code from MapInfoFinalization, and enables the
default declare mapper generation that handles most other implicit
mapping cases for derived types in the initial lowering to handle the
previously supported cases and more.
The implicit default declare mapper generation has been modified to only
map the necessary bits of a derived type, which are record types (to
hold any nested mappers and to make sure we map all non-allocatable
bits, including descriptors) and the data for any allocatable bits
(specifically just the ref_ptee and then an attach emission).
Commit: be09c15fa047178ff4818192ea97ba3a3d8254a0
https://github.com/llvm/llvm-project/commit/be09c15fa047178ff4818192ea97ba3a3d8254a0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Compiler.h
Log Message:
-----------
[orc-rt] Add a maybe-unused attribute macro. (#222834)
This will be used in upcoming commits to suppress unused function
warnings.
Commit: 2a0177189f4be62eb51ddca3fd4b8836c538dc12
https://github.com/llvm/llvm-project/commit/2a0177189f4be62eb51ddca3fd4b8836c538dc12
Author: hev <wangrui at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for memory barrier optimization (#218596)
Commit: c9a1fc8d1deee527a3ff43592ed4e0e5b81d7fca
https://github.com/llvm/llvm-project/commit/c9a1fc8d1deee527a3ff43592ed4e0e5b81d7fca
Author: hev <wangrui at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
Log Message:
-----------
[LoongArch] Add memory barrier optimization pass (#218597)
Add a machine-level pass to remove redundant DBARs and merge them with
atomic memory operations. The pass uses machine dominator and
post-dominator trees to ensure the transformation is safe across basic
blocks.
Commit: 13d63aa55eb7d8877fb3243e7f050b590e569d96
https://github.com/llvm/llvm-project/commit/13d63aa55eb7d8877fb3243e7f050b590e569d96
Author: Jeff Trull <edaskel at att.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Make the value of a true bool enum 1, not -1 (#221497)
When converted to int a bool value is either `0` or `1`, but the `enum_value`
of a bool enum was reported as either `0` or `-1` in the Python bindings.
Make bool enums take the unsigned value code path so that `0` or `+1` is
returned instead.
Resolves #221326
Commit: 816b4c13bd851e6df4416c0d41e6735760ca72df
https://github.com/llvm/llvm-project/commit/816b4c13bd851e6df4416c0d41e6735760ca72df
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable block16 conversions on gfx1250-strict (#222597)
Commit: 06a26f2ff3a2c5464a5dca8cf42314bae5e635cc
https://github.com/llvm/llvm-project/commit/06a26f2ff3a2c5464a5dca8cf42314bae5e635cc
Author: John Hui <j-hui at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/swift-attr-redeclaration.cpp
M clang/test/APINotes/swift-import-as.cpp
Log Message:
-----------
[clang][APINotes] Apply API notes 'swift_attr's idempotently (#222526)
Commit: 79775da1838e64b0a6c294ff25483484841910a1
https://github.com/llvm/llvm-project/commit/79775da1838e64b0a6c294ff25483484841910a1
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Add vputils::reconstructSSA (#212209)
Adds a simple implementation of the algorithm described in "Simple and
Efficient SSA Construction" by Braun et al.
https://www.researchgate.net/publication/236997796_Simple_and_Efficient_Construction_of_Static_Single_Assignment_Form
This can be used to reconstruct SSA form whenever the control flow graph
is changed, which #201784 plans to use to model predicated early exiting
conditions.
Added three unit tests for now which should exercise all the code paths,
including what happens when there's a cycle.
Commit: faa60cf51f1eeef568a7a111b3174375122617aa
https://github.com/llvm/llvm-project/commit/faa60cf51f1eeef568a7a111b3174375122617aa
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/Session.cpp
M orc-rt/lib/support/Error.cpp
M orc-rt/lib/support/Logging.cpp
M orc-rt/lib/support/Logging_oslog.cpp
M orc-rt/lib/support/Logging_printf.cpp
Log Message:
-----------
[orc-rt] Wrap C API implementation in `extern "C" {..}` blocks (#222846)
Adopt a consistent style for C API implementation: A banner comment and
an `extern "C" { ... }` block around the definitions.
Commit: e94a0b2a4971c381cc6f72309d1dea5350780099
https://github.com/llvm/llvm-project/commit/e94a0b2a4971c381cc6f72309d1dea5350780099
Author: shivaramaarao <58245296+shivaramaarao at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
[flang] Add driver support for x86 -m[option] target feature flags (#220159)
Added FlangOption visibility to m_x86_Features_Group so flags such as
-mavx, -mavx2, and -mavx512f are accepted by flang and forwarded as
-target-feature to -fc1 via the shared Clang driver logic.
Also extended target-cpu-features.f90 with grouped driver tests that
cover m_x86_Features_Group options, including representative -mno-*, APX
cases
Assisted by : Cursor (testcase generation)
Commit: 75ca063b3b303e499a798ef84d04d32fb96d44c8
https://github.com/llvm/llvm-project/commit/75ca063b3b303e499a798ef84d04d32fb96d44c8
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
Log Message:
-----------
[AMDGPU][GIsel][NPM] Port AMDGPUPostLegalizerCombiner to NPM (#216274)
Porting `AMDGPUPostLegalizerCombiner` to work with the New PassManager
to support GISel.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 4735d351182f874d61690f6fc2d2e3b154914ad5
https://github.com/llvm/llvm-project/commit/4735d351182f874d61690f6fc2d2e3b154914ad5
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaCUDA.cpp
M clang/test/SemaCUDA/global-initializers.cu
Log Message:
-----------
[CUDA/HIP] Fix errors for device function used in host global initializers (#222338)
The existing checker was simply looking for a call or `CXXConstructExpr`
which would miss a call to device function in case an implicit cast was
in place or if a call was a part of an expression. Use a visitor to
improve the situation.
Commit: c1b661fde124399f0484c4b39501b37613cc4757
https://github.com/llvm/llvm-project/commit/c1b661fde124399f0484c4b39501b37613cc4757
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
Log Message:
-----------
[clang][SVE][nfc] Remove spurious compare instruction (#222652)
When lowering `sve_svdup_n_bN` SVE builtins, the compare Op is not
required. In fact, that compare Op is removed by subsequent
optimisations, as evident in the tests.
Instead of relying on the middle-end to clean it up, improve the
front-end code-gen by not generating that spurious Op at all.
Commit: 68f9d8d45cad616e223ffe460404edd86dd972ca
https://github.com/llvm/llvm-project/commit/68f9d8d45cad616e223ffe460404edd86dd972ca
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Token.cpp
M mlir/lib/AsmParser/Token.h
M mlir/test/Dialect/Builtin/Bytecode/attrs.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed_0.mlirbc
M mlir/test/IR/custom-float-attr-roundtrip.mlir
M mlir/test/IR/parser.mlir
Log Message:
-----------
[MLIR][Parser] Fix precision loss when parsing f80 and f128 literals (#220267)
While analyzing this CIR issue
[216422](https://github.com/llvm/llvm-project/issues/216422), I traced
the issue to the MLIR asm parser.
For the following case:
```
%0 = arith.constant 1.0E+309 : f80
```
using `mlir-opt repro.mlir`
we get (infinity):
```
module {
%cst = arith.constant 0x7FFF8000000000000000 : f80
}
```
instead of
```
module {
%cst = arith.constant 9.99999999999999999986E+308 : f80
}
```
Currently the parser casts floats to a double before converting to the
requested semantics, as noted in the
[comments](https://github.com/llvm/llvm-project/blob/bb3b509138f4a34cb3d5c659955ccc16745ae82e/mlir/lib/AsmParser/AsmParserImpl.h#L286).
Not entirely sure why this was the default, anyway this patch instead
parses the float with the given semantics directly, so we don't lose
precision.
I used Claude to generate tests and reproducers for this patch. I've
also updated a few existing lit tests to show the improved precision
this patch introduces.
**Note:** This fixes the CIR issue I mentioned above.
Commit: 7ba3ce428af7f6e7f1e642dba128c2afc13dba90
https://github.com/llvm/llvm-project/commit/7ba3ce428af7f6e7f1e642dba128c2afc13dba90
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/Bufferization.h
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationDialect.h
M mlir/lib/CAPI/Dialect/Bufferization.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
Log Message:
-----------
[mlir][Bufferization] Split the dialect declaration (NFC) (#222859)
Introduce a self-contained dialect declaration and use it in four
consumers that do not need the generated operation umbrella.
Across three controlled serial rebuilds of the affected TUs, median
instructions fell from 97.470B to 94.887B (-2.650%) and median wall time
fell from 15.20s to 14.70s (-3.289%). Three -j16 runs confirmed a 2.623%
reduction in instructions, with wall time improving 0.722% on the
parallel critical path.
Assisted-by: Codex
Commit: 7544b08a04ce084bf34bd3f4f1e8fb6f4d3aa2e4
https://github.com/llvm/llvm-project/commit/7544b08a04ce084bf34bd3f4f1e8fb6f4d3aa2e4
Author: Teja Alaghari <teja.alaghari at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
A llvm/test/DebugInfo/MIR/InstrRef/expr-operand-count-mismatch.mir
Log Message:
-----------
[LiveDebugValues] Do not join debug values whose operand counts disagree (#221929)
Currently, `DbgValueProperties::isJoinable()` decides whether two values
could be joined by comparing their `DIExpressions` only. That was safe
when location-operand count was taken from the expression. In
instruction-referencing `LiveDebugValues`, `NumLocOps` is taken from the
`MachineInstr` (`getNumDebugOperands()`), so two values can share an
expression and still differ in operand count.
Joining pairs location operands by index. When the counts disagreed,
`pickVPHILoc` indexed past the shorter list and hit `assert(Index <
OpCount)` in `DbgValue::getDbgOpID`.
This change makes `isJoinable()` return `false` unless `NumLocOps`
**also agrees**.
Commit: fa1d3e300559d69678a66b2ddb45eb127a1b8407
https://github.com/llvm/llvm-project/commit/fa1d3e300559d69678a66b2ddb45eb127a1b8407
Author: nishant-sachdeva-amd <nishant.sachdeva at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
Log Message:
-----------
[X86][NFC] Share isDispOrCDisp8 between the encoder and CompressEVEX (#222591)
The disp8 / compressed-disp8*N size rule was written twice: as a static
helper in X86MCCodeEmitter.cpp and re-inlined in the CompressEVEX size
veto (hasShorterEVEXViaCDisp8), kept in sync only by a comment. Hoist it
into X86II::isDispOrCDisp8 in X86BaseInfo.h (ImmOffset now optional) and
call it from both, so the size model cannot drift from what the encoder
emits. No functional change.
Addresses https://github.com/llvm/llvm-project/issues/206963
Changes made here use AI model inputs
---------
Co-authored-by: Simon Pilgrim <git at redking.me.uk>
Commit: 02dc8a35a9d074613f0a262dbec00afeb9963345
https://github.com/llvm/llvm-project/commit/02dc8a35a9d074613f0a262dbec00afeb9963345
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
A mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialectDecl.h
M mlir/lib/RegisterAllDialects.cpp
Log Message:
-----------
[mlir][AMDGPU] Split the dialect declaration (NFC) (#222861)
Introduce a self-contained dialect declaration so RegisterAllDialects
does not need the generated AMDGPU operation umbrella.
Across five controlled rebuilds of the affected TU, median instructions
fell from 71.757B to 70.331B (-1.987%) and median wall time fell from
11.01s to 10.77s (-2.180%).
Assisted-by: Codex
Commit: f1bf3f217c8c006112a876cee61fe04f92f221ca
https://github.com/llvm/llvm-project/commit/f1bf3f217c8c006112a876cee61fe04f92f221ca
Author: Alexey Moksyakov <moksyakov.alexey at huawei.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/materialize-constant.s
Log Message:
-----------
[bolt] Simplify rodata/literal load for X86_64 & AArch64 (#179474)
This patch fixed the issue related to load literal for AArch64, where
constant island move to the end of a function (emitCI), available
address range for ldr instruction is limited +/- 1MB, and can be out of
range. For AArch64 the available data sizes are 4, 8 bytes. For X86_64
this patch materializes the constants with sizes 2, 4 and 8 bytes.
Note: SimplifyRODataLoads is turn off for non-relocation binary
Co-authored-by: yavtuk <yavtuk at ya.ru>
Commit: 4f56a89ad74f82403500d6392e2d3a90ba912f37
https://github.com/llvm/llvm-project/commit/4f56a89ad74f82403500d6392e2d3a90ba912f37
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
A mlir/include/mlir/Dialect/Func/IR/FuncDialect.h
M mlir/include/mlir/Dialect/Func/IR/FuncOps.h
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Target/Cpp/TranslateRegistration.cpp
M mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
M mlir/lib/Target/SMTLIB/ExportSMTLIB.cpp
M mlir/test/lib/Conversion/ConvertToSPIRV/TestSPIRVFuncSignatureConversion.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/unittests/Dialect/Linalg/InferConvolutionDimsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
M mlir/unittests/Dialect/Transform/BuildOnlyExtensionTest.cpp
Log Message:
-----------
[mlir][Func] Split the dialect declaration (NFC) (#222860)
Introduce a self-contained dialect declaration and use it in ten
configured consumers that do not need the generated operation umbrella.
Across three controlled -j16 rebuilds of the affected TUs, median
instructions fell from 224.883B to 220.787B (-1.821%) and median wall
time fell from 8.44s to 8.31s (-1.540%).
Assisted-by: Codex
Commit: 3ec1c433b3a4bacbb055f2a2ce2d5ef3ca4172ae
https://github.com/llvm/llvm-project/commit/3ec1c433b3a4bacbb055f2a2ce2d5ef3ca4172ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
A llvm/test/Transforms/ConstraintElimination/strengthen-flags-at-uses.ll
Log Message:
-----------
[ConstraintElim] Strengthen flags at the closest dominator of all uses. (#220918)
Flags are currently only strengthened using the facts that hold on entry
to the block defining the instruction. This overly pessimistic. It is
sufficient to check at the closest instruction dominating all uses.
Extend FactOrCheck to carry this point as context instruction (in union
with the mutually exclusive DoesHold to avoid size growth) and retrieve
the common dominating instruction when queuing instructions for flag
strengthening.
This strengthens flag inference in a number of real-world cases, as well
as enables additional folds due stronger flags:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1171
Compile-time impact is in the noise
https://llvm-compile-time-tracker.com/compare.php?from=11bc6ce46e227718c3b54aa6889d7458656e8ab4&to=6f67fdcdb62a5fe56060cb266448db8b763e13d7&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/220918
Commit: f284ae2ed3f9b74b213633b0e5cab52b490728f2
https://github.com/llvm/llvm-project/commit/f284ae2ed3f9b74b213633b0e5cab52b490728f2
Author: Yongqiang Tian <yqtian668 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
A llvm/test/CodeGen/RISCV/shrinkwrap-save-restore-debug.ll
Log Message:
-----------
[RISCV] Ignore debug instructions in epilogue block checks (#219401)
A debug instruction in a return-only block can make
`RISCVFrameLowering::canUseAsEpilogue` reject an otherwise valid
shrink-wrap
point. This moves the save and restore libcalls onto the fast path.
Ignore debug instructions in the successor cardinality check while
continuing
to count bundle interiors, pseudo probes, and other non-debug
instructions.
The first commit records the existing behavior. The second applies the
fix and
updates the test expectations to require localized save and restore
calls.
Fixes #219378
Testing:
- Verified that the regression test fails on an affected compiler.
- Verified the targeted test after the fix.
- RISC-V CodeGen: 2654/2654 passed.
Assisted-by: OpenAI Codex 5.6 Sol, co-reviewed by Claude and Yongqiang
Tian.
Commit: e8a0d25ac75b3123f98e7dce16f6d096f2179b97
https://github.com/llvm/llvm-project/commit/e8a0d25ac75b3123f98e7dce16f6d096f2179b97
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
Log Message:
-----------
[CostModel][X86] Cleanup unary shuffle cost tests to use poison instead of undef in second operand (#222718)
Commit: c382571b2b3cede5de97cbbd314597db21f89435
https://github.com/llvm/llvm-project/commit/c382571b2b3cede5de97cbbd314597db21f89435
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/cmake/modules/CrossCompile.cmake
Log Message:
-----------
[CMake] Forward CLANG_ENABLE_CIR to native tool builds (#222771)
Commit: 5e64eb8ffffa3e845ca01d81c1e45ef68d07d306
https://github.com/llvm/llvm-project/commit/5e64eb8ffffa3e845ca01d81c1e45ef68d07d306
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
Log Message:
-----------
[Clang] Improve error recovery for indexed template names (#222328)
There were a few issues here:
- Names that are not templates were not diagnosed and led to a crash (in
part because clang think they can be template names that will be later
resolved by ADL)
- Names that refer to a variable template decl, etc also led to a crash.
Fixes #220502
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: e4b9c07d30119fa37202233973629e3143c27685
https://github.com/llvm/llvm-project/commit/e4b9c07d30119fa37202233973629e3143c27685
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
Log Message:
-----------
[GlobalISel] Fast path exact LLT equality (NFC) (#222550)
Improves CTMark geomean -0.05% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=87d9c3c24ff5941ac08799850a6549b561c98a81&to=a5391cd5be815299b2cddcabf62a86369b247f72&stat=instructions:u
Assisted-by: codex
Commit: 19dad062e98520c641617fda2cec07592764d5dc
https://github.com/llvm/llvm-project/commit/19dad062e98520c641617fda2cec07592764d5dc
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/StopPointSiteList.h
M lldb/test/API/functionalities/breakpoint/write_over_software_breakpoint/TestWriteOverSoftwareBreakpoint.py
Log Message:
-----------
[lldb] Fix handling of lldb managed software breakpoints (#222009)
Fixes #217910.
When the debug server can manage its own breakpoints this is called an
"external" breakpoint. When it cannot, lldb must manage the breakpoint
itself from the client side.
Part of doing that is FindInRange which is used to patch reads and
writes over software breakpoint sites. It had an issue where it would
not account for a breakpoint that started before the range, but extended
into the range. For example:
```
Memory content: ABCDEFGHIJKL
Read range: ----[--]----
Breakpoint location: -BKPT-------
Overlap with read: ---- at -------
Expected read result: ----EFGH----
Would actually get: ----TFGH----
```
This change fixes that mistake:
* Exit early if there are no sites to check.
* Exit early if the lower_bound result is beyond the upper bound of the
range - only if the result is not the end of the list. In the result was
end(), there may be one site before which we must also check.
The existing "Over end of breakpoint" test covers the bug I'm fixing.
The tests have been refactored to run normally and via. a proxy that
refuses breakpoint packets.
We could instead use two different proxies where one supports the
packets and one doesn't. However, that's more overhead per test and you
can't run proxy tests remotely.
Due to https://github.com/llvm/llvm-project/issues/222284, the proxy
tests cannot be run everywhere, but it can run on AArch64 which is
common.
Commit: 2684037ea97ebb068941b699ef9639334958c509
https://github.com/llvm/llvm-project/commit/2684037ea97ebb068941b699ef9639334958c509
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
Log Message:
-----------
[AMDGPU] Update buildbot cmake cache files (#222807)
This fixes one issue where the compiler-rt entry was not propagated to
the build.
We also want to select libgcc as the default unwindlib explicitly (as
this is what we do downstream).
Commit: 9f634aa12509462631e9dc799b987c2aac617a2c
https://github.com/llvm/llvm-project/commit/9f634aa12509462631e9dc799b987c2aac617a2c
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 7ba3ce4 (#222865)
This fixes 7ba3ce428af7f6e7f1e642dba128c2afc13dba90 (#222859).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=7ba3ce428af7f6e7f1e642dba128c2afc13dba90
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4f32e473933d4a039d13fe2c0a4ccdde73c8b929
https://github.com/llvm/llvm-project/commit/4f32e473933d4a039d13fe2c0a4ccdde73c8b929
Author: yamash-fj <yamashita.ta-16 at fujitsu.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
Log Message:
-----------
[AArch64] Parameterize repeated FP divisor combine threshold by subtarget (#216930)
Changes:
This patch makes the threshold for combining repeated FP divisors
configurable per AArch64 subtarget, instead of using a single fixed
value 3 for all CPUs. Additionaly, set this value 2 for A64FX based on
observed profitability for this transform on A64FX.
Motivation:
Today, AArch64 uses a fixed threshold of 3 for reciprocal transform.
This means the transform runs when there are 3 FDIVs with the same
divisor (not 2). That is conservative for some subtargets, and it can
miss profitable opportunities on CPUs such as A64FX, where a lower
threshold appears to produce better code generation.
```
a / D; b / D; ...
=>
recip = 1.0 / D; a * recip; b * recip; ...
```
Note:
It does not change the semantics of the reciprocal transform itself.
Commit: 478b91b6f8a2b08dce9673555e3f6da8e6e69051
https://github.com/llvm/llvm-project/commit/478b91b6f8a2b08dce9673555e3f6da8e6e69051
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][ComplexToStandard] Fix Conj and Neg ops fmf propagation (#222622)
Commit: 7bb74b19b7f0bbe491898de2289e72d09e4a6b26
https://github.com/llvm/llvm-project/commit/7bb74b19b7f0bbe491898de2289e72d09e4a6b26
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
Log Message:
-----------
[mlir][ComplexToLLVM] Fix abs op fmf propagation (#222621)
Commit: 12f00f9cd311a910a84f3e8a05b5b0c96e2bdf78
https://github.com/llvm/llvm-project/commit/12f00f9cd311a910a84f3e8a05b5b0c96e2bdf78
Author: Nikhil Ludder <72620320+badnikhil at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/pre-coerced-value-not-numbered.ll
Log Message:
-----------
[GVN] Skip instructions without value numbers in `processNonLocalLoad` (#219851)
GVN may insert coercion instructions (MaterializeAdjustedValue) without
assigning them value numbers. If one becomes a GEP index of a PRE'd load
in the same processBlock sweep, the GEP-index scalar PRE in
processNonLocalLoad reaches it before the next re-numbering iteration
and the verifying VN.lookup() may assert. Avoid performing PRE on such
instructions.
Fixes: #216265.
Commit: 6700445cfe301eb079e13ed1079fb86d1f7b1402
https://github.com/llvm/llvm-project/commit/6700445cfe301eb079e13ed1079fb86d1f7b1402
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
A llvm/test/CodeGen/RISCV/rvv/vsetvli-dead-vl-vtype-liveness.mir
Log Message:
-----------
RISCV: Maintain VL/VTYPE liveness when clearing dead flags in InsertVSETVLI (#222862)
Drop the stale VL/VTYPE ranges when a dead flag is cleared.
RISCVInsertVSETVLI marks the VL and VTYPE defs of an explicit VSETVLI as
live by clearing their dead flags, but did not update LiveIntervals. When a def
was previously a dead def, its live range is a zero-length dead-def segment
ending at the def slot; clearing the flag extends the def past that slot
without extending the range leaving a segment that references no instruction.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 18b9d7282c067d83edda8006c25542d9490e3c6e
https://github.com/llvm/llvm-project/commit/18b9d7282c067d83edda8006c25542d9490e3c6e
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
M llvm/test/Transforms/Attributor/nofpclass-log.ll
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Add sNaN deductions for log/log2/log10 (#219703)
`log(x)` can only produce `sNaN` if `x` is `sNaN`.
This also affects tests for `llvm.amdgcn.log.f16` and
`llvm.amdgcn.log.f32`.
Commit: 5f604ff568a9493f1eee44441ef475a2aaad329c
https://github.com/llvm/llvm-project/commit/5f604ff568a9493f1eee44441ef475a2aaad329c
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[BUILD] Fix for 02dc8a35 (#222876)
[BUILD] Fix for 02dc8a35
Commit: 3d6ae4bdf4c6d45d5e2f2c55c06f84568fde0fe0
https://github.com/llvm/llvm-project/commit/3d6ae4bdf4c6d45d5e2f2c55c06f84568fde0fe0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/IR/Builders.cpp
M mlir/test/Transforms/test-legalizer.mlir
Log Message:
-----------
[MLIR] Fix infinite loop in tryFold in Graph Regions (#189232)
In a graph region (e.g. the module body), an op may use its own result
as an operand, creating a circular SSA dependency. When such an op was
passed to OpBuilder::tryFold, the do-while loop could spin forever:
1. foldCommutative moved the constant operand to the RHS (in-place fold,
foldResults still empty).
2. The next fold call returned the op's own result, signalling an
in-place fold, but foldSingleResultHook re-ran trait folds, found
nothing to swap, and returned success with empty foldResults.
3. Step 2 repeated without end.
Fix: cap the number of in-place fold iterations at 64. Legitimate chains
are very short in practice (foldCommutative swaps once, then the op folds to
a value or constant), so the cap is never reached for correct IR. For the
circular-SSA case the loop now terminates and tryFold returns failure,
letting dialect conversion fall through to a conversion pattern instead of
looping.
An alternative could be for each iteration of the loop, snapshot the
operand list and attributes/properties. If a fold returns empty results
but the operands are unchanged, we have reached a fixpoint. Stop the
loop and return failure.
However this is more expensive for the common case, while fixing an edge
case.
Fixes #159675
Assisted-by: Claude Code
Commit: 63cc989e0f7c4d7965fea43ac72c1bc713fbc967
https://github.com/llvm/llvm-project/commit/63cc989e0f7c4d7965fea43ac72c1bc713fbc967
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
Log Message:
-----------
[ORC] Move ExecutorSharedMemoryMapperService names to sps_ci (#222835)
Relocate the service's interface names and SPS signatures from rt:: in
OrcRTBridge into a new Shared/SPSCI/SharedMemoryMapperSPSCI.h, matching
the existing SPSCI descriptor convention. Name-neutral: the symbol
strings are unchanged.
Commit: 58c46bae21181fb4240cf964461bea738d96d50e
https://github.com/llvm/llvm-project/commit/58c46bae21181fb4240cf964461bea738d96d50e
Author: David Green <david.green at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/bcmp.ll
M llvm/test/CodeGen/AArch64/i128-imm-compare-ccmp.ll
Log Message:
-----------
[AArch64] Guard against large types in performOrXorChainCombine (#222146)
Larger type sizes will be legalized to i64, and will hit a crash in
checking constants.
Fixes #222089
Commit: 1821d5d4fcabdd878e8c0278b59105802fe47d51
https://github.com/llvm/llvm-project/commit/1821d5d4fcabdd878e8c0278b59105802fe47d51
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
R clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [3/5] (#221533)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the third part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: e885b0d31b1e9d5dd83620d09ee76a92c8c38c39
https://github.com/llvm/llvm-project/commit/e885b0d31b1e9d5dd83620d09ee76a92c8c38c39
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
M clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
M clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [3/5] (#221534)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the third part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
Commit: bc9886e720f178e0d35db1c2e11f17739b5106ce
https://github.com/llvm/llvm-project/commit/bc9886e720f178e0d35db1c2e11f17739b5106ce
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
Log Message:
-----------
[flang][OpenACC] Don't emit unstructured-loop TODO for wrappable loops (#222260)
`genOpenACCLoopFromDoConstruct` raised an NYI for any unstructured DO
inside `acc kernels`. That check ran before the wrapping in
`genFIR(DoConstruct)`, so a loop whose CFG is self-contained aborted
lowering even though the fall-back path would have wrapped it in an
`scf.execute_region`.
Skip the TODO when `isWrappableConstruct()` accepts the loop. Such a
loop is not attached to a directive; it is only nested inside the
kernels region.
Correspondingly, a DO loop sitting directly in an `acc kernels` body is
no longer wrappable, since it is the loop the directive parallelizes and
hiding its CFG would leave the kernels region with nothing to partition.
Commit: 6e25eaedeee9ee4845565514dce823988ac7f23c
https://github.com/llvm/llvm-project/commit/6e25eaedeee9ee4845565514dce823988ac7f23c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getschedpolicy.cpp
A libc/src/pthread/pthread_attr_getschedpolicy.h
M libc/src/pthread/pthread_attr_init.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etschedpolicy (#222682)
This patch implements pthread_attr_setschedpolicy and
pthread_attr_getschedpolicy.
This commit only operates on the pthread_attr_t object. It does not
attempt to install the scheduling policy when creating a new thread. I'm
leaving that for a separate patch as it requires a moderately
complicated startup dance to ensure that the scheduling policy takes
effect before the startup code runs.
The validation of inputs in pthread_attr_setschedpolicy is an
interesting question. Glibc accepts only policies explicitly declared in
POSIX, while other implementations let the user pass anything, and rely
on the kernel to validate the arguments. Interestingly, even glibc does
not validate the arguments in pthread_setschedparam.
For llvm-libc, I chose not to validate the arguments either. This is
*mostly* consistent with POSIX, which says (emphasis mine):
> The supported values of policy shall *include* SCHED_FIFO, SCHED_RR,
and
> SCHED_OTHER, which are defined in the <sched.h> header.
I say mostly, because the spec does say we should return ENOTSUP if "an
attempt was made to set the attribute to an unsupported value", but I'm
not sure that's worthwhile, as it means we would need to update our list
of supported policies whenever the kernel adds a new one (and anyway, we
cannot be sure that our understanding of supported policies matches what
the running kernel actually supports).
Assisted-by: Gemini
Commit: eb6fe5a664bfa6813223d4a71b088d53900404d4
https://github.com/llvm/llvm-project/commit/eb6fe5a664bfa6813223d4a71b088d53900404d4
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/neon-addsub-long-reassoc.ll
Log Message:
-----------
[AArch64] Reassociate adds/subs of extends for [SU](ADD|SUB)L. (#222561)
We do this for expressions that can't use widening add/sub.
Commit: dc6825047c42442c5e18dd09d260bee983bc5712
https://github.com/llvm/llvm-project/commit/dc6825047c42442c5e18dd09d260bee983bc5712
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
Log Message:
-----------
[SLP] Limit second pass to register VF in vectorizeNonVectorizableInsts. (#222755)
The second tryToVectorizeList pass in vectorizeNonVectorizableInsts
would try all roots for each possible VF between 1 and the number of
entries in the list.
This can cause super-linear compile-time, for example when there are
basic blocks with calls taking a large number of loads as arguments.
For example, running SLPVectorizer on a block with 1024 loads passed to
calls (https://llvm.godbolt.org/z/8M53G6WzW) will take a large amount of
time (timeout on godbolt, locally on Apple M1 it takes ~30s). With the
fix, it only takes 0.01s.
On large IR corpus, I did not see any difference in vectorization
decisions on AArch64.
PR: https://github.com/llvm/llvm-project/pull/222755
Commit: 5d6c7162093204a3cf6914acafa73dea59134cc2
https://github.com/llvm/llvm-project/commit/5d6c7162093204a3cf6914acafa73dea59134cc2
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
A llvm/test/Transforms/LoopVectorize/RISCV/interleaved-load-masked-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/nested-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_contiguous.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
Log Message:
-----------
[VPlan] Narrow VPWidenGEPRecipe if only its first lane is used. (#221171)
Extend existing narrowing in legalizeAndOptimizeInductions, already
applied to VPReplicateRecipe and VPWidenRecipe, to VPWidenGEPRecipe as
well. This improves cases where an interleaved access's insert position
shares an address calculation with a strided access (see
RISCV/interleaved-load-masked-store.ll), which previously caused the
legacy cost model to classify the address as non-uniform.
Commit: 884f70e221f529439544ddb2bddba4c4eed14742
https://github.com/llvm/llvm-project/commit/884f70e221f529439544ddb2bddba4c4eed14742
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Error.h
M orc-rt/include/orc-rt-c/support/WrapperFunction.h
Log Message:
-----------
[orc-rt] Fix C++ comments in C header. NFC. (#222887)
Commit: 764a4f4176bdebb5b8aa1ad9a4c4c8b46de85b2d
https://github.com/llvm/llvm-project/commit/764a4f4176bdebb5b8aa1ad9a4c4c8b46de85b2d
Author: AJMullen <andreas.mullen at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/lib/Passes/MCF.cpp
A bolt/test/AArch64/edge-weight-estimation-fixes.s
Log Message:
-----------
[BOLT] Fixed BOLT edge weight estimation in non-LBR mode. (#222538)
Before: When estimating edge weights within `computeEdgeWeights` in
`MCF.cpp`, if the `TotalChildrenCount` is 0, the default edge weight is
`1 / (GraphT::child_end(BB)_ - GraphT::child_begin(BB))` resulting in
integer division and incorrect distribution of estimated edge weights.
After: Correctly estimate edge weights with zero and non-zero values of
`TotalChildrenCount` by enforcing floating point division.
---------
Co-authored-by: Thrrreeee <shijinrui at bytedance.com>
Commit: c8655a8e7c00df0e5433c2434aad56320c0d1ee1
https://github.com/llvm/llvm-project/commit/c8655a8e7c00df0e5433c2434aad56320c0d1ee1
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/unittests/Utility/RegisterValueTest.cpp
Log Message:
-----------
[lldb][test] Fix RegisterValueTest.cpp compile with GCC (#222889)
Avoid some most vexing parse problems.
Fixes #220707 / 19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4.
Commit: c45192cefe1cd3bf167d975f0f9949ba323845de
https://github.com/llvm/llvm-project/commit/c45192cefe1cd3bf167d975f0f9949ba323845de
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/include/__config
M libcxx/include/__locale_dir/ctype_base.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/aix.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/llvm_libc.h
M libcxx/include/__locale_dir/support/newlib.h
M libcxx/include/__locale_dir/support/openbsd.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Make _LIBCPP_PROVIDES_DEFAULT_RUNE_TABLE part of the locale base API (#219196)
Whether libc++ has to provide a rune table is really part of the
localization of a platform. Move it there instead of `<__config>`.
Commit: f276d8f00313f593ab9d8f3a1d242b6754f0a436
https://github.com/llvm/llvm-project/commit/f276d8f00313f593ab9d8f3a1d242b6754f0a436
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/openmp-task-depend-loc.mlir
Log Message:
-----------
[OMPIRBuilder] Don't leak a foreign debug loc into the taskwait call (#222586)
A kmp_depend_info array is hoisted to the entry block of the enclosing
function. Pointing the builder into that block also adopts the location
of what is already there, which belongs to whichever construct put it
there rather than to the construct being emitted. restoreIP does not put
the location back either, since it adopts the location of the
instruction it lands on, so in createTaskwait the leak outlives the
excursion and reaches the __kmpc_omp_taskwait_deps_51 call.
Use InsertPointGuard, which restores the location along with the
insertion point.
Fixes https://github.com/llvm/llvm-project/issues/222044
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 3aeaa598286a3271cf02107b751d8e1b0a629d6f
https://github.com/llvm/llvm-project/commit/3aeaa598286a3271cf02107b751d8e1b0a629d6f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/include/__atomic/to_gcc_order.h
Log Message:
-----------
[libc++][NFC] Simplify __to_gcc_order by avoiding constexprness (#220940)
We never make use of the fact that these functions are `constexpr`, so
we might as well avoid complicating them for it. Even if we need them to
be `constexpr` at some point, we likely won't require them to be
`constexpr` in C++11, which is the only language mode with the single
statement restriction that caused this to be more complicated.
Commit: 0046d7fcaa5ce7a55b7f9be65f9dca4f055c76f8
https://github.com/llvm/llvm-project/commit/0046d7fcaa5ce7a55b7f9be65f9dca4f055c76f8
Author: Chris Kennelly <ckennelly at ckennelly.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/negative-lower-table-based-cttz.ll
Log Message:
-----------
[AggressiveInstCombine] Require a definitive initializer for table folds (#222826)
tryToRecognizeTableBasedCttzOrLog2 accepted any global that isConstant()
and hasInitializer(), but isConstant() only means the value does not
change at run time -- it does not mean the initializer that is read is
the one that gets linked. An interposable (weak/linkonce) constant, or
an externally_initialized constant, can be replaced with a different
constant table at link or load time, so folding tbl[i] against the
observed initializer is unsound for those.
Assisted-by: Claude Code
Commit: d7f2a9df46058dedfa97d35ba6596a01f8ecebe3
https://github.com/llvm/llvm-project/commit/d7f2a9df46058dedfa97d35ba6596a01f8ecebe3
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/unittests/ObjectContainer/CMakeLists.txt
M lldb/unittests/ObjectContainer/ObjectContainerUniversalMachOTest.cpp
Log Message:
-----------
[lldb] Validate universal Mach-O slice bounds before parsing (#221493)
Opening a corrupt universal (fat) Mach-O file can crash lldb. A fat-arch
header entry's (offset, size) pair is untrusted, and `GetObjectFile()`
passes it straight to `ObjectFile::FindPlugin()` with no check against
the
container's own size.
A slice whose offset is 0 points back at the start of the same fat
header,
so `GetObjectFile()` recurses into itself until the stack is exhausted:
```
$ ./ObjectContainerTests --gtest_filter=GetObjectFileSelfReferentialSlice
#230 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
#231 CreateObjectFromContainer(...) ObjectFile.cpp:43
#232 lldb_private::ObjectFile::FindPlugin(...) ObjectFile.cpp:146
#233 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
(repeats until the stack is exhausted)
SUMMARY: AddressSanitizer: stack-overflow (libsystem_trace.dylib:arm64e+0x16bd8) in os_log_fmt_flatten+0x6d4
```
A slice whose declared size is far larger than the file reaches the
allocator instead, with the untrusted size unchanged:
```
$ ./ObjectContainerTests --gtest_filter=GetObjectFileOversizedSlice
==89958==ERROR: AddressSanitizer: requested allocation size 0xffffffffffff0046
(0xffffffffffff1048 after adjustments for alignment, red zones etc.) exceeds
maximum supported size of 0x10000000000 (thread T0)
#9 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
SUMMARY: AddressSanitizer: allocation-size-too-big MemoryBuffer.cpp:343 in
llvm::WritableMemoryBuffer::getNewUninitMemBuffer(unsigned long, llvm::Twine const&, std::__1::optional<llvm::Align>)
```
`GetModuleSpecifications()` in the same file already guards its own
recursion this way: it only follows a slice that starts strictly past
the
container's current offset, and clamps the recursive call to the bytes
remaining in the container. Apply the same check to `GetObjectFile()`.
Found with lldb-target-fuzzer. The commands above are the two regression
tests added here.
Commit: 41c11fa5c016886d5858a1aba03a5980688ad5a1
https://github.com/llvm/llvm-project/commit/41c11fa5c016886d5858a1aba03a5980688ad5a1
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/test/std/utilities/variant/variant.relops/three_way.pass.cpp
Log Message:
-----------
[libc++][test] Remove non-functional `constexpr` in three-way comparison test for `variant` (#222837)
When we are just testing SFINAE and do not provide definitions for these
comparison operators, or make them deleted, it is unhelpful to mark them
`constexpr`.
If the implementation uses `std::compare_three_way`, which uses deduced
return type in its `operator()`, in the `operator<=>` for `variant`,
more things in the function body would be instantiated and detected. As
a result, the `-Wundefined-inline` warning or something similar could be
raised. Currently, MSVC STL is doing so.
Commit: 18ea5b09a2494d0bb4edf2f6946d8ad11ab36cc3
https://github.com/llvm/llvm-project/commit/18ea5b09a2494d0bb4edf2f6946d8ad11ab36cc3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/combine-shl.ll
Log Message:
-----------
[X86] combine-shl.ll - regenerate asm comments (#222729)
Reduces diff in upcoming patch
Commit: 46348fd3006282cc00b6b448a54456092c1cad4b
https://github.com/llvm/llvm-project/commit/46348fd3006282cc00b6b448a54456092c1cad4b
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/program_manager/CMakeLists.txt
A libsycl/unittests/program_manager/program_cache.cpp
M libsycl/unittests/queue/queue.cpp
Log Message:
-----------
[libsycl] Add queue constructors with context. (#221763)
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Co-authored-by: Sergey Semenov <sergey.semenov at intel.com>
Commit: 3407850c31e556ffb52d22b09c9405ad67a59f64
https://github.com/llvm/llvm-project/commit/3407850c31e556ffb52d22b09c9405ad67a59f64
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/signal.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/raise.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/tgkill.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/signal/CMakeLists.txt
M libc/src/signal/linux/CMakeLists.txt
A libc/src/signal/linux/pthread_kill.cpp
A libc/src/signal/pthread_kill.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_kill_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Implement pthread_kill (#222625)
The implementation delegates to Thread::kill, which uses tgkill to
target the thread ID.
The main complication is handling zombie threads. POSIX.1-2024 requires
that pthread_kill on a terminated (zombie) thread does not return ESRCH
because the pthread_t handle is still valid. The Linux kernel reaps
threads immediately on exit, so calling tgkill on an exited thread would
return ESRCH (or worse, target a recycled TID). To handle this:
- we check the thread's detach_state first. If it's already EXITING, we
simply return success without calling tgkill (a zombie thread cannot
handle signals anyway).
- if the thread exits concurrently and tgkill returns -ESRCH, we assume
it transitioned to a zombie and treat it as success.
I've also added a tgkill syscall wrapper and replaced one raw usage of
SYS_tgkill.
I've added an integration test covering signal delivery to self and
other threads, signal 0 checks, invalid signals, zombie threads, and
signal mask interactions.
Commit: 2fa51898b1a77dba4a6a397b296732009771e2d6
https://github.com/llvm/llvm-project/commit/2fa51898b1a77dba4a6a397b296732009771e2d6
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A libsycl/include/sycl/__impl/group_barrier.hpp
A libsycl/include/sycl/__spirv/spirv_types.hpp
M libsycl/include/sycl/sycl.hpp
A libsycl/test/basic/group_barrier.cpp
A libsycl/test/basic/group_barrier_device_code.cpp
Log Message:
-----------
[libsycl] Add group_barrier function. (#218971)
Assisted-by: Claude Code and GitHub Copilot
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: c61dda2b6137c618a6f196502512cd8989ab8f6b
https://github.com/llvm/llvm-project/commit/c61dda2b6137c618a6f196502512cd8989ab8f6b
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
Log Message:
-----------
[LLVM][CodeGen][SME] Make FMA decision independent of streaming mode. (#222598)
The relevant bfloat instructions are available in streaming mode and
thus we can benefit from the same BFMLAL based lowering.
Commit: 246194f32b17db4e43cc115f035619b0930e3787
https://github.com/llvm/llvm-project/commit/246194f32b17db4e43cc115f035619b0930e3787
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
Log Message:
-----------
[AArch64] Cache repeated subtarget queries (NFC) (#222637)
The existing SubtargetMap caches subtargets using a key built from a subset of
relevant function attributes. Add a single-entry cache keyed by the full
function attribute set to avoid rebuilding that key for repeated queries. This
covers both repeated queries for the same function and queries for different
functions with identical attributes.
Improves CTMark geomean -0.10% on aarch64-O3 and -0.17 on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=87d9c3c24ff5941ac08799850a6549b561c98a81&to=544bb3d9ac28bc1a28248f6b03bcd95fa85b20e0&stat=instructions:u
Assisted-by: codex
Commit: 9df4e9be49c213f8df306469fae1f50c98df6d4e
https://github.com/llvm/llvm-project/commit/9df4e9be49c213f8df306469fae1f50c98df6d4e
Author: Robert <robertvuia06 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/docs/index.md
M libsycl/include/sycl/__impl/usm_functions.hpp
M libsycl/src/usm_functions.cpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/unittests/CMakeLists.txt
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
A libsycl/unittests/usm/CMakeLists.txt
A libsycl/unittests/usm/alloc.cpp
Log Message:
-----------
[libsycl] USM Aligned allocation functions (#213468)
Adds the `aligned_*` versions of the USM functions, specifically for the
`device` `host` `shared` and free standing `aligned_alloc`.
Most of the overloads delegate between each other, but they slowly end
up being mapped to `aligned` version of API.
Adds more LIT tests in `alloc_functions.cpp` to cover the aligned
version.
Adds unittests for USM in `usm/alloc.cpp`
Assisted by AI for documentation, validation of logic in overloads and
alignment specifications from latest SYCL-Docs and unit tests
Commit: 4245b1dbc9d439c16c378486544f47a77b72ca53
https://github.com/llvm/llvm-project/commit/4245b1dbc9d439c16c378486544f47a77b72ca53
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/force-instruction-cost.ll
Log Message:
-----------
[LV] Add cost printing test with forced instruction costs (NFC). (#222895)
Add a test printing the cost of all recipes in the vector loop region
with -force-target-instruction-cost. Currently the flag is ignored for
VPDerivedIVRecipe and VPScalarIVStepsRecipe.
Commit: 18120564aae0d968a7b08e4b69f4f635fc91ab9c
https://github.com/llvm/llvm-project/commit/18120564aae0d968a7b08e4b69f4f635fc91ab9c
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/SystemZ/misched-prera-cmp-elim.mir
M llvm/test/CodeGen/SystemZ/misched-prera-latencies.mir
M llvm/test/CodeGen/SystemZ/misched-prera-loads.mir
Log Message:
-----------
[MISched] Dump SU node number on `tracePick` (#222631)
Print picked SU node number inline in `tracePick` for convenience.
Otherwise its may be a bit more confusing, for example if we have 2 best
candidates with a similar reason under a single direction.
Printing node number directly as it cannot be an ExitSU (and EntrySU is
effectively unused in-tree).
Commit: 26e41fdf58e9b41a13dc0c22a107100469b59d35
https://github.com/llvm/llvm-project/commit/26e41fdf58e9b41a13dc0c22a107100469b59d35
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/Attributor/nofpclass-fadd-fsub.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
Log Message:
-----------
[KnownFPClass] Move `fadd`/`fsub` tests to `nofpclass-fadd-fsub.ll` (#221872)
- Moved the lit tests for `fadd`/`fsub` to their own dedicated file.
- Updated the lit tests for `fadd`/`fsub` from version 2 to version 6.
- `fadd_p0_ftz_daz #3` was actually testing `positivezero|positivezero`,
so I fixed the name of the test to be `fadd_p0_ftpz_dapz #3`. Then added
a separate `fadd_p0_ftz_daz #0` test.
- `nofpclass-fadd-fsub.ll` uses attributes 1-9 except for 6, so I added
`fadd_p0_dynamic_dynamic #6` so I wouldn't have to change the attributes
for other tests (i.e. changing `test #7 --> test #6`, `test #8 --> test
#7`, etc)
The only tests for `fadd` that remain in `nofpclass.ll` are not related
to testing `KnownFPClass::fadd`.
I have split the PR into 3 commits to make it easier to review (4
commits due to the `undef` false positive).
After this PR lands I plan to open this PR
https://github.com/llvm/llvm-project/pull/221876
Commit: 32dd4e7e8e375cf983ffcf49e72f3abd6158a1b1
https://github.com/llvm/llvm-project/commit/32dd4e7e8e375cf983ffcf49e72f3abd6158a1b1
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/exception.hpp
M libsycl/src/exception.cpp
M libsycl/unittests/CMakeLists.txt
A libsycl/unittests/exception/CMakeLists.txt
A libsycl/unittests/exception/exception.cpp
Log Message:
-----------
[libsycl] Add sycl::exception constructors with context. (#220551)
Assisted-by:: GitHub Copilot for test & doxygen comments.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 092ac4c2626af97a09d768a63a32a2b4b96f754c
https://github.com/llvm/llvm-project/commit/092ac4c2626af97a09d768a63a32a2b4b96f754c
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
A clang/test/OpenMP/debug-info-ompirbuilder-handoff.c
Log Message:
-----------
[clang][OpenMP] Don't drop debug location when handing off to OMPIRBuilder. (#219548)
All the clang callsites that hand a `LocationDescription` to the
`OpenMPIRBuilder` pass `CGF.Builder`. That selects
`LocationDescription(const IRBuilderBase &)`, which carries both the
insertion point and the current debug location.
The 2 call sites fixed in this PR used `CGF.Builder.saveIP()` which
passes only an insertion point, selecting `LocationDescription(const
InsertPointTy &)`, which leaves `DL` empty. As a result, the IR the
builder emitted on clang's behalf came out without `!dbg`.
Fixed by passing `CGF.Builder`, as the other callsites do.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 1f6182764499a3007a8f703f2cae635d21b5e7fe
https://github.com/llvm/llvm-project/commit/1f6182764499a3007a8f703f2cae635d21b5e7fe
Author: Kiva <zengtao at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/strided-load-common-alignment.ll
Log Message:
-----------
[RISCV][SLP] Precommit strided-load alignment tests (NFC) (#222863)
Commit: 476e717c0484b464085f8cc468b0b35fdeea7815
https://github.com/llvm/llvm-project/commit/476e717c0484b464085f8cc468b0b35fdeea7815
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/transform/Ch2/lib/MyExtension.cpp
M mlir/examples/transform/Ch3/lib/MyExtension.cpp
M mlir/include/mlir/Dialect/SCF/IR/SCF.h
A mlir/include/mlir/Dialect/SCF/IR/SCFDialect.h
M mlir/lib/CAPI/Dialect/SCF.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCFPass.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
Log Message:
-----------
[mlir][SCF] Split the dialect declaration (NFC) (#222802)
Introduce a self-contained dialect declaration and use it in nine
configured consumers that do not need the generated operation umbrella.
Across three controlled -j16 rebuilds of the affected TUs, median
instructions fell from 162.029B to 150.032B (-7.404%) and median wall
time fell from 8.82s to 8.73s (-1.020%).
Assisted-by: Codex
Commit: 152917c9555d4da0171e7d992b38196e2fb9f5aa
https://github.com/llvm/llvm-project/commit/152917c9555d4da0171e7d992b38196e2fb9f5aa
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/test/Dialect/Linalg/vectorization/insert-slice.mlir
Log Message:
-----------
[mlir][linalg] Add `insert_slice` vectorization tests for leading/trailing dropped dims (#221966)
Follow-up to #219192, addressing review feedback after merge.
This PR _simply_ add tests for vectorizing rank-reducing
`tensor.insert_slice` where the dropped unit dim is:
1. leading, e.g., `dest = 1x8x4, source = ?x4`,
2. trailing, e.g., `dest = 8x4x1, source = ?x4`, and
3. both (leading + trailing), e.g., `dest = 1x8x4x1, source = ?x4`.
It complements the test introduced in #219192.
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: 3c003512ef20a066ee864fb20c31496859b75061
https://github.com/llvm/llvm-project/commit/3c003512ef20a066ee864fb20c31496859b75061
Author: yamash-fj <yamashita.ta-16 at fujitsu.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/targetattr.c
A clang/test/Driver/aarch64-mcpu-no-feat.c
M clang/test/Driver/arm-sb.c
M llvm/lib/TargetParser/AArch64TargetParser.cpp
Log Message:
-----------
[AArch64][Driver] Fix behaviour of +nofeat modifier on -mcpu
Honour explicit +no<feature> modifiers for features implied by a CPU's
base architecture, both in -mcpu and target("cpu=...") attributes.
For example, -mcpu=neoverse-v2+nosb now disables SB instead of silently
ignoring the modifier.
Fixes #192186.
Commit: d5f6426a52af4966bd6902634648ba40c23bdc35
https://github.com/llvm/llvm-project/commit/d5f6426a52af4966bd6902634648ba40c23bdc35
Author: Vladimir Miloserdov <milosvova at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-and-or-with-all-true.ll
Log Message:
-----------
[AArch64][SVE] Optimize logical ops with convert.to.svbool (#160408)
When both operands of a logical operation (and/or/xor) are
convert.to.svbool
from the same narrower type, unwrap to that type, simplify using
simplifyBinOp,
and rewrap the result. This eliminates redundant instructions in cases
like:
svand_z(svptrue_b8(), svpnext_b16(prev, pg), svptrue_b16());
Fixes https://github.com/llvm/llvm-project/issues/160279.
---------
Co-authored-by: Paul Walker <paul.walker at arm.com>
Commit: e6b77e6ce7b2cc5625f83fc9e09d273b1ca7693a
https://github.com/llvm/llvm-project/commit/e6b77e6ce7b2cc5625f83fc9e09d273b1ca7693a
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-records-and-retained.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-retained-nodes.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-skip-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable.ll
Log Message:
-----------
[SPIRV] Add support for NSDI DebugLocalVariable. (#221706)
This PR adds support for
[DebugLocalVariable](https://registry.khronos.org/SPIR-V/specs/unified1/DebugInfo.html#DebugLocalVariable).
Commit: 11ef37f9b78e121a11cab841ba2ee0069fba4149
https://github.com/llvm/llvm-project/commit/11ef37f9b78e121a11cab841ba2ee0069fba4149
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Log Message:
-----------
[lldb][AArch64][Linux] Remove unused SVE variable (#222935)
Commit: 2e023c8e922d2b03c0cd39c1dbb6e594ab01d856
https://github.com/llvm/llvm-project/commit/2e023c8e922d2b03c0cd39c1dbb6e594ab01d856
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h.inc
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Make all syntactic properties explicit (#222375)
For clauses, modifiers, and modifier sets/groups, make sure that either
the syntactic proprty or its inverse is explicitily listed, with the
missing properties added according to the following table.
```
| Modifier
Inverse | Clause Modifier group
Property property | defaults defaults defaults
----------+------------+------------+------------+-----------
required optional | optional optional optional
unique repeatable | repeatable unique unique
exclusive compatible | compatible compatible compatible
ultimate free | free free free
```
Commit: 5603248c95d69e31889f9eca8ce5254c3a2484bd
https://github.com/llvm/llvm-project/commit/5603248c95d69e31889f9eca8ce5254c3a2484bd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/symbol.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h
M llvm/unittests/Frontend/EnumSetTest.cpp
Log Message:
-----------
[OpenMP] Rename ClauseSet to Clauses and DirectiveSet to Directives, NFC (#222440)
The ClauseSet name was an alias of an EnumSet of clause ids. However, it
collides with a "clause set" concept in OpenMP, which is a set of
clauses,
but with properties and additional information. To resolve the naming
conflict, rename ClauseSet to Clauses.
Although there is no "directive set" in OpenMP, rename DirectiveSet in
an analogous way for uniformity.
Commit: 9d3f81dadfcd509eadd16213a7f428e081214147
https://github.com/llvm/llvm-project/commit/9d3f81dadfcd509eadd16213a7f428e081214147
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Remove deprecated hasStdExtCOrZcd/hasStdExtCOrZcfOrZce (#222925)
These two methods were marked LLVM_DEPRECATED in favor of
hasStdExtZcd/hasStdExtZcf respectively 7 months ago. There are no
remaining in tree callers, so remove them.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: e0d944d2dda0df304505947278304a628ff824fb
https://github.com/llvm/llvm-project/commit/e0d944d2dda0df304505947278304a628ff824fb
Author: Shoreshen <372660931 at qq.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
Log Message:
-----------
[AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (#203150)
Implied by
https://github.com/llvm/llvm-project/pull/202917#discussion_r3388089034
This PR apply legalization change for DAG. Case changes can be explained
in https://github.com/llvm/llvm-project/pull/202917
---------
Co-authored-by: shore <shorshen at amd.com>
Commit: 21ef0ade496fcaf20cfcb32f4a7e46f4f38abafd
https://github.com/llvm/llvm-project/commit/21ef0ade496fcaf20cfcb32f4a7e46f4f38abafd
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/typo-correction.c
Log Message:
-----------
[clang][Sema] Add diagnostic note for reference of function-like macros requiring without parentheses (#123495)
This PR enhances the Clang diagnostics to provide better guidance when
function-like macros are used without parentheses. Additionally, it
updates the relevant test cases to reflect these changes (#123038 ).
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Co-authored-by: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Commit: be60b244d1f9fa798c8922e313679035ad9c2ee5
https://github.com/llvm/llvm-project/commit/be60b244d1f9fa798c8922e313679035ad9c2ee5
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libunwind/test/dwarf_expression_stack.pass.cpp
Log Message:
-----------
[libunwind] Mark test as requiring Unix headers (#222679)
Test `libunwind/test/dwarf_expression_stack.pass.cpp` requires a POSIX
environment because it uses `signal.h` and associated functions. Because
of this, the test fails in baremetal targets.
This change adjusts the requirements of the test. `has-unix-headers`
does not map exactly to the requirements here, but it seems to be enough
for this case.
Commit: 176ab0177fb9acf749b90634cae84936fcfac2c5
https://github.com/llvm/llvm-project/commit/176ab0177fb9acf749b90634cae84936fcfac2c5
Author: Yue Huang <2292398666 at qq.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/ControlFlowToSCF/ControlFlowToSCF.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Transforms/CFGToSCF.h
M mlir/lib/Conversion/ControlFlowToSCF/CMakeLists.txt
M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
M mlir/lib/Transforms/Utils/CFGToSCF.cpp
M mlir/test/Conversion/ControlFlowToSCF/test.mlir
Log Message:
-----------
[MLIR][Conversion] Remove func dialect dependency for CF to SCF conversion (#222594)
The pass used to target only `func.func` and generates a `func.return`
with poison values. Now we change it to `ub.unreachable`, as the TODO
suggests.
But this change alone can cause the following pattern to appear after
lifting:
```mlir
func.func @f(%arg0: f32, %arg1: i1) -> f32 {
cf.cond_br %arg1, ^bb1(%arg0 : f32), ^bb2
^bb1(%0: f32): // pred: ^bb0
ub.unreachable
^bb2: // pred: ^bb0
return %arg0 : f32
}
```
This `cf.cond_br` cannot be raised further into `scf.if`, because we
need something as the operand of `return`, while `ub.unreachable`
doesn't provide this. Therefore we reused the code of synthesizing
poison values when `ub.unreachable` can be merged to other return
operations.
---------
Co-authored-by: Markus Böck <markus.boeck02 at gmail.com>
Commit: f2d4b9dfc7e5bba16f6b3b46469e6cad619370db
https://github.com/llvm/llvm-project/commit/f2d4b9dfc7e5bba16f6b3b46469e6cad619370db
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
Log Message:
-----------
[AMDGPU][NFC] Convert v2f16 inreg fabs/fneg tests to have SGPR uses (#222785)
Update v2f16 inreg fabs/fneg tests to have SGPR uses.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 94dcd357325f05a47537794bae692998ec059cdf
https://github.com/llvm/llvm-project/commit/94dcd357325f05a47537794bae692998ec059cdf
Author: Kristina Bessonova <kbessonova at accesssoftek.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
Log Message:
-----------
[AArch64][GlobalISel] Add support for TLS for ELF (#220236)
Mirror the existing DAGISel lowering for the TLS access sequences.
'AArch64 local-dynamic TLS cleanup pass' moved to
`AArch64PassConfig::addMachineSSAOptimization()` hook to make it running
for both instruction selection pipelines.
The generated by GlobalISel code matches DAGISel for the existing TLS
test cases.
Commit: 57bf08dc0f318ce50e6c9fdc0d7c9e770f247ee8
https://github.com/llvm/llvm-project/commit/57bf08dc0f318ce50e6c9fdc0d7c9e770f247ee8
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/scmp.ll
Log Message:
-----------
[PowerPC] simplify the asm of scmp builtin (#200024)
for the IR
```
define noundef signext range(i32 -1, 2) i32 @test_scmp(i64 noundef %a, i64 noundef %b) local_unnamed_addr #0 {
entry:
%cond2 = tail call i32 @llvm.scmp.i32.i64(i64 %a, i64 %b)
ret i32 %cond2
}
```
when compile -mcpu=pwr8 and 64bit
it generated as asm following orginal
sradi 5, 4, 63
rldicl 6, 3, 1, 63
subc 7, 4, 3
adde 5, 6, 5
cmpd 3, 4
li 3, -1
xori 5, 5, 1
isellt 3, 3, 5
extsw 3, 3
blr
the patch will let it generate as
```
cmpd 7, 3, 4
mfocrf 3, 1
rlwinm 4, 3, 30, 31, 31
rlwinm 3, 3, 29, 31, 31
sub 3, 4, 3
blr
```
Commit: bf1b598fff82413353b3ad45c4df06b243c1e6a1
https://github.com/llvm/llvm-project/commit/bf1b598fff82413353b3ad45c4df06b243c1e6a1
Author: Stanislav Bardyuk <6258615+kodlan at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAlignment.cpp
M llvm/test/Transforms/InferAlignment/masked.ll
M llvm/test/Transforms/InferAlignment/memintrinsics.ll
Log Message:
-----------
[InferAlignment] Do not use intrinsic align attributes as base pointer alignment (#221018)
InferAlignment propagates alignment between accesses of the same base
pointer: each load/store records how aligned the base must be, and later
accesses of that base are upgraded. Since #156057 (masked.load/store)
and
#217172 (memcpy/memmove/memset), the align parameter attribute of these
intrinsics is fed into the same table.
That is not sound. A memset with a zero length (or a masked store with
an
all-false mask) does not access memory, and its pointer argument is
allowed
to be poison, so an align attribute on it proves nothing about the
pointer.
For
```llvm
define void @test(ptr %p, i64 %n) {
call void @llvm.memset(ptr align 16 %p, i8 0, i64 %n, i1 false)
store i32 0, ptr %p
ret void
}
```
the store was upgraded to align 16, which is UB when %p is only 4-byte
aligned and %n is 0.
Stop presenting the attribute alignment to the base pointer logic: the
intrinsic branch now passes align 1, the same convention the
and(ptrtoint)/trunc(ptrtoint) patterns use for "this instruction proves
nothing". The attribute can still be improved from a dominating real
access or from known bits. A constant non-zero length would be a
provable access, but it is deliberately not special-cased, as suggested
in the issue.
Fixes #220520
Commit: 2a7919ef03d3d389064a56531bcb3ce7a87afd4c
https://github.com/llvm/llvm-project/commit/2a7919ef03d3d389064a56531bcb3ce7a87afd4c
Author: kwyatt-ext <kwyatt.external at hpe.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/stat.h
M flang-rt/lib/runtime/stat.cpp
M flang/docs/Extensions.md
M flang/docs/Intrinsics.md
M flang/include/flang/Evaluate/common.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-namelist.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/type.cpp
A flang/test/Semantics/enumeration-type-intrinsics-array-fold.f90
A flang/test/Semantics/enumeration-type-intrinsics-gating.f90
A flang/test/Semantics/enumeration-type-intrinsics-keyword.f90
A flang/test/Semantics/enumeration-type-intrinsics-nonenum.f90
A flang/test/Semantics/enumeration-type-intrinsics.f90
A flang/test/Semantics/enumeration-type-io-pdt-order.f90
A flang/test/Semantics/enumeration-type-io.f90
A flang/test/Semantics/enumeration-type-mod-readback.F90
A flang/test/Semantics/enumeration-type-mod.f90
Log Message:
-----------
[flang] Enumeration Type: (PR 3/5) Intrinsics + I/O + Modules (#193235)
This PR adds intrinsics: HUGE, INT, NEXT, and PREVIOUS. It adds support
for I/O, specifically formatted I/O with explicit format. Also, it adds
module support.
It is the 3rd of 5 stacked PRs.
Assisted-by: AI
---------
Co-authored-by: Kevin Wyatt <kwyatt at hpe.com>
Commit: 1cfa469ad1b9a00500e94eac8ec65b1f0041f3ce
https://github.com/llvm/llvm-project/commit/1cfa469ad1b9a00500e94eac8ec65b1f0041f3ce
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOverload.cpp
A clang/test/AST/ast-print-deducing-this.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
Log Message:
-----------
[clang] Add missing information to AST for calling explicit object member functions (#220463)
For `E1.E2()` and `E1->E2()`,
1. A `MemberExpr` is created to represent `E1.E2` and `E1->E2`.
If overload resolution is performed, it is created using information
from a `UnresolvedMemberExpr`.
2. If `E2` is an explicit object member function, a `DeclRefExpr` is
created to represent `E2` using information from the `MemberExpr`.
This PR adds missed information to the `DeclRefExpr`.
Fixes #218829.
Commit: 8328d74f3a96e70c917a796780b2d7e2ac159958
https://github.com/llvm/llvm-project/commit/8328d74f3a96e70c917a796780b2d7e2ac159958
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/records.cpp
M clang/test/CodeGen/pr4349.c
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
[clang][bytecode] Use opaque pointers for decl-based dummy pointer (#222897)
This uses the recently introduced opaque pointers for what we used to
use dummy pointers for, if the base of the pointer is a declaration.
This of course means we see opaque pointers in a lot more places.
However, we don't need to actually allocate anything for their data
anymore, resulting in a lot fewer allocations for such pointers.
Commit: 1fe126ef2d6330b7459704e28b2cb3f9bb92b63c
https://github.com/llvm/llvm-project/commit/1fe126ef2d6330b7459704e28b2cb3f9bb92b63c
Author: Andrew Ng <andrew.ng at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lld/Common/CommonLinkerContext.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
A lld/test/ELF/dynamic-debug.test
A lld/test/ELF/invalid-dynamic-debug.test
A lld/test/ELF/trace-symbols-dynamic-debug.test
M llvm/include/llvm/BinaryFormat/ELF.h
Log Message:
-----------
[dyndbg][LLD][ELF] Initial LLD support for dynamic debugging (#214188)
LLVM's Dynamic Debugging feature (`llvm/docs/DynamicDebugging.md`)
generates optimized relocatable files with an unoptimized relocatable
copy of the functions from its translation unit embedded in a
`SHT_LLVM_DYNDBG_ELF` section named `.debug_llvm_dyndbg`. The
unoptimized functions in the "inner" embedded relocatable reference the
functions and data of the "outer" optimized relocatable.
When LLD encounters dynamic debugging objects, a nested "inner"
relocatable link is run with the embedded "inner" unoptimized objects.
The output is embedded in a `SHT_LLVM_DYNDBG_ELF` section named
`.debug_llvm_dyndbg` and described by an `NT_LLVM_DYNAMIC_DEBUGGING`
note in the "outer" output. The "inner" relocatable link more closely
resembles a final link rather than a regular relocatable `-r` one,
unless the "outer" link is itself a relocatable `-r` link.
The embedded "inner" objects' undefined symbols are added to the "outer"
symbol table so that the "outer" link resolves the dependencies of the
"inner" relocatable link. Symbols referenced by "inner" relocations from
an allocated section are assigned a PLT/GOT entry as appropriate and are
diagnosed when unresolved. In this initial implementation, these symbols
also act as `--gc-sections` roots for the "outer" link and
`--gc-sections` is not supported for the "inner" relocatable link.
ICF is disabled so that individual functions can be patched when
debugging with dynamic debugging without affecting other identical
functions.
RFC: https://discourse.llvm.org/t/90113
Commit: 4ec3afcec324456abdda0e75a3cfbbbcabff9714
https://github.com/llvm/llvm-project/commit/4ec3afcec324456abdda0e75a3cfbbbcabff9714
Author: Adam Paszke <apaszke at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/IR/parser.mlir
Log Message:
-----------
[mlir] Accept OpaqueAttr as a valid memory space if the context allows unregistered dialects (#187682)
When a context allows unregistered dialects and an unknown attribute is
encountered, it is wrapped in OpaqueAttr from the builtin dialect.
Commit: c89359b132c086c1a98d9b6ec73461e48c004481
https://github.com/llvm/llvm-project/commit/c89359b132c086c1a98d9b6ec73461e48c004481
Author: Robert <robertvuia06 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/docs/index.md
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
A libsycl/test/basic/context.cpp
M libsycl/unittests/CMakeLists.txt
A libsycl/unittests/context/CMakeLists.txt
A libsycl/unittests/context/context_ctors.cpp
Log Message:
-----------
[libsycl] Add constructors for context (#214538)
Adds public `constructors` API for the `context` class.
It also adds E2E and unit tests.
Assisted by AI for documentation and testing
---------
Co-authored-by: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Commit: 853a7fc14e85659be5b5ac6cfd3481712e3795d1
https://github.com/llvm/llvm-project/commit/853a7fc14e85659be5b5ac6cfd3481712e3795d1
Author: Chris Copeland <chris at chrisnc.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll
M llvm/test/CodeGen/ARM/eabihf-no-fpregs.ll
M llvm/test/CodeGen/ARM/inlineasm-operand-implicit-cast.ll
Log Message:
-----------
[ARM] Prevent use of the VFP calling convention when +soft-float is enabled (#221434)
This check was implemented in #111334 for -fpregs and Thumb1 cases, but
+soft-float is a distinct case that can lead to the same silent calling
convention mismatches.
Fix tests that were using +soft-float and the VFP calling convention.
Clarify comment about hard-float support on mve+nofp cores.
Commit: cfa4135a9d324b3c539d9f874509ba03a8b0106f
https://github.com/llvm/llvm-project/commit/cfa4135a9d324b3c539d9f874509ba03a8b0106f
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP] Don't reserve the generic mode warp on SPIR-V (#222763)
#218790 widened a generic mode kernel's thread bound by a warp so that
the main
thread has one of its own. The bound is what lets the runtime's own warp
addition through: `getEffectiveNumThreads()` adds a warp and then clamps
to the
bound, so before that change the addition was clamped straight back off,
which
is why a `thread_limit` below one wavefront ended up with no workers.
Widening
the bound is the fix, and it is also what makes every generic mode
kernel launch
a warp wider than it used to.
`hasGridValue()` covers SPIR-V, so that geometry change reached Level
Zero.
@sarnex reports hangs and intermittent failures there and asked about a
revert
in
https://github.com/llvm/llvm-project/pull/222097#issuecomment-5609354538.
The
motivating bug was on AMDGPU, so this restricts the reservation to the
targets
it was written for and gives SPIR-V back the launch geometry it had
before.
Measured on gfx90a, generic mode, threads per block for a given
`thread_limit`:
| `thread_limit` | launched |
| --- | --- |
| 1 | 65 |
| 4 | 68 |
| 64 | 128 |
| 256 | 320 |
| 1024 | 1024 (clamped) |
Before #218790 each of those launched exactly `thread_limit`, because
the clamp
removed the runtime's warp again. SPIR-V goes back to that with this
patch:
`thread_limit(4)` writes a bound of 4 rather than 68, while AMDGPU keeps
68.
I have not reproduced the Level Zero failures — I have no Intel device,
and
OpenMP offload to `spirv64-amd-amdhsa` is not a working path, so AMD
hardware
cannot stand in. What this patch does establish is that SPIR-V's bound
returns
to its pre-#218790 value, so it undoes the geometry change whether or
not that
is the whole story. @sarnex, could you try it on the Level Zero runner?
This is a narrowing rather than a claim that SPIR-V never wants the
reserved
warp. Without it a SPIR-V `thread_limit` below a warp has the same
no-workers
problem #218790 fixed elsewhere; it is just not reachable today. If
Level Zero
grows the handling, this can come back.
Testing: `clang/test/OpenMP` 1613 passed,
`llvm/test/Transforms/{OpenMP,Attributor}`
263 passed, `LLVMFrontendTests` 1322 passed. Two tests needed updating,
both of
which encode SPIR-V thread bounds.
Commit: ad72da24e242b6bf5c73b5fcd267a86cefcead12
https://github.com/llvm/llvm-project/commit/ad72da24e242b6bf5c73b5fcd267a86cefcead12
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/force-instruction-cost.ll
Log Message:
-----------
[VPlan] Consider VPDerivedIV & VPScalarIVSteps for forced costs. (#222918)
Now that we compute VPDerivedIV and VPScalarIVSteps costs directly in
VPlan, also account for them with forced costs. They never have
underlying instructions, so always add the forced cost for them.
Previously they would have been accounted for in precomputeCosts.
PR: https://github.com/llvm/llvm-project/pull/222918
Commit: 59658bea07648e2ec4c32ec15e03e13ed130b803
https://github.com/llvm/llvm-project/commit/59658bea07648e2ec4c32ec15e03e13ed130b803
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManySignals.py
Log Message:
-----------
[lldb][test] Disable TestConcurrentManySignals.py on AArch64 Linux (#222948)
It is flakey in pre-commit CI
(https://github.com/llvm/llvm-project/issues/171210) and blocking
https://github.com/llvm/llvm-project/issues/171202 as a result.
No one is going to have time to dig into this soon, so disable it for
now.
Commit: 0bf534a7b76c7623edb7785cd8b21d89ec63e5d9
https://github.com/llvm/llvm-project/commit/0bf534a7b76c7623edb7785cd8b21d89ec63e5d9
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-subreg-index-aligned-vgpr-check.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir
Log Message:
-----------
[AMDGPU] Remove the VGPR-alignment check from the machine verifier (#219230)
The machine verifier had a check that a 64-bit-or-wider VALU operand uses an even-aligned VGPR/AGPR tuple on subtargets that require it. Now that most operands express their alignment requirement through `_AlignTarget`, the check is redundant: the generic verifier already rejects a register that does not fit its operand's class.
This removes the "Subtarget requires even aligned vector registers" and "Operand has incorrect register class" diagnostics, leaving the generic "Illegal virtual/physical register for instruction".
The image `vaddr` parity check is left in place: single-VGPR alignment cannot be expressed as a register class, so it still needs an explicit check.
Commit: f55cb17894f605f8045d74f7ed13322776530acc
https://github.com/llvm/llvm-project/commit/f55cb17894f605f8045d74f7ed13322776530acc
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
Log Message:
-----------
[Clang][NFC] Add regression tests for a couple resolved issues (#222944)
Fixes #38721 (Clang 18)
Fixes #58682 (Clang 18)
Commit: c44ac9eedba61129a76ff5964db9a0d6bf639b64
https://github.com/llvm/llvm-project/commit/c44ac9eedba61129a76ff5964db9a0d6bf639b64
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
A clang/test/APINotes/Inputs/Headers/RedeclAnnotation.apinotes
A clang/test/APINotes/Inputs/Headers/RedeclAnnotation.h
A clang/test/APINotes/Inputs/Headers/RedeclDefinition.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/redecl-after-definition.c
Log Message:
-----------
[clang][APINotes] Do not drop attributes applied after a definition (#222902)
API notes are matched against whichever declaration the compiler
reaches, which can be a redeclaration that follows the definition. When
the definition lives in one module and the annotated redeclaration in
another, that is exactly what happens: checkNewAttributesAfterDef()
warns "attribute declaration must precede definition" and erases the
attribute, so the annotation is silently lost.
The warning exists to tell users that an attribute they wrote has no
effect. Attributes from API notes are not written in the source, so the
warning has nowhere to point and there is nothing for the user to
correct. Skip attributes with an invalid location, alongside the
existing exceptions.
rdar://186930250
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: 1d3366b2f4b641cdff078d51d49cfc849dacbf84
https://github.com/llvm/llvm-project/commit/1d3366b2f4b641cdff078d51d49cfc849dacbf84
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M openmp/runtime/test/transform/split/fill_first.c
M openmp/runtime/test/transform/split/foreach.cpp
M openmp/runtime/test/transform/split/intfor.c
M openmp/runtime/test/transform/split/intfor_negstart.c
M openmp/runtime/test/transform/split/iterfor.cpp
M openmp/runtime/test/transform/split/leq_bound.c
R openmp/runtime/test/transform/split/lit.local.cfg
M openmp/runtime/test/transform/split/negative_incr.c
M openmp/runtime/test/transform/split/nonconstant_incr.c
M openmp/runtime/test/transform/split/parallel-split-intfor.c
M openmp/runtime/test/transform/split/single_fill.c
M openmp/runtime/test/transform/split/three_segments.c
M openmp/runtime/test/transform/split/trip_one.c
M openmp/runtime/test/transform/split/unsigned_iv.c
M openmp/runtime/test/transform/split/zero_first_segment.c
Log Message:
-----------
[OpenMP][NFC] Explicit run-checks for OpenMP 6.0 loop-splitting (#221651)
Move OpenMP 6.0 test flag to RUN lines for loop splitting
Commit: da252a8b6fb505e2395bbb01c2e62037dae95eb3
https://github.com/llvm/llvm-project/commit/da252a8b6fb505e2395bbb01c2e62037dae95eb3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Allow pointer type mismatch in SubPtr op (#222940)
The result of the attached test case is 1, which then gets divided by 8
and the end result is 0. This should evaluate.
Commit: 90466334d0eaabb7debd36cd26cd17c7d2850567
https://github.com/llvm/llvm-project/commit/90466334d0eaabb7debd36cd26cd17c7d2850567
Author: David Green <david.green at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
Log Message:
-----------
[AArch64][GlobalISel] Copy flags in reduction fewerElements (#221608)
Commit: 1952c705fad0187fc0c6fbd1460dbd56d56c8087
https://github.com/llvm/llvm-project/commit/1952c705fad0187fc0c6fbd1460dbd56d56c8087
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/sys-mman-macros.h
M libc/include/sys/mman.yaml
Log Message:
-----------
[libc] Add MAP_ANON as a synonym for MAP_ANONYMOUS. (#222789)
`MAP_ANON` is specified in POSIX, but may not be present in Linux kernel
headers,
which we rely on to get the values of other `MAP_` values. Provide this
macro
ourselves to ensure the user code including `<sys/mman.h>` can use it.
Commit: 185ff0c972cbdf0f221fbf1f45b8554810da79eb
https://github.com/llvm/llvm-project/commit/185ff0c972cbdf0f221fbf1f45b8554810da79eb
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/bfloat-int64-cvt-i686.ll
Log Message:
-----------
[X86] Fix i64-to-bf16 conversion crash on 32-bit targets (#222934)
Converting a loaded `i64` to `bfloat` can crash instruction selection on
i686:
```llvm
define bfloat @convert(ptr %p) {
%value = load i64, ptr %p
%result = sitofp i64 %value to bfloat
ret bfloat %result
}
```
With `llc -mtriple=i686-linux-gnu`, this hits:
```text
Do not know how to custom type legalize this operation!
```
The X86 DAG combine folds the load and conversion into an x87 `FILD`
node
before type legalization. It already excludes `f16` and `f128`, but was
missing
`bf16`, leaving the legalizer with an unsupported result type.
Add `bf16` to that exclusion. This lets the existing legalization
promote the
conversion through `f32` and then round to bf16. The change also covers
the
constrained signed conversion, which uses the same combine.
Assisted by: Fable 5.1, Astra 6
Commit: dceef547706bcc82ad8681b03f2871707e4c3384
https://github.com/llvm/llvm-project/commit/dceef547706bcc82ad8681b03f2871707e4c3384
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 176ab01 (#222943)
This fixes 176ab0177fb9acf749b90634cae84936fcfac2c5 (#222594).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=176ab0177fb9acf749b90634cae84936fcfac2c5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 6acc635735efc0a6bec1e38194d22b6e1061f495
https://github.com/llvm/llvm-project/commit/6acc635735efc0a6bec1e38194d22b6e1061f495
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
Log Message:
-----------
[AMDGPU][NFC] Refactor integer to float lowering (#222898)
Factor common code out of LowerUINT_TO_FP and LowerSINT_TO_FP.
Commit: cc5e9d63b4dcb572483479ed2368783faff416ee
https://github.com/llvm/llvm-project/commit/cc5e9d63b4dcb572483479ed2368783faff416ee
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACCLoop.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR][NFC] Fix CIR build after #219195 (#222822)
https://github.com/llvm/llvm-project/pull/219195 marked certain forms of
the create function, and CIR was using those (most
unintentionally/indirectly).
This change updates the CIR code to use non-deprecated forms
Assisted-by: Cursor / claude-opus-5
Commit: 2078cc8bfe5cdabc47a744810efc52bcca977cb7
https://github.com/llvm/llvm-project/commit/2078cc8bfe5cdabc47a744810efc52bcca977cb7
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M offload/test/jit/type_punning.c
M offload/test/offloading/bug64959_compile_only.c
M offload/test/offloading/complex_reduction.cpp
M offload/test/offloading/ctor_dtor_api.cpp
M offload/test/offloading/nested_parallel_reduction.c
Log Message:
-----------
[offload][lit] Fix failing/hanging/XPASSing tests on Intel GPU (#222342)
The buildbot was down for a few days due to changes that broke it and we
saw some required changes come up during that time. With this PR merged
we can reenable the buildbot as everything consistently passes.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 27d26292f819e2215c1421a41ac19d4b59a2adf2
https://github.com/llvm/llvm-project/commit/27d26292f819e2215c1421a41ac19d4b59a2adf2
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
Log Message:
-----------
Fix Bazel build for 176ab01 (#222963)
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=176ab0177fb9acf749b90634cae84936fcfac2c5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: c83c8de32a9790f313f1017db2c6d5902341b411
https://github.com/llvm/llvm-project/commit/c83c8de32a9790f313f1017db2c6d5902341b411
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb][Windows] Make RM_RF actually delete files (#222950)
On Windows `RM_RF` was `rd /s /q`, which only removes directories — so
any `$(call RM_RF,...)` naming files silently did nothing, and `|| (exit
0)` hid it. POSIX gets `rm -rf`, which removes both.
`clean::` recipes pass file globs and usually run before the build
(`all: clean ...`), so stale artifacts survived into the next run. Hits
upstream `functionalities/disassembler-variables` too.
Fix adds `del /f /q`, joined with `&` not `&&` so `rd` still runs when
the glob matched no files.
This is a follow up to 7d42028e806ab2b17af22ddb8417432e4781d4aa
Commit: 7591f9a5d59eb11293d503fcf01345b10d40eaa7
https://github.com/llvm/llvm-project/commit/7591f9a5d59eb11293d503fcf01345b10d40eaa7
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[NFC][LICM] Hoist `isPotentiallyPromotable` to reusable function (#222684)
Commit: 5d4d6b1692fa21af823c1a8ed00b9dfe4a306964
https://github.com/llvm/llvm-project/commit/5d4d6b1692fa21af823c1a8ed00b9dfe4a306964
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
Log Message:
-----------
[NFC][LICM] Pre-commit tests for loop-invariant store AA (#222685)
Commit: 68f9d9c076d18a2def73035bee18fe9ed6b3d222
https://github.com/llvm/llvm-project/commit/68f9d9c076d18a2def73035bee18fe9ed6b3d222
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
Log Message:
-----------
[LICM] Do not strip invariant AA tags (#222686)
This patch refines #218031 by keeping AA tags of promotable stores when
they are valid for aliasing checks, as determined by ensuring that all
exiting blocks are dominated by a store to the same location, with the
same AA tags.
Commit: a0ad24fcdca9722bdd6bb5770eb5986d15e2e9c1
https://github.com/llvm/llvm-project/commit/a0ad24fcdca9722bdd6bb5770eb5986d15e2e9c1
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-access-chain.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dead-alloca.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-unsupported.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-xderef.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-int-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-line-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-module-scope-variable.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-null-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-poison-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-skip-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-bit-piece.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-cache.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-operation-cache.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-operations.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-out-of-range.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-constant-value.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-init-expr.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugDeclare, DebugExpression and DebugOperation (#222011)
Add support for
[DebugDeclare](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugDeclare),
[DebugExpression](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugExpression)
and
[DebugOperation](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugOperation).
Changes:
- Emit DebugDeclare from an indirect DBG_VALUE whose location register
is defined by OpVariable, which is what the spec requires of the
Variable operand. LLVM IR `#dbg_declare` does not survive as its own
opcode in MIR, `IRTranslator` [lowers
it](https://github.com/llvm/llvm-project/blob/06d0711313b763b65c7e4a9e8613893d7760b6f6/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp#L4592-L4596)
to an indirect DBG_VALUE.
- DebugDeclare has a `Indexes` operand that didn't find necessary to
implement. The SPIRV-LLVM Translator has no support for it either in
both modes (ir <-> spv).
- The following cases are unhandled to avoid emitting invalid code (see
below comment about spirv-val):
- an access chain into a field
([debug-declare-access-chain.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-access-chain.ll))
- an OpFunctionParameter for a byval argument
([debug-declare-function-parameter.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll))
- a constant address
([debug-declare-int-storage.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-int-storage.ll))
- a register left without a def after dead storage was erased
([debug-declare-dead-alloca.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dead-alloca.ll))
- a variadic #dbg_value
([debug-declare-dbg-value-variadic.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll))
- an expression using an unmapped operation
([debug-declare-expression-unsupported.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-unsupported.ll))
- a variable whose DebugLocalVariable was not emitted
([debug-declare-skip-type.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-skip-type.ll))
- Collect expressions from MIR, so DebugExpression and DebugOperation
are emitted at module scope and shared by every declare using the same
DIExpression.
- Map the nine operations the instruction set defines, and reject an
expression whole when an argument does not fit in 32 bits (as per spec).
- Cache DebugLocalVariable result ids, which emitDebugLocalVariable
already returned but nothing stored.
- Add tests for each emitted and skipped case, for the interaction with
DebugLine and DebugScope, and for the expression operations.
spirv-val and the spec disagree in two places, in opposite directions:
- DebugDeclare's Variable operand: spirv-val accepts an
OpFunctionParameter, while the spec names only OpVariable. This patch
follows the spec, so the byval case is skipped even though spirv-val
would take it, see
[debug-declare-function-parameter.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll).
- DebugGlobalVariable's Variable operand: spirv-val rejects a
DebugExpression there although the spec permits one,
KhronosGroup/SPIRV-Tools#6469, see
[debug-global-variable-constant-value.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-constant-value.ll).
Commit: a969579a9129891bccb63fcc69e76d74b299f322
https://github.com/llvm/llvm-project/commit/a969579a9129891bccb63fcc69e76d74b299f322
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/kdivi.cpp
A libc/src/stdfix/kdivi.h
A libc/src/stdfix/lkdivi.cpp
A libc/src/stdfix/lkdivi.h
A libc/src/stdfix/lrdivi.cpp
A libc/src/stdfix/lrdivi.h
M libc/src/stdfix/rdivi.cpp
M libc/src/stdfix/rdivi.h
A libc/src/stdfix/ukdivi.cpp
A libc/src/stdfix/ukdivi.h
A libc/src/stdfix/ulkdivi.cpp
A libc/src/stdfix/ulkdivi.h
A libc/src/stdfix/ulrdivi.cpp
A libc/src/stdfix/ulrdivi.h
A libc/src/stdfix/urdivi.cpp
A libc/src/stdfix/urdivi.h
M libc/test/src/stdfix/CMakeLists.txt
R libc/test/src/stdfix/DivITest.h
A libc/test/src/stdfix/FxDiviTest.h
A libc/test/src/stdfix/kdivi_test.cpp
A libc/test/src/stdfix/lkdivi_test.cpp
A libc/test/src/stdfix/lrdivi_test.cpp
M libc/test/src/stdfix/rdivi_test.cpp
A libc/test/src/stdfix/ukdivi_test.cpp
A libc/test/src/stdfix/ulkdivi_test.cpp
A libc/test/src/stdfix/ulrdivi_test.cpp
A libc/test/src/stdfix/urdivi_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point fxdivi functions in llvm-libc (#210020)
This PR implements the following 8 functions along with unit tests.
```cpp
fract rdivi(int, int);
long fract lrdivi(long int, long int);
accum kdivi(int, int);
long accum lkdivi(long int, long int);
unsigned fract urdivi(unsigned int, unsigned int);
unsigned long fract ulrdivi(unsigned long int, unsigned long int);
unsigned accum ukdivi(unsigned int, unsigned int);
unsigned long accum ulkdivi(unsigned long int, unsigned long int);
```
Fixes #129126.
Commit: e403b76a16bd8dd7bd4e776b119afae9fa56f803
https://github.com/llvm/llvm-project/commit/e403b76a16bd8dd7bd4e776b119afae9fa56f803
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/stackTrace/Makefile
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
A lldb/test/API/tools/lldb-dap/stackTrace/other.c
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_Types.py
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/unittests/DAP/ProtocolRequestsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Report the compile unit of a stack frame (#222512)
Add StackFrame.compileUnitId, an id that names the frame's compile unit
within the module already reported as StackFrame.moduleId. Clients
resolve it through the compileUnits request, which now reports the same
id on each CompileUnit and takes an optional compileUnitIds filter to
ask for individual compile units instead of the module's full list.
CompileUnitsRequestHandler declared its arguments optional but
dereferenced them unconditionally, so a compileUnits request carrying no
arguments crashed the adapter. Drop the optional and let the request
framework reject the request instead.
Commit: 67d857636c0e9e847f5c777f026908fbf52d9a04
https://github.com/llvm/llvm-project/commit/67d857636c0e9e847f5c777f026908fbf52d9a04
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Init BE vars to CouldNotCompute in howManyLT (NFC) (#222892)
This avoids the risk of initializing ExitLimit with nullptr BE
variables, and cast-asserts on nullptr. This makes the null-BE check
unnecessary, and it can be handled by the common code that follows.
Commit: 06a2917904110ac4cd5ecaab59355ee8bbf54501
https://github.com/llvm/llvm-project/commit/06a2917904110ac4cd5ecaab59355ee8bbf54501
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getscope.cpp
A libc/src/pthread/pthread_attr_getscope.h
A libc/src/pthread/pthread_attr_setscope.cpp
A libc/src/pthread/pthread_attr_setscope.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etscope (#222956)
This patch implements pthread_attr_getscope and pthread_attr_setscope.
Same as other libraries, we only support the system contention scope
(PTHREAD_SCOPE_SYSTEM). Process contention scope (PTHREAD_SCOPE_PROCESS)
is not supported, and would basically require a userspace N:M threading
implementation. Since this value cannot be checked in the kernel, I
reject it directly during the attribute set operation, and don't even
bother storing it in the attribute object.
Assisted-by: Gemini
Commit: d031c595935b6a697e94b55fddbf59261733eb16
https://github.com/llvm/llvm-project/commit/d031c595935b6a697e94b55fddbf59261733eb16
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb][debugserver][NFC] Share the expedited-memory type and emitters (#222911)
Expedited memory had two representations:
- The frame pointer backchain used `StackMemory`, a fixed
`uint8_t[2 * sizeof(nub_addr_t)]` plus a length, held in a `std::map`
keyed
by frame address.
- Frame 0's window used `ExpeditedMemory`, which owns a
`std::vector<uint8_t>`.
Three call sites then open-coded the same emit loop, twice into a JSON
array
and once into a stop reply.
Keep `ExpeditedMemory` for both and emit through
`AppendExpeditedMemoryToJSON`
and `AppendExpeditedMemoryToStopReply`. `ReadFrameZeroStackMemory`'s
local
`read_range` lambda becomes `AppendExpeditedMemory`. `ReadStackMemory`
keeps
its own read, because it needs the bytes to continue the walk.
`ReadStackMemory` gains an explicit `visited` set. It previously relied
on its
`std::map` to stop a corrupt frame pointer chain that loops back on
itself, by
testing whether the key was already present. A `std::vector` has no such
test,
so the guard becomes explicit. This keeps the existing behavior rather
than
changing it.
Chunk count and chunk sizes are unchanged. Backchain chunks now go out
in
frame-walk order rather than ascending frame address; the bytes for a
given
address are the same either way, so the cache the client builds is
unchanged.
This prepares for expediting the another memory read range, which have
arbitrary address and length. `StackMemory`'s fixed buffer cannot hold a
range
of a few hundred bytes, and appending and emitting one costs three lines
with
these functions in place rather than a fourth copy of the emit loop.
Assited-by: claude
Commit: cc511140cf7437110de89e779e8328ad565aa2f1
https://github.com/llvm/llvm-project/commit/cc511140cf7437110de89e779e8328ad565aa2f1
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/QualTypeMapper.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-atomic.c
A clang/test/CodeGen/X86/x86_64-atomic-abi.c
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/lib/ABI/TargetInfo.cpp
M llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/unittests/ABI/X86TargetInfoTest.cpp
Log Message:
-----------
[LLVMABI] Handle Atomic types in the LLVM ABI library (#221367)
The LLVM ABI library's type system had no way to represent atomic types,
so Clang's QualTypeMapper was just mapping them directly to the
underlying value type. This resulted in mis-classification of some
function signatures involving atomic types.
This change adds AtomicType to the ABI type system and QualTypeMapper.
The actual classification didn't require any updates. Simply having the
atomic type as a distinct type was sufficient for it to produce the
expected results.
Assisted-by: Cursor / various models
Commit: 9ae81d242e2e77c8b7dc50cbd4769e9edf84b59b
https://github.com/llvm/llvm-project/commit/9ae81d242e2e77c8b7dc50cbd4769e9edf84b59b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
Log Message:
-----------
ARM: Constify Thumb2SizeReduction (#222973)
Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 3b5f12df5d6b0eba63be43bdfdb34af5fde20c6e
https://github.com/llvm/llvm-project/commit/3b5f12df5d6b0eba63be43bdfdb34af5fde20c6e
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Update full state of scheduler when IR changes (#222180)
Up until now the scheduler state has not been maintained fully upon IR
changes.
This is not really needed for correct operation of the current
vectorizer because scheduling happens before emitting the vectorized IR,
so there is no real need for updating the scheduler with the current
implementation. Nevertheless, the implementation may change so the right
thing to do is to make sure the scheduler's state is always correct.
So this patch implements the missing callbacks for erase, move and set
use and updates the scheduler state accordingly.
Commit: 4e72f2cb637eaf16e1b6f506c36f036f2f865c9c
https://github.com/llvm/llvm-project/commit/4e72f2cb637eaf16e1b6f506c36f036f2f865c9c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/unittests/CodeGen/SelectionDAGTestBase.h
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
M llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
M llvm/unittests/Target/X86/X86SelectionDAGTest.cpp
Log Message:
-----------
[SelectionDAG] Remove dead accessors, variables, and init parameters (NFC) (#222864)
This patch removes several dead accessors in SelectionDAG. It also
adjusts init() and its callers to remove transitively dead variables
and parameters.
SDAGISelPass / getPass:
The last use of SelectionDAG::getPass was removed on February 23, 2026
in commit 9e6a6be8a84f32072e40b27e146fa9076560274e.
RuntimeLibcallInfo / getRuntimeLibcallInfo:
Introduced on January 16, 2026 in commit
01e6245af481dac4604e8a25be6bec0dbe36f99d without any callers, and never
initialized or assigned anywhere.
ORE / getORE:
Introduced on March 30, 2017 in commit
6dd6082472d11b1e1af21e4e4e0789e49de56537 without any callers
for getORE in or out of tree.
MMI / getMMI:
The last use of SelectionDAG::getMMI was removed on July 26, 2024 in
commit 6f83a031e452bb33c0ee23b8c5c4dee97ce2bf52.
Assisted-by: Antigravity
Commit: 1b8f1a297004d99e7f9ad7188b8529153c693b3b
https://github.com/llvm/llvm-project/commit/1b8f1a297004d99e7f9ad7188b8529153c693b3b
Author: Andre Sun <andsun9999 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/index/YAMLSerialization.cpp
M clang-tools-extra/clangd/unittests/SerializationTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
Log Message:
-----------
[clangd] Add missing SymbolKind cases to YAML serialization (#222070)
The YAML index writer maps index::SymbolKind to strings through a list
of enumCase calls that was not updated when Concept, IncludeDirective,
and the template parameter kinds were added to the enum. Writing a
symbol with one of these kinds matches no case, so nothing is emitted
for the value and the next key lands on the same line, producing Kind:
Lang: C. With assertions enabled, the writer aborts rather than emitting
malformed YAML. This affects clangd-indexer --format=yaml when indexing
C++20 concepts.
Add the missing cases so the list mirrors the enum, drop the duplicate
Function entry, and add a test that round-trips every current SymbolKind
through YAML. The binary index format stores the kind as a raw byte and
is unaffected.
Fixes #206875
Commit: 445028c28190b9c883c08cb2ef69e002b65e5af9
https://github.com/llvm/llvm-project/commit/445028c28190b9c883c08cb2ef69e002b65e5af9
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Refactor instantiation of declarations within concepts (#221707)
After implementation of CWG2369, declarations are instantiated on demand
when evaluating a concept.
This was hinged on TemplateInstantiator, where we intercepted most calls
that need an instantiated declaration. This is almost identity to
SetupConstraintScope, which tries to re-instantiate any declarations to
the current scope. This patch removes SetupConstraintScope because we
can instantiate anything on demand.
The concept normalization patch brings us more troubles when we have to
deal with sugars: declarations instantiated outside of the scope (e.g. a
typedef declaration) are never added/instantiated during instantiation
of concepts: this patch makes that function also look up outer scopes
for those declarations. Note that we couldn't simply make the scope of
concepts 'transparent', since we don't want clashes of instantiated
function parameters.
Also also this added a call to instantiateMissingDeclsToScopeForConcepts
for C++26 fold expressions, before checking any pack sizes.
Fixes https://github.com/llvm/llvm-project/issues/198052
Fixes https://github.com/llvm/llvm-project/issues/209632
Commit: 2bb1a24978caa46b5d6105f4527be85a10449940
https://github.com/llvm/llvm-project/commit/2bb1a24978caa46b5d6105f4527be85a10449940
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
Rename my office hours; NFC (#222982)
Other Clang maintainers routinely come to my office hours to help field
questions, so instead of claiming these are my office hours, I'm turning
them into a more general "Clang Maintainers" office hours. I will
continue to chair them as usual, but this is a more accurate way of
describing the office hours and will hopefully encourage other Clang
maintainers to attend periodically if they have time and interest in
doing so.
Commit: 325f2558aea72388cfa3762a8efa184eba7dd3da
https://github.com/llvm/llvm-project/commit/325f2558aea72388cfa3762a8efa184eba7dd3da
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
A flang/test/Fir/OpenACC/support-analysis-varname.mlir
M flang/test/lib/OpenACC/CMakeLists.txt
A flang/test/lib/OpenACC/TestOpenACCSupport.cpp
M flang/tools/fir-opt/fir-opt.cpp
M mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
M mlir/lib/Dialect/OpenACC/Analysis/OpenACCSupport.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
M mlir/test/Dialect/OpenACC/support-analysis-varname.mlir
Log Message:
-----------
[flang][acc] Let getVariableName choose mangled or source names (#222815)
OpenACCSupport can now ask for the name the source spells or the name
the variable is emitted under. Recover names from acc.map_info and
globals, and teach Flang to demangle FIR symbols while still walking the
referenced variable for a mangled data-clause name.
Commit: 177eb76979760d4c3920dc7fa7b2976db545040b
https://github.com/llvm/llvm-project/commit/177eb76979760d4c3920dc7fa7b2976db545040b
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[NFC][Attributor] Drop the comment on the indirect-call address space cast (#222139)
Follow-up to #222097, which merged before this was addressed.
@efriedma-quic pointed out that the comment described the change rather
than the
code, and that address space zero is not relevant to the fixed code.
Removing
it; `getProgramAddressSpace()` and the cast say what is happening.
Commit: 565107727b351606963adc3f7732eaae37a0bbdb
https://github.com/llvm/llvm-project/commit/565107727b351606963adc3f7732eaae37a0bbdb
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
Log Message:
-----------
[CIR][NFC] Fix VectorElementType constraints (#222736)
Remove `CIR_AnyPtrType` from the supported types in VectorElementType
constraints
Commit: 9c809473e1a2c39b3b78e8c155e85d58f302bd79
https://github.com/llvm/llvm-project/commit/9c809473e1a2c39b3b78e8c155e85d58f302bd79
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/symstore/TestSymStore.py
Log Message:
-----------
[lldb] Add test variants to build directory name (#222792)
Fix testing with shared build directories to no longer share build
directories between build variants.
For example, use a different build directory for dwarf and dsym
variants, to prevent one variant's build artifacts from being used by
the other.
Assisted-by: claude
Commit: 10c6f34d268cc7af5a160465604dcd40a68d71e1
https://github.com/llvm/llvm-project/commit/10c6f34d268cc7af5a160465604dcd40a68d71e1
Author: Kristina Bessonova <kbessonova at accesssoftek.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
Log Message:
-----------
Revert "[AArch64][GlobalISel] Add support for TLS for ELF" (#222989)
Reverts llvm/llvm-project#220236
It seems to break scudo tests.
Commit: 0f47e798205bbaa84d12073c56d5d8c07ea65f59
https://github.com/llvm/llvm-project/commit/0f47e798205bbaa84d12073c56d5d8c07ea65f59
Author: Iasonas Karaprodromidis <iaskarapro at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.cpp
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.h
Log Message:
-----------
[lldb][Fortran] Added DWARFASTParser for Fortran (#218024)
This PR adds the DWARFASTParserFortran class returning nullptr. This is
intended to add the necessary classes for subsequent PRs to add
features.
Changes:
- Adds DWARFASTParserFortran class.
Part of the Add Fortran support to LLDB GSoC 2026 project.
Relates to #109119.
Commit: 4214b4601f498387214d5aa4ca4898fd88c28da6
https://github.com/llvm/llvm-project/commit/4214b4601f498387214d5aa4ca4898fd88c28da6
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/DirectX/SemanticSignatures.md
A llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/lib/Frontend/HLSL/CMakeLists.txt
A llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticSignaturePackingTest.cpp
Log Message:
-----------
[HLSLSemanticSignatures] Implement the stacked packing of elements (#218060)
This change defines a testing harness for the packing algorithms of
semantic signatures.
Then implements the stacked packing algorithm.
Resolves: https://github.com/llvm/llvm-project/issues/205875
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 6c68a1661af7dce1f121fd20dfce72f4ddc4afc9
https://github.com/llvm/llvm-project/commit/6c68a1661af7dce1f121fd20dfce72f4ddc4afc9
Author: Adam Scott <adamscott200322 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/X86/div-rem-i64.ll
A llvm/test/Analysis/CostModel/X86/div-rem-strictfp.ll
M llvm/test/Analysis/CostModel/X86/div.ll
A llvm/test/Analysis/CostModel/X86/masked-divrem.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/size-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-nodes-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-split-non-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[CostModel][X86] Add variable divisor div/rem costs for scalar and <=i32 vectors (#215124)
Div and rem by a variable divisor have no X86 cost entry at all, so they
fall through to the BasicTTI default and cost 1. A 20 to 40 cycle
unpipelined instruction ends up priced the same as an add.
That mattered less while vector integer division always scalarized,
since the price was wrong but the decision was usually right anyway.
After #205263 the <=i32 shapes lower through a float divide, so the
vector cost model is now describing a sequence that really exists and it
still prices it as scalarization.
This adds scalar entries plus five feature gated vector tables.
Numbers are the maximum llvm-mca Block RThroughput across the CPUs that
fold the shape with the low power lines excluded (atom and jaguar).
Vector entries take the max within the tier a CPU's feature level
selects, since the lookup takes the first matching table. Scalar takes
it across all of them.
rem is priced the same as div because a variable rem is the same
instruction and the hardware hands back the remainder in rdx or AH. For
vector the fold pays a multiply and subtract to recover it but the
divide dominates the throughput so the number doesnt change.
div-rem-strictfp.ll is new and pins the strictfp gate. Two SLP tests run
on forced negative thresholds and needed those raised so both produce
output identical to before at the new value.
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: a930601b854d881876a1b953f05f8632ade87304
https://github.com/llvm/llvm-project/commit/a930601b854d881876a1b953f05f8632ade87304
Author: Gauarv Chaudhary <137998824+ANAMASGARD at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
A llvm/test/CodeGen/WebAssembly/simd-relaxed-fptoint.ll
Log Message:
-----------
[WebAssembly] Select relaxed_trunc for vector fptosi/fptoui with +relaxed-simd (#214148)
Fixes #211273
When `+relaxed-simd` is enabled, plain vector `fptosi`/`fptoui` from `<4
x float>` to `<4 x i32>` is still lowered to
`i32x4.trunc_sat_f32x4_{s,u}`. The relaxed SIMD instructions already
exist in the backend, but they were only wired to the
WebAssembly-specific `llvm.wasm.relaxed.trunc.*` intrinsics—not to
generic `fptosi`/`fptoui` IR.
This matters for frontends like LDC that emit ordinary `fptosi` for SIMD
casts (e.g. `_mm_cvttps_epi32`-style code). With
`+simd128,+relaxed-simd`, we should prefer
`i32x4.relaxed_trunc_f32x4_{s,u}`, which typically lowers more
efficiently
on native SIMD hardware.
The fix adds two TableGen selection patterns in
`WebAssemblyInstrSIMD.td`, gated on `HasRelaxedSIMD` with
`AddedComplexity = 1`, so they win over the existing
`fp_to_sint`/`fp_to_uint` → `trunc_sat` patterns when relaxed SIMD is
available.
This does not require fast-math: for representable inputs, relaxed
truncation matches LLVM semantics; for NaN/out-of-range inputs,
`fptosi`/`fptoui` already produce poison, so the backend is not required
to preserve `trunc_sat`'s
saturating behavior.
Explicit saturating conversions (`llvm.fptosi.sat` / `fp_to_sint_sat`)
and `+simd128`-only targets are unchanged.
## Test plan
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-relaxed-fptoint.ll`
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-conversions.ll`
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll`
Signed-off-by: Gaurav Chaudhary <chaudharygaurav2004 at gmail.com>
Commit: 0a8a6c4d77ec8b103d2718f936724179246b9540
https://github.com/llvm/llvm-project/commit/0a8a6c4d77ec8b103d2718f936724179246b9540
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/lib/OpenACC/CMakeLists.txt
Log Message:
-----------
[flang][acc] Add missing dependencies for TestOpenACCSupport (#222996)
Adds missing dependencies to avoid:
undefined reference to `mlir::acc::getOrCreateGPUModule` undefined
reference to `mlir::acc::OpenACCSupport::getVariableName` after
https://github.com/llvm/llvm-project/pull/222815
Commit: 8a36fb2bfef788e6448af7791edd68fd3c0afc56
https://github.com/llvm/llvm-project/commit/8a36fb2bfef788e6448af7791edd68fd3c0afc56
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
Log Message:
-----------
[Bazel] Fixes 0f47e79 (#222999)
This fixes 0f47e798205bbaa84d12073c56d5d8c07ea65f59 (#218024).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=0f47e798205bbaa84d12073c56d5d8c07ea65f59
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5e77e2f8bc888b40753e5add3fa1bcf6e50d9b60
https://github.com/llvm/llvm-project/commit/5e77e2f8bc888b40753e5add3fa1bcf6e50d9b60
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmuladd-absorbed-copyable-sched-deps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/lcssa-phi-extract-scale.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/extractelement-insertpoint.ll
Log Message:
-----------
[SLP]Treat 2-element FP reductions as always associative
A reduction of exactly 2 elements is a single operation, so no
reassociation is possible and the associativity check is not needed.
Emit vector.reduce.fadd/fmul with the reassoc flag for such
reductions even when the scalar operation lacks it, instead of
2 extracts + scalar operation.
Reviewers: bababuck, MrSidims
Pull Request: https://github.com/llvm/llvm-project/pull/222715
Commit: 374a8320bf21962b6749965b97294e4815641cb6
https://github.com/llvm/llvm-project/commit/374a8320bf21962b6749965b97294e4815641cb6
Author: Leo Camus <leo.camus23 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/utils/cmake_format.py
M libc/utils/cmake_format_test.py
Log Message:
-----------
[libc] Write LF line endings from cmake_format.py on every platform (#222742)
I ran the libc CMake formatter on Windows and it gave back a file whose
every line had changed:
```
$ printf 'add_library(foo STATIC\n a.c\n)\n' > CMakeLists.txt
$ python libc/utils/cmake_format.py -i CMakeLists.txt
Formatted CMakeLists.txt
$ python -c "print(open('CMakeLists.txt','rb').read())"
b'add_library(foo STATIC\r\n a.c\r\n)\r\n'
```
`format_cmake_content()` joins its lines with `"\n"`, but
`process_file()` hands that string to `open(temp_file, "w",
encoding="utf-8")`, and a text-mode write substitutes the platform line
separator. So on Windows, reformatting one command in a file rewrites
the endings of the whole file. `.gitattributes` declares no `text`/`eol`
rules and `llvm/docs/GettingStarted.md` tells people to clone with
`core.autocrlf=false`, so nothing normalizes those endings back before
the commit.
The read side already normalizes: `open(..., "r")` gives universal
newlines, so a CRLF file is LF by the time the formatter sees it.
Passing `newline="\n"` on the write makes both ends agree and gives the
same bytes on every platform.
The same substitution applies to stdout, which affects the piped output
and the `--diff` text (a CRLF diff does not apply against an LF file),
so I configured stdout the same way in `main()`.
One behaviour change worth flagging: on Windows, a CMake file that
currently has CRLF endings and needs reformatting now comes out with LF
rather than CRLF. Files that are already formatted are not written at
all, before or after, since the comparison is made on the LF-normalized
read.
For the tests, everything in `cmake_format_test.py` today asserts on the
string returned by `format_cmake_content()`, so nothing covers what
lands on disk. I added two cases that compare the bytes on disk and on
stdout against that string. They fail on Windows before this change (the
assertion prints `b'...\r\n...' != b'...\n...'`) and pass after; on
Linux and macOS they pass either way, since the separator is already LF.
The file went from 47 to 49 tests, all passing under `python -m unittest
cmake_format_test`.
I did not have `black` available on that machine, so the added code
follows the surrounding style by hand rather than by running the
formatter.
AI tools used
Commit: ba1687b72476eb368641b9a9f565a38cf41b7393
https://github.com/llvm/llvm-project/commit/ba1687b72476eb368641b9a9f565a38cf41b7393
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBFile.h
M lldb/source/API/SBFile.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
Log Message:
-----------
[lldb][Windows] Remove use of unstable ABI and fix SB API visibility (#222665)
Addresses the post-commit review comments from the original PR
(https://github.com/llvm/llvm-project/pull/217126#pullrequestreview-5162589053).
- `SBFile::OpenFdFromHandle` is now visible on all platforms (just
`#ifndef SWIG`) and returns -1 by default.
- Removed non-stable `PyLong_Check` in favor of `PyErr_Occurred` and
`PyErr_Clear`.
Commit: 93b2629d1d1f52e90549e6e12901c3f51ceba273
https://github.com/llvm/llvm-project/commit/93b2629d1d1f52e90549e6e12901c3f51ceba273
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/AST/ast-dump-expr-json.c
M clang/test/C/C11/n1285_1.c
M clang/test/CodeGen/attr-counted-by-with-sanitizers.c
M clang/test/CodeGen/attr-counted-by-without-sanitizers.c
A clang/test/CodeGen/compound-literal-lifetime.c
M clang/test/CodeGenObjC/arc-ternary-op.m
M clang/test/Sema/scope-check.c
Log Message:
-----------
[clang][CodeGen] Emit lifetime markers for block-scoped compound literals in C (#219045)
In C (C99/C11/C23 §6.2.4.5), block-scoped compound literals have
automatic storage duration extending to the end of the enclosing block
scope. Previously, Clang emitted alloca storage without lifetime
markers (@llvm.lifetime.start / @llvm.lifetime.end), preventing LLVM's
StackColoring pass from merging stack slots across disjoint scopes and
inflating stack frame size.
Following John McCall's guidance in #68746:
1. In Sema, record block-scoped compound literals in ExprCleanupObjects
so
the enclosing full-expression is wrapped in an ExprWithCleanups.
2. In CodeGen, emit @llvm.lifetime.start before evaluating initializers
and
schedule CallLifetimeEnd as a cleanup.
Checking a build of an x86_64 Linux kernel defconfig build, this shaves
448 bytes off the stack usage for azx_probe(), one of the larger stack
users in the kernel.
Assisted-by: Gemini
Fixes: https://github.com/llvm/llvm-project/issues/68746
Commit: cb029994abbda52adf1986df5c6198c3e1fff4da
https://github.com/llvm/llvm-project/commit/cb029994abbda52adf1986df5c6198c3e1fff4da
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/fma-reassociate-pairs.ll
M llvm/test/Transforms/SLPVectorizer/X86/fma-operand-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassociated-fma-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/revectorized_rdx_crash.ll
Log Message:
-----------
[SLP]Allow min-VF vectorization of seed-level reduction groups
Small reduced-value groups of single-use seed-level reductions may
vectorize at VF=2, if the values are used by the reduction operations
only and no scalar leftovers remain. For fadd this replaces the
ordered reduction fallback; for the other kinds trunk leaves such
groups scalar.
Reviewers: RKSimon, bababuck, MrSidims
Pull Request: https://github.com/llvm/llvm-project/pull/222757
Commit: 4e3bec11527cdbca2e79909f7a5badd12db191a7
https://github.com/llvm/llvm-project/commit/4e3bec11527cdbca2e79909f7a5badd12db191a7
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
Log Message:
-----------
[SPIRV] Refactor implicit binding legalization (#222848)
This change rewrites the `SPIRVLegalizeImplicitBinding` pass so that
binding collection is driven by intrinsic declarations rather than a
full-module instruction walk.
Previously, the pass used an `InstVisitor` to visit every instruction in
the module and find calls to a small set of intrinsics. The new
implementation iterates over the intrinsic declarations and their users,
making the cost proportional to the number of relevant resource calls
rather than the size of the module.
There is no change to the SPIR-V emitted for existing shaders. Implicit
bindings are still assigned the same numbers.
Other improvements include:
- Order IDs are extracted once into a `SmallVector` instead of being
recomputed on each sort comparisons.
- The separate `verifyUniqueOrderIdPerResource` walk is folded into the
binding assignment loop.
- Make helpers that replace implicit binding calls static.
- Added a `HasImplicitBinding` flag for early exit and accurate
`Changed` reporting, so a module with no implicit bindings (or with a
declaration that has no users) now returns `PreservedAnalyses::all()`
instead of unconditionally invalidating analyses.
Assisted by Claude Opus 5.
This is a second attempt to land this - I accidentally merged the first
one into a stack branch:
https://github.com/llvm/llvm-project/pull/221662
Commit: 8ad4ac7d28c618d8a35229c480fc8ea912dea1ec
https://github.com/llvm/llvm-project/commit/8ad4ac7d28c618d8a35229c480fc8ea912dea1ec
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/startup/linux/startup_rules.bzl
A utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add targets for startup objects on linux (#218995)
This PR adds Bazel targets for `crt{1,i,n}.o` startup objects on Linux
x86-64.
Commit: 800e7f8f308196b27cec5880789a1519e0bee70a
https://github.com/llvm/llvm-project/commit/800e7f8f308196b27cec5880789a1519e0bee70a
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
Log Message:
-----------
[clangd] Offer Extract to Function for single expression-statements (#219945)
The tweak refused to trigger whenever the extraction zone contained a
single statement that was an expression, e.g. a lone call like
`log("connection failed");` or an overloaded-operator statement like
`std::cout << "x";`. The former was blocked by an overly broad check in
validSingleChild(); the latter additionally required
getParentOfRootStmts() to recognize that such a statement can be its own
root statement even while marked Unselected, rather than being treated
as a container of root statements.
Fixes clangd/clangd#698
Fixes clangd/clangd#1254
Assisted-by: Claude
Commit: 83d02acbcde4c84e448a4b1d52878b7bcf8ecf6f
https://github.com/llvm/llvm-project/commit/83d02acbcde4c84e448a4b1d52878b7bcf8ecf6f
Author: Dennis Duda <git at seri.tools>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/RISCV/fadd-fmul-dagcombine.ll
Log Message:
-----------
[DAGCombine] Do not gate a pre-legalization FADD fold on FMUL legality (#218748)
Now follows the same check as `fold (fadd A, (fneg B)) -> (fsub A, B)`
and `fold (fadd (fneg A), B) -> (fsub B, A)` a few lines above
Co-authored-by: Claude (Claude-Opus-5) <noreply at anthropic.com>
Commit: 18db3eee9d04da389180f907bfb1bf84bb589abd
https://github.com/llvm/llvm-project/commit/18db3eee9d04da389180f907bfb1bf84bb589abd
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/src/__support/printf_core/CMakeLists.txt
M libc/src/__support/printf_core/core_structs.h
M libc/src/__support/printf_core/parser.h
M libc/src/__support/printf_core/printf_main.h
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/UnitTest/StringUtils.h
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/parser_test.cpp
Log Message:
-----------
[libc] Template printf_core::Parser to support wchar_t. (#222988)
This is the next step in the ongoing refactor to support wide character
printf functions.
`printf_core::FormatSection` is also templated on character type as it
is required for parser_test. `FormatSection` is named in many more
places. In order to keep this PR on the smaller side, it also gets a
rename + `char` alias in the pattern of `basic_string_view` /
`string_view`.
Assisted-by: Automated tooling, human reviewed.
Commit: 241e034bcc466e368d5f61fe1836598390c58e69
https://github.com/llvm/llvm-project/commit/241e034bcc466e368d5f61fe1836598390c58e69
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/lib/Headers/altivec.h
M clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
A clang/test/SemaCXX/altivec-vec-msum-p9.cpp
Log Message:
-----------
[PowerPC] Add missing vec_msum and vec_vmsumudm builtins for POWER9 (#221199)
This patch exposes `__builtin_altivec_vmsumudm` in `BuiltinsPPC.def` and
adds the missing `vec_msum` and `vec_vmsumudm` intrinsics in
`<altivec.h>` matching GCC 11+ behavior.
Commit: abf41391777c822d4f5010b1f38d5a0f09102ea1
https://github.com/llvm/llvm-project/commit/abf41391777c822d4f5010b1f38d5a0f09102ea1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/AArch64/combine_ignore_debug.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/RISCV/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/RISCV/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Use DL.fitsInLegalInteger instead of TTI.isTypeLegal in consecutive load/store combine. (#220310)
riscv64 doesn't have a legal i32 type in the backend, but we
support i16, and i32 loads/stores. AArch64 also supports i16
loads/stores even though i16 isn't legal.
Replace TTI.isTypeLegal with DL.fitsInLegalInteger and a check for
a power of 2 number of bytes. This covers i16 and i32 for RISC-V
and i16 for AArch64.
We could further relax this to cover types that the backend can handle
by splitting, but I'd like to leave that for a future patch.
I had to update some existing tests to have more accurate datalayouts.
The RISC-V tests are reduced from existing tests from AArch64 or X86 to
show some of the load sizes that can now be matched.
Commit: 40de2ac09e4083b773c7fc4f9c701a864baad6be
https://github.com/llvm/llvm-project/commit/40de2ac09e4083b773c7fc4f9c701a864baad6be
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 18db3ee (#223009)
This fixes 18db3eee9d04da389180f907bfb1bf84bb589abd (#222988).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=18db3eee9d04da389180f907bfb1bf84bb589abd
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 318e5ab66c1496784eb16ed1af193a58c75efd59
https://github.com/llvm/llvm-project/commit/318e5ab66c1496784eb16ed1af193a58c75efd59
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-gfx11.mir
Log Message:
-----------
[AMDGPU] Do not commute DPP instructions with a non-identity dpp_ctrl (#218393)
DPP only swizzles src0, and that does not move with the operands, so
commuting changes which value each lane actually reads
Commit: dc7e9b16f229adbad90bafe1bd5685794ffb4710
https://github.com/llvm/llvm-project/commit/dc7e9b16f229adbad90bafe1bd5685794ffb4710
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/release.h
M compiler-rt/lib/scudo/standalone/tests/release_test.cpp
Log Message:
-----------
[scudo] Refactor BufferPool code slightly. (#222811)
Pass the Buffer object in buffer creation functions. Add an error
message if the dynamic buffer creation fails.
Add a threaded unit test to verify the BufferPool handles concurrent
buffer creation properly.
Also, fix a few typos in the code.
Commit: 57ad7898dc17e228c3ce1d34a53626080131f384
https://github.com/llvm/llvm-project/commit/57ad7898dc17e228c3ce1d34a53626080131f384
Author: Kiva <zengtao at iscas.ac.cn>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-load-common-alignment.ll
Log Message:
-----------
[RISCV][SLP] Use common alignment when checking constant-stride loads (#222520)
Fix SLP's constant-stride load legality check, which can widen naturally
aligned 32-bit loads into misaligned 64-bit RVV accesses and cause
`SIGBUS`.
In `BoUpSLP::canVectorizeLoads`, the check uses the first sorted load's
alignment, which may be stronger than that of later widened groups. Pass
`CommonAlignment` to `analyzeConstantStrideCandidate` instead, matching
the existing cost model and code generation. This is conservative: it
fixes the legality check without deriving a more precise alignment for
each widened group's starting address, so it may reject some otherwise
legal widening.
### Reproducer
The following reproduces the failure on the tested [SpacemiT K1 / Banana
Pi F3](https://docs.banana-pi.org/en/BPI-F3/BananaPi_BPI-F3) running
RV64 Linux, compiled with `-O3 -march=rv64gcv -mabi=lp64d
-mstrict-align`:
```c
struct Row {
unsigned x, y, padding[5];
};
_Static_assert(sizeof(unsigned) == 4, "requires 32-bit unsigned");
_Static_assert(sizeof(struct Row) == 28, "requires a 28-byte row");
__attribute__((noinline))
void gather_fields(const struct Row *p, unsigned *restrict out) {
p = __builtin_assume_aligned(p, 16);
out[0] = p[0].x + 3;
out[1] = p[0].y + 3;
out[2] = p[1].x + 3;
out[3] = p[1].y + 3;
}
int main(void) {
_Alignas(16) struct Row rows[2] = {
{5, 9, {0}}, {11, 17, {0}}};
unsigned out[4];
gather_fields(rows, out);
return out[0] != 8 || out[1] != 12 ||
out[2] != 14 || out[3] != 20;
}
```
The alignment assumption is satisfied, and the four loads at byte
offsets `0`, `4`, `28`, and `32` are naturally aligned and in bounds.
SLP widens the adjacent pairs into:
```llvm
%v = call <2 x i64> @llvm.experimental.vp.strided.load.v2i64.p0.i64(
ptr align 4 %p, i64 28, <2 x i1> splat (i1 true), i32 2)
```
On RV64 this lowers to:
```asm
li a2, 28
vsetivli zero, 2, e64, m1, ta, ma
vlse64.v v8, (a0), a2
```
whose second active lane accesses `base + 28`, which is not eight-byte
aligned. The legality check incorrectly uses alignment 16, although the
emitted intrinsic already carries `align 4`.
On the tested machine, the example raises `SIGBUS` before the fix and
returns zero afterward. The fixed compiler uses 32-bit vector loads and
retains vectorized arithmetic.
Commit: 78ae84025be3bc2e711e803b79b8515075c97a80
https://github.com/llvm/llvm-project/commit/78ae84025be3bc2e711e803b79b8515075c97a80
Author: Ambrose Leeb <aleeb at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Headers/__clang_hip_runtime_wrapper.h
A clang/test/CodeGenCUDA/pure_deleted_virtual.cu
M clang/test/Headers/hip-header.hip
M clang/test/OpenMP/nvptx_target_pure_deleted_codegen.cpp
Log Message:
-----------
[Clang] [CUDA] Provide device-side definitions of `__cxa_[pure|deleted]_virtual()` (#217427)
Currently, we don't provide definitions of these on the device side, and
since there is also no C++ runtime on the device side, if a call to a
pure or deleted virtual function makes it into the final IR, the program
will fail to assemble because `ptxas` can’t find a definition of
`__cxa_pure_virtual()` or `__cxa_deleted_virtual()`.
This patch updates Clang to emit weak definitions of these functions
that trap.
Fixes #49183, fixes #67533.
Commit: f47e8e7f5e028c0e441caa2973e5971817927a05
https://github.com/llvm/llvm-project/commit/f47e8e7f5e028c0e441caa2973e5971817927a05
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/test/CIR/CodeGen/array-ctor.cpp
R clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byref.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-vptr.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
M clang/test/CIR/CodeGen/lambda-dtor-field.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
M clang/test/CIR/CodeGenOpenACC/declare-present.cpp
M clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-byref-forward-param.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-byref-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-empty-class.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-record-packed.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-padded.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-vptr.cir
Log Message:
-----------
[CIR] Emit classic's attributes for a non-byval indirect argument (#222445)
CallConvLowering marked an indirect argument that is not byval with
llvm.byref. Classic gives this argument llvm.nofreeobj, llvm.noundef,
llvm.align, and llvm.dereferenceable instead.
A call site forwarding such a parameter used to identify it by reading
llvm.byref back, so the pass now records the parameter where the
signature rewrite creates it. The "byref" vocabulary is removed, since
it no longer names anything CIR emits.
Assisted-by: Cursor / claude-opus-5
Commit: 2e19a54753db13719d99fa126ef1a9cb2d3cc240
https://github.com/llvm/llvm-project/commit/2e19a54753db13719d99fa126ef1a9cb2d3cc240
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/cxx23.cpp
A clang/test/SemaCXX/vector-shuffle.cpp
Log Message:
-----------
[Clang][Sema] Report diagnostic for invalid mask in shufflevector (#221558)
Clang used to accept a vector with an integer representation as a valid
mask; otherwise, it reported a type mismatch. This led to accepting a
vector of booleans as a valid mask and reporting that types are not
equal if both arguments are equal but not vectors of integers.
Currently, it checks for the mask type and reports a clear error message
if the mask is a vector of bool or not a vector of integers
Fixes: #218132
Commit: 0a5aa293a4e76add0a3abefbf41320b70cb77c1f
https://github.com/llvm/llvm-project/commit/0a5aa293a4e76add0a3abefbf41320b70cb77c1f
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profdata.md
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
A llvm/test/Transforms/SampleProfile/Inputs/composite-cs-profile.proftext
A llvm/test/Transforms/SampleProfile/composite-cs-profile.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline-icall.ll
A llvm/test/tools/llvm-profdata/Inputs/composite-duplicate-type.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-empty-section.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-head-only.proftext
A llvm/test/tools/llvm-profdata/Inputs/composite-mixed-empty.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-mixed-nonempty.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-payload-oversized.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-payload-undersized.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-prepended-unknown.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-nested.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-oob.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-top.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-version-103.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-version-104.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-zero-block.proftext
A llvm/test/tools/llvm-profdata/Inputs/sample-composite-empty-lbr.proftext
A llvm/test/tools/llvm-profdata/composite-compress.test
A llvm/test/tools/llvm-profdata/composite-compressed-info.test
A llvm/test/tools/llvm-profdata/composite-empty-lbr.test
A llvm/test/tools/llvm-profdata/composite-eytzinger-split-nametable-partition.test
A llvm/test/tools/llvm-profdata/composite-head-only.test
A llvm/test/tools/llvm-profdata/composite-mixed-sections.test
A llvm/test/tools/llvm-profdata/composite-multiple-blocks.test
A llvm/test/tools/llvm-profdata/composite-payload-boundaries.test
A llvm/test/tools/llvm-profdata/composite-unknown-resume-nested.test
A llvm/test/tools/llvm-profdata/composite-version-reader.test
A llvm/test/tools/llvm-profdata/composite-vtable.test
A llvm/test/tools/llvm-profdata/composite-zero-block.test
M llvm/test/tools/llvm-profdata/sample-flatten-profile.test
M llvm/test/tools/llvm-profdata/sample-split-layout.test
A llvm/test/tools/llvm-profdata/show-composite-profile-info.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
Introduction of Composite Profile section in ExtBinary format (#166553)
New sections are introduced for storing profile of vairous types:
* SecCompositeProfile (like SecLBRProfile but can conain multi-type
profile)
* SecCompositeFuncOffsetTable (like SecFuncOffsetTable but offsets point
to SecCompositeProfile)
The only change in the structure of ExtBinary is a substitution of
SecLBRProfile and SecFuncOffsetTable sections by new (composite) ones,
so, to void duplication of layout description and handling, all changes
are done on low-level: section types are modified in the existing layout
right before profile writing.
No new profile types are introduced - this change is rather a
preparation for future profiling extentions: only LBR profile can be
inside currently.
Processing of VTable profile is unmodified.
Extended description is here:
https://discourse.llvm.org/t/rfc-typifiedprofilesection-generalized-per-function-profile-blocks-in-extbinary-format/87881
Testing of the new scenario is added to
llvm/test/tools/llvm-profdata/sample-flatten-profile.test and also new
tests are introduced.
Assisted by GPT-5.
Commit: 5afbbd04803cc2e30d6026c98b245a1599d09ac9
https://github.com/llvm/llvm-project/commit/5afbbd04803cc2e30d6026c98b245a1599d09ac9
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
A libc/src/__support/CPP/vector.h
M libc/test/src/__support/CPP/CMakeLists.txt
A libc/test/src/__support/CPP/vector_test.cpp
Log Message:
-----------
[libc][CPP] Add vector container and unit tests (#222972)
Sequential group database entrypoints require dynamically resizable
buffers to parse arbitrary-length records and member lists reliably.
Rather than managing raw heap reallocations manually within subsystem
parsers, dynamic growth is encapsulated in a dedicated cpp::vector
container.
Add cpp::vector in libc/src/__support/CPP/vector.h with move semantics,
safe fallible allocation (returning bool for out-of-memory handling
without C++ exceptions), and RAII clean-up for trivially and
non-trivially destructible types.
* Add vector header library in libc/src/__support/CPP/CMakeLists.txt
* Implement vector container in libc/src/__support/CPP/vector.h
* Add comprehensive unit tests in
libc/test/src/__support/CPP/vector_test.cpp
* Register vector_test in libc/test/src/__support/CPP/CMakeLists.txt
Assisted-by: Automated tooling, human reviewed.
Commit: 33578bd6698a455c2faef2c5a5a9652f621ec9d5
https://github.com/llvm/llvm-project/commit/33578bd6698a455c2faef2c5a5a9652f621ec9d5
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Fix lambda added in #222755 which did not build with VS2019. (#223016)
PR #222755 added a lambda which fails to compile with VS2019 as can be
seen on our bot https://lab.llvm.org/buildbot/#/builders/46/builds/41157.
This change fixes the error by explicitly adding the variable Limit to
the lambda capture list.
Commit: 652436711805b4aa035341324465c880f19d297d
https://github.com/llvm/llvm-project/commit/652436711805b4aa035341324465c880f19d297d
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/callback_parallel_regions.ll
M llvm/test/Transforms/OpenMP/custom_state_machines.ll
M llvm/test/Transforms/OpenMP/spmdization.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
M openmp/device/include/Interface.h
M openmp/device/src/Mapping.cpp
Log Message:
-----------
[OpenMPOpt] Ask the runtime how many of a block's threads can be workers (#221450)
The custom state machine gates a thread on `InitCB < BlockHwSize -
WarpSize`,
reconstructing the worker count from the block size on the assumption
that the
main thread occupies a whole warp above them. That arithmetic has to be
kept in
step with whatever launch geometry the toolchain uses, and when it is
not, the
workers in between are left in neither group, waiting for no parallel
region
while the runtime hands them iterations.
Export the number the device runtime already computes in
`mapping::getMaxTeamThreads()`, which its own generic state machine
gates on, as
`__kmpc_get_max_team_threads()`, and gate on that instead. The new entry
point is
added to the virtual-use callback that keeps the state machine's callees
alive,
and the existing `runtimeFnsAvailable()` check skips the rewrite against
an older
device runtime.
NFC upstream, where `getMaxTeamThreads()` is `BlockSize - WarpSize`. It
matters
for a toolchain whose block is not laid out that way, and it is what
lets the
arithmetic live in one place.
Depends on #221449; the first commit is from that PR.
Tested on gfx90a: `llvm/test/Transforms/{OpenMP,Attributor}` 260 passed,
1
unsupported. No kernel in the AOMP smoke and smoke-fort suites changes
execution
mode.
Commit: ecb96165dc0f95cb81267e1178f7e60a4ab7faa6
https://github.com/llvm/llvm-project/commit/ecb96165dc0f95cb81267e1178f7e60a4ab7faa6
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc:__support_fputil_fenv_impl (#223031)
Fixes https://github.com/llvm/llvm-project/pull/192079 (commit
041300fa0515) by adding missing dependency.
Commit: 4371ce908668ab70cbf9cc938657a2230cb9f417
https://github.com/llvm/llvm-project/commit/4371ce908668ab70cbf9cc938657a2230cb9f417
Author: Kevin McAfee <kmcafee at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[NFC][SLPVectorizer] Capture TTI explicitly in the cost-caching lambdas (#223020)
Follow-up to #122348, which converted a number of lambdas in this file
to capture the TTI member explicitly. Covers a couple sites that have
been added since.
Commit: e0d48310ce627ffb85c708c9c3c93d135f14de9e
https://github.com/llvm/llvm-project/commit/e0d48310ce627ffb85c708c9c3c93d135f14de9e
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
Log Message:
-----------
[CIR] Remove the NYI test case for a pointer-element vector (#223019)
#222736 removed CIR_AnyPtrType from VectorElementType, so `!cir.vector<2
x !cir.ptr<!s32i>>` no longer verifies. That stops
x86_64-aggregate-nyi.cir parsing at all, so the whole test fails rather
than just that case.
The case only pinned that the x86_64 bridge refuses the shape. No C or
C++ source produces it, since clang rejects a pointer element with
"invalid vector element type", so the verifier is the earlier and better
place for that rejection. The comment in isSupportedType justifying the
bridge-side exclusion is also removed.
Assisted-by: Cursor / claude-opus-5
Commit: 73abf955baf6a19491c1e70947b63ff411dc94aa
https://github.com/llvm/llvm-project/commit/73abf955baf6a19491c1e70947b63ff411dc94aa
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/bindings/python/get-python-config.py
Log Message:
-----------
[lldb] Use lowercase for path "lib\site-packages" on Windows. (#222816)
Using an uppercase "L" doesn't have any visible effect for most uses.
But if you create a zip file with `set(cpack_generator ZIP)`, you get a
zip file which contains both "lib/" and "Lib/". That produces odd
results if you extract it on Linux.
Commit: 64b7dfef40e59b8596a272a431aa3a4abcef33c1
https://github.com/llvm/llvm-project/commit/64b7dfef40e59b8596a272a431aa3a4abcef33c1
Author: Clemens Wasser <clemens.wasser at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/lib/Transforms/Scalar/InferAlignment.cpp
M llvm/tools/llubi/lib/Interpreter.cpp
M polly/include/polly/ScopInfo.h
Log Message:
-----------
[PassManager] Store analysis results in contiguous storage (#222003)
Store per-IR analysis results in a `SmallVector` instead of `std::list`
to avoid a heap allocation per cached analysis. The lookup map stores
the raw result pointer, which stays stable behind the unique_ptr.
geomean -0.12% for optimizing builds, clang build -0.34%
https://llvm-compile-time-tracker.com/compare.php?from=e6734a41bb41d91cb880fe7abce46d8146182518&to=4fc43802817cf8daddbebadb0b7fbfaa6286e7fe&stat=instructions:u
Commit: 2eb8c73f47c7bf6560fc6458713099fd5e1921a3
https://github.com/llvm/llvm-project/commit/2eb8c73f47c7bf6560fc6458713099fd5e1921a3
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
[AMDGPU] Expose buffer resource num_records width in TargetParser (#220103)
This also fixes the conflict in gfx12.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 9a9ed337c81c4ca2b95e5f8f7fcb449220c722ae
https://github.com/llvm/llvm-project/commit/9a9ed337c81c4ca2b95e5f8f7fcb449220c722ae
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/tools/dsymutil/Inputs/member-hash/2.o
A llvm/test/tools/dsymutil/Inputs/member-hash/debug-map.map
A llvm/test/tools/dsymutil/X86/member-hash.cpp
Log Message:
-----------
[dsymutil] Test qualified name hashing for members (#223017)
hashFullyQualifiedName walks DW_AT_specification to reach a member's
enclosing struct, so the accelerator table entry for a type nested in an
out-of-line member function definition depends on that walk. Pin the
resulting hash.
The test has lived downstream since the fix that made the function take
its DWARFDie by value instead of by pointer, where the pointee went out
of scope during the walk. Give it a debug map of its own describing
member-hash/2.o rather than extending the shared dummy-debug-map.map,
which describes a different set of objects.
rdar://184990209
Commit: e41147d567ee1f3eddc77ff3cbf505a4d5158e84
https://github.com/llvm/llvm-project/commit/e41147d567ee1f3eddc77ff3cbf505a4d5158e84
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
R llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/condbinops.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/pr148084.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/zicond-opts.ll
M llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
R llvm/test/MC/RISCV/XVentanaCondOps-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Remove Ventana Conditional Ops (#221042)
This extension is used by any silicon as far as I am aware.
If any person/company was reliant on this extension, the extension
can be added back in under the same/different name.
AI Usage: Assisted by Codex
Commit: ecb66ef84fc881eb8bea392cbd9b61f83605b196
https://github.com/llvm/llvm-project/commit/ecb66ef84fc881eb8bea392cbd9b61f83605b196
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenSYCL.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGenCXX/init-priority-attr.cpp
M clang/test/CIR/CodeGenHIP/ternary-struct-addrspace.hip
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
Log Message:
-----------
[CIR][NFCI] Refactor uses of 'mlir::Location' vs 'SourceRange' on calls/etc (#222981)
As a prerequisite to an upcoming patch, emitCall needs access to the
Clang source locations, not just the mlir::Location. We're going to need
this in quite a few more places in the future, since there are various
diagnostics that use clang locations in the code generation.
This patch also has to change the RAII source location stuff, which I
switched to SourceRange. This should improve the amount of data we give
for our source information.
I DID have to remove the assertion on it though, because we do have a
few places that intentionally wanted an invalid location if other stuff
wasn't available (see the CUDA use in particular), but otherwise this
should allow us to improve our source location info, AND use it for
diagnostics in the future.
Commit: 9a762fce97374fb1ce5d2f21f99b5a7ed584ba71
https://github.com/llvm/llvm-project/commit/9a762fce97374fb1ce5d2f21f99b5a7ed584ba71
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Implement 'simple' atomic inc/dec. (#222730)
This only works for types where a compare-exchange instruction (or just
a lock-free implementation matters) is possible, and a loop isn't
necessary. This is basically just a conversion of classic-codegen,
except it clarifies some of the logic (particularly around bools).
Commit: 28efe19f92567ec666e205b860cfd77f6f1764fc
https://github.com/llvm/llvm-project/commit/28efe19f92567ec666e205b860cfd77f6f1764fc
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/UsersManual.md
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/keep-inline-functions.c
A clang/test/CodeGen/keep-inline-functions.cpp
A clang/test/CodeGen/keep-inline-functions.cppm
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/fkeep-inline-functions.c
Log Message:
-----------
[Clang] Implement -fkeep-inline-functions (#218533)
Implement the -fkeep-inline-functions flag, which forces selected inline
function definitions to be emitted into the object file even if they
have been inlined into all their callers. The function retention
behavior follows GCC's semantics.
The front-end has been modified to:
- emit the selected functions even if they are unused; and
- add the selected functions to llvm.compiler.used/llvm.used to ensure
they are retained.
The functions selected for emission are inline function definitions that
are available in the current translation unit. available_externally
definitions are excluded because their authoritative definitions are
expected to be emitted by another translation unit.
This is also done for C99 inline function external definitions with
external linkage, which would normally be emitted into the object file
anyway, to ensure the functions are retained for LTO purposes.
See the proposed Clang documentation update for details on the function
selection criteria.
Commit: 204b703adb18599fc7f5d7b1bc0b0b410ca1ce15
https://github.com/llvm/llvm-project/commit/204b703adb18599fc7f5d7b1bc0b0b410ca1ce15
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc/test/UnitTest:string_utils (#223051)
Fixes https://github.com/llvm/llvm-project/pull/222988 (commit
18db3eee9d04) by adding missing dependencies.
Commit: 105ff16f816ffdce14b1d4895d8584971ef5192c
https://github.com/llvm/llvm-project/commit/105ff16f816ffdce14b1d4895d8584971ef5192c
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lld/test/ELF/lto/riscv-target-abi.ll
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
M llvm/test/CodeGen/RISCV/target-abi-invalid.ll
M llvm/test/MC/RISCV/target-abi-invalid.s
M llvm/unittests/Target/RISCV/RISCVBaseInfoTest.cpp
Log Message:
-----------
[RISCV] Change RISCVABI::computeTargetABI() to return Expected<ABI>
Return Expected<ABI> instead of printing to errs()/reportFatalUsageError
internally, so callers decide whether to fall back to the default ABI
or treat the failure as fatal, and so it's unit-testable. Also fold the
duplicated Hard-float 'f'/'d' ABI checks from RISCVAsmParser.cpp and
RISCVISelLowering.cpp into computeTargetABI(), and add RISCVBaseInfoTest
coverage for the error paths.
This change was created with the help of AI tools
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/213410
Commit: 51450333e1fd156fcdb20b61d7c70ed96461812b
https://github.com/llvm/llvm-project/commit/51450333e1fd156fcdb20b61d7c70ed96461812b
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
Log Message:
-----------
[BOLT][AArch64][Android] Only the dumping thread can longjmp (#222719)
`__bolt_instr_recovery_active` is a process global flag and the reader
in `boltHandleFatalAndRecover()` runs on any thread. When a dump is in
flight, another thread that fails `assert()` or exhausts `GlobalAlloc`
in `instrumentIndirectCall()` could see the flag set, longjmp with the
dumping thread's buffer and restore the dump thread's sp/fp/lr. This
is wrong since the thread would then run on the dumping thread's stack
and later release a mutex that it does not own or hold.
`GlobalWriteProfileMutex` already serializes the writers, so one buffer
would be sufficient; only the reader side needs to know who owns the
buffer. Replace the flag with `__bolt_instr_recovery_tid` holding the
owner's thread ID, and longjmp only when it matches `__gettid()`. Other
threads will fall through to just record the failure and return.
Added a `__gettid()` syscall wrapper, for aarch64 only.
Assited-by: opus
Commit: 5c27600b852b9a86b7811142482a09defd963ad3
https://github.com/llvm/llvm-project/commit/5c27600b852b9a86b7811142482a09defd963ad3
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-nonscalar.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-unsupported-kind.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture.ll
M llvm/test/CodeGen/DirectX/ResourceAtomicBinOp.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/atomic64-typed-resource.ll
Log Message:
-----------
[DirectX] Add texture support to atomicrmw lowering (#221369)
Fixes https://github.com/llvm/llvm-project/issues/218034
Fixes https://github.com/llvm/llvm-project/issues/186154
atomicrmw lowering didn't support textures. This PR adds that missing
support.
Assisted by: Claude Opus 5
Commit: 364bed30971df7fb50d7aadfc21f3996a97bf3a4
https://github.com/llvm/llvm-project/commit/364bed30971df7fb50d7aadfc21f3996a97bf3a4
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Cygwin.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
Log Message:
-----------
(NFC)[Clang][Driver] Add ToolChain::GetFilePathIfExists and use it (#221063)
Replaces patterns like `if (TC.GetFilePath("file") != "file")` to avoid
repeating `"file"`.
Commit: 393710bbf74c4e7b92226603a18ead0bba70a8a0
https://github.com/llvm/llvm-project/commit/393710bbf74c4e7b92226603a18ead0bba70a8a0
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
A llvm/test/CodeGen/AArch64/sme-za-tailcall-fpdiff-align.ll
Log Message:
-----------
Reland "[llvm][AArch64] Ensure stack alignment in non-sibcall tail calls with FPDiff" (#220406)
When a caller has a non-multiple of the minimum stack alignment more
argument stack space than the callee it is tail calling, we need to ensure that
the resulting FPDiff's magnitude has been rounded up to a multiple of the
platform's minimum stack alignment.
In this re-land there is a fixup to 234ce03692ede13ffd2fcb35570d801c1e332814,
which, because of the wrong order, wasn't actually moving NumBytes after
FPDiff had been re-aligned.
rdar://184474075
Commit: f77ec648706b957698a61e54a715bd69042ce491
https://github.com/llvm/llvm-project/commit/f77ec648706b957698a61e54a715bd69042ce491
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Fix -Wunused-lambda-capture in #223016 (#223053)
Clang will warn on this despite this being required for MSVC, so add a
workaround for now.
Commit: d42c701dc3d00dacff3806ea428a274aae39fed0
https://github.com/llvm/llvm-project/commit/d42c701dc3d00dacff3806ea428a274aae39fed0
Author: Kunal Pathak <kunalspathak at hotmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
A llvm/test/Transforms/SampleProfile/Inputs/non-probe-stale-profile-indirect-call-anchor.prof
A llvm/test/Transforms/SampleProfile/Inputs/profile-mismatch-indirect-call.prof
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-profile-mismatch-multiple-sampled-callees.prof
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-profile-mismatch-zero-callee.prof
A llvm/test/Transforms/SampleProfile/non-probe-stale-profile-indirect-call-anchor.ll
A llvm/test/Transforms/SampleProfile/profile-mismatch-indirect-call.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-profile-mismatch.ll
Log Message:
-----------
[SampleProfile] Ignore unsampled callees in profile anchors (#219335)
Sample profiles can retain zero-count callee entries in both flattened
body call targets and
unflattened callsite samples:
```text
probe 12:
foo: 10
cleanup: 0
```
Counting every entry as a distinct callee converts the uniquely sampled
foo callsite into
UnknownIndirectCallee. It then fails to match the direct IR call to foo,
causing valid
samples to be reported as stale.
Ignore zero-count entries when the same location has a sampled callee.
Preserve the existing
behavior for genuine multi-callee sites and locations where every callee
has zero samples.
```text
foo: 10, cleanup: 0 -> foo
foo: 10, bar: 1 -> UnknownIndirectCallee
foo: 0, cleanup: 0 -> unchanged
```
The change covers both:
- flattened call targets from body samples;
- inline callees from unflattened callsite samples.
## Related fixes
This is downstream profile-matching robustness related to #219079.
Those changes prevent invalid pseudo-probe context earlier in the
pipeline. This change
ensures that any zero-sample entries reaching the profile matcher are
not treated as
evidence of another executed callee.
## Tests
Added regression coverage for zero-sample callees, genuine multiple
sampled callees,
flattened body targets, and unflattened callsite samples.
Assisted by: Claude
Commit: 55221f7a2baca65325ad073eabdaf8cc18472e12
https://github.com/llvm/llvm-project/commit/55221f7a2baca65325ad073eabdaf8cc18472e12
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/Driver/flang-f-opts.f90
Log Message:
-----------
[Flang/CI] Hotfix of flang/test/Driver/flang-f-opts.f90. (#223076)
The test started failing in Flang CI after #218533. This is just a
hotfix.
Commit: 17de86741560e43304c8c013092d80ae91d401ff
https://github.com/llvm/llvm-project/commit/17de86741560e43304c8c013092d80ae91d401ff
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/IR/Dominators.cpp
Log Message:
-----------
[IR] Make verify<domtree> work in non-asserts builds (#223066)
It doesn't make sense to lose this test coverage in non-assert builds,
and I would expect a release build of opt to have a working
verify<domtree> pass. This also better matches the behavior of the other
verify<*> passes.
Commit: 242ccbf6b6d9d090762a87138c854f2d93b6ab60
https://github.com/llvm/llvm-project/commit/242ccbf6b6d9d090762a87138c854f2d93b6ab60
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
Log Message:
-----------
[BOLT] Fix -Wunused-template (#222439)
This was enabled by default in LLVM 23.1.0. It was disabled in LLVM
23.1.1, but it makes sense to fix the outstanding issues given they are
real.
Commit: 44d1d020a920341903e726506f3efefe27ea3145
https://github.com/llvm/llvm-project/commit/44d1d020a920341903e726506f3efefe27ea3145
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
Add standard libc package features to libc subpackages (#223079)
Commit: 04a04612e6696d36cd26edadddf20d1329794d2e
https://github.com/llvm/llvm-project/commit/04a04612e6696d36cd26edadddf20d1329794d2e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
Log Message:
-----------
[mlir][Cpp] Stop using Operation::getAttrs (NFC) (#223080)
Only discardable attributes on multi-result func.return operations are
C++ tuple arguments; the operation has no inherent attributes relevant
to the translation.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: b5874129d921518823d257770c742da2a860b2cf
https://github.com/llvm/llvm-project/commit/b5874129d921518823d257770c742da2a860b2cf
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Do not hoist fir.field_index out of loops (#222891)
Lowering a consumer of a !fir.field value inspects its defining
operation: for a record whose layout is known at compile time the field
becomes an LLVM GEP struct index, which must be a constant, and
otherwise the `field` attribute is read off the defining op. A field
value therefore may not be a block argument.
LICM broke that. fir.field_index is Pure and takes no operands, so it is
trivially loop-invariant and was hoisted out of the loop. Lowering emits
one inside each arm of a construct -- for example the CASEs of a SELECT
CASE that each pass a different component of the same derived type as an
actual argument -- so hoisting them left those arms as
otherwise-identical blocks differing only in that operand. Block merging
then merged them and threaded the field through a new block argument,
and codegen aborted with "must be a constant".
Leave producers of a !fir.field where they are. The arms then differ by
an operation rather than by an operand, so they are no longer merge
candidates. Consumers are unaffected and still hoist: fir.coordinate_of
uses the attribute form of the field, so it does not depend on the
fir.field_index value.
The check keys on the result type rather than on FieldIndexOp so that
any operation producing a !fir.field is covered, and sits in the
predicate shared by the direct-loop and nested-region hoisting paths.
Commit: f795e9526254f4d1cee4855b40041d5797d2f676
https://github.com/llvm/llvm-project/commit/f795e9526254f4d1cee4855b40041d5797d2f676
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Shape/IR/Shape.cpp
Log Message:
-----------
[mlir][Shape] Stop using Operation::getAttrs in printers (NFC) (#223083)
Print only discardable attributes after inherent fields are handled by
the custom assembly formats.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: bb14dc958cbb7f9742f37cbae6d290a0997e7299
https://github.com/llvm/llvm-project/commit/bb14dc958cbb7f9742f37cbae6d290a0997e7299
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/toy/Ch2/mlir/Dialect.cpp
M mlir/examples/toy/Ch3/mlir/Dialect.cpp
M mlir/examples/toy/Ch4/mlir/Dialect.cpp
M mlir/examples/toy/Ch5/mlir/Dialect.cpp
M mlir/examples/toy/Ch6/mlir/Dialect.cpp
M mlir/examples/toy/Ch7/mlir/Dialect.cpp
Log Message:
-----------
[mlir][Toy] Stop using Operation::getAttrs (NFC) (#223082)
Print only discardable attributes in Toy custom operation printers.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: c7a7f8364a1335b8938af2113fd8ec43cd3a2c47
https://github.com/llvm/llvm-project/commit/c7a7f8364a1335b8938af2113fd8ec43cd3a2c47
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Utils/StructuredOpsUtils.cpp
Log Message:
-----------
[mlir] Stop using Operation::getAttrs in dialect utilities (NFC) (#223081)
Copy operation properties and discardable attributes separately.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 4cec7e6e3082e8abbee08f90db3c353c4c379bdb
https://github.com/llvm/llvm-project/commit/4cec7e6e3082e8abbee08f90db3c353c4c379bdb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SMT/IR/SMTOps.cpp
Log Message:
-----------
[mlir][SMT] Stop using Operation::getAttrs (NFC) (#223086)
Print only discardable attributes after inherent fields are handled by
the custom operation printers.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 0cc524fdf4becec3763cd50930de5156d76ba1d4
https://github.com/llvm/llvm-project/commit/0cc524fdf4becec3763cd50930de5156d76ba1d4
Author: nvptm <pmathew at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-declare-globals.f90
M flang/test/Lower/module-parameter-linkonce-odr.f90
Log Message:
-----------
[flang][OpenACC] Do not emit declare ctor/dtor for module PARAMETER variables (#222993)
A module PARAMETER in !$acc declare is already emitted as an initialized
device global. A host ctor/dtor would still register that same symbol
with the runtime. Skip the registration pair and keep acc.declare so the
constant is
still emitted as an initialized global in the GPU module.
Commit: 5f09d40446ffbcd92d9e1a2a14bae974eb445cdb
https://github.com/llvm/llvm-project/commit/5f09d40446ffbcd92d9e1a2a14bae974eb445cdb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp
Log Message:
-----------
[mlir][PDLInterp] Stop using Operation::getAttrs (NFC) (#223088)
Print the discardable dictionary after the inherent fields handled by
the custom assembly format.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 641dc586869b21dc42785aa72949ed57c408204e
https://github.com/llvm/llvm-project/commit/641dc586869b21dc42785aa72949ed57c408204e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/docs/CodingConventions.md
M orc-rt/include/orc-rt-c/support/CoreTypes.h
M orc-rt/include/orc-rt-c/support/Error.h
A orc-rt/include/orc-rt-c/support/RTTI.h
M orc-rt/include/orc-rt/support/Error.h
M orc-rt/include/orc-rt/support/RTTI.h
M orc-rt/lib/support/Error.cpp
M orc-rt/lib/support/RTTI.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/Inputs/RTTICrossDylibTestError.h
A orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.cpp
A orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.h
M orc-rt/test/unit/support/CAPICompileTest.c
M orc-rt/test/unit/support/ErrorCAPITest.cpp
M orc-rt/test/unit/support/ErrorExceptionInteropTest.cpp
M orc-rt/test/unit/support/ErrorTest.cpp
A orc-rt/test/unit/support/RTTICrossDylibTest.cpp
M orc-rt/test/unit/support/RTTITest.cpp
Log Message:
-----------
[orc-rt] Refactor RTTI for cross-library support, add C API (#222946)
Identify types by name rather than by the address of a per-type ID
object, so that a type's identity survives crossing a library boundary:
an object may be constructed by one library and have its type queried by
another, each with its own copy of orc-rt, where per-type addresses
would not agree. Participating classes now declare an RTTIName, which
must be unique across the process.
RTTIRoot records which library produced each value, so same-library
queries still resolve by pointer comparison, and only cross-library ones
fall back to strcmp.
Adds orc-rt-c/support/RTTI.h to expose this to C.
ORC_RT_RTTI_PARTICIPANT and ORC_RT_C_RTTI_IMPL declare and define a
per-type cast entry point, reached via ORC_RT_DYNCAST, alongside
orc_rt_RTTIRoot_getTypeName for logging. This replaces the
orc_rt_Error_TypeId API (orc_rt_Error_getTypeId,
orc_rt_StringError_getTypeId), which exposed ID addresses and so could
not work across libraries. orc_rt_ErrorRef moves from CoreTypes.h to
Error.h.
RTTICrossDylibTest checks identity across a real boundary: its helper
library links its own copy of orc-rt-bedrock, giving it a distinct
library ID.
Commit: 80bc02604c4ecec507c906552db3e03e5efdaee3
https://github.com/llvm/llvm-project/commit/80bc02604c4ecec507c906552db3e03e5efdaee3
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/lib/Optimizer/OpenACC/Transforms/ACCRecipeBufferization.cpp
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
Log Message:
-----------
[flang][OpenACC] Allocate bufferized recipe descriptors in device memory (#223028)
ACCRecipeBufferization places the descriptor of a bufferized recipe
clause next to the variable it holds. When the clause sits inside a
compute construct and the variable is already produced by a data entry
operation, that memory is host memory no data clause maps, so device
code reading the descriptor through it gets a host address.
Place the descriptor in the construct region in that case. The region is
device memory and needs no data clause of its own, and the mapped
variable is a legal live-in since a data entry operation produces it.
The region entry block is used rather than the clause operation so that
a clause on a nested loop does not allocate on every iteration.
Assisted-by: Cursor
Commit: a8e989fe377385906abdda1f965622fe83941fd4
https://github.com/llvm/llvm-project/commit/a8e989fe377385906abdda1f965622fe83941fd4
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir
M mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
Log Message:
-----------
[mlir][OpenACC] Preserve reduction mappings during materialization. (#222189)
Create or reuse structured reduction mappings before compute-construct
reduction recipes are consumed. Materialize initialization and
combination against the mapped value while leaving nested loop
reductions unchanged.
Assisted-by: Cursor
Commit: 4d10444e7d4c8fcb6533522f39cd0ffb88497253
https://github.com/llvm/llvm-project/commit/4d10444e7d4c8fcb6533522f39cd0ffb88497253
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
Log Message:
-----------
[mlir][OpenACC] Restrict implicit data to compute constructs (#222759)
acc.kernel_environment contains host-side preparation around an outlined
compute region; it is not itself an OpenACC compute construct. Treating
all of its live-ins as implicit device mappings can map
compiler-generated host operations and assign them kernels-style copy
semantics.
Limit ACCImplicitData to parallel, kernels, and serial. In particular,
do not process kernel_environment or the lowered compute_region form.
Assisted-by: Cursor
Commit: 329f45430835fe803b753ac78fc823b5dfc5df69
https://github.com/llvm/llvm-project/commit/329f45430835fe803b753ac78fc823b5dfc5df69
Author: Douglas <Douglas.Gliner at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SafeStack.cpp
A llvm/test/Transforms/SafeStack/X86/pointer-address-domtree.ll
Log Message:
-----------
[CodeGen][SafeStack] Successful InlineFunction should force a recalculation of potentially stale DominatorTree (#222820)
In commit 51a25846c198, Safe Stack began preserving the `DominatorTree`
by the end of the pass' run. Updates to the `DominatorTree` were then
made lazily via inclusion of `DomTreeUpdater` and its use with
`SplitBlockAndInsertIfThen`. Preservation was maintained when updated to
the new pass manager in 3bd517205799. However, there was an overlooked
case where the `DominatorTree` would remain stale by the end of the Safe
Stack pass if the actions under `TryInlinePointerAddress` completed
successfully and modified the caller's CFG.
The conditions for a stale `DominatorTree` to exist are roughly:
1. Safe Stack obtains the Unsafe Stack pointer location as a `CallInst`
(i.e. one way is `-safestack-use-pointer-address`)
2. `__safestack_pointer_address` is defined and inlined successfully.
3. The inlining changes the CFG such that a recalculated `DominatorTree`
would differ.
4. `DominatorTree` remains unchanged since it is preserved and currently
not recalculated.
Here's a simple example that demonstrates the issue:
```
@unsafe_stack_pointer_a = thread_local global ptr null
@unsafe_stack_pointer_b = thread_local global ptr null
declare i32 @get_runtime_mode() nounwind willreturn memory(none)
declare void @escape(ptr)
define ptr @__safestack_pointer_address() alwaysinline {
entry:
%first = call i32 @get_runtime_mode()
%use_a = icmp eq i32 %first, 0
br i1 %use_a, label %a, label %b
a:
ret ptr @unsafe_stack_pointer_a
b:
ret ptr @unsafe_stack_pointer_b
}
define i32 @caller() safestack {
entry:
%unsafe = alloca i32, align 4
call void @escape(ptr %unsafe)
%second = call i32 @get_runtime_mode()
ret i32 %second
}
```
```
> opt -mtriple=x86_64-pc-linux-gnu -safestack-use-pointer-address -passes=require<libcall-lowering-info>,function(safe-stack,verify<domtree>) -disable-output example.ll
DominatorTree is different than a freshly computed one!
Current:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
[1] %entry {4294967295,4294967295} [0]
Roots: %entry
Freshly computed tree:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
[1] %entry {4294967295,4294967295} [0]
[2] %a.i {4294967295,4294967295} [1]
[2] %__safestack_pointer_address.exit {4294967295,4294967295} [1]
[2] %b.i {4294967295,4294967295} [1]
Roots: %entry
```
To avoid a stale `DominatorTree` by the end of the Safe Stack pass, I
propose calling `recalculate` on the `DominatorTree` for the function
which will have the call to `__safestack_pointer_address` inlined
assuming the inlining was successful and `DomTreeUpdater` is non-NULL.
Commit: 923902483c7a6937a65b9679795a247ae2a2ad56
https://github.com/llvm/llvm-project/commit/923902483c7a6937a65b9679795a247ae2a2ad56
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/Host/SafeMachO.h
Log Message:
-----------
[lldb] Attempt to unbreak building lldb with the 27 SDK (#223090)
See this report:
https://github.com/llvm/llvm-project/pull/222721#issuecomment-5636252813
Commit: 4e3b379b6cfcd13a11e26834756519430a9f9377
https://github.com/llvm/llvm-project/commit/4e3b379b6cfcd13a11e26834756519430a9f9377
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/CAPI/Wrap.h
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Query/Matcher/Marshallers.h
M mlir/include/mlir/Support/DebugStringHelper.h
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/lib/Dialect/Shard/Transforms/Partition.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Tools/mlir-pdll-lsp-server/Protocol.cpp
Log Message:
-----------
[MLIR] Fix -Wunused-template (#221480) (#223094)
This warning was enabled by default for clang 23 (although reverted in
23.1.1). Given someone might enable it in the future and the cleanup
seemed nice, we should just do it.
This was done primarily by removing static from templates in headers and
then deleting any unused templates in translation units.
Previously attempted to land this in #221480, but accidentally merged
into a user branch rather than main.
Commit: 675cfb91660e20bfc17456f347c01c310322fc9d
https://github.com/llvm/llvm-project/commit/675cfb91660e20bfc17456f347c01c310322fc9d
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
A llvm/test/CodeGen/NVPTX/atomics-system-scope-sm50.err.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
Log Message:
-----------
[NVPTX] Error on atomics with system scope pre-sm60 (#222458)
Pre-SM60, atomics could only have device scope.
`NVPTXDAGToDAGISel::getAtomicScope` can conservatively emit device scope
for all scopes that are not system scope. For system scope, we need to
error out.
This resolves a TODO in llvm/test/CodeGen/NVPTX/cmpxchg.ll. Update that
and llvm/test/CodeGen/NVPTX/cmpxchg.ll to use SM60 now, demonstrating
correct lowering for system scope.
Commit: 5618cfdae27157a48ea670e6d817310404afb746
https://github.com/llvm/llvm-project/commit/5618cfdae27157a48ea670e6d817310404afb746
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Remove hasCZEROLike() in favor of directly checking for Zicond Extension (#221053)
Only Zicond implements a CZero-Like instruction now that Ventana
Conditional Operations have been removed.
Commit: 7727fb8eaed54b90d08a35fca4896a21a04349b2
https://github.com/llvm/llvm-project/commit/7727fb8eaed54b90d08a35fca4896a21a04349b2
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
Log Message:
-----------
[NFC][AMDGPU] Add tests for converting an i64 that fits in 32 bits (#223030)
It is converted with the full i64 expansion. The shifts by 31 leave a
value that does not fit.
The idea is to optimize conversion of an i64 that fits in 32 bits from
its low half.
Commit: 355cbe15b1c7694cab8590ecd773087b78a31121
https://github.com/llvm/llvm-project/commit/355cbe15b1c7694cab8590ecd773087b78a31121
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[IVDescriptors] Implement MonotonicDescriptor (#214490)
RFC link:
https://discourse.llvm.org/t/rfc-loop-vectorization-of-compress-store-expand-load-patterns/86442
"Monotonic" variable is similar to induction variable, but its value is
updated under some condition, e.g.:
```
int idx = 0;
for(int i = 0; i < n; ++i) {
// some uses of idx
if (cond)
++idx;
}
```
In this example, `i` is induction variable and `idx` is monotonic
variable: it's updated only when cond == true. In LLVM IR, this looks
like:
```
loop_header:
%monotonic_phi = phi [ %start, %preheader ], [ %update, %latch ]
br i1 %do_step, label %step_bb, label %latch
step_bb:
%step = add/gep %monotonic_phi, %step_val
br label %latch
latch:
%update = phi [ %monotonic_phi, %loop_header ], [ %step, %step_bb ]
br label %loop_header
```
This initial patch only matches the case where `%update` directly
selects between the `%monotonic_phi` or the step. We also limit the
descriptor to only matching cases where all users of the
`%monotonic_phi` are loads/stores that can be mapped to expandloads or
compresstores.
This is a continuation Sergey Kachkov's patch (#140720).
---------
Co-authored-by: Sergey Kachkov <sergey.kachkov at syntacore.com>
Commit: 4e865028f0563584bde4e54858855ba4f45946ad
https://github.com/llvm/llvm-project/commit/4e865028f0563584bde4e54858855ba4f45946ad
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.ll
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.mir
Log Message:
-----------
[AArch64] Form CCMP for CBB and CBH (#221113)
AArch64ConditionalCompares forms CMP/CCMP chains to transform patterns
such as
Head Head
/ | CmpBB
/ | / |
| CmpBB => / |
| / | Tail |
| / | | |
Tail | | |
| | | |
... ... ... ...
where Head is terminated by a conditional branch and CmpBB contains
a cmp + conditional branch.
We usually try to split any fused conditional branches to be able to
form CCMP. However, in the case of CBB and CBH, splitting the fused
conditional branch in CmpBB could require the insertion of explicit
zero- or sign-extensions for both operands. In the Head block we can
cheaply fuse at least one of the extensions into cmp.
We therefore convert CBB and CBH unconditionally when we find them in
the Head block. In the CmpBB block, we only do the transformation if
neither operands needs an extension.
Commit: 2c30f74239871203b0a998cd4797e01c3338a9fa
https://github.com/llvm/llvm-project/commit/2c30f74239871203b0a998cd4797e01c3338a9fa
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
A llvm/test/Transforms/RelLookupTableConverter/AArch64/dynamic_relocs.ll
M llvm/test/Transforms/RelLookupTableConverter/AArch64/no_relative_lookup_table.ll
R llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
A llvm/test/Transforms/RelLookupTableConverter/relative_lookup_table.ll
Log Message:
-----------
[llvm] Avoid PREL32 overflow to .data.rel.ro on AArch64 and re-enable (#222809)
Under the [AArch64 Small Code
Model](https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst#code-models),
the text segment (containing .text and .rodata) is limited to 2GB, but
the combined span of text and data segments can be up to 4GB.
When a relative lookup table is emitted in .rodata but references target
operands that require dynamic relocations (placed in .data.rel.ro in the
data segment), the distance between .rodata and .data.rel.ro can legally
exceed the 2GB range of signed 32-bit R_AARCH64_PREL32 relocations.
In this PR:
1. Ensure that on AArch64, lookup table operands do not need dynamic
relocations. If the lookup table were in `.rodata` (text segment), then
any of the target components would need to be in the data segment, so
the dynamic reloc check would suffice.
2. Re-enable RelLookupTableConverter for AArch64 (while keeping Darwin
disabled as before).
3. Limit the existing `AArch64/no_relative_lookup_table.ll` test to just
darwin aarch64.
4. Move the `X86/relative_lookup_table.ll` into the parent dir since
those checks are (mostly) generic, and allow those same checks to be run
for aarch64. That also includes a minor refactor for not checking the
`unnamed_addr` bit since `unnamed_addr` is
[dropped](https://github.com/llvm/llvm-project/blob/6959b7d081df5fb2349e67e0d8e8e87841fa10d9/llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp#L82)
for aarch64.
AI: Gemini was used to help make this patch and debug the issue. I
reviewed this PR to the best of my ability before submitting.
Commit: f471750e042c5da3daf947169c0125e58300df0d
https://github.com/llvm/llvm-project/commit/f471750e042c5da3daf947169c0125e58300df0d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/CIR/CleanupAndEHDesign.md
Log Message:
-----------
[CIR] Document dynamic exception specification design (#222451)
This change adds documentation for the CIR handling of dynamic exception
specification handling in pre-C++17 code. This is not yet implemented.
The implementation will follow in a series of changes based on this
design.
This documentation was generated by Claude Opus 5, based on an
interactive planning session in which I worked out the details of how I
want to implement this feature. I have carefully read the entire
document to verify that it correctly matches my intended implementation.
Commit: 5b1d7415a6cf8f4799b4f586417346abf0c56e84
https://github.com/llvm/llvm-project/commit/5b1d7415a6cf8f4799b4f586417346abf0c56e84
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
A flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Synchronize context before finalization (#223058)
Commit: e471938cf2c9647a33458eed6ad5647b6323d153
https://github.com/llvm/llvm-project/commit/e471938cf2c9647a33458eed6ad5647b6323d153
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/AggressiveInstCombine/RISCV/lit.local.cfg
Log Message:
-----------
[AggressiveInstCombine] Add lit.local.cfg to RISCV test directory. NFC (#223067)
To fix buildbot failures after #220310.
Commit: fe36473cb62cca28c14b7174c0797cb74bcdfc7e
https://github.com/llvm/llvm-project/commit/fe36473cb62cca28c14b7174c0797cb74bcdfc7e
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Let amdgcn_lerp and ds_swizzle use the generic codegen path (#222204)
__builtin_amdgcn_lerp and __builtin_amdgcn_ds_swizzle both map 1:1 onto
concrete (non-overloaded) intrinsics and carry the ClangBuiltin<> marker
in IntrinsicsAMDGPU.td, so EmitBuiltinExpr already lowers them
automatically by forwarding the arguments to the intrinsic.
Commit: bb962e790106c624e0668118d0b7d92c706c2da4
https://github.com/llvm/llvm-project/commit/bb962e790106c624e0668118d0b7d92c706c2da4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/bedrock/SocketHandle.h
M orc-rt/lib/bedrock/CMakeLists.txt
A orc-rt/lib/bedrock/sys/posix/SocketHandle.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/SocketHandleTest.cpp
A orc-rt/test/unit/bedrock/SocketTestUtils.h
A orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp
Log Message:
-----------
[orc-rt] Add SocketHandle, NativeSocketHandle APIs (#223114)
SocketHandle is an owning wrapper for a NativeSocketHandle value, and
closes the native socket on destruction.
NativeSocketHandle is a typedef for the platform's native socket handle
type.
Only POSIX is implemented in this patch (in sys/posix/SocketHandle.cpp).
Windows support will be added later.
This will be used for an upcoming SimpleRemote-based ControllerAccess
implementation that uses sockets for transport (SocketSimpleRemoteCA).
Commit: 25fe99bf939c50c7064e714a7edcbeb445bb9dc1
https://github.com/llvm/llvm-project/commit/25fe99bf939c50c7064e714a7edcbeb445bb9dc1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
M llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
Log Message:
-----------
[ORC] Retire rt::SimpleExecutorMemoryManager* for sps_ci (#223113)
Move all clients to the sps_ci SimpleNativeMemoryMap / MemMgr
counterparts and retire the old rt::SimpleExecutorMemoryManager*
interface names.
Commit: 64a6af1666c9bbb63eb86c0697a3709a4cca8e50
https://github.com/llvm/llvm-project/commit/64a6af1666c9bbb63eb86c0697a3709a4cca8e50
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIROpenCLAttrs.cpp
A clang/test/CIR/IR/invalid-version.cir
A clang/test/CIR/IR/version.cir
M clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
Log Message:
-----------
[CIR][OpenCL] Add OpenCL language version module attributes (#219687)
Add structured CIR module attributes for OpenCL and C++ for OpenCL
language versions. Verify their module-level placement and version
components so lowering can consume explicit source-language version
state.
Assisted-by: Codex / GPT-5.6 Sol
Commit: ba3010d7e4520b6aee926f878c5c1771f1c2a6f3
https://github.com/llvm/llvm-project/commit/ba3010d7e4520b6aee926f878c5c1771f1c2a6f3
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
A clang/test/CIR/CodeGenOpenCL/version.cl
M clang/test/CodeGenCUDASPIRV/kernel-cc.cu
M clang/test/CodeGenHIP/hipspv-kernel.cpp
A clang/test/SemaHIP/atomic-init.hip
Log Message:
-----------
[CIR][OpenCL] Emit OpenCL language version metadata in CIR (#219688)
Emit OpenCL and C++ for OpenCL language version attributes from CIRGen.
Preserve the compatible OpenCL version and the C++ for OpenCL version
separately so later lowering does not infer one from the other.
Assisted-by: Codex / GPT-5.6 Sol
Commit: 070455b3f2f77dbd1d5121a9d1bc3d9a3e3f65bc
https://github.com/llvm/llvm-project/commit/070455b3f2f77dbd1d5121a9d1bc3d9a3e3f65bc
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ConvertMemberFunctionsToStaticCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/readability/convert-member-functions-to-static.cpp
Log Message:
-----------
[clang-tidy] Fix convert-member-functions-to-static crash on attributed methods (#223007)
Fixes #222951
Commit: 78f557806dca9c81453e94c038409fb9ad49d063
https://github.com/llvm/llvm-project/commit/78f557806dca9c81453e94c038409fb9ad49d063
Author: shivaramaarao <58245296+shivaramaarao at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/omp-lib-integer-wrappers.f90
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M openmp/device/include/Interface.h
M openmp/device/src/State.cpp
M openmp/module/omp_lib.F90.var
M openmp/runtime/src/dllexports
M openmp/runtime/src/include/omp.h.var
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_csupport.cpp
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_ftn_os.h
M openmp/runtime/src/kmp_stub.cpp
A openmp/runtime/test/api/kmp_integer_8_apis.f90
Log Message:
-----------
[OpenMP] [Flang] Add Fortran integer(kind=8) overloads for omp_lib APIs (#221451)
Fortran code that uses integer(8) arguments, including
-fdefault-integer-8, did not match omp_lib interfaces declared with
omp_integer_kind (typically kind 4). Added *_8 specific procedures to
named generic interfaces in omp_lib, exported matching Fortran and C
runtime entry points, and implemented the *_8 functions as thin wrappers
that saturate-convert arguments to 32-bit and call the existing APIs.
Commit: a67c8f208e8710ad8b6b6e2ca4de57e4e0db7178
https://github.com/llvm/llvm-project/commit/a67c8f208e8710ad8b6b6e2ca4de57e4e0db7178
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Frontend/FrontendActions.cpp
M flang/test/Driver/frame-pointer-forwarding.f90
A flang/test/Transforms/function-attr-frame-pointer.fir
Log Message:
-----------
[Flang][Driver]Implemented support for option -momit-leaf-frame-pointer/-mno-omit-leaf-frame-pointer in flang (#216700)
Added support for `-momit-leaf-frame-pointer` /
`-mno-omit-leaf-frame-pointer` in the Flang compiler.
- The driver resolves the flags via `getFramePointerKind()` and forwards
`-mframe-pointer=<kind>` to flang -fc1, resulting in the LLVM IR
function attribute "frame-pointer"
- These options, used with `-fno-omit-frame-pointer`, control whether
leaf functions (functions that don't call other functions) retain or
omit the frame pointer.
- `fno-omit-frame-pointer -momit-leaf-frame-pointe`r : Keep the frame
pointer in non-leaf functions, but omit it in leaf functions (produces
"frame-pointer"="non-leaf").
- `fno-omit-frame-pointer -mno-omit-leaf-frame-pointe`r : Keep the frame
pointer in all functions, including leaf functions (produces
"frame-pointer"="all").
Commit: 4388400c3d0a95b75a36f81c7edd2eb95c6d63ea
https://github.com/llvm/llvm-project/commit/4388400c3d0a95b75a36f81c7edd2eb95c6d63ea
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/IR/TypeDetail.h
M mlir/test/IR/invalid-builtin-types.mlir
M mlir/test/IR/parser.mlir
Log Message:
-----------
[mlir] Remove the memory space attribute restriction on memref types (#222995)
Follow-up to #187682. `isSupportedMemorySpace` only rejected builtin
attributes other than IntegerAttr/StringAttr/DictionaryAttr. This is a
leftover from when memory spaces were restricted to integers, and is now
inconsistent.
Commit: eff88db8f004bf74c54c65bd39a3fc2fb27969f0
https://github.com/llvm/llvm-project/commit/eff88db8f004bf74c54c65bd39a3fc2fb27969f0
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
M clang/test/CIR/CodeGenOpenCL/version.cl
A clang/test/CIR/Lowering/opencl-version-metadata.cir
Log Message:
-----------
[CIR][OpenCL] Lower OpenCL language version metadata to LLVM dialect (#219689)
Propagate CIR OpenCL language version module attributes as LLVM dialect
named metadata before LLVM IR translation.
Assisted-by: Codex / GPT-5.6 Sol
Commit: cebfe6c25f45c81f7be238c835828b97f48730ab
https://github.com/llvm/llvm-project/commit/cebfe6c25f45c81f7be238c835828b97f48730ab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/IR/Verifier.cpp
A llvm/test/Assembler/llvm.loop.align.ll
A llvm/test/Verifier/llvm.loop.align.ll
Log Message:
-----------
IR: Add verifier checks and LangRef for llvm.loop.align (#221933)
Verify the nested !{!"llvm.loop.align", i32 N} tag.
Require exactly two operands, an integer constant of type i32 or
smaller, and a positive power-of-two value
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 1f13035dd3bec940226402c59bbb086ab703caeb
https://github.com/llvm/llvm-project/commit/1f13035dd3bec940226402c59bbb086ab703caeb
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.verify.cpp
Log Message:
-----------
[libc++] Test LWG4113: Disallow `has_unique_object_representations<Incomplete[]>` (#169446)
We have been rejecting `has_unique_object_representations<Incomplete[]>`
since LLVM 6.
Some related change landed in Clang 19 due to
6451806ef73bb033be3f6e1599f3bcb224943206, and then a follow-up change
ae9990ed965118e7274a52399b43e3b9fb419a54 simplified error messages.
Test coverage for incomplete enumeration types is skipped for Clang-cl
mode, because an incomplete enumeration type is incorrectly considered
to be complete. See https://llvm.org/PR169472.
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 25728f8e380096df53f3aa966068ec3a24271b30
https://github.com/llvm/llvm-project/commit/25728f8e380096df53f3aa966068ec3a24271b30
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
A llvm/test/CodeGen/AArch64/misched-postra-only1.mir
Log Message:
-----------
[MISched] Fix post-RA pickOnlyChoice debug logs (#222927)
On the way, adding a stable test for `pickOnlyChoice()` scheduling paths
directly, which has been missing, while filechecking the fixed tracing.
Commit: cad1b33322a4000bad6974b4c40ee5bff987eb89
https://github.com/llvm/llvm-project/commit/cad1b33322a4000bad6974b4c40ee5bff987eb89
Author: lntue <lntue at google.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
Log Message:
-----------
[libc] Pass correct system include flag for macOS. (#223116)
Commit: e17b8cb5341d42f805c538236771edafa737a87e
https://github.com/llvm/llvm-project/commit/e17b8cb5341d42f805c538236771edafa737a87e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/TargetParser/Triple.cpp
A llvm/test/Assembler/module-flags-thread-model.ll
A llvm/test/Linker/module-flags-thread-model.ll
A llvm/test/Verifier/module-flags-thread-model.ll
Log Message:
-----------
IR: Introduce "thread-model" module flag (#222768)
Introduce the replacement for TargetOptions::ThreadModel, but
does not yet wire up the uses. This maintains the current values,
but I question if it makes sense to retain "posix" as the default.
POSIX sounds very target opinionated, but isn't used in a non-binary
way anywhere. Alternatively we could have a simple singlethread binary
flag, or name this something more general.
Follows the precedent of float-abi. It happens the triple default
is just POSIX, but theoretically targets like AVR should be defaulting
to singlethread.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 2706780356665d560cc5a38dee91e7377a6d6002
https://github.com/llvm/llvm-project/commit/2706780356665d560cc5a38dee91e7377a6d6002
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
[InstCombine] support trunc condition in foldSelectICmpAndAnd (#223132)
Reland https://github.com/llvm/llvm-project/pull/220690 with the fix for
asan failure see fixup commit
Commit: d41121260c37b1be088995b375d074f198942114
https://github.com/llvm/llvm-project/commit/d41121260c37b1be088995b375d074f198942114
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/machine-outliner-lpad.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/MC/RISCV/tail-call.s
Log Message:
-----------
[RISCV] Add PseudoTAILX7, PseudoTAILReg for cf-protection-branch (#220657)
Previously, PseudoTAIL selected between X6 and X7 at encode time by
checking the Zicfilp feature bit via getTailExpandUseRegNo. This is
incorrect for the codegen path because -fcf-protection=branch can emit
lpad without requiring Zicfilp to be enabled.
Add PseudoTAILX7 for codegen: when cf-protection-branch is active,
ISelLowering and the machine outliner now emit PseudoTAILX7 which
always expands using X7. The existing PseudoTAIL behavior is unchanged
— it still selects X6 or X7 based on Zicfilp at encode time, as
documented in the assembler manual.
Also add PseudoTAILReg ("tail address, register") assembly form that
lets users explicitly specify the scratch register for AUIPC+JALR
expansion, per the proposed syntax in
https://github.com/riscv-non-isa/riscv-asm-manual/pull/227.
Commit: 3569a1f1d2cee5616a15a992ca49646447efaa47
https://github.com/llvm/llvm-project/commit/3569a1f1d2cee5616a15a992ca49646447efaa47
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Fix placement of FeatureSupportsXNACK (#223111)
This can't be put into 12_50_Common because of conflict in downstream
code.
Commit: 5eff11f8e9b56b1653950409355d829f48547127
https://github.com/llvm/llvm-project/commit/5eff11f8e9b56b1653950409355d829f48547127
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCA.h
M orc-rt/lib/bedrock/sps/SimpleRemoteCA.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
Log Message:
-----------
[orc-rt] Reduce SimpleRemoteCA to transport-independent utils (#223141)
Reduce SimpleRemoteCA to the transport-independent parts: opcodes, setup
and hang-up payload encoding, message validation and dispatch, and the
table of calls awaiting a result. Subclasses are now responsible for the
connection state and synchronization, since they'll usually want to
implement these things for their transports anyway (or the transport
will already manage connection-state/synchronization).
takePendingCall becomes pure virtual, since subclasses must synchronize
access to the pending-call table.
The header moves from orc-rt-internal/ to orc-rt/: with the transport a
subclass concern, there's no reason to preclude library clients from
writing one.
Commit: 1ae00a52bbe432ff8174664ce28fb33cc600f6f0
https://github.com/llvm/llvm-project/commit/1ae00a52bbe432ff8174664ce28fb33cc600f6f0
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libc/src/__support/FPUtil/float80.h
Log Message:
-----------
[libc] Enable Float80-type for x86_32 (#221408)
Enables for x86_32 by using Uint<96>
```CPP
struct Float80 {
#if __SIZEOF_LONG_DOUBLE__ == 12
UInt<96> bits;
#else
UInt128 bits;
#endif
```
for testing it on x86_32
it needs -m32 and --msse2 extra flags other than your usual cmake for x86_32
Commit: 0adddbb3a5f7f57614e8c59c87d37cec5421e514
https://github.com/llvm/llvm-project/commit/0adddbb3a5f7f57614e8c59c87d37cec5421e514
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode][NFC] Move Remove unused CheckExtern prototype (#223146)
And add an overload taking only a Block.
Commit: 66573c1ecdc0ce1dc5f1cbd7d22974a7eb4ccf5d
https://github.com/llvm/llvm-project/commit/66573c1ecdc0ce1dc5f1cbd7d22974a7eb4ccf5d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/pointer-iv-addrec.ll
Log Message:
-----------
[SCEV] Directly form add recurrences for simple pointer IVs. (#222915)
Add support for PN = PHI(Start, gep Self, LoopInvariant) to
createSimpleAffineAddRec.
This allows to handle simple pointer IVs without going through the more
expensive createAddRecFromPHI machinery in many cases.
This is not completely NFC: previously we created SCEVUnknown for a
trivial AddRec with step 0, now we return the start value.
This gives a modest geomean compile-time decrease
* stage1-O3: -0.05%
* stage1-ReleaseThinLTO: -0.06%
* stage1-ReleaseLTO-g: -0.06%
* stage1-aarch64-O3: -0.07%
* stage2-O3: -0.05%
* clang build: -0.08%
With larger decreases for more SCEV-heavy workloads.
https://llvm-compile-time-tracker.com/compare.php?from=c1b661fde124399f0484c4b39501b37613cc4757&to=5cd19e23596c86eae9607286efe86b7a3e885a86&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/222915
Commit: e1b6027992df8846729ebfaacc9d3ac8573dd106
https://github.com/llvm/llvm-project/commit/e1b6027992df8846729ebfaacc9d3ac8573dd106
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
Log Message:
-----------
[LV] Add test for cost of widened pointer induction (NFC). (#223153)
Add a cost test where the pointer induction is used as a value and
remains a VPWidenPointerInductionRecipe.
PR: https://github.com/llvm/llvm-project/pull/223153
Commit: 345d699de809ee2962307df4ae0bd95f791275b3
https://github.com/llvm/llvm-project/commit/345d699de809ee2962307df4ae0bd95f791275b3
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Remove dead functions and declarations (NFC) (#223126)
SelectionDAG::getStore (with Offset): Added on July 31, 2026 in commit
c57b2b6103cb4bb6c4c2bee901c1eee2b966e5f0 without a definition or any
callers.
SelectionDAG::getIndexedLoadVP, SelectionDAG::getIndexedStoreVP: Added
on August 31, 2021 in commit 524ded7d01a700aa6473d09a877be13fe45b85a3
without any callers.
SelectionDAG::getTruncStridedStoreVP: Added on March 10, 2022 in commit
28cfa764c2e3d36b856b3e70d49f17088b90c1f5 without any callers.
Assisted-by: Antigravity
Commit: d7d7992e58674a2e9ad1ae42e4a627b7fff24cef
https://github.com/llvm/llvm-project/commit/d7d7992e58674a2e9ad1ae42e4a627b7fff24cef
Author: Zhige Chen <zhige_chen at outlook.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/tools/llubi/fp_cast.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Implement fast-math flags for `uitofp`/`sitofp` (#222858)
Closes #203773
Commit: eb9844b5ceee01c9d9fad92cbcd027c5798c5ed4
https://github.com/llvm/llvm-project/commit/eb9844b5ceee01c9d9fad92cbcd027c5798c5ed4
Author: Hamed <hamedghorbani17 at live.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/ms-setjmp.c
Log Message:
-----------
[clang][ARM] Use sponentry for setjmp on Windows ARM32 (#222366)
On Windows, _setjmp and _setjmpex take a second argument, the frame,
which the CRT stores in the jmp_buf and which longjmp later hands to
RtlUnwindEx as the frame to unwind. On aarch64, this is the stack pointer
on entry to the function, while x86_64 takes the function frame address.
ARM expects the same as aarch64 here, the stack pointer on entry.
Assisted-by: Claude Opus 5 (Anthropic)
Commit: 148ee2b266b73a49f1f31d0bd17d4818b91bee9f
https://github.com/llvm/llvm-project/commit/148ee2b266b73a49f1f31d0bd17d4818b91bee9f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/cancelled-copyable-self-use-deps.ll
Log Message:
-----------
[SLP] Fix dep accounting when cancelling a bundle with copyable elements
Restore the parent-edge copyable data as a user of the instruction only
if the cancelled element displaced it at creation (chained copyable
self-use); otherwise the extra user dependency is never released and
scheduling asserts.
Fixes #223139
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223174
Commit: ca8f82b625494996d4f9f61f30d25b62a5660dca
https://github.com/llvm/llvm-project/commit/ca8f82b625494996d4f9f61f30d25b62a5660dca
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/unittests/Support/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Restrict KnownFPClass::bitcast/toKnownBits deductions to verified FP semantics (#221133)
`KnownFPClass::bitcast` and `KnownFPClass::toKnownBits` previously made
deductions for floating-point semantics whose bit representations had
not been verified.
I have made it so `KnownFPClass::bitcast` and
`KnownFPClass::toKnownBits` return `fcAllFlags`/unknown for any
`APFloat` semantics we have not verified. Currently, this prevents
potentially invalid deductions for `PPCDoubleDouble` (mostly in regards
to the signbit and endianess). It also allows these functions to be
"safely" used with the 4/6/8 bit floating point types since we
conservatively return unknown.
Currently the list of supported/verified semantics for both `bitcast`
and `toKnownBits` are:
```
IEEEhalf
BFloat
IEEEsingle
IEEEdouble
IEEEquad
x87DoubleExtended
```
Commit: d65afea7b5c25b7be41dd86eaedaac263f04cd40
https://github.com/llvm/llvm-project/commit/d65afea7b5c25b7be41dd86eaedaac263f04cd40
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
Log Message:
-----------
[gn build] Port 0f47e798205b (#223189)
Commit: b6ca452aea0d805fd1f2f98a609e30692184a5bf
https://github.com/llvm/llvm-project/commit/b6ca452aea0d805fd1f2f98a609e30692184a5bf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Frontend/HLSL/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 4214b4601f49 (#223190)
Commit: 5d188c401f7d64daf08b7aac887d93aa5073e1dd
https://github.com/llvm/llvm-project/commit/5d188c401f7d64daf08b7aac887d93aa5073e1dd
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/SymbolTable.cpp
Log Message:
-----------
[ELF] Version scripts: simplify version suffix handling. NFC (#223194)
Use StringRef::split instead of index arithmetic.
Commit: 387c965bb013d14dbcee52098e714c27d6f98249
https://github.com/llvm/llvm-project/commit/387c965bb013d14dbcee52098e714c27d6f98249
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
R lld/test/ELF/dynamic-list-cpp.s
M lld/test/ELF/dynamic-list-glob.s
R lld/test/ELF/version-script-reassign-glob.s
A lld/test/ELF/version-script-wildcard-precedence.s
Log Message:
-----------
[ELF,test] Cover wildcard precedence in version scripts and dynamic lists (#223195)
version-script-wildcard-precedence.s, renamed from
version-script-reassign-glob.s, covers more cases.
dynamic-list-glob.s absorbs dynamic-list-cpp.s and adds an extern "C++"
wildcard, which had no --dynamic-list coverage.
Commit: 474b7358a90e4f22b04e6a0933381d239fb7044e
https://github.com/llvm/llvm-project/commit/474b7358a90e4f22b04e6a0933381d239fb7044e
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/tools/llc/CMakeLists.txt
R llvm/tools/llc/NewPMDriver.cpp
R llvm/tools/llc/NewPMDriver.h
A llvm/tools/llc/lib/CMakeLists.txt
A llvm/tools/llc/lib/NewPMDriver.cpp
A llvm/tools/llc/lib/NewPMDriver.h
A llvm/tools/llc/lib/llcdriver.cpp
R llvm/tools/llc/llcdriver.cpp
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llc] Move LLVMLlcDriver implementation into lib (#222840)
Addressing comment
[here](https://github.com/llvm/llvm-project/pull/221896#discussion_r3982250858)
Commit: 745ff71c706f6a55c7fa1cda660860925e0b2739
https://github.com/llvm/llvm-project/commit/745ff71c706f6a55c7fa1cda660860925e0b2739
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Consistently use RISCVSubtarget::is64Bit() instead of isRV32/isRV64. (#223038)
99% of code uses RISCVSubtarget::is64Bit().
Maybe we should consider removing is64Bit(), and using isRV64() instead
but right now I think we should be consistent.
Commit: 7a7cea921c3e450903b57e5f4b2992f1dce4c410
https://github.com/llvm/llvm-project/commit/7a7cea921c3e450903b57e5f4b2992f1dce4c410
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
Log Message:
-----------
[ELF] Version script: simplify wildcard matching. NFC (#223202)
Replace a loop over non-"*" wildcard patterns and another loop over "*"
with a single loop that calls the inlined
`SymbolTable::assignWildcardVersion`.
Commit: 051c49202368a8478661548b5b8de03549d9d183
https://github.com/llvm/llvm-project/commit/051c49202368a8478661548b5b8de03549d9d183
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/test/SemaCXX/ms-ctor-closure.cpp
Log Message:
-----------
[clang][test] Remove an uninitialized read in a test case (#223120)
This test case was added in
https://github.com/llvm/llvm-project/pull/222212. Its purpose is to
check that explicit constructor calls work at compile time.
However, the test case left var.a uninitialized and the copy constructor
reads an unitialized value. MSVC diagnoses this, but clang currently
fails to do so.
Change the test case to remove the unrelated problem of an uninitialized
read.
Commit: 0d55d0bf81ce2e0d6d3c46b7835efb788bde634a
https://github.com/llvm/llvm-project/commit/0d55d0bf81ce2e0d6d3c46b7835efb788bde634a
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/ICF.cpp
Log Message:
-----------
[ELF] Parallelize ICF's section sort. NFC (#223216)
All candidate sections are sorted by a serial stable_sort, which is a
scalability bottleneck. Switch to parallel sort using Schwartzian
transform. Linking Chromium with --icf=all (--threads=8) drops from
4.47s to 3.18s.
Commit: 8ea78db3c1bf6522ccaf6d75e73a03d80f08a00b
https://github.com/llvm/llvm-project/commit/8ea78db3c1bf6522ccaf6d75e73a03d80f08a00b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/Driver/wasm-toolchain.c
Log Message:
-----------
clang/WebAssembly: Add -femscripten-exceptions driver flag (#221431)
Commit: c4628f0385efd0d0d3c9d9ee0b88f89fdd4bd1f3
https://github.com/llvm/llvm-project/commit/c4628f0385efd0d0d3c9d9ee0b88f89fdd4bd1f3
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] Disable linker version scripts for Emscripten (#221647)
Emscripten reports itself as a Unix-like CMake platform, causing LLVM to
set `LLVM_HAVE_LINK_VERSION_SCRIPT` and pass GNU/ELF `--version-script`
options when linking shared libraries.
Emscripten uses `wasm-ld`, which does not support GNU version scripts
and currently reports:
```
em++: warning: ignoring unsupported linker flag: `--version-script`
```
Treat Emscripten like the other platforms without version-script
support. This prevents LLVM and Clang shared-library targets from
passing an unsupported linker option.
This was encountered while building LLVM 23.1.0 for both wasm32 and
wasm64 with Emscripten 6.x in emscripten-forge.
```
[ 45%] Building CXX object tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaExceptionSpec.cpp.o
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
.....
[100%] Linking CXX shared library ../../lib/libLTO.so
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
.....
[100%] Linking CXX shared library ../../../../lib/libclang.so
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
```
Commit: 4dd595b99e4e0a9c7994726065ab99d6c2b071c2
https://github.com/llvm/llvm-project/commit/4dd595b99e4e0a9c7994726065ab99d6c2b071c2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
Wasm: Remove incorrect assumption that intrinsics cannot throw (#221180)
A few intrinsics are marked as Throws
Commit: 709ef4b96668471c7be0bd67abece4ebfce62a22
https://github.com/llvm/llvm-project/commit/709ef4b96668471c7be0bd67abece4ebfce62a22
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
A llvm/test/CodeGen/ARM/cbz-no-kill-flag.mir
Log Message:
-----------
ARM: Avoid relying on kill flags for determining CPSR liveness (#222873)
When forming CBZ/CBNZ in ARMConstantIslands, check if CPSR is live-out
of the block instead of relying on the kill flag. Kill flags have been
soft deprecated for over a decade.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 31a1c03fe67cccd917f11e5ab50cc425770c1400
https://github.com/llvm/llvm-project/commit/31a1c03fe67cccd917f11e5ab50cc425770c1400
Author: Brad Smith <brad at comstyle.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Unix/Path.inc
Log Message:
-----------
[Support] Implement getMainExecutable for OpenBSD with getexecpath() (#220141)
OpenBSD now has a proper function to retrieve the executable and path.
Commit: eae1ec7b1d6752d7d94214e4beaf724ce560aed2
https://github.com/llvm/llvm-project/commit/eae1ec7b1d6752d7d94214e4beaf724ce560aed2
Author: Pkuyo <miku_mi at foxmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
Log Message:
-----------
[SelectionDAG] Handle scalable INSERT_SUBVECTOR in ComputeNumSignBits (#221631)
Handle scalable INSERT_SUBVECTOR in SelectionDAG as a pre-fix for
#220976.
Add coverage for scalable subvectors and fixed subvectors inserted into
scalable vectors.
Commit: 3deeb018ed1d1c61ad9e1798161128e0202e7920
https://github.com/llvm/llvm-project/commit/3deeb018ed1d1c61ad9e1798161128e0202e7920
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/cancelled-copyable-self-use-deps-2.ll
Log Message:
-----------
[SLP]Fix dep accounting when cancelling a bundle with repeated copyable users
Skip duplicate users instead of stopping at the first one when walking
the operand lanes; an early stop misses a trailing self-use lane, the
displaced parent-edge copyable data is never restored, and scheduling
asserts.
Fixes #223225
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223236
Commit: f8a96032096158c992ea4cd369e43068b2b072a7
https://github.com/llvm/llvm-project/commit/f8a96032096158c992ea4cd369e43068b2b072a7
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
Log Message:
-----------
[lldb] Bound Mach-O symtab allocation to the file size (#222955)
Opening a Mach-O file whose LC_SYMTAB claims far more symbols than the
file could possibly hold makes lldb ask for hundreds of gigabytes. A
128-byte file with LC_SYMTAB.nsyms = 0x80000000 (the new unit test's
input, built with yaml2obj) reproduces it through `lldb-target-fuzzer`,
the harness that found this bug:
```
==45515== ERROR: libFuzzer: out-of-memory (malloc(171798691840))
#8 std::__1::__split_buffer<lldb_private::Symbol,...>::__split_buffer(...)
#9 std::__1::vector<lldb_private::Symbol,...>::resize(unsigned long)
#10 lldb_private::Symtab::Resize(unsigned long)
#11 ObjectFileMachO::ParseSymtab(lldb_private::Symtab&)
```
`ParseSymtab()` sizes the destination `Symtab`'s `vector<Symbol>`
directly
from `nsyms` and `nindirectsyms`, two counts read from the file's
`LC_SYMTAB` and `LC_DYSYMTAB` commands. `nlist_data`, the view already
built earlier in the function from the bytes the file actually has at
`symoff`, is far smaller than what those counts claim; the guard gating
this code only checks that it is non-empty, not how many nlist records
it can back.
Bound both counts by what `nlist_data` and `indirect_symbol_index_data`
(already clipped to the available bytes) can hold, instead of trusting
the file's counts outright.
Add a unit test whose LC_SYMTAB claims about two billion symbols in a
128-byte file; completing quickly instead of reserving that much space
is the regression check.
Assited-by: claude
Commit: 3c77eb3a3f2793a75e0ce86d96076637d5989bea
https://github.com/llvm/llvm-project/commit/3c77eb3a3f2793a75e0ce86d96076637d5989bea
Author: Stanislav Bardyuk <6258615+kodlan at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
Log Message:
-----------
[DAGCombiner] Only fold shift+mask compare to rotate if the shift amount divides the bit width (#220743)
DAGCombiner::visitSETCC can turn `(X << S) == (X & -(1 << S))` (or the
srl variant) into `rotl(X, S) == X`, and the other way around, when the
target prefers one form over the other. The two forms are only equivalent when
S divides the bit width. The check used `isPowerOf2(S)`, which is the same
thing for i8/i16/i32/i64 but not for odd widths like i3, where S = 2 is a
power of two that does not divide 3. On x86, which prefers the rotate,
the reporter's i3 function returned the wrong value for two of its eight
inputs.
This changes the `MayTransformRotate` flag passed to
`preferedOpcodeForCmpEqPiecesOfOperand` to check `NumBits % S == 0`
(with S != 0) and fixes the two comments that described the old rule. For legal
scalar types nothing changes. On illegal non power of two widths this
also lets a non power of two amount that divides the width use the rotate
(like i6 with S = 3); that is correct for the same reason and legalizes
through the usual rotate promotion, same as i6 with S = 2 did before. The x86
hook already honors the flag in both directions, so the fix lives in the
target independent code.
Tests: the i3 shl and lshr cases from the issue (must stay shift+mask), an
i6 / S = 3 case (3 divides 6, so the rotate is still allowed), and the
reporter's function.
Fixes #220542
Commit: baec9c34d1ecdbabca0cc100ed6de73986174938
https://github.com/llvm/llvm-project/commit/baec9c34d1ecdbabca0cc100ed6de73986174938
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
Log Message:
-----------
[AMDGPU] Fix fneg fold with multi use fadd/fma (#217573)
Commit: db65ace07649b2beb8cdbdfd6af4901809df9966
https://github.com/llvm/llvm-project/commit/db65ace07649b2beb8cdbdfd6af4901809df9966
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
Revert "[Clang] Refactor instantiation of declarations within concepts" (#223235)
This reverts llvm/llvm-project#221707
This broke std::map as reported in
https://github.com/llvm/llvm-project/issues/223220
Commit: d283a555109576cd92b35a88b4d110166043fb77
https://github.com/llvm/llvm-project/commit/d283a555109576cd92b35a88b4d110166043fb77
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/OffloadTools/clang-nvlink-wrapper/nvlink-wrapper.c
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
Log Message:
-----------
[clang-nvlink-wrapper] Fix response file handling for the nvlink wrapper (#220249)
Summary:
Response files were not handled correctly because the copied support
used the `nvlink` argument which is not supported by the argument
parser. Pass to the nvlink wrapper using the canonical format and then
reconstruct it when we execute the sub jobs
Fixes: https://github.com/llvm/llvm-project/issues/219914
Commit: 3409d079b5b76d0cdd51526b29aebd4143ecca64
https://github.com/llvm/llvm-project/commit/3409d079b5b76d0cdd51526b29aebd4143ecca64
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/logical-binops-booleanized-leaves.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed widened boolean optimization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223245
Commit: ca2424325cd9247ac0c11cd2d1c8ea3fb07ab16e
https://github.com/llvm/llvm-project/commit/ca2424325cd9247ac0c11cd2d1c8ea3fb07ab16e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Reject guaranteed tail calls in call lowering (#216260)
The FPDiff immediate was being written to the wrong operand, corrupting
the callee GlobalAddress
Reject required tail calls like SelectionDAG does, and fix the stale
index for the one path that still needs it (cs.chain lowering)
Commit: 0c324f10322b490d66de738d73458f6f65460cdb
https://github.com/llvm/llvm-project/commit/0c324f10322b490d66de738d73458f6f65460cdb
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
Log Message:
-----------
[Support] Fix the return type of AddOverflow, SubOverflow, and MulOverflow (#223217)
This patch fixes the return type of the 3-argument overloads of
AddOverflow, SubOverflow, and MulOverflow to bool.
Without this patch, these functions are declared with a return type
of T:
template <typename T>
std::enable_if_t<std::is_signed_v<T>, T> AddOverflow(T X, T Y, T
&Result);
even though they return a boolean indicating whether an overflow
occurred, as stated in the comment:
/// Add two signed integers, computing the two's complement truncated
result,
/// returning true if overflow occurred.
Assisted-by: Antigravity
Commit: 23f2e449afa0b0de43939a03ea241bc17dfe1141
https://github.com/llvm/llvm-project/commit/23f2e449afa0b0de43939a03ea241bc17dfe1141
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Log Message:
-----------
[SelectionDAG] Remove unused float promotion in DAGTypeLegalizer (NFC) (#223219)
This patch removes PromotedFloats along with GetPromotedFloat and
SetPromotedFloat. The Mapped bitmask in PerformExpensiveChecks is
adjusted accordingly, shifting the bit for SoftPromotedHalfs.
The last uses of DAGTypeLegalizer::GetPromotedFloat and
DAGTypeLegalizer::SetPromotedFloat were removed on January 26, 2026 in
commit a7d48bd305ef3aa4bd543da6f4cd8682a3d35c32 when TypePromoteFloat
and its associated DAG machinery were removed.
With these accessors gone, DAGTypeLegalizer::PromotedFloats is no longer
populated.
Assisted-by: Antigravity
Commit: c67808cf4426290e259f2cd4bd1a48516f9b8d7b
https://github.com/llvm/llvm-project/commit/c67808cf4426290e259f2cd4bd1a48516f9b8d7b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[OpenMP] Change association of some directives from "none" to "explicit" (#222703)
Certain declarative directives are associated with base language
declarations by having the declared entities explicitly listed as
arguments.
Previously these had "none" in OMP.td. Change them to "explicit" to be
consistent with the spec. The existing code does not require any
changes, since the only potentially affected code would be that which
checked the assocation for "none", and the only such cases were applied
to executable directives.
Commit: 483af6c1be7ca13eda7cc5314bb93185d21b272a
https://github.com/llvm/llvm-project/commit/483af6c1be7ca13eda7cc5314bb93185d21b272a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[OpenMP] Add definitions for REDUCTION_KIND and SHIFT clauses (#222745)
This is a barebones change to introduce the enum identifiers for these
clauses.
Commit: 240670d0d5dcd649bd3728871087c938b5e097f2
https://github.com/llvm/llvm-project/commit/240670d0d5dcd649bd3728871087c938b5e097f2
Author: MaoJiaping <maojiaping1 at huawei.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A llvm/include/llvm/Transforms/Utils/SplitModuleCommon.h
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/SplitModule.cpp
A llvm/lib/Transforms/Utils/SplitModuleCommon.cpp
M llvm/test/tools/llvm-split/unnamed.ll
Log Message:
-----------
[NFC][ModuleUtils] Move externalize() from module splitting utilities (#221181)
`SplitModule.cpp` and `AMDGPUSplitModule.cpp` each carry an identical
static `externalize()` helper that promotes local-linkage globals to
external + hidden visibility and assigns a stable name to unnamed
entities, so they are named consistently across module partitions.
This patch removes the duplication by moving the helper into
`ModuleUtils` as `llvm::externalize`, and updates both users to call the
shared implementation. No functional changes are intended.
This also prepares for upcoming module splitting utilities to reuse a
single, canonical implementation.
Development of this patch was assisted by AI and reviewed by me.
Commit: 860fb775d3d626af6e4a45ea5d62039718957d26
https://github.com/llvm/llvm-project/commit/860fb775d3d626af6e4a45ea5d62039718957d26
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.h
M llvm/test/Transforms/SLPVectorizer/X86/logical-reduction-booleanized-leaves.ll
Log Message:
-----------
[SLP]Reduce logical and/or reductions in the wide leaf type
Logical and/or reductions on i1 with booleanized wide leaves (truncs
of same-op chains, zero-tests of values from [0, 1]) are performed in
the wide type, exposing the underlying consecutive values to the tree;
bit 0 of the result is the final value. Fixes the fragmented reduction
and the gather-of-scalars regression for compile-time-expanded Boolean
reductions.
Fixes #221167
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/221321
Commit: 588304bdb9ee0a9c8229db8c702415e80d05ad33
https://github.com/llvm/llvm-project/commit/588304bdb9ee0a9c8229db8c702415e80d05ad33
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/and-neg-pow2-copyable.ll
Log Message:
-----------
[SLP]Model copyable lanes of idempotent binops as op(V, V) when the operand column has a constant lane
The op(V, identity) form lets the reorder move the lane out of the
joined column, breaking the opcode-peer node; the symmetric form is
reorder-proof.
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/220252
Commit: f4ecba36726d6bede2ab58890dfcc861c2bb28a9
https://github.com/llvm/llvm-project/commit/f4ecba36726d6bede2ab58890dfcc861c2bb28a9
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Unify and refine interested classes for `KnownFPClass::log` (#219751)
Previously, `ValueTracking` and `GISelValueTracking` only called
`KnownFPClass::log` when the requested classes included NaN or infinity.
As a result, narrowly interested queries could miss unconditional
deductions, for example, `log(x)` is never subnormal or negative zero
(With the exception of `PPCDoubleDouble`
https://github.com/llvm/llvm-project/issues/217658).
This change makes the interested-class handling consistent between
`ValueTracking` and `GISelValueTracking`. The source is queried only
when its classes are needed, but `KnownFPClass::log` is always called so
its unconditional deductions are preserved.
Future work:
- Fixing `KnownFPClass::log` for `PPCDoubleDouble`.
AI disclosure:
I used OpenAI Codex (sol 5.6) to help write the unit tests, which I
reviewed and ran locally.
Commit: c1f1a288ccd67f9b9dadefda9c510aa7568022e7
https://github.com/llvm/llvm-project/commit/c1f1a288ccd67f9b9dadefda9c510aa7568022e7
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Complete upstream vector saturating shift left NEON builtins (#221507)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for the vector saturating shift left intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-saturating-shift-left).
This completes the family.
Port tests from `clang/test/CodeGen/AArch64/neon-intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/intrinsics.c`.
Commit: 0eac970fa7478ddf0083dc2a0a5c476ca3bb615a
https://github.com/llvm/llvm-project/commit/0eac970fa7478ddf0083dc2a0a5c476ca3bb615a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
Log Message:
-----------
RegisterCoalescer: Remove empty subranges after merging subranges (#222050)
Merging subranges in joinVirtRegs didn't try to clear empty ranges after
refineSubRanges, manifesting in an assert in overlaps checks later.
Exposed with subregister liveness once LiveIntervals runs before
TwoAddress.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: cff226a5716e4bc3589d4869066ea6687ed142ce
https://github.com/llvm/llvm-project/commit/cff226a5716e4bc3589d4869066ea6687ed142ce
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/sadd-with-overflow.ll
Log Message:
-----------
[ConstraintElim] Fold sadd.with.overflow with a constant op. (#223239)
Generalize the overflow-math simplification to also allow simplifying
sadd.with.overflow if the second operand is constant, using
makeGuaranteedNoWrapRegion.
Note that this partially overlaps with the flag strengthening logic.
I'll share a patch soon to try to unify the code more.
No improvements in llvm-opt-benchmarks-nightly. It improves end-to-end
optimizations for Swift (which emits a lot of checked arithmetic) and
also Clang + UBsan.
An end-to-end improvement with overflow intrinsics is
https://llvm.godbolt.org/z/6nrj7aodd.
PR: https://github.com/llvm/llvm-project/pull/223239
Commit: 979b374a7ca7adc936d9339c1db79b0d6cda06db
https://github.com/llvm/llvm-project/commit/979b374a7ca7adc936d9339c1db79b0d6cda06db
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
Log Message:
-----------
[AggressiveInstCombine] Fix terminology in a few comments (NFC) (#222327)
Fix the comments (and a debug print) that say "dominated by trunc"
rather than "post-dominated".
Also fixes a Doxygen syntax (use \p instead of /p) and fix
capitalization in the middle of a sentence.
Commit: d36b94ae1dc4a61d3ccff73330adbe571ef1ccd6
https://github.com/llvm/llvm-project/commit/d36b94ae1dc4a61d3ccff73330adbe571ef1ccd6
Author: Taimuraz Kaitmazov <5769345+atassis at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
A llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid11.mir
Log Message:
-----------
[MIRParser] Reject a one-element fixed-length vector type (#213290)
MIParser accepts `<1 x sN>` and then asserts while building the LLT, so
llc aborts during parsing instead of reporting a parse error:
```
Assertion `!EC.isScalar() && "invalid number of vector elements"' failed.
```
LLT has no one-element fixed-length vector. `getLLTForType`,
`getLLTForMVT` and
`LLT::changeElementCount` all map a one-element `ElementCount` to the
element
type through `LLT::scalarOrVector`, nothing calls `LLT::fixed_vector(1,
...)`,
and no in-tree .mir test uses the syntax. `verifyVectorElementCount`
already rejects 0 and anything above 2^16, so 1 was the remaining hole; it now
gets the same diagnostic instead of aborting the parser.
Scalable vectors are unaffected: `<vscale x 1 x sN>` is a valid type and
stays legal through the `HasVScale` check.
AI assistance: drafted with AI help; reviewed and validated by me.
Commit: ce73dba9552c93d1cc3abc481dff63a4ab6d0579
https://github.com/llvm/llvm-project/commit/ce73dba9552c93d1cc3abc481dff63a4ab6d0579
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHIP/amdgcnspirv-uses-amdgpu-abi.cpp
Log Message:
-----------
[clang][SPIR-V][AMDGPU] Fix variadic aggregate ABI classification for AMDGCN (#216326)
Mirror AMDGPUABIInfo fixed/variadic split
AMDGCNSPIRVABIInfo::classifyArgumentType did not distinguish fixed from
variadic arguments, so aggregates passed through `...` were
misclassified as indirect byref instead of direct
Commit: d91624c19074e219d5a5c5af45f48afd4cd9052a
https://github.com/llvm/llvm-project/commit/d91624c19074e219d5a5c5af45f48afd4cd9052a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
Log Message:
-----------
[AMDGPU] Fix MAI hazard scan missing 19-instruction-old hazards (#222040)
The scan only looked back 19 instructions, but gfx950 can need a gap of
20 after some MFMAs
A hazard exactly 19 instructions back was missed, so no wait was
inserted
Commit: 8864a4bb996d6bb541b0974d34991da40a643c90
https://github.com/llvm/llvm-project/commit/8864a4bb996d6bb541b0974d34991da40a643c90
Author: neoto <48843913+neoto at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/srem.ll
M llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/urem.ll
Log Message:
-----------
[Mips] Handle division by zero trap on MIPS1 (#201133)
LLVM currently emits the `teq` instruction for every arch version, but
`teq` is unsupported on MIPS1.
This special cases MIPS1 so that `bne(z)` and `break` are emitted
instead.
Compared to https://github.com/llvm/llvm-project/pull/81311, this should
also handle liveness as far as I can tell.
I didn't want to add another bool to the argument list so I combined
`IsMicroMips` and what was supposed to be `IsMips1` into an enum, which
feels much nicer in this case.
Besides that and the main change, I also changed the `hasSideEffects`
bit for `PseudoSDIV` and `PseudoUDIV`,
which allows the delay slot to be usefully filled - well, at least with
`-O1`+. This seems to be in line with what GCC does:
https://godbolt.org/z/zqcG5ha35
Tested using clang directly and through Zig's LLVM backend.
Closes https://github.com/llvm/llvm-project/issues/80554
Supersedes https://github.com/llvm/llvm-project/pull/81311
Commit: 85f694b3eeafc07e5c586fa15715facefba71094
https://github.com/llvm/llvm-project/commit/85f694b3eeafc07e5c586fa15715facefba71094
Author: ʟᴜɴᴇx <thisissamir04 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll
Log Message:
-----------
[ASan] Convert pointer-pair operands based on type (#218494)
`CreatePointerCast` was being called on everything without checking what
it actually is, so if the operand came from ptrtoint ... to i32 it just
crashes (its not a pointer).
now it check the type first - pointers get pointer-cast, ints get
zext/trunc'd to intptr width.
Fixes #217544
also edited regression tests for this
Commit: 4098f568c46e06b6df470111868b4c165dd80f4d
https://github.com/llvm/llvm-project/commit/4098f568c46e06b6df470111868b4c165dd80f4d
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Don't fold in_bounds for negative constant indices (#219681)
`isInBounds` checked only that the transfer *ends* inside the source:
return cstOp.value() + vectorSize <= sourceSize;
The `in_bounds` attribute promises more than that. Its definition in
VectorOps.td says accesses "(including the starting point)" may run
out-of-bounds when it is "false", so setting it to "true" is a claim
about the start of the transfer as well as its end.
With a negative constant index the two disagree. For
vector.transfer_read %m[-1] : memref<8xf32>, vector<4xf32>
`-1 + 4 <= 8` holds, so the fold set `in_bounds = [true]`, even though
element -1 is read from outside `%m`.
The same expression also overflows for a large enough index: at `index =
2^63 - 1` the addition wraps and the fold again reports `in_bounds =
[true]`. Computing the bound as `sourceSize - vectorSize` instead avoids
the addition entirely; both operands are static, non-negative dimension
sizes, so the subtraction cannot overflow.
This is a spec-conformance fix, not a live miscompile report. A negative
index into a memref is already undefined behaviour, and the masked
lowering would not have caught it either: the guard
`generateInBoundsCheck` emits in VectorToSCF is `memrefDim > index +
iv`, an upper-bound check only.
Adds three regression tests, each of which fails without the change.
Assisted-by: Claude
Commit: b7877e01cb1087d81fd72eb320c3c7d3f8e03500
https://github.com/llvm/llvm-project/commit/b7877e01cb1087d81fd72eb320c3c7d3f8e03500
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-relational-predicate-latch.ll
Log Message:
-----------
[ConstraintElim] Derive an unsigned IV bound from a signed relational latch. (#222762)
For a known non-negative backedge (either via isKnownNonNegative or
because the increment is increasing), 0 <=s PN <= B holds and implies
that B is non-negative as well.
Use that to translate a signed condition to the equivalent unsigned one.
Note that the general signed->unsigned rewrite cannot catch this,
because the precondition also needs rewriting to unsigned.
No llvm-opt-benchmark-nightly impact, but it can help remove runtime
checks generated by sanitizers or Swift code. An end-to-end C example is
https://clang.godbolt.org/z/vbd91MjaM.
Alive2 Proof: https://alive2.llvm.org/ce/z/G3Mv7t
PR: https://github.com/llvm/llvm-project/pull/222762
Commit: 914e15cd29f78e01e15378cfccff97d42e6e9e82
https://github.com/llvm/llvm-project/commit/914e15cd29f78e01e15378cfccff97d42e6e9e82
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[IR] Move the LLVMContext out of ReplaceableMetadataImpl. NFC (#222085)
No ReplaceableMetadataImpl method reads its LLVMContext reference, and
ValueAsMetadata reaches the context through the wrapped Value. Keep the
reference in a derived ReplaceableUsesWithContext, used by the two
owners with no other route to it: MDNode's on-demand RAUW support and
DIArgList.
Rename the base to ReplaceableUses: it is the use map behind RAUW for
the metadata kinds that support it, not a pimpl, and the name matches
ContextAndReplaceableUses and getReplaceableUses().
Make the base destructor protected, since getOrCreate() hands out
ReplaceableUses pointers that must never be deleted. Delete copy
assignment explicitly; the LLVMContext reference suppresses it
implicitly.
sizeof(ValueAsMetadata) 152 -> 144.
Aided by Opus 5
Commit: d44791d35a4b15f3da7855790203ca14f7953410
https://github.com/llvm/llvm-project/commit/d44791d35a4b15f3da7855790203ca14f7953410
Author: averne <45773016+averne at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
Log Message:
-----------
[AMDGPU] IGLP: Sanitize user schedule hints (#221256)
Fixes the following ICE:
```cpp
extern __shared__ int lds[];
__global__
void kern_ice() {
auto _ = lds[threadIdx.x];
__builtin_amdgcn_sched_barrier(~0x380); // Allow all except DS instructions
}
```
See: https://godbolt.org/z/oGfT1TTa4
Commit: cba24d6a935382154b0487d09c1d91a0e2bda04b
https://github.com/llvm/llvm-project/commit/cba24d6a935382154b0487d09c1d91a0e2bda04b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Generalize folding IV increment into phi start value (NFC). (#223260)
simplifyRecipe folds
X = phi(0, IVInc)
IVInc = X + Step
Def = IVInc + Y
into a phi starting at Y, but only if Y is a live-in. Also allow values
defined in the block the phi's start value is coming from, which is
where the value conservatively has to be available.
NFC today, but preparation for modeling the full epilogue skeleton in
VPlan.
Commit: 8e23b6dfccb42a599e82c6a6c1a13bfb0a546c9e
https://github.com/llvm/llvm-project/commit/8e23b6dfccb42a599e82c6a6c1a13bfb0a546c9e
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
Log Message:
-----------
[NFC][AMDGPU] Fix clang-tidy warnings in VOPD related files (#223261)
Commit: 86858de86cb28299ebc9c0ce8a06e5a61ed6b261
https://github.com/llvm/llvm-project/commit/86858de86cb28299ebc9c0ce8a06e5a61ed6b261
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/test/Headers/__clang_hip_math.hip
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/sitofp.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[ValueTracking] Propagate non-negativity through fptosi (#217868)
Fixes #217442
`fptosi` is poison when the rounded value does not fit in the result
type, so `computeKnownBits` can assume the conversion rounds towards
zero without wrapping. Negative subnormals and negative zero always
round to 0, so only sources known to never be a negative normal or
negative infinity (i.e. values <= -1.0) can produce a negative result.
This lets InstCombine fold `(int)fabs(x) < 0` to `false`, matching GCC,
and also benefits other magnitude-clamping intrinsics such as sqrt.
Commit: 667efaee701ae5345f4cde42f8b3e5b7f98549ee
https://github.com/llvm/llvm-project/commit/667efaee701ae5345f4cde42f8b3e5b7f98549ee
Author: Benji Smith <6193112+Benjins at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-rotate.ll
Log Message:
-----------
[InstCombine] Fix fold of comparison of rotates (#223263)
rotate(X, AmtX) == rotate(Y, AmtY) -> rotate(X, AmtX - AmtY) == Y
This fold is usually valid, but implicitly assumed that the bit width
was a power of two. This is now checked and the transform doesn't fire
if the bit width isn't a power of two.
Fixes https://github.com/llvm/llvm-project/issues/223262
Commit: 0485ad7e469a56443094872c0f57f2870eccb654
https://github.com/llvm/llvm-project/commit/0485ad7e469a56443094872c0f57f2870eccb654
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/thread-model.c
Log Message:
-----------
clang: Emit the "thread-model" module flag (#223156)
Commit: a73dac50f2d8c5c88c8fe4f84b12aa445e0ada9a
https://github.com/llvm/llvm-project/commit/a73dac50f2d8c5c88c8fe4f84b12aa445e0ada9a
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowPairs.h
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowPairs.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
A clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowPairsTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[SSAF][PointerFlow] Factor out and make the pointer-flow matching reusable
The PointerFlowExtractor matches AST nodes representing pointer-flows
and converts them to entity-based data structures directly. This
commit divides this procedure into two steps: 1) match and represent
AST nodes as PointerFlowPairs; 2) convert PointerFlowPairs to
entity-based edges. Therefore, other SSAF tools may use
PointerFlowPairs.
The refactoring also improves coverage: it separates pointer-type
checking from structural matching, so structural matching alone now
discovers cases that were previously missed due to overly aggressive
type checking (e.g. a record-typed call argument or return value
initialized with a braced-init-list).
Along the way, this also fixes a bug for unnamed bit-fields.
First patch for
rdar://187125348
Commit: 58b7d983bf4e76f51298f2db2eae66952d622b21
https://github.com/llvm/llvm-project/commit/58b7d983bf4e76f51298f2db2eae66952d622b21
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
Log Message:
-----------
fix clang-format
Commit: efe61a25228c79a8425ce090782dd9a848cc9b4d
https://github.com/llvm/llvm-project/commit/efe61a25228c79a8425ce090782dd9a848cc9b4d
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/EntityPointerLevel/EntityPointerLevel.h
M clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowPairs.h
M clang/lib/ScalableStaticAnalysis/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
Log Message:
-----------
[SSAF][PointerFlow] Drop unused TUSummaryExtractor param from translateDeclPointerLevel
TUSummaryExtractor is only needed to mint EntityIds when building an
EntityPointerLevel; translateDeclPointerLevel just walks the Expr and
returns raw DeclPointerLevels, so it never touched Extractor.
This is the second patch the radar below depends on:
rdar://187125348
Commit: 9a7259dbb787e77cac59dbab7234342734b17d50
https://github.com/llvm/llvm-project/commit/9a7259dbb787e77cac59dbab7234342734b17d50
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/SourceTransformation/CMakeLists.txt
M clang/lib/ScalableStaticAnalysis/SourceTransformation/Transformations/CppBoundedBuffers.cpp
M clang/unittests/ScalableStaticAnalysis/SourceTransformation/CppBoundedBuffersTest.cpp
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/SourceTransformation/BUILD.gn
Log Message:
-----------
[SSAF][clang-reforge] Retrofit expressions after CppBoundedBuffers decl rewrites
PR #210457 introduces declaration rewriting. When CppBoundedBuffers
rewrites a declaration or return type to a bounded_ptr/bounded_array,
some of the existing uses of that entity needs retrofit.
This commit creates expression rewrites for the following patterns:
- Append '.data()' to call arguments when necessary parameter is not
transformed but argument is transformed.
- Append '.as_bounded<T>()' to call arguments when both parameter and
argument are transformed but element types are not identical.
- Rewrite '&e[i]' to '(e + i)' and '&*e'/'&(*e)' to 'e', if 'e' is
transformed.
- Rewrite '(T*)e', 'static_cast<T*>(e)', and 'reinterpret_cast<T*>(e)'
to 'e.as_bounded<T>()', if 'e' is transformed.
The 3rd step of
rdar://187125348
Commit: 8d2fef435cc37d95c367a1e1a4136a77f9371bbd
https://github.com/llvm/llvm-project/commit/8d2fef435cc37d95c367a1e1a4136a77f9371bbd
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
Log Message:
-----------
Merge branch 'users/ziqingluo/PR-187125348-3' of github.com:llvm/llvm-project into users/ziqingluo/PR-187125348-3
Conflicts:
clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
clang/lib/ScalableStaticAnalysis/SourceTransformation/Transformations/CppBoundedBuffers.cpp
Compare: https://github.com/llvm/llvm-project/compare/e7d233ba1cef...8d2fef435cc3
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list