[all-commits] [llvm/llvm-project] d36b94: [MIRParser] Reject a one-element fixed-length vect...

Alexey Bataev via All-commits all-commits at lists.llvm.org
Sun Sep 13 10:22:29 PDT 2026


  Branch: refs/heads/users/alexey-bataev/spr/slpemit-loop-carried-horizontal-reductions-as-loop-vector-accumulator
  Home:   https://github.com/llvm/llvm-project
  Commit: d36b94ae1dc4a61d3ccff73330adbe571ef1ccd6
      https://github.com/llvm/llvm-project/commit/d36b94ae1dc4a61d3ccff73330adbe571ef1ccd6
  Author: Taimuraz Kaitmazov <5769345+atassis at users.noreply.github.com>
  Date:   2026-09-13 (Sun, 13 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/MIRParser/MIParser.cpp
    A llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid11.mir

  Log Message:
  -----------
  [MIRParser] Reject a one-element fixed-length vector type (#213290)

MIParser accepts `<1 x sN>` and then asserts while building the LLT, so
llc aborts during parsing instead of reporting a parse error:

```
Assertion `!EC.isScalar() && "invalid number of vector elements"' failed.
```

LLT has no one-element fixed-length vector. `getLLTForType`,
`getLLTForMVT` and
`LLT::changeElementCount` all map a one-element `ElementCount` to the
element
type through `LLT::scalarOrVector`, nothing calls `LLT::fixed_vector(1,
...)`,
and no in-tree .mir test uses the syntax. `verifyVectorElementCount`
already rejects 0 and anything above 2^16, so 1 was the remaining hole; it now
gets the same diagnostic instead of aborting the parser.

Scalable vectors are unaffected: `<vscale x 1 x sN>` is a valid type and
stays legal through the `HasVScale` check.

AI assistance: drafted with AI help; reviewed and validated by me.


  Commit: 3776151b66c64db9cf3d6739143c5a8e6271163b
      https://github.com/llvm/llvm-project/commit/3776151b66c64db9cf3d6739143c5a8e6271163b
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-13 (Sun, 13 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/MIRParser/MIParser.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid11.mir

  Log Message:
  -----------
  Fix formatting

Created using spr 1.3.7


Compare: https://github.com/llvm/llvm-project/compare/48cc2ba423cd...3776151b66c6

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