[all-commits] [llvm/llvm-project] 0c553f: [InstCombine] Use common flags for shl in shl/trun...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Sun Sep 13 09:58:29 PDT 2026
Branch: refs/heads/users/alexey-bataev/spr/slpemit-loop-carried-horizontal-reductions-as-loop-vector-accumulator
Home: https://github.com/llvm/llvm-project
Commit: 0c553f573a076091f60df21618494584e9641e96
https://github.com/llvm/llvm-project/commit/0c553f573a076091f60df21618494584e9641e96
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Use common flags for shl in shl/trunc fold. (#221769)
As pointed out post-commit in
https://github.com/llvm/llvm-project/pull/219443, whether the flags from
the trunc can be transferred directly to the shl depends on the involved
types: https://alive2.llvm.org/ce/z/zN_TFq
For now, just use the common flags.
PR: https://github.com/llvm/llvm-project/pull/221769
Commit: 7297a1eec0d0ea5311775d36a63045a00830811b
https://github.com/llvm/llvm-project/commit/7297a1eec0d0ea5311775d36a63045a00830811b
Author: Giles Payne <gilespayne at telepathix.net>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/XCore/Disassembler/CMakeLists.txt
Log Message:
-----------
Fix unresolved symbol XCoreMCRegisterClassStorage (#211420)
Fix for #211419
Add missing dependency to XCoreDisAssembler's CMakeLists.txt file
Commit: c70b9c09f691d93c6e46e2692e15fb439dcb2560
https://github.com/llvm/llvm-project/commit/c70b9c09f691d93c6e46e2692e15fb439dcb2560
Author: Addmisol <addmisol9 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/frexp-inf-nan-combine.ll
Log Message:
-----------
[AMDGPU] Fold redundant inf/nan checks into frexp instructions (#214936)
Fixes #204204
The AMDGPU "v_frexp_exp" and "v_frexp_mant" instructions return 0 for
inf/nan inputs. This patch adds a DAG combine
("performFrexpSelectCombine") to fold redundant inf/nan checks with
frexp results, eliminating unnecessary compare and select instructions..
### Patterns folded:
- `select (fcmp uno x, 0), 0, (frexp_exp x)` → `frexp_exp x`
- `select (fcmp oeq |x|, inf), 0, (frexp_exp x)` → `frexp_exp x`
- `select (fcmp ueq |x|, inf), 0, (frexp_exp x)` → `frexp_exp x`
- `select (fcmp ord x, 0), (frexp_exp x), 0` → `frexp_exp x`
- `select (fcmp one |x|, inf), (frexp_exp x), 0` → `frexp_exp x`
- `select (is_fpclass x, finite), (frexp_exp x), 0` → `frexp_exp x`
- Same patterns with `frexp_mant`
The optimization is disabled on SI (Southern Islands) which has
hasFractBug()..
## Test plan
- [x] Added frexp-inf-nan-combine.ll with comprehensive tests for:
- Targets: GFX9, GFX10, GFX11, GFX950 (optimization applies), SI
(optimization does NOT apply)
- Types: f32, f64, f16
- Patterns: NaN clamp, inf clamp, inf-or-nan clamp, reversed select,
not-inf check
- Negative tests: different inputs, non-zero constants, unrelated
comparisons
All existing frexp-related AMDGPU tests pass..
cc @arsenm
---------
Signed-off-by: addmisol <addmisol9 at gmail.com>
Commit: f9a8dec9496fea7c55f591a66a64dbcdc085fc2d
https://github.com/llvm/llvm-project/commit/f9a8dec9496fea7c55f591a66a64dbcdc085fc2d
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/and-negpow2-cmp.ll
Log Message:
-----------
[RISCV] Fix infinite DAGCombine loop with SETCC and SIGN_EXTEND_INREG (#221593)
We generalized (X & -(1 << C1) & 0xffffffff) == C2 << C1 using `sraiw`.
The combine generates a `SIGN_EXTEND_INREG` when simplifying.
However, when C1 is 0 and the sign bit (bit 31) of X is already known to
be zero, `DAGCombiner` sees that `SIGN_EXTEND_INREG` is semantically
equivalent to `AND X, 0xFFFFFFFF` (zext). Because `DAGCombiner`
considers `AND` to be more canonical than `SIGN_EXTEND_INREG` in this
context, it immediately reverts the node back to `AND`.
This caused an infinite DAGCombine loop. This patch disables the folding
when the C1 is zero. That case is covered by a later combine that already
checks if bit 31 is known to be zero.
Fixes: https://github.com/llvm/llvm-project/issues/221521
Commit: a4dd3554ec3dcde9288af34181a8d2200ecb8c9d
https://github.com/llvm/llvm-project/commit/a4dd3554ec3dcde9288af34181a8d2200ecb8c9d
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/openmp-reduction-debug-loc.mlir
Log Message:
-----------
[OMPIRBuilder] Restore the debug location after the reduction alloca (#221253)
`createReductions` emits the array of type-erased pointers to the
private reduction values in the alloca block, which means leaving the
current insertion point and coming back. The insertion point is
re-established but the debug location is not. Everything emitted
afterwards like the `__kmpc_reduce` and the matching __kmpc_end_reduce
inherits whatever the terminator happened to carry, which is usually
nothing. This could result in a verifier error if program is linked with
openmp runtime that has debug information.
Fix it by restoring the debug location along with the InsertPoint.
Commit: 14aebab4c6fe5c9f937efcdf1ea184495de6b737
https://github.com/llvm/llvm-project/commit/14aebab4c6fe5c9f937efcdf1ea184495de6b737
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/test/Analysis/dtor-array.cpp
Log Message:
-----------
[analyzer] Fix crash destructing element of a sugared array type
ExprEngine::makeElementRegion falls short trying to determine the
element type of an array that involves a type aliasing a static array
type.
This leads to a crash in ExprEngine::ProcessMemberDtor where it assumes
that element type is a CXXRecordDecl, while it is still a type alias to
a static array type.
getBaseElementType is the canonical way to desugar and peel off the
array dimensions.
Assisted by Claude Opus 5
--
CPP-8838
Commit: d5f72dd27f20499b050a7f855750a7dc2013e1d5
https://github.com/llvm/llvm-project/commit/d5f72dd27f20499b050a7f855750a7dc2013e1d5
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/CIR/Interfaces/CMakeLists.txt
M clang/lib/CIR/Lowering/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/tools/cir-opt/CMakeLists.txt
Log Message:
-----------
[CMake] Link only the MLIR dialects ClangIR uses (#221616)
CIR's sources reference Arith, DLTI, Func, LLVM, OpenACC, OpenMP and
Ptr, and cir-opt registers only the CIR dialects plus MemRef and LLVM.
Link those instead, which keeps Linalg, Vector, SPIRV, SparseTensor,
Tosa and GPU out of the clang build graph.
CLANG_ENABLE_CIR=ON adds 2135 build edges to the clang target; this
removes 694 of them.
LLM-aided
Commit: 89fe023484bd5b897dccefd290fe5e8536db47b0
https://github.com/llvm/llvm-project/commit/89fe023484bd5b897dccefd290fe5e8536db47b0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
A mlir/include/mlir/Dialect/LLVMIR/LLVMAllOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
A mlir/lib/Dialect/LLVMIR/IR/LLVMOps.cpp
A mlir/lib/Dialect/LLVMIR/IR/LLVMOps.h
Log Message:
-----------
[MLIR][LLVM] Shard generated operation definitions (NFC) (#221813)
LLVMDialect.cpp includes both the 55,078-line core operation definitions
and the 95,769-line intrinsic operation definitions. Generate the
combined operation set in eight shards, use the generated registration
hook, and expose only the parser, printer, and type-inference helpers
needed by generated code.
Assisted-by: Codex
Commit: 362194cb4c7e61949d54dfd89b05442a11da25b8
https://github.com/llvm/llvm-project/commit/362194cb4c7e61949d54dfd89b05442a11da25b8
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/test/CIR/Lowering/lifetime.cir
M clang/test/CIR/Lowering/stack-save-restore.cir
M clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
M clang/test/CIR/Transforms/abi-lowering/extend-signed-arg.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-bitint.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-complex.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-empty-class.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union-coerce-shapes.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-variadic-call.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-vector.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-vptr.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-wide-floats.cir
M clang/test/CMakeLists.txt
M clang/tools/cir-translate/CMakeLists.txt
M clang/tools/cir-translate/cir-translate.cpp
Log Message:
-----------
[CIR] Register only the LLVM IR translations CIR lowers to (#221797)
The ClangIR tests reach LLVM IR through mlir-translate, which links
every MLIR dialect and translation, so building check-clang builds most
of MLIR. Register mlir-to-llvmir in cir-translate over the same three
dialects and use it instead. Remove the dependency on `mlir-translate`
to run CIR tests.
ninja check-clang drops from 6499 to 5853 build edges.
LLM-aided
Commit: b4488d4c14709dd4dd94afaa0fa1c14cde69ee13
https://github.com/llvm/llvm-project/commit/b4488d4c14709dd4dd94afaa0fa1c14cde69ee13
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
Log Message:
-----------
[mlir][AMDGPU] Move gather index vectors at final use (NFC) (#221825)
The gather lowering copies two temporary vectors into the next
construction stage and never reads the source vectors again. Move their
storage instead.
Found by Coverity.
Assisted-by: Codex
Commit: 9fafedaa908f1844f4150ae2ba6e0eec938341c4
https://github.com/llvm/llvm-project/commit/9fafedaa908f1844f4150ae2ba6e0eec938341c4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
Log Message:
-----------
[MLIR][linalg] Remove discarded failure conversion (#221826)
Silence warning for unused result with a `(void)` cast instead of
converting its result with failed() and then discarding the converted
value.
Fix a Coverity warning, and it's cleaner about the intent.
Assisted-by: Codex
Commit: bc1c4e23e88262a480a081f1a7ecb84e75351b61
https://github.com/llvm/llvm-project/commit/bc1c4e23e88262a480a081f1a7ecb84e75351b61
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Math/IR/MathOps.cpp
Log Message:
-----------
[MLIR][math] Remove dead IPowI fold return (NFC) (#221827)
The folder returns the constant-fold helper result directly, remove the
unreachable fallback after the helper call.
Found by Coverity.
Assisted-by: Codex
Commit: 52bc117e7930694fed38d2ffb327f77e8bd8a474
https://github.com/llvm/llvm-project/commit/52bc117e7930694fed38d2ffb327f77e8bd8a474
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR] Derive lowering attr names from cppClassName, not the def name (#220891)
CIRLoweringEmitter built its CXX_ABI_ALWAYS_LEGAL_ATTRS entries with
GetOpCppClassName, which splits the TableGen def name at the first
underscore. That works only while every def is named
CIR_<CppClassName>Attr.
When one is not, the emitter writes an `isa<>` for a class that does not
exist, and the failure lands as a compile error in generated code.
Attributes carry the authoritative name in cppClassName, which
GenerateAttrToValueVisitor was already reading. Factor that out as
GetAttrCppClassRef and use it for both attribute paths.
GetOpCppClassName
stays for operations.
Commit: 87d1986bd2264b434e865044745725efbf52dda5
https://github.com/llvm/llvm-project/commit/87d1986bd2264b434e865044745725efbf52dda5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
Log Message:
-----------
[mlir][spirv] Avoid copies of local APInt values in folds (NFC) (#221084)
Move locally constructed APInt values into arithmetic operations at
their last use. Expand conditional returns where needed so returning a
local can use implicit move construction.
Found by Coverity.
Assisted-by: Codex
Commit: 44a4dbf32a6b54de32e4d064756d7a6ba5b9e808
https://github.com/llvm/llvm-project/commit/44a4dbf32a6b54de32e4d064756d7a6ba5b9e808
Author: edisongz <edisongz123 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/test/Dialect/Arith/int-range-narrowing.mlir
Log Message:
-----------
[MLIR][Arith] Don't narrow shifts whose amount can exceed the target width (#218495)
A shift by an amount >= the operand bitwidth is poison. Narrowing
changes that bitwidth, so an amount valid at the original width (e.g. 32
for i64) can become poison at the narrowed one (>= 32 for i32),
miscompiling `4 >> 32` from 0 to 4.
Only narrow shifts when the shift amount is provably below the target
width.
Fixes #218191
Commit: 36b179dff5c85de0a7aca763e618d8c15dd5b2e7
https://github.com/llvm/llvm-project/commit/36b179dff5c85de0a7aca763e618d8c15dd5b2e7
Author: Oliver Hunt <oliver at apple.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDecl.cpp
A clang/test/Sema/global-explicit-register-undefined-type.c
Log Message:
-----------
[clang][Sema] Crash due to asm labeled incomplete global register decls (#219746)
CheckAsmLabel fails to check for an incomplete type before attempting to
get the type layout. Short circuit on an incomplete type as Sema will
already reject a global with an incomplete type.
Commit: 5b4a54a5ae59b44f6e4c898984bb184a4b05d885
https://github.com/llvm/llvm-project/commit/5b4a54a5ae59b44f6e4c898984bb184a4b05d885
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
Log Message:
-----------
[mlir][LLVM] Remove dead constant verifier return (NFC) (#221833)
Every arm of the constant attribute-kind chain returns directly, leaving
the final success return unreachable. Remove the dead statement.
Found by Coverity.
Assisted-by: Codex
Commit: 45930cef5214e430aa7424cacb07e374a07ead12
https://github.com/llvm/llvm-project/commit/45930cef5214e430aa7424cacb07e374a07ead12
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
M mlir/lib/Tools/PDLL/Parser/Parser.cpp
M mlir/test/mlir-pdll/Parser/expr-failure.pdll
Log Message:
-----------
[mlir][PDLL] Reject overflowing unregistered result indices (#221834)
Unregistered operation result access accepts numeric member names, but
code generation emits a nonnegative I32 attribute. Reject values outside
the signed 32-bit range before building the AST and use the matching
type in codegen.
Found by Coverity.
Assisted-by: Codex
Commit: a2ce10c7c93b22ebe3540dbd2c88e5cf202860de
https://github.com/llvm/llvm-project/commit/a2ce10c7c93b22ebe3540dbd2c88e5cf202860de
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/cond-used-in-phi.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
M llvm/test/Transforms/ConstraintElimination/induction-nowrap-from-scev-not-ir.ll
M llvm/test/Transforms/ConstraintElimination/loops.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-cfg.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-decrement.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-wrapping.ll
M llvm/test/Transforms/ConstraintElimination/pr70510.ll
M llvm/test/Transforms/ConstraintElimination/transfer-signed-facts-to-unsigned-is-known-non-negative.ll
M llvm/test/Transforms/ConstraintElimination/wrapping-math.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/trunc-intrinsics.ll
Log Message:
-----------
[ConstraintElim] Use range-based NUW/NSW inferrence for Add. (#221487)
Factor out logic to strengthen NUW/NSW flags based on know no-wrap
regions and also use it for ADD.
This enables a number of additional folds in real-world workloads:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1215
Compile-time impact in the noise for geomean. Per workload there are a
few improvements and one regression `lencod` (stage1-ReleaseThinLTO)
https://llvm-compile-time-tracker.com/compare.php?from=bb577f620571ce3bb97f2e717b53500574a9cf27&to=6de758abcfa6fb6e9de359b1fb5cfb67b689afe5&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/221487
Commit: f7ce52f0f4ec943bfdc749bc67de00a1e3ece6bc
https://github.com/llvm/llvm-project/commit/f7ce52f0f4ec943bfdc749bc67de00a1e3ece6bc
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fdot2.ll
Log Message:
-----------
[AMDGPU] Fix FDOT2 fold for non-constant lane indices (#217646)
The fold only checked that the two lane index nodes were not the same
SDValue, but distinct nodes can still be equal at runtime, silently
picking the wrong lanes
Require both indices to be constant and distinct
Commit: bea94ba6d6424468b60478c4ef1933e4c598f58f
https://github.com/llvm/llvm-project/commit/bea94ba6d6424468b60478c4ef1933e4c598f58f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
Log Message:
-----------
[AMDGPU][True16][CodeGen] Do not fold hi16 SGPR copy (#220858)
Dropping the subreg on a hi16 copy would read the low half instead
Commit: 415d9c668e4d18908938df4847ada34cb82eb06b
https://github.com/llvm/llvm-project/commit/415d9c668e4d18908938df4847ada34cb82eb06b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.h
Log Message:
-----------
[mlir][ODS] Remove unconditional properties query (NFC) (#221844)
All operations emit a Properties struct, including operations without
explicit properties. Remove the stale hasProperties query and fold its
unreachable property-less paths from the operation, adaptor, and format
generators.
Found by Coverity.
Assisted-by: Codex
Commit: 95760fbf5cd5b6b9afcfff0a9639473792da5ed3
https://github.com/llvm/llvm-project/commit/95760fbf5cd5b6b9afcfff0a9639473792da5ed3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMRequiresSMTraits.h
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm-target-invalid.mlir
Log Message:
-----------
[mlir][NVVM] Reject malformed target chip names (#220873)
Parse the complete sm_<version>[a|f] grammar before using the SM
version. This prevents a failed integer conversion from leaving the
version uninitialized and also rejects overflowing encodings.
Found by Coverity.
Assisted-by: Codex
Commit: 5f9d1397b6a19d6ea23d6b6d27609495d97ffa88
https://github.com/llvm/llvm-project/commit/5f9d1397b6a19d6ea23d6b6d27609495d97ffa88
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][Tosa] Handle empty block-scaled reshape shapes (#220872)
Commit: cc9a7010afd7126e8ec45fb6a967d39849613f35
https://github.com/llvm/llvm-project/commit/cc9a7010afd7126e8ec45fb6a967d39849613f35
Author: Thurston Dang <thurston at google.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety][test] Fix UUM of fields added in #221610 and #205764 (#221843)
New LifetimeSafetyOpts fields were added in
https://github.com/llvm/llvm-project/pull/221610 but they are not
initialized in clang/unittests/Analysis/LifetimeSafetyTest.cpp, leading
to use-of-uninitialized-memory
(https://lab.llvm.org/buildbot/#/builders/164/builds/25165):
```
WARNING: MemorySanitizer: use-of-uninitialized-value
#0 0x555571559cbc in clang::lifetimes::internal::(anonymous namespace)::LifetimeChecker::LifetimeChecker(clang::lifetimes::internal::LoanPropagationAnalysis const&, clang::lifetimes::internal::MovedLoansAnalysis const&, clang::lifetimes::internal::LiveOriginsAnalysis const&, clang::lifetimes::internal::FactManager&, clang::AnalysisDeclContext&, clang::lifetimes::LifetimeSafetySemaHelper*, clang::lifetimes::LifetimeSafetyOpts const&) /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Analysis/LifetimeSafety/Checker.cpp:108:9
#1 0x5555715453cd in clang::lifetimes::internal::runLifetimeChecker(clang::lifetimes::internal::LoanPropagationAnalysis const&, clang::lifetimes::internal::MovedLoansAnalysis const&, clang::lifetimes::internal::LiveOriginsAnalysis const&, clang::lifetimes::internal::FactManager&, clang::AnalysisDeclContext&, clang::lifetimes::LifetimeSafetySemaHelper*, clang::lifetimes::LifetimeSafetyOpts const&) /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Analysis/LifetimeSafety/Checker.cpp:575:19
#2 0x555571524c1e in clang::lifetimes::internal::LifetimeSafetyAnalysis::run() /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Analysis/LifetimeSafety/LifetimeSafety.cpp:98:3
#3 0x55555c3da25b in LifetimeTestRunner /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/unittests/Analysis/LifetimeSafetyTest.cpp:71:15
...
Uninitialized value was stored to memory at
#0 0x55555bcd06c7 in __msan_memcpy /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/compiler-rt/lib/msan/msan_interceptors.cpp:1760:3
#1 0x5555715238ed in clang::lifetimes::internal::LifetimeSafetyAnalysis::LifetimeSafetyAnalysis(clang::AnalysisDeclContext&, clang::lifetimes::LifetimeSafetySemaHelper*, clang::lifetimes::LifetimeSafetyOpts const&) /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/lib/Analysis/LifetimeSafety/LifetimeSafety.cpp:54:39
#2 0x55555c3da1b9 in make_unique<clang::lifetimes::internal::LifetimeSafetyAnalysis, clang::AnalysisDeclContext &, std::nullptr_t, clang::lifetimes::LifetimeSafetyOpts &, 0> /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/libcxx_install_msan_track_origins/include/c++/v1/__memory/unique_ptr.h:713:30
#3 0x55555c3da1b9 in LifetimeTestRunner /home/b/sanitizer-x86_64-linux-bootstrap-msan/build/llvm-project/clang/unittests/Analysis/LifetimeSafetyTest.cpp:70:9
```
This patch fixes the issue by initializing the fields in the test to
true, which maintains the behavior prior to the new fields being added.
Additionally, this patch does a similar drive-by fix to the
SuggestAnnotations field (added in
https://github.com/llvm/llvm-project/pull/205764). Although there has
been no MSan report, that's likely either an MSan false negative or
insufficient test coverage.
Commit: 08b4a7559af99165fcbc1855d923e0e482a42079
https://github.com/llvm/llvm-project/commit/08b4a7559af99165fcbc1855d923e0e482a42079
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 89fe023 (#221823)
This fixes 89fe023484bd5b897dccefd290fe5e8536db47b0 (#221813).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=89fe023484bd5b897dccefd290fe5e8536db47b0
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: d031640796e10e0fed0a6ed72e844870dc4be8b3
https://github.com/llvm/llvm-project/commit/d031640796e10e0fed0a6ed72e844870dc4be8b3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/support/CMakeLists.txt
Log Message:
-----------
[orc-rt] Hide symbols by default in Bedrock and Support libs. (#221848)
Hides C/C++ symbols by default in the orc-rt Bedrock and Support
libraries. Only explicitly annotated APIs should be exposed by these
libraries.
Commit: 2e6c7bc8513ee405ca2e8a3032c1ab41a19ee90f
https://github.com/llvm/llvm-project/commit/2e6c7bc8513ee405ca2e8a3032c1ab41a19ee90f
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
A llvm/test/Transforms/OpenMP/indirect_call_specialization_cap.ll
Log Message:
-----------
[OpenMPOpt] Bound indirect-call specialization instead of paying for all of it (#219323)
`registerAAsForFunction()` seeds `AAIndirectCallInfo` unconditionally,
so device
code pays for specializing every indirect call site. Device code routes
many
calls through function-pointer tables and virtual dispatch, so a call
site can
see every address-taken candidate in the module, and the if-cascade
`AAIndirectCallInfo` builds over them is quadratic.
Skip specialization at a call site with more than three possible
callees,
overridable with `-openmp-opt-max-callees-for-specialization`. The bound
is a
threshold on the call site rather than a limit on how many callees get
specialized: the Attributor asks about each callee with the same total,
so a
site above the threshold keeps its indirect call instead of getting
three direct
ones plus a fallback.
Measured on a generated module with a 256-entry device function-pointer
table,
2048 dispatch functions and 64 target regions, gfx90a,
`opt -disable-verify -passes='openmp-opt,lto<O3>'`, min of 3 runs:
| | cap 3 | no cap |
|-----------------------------------------|-------|--------|
| LTO pipeline | 13.3s | 34.4s |
| final module, IR lines | 340k | 511k |
| cascade equality tests after openmp-opt | 310 | 499 |
The cost is not in `openmp-opt` itself, which is 1.23s either way; it is
in what
the rest of the pipeline does with the cascades. Sites at or below the
threshold
are still specialized, which `indirect_call_specialization_cap.ll`
covers from
both sides.
This PR previously carried two other changes, now split out as #221449
(loop
runtime callbacks) and #221450 (the worker-count gate), per @abidh's
request.
Tested on gfx90a: `llvm/test/Transforms/{OpenMP,Attributor}` 260 passed,
1
unsupported.
Commit: 2b7ee868b318f45372933e03d9a22203638e92db
https://github.com/llvm/llvm-project/commit/2b7ee868b318f45372933e03d9a22203638e92db
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/Transforms/JumpThreading/update-bpi-bfi-unfold-select.ll
Log Message:
-----------
[JumpThreading] Don't divide by all-zero branch weights (#221846)
Fixes #192165.
Commit: d91284c7f5747ade780b944ef9d4cb6d8bfbbc1e
https://github.com/llvm/llvm-project/commit/d91284c7f5747ade780b944ef9d4cb6d8bfbbc1e
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M openmp/runtime/src/kmp_settings.cpp
Log Message:
-----------
[libomp] Set `KMP_USE_YIELD=2` when `OMP_WAIT_POLICY=active` if it's not specified explicitly (#199628)
This patch sets `KMP_USE_YIELD=0` when `OMP_WAIT_POLICY=active` and
`KMP_USE_YIELD` is not explicitly set by the user. This is the same as
the value of `KMP_BLOCKTIME` is set to infinite when `KMP_BLOCKTIME` is
not explicitly set and `OMP_WAIT_POLICY=active`.
### Background
`KMP_USE_YIELD` is an environment variable for libomp to control the
behavior of threads when they are idle. We can specify 0, 1, or 2 as the
value of `KMP_USE_YIELD`. As I read the code, the behavior is as
follows:
- `KMP_USE_YIELD=0`: Threads will NOT yield the CPU when they are idle.
- `KMP_USE_YIELD=1`: Threads will yield the CPU when they are idle.
- `KMP_USE_YIELD=2`: Threads will yield the CPU when they are idle if we
are oversubscribed (i.e., more threads than CPU cores).
The default value of `KMP_USE_YIELD` is 1, which means that threads will
yield the CPU when they are idle.
On the other hand, there is an environment variable `OMP_WAIT_POLICY`
that controls the waiting behavior of threads in OpenMP. The OpenMP 6.0
Specification
(https://www.openmp.org/wp-content/uploads/OpenMP-API-Specification-6-0.pdf)
states as follows:
> The active value specifies that waiting native threads should mostly
be active, consuming processor cycles, while waiting. A compliant
implementation may, for example, make waiting native threads spin.
Therefore, I think it is more consistent to set `KMP_USE_YIELD=2` when
`OMP_WAIT_POLICY=active`.
Note: Using `KMP_USE_YIELD=2` instead of 0 here to avoid hanging when
oversubscribed.
### Performance
To confirm the effect of this patch, I ran SPEC CPU 2017 with several
configurations, including with and without this patch. As a result, I
observed that the performance of some benchmarks improved significantly
with this patch. Also I didn't see any performance degradation. Here are
the details of the performance improvements:
- Machine: Neoverse V2 (Grace, binding 64 threads to 64 cores)
- Configuration: `OMP_WAIT_POLICY=active OMP_NUM_THREADS=64`
| Benchmark | Performance Improvement |
|-|-|
| 621.wrf_s | 2.6x |
| 628.pop2_s | 5.5x |
---
In conclusion, I think it's reasonable to set `KMP_USE_YIELD=0` (or 2)
by default when `OMP_WAIT_POLICY=active` is specified, when the user
likely expects the threads to be active while waiting.
Resolve #181784.
Commit: 3a8ff8d1ddfe44f19926789170b8c00c9aea3d0c
https://github.com/llvm/llvm-project/commit/3a8ff8d1ddfe44f19926789170b8c00c9aea3d0c
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Add openmp test to xfail list (#221854)
Introduced in PR #219323. Looking at the PR, and given we haven't yet
addressed openmp profcheck failures, the change is highly unlikely to
have introduced a new regression (it's exposing existing ones)
Commit: 8a63b2ea6f9b6b25a6d90e20dcd76919e5bacb8d
https://github.com/llvm/llvm-project/commit/8a63b2ea6f9b6b25a6d90e20dcd76919e5bacb8d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/bedrock/Session.h
M orc-rt/include/orc-rt-c/support/Logging.h
Log Message:
-----------
[orc-rt] Add missing export annotations to C API. (#221856)
Commit: eb74688f5e2fb0cbd4c412a9fc54d0ed3dc48155
https://github.com/llvm/llvm-project/commit/eb74688f5e2fb0cbd4c412a9fc54d0ed3dc48155
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-select.ll
Log Message:
-----------
[test] auto-generate test check (#221656)
To make later update easy.
Commit: 9eb6467f3f03c7da1dbe3ebdd9a4d3068945e767
https://github.com/llvm/llvm-project/commit/9eb6467f3f03c7da1dbe3ebdd9a4d3068945e767
Author: Zhaoxuan Jiang <jiangzhaoxuan94 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lld/MachO/ICF.cpp
M lld/MachO/UnwindInfoSection.cpp
A lld/test/MachO/icf-lsda-reloc.s
Log Message:
-----------
[lld][MachO] Ignore relocated bytes when folding LSDAs (#220155)
AArch64 exception tables reference type info through PC-relative
pointer-to-GOT relocations. The assembler leaves the negated field
offset in each relocated field, which the linker ignores, so identical
tables differ in their raw bytes and are never folded. Treat
__gcc_except_tab like __eh_frame and zero the relocated fields before
ICF hashes and compares it.
Folding these LSDAs exposes a latent issue: the LSDA pointer of a DWARF
FDE is resolved to an InputSection when the FDE is parsed and is never
canonicalized after ICF. A function that is unwound via its FDE and
whose LSDA was folded away therefore gets an __unwind_info LSDA entry
computed from the dead input section. Fixed it in the same commit.
This patch is LLM-driven, but the issue was observed in production and
the test is reduced from the production object.
Commit: c22d6a86d2e47524cd259f81206db7adf593e5a4
https://github.com/llvm/llvm-project/commit/c22d6a86d2e47524cd259f81206db7adf593e5a4
Author: wangjue <wangjue.wangjue at alibaba-inc.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M bolt/lib/Passes/FixRISCVCallsPass.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
A bolt/test/RISCV/conditional-tail-call-relocs.s
Log Message:
-----------
[BOLT][RISCV] Mark newly created tail calls (#221672)
Tail calls created during CFG normalization lack the tail-call
annotation, so FixRISCVCallsPass rewrites them as regular calls that
clobber ra.
Set the annotation in createTailCall(). Clear builder annotations before
moving the originals when rebuilding calls to avoid duplicate annotation
markers.
Add a relocation-mode regression test for a conditional tail call.
Commit: 2b03c66b5f0fdd12f616d845b61417442322f03c
https://github.com/llvm/llvm-project/commit/2b03c66b5f0fdd12f616d845b61417442322f03c
Author: Daedie-git <HC_Daedalus at hotmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/docs/StandardCPlusPlusModules.md
M clang/lib/AST/ODRDiagsEmitter.cpp
M clang/lib/AST/ODRHash.cpp
A clang/test/Modules/odr-hash-using-declarations.cppm
M clang/test/Modules/pr76638.cppm
Log Message:
-----------
[Clang][Modules] Fix ODR handling of types found through using-declarations (#221839)
Fixes #78850.
Clang can diagnose an ODR violation for identical definitions when a
type is
found directly in one module's global module fragment and through a
using-declaration in another. The lookup routes produce different AST
type
wrappers even though they refer to the same declaration.
Normalize `UsingType` to the target declaration's type before hashing
it. Keep
the keyword and qualifier from the use site, rather than from the
using-declaration. This also lets the hash distinguish differently
qualified
uses without canonicalizing away meaningful spelling differences.
The normalization exposes an existing assertion in the enum ODR
diagnostic
path: `AddEnumDecl` hashes canonical underlying integer types, but the
diagnostic emitter compares hashes of their spelled types. Compare the
actual
underlying integer types instead, while retaining the original spelling
in the
diagnostic. The extended `pr76638.cppm` regression also reproduces the
assertion
without the normalization change, when both underlying types are found
through
same-named using-declarations.
Use `EnumDecl::getIntegerType()` for this comparison so ignored cv
qualifiers
in the enum-base do not incorrectly take precedence over an actual
difference
in enumerator initializers. A regression checks that diagnostic as well.
Regression coverage includes both lookup directions, typedefs and
aliases,
record and enum types, chained using-declarations, templates, and
negative
tests for qualification, elaborated keywords, and cv qualification.
Remove the
now-fixed #78850 example from the modules documentation.
## Validation
Built from main at `44a4dbf32a6b54de32e4d064756d7a6ba5b9e808` plus this
patch,
in Release mode with assertions enabled on Windows x86-64 (X86 backend,
Clang 23.1.0 bootstrap, VS 2022 SDK).
| Suite | Passed | Unsupported | Expected Failures |
| :------------ | -----: | ----------: | ----------------: |
| Clang Modules | 914 | 34 | 0 |
| Clang PCH | 289 | 6 | 2 |
| **Total** | 1,203 | 40 | 2 |
Unexpected failures: **0**.
- Removing both implementation changes and rebuilding on the same main
base
makes both affected regression tests fail: the new lookup test reports
false ODR errors, and the extended enum test asserts while diagnosing an
ODR
violation. Restoring the changes and rebuilding passes both complete
suites.
- The cv-qualifier regression also fails with the earlier comparison of
spelled underlying types, then passes with `getIntegerType()`.
- Changed implementation lines pass clang-format checks; `git diff
--check`
passes.
The original release/23.x patch was also tested: 1,180 passed, 39
unsupported,
2 expected failures, and no unexpected failures across Modules and PCH.
Its
unmodified implementation reproduced the false-positive diagnostics,
missed
qualification diagnostic, and enum assertion.
Other platforms and configurations have not been tested locally.
This is a targeted ODR fix, not a general resolution of Clang's
remaining C++
module limitations.
The fix is also relevant to release/23.x; a backport can follow upstream
review
and merge.
Assisted-by: OpenAI Codex Astra
Co-authored-by: Bjorn Schobben <bjorn.schobben at aimsport.com>
Commit: 80793a65f0c8cab368358d2ce3e3d92bc7a63fb8
https://github.com/llvm/llvm-project/commit/80793a65f0c8cab368358d2ce3e3d92bc7a63fb8
Author: jiang1997 <jieke at live.cn>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__ranges/lazy_split_view.h
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/end.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/view_interface.pass.cpp
Log Message:
-----------
[libc++][ranges] Implement LWG 3599 (#221573)
Implement [LWG 3599](https://wg21.link/LWG3599) by requiring
`forward_range<const Pattern>` for the `const` overloads of
`lazy_split_view::begin` and `end`.
This adds tests for disabled `begin()` and fallback `end()` on
non-const-forward patterns, as well as a regression test for
`view_interface::front()`.
Closes #189808
Commit: 0a50c218e000acee02b90f8a0f1f50f3da9059e8
https://github.com/llvm/llvm-project/commit/0a50c218e000acee02b90f8a0f1f50f3da9059e8
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll
M llvm/test/CodeGen/Mips/mips1-load-in-delay-slot.ll
A llvm/test/CodeGen/Mips/mips1-not-support-ldc1-sdc1.ll
Log Message:
-----------
[MIPS] Support MIPS I hard-float double loads/stores with LWC1/SWC1 (#209362)
MIPS I lacks LDC1/SDC1. This patch implements double precision
loads/stores using LWC1/SWC1 instructions.
* Add BuildPairF64_FPR and ExtractElementF64_FPR nodes
* Use them in lowerLOAD/lowerSTORE for MIPS I hard-float
* Avoid redundant mtc1/mfc1 instructions
Matches GCC behavior for MIPS I hard-float.
Fix #62190.
Commit: 7d04e28c7cee23af6a33cebdfecdaa7d43d1d4fe
https://github.com/llvm/llvm-project/commit/7d04e28c7cee23af6a33cebdfecdaa7d43d1d4fe
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
M llvm/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll
M llvm/test/CodeGen/X86/select-lea.ll
M llvm/test/CodeGen/X86/smul-with-overflow.ll
M llvm/test/CodeGen/X86/smul_fix_sat.ll
M llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
M llvm/test/CodeGen/X86/umul-with-carry.ll
M llvm/test/CodeGen/X86/umul-with-overflow.ll
M llvm/test/CodeGen/X86/umul_fix_sat.ll
M llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/xmulo.ll
Log Message:
-----------
[X86] Prefer carry to overflow flag when using multiplication (#221611)
For all possible MUL/IMUL it will always output CF==OF, and CF is better
folding, so there's absolutely no reason the x86 backend should be
checking OF instead of CF for any form of multiply.
Did the change in FastISel too for consistency.
Commit: 0513c32abe1eff329fd22b578f4995e59d6140a2
https://github.com/llvm/llvm-project/commit/0513c32abe1eff329fd22b578f4995e59d6140a2
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
Log Message:
-----------
[GlobalISel] When folding to fma correctly find fpext(fmul) with fewer uses (#218013)
When folding: `(fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext
y), z)` and both addends are candidates, correctly pick the side with
fewer uses. Previously the code looked for a `fmul` with the fewest uses
rather than a `fpext(fmul)`.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 2edc68ceee32011f8f2d28fb97b64bc9e3a3b521
https://github.com/llvm/llvm-project/commit/2edc68ceee32011f8f2d28fb97b64bc9e3a3b521
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Parse/ParseExprCXX.cpp
M clang/test/Parser/recovery.cpp
M clang/test/SemaCXX/MicrosoftSuper.cpp
Log Message:
-----------
[clang] Reject __super when preceded by a scope specifier (#221492)
The `__super` keyword is an MSVC extension that refers to the base class
of the current class context. It is fundamentally invalid for `__super`
to be qualified by another scope specifier (e.g. `::__super` or
`N::__super`).
Fixes #212988
---------
Co-authored-by: Shengxin Pei <TPPPP72 at outlook.com>
Co-authored-by: Corentin Jabot <corentinjabot at gmail.com>
Commit: 7efd21ff7aceefcec79adced0dcc99bf121e9696
https://github.com/llvm/llvm-project/commit/7efd21ff7aceefcec79adced0dcc99bf121e9696
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/TypeBase.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[clang] Unique the QualType-keyed type pools in a UniquingSet. NFC (#221850)
Eight of the ASTContext type pools key on a QualType, or on a QualType
and a bool. The `get*Type()` functions incur the FoldingSetNodeID
serialization overhead before probing the hash table.
Switch to UniquingSet. Define `QualTypeBoolInfo` for three pools that
key on a QualType and a bool, because DenseMapInfo has no bool
specialization.
After the canonical type is built, these getters re-probe to refresh the
insert token. A token is now a hash (#218190), not a bucket, so nothing
invalidates it; fold the re-probe into the assertion it feeds.
Aided by Opus 5
Commit: 49ce9d0aac2117edc0d50e5a7a838f934c99dd61
https://github.com/llvm/llvm-project/commit/49ce9d0aac2117edc0d50e5a7a838f934c99dd61
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/tcgen05-alloc.mlir
Log Message:
-----------
[MLIR][NVVM] Add "exclusive" support in tcgen05 alloc/dealloc Ops (#219451)
This patch adds `exclusive` support in `tcgen05.alloc/dealloc` MLIR ops.
Lit tests are added to verify the lowering to the intrinsics.
PTX ISA Reference:
https://docs.nvidia.com/cuda/developer-preview/13.4/parallel-thread-execution/index.html#tcgen05-instructions-tcgen05-alloc-dealloc-relinquish-alloc-permit
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 62397f8b3c3986f54187ce08f00b3448ea1f8880
https://github.com/llvm/llvm-project/commit/62397f8b3c3986f54187ce08f00b3448ea1f8880
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaAttr.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/MC/StringTableBuilder.cpp
M llvm/lib/MCA/HardwareUnits/LSUnit.cpp
M llvm/lib/MCA/HardwareUnits/ResourceManager.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/IR/PDL/PDLPatternMatch.cpp
Log Message:
-----------
Iterate DenseMaps with auto and structured bindings. NFC (#221869)
Avoid naming `std::pair` directly. The DenseMap bucket is subject to
change (#221853).
Commit: 131e31016ff94c8782d726baa3ed0160a480f3f3
https://github.com/llvm/llvm-project/commit/131e31016ff94c8782d726baa3ed0160a480f3f3
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move createInsertVector, createExtractVector (#221785)
Move the following BoUpSLP-independent shuffle helpers out of
SLPVectorizer.cpp into SLPVectorizer/SLPUtils.{h,cpp}:
createInsertVector
createExtractVector
They sit with the existing shuffle helpers. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 6a183b8853b79a134402332cf4a776a8090d1b88
https://github.com/llvm/llvm-project/commit/6a183b8853b79a134402332cf4a776a8090d1b88
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/docs/ProgrammersManual.md
M llvm/unittests/ADT/FoldingSet.cpp
Log Message:
-----------
[ADT] Document the UniquingSet contracts. NFC (#221860)
#220195 added an isEqual hook, so an Info can now override the
comparison as well as the key and the hash. Name the three hooks, and
correct the guidance on when to prefer UniquingSet over FoldingSet.
Cover getOrInsert, which UniquingSet had no test for: an absent key
inserts, an equal key returns the node already in the set.
Aided by Opus 5
Co-authored-by: Kazu Hirata <kazu at google.com>
Commit: 08eb5edcafcc21faa841a75a29d0c2f2090535f3
https://github.com/llvm/llvm-project/commit/08eb5edcafcc21faa841a75a29d0c2f2090535f3
Author: GabrielWu2004 <101153587+GabrielWu2004 at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/canonicalize.mlir
Log Message:
-----------
[MLIR] AllocaOp canonicalization for array allocation in LLVM dialect (#221508)
Add the following canonicalization pattern to AllocaOp in MLIR's LLVM
dialect:
```
%n = constant(N)
%alloca = llvm.alloca %n x Ty
```
->
```
%one = constant(1)
%alloca = llvm.alloca %one x !llvm.array<N x Ty>
```
Here N is a constant representable with 64-bits. With this
canonicalization, the AllocaOp will be translated to `alloca [N x Ty]`
in LLVM IR. Without this canonicalization, the AllocaOp was translated
to `alloca Ty, N`. We prefer `alloca [N x Ty]` over `alloca Ty, N` for
fixed-size array allocation.
See [this
RFC](https://discourse.llvm.org/t/rfc-allocaop-canonicalization-in-mlirs-llvm-dialect/91734)
for more detailed problem motivation and description.
Assisted by: Codex
Commit: d34720a9ca4492dbb65af8b652e60dbb5f60ca55
https://github.com/llvm/llvm-project/commit/d34720a9ca4492dbb65af8b652e60dbb5f60ca55
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libcxx/test/std/utilities/optional/optional.comp_with_t/equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/greater.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/greater_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/less_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/less_than.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/not_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/greater_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/greater_than.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/less_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/less_than.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/not_equal.pass.cpp
M libcxx/test/support/test_comparisons.h
Log Message:
-----------
[libc++][test] Test SFINAE for `optional`'s operators in C++17 (#221643)
We have been intentionally constraining `optional`'s comparison
operators since C++17, so it is probably better to test the constraints
in C++17 mode. Given the constraints are standardized only since C++26
(via P2944R3), `LIBCPP_STATIC_ASSERT` is used in old modes.
In order to do this, `test_comparisons.h` is reworked to expose
`NonComparable` and `EqualityComparable` in pre-C++20 modes, and a new
type `TotallyOrdered` is invented as a replacement of
`ThreeWayComparable` in old modes.
As drive-by, also switches to use `// REQUIRES: std-at-least-c++17` in
touched test files, and adds previously missed includes of
`<type_traits>`.
Commit: cc798fb63ca1a08f43cdcd314b66a96fa973e584
https://github.com/llvm/llvm-project/commit/cc798fb63ca1a08f43cdcd314b66a96fa973e584
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-override.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-validate-data.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-invalid.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-mc32.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-override.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-validate-data.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-im2colw.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/tma_load_cluster_im2col.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cluster_tile.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cta_im2col.mlir
M mlir/test/Target/LLVMIR/nvvm/tma_load_cta_tile.mlir
Log Message:
-----------
[LLVM][NVPTX] Add Rubin extensions for G2S Tensor intrinsics (#220029)
This change adds support for the Rubin-extended Global-to-Shared tensor
copy intrinsics for both the Cluster and CTA variants:
1. 32-bit multicast mask support: the G2S Cluster intrinsics are now
overloaded on the multicast mask type (i16/i32); an i32 mask lowers to
`.multicast::cluster::32b`.
2. Data-validity reporting through the mbarrier: all G2S Cluster and CTA
intrinsics, including the property-override forms, take a trailing `i32
%validate_pattern` immediate (range [0, 6)) that selects a
`.mbarrier::report::validity` qualifier. It defaults to 0 (disabled).
3. Override tensor map properties: the G2S Cluster and CTA intrinsics
now support `.override::global_address`, optionally followed by
`.override::global_dim` / `.override::global_dim_stride`, across all
load modes. The dim/stride overrides apply to tile mode only; im2col and
gather4 support the global-address override only.
The new `validate_pattern` argument changes the IR signatures of all G2S
intrinsics; legacy declarations are auto-upgraded with the missing
trailing arguments defaulted to 0, and the multicast mask type selects
the overload. The MLIR NVVM `CpAsyncBulkTensorGlobalToSharedClusterOp`
is updated to build the new signature.
Commit: df3c1f712828dda66fe7efa0d2957629d60f8df8
https://github.com/llvm/llvm-project/commit/df3c1f712828dda66fe7efa0d2957629d60f8df8
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
Log Message:
-----------
[AMDGPU][GIsel][NPM] Port "AMDGPURegBankLegalize" to NPM (#217322)
Probably doesn't require all tests to be updated.
Assisted-by: Opus-4.8,
Commit: 05fa66e6624e6b14346e559cd7b692aaf48f3ca7
https://github.com/llvm/llvm-project/commit/05fa66e6624e6b14346e559cd7b692aaf48f3ca7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/huge-stack.ll
M llvm/test/CodeGen/X86/llvm.sincos.vec.ll
M llvm/test/CodeGen/X86/pr1505b.ll
M llvm/test/CodeGen/X86/stack-align.ll
M llvm/test/CodeGen/X86/subcarry.ll
M llvm/test/CodeGen/X86/swifterror.ll
M llvm/test/CodeGen/X86/var-permute-128.ll
M llvm/utils/UpdateTestChecks/asm.py
Log Message:
-----------
[UpdateTestChecks][X86] Allow --no_x86_scrub_sp to disable folded stack spill/restore stack math scrubing (#221788)
We were handling cases to show general load/store stack math, but had
missed the r/w/rmw folded cases
Commit: d402c6191ad4051a3cb534dae125dfdf1f304889
https://github.com/llvm/llvm-project/commit/d402c6191ad4051a3cb534dae125dfdf1f304889
Author: Andrew Gaul <andrew at gaul.org>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/test/CodeGen/X86/PR40322.ll
A llvm/test/CodeGen/X86/atomic-cmp-fold.ll
M llvm/test/CodeGen/X86/atomic-unordered.ll
Log Message:
-----------
[X86] Fold atomic loads into compares (#221290)
A compare of an atomic load kept the load in a register (mov + cmp/test)
where a compare of a regular load folds the load into the compare's
memory operand. The folded form performs a single full-width load, and
on x86 an ordinary load already provides every ordering up to seq_cst,
so folding is legal for any non-extending atomic load.
Add isel patterns folding an atomic load into CMP (mi/mr/rm forms across
i8/i16/i32/i64). Compare-to-zero already reaches these via EmitTest;
nonzero and register compares are emitted as a flag-only X86ISD::SUB (to
enable CSE with a real subtract) whose load the peephole then folds. The
peephole cannot move an ordered access, so those never folded for atomic
loads. Emit X86ISD::CMP instead when an operand is a foldable atomic
load: it has no non-atomic sibling to CSE with anyway.
x86lint reports 5854 "load foldable into compare" sites in a release
build of Firefox's libxul.so; sampling shows the majority are
atomic-load compares of the kind this folds -- mozilla::Atomic and
std::atomic loads, MOZ_LOG level checks (an Atomic<LogLevel>), and Rust
core::sync::atomic and log-crate level checks.
---------
Co-authored-by: Claude Fable 5 <noreply at anthropic.com>
Commit: 1e679c028b30b6542c8712ef2023911673e55c7c
https://github.com/llvm/llvm-project/commit/1e679c028b30b6542c8712ef2023911673e55c7c
Author: Martin Storsjö <martin at martin.st>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
M mlir/CMakeLists.txt
Log Message:
-----------
[CMake] Move -Wno-unused-but-set-parameter from MLIR up to LLVM (#221824)
This warning is known to have false positives with GCC versions before
14.
Since 3aec6a40bb4e49f9ea181ac5c949b6c7c20a5465, this warning appears
when building LLVMSupport as well - thus move the disabling of the
warning up from MLIR to all of LLVM.
In HandleLLVMOptions, the common procedure is to not check for whether
the options are supported or not, but to just hardcode the version
ranges where the options are supported, per compiler.
This option (and -Wunused-but-set-parameter) is available in GCC since
long before our minimum required version.
Commit: 011005fecf846e40dad1941f6cbbd6653ae37460
https://github.com/llvm/llvm-project/commit/011005fecf846e40dad1941f6cbbd6653ae37460
Author: Rohan Shenoy <RohanRadhesh.Shenoy at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrSNP.td
M llvm/test/MC/Disassembler/X86/x86-64.txt
M llvm/test/MC/X86/SNP-64.s
Log Message:
-----------
[X86] Support further Zen5 and Zen6 instructions (#221659)
Support the following system instructions,
RMPREAD: https://docs.amd.com/v/u/en-US/24594_3.38_APM_Vol3_PUB
RMPOPT: https://docs.amd.com/search/all?query=69201
RMPCHKD (RMP Dirty) : https://docs.amd.com/search/all?query=69203
Commit: 0c098ae4518902f8f30abae5a620bf57fa84895a
https://github.com/llvm/llvm-project/commit/0c098ae4518902f8f30abae5a620bf57fa84895a
Author: Martin Storsjö <martin at martin.st>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Support/CMakeLists.txt
Log Message:
-----------
[Support] [CMake] Only pass -Wno-c99-extensions to Clang, not GCC (#221822)
GCC doesn't support this option, only Clang.
GCC doesn't warn if an unrecognized `-Wno-<foo>` option is passed, but
if GCC produces other warnings, it also adds a note about `-Wno-<foo>`
not being recognized, and that it may have been intended to silence the
warning that was produced.
Commit: 2c2ff263a437efccf074a07cb2906025252153d0
https://github.com/llvm/llvm-project/commit/2c2ff263a437efccf074a07cb2906025252153d0
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
Log Message:
-----------
[GlobalISel] Avoid copying complex pattern renderers (NFC) (#221657)
They're immediately destroyed after being copied, move them instead.
Improves aarch64-O0-g CTMark geomean -0.10%.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=69a2cfb9a265b7c4a18ef7121a7afb239c886d13&stat=instructions:u
Assisted-by: codex
Commit: 2a9266ce8524af516426835bff1c06fb78d5280d
https://github.com/llvm/llvm-project/commit/2a9266ce8524af516426835bff1c06fb78d5280d
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Log Message:
-----------
[AArch64][GlobalISel] Avoid duplicate register-bank queries in selectCopy (NFC) (#221655)
selectCopy redundantly queried both register banks through a single-use
helper. Inline the helper to reuse the existing results.
Small -0.04% geomean improvement on CTMark aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=ca7c3e1d88a6ca20b104b0fb62ce79897b61afc8&stat=instructions:u
Assisted-by: codex
Commit: 16df25d03f5a5becf9dbe994ef6b6d4546b357d9
https://github.com/llvm/llvm-project/commit/16df25d03f5a5becf9dbe994ef6b6d4546b357d9
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
M llvm/lib/Support/APInt.cpp
Log Message:
-----------
[APInt][NFC] Add branch hints to APInt single-word (#219437)
The fast-path for APInt is generally done with for "single word"
integers, i.e. ones that can be represented in a single 64-bit word.
This commit adds branch hints to the single-word branching to help
indicate to the compilers prioritize branch-prediction towards the
fast-path. The trade-off of this is that the >64-bit APInt case will be
slower.
---------
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: e91092685eab2ab0348ea06df2c3446001b480d4
https://github.com/llvm/llvm-project/commit/e91092685eab2ab0348ea06df2c3446001b480d4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Mangling.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/Mangler.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolNameSpec.h
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Mangling.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/Shared/Mangler.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
R llvm/unittests/ExecutionEngine/Orc/MangleAndInternerTest.cpp
A llvm/unittests/ExecutionEngine/Orc/ManglerTest.cpp
Log Message:
-----------
[ORC] Add SymbolNameSpec, hoist name mangling into Shared.
Introduce two Shared, ExecutionSession-independent pieces:
- SymbolNameSpec (Shared/SymbolNameSpec.h): a StringRef paired with a
SymbolNameKind (Verbatim, Linker, IR, C) describing the naming level
a symbol name is expressed in. A lightweight, dependency-free value
type, so it can describe interface-name constants in Shared headers.
- Mangler (Shared/Mangler.h, Shared/Mangler.cpp): the linker
name-mangling logic factored out of MangleAndInterner. It holds only
a ManglingMode (no ExecutionSession or SymbolStringPool), so names
can be mangled on the executor side as well as the controller
side. It exposes withMangledNameDo (which avoids allocating when
mangling is a no-op) and a mangledCopy convenience, both dispatching
on the spec's SymbolNameKind.
MangleAndInterner becomes a thin wrapper: it derives a ManglingMode
(from an ABIName / ManglingMode / DataLayout), holds a Mangler, and
interns whatever the Mangler produces. Behavior is unchanged.
This lets lookup utilities eventually accept C / IR source names and
mangle them to linker level on the caller's behalf, rather than
requiring pre-mangled names. The MangleAndInternerTest unit tests are
renamed to ManglerTest and now exercise Mangler directly;
MangleAndInterner is left untested since it is slated for removal.
Commit: 03474869170f49bd676f92ab86d15063a68d3ea0
https://github.com/llvm/llvm-project/commit/03474869170f49bd676f92ab86d15063a68d3ea0
Author: David Green <david.green at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3AE.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-sve-instructions.s
Log Message:
-----------
[AArch64] Correct the throughput of reductions on Neoverse V3ae (#221151)
This tightens up the throughput of sve saddv, sminv, smaxv, along with
the unsigned variants. They were a bit high due to the use of too many
micro ops.
Commit: d6a6de09cce9d0e08821a9aa15a0cbcb0889bb37
https://github.com/llvm/llvm-project/commit/d6a6de09cce9d0e08821a9aa15a0cbcb0889bb37
Author: Ketan Roy <145851442+MrRoy09 at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/DSInstructions.td
Log Message:
-----------
[AMDGPU] Use AMDGPUMnemonicAlias in DS_Real_gfx13 (NFC) (#217912)
Emit an AMDGPUMnemonicAlias in DS_Real_gfx13 so it carries the
PredicateControl fields.
NFC: 46 gfx13 aliases gain the PredicateControl fields at their
defaults; Predicates is unchanged on all of them.
Commit: a9cbac7d954efa6ac591fa099ea299a5add14188
https://github.com/llvm/llvm-project/commit/a9cbac7d954efa6ac591fa099ea299a5add14188
Author: David Green <david.green at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
A llvm/test/CodeGen/Thumb2/LowOverheadLoops/dbg-verify.ll
Log Message:
-----------
[ARM] Handle debug instructions in LowOverheadLoop (#221699)
The last instruction in the block might be a debug instruction, in which
case we should get the last non-debug instruction.
Fixes #221633.
Commit: 586cfbcd9d59af33894e79192fdcad6057467465
https://github.com/llvm/llvm-project/commit/586cfbcd9d59af33894e79192fdcad6057467465
Author: Oscar Priego <oscar.priegov at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/avx512-icmp-sle-zero.ll
A llvm/test/CodeGen/X86/bitcast-sign-mask.ll
A llvm/test/CodeGen/X86/compress-evex-sign-mask.mir
M llvm/test/CodeGen/X86/compress-evex-vpmov-kill.mir
Log Message:
-----------
[X86] X86CompressEVEX - Fold AVX-512 sign-mask compares to MOVMSK (#216884)
## Summary
Fold AVX-512 complementary signed sign-test masks to the corresponding
MOVMSK instructions in `X86CompressEVEX`.
AVX-512 lowers comparisons such as:
- `X >= 0`
- `X > -1`
to `VPCMP*` producing a k-mask followed by `KMOV`.
For 128-bit and 256-bit B/D/Q forms, these masks can instead be obtained
from the source sign bits using:
- `VPCMPB` -> `VPMOVMSKB`
- `VPCMPD` -> `VMOVMSKPS`
- `VPCMPQ` -> `VMOVMSKPD`
followed by the appropriate complement.
## Details
The complement is restricted to the meaningful lane-mask bits so that
unused upper bits retain the zero-extension semantics of `KMOV`.
For the 32-lane byte case, all 32 bits are meaningful, so `NOT32r` can
be used directly without clobbering EFLAGS.
The transformation is limited to 128-bit and 256-bit B/D/Q forms with a
single non-narrowing `KMOV` consumer.
The matcher also verifies the expected zero/all-ones producer for the
comparison constant and avoids the fold when required register or
EFLAGS liveness constraints are not satisfied.
## Tests
Added:
- end-to-end CodeGen coverage for the affected sign-mask cases;
- dedicated MIR coverage for `X86CompressEVEX`;
- negative MIR cases covering:
- multiple mask uses;
- source clobbers;
- unsupported predicates/constants;
- narrowing `KMOV`;
- 512-bit vectors;
- extended registers;
- live EFLAGS;
- masked-move consumers with incompatible mask polarity;
- incorrect all-ones producer width;
- dead `KMOV` destinations.
Existing `VPMOV*2M + KMOV -> MOVMSK` coverage is preserved.
Fixes #216774
Signed-off-by: Oscar Priego Verdugo <oscar.priegov at gmail.com>
AI-assisted development tools were used during this contribution; I
personally modified, reviewed, and validated the final patch
Commit: 5700f6fefdc532bb6fa6e30f780a5a553253722e
https://github.com/llvm/llvm-project/commit/5700f6fefdc532bb6fa6e30f780a5a553253722e
Author: Vlad Sytchenko <vsytch at hotmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/test/CodeGenCoroutines/coro-destructor-of-final_suspend.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/test/Transforms/Coroutines/ArgAddr.ll
M llvm/test/Transforms/Coroutines/coro-align16.ll
M llvm/test/Transforms/Coroutines/coro-align32.ll
M llvm/test/Transforms/Coroutines/coro-align64-02.ll
M llvm/test/Transforms/Coroutines/coro-align64.ll
M llvm/test/Transforms/Coroutines/coro-align8-02.ll
M llvm/test/Transforms/Coroutines/coro-align8.ll
M llvm/test/Transforms/Coroutines/coro-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-alloca-03.ll
M llvm/test/Transforms/Coroutines/coro-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-alloca-06.ll
M llvm/test/Transforms/Coroutines/coro-alloca-08.ll
M llvm/test/Transforms/Coroutines/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-01.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-arrayalloca.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll
M llvm/test/Transforms/Coroutines/coro-param-copy.ll
M llvm/test/Transforms/Coroutines/coro-spill-defs-before-corobegin.ll
A llvm/test/Transforms/Coroutines/coro-split-index-datalayout.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-02.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-03.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-04.ll
M llvm/test/Transforms/Coroutines/coro-split-tbaa-md.ll
Log Message:
-----------
[CoroSplit] Don't go sub-word for suspend index (#221374)
Currently, `CoroFrame` selects the coroutine suspend index type
(`SwitchIndexType`) using `Type::getIntNTy(Context, IndexBits)`. For
coroutines with fewer than 256 suspend points, this produces
sub-byte/sub-word integer types (such as `i1`, `i2`, or `i8`) in the
coroutine frame struct.
On targets whose `DataLayout` specifies `-n32` (no legal sub-32-bit
integer types), storing and loading sub-word integer fields in memory
forces the backend to emit read-modify-write sequences on every
coroutine suspend and zero-extension masks on every resume.
Use `DataLayout::getSmallestLegalIntType(Context, IndexBits)` when
selecting `SwitchIndexType` so that targets respect their legal native
integer width.
Commit: 4b11439e535eb820d2f4cc5ac9694bf539d8213f
https://github.com/llvm/llvm-project/commit/4b11439e535eb820d2f4cc5ac9694bf539d8213f
Author: David Green <david.green at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-build-vector.ll
M llvm/test/CodeGen/AArch64/arm64-tbl.ll
M llvm/test/CodeGen/AArch64/neon-anyof-splat.ll
M llvm/test/CodeGen/AArch64/pdep.ll
M llvm/test/CodeGen/AArch64/pext.ll
Log Message:
-----------
[AArch64] Combine scalar_to_vector(C) -> buildvector (#220948)
This helps keep a single canonical form of a constant vector, helping a
number of the existing buildvector combines trigger.
Commit: 296d80836bb77f9a8b5e159ef615a9965171cfba
https://github.com/llvm/llvm-project/commit/296d80836bb77f9a8b5e159ef615a9965171cfba
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-fmed3-const.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-merge-readanylane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-smed3.mir
Log Message:
-----------
[AMDGPU][GIsel][NPM] Port "AMDGPURegBankCombiner" to NPM (#217323)
Assisted-by: Opus-4.8
Commit: 5886c703eb2d205656811d78db82b76524c47da9
https://github.com/llvm/llvm-project/commit/5886c703eb2d205656811d78db82b76524c47da9
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/TypeBase.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/Type.cpp
Log Message:
-----------
[clang] Unique more ASTContext type pools in a UniquingSet. NFC (#221898)
Similar to #221850.
Eight pools key on a small tuple of types, integers and pointers, yet
each get*Type() serializes that into a FoldingSetNodeID and hashes it
out of line before probing. Switch to UniquingSet.
These getters re-probe after building the canonical type. A token is a
hash (#218190), not a bucket, so nothing invalidates it. Drop unneeded
assertions.
Commit: bd5c005a780ced31e3a4b7717474638be825cb15
https://github.com/llvm/llvm-project/commit/bd5c005a780ced31e3a4b7717474638be825cb15
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes e910926 (#221908)
This fixes e91092685eab2ab0348ea06df2c3446001b480d4.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=e91092685eab2ab0348ea06df2c3446001b480d4
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 9f5548da33ffdb282225bc03e17c0702c4c31884
https://github.com/llvm/llvm-project/commit/9f5548da33ffdb282225bc03e17c0702c4c31884
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
Log Message:
-----------
[SPIRV] Preserve DebugGlobalVariable emission order. (#221759)
Iterate GlobalVariableDebugInfoMap with MapVector so OpString and
DebugGlobalVariable follow insertion order.
The following tests had non-deterministic output, although didn't fail
due to the use of CHECK-DAG:
- llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-multi-gve.ll
- llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-block-namespace.ll
- llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
Commit: 478f9da04672855854811d5bca7f1fd05c52ed90
https://github.com/llvm/llvm-project/commit/478f9da04672855854811d5bca7f1fd05c52ed90
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/test/CodeGen/AArch64/fp-veclib-expansion.ll
Log Message:
-----------
[SelectionDAG] Widen vector math libcalls when no routine is available (#218948)
`tryExpandVecMathCall` currently only checks for a vector math routine
matching the node's exact vector type, unrolling when none is found.
This is suboptimal, and can lead to crashes for scalable types (which
cannot be unrolled).
This PR implements widening to first check if a routine with a wider vec
type exists before falling back to unrolling.
Example:
```
; llc -mtriple=aarch64 -mattr=+sve -vector-library=sleefgnuabi crash.ll
define <vscale x 2 x float> @frem_nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b) {
%res = frem <vscale x 2 x float> %a, %b
ret <vscale x 2 x float> %res
}
```
NOTE: When the routines take a mask (e.g. if they're scalable variants),
only relevant lanes are activated. Vectors are padded with copies of the
operand to avoid running on poison.
Commit: fc884a467025ef3ed81cf62aacc1f97bc0ca9f1b
https://github.com/llvm/llvm-project/commit/fc884a467025ef3ed81cf62aacc1f97bc0ca9f1b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
Log Message:
-----------
AMDGPU: Rename stale CONTRACT check prefixes in fp-contract tests (#221709)
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 87c39e6dce0a6a4106927c9284258d49924a80de
https://github.com/llvm/llvm-project/commit/87c39e6dce0a6a4106927c9284258d49924a80de
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
Log Message:
-----------
[ConstantFolding] Implement canConstantFoldCallTo() using TLI (#221903)
This did some odd matching on string names. Use TLI instead, matching
the actual constant folding logic.
I've adjusted callers to pass TLI to canConstantFoldCallTo() if they
also pass TLI to the later constant folding call.
Commit: 698dd11893fca65681f8cd84b39ff49d29ddcd1e
https://github.com/llvm/llvm-project/commit/698dd11893fca65681f8cd84b39ff49d29ddcd1e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/addrspacecast-nonnull.ll
A llvm/test/CodeGen/MIR/AMDGPU/addrspacecast-nonnull.mir
M llvm/utils/UpdateTestChecks/mir.py
Log Message:
-----------
AMDGPU: Use the addrspacecast nonnull flag in codegen (#220926)
Plumb the nonnull flag through to the backend so a flagged addrspacecast
lowers without the runtime null check, matching what
llvm.amdgcn.addrspacecast.nonnull already provides.
Add the NonNull MIFlag with MIR printer/parser support (including the
MIRPrinter path and update_mir_test_checks) so it round-trips on
G_ADDRSPACE_CAST, and preserve it through SelectionDAG vector
scalarization and splitting.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 7bf85cae41005e0394abf224a7bcfd465319c6d7
https://github.com/llvm/llvm-project/commit/7bf85cae41005e0394abf224a7bcfd465319c6d7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/BuiltinsX86_64.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/Headers/bmi2intrin.h
M compiler-rt/lib/msan/tests/msan_test.cpp
Log Message:
-----------
[X86] Remove x86 PDEP/PEXT clang intrinsics and rely on generic elementwise implementations (#204969)
The clang frontend already converted the x86 builtins to generics, this just moves to using the elementwise builtins directly.
Commit: b182b415d9b2447cf1fd7231ebe28a96cfd1f9af
https://github.com/llvm/llvm-project/commit/b182b415d9b2447cf1fd7231ebe28a96cfd1f9af
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
A llvm/unittests/CodeGen/RegisterPressureTest.cpp
Log Message:
-----------
[CodeGen] Correctly classify/mark dead defs when adjusting lane liveness (#215595)
Despite what the documentation of `adjustLaneLiveness` states, the
method never sets dead flags on dead def operands, even when missing
dead flags can later lead to machine verifier errors.
This makes the method identify dead definitions from definitions that
are initially thought to be alive, and makes it add a dead flag on the
last definition of a virtual register, matching the behavior expected by
the machine verifier (ref. "Instruction ending live segment on dead slot
has no dead flag").
`adjustLaneLiveness` and `detectDeadDefs` now also use the same
mechanism to identify dead definitions. It relies on comparing the
defined lanes of a definition with those that stay alive after it.
Commit: b3071f2b0db631e8fb0d4b47f5e46d0c8297879a
https://github.com/llvm/llvm-project/commit/b3071f2b0db631e8fb0d4b47f5e46d0c8297879a
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN class builtins (#213496)
Adds codegen for the following AMDGCN class builtins:
- __builtin_amdgcn_class (double)
- __builtin_amdgcn_classf (float)
- __builtin_amdgcn_classh (half)
These are lowered to the corresponding `llvm.amdgcn.class` intrinsics.
Commit: 97ad26d9bfdb0c83bc6edc3de016fb7bc7b3d5b3
https://github.com/llvm/llvm-project/commit/97ad26d9bfdb0c83bc6edc3de016fb7bc7b3d5b3
Author: Arda Serdar Pektezol <arda at pektezol.dev>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFlatten.cpp
A llvm/test/Transforms/LoopFlatten/invalidate-scev-pr203176.ll
Log Message:
-----------
[LoopFlatten] Invalidate SCEV on each widening (#211819)
LoopFlatten can update a loop before deciding on not to flatten it due
to profitability. SCEV has cached loop information during the checks and
the widening, where it can lead to stale data if the pass bails at
flattening. Invalidate it after each successful widening.
Fixes #203176
Co-authored-by: Steve Gustaman <stevegustaman at kaist.ac.kr>
Commit: 803252a70e326051a340e1a80b79cd10ed633e7f
https://github.com/llvm/llvm-project/commit/803252a70e326051a340e1a80b79cd10ed633e7f
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/Support/TypeSize.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/unittests/Support/TypeSizeTest.cpp
Log Message:
-----------
[NFC][LLVM] Remove TypeSize::multiplyCoefficientBy(). (#221215)
TypeSize implements operator*() that performs the same operation.
Commit: 1f15665245afc1b303ed2cad0c5ea610f499f666
https://github.com/llvm/llvm-project/commit/1f15665245afc1b303ed2cad0c5ea610f499f666
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Log Message:
-----------
[AArch64] Add a fast-path for AArch64InstrInfo::getInstSizeInBytes (NFC) (#221894)
Improves CTMark geomean -0.07% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=be1403a1f2db85c9443fa8300fa8522561bea90a&stat=instructions:u
Assisted-by: codex
Commit: 283b9b565ea8093fd5d04d0435d6594624c58ddb
https://github.com/llvm/llvm-project/commit/283b9b565ea8093fd5d04d0435d6594624c58ddb
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/docs/resources/test.md
Log Message:
-----------
[lldb][docs] Remove duplicate title in test doc (#221944)
Commit: a1a2d57627695fb86438229340cba87560ab2c9b
https://github.com/llvm/llvm-project/commit/a1a2d57627695fb86438229340cba87560ab2c9b
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/CMakeLists.txt
M clang/include/clang/Options/ClangOptionDocs.td
M clang/include/clang/Options/Options.td
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
Log Message:
-----------
Revert "[clang][docs] Generate command line reference as Markdown" (#221937)
Reverts llvm/llvm-project#220385
This has broken several flang pipelines:
-
https://github.com/llvm/llvm-project/actions/runs/34051600098/job/101536096902?pr=218746
- https://github.com/llvm/llvm-project/actions/runs/34200642862
Commit: eb96d6530255aaaa00e156803b2fc224c80678ba
https://github.com/llvm/llvm-project/commit/eb96d6530255aaaa00e156803b2fc224c80678ba
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/test/CodeGen/target-builtin-noerror.c
Log Message:
-----------
[X86] Make target-builtin-noerror.c fail on warning (#221796)
As in title. Also removed deleted features. The test was previously
accepting any string
Commit: 6755672f7a2bdf286b1a53fd44d07cad26e40afe
https://github.com/llvm/llvm-project/commit/6755672f7a2bdf286b1a53fd44d07cad26e40afe
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/test/CIR/CodeGen/callsite-inline-attributes.cpp
M clang/test/CIR/IR/inline-attrs.cir
M clang/test/CIR/IR/invalid-call.cir
M clang/test/CodeGen/AArch64/sme-inline-callees-streaming-attrs.c
Log Message:
-----------
[CIR] Drop the redundant suffix from the inline kind mnemonic (#220892)
inline_kind was the one CIR enum attribute mnemonic still repeating what
its
C++ enum class name says. The attribute now spells
`#cir.inline<always_inline>`. The operation argument keeps the name
inline_kind, since that is the accessor name, so the printed form reads
`inline_kind = #cir.inline<always_inline>`.
The enum's summary also becomes "inline kind" rather than the camelCase
"inlineKind", which is what generated docs show now that
CIR_InlineKindAttr
no longer overrides it.
25 CHECK lines change across four test files. Nine are in an
aarch64-registered-target test, unsupported in an X86-only build, but
the
substitution matches the two CIR tests that do run.
Commit: 8badd964149235ea91c2d98f02e1f39a78f117f5
https://github.com/llvm/llvm-project/commit/8badd964149235ea91c2d98f02e1f39a78f117f5
Author: Rohit Aggarwal <Rohit.Aggarwal at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
Log Message:
-----------
[AMDLIBM] Add VF8 mapping for cbrtf (amd_vrs8_cbrtf) (#220815)
Map cbrtf loops at VF=8 to amd_vrs8_cbrtf so -vector-library=AMDLIBM
matches the vector entry exported by AOCL-LibM.
AOCL repo : [AOCL-LibM](https://github.com/amd/aocl-libm-ose)
As per the latest external supported call in
[amdlibm_vec.h](https://github.com/amd/aocl-libm-ose/blob/master/include/external/amdlibm_vec.h)
Commit: fa0638edc6628ce2c386519ffdcbdcf35513e67e
https://github.com/llvm/llvm-project/commit/fa0638edc6628ce2c386519ffdcbdcf35513e67e
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGenHIP/ternary-struct-addrspace.hip
M clang/test/CIR/CodeGenOpenMP/target-map.c
Log Message:
-----------
[CIR] Cast alloca for function parameter to the right address space (#220836)
Function parameters are stored into temporary allocas and for
address-space aware targets allocas may yield pointers to address spaces
that are different from default address space or the address space of
the parameter type. Do a cast to avoid mismatch. The address space
mismatch was reproduced using cir.ternary op returning a function
parameter and a local variable. For local variables and return
temporaries we already cast alloca address space to temporary address
space but not for function parameter allocas.
Commit: aab03a357abe175a4f9042b8fb8255c63fbd4c8e
https://github.com/llvm/llvm-project/commit/aab03a357abe175a4f9042b8fb8255c63fbd4c8e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
Log Message:
-----------
[VPlan] Add IV steps cost tests for small trip counts and regions (NFC). (#221948)
Add 2 tests covering missing cases: scalar-iv steps cost in single
iteration loops, and cost in replicate regions.
Commit: fc44546b1bf7cd2048dd079e9f69c3b384162d56
https://github.com/llvm/llvm-project/commit/fc44546b1bf7cd2048dd079e9f69c3b384162d56
Author: Vlad Sytchenko <vsytch at hotmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing targets for CIR (#220753)
[bazel] Add missing targets for CIR
Commit: f0e67ea7d15c44b252f46388fecac396382e1a16
https://github.com/llvm/llvm-project/commit/f0e67ea7d15c44b252f46388fecac396382e1a16
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/concurrent_base.py
M lldb/test/API/functionalities/thread/concurrent_events/main.cpp
Log Message:
-----------
[lldb] Fix flaky TestConcurrentTwoWatchpointsOneSignal (#221697)
`g_watchme` was declared right next to `g_sigusr1_count`. Hardware
watchpoints round the watched address/size to an alignment boundary, so
a watchpoint on `g_watchme` could also end up covering
`g_sigusr1_count`. When the signal thread's handler touches
`g_sigusr1_count` while the watchpoint threads write `g_watchme`, that
overlap causes a spurious hit and lldb can attribute the stop to the
wrong thread.
See llvm.org/PR35228.
Fix: group the watched field and its padding into a single aligned
struct (`WatchMePadding`), so the compiler is guaranteed to lay out the
data and padding together.
Assisted by Claude.
Commit: e93a9e0d9936dce610967bb9be3d42f0f3d1493a
https://github.com/llvm/llvm-project/commit/e93a9e0d9936dce610967bb9be3d42f0f3d1493a
Author: Jan Schultke <me at eisenwave.net>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/clmul.ll
Log Message:
-----------
[SelectionDAG] Expand CLMUL of zero-extended all-ones operand via parallel prefix XOR (#207339)
Fixes #204870
Commit: 09f54c2e2d9b78929089fed41275b0ed987538ff
https://github.com/llvm/llvm-project/commit/09f54c2e2d9b78929089fed41275b0ed987538ff
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Record.h
Log Message:
-----------
[clang][bytecode] Save Record::Field PrimType (#221945)
This does not increase the size of `Record::Field` but lets us avoid
classifying fields all the time.
Commit: b90c062f3f03f2c2311644845790252aa6e5237e
https://github.com/llvm/llvm-project/commit/b90c062f3f03f2c2311644845790252aa6e5237e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/Mangler.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/CMakeLists.txt
R llvm/lib/ExecutionEngine/Orc/Shared/Mangler.cpp
Log Message:
-----------
[ORC] Move Mangler implementation from OrcShared to OrcJIT (#221942)
Many OrcJIT clients don't directly depend on OrcSupport, and so broke
when e91092685eab moved mangling from OrcJIT to OrcSupport.
We want to reorganize these libraries in the not too distant future.
Rather than forcing clients to update dependencies that may change again
soon, move the code (but not the header) back into the OrcJIT library.
We can address the mismatch between the header's and implementation's
home during the library reorganization.
Commit: 2dfc0140a0385d063a7b336549a4055778febb1a
https://github.com/llvm/llvm-project/commit/2dfc0140a0385d063a7b336549a4055778febb1a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
A llvm/test/TableGen/RuntimeLibcallEmitter-library-dispatch.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-grouping.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-name-merge.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcalls: Dispatch to library functions from SystemRuntimeLibrary (#217593)
When a SystemRuntimeLibrary names LibcallLibrary defs,
setTargetRuntimeLibcallSets now dispatches each under an isLibraryAvailable
guard, so an impl can be homed into a library without dropping it from the target.
Non-library members keep the inline path. No target names a library yet, so output
is unchanged.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 188842344ace5e1cc0cc84eec02d4a746213277a
https://github.com/llvm/llvm-project/commit/188842344ace5e1cc0cc84eec02d4a746213277a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
Log Message:
-----------
[lldb][Windows] Mark unwind plan as valid at all instructions (#215514)
This is a follow up to https://github.com/llvm/llvm-project/pull/210076.
The unwind plan is now valid at every location.
Commit: 9bc8df6b880ef04a90e5b9ff05afd07f6fbdf562
https://github.com/llvm/llvm-project/commit/9bc8df6b880ef04a90e5b9ff05afd07f6fbdf562
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
Log Message:
-----------
[lldb][windows] print an error if Python fails to initialize (#181160)
Add checks around the `Py_init*` calls to check if Python was
initialized correctly. If any of the calls fails, print an error and
return early.
Python will fail to initialize if `%SystemRoot%` is not defined which
causes lldb to crash. This patch prints an error if the initialization
fails and returns early. lldb still crashes but gives a clue as to why
that's the case.
rdar://168004280
Commit: 6940519208db433dfffc408392344245129e4050
https://github.com/llvm/llvm-project/commit/6940519208db433dfffc408392344245129e4050
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/shared/rpc.h
Log Message:
-----------
[libc] Simplify RPC lock handling to be scalar on the GPU (#221805)
Summary:
This interface was originally written in a complicated way as a
pessimistic bet against NVIDIA's independent thread scheduling. The idea
was that it would work regardless of which set actually executed the
function. The problem is that this forces the operation to be an
expensive vector operation.
This should be safe, we already have other safeguards against ITS in the
main loop. When this function is called, we know that the index and lane
mask are convergent in the set. ITS says the true threads executing this
could be greater than returned. But in this case the 'locked' value
would not be shuffled in, it would not see that it got the lock, and
loop again in a different mask set.
The complicated thing about ITS is mostly that any lanes that share a PC
will report convergent, but that should not bite us here as we already
guard against that before calling this.
Commit: 51eedac31577e2394d240aa9267374183a42b231
https://github.com/llvm/llvm-project/commit/51eedac31577e2394d240aa9267374183a42b231
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/test/CodeGenCUDA/fp-contract.cu
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
Log Message:
-----------
AMDGPU: Set the addrspacecast nonnull flag instead of the intrinsic (#220927)
AMDGPUCodeGenPrepare proved the source of certain flat<->local/private
addrspacecasts non-null and rewrote them to
llvm.amdgcn.addrspacecast.nonnull. Now that the flag is honored in
codegen, set it in place on the existing instruction instead.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 5e3af02eddc71b7e7c352b29783b3cf395f51330
https://github.com/llvm/llvm-project/commit/5e3af02eddc71b7e7c352b29783b3cf395f51330
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/addrspacecast.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/addrspacecast.ll
A llvm/test/Bitcode/amdgcn-addrspacecast-nonnull.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
Log Message:
-----------
AMDGPU: Remove llvm.amdgcn.addrspacecast.nonnull (#220928)
The intrinsic is fully replaced by the nonnull flag on addrspacecast,
so remove it.
Old bitcode/IR is autoupgraded, though this is very conservative. This
intrinsic was only inserted by the backend, and hopefully nobody was
directly emitting it.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: c40a02b6da9291e33c53fc19c37f2d3bf35c06d0
https://github.com/llvm/llvm-project/commit/c40a02b6da9291e33c53fc19c37f2d3bf35c06d0
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/StopPointSiteList.h
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Small changes to StopPointSiteList::FindInRange (#221975)
1. Make the return value indicate an empty list or not. (I would return
a list, but you cannot copy this list and I don't want to make a larger
change right now)
2. Remove a redundant write at one of the call sites.
Commit: 2aa1dd5d9c56cde7f828cb78017c150e8c11629f
https://github.com/llvm/llvm-project/commit/2aa1dd5d9c56cde7f828cb78017c150e8c11629f
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
[LLVM][SelectionDAG] Fix incorrect splitting of VECTOR_COMPRESS when passthrough operand is not undef. (#215772)
When splitting VECTOR_COMPRESS the original mask is used for the final
step when inactive elements are set to their passthrough value. This is
incorrect because only the inactive lanes of the result should be set to
their passthrough value.
Commit: 6c8467d3f917e84ebc1bd7c10fb8bd69ded6040e
https://github.com/llvm/llvm-project/commit/6c8467d3f917e84ebc1bd7c10fb8bd69ded6040e
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
Log Message:
-----------
[CIR] Use the modern enum case classes (#220935)
The `I32EnumAttrCase` family carries an `Attr` half, and an
`IntegerAttr`
predicate with it, that a CIR enum has no use for now that the enums
derive
from `EnumInfo`. Upstream says of those forms that they "are not needed
when
using the newer `EnumCase` form".
Rename all of them to `I32EnumCase`, `I32BitEnumCaseNone`,
`I32BitEnumCaseBit` and `BitEnumCaseGroup`. The group class drops its
width
prefix because the modern spelling takes the width from its cases.
Commit: 991c62626638056a85c7af56e211344f8bdd36dc
https://github.com/llvm/llvm-project/commit/991c62626638056a85c7af56e211344f8bdd36dc
Author: Tomáš Slanina <itzexpoexpo at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
Set correct stack reserve when built by Clang on Windows (#221263)
Currently it's handled correctly for MSVC's LINK and MinGW (i.e.
distributed builds of LLVM work correctly), but not lld-link, causing
such builds to crash in certain scenarios.
Commit: 3741dacd195a961f996f357a3b753dd9432a7941
https://github.com/llvm/llvm-project/commit/3741dacd195a961f996f357a3b753dd9432a7941
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-insert-vec-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-commute-shift.mir
M llvm/test/CodeGen/AArch64/neon-shuffle-vector-tbl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-extract-vector-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-opt.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
Log Message:
-----------
[GlobalISel] Migrate various generic wip_match_opcode combines to MIR-pattern. (#220213)
This patch converts a batch of GlobalISel combine rules from
hand-written C++ matchers to declarative MIR patterns preserving the
behavior. It also along with adds two functional changes (a
rule-ordering fix and an out-of-bounds bug fix) are described below.
- `select_same_val` → `select_same_val_trivial` +
`select_same_val_equiv` group
- `select_constant_cmp` → `_false` / `_true` / `_general` group
- `simplify_add_to_sub`, `add_p2i_to_ptradd` → `GICombinePatFrag`s
- `commute_shift` → `commute_shift_frags` (C++ residue reduced to
`isDesirableToCommuteWithShift`)
- `combine_i2p_to_p2i`, `ptr_add_zero`, `sext_trunc_sext_load` →
patterns.
- funnel-shift / rotate / `ashr_lshr` / `constant_fold_fma` /
`constant_fold_cast_op` / `combine_minmax_nan` → pattern fragments
- **`select_zero_true` / `select_zero_false`:** skip a constant
condition as they fold it to an arm instead strictly better and avoids a
`G_FREEZE` that post-legalization can't clean up.
- **`match_bitfield_extract_from_and`:** mask the AND immediate to the
operand width and reject fields where `lsb + width > size`, preventing
an out-of-bounds `G_UBFX` (fixes an AMDGPU `knownBitsForSBFE` crash).
28 CodeGen tests updated. All diffs are semantically equivalent.
Commit: a3b12f0cd5337230199fc9c6319cc2c4614f75b8
https://github.com/llvm/llvm-project/commit/a3b12f0cd5337230199fc9c6319cc2c4614f75b8
Author: Oscar Priego <oscar.priegov at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/test/Transforms/GVN/pr46054-md-nonlocaldefcache-cleanup.ll
Log Message:
-----------
[MemDep] Remove cached non-local defs referencing deleted instructions (#219929)
MemoryDependenceResults::removeInstruction() removed entries from
NonLocalDefsCache when the removed non-pointer instruction was itself a
cache key, but did not remove entries where that instruction was the cached
dependency result.
This could leave a stale instruction reachable through NonLocalDefsCache
after GVN erased it. A later non-local load query could then consume the
dangling dependency and crash in GVN::analyzeLoadAvailability().
Use ReverseNonLocalDefsCache to remove forward cache entries whose
dependency result references the removed instruction, keeping both maps
consistent.
Related removal paths now use the existing reverse-map helper, with
consistency assertions to catch future map divergence.
Fixes #219885.
A downstream Mono integration has also hit #219885 in practice when
tagging non-pointer array-header loads with !invariant.group. They
currently gate those tags off as a temporary workaround pending the
upstream fix in this PR:
Phantomical/mono at 7e44c68
Commit: 651d01e873c6fce3c8d300362585b1a5f98bb883
https://github.com/llvm/llvm-project/commit/651d01e873c6fce3c8d300362585b1a5f98bb883
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/AST/StmtPrinter.cpp
M clang/unittests/AST/TypePrinterTest.cpp
Log Message:
-----------
[clang][AST] Fix infinite recursion when printing fully qualified template parameters (#219044)
This fixes an infinite recursion crash that was introduced in #206041.
When printing a `DeclRefExpr` using
`PrintingPolicy::FullyQualifiedName`, we were previously trying to print
the fully qualified name of all decls. However, when the decl is a
template parameter, its `DeclContext` is the template specialization
itself. If a template specialization's arguments depend on that same
template parameter (e.g., `template<int Count> struct
View<int[Count]>`), attempting to print the qualified name forces Clang
to recursively evaluate the enclosing context. This led to unbounded
recursion (`View<int[Count]>::Count` ->
`View<int[View<int[Count]>::Count]>::Count` and so on). Since template
parameters are inherently scoped to their template declarations and do
not require a fully qualified name, this patch resolves the issue by
skipping `printQualifiedName` if the decl is a template parameter
(`!VD->isTemplateParameter()`).
Fixes #218076.
Commit: f20b6e56a866c49522737364de6a5ab4bedbd43e
https://github.com/llvm/llvm-project/commit/f20b6e56a866c49522737364de6a5ab4bedbd43e
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Remove return value from RemoveBreakpointOpcodesFromBuffer (#221979)
It was never set to anything and the one caller ignored it.
Commit: 08a32ba66e9c01320a6ab13edfc5f332af8d47ed
https://github.com/llvm/llvm-project/commit/08a32ba66e9c01320a6ab13edfc5f332af8d47ed
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/load-store.ll
Log Message:
-----------
[RISCV][GlobalISel] Fold large constant offsets in selectAddrRegImm (#219161)
Fold ADDI adjustment (AddiPair) for offsets in [-4096, 4094] and split
larger constants into materialized Hi + Lo12 offset, matching SDAG. Add
isWorthFoldingAdd to guard the split and extract the shared ADDI
renderer into renderAddiPair.
Assisted-by: Claude
Commit: c4babfb3128b9b167e469003028dbaf4e14a6167
https://github.com/llvm/llvm-project/commit/c4babfb3128b9b167e469003028dbaf4e14a6167
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[Docs] Document persistent metadata printing (#220967)
Document how persistent metadata IDs affect intermediate and standalone
textual output. Final assembly output remains canonically renumbered.
Follow-up to #220390.
Commit: 27bb4d2432d9e5643c7f4f5df495c1580fe07da8
https://github.com/llvm/llvm-project/commit/27bb4d2432d9e5643c7f4f5df495c1580fe07da8
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
Log Message:
-----------
[mlir][vector] Update `CastAwayTransfer{Read|Write}LeadingOneDim` (#219499)
Updates `CastAwayTransfer{Read|Write}LeadingOneDim` to use
`vector.shape_cast`, rather than `vector.extract`, as the canonical form
for stripping unit dimensions.
This change was originally implemented by @krzysz00 in #196206, but was
subsequently reverted in #199546. This PR intentionally restores only a
subset of #196206, making it easier to identify and triage any potential
regressions.
Co-authored-by: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Commit: fdffea81bc29094eb11eddf85309a6615c4f0049
https://github.com/llvm/llvm-project/commit/fdffea81bc29094eb11eddf85309a6615c4f0049
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
Log Message:
-----------
[AMDGPU] Prefer packed minimum/maximum ops for two-input ops (#215449)
A two-input f16 fminimum or fmaximum operation should translate to a
packed two-input minimum/maximum instruction when the target supports
one.
It currently can be selected through the minimum3/maximum3 fallback
pattern instead. That emits a three-input instruction with one input
operand duplicated.
Keep the fallback for nested min/max expressions that can use the real
three-input instruction. Add a higher-priority direct pattern for
non-nested two-input operations on targets with packed IEEE
minimum/maximum opcodes.
Commit: a4e8604a2da580de80debb6a15c9c6d7379a68d5
https://github.com/llvm/llvm-project/commit/a4e8604a2da580de80debb6a15c9c6d7379a68d5
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
Log Message:
-----------
[clang-format] Recognize the signed modifier for Verilog struct (#219694)
after
```SystemVerilog
struct packed signed {
int a;
} pack1;
```
before
```SystemVerilog
struct packed signed { int a; }
pack1;
```
Commit: 09f1a51bf3a1cdd751379e0ccb9753419f4a14e9
https://github.com/llvm/llvm-project/commit/09f1a51bf3a1cdd751379e0ccb9753419f4a14e9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
A llvm/test/CodeGen/X86/active_lane_mask.ll
Log Message:
-----------
[X86] Add basic llvm.get.active.lane.mask test coverage (#221978)
Commit: cb0e50003dc09853b390eca67a13b05b3d691fc4
https://github.com/llvm/llvm-project/commit/cb0e50003dc09853b390eca67a13b05b3d691fc4
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/acos_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asin_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ceil_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cos_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cosh_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp2_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/floor_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log2_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/roundeven_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sin_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sinh_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sqrt_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tan_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tanh_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/trunc_mat.ll
Log Message:
-----------
[SPIRV] Add matrix type legalization for many float global opcodes (#220782)
fixes #220723
The issue in #220723 is that the global opcodes can not deduce the
element type when the input is a shuffle vector. This is the same issue
as #213783. All we have to do to fix this is to have deduceTypeFromUses
in the SPIRVPostLegalizer know that we need to look up the type from the
results register for these opcodes.
The secondary issue is that there were no matrix tests for any of these
global opcodes so I added them. I did not follow the template started by
the atan2 tests because those are overkill and testing way to much stuff
not related to opcode legalization.
Assisted on the tests by MAI-Code-1.1-Flash
Commit: 52d922aa153b1232813470e014635419ce006023
https://github.com/llvm/llvm-project/commit/52d922aa153b1232813470e014635419ce006023
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinition.cpp
A mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinition.h
A mlir/lib/Dialect/SPIRV/IR/SPIRVOpDefinitions.cpp
Log Message:
-----------
[MLIR][spirv] Shard generated operation definitions (NFC) (#221811)
Generate SPIR-V operation definitions in eight shards and use the
generated registration hook. Keep parser, printer, and verification
helpers in the existing implementation TU and expose them through a
private header.
Assisted-by: Codex
Commit: c4d8bd10c14a6902da83306270e836ef6fa5bb76
https://github.com/llvm/llvm-project/commit/c4d8bd10c14a6902da83306270e836ef6fa5bb76
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp
M mlir/lib/Dialect/X86/Transforms/AVXTranspose.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][llvm] Add convergent attribute to llvm.inline_asm. (#221990)
Expose LLVM's convergent call-site attribute on the LLVM dialect
inline_asm op. This allows marking an inline asm block as convergent so
that divergence-aware passes do not move it relative to divergent
control flow.
Commit: 15359d3801d68f93aaf06d7c9647501211f620a1
https://github.com/llvm/llvm-project/commit/15359d3801d68f93aaf06d7c9647501211f620a1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
A llvm/test/CodeGen/Hexagon/const-prop-undef.mir
Log Message:
-----------
Hexagon: Fix constant propagation crash on a use with no reaching definition (#220297)
Commit: a76045040a1297217256d917bec9e02f9723804c
https://github.com/llvm/llvm-project/commit/a76045040a1297217256d917bec9e02f9723804c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
A mlir/lib/Dialect/LLVMIR/IR/ROCDLOps.cpp
A mlir/lib/Dialect/LLVMIR/IR/ROCDLOps.h
Log Message:
-----------
[MLIR][ROCDL] Shard generated operation definitions (NFC) (#221729)
ROCDL generated operation definitions is amongst the slowest MLIR
translation unit. Generate eight definition shards, compile them as
separate sources, and use the generated sharded registration hook while
keeping custom parser and printer helpers in one implementation unit.
Assisted-by: Codex
Commit: 8c8aa74533a841a7f61dac5e80c8241799458dd6
https://github.com/llvm/llvm-project/commit/8c8aa74533a841a7f61dac5e80c8241799458dd6
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][LLVM] Add pdep and pext intrinsics (#220768)
Assisted-by: grok-4.6
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: 35fe7e14ecb4e50182fe93123e1876824d14bb94
https://github.com/llvm/llvm-project/commit/35fe7e14ecb4e50182fe93123e1876824d14bb94
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/src/__support/printf_core/char_converter.h
M libc/src/__support/printf_core/converter.h
M libc/src/__support/printf_core/fixed_converter.h
M libc/src/__support/printf_core/float_dec_converter.h
M libc/src/__support/printf_core/float_dec_converter_limited.h
M libc/src/__support/printf_core/float_hex_converter.h
M libc/src/__support/printf_core/float_inf_nan_converter.h
M libc/src/__support/printf_core/int_converter.h
A libc/src/__support/printf_core/overflow_modes.def
M libc/src/__support/printf_core/printf_main.h
M libc/src/__support/printf_core/ptr_converter.h
M libc/src/__support/printf_core/strerror_converter.h
M libc/src/__support/printf_core/string_converter.h
M libc/src/__support/printf_core/vasprintf_internal.h
M libc/src/__support/printf_core/vfprintf_internal.h
M libc/src/__support/printf_core/write_int_converter.h
R libc/src/__support/printf_core/write_modes.def
M libc/src/__support/printf_core/writer.h
M libc/src/err/report.cpp
M libc/src/stdio/baremetal/vfprintf_internal.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/snprintf_modular.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/sprintf_modular.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsnprintf_modular.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdio/vsprintf_modular.cpp
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/time/asctime_utils.h
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/composite_converter.h
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
M libc/src/time/strftime_core/strftime_main.h
M libc/src/time/strftime_l.cpp
M libc/test/src/__support/printf_core/converter_test.cpp
M libc/test/src/__support/printf_core/writer_test.cpp
Log Message:
-----------
[libc] Update printf_core::Writer to template on character type. (#220669)
This is motivated by working toward `swprintf`.
The primary goal is to enable a `CharT` template type parameter on
`printf_core::Writer`. This requires refactoring how the "overflow
write" logic is set up to get around the limitation on function template
partial specialization.
Key changes to `printf_core::Writer` and friends:
* Separate the overflow write logic from `WriteBuffer` into an
`OverflowWriter` template where specializations handle dispatch, and
remove the `WriteBuffer` subclasses.
* Rename from `WriteMode` to `OverflowMode` to try and shorten the
enumerators with minimal loss to clarity, and reduce the number of modes
to only two: `DROP_OVERFLOW` and `CALLBACK`.
* The number of dynamic function calls for flushing and resizing use
cases stays the same by templating the callback on a `WriteSink`.
At this stage the extra `CharT` template type parameter is added in this
PR mainly to ensure the setup works without running into function
template partial specializations. Fully expanding `Writer` with
`wchar_t` will be done in follow-up PRs.
Commit: cb180d50a81674b467887eab836f563607ae89e8
https://github.com/llvm/llvm-project/commit/cb180d50a81674b467887eab836f563607ae89e8
Author: Ryan VanderMeulen <ryanvm at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/cmake/modules/FindLibXml2.cmake
Log Message:
-----------
[cmake] FindLibXml2: keep user-provided LIBXML2_DEFINITIONS (#221294)
LLVM's `FindLibXml2.cmake` (added in #166867) unconditionally does
`set(LIBXML2_DEFINITIONS ${PC_LIBXML_CFLAGS_OTHER})` and puts
`PC_LIBXML_CFLAGS_OTHER` on the imported targets. CMake's own
`FindLibXml2` module only takes pkg-config's flags when the library it
found is the one pkg-config describes; otherwise it keeps whatever
`LIBXML2_DEFINITIONS` the user passed and exposes it through
`INTERFACE_COMPILE_OPTIONS`.
This matters when cross-compiling against a static libxml2 on Windows.
Passing `-DLIBXML2_DEFINITIONS=-DLIBXML_STATIC
-DLIBXML2_LIBRARIES=.../libxml2s.lib` worked with LLVM 22 (CMake's
module): the define reached both the `xmlReadMemory` configure check and
the consumers of `LibXml2::LibXml2`. With LLVM 23 it is silently
dropped, `xmlexports.h` declares the API `__declspec(dllimport)`, the
check fails to link against the static library and
`LLVM_ENABLE_LIBXML2=FORCE_ON` aborts with `Failed to configure
libxml2`. (pkg-config on the Linux host finds the host's libxml2, so
`PC_LIBXML_CFLAGS_OTHER` is empty and unrelated to the library actually
being used.)
Mirror CMake's behaviour: keep the user's definitions unless pkg-config
found the same library, and attach them to both `LibXml2::LibXml2` and
`LibXml2::LibXml2Static`.
Seen while building the Firefox clang 23 toolchains (x86_64 and aarch64
`-pc-windows-msvc`, cross-compiled from Linux with
`LLVM_EXPORT_SYMBOLS_FOR_PLUGINS=ON`).
---
**AI tool use disclosure** (per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html)): this change was
developed with Claude Code assisting in the analysis and drafting. The
root cause was established against real 23.1.0 binaries; this cmake
change itself has so far only been verified to apply to 23.1.0 and main
and by code reading, while Firefox's CI validated the equivalent
workaround of passing -DLIBXML_STATIC via the compiler flags. The author
reviewed the change and is accountable for and able to answer questions
about it. Commits carry an `Assisted-by:` trailer.
Commit: 2ca09022430e88ab53cbf0f09d6ec8b3d6deb138
https://github.com/llvm/llvm-project/commit/2ca09022430e88ab53cbf0f09d6ec8b3d6deb138
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Avoid double DenseMap lookups in ValueToVRegInfo (NFC) (#221741)
Improves CTMark geomean -0.06% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=fbf62152c51f2327cb2f4a382df90b3f345a8866&stat=instructions:u
Assisted-by: codex
Commit: 0650d53db287b22908ca2c76d21defbec209be44
https://github.com/llvm/llvm-project/commit/0650d53db287b22908ca2c76d21defbec209be44
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/avx512fp16-frem.ll
M llvm/test/CodeGen/X86/bfloat.ll
M llvm/test/CodeGen/X86/ucmp.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
M llvm/test/CodeGen/X86/vector-shuffle-v192.ll
Log Message:
-----------
[X86][X86CompressEVEX] Do not compress when there is a compressed disp8 (#221923)
Fixes: #206963
Assisted-by: Claude Opus 4.8
Commit: bb6f7fcb46cdbe258b0cba12506fe1f344cd2d45
https://github.com/llvm/llvm-project/commit/bb6f7fcb46cdbe258b0cba12506fe1f344cd2d45
Author: Risan Gnanasegaram <risan888 at hotmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
M mlir/test/Dialect/LLVMIR/layout.mlir
Log Message:
-----------
[mlir][LLVM] Use element allocation sizes when computing struct size (#221742)
`LLVMStructType::getTypeSizeInBits` currently advances by each element's
store size. With the data layout from #221665, this reports 11 bytes for
`!llvm.struct<packed (f80, i8)>`, while LLVM uses the 16-byte allocation
size of `f80` and reports a 17-byte struct.
Round each element's size up to its ABI alignment before adding it to
the
struct size, matching LLVM's `getTypeAllocSize` behavior. Packed structs
continue to suppress alignment gaps before elements, while each element
still consumes its allocation size.
Add regression coverage for packed, unpacked, nested, and array layouts.
Fixes #221665.
Testing: 99 relevant MLIR tests passed; 3 x86-only tests were
unsupported
on the ARM host.
Assisted by: OpenAI Codex
Commit: a25235064367ee356ceddf5064a4d14fca0f8567
https://github.com/llvm/llvm-project/commit/a25235064367ee356ceddf5064a4d14fca0f8567
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][NFC] Fix createExtractVector comment missed in #221785 (#221999)
createExtractVector has no Generator; drop it from the doxygen comment.
Commit: 2e8a9d833739a7e3be91c700793b00594c3b745f
https://github.com/llvm/llvm-project/commit/2e8a9d833739a7e3be91c700793b00594c3b745f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
Log Message:
-----------
CodeGen: Remove TargetOptions::PPCGenScalarMASSEntries (#221424)
This was PPC specific and wasn't directly written by a generic cl::opt.
It also was inappropriately written based based on a check of the flag
in the TargetPassConfig, which is only likely to be the first use.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 1c5ed251750754befcfb619adf6452bc39ecf958
https://github.com/llvm/llvm-project/commit/1c5ed251750754befcfb619adf6452bc39ecf958
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/pdep-vector-128.ll
M llvm/test/CodeGen/X86/pdep-vector-256.ll
M llvm/test/CodeGen/X86/pdep-vector-512.ll
M llvm/test/CodeGen/X86/pext-vector-128.ll
M llvm/test/CodeGen/X86/pext-vector-256.ll
M llvm/test/CodeGen/X86/pext-vector-512.ll
M llvm/test/CodeGen/X86/znver-pdep.ll
M llvm/test/CodeGen/X86/znver-pext.ll
Log Message:
-----------
[X86] LowerCLMUL - fix unpack order of vXi32 CLMUL/CLMULH codegen (#222001)
Fix typo in the unpack order for vXi32 CLMUL/CLMULH codegen from #221289
and #221668 - I'd gotten the variable names right, but failed to
actually use the right variables!
Fixes #221964
Commit: cec101b15dd27fb1c51b6c87cb6e9d78517d2b09
https://github.com/llvm/llvm-project/commit/cec101b15dd27fb1c51b6c87cb6e9d78517d2b09
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 52d922a (#222005)
This fixes 52d922aa153b1232813470e014635419ce006023 (#221811).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=52d922aa153b1232813470e014635419ce006023
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 8a3d6f8ca2970c31c21a90f90eb7fe0de0fb0f99
https://github.com/llvm/llvm-project/commit/8a3d6f8ca2970c31c21a90f90eb7fe0de0fb0f99
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/docs/resources/test.md
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/test/API/commands/expression/import-std-module/array/TestArrayFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/basic/TestImportStdModule.py
M lldb/test/API/commands/expression/import-std-module/conflicts/TestStdModuleWithConflicts.py
M lldb/test/API/commands/expression/import-std-module/deque-basic/TestDequeFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/empty-module/TestEmptyStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_decl_from_module/TestForwardDeclFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_list-dbg-info-content/TestDbgInfoContentForwardListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_list/TestForwardListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/iterator/TestIteratorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/list/TestListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/missing-module-sources/TestStdModuleSourcesMissing.py
M lldb/test/API/commands/expression/import-std-module/module-build-errors/TestStdModuleBuildErrors.py
M lldb/test/API/commands/expression/import-std-module/no-std-module/TestMissingStdModule.py
M lldb/test/API/commands/expression/import-std-module/non-module-type-separation/TestNonModuleTypeSeparation.py
M lldb/test/API/commands/expression/import-std-module/pair/TestPairFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/queue/TestQueueFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/retry-with-std-module/TestRetryWithStdModule.py
M lldb/test/API/commands/expression/import-std-module/shared_ptr-dbg-info-content/TestSharedPtrDbgInfoContentFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/stack/TestStackFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/sysroot/TestStdModuleSysroot.py
M lldb/test/API/commands/expression/import-std-module/vector-bool/TestVectorBoolFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector/TestVectorFromStdModule.py
M lldb/test/API/commands/frame/var/TestFrameVar.py
M lldb/test/API/functionalities/breakpoint/jit_loader_rtdyld_elf/TestJitBreakPoint.py
M lldb/test/API/lang/cpp/abi_tag_structors/TestAbiTagStructors.py
M lldb/test/API/lang/cpp/forward/TestCPPForwardDeclaration.py
Log Message:
-----------
[lldb] Add requireClang decorator (#222007)
- Add requireClang, marking Clang-only tests as UNSUPPORTED elsewhere
instead of SKIPPED, following the existing require* convention.
- Replace the ~30 standalone @skipIf(compiler=no_match("clang")) uses
with @requireClang; leave the cases paired with a compiler_version check
as-is, since those are more complex than a simple compiler check.
- Remove the now-unused skipUnlessCompilerIsClang in favor of
requireClang.
- Update the testing docs to mention requireClang.
Follow-up to #214197.
Commit: ee89c01e6ad49aeefc918e08bc27f6b50c5407ba
https://github.com/llvm/llvm-project/commit/ee89c01e6ad49aeefc918e08bc27f6b50c5407ba
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
Log Message:
-----------
[XCore] Use getPtrAdd() instead of getGetElementPtr() (NFC) (#222017)
This was creating an i8 getelementptr, which is exactly what
ptradd is.
Commit: f1f0f21a51d64d9c0272959f18ece36e3247083e
https://github.com/llvm/llvm-project/commit/f1f0f21a51d64d9c0272959f18ece36e3247083e
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[SLP][modularisation][NFC] Move pointer/stride helpers to SLPMemoryUtils (#221786)
Move the following BoUpSLP-independent pointer/stride helpers out of
SLPVectorizer.cpp into a new SLPVectorizer/SLPMemoryUtils.{h,cpp}:
arePointersCompatible
computeCommonAlignment
calculateRtStride
arePointersCompatible reads the file-local RecursionMaxDepth cl::opt.
The option stays static in SLPVectorizer.cpp; the moved helper takes its
value as an explicit unsigned parameter. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI.
Commit: fe65dbf7e9ad196d8b67aebab8a38936c9c14056
https://github.com/llvm/llvm-project/commit/fe65dbf7e9ad196d8b67aebab8a38936c9c14056
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
Log Message:
-----------
CodeGen: Remove stale LiveVariables.h includes from ARM and M68k InstrInfo (#222000)
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 07af01c0f9e55599c4b8e11ad14851d2ef5d01fe
https://github.com/llvm/llvm-project/commit/07af01c0f9e55599c4b8e11ad14851d2ef5d01fe
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[Attributor] Remove dead function getKnownConstantRange (#221897)
getKnownConstantRange was added on January 15, 2020 in commit
188f9a348dc545bf9a420d998ad37761bddd7285 without any callers and has
been unused since.
Commit: b5395ed14ee6d3bc7a98c0abc9e592a1675e0bcc
https://github.com/llvm/llvm-project/commit/b5395ed14ee6d3bc7a98c0abc9e592a1675e0bcc
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/WindowsSecureHotPatching.cpp
Log Message:
-----------
[WindowsSecureHotPatching] Remove redundant getGetElementPtr() (NFC) (#222019)
This was creating a degenerate getelementptr without any indices,
which is equivalent to the base pointer and will fold away.
Commit: bbf7b8439d526de7a696bad82c7f8cc8696e39f7
https://github.com/llvm/llvm-project/commit/bbf7b8439d526de7a696bad82c7f8cc8696e39f7
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
A clang/test/CIR/CodeGenCUDA/builtins-nvvm-fma-oob.cu
A clang/test/CIR/CodeGenCUDA/builtins-nvvm-half.cu
Log Message:
-----------
[CIR][NVPTX] Add support for NVVM half type builtins (#221859)
Adds codegen for the following NVVM half type builtins:
- `__nvvm_ex2_approx_{f16,f16x2}`
- `__nvvm_fmin{_ftz,}{_nan,}{_xorsign_abs,}_{f16,f16x2}`
- `__nvvm_fmax{_ftz,}{_nan,}{_xorsign_abs,}_{f16,f16x2}`
- `__nvvm_fma_rn{_ftz,}{_relu,_sat,}_{f16,f16x2}`
- `__nvvm_fma_rn_oob{_relu,}_{f16,bf16,f16x2,bf16x2}`
These are lowered to the corresponding llvm.nvvm.* intrinsics.
This diverges a bit from OG, as no half-type helper is needed here. OG
routes these through `MakeHalfType`, which coerces each argument to the
intrinsic's declared parameter type, appends the intrinsic's defaulted
arguments, and
asserts that no argument is an integer constant expression. None of that
is needed for the builtins in this patch as each already agrees with its
intrinsic on operand and result types, and none has defaulted
parameters. The existing
`emitUnaryNVVMIntrinsic` and `emitBuiltinWithOneOverloadedType<N>`
helpers are therefore sufficient.
More generally, nothing `MakeHalfType` does is half-specific.
Assisted by Claude.
Commit: d5d12741de992606a7f045b744bdbce53538e196
https://github.com/llvm/llvm-project/commit/d5d12741de992606a7f045b744bdbce53538e196
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGObjCMac.cpp
Log Message:
-----------
[CGObjCMac] Remove unnecssary zero-index GEPs (#222023)
getConstantGEP() was always called with two zero indices. However,
with opaque pointers, zero-index GEPs are redundant and will fold
away.
Commit: 3bd526b27ffe43b86d1550c79c085697434fb787
https://github.com/llvm/llvm-project/commit/3bd526b27ffe43b86d1550c79c085697434fb787
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/RISCV/runtime-unroll-max-trip-count.ll
M llvm/test/Transforms/LoopUnroll/RISCV/unroll.ll
Log Message:
-----------
[RISCV] Stop ignoring intrinsics in costing for force unrolling (#221107)
All intrinsic calls were hitting the "continue" for !isLoweredToCall
and bypassing the getInstructionCost.
I've modified runtime-unroll-max-trip-count.ll to override unrolling
costs and remove the bswap intrinsics that were previously not counted.
Test case written by Claude.
Commit: 0117d8ca5e8c37e3a14647875095cc422ee9a686
https://github.com/llvm/llvm-project/commit/0117d8ca5e8c37e3a14647875095cc422ee9a686
Author: Kirill Vedernikov <kvedernikov at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared-collector-b.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared-decompress-b.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared-ti16.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared.mlir
M mlir/test/lit.cfg.py
Log Message:
-----------
[MLIR][NVVM] Add optional llc verification for NVVM dialect tests (#219980)
The motivation is to verify that MLIR NVVM dialect operations lower to
LLVM IR that is accepted by the NVPTX backend. Running llc gives these
tests an extra end-to-end check beyond textual IR matching and helps
catch mismatches between MLIR lowering, NVVM intrinsics, and backend
expectations.
A valid LLVM intrinsic call isn't necessarily selectable for every
combination of its immargs and target features. There is a concrete
NVPTX example in
`llvm/test/CodeGen/NVPTX/tcgen05-mma-collector-b-i8-invalid.ll`. The
intrinsic has a valid signature and individually valid immediate values,
but the combination `kind=i8` and `collector_b=lastuse` is not
supported. LLVM IR verification accepts it, while `llc` rejects it with
Cannot select.
The corresponding MLIR verifier does not duplicate every NVPTX
instruction-selection predicate. It currently checks MLIR-level
properties such as the `disable_output_lane size` and the interaction
between `a_shift` and `collector_a` (the examples are from
`tcgen05.mma`), while the backend owns the complete target-dependent
selection rules. We should improve the MLIR verifier whenever an invalid
MLIR operation can be rejected early, but a targeted integration check
also detects disagreement or drift between those two independently
maintained layers.
Another case is target-version drift. A translation test can be extended
with a new intrinsic variant requiring a newer SM or PTX ISA while
continuing to pass its textual `FileCheck`. Since the existing command
has no target contract, the test does not tell us whether all the
generated intrinsics are lowerable for one coherent target. An `llc`
invocation with explicit `-mcpu` and `-mattr` makes that contract
visible. If a test intended for sm_100a/PTX 8.6 starts using
functionality available only for sm_107f/PTX 9.4, the integration check
reports it immediately.
```
// RUN: %if has_llc_binary && host-supports-nvptx %{ mlir-translate --mlir-to-llvmir %s | %llc-verify -march=nvptx64 -mcpu=sm_<version> -mattr=+ptx<version> %}
```
`%llc-verify` finds `llc` as `lit.util.which("llc",
config.llvm_tools_dir)`.
Commit: 03fd869d69394b404698cda7cc1621f2be4121c2
https://github.com/llvm/llvm-project/commit/03fd869d69394b404698cda7cc1621f2be4121c2
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
Log Message:
-----------
[MicrosoftCXXABI] Remove unnecessary zero-index GEP (#222025)
This was creating a zero-index GEP constant expression, which is
equivalent to the base pointer, and will be folded away.
Commit: 46c912344a6bc59acd5a396f1c4d921eb54a2c57
https://github.com/llvm/llvm-project/commit/46c912344a6bc59acd5a396f1c4d921eb54a2c57
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Semantics/runtime-type-info.h
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Semantics/runtime-type-info.cpp
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-attach.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-clauses.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-declare-global.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-exit.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-implicit-present.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-privatize.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-types.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep.mlir
M flang/unittests/Optimizer/OpenACC/FIROpenACCSupportAnalysisTest.cpp
A mlir/include/mlir/Dialect/OpenACC/OpenACCCGEnums.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsType.h
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsType.cpp
A mlir/test/Dialect/OpenACC/invalid-cg-mapinfo.mlir
A mlir/test/Dialect/OpenACC/ops-cg-mapinfo.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[acc] Pre-cg pass for handling flang data mapping to offload runtime (#221282)
Introduce acc.map_info as the acc dialect operation that captures a
single mapped object's offload facts (attach point, descriptor kind,
bounds, map flags, and size) so later codegen can lower data clauses to
the offload runtime from one representation.
Add a Flang pre-codegen pass, ACCMapInfoPrep, that materializes
acc.map_info for FIR-typed operands: it infers Fortran descriptor attach
and CFI facts, sizes mapped and privatized storage, and folds paired
enter/exit clause effects into map flags. This keeps FIR-specific
mapping logic out of ACCToLLVM and leaves that conversion to consume
map_info verbatim.
Commit: d3960386544aa370053b110610c8e7f30c850c0e
https://github.com/llvm/llvm-project/commit/d3960386544aa370053b110610c8e7f30c850c0e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libcxx/include/tuple
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/make_from_tuple.pass.cpp
Log Message:
-----------
[libc++] Fix make_from_tuple for reference types (#220966)
#215067 refactored `make_from_tuple`, which introduced a regression when
trying to construct reference types with it.
Commit: 50766c94c42ea6bd4a9424a5a63a905765d5c172
https://github.com/llvm/llvm-project/commit/50766c94c42ea6bd4a9424a5a63a905765d5c172
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/pthread_attr_t.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_getattr_np.cpp
M libc/src/pthread/pthread_getattr_np.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_getattr_np_test.cpp
Log Message:
-----------
[libc] Implement pthread_getattr_np (#221231)
Implement the GNU extension pthread_getattr_np.
For the stack address and size, the function returns the same value as
pthread_getstack_np. Specifically, this means returning
PTHREAD_STACK_DYNAMIC_NP for the main thread. Since we're not promising
async-signal-safety of this function, we could parse /proc/self/maps
(like glibc does), to get the actual stack VMA, but:
- that's a lot of code
- I'm not particularly fond of relying on /proc for libc features
- the consistency with pthread_getattr_np is nice
For these reasons, I'm not implementing this (or other alternatives like
RLIMIT_STACK) right now. This incidentally means that the current
implementation of this function is async-signal-safe, but that is likely
to change once we add support for additional attributes.
For consistency with glibc, I report the guard size of newly created
threads as zero, regardless of what was present in the thread creation
attributes. I zero the attribute directly during thread creation as it
is not used for managed stacks.
Assisted-by: Gemini
Commit: 3eb8494f6d0e40bf6e7fc3e5ec0196c5b2726bd6
https://github.com/llvm/llvm-project/commit/3eb8494f6d0e40bf6e7fc3e5ec0196c5b2726bd6
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Add APIs `getTotalNumVGPRs` and `getAddressableNumVGPRs` to TargetParser (#220695)
These align with `getTotalNumSGPRs` and `getAddressableNumSGPRs` that
already exist.
Commit: 12b2a6767a17e6450a3e844359afa30440bdd9ba
https://github.com/llvm/llvm-project/commit/12b2a6767a17e6450a3e844359afa30440bdd9ba
Author: Laxman Gupta <laxman.gupta1006 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll
Log Message:
-----------
[AggressiveInstCombine] Add shufflevector support to TruncInstCombine (#220218)
Previously, expression graphs containing shufflevector could not be
reduced to a smaller bit-width. This change adds support for traversing
and rebuilding shufflevector operations during the transformation,
allowing truncation to propagate through shuffle operations.
The shuffle mask and vector shape are preserved while the operands are
rebuilt with the reduced element type.
This removes the corresponding TODO in TruncInstCombine.cpp.
AI Tool Used: GitHub Copilot
Commit: 1dac88b2aad1af472a4f4d5b7d87930e6e557d1f
https://github.com/llvm/llvm-project/commit/1dac88b2aad1af472a4f4d5b7d87930e6e557d1f
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHazardLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSetWavePriority.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
A llvm/test/CodeGen/AMDGPU/insert-delay-alu-ldsdma.mir
A llvm/test/CodeGen/AMDGPU/ldsdma-not-coexec-valu.mir
A llvm/test/CodeGen/AMDGPU/ldsdma-not-valu-wait-sgpr.mir
Log Message:
-----------
[AMDGPU] Do not treat LDSDMA as VALU in several passes (#212866)
Use AllowLDSDMA=false (and producer/consumer split in InsertDelayAlu)
where LDSDMA was incorrectly classified as VALU.
Partially addresses https://github.com/llvm/llvm-project/issues/204488
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 3199f80203b3981f87a915bc045cc6d43b850cea
https://github.com/llvm/llvm-project/commit/3199f80203b3981f87a915bc045cc6d43b850cea
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Transforms/debug-line-table-no-types.fir
M flang/test/Transforms/debug-omp-target-op-1.fir
Log Message:
-----------
[flang][debug] Don't build signature types for minimal debug levels. (#221967)
AddDebugInfo converted the result and argument types of every function
before it checked the requested debug level, so -gline-tables-only or a
-gline-directives-only ended up with the full type graph of each
signature: derived types, array types, string types and the basic types
they are built from.
Leave the type list empty at those levels which is also what clang emits
for -gline-tables-only or -gline-directives-only. The subprogram of an
omp.target region gets the same treatment.
A single variable is now used to decide this so parameter for the
`addTargetOpDISP` lambda was removed.
Fixes #217343
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: af35312797b0be96be7b2f155542911df3693a2b
https://github.com/llvm/llvm-project/commit/af35312797b0be96be7b2f155542911df3693a2b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
Log Message:
-----------
MachinePipeliner: Fix using getUniqueVRegDef on a physical register (#216793)
Currently this is permissive and doesn't assert when called with
a physical register, but I'm working on changing this edge case.
No current observable change.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: f40474d53bc0e780d7d3653248d5a241d36fe07a
https://github.com/llvm/llvm-project/commit/f40474d53bc0e780d7d3653248d5a241d36fe07a
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA] Refactor dependence analysis (NFC) (#221653)
Remove some unnecessary part of DA.
- Remove unused `GroupLoops` and `Group` subscript state.
- Reuse the already-computed source and destination loops.
- Simplify `APInt` initialization and zero SCEV construction.
- Replace redundant casts with direct typed accessors.
Commit: 5bf9caeaa485f1720db8cfbe92012710c2fad36c
https://github.com/llvm/llvm-project/commit/5bf9caeaa485f1720db8cfbe92012710c2fad36c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llubi.md
A llvm/test/tools/llubi/alloca_large_size_crash.ll
M llvm/tools/llubi/lib/Context.cpp
M llvm/tools/llubi/llubi.cpp
Log Message:
-----------
[llubi] Limit max-mem to 4 GiB (#221765)
Closes https://github.com/llvm/llvm-project/issues/220952.
Commit: dc49aeb509940d32415ce420a608fc8d4ca3b01e
https://github.com/llvm/llvm-project/commit/dc49aeb509940d32415ce420a608fc8d4ca3b01e
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
Log Message:
-----------
[flang][acc] Add missing dependencies for ACCMapInfoPrep pass (#222028)
To resolve linking failures for:
cuf::hasDataAttr and loadRecordTypeSizeFromTypeDesc
after: https://github.com/llvm/llvm-project/pull/221282
Commit: b12d510875d4d3b56a34bb425757a1b488ba3e4b
https://github.com/llvm/llvm-project/commit/b12d510875d4d3b56a34bb425757a1b488ba3e4b
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/warn-implicit-unicode-conversions.cpp
Log Message:
-----------
[Clang] Fix assertion when a Unicode character is splatted to a vector of its own type (#219987)
Fixes #202317
Comparing an `ext_vector_type` of `char32_t` against one of its own
elements (`V.xyzw < V.x`) splats the scalar to the vector type, and
`-Wconversion` checking then trips `Source != Target` in
`DiagnoseMixedUnicodeImplicitConversion`. `CheckImplicitConversion` does
reject `Source == Target` at the top, but only on the outer types; when
it later strips the vector wrapper off the target it ends up with
`char32_t` on both sides and nothing re-checks that. Every other element
check just happened to tolerate identical types silently, the Unicode
one is the first to assert, which is why this only showed up as a Clang
21 regression.
The fix is at the call site rather than in the diagnostic: once the
vector, matrix and SVE wrappers have been stripped, return early if the
element types are the same. That covers matrix splats and HLSL
truncation to the same element type too, not just this one warning, and
leaves the assertion and the warning's behaviour alone. A genuine
mismatch such as `V.xyzw < u8` still warns as before. Added a test with
the reproducer.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 00a81e0a19da74292a84c0b5fcdae85f0646cc02
https://github.com/llvm/llvm-project/commit/00a81e0a19da74292a84c0b5fcdae85f0646cc02
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/HLFIR/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/test/Lower/CUDA/scalar-to-array-assign-device-O0.cuf
Log Message:
-----------
[flang][cuda] Inline scalar-to-array assignments in CUDA Fortran device code at -O0 (#221333)
At -O0, `arr = 11` lowers to a `_FortranAAssign` call. In device code
the runtime function's callees join the kernel's call graph, so the
device linker reserves a worst-case stack frame for every kernel
reaching it: `65,720` bytes per thread for a kernel with one such
assignment, versus `0` at -O1.
`InlineHLFIRAssign` already runs at -O0 with `onlyScalarRHS` for OpenMP
target device compilations. This extends that carve-out to CUDA Fortran.
Since a CUDA Fortran module holds both host and device code, the
decision is per-operation via `cuf::isCUDADeviceContext`, and host code
keeps the runtime call.
Only scalar-to-array broadcast is covered.
Commit: 443d419e798b37a3733b12db7859c5155407c6d8
https://github.com/llvm/llvm-project/commit/443d419e798b37a3733b12db7859c5155407c6d8
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/COFF/ObjectFileCOFF.cpp
Log Message:
-----------
[lldb] Fix switch case for i386 in COFF GetModuleSpecifications (#222030)
08c94c0ac3b503dd4971da8935001aba01918688 / #188276 accidentally removed
the "case:" for i386.
Commit: b674d2c82401631326305ce0d8e624b448daf8a5
https://github.com/llvm/llvm-project/commit/b674d2c82401631326305ce0d8e624b448daf8a5
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/ZOS.cpp
A clang/test/Driver/nodefaultrtlibs.c
Log Message:
-----------
[Driver][Clang] Add -nodefaultrtlibs (#219496)
On z/OS testing compiler-rt does not work with the -nodefaultlibs since
that option remove both the standard libraries like libc and the
compiler-rt library. On other platforms adding an argument like `-lc`
back to the command line in the test scripts works because the path for
libc (eg. `-L<path>`) hadn't been removed. On z/OS, the standard
libraries are located in data sets and you need to specify them by
complete name (eg. `<HLQ>.SCEELIB(CELQS003)`).
This is adding the option `-nodefaultrtlibs` so the compiler-rt tests
can remove just the compiler-rt libs from the link step.
Commit: d34b9a8dbb9e3fe3a894af0ecd381683dd95e693
https://github.com/llvm/llvm-project/commit/d34b9a8dbb9e3fe3a894af0ecd381683dd95e693
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
Log Message:
-----------
[CodeGen] Add const MBB overload to analyzeBranch (#221847)
Commit: 91ee3ddf53d996153f80193b350df013eb068803
https://github.com/llvm/llvm-project/commit/91ee3ddf53d996153f80193b350df013eb068803
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
Log Message:
-----------
[SandboxVec][Scheduler][NFC] Rename ScheduleTopItOpt to ScheduleFrontier (#220409)
We now have an actual class `SchedulingPoint` for pointing to the top of
schedule, so it is no longer an iteraterator as `ScheduleTopItOpt` would
imply. We also support both bottom-up and top-down directions so "Top"
is no longer a good name.
This patch renames the iterator to ScheduleFrontier.
Commit: f0bcda36c9f50c3bac7fb1b1dd06686166da155b
https://github.com/llvm/llvm-project/commit/f0bcda36c9f50c3bac7fb1b1dd06686166da155b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/elementwise/roundtrip.mlir
M mlir/test/lib/Dialect/Linalg/TestLinalgElementwiseFusion.cpp
Log Message:
-----------
[MLIR][linalg] Handle invalid elementwise kind safely (#221835)
The generic elementwise builder accepts an attribute list. Avoid passing
an uninitialized kind to region construction if a caller omits the
required kind, and reject attributes of the wrong type rather than
relying on an assertion.
Found by Coverity.
Assisted-by: Codex
Commit: 86a649acfded74042e2cec07df4fc2e70a02a74d
https://github.com/llvm/llvm-project/commit/86a649acfded74042e2cec07df4fc2e70a02a74d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
Log Message:
-----------
[MLIR][linalg] Share external interface implementations to reduce build time (NFC) (#221814)
The Linalg tiling and partial-reduction external models instantiate
their operation-independent implementations for every registered
structured op. Keep thin operation-specific external models, but inherit
the implementations from non-template bases so the compiler emits and
optimizes them only once.
Assisted-by: Codex
Commit: 4f22c50a5bebe5b76c3d3d45c5db2a5a769727f6
https://github.com/llvm/llvm-project/commit/4f22c50a5bebe5b76c3d3d45c5db2a5a769727f6
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/test/Sema/assign.c
Log Message:
-----------
Add a regression test; NFC (#221981)
There was a request for a regression test in #50193; this was fixed
initially by 9eef4d1c5fa6b1bcbbe675c14ca8301d5d346f7b
Commit: 6dd22919138af830711ed4fb5b792482139b8eb0
https://github.com/llvm/llvm-project/commit/6dd22919138af830711ed4fb5b792482139b8eb0
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
A llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
A llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.mir
Log Message:
-----------
[AMDGPU] Restrict DPP combine from performing bad transformations when handling certain REV insts that use Src1 as the DPP operand (#216835)
This issue was originally discovered due to a benchmark failure in the
downstream. The REV subtractions have always worked this way, and the
REV shift operands worked this way before GFX11
Commit: 67b8998d404ad633c9ec377598c8c1077b312365
https://github.com/llvm/llvm-project/commit/67b8998d404ad633c9ec377598c8c1077b312365
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-proper-value-replacement.ll
Log Message:
-----------
[AMDGPU] Avoid dangling SSAUpdater reference in PromoteAlloca full-vector store (#215686)
promoteAllocaToVector walks alloca users in use-list order across
blocks. A full-vector store forwards its value operand to the
SSAUpdater, and that operand can be a load from the same alloca in a
dominating block. If the store is visited first, the SSAUpdater holds a
raw pointer to the load; the load is later RAUW'd and deleted, leaving a
dangling reference that causes a crash.
Fix by sorting blocks in reverse post-order before visiting them, so a
forwarded load is always replaced before any store hands it to the
SSAUpdater.
Assisted-By: Cursor (Claude)
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 793137b8a9f92ad09f08701fd297aead07515a50
https://github.com/llvm/llvm-project/commit/793137b8a9f92ad09f08701fd297aead07515a50
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/ExecutionEngine/SparseTensor/File.h
M mlir/lib/ExecutionEngine/SparseTensor/File.cpp
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_file_rank.mlir
A mlir/test/Integration/data/rank_511.tns
Log Message:
-----------
[mlir][sparse] Reject tensor files with unsupported ranks (#220709)
Commit: 098c15fc1c119807ff61a16441c9903d9faefb0a
https://github.com/llvm/llvm-project/commit/098c15fc1c119807ff61a16441c9903d9faefb0a
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/Sema/riscv-pget-index-out-of-range.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Element Extract (#221565)
See also
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-element-extract.
Commit: 16bcb2727f98f366ca9e28b98b83654cdb150b89
https://github.com/llvm/llvm-project/commit/16bcb2727f98f366ca9e28b98b83654cdb150b89
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/ExecutionEngine/SparseTensor/File.h
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_file_coordinates.mlir
A mlir/test/Integration/data/coordinate_above_dimension.tns
A mlir/test/Integration/data/coordinate_narrow.tns
A mlir/test/Integration/data/coordinate_negative.tns
A mlir/test/Integration/data/coordinate_overflow.tns
A mlir/test/Integration/data/coordinate_zero.tns
Log Message:
-----------
[mlir][sparse] Reject invalid tensor coordinates (#220708)
Commit: 6e1cb51ab9dc2de34f8161b27cf24345b4c4ccbb
https://github.com/llvm/llvm-project/commit/6e1cb51ab9dc2de34f8161b27cf24345b4c4ccbb
Author: Szymon Piotr Milczek <szymon.milczek at intel.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Log Message:
-----------
[GlobalISel] Drop redundant scalable-dest check in G_EXTRACT_SUBVECTOR lowering (NFC) (#221934)
The scalarizing lowering of G_EXTRACT_SUBVECTOR bails out for both a
scalable source and a scalable destination.
According to llvm/docs/GlobalISel/GenericOpcode.md, G_EXTRACT_SUBVECTOR
only supports extracting a fixed vector from a scalable vector, never a
scalable vector from a fixed one.
This means that a fixed source implies a fixed destination, making the
DstTy.isScalable() check redundant.
Remove it. NFC.
Commit: 5d5365323003edd1f1c0fbc1e631ae5a2c49d176
https://github.com/llvm/llvm-project/commit/5d5365323003edd1f1c0fbc1e631ae5a2c49d176
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M flang/docs/ReleaseNotes.md
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/driver-help.f90
M flang/test/Lower/math-lowering/exponentiation.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang] Enable FP sum reassociation by default (#218746)
Enable Fortran-standard-compliant reassociation within individual REAL
and COMPLEX sum expressions by default at all optimisation levels.
Preserve the explicit positive and negative Flang override flags.
Also enable by default on bbc to match flang.
RFC:
https://discourse.llvm.org/t/rfc-flang-reasssociate-within-real-and-complex-expressions-by-default/91626
Assisted-by: Codex
Commit: 841d4ad6b315ab92c2a37e6484a3b7963b50060c
https://github.com/llvm/llvm-project/commit/841d4ad6b315ab92c2a37e6484a3b7963b50060c
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/nvptx_SPMD_codegen.cpp
M clang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
M clang/test/OpenMP/nvptx_target_teams_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/parallel_if_codegen_PR51349.cpp
M clang/test/OpenMP/reduction_complex.c
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/scope_codegen.cpp
M clang/test/OpenMP/target_codegen_global_capture.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_map_codegen_03.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_tl_codegen.cpp
M clang/test/OpenMP/target_parallel_for_tl_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-2.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_tl_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_parallel_if_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_tl_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_teams_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.all.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.all.expected
A offload/test/offloading/nested_parallel_reduction.c
Log Message:
-----------
[Clang][OpenMP] Don't mark outlined parallel region functions norecurse (#218862)
Clang marks every outlined OpenMP region function `norecurse`, in both
`emitOutlinedFunctionPrologue` and
`emitOutlinedFunctionPrologueAggregate`, and
does the same for the GPU parallel wrapper. For a `parallel` region that
is not
true: the body is reached through the function pointer the runtime is
handed, and
if the body opens another parallel region the runtime's parallel entry
is
re-entered while the first call is still live, so the entry and the body
sit in a
call graph cycle. `rpo-function-attrs` propagates the annotation off the
body and
onto the device runtime's parallel entry once internalization makes it
internal,
and a nested parallel region can then be folded away.
This drops the annotation where the runtime can re-enter the function —
the
parallel bodies and the GPU data sharing wrapper — and keeps it where it
holds by
setting it on the teams and target bodies, which are entered once and
never
handed back to the runtime as a callback. Task bodies never carried it,
as they
are emitted through `GenerateCapturedStmtFunction`.
Where the attribute is true `function-attrs` still infers it, so a
program whose
parallel regions do not nest loses nothing. Splitting one attribute
group into
two renumbers the groups in the combined-construct codegen tests, and
that
accounts for all of the test churn.
The new offload test covers the nested case that motivated this.
Commit: 121656d9360bcfc80c62c72f90cc1a28795b826e
https://github.com/llvm/llvm-project/commit/121656d9360bcfc80c62c72f90cc1a28795b826e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/test/Fir/OpenACC/acc-declare-gpu-module-insertion.fir
M mlir/lib/Dialect/OpenACC/Transforms/ACCDeclareGPUModuleInsertion.cpp
Log Message:
-----------
[mlir][openacc] Handle compiler generated global for unified mode (#221136)
Treat compiler generated global the same way as other global in unified
mode. This avoid having a host and device copy for runtime information
like type descriptors.
Commit: 888c6dc3c076077973e8998659caf5a8a081bb25
https://github.com/llvm/llvm-project/commit/888c6dc3c076077973e8998659caf5a8a081bb25
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-device-global.f90
Log Message:
-----------
[flang][cuda] Add compiler generated global to unified register global (#221135)
Treat compiler generated global the same way as other in unified mode.
Host has the initializer body and the device side is just a declaration.
Commit: 028cdb4b9ec090ef6eadea47a0223f9a3ab5845c
https://github.com/llvm/llvm-project/commit/028cdb4b9ec090ef6eadea47a0223f9a3ab5845c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
[libcxx] Move premerge jobs to k8s mode runner set (#221395)
This allows setting the container image in the workflow definition which
should vastly simplify maintenance. The issues that we were running into
previously with jobs randomly aborting (and getting marked as passed)
have been fixed with some cluster-side config changes.
Commit: 00d831fd85c0fca31a72dec32ebcd417f007b66c
https://github.com/llvm/llvm-project/commit/00d831fd85c0fca31a72dec32ebcd417f007b66c
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR][NFC] Fix build issue after Inlineasm convergent attr (#222041)
Fix build error after introducing InlineAsm convergent attribute in
https://github.com/llvm/llvm-project/pull/221990
Commit: 97195b284954aac357b9732df2a7a6ed6ca446c9
https://github.com/llvm/llvm-project/commit/97195b284954aac357b9732df2a7a6ed6ca446c9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Extend `ShapeCastCreateMaskFolderTrailingOneDim` (#219494)
Extends `ShapeCastCreateMaskFolderTrailingOneDim` so that it also works
for leading unit dims. For example,
```mlir
%1 = vector.create_mask %c1, %c1, %dim, %c1 : vector<1x1x[4]x1xi1>
%2 = vector.shape_cast %1 : vector<1x1x[4]x1xi1> to vector<[4]x1xi1>
```
is folded as:
```mlir
%0 = vector.create_mask %c1, %dim : vector<[4]xi1>
```
To better reflect the extended functionality, the updated pattern is
renamed as:
* `ShapeCastCreateMaskFolderBoundaryUnitDim`.
It takes a template parameter to specify whether to consider
the leading or the trailing unit dims.
Commit: 14e941a0566ae06e982c5d8ddd085697c48fd413
https://github.com/llvm/llvm-project/commit/14e941a0566ae06e982c5d8ddd085697c48fd413
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M openmp/libompd/gdb-plugin/CMakeLists.txt
M openmp/libompd/gdb-plugin/ompd/ompd.py
M openmp/libompd/gdb-plugin/ompdAPITests.c
A openmp/libompd/gdb-plugin/ompdDLService.c
A openmp/libompd/gdb-plugin/ompdDLService.h
M openmp/libompd/gdb-plugin/ompdModule.c
M openmp/libompd/test/lit.cfg
A openmp/libompd/test/ompd_dl_service.c
Log Message:
-----------
[OpenMP][OMPD] Add symbol lookup helper for GDB plugin (#221956)
On LLVM today, `libompd.so` exists with `dlopen`, finds each API with
`dlsym` and checks error with `dlerror`.
**Missing piece**: There is no single place that:
load this library
look up this name
give me a real error string
**Issues**:
A later change would have to edit 30+ calls sites,
`dlerror()` is easy to misuse,
failures often drop the OS error string.
**Fix**: Add these helpers:
`ompd_load_library(path)` – load `libompd.so`
`ompd_get_symbol(name)` – look up one function
`ompd_get_dl_error()` – last error text or NULL
The plugin still uses `dlopen/dlsym` inside that helper. No LLVM
Support. No `setup.py`.
Commit: ae78759605ffc4b1b58727acb023e47cfb4157e2
https://github.com/llvm/llvm-project/commit/ae78759605ffc4b1b58727acb023e47cfb4157e2
Author: David Green <david.green at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-xaluo.ll
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/i256-math.ll
M llvm/test/CodeGen/AArch64/mul-i128-overflow.ll
A llvm/test/CodeGen/AArch64/overflow-vec.ll
M llvm/test/CodeGen/AArch64/overflow.ll
M llvm/test/CodeGen/AArch64/pr55644.ll
Log Message:
-----------
[AArch64][GlobalISel] Update and extend the test coverage for overflow intrinsics. NFC (#222059)
Commit: df595667da70f2c90fe6bf2942d7d3939a41322e
https://github.com/llvm/llvm-project/commit/df595667da70f2c90fe6bf2942d7d3939a41322e
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.h
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-allow-trailing-underscore.cpp
Log Message:
-----------
[clang-tidy] Add TrailingUnderscore option for naming-check (#221452)
Fixes https://github.com/llvm/llvm-project/issues/154756.
Commit: a22313e92ef003a70c1c54dac82ccf1f5ade2e2f
https://github.com/llvm/llvm-project/commit/a22313e92ef003a70c1c54dac82ccf1f5ade2e2f
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_vopd_errs.s
M llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
Log Message:
-----------
[AMDGPU] Add AsmParser tests for misaligned VGPR tuples in custom-predicate operands (#221986)
MFMA VGPR sources, DP-ALU DPP, v_pk_mov_b32 and VOPD3 f64 take VGPR tuple
operands validated by custom AsmParser predicates. Odd-aligned tuples are
currently only caught late by validateVGPRAlign, so the error points at the
whole instruction (column 1). A follow-up moves the diagnostic to the
offending operand.
Commit: 3e3965fa48ce7f8945202a8cd9ba7ea37faba0b6
https://github.com/llvm/llvm-project/commit/3e3965fa48ce7f8945202a8cd9ba7ea37faba0b6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/TargetOptionsImpl.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/test/CodeGen/ARM/build-attributes.ll
A llvm/test/CodeGen/ARM/eabi-attribute-fp-rounding-strictfp.ll
M llvm/test/CodeGen/ARM/fnmul.ll
Log Message:
-----------
CodeGen: Remove TargetOptions::HonorSignDependentRoundingFPMathOption (#222027)
This option was only settable through the hidden -enable-sign-dependent-
rounding-fp-math flag and was never set by the in-tree frontends. Its
documentation describes honoring a dynamically-changeable rounding mode,
which is what strictfp is for; this relic predates any design for FP
mode controls.
Replace the one ARM consumer with strictfp checks, and remove the
predicate from the patterns which checked it. There were also no tests
for the pattern, so add those.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 1ca6698be7708121f987d0acf896c7dc4cf63a51
https://github.com/llvm/llvm-project/commit/1ca6698be7708121f987d0acf896c7dc4cf63a51
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBFile.h
M lldb/source/API/SBFile.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/tools/lldb-dap/DAP.cpp
Log Message:
-----------
[lldb][Windows] Translate file descriptors between CRT instances (#217126)
The official LLVM and lldb builds use `LLVM_ENABLE_RPMALLOC`. This
changes the default CRT allocator to rpmalloc for performance reasons.
In doing so, it also changes the CRT linkage from dynamic (`/MD`) to
static (`/MT`).
Since the CRT is the one managing file descriptors on Windows, its
universe is now scoped to a module. For lldb, this means we have three
fd-spaces: the driver (lldb/lldb-dap), liblldb, and Python.
We usually pass files around as file descriptors. This breaks when we do
it between modules.
Fortunately, the C runtime provides us with helpers to translate between
the process scoped HANDLEs and file descriptors. This way, we can
allocate an fd for a handle passed across modules. For Python, there's
the [`msvcrt`](https://docs.python.org/3/library/msvcrt.html) library we
can use to translate.
Fixes #216679.
Commit: f6c89fda0ae3a08b83a19f7b67aaad3aff027b0a
https://github.com/llvm/llvm-project/commit/f6c89fda0ae3a08b83a19f7b67aaad3aff027b0a
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Log Message:
-----------
Add Instruction::user_iterator. (#220391)
Users of an Instruction have a special property: they're guaranteed to
be Instructions themselves. Add a specialized iterator to take advantage
of this property.
See the change to IVDescriptors.cpp for an example of how this
simplifies code.
Commit: 9301f0b17193ff139f77c6ed69e4b9793b584bb3
https://github.com/llvm/llvm-project/commit/9301f0b17193ff139f77c6ed69e4b9793b584bb3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/hor-fp-reduction-instcount.ll
Log Message:
-----------
[SLP][NFC]Add a test with non-profitable vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/222080
Commit: e85a62955715c5ff38b685303379313ac81a0bbf
https://github.com/llvm/llvm-project/commit/e85a62955715c5ff38b685303379313ac81a0bbf
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
Log Message:
-----------
[NFCI][CIR] Add in 2 missing returns- (#222061)
I discovered these two were missing thanks to a warning diagnostic on a
downstream. It isn't clear why this doesn't cause problems anywhere (we
must just not really use these?), but fix it anyway.
Commit: b290e9efa6b991bb61887de29924a3c979de0376
https://github.com/llvm/llvm-project/commit/b290e9efa6b991bb61887de29924a3c979de0376
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
A llvm/test/Transforms/OpenMP/callback_parallel_regions.ll
A offload/test/offloading/fortran/target-teams-distribute-nested-parallel-do.f90
Log Message:
-----------
[OpenMPOpt] Look inside the callbacks the loop runtime functions are handed (#221449)
The `__kmpc_{distribute_,for_,distribute_for_}static_loop_*` functions
take the
loop body as a callback, so a parallel region written inside that body
is
reachable from the kernel only through the runtime call. `AAKernelInfo`
could not
see it: it recorded an unknown reaching region, and every kernel using
those
functions got a worker state machine whose only option was an indirect
call to
whatever it was handed.
Describe each function's callback argument in `OMPKinds.def`, attach
`!callback`
metadata, and fold the callback's `AAKernelInfo` state into the
caller's, so the
state machine can dispatch directly to the regions the body reaches. The
two
"more than one callee means give up" checks are relaxed for functions
carrying
`!callback`, since that edge is analyzable by construction; the
conservative
unknown-region record is kept for the case that motivated it, a callback
we only
see a declaration of.
These calls still block SPMD-ization, and the `TODO` saying they need
not is
replaced with the obstacles that actually remain. A plain `distribute`
spreads
iterations over teams, so the runtime runs it with TId 0 and a team size
of one;
SPMD-izing has every thread run its block's whole share. The
thread-indexed
families are stopped by the transform rather than the analysis: guarding
puts
single-threaded code behind a block-wide barrier, and a barrier inside a
body
only some threads run is divergent.
Ported from AMD's ROCm fork, `8176194f36b9`, which also used the
analysis to
SPMD-ize these kernels; that part is left out because it is disabled by
default
downstream after regressing applications.
Tested on gfx90a: `llvm/test/Transforms/{OpenMP,Attributor}` 260 passed,
1
unsupported. `offload/test/amdgpu-amd-amdhsa` 516 passed, including the
new
Fortran reproducer. No kernel in the AOMP smoke and smoke-fort suites
changes
execution mode.
Commit: 824137c10506050554cf15ef30e02ece7f0a9c75
https://github.com/llvm/llvm-project/commit/824137c10506050554cf15ef30e02ece7f0a9c75
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFLaunchAttachAttr.cpp
Log Message:
-----------
[flang][cuda][NFC] Switch to a simple walk for CUFLaunchAttachAttr pass (#222073)
CUFLaunchAttachAttr only sets cuf.proc_attr on outlined CUF kernel
launches (names containing _cufk_). It did that with
applyPartialConversion on the whole module, so the conversion driver
walked host and GPU IR to touch a handful of ops.
Walk gpu.launch_func instead and apply the same filter. I
Commit: 866a738a0357106ce668543eeeb8314c0a0efeed
https://github.com/llvm/llvm-project/commit/866a738a0357106ce668543eeeb8314c0a0efeed
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/AMDGPU/early-lis-two-address-regsequence-undef.mir
Log Message:
-----------
TwoAddressInstruction: Don't repair the unchanged def of a degenerate REG_SEQUENCE (#222053)
When every source operand of a REG_SEQUENCE is undef,
eliminateRegSequence rewrites the instruction in place to IMPLICIT_DEF.
The dead def of DstReg is left untouched, so its live range is already correct.
Passing DstReg to repairIntervalsInRange then makes it re-add an overlapping
segment with a fresh value for the unchanged def, asserting in
LiveInterval::addSegment. Drop DstReg from the repaired set in this case.
Exposed by -early-live-intervals
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 37cc0cae36a5d2231f331b7180c0a141c1b91cac
https://github.com/llvm/llvm-project/commit/37cc0cae36a5d2231f331b7180c0a141c1b91cac
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/IR/Constants.cpp
M llvm/unittests/IR/ConstantsTest.cpp
Log Message:
-----------
Reapply "[IR] `replaceUsesWith` when aliasing a GV and the use is `dso_local_equivalent`" (#220450) (#222036)
This reverts commit 751ed7b16433d2279286d0765f51cd36edc6d771.
The patch is quite indepdendent from PR #203171, which uncovered the
issue. We decouple them. The fix is tested in the unittest introduced
here. When we reland #203171, we'll add the cfi_dso_local_equivalent.ll
test.
Commit: ebd4778190106a84a583db8310054ff8b09dccf4
https://github.com/llvm/llvm-project/commit/ebd4778190106a84a583db8310054ff8b09dccf4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Exclude new OpenMP test (#222090)
Introduced in #221449. We haven't gotten around to fixing OpenMP yet, so
exclude it for now.
Commit: 5caed2fb0161f35e15cfdaa392dfb046cd037750
https://github.com/llvm/llvm-project/commit/5caed2fb0161f35e15cfdaa392dfb046cd037750
Author: Michael Jones <michaelrj at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/unistd.yaml
M libc/src/unistd/CMakeLists.txt
A libc/src/unistd/execl.h
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/execl.cpp
M libc/src/unistd/linux/execle.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
A libc/test/integration/src/unistd/execl_test.cpp
A libc/test/integration/src/unistd/execl_test_normal_exit.cpp
Log Message:
-----------
[libc] Implement execl (#220326)
Basically the same as execle, but passes the global env pointer. POSIX
standard here:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/exec.html
Assisted-by: Automated tooling, human reviewed
Commit: 9f51fa4e9ead0da931c1f7b5d2aa3fdbc62c845e
https://github.com/llvm/llvm-project/commit/9f51fa4e9ead0da931c1f7b5d2aa3fdbc62c845e
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Fix zstd compression (#219587)
23.1.0 was the first e2e release with zstd archives. I noticed that once
it shipped they didn't have a meaningful size improvement over the
pre-existing archives. Turns out this is because by default zstd
compresses over a 128MB window which wasn't large enough to get
meaningful savings. We now use 1GB for this which uses more memory but
should take the archive from the 1.8GB that the xz release is, to ~1gb.
I played around with a few options and this was the best time vs
compress vs memory usage ratio.
Assisted-By: codex
Commit: 49d09aaac230988c61fa700c7ace90e4e2376c51
https://github.com/llvm/llvm-project/commit/49d09aaac230988c61fa700c7ace90e4e2376c51
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG][NFC] Move EmitStackConvert from LegalizeDAG to SelectionDAG (#221357)
I've ran into multiple instances, include #221358 , where I need to
effectively "bitcast" an integer value to a floating point value with
different width (and vice versa). To my best understandings storing into
stack and loading back is the only feasible way. LegalizeDAG already has
this routine, so I thought it might be a good idea to extract it out and
put inside SelectionDAG.
NFC.
Commit: 1a4e4cbd2317320e5432664bbd709feb03bb1067
https://github.com/llvm/llvm-project/commit/1a4e4cbd2317320e5432664bbd709feb03bb1067
Author: jinge90 <ge.jin at intel.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Add llvm-link deps when building compiler-rt builtins for spirv64 targets (#221906)
https://github.com/llvm/llvm-project/pull/214149 uses llvm-link to
create libclang_rt.builtins.bc from static archive library. It is better
to follow libclc approach to add llvm-link dependency for
builtin-spirv64* in llvm runtime CMakeLists.txt.
Signed-off-by: jinge90 <ge.jin at intel.com>
Commit: 3ba57d142cc3b70ee49798d47d5da9fd99b482dd
https://github.com/llvm/llvm-project/commit/3ba57d142cc3b70ee49798d47d5da9fd99b482dd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/header-induction-start-bounds.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
Log Message:
-----------
[ConstraintElim] Support IV increments via [u|s]add.with.overflow. (#221771)
Treat [u|s]add.with.overflow like plain add when looking for increment
of an IV. We do not retrieve any wrap flags from the IR in that case, and
leave it to SCEV to determine them as needed.
This did not show any improvements on the workloads in
llvm-opt-benchmark-nightly, but helps to remove runtime checks for Swift
code end-to-end (see newly added PhaseOrdering test).
Alive2 Proof: https://alive2.llvm.org/ce/z/o2vMyw
PR: https://github.com/llvm/llvm-project/pull/221771
Commit: 30cfec3b4e6fc18c46d253028c52ee7bacaaf860
https://github.com/llvm/llvm-project/commit/30cfec3b4e6fc18c46d253028c52ee7bacaaf860
Author: David Green <david.green at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-big-endian-bitconverts.ll
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
Log Message:
-----------
[AArch64] Regenerate and update arm64-big-endian-bitconverts.ll. NFC (#222107)
Commit: 37dd96fedb5973485b37d03ec7a1fdbf6d1e6dbc
https://github.com/llvm/llvm-project/commit/37dd96fedb5973485b37d03ec7a1fdbf6d1e6dbc
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/Transforms/Attributor/indirect_call_program_address_space.ll
Log Message:
-----------
[Attributor] Compare an indirect call's callee in the program address space (#222097)
Specializing an indirect call emits, for each candidate callee, an
`icmp` between
the call's callee operand and the candidate. The operand was first
normalized to
address space 0, but the candidates are functions, and functions live in
the
target's program address space. Where that is not 0 the two sides of the
comparison had different types and the `icmp` asserted:
```
Instructions.h:1266: void llvm::ICmpInst::AssertOK(): Assertion
`getOperand(0)->getType() == getOperand(1)->getType() &&
"Both operands to ICmp instruction are not of the same type!"' failed.
```
Normalize to the program address space instead. It is 0 unless a target
says
otherwise, so nothing changes for those; for `spirv64`, whose data
layout sets
`P9`, it is the difference between comparing a `ptr` with a `ptr
addrspace(9)`
and comparing two `ptr addrspace(9)`.
This was found on the `intel-sycl-gpu` builder, which crashed compiling
`offload/test/offloading/nested_parallel_reduction.c` for
`spirv64-intel` once
841d4ad6b315 let that call site reach the specialization path: before,
it took
the single-callee promotion path, which emits no comparison. The bug it
reached
is older than that commit and is not specific to OpenMP, so the test
added here
is a plain Attributor one that needs only a data layout with a non-zero
program
address space.
Commit: 6a77c9113211f81804455102823b996e01283ffc
https://github.com/llvm/llvm-project/commit/6a77c9113211f81804455102823b996e01283ffc
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
Log Message:
-----------
[VPlan] Don't cost scalar IV steps if the vector body runs at most once. (#221974)
If the vector loop executes exactly once, each scalar IV step folds to a
constant, and there's nothing to cost.
Similarly to BranchOnCount and VPRegionBlock::cost, treat
VPScalarIVSteps as free in that case.
This fixes a slight inaccuracy introduced when moving to computing
VPScalarIVSteps costs in VPlan directly.
PR: https://github.com/llvm/llvm-project/pull/221974
Commit: 4afa58e64810be046a9427d3cf7827a0dc2c235c
https://github.com/llvm/llvm-project/commit/4afa58e64810be046a9427d3cf7827a0dc2c235c
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/source/Utility/ArchSpec.cpp
M lldb/unittests/Utility/ArchSpecTest.cpp
Log Message:
-----------
[lldb] Fix infinite recursion in ArchSpec's core matching (#221899)
`target create` never returns for a little-endian 32-bit MIPS ELF file,
on any host whose platform advertises `armv7m`/`armv7em` compatibility.
On Darwin that is every platform, since
`PlatformDarwin::GetCompatibleArchs()`
lists both for every arm64/arm64e host and falls through to that same
list
for any other host core. It is found by `lldb-target-fuzzer`.
Reproduce with a 52-byte ELF32 header (`ELFCLASS32`, `ELFDATA2LSB`,
`e_machine = EM_MIPS`, `e_flags = EF_MIPS_ARCH_32`, everything else
zero),
saved as `mips32el.elf`:
```
(lldb) target create mips32el.elf
```
This never returns. Attaching a debugger to the hung process shows the
same three frames looping forever, with the call stack never growing:
```
frame #1: cores_match(core1=eCore_arm_armv7m, core2=eCore_mips32el, try_inverse=false, ...) at ArchSpec.cpp:1575 [inlined]
frame #2: ArchSpec::IsMatch(rhs=..., match=CompatibleMatch) at ArchSpec.cpp:1449
frame #3: Platform::IsCompatibleArchitecture(...) at Platform.cpp:1193
```
`cores_match()` checks `core1` against `core2`. When nothing matches and
the caller did not ask for an exact match, it sets `try_inverse` and
retries once with the two cores swapped. It retries because the rule
tables are not symmetric: a core lists only what it accepts, not
everything
that accepts it.
Every case that reaches this fallback must leave `try_inverse` false on
the
way out, so the swap happens at most once. Three cases,
`eCore_arm_armv7em`, `eCore_arm_armv7m`, and `eCore_mips32el`, instead
set
it back to true unconditionally. When both sides of a comparison are one
of these three, the swapped call re-arms `try_inverse`, and the tail
call
back into `cores_match()` recurses forever.
This is a tail call, so an optimizing compiler turns the recursion into
a
loop instead of a growing stack. That is why the process spins instead
of
crashing with a stack overflow.
The three cases cannot simply leave `try_inverse` false like their
siblings. `ArchSpec("mipsel").IsCompatibleMatch(ArchSpec("mips64el"))`
is
true today only because of this same swap: `eCore_mips32el`'s own rule
says
nothing about 64-bit MIPS, but `eCore_mips64el`'s rule accepts any
32-bit
MIPS core with the same endianness, and only the inverted comparison
reaches that rule.
Instead, split the switch into a one-directional helper that never
recurses, and try both directions from a plain, non-recursive wrapper:
```
cores_match(A, B) := cores_match_one_direction(A, B) ||
cores_match_one_direction(B, A)
```
This keeps every existing one-directional rule exactly as it was,
including
the mips32el/mips64el rule above, and makes a second retry impossible no
matter what any case does.
Adds two regression tests to ArchSpecTest.cpp. One asserts that the
previously-hanging pairs now return false right away. The other locks in
the two relationships that depend on checking both directions, so a
future
change cannot bring the recursion back by "fixing" the three cases the
naive way.
Assisted-by: claude
Commit: 220294cbf949a487daed4739701d82dfee4054f3
https://github.com/llvm/llvm-project/commit/220294cbf949a487daed4739701d82dfee4054f3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove VPWidenInductionRecipe::getStartValue (NFC). (#222015)
It now shadows VPHeaderPHIRecipe::getStartValue, which returns the same
VPValue and, as the base class accessor, also has a non-const overload.
Narrowing the return type to VPIRValue * was its only purpose.
Commit: ede01decbcb34bd2f04b9102ab96664cc6d5aa4b
https://github.com/llvm/llvm-project/commit/ede01decbcb34bd2f04b9102ab96664cc6d5aa4b
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/lib/CMakeLists.txt
Log Message:
-----------
[libc] Generate a stub for libdl.a (#222098)
Avoid link errors when build rules explicitly add `-ldl` to the linker
invocation -
create an empty `libdl.a` static archive on Linux. It's necessary, for
example,
to build Clang (https://github.com/llvm/llvm-project/issues/97191)
Follow the approach from f88e9de37a52abf9b269a7232bf4d4028bc4ace8
which added a similar stub for `libpthread.a`. Like pthread, dynamic
loader
functions (although they are mostly unimplemented in LLVM-libc as of
today)
are residing in the main `libc.a` archive instead.
Commit: f91b6a0319fd900cb6e665fc8f8dcc5c1a801e4c
https://github.com/llvm/llvm-project/commit/f91b6a0319fd900cb6e665fc8f8dcc5c1a801e4c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
A llvm/test/CodeGen/PowerPC/vsx-swap-removal-undef.mir
Log Message:
-----------
PowerPC: Fix VSX swap removal crash on an undef register (#216714)
formWebs walks each vector-register use and unions its equivalence class
with that of its defining instruction, which it requires to be present
in the swap map. A use of an undef register has no defining instruction, so
the web formation crashed. Treat it like a physical-register mention so the
web is conservatively rejected.
Found by AI while working on something else.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 7024b9e1b423b3c3c6ac76ab6a73cb2c9e4ef842
https://github.com/llvm/llvm-project/commit/7024b9e1b423b3c3c6ac76ab6a73cb2c9e4ef842
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/vector-strict-fp.cpp
Log Message:
-----------
[CIR] Support fp strict for vector logical and, or ops (#221808)
Support fp strict for vector logical `cir.or` and `cir.and` ops
Commit: de2a0dd540f714f5e5ae2d3017fe22e2aa6de002
https://github.com/llvm/llvm-project/commit/de2a0dd540f714f5e5ae2d3017fe22e2aa6de002
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
A llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#222125)
9853cb54d9d2
b182b415d9b2
b90c062f3f03
e91092685eab
4c986c23921d
Commit: 43e82f2b4570c9f5be05ae7113260775bd8773a4
https://github.com/llvm/llvm-project/commit/43e82f2b4570c9f5be05ae7113260775bd8773a4
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/source/Commands/CommandObjectType.cpp
Log Message:
-----------
[lldb] Remove ConstString from CommandObjectType interfaces (#218811)
CommandObjectType was creating ConstStrings type names, function names,
etc. before they needed to be. I'd like to remove ConstString from the
DataFormatter code entirely, so pushing the creation down as far as
possible first is a good first step.
The only remaining use (outside of function arguments) is
ScriptAddOptions. I need to understand it more before I can really
remove it.
Commit: 733c1ec3a313db0e1b5162ff3b2b4438de6cc45c
https://github.com/llvm/llvm-project/commit/733c1ec3a313db0e1b5162ff3b2b4438de6cc45c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/src/__support/CMakeLists.txt
A libc/src/__support/pwd/CMakeLists.txt
A libc/src/__support/pwd/field_tokenizer.h
A libc/src/__support/pwd/flat_file_db.h
M libc/src/pwd/CMakeLists.txt
R libc/src/pwd/field_tokenizer.h
R libc/src/pwd/flat_file_db.h
M libc/src/pwd/pwd_utils.cpp
M libc/src/pwd/pwd_utils.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/pwd/CMakeLists.txt
A libc/test/src/__support/pwd/field_tokenizer_test.cpp
A libc/test/src/__support/pwd/flat_file_db_test.cpp
M libc/test/src/pwd/CMakeLists.txt
R libc/test/src/pwd/field_tokenizer_test.cpp
R libc/test/src/pwd/flat_file_db_test.cpp
Log Message:
-----------
[libc][NFC] Move flat-file database to src/__support/pwd (#221778)
Move FieldTokenizer and FlatFileDatabase from libc/src/pwd to
libc/src/__support/pwd so they can be reused across subsystems (such as
grp) without cross-directory dependencies.
* Move headers to libc/src/__support/pwd/
* Move unit tests to libc/test/src/__support/pwd/
* Update include paths and CMake dependencies in libc/src/pwd/
Assisted-by: Automated tooling, human reviewed.
Commit: d4816e76ca0d005880fa9b581232f0b905a85bb0
https://github.com/llvm/llvm-project/commit/d4816e76ca0d005880fa9b581232f0b905a85bb0
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Semantics/check-data.cpp
A flang/test/Semantics/data27.f90
Log Message:
-----------
[flang] Fix crash with legacy DATA initializer for an invalid declaration (#221170)
For legacy DATA /initialization/, declarations weren't checked for
errors before construction, resulting in an assert crash. This PR fixes
this by adding a check.
Fixes #220846
Commit: d298cac180f6c68a89458aaf450c9d84af8f56cc
https://github.com/llvm/llvm-project/commit/d298cac180f6c68a89458aaf450c9d84af8f56cc
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/DataExtractor.h
M llvm/lib/Support/DataExtractor.cpp
M llvm/unittests/Support/DataExtractorTest.cpp
Log Message:
-----------
[Support] Add DataExtractor::getSLEB128APSInt (#218801)
Add a APSInt variant of `getSLEB128`, supporting values greater than
int64_t.
The new `getSLEB128APSInt` can support values greater than `INT64_MAX`.
This functionality will be used by LLDB formatter bytecode.
Assisted-by: claude
Commit: 9f5246879112eb81a925e02beb1822a4287e81df
https://github.com/llvm/llvm-project/commit/9f5246879112eb81a925e02beb1822a4287e81df
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticDocs.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/test/TableGen/DiagnosticDocs.inc
A clang/test/TableGen/diag-docs-determinism.td
M clang/test/TableGen/emit-diag-docs.td
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[clang][docs] Generate diagnostics reference as Markdown (#221361)
Generate Clang's diagnostics reference from MyST Markdown rather than
reStructuredText. Update diagnostic-group documentation to use native MyST
roles and references, and have the TableGen emitter produce MyST list tables
for diagnostic alternatives.
The new list-table emission code is more verbose, but it is conceptually
simpler, since it's just tracking nested indentation as it emits table cells.
Here's a sample of the table markdown output:
```
* - {warning}`warning:` {diagtext}`They say`
- :::{list-table}
:widths: auto
* - {diagtext}`good`
* - {diagtext}`bad`
:::
-
- :::{list-table}
:widths: auto
* - {diagtext}`food`
* - {diagtext}`forests`
:::
- {diagtext}`are`
- :::{list-table}
:widths: auto
* - {diagtext}`good`
* - {diagtext}`bad`
:::
- {diagtext}`according to` {placeholder}`D`
```
See clang/test/TableGen/emit-diag-docs.td for examples of how it looks.
Tracking issue: #201242
Assisted-By: Codex & Claude
Commit: 540f5aca4a2cbd88b998e155db5b85a6a95ef024
https://github.com/llvm/llvm-project/commit/540f5aca4a2cbd88b998e155db5b85a6a95ef024
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/test/CodeGenHLSL/builtins/select.hlsl
Log Message:
-----------
[HLSL] Fix float type promotion to double of the select intrinsic (#222056)
fixes #222055
A previous pr replaced per vector 2-4 overloads with an all inclusive
vector template overload. These vector overloads needed to be guarded so
that vec1s go down the scalar overload path.
Assisted by Copilot MA-code-1.1-flash
Commit: accc84148aae88d54c11403d04929afaccecf4d6
https://github.com/llvm/llvm-project/commit/accc84148aae88d54c11403d04929afaccecf4d6
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
Log Message:
-----------
[AMDGPU] Refresh RegisterClassInfo after reserving WWM registers (#221849)
AMDGPUReserveWWMRegs reserves the VGPRs the WWM allocator picked for SGPR
spill lanes and clears the per-lane VGPR mask, but updates neither
MachineRegisterInfo nor the shared RegisterClassInfo. RegAllocBase
re-freezes the reserved set, but owns its RegisterClassInfo by value, so
only its private copy is refreshed, and a later user of the analysis is
offered an allocation order that still lists the reserved register.
AMDGPURewriteAGPRCopyMFMA became such a user in #216510: its spill slot
elimination assigned that register, which asserts in VirtRegMap and, in a
build without assertions, silently clobbers the spilled SGPRs. #216510 was
reverted in #221749; this is a prerequisite for relanding it.
Update MRI and the analysis at the end of the pass, as SIPreAllocateWWMRegs
already does, after clearPerLaneVGPRAllocMask() since the mask is itself an
input to getReservedRegs().
AI-assisted.
Commit: cc5c51457347547dbac6edcfe9887ca5aeee1b3d
https://github.com/llvm/llvm-project/commit/cc5c51457347547dbac6edcfe9887ca5aeee1b3d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/TestingSupport/TestUtilities.h
Log Message:
-----------
[lldb] Fix -Wunused-template (#221815)
This warning was enabled by default in clang 23.1.0 (although reverted
for 23.1.1). These fixes still make sense to perform though. Template
definitions in headers should not use static, and others are completely
unused.
Commit: 1f388eaf27616aceced0dd292af066ea8dbcd066
https://github.com/llvm/llvm-project/commit/1f388eaf27616aceced0dd292af066ea8dbcd066
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/222141
Commit: 8fdbba5073a6fe2ae16be0117f8f473eea27dc2a
https://github.com/llvm/llvm-project/commit/8fdbba5073a6fe2ae16be0117f8f473eea27dc2a
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/unistd-macros.h
M libc/include/unistd.yaml
M libc/src/unistd/linux/sysconf.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/sysconf_test.cpp
Log Message:
-----------
[libc][unistd] Support _SC_GET(GR|PW)_R_SIZE_MAX in sysconf. (#222135)
* Add support for POSIX-specified `_SC_GETGR_R_SIZE_MAX` and
`_SC_GETPW_R_SIZE_MAX`
constants used as arguments to `sysconf` function;
* Return -1 for these values - they provide "initial size" for
user-supplied buffers passed to `getgr*` and `getpw*`
functions, but there's no real maximum limit imposed by the LLVM-libc
implementation, and user might provide a
size they can, and rely on `ERANGE` return values if the chosen size
ended up being too small for pwd/group entries.
* Add unit test coverage, and update the unit test to use proxy headers
instead of system-provided `<unistd.h>`.
Also, properly test errno values returned by `sysconf`.
This fixes one of the remaining blockers for building Clang against
LLVM-libc (https://github.com/llvm/llvm-project/issues/97191)
Commit: 915c3497042d7cbbaa01128c0c044e46caae69da
https://github.com/llvm/llvm-project/commit/915c3497042d7cbbaa01128c0c044e46caae69da
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
[Github] Match backend:NVPTX files outside llvm/ (#221968)
The backend:NVPTX labeler rules are anchored to the llvm/ subtree (every
glob starts with llvm/**), so NVPTX/NVVM-related files elsewhere in the
tree never get the label. In particular, ClangIR's lowering under clang/
touches NVPTX code but the PR is not tagged backend:NVPTX.
This drops the llvm/ prefix so the patterns match anywhere in the tree.
Commit: c0a6b4bee96cc2c81716c5238c453ca68fee8042
https://github.com/llvm/llvm-project/commit/c0a6b4bee96cc2c81716c5238c453ca68fee8042
Author: 简 <32090825+LittleJianCH at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[CodeGen] Avoid quadratic operand removal in MachineInstr::insert (#220165)
This optimizes MachineInstr::insert by copying trailing operands
first and then removing them from the end. This avoids repeatedly
shifting the remaining operands, reducing the operation from quadratic
to linear time without changing behavior.
Commit: 1936b4a95dadcdeddefce26facb208413a9b3b86
https://github.com/llvm/llvm-project/commit/1936b4a95dadcdeddefce26facb208413a9b3b86
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Log Message:
-----------
[AMDGPU] Factor the AsmParser match-specificity comparison into a helper, NFC (#221987)
Extract the "keep the most specific match status" comparison in
matchAndEmitInstruction into an atLeastAsSpecific() lambda ranking
Match_MnemonicFail < Match_InvalidOperand < Match_MissingFeature. No
functional change.
Commit: 15034a76b21551f0e62c7c40f0878e8eeb0deebc
https://github.com/llvm/llvm-project/commit/15034a76b21551f0e62c7c40f0878e8eeb0deebc
Author: Raghu Maddhipatla <raghu.maddhipatla at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate-derived-warning.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate-save-warning.f90
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-allocate-directive.mlir
Log Message:
-----------
[OpenMP] [MLIR] [Flang] Replace all uses of variables in ALLOCATE directive to use new value which is created. (#212361)
Limitation:
Right now, added a TODO warning about lowering of variable with SAVE
attribute or named COMMON block are not completely supported end to end.
So a warning is emitted.
Commit: fa4d413ea4cfd0ab00c4d7b6d3f27087a3fc46bc
https://github.com/llvm/llvm-project/commit/fa4d413ea4cfd0ab00c4d7b6d3f27087a3fc46bc
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Port 35fe7e14ec (#222150)
Commit: e94e2be5be17bb3221c622bb3c638f4a1d9cd1c8
https://github.com/llvm/llvm-project/commit/e94e2be5be17bb3221c622bb3c638f4a1d9cd1c8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Collect predecessors/successors up front (NFC) (#222145)
Collect predecessors and successors up front in reassociateBlocks.
Currently NFC, but makes it more robust in the future, because it also
correctly handles self-edges.
Commit: 9a6ba310ff3d2ed4a88352dd164bfd94518e3cff
https://github.com/llvm/llvm-project/commit/9a6ba310ff3d2ed4a88352dd164bfd94518e3cff
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
Log Message:
-----------
[VPlan] Add helper to add incoming values for last predecessor (NFC). (#222149)
Factor logic to helper function, so it can be re-used in follow-up
changes.
Commit: 6d53e28d51d931eaa50f832cac81b3da4afc779d
https://github.com/llvm/llvm-project/commit/6d53e28d51d931eaa50f832cac81b3da4afc779d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/TransformOps/AffineTransformOps.td
M mlir/include/mlir/Dialect/Bufferization/TransformOps/BufferizationTransformOps.td
M mlir/include/mlir/Dialect/Func/TransformOps/FuncTransformOps.td
M mlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgMatchOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/MemRef/TransformOps/MemRefTransformOps.td
M mlir/include/mlir/Dialect/NVGPU/TransformOps/NVGPUTransformOps.td
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/include/mlir/Dialect/Tensor/TransformOps/TensorTransformOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/Dialect/Transform/TuneExtension/TuneExtensionOps.td
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/XeGPU/TransformOps/XeGPUTransformOps.td
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/test/CAPI/transform_interpreter.c
M mlir/test/Conversion/FuncToLLVM/func-memref-return.mlir
M mlir/test/Conversion/FuncToLLVM/func-to-llvm.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-32b.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/Func/func-transform.mlir
M mlir/test/Dialect/GPU/transform-gpu-failing.mlir
M mlir/test/Dialect/GPU/transform-gpu.mlir
M mlir/test/Dialect/LLVM/lower-to-llvm-transform-symbol-def.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/Linalg/continuous-tiling-full.mlir
M mlir/test/Dialect/Linalg/continuous-tiling-multiway-split.mlir
M mlir/test/Dialect/Linalg/convert-conv2d-to-img2col.mlir
M mlir/test/Dialect/Linalg/hoisting.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/match-ops-invalid.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/multisize-tiling-full.mlir
M mlir/test/Dialect/Linalg/pad-to-specific-memory-space.mlir
M mlir/test/Dialect/Linalg/promote.mlir
M mlir/test/Dialect/Linalg/promotion_options.mlir
M mlir/test/Dialect/Linalg/td/decompose-pack.mlir
M mlir/test/Dialect/Linalg/td/decompose-unpack.mlir
M mlir/test/Dialect/Linalg/td/propagate-data-layout.mlir
M mlir/test/Dialect/Linalg/td/vectorize-with-patterns.mlir
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Dialect/Linalg/transform-op-bufferize-to-allocation.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-hoist-pad-build-packing-loop-nest.mlir
M mlir/test/Dialect/Linalg/transform-op-hoist-pad.mlir
M mlir/test/Dialect/Linalg/transform-op-multitile-sizes.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface-multiple-of.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir
M mlir/test/Dialect/Linalg/transform-op-pad.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-matmul.mlir
M mlir/test/Dialect/Linalg/transform-op-split-reduction-by-scaling.mlir
M mlir/test/Dialect/Linalg/transform-op-split-reduction.mlir
M mlir/test/Dialect/Linalg/transform-op-split.mlir
M mlir/test/Dialect/Linalg/transform-op-vectorize.mlir
M mlir/test/Dialect/Linalg/transform-ops-invalid.mlir
M mlir/test/Dialect/Linalg/transform-ops.mlir
M mlir/test/Dialect/Linalg/transform-promotion.mlir
M mlir/test/Dialect/Linalg/transform-tile-and-fuse-pack-unpack.mlir
M mlir/test/Dialect/Linalg/transform-winograd-conv2d.mlir
M mlir/test/Dialect/Linalg/vectorization/contraction-interface.mlir
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns-flatten.mlir
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/extract.mlir
M mlir/test/Dialect/Linalg/vectorization/insert-slice-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
M mlir/test/Dialect/Linalg/vectorization/pad-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/unsupported.mlir
M mlir/test/Dialect/MemRef/make-loop-independent.mlir
A mlir/test/Dialect/MemRef/transform-ops-assembly-invalid.mlir
A mlir/test/Dialect/MemRef/transform-ops-assembly.mlir
M mlir/test/Dialect/MemRef/transform-ops.mlir
M mlir/test/Dialect/NVGPU/transform-create-async-groups.mlir
M mlir/test/Dialect/NVGPU/transform-pipeline-shared.mlir
M mlir/test/Dialect/SCF/transform-op-coalesce.mlir
M mlir/test/Dialect/SCF/transform-ops-invalid.mlir
M mlir/test/Dialect/SCF/transform-ops.mlir
M mlir/test/Dialect/Tensor/fold-empty-op.mlir
M mlir/test/Dialect/Tensor/transform-op-make-loop-independent.mlir
M mlir/test/Dialect/Transform/Library/lower-to-llvm-transform-symbol-def.mlir
M mlir/test/Dialect/Transform/check-use-after-free.mlir
M mlir/test/Dialect/Transform/expensive-checks.mlir
M mlir/test/Dialect/Transform/include/Library/lower-to-llvm.mlir
M mlir/test/Dialect/Transform/interpreter-entry-point-2.mlir
M mlir/test/Dialect/Transform/normal-forms.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/Dialect/Transform/ops.mlir
M mlir/test/Dialect/Transform/selective-targeting.mlir
M mlir/test/Dialect/Transform/test-dialect-injection.mlir
M mlir/test/Dialect/Transform/test-interpreter-printing.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
M mlir/test/Dialect/Transform/test-loop-transforms.mlir
M mlir/test/Dialect/Transform/test-pass-application.mlir
M mlir/test/Dialect/Transform/test-pattern-application.mlir
M mlir/test/Dialect/Transform/test-tune-extension.mlir
M mlir/test/Dialect/Vector/transform-op-vector-to-llvm.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Dialect/Vector/vector-transfer-drop-unit-dims-patterns.mlir
M mlir/test/Examples/transform-opt/external-def.mlir
M mlir/test/Examples/transform-opt/self-contained.mlir
M mlir/test/Examples/transform/Ch1/invalidation-2.mlir
M mlir/test/Examples/transform/Ch1/sequence.mlir
M mlir/test/Examples/transform/Ch2/sequence.mlir
M mlir/test/Examples/transform/Ch3/sequence.mlir
M mlir/test/Examples/transform/Ch4/features.mlir
M mlir/test/Examples/transform/ChH/full.mlir
M mlir/test/Integration/Dialect/EmitC/td.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmNeon/matmul-i8.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/td/pack-unpack.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul_common.mlir
M mlir/test/Integration/Dialect/Transform/match_reduction.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-using-interface.mlir
M mlir/test/Transforms/test-block-legalization.mlir
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.td
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
M mlir/test/python/dialects/transform.py
M mlir/test/python/dialects/transform_bufferization_ext.py
M mlir/test/python/dialects/transform_extras.py
M mlir/test/python/dialects/transform_interpreter.py
M mlir/test/python/dialects/transform_loop_ext.py
M mlir/test/python/dialects/transform_memref_ext.py
M mlir/test/python/dialects/transform_structured_ext.py
M mlir/test/python/dialects/transform_tensor_ext.py
M mlir/test/python/integration/dialects/transform.py
Log Message:
-----------
[MLIR][Transform] Enable strict property assembly format (#217290)
Enable strict property assembly format mode for the Transform dialect
and its extensions. Bind transform operation options directly in
declarative assembly formats so strict parsing does not rely on fallback
handling.
Update transform dialect, extension, and transform-driven tests to use
the direct property spelling.
Assisted-by: Codex
Commit: 4e12d4bc6b5fc33f0e556f8f282cf97d2843c39b
https://github.com/llvm/llvm-project/commit/4e12d4bc6b5fc33f0e556f8f282cf97d2843c39b
Author: Addmisol <addmisol9 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/CodeGenOpenCL/address-spaces-conversions.cl
M clang/test/CodeGenOpenCL/size_t.cl
Log Message:
-----------
[Clang][Sema] Promote pointers to common address space in pointer subtraction (#217341)
fixes #216804
## Summary
This PR fixes pointer subtraction between pointers with different but
overlapping address spaces (e.g., `private` and `generic` in
OpenCL).
Previously, when subtracting a private pointer from a generic pointer on
AMDGPU:
- The private pointer (AS5, 32-bit) was converted directly to i32 via
`ptrtoaddr`
- The generic pointer (AS0, 64-bit) was converted to i64 via `ptrtoaddr`
- This resulted in incorrect comparison of 32-bit vs 64-bit values
Now, pointers are first promoted to the composite (superset) address
space using `addrspacecast` before the subtraction. This
mirrors how the conditional operator (`?:`) already handles mixed
address space pointers.
## Test plan
- `clang/test/CodeGenOpenCL/size_t.cl` updated and passes
- Verified generated IR shows correct `addrspacecast` before `ptrtoaddr`
for AMDGCN and SPIR targets
---------
Signed-off-by: addmisol <addmisol9 at gmail.com>
Commit: 19a128ca460284d1274581dd6fedbc6e5f0f1a7d
https://github.com/llvm/llvm-project/commit/19a128ca460284d1274581dd6fedbc6e5f0f1a7d
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Reinsert deferred ready nodes to the ready list (#222054)
Up until now if trySchedule() failed, the ready instructions would be
removed from the ready list for no good reason.
This patch fixes this and reinserts the deferred nodes to the ready
list.
This also helps reduce the scan for ready instructions in trySchedule().
Commit: 644f006fba2b52f0cc0fd58917f2a3ad7d67e6c6
https://github.com/llvm/llvm-project/commit/644f006fba2b52f0cc0fd58917f2a3ad7d67e6c6
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
A utils/bazel/linux_uapi.bzl
Log Message:
-----------
[libc][bazel] Add a repo with linux kernel UAPI headers (#216867)
This PR exposes a target `@linux_uapi//:linux_uapi_headers` that points
to a local directory configured by the `LINUX_UAPI_INCLUDE_DIR`
environment variable. Linux UAPI headers are required to support libc's
`FULL_BUILD` configuration, which uses `-nostdlibinc` and thus requires
a copy of linux kernel headers.
Commit: b586da6cd57c3e8f4abfc46bc08af52e2f68f25a
https://github.com/llvm/llvm-project/commit/b586da6cd57c3e8f4abfc46bc08af52e2f68f25a
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
[libc][bazel] Allow building with -DLIBC_FULL_BUILD (#218992)
This PR defines a flag `-- at llvm-project//libc:build_mode` that
configures LLVM-libc to build with full-build flags. This is only
compatible with clang at the moment, since it relies on the
`-nostdlibinc` flag.
This PR contains the logic for LLVM-libc full build in Bazel. A largely
AI generated follow-on PR has `libc/BUILD.bazel` changes for building
libc targets in full-build mode:
https://github.com/llvm/llvm-project/pull/218993.
Commit: 4a78f273acba2f3bc10b683df252b20f5a8198b0
https://github.com/llvm/llvm-project/commit/4a78f273acba2f3bc10b683df252b20f5a8198b0
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/Maintainers.md
M clang/docs/AMDGPUSupport.md
M clang/docs/AddressSanitizer.md
M clang/docs/AllocToken.md
M clang/docs/AutomaticReferenceCounting.md
M clang/docs/Block-ABI-Apple.md
M clang/docs/BlockLanguageSpec.md
M clang/docs/BoundsSafety.md
M clang/docs/BoundsSafetyAdoptionGuide.md
M clang/docs/BoundsSafetyImplPlans.md
M clang/docs/CIR/ABILowering.md
M clang/docs/CIR/CleanupAndEHDesign.md
M clang/docs/CIR/CodeDuplication.md
M clang/docs/CXXTypeAwareAllocators.md
M clang/docs/ClangLinkerWrapper.md
M clang/docs/ClangNVLinkWrapper.md
M clang/docs/ClangOffloadBundler.md
M clang/docs/ClangSYCLLinker.md
M clang/docs/ClangTransformerTutorial.md
M clang/docs/ConstantInterpreter.md
M clang/docs/ControlFlowIntegrity.md
M clang/docs/DataFlowSanitizer.md
M clang/docs/DebuggingCoroutines.md
M clang/docs/DriverInternals.md
M clang/docs/FAQ.md
M clang/docs/FunctionEffectAnalysis.md
M clang/docs/HIPSupport.md
M clang/docs/HLSL/AvailabilityDiagnostics.md
M clang/docs/HLSL/EntryFunctions.md
M clang/docs/HLSL/ExpectedDifferences.md
M clang/docs/HLSL/FunctionCalls.md
M clang/docs/HLSL/HLSLIRReference.md
M clang/docs/HLSL/HLSLSupport.md
M clang/docs/HLSL/ResourceTypes.md
M clang/docs/HardwareAssistedAddressSanitizer.md
M clang/docs/InternalsManual.md
M clang/docs/LLVMExceptionHandlingCodeGen.md
M clang/docs/LanguageExtensions.md
M clang/docs/LeakSanitizer.md
M clang/docs/LibASTImporter.md
M clang/docs/LifetimeSafety.md
M clang/docs/MatrixTypes.md
M clang/docs/MemorySanitizer.md
M clang/docs/MisExpect.md
M clang/docs/Modules.md
M clang/docs/OffloadingDesign.md
M clang/docs/OpenCLSupport.md
M clang/docs/OpenMPSupport.md
M clang/docs/OverflowBehaviorTypes.md
M clang/docs/PCHInternals.md
M clang/docs/PointerAuthentication.md
M clang/docs/RISCVSupport.md
M clang/docs/RealtimeSanitizer.md
M clang/docs/ReleaseNotes.md
M clang/docs/SYCLSupport.md
M clang/docs/SafeBuffers.md
M clang/docs/SafeStack.md
M clang/docs/SanitizerCoverage.md
M clang/docs/SanitizerSpecialCaseList.md
M clang/docs/SanitizerStats.md
M clang/docs/ShadowCallStack.md
M clang/docs/SourceBasedCodeCoverage.md
M clang/docs/StandardCPlusPlusModules.md
M clang/docs/StructureProtection.md
M clang/docs/ThinLTO.md
M clang/docs/Toolchain.md
M clang/docs/TypeSanitizer.md
M clang/docs/UndefinedBehaviorSanitizer.md
M clang/docs/UsersManual.md
M clang/docs/WarningSuppressionMappings.md
M clang/docs/analyzer/checkers.md
M clang/docs/analyzer/developer-docs/DebugChecks.md
M clang/docs/analyzer/user-docs/Annotations.md
M clang/docs/analyzer/user-docs/CrossTranslationUnit.md
M clang/docs/analyzer/user-docs/FAQ.md
M clang/docs/analyzer/user-docs/TaintAnalysisConfiguration.md
M clang/docs/analyzer/user-docs/UsingWithXCode.md
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/DiagnosticDocs.td
M clang/include/clang/Options/ClangOptionDocs.td
Log Message:
-----------
[docs] Remove TOCs from Clang docs to prepare for Furo migration (#214868)
This is a mechanical change generated by
`utils/docs/remove_page_tocs.py`. In case of conflicts, which are
likely, due to the ongoing markdown migration (#201242), this script can
be re-run to regenerate the change. I'm creating a separate PR for it to
minimize the diff on the functional changes for the furo PR.
Commit: 600241fd49f1d5d5a9aac608da8b2872d23fa082
https://github.com/llvm/llvm-project/commit/600241fd49f1d5d5a9aac608da8b2872d23fa082
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/DataFlowAnalysisIntro.md
M clang/docs/LifetimeSafety.md
M clang/docs/UsersManual.md
A clang/docs/_static/custom.css
M clang/docs/analyzer/conf.py
M clang/docs/conf.py
R libc/docs/_static/copybutton.css
R libc/docs/_static/copybutton.js
M libc/docs/conf.py
R llvm/docs/_static/LLVMWyvernSmall.png
R llvm/docs/_static/copybutton.css
R llvm/docs/_static/copybutton.js
M llvm/docs/conf.py
M utils/docs/llvm_sphinx/__init__.py
A utils/docs/llvm_sphinx/_static/LLVMWyvernSmall.png
A utils/docs/llvm_sphinx/_static/copybutton.css
A utils/docs/llvm_sphinx/_static/copybutton.js
A utils/docs/llvm_sphinx/ext/furo.py
Log Message:
-----------
[clang][docs] Adopt the furo theme used by llvm and libc (#214869)
This change moves the static assets into utils/docs/llvm_sphinx, and
centralizes some of the furo theme logic there.
It then configures furo from clang/docs/conf.py and
clang/analyzer/docs/conf.py.
The temporary preview for the site is here:
https://clangdocs.staging.reidkleckner.dev/after/clang/docs/
The RFC is here:
https://discourse.llvm.org/t/rfc-use-furo-theme-for-clang-docs/91505/7
I plan to wait until at least Aug 13 before merging to gather more
feedback.
Commit: 1977a8b9130e9d0af669feba15d5641f9740ec9d
https://github.com/llvm/llvm-project/commit/1977a8b9130e9d0af669feba15d5641f9740ec9d
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/netdb-macros.h
M libc/include/netdb.yaml
M libc/test/src/netdb/CMakeLists.txt
A libc/test/src/netdb/getaddrinfo_test.cpp
R libc/test/src/netdb/netdb_test.cpp
Log Message:
-----------
[libc][netdb] Add AI_* family of constants. (#221360)
* Provide the values for `AI_*` flags that are passed in `ai_flags`
field of `addrinfo`
structure to `getaddrinfo` calls.
* Reference some of those constant in a placeholder unittest. Rename it
to `getaddrinfo_test`
to clarify its scope (we'll likely be using different test files for
other netdb.h functions).
Commit: b249fd3c6e3dd0e9f9617e57a5cf64fa42d1b486
https://github.com/llvm/llvm-project/commit/b249fd3c6e3dd0e9f9617e57a5cf64fa42d1b486
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/test/Dialect/Linalg/vectorization/contraction-interface.mlir
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns.mlir
Log Message:
-----------
[MLIR][Linalg] Update transform tests for strict properties (#222184)
Update recently added vectorization tests to use the custom assembly
syntax.
Strict Transform dialect properties no longer parse inherent attributes
from the generic attribute dictionary.
These tests landed concurrently with the strict-properties migration.
Assisted-by: Codex
Commit: 66462afa7e4a33f0d720877f2228589d5b43de81
https://github.com/llvm/llvm-project/commit/66462afa7e4a33f0d720877f2228589d5b43de81
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/cmpbr-early-ifcvt.mir
Log Message:
-----------
[AArch64][CMPBR] Fix splitting of CBB/CBH instructions into ext + cmp (#221112)
We falsely split CBB/CBH instructions by explicitly extending the
second register operand instead of the first one, leading to the
following, wrong codegen:
cbh $wn, $wm, cc, trgt => sxth $wt, $wm
cmp $wn, $wt, cc, sxth
Correct is
cbh $wn, $wm, cc, trgt => sxth $wt, $wn
cmp $wt, $wm, cc, sxth
since cmp with extended register extends it's second, not its first
operand.
Commit: df55ebfbe36ec8c6e19fd5b06f218a56cc6f5e23
https://github.com/llvm/llvm-project/commit/df55ebfbe36ec8c6e19fd5b06f218a56cc6f5e23
Author: jiel-nv <37816794+jiel-nv at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/test/Fir/CUDA/predefined-variables.mlir
Log Message:
-----------
[flang][cuda] Create predefined variable reads at the location of use (#222058)
Commit: 1462d6f99a0cdf8c99108cb32eb020efe6ba5f89
https://github.com/llvm/llvm-project/commit/1462d6f99a0cdf8c99108cb32eb020efe6ba5f89
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__optional/optional.h
M libcxx/include/__optional/optional_ref.h
Log Message:
-----------
[libc++][NFC] Remove `optional::__get` (#217218)
Internal communicating functions `optional::__get` can be superseded by
either `value`, `operator*()`, or direct use of data member. Even though
`value()` is checked, checks are already performed before internal calls
to it, so compilers should be able to remove duplicated checks.
It is intended to use `opt.value()` instead of `*opt` to avoid undesired
argument-dependent lookup.
Commit: 58d0cb5a6e50748b4e577da18b1ce34c3418119b
https://github.com/llvm/llvm-project/commit/58d0cb5a6e50748b4e577da18b1ce34c3418119b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
M mlir/test/Dialect/EmitC/canonicalize.mlir
M mlir/test/Dialect/EmitC/form-expressions.mlir
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/invalid_types.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Dialect/EmitC/types.mlir
M mlir/test/Target/Cpp/attrs.mlir
M mlir/test/Target/Cpp/call.mlir
M mlir/test/Target/Cpp/common-cpp.mlir
M mlir/test/Target/Cpp/const.mlir
M mlir/test/Target/Cpp/expressions.mlir
M mlir/test/Target/Cpp/invalid.mlir
M mlir/test/Target/Cpp/literal_call_operand.mlir
M mlir/test/Target/Cpp/lvalue.mlir
M mlir/test/Target/Cpp/member.mlir
M mlir/test/Target/Cpp/subscript.mlir
M mlir/test/Target/Cpp/switch.mlir
M mlir/test/Target/Cpp/types.mlir
M mlir/test/Target/Cpp/variable.mlir
M mlir/test/Target/Cpp/verbatim.mlir
M mlir/test/Transforms/sccp.mlir
Log Message:
-----------
[MLIR][EmitC] Enable strict property assembly format (#217271)
Enable strict property assembly format mode for the EmitC dialect. Spell
call metadata directly in the affected declarative assembly formats and
drop unneeded property dictionaries from formats that already cover
their inherent attributes.
Refresh EmitC tests and related C++ target checks so call properties use
direct syntax while ordinary attributes remain in attr-dict.
Assisted-by: Codex
Commit: 68622e02c9e51d8202a82aca96421662a06eaa18
https://github.com/llvm/llvm-project/commit/68622e02c9e51d8202a82aca96421662a06eaa18
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M compiler-rt/test/fuzzer/fork.test
M compiler-rt/test/fuzzer/fork_corpus_groups.test
Log Message:
-----------
[Fuzzer] Bump rss_limit again. (#222187)
The two tests libFuzzer-x86-64-default-Linux::fork_corpus_groups.test
and libFuzzer-x86-64-default-Linux::fork.test have started being flaky
again on two of my bots, so bumping up the rss limit in the test which
temporarily solved the issue back in #204701.
See comment in #222187 for links to the bots and recent failures.
Commit: 5e282718a88c5e19dfe3524dee0bc91a5fa1e224
https://github.com/llvm/llvm-project/commit/5e282718a88c5e19dfe3524dee0bc91a5fa1e224
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/IR/core-ops.mlir
M mlir/test/Transforms/canonicalize.mlir
M mlir/test/Transforms/inlining.mlir
Log Message:
-----------
[MLIR][Func] Enable strict property assembly format (#217300)
Enable the strict properties assembly format mode for the Func dialect.
Spell inherent call attributes directly in the call formats so they are
no longer parsed from attr-dict in strict mode.
Assisted-by: Codex
Commit: bbd998f0186f5362d3c9c1cc575bf6ce20007685
https://github.com/llvm/llvm-project/commit/bbd998f0186f5362d3c9c1cc575bf6ce20007685
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/test/Semantics/data27.f90
Log Message:
-----------
[flang][test] Expand test for legacy DATA initializer on invalid declarations (#222171)
Follow-up to #221170. Expands `flang/test/Semantics/data27.f90` with the
other shapes that crashed the same way before that fix and now produce
the expected error
Assisted-by: AI
Commit: 9851e4f8979b8b57557d03cd98b54f57287a128f
https://github.com/llvm/llvm-project/commit/9851e4f8979b8b57557d03cd98b54f57287a128f
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Make a large swath of targets full-build compatible (#218993)
After this PR, all compatible targets in `@llvm-project//libc:all` are
buildable under full-build mode.
```
bazel build @llvm-project//libc:all -- at llvm-project//libc:build_mode=full --config=generic_clang --keep_going
```
Assited-by: Gemini 3.5
Commit: a953c8466be3dc855f99bf0433386fcae4ef2627
https://github.com/llvm/llvm-project/commit/a953c8466be3dc855f99bf0433386fcae4ef2627
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
Log Message:
-----------
[RISCV][MC]Fix encoding for psati.dw/dh (#221889)
psati.dh: the width is specified by uimm4+1.
psati.dw: the width is specified by uimm5+1.
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-proposal.adoc#psati-dh-rv32
Commit: ea3f107a84eaa2459f6eb5d1c8dbeefea7576689
https://github.com/llvm/llvm-project/commit/ea3f107a84eaa2459f6eb5d1c8dbeefea7576689
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/nvptx_SPMD_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_codegen.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M clang/test/OpenMP/target_teams_reduction_codegen.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
M offload/plugins-nextgen/common/src/RecordReplay.cpp
A offload/test/offloading/thread_limit_below_wavefront.c
Log Message:
-----------
[OpenMP] Reserve the main thread's warp for generic mode kernels (#218790)
In generic mode one warp of the block runs the main thread and the rest
run the
user's threads, so everything needing the team size computes
`BlockSize - WarpSize`: the device runtime's `getMaxTeamThreads`, and
the state
machine OpenMPOpt builds. The bound written into the kernel was the
program's
`thread_limit` exactly, so on gfx90a `thread_limit(4)` launched a block
of 4
threads and the team size came out as `4 - 64`. That subtraction is
unsigned, so
the runtime saw four billion workers rather than none: the parallel
region never
ran, and on current trunk the launch dies with a memory access fault.
Any
`thread_limit` below one warp was affected, so anything under 64 on a
wave64
target.
Add the warp where the bound is written, in `createTargetInit`, for
generic mode
only, so `thread_limit(4)` writes 68 and the team gets its 4, clamped to
the
target's maximum work group size because an out-of-range bound is
dropped rather
than clamped. A fixed 64 is reserved rather than the target's own
wavefront: the
bound is only a ceiling, and the runtime still adds the real warp size
and
clamps to it, so the block that launches is unchanged. Where the warp is
narrower the ceiling is 32 too high, which costs the backend some
register
budget and nothing else; NVPTX with `thread_limit(20)` now gets
`maxntid=84`
where it would have got 52, and still launches 52.
The record-replay recorder, which wrote `thread_limit` as the largest
launch a
replay would accept, now records the larger block that was actually
launched.
`thread_limit_below_wavefront.c` is the reproducer, and the remaining
files are
regenerated clang and MLIR expectations.
## Testing
Tested on `main` at 68622e02c9e5: `clang/test/OpenMP`,
`mlir/test/Target/LLVMIR`
and `llvm/test/Transforms/OpenMP` give 2114 passed, 14 unsupported, 4
failed.
The four are `mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared*`, which
fail on
`main` independently of this change: their RUN lines hand `llc` an
`-mxcoff-roptr` it only accepts on AIX.
`check-offload` on an MI210 has nothing failing: 1134 passed, 4
expectedly
failed, 363 unsupported, 12 skipped. That covers the new test,
`thread_limit_below_wavefront.c`, and the six `omp-kernel-replay` tests.
Commit: d1c0cc5e760f9cbb68e2acec80a476c4b8b898b7
https://github.com/llvm/llvm-project/commit/d1c0cc5e760f9cbb68e2acec80a476c4b8b898b7
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
Log Message:
-----------
[AMDGPU] Do not freeze reserved registers in AMDGPUReserveWWMRegs (#222193)
Refreshing the shared RegisterClassInfo needs an up-to-date reserved set, but
freezing it into MachineRegisterInfo, as #221849 did, publishes it too early:
clearing the per-lane VGPR mask unreserves those registers, and LiveIntervals
does not extend a reserved register's unit ranges to its uses, so those uses
fail verification.
Take the set from TargetRegisterInfo instead. It is the same set, and the
register allocator still freezes it into MachineRegisterInfo itself.
AI-assisted.
Commit: d7da49ea2bbc11a93f162ab2ef9755e57843075d
https://github.com/llvm/llvm-project/commit/d7da49ea2bbc11a93f162ab2ef9755e57843075d
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/CMakeLists.txt
M clang/include/clang/Options/ClangOptionDocs.td
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Options/Options.td
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M flang/docs/CMakeLists.txt
M flang/docs/FlangOptionsDocs.td
M flang/docs/FlangOptionsMan.td
Log Message:
-----------
[clang][flang][docs] Re-land Markdown CLI ref generator (#222147)
Reverts llvm/llvm-project#221937
Relands llvm/llvm-project#220385
This time, the migration includes flang command line reference
documentation, so the change passes `ninja docs-flang-html/man`.
Tracking issue: #201242
Assisted-By: Codex
Commit: 4383c7f120edc4e31294eb148a57c762d7d53170
https://github.com/llvm/llvm-project/commit/4383c7f120edc4e31294eb148a57c762d7d53170
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Fix relocation type for `LDRSW` (#221939)
Fix the incorrect relocation type for `LDRSW`. It should be
`ELF::R_AARCH64_LDST32_ABS_LO12_NC`, but it was mistakenly set to
`ELF::R_AARCH64_LDST64_ABS_LO12_NC` in PR #196051.
Commit: 7209c7af3323615c632a3409a2a776b29fbac528
https://github.com/llvm/llvm-project/commit/7209c7af3323615c632a3409a2a776b29fbac528
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/test/Driver/modules-driver-depscan-log.cpp
Log Message:
-----------
[clang][Driver][test] Specify output path in modules-driver-depscan-log.cpp (#222209)
In `clang/test/Driver/modules-driver-depscan-log.cpp`, `%clang -c` is
invoked on `%t/A.cppm` without an explicit output file (`-o`). By
default, Clang writes the resulting object file (`A.o`) to the current
working directory.
In sandboxed or hermetic test environments where the test runner
executes with a read-only working directory (e.g., Bazel, Nix, or remote
build executors), the test fails with:
```text
error: unable to open output file 'A.o': 'Permission denied'
1 error generated.
Commit: dea8e298844a7721d6db80e2474c178d454b148c
https://github.com/llvm/llvm-project/commit/dea8e298844a7721d6db80e2474c178d454b148c
Author: Shengxin Pei <TPPPP72 at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/SemaCXX/cxx20-default-compare.cpp
R clang/test/SemaCXX/gh147127.cpp
Log Message:
-----------
[clang][test] Move test `gh147127.cpp` to `cxx20-default-compare.cpp` NFC (#222208)
Follow-up #198830
Commit: e1683efa7ce0c77dbd2f3b04e05e18313aee4338
https://github.com/llvm/llvm-project/commit/e1683efa7ce0c77dbd2f3b04e05e18313aee4338
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/IR/Type.cpp
M llvm/test/CodeGen/DirectX/ResourceAccess/handle-cases.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/handle-to-index.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes-resolved.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes.ll
M llvm/test/Transforms/GVN/PRE/no-phi-translate.ll
M llvm/test/Transforms/GVN/PRE/no-pre-load-for-token-like.ll
M llvm/test/Transforms/LCSSA/token-like-live-out.ll
M llvm/test/Transforms/SimpleLoopUnswitch/token-uses.ll
R llvm/test/Transforms/SimplifyCFG/token_like_type.ll
M llvm/test/Verifier/tokenlike1.ll
M llvm/test/Verifier/tokenlike5.ll
M llvm/test/Verifier/tokenlike6.ll
M llvm/test/Verifier/tokenlike7.ll
M llvm/unittests/Transforms/Utils/LocalTest.cpp
Log Message:
-----------
[IR][DirectX] Drop IsTokenLike from `dx.*` target types (#222130)
We made the DirectX resource types "token-like" a while ago in order to
prevent transforms from moving them into PHIs and the like in ways that
made determining their provenance more difficult. However, there are
patterns in HLSL that can generate the problematic IR directly and we've
since implemented logic in `DXILResourceAccess` to handle such cases
anyway. Because of this, we aren't really getting any benefit from the
types being `IsTokenLike`, and in some cases we're working with
intermediate IR that doesn't actually pass the verifier.
Drop `IsTokenLike` from the `dx.*` types since it's no longer correct or
useful. I've updated the tests to use `amdgpu.stridemark` instead, and
slightly abused `llvm.ssa.copy` in order to manufacture SSA values of
that type. I had to drop the test that actually needed a load from a
value depending on the token-like type, as there just isn't really a way
for that to come up without the resource types.
Commit: 33898fffd3c09eba75e4199749117923bc1beee2
https://github.com/llvm/llvm-project/commit/33898fffd3c09eba75e4199749117923bc1beee2
Author: Shengxin Pei <TPPPP72 at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/SemaCXX/ms-ctor-closure.cpp
Log Message:
-----------
[clang][test] Add test for #67685 NFC (#222212)
Commit: 8c7d76bfc1b5c75effc7bd8ecc4892be9970ea5d
https://github.com/llvm/llvm-project/commit/8c7d76bfc1b5c75effc7bd8ecc4892be9970ea5d
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-funcassigncloning.ll
M llvm/test/ThinLTO/X86/memprof-funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/duplicate-context-ids.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloningrecursion.ll
M llvm/test/Transforms/MemProfContextDisambiguation/inlined3.ll
Log Message:
-----------
[MemProf] Use NodeId to break ties deterministically in identifyClones (#222126)
In identifyClones(), ties between caller edges with identical allocation
types and matching clone candidates were previously broken by comparing
the first element of ContextIds (*A->ContextIds.begin() <
*B->ContextIds.begin()).
Because ContextIds is a DenseSet, its iteration order depends on hash
table
layout and bucket distribution, introducing non-determinism across
different
runs or architectures.
Replace this tie-breaker with caller NodeId (A->Caller->NodeId <
B->Caller->NodeId),
which provides a deterministic and stable ordering. Also apply
Callee->NodeId
in CalleeCallerEdgeLessThan for consistency.
Update tests whose remark or dump order depended on the previous
tie-breaker.
For tests that verify multi-clone greedy assignment behavior
(funcassigncloning*.ll),
reorder the input MIB contexts so caller NodeIds reproduce the visit
order
exercising the extra clone creation.
Assisted-by: Gemini
Commit: b113e2640849cd75a39efeae6256d5aecc3f1446
https://github.com/llvm/llvm-project/commit/b113e2640849cd75a39efeae6256d5aecc3f1446
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
Log Message:
-----------
Fix Bazel build for 52d922a (#222219)
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=52d922aa153b1232813470e014635419ce006023
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5503fa587536afa2624971224dbfc6e25d762d37
https://github.com/llvm/llvm-project/commit/5503fa587536afa2624971224dbfc6e25d762d37
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/lib/Passes/FixRISCVCallsPass.cpp
M bolt/test/RISCV/call-link-register.s
M bolt/test/RISCV/relax.s
Log Message:
-----------
[BOLT][RISCV] Remove redundant AUIPCs when rewriting call pairs (#221965)
`FixRISCVCallsPass` replaces the AUIPC instruction with a Noop when
converting an AUIPC/JALR pair into a call or tail-call pseudo. Add the
`NOP` annotation so the existing RemoveNops pass can remove it, avoiding
an unnecessary instruction in the output.
Commit: 7caac9be9a7f9ecda3f31802ef451a25f2b61658
https://github.com/llvm/llvm-project/commit/7caac9be9a7f9ecda3f31802ef451a25f2b61658
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Passes/LivenessAnalysis.h
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][RISCV] Implement register analysis hooks (#220581)
This patch implements the RISC-V register-analysis hooks in
`RISCVMCPlusBuilder` that previously fell back to the unimplemented
base-class methods.
The `MCPlusBuilder` unittests fixture is also extended to create a
RISC-V binary context. New tests cover the flags-register result,
zeroing-XOR recognition, ABI register masks, general-purpose register
masks, and non-scavengeable registers. These hooks provide the
target-specific register information required by BOLT analyses and
transformations on RISC-V.
BTW, this is split out as a prerequisite fo LongJump pass implement for
RISCV.
Commit: 6ef30f15d71bab018de258496f83b8dee529ce60
https://github.com/llvm/llvm-project/commit/6ef30f15d71bab018de258496f83b8dee529ce60
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
Log Message:
-----------
[GlobalISel] Use getTypeFromIdx instead of direct table indexing in GIR_AddCImm (#222114)
Commit: 83728c8a9fe27b1427cf0125e5a7896bbb55b6ae
https://github.com/llvm/llvm-project/commit/83728c8a9fe27b1427cf0125e5a7896bbb55b6ae
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/docs/resources/formatterbytecode.md
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/include/lldb/DataFormatters/FormatterBytecode.h
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/source/DataFormatters/TypeSummary.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb] Add APSInt representation to formatter bytecode (#220665)
Adopt a single representation for integers in the formatter bytecode
interpreter. This simplifies code generation, where the (now deprecated)
distinction of `uint64_t` and `int64_t` types could make conditionals
and other operations more complicated, by having to have code paths for
signed and unsigned.
Depends on https://github.com/llvm/llvm-project/pull/218801
Assisted-by: claude
Commit: 1261f5003d93e83295b93782b871be06db2564c4
https://github.com/llvm/llvm-project/commit/1261f5003d93e83295b93782b871be06db2564c4
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
M llvm/test/Transforms/LoopVectorize/X86/funclet.ll
M llvm/test/Transforms/LoopVectorize/vplan-print-before-after.ll
Log Message:
-----------
[VPlan] Split simplifyRecipes into simplifyRecipes and combineRecipes (#221924)
Bringing it in line with InstSimplify and InstCombine, split up
simplifyRecipe into a function that modifies and creates recipes
(combineRecipe), and one that is analysis-only (simplifyRecipe).
This allows us to avoid adding simplficiation only folds to the worklist
in #213899.
The funclet.ll test no longer erases the constant-folded intrinsic call
because vputils::isDeadRecipe returns false.
Commit: bcef85f08355c76d1e7e98604ed68fa1d93c2022
https://github.com/llvm/llvm-project/commit/bcef85f08355c76d1e7e98604ed68fa1d93c2022
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move compress load/store helpers to SLPMemoryUtils (#222038)
Move the following BoUpSLP-independent masked-load/store compress
helpers out of SLPVectorizer.cpp into
SLPVectorizer/SLPMemoryUtils.{h,cpp}:
isMaskedLoadCompress (both overloads)
isMaskedStoreCompress
buildCompressMask, used only by isMaskedLoadCompress, moves alongside
them and stays file-local. isMaskedLoadCompress reads the file-local
SLPReVec cl::opt; the option stays static in SLPVectorizer.cpp and the
moved helper takes its value as an explicit bool parameter. Behavior is
unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI
Commit: 4f45ae199557874671659bf59b2875e06ec2a0ff
https://github.com/llvm/llvm-project/commit/4f45ae199557874671659bf59b2875e06ec2a0ff
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.h
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[SLP][modularisation][NFC] Move reduction match helpers to SLPReductionUtils (#222052)
Move the following BoUpSLP-independent reduction pattern-match helpers
out of SLPVectorizer.cpp into a new
SLPVectorizer/SLPReductionUtils.{h,cpp}:
getNonPhiOperand
isReductionCandidate
matchRdxBop, used only by these two, moves alongside them and stays
file-local. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI
Commit: 90e4efa54ff95f7895522fbe152a8da86bf4e446
https://github.com/llvm/llvm-project/commit/90e4efa54ff95f7895522fbe152a8da86bf4e446
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/unittests/Core/CMakeLists.txt
Log Message:
-----------
[BOLT][NFC] Fix CoreTests linking with shared libraries (#222225)
`CoreTests` directly uses `Triple` and `SubtargetFeatures` constructors
from `LLVMTargetParser` but does not declare the dependency. This causes
undefined-symbol errors with BUILD_SHARED_LIBS=ON.
https://github.com/llvm/llvm-project/pull/220581
Fix https://lab.llvm.org/buildbot/#/builders/218/builds/6464.
Commit: 7c4aac7e60f9f813df5693dcc735bda7873594f7
https://github.com/llvm/llvm-project/commit/7c4aac7e60f9f813df5693dcc735bda7873594f7
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/unittests/API/CMakeLists.txt
Log Message:
-----------
[lldb] Link API unit tests against LLVMTestingSupport. (#222206)
Changes to lldb have added a dependency on llvm::detail::TakeError, this
fails to link on my desktop without the dependency. Most other unittests
already link to LLVMTestingSupport.
Commit: 23074079b992a232aabca0d982ee15d818a5b4a7
https://github.com/llvm/llvm-project/commit/23074079b992a232aabca0d982ee15d818a5b4a7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/Session.h
M orc-rt/test/unit/bedrock/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add Session::attach for pre-mode ControllerAccesses. (#222227)
Allow clients to attach a session using a pre-constructed
ControllerAccess object. This allows clients to use non-trivial
construction methods (e.g. factories) to build ControllerAccess objects.
Commit: 786ba30e072e92648840ddbb5bc3f76e0af35b07
https://github.com/llvm/llvm-project/commit/786ba30e072e92648840ddbb5bc3f76e0af35b07
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[LLVM][AutoUpgrade] Support default args on undeclared multi-call upgrades (#216246)
When an `.ll` file contains multiple calls to an intrinsic without an explicit
declaration, only the first call is upgraded successfully, and the remaining
subsequent calls fail.
`LLParser` builds one temporary Function per call, so after the first
upgrade occupies the canonical name the later functions are uniquified
(eg. `llvm.foo.1`). The intrinsic ID was previously looked up using `F->getName()`,
which requires an exact name match. So, the uniquified names resolved to `not_intrinsic`,
causing the upgrade to return and the default arguments were not applied.
This patch fixes this issue by using the cached `F->getIntrinsicID()`,
which is set when the temporary function is created from the original name.
It also `rename(F)` before inserting the full declaration, so the temporary
function no longer occupies the canonical name.
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 1fddb91bf4ad2c3012c107f0cf792e2b2a5a9b67
https://github.com/llvm/llvm-project/commit/1fddb91bf4ad2c3012c107f0cf792e2b2a5a9b67
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/modfile86.f90
A flang/test/Semantics/modfile87.f90
A flang/test/Semantics/resolve132.f90
Log Message:
-----------
[Flang][Semantics] Diagnose missing MODULE prefix in submodule procedures (#197173)
Add a portability warning when a submodule procedure is missing the
MODULE prefix required by a MODULE PROCEDURE interface in its parent
module.
Commit: b53c11f42061e7e020af1a0e2a54f53b4a2dde3f
https://github.com/llvm/llvm-project/commit/b53c11f42061e7e020af1a0e2a54f53b4a2dde3f
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Support/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix Bazel build (#222232)
Add missing deps and update sharding for ROCDLDialect
Commit: 8d4c923371a73b9f60bee93d91c1cc0c3b49b89e
https://github.com/llvm/llvm-project/commit/8d4c923371a73b9f60bee93d91c1cc0c3b49b89e
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.md
R clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/function-size.md
R clang-tools-extra/docs/clang-tidy/checks/readability/function-size.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.md
R clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.md
R clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.md
R clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.md
R clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.md
R clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.md
R clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [2/5] (#221528)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the second part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: 30e244ed348addbc4611466404dd717d5906a1a7
https://github.com/llvm/llvm-project/commit/30e244ed348addbc4611466404dd717d5906a1a7
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.md
M clang-tools-extra/docs/clang-tidy/checks/readability/function-size.md
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.md
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.md
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.md
M clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.md
M clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.md
M clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.md
M clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.md
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [2/5] (#221529)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the second part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
---------
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Commit: c1872e7fd3307679a2da53f9d83de0ccf234b4ad
https://github.com/llvm/llvm-project/commit/c1872e7fd3307679a2da53f9d83de0ccf234b4ad
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M .mailmap
Log Message:
-----------
[mailmap] Add entry for Zeyi Xu (#222237)
Commit: 5e973ba5721412c7d31349e56172ed9086f4c5e2
https://github.com/llvm/llvm-project/commit/5e973ba5721412c7d31349e56172ed9086f4c5e2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/AST/absurdly_big_struct.cpp
Log Message:
-----------
[clang][test] Make new absurdly_big_struct test more targeted (#219897)
The previous version of `y()` used `c2[i]`, which can't be evaluated at
compile-time.
The emitted diagnostic depends on something calling
`ASTContext::getASTRecordLayout()` for `b`, which currently happens in
the constant evaluator. If the evaluator decides to evaluate `c2[i]`
before calling `getASTRecordLayout()`, the test fails since the
diagnostic is never emitted.
Fix this by simply using `c2[0]` instead.
Commit: 60969adcbc2fca5779580ca93ba00a7b06cc0e40
https://github.com/llvm/llvm-project/commit/60969adcbc2fca5779580ca93ba00a7b06cc0e40
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/FileSystem.h
Log Message:
-----------
[Support][FileSystem] Prefer `status` with `file_t` parameter. NFC. (#157581)
When searching the documentation for LLVM for `llvm::sys::fs::status`,
only the version with file descriptor can be found because the
documentation is built on the UNIX host and the file handle version is
defined out.
In reality, file handle version is more portable and should be displayed
instead. On UNIX, these two functions have the same underlying type,
thus it shouldn't matter which one is declared, and both versions are
still available on Windows for compatibility.
Commit: bf1d0038c9715c93e8d3ec95bf5923d57acd2b39
https://github.com/llvm/llvm-project/commit/bf1d0038c9715c93e8d3ec95bf5923d57acd2b39
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][LLVM] Add clmul intrinsics (#222113)
Assisted-by: gpt-5.6-sol
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: 79f1047ae03783dbcf7506b99d265e5a803fbd3c
https://github.com/llvm/llvm-project/commit/79f1047ae03783dbcf7506b99d265e5a803fbd3c
Author: Wenju He <wenju.he at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-O0-ep-callbacks.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/tools/opt/NewPMDriver.cpp
Log Message:
-----------
[PassBuilder] Add ThinLTO EP callbacks mirroring FullLinkTimeOptimizationEarly/Last (#221857)
Our downstream has a request to add customization pass into
ThinLinkTimeOptimizationEarlyEPCallback, but buildThinLTODefaultPipeline
has no equivalent EPCallback like buildLTODefaultPipeline does. This PR
add it and ThinLinkTimeOptimizationLastEPCallback as well.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: b61bc342396753be2c56dc6abb7d06cfc6be6b25
https://github.com/llvm/llvm-project/commit/b61bc342396753be2c56dc6abb7d06cfc6be6b25
Author: David Green <david.green at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
Log Message:
-----------
[AArch64] Update and regenerate vec-combine-compare-to-bitmask.ll. NFC (#222242)
Commit: b4b7775cfa79d7e3382657037eb037f8c7cb2428
https://github.com/llvm/llvm-project/commit/b4b7775cfa79d7e3382657037eb037f8c7cb2428
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Preserve volatile semantics for atomic operations (#220874)
This commit fixes the preservation of volatile semantics for atomic RMW
operations in CIR CodeGen.
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: e3a60a700dfa488adebd546705424aae7c8b3a35
https://github.com/llvm/llvm-project/commit/e3a60a700dfa488adebd546705424aae7c8b3a35
Author: Vishank Singh <vishanksinghh at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__ranges/lazy_split_view.h
A libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.compile.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.default.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.iter.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer/deref.pass.cpp
Log Message:
-----------
[libc++][ranges] Implement LWG4013: Make `lazy_split_view::outer-iterator::value_type` non-default-constructible (#221919)
Remove the default constructor of `outer-iterator::value_type` and make
the remaining constructor private (exposition-only), as required by LWG
4013.
Update the corresponding tests:
- `ctor.default.pass.cpp` and `ctor.iter.pass.cpp` are now deleted.
- `ctor.compile.pass.cpp` is added to verify `value_type` is not
default-constructible and its construction from iterator is not
available.
- Cases testing construction of `value_type` via `operator*` are moved
to `range.lazy.split.outer/deref.pass.cpp`.
Closes #105321
Commit: 580484b5032d55cf6adac0fe1274a4ee8eaa0c2a
https://github.com/llvm/llvm-project/commit/580484b5032d55cf6adac0fe1274a4ee8eaa0c2a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Remove unused getBaseArchNameAMDGCN (#222157)
This ended up unused for gfx1250-strict
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 1e744320ff27ee748c1a2a121fe226984efddc1b
https://github.com/llvm/llvm-project/commit/1e744320ff27ee748c1a2a121fe226984efddc1b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
Log Message:
-----------
GlobalISel: Drop AllowFPOpFusion from CombinerHelper FMA formation (#221918)
Only rely on the contract flags.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 27e964eceb2f15fb99618e73bd92f02f4a938816
https://github.com/llvm/llvm-project/commit/27e964eceb2f15fb99618e73bd92f02f4a938816
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolNameSpec.h
Log Message:
-----------
[ORC] Require symbol name kind in SymbolNameSpec constructor. (#222238)
Require clients to spell out the naming level that SymbolNameSpecs are
expressed in. (An implicit default is a footgun, and adds limited
convenience)
Commit: 7bb9b13816ef9616425525651ea629f2138b194f
https://github.com/llvm/llvm-project/commit/7bb9b13816ef9616425525651ea629f2138b194f
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.mir
M llvm/test/MC/AMDGPU/gfx12_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
Log Message:
-----------
[AMDGPU] Rework pseudo-scalar transcendental inline constant restriction handling (#208459)
The f16 pseudo-scalar transcendental instructions do not support inline
constants on gfx12. The existing handling of this restriction is
incomplete. It involves checking the
hasNoF16PseudoScalarTransInlineConstants function in the right places.
For the SIInstrInfo::isInlineConstant function, for instance, this has
led to a situation where some overloads respect the restriction and
others do not. This approach also relies on completely disabling the
folding of constant operands. The machine code emission does still use
the inline constant encoding if it encounters a suitable operand.
Introduce a new "noinline" operand type and use it for the instruction
variant that is used on gfx12. This does also enable the use of literal
constants.
Commit: f4b84aa292909aa0e737cc0cdfa9eda7ef4bd4f2
https://github.com/llvm/llvm-project/commit/f4b84aa292909aa0e737cc0cdfa9eda7ef4bd4f2
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
A llvm/test/Transforms/LoopVectorize/RISCV/scatter-type-mismatch.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-flags.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-intrinsic.ll
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Consolidate VPIWithType and VPI (NFC) (#203019)
The extra ResultType has been absorbed into VPInstruction, and the
recipe classes can now be consolidated. The patch also fixes missing
flags-printing in the case of WideIVStep, and includes a test to guard
against bad changes, discovered during the review process.
Commit: 962a202be1f642f119921413293e8325e2e06757
https://github.com/llvm/llvm-project/commit/962a202be1f642f119921413293e8325e2e06757
Author: Machillka <machillka2007 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
Log Message:
-----------
[clangd] Place deduced return type hints after noexcept (#219829)
Deduced return type hints for functions and lambdas could appear before
a `noexcept` specifier, even though a trailing return type belongs after
the exception specification.
Use the end of the function type's local source range when it is
available. For lambdas without a function type location, keep the end of
the lambda introducer as a fallback.
Fixes clangd/clangd#2696
Assisted-by: Codex
Commit: a1f878adc64fee90fca87382a01013eca7e19b2b
https://github.com/llvm/llvm-project/commit/a1f878adc64fee90fca87382a01013eca7e19b2b
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/pr222002.cppm
Log Message:
-----------
[C++20] [Modules] Keep DeductionGuideDecl in the general lookup table (#222246)
Close https://github.com/llvm/llvm-project/issues/222002
The root cause of the problem is, the deduction guide was not in the
general lookup table. The fix is to move them into the general lookup
table. This should be fine as the DeductionGuide may not pollute the
name lookup results.
Commit: 6dc6c67b786260486641eb62546c34b48143e131
https://github.com/llvm/llvm-project/commit/6dc6c67b786260486641eb62546c34b48143e131
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/CMakeLists.txt
M libcxxabi/CMakeLists.txt
A runtimes/cmake/Modules/GetSanitizerFlags.cmake
Log Message:
-----------
[libcxx][libcxxabi][cmake] Deduplicate sanitizer flags function (#221757)
While experimenting with flang-rt builds I realised there were two
copies of this function.
We don't need it in flang-rt right now but I figure reducing duplication
is good anyway.
Commit: 3a8bd232cfa8c08a6c7e88801696af65ed1562ea
https://github.com/llvm/llvm-project/commit/3a8bd232cfa8c08a6c7e88801696af65ed1562ea
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/test/tools/llvm-offload-wrapper/offload-wrapper.ll
Log Message:
-----------
[OffloadWrapper] Use getPtrAdd() instead of getGetElementPtr() (#222014)
One case has a redundant zero-offset GEP. The other two just add
a byte offset in a convoluted way.
Commit: 1c1ea3793471775c5dc1bb2a4757a5ea32097967
https://github.com/llvm/llvm-project/commit/1c1ea3793471775c5dc1bb2a4757a5ea32097967
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/MustExecute.h
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[LoopSafetyInfo] Compute block colors lazily (NFC) (#221954)
Computing the block colors is fairly expensive, but only rarely actually
needed. We can delay computation to first use.
Fixes https://github.com/llvm/llvm-project/issues/221162.
Commit: 590a3b87dba125069e962956d562802a8173dc38
https://github.com/llvm/llvm-project/commit/590a3b87dba125069e962956d562802a8173dc38
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/HoistAllocas.cpp
M clang/test/CIR/Transforms/hoist-allocas.cir
Log Message:
-----------
[CIR] Reposition entry-block allocas ahead of control flow (#220496)
HoistAllocas returns early when an alloca was already in the entry
block, but being in the block is not the same as being ahead of the
control flow in it. The pass runs before FlattenCFG, which splits the
body at each structured control-flow op, so an alloca sitting after one
is left in a block that is no longer the entry block.
That matters because SROA only collects allocas from the entry block. An
alloca stranded behind a scope is invisible to it and never promoted, so
anything whose address it holds stays in memory.
Commit: ddf2077559587500f47e3666c696b7366bb36af0
https://github.com/llvm/llvm-project/commit/ddf2077559587500f47e3666c696b7366bb36af0
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/FinalizeISel.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
Log Message:
-----------
[GlobalISel] Fix duplicate finalizeLowering calls (NFC) (#221902)
Improves CTMark geomean -0.07% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=d8b1a78ba013d5e687acc0e8bf00d3d77749f3db&stat=instructions:u
Assisted-by: codex
Commit: cdd1900816f625eb1f38a6e755c49ccadec56209
https://github.com/llvm/llvm-project/commit/cdd1900816f625eb1f38a6e755c49ccadec56209
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/test/Analysis/BasicAA/call-attrs.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.ll
M llvm/test/CodeGen/ARM/returned-ext.ll
M llvm/test/CodeGen/ARM/struct-byval-loop.ll
M llvm/test/CodeGen/M68k/multiple-return.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/RISCV/rvv/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SystemZ/args-14.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/VE/Scalar/call.ll
M llvm/test/CodeGen/VE/Scalar/va_callee.ll
M llvm/test/CodeGen/VE/Vector/fastcc_caller.ll
M llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
M llvm/test/CodeGen/X86/bool-zext.ll
M llvm/test/CodeGen/X86/return-ext.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll
M llvm/test/Transforms/DeadArgElim/deadexternal.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/PhaseOrdering/pr64289-tce.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
M llvm/test/Transforms/SimplifyCFG/hoist-sink-swifterror-store.ll
M llvm/unittests/IR/AttributesTest.cpp
Log Message:
-----------
[IR] Do not inherit ABI attributes from the callee (#207173)
Usually attributes that are missing on the call-site are inherited form
the callee instead. This is fine for optional optimization attributes,
but problematic for ABI-affecting attributes.
ABI attributes generally must be placed at the call-site as well,
because there is no callee to inherit from for indirect calls. Failing
to specify ABI attributes at the call-site generally indicates a bug.
The motivation for being stricter about this (apart from just being the
right thing to do) is to properly support cases where the attributes at
the call-site and the callee actually differ. Two examples I'm aware of
are:
* During cross-language LTO, it's possible to have one side use a `ptr`
argument and the other a `ptr byval(ptr)` argument. Both represent the
same ABI using different IR encodings, but you can't just inherit the
`byval` attribute from one to the other (because the byval case requires
an additional level of indirection in use of the argument).
* To fix our incompatibility with the x86-64 psABI, I believe we'll want
to do something like emit zeroext/signext at function returns and
call-site arguments only, so that we both don't assume incoming values
are zero/sign-extended, but still zero/sign-extend outgoing values. This
makes sure we still remain compatible with old Clang-generated object
files.
We've attempted to make a change like this previously, but ran into
substantial issues with missing call-site attributes on
compiler-inserted calls. The issue was particularly severe on s390x,
which requires zeroext/signext on more values than other architectures.
I believe that the situation here has improved a lot in the meantime,
with libcalls now inferring mandatory ABI attributes, and s390x also
using a noext attribute plus validation logic in the backend to detect
cases where the necessary attributes are missing.
-----
ABI attributes on call-sites must be queried using `hasABIParamAttr()`
and `hasABIRetAttr()` instead of `paramHasAttr()` and `hasRetAttr()`
now. Passing an ABI attribute to the latter two will result in an
assertion failure.
Commit: 8c3cb9c166e8f5ade26bc90a4a4cf5ec628f894f
https://github.com/llvm/llvm-project/commit/8c3cb9c166e8f5ade26bc90a4a4cf5ec628f894f
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-epilog-phi.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-gen-structure.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-loop-carried-mem.mir
Log Message:
-----------
[CodeGen][NPM] Port MachinePipeliner to NPM (#221676)
changes of note,
1. registers the pass with AMDGPUCodeGenPassBuilder::addPreRegAlloc()
2. Changes the core MachinePipeliner::run() method to return actual
"Changed" state
Commit: d0a59913f8cfc3041c9d284e36858aedbf8dfa0e
https://github.com/llvm/llvm-project/commit/d0a59913f8cfc3041c9d284e36858aedbf8dfa0e
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[IR] Remove obsolete visited sets from type queries (NFC) (#221743)
Recursive types have been rejected since 2024 (#114799), making the
visited sets in type queries unnecessary.
Improves CTMark geomean -0.08% on aarch64-O0-g. Also improves
compile-time slightly for several other targets.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=45c1423e7e38b6950ae760fc159ecb69cafdd691&stat=instructions%3Au
Assisted-by: codex
Commit: 531a8ac4c959dbdabcb4fea4a31beecde36bcdd9
https://github.com/llvm/llvm-project/commit/531a8ac4c959dbdabcb4fea4a31beecde36bcdd9
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-call-before-alloca.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-external-call.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at-recursive.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-block.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-if-phi.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-shared.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-no-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-same-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-shared.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope.ll
Log Message:
-----------
Add support for NSDI DebugScope, DebugNoScope and DebugInlinedAt (#218959)
Add support for NSDI
[DebugScope](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugScope),
[DebugNoScope](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugNoScope)
and
[DebugInlinedAt](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugInlinedAt).
DebugScope/DebugNoScope are region delimiters following the same region
rule as DebugLine/DebugNoLine. The two regions are tracked separately
because a DebugScope region could span several DebugLine regions, and
either can skip emission on a cache miss at different times.
DebugInlinedAt is not an region instruction, so it is emitted at module
scope. We allow recursive traversal when building them to support
chains.
The PR also adds a test showing a limitation in the DebugLine
deduplication that is at the DILocation pointer level which may lead to
duplicate opcodes.
Commit: c4cd7b73e27839103badad11e4eff9baf3d53d84
https://github.com/llvm/llvm-project/commit/c4cd7b73e27839103badad11e4eff9baf3d53d84
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M llvm/include/llvm/ADT/DenseMap.h
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/unittests/ADT/DenseMapTest.cpp
M llvm/utils/lldbDataFormatters.py
M third-party/unittest/googletest/include/gtest/internal/custom/gtest-printers.h
Log Message:
-----------
[ADT] Give DenseMapPair its own members instead of a std::pair base. NFC (#221853)
std::pair declares a copy assignment operator, so it is not trivially
copyable. destroyAll and copyFrom therefore ask about KeyT and ValueT
separately. Hold first and second directly.
Conversion to std::pair is explicit; insert also takes a bucket, and a
converting constructor keeps range insert working across pair types.
Co-authored-by: Kazu Hirata <kazu at google.com>
Commit: 5bf967cb132bf6700474813f961f657af6ef83ea
https://github.com/llvm/llvm-project/commit/5bf967cb132bf6700474813f961f657af6ef83ea
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M lld/test/ELF/lto/amdgcn-oses.ll
M lld/test/ELF/lto/amdgcn.ll
M lld/test/ELF/lto/amdgpu.ll
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
A llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
A llvm/test/CodeGen/AMDGPU/barrier-addrspace-dereference.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
A llvm/test/CodeGen/AMDGPU/null-named-barrier-gv.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-bad-absolute-symbol.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-wrong-gv-signature.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barriers-gfx12.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[RFC][AMDGPU] Add BARRIER address space (#209746)
Add a new BARRIER address space that is used for global variables that
are used to represent the barrier IDs in GFX12.5.
These barrier addresses just have values corresponding 1-1 to barrier
IDs. They are still implemented on top of LDS, but the offsetting
happens during an addrspacecast to generic, not whenever the barrier GV
is used.
The motivation for this is to make the relation between LDS and barrier
GVs explicit in the compiler. It does add a bit more complexity, but
that complexity was already there, just hidden by pretending barrier GVs
were actual LDS.
Commit: 59c5d5efb7343424d243e4a3972f7b24a07b115d
https://github.com/llvm/llvm-project/commit/59c5d5efb7343424d243e4a3972f7b24a07b115d
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/test/CodeGen/X86/branch-on-zero.ll
Log Message:
-----------
[X86] Enable preferZeroCompareBranch() (#219919)
This makes CodeGenPrepare reorganize code such as:
```
%c = icmp eq i32 %x, 10
br %c, then, else
%a = add i32 %x, -10
```
into
```
%a = add i32 %x, -10
%cmp = icmp eq %a, 0
%br %cmp, then, else
```
so that the zero-compare and branch gets lowered to a JCC based on the
flags from the arithmetic instruction.
This was already enabled for ARM, SystemZ and RISC-V, but seems a good
fit for X86 too, as mentioned in Issue #58636.
Commit: cdab5d7b28a38112cf91784ea7d404d2d4c6a68e
https://github.com/llvm/llvm-project/commit/cdab5d7b28a38112cf91784ea7d404d2d4c6a68e
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
Log Message:
-----------
[AMDGPU] Add synthetic apertures and use them for barriers (#209748)
Define what a synthetic aperture is, and adjust the barrier AS
to use this new system. This makes the barrier AS even safer to
use as now we can use all 32 bits of it without ever risking
hitting a valid address of any kind (LDS or outside LDS).
Commit: 1770693262b32d2216d7224fd412d78ab07e1bfa
https://github.com/llvm/llvm-project/commit/1770693262b32d2216d7224fd412d78ab07e1bfa
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Add scalar-type-infer assert for casts (NFC) (#222258)
Casts require the ResultTy to be passed: add an assert to
computeScalarTypeForInstruction to guard against incorrect usage.
Commit: 39ffb93f2cc8b24d0b8a588dc042a4d931273ada
https://github.com/llvm/llvm-project/commit/39ffb93f2cc8b24d0b8a588dc042a4d931273ada
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom fp-contract-model attributes from tests (#221925)
This attribute has never been consumed by upstream llvm,
or emitted by upstream clang. I can only guess this existed in
at least one downstream fork.
Commit: f796b25647e378a02482ef383f2db45804d8fb72
https://github.com/llvm/llvm-project/commit/f796b25647e378a02482ef383f2db45804d8fb72
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
A llvm/test/CodeGen/Mips/jalr-no-mangle.ll
Log Message:
-----------
[Mips] Strip \x01 no-mangle prefix from R_MIPS_JALR symbol name (#219427)
R_MIPS_JALR relocation did not strip the \x01 no-mangle prefix, causing
linker to see two different symbols: my_target_sym and
\x01my_target_sym.
Use Mangler::getNameWithPrefix() to process the symbol name.
Fix #207470.
Commit: 68a77b6106d375eabb8a7ec2585a0f3e0382c4a2
https://github.com/llvm/llvm-project/commit/68a77b6106d375eabb8a7ec2585a0f3e0382c4a2
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave32.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave64.hip
Log Message:
-----------
[CIR][AMDGPU] Implement inverse_ballot and read_exec codegen (#221661)
This commit implements the CIR codegen for the following AMDGPU
builtins:
- __builtin_amdgcn_inverse_ballot_w32
- __builtin_amdgcn_inverse_ballot_w64
- __builtin_amdgcn_read_exec
- __builtin_amdgcn_read_exec_lo
- __builtin_amdgcn_read_exec_hi
inverse_ballot_w32/w64 map to llvm.amdgcn.inverse.ballot. read_exec,
read_exec_lo and read_exec_hi read the exec mask as a ballot over an
all-true predicate, at least as wide as the wavefront.
Commit: 411a8eea0c269fff79700da1b3a9e71914718d4b
https://github.com/llvm/llvm-project/commit/411a8eea0c269fff79700da1b3a9e71914718d4b
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M openmp/runtime/src/i18n/en_US.txt
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_traits.cpp
M openmp/runtime/src/kmp_traits.h
M openmp/runtime/unittests/Traits/TestOMPTraitParser.cpp
Log Message:
-----------
[libomp] Parse OMP_DEFAULT_DEVICE with new device trait parser (#176166)
... but do not yet expose the new functionalities to the user. This is a
backward compatible update that is going to be followed by the step to
the OpenMP 6.0 semantics as defined in 4.3.8.
Commit: 9a14832f08551e15620440391910bc6919904775
https://github.com/llvm/llvm-project/commit/9a14832f08551e15620440391910bc6919904775
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Check a wide copy dst reg against the dst operand's regclass (#221789)
The wide-copy check added in #214561 tested the destination against the
source operand's class. No test change: V_MOV_B64's source class VS_64
also accepts a VGPR destination, which is why it currently works. Adding
@robertvirany.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: cd2f66534d425b3db62fea6df9703ffb87c6c3c5
https://github.com/llvm/llvm-project/commit/cd2f66534d425b3db62fea6df9703ffb87c6c3c5
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GISelWorkList.h
Log Message:
-----------
[GlobalISel] Lazily reserve worklist maps (NFC) (#221900)
Small -0.03% geomean improvement on CTMark aarch64-O0-g, but consistent
little improvements across the board.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=1729db67721b79fcb72469111d543e6df28c1185&stat=instructions:u
Assisted-by: codex
Commit: d6a334df0889026e0d91d3fc5adf452e0bbf0682
https://github.com/llvm/llvm-project/commit/d6a334df0889026e0d91d3fc5adf452e0bbf0682
Author: Petr Kurapov <petr.kurapov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/buffer-op-lds-operand.s
A llvm/test/tools/llvm-mca/AMDGPU/buffer-op-lds-operand.s
Log Message:
-----------
[AMDGPU][AsmParser]: Use dummy operand for parsing buffer LDS isAsync… (#219459)
… operand.
After the introduction of .async for LDS buffer ops variants, there a
similar mca crash addressed in
https://github.com/llvm/llvm-project/pull/165305. This parses a dummy
operand as a placeholder.
Commit: 4b8b168e8b6897fe3816949a316002ee8aff2e98
https://github.com/llvm/llvm-project/commit/4b8b168e8b6897fe3816949a316002ee8aff2e98
Author: Andreas Leitner <leitner.andi at googlemail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/read-register-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/read-write-register-src-flat-scratch-base-invalid-subtarget.ll
A llvm/test/CodeGen/AMDGPU/type-mismatch-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/write-register-src-flat-scratch-base.ll
Log Message:
-----------
[AMDGPU] Add getRegisterByName support for src_flat_scratch_base (#220560)
Expose `src_flat_scratch_base`, `src_flat_scratch_base_lo`, and
`src_flat_scratch_base_hi` through `llvm.read_register` /
`llvm.write_register`.
The implementation is basically the same as the existing named-register
support for `flat_scratch`
It errors out on targets without `FeatureGloballyAddressableScratch`
(pre-gfx1250).
Commit: 0c62d834abff9b180def1b32d3cf9c225d504994
https://github.com/llvm/llvm-project/commit/0c62d834abff9b180def1b32d3cf9c225d504994
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Record estimated branch probabilities on VPlan0 for cost modeling (#216172)
Update execution frequency/probability tracking in VPlan to also include
estimates from BFI, and use the information in VPlan for VPlan-based
cost computations, removing another remaining IR-based lookup.
We need to differentiate between estimated and concrete profile
information when annotating branches with information from BFI (using
custom !vplan.prof.estimated metadata instead of !prof) and track if a
computed frequency contains any estimates using an extra bool which is
also encoded in the metadata (so we do not synthesize !prof
for such frequencies during codegen).
The new code should only request BFI if needed, and compile-time impact
should be in the noise:
https://llvm-compile-time-tracker.com/compare.php?from=8436dd4a2bfe57d0b3fb6c9c11c69d75c1d1bccb&to=4d60694fed5e5765d4f5a2a72aac7b8674e512e2&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/216172
Commit: 17b659b8444a957ea2b42cb4e91d65897fee7558
https://github.com/llvm/llvm-project/commit/17b659b8444a957ea2b42cb4e91d65897fee7558
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] [unittests] Cover what the memory cache reads from the inferior (#221015)
`MemoryCache`'s tests checked how many bytes a read returned, never
which requests the cache made to get them, so a change to the request
shape could not fail a test. Add four tests over the request log
`DummyProcess` now keeps.
Two assert what the cache sends: `TestReadRequestShape` checks the
address and size of every request, and `TestReadRangesFromCaches` checks
that a range the cache already holds is served without reaching the
inferior.
`TestFlushAtTheTopOfTheAddressSpace` pins `Flush`'s current behavior at
the wrap, not correct behavior. When a flushed range wraps past
`UINT64_MAX`, `Flush` counts cache lines only from the start of the
range to the top of the address space, never the lines the wrapped
portion covers between address 0 and the range's end. This bug predates
this change; the following cache-partition change fixes it, and this
test's assertion that address 0 survives the flush will need to flip
once
that lands.
`TesetMemoryCacheRead` gains one assertion, that a line whose reply
falls short leaves the error alone, next to the two requests it already
checks.
Also add a `CacheTestProcess` helper and use it in the seven cache
tests, so each states its setup in two lines rather than thirteen, and
expose the L2 map next to L1 for assertions.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 7f0421be7f82a64796fa002b85bedbd6eaacc57f
https://github.com/llvm/llvm-project/commit/7f0421be7f82a64796fa002b85bedbd6eaacc57f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
Log Message:
-----------
[AMDGPU] Remove unsound idempotent atomicrmw to atomic load lowering (#218377)
An idempotent atomicrmw still holds a slot in the modification order, so
folding it to a plain load can drop synchronization the memory model
requires
Commit: 8e84c4a901a7fe6ba80b3c305b200c3e9bbc4606
https://github.com/llvm/llvm-project/commit/8e84c4a901a7fe6ba80b3c305b200c3e9bbc4606
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom ssp-buffers-size attributes from tests (#221928)
"ssp-buffers-size" was never a real function attribute. There is
"stack-protector-buffer-size". This may have existed in a downstream
fork, but it's also irrelevant for these tests.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 4af454042b636fc6f7b1b99e178247989863b8e5
https://github.com/llvm/llvm-project/commit/4af454042b636fc6f7b1b99e178247989863b8e5
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/docs/Remarks.md
M mlir/include/mlir/IR/Remarks.h
M mlir/lib/IR/Remarks.cpp
M mlir/unittests/IR/RemarkTest.cpp
Log Message:
-----------
[MLIR][Remark] Expose RemarkEngine filter queries (#222262)
Expose following filter APIs publicly:
```
| Query | Answers |
|----------------------------------------------|------------------------------------------------------|
| `isAnyRemarkEnabled()` | At least one category filter is active |
| `isAnyRemarkEnabled(category)` | Some kind of remark is enabled for the category |
| `isRemarkEnabled(kind, category)` | Remarks of `kind` are enabled for the category |
| `is{Passed,Missed,Analysis,Failed}OptRemarkEnabled(category)` | Per-kind query |
```
Assisted by Claude Fable 5.1
Commit: 468a7300de067ec0581f51cbfb56421f4b13eaf0
https://github.com/llvm/llvm-project/commit/468a7300de067ec0581f51cbfb56421f4b13eaf0
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Host/common/NativeProcessProtocol.cpp
Log Message:
-----------
[lldb][lldb-server] Log possible breakpoint PC in hex (#222285)
Commit: e87fb92a9719c1f1f0112e108f9444bb5b99ac49
https://github.com/llvm/llvm-project/commit/e87fb92a9719c1f1f0112e108f9444bb5b99ac49
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
Log Message:
-----------
[NFC][LLVM][AArch64] Add test coverage for scalar bfloat constrained intrinsics. (#222076)
Tests are a clone of fp-intrinsics-fp16.ll with s/half/bfloat/ applied
and failing tests (fcmp and i128 variants) removed.
Commit: 4e7628708d6d09c4051fd1fa54cb6b517db326fe
https://github.com/llvm/llvm-project/commit/4e7628708d6d09c4051fd1fa54cb6b517db326fe
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Restrict value offset tracking to aggregates (NFC) (#221287)
The single-vreg fast path added in d30d5fe8dd5d3 still populated an
offset list, even though offsets are only necessary for aggregate
values.
This wasn't the only place doing so. Avoid creating or updating offset
lists for non-aggregate values and add an assertion to enforce this
invariant.
Small -0.04% geomean improvement on CTMark aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=2aeb9d236a2cacf8ab93722b8b629243384bae68&stat=instructions:u
Assisted-by: codex
Commit: cc38b29781cbc0a2b525a18833adf61c51375af2
https://github.com/llvm/llvm-project/commit/cc38b29781cbc0a2b525a18833adf61c51375af2
Author: Tianyi Chen <diannaaav at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/Misc/cc1as-darwin-target-variant-sdk-version.s
M clang/test/Misc/cc1as-darwin-target-variant-triple.s
M llvm/test/MC/MachO/diff-with-two-sections.s
M llvm/test/MC/MachO/weakdef.s
M llvm/test/MC/MachO/zero-space.s
A llvm/test/tools/llvm-readobj/MachO/cpu-capabilities.yaml
M llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
M llvm/test/tools/llvm-readobj/MachO/file-headers.test
M llvm/tools/llvm-readobj/MachODumper.cpp
Log Message:
-----------
[llvm-readobj] Display Mach-O CPU capability bits (#221617)
The Mach-O file header output masks the capability bits out of
`cpusubtype`
without printing them separately, so this information is missing from
the
output.
Add a `CpuCapabilities` field to print the high byte in hexadecimal,
matching the numeric representation used by `llvm-objdump`.
Fixes #80198.
Assisted-by: OpenAI Codex (implementation, tests, and initial
description).
Commit: 6a20cac62912114cbc9208b565cf88fd73f21377
https://github.com/llvm/llvm-project/commit/6a20cac62912114cbc9208b565cf88fd73f21377
Author: Tianyi Chen <diannaaav at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-objdump.md
M llvm/tools/llvm-objdump/ObjdumpOpts.td
Log Message:
-----------
[llvm-objdump] Document selecting symbols containing commas (#221619)
The documentation does not clearly distinguish how
`--disassemble-symbols=`
and `--disassemble=<symbol>` handle their arguments, making it easy to
overlook how to select symbols whose names contain commas.
Update the command guide and help text to explain that the former
accepts
a comma-separated list of symbols, while the latter accepts a single
symbol
name and may be specified multiple times.
Assisted-by: OpenAI Codex
Commit: 95dfce1739bf2719f89a9f6673eb5b23f2d32b09
https://github.com/llvm/llvm-project/commit/95dfce1739bf2719f89a9f6673eb5b23f2d32b09
Author: David Green <david.green at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-neon-instructions.s
Log Message:
-----------
[AArch64] Add Neoverse V3 scheduling info for v264 frecpe (#221917)
This was missing, falling back to the default information. It should be
like the others.
This is the Neoverse V3 equivalent of #219115
Commit: 3d2f88da6e15645080d852d52c32435b62aca97b
https://github.com/llvm/llvm-project/commit/3d2f88da6e15645080d852d52c32435b62aca97b
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-masked-op-fusion.ll
Log Message:
-----------
[X86] Fix commuteSelect miscompile with double-used condition value (#219436)
The multi-use loop iterated `Cond->users()` which yields duplicates when
a select uses the condition in multiple operand positions. This caused a
double-commute and iterator corruption, leaving other selects with an
inverted condition but unswapped operands.
Remove the in-place mutation loop and return a new select node. The DAG
combiner visits each select independently and `getSetCC` CSEs the
inverted condition so all commuted selects share it.
Commit: 4200a8e34e488aaf9c1b5b1966aa4c1bbec8b4d5
https://github.com/llvm/llvm-project/commit/4200a8e34e488aaf9c1b5b1966aa4c1bbec8b4d5
Author: Oscar Priego <oscar.priegov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
M llvm/test/CodeGen/X86/compress-evex-vpmov-blendv.mir
M llvm/test/CodeGen/X86/compress-evex-vpmov-kill.mir
Log Message:
-----------
[X86] Compress masked VPBLENDM using VBLENDV (#221838)
Fixes #221678.
This extends the X86 EVEX compression pass to recognize compatible
`VPMOVD2M/VPMOVQ2M + VPBLENDMD/VPBLENDMQ` patterns and replace them with
the corresponding VEX `VBLENDVPS/VBLENDVPD` instruction when the mask
width and element granularity match.
For example, the reported AVX-512 sequence:
```asm
vpslld $31, %xmm0, %xmm0
vpmovd2m %xmm0, %k1
vpblendmd %xmm1, %xmm2, %xmm0 {%k1}
```
is reduced to:
```asm
vpslld $31, %xmm0, %xmm0
vblendvps %xmm0, %xmm1, %xmm2, %xmm0
```
The fold is restricted to compatible producer/consumer pairs.
Mixed-width or mixed-element-granularity cases such as
`VPMOVD2MZ128 + VPBLENDMQZ256` are intentionally left unchanged.
The MIR coverage includes:
- 128-bit and 256-bit dword/qword positive cases.
- An incompatible-width negative case.
- Kill/liveness preservation for the reused vector mask.
The existing `avx512-regcall-NoMask.ll` codegen checks are also updated
to reflect the optimized `VBLENDVPS` sequence produced by this fold.
Local validation includes:
- `compress-evex-vpmov-blendv.mir`
- `compress-evex-vpmov-kill.mir`
- `avx512-regcall-NoMask.ll`
- `compress-evex-sign-mask.mir`
- `evex-to-vex-compress.mir`
- `bitcast-sign-mask.ll`
AI-assisted tools were used during investigation and development.
The resulting changes were reviewed, modified, validated, and tested by
me.
Signed-off-by: Oscar Priego Verdugo <oscar.priegov at gmail.com>
Commit: 79230407a26e8d7de47e4c8e7b7f7b0d63bee00c
https://github.com/llvm/llvm-project/commit/79230407a26e8d7de47e4c8e7b7f7b0d63bee00c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[clang][AST][NFC] Make ASTContext::isPFPField() static (#220265)
Commit: 09520670fec80a117bb34307ef684cf8bafbe71b
https://github.com/llvm/llvm-project/commit/09520670fec80a117bb34307ef684cf8bafbe71b
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/test/API/commands/frame/recognizer/step-through/TestFrameRecognizerStepThrough.py
Log Message:
-----------
[lldb] Match frame recognizers by function when the frame has no symbol (#222060)
A frame can have a function without having a symbol: a PE/COFF image
built with DWARF carries no symbol table at all, so `symctx.symbol` is
null on Windows while `symctx.function` resolves fine from the debug
info. `GetRecognizerForFrame` bailed out on `!symbol`, so no frame
recognizer ever matched there.
Fall back to the function's start address when there is no symbol. The
symbol still wins when both are present, so this is a no-op on
ELF/Mach-O.
This fixes `TestFrameRecognizerStepThrough.py`.
Commit: 48ae4d3b158042b4ad77a6b23aa412aedac7105a
https://github.com/llvm/llvm-project/commit/48ae4d3b158042b4ad77a6b23aa412aedac7105a
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__optional/optional_ref.h
M libcxx/test/std/utilities/optional/optional.monadic/transform.pass.cpp
Log Message:
-----------
[libc++] Fix `optional<T>::transform` into `optional<T&>` (#221506)
Resolves #220332
- Make `optional<T>` a friend of `optional<T&>`, and add tests.
Commit: 6b728014512aefa838e3b1674355589c901cdde2
https://github.com/llvm/llvm-project/commit/6b728014512aefa838e3b1674355589c901cdde2
Author: Alexander Wilson <rdtscp at meta.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.h
A bolt/test/RISCV/call-relocation-pair.s
A bolt/test/RISCV/unsymbolized-call-edge.s
A bolt/test/RISCV/unsymbolized-call-entry.s
A bolt/test/RISCV/unsymbolized-call.s
A bolt/test/RISCV/unsymbolized-long-jump.s
Log Message:
-----------
[BOLT][RISCV] Fix AUIPC/JALR call rewriting (#216882)
This builds on the RISC-V decoder support from #217550 and the BOLT
target symbolizer and GOT relocation handling from #217944, both of
which are now merged.
`R_RISCV_CALL` and `R_RISCV_CALL_PLT` cover an AUIPC/JALR pair, but BOLT
treated them as four-byte relocations and decoded only the AUIPC
immediate. Read both instructions and combine their signed high and low
immediates so relocated call targets retain the low 12 bits.
LTO can also leave linker-resolved intra-section AUIPC/JALR calls
without relocations. On RV64, recognize standard call and tail-call
pairs during disassembly, reconstruct the target (including JALR
target-bit clearing), and attach an exact entry-point symbol before
function reordering. Alternate link-register preservation is provided by
the merged #218408.
This follows the RISC-V Unprivileged ISA sections on AUIPC and JALR:
https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html
It also follows the RISC-V ELF psABI procedure-call relocations:
https://riscv-non-isa.github.io/riscv-elf-psabi-doc/#_relocations
Tests cover relocation-backed calls, relocation-free RV64 calls and tail
calls, exact function entry points, signed offsets, JALR target-bit
clearing, and rejection of near matches.
Validation:
- Rebuilt `llvm-bolt`, `llvm-mc`, `llvm-objdump`, `llvm-readelf`, and
`lld`.
- All 658 tests in `bolt/test/RISCV` and `llvm/test/MC/RISCV` pass on
current `main`.
**Scope:** Relocation-free recovery is intentionally RV64-only. RV32
XLEN-wrapped target arithmetic remains out of scope. Symbolizer
infrastructure and GOT correctness are provided by #217944 rather than
this PR.
Assisted-by: Codex
Commit: accf16eec44ec81449fe8cbf0ddd53c1ff567247
https://github.com/llvm/llvm-project/commit/accf16eec44ec81449fe8cbf0ddd53c1ff567247
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/Lex/Lexer.h
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
A clang/test/Parser/cuda-operator-lesslessless.cu
Log Message:
-----------
[clang][CUDA/HIP] Fix parsing of `operator<<<...>` (#218384)
In CUDA mode Lexer merges `<<<` into a single token and Parser fails to
recognize that it is actually a template specialization of `operator<<`
and not a CUDA kernel call expression. Split `<<<` following operator
token to `<<` and `<`.
Commit: be7f0c897238a2d4ae742d1b6db50283069bdeef
https://github.com/llvm/llvm-project/commit/be7f0c897238a2d4ae742d1b6db50283069bdeef
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom relocation-model attributes from tests (#221931)
"relocation-model" was never a real function attribute.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: a86b58566a2581160938db41fa258ff84457b80c
https://github.com/llvm/llvm-project/commit/a86b58566a2581160938db41fa258ff84457b80c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lld/test/ELF/amdgpu-tid.s
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/AMDGPU/xnack-mask.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-cov5.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx90a.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx950.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
Log Message:
-----------
AMDGPU: Remove xnack and sramecc subtarget features (#212792)
Now that these are controlled by module flags, the subtarget
features were just used for assembler and disassembler controls.
Now that the assembler and disassembler can infer these from
the e_flags and target directives, they are no longer necessary.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: ebeb871f9a5fd31f088b7fb952c99cc4da17eeb1
https://github.com/llvm/llvm-project/commit/ebeb871f9a5fd31f088b7fb952c99cc4da17eeb1
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
Log Message:
-----------
[MLIR][XeGPU] Restrict XeGPUPropagateLayout analysis scope (#221793)
This PR prevents concurrent access to traversal and mutation of the
shared IR by restricting the walk scope to determine program order
within each gpu.module.
Previously, although the pass is scoped to a single gpu.module, this
walk climbs all the way up to the enclosing top-level builtin.module and
traverses the entire module — including sibling gpu.modules. When there
is multiple gpu.modules, it causes concurrent traversal and mutation of
the shared IR and eventually leads to a segfault.
Assisted-by: Claude
Commit: b3e641630cbe0c25022e6033bdfc1cbf1fc215b4
https://github.com/llvm/llvm-project/commit/b3e641630cbe0c25022e6033bdfc1cbf1fc215b4
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/SemaCXX/dllimport.cpp
Log Message:
-----------
[Clang](NFC) Rewrite test/SemaCXX/dllimport.cpp as done for dllexport.cpp (#191391)
Commit: 2189cea443f1bb69861af2a1994b11f5aaa5be68
https://github.com/llvm/llvm-project/commit/2189cea443f1bb69861af2a1994b11f5aaa5be68
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/select-first-index-narrow.ll
A llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
A llvm/test/Transforms/LoopVectorize/select-first-index-narrow.ll
Log Message:
-----------
[LV] Add tests for argmin/argmax with a narrow index and ptr IVs (NFC) (#222290)
Extend test coverage for argmin/argmax with truncated IVs and pointer
inductions.
Commit: ef208564acbfc9e8fef0d6c436bac1681f1a6778
https://github.com/llvm/llvm-project/commit/ef208564acbfc9e8fef0d6c436bac1681f1a6778
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
A flang/unittests/Optimizer/AliasAnalysisRecursiveEffectsCacheTest.cpp
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[fir][aa] Add opt-in cache for use by fir `AliasAnalysis` clients (#221973)
Adds `AliasAnalysisRecursiveEffectsCache`, an opt-in cache that memoizes
per-operation read/write summaries so that `getModRef` on an operation
with `HasRecursiveMemoryEffects` does not re-walk its nested regions on
every query.
This is independent of the `getSource()` memoization added separately:
that one is keyed on (value, flags) and answers "what memory does this
value refer to", while this one is keyed on the operation and answers
"what does this operation and everything nested in it read and write".
LICM enables both, since it only hoists pure-read ops and so invalidates
neither.
Commit: 5dc123502ac6ef7de22c67685fe3519e88c51ce4
https://github.com/llvm/llvm-project/commit/5dc123502ac6ef7de22c67685fe3519e88c51ce4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
PowerPC: Drop AllowFPOpFusion from isProfitableToHoist (#221347)
Commit: 173ccf9996f99fd93347ca7f245d954979c811b7
https://github.com/llvm/llvm-project/commit/173ccf9996f99fd93347ca7f245d954979c811b7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
Log Message:
-----------
[SLP]Exclude splat gather subtrees from the store chain retry size
The tree size recorded for a failed store chain attempt gates the
larger-VF retries. The splat gather subtrees are auxiliary to the store
tree and inflated the recorded size, so the deviation check skipped the
VF=4 retry and the chain fell back to VF=2 or scalar.
Reviewers: bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/221241
Commit: bb3c1628511349afbc0a0a82ec690a2da7020b63
https://github.com/llvm/llvm-project/commit/bb3c1628511349afbc0a0a82ec690a2da7020b63
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
Log Message:
-----------
[SLP]Drop unprofitable splat gather subtrees
The keep/drop check ran only when trimming changed something and
ignored the splat emission cost on both sides. Run it in both paths
with the actual costs: keep the subtree if its price plus extracts plus
the reusing gathers' current costs is not worse than re-emitting those
gathers without it. Exclude splat roots from the main trimming loop.
Fixes the perf regression from #220250, reported in https://github.com/llvm/llvm-project/pull/220250?email_source=notifications&email_token=ABI45DSHUYRFN4NA4DILB5T5NZTZTA5CNFSNUABFM5UWIORPF5TWS5BNNB2WEL2JONZXKZKDN5WW2ZLOOQXTKNJWG4ZTSMBZGUYKM4TFMFZW63VMON2GC5DFL5RWQYLOM5S2KZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#issuecomment-5567390950.
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/221717
Commit: 82d63a1ee6083c0fda0d0ef795edce180dba298a
https://github.com/llvm/llvm-project/commit/82d63a1ee6083c0fda0d0ef795edce180dba298a
Author: Alexander Wilson <rdtscp at meta.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/test/RISCV/call-relocation-pair.s
Log Message:
-----------
[NFC][BOLT][RISCV] Fix call-relocation-pair test after NOP removal (#222308)
The test introduced by https://github.com/llvm/llvm-project/pull/216882
expects temporary NOPs from FixRISCVCalls in the emitted binary.
https://github.com/llvm/llvm-project/pull/221965 marks those NOPs for
removal, causing FileCheck to match trailing alignment padding instead
of the rewritten calls.
This caused the call-relocation-pair.s failure on
[bolt-aarch64-ubuntu-dylib, build
6378](https://lab.llvm.org/buildbot/#/builders/216/builds/6378).
Check emitted calls independently of the temporary NOPs and verify the
forward-call target symbols. Preserve the intermediate-pass NOP checks.
Validation: all five test RUN commands pass with local BOLT builds that
retain and remove the temporary NOPs. The original test reproduces the
reported FileCheck failure with the NOP-removing build.
Commit: a6aa47a28dcffa1197fd42cd5b61cc8d5693e0f7
https://github.com/llvm/llvm-project/commit/a6aa47a28dcffa1197fd42cd5b61cc8d5693e0f7
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
Log Message:
-----------
[GlobalISel] Avoid unnecessary call setup work (NFC) (#221892)
Avoid processing call-site attributes twice: once in the attribute
helpers (now dead and deleted) and again in setArgFlags. Let setArgFlags
handle the call-site attributes. Also skip return setup for void calls.
Small -0.03% geomean improvement on CTMark aarch64-O0-g, but consistent
little improvements across the board.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=d2dfca2db156c259a66cfe2c749f786fec2946f0&stat=instructions:u
Assisted-by: codex
Commit: 9a5a9a8a59bbfd0253ed005e231509de4436f2e8
https://github.com/llvm/llvm-project/commit/9a5a9a8a59bbfd0253ed005e231509de4436f2e8
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/docs/Remarks.md
A mlir/include/mlir/Remark/LLVMRemarkImport.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/lib/Remark/CMakeLists.txt
A mlir/lib/Remark/LLVMRemarkImport.cpp
M mlir/lib/Target/LLVM/CMakeLists.txt
M mlir/lib/Target/LLVM/ModuleToObject.cpp
A mlir/test/Dialect/GPU/module-to-binary-nvvm-remarks.mlir
M mlir/unittests/CMakeLists.txt
A mlir/unittests/Remark/CMakeLists.txt
A mlir/unittests/Remark/LLVMRemarkImportTest.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
Log Message:
-----------
[MLIR][Remark] Import LLVM optimization remarks into the remark engine (#222300)
Collect LLVM side of remarks with MLIR's remark infra.
LLVM passes emit their own [optimization
remarks](https://llvm.org/docs/Remarks.html) and MLIR has own. This PR
bridges MLIR and LLVM remarks.
`ModuleToObject` installs a `remark::LLVMToMLIRDiagnosticHandler` on the
`llvm::LLVMContext` it compiles with, which imports these remarks into
the remark engine: the category is the LLVM pass name prefixed with
`llvm-`, the LLVM remark name becomes the name, the message is stored
under the `Remark` argument and the structured LLVM arguments are copied
as metrics. The remark filters therefore select LLVM remarks by pass
name, and `llvm-.*` selects all of them.
Assisted by Claude Fable 5.1
---------
Co-authored-by: Claude Fable 5.1 <noreply at anthropic.com>
Commit: 2061c23717d5cc14215b41e4fbde578375150c79
https://github.com/llvm/llvm-project/commit/2061c23717d5cc14215b41e4fbde578375150c79
Author: David Green <david.green at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
Log Message:
-----------
[AArch64] Improve scheduling info for WHILE instruction (#221930)
They should have a throughput of 2, only using a single M microop.
This is the V3 equivalent of #219122.
Commit: 87d9c3c24ff5941ac08799850a6549b561c98a81
https://github.com/llvm/llvm-project/commit/87d9c3c24ff5941ac08799850a6549b561c98a81
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/support/Mangling.h
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/support/ManglingTest.cpp
Log Message:
-----------
[orc-rt] Add Mangling.h with platform symbol name mangling (#222315)
This implements a cut-down version of the LLVM equivalent (in
llvm/include/llvm/ExecutionEngine/Orc/Shared/Mangler.h): SymbolNameSpec
pairs a name with a kind (assembly, C). Mangling functions
(withMangledNameDo, mangledCopy) apply mangling to SymbolNameSpecs based
on the symbol name kind.
These utilities will be used to report symbols (e.g. controller
interface symbols) in the platform's native mangling, so that linking
against them requires no special handling.
Commit: e5d8a1573950731a7e8c2163e4b9946d0556768f
https://github.com/llvm/llvm-project/commit/e5d8a1573950731a7e8c2163e4b9946d0556768f
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__vector/vector_bool.h
M libcxx/include/vector
M libcxx/test/std/containers/sequences/vector.bool/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace_back.pass.cpp
Log Message:
-----------
[libc++] Backport resolution of LWG2187 to C++11 (#222006)
libc++ has LWG2187 implemented in
2d6e2834a8abcce862ef17c44f62e4de41662748 but only since C++14 mode.
Usually, resolution of an LWG issue should be treated as a Defect Report
and applied to old modes. In the case of LWG2187, the resolution should
be applied to C++11.
Commit: 3e78191c307fc59521b7dd0820ce85f34339f90a
https://github.com/llvm/llvm-project/commit/3e78191c307fc59521b7dd0820ce85f34339f90a
Author: Alex <leha-bot at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[cpack][NSIS Installer] Make installer DPI-Aware (#128470)
See
https://cmake.org/cmake/help/latest/cpack_gen/nsis.html#variable:CPACK_NSIS_MANIFEST_DPI_AWARE
for details.
Commit: 10d4bdf93a82fb290b8c55da6ed19ff54da67296
https://github.com/llvm/llvm-project/commit/10d4bdf93a82fb290b8c55da6ed19ff54da67296
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__hash_table
M libcxx/include/__tree
M libcxx/include/__utility/try_key_extraction.h
M libcxx/test/std/containers/associative/set/emplace.pass.cpp
M libcxx/test/std/containers/unord/unord.set/emplace.pass.cpp
Log Message:
-----------
[libc++] Opt `std::*set` out of map key extraction optimization (#220452)
PR #154512 (relanded by #155565) removed `__can_extract_map_key`, which
had a blanket opt-out for `std::*set`s. The new logic does not have that
opt-out, leading to `std::set`s being incorrectly constructed.
The new regression tests demonstrate this, but essentially the idea is:
1. Have `std::set<T> foo;`
2. Call `foo.emplace(some_t,
arg_that_influences_comparisons_or_hashes);`
3. The emplace will internally search using `some_t` as the key, *not*
`T(some_t, arg_that_influences_comparisons_or_hashes);`
This opts out `std::*set` from this optimization to match previous
behavior.
Tests and fix were produced by an LLM. I reviewed them and they seem
reasonable to me, though I don't have a strong background in libc++
testing conventions.
(Credit to Deva S, our partner who tracked this down. Unfortunately I
don't know his GH handle)
Fixes #220451
Commit: 4f1d2ab0a9e57909a30b9fdce73afb00d7e7d686
https://github.com/llvm/llvm-project/commit/4f1d2ab0a9e57909a30b9fdce73afb00d7e7d686
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/test/Dialect/LLVMIR/parameter-attrs-invalid.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][ABI] Add the nofreeobj param attr to the LLVM dialect (#222137)
Since #218404 clang marks every indirect argument nofreeobj rather than
nofree. LLVM allows it on returns too.
Assisted-by: Cursor / claude-opus-5
Commit: 908172d3d701ff198749418e89f3f9917fa773e1
https://github.com/llvm/llvm-project/commit/908172d3d701ff198749418e89f3f9917fa773e1
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/src/__support/tlsf_table.h
M libc/test/src/__support/tlsf_table_test.cpp
Log Message:
-----------
[libc][baremetal] default NUM_TABLE_ENTRIES to a fixed value of 3 in TLSF (#221807)
Commit: ff6ab759dbfd69a7b8138ed782f09dc979bad72e
https://github.com/llvm/llvm-project/commit/ff6ab759dbfd69a7b8138ed782f09dc979bad72e
Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm-c/lto.h
M llvm/tools/lto/lto.cpp
M llvm/tools/lto/lto.exports
Log Message:
-----------
[llvm-c][lto] Add lto_runtime_lib_symbols_list_for_triple (#221217)
The TableGen-generated `setTargetRuntimeLibcallSets` that is reached via
`getRuntimeLibcallSymbols` has no unconditional block — every branch is
arch-gated and returns, so an unknown triple sets nothing available, and
the list of symbols comes back empty.
This patch adds a second entry point to the C LTO API that takes a
triple and passes it along.
Bump `LTO_API_VERSION`.
Commit: 5282d0c073beba1c2569222ede55ff943d46fcef
https://github.com/llvm/llvm-project/commit/5282d0c073beba1c2569222ede55ff943d46fcef
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
Log Message:
-----------
[Clang] Skip invalid fields when synthesizing defaulted comparisons (#221570)
Fixes #194605
`CheckFieldDecl` already rejects `int [[clang::address_space(1)]] i;`
and marks the field invalid, but `DefaultedComparisonVisitor` still
visited it when synthesizing the defaulted `operator==`.
`BuildFieldReferenceExpr` then tripped the
`!MemberQuals.hasAddressSpace()` assertion. Both
`__is_trivially_equality_comparable(S)` and a plain `a == b` reach that
path.
`visitSubobjects` now skips invalid fields, the same way
`SpecialMemberVisitor` and the copy-assignment synthesis already do.
That covers the analyzer and the synthesizer together, and the assertion
stays in place since it still holds for valid code.
Commit: c8460a91f629145012bd1adfc05b08aedfbc7b4d
https://github.com/llvm/llvm-project/commit/c8460a91f629145012bd1adfc05b08aedfbc7b4d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/recurrence.ll
Log Message:
-----------
[ValueTracking] Clarify KnownBits recurrence code (#222266)
While reviewing a related PR, I found the R/L variable naming here very
confusing. Use Start and Step instead, matching the parameter names of
matchSimpleRecurrence().
Also clarify why the context adjustment for the step is necessary, and
add a test that would miscompile if it isn't performed.
Commit: 837a4eab85a2f4e638034a254a2bc74b1986b2ac
https://github.com/llvm/llvm-project/commit/837a4eab85a2f4e638034a254a2bc74b1986b2ac
Author: Linisha <linisha232 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
A llvm/test/CodeGen/X86/eh-return-shstk-32.ll
A llvm/test/CodeGen/X86/eh-return-shstk.ll
Log Message:
-----------
[X86] Avoid invalid ret for EH_RETURN with SHSTK (#219322)
## Summary
Fixes #215298
When lowering `llvm.eh.return` on x86, LLVM rewrites the normal stack
return
address and then emits `ret`. This is incompatible with CET shadow
stacks:
the shadow stack still contains the original return address, so `ret`
raises
a control-protection fault.
This affects code using `__builtin_eh_return` with: -mshstk
-fcf-protection=full
## What changed
When SHSTK is enabled, the x86 `EH_RETURN` pseudo-instruction now
expands to:
```asm
movq %rcx, %rsp
popq %rcx
jmpq *%rcx
```
- The `pop` consumes the rewritten return target and advances the stack
pointer.
- `llvm.eh.return` performs a non-local control transfer to an
explicitly supplied handler address, which was never pushed by a
matching `call`. It therefore cannot satisfy `ret`'s architectural
shadow-stack matching requirement regardless of implementation, so
an indirect `jmp` is used instead.
- The existing `mov %rcx, %rsp; ret` sequence is preserved for targets
without SHSTK support.
- The expansion handles 32-bit and 64-bit targets, including the
existing
Windows/UEFI x64 indirect-jump variant.
## Testing
Added: `eh-return-shstk.ll`
The test verifies that:
- non-SHSTK targets continue to emit `ret`
- SHSTK targets emit `pop` followed by an indirect `jmp`
- machine instruction verification succeeds in both configurations
Validation performed:
```bash
ninja -C build llc FileCheck llvm-config count not
build/bin/llvm-lit -sv llvm/test/CodeGen/X86/eh-return-shstk.ll
```
Passed: 1 (100.00%)
The original C reproducer was also compiled with the rebuilt Clang. Its
`pop_frame` function now emits:
```asm
movq %rcx, %rsp
popq %rcx
jmpq *%rcx
```
Runtime execution of the reproducer could not be fully validated because
the
available environment is WSL2 without usable CET shadow-stack support.
The
compiler output and LLVM regression test both pass, but this does not
confirm the control-protection fault is resolved on real CET-enabled
hardware, only that the expected instruction sequence is now emitted.
---------
Co-authored-by: Phoebe Wang <phoebe.wang at intel.com>
Commit: 6694be0f79c28f1b62556e3ea82ae074af1e27ba
https://github.com/llvm/llvm-project/commit/6694be0f79c28f1b62556e3ea82ae074af1e27ba
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/Interfaces/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
M mlir/include/mlir/Transforms/CMakeLists.txt
M mlir/lib/Bytecode/CMakeLists.txt
M mlir/lib/Dialect/ArmNeon/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSME/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSVE/IR/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
M mlir/lib/Dialect/DLTI/CMakeLists.txt
M mlir/lib/Dialect/EmitC/IR/CMakeLists.txt
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/GPU/Utils/CMakeLists.txt
M mlir/lib/Dialect/IRDL/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/Linalg/IR/CMakeLists.txt
M mlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/OpenACCMPCommon/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Ptr/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
M mlir/lib/Dialect/Transform/IR/CMakeLists.txt
M mlir/lib/Dialect/Transform/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Vector/IR/CMakeLists.txt
M mlir/lib/Dialect/X86/IR/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/SPIRV/CMakeLists.txt
M mlir/lib/Transforms/CMakeLists.txt
M mlir/lib/Transforms/Utils/CMakeLists.txt
Log Message:
-----------
[MLIR] Fix and classify generated-header dependencies (#222329)
This is fixing missing CMake dependencies to make our build graph
correct. It is a bit verbose but will be cleaned up in a following patch
making handling of the generated header automatic.
List the TableGen targets owned by each affected library, and add the
missing LLVM generated-header, SPIR-V source-generation, OpenACC/OpenMP
generated-input, and CIR operation/type prerequisites found by clean
dependency audits. Correct two stale copy-paste dependencies and the
duplicate CIR link entry.
The Transforms pass declarations and dialect inliner interface are
independent of any dialect. Classify both under mlir-generic-headers,
and associate the inliner interface with MLIRTransformUtils, which
publishes InliningUtils.h. This gives every MLIR library the required
ordering without repeated header-only edges.
Assisted-by: Codex
Assisted-by: Claude Code
Co-authored-by: Claude Fable 5.1 <noreply at anthropic.com>
Commit: 660a54c87b3940c7eb1e51a5af523b9a24fc2b99
https://github.com/llvm/llvm-project/commit/660a54c87b3940c7eb1e51a5af523b9a24fc2b99
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
A mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
A mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
M mlir/test/Target/LLVMIR/opaque-ptr.mlir
Log Message:
-----------
[mlir][llvm] Fix metadata and alignment on masked memory intrinsics (#221879)
llvm.intr.masked.load, masked.store, masked.gather and masked.scatter
implemented neither AccessGroupOpInterface nor AliasAnalysisOpInterface,
so they could not carry access_groups, alias_scopes, noalias_scopes or
tbaa. Importing LLVM IR that attached such metadata to one of them
silently dropped it, while llvm.memcpy in the same module preserved it.
Also widen alignment from I32Attr to I64Attr, matching the rest of the
LLVM dialect and LLVM proper, and make it optional. LangRef gives the
default alignment of these four intrinsics as the ABI alignment of the
type, exactly as for llvm.load and llvm.store, so an absent align
parameter attribute now imports as an absent alignment attribute instead
of being materialised as align 1, and an absent alignment attribute
exports without an align parameter attribute. This changes the textual
IR, as alignment = 4 : i32 becomes alignment = 4 : i64. Downstream
updates should rewrite only lines that mention a masked intrinsic rather
than blanket-substituting i32 with i64; other i32 spellings must stay,
including llvm.intr.matrix.*'s rows and columns attributes and i32
vector and element types on the intrinsics themselves.
Co-Authored-By: Claude Opus 5
Commit: da224d66042451154a83001456ea7d4e09819454
https://github.com/llvm/llvm-project/commit/da224d66042451154a83001456ea7d4e09819454
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/function-metadata.ll
Log Message:
-----------
[mlir][llvm] Gate unhandled function metadata warning (#221895)
Emit the warning for unhandled function metadata only when expensive
warnings are requested, matching how the flag is already used for
instruction metadata.
Co-Authored-By: Claude Opus 5
Commit: 31fb1d84516bb48b6f6d1e34b50d069458a64f09
https://github.com/llvm/llvm-project/commit/31fb1d84516bb48b6f6d1e34b50d069458a64f09
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
A llvm/test/CodeGen/AMDGPU/GlobalISel/fma-mix-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
Log Message:
-----------
[AMDGPU] Fix pow with a negative base (#222248)
v_log_f32 of a negative value is NaN, so the old expansion returned NaN
for every negative base
Take the log of `|x|` and fix up the sign
Commit: 18d181c5ea1f4a8bf12c92f6df2d8d8e5c820c0b
https://github.com/llvm/llvm-project/commit/18d181c5ea1f4a8bf12c92f6df2d8d8e5c820c0b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llround.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lround.ll
Log Message:
-----------
[SPIR-V] Fix swapped type sets in G_LROUND/G_LLROUND legalization (#218998)
Result and source types were reversed, only working by luck at widths
where LLT cannot tell int from float, fixes i8 results
Commit: bf5bef4fc3a044818dd4b682caa715c01fabd4fb
https://github.com/llvm/llvm-project/commit/bf5bef4fc3a044818dd4b682caa715c01fabd4fb
Author: estewart08 <ethan.stewart at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
Log Message:
-----------
[openmp] - Remove hwloc INSTALL_INTERFACE on omp target (#218923)
Reasons for removal:
1. hwloc is not present in installed headers, therefore a consumer of
openmp does not need hwloc
2. There is no omp target exported currently, which means
INSTALL_INTERFACE is ignored.
3. If there is a future omp target exported then there is a possible
relocation issue if LIBOMP_HWLOC_INCLUDE_DIR differs in build
environment vs end user's environment.
We need to keep BUILD_INTERFACE for unit testing and ompd build.
Originally introduced in https://reviews.llvm.org/D123888
Commit: b6d2436c2f9f30f8bc4ea58c13c9214e2f302b0a
https://github.com/llvm/llvm-project/commit/b6d2436c2f9f30f8bc4ea58c13c9214e2f302b0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/tools/gold/X86/multiple-sections.ll
Log Message:
-----------
[gold] Don't hardcode section index in test (#222339)
This can either be 1 or 2 depending on whether binutils was
compiled with --enable-rosegment=yes. The test does not care
about the index (only the address), so make it a wildcard.
Commit: f3a5a64129b0b74e1e7132ff8f20829d9c0fd504
https://github.com/llvm/llvm-project/commit/f3a5a64129b0b74e1e7132ff8f20829d9c0fd504
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
Log Message:
-----------
X86: Remove stale EFLAGS live range when converting ADD to LEA (#222029)
convertToThreeAddress may rewrite an EFLAGS-clobbering ADD into an LEA,
which does not define EFLAGS. hasLiveCondCodeDef guarantees the EFLAGS def
was dead, so drop its LiveIntervals value, otherwise the verifier would fail.
Fixes verifier errors with -early-live-intervals.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 87af62fcd0bff82d683dcc3c8f66ef770bd7eaa7
https://github.com/llvm/llvm-project/commit/87af62fcd0bff82d683dcc3c8f66ef770bd7eaa7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
Log Message:
-----------
[CGP] Drop poison generating flags when pushing freeze through cmp (#222314)
We need to clear the samesign flag when pushing freeze through icmp.
In the last commit, I also adjusted the handling of FMF on fcmp to work
the same way -- previously the transform would be skipped instead if the
fcmp had fast math flags. I think just clearing the poison-generating
flags is preferable (and what we'd do anyway in InstCombine and
DAGCombine).
Fixes https://github.com/llvm/llvm-project/issues/222309.
Commit: dacf8ccb5880d9c890db86bb1885e0eb22bc3649
https://github.com/llvm/llvm-project/commit/dacf8ccb5880d9c890db86bb1885e0eb22bc3649
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/store-scalarization-cost.ll
Log Message:
-----------
[VPlan] Cost scalar IV steps in replicate regions. (#221995)
Replace the return 0 bail-out in VPScalarIVStepsRecipe::computeCost in
replicate regions by properly scaling by the execution probability of
the region.
PR: https://github.com/llvm/llvm-project/pull/221995
Commit: 39d5c6238e0b4430c7f5256d689604c19ece7666
https://github.com/llvm/llvm-project/commit/39d5c6238e0b4430c7f5256d689604c19ece7666
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
A llvm/test/tools/llvm-pdbutil/compile3sym.yaml
A llvm/test/tools/llvm-pdbutil/frameprocsym.yaml
Log Message:
-----------
[llvm-pdbutil] Map enums in bitflags for symbols in YAML (#215887)
Both `S_COMPILE3` and `S_FRAMEPROC` have bitflags that also contain
non-bitflag enums. For `S_COMPILE3`, the lower eight bits represent the
language and for `S_FRAMEPROC` there are bits in the middle representing
the frame pointer registers for variables and parameters.
In both cases, the values of the enums were not present in the generated
YAML.
Mapping this in YAML is a bit complicated, because we can't give
`yaml::IO` a reference to the flags. I used local variables and a check
if we're reading to re-assemble the flags.
Commit: 49b63de374d9da1ccabcc70bffbf83efcf49023c
https://github.com/llvm/llvm-project/commit/49b63de374d9da1ccabcc70bffbf83efcf49023c
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/lib/CIR/CodeGen/Address.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byref.cpp
M clang/test/CIR/Transforms/abi-lowering/expand-struct-arg.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-byref-forward-param.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byref-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
Log Message:
-----------
[CIR] Forward a byref argument loaded from a byref parameter (#221057)
When a callee argument comes out of the calling function's own byref
parameter, that pointer already names the object its caller will
destroy, so pass it along as-is.
Assisted-by: Cursor / claude-opus-5
Commit: 647fffcc2173aaee745db7303316740a4c27d138
https://github.com/llvm/llvm-project/commit/647fffcc2173aaee745db7303316740a4c27d138
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
A clang/test/CodeGen/AArch64/neon/rounding.c
R clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
Log Message:
-----------
[CIR][AArch64] Port f64 tests for v8.5 rounding NEON builtins (#221389)
Related to https://github.com/llvm/llvm-project/issues/185382
Port tests from
clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c to
clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
Commit: 757ae56cbe99e0ea4439cc7b0321426828f8c199
https://github.com/llvm/llvm-project/commit/757ae56cbe99e0ea4439cc7b0321426828f8c199
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/ArmNeon/IR/ArmNeonDialect.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/LLVMIR/IR/VCIXDialect.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/test/lib/Dialect/NVGPU/TestNVGPUTransforms.cpp
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[MLIR] Remove unnecessary generated-header include dependencies (NFC) (#222349)
Remove unused dialect and transform headers, and replace broad pass
aggregates with the specific conversion headers used by GPU and
SparseTensor pipelines. Include the core pass and IR builder definitions
directly where unrelated dialect headers previously supplied them
transitively.
These include-only changes avoid unnecessary TableGen header
prerequisites without depending on changes to the CMake generated-header
dependency model.
Assisted-by: Codex
Commit: 86f1e1209a296c6438263d1e9f5be018a6a86dd1
https://github.com/llvm/llvm-project/commit/86f1e1209a296c6438263d1e9f5be018a6a86dd1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
Log Message:
-----------
[SPIR-V] Fix legalized store of single element vector to vector (#222253)
A `<1 x T>` shares its SPIR-V type with the scalar T, so extracting from
it emits OpCompositeExtract on a non-composite, which is rejected by
spirv-val
Commit: e4833173af64d3262a70d518fde99f8ca46f6c1d
https://github.com/llvm/llvm-project/commit/e4833173af64d3262a70d518fde99f8ca46f6c1d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
Log Message:
-----------
[SPIR-V] Fix legalization rewriting non-zero size arrays to pointers (#222276)
legalizeType checked `isa<ArrayType>` with no size guard
Use `shouldLegalizeInstType`, which already checks for zero size
Commit: c664d0dccabe6fc40900f6223284cefe4070a1bf
https://github.com/llvm/llvm-project/commit/c664d0dccabe6fc40900f6223284cefe4070a1bf
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Evaluate/shape.cpp
Log Message:
-----------
[flang] Avoid signed integer overflow in GetNonNegativeExtent (#222207)
`GetNonNegativeExtent()` computes a dimension's extent from constant
bounds as `ub - lb + 1` in `ConstantSubscript` (`int64_t`) arithmetic.
For an oversized dimension such as `integer(1) ::
a(0_8:9223372036854775807_8)`, whose extent is 2\*\*63, that computation
overflows — undefined behavior, and the ubsan failure reported in
#221940.
The wrapped result has to be preserved: storage sequences that are too
large are diagnosed later, while offsets are computed, and that code
tells a genuinely empty dimension from one whose extent wrapped around
by cross-checking the original bounds (`IsEmptyDimension()` in
`Semantics/compute-offsets.cpp`). This patch therefore computes the same
two's complement result with `llvm::SubOverflow()` and
`llvm::AddOverflow()`, which are defined for every input. Subtracting
first also covers bounds of mixed sign, where `ub - lb` can overflow
before the increment.
Fixes #221940
Assisted-by: AI
Commit: 3409f0fd2aea08b57b1ee0047cdec5c26acfa02e
https://github.com/llvm/llvm-project/commit/3409f0fd2aea08b57b1ee0047cdec5c26acfa02e
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
Log Message:
-----------
[AMDGPU] Fix invalid 64-bit DPP formed from folding a 32-bit DPP mov (#222216)
GCNDPPCombine already rejects 64-bit DPP when the DPP move itself is
64-bit, but a 32-bit move folded into a source of a 64-bit instruction
was not checked. On targets without FeatureDPALU_DPP this formed
V_LSHLREV_B64_e64_dpp, whose tied old operand got the move's 32-bit
register class instead of the 64-bit destination class.
Commit: 57edf2997431add187956bd6637f8e83075db957
https://github.com/llvm/llvm-project/commit/57edf2997431add187956bd6637f8e83075db957
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/lib/AST/ODRHash.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RunLoopAutoreleaseLeakChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelConsumer.cpp
Log Message:
-----------
[Clang] Avoid calling hasBody() when calling getBody() directly after (#221845)
`hasBody()` and `getBody()` are virtual functions, so calling them
multiple times should be avoided.
Commit: 1849da9fffcc4a817f83d1c7422e1d98003cfed1
https://github.com/llvm/llvm-project/commit/1849da9fffcc4a817f83d1c7422e1d98003cfed1
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
M clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
M mlir/include/mlir/ABI/ABIRewriteContext.h
M mlir/lib/ABI/Targets/Test/TestTarget.cpp
M mlir/unittests/ABI/ABIRewriteContextTest.cpp
Log Message:
-----------
[CIR] Honor the Direct coercion offset in x86_64 callconv lowering (#220724)
When a record's low eightbyte holds no field, the classifier passes it
in one register read from byte 8 rather than byte 0. CallConvLowering
had no way to represent that, so `convertABIArgInfo` rejected the whole
signature as NYI.
`ArgClassification` now carries the offset and `emitCoercionToMemory`
reads and writes the coerced scalar through a `u8` `cir.ptr_stride` at
that byte. The offset-zero path is untouched.
A register-tuple coercion at an offset is refused rather than read from
the wrong bytes, a pair SysV cannot currently produce.
Drop the pass opt-out flag from one test that no longer needs it.
Supersedes #203640, which had the coercion mechanism but nothing calling
it.
Assisted-by: Cursor / claude-opus-5
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: aaa8531405b31bc17566de55202431c8d6dc22b9
https://github.com/llvm/llvm-project/commit/aaa8531405b31bc17566de55202431c8d6dc22b9
Author: Jake Daly <48452250+jakemdaly at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
Log Message:
-----------
[CodeGen] Visit operands inside bundles in DetectDeadLanes (#220645)
`modifySubRegisterOperandStatus` walked each basic block with
`MachineBasicBlock`'s default iterator, which visits only top-level
instructions and steps over the contents of a `BUNDLE`. Dead/undef flags
were therefore only ever updated on the `BUNDLE` header, even though the
analysis half of the pass walks `MRI` use lists and does account for
bundle-internal operands. The pass reasoned about operands it then refused
to update.
A register referenced both by the header and by a bundled instruction
ends up with the two disagreeing about whether the bundle reads it, and
consumers split on which half they believe: `ScheduleDAGInstrs::buildSchedGraph`
and `LiveIntervals::handleMove` look at the header only, while
`RegisterOperandsCollector` descends into the bundle. The scheduler can
then move a bundle across a dependence it never modelled, and
`RegPressureTracker::recede` asserts on an empty use lane mask.
Walk `MBB.instrs()` instead, so the rewrite sees the same operands the
analysis did.
Commit: cd570f8304b7bb2faaec36d0707ecf8bb8e889f3
https://github.com/llvm/llvm-project/commit/cd570f8304b7bb2faaec36d0707ecf8bb8e889f3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Interfaces/TilingInterface.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Utils/CMakeLists.txt
M mlir/lib/Interfaces/CMakeLists.txt
Log Message:
-----------
[MLIR] Remove and narrow unnecessary header dependencies (NFC) (#222364)
This is prerequisite work on reducing the amount of CMake dependencies
on (TableGen) generated header.
Forward-declare IteratorType in TilingInterface.h instead of including
all structured-operation utilities. Include those utilities directly in
SCF and Tensor implementations that use their enum values and helpers,
and remove TilingInterface's dependency on the DialectUtils library.
Replace DialectUtils's Arith library prerequisite with its operation
generator, and SPIR-V's GPU library prerequisite with its
compilation-interface generator. Drop VCIX's obsolete GPU
compilation-interface prerequisite.
Assisted-by: Codex
Commit: 48aa9f6be52448b362d5b681ccca82c8fa48712a
https://github.com/llvm/llvm-project/commit/48aa9f6be52448b362d5b681ccca82c8fa48712a
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/CallGraph.h
Log Message:
-----------
[CallGraph] Remove dead removeAllCalledFunctions and stealCalledFunctionsFrom (NFC) (#222252)
CallGraphNode::removeAllCalledFunctions: Added on November 26, 2001 in
commit e409c460bf87ef9211d42e1b6ede0df750aeb64a (originally as
removeAllCalledMethods) without any callers.
CallGraphNode::stealCalledFunctionsFrom: The last caller was removed on
June 24, 2022 in commit 217e85761cd1978931e29546e15716614e3b2fcc.
Assisted-by: Antigravity
Commit: 2de38b4861ed4a7be7ddd42fc803e91d1fe81b14
https://github.com/llvm/llvm-project/commit/2de38b4861ed4a7be7ddd42fc803e91d1fe81b14
Author: Hadong Lee <hdchris765 at snu.ac.kr>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/icmp-urem.ll
Log Message:
-----------
[InstCombine] Fold comparisons of urem with dividend (#214933)
This folds equality comparisons of `X urem Y` with `X`
- `(X urem Y) == X` to `X ult Y`
- `(X urem Y) != X` to `X uge Y`
For a defined `urem`, let `Q = X udiv Y` and `R = X urem Y`. Unsigned
division gives `X = Q * Y + R`, so:
```
R == X
<=> Q * Y == 0
<=> Q == 0 (since Y != 0)
<=> X < Y
```
Division by zero is undefined behavior, so no separate handling for `Y
== 0` is required.
This handles commuted compare operands, scalar and vector types, and
remainders with additional uses
Alive2: https://alive2.llvm.org/ce/z/3ryQaE
simplified proof with both folds: https://alive2.llvm.org/ce/z/v39F4d
Fixes #214480
Commit: ecd333f7e71fc67aa388a5824520e2df11c08886
https://github.com/llvm/llvm-project/commit/ecd333f7e71fc67aa388a5824520e2df11c08886
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
Log Message:
-----------
[RISCV] Correct some constants in orc-b-patterns.ll. NFC (#222229)
Based on the test function names being similar to other function, I
assume these were supposed to generate orc.b.
Also remove unnecessary nuw, nsw, and exact flags.
Commit: 4c0681233c84d923b9455b30875304520029c6e5
https://github.com/llvm/llvm-project/commit/4c0681233c84d923b9455b30875304520029c6e5
Author: Usman Nadeem <mnadeem at qti.qualcomm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
M llvm/test/CodeGen/ARM/vtrn.ll
M llvm/test/CodeGen/WebAssembly/simd-setcc-reductions.ll
Log Message:
-----------
[SDAG][ComputeNumSignBits] Look through undefined high bits for EXTRACT_VECTOR_ELT in a BUILD_VECTOR (#218099)
If we have a `BUILD_VECTOR(EXTRACT_VECTOR_ELT()...)` where the
`EXTRACT_VECTOR_ELT` is adding undefined high bits by extending but the
`BUILD_VECTOR` is again truncating those bits, then we can just look
through the extract and call `ComputeNumSignBits` directly on the parent
vector.
Ideally, when the caller is truncating the value, it would be nice for
`ComputeNumSignBits` to have the ability to ignore high bits we don't
care about.
Commit: 44b33260a38c8a0ec0083f950fe9d839ade72ab6
https://github.com/llvm/llvm-project/commit/44b33260a38c8a0ec0083f950fe9d839ade72ab6
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Attr.td
M clang/test/Sema/attr-c2x.c
Log Message:
-----------
[clang] treat [[gnu::flag_enum]] as equivalent to [[clang::flag_enum]] (#219105)
GCC gained a `[[gnu::flag_enum]]` attribute for consistency with clang
in GCC 15. With this patch, the `[[gnu::flag_enum]]` is recognized and
handled equivalently to `[[clang::flag_enum]]`.
The patch introducing `[[gnu::flag_enum]]` in GCC is
https://github.com/gcc-mirror/gcc/commit/1914ca8791ce4e0ba821e818cb6f86c76afdb6f2.
GCC treats `[[clang::flag_enum]]` as equivalent to `[[gnu::flag_enum]`.
Commit: f40e465b112a1a0cc1f6f544b33f3569bd364e36
https://github.com/llvm/llvm-project/commit/f40e465b112a1a0cc1f6f544b33f3569bd364e36
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/split-sum-expression-tree-subscripts.f90
Log Message:
-----------
[flang] Ignore subscript conversions when reassociating sums (#222302)
Implicit conversions of INTEGER(4) array indices to SubscriptInteger
were treated as conversions in the surrounding floating-point sum,
preventing reassociation of ordinary array-element expressions.
Stop only the conversion traversal at subscripts. Keep the independent
side-effect and volatile/asynchronous checks and embedded numeric
conversion restrictions unchanged.
Assisted-by: Codex
Commit: 62b7ae5dc327ba80b54e76a2964f34ff60f6ee91
https://github.com/llvm/llvm-project/commit/62b7ae5dc327ba80b54e76a2964f34ff60f6ee91
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
Log Message:
-----------
[AMDGPU] Compact virtual register numbers in sdwa-ops.mir (NFC) (#222197)
Renumber vregs in appearance order.
Commit: 9f9ed8295a38db3189fcec96fb6f9964e32753c7
https://github.com/llvm/llvm-project/commit/9f9ed8295a38db3189fcec96fb6f9964e32753c7
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/glob_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/glob_t.h
M libc/include/CMakeLists.txt
A libc/include/glob.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/glob-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/glob_t.h
M libc/src/CMakeLists.txt
A libc/src/glob/CMakeLists.txt
A libc/src/glob/glob.cpp
A libc/src/glob/glob.h
A libc/src/glob/globfree.cpp
A libc/src/glob/globfree.h
M libc/test/src/CMakeLists.txt
A libc/test/src/glob/CMakeLists.txt
A libc/test/src/glob/glob_test.cpp
Log Message:
-----------
[libc] Add <glob.h> POSIX header. (#221362)
* Provide the `<glob.h>` header as defined in POSIX:
https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/glob.h.html.
* Provide declaration of `glob_t` struct type, and `GLOB_*` family of
macros for controlling `glob()` function behavior and
for describing `glob()` error return codes.
* Provide stubs / placeholder implementations for `glob()` and
`globfree()` functions - similar to `fnmatch()`
added in f571c5e34a06bc769924ff9100b6f31612279ab0 those would likely
depend in part on pattern matching
logic shared between them and with regex.
* Since there are no real implementations yet, only enable the header
and entrypoints on Linux platforms with
`LLVM_LIBC_ENABLE_EXPERIMENTAL_ENTRYPOINTS` specified.
Commit: abdd057f56f38a469fc13597a5c7f1d43792e56b
https://github.com/llvm/llvm-project/commit/abdd057f56f38a469fc13597a5c7f1d43792e56b
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
Log Message:
-----------
Fixes Bazel BUILD error in #411a8eea0c269fff79700da1b3a9e71914718d4b (#222371)
Adds missing deps for kmt_traits.
Commit: a49d01f26b6c43e4712464e0a07249e92ff792ef
https://github.com/llvm/llvm-project/commit/a49d01f26b6c43e4712464e0a07249e92ff792ef
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A flang-rt/include/flang-rt/runtime/unit.h
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/execute.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api-common.h
M flang-rt/lib/runtime/io-api-minimal.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt-minimal.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/unit-map.h
M flang-rt/lib/runtime/unit.cpp
R flang-rt/lib/runtime/unit.h
A flang-rt/test/Driver/iotype.f90
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/ChildIO.cpp
Log Message:
-----------
[flang][Runtime] Reset the information of namelist formatting when invoking child I/O (#218314)
The flag of namelist formatting is enabled when IONAME(OutputNamelist)
or IONAME(InputNamelist) is called, but it was never disabled afterward.
This patch disables the flag when invoking child I/O, as child I/O
cannot use namelist formatting.
Fixes #201516
Commit: 64ee3d3172c3cc7ebefe71fb3ca7a53bb5a73d44
https://github.com/llvm/llvm-project/commit/64ee3d3172c3cc7ebefe71fb3ca7a53bb5a73d44
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Log Message:
-----------
[AArch64] Cost vector.match intrinsics that require type legalization (#220852)
Recent patches (#218972, #218972) have added type-legalization support
for vector.match. This allows us to remove the exact type and search
size requirements from the intrinsic cost. This in turn will simplify
the combine in #212456.
Commit: 45ffe88d73f5e147315bca4bdb7ce1d730725586
https://github.com/llvm/llvm-project/commit/45ffe88d73f5e147315bca4bdb7ce1d730725586
Author: Hüseyin Kutsi Balcı <balcihkutsi at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/HowToSubmitABug.rst
M llvm/docs/PDB/PdbStream.md
Log Message:
-----------
[docs] Fix two stale file paths (#213994)
Two documentation paths point at files that are not there.
- `HowToSubmitABug.rst` tells readers to run
`clang/utils/creduce-clang-crash.py`. The script was renamed to
`reduce-clang-crash.py` in 59cee030f and the doc was not updated with
it.
- `PDB/PdbStream.rst` gives `llvm/DebugInfo/CodeView/CVDebugRecord.h`.
That header moved to `llvm/include/llvm/Object/CVDebugRecord.h` in
211c67cdb.
Neither old path resolves at `main`; both replacements do.
## AI disclosure
AI-assisted (Claude Code), per the AI Tool Use Policy. A sweep resolved
the repo-internal paths written in `llvm/docs`, `clang/docs`,
`mlir/docs`, `lld/docs`, `libcxx/docs` and `flang/docs` against the
tree; only these two failed to resolve anywhere. Before opening I
checked both replacements in the tree and found the commits that renamed
and moved them, and went through the rest of the sweep's output — the
remaining candidates are correct in context and were left alone. I have
reviewed and understood the change and take responsibility for it.
Commit: 8104261f2c74b41d63d9e043fe3631e20af54609
https://github.com/llvm/llvm-project/commit/8104261f2c74b41d63d9e043fe3631e20af54609
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_until_comp.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of parallel std::is_heap() based on std::is_heap_until() (#221556)
This PR adds a "one-liner" implementation of a parallel `std::is_heap()`
based on `std::is_heap_until()`.
The implementation is effectively a call to `std::is_heap_until()` and a
comparison with the last iterator:
```c++
auto res = IsHeapUntil()(policy, first, last, comp);
if (!res) {
return nullopt;
}
return *res == last;
```
Part of #99938.
Commit: 52feb1fe499914ef1d7669fa75ab46e12b1a37dd
https://github.com/llvm/llvm-project/commit/52feb1fe499914ef1d7669fa75ab46e12b1a37dd
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
Log Message:
-----------
[NFC][VPlan] Move `introduceMasksAndLinearize` into a `VPPredicator`'s method (#217483)
To reduce diff in the next PRs.
AI-assisted.
Commit: eff57ef78633c2eff5ae2cb7e4fa8e11e14d4b46
https://github.com/llvm/llvm-project/commit/eff57ef78633c2eff5ae2cb7e4fa8e11e14d4b46
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Expr.h
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGenCXX/GH128985.cpp
A clang/test/CodeGenCXX/Inputs/embed-data.txt
A clang/test/SemaCXX/GH128985.cpp
Log Message:
-----------
[clang][CodeGen] Fix assertion failure with #embed in array new-expression initializers (#218262)
Fixes #128985
An `EmbedExpr` in a semantic initializer list can represent many array
elements at once, and every consumer of such lists has to expand it. The
array `new` emitter, `EmitNewArrayInitializer`, never did: it counted
the `EmbedExpr` as one element and emitted it through the scalar path,
hitting `assert(E->getDataElementCount() == 1)`. The undercount also
made the runtime minimum allocation check too lax and miscomputed the
trailing zero-fill size.
`Codegen` now emits one store per embed data element, converted to the
element type, and counts initializers with
`getNumInitsWithEmbedExpanded()` in both places. That helper also
learned to look through implicit casts, since Sema wraps a multi-element
`EmbedExpr` in a conversion when the element type isn't `int` — the
other embed consumers already strip casts before checking.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 6f7ca253fc3674856afe665eda40f9856a69e804
https://github.com/llvm/llvm-project/commit/6f7ca253fc3674856afe665eda40f9856a69e804
Author: Michał Górny <mgorny at gentoo.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/test/libcxx/atomics/clear_padding.pass.cpp
Log Message:
-----------
[libc++] Disable SSP in `clear_padding.pass.cpp` (#218130)
Compile `clear_padding.pass.cpp` test `-fno-stack-protector` to fix
crash due to the generated code overflowing the buffer. This is most
likely a bug in clang.
Bug #212002
Fixes a test regression introduced in #76180
CC @huixie90
---------
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: b9d0703f7d6bd040bf317b1099729ba3a421f33c
https://github.com/llvm/llvm-project/commit/b9d0703f7d6bd040bf317b1099729ba3a421f33c
Author: Matt Turner <mattst88 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
M compiler-rt/test/asan/TestCases/complete_stack_trace.c
Log Message:
-----------
[sanitizer_common] Disable the fast unwinder on Alpha Linux (#220231)
BufferedStackTrace::UnwindFast walks the stack assuming frame[0] is the
caller's frame pointer and frame[1] the return address. Alpha chains
neither, so the walk yields a few garbage frames and then stops:
```
freed by thread T0 here:
#0 0x020000971274 in free asan_malloc_linux.cpp:51
#1 0x0200007fa48c (<unknown module>)
```
Opt Alpha out of the fast unwinder the way Linux/MIPS already is. The
_Unwind_Backtrace based unwinder gives complete traces; with it, GCC's
g++.dg/asan/deep-stack-uaf-1.C passes on alpha-unknown-linux-gnu.
Commit: 17092bd38d0d7a4c37d6bcbf6e96177d2aacbc43
https://github.com/llvm/llvm-project/commit/17092bd38d0d7a4c37d6bcbf6e96177d2aacbc43
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
Log Message:
-----------
[SystemZ] XPLINK64: use AExt for 32-bit pointer formals (#222350)
CC_XPLINK64_Pointer was setting LocInfo=ZExt, promising the optimizer
that the caller had zero-extended bit 32. Evidence from Open XL 1.1 and
2.2 shows that callers do not consistently zero-extend `__ptr32`
arguments
-- Open XL 1.1 emits nothing on the caller side; Open XL 2.2 only
zero-extends in the explicit cast case. Every actual use of a 31-bit
pointer goes through `addrspacecast` which emits `LLGTR` to clear bit 32
at
the point of use, so no callee relies on the register being clean at the
parameter boundary. Change LocInfo to AExt to accurately reflect that
only the low 32 bits are valid.
Extracted from #206833 per reviewer request.
Commit: 9756cbfea1d7cdfdd2d15d26cdfbe1db6c775923
https://github.com/llvm/llvm-project/commit/9756cbfea1d7cdfdd2d15d26cdfbe1db6c775923
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Use canonical shift amount type when decomposing a multiply. (#222211)
This allows the shifts to CSE with other shifts that are already in
canonical form.
Commit: 15bf5e575a6a1a5ecb80a98922223e31fda25204
https://github.com/llvm/llvm-project/commit/15bf5e575a6a1a5ecb80a98922223e31fda25204
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
Log Message:
-----------
[InstCombine] Prepare to support trunc nuw condition in foldAndOrOfICmps (NFC) (#221555)
this is a NFC rewrite to be able to support Trunc nuw by using m_IcmpLike matcher in foldAndOrOfICmps
Commit: d506b595872f3e0bf29e2546cd7e5ff55cdd2e32
https://github.com/llvm/llvm-project/commit/d506b595872f3e0bf29e2546cd7e5ff55cdd2e32
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
[InstCombine] support trunc condition in foldSelectICmpAndAnd (#220690)
Fixes regression seen in test in https://github.com/llvm/llvm-project/pull/184182
Commit: 290c4d79e964bb22ca9a4ff8453770c427d5f345
https://github.com/llvm/llvm-project/commit/290c4d79e964bb22ca9a4ff8453770c427d5f345
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[docs][libFuzzer] Fix `-timeout_exitcode` and `-error_exitcode` descriptions (#221776)
Commit: 4f057d974babd7782c175b4f13274346ab44aa21
https://github.com/llvm/llvm-project/commit/4f057d974babd7782c175b4f13274346ab44aa21
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/CXX/stmt.stmt/stmt.iter/stmt.ranged/p1.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
[Clang][Sema] Error message refers to `__begin1` with `constexpr` variable in range-based for loop (#218145)
Fixes #211926
When a range-based for loop variable is declared `constexpr`, its
initializer is the compiler-built `*__begin1`, which normally can't be a
constant expression. The constant evaluator reports what it sees at the
leaf — `read of non-constexpr variable '__begin1' is not allowed in a
constant expression`, plus a `declared here` note pointing at the loop's
colon — without saying what `__begin1` is.
Both constant evaluators now emit a single dedicated note when they read
one of the loop's implicit variables, so the existing `constexpr
variable 'x' must be initialized by a constant expression` error is
followed by `'__begin1'-variable of range-based 'for' loop is not a
constant expression`, pointed at the loop it belongs to. The note takes
the variable as an argument, so it names `__end1` or `__range1` when
those are what was read. No Sema changes. A constexpr loop variable that
*is* valid (CWG1204, when `operator*` never reads the iterator) still
compiles, and expansion statement (`template for`) variables are
unaffected since their synthesized iterators are themselves `constexpr`.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 1c380fe977a121a325110c742032c6bbdfc06d32
https://github.com/llvm/llvm-project/commit/1c380fe977a121a325110c742032c6bbdfc06d32
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-select-remap.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Reapply "[SimplifyCFG] Fix profcheck failure from #213302" (#220932) (#220939)
This reverts commit 02d1fabd22d599bad38b2b926c7bcaaf41aff6e0.
Rerequesting review as I merged prematurely. This fixes a newly
introduced SimplifyCFG profcheck failure by correctly propagating branch
weight information.
Commit: 366be9717d45a9e8f72865bf94a9ef42faf4c2f7
https://github.com/llvm/llvm-project/commit/366be9717d45a9e8f72865bf94a9ef42faf4c2f7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr222363.ll
Log Message:
-----------
[X86] getBT - ensure we ANY_EXTEND or TRUNCATE the bit test index to match the source value (#222374)
Fixes #222363
Commit: cbdd30c4bf239adc33e2025a579372b41bec9512
https://github.com/llvm/llvm-project/commit/cbdd30c4bf239adc33e2025a579372b41bec9512
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lld/.clang-format
Log Message:
-----------
[lld] Set WrapNamespaceBodyWithEmptyLines: Never (#221423)
77% of anonymous namespaces in lld start without an empty line, as do
59% of namespace bodies overall. lld/ELF is the most consistent at 95% and 87%.
Requires clang-format 20.
Commit: 4728d3c8e911e9f67e8eaf2f6756364f10518560
https://github.com/llvm/llvm-project/commit/4728d3c8e911e9f67e8eaf2f6756364f10518560
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/builtin_vectorelements.cpp
M clang/test/SemaCXX/ptrauth-type-discriminator.cpp
A clang/test/SemaOpenCLCXX/vec_step.clcpp
Log Message:
-----------
[clang] Reject references to vector types in `__builtin_vectorelements` (#219767)
Fixes #216997
`__builtin_vectorelements` shares its operand check with `sizeof` and
friends, and that shared code looks through reference types before it
dispatches to the per-builtin check. So `__builtin_vectorelements(veci4
&)` was accepted by Sema, but the expression kept the reference as its
argument type, and everything downstream — constant evaluation, the
bytecode interpreter, CodeGen — expects that type to be a vector.
Constant-evaluating the initializer in the reproducer then trips
`assert(Ty->isSizelessVectorType())`. The alias syntax in the report
isn't the cause; `vec` there is a well-formed reference-to-vector type.
The check now runs before the reference is looked through, so a
reference to a vector type gets the existing "must be of vector type"
error, the same one `__builtin_vectorelements(int &)` already produced.
No other trait kind is affected.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 4bd42ad3ade67d5c1498081df08cab4090a32551
https://github.com/llvm/llvm-project/commit/4bd42ad3ade67d5c1498081df08cab4090a32551
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/test/Transforms/InstCombine/negated-bitmask.ll
Log Message:
-----------
[InstCombine] restrict InstCombineNegator for sub(y,and(lshr(x,C),1)) (#222075)
For the general sub(y,and(lshr(x,C),1)) case the rewrite replaces one
2-instructions
sequence with another without reducing instruction count, and the
resulting shl/ashr form prevents later target-specific combines (e.g.
on PowerPC the original lshr+and maps to a single rldicl, while the
shl+ashr form requires sldi+sradi).
in the patch, Only applies when this is a true negation (LHS is zero).
sub(0,and(lshr(x,C),1)) --> add(ashr(shl(x,(BW-1)-C),BW-1),0)
Commit: 4dce46202961f348bf51a15d73bfe8bcfe8feb28
https://github.com/llvm/llvm-project/commit/4dce46202961f348bf51a15d73bfe8bcfe8feb28
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
A llvm/test/CodeGen/SystemZ/zos-xplink64-formal-sub64-extend.ll
Log Message:
-----------
[SystemZ] XPLINK64: emit narrow sign/zero-extend instructions for sub-i32 formal args (#206833)
Previously, i8/i16 integer formal arguments with signext/zeroext
attributes were promoted to i64 via CC_XPLINK_Promote_i32 using
LocVT=i64, causing the DAG to select LGFR/LLGFR (word-sized extends) for
all sub-i64 types instead of the narrower byte/halfword forms required
for XL compiler binary compatibility.
Root cause: LLVM type-legalizes i8/i16 to i32 before the CC table runs,
so ValVT is always i32 by the time CC_XPLINK_Promote_i32 is called. The
pre-legalization original type (Ins[i].ArgVT) is the only way to
distinguish i8/i16 formals from i32 formals at that point.
Fix:
- Add ArgOrigVTs to SystemZCCState, populated in AnalyzeFormalArguments
from Ins[i].ArgVT (using MVT::Other as sentinel for non-simple EVTs),
with a getArgOrigVT(ValNo) accessor that returns MVT::Other safely when
called outside AnalyzeFormalArguments (e.g. from AnalyzeCallOperands).
- In CC_XPLINK_Promote_i32 with isFormalArgLowering=true: for original
i8/i16, keep LocVT=i32 (GR32 live-in) only when a GPR is still available
(probed via getFirstUnallocated([R1L,R2L,R3L])). When all GPRs are
taken, the arg goes to an 8-byte stack slot where the caller stores a
sign-extended i64 with the value in bytes 6–7; LocVT=i64 is used in that
case so the full 8 bytes are loaded correctly.
- In LowerFormalArguments: after convertLocVTToValVT, truncate from the
legalized i32 down to the true i8/i16 so the DAG folds the
truncate+extend into a narrow instruction. Guarded by isTargetXPLINK64()
and ArgVT.isSimple().
- Extend CCIfType from [i32] to [i8, i16, i32] in CC_SystemZ_XPLINK64.
Result — callee side:
| Type | Attribute | Before | After |
|------|-----------|--------|-------|
| `i8` | `signext` | `LGFR` / `LGF` | `LGBR` / `LGB` |
| `i8` | `zeroext` | `LLGFR` / `LLGF` | `LLGCR` / `LLGC` |
| `i16` | `signext` | `LGFR` / `LGF` | `LGHR` / `LGH` |
| `i16` | `zeroext` | `LLGFR` / `LLGF` | `LLGHR` / `LLGH` |
| `i32` | `signext` | `LGFR` | `LGFR` (unchanged) |
Binary compatibility analysis:
The XPLINK64 ABI requires every caller to deliver a fully
sign/zero-extended 64-bit value in the argument register before the
call, regardless of the original type width. This patch only changes the
callee-side re-extension instruction; the caller side (LowerCall /
AnalyzeCallOperands) is unchanged and continues to emit LGFR/LLGFR for
outgoing sub-i32 arguments, or LGB/LGH/LLGC/LLGH when loading directly
from memory.
Because any ABI-compliant caller always delivers a full 64-bit
sign-extended value, bit 7 (for i8) or bit 15 (for i16) is always the
authoritative sign bit in the incoming register. Re-extending from that
bit with LGBR/LGHR yields the same result as LGFR from bit 31. The
matrix below covers all mixed-version combinations:
| Caller | Callee | Register value at call site | Callee re-extension |
Correct? |
|--------|--------|-----------------------------|---------------------|----------|
| Any (memory load) | new | `LGB`/`LGH` → full i64 | `LGBR`/`LGHR` | ✓
bit 7/15 intact |
| Open XL 1.1 | new | full GR64, no extend needed | `LGBR`/`LGHR` | ✓
ABI-compliant i64 |
| Open XL 2.2 | new | `LGFR` → full i64, bit 7 = sign | `LGBR`/`LGHR` |
✓ bit 7 intact |
| new | Open XL 2.2 | `LGFR` (caller side unchanged) | `LGFR` | ✓
identical to before |
| new | Open XL 1.1 | `LGFR` (caller side unchanged) | none (trusts
GR64) | ✓ GR64 is valid |
| Java/JNI | new | no extend (raw GR64 from JVM) | `LGBR`/`LGHR` | ✓ JVM
guarantees full i64 per JNI spec |
| new | Java/JNI | `LGFR` (caller side unchanged) | none | ✓ GR64 is
valid |
No binary incompatibility in any direction.
Adds lit test zos-xplink64-formal-sub64-extend.ll covering all five
integer types, the optnone spill path, and small struct coercion cases.
Updates call-zos-01.ll and call-zos-vararg.ll.
Commit: 9a9f50ed485aaf42a204a2aa0eae1d46f4aba8e0
https://github.com/llvm/llvm-project/commit/9a9f50ed485aaf42a204a2aa0eae1d46f4aba8e0
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__configuration/language.h
M libcxx/include/__locale_dir/wbuffer_convert.h
M libcxx/include/__locale_dir/wstring_convert.h
M libcxx/include/locale
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/ctor.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_codecvt.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_err_string.pass.cpp
Log Message:
-----------
[libc++] Remove `_LIBCPP_EXPLICIT_SINCE_CXX14` (#222221)
The existence of `_LIBCPP_EXPLICIT_SINCE_CXX14` is a relic of the
questionable status quo of LWG2176 - we only implement its resolution
since C++14 mode (7988106b21628afe7004b57ae66ec9b43cbc8942). In
a11f8b1ad66d68ca0a3a277ce776007abff9c7eb
(https://reviews.llvm.org/D91292), we implemented P0935R0 as a Defect
Report against C++11, and P0935R0 somehow superseded LWG2176. So it is a
bit unreasonable to leave LWG2176 not backported.
This patch backports the remaining parts of LWG2176 to old modes. As the
copy constructor of `wbuffer_convert` and `wstring_convert` are deleted,
implicit conversions to them cannot be performed in C++03 even if the
related converting constructors lack `explicit`.
As drive-by, also drops `// C++20` comments on these constructors due to
P0935R0 and `// C++14` comments due to LWG2176.
Commit: eb5cd179549d68b8b94efd1ddafc6c743ed98597
https://github.com/llvm/llvm-project/commit/eb5cd179549d68b8b94efd1ddafc6c743ed98597
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
R lldb/scripts/convert-lldb-header-to-rpc-header.py
M lldb/scripts/framework-header-fix.py
M lldb/source/API/CMakeLists.txt
M lldb/test/CMakeLists.txt
R lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckBasicIncludesEmit.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckConstCharPointer.h
R lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckBasicIncludesEmit.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckConstCharPointer.test
R lldb/test/Shell/RPC/Generator/lit.local.cfg
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBEnumerations.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBTypes.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckSBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/SBDefines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-defines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-enumerations.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-types.h
R lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
M lldb/test/Shell/Scripts/TestFrameworkFixScript.test
M lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
R lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/RPCCommon.cpp
R lldb/tools/lldb-rpc-gen/RPCCommon.h
R lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
R lldb/tools/lldb-rpc/CMakeLists.txt
R lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
R lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
Log Message:
-----------
[lldb] Remove LLDBRPC (#222093)
Chelsea (the champion of this effort) has left the team and nobody on my
team will have bandwidth to continue upstreaming this. This simplifies
our CMake and support scripts greatly.
Commit: fe9f67b35c068dc39788fd94f5194ca44109992a
https://github.com/llvm/llvm-project/commit/fe9f67b35c068dc39788fd94f5194ca44109992a
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
Log Message:
-----------
[lldb] Replace string type in ELFSectionHeaderInfo (#218490)
I plan on replacing the string type in LLDB's Section class, so the
first thing I will do is remove ConstString from all producers.
Commit: f72d8ff6d3f6dc481a72a63f9fb18aa92353e04c
https://github.com/llvm/llvm-project/commit/f72d8ff6d3f6dc481a72a63f9fb18aa92353e04c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/test/Analysis/BasicAA/call-attrs.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.ll
M llvm/test/CodeGen/ARM/returned-ext.ll
M llvm/test/CodeGen/ARM/struct-byval-loop.ll
M llvm/test/CodeGen/M68k/multiple-return.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/RISCV/rvv/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SystemZ/args-14.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/VE/Scalar/call.ll
M llvm/test/CodeGen/VE/Scalar/va_callee.ll
M llvm/test/CodeGen/VE/Vector/fastcc_caller.ll
M llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
M llvm/test/CodeGen/X86/bool-zext.ll
M llvm/test/CodeGen/X86/return-ext.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll
M llvm/test/Transforms/DeadArgElim/deadexternal.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/PhaseOrdering/pr64289-tce.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
M llvm/test/Transforms/SimplifyCFG/hoist-sink-swifterror-store.ll
M llvm/unittests/IR/AttributesTest.cpp
Log Message:
-----------
Revert [IR] Do not inherit ABI attributes from the callee (#222384)
Reverts #207173, plus #221892 due to a merge conflict.
Apparently we have some issues with call-site zeroext/signext on
libcalls, see
https://github.com/llvm/llvm-project/pull/207173#issuecomment-5604972674.
Commit: 91665e7aa17c4d829be459db92856eb0dbb32620
https://github.com/llvm/llvm-project/commit/91665e7aa17c4d829be459db92856eb0dbb32620
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
A llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
Log Message:
-----------
[CodeGen] Don't derive MODereferenceable from !dereferenceable metadata (#222069)
The two facts are about different pointers. `!dereferenceable` on a load
"tells the optimizer that the value loaded is known to be
dereferenceable" while `MachineMemOperand::MODereferenceable` says the
access itself doesn't trap.
Commit: 31157bbadddf2dafbfffbc23518988fa83dd4884
https://github.com/llvm/llvm-project/commit/31157bbadddf2dafbfffbc23518988fa83dd4884
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[NFC][VPlan] Move `m_RemoveMask` to `VPlanPatternMatch.h` (#219059)
I plan to use it in the `VPlanPredicator.cpp`.
AI-assisted.
Commit: 23de87dae7695634bb618e188912de11267f1dd0
https://github.com/llvm/llvm-project/commit/23de87dae7695634bb618e188912de11267f1dd0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/CMakeLists.txt
M clang/cmake/modules/CMakeLists.txt
M flang/CMakeLists.txt
M llvm/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/CrossCompile.cmake
M llvm/docs/CMake.md
M llvm/docs/ReleaseNotes.md
M mlir/CMakeLists.txt
M mlir/cmake/modules/CMakeLists.txt
M mlir/test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/XeGPU/CMakeLists.txt
Log Message:
-----------
[CMake] Add dependent project mode for Flang's MLIR (#221724)
`LLVM_ENABLE_PROJECTS` historically treats projects enabled to satisfy
another
project's dependency the same as projects selected by the user.
Consequently,
implicit projects attach their complete build, install, and test suites
to
LLVM's aggregate targets.
Keep the cache entry as the user-requested project roots and use the
normal
`LLVM_ENABLE_PROJECTS` variable as the effective dependency closure.
Projects
in the effective list but not the cache entry are configured with
`EXCLUDE_FROM_ALL`. Normalize the special `all` value before comparing
the two
sets.
This makes Flang's MLIR and Clang dependencies dependency-only without a
second
project collection. It also applies the same rule to Clang when it is
added for
LLDB. Forward the cached roots to cross-compilation and bootstrap
configurations so implicit projects do not become explicit in nested
builds.
Let MLIR own its dependency-only test policy: configure its complete
test tree
so `check-mlir` remains available, but exclude MLIR test execution and
build
dependencies from `check-all`. Explicitly enabling MLIR preserves the
existing
behavior.
Validation:
- Configured Flang with implicit MLIR test support.
- Configured Flang and MLIR explicitly with tests enabled.
- Configured `LLVM_ENABLE_PROJECTS=all` with tests disabled.
- Verified implicit mode exposes `check-flang` and `check-mlir` while
`check-all` runs Flang but not MLIR.
- Verified explicit mode includes MLIR tests in `check-all`.
Commit: 0c5f85f9a24a0cdeccb05a362cd40b03da6f1783
https://github.com/llvm/llvm-project/commit/0c5f85f9a24a0cdeccb05a362cd40b03da6f1783
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/macro-fusion-add-mem.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-imm-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-imm.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-mul-add.mir
M llvm/test/CodeGen/RISCV/macro-fusion-shift-bit-extract.mir
M llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
M llvm/test/CodeGen/RISCV/macro-fusions.mir
M llvm/test/CodeGen/RISCV/xqci-macro-fusions.mir
Log Message:
-----------
[RISCV] Use run-pass instead of start-before in macrofusion tests. NFC (#222390)
We're only checking the debug output from the scheduler pass, we don't
need to more of the pipeline.
Commit: 44eec13c0264542d1d116ac0e8c2dcf1153fe37c
https://github.com/llvm/llvm-project/commit/44eec13c0264542d1d116ac0e8c2dcf1153fe37c
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
A flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
Log Message:
-----------
[flang][FIRToMemRef] Do not peel storage-association views (#222376)
After #215402, peelZeroOffsetViews walked through fir.convert that
changes the pointee type (e.g. !fir.ref<complex<T>> → !fir.ref<T>).
Load/store then indexed the parent array and converted the value, which
is wrong for Fortran storage association: it fails verification
(memref.store / illegal fir.convert) or silently changes bits (sitofp /
fpext).
Stop peeling when the accessed element type changes. Marshal the typed
view as a rank-0 memref of the dummy type. Same-type wrappers
(fir.declare, ref<T> → ref<T>) still peel to fir.array_coor.
Commit: e45b19d32e7c5e883ed4b50970a2233bbc6a8a7e
https://github.com/llvm/llvm-project/commit/e45b19d32e7c5e883ed4b50970a2233bbc6a8a7e
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix flang and MLIR bazel builds (#222395)
- Add missing TargetLLVM dependency on RemarkStreamer (introduced in
#9a5a9a8a59bb)
- FlangOptimizerTests missing //mlir:ArithDialect (introduced in
#ef208564acbf)
- GPUPipelines and SparseTensorPipelines fixes (from changes in
#757ae56cbe99)
Commit: e146e27ab993d013ab16a706f0fd84ab3818b575
https://github.com/llvm/llvm-project/commit/e146e27ab993d013ab16a706f0fd84ab3818b575
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/pr70510.ll
Log Message:
-----------
[ConstraintElim] Use largest usable bound to check no-wrap regions. (#222295)
The unsigned no-wrap region of an add with a constant operand has
UMAX - C as upper bound. For 64 bit operations, the upper bound is
usually larger than MaxConstraintValue, so it will be decomposed as
variable instead of a constant value.
This improves results end-to-end in a few more cases, without any
additional queries:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1234.
PR: https://github.com/llvm/llvm-project/pull/222295
Commit: 8e36f93835f1bdb74492d8ac26e7bdab4f4f1884
https://github.com/llvm/llvm-project/commit/8e36f93835f1bdb74492d8ac26e7bdab4f4f1884
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[SimplifyCFG] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/220477
Commit: a173863e63415ae54b5d0abf1bc5897c61604e5f
https://github.com/llvm/llvm-project/commit/a173863e63415ae54b5d0abf1bc5897c61604e5f
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/mkdtemp.cpp
A libc/src/stdlib/linux/mkstemp.cpp
A libc/src/stdlib/linux/mktemp_util.h
A libc/src/stdlib/mkdtemp.h
R libc/src/stdlib/mkstemp.cpp
M libc/src/stdlib/mkstemp.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/mkdtemp_test.cpp
Log Message:
-----------
[libc] Implement mkdtemp (#222106)
Add the POSIX mkdtemp entrypoint for Linux targets (aarch64, riscv,
x86_64).
Extract the shared template replacement and random character retry loop
into linux/mktemp_util.h, relocating mkstemp to linux/mkstemp.cpp and
reusing the helper across both entrypoints.
Add comprehensive unit tests covering directory creation, permissions,
uniqueness, and invalid template handling.
Assisted-by: Automated tooling, human reviewed.
Commit: d638a855953de5cd12bd0e257f617bc943bd58e5
https://github.com/llvm/llvm-project/commit/d638a855953de5cd12bd0e257f617bc943bd58e5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration.ll
Log Message:
-----------
[Transforms][Utils] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222382
Commit: 244ec9557be24db8ca9d212f2f7bd29e91ea06ec
https://github.com/llvm/llvm-project/commit/244ec9557be24db8ca9d212f2f7bd29e91ea06ec
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
Log Message:
-----------
[Transforms][Scalar] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222388
Commit: 4b8c39ea8e67fe1ed07bbf0fec0229a5ebfc90fb
https://github.com/llvm/llvm-project/commit/4b8c39ea8e67fe1ed07bbf0fec0229a5ebfc90fb
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
Revert "[InstCombine] support trunc condition in foldSelectICmpAndAnd" (#222413)
Reverts llvm/llvm-project#220690
seems like this fails asan builds eg
https://lab.llvm.org/buildbot/#/builders/24/builds/23814
Commit: 4471c681e781fe14922a2ecf1684654a4522f271
https://github.com/llvm/llvm-project/commit/4471c681e781fe14922a2ecf1684654a4522f271
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-privatize.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep.mlir
Log Message:
-----------
[flang][acc] Support sizing array of derived type for openacc mapping (#222404)
Adds support for array of derived type - tested both for mapping and
privatization. Now acc.map_info can be generated for this.
Commit: 33cdc33dd6e941fe4dd1a61ba7d7ec32933e3bfd
https://github.com/llvm/llvm-project/commit/33cdc33dd6e941fe4dd1a61ba7d7ec32933e3bfd
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
Log Message:
-----------
[AMDGPU] Fix CHECKs for sdwa-ops.mir test13 and also eliminated unnecessary global live-ins (#222392)
Address #220798 reviewer comments for sdwa-ops.mir test13
Commit: 0a566538519064f8587dd930c88bf553761c405f
https://github.com/llvm/llvm-project/commit/0a566538519064f8587dd930c88bf553761c405f
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb] Accept the non-Darwin test build dir in the clean rule guard (#222412)
#197237 dropped the `.noindex` suffix from the test build directory on
non-Darwin, but the guard on the `clean` rule still looks for
`lldb-test-build.noindex`. In Swiftlang, every test that invokes it
fails off Darwin:
```
Makefile.rules:741: *** Trying to invoke the clean rule, but not using the default build tree layout. Stop.
```
Match `lldb-test-build` instead, which covers both layouts and keeps the
guard's intent of not letting the rule loose on an arbitrary directory.
Commit: e9f1f00dd49cb382b3eaef136666664eaaa16450
https://github.com/llvm/llvm-project/commit/e9f1f00dd49cb382b3eaef136666664eaaa16450
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Transforms/PhaseOrdering/lto-is-constant.ll
Log Message:
-----------
[LLVM][libc] Defer lowering of constant intrinsics in full LTO (#221505)
Summary:
This PR defers the lowering of the constant intrinsics. Currently it was
inheriting the default module pipeline and being done pessimistically in
the pre-link LTO phase. This means that some objects which would become
known constants were returned as failures. Doing this in the post-link
phase is more optimistic.
I included the `libc` change that justifies this in the PR, but it can
be split out if needed. The observation is that the ExpandVariadics pass
will lower most variadic calls on the GPU to an alloca of known size.
Using this opportunistically saves us a spill to stack ordinarily needed
to copy back the size from the GPU. Without this, every use of GPU
printf resulted in a spill to stack memory.
Hopefully this is benign enough.
Commit: 68da0c7ac7ed94a5f1c4df1119335cb74da4be8f
https://github.com/llvm/llvm-project/commit/68da0c7ac7ed94a5f1c4df1119335cb74da4be8f
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-shared-loop-invariant.ll
Log Message:
-----------
[SLP] De-duplicate costing of perfect-diamond gather spills (#220569)
Commit: 228749bf71a0f05b2ce214a153969603f1a902f8
https://github.com/llvm/llvm-project/commit/228749bf71a0f05b2ce214a153969603f1a902f8
Author: kwyatt-ext <kwyatt.external at hpe.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Parser/executable-parsers.cpp
A flang/test/Parser/recovery10.f90
Log Message:
-----------
[flang] Collapse execution-part statement error flood into one error message (#220988)
An unrecognizable statement in the execution part of a source file
produced one "expected 'KEYWORD'" error for every possible statement
because each execution-part-construct alternative failed at the same
source position and the alternative combinator merges the messages of
same-position ties.
Wrapped the keyword-led alternatives in `withMessage` so that when none
of them matches a token, the flood is discarded in favor of a single
"expected an executable statement" diagnostic.
This fixes the problem identified in Issue:
https://github.com/llvm/llvm-project/issues/220696
Assisted-by: AI (Claude)
Commit: 8aebfb31ab1a454187763bbfa1619f1f64d191f6
https://github.com/llvm/llvm-project/commit/8aebfb31ab1a454187763bbfa1619f1f64d191f6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
Log Message:
-----------
[Transforms] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222393
Commit: e829049823905405779c6b908437b200e7ed1b2e
https://github.com/llvm/llvm-project/commit/e829049823905405779c6b908437b200e7ed1b2e
Author: Gábor Tóthvári <gabor.tothvari at ericsson.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
Log Message:
-----------
[NFC][analyzer] Cleanup checker calls in `ExprEngine::ProcessStmt`, `ExprEngine::Visit*` (#218691)
Begin standardizing how `PreStmt` checkers and `PostStmt` checkers are
called by the analyzer engine. Previously, checkers were called either
from `ExprEngine::Visit` or the visit method of the statement. Now this
logic was hoisted out into `ExprEngine::ProcessStmt` and most of the
checker calls happen from there.
There are several statement kinds that do not call checkers at all or
only call `PreVisit` or only call `PostVisit` checkers. There are also
statement kinds whose visit code does not easily lend itself to the
`PreVisit`, `Visit`, `PostVisit` scheme, so those have been left
unmodified and will be refactored in a separate patch. The checker
calling status of statement kinds have been documented in the function
`shouldJustCallCheckers`.
Commit: 2c9afb46c32ccf19fe048688e273cad4c7b3dfc6
https://github.com/llvm/llvm-project/commit/2c9afb46c32ccf19fe048688e273cad4c7b3dfc6
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN bitfield extract builtins (#222186)
Adds codegen for the following AMDGCN bitfield extract builtins:
* __builtin_amdgcn_ubfe (unsigned)
* __builtin_amdgcn_sbfe (signed)
These are lowered to the corresponding `llvm.amdgcn.ubfe` and
`llvm.amdgcn.sbfe` intrinsics.
Commit: 3cab00bd5674d374e702807a57a3db432a351086
https://github.com/llvm/llvm-project/commit/3cab00bd5674d374e702807a57a3db432a351086
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN fract builtins (#222185)
Adds codegen for the following AMDGCN fract builtins:
* __builtin_amdgcn_fract (double)
* __builtin_amdgcn_fractf (float)
* __builtin_amdgcn_fracth (half)
These are lowered to the corresponding `llvm.amdgcn.fract` intrinsics.
Commit: 5ad3dd8a19d4ef59a13ac0052abe5fbca7b2823c
https://github.com/llvm/llvm-project/commit/5ad3dd8a19d4ef59a13ac0052abe5fbca7b2823c
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
Log Message:
-----------
[AMDGPU] Add more attributes to some intrinsics to help with attribute propagation (#222222)
Commit: 2c09e15d1cd4e6c42a7eddf4f09bed9dab0145e3
https://github.com/llvm/llvm-project/commit/2c09e15d1cd4e6c42a7eddf4f09bed9dab0145e3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang-rt/lib/cuda/init.cpp
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Emit Mcuda_compiled sentinel for CUDA Fortran objects (#222421)
Objects compiled as CUDA Fortran now declare an undefined Mcuda_compiled
symbol from CUFAddConstructor when emit-cuda-compiled is set. Linking
without the CUDA Fortran runtime then fails with a clear undefined
reference instead of only _FortranACUFInit, which is limited to PROGRAM
units.
The CUDA Fortran runtime defines the symbol so linking with the CUDA
Fortran runtime still succeeds.
Commit: 9c4200de17ced044bd832ec5e4e78c2e0ab25fd7
https://github.com/llvm/llvm-project/commit/9c4200de17ced044bd832ec5e4e78c2e0ab25fd7
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
Log Message:
-----------
[AMDGPU] Update REV Opcode DPP Combine test to have True16 and Fake16 runs (#222217)
DPP is not implemented for VGPR16 operands, so we also need runs with
True16 disabled to verify that combining into opcodes that might use
them is being properly guarded.
Commit: 77874a5794a3bb007cda2e6a5ac77e7ce48cf8c4
https://github.com/llvm/llvm-project/commit/77874a5794a3bb007cda2e6a5ac77e7ce48cf8c4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprClassification.cpp
A clang/test/SemaCXX/imag-lvalue-with-non-complex-operand.cpp
Log Message:
-----------
[Clang][Sema] Make _Imag int/float LValue not assignable (#218270)
Clang accepts `__real int/float` as an LValue because it's equal to the
scalar value itself, so the assignment will work fine, but it's not the
case for `__imag` because, for int and float, there is no imaginary part
to assign a value to it, so in the sema we can reject this case, similar
to GCC.
Fixes: #119498
Commit: 6fb705da6eac41c4ff4625c0a89861defc67e124
https://github.com/llvm/llvm-project/commit/6fb705da6eac41c4ff4625c0a89861defc67e124
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadx-heap.mlir
Log Message:
-----------
[mlir][openacc] Keep vector-private storage per-lane in ACCCGToGPU (#222134)
Give each lane its own allocation when `ThreadX` is active and the shape
is too large or too dynamic to be considered for stack alloca.
`processPrivatize` published a single allocation through a workgroup
slot indexed by `ThreadY`, so all lanes of a worker ended up sharing one
buffer.
Commit: c4c32a50adc88bf28a9188dcd946cdc2af7c19f2
https://github.com/llvm/llvm-project/commit/c4c32a50adc88bf28a9188dcd946cdc2af7c19f2
Author: Tim Kientzle <tkientzle at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
Log Message:
-----------
[LIT] Fix quadratic behavior collecting process output (#222419)
Repeatedly appending to a string is quadratic.
This makes lit very slow when tests emit large amounts of output.
Fixing this speeds up one Swift compiler test by 36x (from 720s down to
20s).
Commit: cd10182794b76adacc6a1c94953cdb2891d5735b
https://github.com/llvm/llvm-project/commit/cd10182794b76adacc6a1c94953cdb2891d5735b
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv-btc.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
Log Message:
-----------
[NFC][VPlan] Add extra tests for VPlan-based stride speculation (#218795)
For https://github.com/llvm/llvm-project/pull/182595.
Commit: 2f91c9c95a93be6d559dd0028a35c9f5e15d3dcf
https://github.com/llvm/llvm-project/commit/2f91c9c95a93be6d559dd0028a35c9f5e15d3dcf
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm
Log Message:
-----------
[CodeGen] Relax an overly strict assert in EmitAggregateCopy (#219090)
EmitAggregateCopy contains a sanity check verifying that a record being
bitwise copied has a genuinely trivial copy/move constructor or
assignment operator. The check did not account for records that are
non-trivial only because they contain an ARC __strong field. Such
records are still trivial for the purposes of calls, so clang can
legitimately use memcpy to copy them when passing or returning the type
by value.
Relax the assertion by using hasTrivialCopyConstructorForCall() and
hasTrivialMoveConstructorForCall() instead of the plain
hasTrivialCopyConstructor()/hasTrivialMoveConstructor() checks, since
these are exactly the predicates that capture that notion of triviality
for calls. This also makes the separate hasAttr<TrivialABIAttr>() check
redundant, since the trivial_abi attribute unconditionally sets the
for-call bits for the copy constructor, move constructor, and
destructor.
rdar://182749806
Commit: 44fc88bb27df4cbbe94d225398894d5175ae5f30
https://github.com/llvm/llvm-project/commit/44fc88bb27df4cbbe94d225398894d5175ae5f30
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[offload][level_zero] Remove async queues (#222267)
Remove old queues now that new inorder queues seems stable enough (and
more in line with what is needed for liboffload).
Commit: f6f71edb4346d586bb97485116175efd9a696ee8
https://github.com/llvm/llvm-project/commit/f6f71edb4346d586bb97485116175efd9a696ee8
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/IR/VerifierInternal.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/Verifier/AMDGPU/alloca.ll
A llvm/test/Verifier/AMDGPU/global-variable.ll
Log Message:
-----------
[AMDGPU] Introduce address space 13 for VGPR as memory (#208557)
Introduce address space 13 (enum, datalayout, verifier allowance, docs)
for VGPR as memory. No codegen in this PR.
Co-authored-by: Nicolai Hähnle <Nicolai.Haehnle at amd.com>
Commit: 177bbcb1dffa5459436f6472ca23c3d9a1479e73
https://github.com/llvm/llvm-project/commit/177bbcb1dffa5459436f6472ca23c3d9a1479e73
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[InstCombine] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: nikic, mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222409
Commit: 836b5a419d792cd56f1cb8c91a8cf4d00172be2e
https://github.com/llvm/llvm-project/commit/836b5a419d792cd56f1cb8c91a8cf4d00172be2e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
Log Message:
-----------
[IR] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Also remove some calls to applyProfMetadataIfEnabled that were added
before the cutoff date. Leave the rest that were added afterwards.
Reviewers: mtrofin, nikic
Pull Request: https://github.com/llvm/llvm-project/pull/222425
Commit: 68080c4a963f8d7dd0a1bec65555dd5ef8a5e3bc
https://github.com/llvm/llvm-project/commit/68080c4a963f8d7dd0a1bec65555dd5ef8a5e3bc
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGenOpenMP/barrier.c
M clang/test/CIR/CodeGenOpenMP/decl-not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CIR/CodeGenOpenMP/target-host-op-filtering.c
M clang/test/CIR/CodeGenOpenMP/target-map-llvm-device.c
M clang/test/CIR/CodeGenOpenMP/target-map.c
Log Message:
-----------
[CIR] Fix OpenMP tests by adding a triple. (#222345)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that.
Commit: c2e89e8955bacc8c6b10fba311038f4c12b55e00
https://github.com/llvm/llvm-project/commit/c2e89e8955bacc8c6b10fba311038f4c12b55e00
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copy.c
M clang/test/CIR/CodeGenOpenACC/compute-copy.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data-copy-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/declare-deviceptr.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/routine-anon-ns.cpp
M clang/test/CIR/CodeGenOpenACC/routine-bind.c
M clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
M clang/test/CIR/CodeGenOpenACC/routine-clauses.cpp
M clang/test/CIR/CodeGenOpenACC/routine-device_type.cpp
M clang/test/CIR/CodeGenOpenACC/routine-globals.cpp
M clang/test/CIR/CodeGenOpenACC/routine-globals2.cpp
M clang/test/CIR/CodeGenOpenACC/routine-locals.cpp
M clang/test/CIR/CodeGenOpenACC/routine-members.cpp
M clang/test/CIR/CodeGenOpenACC/routine-ns.cpp
M clang/test/CIR/CodeGenOpenACC/routine-templ.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/update.c
M clang/test/CIR/CodeGenOpenACC/wait.c
Log Message:
-----------
[CIR] Fix OpenACC tests by adding a triple. (#222344)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that.
Commit: eff777582665d7c076824cec211fe20c6fb154e5
https://github.com/llvm/llvm-project/commit/eff777582665d7c076824cec211fe20c6fb154e5
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/ProfileData/SampleProfWriter.cpp
Log Message:
-----------
[nfc][ProfileData] Fix -Wrange-loop-construct in SampleProfileWriter (#220726)
Fixes warnings:
```
SampleProfWriter.cpp:804:12: note: use reference type 'std::pair<llvm::sampleprof::FunctionId, unsigned long> const &' to prevent copying
804 | for (const auto [TypeName, Count] : *Map) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| &
SampleProfWriter.cpp:829:12: note: use reference type 'std::pair<llvm::sampleprof::FunctionId, unsigned long> const &' to prevent copying
829 | for (const auto [TypeId, Count] : *Map) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| &
```
Commit: 1daadb8ac65d52e612e4ced185467ff9d363afd9
https://github.com/llvm/llvm-project/commit/1daadb8ac65d52e612e4ced185467ff9d363afd9
Author: Augusto Noronha <anoronha at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M llvm/include/llvm/TargetParser/Triple.h
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[Triple] Sink clang's DebugEntryValueArchs list into Triple (#222136)
So that other frontends can use it.
Assisted-by: claude
rdar://186478816
Commit: 3ff11b27bbd8eca219dab55e9589fcf6a76a79cb
https://github.com/llvm/llvm-project/commit/3ff11b27bbd8eca219dab55e9589fcf6a76a79cb
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/test/fuzzer/fuzzer-finalstats.test
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[libFuzzer] Don't count leak-verification re-executions towards `-runs` (#221036)
Fixes #66331. Stop countring the verification run in
TryDetectingAMemoryLeak() as part of TotalNumberOfRuns, as the number of
executed units could exceed -runs=N.
Commit: 173a02c755bf91fecf90ac4df972128baea91da8
https://github.com/llvm/llvm-project/commit/173a02c755bf91fecf90ac4df972128baea91da8
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/convert-nontemporal-to-llvm.fir
M flang/test/Fir/convert-to-llvm-access-group.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/tbaa.fir
M flang/test/Fir/vector-always-cfg.fir
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMOps.h
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ComplexToLLVM/complex-range-option.mlir
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
M mlir/test/Conversion/VectorToLLVM/vector-load-store-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/bytecode.mlir
M mlir/test/Dialect/LLVMIR/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/dereferenceable-invalid.mlir
M mlir/test/Dialect/LLVMIR/ifunc.mlir
M mlir/test/Dialect/LLVMIR/inlining-alias-scopes.mlir
M mlir/test/Dialect/LLVMIR/inlining-loop-annotation.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/LLVMIR/tbaa-roundtrip.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/Import/ifunc.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/Import/metadata-loop.ll
M mlir/test/Target/LLVMIR/Import/metadata-profiling.ll
M mlir/test/Target/LLVMIR/Import/metadata-tbaa.ll
M mlir/test/Target/LLVMIR/Import/target-ext-type.ll
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction.mlir
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
M mlir/test/Target/LLVMIR/anonymous-tbaa.mlir
M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
M mlir/test/Target/LLVMIR/attribute-dereferenceable.mlir
M mlir/test/Target/LLVMIR/attribute-tbaa.mlir
M mlir/test/Target/LLVMIR/ifunc.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/loop-metadata.mlir
M mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
M mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-nowait.mlir
M mlir/test/Target/LLVMIR/opaque-ptr.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-nontemporal.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-simd-private.mlir
M mlir/test/Target/LLVMIR/openmp-simd-reduction-simple.mlir
M mlir/test/Target/LLVMIR/openmp-target-private.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir
M mlir/test/Target/LLVMIR/target-ext-type.mlir
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[MLIR][LLVM] Enable strict property assembly format (#217277)
Enable strict property assembly format mode for the LLVM dialect. Bind
LLVM operation properties directly in declarative assembly formats so
strict parsing does not rely on fallback handling.
Update LLVM dialect, target, and conversion tests to use the direct
property spelling.
Assisted-by: Codex
Commit: b1b68627b9da8d4bbdf9a39bb2bde52dd6ce8bf3
https://github.com/llvm/llvm-project/commit/b1b68627b9da8d4bbdf9a39bb2bde52dd6ce8bf3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/CMakeLists.txt
M llvm/CMakeLists.txt
Log Message:
-----------
[CIR][CMake] Configure MLIR as a dependency-only project (#221739)
Enable MLIR implicitly for ClangIR without attaching its unrelated tools
and test suite to the aggregate build. An explicit MLIR selection
retains its normal behavior. Add MLIR after all Clang consumers enable
Clang, so CIR also works when Clang is enabled for LLDB.
Package the required MLIR libraries through Clang's existing exports and
LLVM's distribution policy. Register dependency library and header
install components and honor toolchain-only installations. When Clang is
itself an implicit Flang dependency, let Flang package the required
targets.
Keep MLIR test support available for CIR and retain the standalone
ClangIR restriction. Leave MLIR disabled when CIR is disabled.
Assisted-by: Codex
Commit: e6114dbeed424ce7c483000e181f97b962a56fe7
https://github.com/llvm/llvm-project/commit/e6114dbeed424ce7c483000e181f97b962a56fe7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeVectorStorage.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
M mlir/lib/Dialect/SCF/Transforms/ForallToParallel.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/Transforms/scf-replace-with-new-yields.mlir
M mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
Log Message:
-----------
[mlir][Affine][SCF][Vector] Migrate to split inherent/discardable attribute APIs (#218913)
Migrate the Affine, Arith, Arm vector, SCF, and Vector dialect families
and related conversions to explicit discardable or typed attribute
access.
Assisted-by: Codex
Commit: 97d5de84b6936c6366a0e184211f683b43e73429
https://github.com/llvm/llvm-project/commit/97d5de84b6936c6366a0e184211f683b43e73429
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU][NFC] Simplify conditional return in SIInstrInfo.cpp (#222426)
Commit: d3db069999553568848400c84cbf815c03f5470f
https://github.com/llvm/llvm-project/commit/d3db069999553568848400c84cbf815c03f5470f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable wmma_*_f4 instructions for gfx1250-strict (#222434)
Commit: 92e630bec71c247905906d5c72d8cba64963c9f8
https://github.com/llvm/llvm-project/commit/92e630bec71c247905906d5c72d8cba64963c9f8
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/Textures-scalar-AST.hlsl
M clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
M clang/test/AST/HLSL/Textures-vector-AST.hlsl
M clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default.hlsl
M clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
Log Message:
-----------
[HLSL] Add Texture3D and RWTexture3D types (#220438)
Fixes https://github.com/llvm/llvm-project/issues/194739 and fixes
https://github.com/llvm/llvm-project/issues/194743
This PR implements Texture3D and RWTexture3D and adds+modifies tests for
the two types.
Assisted by: Claude Opus 5
---------
Co-authored-by: Finn Plummer <mail at inbelic.dev>
Commit: 7c5e5cab746af48a82e46cca9d9abc930a92d68a
https://github.com/llvm/llvm-project/commit/7c5e5cab746af48a82e46cca9d9abc930a92d68a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Removing passing tests from xfail list (#222473)
These tests appear to be passing/deleted as of 9/9/26.
Commit: 70e79a05f791115fd5a9e36447981e7251af2bfd
https://github.com/llvm/llvm-project/commit/70e79a05f791115fd5a9e36447981e7251af2bfd
Author: Zane Hambly <zanehambly at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/test/MC/X86/x86_errors.s
Log Message:
-----------
[X86] Reject a register where a memory operand displacement belongs (#216068)
Fixes #61438
Commit: 265bb9f2a77b30c95bcbe1ad9b0a5ae9fe52e799
https://github.com/llvm/llvm-project/commit/265bb9f2a77b30c95bcbe1ad9b0a5ae9fe52e799
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Migrate R600 onto generated TargetParser bitset (#222461)
Follow the new amdgcn system so we don't have to carry 2 different
forms of this infrastructure.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 2d7043922b150f728de861f23d6b1a61dace37e5
https://github.com/llvm/llvm-project/commit/2d7043922b150f728de861f23d6b1a61dace37e5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] port eb5cd179549d68 (#222476)
Commit: 707c032dae3bee24eae29c6f4c459a6d6dc6556d
https://github.com/llvm/llvm-project/commit/707c032dae3bee24eae29c6f4c459a6d6dc6556d
Author: Yuvaraj Venkatesh <yuvaraj.venkatesh at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP SCATTER (#222288)
Tosa specification changes in
https://github.com/arm/tosa-specification/pull/78
Commit: 18a8d12cb4075251657519a0cdd5e31d5dcc4fb1
https://github.com/llvm/llvm-project/commit/18a8d12cb4075251657519a0cdd5e31d5dcc4fb1
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/cxx20-module-initializer.cppm
M clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CIR/CodeGenCXX/typeid-should-throw.cpp
M clang/test/CIR/Lowering/calling-conv.cir
M clang/test/CIR/Lowering/module-asm.cir
M clang/test/CIR/Lowering/poison.cir
M clang/test/CIR/Lowering/select.cir
M clang/test/CIR/Lowering/strictfp.cir
M clang/test/CIR/Lowering/ternary.cir
M clang/test/CIR/Tools/warn-default-triple.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/test/CIR/Transforms/lib-opt.cpp
Log Message:
-----------
[CIR] Fix CIR tests by adding a triple/Requires. (#222346)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that. Tests that execute 'clang' in some way are given a triple, ones
that are on .cir files we just add a 'requires'. Some day we should be
able to remove those, but it'll require us to add the cxxabi/etc for
windows.
Commit: 2f704c94bf5c396f33da4684540cb22f38a757cc
https://github.com/llvm/llvm-project/commit/2f704c94bf5c396f33da4684540cb22f38a757cc
Author: Tadeusz <tadeuszjt at protonmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
Log Message:
-----------
[Clang][OpenACC] Fixed getExtValue Call on Invalid Gang Dim (#221502)
**Problem**
When an invalid 'gang dim' value is used in `CheckGangDimExpr`, the
function prints the value into the diagnostic message by calling
`getExtValue`. This function asserts on values that can't fit into a
signed integer.
**Solution**
`APSInt` has a `<<` operator anyway so just use that.
The fix causes the message to print with the following formatting:
```
test.cpp:5:40: error: argument to 'gang' clause dimension must be 1, 2, or 3: evaluated to 18'446'744'073'709'551'574
5 | #pragma acc routine(S::foo) gang(dim : S::foo())
| ^
1 warning and 1 error generated.
```
Fixes #221418
Commit: a5ef934a8d295dc03be3960f2b3744ec2e53238e
https://github.com/llvm/llvm-project/commit/a5ef934a8d295dc03be3960f2b3744ec2e53238e
Author: Alex <filaka771 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/constant-conversion.c
Log Message:
-----------
[clang] Warn on signed char array constant conversion (#203792)
This resolves #181730: fixes a missing `-Wconstant-conversion`
diagnostic for `signed char` array initialization.
Before this change, Clang warned for `signed char foo = 255;` but did
not
warn for `signed char bar[] = {255};`.
The warning suppression helper did not distinguish between `char`,
`unsigned char`, and `signed char` in brace-initialized arrays. Now it
does.
Commit: 2c4c9d84bd948a92bb78b46a1c34044e246fd187
https://github.com/llvm/llvm-project/commit/2c4c9d84bd948a92bb78b46a1c34044e246fd187
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
Log Message:
-----------
[SPIRV] Fix inconsistent operand order for counter resource intrinsic (#221646)
The `llvm.spv.resource.handlefrombinding` intrinsic stores its binding
operands in the order (DescriptorSet, BindingNo, ...). The
`llvm.spv.resource.counterhandlefrombinding` intrinsic should use the
same order.
The `llvm.spv.resource.counterhandlefrombinding` intrinsic is currently
emitted only by the `SPIRVLegalizeImplicitBinding` pass. The pass
previously built its operands in the wrong order, and the instruction
selector repeated the same inversion when emitting decorations.
This change makes the operand order consistent with
`llvm.spv.resource.handlefrombinding`.
Test update closes a coverage gap - there were no tests for explicit
`llvm.spv.resource.counterhandlefrombinding` calls.
Assisted by GPT-5.6 Sol.
Commit: 6b0c1836d05ab22f55ec5b8e76bc797415de10f3
https://github.com/llvm/llvm-project/commit/6b0c1836d05ab22f55ec5b8e76bc797415de10f3
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint-f16.ll
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint.ll
Log Message:
-----------
[RISCV][GlobalISel] Support G_INTRINSIC_LRINT/G_INTRINSIC_LLRINT (#221992)
Add legalizer rules so llvm.lrint/llrint lower to fcvt.{w,l}.{h,s,d}
with FRM_DYN, mirroring the existing G_LROUND/G_LLROUND handling.
Commit: 5524a2192f6d6b29f5be1ff72947e99bf7e27ad9
https://github.com/llvm/llvm-project/commit/5524a2192f6d6b29f5be1ff72947e99bf7e27ad9
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
Log Message:
-----------
[CIR] Add cir.coro.intrinsic.resume/destroy/done Ops (#222210)
Adds CoroResumeOp, CoroDestroyOp, and CoroDoneOp, representing
llvm.coro.resume, llvm.coro.destroy, and llvm.coro.done respectively.
Commit: ffde4cee43edacbf0680a08822c4ce7e16d29857
https://github.com/llvm/llvm-project/commit/ffde4cee43edacbf0680a08822c4ce7e16d29857
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
Log Message:
-----------
[RISCV] Add RV64 RUN lines to orc-b-patterns.ll. NFC (#222424)
Add some i16 and i64 tests.
Commit: ed6de5998d473b30f502979b87531f21c4cd27b4
https://github.com/llvm/llvm-project/commit/ed6de5998d473b30f502979b87531f21c4cd27b4
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/ObjectYAML/COFFEmitter.cpp
Log Message:
-----------
[ObjectYAML] Fold layoutCOFF into writeCOFF (#221683)
Fold the COFF layout pass into writeCOFF so the
ContiguousBlobAccumulator tracks section offsets and sizes as data is
written. Reserve and fill in the optional header and section table once
the section layout is final.
This is almost NFC, except when the output size exceeds the limit.
Commit: 1474da952ed7d2b7be855a07d5fcca2dfc46b8fb
https://github.com/llvm/llvm-project/commit/1474da952ed7d2b7be855a07d5fcca2dfc46b8fb
Author: Yuta Saito <kateinoigakukun at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
Log Message:
-----------
[ASan] Recognize WASI as a platform with 64-bit off_t (#144441)
WASI defines `off_t` as 64-bit signed integers to support files larger
than 2 GiB.
https://github.com/WebAssembly/wasi-libc/blob/wasi-sdk-25/libc-bottom-half/headers/public/__typedef_off_t.h
Commit: 7cdf4c8bc306e0f1a0022898e70ab63a7c466ebf
https://github.com/llvm/llvm-project/commit/7cdf4c8bc306e0f1a0022898e70ab63a7c466ebf
Author: Mike Aizatsky <maizatskyi at cloudflare.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
A compiler-rt/test/tsan/Linux/epoll_oneshot_norace.cpp
Log Message:
-----------
[tsan] recognize EPOLL_CTL_MOD with EPOLLONESHOT (#220304)
Handles it the same way as EPOLL_CTL_ADD
Commit: 2e2c316fd5d7e8cff94703992928d5882d00478e
https://github.com/llvm/llvm-project/commit/2e2c316fd5d7e8cff94703992928d5882d00478e
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
M compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
Log Message:
-----------
[libFuzzer] Clamp `ConsumeFloatingPointInRange` result to `max` (#221552)
Fixes #65312. Floating point rounding could push the result above `max`,
or even overflow to infinity, so we clamp it instead.
---------
Co-authored-by: Dan Blackwell <danblackwell95 at gmail.com>
Commit: 91d7ee658c9cd67a7b95df4be51be553bfd9c549
https://github.com/llvm/llvm-project/commit/91d7ee658c9cd67a7b95df4be51be553bfd9c549
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/wcslen-1.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation for wcslen folding (#222475)
Commit: 92c1693b574850644535dcb8e18a70fdd115dc94
https://github.com/llvm/llvm-project/commit/92c1693b574850644535dcb8e18a70fdd115dc94
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Remove unused MC insts in isPackedSingleSGPR64BitInst (#222463)
There is no opsel support for these instructions, and thus we do not have
to manipulate opsel at MC layer. As a result, isPackedSingleSGPR64BitIns
is currently only used before pseudo-expansion. So we remove MC instruction
check inside.
Commit: 18a61f5a44dda16720754584aee95cac652e3646
https://github.com/llvm/llvm-project/commit/18a61f5a44dda16720754584aee95cac652e3646
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Move feature LDSBankCount64 to specific subtargets. NFC (#222469)
Commit: 7c9031580a129b0488a81cb8c2e668920bebb5a2
https://github.com/llvm/llvm-project/commit/7c9031580a129b0488a81cb8c2e668920bebb5a2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[GitHub] Bump CI Container Runner Version to 2.337.0 (#222480)
This is the latest version and keeps us ahead of the relatively short
runner support horizon.
Commit: a2e2038fc932039ee5e101432b4a549c92fdf9c8
https://github.com/llvm/llvm-project/commit/a2e2038fc932039ee5e101432b4a549c92fdf9c8
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
[AMDGPU] Add missing attributes to llvm.amdgcn.init.whole.wave (#222493)
`llvm.amdgcn.init.whole.wave` only sets the EXEC mask and reports
whether the lane was active on entry. It never calls into the module,
never frees memory, and always returns, so it can carry `nocallback`,
`nofree`, and `willreturn`.
The neighboring `llvm.amdgcn.init.exec` and
`llvm.amdgcn.init.exec.from.input` already have all three; this brings
`init.whole.wave` in line and lets the attributor propagate them to
callers.
Commit: e32ffd8b546f4a743812756efe11a7424cf9de5f
https://github.com/llvm/llvm-project/commit/e32ffd8b546f4a743812756efe11a7424cf9de5f
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/IR/invalid-offload-container.cir
A clang/test/CIR/IR/offload-container.cir
Log Message:
-----------
[CIR] Add offload container attribute (#206576)
Introduce `cir.offload.container`, a CIR dialect unit attribute that marks an
MLIR module as holding a host CIR module and its associated device CIR
modules in one IR unit while later offload merge/split pipeline passes need
visibility into both sides.
The marked module's body holds nested `builtin.module` operations. Each
nested module is tagged with `cir.offload.kind`, represented by the new
`#cir.offload_kind<host>` / `#cir.offload_kind<device>` enum attribute.
The structural contract expected by the follow-up pipeline work is
enforced in `CIRDialect::verifyOperationAttribute`, following the
`gpu.container_module` precedent:
* `cir.offload.container` is a unit attribute attached to a
`builtin.module`
* the first nested module is the host module
* all following nested modules are device modules
* the body contains only nested `builtin.module` operations
* at least one device module is present
* `cir.offload.kind` is only ever attached to a `builtin.module`
This patch only introduces the IR representation and verifier tests. The
passes that create, consume, or split this container are left to follow-up
patches.
This is part of the Host-Device CIR Combine Pipeline work discussed on
Discourse:
[discourse.llvm.org/t/gsoc-2026-host-device-cir-combine-pipeline-project-idea-discussion/89623](https://discourse.llvm.org/t/gsoc-2026-host-device-cir-combine-pipeline-project-idea-discussion/89623)
Commit: e01829dfee891cfaf61752c926b0532aaa261ad2
https://github.com/llvm/llvm-project/commit/e01829dfee891cfaf61752c926b0532aaa261ad2
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[Clang] Avoid unnecessary overload resolution when building RecoveryExpr (#222296)
When overload resolution fails, we tried RecoveryCallExpr which
ended up performing duplicate overload resolutions, where the template
argument deduction can be expensive.
This patch removes those 'known' invalid overload candidates before
RecoveryCallExpr.
Commit: f1245b6a7b2fb2e5c96434b9fb3107b4cf873d10
https://github.com/llvm/llvm-project/commit/f1245b6a7b2fb2e5c96434b9fb3107b4cf873d10
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/test/CodeGen/Hexagon/anti-dep-partial.mir
Log Message:
-----------
[CodeGen] Skip pseudo instructions in AggressiveAntiDepBreaker (#222271)
`ScheduleDAGInstrs` does not create SUnits for debug or pseudo
instructions. The aggressive anti-dependency breaker only skipped debug
instructions, so encountering a pseudo such as `PSEUDO_PROBE`
dereferenced a null SUnit.
Skip both debug and pseudo instructions and add a Hexagon regression
covering the existing aggressive anti-dependency path with legacy and
new machine pass managers.
Split from #221984 in response to review.
Commit: cdf59b384a48610a6450011279005b1e34f8572d
https://github.com/llvm/llvm-project/commit/cdf59b384a48610a6450011279005b1e34f8572d
Author: Ritanya-B-Bharadwaj <ritanya.b.bharadwaj at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/threadset.f90
A flang/test/Lower/OpenMP/threadset.f90
A flang/test/Semantics/OpenMP/threadset-clause-v60.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-task-threadset.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-threadset.mlir
Log Message:
-----------
[Flang][OpenMP] Add lowering and translation for the threadset clause (#215513)
Adds Flang lowering, and LLVM IR translation for the OpenMP 6.0 `threadset` clause (spec 14.8) on `task` and `taskloop`.
- Add a `ThreadsetPolicy` enum (`omp_pool`/`omp_team`) and clause on `omp.task` and `omp.taskloop.context`, lowered from Flang.
- Translate `threadset(omp_pool)` to the free-agent task flag (`0x80`); `omp_team` leaves it unset, matching clang.
- Add semantics, lowering, and translation tests.
Related: https://github.com/llvm/llvm-project/pull/135807,
https://github.com/llvm/llvm-project/pull/144409,
https://github.com/llvm/llvm-project/pull/169856
Commit: feabb30f0feef2361ac301618ff56566289919e7
https://github.com/llvm/llvm-project/commit/feabb30f0feef2361ac301618ff56566289919e7
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
A llvm/test/CodeGen/SystemZ/postra-sched-filter.mir
Log Message:
-----------
[MISched] Apply debug filters before starting a block (#222270)
Apply the `misched-only-func` and `misched-only-block` filters before
calling `startBlock`. This avoids entering a target scheduling strategy
for a filtered block without a matching `finishBlock`/`leaveMBB` call.
Add a SystemZ post-RA scheduler regression that checks a filtered block
does not contribute hazard-recognizer state.
Split from #221984 in response to review.
Commit: 6594e8248e7d9dae26b7909d8c5eec4784d55000
https://github.com/llvm/llvm-project/commit/6594e8248e7d9dae26b7909d8c5eec4784d55000
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
Log Message:
-----------
[AMDGPU] Reject DPP combine when old is narrower than dst (#217894)
Old is copied from the mov dst class, but the combined dst can be wider
(e.g. V_CVT_F64_I32), making old illegal for it
Commit: 4acc5f1ff8d181bb948a60b7eb2a6371e241051e
https://github.com/llvm/llvm-project/commit/4acc5f1ff8d181bb948a60b7eb2a6371e241051e
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move clusterSortPtrAccesses to SLPMemoryUtils (#222235)
Move the BoUpSLP-independent pointer-clustering sort out of
SLPVectorizer.cpp into SLPVectorizer/SLPMemoryUtils.{h,cpp}.
clusterSortPtrAccesses reads the file-local RecursionMaxDepth cl::opt
via getUnderlyingObject; the option stays static in SLPVectorizer.cpp
and the moved helper takes its value as an explicit unsigned parameter
(also captured by the local comparison lambda). Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI
Commit: 34a9870a9851ce16686282fa4d4a19bf477d5934
https://github.com/llvm/llvm-project/commit/34a9870a9851ce16686282fa4d4a19bf477d5934
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/bindings/interface/SBCompileUnitDocstrings.i
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/source/API/SBCompileUnit.cpp
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
Log Message:
-----------
[lldb] Add SBCompileUnit::GetIsOptimized (#222403)
Expose Module::GetIsOptimized through the SB API so clients can tell
whether a compile unit was built with optimization. This change is
motivated by lldb-dap, where I want to extend the protocol::CompileUnit
with this information.
The new tests build the same source with and without -O1, so the test
case can no longer share a build with the others.
Commit: 4d5358b1d224b7eba12b6868e2e112487b876353
https://github.com/llvm/llvm-project/commit/4d5358b1d224b7eba12b6868e2e112487b876353
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
Log Message:
-----------
[SLP][modularisation][NFC] Move BaseShuffleAnalysis to SLPShuffleAnalysis.h (#222236)
Move the BoUpSLP-independent shuffle-analysis base class out of
SLPVectorizer.cpp into a new header-only
SLPVectorizer/SLPShuffleAnalysis.h. BoUpSLP::ShuffleCostEstimator and
BoUpSLP::ShuffleInstructionBuilder keep deriving from it.
createShuffle read the file-local SLPReVec cl::opt in an assert; the
option stays static in SLPVectorizer.cpp and the moved template takes
its value as an explicit bool parameter. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI.
Commit: 90cebef1411617fc3eedd359bdf00cb44b1c2439
https://github.com/llvm/llvm-project/commit/90cebef1411617fc3eedd359bdf00cb44b1c2439
Author: Addmisol <addmisol9 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
Log Message:
-----------
[MemCpyOpt] Remove libcall availability checks for memory intrinsics (#198558)
Fixes #197683
- Delete the enable-memcpyopt-without-libcalls flag from MemCpyOptimizer
- Remove libcall availability checks in processStoreOfLoad() and
processStore()
- Remove the flag from CUDA/OpenMP toolchain in Clang
- Update no-libcalls.ll test to expect optimizations on all targets
cc @arsenm
Signed-off-by: addmisol <addmisol9 at gmail.com>
Commit: 4cbc99688044679498075d5b2da5e9444832e82a
https://github.com/llvm/llvm-project/commit/4cbc99688044679498075d5b2da5e9444832e82a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
M lldb/tools/lldb-dap/EventHelper.cpp
Log Message:
-----------
[lldb-dap] Set stopped event text for signals and instrumentation (#222394)
DAP maps signals and instrumentation to reason 'exception'. Populate
'text' with the signal or runtime name to distinguish stop types. For
example, text contains the specific signal name (e.g., "SIGABRT") or
instrumentation runtime name (e.g., "AddressSanitizer").
Commit: d54f5e540685516fef383f8fe7cd0ef45382770b
https://github.com/llvm/llvm-project/commit/d54f5e540685516fef383f8fe7cd0ef45382770b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/source/API/SBCompileUnit.cpp
M lldb/source/Symbol/SymbolFile.cpp
M lldb/test/API/python_api/compile_unit/Makefile
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
A lldb/test/API/python_api/compile_unit/other.c
Log Message:
-----------
[lldb] Add SBCompileUnit::GetIDInModule (#222470)
Expose an ID that identifies a compile unit within its module so clients
can name a CU across API calls and look it up again with
SBModule::GetCompileUnitAtIndex. The user ID is not usable for this:
with a Darwin debug map every compile unit reports uid 0.
CompileUnit stores the index, set by SymbolFileCommon when a CU is
parsed or installed at a given slot.
Commit: f590dfa8e989652cdd906d6ec74ebfe7f8d8d869
https://github.com/llvm/llvm-project/commit/f590dfa8e989652cdd906d6ec74ebfe7f8d8d869
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
A llvm/test/CodeGen/X86/regallocfast-undef-tied-use.mir
Log Message:
-----------
[RegAllocFast] Give an undef tied use the register of its tied def (#222249)
X86TargetLowering::emitSetJmpShadowStackFix zeroes a register by
building an XOR whose two uses are undef reads of its own def (per
MachineOperand.h "... reading the same dont-care value"). Def processing
frees a def whose tied use is undef before the uses are allocated, so
allocVirtRegUndef() no longer finds the virtual register and takes the
head of the allocation order instead. -verify-machineinstrs would fail:
```
renamable $rcx = XOR64rr undef renamable $rax(tied-def 0), undef renamable $rax, implicit-def dead $eflags
*** Bad machine code: Tied physical registers must match. ***
```
Take the register from the tie, and rewrite the instruction's other
reads of the value with it so that they keep agreeing on one register.
Aided by Opus 5
Commit: 6f54fe6b6fb22f8a335fd19b94049fc769dfea25
https://github.com/llvm/llvm-project/commit/6f54fe6b6fb22f8a335fd19b94049fc769dfea25
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
Log Message:
-----------
[BOLT][AArch64][Android] Recover from dump failure instead of exit (#221292)
Embedded in Android app, failed assert() or reportError() during a BOLT
profile dump should not exit the host process. Install a recovery point
in __bolt_instr_data_dump(), so any failure can longjmp back, return a
non-zero value to caller, and set a flag so later dumps can be skipped.
Clang does not support __builtin_setjmp/longjmp for the AArch64 Android
target, so add a minimal hand-written setjmp/longjmp in sys_aarch64.h.
Since the majority Android apps run on AArch64 CPUs, while at this I
defined `ANDROID_AARCH64` and replaced `__ANDROID__` with it in the
instrumentation runtime code.
Assisted-by: opus
Commit: ab618ec375ffe8f2474bac9e4ac82d1f5330fd46
https://github.com/llvm/llvm-project/commit/ab618ec375ffe8f2474bac9e4ac82d1f5330fd46
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Gate 64-bit VGPR copy lowering on operand register class in copyPhysReg (#219562)
copyPhysReg lowers a 64-bit VGPR copy to V_MOV_B64_e32 / V_PK_MOV_B32
when available. Emit the wide move only when the destination and source
are members of the move's HwMode-resolved operand classes; otherwise
fall through to the element-wise V_MOV_B32 expansion, to respect
alignment requirements.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 93ad0d2dbd1d9a27797aefb028ee210b91c2f29d
https://github.com/llvm/llvm-project/commit/93ad0d2dbd1d9a27797aefb028ee210b91c2f29d
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
Log Message:
-----------
[AMDGPU] Restructure VGPR-alignment verifier tests, NFC (#219229)
Rewrite verify-gfx90a-aligned-vgprs.mir and verify-ds-gws-align.mir so each case
documents inline what makes it invalid, and match the verifier's fuller output -
the "*** Bad machine code ***" kind and the "- instruction:" line - instead of a
single message fragment. Pure test restructure with no functional change, so the
follow-up commit that derives alignment from the operand register class shows
only the change in diagnostic wording.
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 1646fcc603b9eea03c6f09a3ed6be25260d3e875
https://github.com/llvm/llvm-project/commit/1646fcc603b9eea03c6f09a3ed6be25260d3e875
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Add myself as NVPTX backend co-maintainer (#215627)
I've been contributing to the NVPTX backend (TableGen, ISel lowering)
and would also like to help maintain it going forward.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: a700f8e71cf4cdf37330aecc41445af2ff4dd105
https://github.com/llvm/llvm-project/commit/a700f8e71cf4cdf37330aecc41445af2ff4dd105
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Semantics/OpenMP/do-concurrent-pure-version.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure.f90
M flang/test/Semantics/OpenMP/pure-procedure.f90
Log Message:
-----------
[FLANG][OpenMP] Handling pure directives in DO CONCURRENT (#216642)
A directive with the PURE property is allowed inside a DO CONCURRENT
construct starting with OpenMP 6.0.
Commit: 17caaa3bdbb229aa63c56864c1452100cfe36f39
https://github.com/llvm/llvm-project/commit/17caaa3bdbb229aa63c56864c1452100cfe36f39
Author: SharonXSharon <xiaoranxu.nju at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/unique-internal-linkage-names.cpp
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.c
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.cpp
Log Message:
-----------
Revert "[clang] Revert "Disable Unique Internal Linkage Names for internal global vars." (#219261)" (#222486)
This reverts commit 9abbc9183d2231c2e44198100a6cd22ef66e2eb8.
Will reland with a proper fix of the GNU AsmLabelAttr
Co-authored-by: Sharon Xu <sharonxu at fb.com>
Commit: 3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8
https://github.com/llvm/llvm-project/commit/3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/X86/icp-pic.s
Log Message:
-----------
[BOLT][ICP] Use PC-relative instructions for x86 PIC binaries in ICP (#216587)
Currently, BOLT x86 ICP optimization inserts an immediate-to-register
comparison instruction, which forces the use of 32-bit signed (32S)
relocations due to ABI limitations. This behavior does not align well
with the conventions of PIC/PIE binaries and **makes it highly prone to
JITLink relocation overflow errors when dealing with large binaries.**
Therefore, this patch introduces an additional lea instruction for the
x86 architecture to leverage PC-relative (32PC) addressing. This change
is intended to apply by default to PIC binaries, or when specific
options are provided.
Commit: 6fbfc9261c8f453e346773200a13458a170a9a8c
https://github.com/llvm/llvm-project/commit/6fbfc9261c8f453e346773200a13458a170a9a8c
Author: Peiqi Li <voyager.lpq at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
M clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
Log Message:
-----------
[clangd] Enable query-based custom checks (#216336)
Enable query-based custom checks in clangd behind a new `Diagnostics.ClangTidy.ExperimentalCustomChecks` configuration option.
Custom checks are registered from the per-file clang-tidy options and remain subject to clangd's `FastCheckFilter` policy.
Fixes #206696
Assisted by GPT-5.6
Commit: 9e68cbda7816edded93e2c3a4dd03af5d4700026
https://github.com/llvm/llvm-project/commit/9e68cbda7816edded93e2c3a4dd03af5d4700026
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx.c
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
A llvm/test/CodeGen/NVPTX/mbarrier_layout_sm90_ptx93.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm_trait.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_check_layout.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_init.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
Log Message:
-----------
[LLVM][NVPTX][MLIR] Support layouts in mbarrier.init and add mbarrier.check_layout (#217252)
This commit adds LLVM NVPTX and MLIR NVVM support for the mbarrier layout extensions:
- llvm.nvvm.mbarrier.init with trailing immarg `layout` operand, and nvvm.mbarrier.init a matching `layout` attribute (default to 0) Layout 0 is the default in-memory layout and is emitted as a plain mbarrier.init; layout 1 is emitted as mbarrier.init.layout::v1.
- llvm.nvvm.mbarrier.check_layout / nvvm.mbarrier.check_layout, lowering to mbarrier.check_layout.layout::v{0,1}.
Only the layout::v1 form of mbarrier.init and mbarrier.check_layout require PTX ISA 9.3 and sm_90
llvm.nvvm.mbarrier.init{.shared } are also merged into a pointer-overloaded llvm.nvvm.mbarrier.init with calls to either older forms auto-upgraded
Please refer [PTX ISA](https://docs.nvidia.com/cuda/developer-preview/13.4/parallel-thread-execution/index.html)
for more details
Assisted by: Claude Code (Opus 5)
Commit: b89710b49c4a2da1f98ba4b407dcfecaaa90246a
https://github.com/llvm/llvm-project/commit/b89710b49c4a2da1f98ba4b407dcfecaaa90246a
Author: David Green <david.green at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/overflow-vec.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
Log Message:
-----------
[AArch64][GlobalISel] Lower vector overflow intrinsics (#222091)
As we have no native support for vector version of these intrinsics they
should be lowered.
Commit: a91c7395c3fb1a37f69f7d8fb0e78c048faf6cb7
https://github.com/llvm/llvm-project/commit/a91c7395c3fb1a37f69f7d8fb0e78c048faf6cb7
Author: PushkarSingh <149073046+iitianpushkar at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[Lifetime Safety] Name operator calls in alias-chain diagnostics (#221803)
This updates Lifetime Safety alias-chain diagnostics to identify
overloaded operator and conversion calls instead of describing them
generically as an `expression`.
Previously, these calls were reported as `expression aliases the storage
of ...`, which could make it unclear which operation introduced the
alias. The diagnostic now reports the callee using the existing
diagnostic name printer, producing descriptions such as:
- `result of call to 'operator->'`
- `result of call to 'operator()'`
- `result of call to 'operator basic_string_view'`
Template arguments are preserved for operator function-template
specializations. For example:
- `result of call to 'operator+<const int>'`
- `result of call to 'operator-<__gnu_cxx::basic_iterator<const int>>'`
This makes each aliasing step explicit and identifies the particular
call responsible for propagating the alias.
References to
[#220248#discussion_r3905817437](https://github.com/llvm/llvm-project/pull/220248#discussion_r3905817437)
Commit: be215a25f00139d68517589d78a79c3aa7a7eb26
https://github.com/llvm/llvm-project/commit/be215a25f00139d68517589d78a79c3aa7a7eb26
Author: Ryan VanderMeulen <ryanvm at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/extract_symbols.py
Log Message:
-----------
[Windows] Don't export clang::interp symbols for plugins (#221295)
With `LLVM_EXPORT_SYMBOLS_FOR_PLUGINS=ON`, `clang.exe` built from the
23.x release branch exports 66679 symbols on x86_64 Windows, over the
65535 limit of the PE export table, so it no longer links:
```
lld-link: error: too many exported symbols (got 66679, max 65535)
```
For comparison, the same configuration on 22.1.8 exports 65465 symbols,
so the headroom was already almost gone.
`clang::interp`, the constant expression bytecode interpreter, accounts
for roughly 4500 of the exported symbols (counted with `llvm-readobj
--coff-exports` on a linked aarch64 23.1.0 `clang.exe`). Its headers
live in `clang/lib/AST/ByteCode` and are not installed; the only mention
in a public header is the forward declaration of `interp::Context` in
`ASTContext.h`. A plugin cannot call into it, so there is no reason to
keep exporting it. Filtering it out follows the existing
`dump`/`dumpColor`/`printPretty` exclusions in
`should_keep_microsoft_symbol`.
Related: #87865 (open; earlier rounds #60109, #56109). This does not get
the MSVC-with-examples configuration from that issue under the limit by
itself, but it removes the largest block of symbols that can never be
used by a plugin, and is what gets the Firefox clang 23 toolchain
(x86_64-pc-windows-msvc, X86;ARM;AArch64;WebAssembly,
clang+lld+clang-tools-extra) from 66679 to roughly 62100 exports.
---
**AI tool use disclosure** (per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html)): this change was
developed with Claude Code assisting in the analysis and drafting. The
root cause was established against real 23.1.0 binaries and libraries,
the patch was reviewed and tested by the author in Firefox's CI, and the
author is accountable for and able to answer questions about it. Commits
carry an `Assisted-by:` trailer.
Commit: a9e26aca790bb0a45f90598223597a9ce2b2b763
https://github.com/llvm/llvm-project/commit/a9e26aca790bb0a45f90598223597a9ce2b2b763
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Avoid `std::optional<VPValue *>` (NFC) (#222352)
`VPValue *` is already nullable, the `std::optional` is not needed.
Commit: bc6c76a4d4f8b4f6d5e9b663736703f91fcbb6ed
https://github.com/llvm/llvm-project/commit/bc6c76a4d4f8b4f6d5e9b663736703f91fcbb6ed
Author: Ryan VanderMeulen <ryanvm at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A llvm/test/tools/extract_symbols/Inputs/lib-itanium.s
A llvm/test/tools/extract_symbols/Inputs/lib-msvc.s
A llvm/test/tools/extract_symbols/Inputs/user-itanium.s
A llvm/test/tools/extract_symbols/Inputs/user-msvc.s
A llvm/test/tools/extract_symbols/lit.local.cfg
A llvm/test/tools/extract_symbols/registry-itanium.test
A llvm/test/tools/extract_symbols/registry-microsoft.test
M llvm/utils/extract_symbols.py
Log Message:
-----------
[Windows] Export Registry<T> members and accessors for plugins again (#221296)
Since #185141 reworked `llvm::Registry`, the registered-node list lives
behind the explicitly specialized
`llvm::detail::getRegistryLinkListInstance<R>()` accessor defined by
`LLVM_DEFINE_REGISTRY`, and the `Head`/`Tail` static data members that
used to be referenced across objects are gone (#163391 had special-cased
those).
`extract_symbols.py` handles neither. The accessor is a `??$` function
template specialization, which the script drops on the assumption that
it can be instantiated in the importing translation unit; here it
cannot, it is defined once by `LLVM_DEFINE_REGISTRY`. And `Registry<T>`
members are only exported when some object references the `Registry`
template, which nothing does anymore because every use goes through the
accessor. On a static clang.exe built with
`LLVM_EXPORT_SYMBOLS_FOR_PLUGINS`, the export table went from 11
`Registry<clang::PluginASTAction>` symbols on 22.1.8 to zero on 23.1.0,
and linking a plugin fails:
```
lld-link: error: undefined symbol: __declspec(dllimport) public: static void __cdecl llvm::Registry<class clang::PluginASTAction>::add_node(class llvm::Registry<class clang::PluginASTAction>::node *)
>>> referenced by host_Registration.obj:(_GLOBAL__sub_I_Registration.cpp)
```
Keep the accessor specializations, and treat a reference to an accessor
as a reference to the `Registry` template so its explicitly instantiated
members are exported as they were before. Verified on the 23.1.0 static
libraries: `Registry<PluginASTAction>::add_node`, the node/iterator
members and the accessor come back for every registry (PluginASTAction,
PragmaHandler, GCStrategy, GCMetadataPrinter, ...), 141 symbols in total
in the Itanium run over the clang libraries. The `Head`/`Tail` rule from
#163391 no longer matches anything and is dropped.
Related: #163367 / #163391 (the previous Registry export fix), #87865.
---
**AI tool use disclosure** (per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html)): this change was
developed with Claude Code assisting in the analysis and drafting. The
root cause was established against real 23.1.0 binaries and libraries,
and the fix was verified by running extract_symbols.py over the 23.1.0
clang static libraries (the Registry members and accessors come back)
and against MSVC-mangled test objects; Firefox's Windows clang-plugin
and mozsearch builds link and run against a clang.exe built with it.
`llvm/test/tools/extract_symbols/` adds lit coverage for both manglings.
The author reviewed the change and is accountable for and able to answer
questions about it. Commits carry an `Assisted-by:` trailer.
Commit: 4d689e68a8e3849cdeb3dae026c07c5f85bdb1b3
https://github.com/llvm/llvm-project/commit/4d689e68a8e3849cdeb3dae026c07c5f85bdb1b3
Author: David Green <david.green at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
Log Message:
-----------
[AArch64][GlobalISel] Use integer types for widening shift icmp (#222257)
Commit: 4e22a6ef80ac0ac234acca473706cc5cce17d6c4
https://github.com/llvm/llvm-project/commit/4e22a6ef80ac0ac234acca473706cc5cce17d6c4
Author: Oren Azad <orenazad at berkeley.edu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/test/tools/llvm-rc/helpmsg.test
A llvm/test/tools/llvm-rc/show-includes.test
M llvm/tools/llvm-rc/Opts.td
M llvm/tools/llvm-rc/ResourceFileWriter.cpp
M llvm/tools/llvm-rc/ResourceFileWriter.h
M llvm/tools/llvm-rc/llvm-rc.cpp
Log Message:
-----------
[llvm-rc] Add /showIncludes dependency reporting (#217102)
Add `/showIncludes` support to `llvm-rc` so build systems can discover
the files a resource compile depends on. This enables Ninja and other
build systems to track and correctly recompile the `.rc` file when
inputs change.
Two kinds of dependencies are reported:
- Preprocessor header dependencies, by forwarding `--show-includes` to
the clang preprocessor.
- Resource files, (bitmaps, icons, manifests, etc) that are used in the
resource file.
The output format matches the `/showIncludes` format that cl.exe and
clang-cl.exe use, and that Ninja can consume natively via `deps=msvc`.
Assisted-by: Anthropic Claude Code (Opus 4.8)
Assisted-by: OpenAI Codex (GPT 5.6 Sol)
Commit: a9f7095c26175f363282ed2cdfb52acada3c2d93
https://github.com/llvm/llvm-project/commit/a9f7095c26175f363282ed2cdfb52acada3c2d93
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/records.cpp
M clang/test/CodeGen/pr4349.c
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
[clang][bytecode] Use opaque pointers for decl-based dummy pointers (#220917)
This uses the recently introduced opaque pointers for what we used to
use dummy pointers for, if the base of the pointer is a declaration.
This of course means we see opaque pointers in a lot more places.
However, we don't need to actually allocate anything for their data
anymore, resulting in a lot fewer allocations for such pointers.
Commit: 96295a1412f9afbee9d4a3c2701e83f5a529a9cc
https://github.com/llvm/llvm-project/commit/96295a1412f9afbee9d4a3c2701e83f5a529a9cc
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Parse/ParseExpr.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
Log Message:
-----------
[Clang] Fix a crash when forming a type from an indexed TTP. (#222326)
Unreported 24 issue so no release note.
Commit: ab7245d75cc97db490d73037b5f021a561381d0d
https://github.com/llvm/llvm-project/commit/ab7245d75cc97db490d73037b5f021a561381d0d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_fmod.cl
Log Message:
-----------
libclc: Update fmod implementations (#222369)
This was originally ported from rocm device libs in
93af966747b59d37c57312a0c0242151076c072b. Merge in more
recent changes. This should also approximately match the default
expansion in ExpandIRInsts
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 672843a3f2ee2aaaed0463ec9064b6ccea2a5d4d
https://github.com/llvm/llvm-project/commit/672843a3f2ee2aaaed0463ec9064b6ccea2a5d4d
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/minmax_element.h
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element_comp.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of parallel std::minmax_element() based on parallel reduce (#221572)
This PR adds an implementation of parallel `std::minmax_element()` based
on parallel reduce.
The implementation formulates `minmax_element` as a reduction of
iterators over the input range.
The iterators are first transformed into a min-max iterator pair.
The reduction is provided in two forms: 2-element reduction that makes
an iterator pair pointing to a smaller and a greater value, and a
range-based reduction with init value.
The latter delegates the heavy-lifting to the serial implementation of
`std::minmax_element()`.
Part of #99938.
Commit: bab513bedcf5c7582a24c97976042af4dba19c01
https://github.com/llvm/llvm-project/commit/bab513bedcf5c7582a24c97976042af4dba19c01
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
Log Message:
-----------
[AMDGPU] Use new CSR cost calculation (#219220)
So far, AMDGPU backend relied on the legacy calculation for the cost of
the first use of a callee-save register. This legacy path scales the
entry block frequency by a fixed value, making a comparison with
alternatives, e.g., rematerialization, difficult due to different
scales. One example for that is the work in
https://github.com/llvm/llvm-project/pull/206756, where comparison of
rematerialization cost and first use of a CSR is hard to compare due to
the different scales.
Change to instead use the new calculation path with different target
hooks for better comparability.
As the new scale is different, the cost was changed. The new cost value
accounts for various factors impacting CSR cost.
This change (with different cost value) was originally part of
https://github.com/llvm/llvm-project/pull/202007. Another part of that
PR was already extracted into
https://github.com/llvm/llvm-project/pull/214857.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 0573ec95004aad9970129dce97d3d3ef34aba978
https://github.com/llvm/llvm-project/commit/0573ec95004aad9970129dce97d3d3ef34aba978
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
M mlir/test/mlir-lsp-server/definition.test
M mlir/test/mlir-lsp-server/diagnostics.test
Log Message:
-----------
[mlir][lsp] Handle unrepresentable file locations (#220913)
Commit: 51daef2bd9d2aadffa2fb0b9abd981b84e616e31
https://github.com/llvm/llvm-project/commit/51daef2bd9d2aadffa2fb0b9abd981b84e616e31
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
Log Message:
-----------
X86: Mark EFLAGS dead on MOV32r0 emitted outside SelectionDAG (#222464)
Currently these get set by LiveVariables after the fact, but
ideally we would not rely on that since it's long overdue for
deletion.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 3b99e79991bede38fb18e0169df3009ce30e0c1d
https://github.com/llvm/llvm-project/commit/3b99e79991bede38fb18e0169df3009ce30e0c1d
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/Transforms/CategoryToNamedOp.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Bufferization/canonicalize.mlir
M mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
R mlir/test/Dialect/Linalg/linalg-morph-category-ops.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
M mlir/test/Dialect/Linalg/linalg-morph-multi-step.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/named-ops-fail.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
M mlir/test/Dialect/Linalg/scalable-unpack-producer-fusion.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-generalize.mlir
R mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-unary.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/python/dialects/linalg/opdsl/test_core_named_ops.py
Log Message:
-----------
[MLIR][Linalg] Remove unary named ops (#220905)
Remove ops, change tests to elementwise to continue working as is.
Ref:
https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531
Assisted by: Claude Opus
Commit: 70f5696eaf0280812fb4e3888875538634d806f1
https://github.com/llvm/llvm-project/commit/70f5696eaf0280812fb4e3888875538634d806f1
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/lib/Dialect/Linalg/Transforms/CategoryToNamedOp.cpp
M mlir/lib/Dialect/Linalg/Transforms/FoldAddIntoDest.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Arith/sharding-propagation.mlir
M mlir/test/Dialect/Linalg/block-pack-matmul.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
M mlir/test/Dialect/Linalg/fold-add-into-dest.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
R mlir/test/Dialect/Linalg/linalg-morph-multi-step.mlir
M mlir/test/Dialect/Linalg/named-ops-fail.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-binary.mlir
M mlir/test/Dialect/SparseTensor/encoding_with_symbols.mlir
M mlir/test/Dialect/SparseTensor/external_after_codegen.mlir
M mlir/test/Dialect/Transform/test-promote-tensors.mlir
M mlir/test/Interfaces/TilingInterface/query-fusability.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Interfaces/TilingInterface/tile-fuse-and-yield-using-interface.mlir
Log Message:
-----------
[MLIR][Linalg] Remove binary named ops (#220912)
Remove ops, change tests to elementwise to continue working as is.
Depends on the unary removal branch. #220905
Ref:
https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531
Assisted by: Claude Opus
Commit: 80164074c01fead28cbf013861eeab23d277bbaf
https://github.com/llvm/llvm-project/commit/80164074c01fead28cbf013861eeab23d277bbaf
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Linalg/Transforms/CategoryToNamedOp.cpp
M mlir/lib/Dialect/Linalg/Transforms/MorphOps.cpp
R mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
R mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
R mlir/test/Dialect/Linalg/named-ops-fail.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-binary.mlir
Log Message:
-----------
[MLIR][Linalg] Remove Linalg named ops (#220916)
Removes the named ops from the Linalg dialect.
I have also updated the ElementwiseOp builder to simplify the default
case: kind + no affine map.
Depends on both unary and binary removal branches. #220905 #220912
This PR also has the final cleanup, which turned out to be simple
enough.
Ref:
https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531
Assisted by: Claude Opus
Commit: 404ceba2628b7f925ce650b63e1ea90440927481
https://github.com/llvm/llvm-project/commit/404ceba2628b7f925ce650b63e1ea90440927481
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/neon-implicit-zero-filling.ll
Log Message:
-----------
[AArch64][NEON] Fold insert(zero, extract(X, 0), 0) -> X when X is known to zero lanes 1-N (#213940)
Add patterns for NEON across-lane reductions whose scalar result
is inserted into lane zero of a zero vector.
This is valid because these instructions place their result in lane zero
and
clear the remaining lanes.
Limit this change to matching input and result vector types. Mixed
vector
sizes and scalar conversions are not part of this PR.
Handle llvm.vector.reduce.add.v2i64 separately because it lowers to
ADDP.
NEON has no equivalent instruction for v2i64 signed or unsigned min/max
reductions, so they cannot use this fold. Double-precision
floating-point
reductions are already handled by pairwise instruction patterns.
Commit: 182f0ea1f8228c893093dabe824f9ad3eea81a60
https://github.com/llvm/llvm-project/commit/182f0ea1f8228c893093dabe824f9ad3eea81a60
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/test/fuzzer/stop-file.test
Log Message:
-----------
[libFuzzer] Modify stop-file.test to support remote devices (#222012)
Currently this test fails when running on remote devices because the
'rm' command only removes the file from the host, and the second part of
the test expects the file to have been removed. This patch changes the later
run command to point to a non-existent file in order to work around this.
rdar://186683123
Commit: 35a6d33ca2f330c6a45588e5bd907f3729bc6011
https://github.com/llvm/llvm-project/commit/35a6d33ca2f330c6a45588e5bd907f3729bc6011
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
M llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Remove deprecated getArchAttr and ArchFeatures TableGen (#222462)
Everything should now use getFeatureBitset*
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 246beeb1eef7344750419fd1f584019f7c62b750
https://github.com/llvm/llvm-project/commit/246beeb1eef7344750419fd1f584019f7c62b750
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
Log Message:
-----------
[BuildLibCalls] Use emitLibCall() in more places (NFCI) (#222557)
Commit: 6b2ef39be51f46e2f359f6965588577913765af4
https://github.com/llvm/llvm-project/commit/6b2ef39be51f46e2f359f6965588577913765af4
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Reserve IRTranslator value map and virtual register storage (NFC) (#222311)
Reserve storage based on the number of IR arguments and instructions to
avoid unnecessary container growth.
Improves CTMark geomean -0.08% on aarch64-O0-g, including 0.18% on
sqlite.
https://llvm-compile-time-tracker.com/compare.php?from=cec101b15dd27fb1c51b6c87cb6e9d78517d2b09&to=996caa798ca6e27dfc657296db4b8ae6519701b0&stat=instructions:u
Assisted-by: codex
Commit: 2cd17898705456c546359b0683cbc6fb252698d9
https://github.com/llvm/llvm-project/commit/2cd17898705456c546359b0683cbc6fb252698d9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/SimpleSymbolTable.h
M orc-rt/include/orc-rt/bedrock/sps/CallSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/GDBJITRegistrarSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/MemoryAccessSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/NativeDylibManagerSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/SimpleNativeMemoryMapSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/StandaloneMachOUnwindInfoRegistrarSPSCI.h
M orc-rt/include/orc-rt/support/sps/SPSAllocAction.h
M orc-rt/include/orc-rt/support/sps/SPSWrapperFunction.h
M orc-rt/lib/bedrock/BootstrapInfo.cpp
M orc-rt/lib/bedrock/NativeDylibManager.cpp
M orc-rt/lib/bedrock/SimpleNativeMemoryMap.cpp
M orc-rt/lib/bedrock/sps/CallSPSCI.cpp
M orc-rt/lib/bedrock/sps/GDBJITRegistrarSPSCI.cpp
M orc-rt/lib/bedrock/sps/MemoryAccessSPSCI.cpp
M orc-rt/lib/bedrock/sps/NativeDylibManagerSPSCI.cpp
M orc-rt/lib/bedrock/sps/SimpleNativeMemoryMapSPSCI.cpp
M orc-rt/lib/bedrock/sps/StandaloneMachOUnwindInfoRegistrarSPSCI.cpp
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/test/unit/bedrock/SimpleSymbolTableTest.cpp
M orc-rt/test/unit/bedrock/sps/CallSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/MemoryAccessSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/support/sps/SPSAllocActionTest.cpp
M orc-rt/test/unit/support/sps/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] Express CI symbols as C-level names (#222564)
Controller-interface wrapper functions are now declared extern "C",
exported, and registered under their C-level names, so that they resolve
identically whether looked up through the bootstrap symbol map or via
dlsym.
In addition to removing the inconsistency between the symbol-table and
dlsym names, making CI functions public declarations allows unit tests
to call CI wrappers directly (rather than having to resigster them and
then look them up in a symbol table).
ORC_RT_SPS_WRAPPER and ORC_RT_SPS_ALLOC_ACTION each split into _DECL and
_IMPL forms sharing a _SIG macro, giving the wrappers extern "C" linkage
and an ORC_RT_C_EXPORT annotation.
SimpleSymbolTable::addUnique now takes SymbolNameSpec names and mangles
them, with a second overload for merging one table into another.
Commit: c9e07d91eb9338f1922adbc120f68cf071bd9c2c
https://github.com/llvm/llvm-project/commit/c9e07d91eb9338f1922adbc120f68cf071bd9c2c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/lib/Dialect/LLVMIR/IR/NVVMOps.cpp
A mlir/lib/Dialect/LLVMIR/IR/NVVMOps.h
Log Message:
-----------
[MLIR][NVVM] Shard generated operation definitions (NFC) (#221812)
Generate the NVVM operation definitions in eight shards, use the
generated registration hook, and expose only the four parser and range
helpers referenced by generated code.
Assisted-by: Codex
Commit: 9679fbfea993cb2e815fe0fa5eefde310f917349
https://github.com/llvm/llvm-project/commit/9679fbfea993cb2e815fe0fa5eefde310f917349
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
M llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-int-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-reductions.ll
M llvm/test/CodeGen/AArch64/sve-bf16-rounding.ll
Log Message:
-----------
[LLVM][CodeGen][SME] Don't use non-streaming zeroing instruction when in streaming mode. (#222353)
When selecting scalable vector bf16-f32 converts we emit zip(0,vec).
Unfortunately, the typical zero-latency zeroing instruction is not
available when in streaming mode.
Commit: 278e125048fd83b66b6d053c40e31d47b4551884
https://github.com/llvm/llvm-project/commit/278e125048fd83b66b6d053c40e31d47b4551884
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Fix incorrect chain usage when lowering ISD::STRICT_FP_EXTEND. (#222287)
The chain was being passed as the last operand when it should be the
first.
Commit: 3a25949882c3ee496b523bcc816974c6ddfa9850
https://github.com/llvm/llvm-project/commit/3a25949882c3ee496b523bcc816974c6ddfa9850
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Tools/mlir-translate/MlirTranslateMain.cpp
M mlir/tools/mlir-translate/mlir-translate.cpp
Log Message:
-----------
[mlir-translate] Move InitLLVM ownership to the standalone tool (#222570)
Please Read: [RFC: Embeddable LLVM tool drivers for long-lived
hosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and [Why `InitLLVM` ownership matters section in the
RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-why-initllvm-ownership-matters-7)
`mlirTranslateMain` currently constructs `InitLLVM` internally. This is
fine when `mlir-translate` runs once as a standalone executable, but it
does not work for an in-process setting where the host remains alive and
invokes multiple LLVM tools. When `mlirTranslateMain` returns, the
`InitLLVM` destructor calls `llvm_shutdown()` and destroys
process-global `ManagedStatic` state that may still be needed by the
host and subsequent tool invocations.
[WasmBolt](https://github.com/anutosh491/WasmBolt) (try
[here](https://anutosh21.github.io/WasmBolt/)) is a concrete example of
such a host. It runs Clang, `mlir-opt`, `opt`, `llc` and LLD inside one
browser-hosted LLVM process, allowing users to inspect and transform
code without a remote compilation server.
As described in the [MLIR section of the
RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-mlir-13),
the real `mlir-opt` driver already works in this environment.
`MlirOptMain` does not own `InitLLVM`, so the surrounding host can
control the process lifetime. `mlirTranslateMain` does not currently
provide the same ownership boundary, which prevents us from integrating
it in the same clean way.
The working `mlir-opt` pipeline can be seen here:
https://www.youtube.com/watch?v=yga2lWelne4
This patch makes the two MLIR driver interfaces consistent by moving
`InitLLVM` from the reusable `mlirTranslateMain` entry point into the
standalone `mlir-translate` executable:
```text
standalone:
main -> InitLLVM -> mlirTranslateMain -> process exit
embedded:
host-owned InitLLVM / LLVMToolSession -> mlirTranslateMain
```
Standalone behaviour remains unchanged, while MLIRTranslateLib can now
borrow the process lifetime owned by a long-lived host.
Commit: 8d1a8fc4be3dc404bdaf63a493c3acc4cb48db52
https://github.com/llvm/llvm-project/commit/8d1a8fc4be3dc404bdaf63a493c3acc4cb48db52
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-strings/radix.test
M llvm/tools/llvm-strings/llvm-strings.cpp
Log Message:
-----------
[llvm-strings] Style updates primarily for --radix (#222454)
* Silence clang-tidy by moving radix into anonymous namespace
* Adjust type and variable naming to match LLVM style
* Adjust --radix command line error message to match llvm-objdump
* Use llvm::StringSwitch to map option values to enumerators
* Remove undocumented and untested --radix="" option which was an
implementation detail to handle --radix not being specified
Commit: c7e6e9881a42780852d535bfc7d59f63e76642e4
https://github.com/llvm/llvm-project/commit/c7e6e9881a42780852d535bfc7d59f63e76642e4
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
Log Message:
-----------
[VPlan] Simplify PlainCFG VPI construction (NFC) (#216435)
Commit: 0fa0a5db4dd51db8c4ec7f0a68f48f6586e0a29a
https://github.com/llvm/llvm-project/commit/0fa0a5db4dd51db8c4ec7f0a68f48f6586e0a29a
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Inline a using declaration in single use-site (NFC) (#222259)
Commit: c86292488b86080d994de4164342b8e0fdd43543
https://github.com/llvm/llvm-project/commit/c86292488b86080d994de4164342b8e0fdd43543
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/tools/llc/CMakeLists.txt
M llvm/tools/llc/llc.cpp
A llvm/tools/llc/llcdriver.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llc] Add a reusable LLVMLlcDriver library (#221896)
Please read :
[RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and [RFC
section](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-proposed-first-change-llvmllcdriver-8)
This splits `llc` into a small standalone executable and a reusable
`LLVMLlcDriver` library.
The change follows the structure introduced for `opt` by @wsmoses in
[#79205](https://github.com/llvm/llvm-project/pull/79205): the
command-line implementation moves into a driver library, while `llc.cpp`
remains the standalone entry point and continues to own `InitLLVM`.
The immediate motivation is embedding `llc` in long-lived applications
such as [WasmBolt](https://github.com/anutosh491/WasmBolt) (try
[here](https://anutosh21.github.io/WasmBolt/))
Currently, embedders must compile and modify a copy of `llc.cpp` because
the implementation and `main()` live in the same translation unit. This
split provides a reusable entry point without changing the behavior of
the
standalone `llc` executable.
Commit: eb3aad0e4c85c8ce083648297950aa11c46b27e4
https://github.com/llvm/llvm-project/commit/eb3aad0e4c85c8ce083648297950aa11c46b27e4
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
Log Message:
-----------
[BrainF] Remove use of getSizeOf() (#222590)
getSizeOf() is incompatible with ptradd. Also entirely unnecessary
here.
Commit: bde886d4e2a244045390da84a8cb9238ad1d3ab7
https://github.com/llvm/llvm-project/commit/bde886d4e2a244045390da84a8cb9238ad1d3ab7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Start using subarch in attributor instead of subtarget (#212207)
Avoid querying the subtarget for functions when the relevant
properties are known from the triple. The various subtarget
group size functions should also be decoupled from the subtarget,
but those are trickier to untangle.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: b3e7900e74098de130402d0a3ea857e77d817540
https://github.com/llvm/llvm-project/commit/b3e7900e74098de130402d0a3ea857e77d817540
Author: Tianyi Chen <diannaaav at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-readobj/MachO/needed-libs.test
M llvm/tools/llvm-readobj/MachODumper.cpp
Log Message:
-----------
[llvm-readobj] Exclude Mach-O dylib IDs from needed libraries (#221618)
For Mach-O files, `--needed-libs` includes `LC_ID_DYLIB`, causing a
dynamic
library to list its own install name as a dependency.
Exclude this command while retaining the actual dependency load
commands.
Fixes #39505.
Assisted-by: OpenAI Codex (implementation, tests, and initial
description).
Commit: f2ba88c9a5ce27c4a90a14c4190f3c41c6069e92
https://github.com/llvm/llvm-project/commit/f2ba88c9a5ce27c4a90a14c4190f3c41c6069e92
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/IR/Attributes.cpp
Log Message:
-----------
[IR] Mark whether param/ret attributes are ABI relevant (#222575)
This is specified using ABIAttr in TableGen and queried using
isABIAttr().
Make use of this in the Lint pass, instead of maintaining its own
(outdated) list of ABI attributes.
This has been split out from #207173.
Commit: 5bb6f55462541521488c0bbd59e028ee891f829b
https://github.com/llvm/llvm-project/commit/5bb6f55462541521488c0bbd59e028ee891f829b
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libsycl/Maintainers.md
Log Message:
-----------
[libsycl][NFC] Extend list of libsycl maintainers. (#222414)
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: c52a3432d6a8187dd0f22ad1f8fde6774167dc89
https://github.com/llvm/llvm-project/commit/c52a3432d6a8187dd0f22ad1f8fde6774167dc89
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A clang/test/Frontend/optimization-remark-target-features-aarch64.c
A clang/test/Frontend/optimization-remark-target-features-arm.c
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
A llvm/test/CodeGen/AArch64/optimization-remark-target-features.ll
A llvm/test/CodeGen/ARM/optimization-remark-target-features.ll
Log Message:
-----------
[AsmPrinter] add optimisation remark for target-features (#222074)
In clang we have `--print-enabled-extensions` which will print the
AArch64 extensions enabled for a given TU. However, sometimes it is
useful to be able to print out the actual subtarget features for each
function, for debugging/testing purposes. Add an optimisation remark for
that.
Commit: bc25ad46580963afb2056b929b1089133d006dbb
https://github.com/llvm/llvm-project/commit/bc25ad46580963afb2056b929b1089133d006dbb
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir
M mlir/test/Target/Cpp/arithmetic_operators.mlir
Log Message:
-----------
[mlir][emitc] Fix arith.{div,rem}ui index support (#221546)
These ops were failing to lower to emitc.{div,rem} when applied to index
operands since the code was:
- only checking for IntegerType, rejecting the !emitc.size_t into which
IndexType is converted.
- using the original operands instead of the converted ops, creating
unrealized_conversion_cast ops.
Commit: 5da4b50d7a4f12c283b1253a8e4d2c1e1c68a360
https://github.com/llvm/llvm-project/commit/5da4b50d7a4f12c283b1253a8e4d2c1e1c68a360
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
M llvm/test/CodeGen/AMDGPU/trap.ll
Log Message:
-----------
[AMDGPU][GISel] Notify GISel observers when splitting trap blocks (#219128)
`legalizeTrapEndpgm` can split a MBB and move the instructions following
a trap. Since an instruction's parent block is part of its GISel CSE
profile, notify active observers around the moved instructions so they
are re-profiled with the new parent block.
CSE consistency gap exposed by #217258.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Co-authored-by: GPT-5 Codex <noreply at openai.com>
Commit: f3909e073dd93f830f842c0bfe33b443b8fa0624
https://github.com/llvm/llvm-project/commit/f3909e073dd93f830f842c0bfe33b443b8fa0624
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/MLRegAlloc/default-eviction-advisor.ll
M llvm/test/CodeGen/MLRegAlloc/rel-codepath.ll
M llvm/test/Transforms/Inline/ML/bounds-checks.ll
M llvm/test/Transforms/Inline/ML/coro-split-func-levels.ll
M llvm/test/Transforms/Inline/ML/dead-callee.ll
M llvm/test/Transforms/Inline/ML/enable-inline-advisor-printing-ml.ll
M llvm/test/Transforms/Inline/ML/fpi-update.ll
M llvm/test/Transforms/Inline/ML/ml-test-release-mode.ll
M llvm/test/Transforms/Inline/ML/recursive.ll
M llvm/test/Transforms/Inline/ML/scc-dead-accounting.ll
M llvm/test/Transforms/Inline/ML/skip-unreachable.ll
M llvm/test/Transforms/Inline/ML/state-accounting-skip-non-cold.ll
M llvm/test/Transforms/Inline/inlining-advisor-default.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[MLGO] Gate model tests on optimization-specific lit features (#217906)
### Context
`have_mlir_lowering` only indicates that `LLVM_MLGO_MODELS` is
non-empty. It does not identify which model type was compiled.
### Motivation
An inliner-only configuration incorrectly enabled regalloc-specific test
commands, and vice versa.
### Changes
Add `have_mlir_lowering_inliner` and `have_mlir_lowering_regalloc` lit
features derived from the corresponding model-generation targets. Update
MLGO tests to use the appropriate model-specific feature, including GN
configuration defaults.
I leveraged AI to write this PR.
Commit: 05e74e7b5e065d05e33efd264e6f42d9cd40f06c
https://github.com/llvm/llvm-project/commit/05e74e7b5e065d05e33efd264e6f42d9cd40f06c
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/tools/opt/opt.cpp
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[opt] Move InitLLVM ownership to the standalone entry point (#222559)
Please Read: [RFC: Embeddable LLVM tool drivers for long-lived
hosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and [Why `InitLLVM` ownership matters section in the
RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-why-initllvm-ownership-matters-7)
`LLVMOptDriver` is already separated from the standalone `opt`
executable, but `optMain` currently constructs `InitLLVM` internally.
This means its destructor calls `llvm_shutdown()` whenever one driver
invocation finishes.
That is appropriate for a standalone executable, but not for a reusable
driver called by a long-lived host. For example,
[WasmBolt](https://github.com/anutosh491/WasmBolt) (try
[here](https://anutosh21.github.io/WasmBolt/)) invokes `opt`, `llc`,
Clang and LLD within one browser-hosted LLVM process and needs the LLVM
process state to remain alive between tool invocations.
This patch moves `InitLLVM` ownership into `opt.cpp`:
```text
standalone opt:
main -> InitLLVM -> optMain -> shutdown
embedded host:
host-owned InitLLVM / LLVMToolSession -> optMain
```
Standalone opt therefore keeps the same lifetime and behaviour, while
LLVMOptDriver can borrow the lifetime owned by an embedding application.
This patch is independent of the proposed `LLVMToolSession `and
`LLVMLlcDriver` changes that I've proposed in the RFC and can be
reviewed separately.
Commit: e2955810d33ea0fb04522fc9f7cb12b71088ccc8
https://github.com/llvm/llvm-project/commit/e2955810d33ea0fb04522fc9f7cb12b71088ccc8
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
Log Message:
-----------
[MLIR]: Fix test after 70f5696e (#222601)
[MLIR]: Fix test after 70f5696e
Commit: abf3bd63bb37d00aa4cd8b5dad873e1140d06348
https://github.com/llvm/llvm-project/commit/abf3bd63bb37d00aa4cd8b5dad873e1140d06348
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/DebugInfo/CXX/verbose-trap.cpp
Log Message:
-----------
[clang][DebugInfo] Fix verbose trap source line (#222456)
The artificial inline location for `__builtin_verbose_trap` used line
zero. As a result, the emitted trap could inherit the preceding source
line in DWARF line tables.
Keep the artificial trap-message frame while assigning the builtin
call's line and column to the trap instruction.
Commit: 26012d67fef70763f6593eacfe2af41272cf7b72
https://github.com/llvm/llvm-project/commit/26012d67fef70763f6593eacfe2af41272cf7b72
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A llvm/test/Analysis/CostModel/X86/pdep.ll
A llvm/test/Analysis/CostModel/X86/pext.ll
Log Message:
-----------
[CostModel][X86] Add baseline cost test for pdep/pext intrinsics (#222603)
Slow pdep/pext targets in particular are highly inaccurate
Commit: 38fb876bf1e9ce9c5ccdc6f38fac4eb60ac66fce
https://github.com/llvm/llvm-project/commit/38fb876bf1e9ce9c5ccdc6f38fac4eb60ac66fce
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Move up getEpilogueTailLowering() (#222358)
This patch only moves up `getEpilogueTailLowering()` so that it can be
used by `planForEpilogueTF` as needed here: https://github.com/llvm/llvm-project/pull/208764
Commit: 73f0077ff60c58cae6c1f753b046ce93ebc4db3f
https://github.com/llvm/llvm-project/commit/73f0077ff60c58cae6c1f753b046ce93ebc4db3f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/records.cpp
M clang/test/CodeGen/pr4349.c
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
Revert "[clang][bytecode] Use opaque pointers for decl-based dummy pointers" (#222599)
Reverts llvm/llvm-project#220917
Looks like this breaks some memory-sanitizier builders:
https://lab.llvm.org/buildbot/#/builders/169/builds/26405
https://lab.llvm.org/buildbot/#/builders/164/builds/25236
Commit: 11cf968d0d79f5809b4f3fd6b526f0d16ec2a6d1
https://github.com/llvm/llvm-project/commit/11cf968d0d79f5809b4f3fd6b526f0d16ec2a6d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/LLVMVisualizers/llvm.natvis
Log Message:
-----------
[NATVIS] Fix ConstantInt APInt value access (#221719)
Ensure we peek through the APInt::U VAL / *pVal union
Commit: e4d40831076278ffbfc7d883510d49db8fbfaa7c
https://github.com/llvm/llvm-project/commit/e4d40831076278ffbfc7d883510d49db8fbfaa7c
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
A mlir/test/Target/LLVMIR/omptarget-debug-shared-alloc-loc.mlir
Log Message:
-----------
[OpenMP] Give the device shared memory allocations a debug location. (#221842)
Fixes https://github.com/llvm/llvm-project/issues/221831.
In generic mode on the device, the buffers that carry values into an
outlined region come from device shared memory rather than the stack, so
they are emitted as calls to `__kmpc_alloc_shared` and
`__kmpc_free_shared`. Those are definitions in the DeviceRTL, which
makes them inlinable calls, and the verifier requires an inlinable call
in a function with debug info to carry a !dbg location. None of these
calls had one, for two separate reasons.
1. `allocateVar()` and `deallocateVar()` took a bare insertion point, so
an override had no debug location to set on the runtime calls it emits
in place of the alloca the base class would have created. Fixed by
adding a `DebugLoc` parameter that carries one.
2. The `createOMPAllocShared `and `createOMPFreeShared` calls in
`createParallel` relied on the implicit conversion from an insertion
point to a `LocationDescription`, which selects the constructor that
leaves the debug location empty, and `updateToLocation` then installs
that empty location over whatever the builder had. Fixed by passing the
`Builder`, which carries the debug location along with the insertion
point. This is the same fix as #218961.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: cc45d4f54199e005db594c22cf29545a0d020bae
https://github.com/llvm/llvm-project/commit/cc45d4f54199e005db594c22cf29545a0d020bae
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/clmul.ll
Log Message:
-----------
[CostModel][X86] clmul.ll - add test coverage for vpclmulqdq targets (#222610)
Commit: 46f9c228668a406cec6160552dea699846d91fd6
https://github.com/llvm/llvm-project/commit/46f9c228668a406cec6160552dea699846d91fd6
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/Scalarizer/bitcast-scalar-to-vector.ll
M llvm/test/Transforms/Scalarizer/bitcast-vector-to-scalar.ll
Log Message:
-----------
[Scalarizer] Update tests to use update_test_checks.py (#222460)
This PR is to address feedback on this comment:
https://github.com/llvm/llvm-project/pull/221033#discussion_r3973313815
requesting the tests use utils/update_test_checks.py instead.
Commit: cb46e8530f3c45be6f968fcdef47f37e5220fe95
https://github.com/llvm/llvm-project/commit/cb46e8530f3c45be6f968fcdef47f37e5220fe95
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
A llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_many_align.s
Log Message:
-----------
[JITLink][RISCV] Avoid quadratic removal of alignment edges (#222317)
We encountered this issue while using BOLT to instrument clang on
RISC-V. JITLink spent significant time removing alignment edges during
relaxation finalization in large code blocks with many alignment
relocations.
During RISC-V relaxation finalization, finalizeBlockRelax removes
AlignRelaxable edges individually from a block's edge vector. Each erase
shifts the remaining suffix, making this cleanup quadratic when the
number of alignment edges grows with the total edge count.
Compact surviving edges once and remove the trailing entries from the
back, preserving edge order and making cleanup linear. Count the
trailing entries before erasing to avoid comparing an invalidated
iterator.
These results support the performance benefit, but they come from
**GPT-generated** synthetic benchmarks and do not represent speedups on
real BOLT workloads.
count | origin | new
-- | -- | --
16,384 | 92.6 ms | 6.2 ms
32,768 | 430.0 ms | 9.5 ms
65,536 | 1,732.3 ms | 16.2 ms
Assisted by GPT-6.
Commit: 3eeb9b2bdb2a9ac4020a8ab8729e96ecb283691c
https://github.com/llvm/llvm-project/commit/3eeb9b2bdb2a9ac4020a8ab8729e96ecb283691c
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/HLFIR/Passes.h
M flang/include/flang/Optimizer/HLFIR/Passes.td
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
A flang/include/flang/Optimizer/Support/AllocationPolicy.h
R flang/include/flang/Optimizer/Transforms/AllocationPlacementPolicy.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRCopy.cpp
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/lib/Optimizer/Support/AllocationPolicy.cpp
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
A flang/test/Driver/allocation-policy.f90
A flang/test/Fir/allocation-policy-attr.fir
A flang/test/Fir/allocation-policy-pipeline.fir
A flang/test/HLFIR/inline-hlfir-copy-stack.fir
M flang/test/HLFIR/inline-hlfir-copy.fir
M flang/test/Transforms/allocation-placement.fir
A flang/test/Transforms/allocation-policy-precedence.fir
Log Message:
-----------
[flang] add AllocationPolicy attribute to module and use it in InlineHLFIRCopy (#222013)
The StackArrays/AllocationPlacement pass cannot move fir.allocmem
created during InlineHLFIRCopy for the copy-in/cop-out buffers because
of there placement in branches.
Moving these allocmem outside of the branches is suboptimal as these
allocations may never occur at runtime (when the data is actually
already contiguous).
Extending the StackArrays pass is doable but very tedious (the data flow
analysis passes used in the pass cannot recognized "same
predicates"/understand that the two fir.if block that
allocate/deallocates will be both reached or never reached (even when
modifying InlineHLFIRCopy to use the same SSA value for both fir.if). So
this requires custom logic, and was adding 200 lines of non trivial code
to audit and I did not like it.
I decided to expose the allocation policy so that other passes can rely
on it. To make it the most flexible and future proof this is done via a
new module attribute instead of threading options in the driver to this
and that pass. This way, it will also be possible to have custom per
function policy if ever needed.
The InlineHLFIRCopy is updated to apply the small array threshold policy
(that decide when constant size arrays should always be placed on the
stack, regardless of the -fstack-array/-fno-stack-array). I also
increased this threshold from 64 to 1024 so that it cover my application
use case. This increase is in line with the industry practice (NV, IFX,
and gfortran will all allocate few Kb temporary copy-in/out buffers on
the stack, regardless of the optimization level). For now, I decided to
not apply the `-fstack-array` aspect as it is on by default with flang
and I want to measure the effect first before doing so (gfortran/ifx
also control dynamic copy-in/out buffer allocations with the stack-array
related flag, so there is a good chance we end-up doing it at some
point).
Commit: b3eab3a932118c3a462741000d2118428f5bd268
https://github.com/llvm/llvm-project/commit/b3eab3a932118c3a462741000d2118428f5bd268
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
A mlir/test/Integration/Dialect/Vector/CPU/reductions-masked-minmax-f32.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][vector] Fix mask neutral value for masked fmaximum/fminimum reductions (#222275)
Masked maximumf/minimumf reductions were lowered by replacing inactive
lanes with a neutral value before applying an unmasked reduction. The
maximumf neutral was incorrectly set to the negative subnormal closest
to zero, causing it to beat any negative active value. Similarly,
minimumf used FLT_MAX, which loses to an active +Inf.
This change adds LLVM dialect support for
llvm.vp.reduce.fmaximum/fminimum and lowers masked reductions directly
to these predicated intrinsics.
Commit: 21d80e82d137f9a30e2626a9953d63015bcb280c
https://github.com/llvm/llvm-project/commit/21d80e82d137f9a30e2626a9953d63015bcb280c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Logging.h
Log Message:
-----------
[orc-rt] Remove redundant extern keyword. (#222619)
orc_rt_log_OSLogHandles is already extern via ORC_RT_C_EXPORT.
Commit: 0afee5c04021a2c8218beb6a64f3afd5f2578c02
https://github.com/llvm/llvm-project/commit/0afee5c04021a2c8218beb6a64f3afd5f2578c02
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
A compiler-rt/test/tsan/Darwin/os_unfair_lock_deadlock.c
A compiler-rt/test/tsan/Darwin/trylock_no_deadlock.c
Log Message:
-----------
[Darwin][TSan] Use deadlock detector aware calls for Darwin-specific lock interceptors (#216040)
Currently the deadlock detector is unaware of these lock types because
the interceptors use bare Acquire-Release calls. This patch switches
them over to the Mutex(Pre|Post)Lock calls instead.
Assisted by: Claude
rdar://155410097
Commit: 3ec60e826f522bbe6b0af7c9392968a9f6c660c5
https://github.com/llvm/llvm-project/commit/3ec60e826f522bbe6b0af7c9392968a9f6c660c5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/src/stdio/gpu/vfprintf_utils.h
Log Message:
-----------
[libc] Optimize the GPU printf implementation with size hints (#222474)
Summary:
The GPU printf interface is functionally a shim to pass a `va_list` and
format string to the CPU for formatting. The size of the argument list
isn't exposed by the C ABI, but we can use `__builtin_object_size` to
try to look it up. This will bind to the `alloca` holding our arguments
in the ABI and return a positive size if it is known.
We do this opportunistically, as the check is lossy. In cases where it
is known, this saves a stack spill to store the true size. Additionally,
we can use this to detect cases where `printf` is being used as a simple
`puts`.
This saves 10 VGPRs for the `printf("string")` case. It also saves 8
bytes of stack in most all cases.
Commit: 14789f78610ab6caa79d18737185755c199e0f95
https://github.com/llvm/llvm-project/commit/14789f78610ab6caa79d18737185755c199e0f95
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M orc-rt/test/regression/darwin/check-rt-process-info.test
M orc-rt/test/regression/linux/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Generalize testcases for different target archs (#222629)
Drop the hard-coded archs from the check-rt-process-info testcases.
Instead, check against an arch value derived from the build's target
triple.
Commit: c69a5ebf6b961d1296cb42a104008df40cf3bc36
https://github.com/llvm/llvm-project/commit/c69a5ebf6b961d1296cb42a104008df40cf3bc36
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__utility/declval.h
Log Message:
-----------
[libc++] Simplify the implementation of std::declval (#222303)
The implementation of `std::declval` calling `__declval` was originally
introduced for improved compile times. However, we now have a builtin
for `add_rvalue_reference`, which makes the old implementation faster
again, since we avoid instantiating any class types _and_ avoid overload
resolution.
Commit: c363b393529bc652c97344042a3b5e6f136d41c5
https://github.com/llvm/llvm-project/commit/c363b393529bc652c97344042a3b5e6f136d41c5
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC: Remove redundant expression from getBuildVectorCost (#222547)
Gathers is initialized with the contents from VL and then not modified,
so `VL.equals(Gathers)` is always true.
Commit: 36fe08a5f92230655dd9662f121c092ced307ddd
https://github.com/llvm/llvm-project/commit/36fe08a5f92230655dd9662f121c092ced307ddd
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
Log Message:
-----------
[MLIR][CIR][NFCI] Split TestAliasAnalysis into its own library (#222174)
This is a target for the CIR alias analysis, and bringing in all of the
MLIRTestAnalysis is too heavy: it results in a significant increase in
CIR test size. This patch, plus a few little things, gets us ~850 edges
removed from the Clang Build (after Medhi's patches).
This also has CIR use it.
Commit: 8be8161a037daf2417c669336b777e986d0fc21f
https://github.com/llvm/llvm-project/commit/8be8161a037daf2417c669336b777e986d0fc21f
Author: Marcos Maronas <mmaronas at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/ConstantInitBuilder.h
M clang/lib/CodeGen/ConstantInitBuilder.cpp
M clang/test/CodeGenCXX/constructor-attr.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
Log Message:
-----------
[clang][CodeGen] Stop overriding GlobalVariable's default address space (#222367)
The `GlobalVariable` constructor used by `createGlobal` receives a
`std::optional<unsigned> AddressSpace` that, when unspecified, falls
back to `M.getDataLayout().getDefaultGlobalsAddressSpace()`. However,
`createGlobal`'s `AddressSpace` arg was a bare `unsigned` defaulting to
0. By doing that, it was effectively overriding the `GlobalVariable`'s
constructor fallback with 0. On targets whose default globals address
space is not 0 (AMDGPU, SPIR/SPIR-V), this emitted
`@llvm.global_ctors/dtors` in address space 0 causing some issues (see
https://github.com/ROCm/SPIRV-LLVM-Translator/issues/293).
Commit: 41fc4d5609d5f2414a2bbf9cf7e1ecd09fe5a01a
https://github.com/llvm/llvm-project/commit/41fc4d5609d5f2414a2bbf9cf7e1ecd09fe5a01a
Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/Decl.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/builtins.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/Sema/warn-strlcpycat-size.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for strlcpy (#221325)
Add `-Wfortify-source` diagnostics for `strlcpy` and `__builtin_strlcpy`
when the size argument exceeds the destination buffer size.
This is directly analogous to the previous PR for `strlcat` (#220341).
Also update `clang/test/Sema/warn-strlcpycat-size.c` and
`clang/test/Sema/builtins.c` to expect the `-Wfortify-source` warnings
where test calls pass sizes larger than the destination buffer capacity.
Part of #142230
Assisted-by: Gemini
Commit: da15729d2108024fc2e65fdcb17143393823d6a3
https://github.com/llvm/llvm-project/commit/da15729d2108024fc2e65fdcb17143393823d6a3
Author: Kieran B <kieran.bailey at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
Log Message:
-----------
[AArch64] Reorder ZPR stack spills to maximize ld1b/st1b pairings (#218950)
Currently, the stack allocation algorithm can order spilled ZPR
callee-saves in a way that prevents pairing.
Reorder ZPR callee-saves before frame indices are assigned to maximize
pairing opportunities. Pairing requires consecutive even/odd registers
at even stack offsets.
The remaining legality requirements are already checked when the
register pairs are formed.
The reordering algorithm primarily works by determining the parity of
the lowest ZPR spill offset. If the offset is odd, it places one
unpaired ZPR spill first so that subsequent register pairs begin at even
offsets.
Windows is not supported by this reordering algorithm for now, to keep
this change minimal.
New tests have been added to sve-callee-save-restore-pairs.ll to test
the reordering algorithm.
Commit: d7f2abda7020b4ca336732dd2984f6a668fd766a
https://github.com/llvm/llvm-project/commit/d7f2abda7020b4ca336732dd2984f6a668fd766a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
Log Message:
-----------
[SCEV] Use the refined BE-count formula if the addition cannot overflow (#221227)
Generalize the logic added in
https://github.com/llvm/llvm-project/pull/218694
to consider AddingStrideMinusOneMayOverflow (was MayAddOverflow) instead
of just the !IVMayOverflow part.
This handles 2 additional cases when Start < RHS:
* Stride is known power-of-2:
* Start == Stride and Start == Stride -1.
The patch includes a mechanical change to move up the existing
MayAddOverflow with comments, and clarifies the name to
AddingStrideMinusOneMayOverflow.
This improves trip count computations in a number of real-world cases:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1195.
End-to-end Alive2 Proofs for both cases in unsigned:
https://alive2.llvm.org/ce/z/MQ2YLf
PR: https://github.com/llvm/llvm-project/pull/221227
Commit: 148604aed3511a41af5e000b0440e0afb884daa6
https://github.com/llvm/llvm-project/commit/148604aed3511a41af5e000b0440e0afb884daa6
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel]Add missing utils/extract_symbols.py (#222653)
This was added in https://github.com/llvm/llvm-project/pull/221296
Commit: a774efbad6f74d695e37841c72b2a0175e4724e9
https://github.com/llvm/llvm-project/commit/a774efbad6f74d695e37841c72b2a0175e4724e9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/barrier
M libcxx/include/condition_variable
M libcxx/include/mutex
M libcxx/include/shared_mutex
M libcxx/test/libcxx/diagnostics/unused_variables.verify.cpp
M libcxx/test/libcxx/thread/nodiscard.verify.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.ctor.pass.cpp
M libcxx/test/std/thread/thread.condition/thread.condition.condvarany/default.pass.cpp
Log Message:
-----------
[libc++] Add [[gnu::warn_unused]] to a bunch of threading utilities (#213963)
Commit: fb69e1dcea0e527647525240af45a87420a3a593
https://github.com/llvm/llvm-project/commit/fb69e1dcea0e527647525240af45a87420a3a593
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Query waves-per-EU and flat-wg range from subarch in attributor (#222596)
The maximum flat work group range is a pair of constants and the maximum
waves per execution unit is fully known from the subarch. Use TargetParser
information and continue working to remove the dependence on codegen.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 3c478e1597c11abbdafef9c08d7e11655ba1cdd5
https://github.com/llvm/llvm-project/commit/3c478e1597c11abbdafef9c08d7e11655ba1cdd5
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/MC/MCGOFFStreamer.cpp
A llvm/test/CodeGen/SystemZ/zos-eh.ll
Log Message:
-----------
[SystemZ][z/OS] Relax check for additional symbols in PR section (#222435)
The current check in `emitLabel()` is too strict. Inside a PR, there
cannot be no other external visible label. However, temporary labels
which are used e.g. for calculating offsets can be emitted. A situation
in which this occurs is the emission of the DWARF EH tables, in which a
temporary symbol (with an empty name) is emitted at the begin of the
table, causing an error message. This change limits the error to
non-temporary labels.
Commit: 28d39b47e98af5a6fd8dc676f9ef576fe4b30724
https://github.com/llvm/llvm-project/commit/28d39b47e98af5a6fd8dc676f9ef576fe4b30724
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
CodeGen: Remove dead LiveVariables plumbing from MachineSink (#222563)
MachineSink threaded a LiveVariables pointer through to
SplitCriticalEdge so the analysis would be updated. It never used
LiveVariables for any decision, and MachineSinking runs before
LiveVariables in every pipeline.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 659faef7717be80c12e47604e61c01f2d7fc4975
https://github.com/llvm/llvm-project/commit/659faef7717be80c12e47604e61c01f2d7fc4975
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Add paging into modules request (#222122)
Added support for modules paging according to [DAP
specification](https://microsoft.github.io/debug-adapter-protocol/specification#Requests_Modules)
Commit: 26c633bf88337258f1b488bccfd74faa1efbafaa
https://github.com/llvm/llvm-project/commit/26c633bf88337258f1b488bccfd74faa1efbafaa
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/AstRestoreTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CallingConventionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ClassLayoutTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CompilandsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest0.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest1.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.h
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.ord
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionNestedBlockTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/PointerTypeTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/SimpleTypesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/TypeQualsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/add-symbols.cpp
A lldb/test/Shell/SymbolFile/NativePDB/ast-restore.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-arm.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-x86.test
A lldb/test/Shell/SymbolFile/NativePDB/class-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/compilands.test
A lldb/test/Shell/SymbolFile/NativePDB/enums-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/expressions.test
M lldb/test/Shell/SymbolFile/NativePDB/func-symbols.test
A lldb/test/Shell/SymbolFile/NativePDB/function-level-linking.test
A lldb/test/Shell/SymbolFile/NativePDB/function-nested-block.test
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-dia.cpp
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-no-dia.cpp
R lldb/test/Shell/SymbolFile/NativePDB/native-setting.cpp
A lldb/test/Shell/SymbolFile/NativePDB/pointers.test
A lldb/test/Shell/SymbolFile/NativePDB/type-quals.test
A lldb/test/Shell/SymbolFile/NativePDB/typedefs.test
A lldb/test/Shell/SymbolFile/NativePDB/variables-locations.test
A lldb/test/Shell/SymbolFile/NativePDB/variables.test
A lldb/test/Shell/SymbolFile/NativePDB/vbases2.test
R lldb/test/Shell/SymbolFile/PDB/Inputs/AstRestoreTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CallingConventionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ClassLayoutTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CompilandsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest0.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest1.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest2.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.h
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.ord
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionNestedBlockTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/PointerTypeTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/TypeQualsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
R lldb/test/Shell/SymbolFile/PDB/ast-restore.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-x86.test
R lldb/test/Shell/SymbolFile/PDB/class-layout.test
R lldb/test/Shell/SymbolFile/PDB/compilands.test
R lldb/test/Shell/SymbolFile/PDB/enums-layout.test
R lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
R lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
R lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
R lldb/test/Shell/SymbolFile/PDB/native-setting.cpp
R lldb/test/Shell/SymbolFile/PDB/pointers.test
R lldb/test/Shell/SymbolFile/PDB/type-quals.test
R lldb/test/Shell/SymbolFile/PDB/typedefs.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
R lldb/test/Shell/SymbolFile/PDB/variables-locations.test
R lldb/test/Shell/SymbolFile/PDB/variables.test
R lldb/test/Shell/SymbolFile/PDB/vbases.test
Log Message:
-----------
[lldb] Move most PDB shell tests to NativePDB (#222370)
I plan to remove the DIA PDB plugin before the 24 release - we switched
the default to the native one in 22. To avoid losing test coverage in
the process, this moves the SymbolFile/PDB tests to
SymbolFile/NativePDB. They were already running with both plugins. In
some cases, we set `env LLDB_USE_NATIVE_PDB_READER=1`, which I flipped.
The remaining shell tests are:
- `func-symbols.test`: Has a duplicate in NativePDB with different
checks, because the two plugins don't create identical types (see
comment in test)
- `udt-layout.test`: Also has a duplicate with different checks, because
the two plugins show the base classes in a different order.
Other than that, there's also a [unittest for
PDB](https://github.com/llvm/llvm-project/blob/2de38b4861ed4a7be7ddd42fc803e91d1fe81b14/lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp).
I'm not sure what we should do about it. Looking over the tests there,
most of these are already covered by the shell tests.
Commit: e6e102aa9ee5f8163d6d300614734b6c009aec34
https://github.com/llvm/llvm-project/commit/e6e102aa9ee5f8163d6d300614734b6c009aec34
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Passes/RunCodeGen.h
M llvm/lib/Passes/RunCodeGen.cpp
Log Message:
-----------
[Passes] Add DisableSimplifyLibCalls flag to runCodeGenPipeline (#222430)
This enables this abstraction to be a drop-in replacement for rustc
after some minor refactoring.
Commit: 6b706509f983459f43708c42f80ec2f152a4cc42
https://github.com/llvm/llvm-project/commit/6b706509f983459f43708c42f80ec2f152a4cc42
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/IR/pch.h
M mlir/lib/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
M mlir/lib/Tools/mlir-lsp-server/LSPServer.cpp
Log Message:
-----------
[mlir] Reuse a precompiled header for MLIRIR (NFC) (#222576)
Build a private precompiled header from the common MLIR IR headers and
use it for MLIRIR. Build Support and IR first so the PCH is available
early, and qualify the LLVM LSP Location name that the broader header
surface exposes.
On current main, clean Release builds of LLVM and MLIR with `ninja -j16`
improved as follows:
```
wall: 535.99s -> 420.41s (-21.56%)
user: 7550.29s -> 6125.97s (-18.86%)
system: 569.85s -> 481.88s (-15.44%)
```
Assisted-by: Codex
Commit: 29a48499738db1829f9a6b71a38bc4461867a3c4
https://github.com/llvm/llvm-project/commit/29a48499738db1829f9a6b71a38bc4461867a3c4
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
A llvm/test/CodeGen/Hexagon/vreduce-fminmax-nan-fixup.ll
A llvm/test/CodeGen/Hexagon/vreduce-max-lowering.ll
A llvm/test/CodeGen/Hexagon/vreduce-min-lowering.ll
Log Message:
-----------
[Hexagon] Lower vreduce(min|max)((imum)?) (#211898)
Add custom lowering for VECREDUCE_FMIN/FMAX/FMINIMUM/FMAXIMUM on HVX
float vector types. The target-independent default expansion reduces
these pairwise using the hardware min/max instruction directly, which
does not implement IEEE-754 NaN-propagation semantics: a NaN in the
input can silently corrupt the reduction result, and an all-NaN input
produces a non-NaN value instead of NaN.
The custom lowering strips NaN elements to the appropriate neutral value
(+/-Inf) before the pairwise tree reduction so a NaN can't corrupt other
lanes, then fixes up the scalar result to NaN if every input element was
NaN.
FMINNUM/FMAXNUM on HVX vector types get the same treatment: NaN operands
are replaced with the neutral value before delegating to the hardware
min/max, with a fixup to restore NaN when both operands were NaN (per
llvm.minnum/maxnum semantics).
Co-authored-by: Kaushik Kulkarni <kauskulk at qti.qualcomm.com>
Commit: 972a171dd102201089ea65673a72b832f29de297
https://github.com/llvm/llvm-project/commit/972a171dd102201089ea65673a72b832f29de297
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/InstCombine/SystemZ/libcall-arg-exts.ll
Log Message:
-----------
[InstCombine] Generate test checks (NFC) (#222670)
With UTC_ARGS --disable to preserve the declaration check lines
at the end.
Commit: 658872c4dffbe435042faee03672b5b03c620977
https://github.com/llvm/llvm-project/commit/658872c4dffbe435042faee03672b5b03c620977
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
A llvm/test/CodeGen/SystemZ/zos-align-constpool.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
Log Message:
-----------
[SystemZ][z/OS] Correctly align the constant pool and the PPA1 (#222128)
Both should be half-word aligned. However, testing revealed that both
can end up on odd addresses, which leads to relocation errors. Fix is to
change the alignment.
Commit: af00b1753fe813df84e1c262fe48a215929ea1a3
https://github.com/llvm/llvm-project/commit/af00b1753fe813df84e1c262fe48a215929ea1a3
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[BUILD]: Fix for #221812 (#222671)
[BUILD]: Fix for #221812
Commit: 5e497ce1838bd4448aa484262a00ce60c324ed4f
https://github.com/llvm/llvm-project/commit/5e497ce1838bd4448aa484262a00ce60c324ed4f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/for_reduction_task_codegen.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
Log Message:
-----------
[OpenMP] Avoid use of ConstantExpr::getSizeOf() (#222662)
Support for this will be dropped as part of the ptradd migration.
Replace with a constant size.
While I'm touching the code anyway, I also simplified the size
calculation a bit. It's computing both the size in bytes and in
elements. Avoid doing an unnecessary division followed by multiply for
the size in bytes.
Commit: 847fb5cfde68fdea490171bc24087ebb0cd90738
https://github.com/llvm/llvm-project/commit/847fb5cfde68fdea490171bc24087ebb0cd90738
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Object/GOFFObjectFile.h
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
A llvm/test/tools/llvm-ar/zos-symattrs.test
M llvm/test/tools/llvm-ar/zos-write.test
Log Message:
-----------
[llvm-ar][GOFF] Implement symbol attributes for GOFF archives (#214528)
z/OS archive symbol table entries contain a 32-bit attribute word
alongside each member offset.
The low three bits encode:
```
bit 2 (0x4): 64-bit addressing (AMODE 64)
bit 1 (0x2): XPLink calling convention
bit 0 (0x1): Writable Static Area (WSA)
```
Previously in e2c8fa0, llvm-ar wrote zero for these attributes. This
patch reads them from GOFF ESD
records and stores them in a SymbolAttrs vector parallel to the existing
Symbols vector in MemberData
to emit the correct word per symbol.
These attributes are tested using `llvm-nm --print-armap` implemented in
#214527 within the LIT test.
Commit: 746d09af26a84cdbe1e03aeb436c8ada09ac8ecf
https://github.com/llvm/llvm-project/commit/746d09af26a84cdbe1e03aeb436c8ada09ac8ecf
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/SystemZ/zos-eh.ll
Log Message:
-----------
[SystemZ][z/OS] Fix "relative immediate relocation section mismatch" (#222437)
Constants should go inside the text section, but this is not explicitly
coded. In the test case, the EH table is generated into a PR section.
Then the constant pool of function `fn_with_const_pool()` is emitted,
which goes into the PR section of the EH table instead of the code
section. When the constant is later referenced in the code, the relative
offset cannot be calculated because different sections are involved.
The fix is to explicitly return the text section for constants.
Commit: f24c52bc14c55646ce37e8e5a6e5f174e896fbf4
https://github.com/llvm/llvm-project/commit/f24c52bc14c55646ce37e8e5a6e5f174e896fbf4
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR]: Fix format after #222671 (#222674)
[MLIR]: Fix format after #222671
Commit: b879ce97a1a7b097b5ed98468ced33d543af9558
https://github.com/llvm/llvm-project/commit/b879ce97a1a7b097b5ed98468ced33d543af9558
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-warnings.ll
Log Message:
-----------
[compiler-rt][profdata] Use x86 triple in instrprof-debug-info-correlate-warnings.ll (#222668)
Test added by #163254 / 28c048ec0f0a677115a0b00a88a7d013f925f2b8.
It has been failing in Armv8 (32-bit) builds since then. I'm only just
getting to it.
warning: overriding the module target triple with
armv8a-unknown-linux-gnueabihf [-Woverride-module]
'x86-64' is not a recognized processor for this target (ignoring
processor)
'+cmov' is not a recognized feature for this target (ignoring feature)
'+cx8' is not a recognized feature for this target (ignoring feature)
<...>
error: a.c:1:0: in function main i32 (): calling convention is
hard-float, but floating-point registers are unavailable
Happens on AArch64 too, but it's not fatal there. This happens because
the ll has x86 options in it, but the RUN used whatever the host triple
was.
I don't know what's critical in this file, so I'm adding a --target x86
option to the test to fix this.
Commit: fc6a6716ed7a0b90535ad2b02abff1b041cce542
https://github.com/llvm/llvm-project/commit/fc6a6716ed7a0b90535ad2b02abff1b041cce542
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
Promote BOLT from Office hours to Online Sync-Up (#222492)
Office hours are intended for chats with individual contributors:
> A number of experienced LLVM contributors make themselves available
for a chat on a regular schedule, to anyone who is looking for some
guidance.
BOLT community has outgrown office hours format and has been operating
as sync-up.
Reflect that in the Getting Involved page.
Commit: 6e85ed2ede8bc34753e7b8740ccdf4b309a80fdf
https://github.com/llvm/llvm-project/commit/6e85ed2ede8bc34753e7b8740ccdf4b309a80fdf
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/LLVMIR/pch.h
M mlir/lib/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
Log Message:
-----------
[mlir][LLVM] Reuse a PCH for MLIRLLVMDialect (NFC) (#222578)
Build a private precompiled header from the LLVM dialect and LLVM IR
headers and use it for MLIRLLVMDialect. Build dialect libraries before
conversions so the PCH is available early and repeated parsing is
avoided.
Relative to the MLIRIR PCH parent, clean Release builds of LLVM and MLIR
with `ninja -j16` improved as follows:
```
wall: 420.41s -> 398.79s (-5.14%)
user: 6125.97s -> 5789.14s (-5.50%)
system: 481.88s -> 455.05s (-5.57%)
```
Assisted-by: Codex
Commit: a726ed254aeaae71a92fddd094130b2e1588ce42
https://github.com/llvm/llvm-project/commit/a726ed254aeaae71a92fddd094130b2e1588ce42
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
Log Message:
-----------
[AMDGPU][NFC] Fix salu use to use SGPR (#222657)
Fix tests with "salu_use" in their name to use SGPRs.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 3dfd0f8f396075678ae16f623eb01390b5b140d0
https://github.com/llvm/llvm-project/commit/3dfd0f8f396075678ae16f623eb01390b5b140d0
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/IRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
Log Message:
-----------
[IRBuilder] Remove unused AllocTy argument (#222667)
This argument is not used at all. The size is explicitly passed in a
separate argument.
Commit: 4d09d062b4fb2e22f54b1125cbcea734efda81a8
https://github.com/llvm/llvm-project/commit/4d09d062b4fb2e22f54b1125cbcea734efda81a8
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/CodeViewSymbols.def
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/DebugInfo/CodeView/SymbolDumper.cpp
M llvm/lib/DebugInfo/CodeView/SymbolRecordMapping.cpp
M llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
A llvm/test/tools/llvm-pdbutil/s-association.yaml
M llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp
Log Message:
-----------
[CodeView] Read and dump `S_ASSOCIATION` (#221034)
`S_ASSOCIATION` associates one symbol with another one. Right now, it's
only used for coroutines. The `get_associatedSymbol*` functions from
[`IDiaSymbol8`](https://learn.microsoft.com/en-us/visualstudio/debugger/debug-interface-access/idiasymbol8)
use this record. I'm not sure if the VS debugger uses this at all.
The symbol value was added earlier, but we weren't able to read/write
it. Also, lld would remove it when linking, as it didn't know if it
contained type indices.
This PR adds support for that. It's only visible in llvm-pdbutil where
we can dump it and roundtrip through yaml. I checked that it uses the
correct format when used with the DIA dump sample.
The coroutine kind is still missing. It's contained in the flags of an
`S_FRAMEPROC`. But it'd like to wait for #215887 which touches the flags
in YAML.
Commit: 8f100d2b11256fb538ace5ac45c9cd9be5d56335
https://github.com/llvm/llvm-project/commit/8f100d2b11256fb538ace5ac45c9cd9be5d56335
Author: Pablo Reble <pablo.reble at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
Log Message:
-----------
[SLP][AMDGPU] Fix test to actually exercise count-check condition (#222022)
The gfx906 RUN lines in `inst-count-heuristic.ll` never exercised the
`SLPInstCountCheck` heuristic they were meant to test.
This patch converts the test kernel from `i32` to `i16` elements so the
heuristic's `getVectorFactor() == 2` gate is actually reachable on
gfx906, and adds a `-slp-inst-count-check=false` RUN line to cover the
non-default behavior.
Commit: 5777c75fd91efa7abce23a74c4ec2381e8084b44
https://github.com/llvm/llvm-project/commit/5777c75fd91efa7abce23a74c4ec2381e8084b44
Author: Pablo Reble <pablo.reble at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
Log Message:
-----------
[SLP][AMDGPU] Fix load-address typo in v4f16 combine tests (#222112)
Patch addresses issue where tests are not performing 4 contiguous
elements load/store chain as intended.
- Correcting both typos (`%tmp6` vs. `%tmp10`) so each function
represents a contiguous 4-element chain.
- `copysign_combine_v4f16` and `canonicalize_combine_v4f16` now
vectorize identically on `GFX8` and `GFX9`.
- Adding `canonicalize_combine_v4f16_noncontiguous`, to preserve
existing test coverage, so the non-contiguous-gather path isn't silently
dropped.
Commit: 3c3c3d8141fe7582baab9c15ffd0bbfbba4ac8eb
https://github.com/llvm/llvm-project/commit/3c3c3d8141fe7582baab9c15ffd0bbfbba4ac8eb
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[LV] Strip unnecessary cl::opts from headers (NFC) (#221891)
Mark the ones which are static as such, strip declarations in headers to
avoid unnecessary dependencies, and nest the non-static ones under the
llvm namespace.
Commit: c47af0575fcfd5c3713ee009595500eb1ec0104b
https://github.com/llvm/llvm-project/commit/c47af0575fcfd5c3713ee009595500eb1ec0104b
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
Log Message:
-----------
[AMDGPU] Change physical VGPRs to 1024 for gfx13 (#222615)
GFX13 has 1024 physical VGPRs per SIMD in wave32 (512 in wave64)
Commit: fff83ec21990ed0bfee300f175b03317b1f709d6
https://github.com/llvm/llvm-project/commit/fff83ec21990ed0bfee300f175b03317b1f709d6
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
Log Message:
-----------
[AMDGPU] Add gfx13 MC support for v_cvt_scale_pk32_* instructions (#222616)
Commit: d5c0de99769824a032ef2f602f9939e28d259f06
https://github.com/llvm/llvm-project/commit/d5c0de99769824a032ef2f602f9939e28d259f06
Author: Anirudh Mathur <126768505+AnirudhMathur12 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/sys/stat/CMakeLists.txt
A libc/src/sys/stat/futimens.h
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/futimens.cpp
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/futimens_test.cpp
Log Message:
-----------
[libc] Implement futimens (#222251)
futimens(fd, times) is implemented on Linux by delegating to
the utimensat system call.
Fixes #220764
Commit: a4cff758b654b7c49c35e7445a025681b8e7a7f2
https://github.com/llvm/llvm-project/commit/a4cff758b654b7c49c35e7445a025681b8e7a7f2
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Introduce DeadInstrMorgue (#221482)
Move dead instructions collector and erasor into VecUtils, so that
it is usable by both, BundleVec and LoadStoreVec, vectorizers. NFC
Commit: 7962fc367a83caf8442a474660ab93ec5ed1ac22
https://github.com/llvm/llvm-project/commit/7962fc367a83caf8442a474660ab93ec5ed1ac22
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
Log Message:
-----------
[AMDGPU] Enable CSE in the GlobalISel post-legalizer combiner (#217258)
Enable GISel CSE in the legacy AMDGPU post-legalizer combiner so it
matches the new pass-manager path.
Use the standard CSE configuration for the optimization level. Create
correctly constrained virtual registers during legalization instead of
mutating register classes after creation, and notify GlobalISel
observers when register operands are replaced. This also updates the
affected GlobalISel checks.
More context:
https://github.com/llvm/llvm-project/pull/216274#pullrequestreview-4964537468
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 1e6f0cbabe1bce674eadb77814d98e2263823384
https://github.com/llvm/llvm-project/commit/1e6f0cbabe1bce674eadb77814d98e2263823384
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/semantics/DispatchThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ms.input.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ps.output.hlsl
M clang/test/SemaHLSL/Semantics/groupindex.hlsl
M clang/test/SemaHLSL/Semantics/invalid_entry_parameter.hlsl
A clang/test/SemaHLSL/Semantics/output-parameters.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
A clang/test/SemaHLSL/Semantics/semantic-indexing.hlsl
M clang/test/SemaHLSL/Semantics/target.ps.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.output.hlsl
M clang/test/SemaHLSL/Semantics/vertexid.ps.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M llvm/include/llvm/Frontend/HLSL/SemanticSignatures.h
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticStagesTest.cpp
Log Message:
-----------
[NFC][SemaHLSL][CGHLSL] Move semantic classification to common `HLSL/SemanticSignatures` (#218058)
Updates SemaHLSL and CGHLSL to not use stringref compares to distinguish
semantics and converts them to a common `SemanticKind` enum.
Further, it moves the classification of valid shader stages into a
common table to denote where a semantic is interpreted and how it is
used to to derive if it is valid.
This also updates tests that were using invalid semantic constructs to
use corrected versions.
This is a pre-req for the signature packing issues (#205875, etc) and
#189765
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 5784163e14db80f999a4269da2877215791e2617
https://github.com/llvm/llvm-project/commit/5784163e14db80f999a4269da2877215791e2617
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SizeOpts.cpp
Log Message:
-----------
[SizeOpts] Remove dead struct BasicBlockBFIAdapter (NFC) (#222536)
The last uses were removed on June 28, 2023 in commit
80155cbf0be1744953edf68b9729c24bd0de79c4 when hotness/coldness queries
were refactored into templated ProfileSummaryInfo member functions.
Assisted-by: Antigravity
Commit: f7dd24bbe0e94ba94e3c6feda1703544e631a485
https://github.com/llvm/llvm-project/commit/f7dd24bbe0e94ba94e3c6feda1703544e631a485
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/docs/Tutorials/transform/Ch1.md
M mlir/docs/Tutorials/transform/Ch4.md
M mlir/docs/Tutorials/transform/ChH.md
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/test/Dialect/Arith/sharding-propagation.mlir
M mlir/test/Dialect/Bufferization/canonicalize.mlir
M mlir/test/Dialect/Linalg/block-pack-matmul.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/elementwise/fold.mlir
M mlir/test/Dialect/Linalg/elementwise/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/elementwise/invalid.mlir
M mlir/test/Dialect/Linalg/elementwise/roundtrip.mlir
M mlir/test/Dialect/Linalg/fold-add-into-dest.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/scalable-unpack-producer-fusion.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-generalize.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-binary.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/Dialect/SparseTensor/encoding_with_symbols.mlir
M mlir/test/Dialect/SparseTensor/external_after_codegen.mlir
M mlir/test/Dialect/Transform/test-promote-tensors.mlir
M mlir/test/Examples/transform/Ch1/invalidation-1.mlir
M mlir/test/Examples/transform/Ch1/invalidation-2.mlir
M mlir/test/Examples/transform/Ch1/sequence.mlir
M mlir/test/Examples/transform/Ch2/sequence.mlir
M mlir/test/Examples/transform/Ch3/sequence.mlir
M mlir/test/Examples/transform/Ch4/multiple.mlir
M mlir/test/Examples/transform/Ch4/sequence.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
M mlir/test/Interfaces/TilingInterface/query-fusability.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Interfaces/TilingInterface/tile-elementwise.mlir
M mlir/test/Interfaces/TilingInterface/tile-fuse-and-yield-using-interface.mlir
M mlir/test/python/dialects/linalg/ops.py
Log Message:
-----------
[MLIR][Linalg] Change the syntax of elementwise kind attribute (#222569)
Remove the need to add a "kind=" lead for the elementwise operation
name, as well as the fully specified namespace for the attribute,
shortening the syntax from:
```
linalg.elementwise kind=#linalg.elementwise_kind<add>
```
to
```
linalg.elementwise <add>
```
Closes #221194
Assisted by: Claude Opus
Commit: e8c833b96ccd6a9e950e9a67fb59d451668532d1
https://github.com/llvm/llvm-project/commit/e8c833b96ccd6a9e950e9a67fb59d451668532d1
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/extf_truncf.mlir
Log Message:
-----------
[MLIR][XeGPU] Lower arith.truncf wider than one xevm.truncf group (#217130)
`xevm.truncf` lowers to device builtins that convert exactly 16 f16/bf16
elements
per call, so `TruncfToXeVMPattern` only matched a 16-element source. A
workgroup-level mxfp GEMM that quantizes A in the kernel produces a
wider one,
which nothing else lowers, so the module failed to build:
%r = arith.truncf %a : vector<32xbf16> to vector<32xf4E2M1FN>
// cannot be converted to LLVM IR: missing
`LLVMTranslationDialectInterface`
// registration ... for op: arith.truncf
Convert a whole number of groups at a time instead: slice the source
into
16-element groups, emit one `xevm.truncf` per group, and concatenate the
packed
results before the final bitcast. A source of exactly one group takes
the original
path with unchanged code, and a source that is not a whole number of
groups is
still left to the regular arith-to-LLVM path.
`arith.extf` carries the same restriction on its result, but no wider
case has come
up, so it is left as is.
Commit: 9d4a7d05d2ef4774f08a0f95faef510c0be469a9
https://github.com/llvm/llvm-project/commit/9d4a7d05d2ef4774f08a0f95faef510c0be469a9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Basic/LangOptions.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/test/CodeGen/Hexagon/swp-large-rec.ll
R llvm/test/CodeGen/X86/llc-fp-contract-warning.ll
M llvm/tools/llc/llcdriver.cpp
Log Message:
-----------
CodeGen: Remove AllowFPOpFusion from TargetOptions (#222683)
Commit: a56fd548f257c4fc89387ab2bb483acee7c59747
https://github.com/llvm/llvm-project/commit/a56fd548f257c4fc89387ab2bb483acee7c59747
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Tools/mlir-translate/MlirTranslateMain.h
M mlir/lib/Tools/mlir-translate/MlirTranslateMain.cpp
Log Message:
-----------
[mlir-translate] Add structured translation entry point (#222623)
Please read: [RFC: Embeddable LLVM tool drivers for long-lived
hosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and the [MLIR
section](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-mlir-13).
`mlir-opt` already separates its standalone command-line frontend from
its reusable implementation:
```text
command-line parsing
↓
MlirOptMainConfig
↓
MlirOptMain(input buffer, output stream, registry, config)
```
`mlir-translate` currently combines those responsibilities inside
`mlirTranslateMain(int argc, char **argv, ...)`: it registers and parses
its command-line options, opens the input and output files, and then
performs the translations.
This patch applies the existing mlir-opt structure to mlir-translate. It
extracts the MLIR translation executor behind a structured overload
accepting an input buffer, output stream, selected Translation objects
and an MlirTranslateMainConfig. The existing command-line entry point
continues to parse the same options and delegates to the new overload,
so its command-line behaviour remains unchanged.
Separating parsing from execution is useful for any application
embedding MLIR. Such an application already has its input, output and
selected translation, and should not be required to install another
command-line frontend into the process merely to call MLIRTranslateLib.
[WasmBolt](https://github.com/anutosh491/WasmBolt)(try
[here](https://anutosh21.github.io/WasmBolt/)) is one concrete consumer.
It runs `mlir-opt`, `opt`, `llc`, Clang and LLD inside one long-lived
browser-hosted LLVM process. Calling the complete `mlir-opt` and
`mlir-translate` command-line frontends in that process causes common
options such as `-o` to be registered twice in LLVM's process-global
command-line registry.
```
mlir-translate: CommandLine Error: Option 'o' registered more than once!
LLVM ERROR: inconsistency in registered CommandLine options
```
The structured entry point allows WasmBolt to invoke the actual MLIR
translation operation without registering another command-line frontend.
This is needed to continue naturally from the MLIR LLVM dialect to LLVM
IR inside the same compiler session.
Add a simple test where the test register its own `-o` option first,
then runs two translations through the new API and checks the output.
This confirms that the translation path works without touching the
command-line parser. **Can Improve it a bit if it looks too informal.**
Commit: 5b757b81db35e7611f0d5f242a2bd53f3894c084
https://github.com/llvm/llvm-project/commit/5b757b81db35e7611f0d5f242a2bd53f3894c084
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__configuration/compiler.h
M libcxx/include/__memory/allocator.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_temporary_buffer.h
R libcxx/include/__new/allocate.h
M libcxx/include/__utility/small_buffer.h
M libcxx/include/module.modulemap.in
M libcxx/include/new
M libcxx/src/include/aligned_alloc.h
R libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.capacity/max_size.pass.cpp
M libcxx/test/std/language.support/support.dynamic/hardware_inference_size.compile.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cons/size.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/pointer_destruction.pass.cpp
Log Message:
-----------
[libc++] Remove __libcpp_allocate (#220981)
We use `__libcpp_allocate` and friends only in very specific
circumstances. Instead of providing a private API we can make
`std::allocator` the default API for the uses of `__libcpp_allocate`.
Commit: 20ddf3e2f5a9fa2717d9cfea19660ef1f0399044
https://github.com/llvm/llvm-project/commit/20ddf3e2f5a9fa2717d9cfea19660ef1f0399044
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMerge.cpp
M compiler-rt/test/fuzzer/fuzzer-dirs.test
M compiler-rt/test/fuzzer/fuzzer-oom-with-profile.test
M compiler-rt/test/fuzzer/fuzzer-oom.test
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[libFuzzer] Use uppercase "B" for byte units in output (#220828)
Fixes issue #56766. libFuzzer printed data sizes as "b", "Kb" and "Mb",
which denote bits. Use "B", "KB" and "MB" instead.
Commit: 72f5694df7b6c9fa94f22468f5cd468d305b9917
https://github.com/llvm/llvm-project/commit/72f5694df7b6c9fa94f22468f5cd468d305b9917
Author: Tapiwa Gonga <126596199+tapiwagonga at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/docs/dev/code_coverage.md
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/HermeticTestUtils.cpp
Log Message:
-----------
[libc] Enable full-build code coverage (#221802)
Extended LIBC_ENABLE_COVERAGE to support LLVM_LIBC_FULL_BUILD=ON and
added the LIBC_ENABLE_COVERAGE_MCDC CMake option for MC/DC coverage.
This enables developers and CI pipelines to measure source-level and
MC/DC coverage directly on hermetic tests in full-build configurations
without relying on the host C library.
Updated add_libc_hermetic in LLVMLibCTestRules.cmake to link hermetic
tests with -noprofilelib, -u__llvm_profile_runtime, and compiler-rt's
profiling library. Replaced internal entrypoint objects in
link_object_files with public entrypoint objects for the C functions
referenced by libclang_rt.profile.a.
Added calloc and __errno_location to HermeticTestUtils.cpp to satisfy
remaining freestanding profiling runtime dependencies. Updated
libc/docs/dev/code_coverage.md with full-build instructions.
Assisted-by: Automated tooling, human reviewed.
Commit: 19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4
https://github.com/llvm/llvm-project/commit/19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4
Author: Bar Soloveychik <barsolo at meta.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/source/Core/Value.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.h
M lldb/source/Utility/RegisterValue.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterVector.py
M lldb/unittests/Target/RegisterTypeBuilderClangTest.cpp
M lldb/unittests/Utility/RegisterValueTest.cpp
Log Message:
-----------
[lldb] Expose vector registers through SBValue (#220707)
This is adding GDB remote vector register support.
- Build exact Clang types from parsed vector metadata.
- Use native Clang vectors where valid and arrays where required to
preserve exact layouts.
- Support nested, pointer, boolean, and non-power-of-two vectors.
- Expose vector lanes through `SBValue` children and expression paths.
- Handle typed vector data correctly across target byte orders.
- Add builder, SB API, layout, cache, and big-endian tests.
Example:
```
vector = frame.FindRegister("v0")
vector.GetNumChildren() # 4
vector.GetChildAtIndex(2).GetValue() # "3.5"
vector.GetValueForExpressionPath("[2]").GetValue() # "3.5"
v = frame.FindRegister("v0")
print([v.GetChildAtIndex(i).GetValue()
for i in range(v.GetNumChildren())])
# ['1.5', '2.5', '3.5', '4.5']
```
Structured `register read` output is added separately in patch 5.
---------
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: d23678bd45b149107e43eed3d56a02571bafef7f
https://github.com/llvm/llvm-project/commit/d23678bd45b149107e43eed3d56a02571bafef7f
Author: Ran Regev <regev.ran at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/AST/DeclPrinter.cpp
A clang/test/AST/ast-print-decomposition.cpp
M clang/test/Analysis/anonymous-decls.cpp
M clang/test/Analysis/cfg.cpp
Log Message:
-----------
[clang] Support DecompositionDecl in -ast-print (#221711)
`DeclPrinter` had no `VisitDecompositionDecl`, so `auto [a, b] = get();`
printed as `auto = get();`, silently dropping the binding list (worse
at namespace scope, where it also produced a stray empty statement per
binding).
Add `DeclPrinter::VisitDecompositionDecl`, printing the full
`type [bindings] = init;` form for all three decomposition kinds
(aggregate/member, array, tuple-like), matching what `VisitVarDecl` does
for an ordinary declaration. Specifier and initializer printing is
shared between the two via two helpers (`printVarDeclSpecifiers`,
`printVarInitializer`) so they can't drift apart.
Each binding prints correctly, including a pack's leading `...` and
per-binding attributes. `BindingDecls` are skipped when walking a
`DeclContext` directly, since each is already printed as part of its
`DecompositionDecl;` a decomposition declaration is likewise kept out of
the tag-declaration grouping in `VisitDeclContext`, which would
otherwise merge it into a preceding `struct S { ... } obj;`.
Assisted-by: AI
Commit: bdf81254f94e1449ee10e50593df1211f43ba2e1
https://github.com/llvm/llvm-project/commit/bdf81254f94e1449ee10e50593df1211f43ba2e1
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.h
M compiler-rt/lib/ubsan/ubsan_handlers.cpp
Log Message:
-----------
[compiler-rt] Handle weak interfaces with MinGW GCC (#222706)
Windows weak-function emulation uses MSVC linker /alternatename
directives, which GNU ld does not support. Use direct exported
definitions, avoid registering unsupported DLL weak aliases, and
reference UBSan's real C++ implementation.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: 8124aa1a3567930ab0823b760ec81ac2457b7477
https://github.com/llvm/llvm-project/commit/8124aa1a3567930ab0823b760ec81ac2457b7477
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix bazel build for FrontendHLSL (#222716)
Fixes #1e6f0cbabe1bce674eadb77814d98e2263823384 by adding missing
dependency.
Commit: 8c520baeb4ed4f1c8d07f84ce5d5f5922a754bed
https://github.com/llvm/llvm-project/commit/8c520baeb4ed4f1c8d07f84ce5d5f5922a754bed
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/asan/asan_globals_win.cpp
Log Message:
-----------
[compiler-rt][asan] Include intrin.h for MinGW GCC (#222709)
asan_globals_win.cpp calls __debugbreak in the runtime thunk
configurations. Include MinGW's intrinsic header so the function is
declared when this file is compiled with GCC.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: bd05ca8ca6da9a275234c59fcb1886505a5958e0
https://github.com/llvm/llvm-project/commit/bd05ca8ca6da9a275234c59fcb1886505a5958e0
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/asan/asan_win_common_runtime_thunk.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win_defs.h
Log Message:
-----------
[compiler-rt] Support GNU section attributes on Windows (#222707)
MSVC and Clang place sanitizer sentinels and CRT callbacks with
__declspec(allocate) after declaring their sections with #pragma
section. MinGW GCC uses the section attribute instead, so select the
appropriate spelling for each compiler.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: 2d51e69fd09e4bdeeed441c8c5fc256584178c79
https://github.com/llvm/llvm-project/commit/2d51e69fd09e4bdeeed441c8c5fc256584178c79
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/cmake/modules/CMakeLists.txt
M mlir/cmake/modules/CMakeLists.txt
Log Message:
-----------
[CMake] Don't reference unexported targets from dependency-only configs (#222630)
#221724 stopped exporting a project's targets file when that project is
enabled only as another project's dependency, but the build-tree
`ClangConfig.cmake` and `MLIRConfig.cmake` still include it
unconditionally. `find_package()` therefore finds the config and fails
inside it:
```
CMake Error at build/lib/cmake/clang/ClangConfig.cmake:19 (include):
include could not find requested file:
build/lib/cmake/clang/ClangTargets.cmake
Call Stack (most recent call first):
CMakeLists.txt:90 (find_package)
```
This breaks any configuration that enables Flang without also enabling
Clang or MLIR explicitly: `runtimes/CMakeLists.txt` calls
`find_package(Clang ...)`, which is deliberately not `REQUIRED` and is
expected to tolerate an unavailable package — but a *half-generated*
package is a hard error rather than a "not found". Concretely,
`-DLLVM_ENABLE_PROJECTS=flang -DLLVM_ENABLE_RUNTIMES=flang-rt` fails at
`runtimes-configure`, which is the configuration premerge uses for
flang-rt changes.
This patch guards the include the same way the export itself is guarded,
so a dependency-only project generates a config without a dangling
include. The install-tree path already handles this through
`get_config_exports_includes()`; only the build-tree path was missed.
MLIR has the same defect and is fixed here too. It is currently latent
only because `runtimes/CMakeLists.txt` calls `find_package(Clang)` and
not `find_package(MLIR)`; a `find_package(MLIR)` against a
dependency-only build tree fails identically at `MLIRConfig.cmake:33`.
Assisted-by: AI
Commit: dbeea4508e52856497e4080b1d3b265975044795
https://github.com/llvm/llvm-project/commit/dbeea4508e52856497e4080b1d3b265975044795
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang-rt/lib/cuda/init.cpp
Log Message:
-----------
[flang][cuda] Drop Mcuda_compiled definition (#222695)
Commit: bfe74bd081a4ad6322c6932c146d4d99815029ed
https://github.com/llvm/llvm-project/commit/bfe74bd081a4ad6322c6932c146d4d99815029ed
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-function-pointer-debug-none-base.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_blocking_pipes/PipeBlocking.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-select-untyped-ptr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-void-call-aggregate-arg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_kernel_attributes/max_work_group_size.ll
Log Message:
-----------
[NFC][SPIR-V] Fix missing RUN prefix that disabled spirv-val checks (#222609)
Commit: 4814e098872b365e52401a3ebb64c91b3bd0b90d
https://github.com/llvm/llvm-project/commit/4814e098872b365e52401a3ebb64c91b3bd0b90d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/Lowering/fenv.cir
M clang/test/CIR/Lowering/goto.cir
Log Message:
-----------
[Clang][CIR] Adapt tests post #217277 (#222583)
Adapt tests post #217277. Failing bot:
* https://lab.llvm.org/staging/#/builders/241/builds/13
Commit: 9974c3864e1ffb5feed8e99d4191084a96d84a09
https://github.com/llvm/llvm-project/commit/9974c3864e1ffb5feed8e99d4191084a96d84a09
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Log Message:
-----------
[gn] port 6fbfc9261c8f453 (#222726)
6fbfc9261c8f453 make c-t-extra/clangd/unittests/DiagnosticsTests.cpp
include clang-tidy-config.h.
Commit: 7c0969c0842a1b19bcffd8bf3b67a76badb2c431
https://github.com/llvm/llvm-project/commit/7c0969c0842a1b19bcffd8bf3b67a76badb2c431
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Tosa/Transforms/TosaGatherScatterHardening.cpp
A mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening-invalid.mlir
A mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening.mlir
Log Message:
-----------
[TOSA] Add pass to sanitize gather/scatter indices (#221200)
Add new TosaGatherScatterHardeningPass TOSA pass to clamp indices before
they are fed to a tosa.gather or tosa.scatter unless a suitable clamp
sequence already exists. This enables avoiding out-of-bounds accesses on
untrusted indices in tosa.gather and tosa.scatter lowering.
The pass fails if the dimension indexed by the indices tensor of any of
the tosa.gather or tosa.scatter is dynamic. The pass supports EXT-INT64
by using the same element type in the clamp min/max sequence as the
indices tensor. In case the indexed dimension is bigger than can be
represented in the element type bitwidth the maximum value in that
bitwidth is used.
Assisted-by: codex
Signed-off-by: Thomas Preud'homme <thomas.preudhomme at arm.com>
Commit: e47d10f55719cb5bc7dac81d49277938813b5ee4
https://github.com/llvm/llvm-project/commit/e47d10f55719cb5bc7dac81d49277938813b5ee4
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/__support/wctype_utils.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscasecmp.cpp
A libc/src/wchar/wcscasecmp.h
A libc/src/wchar/wcsncasecmp.cpp
A libc/src/wchar/wcsncasecmp.h
M libc/test/src/__support/wctype_utils_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscasecmp_test.cpp
A libc/test/src/wchar/wcsncasecmp_test.cpp
M libc/utils/docgen/wchar.yaml
Log Message:
-----------
[libc] Add wcscasecmp and wcsncasecmp implementations. (#222154)
Add a helper to wctype_utils.h for three-way comparison of individual
`wchar_t`s. As is the case in existing code, `wchar_t` is presumed to be
UTF-32.
Assisted-by: Automated tooling, human reviewed.
Commit: e286cb01a6ff6c01024db4e8216134b49163d1e6
https://github.com/llvm/llvm-project/commit/e286cb01a6ff6c01024db4e8216134b49163d1e6
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] fix mistake from f3909e073dd93f (#222735)
Commit: d90d78fe5ba15d66fea0fd0f9a3977f20f34aceb
https://github.com/llvm/llvm-project/commit/d90d78fe5ba15d66fea0fd0f9a3977f20f34aceb
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/HLFIR/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
Fix bazel builds (#222733)
- For flang/lib/Optimizer/HLFIR/Transforms -- fixes
https://github.com/llvm/llvm-project/pull/222013 by adding missing
dependencies.
- For lldb/source/Plugins:PluginRegisterTypeBuilderClang -- fixes
https://github.com/llvm/llvm-project/pull/220707 by adding missing
dependency
Commit: 4eae56cc40e02d55d926de8485ad846d74612449
https://github.com/llvm/llvm-project/commit/4eae56cc40e02d55d926de8485ad846d74612449
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 672843a3f2ee (#222740)
Commit: 30eac2a761a9773f970b539f9ea029c39e88b21a
https://github.com/llvm/llvm-project/commit/30eac2a761a9773f970b539f9ea029c39e88b21a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 5b757b81db35 (#222739)
Commit: 93ab99f40d86dead34ccb0d2aa45dfdd06d65cc9
https://github.com/llvm/llvm-project/commit/93ab99f40d86dead34ccb0d2aa45dfdd06d65cc9
Author: Konstantin Bogdanov <thevar1able at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/X86/ctlz.ll
M llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll
Log Message:
-----------
[LoopIdiom] Recognize the ctlz/cttz idiom when the input is known non-zero (#222373)
LoopIdiomRecognize converts a shift-until-zero loop to `ctlz`/`cttz`.
When the loop uses the count outside the loop, it needs a zero check of
the input before the loop. Without the check, the inputs 0 and 1 give
the same count. The recognizer stops when the check is not present.
The check is not necessary when the input is known non-zero. InstCombine
can remove the check for such inputs. Then the recognizer does not
convert the loop. This happens in `sbc_calc_scalefactors` from ffmpeg
with #222334: the input is an or reduction that starts at 32768, so it
is never zero, and the loop stays a loop.
This patch makes the recognizer accept a known non-zero input in place
of the zero check. The conversion is exact in this case.
`ctlz-loop.ll` in PhaseOrdering had a FIXME for a loop over `abs(n)`.
The recognizer now converts that loop too.
For the ffmpeg case, `isKnownNonZero` must also see that an or
recurrence with a non-zero start is non-zero. That change goes into
#222334.
Commit: a241c37f86cfe135cfa6c130b4aaf2ecd6a9d064
https://github.com/llvm/llvm-project/commit/a241c37f86cfe135cfa6c130b4aaf2ecd6a9d064
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 1e6f0cbabe1b (#222738)
Commit: a4f04ab5e25fa5dfebf83e3808b6ab96fd94f9bf
https://github.com/llvm/llvm-project/commit/a4f04ab5e25fa5dfebf83e3808b6ab96fd94f9bf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
Log Message:
-----------
[gn build] Port c86292488b86 (#222741)
Commit: 2d57805c92fb15e0a6c7c2f76d1927fbe3d3522a
https://github.com/llvm/llvm-project/commit/2d57805c92fb15e0a6c7c2f76d1927fbe3d3522a
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc:__support_wctype_utils (#222743)
Fixes https://github.com/llvm/llvm-project/pull/222154 (commit
e47d10f55719cb5bc7dac81d49277938813b5ee4) by adding missing dependency.
Commit: b686fb567fa4baeb810b0ae184811415daae68a1
https://github.com/llvm/llvm-project/commit/b686fb567fa4baeb810b0ae184811415daae68a1
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/delete-non-virtual-dtor.cpp
Log Message:
-----------
[clang][Sema] Don't warn about non-virtual destructors on destroying delete (#222047)
A destroying `operator delete `takes over destruction, so the delete
expression never invokes the destructor and
[[expr.delete]p3](https://eel.is/c++draft/expr.delete#3) carves it out.
Skip `CheckVirtualDtorCall` when the selected deallocation function is
destroying. `::delete` and `delete[]` keep warning.
Fixes #65524
Commit: 26609f5b95679e02d2373a7c97ff811872a4b505
https://github.com/llvm/llvm-project/commit/26609f5b95679e02d2373a7c97ff811872a4b505
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
A llvm/test/Transforms/SimpleLoopUnswitch/pr219510.ll
Log Message:
-----------
[SimpleLoopUnswitch] Fix bug in partially invariant unswitching (#222118)
Partial invariant unswitching can potentially hoist a load from header
to the preheader of the loop. If a potentially no-return function call
exists in the loop header before the load instruction, the
transformation is still performed, but this is not correct.
Commit: ffdc7df10d016542cee44dec8b777161a309bd55
https://github.com/llvm/llvm-project/commit/ffdc7df10d016542cee44dec8b777161a309bd55
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/memchr-11.ll
M llvm/test/Transforms/InstCombine/memchr-2.ll
M llvm/test/Transforms/InstCombine/memchr-3.ll
M llvm/test/Transforms/InstCombine/memchr-6.ll
M llvm/test/Transforms/InstCombine/memchr.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[SimplifyLibCalls] Explicitly annotate memchr selects (#222734)
SimplifyLibCalls creates a variety of selects when optimizing calls to
memchr. Explicitly annotate them as unknown as the conditions always
depend on a non-constant parameter to memchr with which we cannot infer
probability information without value profile data.
Commit: 1db5b9c26f5c153244e7617ad95ef140a1bdd2a0
https://github.com/llvm/llvm-project/commit/1db5b9c26f5c153244e7617ad95ef140a1bdd2a0
Author: SharonXSharon <xiaoranxu.nju at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A compiler-rt/test/sanitizer_common/TestCases/Linux/opendir_null.cpp
R compiler-rt/test/sanitizer_common/TestCases/Posix/opendir_null.cpp
Log Message:
-----------
[sanitizer] Address opendir interceptor test review comments (#222732)
Address comments on https://github.com/llvm/llvm-project/pull/221309
Move `opendir_null.cpp` to the `Linux` tests, convert the `LD_PRELOAD`
shim from `C++` to `C`, and simplify the null path construction.
Co-authored-by: Sharon Xu <sharonxu at fb.com>
Commit: aa7bd9ad7bd7f80da145af88e33acf95a7a6f671
https://github.com/llvm/llvm-project/commit/aa7bd9ad7bd7f80da145af88e33acf95a7a6f671
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/ConstantRange.h
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/CorrelatedValuePropagation/or-disjoint.ll
A llvm/test/Transforms/SCCP/or-disjoint.ll
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[ConstantRange] Add binaryOp supporting 'or disjoint'. (#222573)
Promote logic from https://github.com/llvm/llvm-project/pull/221832 to
ConstantRange::binaryOp so it can also be re-used from SCCP.
This enables a few additional folds & flag inference end-to-end:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1227
PR: https://github.com/llvm/llvm-project/pull/222573
Commit: e267729a4290b9ccd82c35dfbd2257473253b3e5
https://github.com/llvm/llvm-project/commit/e267729a4290b9ccd82c35dfbd2257473253b3e5
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-lsp-server/cir-lsp-server.cpp
Log Message:
-----------
[CIR][NFC] Reduce the dialects referenced by cir-lsp-server to minimum (#222131)
This is 1 of 2 patches that build on the work of others, and reduces the
list of dialects to just those in CIR + a handful of others. Between
this, 1 other commit, and the existing patches proposed by others, we
reduce the 'overhead' of the CIR build to +30%.
AI Disclaimer: Claude came up with this and the list. I'm not sure it is
correct, but we pass all tests.
Commit: db5421adfa1d8984bf0015ded33d12f9bbfbe80f
https://github.com/llvm/llvm-project/commit/db5421adfa1d8984bf0015ded33d12f9bbfbe80f
Author: ThePo1es <choijinbeom9 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/umask.h
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/umask.cpp
A libc/src/sys/stat/umask.h
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/umask_test.cpp
Log Message:
-----------
[libc] Implement umask (#222499)
Implement the POSIX umask() entrypoint for Linux and register it for
aarch64, riscv and x86_64. umask cannot fail, so the syscall wrapper
returns mode_t directly and the entrypoint does not touch errno.
Fixes #220759
Assisted-by: Claude Code
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 78d1301c0ffda9d2a1ebcbc90ed60ed3f0a4f04d
https://github.com/llvm/llvm-project/commit/78d1301c0ffda9d2a1ebcbc90ed60ed3f0a4f04d
Author: Oliver Old <mail at oold.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
[llvm][release] Update package versions in the Windows release script (#215749)
- Upgrade LibXML2 to version 2.15.3
- Fix clang-cl/lld-link check never failing
- Fix PYTHONHOME detection failing if no `head` utility is installed
- Fix PYTHONHOME detection failing for Python Manager-installed Python
Fixes #207197.
Fixes #215138.
Commit: 8ed9cadeb6224ca3818f4277935aca31a6c73609
https://github.com/llvm/llvm-project/commit/8ed9cadeb6224ca3818f4277935aca31a6c73609
Author: Jeong Jihyeon <84846295+JihyeonJeong129 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdio.yaml
M libc/src/stdio/CMakeLists.txt
A libc/src/stdio/fmemopen.cpp
A libc/src/stdio/fmemopen.h
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/fmemopen_test.cpp
Log Message:
-----------
[libc] Implement fmemopen (#221748)
Implement the POSIX `fmemopen` function.
### Validation
- Ran `ninja -C build-libc -j8 libc_stdio_unittests`.
- Ran `ninja -C build-libc -j8 check-libc`.
Fixes #220762
Commit: 5b6710a6cc6cca5f182a3fc4f12ce82fd2646c6e
https://github.com/llvm/llvm-project/commit/5b6710a6cc6cca5f182a3fc4f12ce82fd2646c6e
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
Log Message:
-----------
[CIR] Fix a dependency problem in ABI test (#222717)
A recent change removed mlir-translate as a dependency of CIR and
changed tests to use cir-translate instead. One test was committed after
that change and missed the update.
Commit: be9584e0dfc480193fa47645b302f630f41fb772
https://github.com/llvm/llvm-project/commit/be9584e0dfc480193fa47645b302f630f41fb772
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/test/tsan/Darwin/write-interpose.c
Log Message:
-----------
[TSan][Darwin][Test-only] Fix crash in write-interpose.c test (#222656)
Due to this test running with verbosity turned up, an early 'Report'
happened to get caught by the test's write interceptor, and on newer
macOS versions the interceptor's call to printf was attempting to
allocate before the allocator was initialized - leading to a crash.
This patch instead uses snprintf to a stack allocated buffer in order to
avoid allocating in the interceptor.
rdar://184804426
Commit: c5a4e6d87b7dcde64e1a2f4422e1eeccb0d4a509
https://github.com/llvm/llvm-project/commit/c5a4e6d87b7dcde64e1a2f4422e1eeccb0d4a509
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add packed multiply-parts accumulate intrinsics (#222571)
Support the RISC-V P packed multiply-parts accumulate instructions, which
add selected products into `rd`.
The intrinsics lower to dedicated `PMACC_HALVES_*` SelectionDAG nodes
rather than an `add` of plain products, ensuring instruction selection
does not depend on DAGCombine folding. On RV32, the word forms
accumulate into a GPR pair via new `WMACC`, `WMACCU`, and `WMACCSU`
nodes.
Also add corresponding Clang builtins and wrappers in
`riscv_packed_simd.h`.
Spec:
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-multiply-parts-accumulate
Commit: b4af99a87e1fbea9dd170c2c3bd15b9f87a69419
https://github.com/llvm/llvm-project/commit/b4af99a87e1fbea9dd170c2c3bd15b9f87a69419
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
Log Message:
-----------
[VPlan] Use VPlan-based costs for scalarized FP inductions. (#222442)
Continue the migration of induction costs to be VPlan-based by dropping
the legacy fallback in precomputeCosts for FP inductions. Widened FP
inductions were already costed by VPWidenIntOrFpInductionRecipe; the
missing piece is the scalarized form. Extend both VPDerivedIVRecipe and
VPScalarIVStepsRecipe to support FP inductions.
This also removes WidenedIVs, which becomes dead: it is only ever filled
from VPWidenIntOrFpInductionRecipe, and the legacy path now only sees
pointer inductions.
The new cost numbers should be more accurate, taking into account the
int->fp conversion cost, plus FMul and FAdds we generate.
Checking if FAdd/FMul can be folded requires a few additional checks (in
particluar the FAdd requires -0.0 to fold, FMul needs 1.0,
https://alive2.llvm.org/ce/z/g_khUS). Currently we do not yet carry
fast-math flags on the VPDerivedIVRecipes, so those are not considered
for now. The difference should be negligable in practice.
PR: https://github.com/llvm/llvm-project/pull/222442
Commit: 3d9b5d0d0f0a7affd4a5cd34523c60647b9164dc
https://github.com/llvm/llvm-project/commit/3d9b5d0d0f0a7affd4a5cd34523c60647b9164dc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Dialect/LLVMIR/invalid.mlir
Log Message:
-----------
[mlir][LLVM] Prevent vector bit-width overflow (#220898)
Compute vector bit widths from the rank-one MLIR dimension and saturate
the 64-bit product. Otherwise, large dimensions can overflow the
multiplication or be truncated by ElementCount and bypass the 2^17-bit
verifier limit.
Add regression coverage for both vector.insert and vector.extract.
Before the fix, the oversized vector.insert case was accepted and its
expected diagnostic was not produced.
Found by Coverity.
Assisted-by: Codex
Commit: 56d496fa86a8fd4be06b459c278753b4660f42d6
https://github.com/llvm/llvm-project/commit/56d496fa86a8fd4be06b459c278753b4660f42d6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
Log Message:
-----------
[RISCV] Remove TuneHasSingleElementVecFP64 has a configurable tune feature for sifive-x180. (#222496)
X180 is a DLEN=64 CPU with 1 vector ALU. By definition it is always
single element FP64.
Commit: 7d7238007b1f09bf7d4a91115173a996f7758fb1
https://github.com/llvm/llvm-project/commit/7d7238007b1f09bf7d4a91115173a996f7758fb1
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-clang-flang.py
Log Message:
-----------
[Offload] Fix AMDGPU clang/flang buildbot config (#222761)
It appears that this buildbot was misconfigured for quite some time and
not quite running the way it should have been running.
This patch should address the issue of CMake not being able to split the
two paths for the additional cache files at the ';' and thus, not
picking them up correctly.
A local test build succeeded after this fix.
Commit: fc696f791e06bdc0c0aa10afa65e2243db528409
https://github.com/llvm/llvm-project/commit/fc696f791e06bdc0c0aa10afa65e2243db528409
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
A flang/test/Fir/call-properties.fir
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/TableGen/Operator.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Math/Transforms/ExtendToSupportedTypes.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/TableGen/Operator.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
A mlir/test/Conversion/FuncToLLVM/call-attributes.mlir
M mlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir
M mlir/test/Dialect/SPIRV/IR/target-env.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTest.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
Log Message:
-----------
[mlir] Migrate aggregate builders to explicit properties (#219195)
Pass typed property structs and discardable attributes separately at ODS
aggregate builder call sites.
This is part of a general migration to use the "new" properties-based
APIs #155475
Assisted-by: Codex
Commit: 2fc19f8c9d70209bada5249632fd0d2523a59952
https://github.com/llvm/llvm-project/commit/2fc19f8c9d70209bada5249632fd0d2523a59952
Author: Colin De Vlieghere <cdevlieghere at tesla.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
Log Message:
-----------
[mlir][bufferization] Expose checkPreBufferizationAssumptions helper (#221302)
Downstream users of bufferization may want to run this check without
invoking the entire one-shot module analysis. If the check is not run
and invalid IR is encountered, OneShotBufferize tends to crash rather
than emitting a nice error message.
This patch simply exposes `checkPreBufferizationAssumptions` to the
header file so it is accessible to other users.
Commit: 041300fa05151b3819478f33daa4384922b4b74e
https://github.com/llvm/llvm-project/commit/041300fa05151b3819478f33daa4384922b4b74e
Author: Kacper Fiedorowicz <kacper at mail.openlinux.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/aarch64/headers.txt
M libc/include/llvm-libc-macros/darwin/CMakeLists.txt
A libc/include/llvm-libc-macros/darwin/signal-macros.h
M libc/include/llvm-libc-macros/signal-macros.h
M libc/include/llvm-libc-types/__jmp_buf.h
M libc/include/llvm-libc-types/fenv_t.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/sigprocmask.h
M libc/src/setjmp/aarch64/sigsetjmp.cpp
M libc/src/setjmp/darwin/CMakeLists.txt
M libc/src/setjmp/darwin/sigsetjmp_epilogue.cpp
M libc/src/setjmp/longjmp.h
M libc/src/setjmp/setjmp_impl.h
A libc/src/signal/darwin/CMakeLists.txt
A libc/src/signal/darwin/sigaddset.cpp
A libc/src/signal/darwin/sigdelset.cpp
A libc/src/signal/darwin/sigemptyset.cpp
A libc/src/signal/darwin/sigfillset.cpp
A libc/src/signal/darwin/sigprocmask.cpp
M libc/test/UnitTest/FEnvSafeTest.cpp
A libc/test/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/test/src/__support/OSUtil/darwin/sigprocmask_test.cpp
M libc/test/src/signal/sigaddset_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
Log Message:
-----------
[libc] Fix Darwin aarch64 fenv and sigsetjmp build support (#192079)
This patch fixes Darwin aarch64 build failures in libc around fenv and
sigsetjmp support.
Before this change, the Darwin aarch64 fenv implementation did not match
the public fenv_t layout and referenced several Darwin-specific
exception/control bits that were not defined in llvm-libc. This caused
libc builds to fail in fenv_darwin_impl.h with a sizeof(fenv_t) vs.
internal-state mismatch and multiple undeclared-identifier errors for
FE_FLUSHTOZERO and the FPCR trap/flush bits.
This patch fixes that by updating the internal Darwin aarch64
floating-point state layout to match fenv_t, defining the missing Darwin
FPCR bit values used by the implementation, and handling the
flush-to-zero exception bit consistently.
The patch also fixes the Darwin sigsetjmp path by enabling sigjmp_buf
support on Apple targets, adding the Darwin signal pieces needed by that
path (sigaddset, sigdelset, sigemptyset, sigfillset, sigprocmask, plus
Darwin signal macros), and updating the aarch64 sigsetjmp inline
assembly to branch through a local label before jumping to setjmp,
avoiding an assembler error from using cbz with an external symbol
target.
Commit: f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
https://github.com/llvm/llvm-project/commit/f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/test/UnitTest/CMakeLists.txt
A libc/test/UnitTest/CharLiteralUtils.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/stringview_test.cpp
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/writer_test.cpp
Log Message:
-----------
[libc] Parameterize printf_core::Writer test to cover wchar_t. (#222744)
This is a follow-up to #220669, which did the initial refactor of
`printf_core::Writer` enabling the `CharT` template parameter.
Move the helper for selecting character literals added in #203355 out of
stringview_test into a util header library.
Assisted-by: Automated tooling, human reviewed.
Commit: 240b9213c8d6dfa8a089267212bcf3964731746e
https://github.com/llvm/llvm-project/commit/240b9213c8d6dfa8a089267212bcf3964731746e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
A mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialectDecl.h
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][NVGPU] Split out the dialect declaration to improve build time (NFC) (#222767)
Move NVGPUDialect to a self-contained declaration header and use it in
three consumers that do not need generated NVGPU operations.
Median instructions fell from 221.225B to 166.874B (-24.568%) and wall
time from 34.31s to 25.61s (-25.357%).
Assisted-by: Codex
Commit: 00b8327d38e533068f78e5e8170e1c3ea4ef094a
https://github.com/llvm/llvm-project/commit/00b8327d38e533068f78e5e8170e1c3ea4ef094a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/IR/Tensor.h
A mlir/include/mlir/Dialect/Tensor/IR/TensorDialect.h
M mlir/lib/CAPI/Dialect/Tensor.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCFPass.cpp
Log Message:
-----------
[mlir][Tensor] Split out the dialect declaration to improve build time (NFC) (#222781)
Move TensorDialect to a self-contained declaration header and use it in
the two consumers that only need the dialect class.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 25.499B to 21.072B (-17.363%) and median wall
time fell from 3.55s to 2.81s (-20.845%).
Assisted-by: Codex
Commit: 50026fd902b58e6ccee33786a3a3138fbb7b0dce
https://github.com/llvm/llvm-project/commit/50026fd902b58e6ccee33786a3a3138fbb7b0dce
Author: Iasonas Karaprodromidis <iaskarapro at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/lldb-forward.h
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.cpp
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.h
Log Message:
-----------
[lldb][Fortran] Add TypeSystemFortran files (#218016)
This PR adds the foundational TypeSystemFortran class. To satisfy the
compiler, it implements all required pure virtual functions from the
base TypeSystem class as stubs (returning nullptr or 0).
Changes:
- Adds the TypeSystemFortran class.
- Provides stub implementations for all inherited pure virtual
functions.
Part of the Add Fortran support to LLDB GSoC 2026 project.
Relates to #109119.
Commit: 9d399869e907ff2ed44da3b12d2d97a6a918547b
https://github.com/llvm/llvm-project/commit/9d399869e907ff2ed44da3b12d2d97a6a918547b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
A mlir/include/mlir/Dialect/LLVMIR/LLVMDialectDecl.h
M mlir/lib/Conversion/ConvertToLLVM/ConvertToLLVMPass.cpp
M mlir/lib/Conversion/LLVMCommon/ConversionTarget.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVMPass.cpp
M mlir/lib/Dialect/Func/TransformOps/FuncTransformOps.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/test/lib/Conversion/MemRefToLLVM/TestMemRefToLLVMWithTransforms.cpp
M mlir/test/lib/Dialect/ControlFlow/TestAssert.cpp
M mlir/test/lib/Dialect/LLVM/TestPatterns.cpp
Log Message:
-----------
[mlir][LLVM] Split out the dialect declaration (NFC) (#222782)
Move LLVMDialect to a declaration header that retains its attribute and
type API but excludes generated operation classes. This narrows 12
dialect-only consumers.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 207.570B to 176.073B (-15.174%) and median wall
time fell from 30.72s to 25.52s (-16.927%).
Assisted-by: Codex
Commit: 795c3cab959f7bbe330ecec84833f3e4e227d714
https://github.com/llvm/llvm-project/commit/795c3cab959f7bbe330ecec84833f3e4e227d714
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
A mlir/include/mlir/Dialect/LLVMIR/NVVMDialectDecl.h
M mlir/lib/CAPI/Dialect/NVVM.cpp
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Conversion/NVVMToLLVM/NVVMToLLVM.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
Log Message:
-----------
[mlir][NVVM] Split out the dialect declaration to improve build time (NFC) (#222783)
Move NVVMDialect to a self-contained declaration header and use it in
five consumers that do not need generated NVVM operations.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 215.791B to 161.538B (-25.141%) and median wall
time fell from 33.40s to 24.66s (-26.168%).
Assisted-by: Codex
Commit: 40d4395bb229bd827108bfae196bc79f6c340695
https://github.com/llvm/llvm-project/commit/40d4395bb229bd827108bfae196bc79f6c340695
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Conversion/ComplexCommon/DivisionConverter.h
M mlir/include/mlir/Dialect/Affine/Analysis/AffineAnalysis.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/Arith/IR/Arith.h
A mlir/include/mlir/Dialect/Arith/IR/ArithAttributes.h
A mlir/include/mlir/Dialect/Arith/IR/ArithDialect.h
A mlir/include/mlir/Dialect/Arith/IR/ArithOpInterfaces.h
M mlir/include/mlir/Dialect/Complex/IR/Complex.h
M mlir/include/mlir/Dialect/GPU/Utils/DistributionUtils.h
M mlir/include/mlir/Dialect/Math/IR/Math.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsReduction.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACCMPCommon/Interfaces/AtomicInterfaces.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h
M mlir/lib/CAPI/Dialect/Arith.cpp
M mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitCPass.cpp
M mlir/lib/Conversion/ComplexCommon/DivisionConverter.cpp
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/TosaToArith/TosaToArithPass.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
M mlir/test/lib/Transforms/TestTransformsOps.cpp
M mlir/unittests/Interfaces/InferTypeOpInterfaceTest.cpp
Log Message:
-----------
[mlir][Arith] Split dialect and support declarations to improve build time (NFC) (#222784)
Expose the Arith dialect, attributes, and interfaces without importing
generated operation classes. This lets registration and support-only
users avoid parsing the operation umbrella and its dependencies.
Across three controlled serial rebuilds of five dialect-only TUs, median
instructions fell from 49.429B to 39.665B (-19.755%) and wall time fell
from 7.40s to 5.85s (-20.946%). Across three -j16 rebuilds of 97 support
users, instructions fell from 1,686.265B to 1,531.867B (-9.156%) and
wall time fell from 29.17s to 28.07s (-3.771%).
Assisted-by: Codex
Commit: cdc2b9445ae4f2c2f9ba19cba2cf249d1fbd2faa
https://github.com/llvm/llvm-project/commit/cdc2b9445ae4f2c2f9ba19cba2cf249d1fbd2faa
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_file_macros.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/sys-file-macros.h
A libc/include/llvm-libc-macros/sys-file-macros.h
A libc/include/sys/file.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/flock.h
M libc/src/sys/CMakeLists.txt
A libc/src/sys/file/CMakeLists.txt
A libc/src/sys/file/flock.h
A libc/src/sys/file/linux/CMakeLists.txt
A libc/src/sys/file/linux/flock.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/file/CMakeLists.txt
A libc/test/src/sys/file/linux/CMakeLists.txt
A libc/test/src/sys/file/linux/flock_test.cpp
Log Message:
-----------
[libc] Add sys/file.h and flock function. (#222737)
`flock` is a BSD function that manages advisory locks on opened files
(see https://man7.org/linux/man-pages/man2/flock.2.html)
It has enough differences from `fcntl`-based locking mechanism, and is
provided and used on Linux platforms.
* Add `<sys/file.h>` public header on Linux platforms with `flock`
declaration
and proper macro used for `op` function argument.
* Provide a Linux implementation, which is a simple syscall wrapper
around
`SYS_flock` syscall.
Assisted by: automated tooling, human-reviewed
Commit: 1e9bc138d8f3b097dd8bd343f8b325f7e1830796
https://github.com/llvm/llvm-project/commit/1e9bc138d8f3b097dd8bd343f8b325f7e1830796
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
Log Message:
-----------
[mlir][Tosa] Optimize compliance initialization for size to improve build time (NFC) (#222791)
The compliance-map constructor includes a 4,920-line generated
initializer. Mark it minsize because it runs only when creating the
validation pass and optimizing this single large function at -O3 is
expensive.
LLVM pass timing attributes most of the saving to code generation.
Greedy register allocation fell from 7.070s to 1.348s as global
live-range splitting fell from 6.403s to 0.021s after the constructor
became 47.6% smaller.
Across five controlled rebuilds of the affected TU, median instructions
fell from 205.087B to 66.157B (-67.742%) and median wall time fell from
19.83s to 7.95s (-59.909%).
Assisted-by: Codex
Commit: 65b48e45ea94568ced6d1c5d93d58f55d9e2da62
https://github.com/llvm/llvm-project/commit/65b48e45ea94568ced6d1c5d93d58f55d9e2da62
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/Affine/IR/AffineDialect.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/lib/CAPI/Dialect/Affine.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/lib/Dialect/Linalg/Transforms/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Analysis/DataFlow/TestIntegerDivisibilityAnalysis.cpp
M mlir/test/lib/Dialect/Affine/TestLoopMapping.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgDecomposeOps.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgElementwiseFusion.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgFusionTransforms.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgRankReduceContractionOps.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
M mlir/test/lib/Dialect/Linalg/TestPadFusion.cpp
M mlir/test/lib/Dialect/MemRef/TestComposeSubView.cpp
M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
M mlir/test/lib/Dialect/MemRef/TestMultiBuffer.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
Log Message:
-----------
[mlir][Affine] Split out the dialect declaration to improve build time (NFC) (#222766)
Move AffineDialect to a self-contained declaration header and narrow 23
callers that only register or reference the dialect class.
Median instructions fell from 700.601B to 681.315B (-2.753%) and wall
time from 107.36s to 104.17s (-2.971%).
Assisted-by: Codex
Commit: d9fd8ceac7a8577160a4d2ea7ff3af0acd778253
https://github.com/llvm/llvm-project/commit/d9fd8ceac7a8577160a4d2ea7ff3af0acd778253
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
A mlir/include/mlir/Dialect/Linalg/IR/LinalgDialect.h
M mlir/lib/Conversion/TensorToLinalg/TensorToLinalgPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Tensor/TestTensorTransforms.cpp
Log Message:
-----------
[mlir][Linalg] Split the dialect declaration to improve build time (NFC) (#222795)
Introduce a self-contained dialect declaration and use it in five
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 130.162B to 114.154B (-12.298%) and median wall
time fell from 20.30s to 17.85s (-12.069%).
Assisted-by: Codex
Commit: a34fddf44eca79cbbb7c04477bd9ed0825027fbc
https://github.com/llvm/llvm-project/commit/a34fddf44eca79cbbb7c04477bd9ed0825027fbc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
A mlir/include/mlir/Dialect/LLVMIR/ROCDLDialectDecl.h
M mlir/lib/CAPI/Dialect/ROCDL.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
Log Message:
-----------
[mlir][ROCDL] Split the dialect declaration to improve build time (NFC) (#222794)
Introduce a self-contained dialect declaration and use it in three
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 129.372B to 111.587B (-13.748%) and median wall
time fell from 20.62s to 17.72s (-14.064%).
Assisted-by: Codex
Commit: b89aa045ae06fa0d7729ee9883ff60503d11747f
https://github.com/llvm/llvm-project/commit/b89aa045ae06fa0d7729ee9883ff60503d11747f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h
A mlir/include/mlir/Dialect/GPU/IR/GPUDialectDecl.h
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Log Message:
-----------
[mlir][GPU] Split the dialect declaration to improve build time (NFC) (#222798)
Introduce a self-contained dialect declaration and use it in two
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 82.473B to 75.865B (-8.012%) and median wall time
fell from 12.51s to 11.34s (-9.353%).
Assisted-by: Codex
Commit: b570e2aa0aa41694d7f53988948259f39258b529
https://github.com/llvm/llvm-project/commit/b570e2aa0aa41694d7f53988948259f39258b529
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/Vector/IR/VectorDialect.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/lib/CAPI/Dialect/Vector.cpp
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Dialect/Affine/TransformOps/AffineTransformOps.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/lib/Dialect/MemRef/Transforms/EmulateWideInt.cpp
M mlir/test/lib/Conversion/VectorToSPIRV/TestVectorReductionToSPIRVDotProd.cpp
M mlir/test/lib/Dialect/Arith/TestEmulateWideInt.cpp
M mlir/test/lib/Dialect/Math/TestAlgebraicSimplification.cpp
M mlir/test/lib/Dialect/Math/TestPolynomialApproximation.cpp
Log Message:
-----------
[mlir][Vector] Split the dialect declaration to improve build time (NFC) (#222799)
Introduce a self-contained dialect declaration and use it in ten
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 209.277B to 192.946B (-7.804%) and median wall
time fell from 31.94s to 29.26s (-8.391%).
Assisted-by: Codex
Commit: 3d847b85849d88b65156fd7c252df81b322ccaf1
https://github.com/llvm/llvm-project/commit/3d847b85849d88b65156fd7c252df81b322ccaf1
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-09-09.md
Log Message:
-----------
[flang] Add notes for Sept. 9 Flang Community Call (#222436)
Co-authored-by: Eugene Epshteyn <eepshteyn at nvidia.com>
Commit: a1e8420613f12c770ad37cf72cd180f59dedc5fa
https://github.com/llvm/llvm-project/commit/a1e8420613f12c770ad37cf72cd180f59dedc5fa
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes f1706d3 (#222779)
This fixes f1706d38f8271adfc5105ddf9b2dcc1573ebfa85 (#222744).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5d1b4094534c7a7c041882380603ee0927e27082
https://github.com/llvm/llvm-project/commit/5d1b4094534c7a7c041882380603ee0927e27082
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
A mlir/include/mlir/Dialect/MemRef/IR/MemRefDialect.h
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitCPass.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp
M mlir/test/lib/Dialect/Affine/TestReifyValueBounds.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/test/lib/Dialect/OpenACC/TestOpenACCSupport.cpp
M mlir/test/lib/Dialect/OpenACC/TestPointerLikeTypeInterface.cpp
M mlir/test/lib/Dialect/OpenACC/TestRecipePopulate.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTilingTest.cpp
Log Message:
-----------
[mlir][MemRef] Split the dialect declaration to improve build time (NFC) (#222801)
Introduce a self-contained dialect declaration and use it in thirteen
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 296.237B to 278.383B (-6.027%) and median wall
time fell from 47.57s to 44.50s (-6.454%).
Assisted-by: Codex
Commit: a1cd84100bd0bd70f5b6b0c30826844aa1813350
https://github.com/llvm/llvm-project/commit/a1cd84100bd0bd70f5b6b0c30826844aa1813350
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/CodeGen/QualTypeMapper.h
M clang/unittests/CodeGen/CMakeLists.txt
A clang/unittests/CodeGen/QualTypeMapperTest.cpp
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/unittests/ABI/CMakeLists.txt
A llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/utils/gn/secondary/clang/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
Log Message:
-----------
[LLVMABI] Add support for SVE types in the LLVM ABI library (#221375)
This change extends the LLVM ABI library's VectorType to be able to
describe SVE types and updates Clang's QualTypeMapper to map them.
The AArch64 target info class in the ABI library is still a work in
progress. It will continue to report "not yet implemented" for function
signatures involving SVE types. This change is a neceasary prerequisite
for correctly handling them or correctly deferring handling of these
specific types.
Assisted-by: Cursor / claude-opus-5
Commit: 8c05a1167dd2f00cfa64966cb1572a6d97178c8b
https://github.com/llvm/llvm-project/commit/8c05a1167dd2f00cfa64966cb1572a6d97178c8b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/MLIRContext.cpp
Log Message:
-----------
[mlir] Outline registered operation-model allocation (NFC) (#222803)
Allocate operation-model storage through an out-of-line helper so every
registration TU does not instantiate the allocation machinery.
Across three controlled -j16 rebuilds of 44 registration TUs, median
instructions fell from 2.284T to 2.202T (-3.594%) and median wall time
fell from 40.44s to 38.54s (-4.698%).
Assisted-by: Codex
Commit: ec5a61a1454082773a9071c8a9db0472306a2517
https://github.com/llvm/llvm-project/commit/ec5a61a1454082773a9071c8a9db0472306a2517
Author: Dave MacLachlan <dmaclach at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/Options.td
M lld/docs/MachO/ld64-vs-lld.md
M lld/docs/ReleaseNotes.md
A lld/test/MachO/warn-missing-subsections-via-symbols.s
Log Message:
-----------
[lld][MachO] Add `--warn-missing-subsections-via-symbols` flag (#221464)
This change introduces:
* `--warn-missing-subsections-via-symbols`: Warns when an input object
file with non-empty sections is missing `MH_SUBSECTIONS_VIA_SYMBOLS`.
* `--no-warn-missing-subsections-via-symbols`: Disables the warning
(default).
Also adds documentation and lit tests.
Object files missing `MH_SUBSECTIONS_VIA_SYMBOLS` can prevent
dead-stripping and subsection splitting.
We have seen a number of cases where we are compiling assembly, and this
allows us to track them down.
Commit: 6959b7d081df5fb2349e67e0d8e8e87841fa10d9
https://github.com/llvm/llvm-project/commit/6959b7d081df5fb2349e67e0d8e8e87841fa10d9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OpDefinition.h
Log Message:
-----------
[mlir] Use pointers for static operation hooks to improve build time (NFC) (#222804)
Return raw function pointers from static operation-hook accessors to
avoid instantiating unique-function construction machinery for every
operation.
Across three controlled -j16 rebuilds of 44 registration TUs, median
instructions fell from 2.284T to 2.201T (-3.646%) and median wall time
fell from 41.04s to 38.80s (-5.458%).
Assisted-by: Codex
Commit: c027b3cff0d1cd1a9e30f72e7eba8a1cb8954a75
https://github.com/llvm/llvm-project/commit/c027b3cff0d1cd1a9e30f72e7eba8a1cb8954a75
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Error.h
Log Message:
-----------
[orc-rt] Fix typo in file header. (#222636)
Commit: 9ac5a0ffb64f80e6f5aecf430b9e62c2a300942c
https://github.com/llvm/llvm-project/commit/9ac5a0ffb64f80e6f5aecf430b9e62c2a300942c
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-attach.mlir
Log Message:
-----------
[flang][acc] Update descriptor attach rules to only pointer/allocatable (#222760)
When a clause maps only a descriptor's data, ACCMapInfoPrep should infer
an attach point and name the descriptor only for POINTER and
ALLOCATABLE, which OpenACC requires to be maintained on the device. See
flang/docs/OpenACC-descriptor-management.md.
Commit: ce0642ef834c89775fad321bdc0601163885ff1d
https://github.com/llvm/llvm-project/commit/ce0642ef834c89775fad321bdc0601163885ff1d
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fixes MLIR dialect Bazel dependencies from commit 5d1b4094534c etc (#222812)
Added missing deps.
Fixes current bazel failures in @llvm-project//flang/unittests:all
Commit: 5ce6d3a2423ef046b5d1d5e9ec699dd9fe7af377
https://github.com/llvm/llvm-project/commit/5ce6d3a2423ef046b5d1d5e9ec699dd9fe7af377
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
A lldb/test/API/functionalities/gdb_remote_client/TestBreakpointNotHit.py
M lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManyBreakpoints.py
Log Message:
-----------
[lldb][Darwin] Don't mark threads as having hit bp if not (#222488)
When a multithreaded program stops exeuction with a mach exception on
more than one thread, if one of the threads is *at* a breakpoint site,
but hasn't *hit* the breakpoint yet, lldb was incorrectly stepping over
the breakpoint instruction when it resumed execution. This would result
in TestConcurrentManyBreakpoints reporting that a breakpoint hit on 100
threads was only hit 99 times, because one of the breakpoints was
silently stepped past without being counted.
The bug happened because on Darwin/debugserver systems the stop info
packet includes a `jstopinfo` which is a JSON dictionary of all threads
that have an exception. When `jstopinfo` is present, ProcessGDBRemote
was initializing any thread not included in `jstopinfo` as having an
empty StopInfo. It did this without checking if we are _at_ a breakpoint
site, and marking the thread as "Stopped at unexecuted breakpoint
instruction". Because the threads now had an empty StopInfo already, the
other places where we might check "if stopped at unexecuted breakpoint
instruction" were never executed.
I created a gdb_remote_client API test with a synthetic test case where
four threads stop at a breakpoint; three of them have hit the
breakpoint, one has not. And confirm that lldb only registers 3
breakpoint hits initially, and then the 4th as we resume. Debugging the
"99 breakpoints hit instead of 100" failures was tricky and involved
running the test in a loop on a heavily loaded machine to get the
necessary timing, and it was easy to give up, so I wanted a much simpler
synthetic case to show the problem if we might regress.
rdar://180565704
Commit: b8007a8e4020b8bca2b12e941660e10bf5bf6716
https://github.com/llvm/llvm-project/commit/b8007a8e4020b8bca2b12e941660e10bf5bf6716
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A lld/test/MachO/arm64-x1.s
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TextAPI/Architecture.def
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
A llvm/test/tools/llvm-readobj/macho-arm64e_x1.test
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-readobj/MachODumper.cpp
M llvm/unittests/BinaryFormat/MachOTest.cpp
Log Message:
-----------
[ld64.lld, llvm-otool] Minimal arm64e.x1 support (#222721)
Just enough for `llvm-otool -hv` to dump the cpusubtype, and for
ld64.lld to not reject .tbd files that have an arm64e.x1 slice.
This is needed to link mac binaries against the macOS 27 SDK.
Commit: 5ced7fcfdb22dc6ec31d021d4b64242e7e35a397
https://github.com/llvm/llvm-project/commit/5ced7fcfdb22dc6ec31d021d4b64242e7e35a397
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
Fix bazel build for clang/unittests:codegen_tests (#222817)
Fixes https://github.com/llvm/llvm-project/pull/221375 (commit
a1cd84100bd0) by exporting QualTypeMapper.h and adding missing
dependencies.
Commit: f896082fb9ea598c548bcb63515da7b23ff40f6d
https://github.com/llvm/llvm-project/commit/f896082fb9ea598c548bcb63515da7b23ff40f6d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__configuration/compiler.h
M libcxx/include/__memory/allocator.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_temporary_buffer.h
A libcxx/include/__new/allocate.h
M libcxx/include/__utility/small_buffer.h
M libcxx/include/module.modulemap.in
M libcxx/include/new
M libcxx/src/include/aligned_alloc.h
A libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.capacity/max_size.pass.cpp
M libcxx/test/std/language.support/support.dynamic/hardware_inference_size.compile.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cons/size.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/pointer_destruction.pass.cpp
Log Message:
-----------
Revert "[libc++] Remove __libcpp_allocate" (#222814)
Reverts llvm/llvm-project#220981
This is breaking premerge. See comments on the original PR.
Commit: 4def46cc3fd51bee21f4a167a99a79c9f6bb66ba
https://github.com/llvm/llvm-project/commit/4def46cc3fd51bee21f4a167a99a79c9f6bb66ba
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/convert-fold.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
Log Message:
-----------
[flang] Fold fir.convert of an integer constant between integer types (#222188)
`fir::ConvertOp::fold` doesn't handle an integer constant converted to
another integer type. `ForwardConstantConvertPattern` covers the
neighboring case where the result is `index`, so `fir.convert %c10_i32 :
(i32) -> index` already canonicalizes to an index constant while
`fir.convert %c1_i32 : (i32) -> i64` does not. This PR adds the
integer-to-integer case.
The width change follows the rules codegen applies to a non-constant
operand (`CodeGen.cpp`'s integer-to-integer conversion): narrowing
truncates, widening zero-extends an i1 or unsigned source and
sign-extends anything else. The result must be signless because the
constant materialises as an `arith.constant`, which only accepts
signless integers.
It composes with `arith::IndexCastOp::fold`, so a value widened then
cast to `index` collapses to one index constant, and it lets other
patterns see through the constant: with a literal shift,
`simplify-hlfir-intrinsics` can now fold away `hlfir.eoshift`'s
shift-direction arithmetic.
`getIntIfConstant` only matches `arith` and `llvm` constants, which are
signless, so `isUnsignedInteger()` is never true today, but I still kept
the unsigned case anyway so that the fold cannot disagree with codegen.
Commit: c9e8899e31dba827a9c738252de1762f3b6fd3df
https://github.com/llvm/llvm-project/commit/c9e8899e31dba827a9c738252de1762f3b6fd3df
Author: wanglei <wanglei at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
Log Message:
-----------
[LoongArch] Generate more PCRel relocations for resolvable sub-symbols
Use PC-relative relocations when the sub-symbol offset can be resolved
during assembly, avoiding ADD/SUB relocation pairs.
Fixes #210052
Reviewers: SixWeining, MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/211754
Commit: e152f54b8417c5db0550b463653145f758de40d0
https://github.com/llvm/llvm-project/commit/e152f54b8417c5db0550b463653145f758de40d0
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port f896082fb9ea (#222824)
Commit: 07d67299a15ce03b053736e2d31a668ee0576987
https://github.com/llvm/llvm-project/commit/07d67299a15ce03b053736e2d31a668ee0576987
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/test/CodeGen/Mips/mips1-not-support-ldc1-sdc1.ll
Log Message:
-----------
[Mips] Fix buildbot failure of MIPS I double store using SWC1 (#221912)
Expand ExtractElementF64_FPR to FMOV_S instead of MFC1 to avoid
incorrect integer store.
Fix x86_64-expensive-checks compile error as for pr
https://github.com/llvm/llvm-project/pull/209362.
Fix #62190.
Commit: 7c3849ae3bc162f383c54e38b1ed32b733a31bd8
https://github.com/llvm/llvm-project/commit/7c3849ae3bc162f383c54e38b1ed32b733a31bd8
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250-load-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950-read-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w32.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w64.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN global/DS load builtins (#220611)
Adds codegen support for AMDGCN global and DS load/read builtins with
transpose variants. These builtins are lowered to their corresponding
`llvm.amdgcn.*` intrinsics.
Commit: fd7eac5f532128a245bcfa67aa251af784395701
https://github.com/llvm/llvm-project/commit/fd7eac5f532128a245bcfa67aa251af784395701
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
Log Message:
-----------
[AMDGPU][lld] Remove "using namespace llvm" from AMDGPU.cpp (#222818)
AMDGPU class in anonymous namespace collides with llvm::AMDGPU, causing
an error with MSVC.
Commit: 95267015df795c02d829b3545610a5f5e95609e8
https://github.com/llvm/llvm-project/commit/95267015df795c02d829b3545610a5f5e95609e8
Author: Jian Li <hellothedreamer at 126.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/get-named-operand-idx.td
Log Message:
-----------
[RISCV][GlobalISel] Add G_CLMULH support (#221686)
Add G_CLMULH to represent the high half of a carry-less multiplication
in generic Machine IR.
Translate llvm.riscv.clmulh to G_CLMULH and mark it legal for native
XLEN scalar types when Zbkc is available. Reuse the existing
SelectionDAG pattern to select the RISC-V CLMULH instruction.
Commit: 821ff7cd6803d719515c2ae9ada665c4bc3c4c35
https://github.com/llvm/llvm-project/commit/821ff7cd6803d719515c2ae9ada665c4bc3c4c35
Author: Rohit Garg <rohgarg at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/confused-dependence-subnest.ll
A llvm/test/Transforms/LoopInterchange/dependency-matrix-padding.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
A llvm/test/Transforms/LoopInterchange/missed-outer-prefix-subnest.ll
A llvm/test/Transforms/LoopInterchange/no-partially-perfect-subnest.ll
M llvm/test/Transforms/LoopInterchange/partially-perfect-loop.ll
A llvm/test/Transforms/LoopInterchange/preserve-sibling-order.ll
Log Message:
-----------
[LoopInterchange] Supported partially-perfect Loop Nests (#199511)
In the current implementation when the outermost loop contains sibling
sub-loops (i.e. multiple independent loop nests at the same depth), the
pass silently skips the entire loop nest without attempting to
interchange any of the valid sub-nests (See Below Example).
Example:
```
for(int i=0; i<n; i++){ // Loop 1
for(int j=0; j<m; j++){ // Loop 2
for(int r=0; r<m; r++){ // Loop 3
// Do something
}
}
for(int k=0; k<p; k++){ // Loop 4
for(int l=0; l<p; l++){ // Loop 5
//Access A[l][k]
}
}
}
```
In the Example , GCC 16 performs loop interchange on (Loop2, Loop3) or
(Loop4, Loop5), provided the interchange is both legal and profitable.
Fixes: https://github.com/llvm/llvm-project/issues/196006
Commit: 5f00f13eba2ededa5da62e0dd80b6d1f0c72ca84
https://github.com/llvm/llvm-project/commit/5f00f13eba2ededa5da62e0dd80b6d1f0c72ca84
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/Support/KnownFPClassTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[KnownFPClass] Refactor direct access to KnownFPClasses [NFC] (#220315)
Part of https://github.com/llvm/llvm-project/issues/217072
Follow up to https://github.com/llvm/llvm-project/pull/218514
Replaces direct uses of the `KnownFPClasses` field with getters/setters.
Commit: 426706131e7300fe67f4dac5ccc744548605f394
https://github.com/llvm/llvm-project/commit/426706131e7300fe67f4dac5ccc744548605f394
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine-analysis-invalidation.ll
Log Message:
-----------
[AMDGPU] Invalidate uniformity info after intrinsic combine (#222357)
The uniform intrinsic combine pass changed IR while preserving
uniformity information. Its result keeps references to cycle
information. Those references could be invalidated and later accessed
by another pass.
Invalidate uniformity information after a change. Before erasing an
instruction, remove it from the analysis state used by the pass. Also
report each erasure as a change so invalidation always runs.
Commit: db70744d03adbc9e76f08a66c003b6b362df888d
https://github.com/llvm/llvm-project/commit/db70744d03adbc9e76f08a66c003b6b362df888d
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvp-mul-parts-acc-fold.ll
Log Message:
-----------
[RISCV][P-ext] Fold an add of a multiply-parts product into the accumulate form (#222748)
An add of a multiply-parts product selects the accumulating instruction, so
that a loop written with `sum += __riscv_mul_h00_i32(a, b)` gets `macc.h00`
rather than a separate multiply and add.
Rewriting the add before type legalization keeps the shapes whose result is
illegal, so the existing accumulate lowering covers all of them.
Commit: 980c9bbdd3ddda88da6b8b63261c8d514c5d4306
https://github.com/llvm/llvm-project/commit/980c9bbdd3ddda88da6b8b63261c8d514c5d4306
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/features-info.ll
Log Message:
-----------
[RISCV] Remove VeyronV1 processor definition (#220623)
Processor no longer exists.
Commit: a929f4af3904d5089a7855b5f82cf019df6afd69
https://github.com/llvm/llvm-project/commit/a929f4af3904d5089a7855b5f82cf019df6afd69
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Utils/OpenMP.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/default-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/implicit-default-mapper-allocatable-field.f90
M flang/test/Lower/OpenMP/implicit-mapper-no-pointer-map.f90
R flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
R flang/test/Transforms/omp-map-info-finalization-usm.fir
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-host-ref-semantics.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-overlapping-record-member-map.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
A offload/test/offloading/fortran/implicit-map-allocatable-field.f90
Log Message:
-----------
[Flang][OpenMP] Remove target implicit allocatable member mapping from MapInfoFinalization and extend lowering to support it (#219434)
This PR aims to remove the partially implemented implicit allocatable
member mapping code from MapInfoFinalization, and move it to the
lowering.
The MapInfoFinalization code should no longer be required as the
DeclareMapper infrastructure in the frontend is capable of handling
these cases now and already does so for the majority of them, so we are
better consolidating the implementation to one location and extending it
to support more cases.
This PR removes the old code from MapInfoFinalization, and enables the
default declare mapper generation that handles most other implicit
mapping cases for derived types in the initial lowering to handle the
previously supported cases and more.
The implicit default declare mapper generation has been modified to only
map the necessary bits of a derived type, which are record types (to
hold any nested mappers and to make sure we map all non-allocatable
bits, including descriptors) and the data for any allocatable bits
(specifically just the ref_ptee and then an attach emission).
Commit: be09c15fa047178ff4818192ea97ba3a3d8254a0
https://github.com/llvm/llvm-project/commit/be09c15fa047178ff4818192ea97ba3a3d8254a0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Compiler.h
Log Message:
-----------
[orc-rt] Add a maybe-unused attribute macro. (#222834)
This will be used in upcoming commits to suppress unused function
warnings.
Commit: 2a0177189f4be62eb51ddca3fd4b8836c538dc12
https://github.com/llvm/llvm-project/commit/2a0177189f4be62eb51ddca3fd4b8836c538dc12
Author: hev <wangrui at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for memory barrier optimization (#218596)
Commit: c9a1fc8d1deee527a3ff43592ed4e0e5b81d7fca
https://github.com/llvm/llvm-project/commit/c9a1fc8d1deee527a3ff43592ed4e0e5b81d7fca
Author: hev <wangrui at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
Log Message:
-----------
[LoongArch] Add memory barrier optimization pass (#218597)
Add a machine-level pass to remove redundant DBARs and merge them with
atomic memory operations. The pass uses machine dominator and
post-dominator trees to ensure the transformation is safe across basic
blocks.
Commit: 13d63aa55eb7d8877fb3243e7f050b590e569d96
https://github.com/llvm/llvm-project/commit/13d63aa55eb7d8877fb3243e7f050b590e569d96
Author: Jeff Trull <edaskel at att.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Make the value of a true bool enum 1, not -1 (#221497)
When converted to int a bool value is either `0` or `1`, but the `enum_value`
of a bool enum was reported as either `0` or `-1` in the Python bindings.
Make bool enums take the unsigned value code path so that `0` or `+1` is
returned instead.
Resolves #221326
Commit: 816b4c13bd851e6df4416c0d41e6735760ca72df
https://github.com/llvm/llvm-project/commit/816b4c13bd851e6df4416c0d41e6735760ca72df
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable block16 conversions on gfx1250-strict (#222597)
Commit: 06a26f2ff3a2c5464a5dca8cf42314bae5e635cc
https://github.com/llvm/llvm-project/commit/06a26f2ff3a2c5464a5dca8cf42314bae5e635cc
Author: John Hui <j-hui at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/swift-attr-redeclaration.cpp
M clang/test/APINotes/swift-import-as.cpp
Log Message:
-----------
[clang][APINotes] Apply API notes 'swift_attr's idempotently (#222526)
Commit: 79775da1838e64b0a6c294ff25483484841910a1
https://github.com/llvm/llvm-project/commit/79775da1838e64b0a6c294ff25483484841910a1
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Add vputils::reconstructSSA (#212209)
Adds a simple implementation of the algorithm described in "Simple and
Efficient SSA Construction" by Braun et al.
https://www.researchgate.net/publication/236997796_Simple_and_Efficient_Construction_of_Static_Single_Assignment_Form
This can be used to reconstruct SSA form whenever the control flow graph
is changed, which #201784 plans to use to model predicated early exiting
conditions.
Added three unit tests for now which should exercise all the code paths,
including what happens when there's a cycle.
Commit: faa60cf51f1eeef568a7a111b3174375122617aa
https://github.com/llvm/llvm-project/commit/faa60cf51f1eeef568a7a111b3174375122617aa
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/Session.cpp
M orc-rt/lib/support/Error.cpp
M orc-rt/lib/support/Logging.cpp
M orc-rt/lib/support/Logging_oslog.cpp
M orc-rt/lib/support/Logging_printf.cpp
Log Message:
-----------
[orc-rt] Wrap C API implementation in `extern "C" {..}` blocks (#222846)
Adopt a consistent style for C API implementation: A banner comment and
an `extern "C" { ... }` block around the definitions.
Commit: e94a0b2a4971c381cc6f72309d1dea5350780099
https://github.com/llvm/llvm-project/commit/e94a0b2a4971c381cc6f72309d1dea5350780099
Author: shivaramaarao <58245296+shivaramaarao at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
[flang] Add driver support for x86 -m[option] target feature flags (#220159)
Added FlangOption visibility to m_x86_Features_Group so flags such as
-mavx, -mavx2, and -mavx512f are accepted by flang and forwarded as
-target-feature to -fc1 via the shared Clang driver logic.
Also extended target-cpu-features.f90 with grouped driver tests that
cover m_x86_Features_Group options, including representative -mno-*, APX
cases
Assisted by : Cursor (testcase generation)
Commit: 75ca063b3b303e499a798ef84d04d32fb96d44c8
https://github.com/llvm/llvm-project/commit/75ca063b3b303e499a798ef84d04d32fb96d44c8
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
Log Message:
-----------
[AMDGPU][GIsel][NPM] Port AMDGPUPostLegalizerCombiner to NPM (#216274)
Porting `AMDGPUPostLegalizerCombiner` to work with the New PassManager
to support GISel.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 4735d351182f874d61690f6fc2d2e3b154914ad5
https://github.com/llvm/llvm-project/commit/4735d351182f874d61690f6fc2d2e3b154914ad5
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaCUDA.cpp
M clang/test/SemaCUDA/global-initializers.cu
Log Message:
-----------
[CUDA/HIP] Fix errors for device function used in host global initializers (#222338)
The existing checker was simply looking for a call or `CXXConstructExpr`
which would miss a call to device function in case an implicit cast was
in place or if a call was a part of an expression. Use a visitor to
improve the situation.
Commit: c1b661fde124399f0484c4b39501b37613cc4757
https://github.com/llvm/llvm-project/commit/c1b661fde124399f0484c4b39501b37613cc4757
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
Log Message:
-----------
[clang][SVE][nfc] Remove spurious compare instruction (#222652)
When lowering `sve_svdup_n_bN` SVE builtins, the compare Op is not
required. In fact, that compare Op is removed by subsequent
optimisations, as evident in the tests.
Instead of relying on the middle-end to clean it up, improve the
front-end code-gen by not generating that spurious Op at all.
Commit: 68f9d8d45cad616e223ffe460404edd86dd972ca
https://github.com/llvm/llvm-project/commit/68f9d8d45cad616e223ffe460404edd86dd972ca
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Token.cpp
M mlir/lib/AsmParser/Token.h
M mlir/test/Dialect/Builtin/Bytecode/attrs.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed_0.mlirbc
M mlir/test/IR/custom-float-attr-roundtrip.mlir
M mlir/test/IR/parser.mlir
Log Message:
-----------
[MLIR][Parser] Fix precision loss when parsing f80 and f128 literals (#220267)
While analyzing this CIR issue
[216422](https://github.com/llvm/llvm-project/issues/216422), I traced
the issue to the MLIR asm parser.
For the following case:
```
%0 = arith.constant 1.0E+309 : f80
```
using `mlir-opt repro.mlir`
we get (infinity):
```
module {
%cst = arith.constant 0x7FFF8000000000000000 : f80
}
```
instead of
```
module {
%cst = arith.constant 9.99999999999999999986E+308 : f80
}
```
Currently the parser casts floats to a double before converting to the
requested semantics, as noted in the
[comments](https://github.com/llvm/llvm-project/blob/bb3b509138f4a34cb3d5c659955ccc16745ae82e/mlir/lib/AsmParser/AsmParserImpl.h#L286).
Not entirely sure why this was the default, anyway this patch instead
parses the float with the given semantics directly, so we don't lose
precision.
I used Claude to generate tests and reproducers for this patch. I've
also updated a few existing lit tests to show the improved precision
this patch introduces.
**Note:** This fixes the CIR issue I mentioned above.
Commit: 7ba3ce428af7f6e7f1e642dba128c2afc13dba90
https://github.com/llvm/llvm-project/commit/7ba3ce428af7f6e7f1e642dba128c2afc13dba90
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/Bufferization.h
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationDialect.h
M mlir/lib/CAPI/Dialect/Bufferization.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
Log Message:
-----------
[mlir][Bufferization] Split the dialect declaration (NFC) (#222859)
Introduce a self-contained dialect declaration and use it in four
consumers that do not need the generated operation umbrella.
Across three controlled serial rebuilds of the affected TUs, median
instructions fell from 97.470B to 94.887B (-2.650%) and median wall time
fell from 15.20s to 14.70s (-3.289%). Three -j16 runs confirmed a 2.623%
reduction in instructions, with wall time improving 0.722% on the
parallel critical path.
Assisted-by: Codex
Commit: 7544b08a04ce084bf34bd3f4f1e8fb6f4d3aa2e4
https://github.com/llvm/llvm-project/commit/7544b08a04ce084bf34bd3f4f1e8fb6f4d3aa2e4
Author: Teja Alaghari <teja.alaghari at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
A llvm/test/DebugInfo/MIR/InstrRef/expr-operand-count-mismatch.mir
Log Message:
-----------
[LiveDebugValues] Do not join debug values whose operand counts disagree (#221929)
Currently, `DbgValueProperties::isJoinable()` decides whether two values
could be joined by comparing their `DIExpressions` only. That was safe
when location-operand count was taken from the expression. In
instruction-referencing `LiveDebugValues`, `NumLocOps` is taken from the
`MachineInstr` (`getNumDebugOperands()`), so two values can share an
expression and still differ in operand count.
Joining pairs location operands by index. When the counts disagreed,
`pickVPHILoc` indexed past the shorter list and hit `assert(Index <
OpCount)` in `DbgValue::getDbgOpID`.
This change makes `isJoinable()` return `false` unless `NumLocOps`
**also agrees**.
Commit: fa1d3e300559d69678a66b2ddb45eb127a1b8407
https://github.com/llvm/llvm-project/commit/fa1d3e300559d69678a66b2ddb45eb127a1b8407
Author: nishant-sachdeva-amd <nishant.sachdeva at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
Log Message:
-----------
[X86][NFC] Share isDispOrCDisp8 between the encoder and CompressEVEX (#222591)
The disp8 / compressed-disp8*N size rule was written twice: as a static
helper in X86MCCodeEmitter.cpp and re-inlined in the CompressEVEX size
veto (hasShorterEVEXViaCDisp8), kept in sync only by a comment. Hoist it
into X86II::isDispOrCDisp8 in X86BaseInfo.h (ImmOffset now optional) and
call it from both, so the size model cannot drift from what the encoder
emits. No functional change.
Addresses https://github.com/llvm/llvm-project/issues/206963
Changes made here use AI model inputs
---------
Co-authored-by: Simon Pilgrim <git at redking.me.uk>
Commit: 02dc8a35a9d074613f0a262dbec00afeb9963345
https://github.com/llvm/llvm-project/commit/02dc8a35a9d074613f0a262dbec00afeb9963345
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
A mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialectDecl.h
M mlir/lib/RegisterAllDialects.cpp
Log Message:
-----------
[mlir][AMDGPU] Split the dialect declaration (NFC) (#222861)
Introduce a self-contained dialect declaration so RegisterAllDialects
does not need the generated AMDGPU operation umbrella.
Across five controlled rebuilds of the affected TU, median instructions
fell from 71.757B to 70.331B (-1.987%) and median wall time fell from
11.01s to 10.77s (-2.180%).
Assisted-by: Codex
Commit: f1bf3f217c8c006112a876cee61fe04f92f221ca
https://github.com/llvm/llvm-project/commit/f1bf3f217c8c006112a876cee61fe04f92f221ca
Author: Alexey Moksyakov <moksyakov.alexey at huawei.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/materialize-constant.s
Log Message:
-----------
[bolt] Simplify rodata/literal load for X86_64 & AArch64 (#179474)
This patch fixed the issue related to load literal for AArch64, where
constant island move to the end of a function (emitCI), available
address range for ldr instruction is limited +/- 1MB, and can be out of
range. For AArch64 the available data sizes are 4, 8 bytes. For X86_64
this patch materializes the constants with sizes 2, 4 and 8 bytes.
Note: SimplifyRODataLoads is turn off for non-relocation binary
Co-authored-by: yavtuk <yavtuk at ya.ru>
Commit: 4f56a89ad74f82403500d6392e2d3a90ba912f37
https://github.com/llvm/llvm-project/commit/4f56a89ad74f82403500d6392e2d3a90ba912f37
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
A mlir/include/mlir/Dialect/Func/IR/FuncDialect.h
M mlir/include/mlir/Dialect/Func/IR/FuncOps.h
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Target/Cpp/TranslateRegistration.cpp
M mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
M mlir/lib/Target/SMTLIB/ExportSMTLIB.cpp
M mlir/test/lib/Conversion/ConvertToSPIRV/TestSPIRVFuncSignatureConversion.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/unittests/Dialect/Linalg/InferConvolutionDimsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
M mlir/unittests/Dialect/Transform/BuildOnlyExtensionTest.cpp
Log Message:
-----------
[mlir][Func] Split the dialect declaration (NFC) (#222860)
Introduce a self-contained dialect declaration and use it in ten
configured consumers that do not need the generated operation umbrella.
Across three controlled -j16 rebuilds of the affected TUs, median
instructions fell from 224.883B to 220.787B (-1.821%) and median wall
time fell from 8.44s to 8.31s (-1.540%).
Assisted-by: Codex
Commit: 3ec1c433b3a4bacbb055f2a2ce2d5ef3ca4172ae
https://github.com/llvm/llvm-project/commit/3ec1c433b3a4bacbb055f2a2ce2d5ef3ca4172ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
A llvm/test/Transforms/ConstraintElimination/strengthen-flags-at-uses.ll
Log Message:
-----------
[ConstraintElim] Strengthen flags at the closest dominator of all uses. (#220918)
Flags are currently only strengthened using the facts that hold on entry
to the block defining the instruction. This overly pessimistic. It is
sufficient to check at the closest instruction dominating all uses.
Extend FactOrCheck to carry this point as context instruction (in union
with the mutually exclusive DoesHold to avoid size growth) and retrieve
the common dominating instruction when queuing instructions for flag
strengthening.
This strengthens flag inference in a number of real-world cases, as well
as enables additional folds due stronger flags:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1171
Compile-time impact is in the noise
https://llvm-compile-time-tracker.com/compare.php?from=11bc6ce46e227718c3b54aa6889d7458656e8ab4&to=6f67fdcdb62a5fe56060cb266448db8b763e13d7&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/220918
Commit: f284ae2ed3f9b74b213633b0e5cab52b490728f2
https://github.com/llvm/llvm-project/commit/f284ae2ed3f9b74b213633b0e5cab52b490728f2
Author: Yongqiang Tian <yqtian668 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
A llvm/test/CodeGen/RISCV/shrinkwrap-save-restore-debug.ll
Log Message:
-----------
[RISCV] Ignore debug instructions in epilogue block checks (#219401)
A debug instruction in a return-only block can make
`RISCVFrameLowering::canUseAsEpilogue` reject an otherwise valid
shrink-wrap
point. This moves the save and restore libcalls onto the fast path.
Ignore debug instructions in the successor cardinality check while
continuing
to count bundle interiors, pseudo probes, and other non-debug
instructions.
The first commit records the existing behavior. The second applies the
fix and
updates the test expectations to require localized save and restore
calls.
Fixes #219378
Testing:
- Verified that the regression test fails on an affected compiler.
- Verified the targeted test after the fix.
- RISC-V CodeGen: 2654/2654 passed.
Assisted-by: OpenAI Codex 5.6 Sol, co-reviewed by Claude and Yongqiang
Tian.
Commit: e8a0d25ac75b3123f98e7dce16f6d096f2179b97
https://github.com/llvm/llvm-project/commit/e8a0d25ac75b3123f98e7dce16f6d096f2179b97
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
Log Message:
-----------
[CostModel][X86] Cleanup unary shuffle cost tests to use poison instead of undef in second operand (#222718)
Commit: c382571b2b3cede5de97cbbd314597db21f89435
https://github.com/llvm/llvm-project/commit/c382571b2b3cede5de97cbbd314597db21f89435
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/cmake/modules/CrossCompile.cmake
Log Message:
-----------
[CMake] Forward CLANG_ENABLE_CIR to native tool builds (#222771)
Commit: 5e64eb8ffffa3e845ca01d81c1e45ef68d07d306
https://github.com/llvm/llvm-project/commit/5e64eb8ffffa3e845ca01d81c1e45ef68d07d306
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
Log Message:
-----------
[Clang] Improve error recovery for indexed template names (#222328)
There were a few issues here:
- Names that are not templates were not diagnosed and led to a crash (in
part because clang think they can be template names that will be later
resolved by ADL)
- Names that refer to a variable template decl, etc also led to a crash.
Fixes #220502
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: e4b9c07d30119fa37202233973629e3143c27685
https://github.com/llvm/llvm-project/commit/e4b9c07d30119fa37202233973629e3143c27685
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
Log Message:
-----------
[GlobalISel] Fast path exact LLT equality (NFC) (#222550)
Improves CTMark geomean -0.05% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=87d9c3c24ff5941ac08799850a6549b561c98a81&to=a5391cd5be815299b2cddcabf62a86369b247f72&stat=instructions:u
Assisted-by: codex
Commit: 19dad062e98520c641617fda2cec07592764d5dc
https://github.com/llvm/llvm-project/commit/19dad062e98520c641617fda2cec07592764d5dc
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/StopPointSiteList.h
M lldb/test/API/functionalities/breakpoint/write_over_software_breakpoint/TestWriteOverSoftwareBreakpoint.py
Log Message:
-----------
[lldb] Fix handling of lldb managed software breakpoints (#222009)
Fixes #217910.
When the debug server can manage its own breakpoints this is called an
"external" breakpoint. When it cannot, lldb must manage the breakpoint
itself from the client side.
Part of doing that is FindInRange which is used to patch reads and
writes over software breakpoint sites. It had an issue where it would
not account for a breakpoint that started before the range, but extended
into the range. For example:
```
Memory content: ABCDEFGHIJKL
Read range: ----[--]----
Breakpoint location: -BKPT-------
Overlap with read: ---- at -------
Expected read result: ----EFGH----
Would actually get: ----TFGH----
```
This change fixes that mistake:
* Exit early if there are no sites to check.
* Exit early if the lower_bound result is beyond the upper bound of the
range - only if the result is not the end of the list. In the result was
end(), there may be one site before which we must also check.
The existing "Over end of breakpoint" test covers the bug I'm fixing.
The tests have been refactored to run normally and via. a proxy that
refuses breakpoint packets.
We could instead use two different proxies where one supports the
packets and one doesn't. However, that's more overhead per test and you
can't run proxy tests remotely.
Due to https://github.com/llvm/llvm-project/issues/222284, the proxy
tests cannot be run everywhere, but it can run on AArch64 which is
common.
Commit: 2684037ea97ebb068941b699ef9639334958c509
https://github.com/llvm/llvm-project/commit/2684037ea97ebb068941b699ef9639334958c509
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
Log Message:
-----------
[AMDGPU] Update buildbot cmake cache files (#222807)
This fixes one issue where the compiler-rt entry was not propagated to
the build.
We also want to select libgcc as the default unwindlib explicitly (as
this is what we do downstream).
Commit: 9f634aa12509462631e9dc799b987c2aac617a2c
https://github.com/llvm/llvm-project/commit/9f634aa12509462631e9dc799b987c2aac617a2c
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 7ba3ce4 (#222865)
This fixes 7ba3ce428af7f6e7f1e642dba128c2afc13dba90 (#222859).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=7ba3ce428af7f6e7f1e642dba128c2afc13dba90
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4f32e473933d4a039d13fe2c0a4ccdde73c8b929
https://github.com/llvm/llvm-project/commit/4f32e473933d4a039d13fe2c0a4ccdde73c8b929
Author: yamash-fj <yamashita.ta-16 at fujitsu.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
Log Message:
-----------
[AArch64] Parameterize repeated FP divisor combine threshold by subtarget (#216930)
Changes:
This patch makes the threshold for combining repeated FP divisors
configurable per AArch64 subtarget, instead of using a single fixed
value 3 for all CPUs. Additionaly, set this value 2 for A64FX based on
observed profitability for this transform on A64FX.
Motivation:
Today, AArch64 uses a fixed threshold of 3 for reciprocal transform.
This means the transform runs when there are 3 FDIVs with the same
divisor (not 2). That is conservative for some subtargets, and it can
miss profitable opportunities on CPUs such as A64FX, where a lower
threshold appears to produce better code generation.
```
a / D; b / D; ...
=>
recip = 1.0 / D; a * recip; b * recip; ...
```
Note:
It does not change the semantics of the reciprocal transform itself.
Commit: 478b91b6f8a2b08dce9673555e3f6da8e6e69051
https://github.com/llvm/llvm-project/commit/478b91b6f8a2b08dce9673555e3f6da8e6e69051
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][ComplexToStandard] Fix Conj and Neg ops fmf propagation (#222622)
Commit: 7bb74b19b7f0bbe491898de2289e72d09e4a6b26
https://github.com/llvm/llvm-project/commit/7bb74b19b7f0bbe491898de2289e72d09e4a6b26
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
Log Message:
-----------
[mlir][ComplexToLLVM] Fix abs op fmf propagation (#222621)
Commit: 12f00f9cd311a910a84f3e8a05b5b0c96e2bdf78
https://github.com/llvm/llvm-project/commit/12f00f9cd311a910a84f3e8a05b5b0c96e2bdf78
Author: Nikhil Ludder <72620320+badnikhil at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/pre-coerced-value-not-numbered.ll
Log Message:
-----------
[GVN] Skip instructions without value numbers in `processNonLocalLoad` (#219851)
GVN may insert coercion instructions (MaterializeAdjustedValue) without
assigning them value numbers. If one becomes a GEP index of a PRE'd load
in the same processBlock sweep, the GEP-index scalar PRE in
processNonLocalLoad reaches it before the next re-numbering iteration
and the verifying VN.lookup() may assert. Avoid performing PRE on such
instructions.
Fixes: #216265.
Commit: 6700445cfe301eb079e13ed1079fb86d1f7b1402
https://github.com/llvm/llvm-project/commit/6700445cfe301eb079e13ed1079fb86d1f7b1402
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
A llvm/test/CodeGen/RISCV/rvv/vsetvli-dead-vl-vtype-liveness.mir
Log Message:
-----------
RISCV: Maintain VL/VTYPE liveness when clearing dead flags in InsertVSETVLI (#222862)
Drop the stale VL/VTYPE ranges when a dead flag is cleared.
RISCVInsertVSETVLI marks the VL and VTYPE defs of an explicit VSETVLI as
live by clearing their dead flags, but did not update LiveIntervals. When a def
was previously a dead def, its live range is a zero-length dead-def segment
ending at the def slot; clearing the flag extends the def past that slot
without extending the range leaving a segment that references no instruction.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 18b9d7282c067d83edda8006c25542d9490e3c6e
https://github.com/llvm/llvm-project/commit/18b9d7282c067d83edda8006c25542d9490e3c6e
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
M llvm/test/Transforms/Attributor/nofpclass-log.ll
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Add sNaN deductions for log/log2/log10 (#219703)
`log(x)` can only produce `sNaN` if `x` is `sNaN`.
This also affects tests for `llvm.amdgcn.log.f16` and
`llvm.amdgcn.log.f32`.
Commit: 5f604ff568a9493f1eee44441ef475a2aaad329c
https://github.com/llvm/llvm-project/commit/5f604ff568a9493f1eee44441ef475a2aaad329c
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[BUILD] Fix for 02dc8a35 (#222876)
[BUILD] Fix for 02dc8a35
Commit: 3d6ae4bdf4c6d45d5e2f2c55c06f84568fde0fe0
https://github.com/llvm/llvm-project/commit/3d6ae4bdf4c6d45d5e2f2c55c06f84568fde0fe0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/IR/Builders.cpp
M mlir/test/Transforms/test-legalizer.mlir
Log Message:
-----------
[MLIR] Fix infinite loop in tryFold in Graph Regions (#189232)
In a graph region (e.g. the module body), an op may use its own result
as an operand, creating a circular SSA dependency. When such an op was
passed to OpBuilder::tryFold, the do-while loop could spin forever:
1. foldCommutative moved the constant operand to the RHS (in-place fold,
foldResults still empty).
2. The next fold call returned the op's own result, signalling an
in-place fold, but foldSingleResultHook re-ran trait folds, found
nothing to swap, and returned success with empty foldResults.
3. Step 2 repeated without end.
Fix: cap the number of in-place fold iterations at 64. Legitimate chains
are very short in practice (foldCommutative swaps once, then the op folds to
a value or constant), so the cap is never reached for correct IR. For the
circular-SSA case the loop now terminates and tryFold returns failure,
letting dialect conversion fall through to a conversion pattern instead of
looping.
An alternative could be for each iteration of the loop, snapshot the
operand list and attributes/properties. If a fold returns empty results
but the operands are unchanged, we have reached a fixpoint. Stop the
loop and return failure.
However this is more expensive for the common case, while fixing an edge
case.
Fixes #159675
Assisted-by: Claude Code
Commit: 63cc989e0f7c4d7965fea43ac72c1bc713fbc967
https://github.com/llvm/llvm-project/commit/63cc989e0f7c4d7965fea43ac72c1bc713fbc967
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
Log Message:
-----------
[ORC] Move ExecutorSharedMemoryMapperService names to sps_ci (#222835)
Relocate the service's interface names and SPS signatures from rt:: in
OrcRTBridge into a new Shared/SPSCI/SharedMemoryMapperSPSCI.h, matching
the existing SPSCI descriptor convention. Name-neutral: the symbol
strings are unchanged.
Commit: 58c46bae21181fb4240cf964461bea738d96d50e
https://github.com/llvm/llvm-project/commit/58c46bae21181fb4240cf964461bea738d96d50e
Author: David Green <david.green at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/bcmp.ll
M llvm/test/CodeGen/AArch64/i128-imm-compare-ccmp.ll
Log Message:
-----------
[AArch64] Guard against large types in performOrXorChainCombine (#222146)
Larger type sizes will be legalized to i64, and will hit a crash in
checking constants.
Fixes #222089
Commit: 1821d5d4fcabdd878e8c0278b59105802fe47d51
https://github.com/llvm/llvm-project/commit/1821d5d4fcabdd878e8c0278b59105802fe47d51
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
R clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [3/5] (#221533)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the third part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: e885b0d31b1e9d5dd83620d09ee76a92c8c38c39
https://github.com/llvm/llvm-project/commit/e885b0d31b1e9d5dd83620d09ee76a92c8c38c39
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
M clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
M clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [3/5] (#221534)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the third part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
Commit: bc9886e720f178e0d35db1c2e11f17739b5106ce
https://github.com/llvm/llvm-project/commit/bc9886e720f178e0d35db1c2e11f17739b5106ce
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
Log Message:
-----------
[flang][OpenACC] Don't emit unstructured-loop TODO for wrappable loops (#222260)
`genOpenACCLoopFromDoConstruct` raised an NYI for any unstructured DO
inside `acc kernels`. That check ran before the wrapping in
`genFIR(DoConstruct)`, so a loop whose CFG is self-contained aborted
lowering even though the fall-back path would have wrapped it in an
`scf.execute_region`.
Skip the TODO when `isWrappableConstruct()` accepts the loop. Such a
loop is not attached to a directive; it is only nested inside the
kernels region.
Correspondingly, a DO loop sitting directly in an `acc kernels` body is
no longer wrappable, since it is the loop the directive parallelizes and
hiding its CFG would leave the kernels region with nothing to partition.
Commit: 6e25eaedeee9ee4845565514dce823988ac7f23c
https://github.com/llvm/llvm-project/commit/6e25eaedeee9ee4845565514dce823988ac7f23c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getschedpolicy.cpp
A libc/src/pthread/pthread_attr_getschedpolicy.h
M libc/src/pthread/pthread_attr_init.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etschedpolicy (#222682)
This patch implements pthread_attr_setschedpolicy and
pthread_attr_getschedpolicy.
This commit only operates on the pthread_attr_t object. It does not
attempt to install the scheduling policy when creating a new thread. I'm
leaving that for a separate patch as it requires a moderately
complicated startup dance to ensure that the scheduling policy takes
effect before the startup code runs.
The validation of inputs in pthread_attr_setschedpolicy is an
interesting question. Glibc accepts only policies explicitly declared in
POSIX, while other implementations let the user pass anything, and rely
on the kernel to validate the arguments. Interestingly, even glibc does
not validate the arguments in pthread_setschedparam.
For llvm-libc, I chose not to validate the arguments either. This is
*mostly* consistent with POSIX, which says (emphasis mine):
> The supported values of policy shall *include* SCHED_FIFO, SCHED_RR,
and
> SCHED_OTHER, which are defined in the <sched.h> header.
I say mostly, because the spec does say we should return ENOTSUP if "an
attempt was made to set the attribute to an unsupported value", but I'm
not sure that's worthwhile, as it means we would need to update our list
of supported policies whenever the kernel adds a new one (and anyway, we
cannot be sure that our understanding of supported policies matches what
the running kernel actually supports).
Assisted-by: Gemini
Commit: eb6fe5a664bfa6813223d4a71b088d53900404d4
https://github.com/llvm/llvm-project/commit/eb6fe5a664bfa6813223d4a71b088d53900404d4
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/neon-addsub-long-reassoc.ll
Log Message:
-----------
[AArch64] Reassociate adds/subs of extends for [SU](ADD|SUB)L. (#222561)
We do this for expressions that can't use widening add/sub.
Commit: dc6825047c42442c5e18dd09d260bee983bc5712
https://github.com/llvm/llvm-project/commit/dc6825047c42442c5e18dd09d260bee983bc5712
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
Log Message:
-----------
[SLP] Limit second pass to register VF in vectorizeNonVectorizableInsts. (#222755)
The second tryToVectorizeList pass in vectorizeNonVectorizableInsts
would try all roots for each possible VF between 1 and the number of
entries in the list.
This can cause super-linear compile-time, for example when there are
basic blocks with calls taking a large number of loads as arguments.
For example, running SLPVectorizer on a block with 1024 loads passed to
calls (https://llvm.godbolt.org/z/8M53G6WzW) will take a large amount of
time (timeout on godbolt, locally on Apple M1 it takes ~30s). With the
fix, it only takes 0.01s.
On large IR corpus, I did not see any difference in vectorization
decisions on AArch64.
PR: https://github.com/llvm/llvm-project/pull/222755
Commit: 5d6c7162093204a3cf6914acafa73dea59134cc2
https://github.com/llvm/llvm-project/commit/5d6c7162093204a3cf6914acafa73dea59134cc2
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
A llvm/test/Transforms/LoopVectorize/RISCV/interleaved-load-masked-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/nested-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_contiguous.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
Log Message:
-----------
[VPlan] Narrow VPWidenGEPRecipe if only its first lane is used. (#221171)
Extend existing narrowing in legalizeAndOptimizeInductions, already
applied to VPReplicateRecipe and VPWidenRecipe, to VPWidenGEPRecipe as
well. This improves cases where an interleaved access's insert position
shares an address calculation with a strided access (see
RISCV/interleaved-load-masked-store.ll), which previously caused the
legacy cost model to classify the address as non-uniform.
Commit: 884f70e221f529439544ddb2bddba4c4eed14742
https://github.com/llvm/llvm-project/commit/884f70e221f529439544ddb2bddba4c4eed14742
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Error.h
M orc-rt/include/orc-rt-c/support/WrapperFunction.h
Log Message:
-----------
[orc-rt] Fix C++ comments in C header. NFC. (#222887)
Commit: 764a4f4176bdebb5b8aa1ad9a4c4c8b46de85b2d
https://github.com/llvm/llvm-project/commit/764a4f4176bdebb5b8aa1ad9a4c4c8b46de85b2d
Author: AJMullen <andreas.mullen at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/lib/Passes/MCF.cpp
A bolt/test/AArch64/edge-weight-estimation-fixes.s
Log Message:
-----------
[BOLT] Fixed BOLT edge weight estimation in non-LBR mode. (#222538)
Before: When estimating edge weights within `computeEdgeWeights` in
`MCF.cpp`, if the `TotalChildrenCount` is 0, the default edge weight is
`1 / (GraphT::child_end(BB)_ - GraphT::child_begin(BB))` resulting in
integer division and incorrect distribution of estimated edge weights.
After: Correctly estimate edge weights with zero and non-zero values of
`TotalChildrenCount` by enforcing floating point division.
---------
Co-authored-by: Thrrreeee <shijinrui at bytedance.com>
Commit: c8655a8e7c00df0e5433c2434aad56320c0d1ee1
https://github.com/llvm/llvm-project/commit/c8655a8e7c00df0e5433c2434aad56320c0d1ee1
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/unittests/Utility/RegisterValueTest.cpp
Log Message:
-----------
[lldb][test] Fix RegisterValueTest.cpp compile with GCC (#222889)
Avoid some most vexing parse problems.
Fixes #220707 / 19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4.
Commit: c45192cefe1cd3bf167d975f0f9949ba323845de
https://github.com/llvm/llvm-project/commit/c45192cefe1cd3bf167d975f0f9949ba323845de
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/include/__config
M libcxx/include/__locale_dir/ctype_base.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/aix.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/llvm_libc.h
M libcxx/include/__locale_dir/support/newlib.h
M libcxx/include/__locale_dir/support/openbsd.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Make _LIBCPP_PROVIDES_DEFAULT_RUNE_TABLE part of the locale base API (#219196)
Whether libc++ has to provide a rune table is really part of the
localization of a platform. Move it there instead of `<__config>`.
Commit: f276d8f00313f593ab9d8f3a1d242b6754f0a436
https://github.com/llvm/llvm-project/commit/f276d8f00313f593ab9d8f3a1d242b6754f0a436
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/openmp-task-depend-loc.mlir
Log Message:
-----------
[OMPIRBuilder] Don't leak a foreign debug loc into the taskwait call (#222586)
A kmp_depend_info array is hoisted to the entry block of the enclosing
function. Pointing the builder into that block also adopts the location
of what is already there, which belongs to whichever construct put it
there rather than to the construct being emitted. restoreIP does not put
the location back either, since it adopts the location of the
instruction it lands on, so in createTaskwait the leak outlives the
excursion and reaches the __kmpc_omp_taskwait_deps_51 call.
Use InsertPointGuard, which restores the location along with the
insertion point.
Fixes https://github.com/llvm/llvm-project/issues/222044
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 3aeaa598286a3271cf02107b751d8e1b0a629d6f
https://github.com/llvm/llvm-project/commit/3aeaa598286a3271cf02107b751d8e1b0a629d6f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/include/__atomic/to_gcc_order.h
Log Message:
-----------
[libc++][NFC] Simplify __to_gcc_order by avoiding constexprness (#220940)
We never make use of the fact that these functions are `constexpr`, so
we might as well avoid complicating them for it. Even if we need them to
be `constexpr` at some point, we likely won't require them to be
`constexpr` in C++11, which is the only language mode with the single
statement restriction that caused this to be more complicated.
Commit: 0046d7fcaa5ce7a55b7f9be65f9dca4f055c76f8
https://github.com/llvm/llvm-project/commit/0046d7fcaa5ce7a55b7f9be65f9dca4f055c76f8
Author: Chris Kennelly <ckennelly at ckennelly.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/negative-lower-table-based-cttz.ll
Log Message:
-----------
[AggressiveInstCombine] Require a definitive initializer for table folds (#222826)
tryToRecognizeTableBasedCttzOrLog2 accepted any global that isConstant()
and hasInitializer(), but isConstant() only means the value does not
change at run time -- it does not mean the initializer that is read is
the one that gets linked. An interposable (weak/linkonce) constant, or
an externally_initialized constant, can be replaced with a different
constant table at link or load time, so folding tbl[i] against the
observed initializer is unsound for those.
Assisted-by: Claude Code
Commit: d7f2a9df46058dedfa97d35ba6596a01f8ecebe3
https://github.com/llvm/llvm-project/commit/d7f2a9df46058dedfa97d35ba6596a01f8ecebe3
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/unittests/ObjectContainer/CMakeLists.txt
M lldb/unittests/ObjectContainer/ObjectContainerUniversalMachOTest.cpp
Log Message:
-----------
[lldb] Validate universal Mach-O slice bounds before parsing (#221493)
Opening a corrupt universal (fat) Mach-O file can crash lldb. A fat-arch
header entry's (offset, size) pair is untrusted, and `GetObjectFile()`
passes it straight to `ObjectFile::FindPlugin()` with no check against
the
container's own size.
A slice whose offset is 0 points back at the start of the same fat
header,
so `GetObjectFile()` recurses into itself until the stack is exhausted:
```
$ ./ObjectContainerTests --gtest_filter=GetObjectFileSelfReferentialSlice
#230 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
#231 CreateObjectFromContainer(...) ObjectFile.cpp:43
#232 lldb_private::ObjectFile::FindPlugin(...) ObjectFile.cpp:146
#233 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
(repeats until the stack is exhausted)
SUMMARY: AddressSanitizer: stack-overflow (libsystem_trace.dylib:arm64e+0x16bd8) in os_log_fmt_flatten+0x6d4
```
A slice whose declared size is far larger than the file reaches the
allocator instead, with the untrusted size unchanged:
```
$ ./ObjectContainerTests --gtest_filter=GetObjectFileOversizedSlice
==89958==ERROR: AddressSanitizer: requested allocation size 0xffffffffffff0046
(0xffffffffffff1048 after adjustments for alignment, red zones etc.) exceeds
maximum supported size of 0x10000000000 (thread T0)
#9 ObjectContainerUniversalMachO::GetObjectFile(FileSpec const*) ObjectContainerUniversalMachO.cpp:188
SUMMARY: AddressSanitizer: allocation-size-too-big MemoryBuffer.cpp:343 in
llvm::WritableMemoryBuffer::getNewUninitMemBuffer(unsigned long, llvm::Twine const&, std::__1::optional<llvm::Align>)
```
`GetModuleSpecifications()` in the same file already guards its own
recursion this way: it only follows a slice that starts strictly past
the
container's current offset, and clamps the recursive call to the bytes
remaining in the container. Apply the same check to `GetObjectFile()`.
Found with lldb-target-fuzzer. The commands above are the two regression
tests added here.
Commit: 41c11fa5c016886d5858a1aba03a5980688ad5a1
https://github.com/llvm/llvm-project/commit/41c11fa5c016886d5858a1aba03a5980688ad5a1
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libcxx/test/std/utilities/variant/variant.relops/three_way.pass.cpp
Log Message:
-----------
[libc++][test] Remove non-functional `constexpr` in three-way comparison test for `variant` (#222837)
When we are just testing SFINAE and do not provide definitions for these
comparison operators, or make them deleted, it is unhelpful to mark them
`constexpr`.
If the implementation uses `std::compare_three_way`, which uses deduced
return type in its `operator()`, in the `operator<=>` for `variant`,
more things in the function body would be instantiated and detected. As
a result, the `-Wundefined-inline` warning or something similar could be
raised. Currently, MSVC STL is doing so.
Commit: 18ea5b09a2494d0bb4edf2f6946d8ad11ab36cc3
https://github.com/llvm/llvm-project/commit/18ea5b09a2494d0bb4edf2f6946d8ad11ab36cc3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/combine-shl.ll
Log Message:
-----------
[X86] combine-shl.ll - regenerate asm comments (#222729)
Reduces diff in upcoming patch
Commit: 46348fd3006282cc00b6b448a54456092c1cad4b
https://github.com/llvm/llvm-project/commit/46348fd3006282cc00b6b448a54456092c1cad4b
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/program_manager/CMakeLists.txt
A libsycl/unittests/program_manager/program_cache.cpp
M libsycl/unittests/queue/queue.cpp
Log Message:
-----------
[libsycl] Add queue constructors with context. (#221763)
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Co-authored-by: Sergey Semenov <sergey.semenov at intel.com>
Commit: 3407850c31e556ffb52d22b09c9405ad67a59f64
https://github.com/llvm/llvm-project/commit/3407850c31e556ffb52d22b09c9405ad67a59f64
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/signal.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/raise.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/tgkill.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/signal/CMakeLists.txt
M libc/src/signal/linux/CMakeLists.txt
A libc/src/signal/linux/pthread_kill.cpp
A libc/src/signal/pthread_kill.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_kill_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Implement pthread_kill (#222625)
The implementation delegates to Thread::kill, which uses tgkill to
target the thread ID.
The main complication is handling zombie threads. POSIX.1-2024 requires
that pthread_kill on a terminated (zombie) thread does not return ESRCH
because the pthread_t handle is still valid. The Linux kernel reaps
threads immediately on exit, so calling tgkill on an exited thread would
return ESRCH (or worse, target a recycled TID). To handle this:
- we check the thread's detach_state first. If it's already EXITING, we
simply return success without calling tgkill (a zombie thread cannot
handle signals anyway).
- if the thread exits concurrently and tgkill returns -ESRCH, we assume
it transitioned to a zombie and treat it as success.
I've also added a tgkill syscall wrapper and replaced one raw usage of
SYS_tgkill.
I've added an integration test covering signal delivery to self and
other threads, signal 0 checks, invalid signals, zombie threads, and
signal mask interactions.
Commit: 2fa51898b1a77dba4a6a397b296732009771e2d6
https://github.com/llvm/llvm-project/commit/2fa51898b1a77dba4a6a397b296732009771e2d6
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A libsycl/include/sycl/__impl/group_barrier.hpp
A libsycl/include/sycl/__spirv/spirv_types.hpp
M libsycl/include/sycl/sycl.hpp
A libsycl/test/basic/group_barrier.cpp
A libsycl/test/basic/group_barrier_device_code.cpp
Log Message:
-----------
[libsycl] Add group_barrier function. (#218971)
Assisted-by: Claude Code and GitHub Copilot
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: c61dda2b6137c618a6f196502512cd8989ab8f6b
https://github.com/llvm/llvm-project/commit/c61dda2b6137c618a6f196502512cd8989ab8f6b
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
Log Message:
-----------
[LLVM][CodeGen][SME] Make FMA decision independent of streaming mode. (#222598)
The relevant bfloat instructions are available in streaming mode and
thus we can benefit from the same BFMLAL based lowering.
Commit: 246194f32b17db4e43cc115f035619b0930e3787
https://github.com/llvm/llvm-project/commit/246194f32b17db4e43cc115f035619b0930e3787
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
Log Message:
-----------
[AArch64] Cache repeated subtarget queries (NFC) (#222637)
The existing SubtargetMap caches subtargets using a key built from a subset of
relevant function attributes. Add a single-entry cache keyed by the full
function attribute set to avoid rebuilding that key for repeated queries. This
covers both repeated queries for the same function and queries for different
functions with identical attributes.
Improves CTMark geomean -0.10% on aarch64-O3 and -0.17 on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=87d9c3c24ff5941ac08799850a6549b561c98a81&to=544bb3d9ac28bc1a28248f6b03bcd95fa85b20e0&stat=instructions:u
Assisted-by: codex
Commit: 9df4e9be49c213f8df306469fae1f50c98df6d4e
https://github.com/llvm/llvm-project/commit/9df4e9be49c213f8df306469fae1f50c98df6d4e
Author: Robert <robertvuia06 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/docs/index.md
M libsycl/include/sycl/__impl/usm_functions.hpp
M libsycl/src/usm_functions.cpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/unittests/CMakeLists.txt
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
A libsycl/unittests/usm/CMakeLists.txt
A libsycl/unittests/usm/alloc.cpp
Log Message:
-----------
[libsycl] USM Aligned allocation functions (#213468)
Adds the `aligned_*` versions of the USM functions, specifically for the
`device` `host` `shared` and free standing `aligned_alloc`.
Most of the overloads delegate between each other, but they slowly end
up being mapped to `aligned` version of API.
Adds more LIT tests in `alloc_functions.cpp` to cover the aligned
version.
Adds unittests for USM in `usm/alloc.cpp`
Assisted by AI for documentation, validation of logic in overloads and
alignment specifications from latest SYCL-Docs and unit tests
Commit: 4245b1dbc9d439c16c378486544f47a77b72ca53
https://github.com/llvm/llvm-project/commit/4245b1dbc9d439c16c378486544f47a77b72ca53
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/force-instruction-cost.ll
Log Message:
-----------
[LV] Add cost printing test with forced instruction costs (NFC). (#222895)
Add a test printing the cost of all recipes in the vector loop region
with -force-target-instruction-cost. Currently the flag is ignored for
VPDerivedIVRecipe and VPScalarIVStepsRecipe.
Commit: 18120564aae0d968a7b08e4b69f4f635fc91ab9c
https://github.com/llvm/llvm-project/commit/18120564aae0d968a7b08e4b69f4f635fc91ab9c
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/SystemZ/misched-prera-cmp-elim.mir
M llvm/test/CodeGen/SystemZ/misched-prera-latencies.mir
M llvm/test/CodeGen/SystemZ/misched-prera-loads.mir
Log Message:
-----------
[MISched] Dump SU node number on `tracePick` (#222631)
Print picked SU node number inline in `tracePick` for convenience.
Otherwise its may be a bit more confusing, for example if we have 2 best
candidates with a similar reason under a single direction.
Printing node number directly as it cannot be an ExitSU (and EntrySU is
effectively unused in-tree).
Commit: 26e41fdf58e9b41a13dc0c22a107100469b59d35
https://github.com/llvm/llvm-project/commit/26e41fdf58e9b41a13dc0c22a107100469b59d35
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/Attributor/nofpclass-fadd-fsub.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
Log Message:
-----------
[KnownFPClass] Move `fadd`/`fsub` tests to `nofpclass-fadd-fsub.ll` (#221872)
- Moved the lit tests for `fadd`/`fsub` to their own dedicated file.
- Updated the lit tests for `fadd`/`fsub` from version 2 to version 6.
- `fadd_p0_ftz_daz #3` was actually testing `positivezero|positivezero`,
so I fixed the name of the test to be `fadd_p0_ftpz_dapz #3`. Then added
a separate `fadd_p0_ftz_daz #0` test.
- `nofpclass-fadd-fsub.ll` uses attributes 1-9 except for 6, so I added
`fadd_p0_dynamic_dynamic #6` so I wouldn't have to change the attributes
for other tests (i.e. changing `test #7 --> test #6`, `test #8 --> test
#7`, etc)
The only tests for `fadd` that remain in `nofpclass.ll` are not related
to testing `KnownFPClass::fadd`.
I have split the PR into 3 commits to make it easier to review (4
commits due to the `undef` false positive).
After this PR lands I plan to open this PR
https://github.com/llvm/llvm-project/pull/221876
Commit: 32dd4e7e8e375cf983ffcf49e72f3abd6158a1b1
https://github.com/llvm/llvm-project/commit/32dd4e7e8e375cf983ffcf49e72f3abd6158a1b1
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/exception.hpp
M libsycl/src/exception.cpp
M libsycl/unittests/CMakeLists.txt
A libsycl/unittests/exception/CMakeLists.txt
A libsycl/unittests/exception/exception.cpp
Log Message:
-----------
[libsycl] Add sycl::exception constructors with context. (#220551)
Assisted-by:: GitHub Copilot for test & doxygen comments.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 092ac4c2626af97a09d768a63a32a2b4b96f754c
https://github.com/llvm/llvm-project/commit/092ac4c2626af97a09d768a63a32a2b4b96f754c
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
A clang/test/OpenMP/debug-info-ompirbuilder-handoff.c
Log Message:
-----------
[clang][OpenMP] Don't drop debug location when handing off to OMPIRBuilder. (#219548)
All the clang callsites that hand a `LocationDescription` to the
`OpenMPIRBuilder` pass `CGF.Builder`. That selects
`LocationDescription(const IRBuilderBase &)`, which carries both the
insertion point and the current debug location.
The 2 call sites fixed in this PR used `CGF.Builder.saveIP()` which
passes only an insertion point, selecting `LocationDescription(const
InsertPointTy &)`, which leaves `DL` empty. As a result, the IR the
builder emitted on clang's behalf came out without `!dbg`.
Fixed by passing `CGF.Builder`, as the other callsites do.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 1f6182764499a3007a8f703f2cae635d21b5e7fe
https://github.com/llvm/llvm-project/commit/1f6182764499a3007a8f703f2cae635d21b5e7fe
Author: Kiva <zengtao at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/strided-load-common-alignment.ll
Log Message:
-----------
[RISCV][SLP] Precommit strided-load alignment tests (NFC) (#222863)
Commit: 476e717c0484b464085f8cc468b0b35fdeea7815
https://github.com/llvm/llvm-project/commit/476e717c0484b464085f8cc468b0b35fdeea7815
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/transform/Ch2/lib/MyExtension.cpp
M mlir/examples/transform/Ch3/lib/MyExtension.cpp
M mlir/include/mlir/Dialect/SCF/IR/SCF.h
A mlir/include/mlir/Dialect/SCF/IR/SCFDialect.h
M mlir/lib/CAPI/Dialect/SCF.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCFPass.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
Log Message:
-----------
[mlir][SCF] Split the dialect declaration (NFC) (#222802)
Introduce a self-contained dialect declaration and use it in nine
configured consumers that do not need the generated operation umbrella.
Across three controlled -j16 rebuilds of the affected TUs, median
instructions fell from 162.029B to 150.032B (-7.404%) and median wall
time fell from 8.82s to 8.73s (-1.020%).
Assisted-by: Codex
Commit: 152917c9555d4da0171e7d992b38196e2fb9f5aa
https://github.com/llvm/llvm-project/commit/152917c9555d4da0171e7d992b38196e2fb9f5aa
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/test/Dialect/Linalg/vectorization/insert-slice.mlir
Log Message:
-----------
[mlir][linalg] Add `insert_slice` vectorization tests for leading/trailing dropped dims (#221966)
Follow-up to #219192, addressing review feedback after merge.
This PR _simply_ add tests for vectorizing rank-reducing
`tensor.insert_slice` where the dropped unit dim is:
1. leading, e.g., `dest = 1x8x4, source = ?x4`,
2. trailing, e.g., `dest = 8x4x1, source = ?x4`, and
3. both (leading + trailing), e.g., `dest = 1x8x4x1, source = ?x4`.
It complements the test introduced in #219192.
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: 3c003512ef20a066ee864fb20c31496859b75061
https://github.com/llvm/llvm-project/commit/3c003512ef20a066ee864fb20c31496859b75061
Author: yamash-fj <yamashita.ta-16 at fujitsu.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/targetattr.c
A clang/test/Driver/aarch64-mcpu-no-feat.c
M clang/test/Driver/arm-sb.c
M llvm/lib/TargetParser/AArch64TargetParser.cpp
Log Message:
-----------
[AArch64][Driver] Fix behaviour of +nofeat modifier on -mcpu
Honour explicit +no<feature> modifiers for features implied by a CPU's
base architecture, both in -mcpu and target("cpu=...") attributes.
For example, -mcpu=neoverse-v2+nosb now disables SB instead of silently
ignoring the modifier.
Fixes #192186.
Commit: d5f6426a52af4966bd6902634648ba40c23bdc35
https://github.com/llvm/llvm-project/commit/d5f6426a52af4966bd6902634648ba40c23bdc35
Author: Vladimir Miloserdov <milosvova at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-and-or-with-all-true.ll
Log Message:
-----------
[AArch64][SVE] Optimize logical ops with convert.to.svbool (#160408)
When both operands of a logical operation (and/or/xor) are
convert.to.svbool
from the same narrower type, unwrap to that type, simplify using
simplifyBinOp,
and rewrap the result. This eliminates redundant instructions in cases
like:
svand_z(svptrue_b8(), svpnext_b16(prev, pg), svptrue_b16());
Fixes https://github.com/llvm/llvm-project/issues/160279.
---------
Co-authored-by: Paul Walker <paul.walker at arm.com>
Commit: e6b77e6ce7b2cc5625f83fc9e09d273b1ca7693a
https://github.com/llvm/llvm-project/commit/e6b77e6ce7b2cc5625f83fc9e09d273b1ca7693a
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-records-and-retained.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-retained-nodes.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-skip-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable.ll
Log Message:
-----------
[SPIRV] Add support for NSDI DebugLocalVariable. (#221706)
This PR adds support for
[DebugLocalVariable](https://registry.khronos.org/SPIR-V/specs/unified1/DebugInfo.html#DebugLocalVariable).
Commit: 11ef37f9b78e121a11cab841ba2ee0069fba4149
https://github.com/llvm/llvm-project/commit/11ef37f9b78e121a11cab841ba2ee0069fba4149
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Log Message:
-----------
[lldb][AArch64][Linux] Remove unused SVE variable (#222935)
Commit: 2e023c8e922d2b03c0cd39c1dbb6e594ab01d856
https://github.com/llvm/llvm-project/commit/2e023c8e922d2b03c0cd39c1dbb6e594ab01d856
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h.inc
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Make all syntactic properties explicit (#222375)
For clauses, modifiers, and modifier sets/groups, make sure that either
the syntactic proprty or its inverse is explicitily listed, with the
missing properties added according to the following table.
```
| Modifier
Inverse | Clause Modifier group
Property property | defaults defaults defaults
----------+------------+------------+------------+-----------
required optional | optional optional optional
unique repeatable | repeatable unique unique
exclusive compatible | compatible compatible compatible
ultimate free | free free free
```
Commit: 5603248c95d69e31889f9eca8ce5254c3a2484bd
https://github.com/llvm/llvm-project/commit/5603248c95d69e31889f9eca8ce5254c3a2484bd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/symbol.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h
M llvm/unittests/Frontend/EnumSetTest.cpp
Log Message:
-----------
[OpenMP] Rename ClauseSet to Clauses and DirectiveSet to Directives, NFC (#222440)
The ClauseSet name was an alias of an EnumSet of clause ids. However, it
collides with a "clause set" concept in OpenMP, which is a set of
clauses,
but with properties and additional information. To resolve the naming
conflict, rename ClauseSet to Clauses.
Although there is no "directive set" in OpenMP, rename DirectiveSet in
an analogous way for uniformity.
Commit: 9d3f81dadfcd509eadd16213a7f428e081214147
https://github.com/llvm/llvm-project/commit/9d3f81dadfcd509eadd16213a7f428e081214147
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Remove deprecated hasStdExtCOrZcd/hasStdExtCOrZcfOrZce (#222925)
These two methods were marked LLVM_DEPRECATED in favor of
hasStdExtZcd/hasStdExtZcf respectively 7 months ago. There are no
remaining in tree callers, so remove them.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: e0d944d2dda0df304505947278304a628ff824fb
https://github.com/llvm/llvm-project/commit/e0d944d2dda0df304505947278304a628ff824fb
Author: Shoreshen <372660931 at qq.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
Log Message:
-----------
[AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (#203150)
Implied by
https://github.com/llvm/llvm-project/pull/202917#discussion_r3388089034
This PR apply legalization change for DAG. Case changes can be explained
in https://github.com/llvm/llvm-project/pull/202917
---------
Co-authored-by: shore <shorshen at amd.com>
Commit: 21ef0ade496fcaf20cfcb32f4a7e46f4f38abafd
https://github.com/llvm/llvm-project/commit/21ef0ade496fcaf20cfcb32f4a7e46f4f38abafd
Author: Prashanth <TheStarOne01 at proton.me>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/typo-correction.c
Log Message:
-----------
[clang][Sema] Add diagnostic note for reference of function-like macros requiring without parentheses (#123495)
This PR enhances the Clang diagnostics to provide better guidance when
function-like macros are used without parentheses. Additionally, it
updates the relevant test cases to reflect these changes (#123038 ).
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Co-authored-by: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Commit: be60b244d1f9fa798c8922e313679035ad9c2ee5
https://github.com/llvm/llvm-project/commit/be60b244d1f9fa798c8922e313679035ad9c2ee5
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libunwind/test/dwarf_expression_stack.pass.cpp
Log Message:
-----------
[libunwind] Mark test as requiring Unix headers (#222679)
Test `libunwind/test/dwarf_expression_stack.pass.cpp` requires a POSIX
environment because it uses `signal.h` and associated functions. Because
of this, the test fails in baremetal targets.
This change adjusts the requirements of the test. `has-unix-headers`
does not map exactly to the requirements here, but it seems to be enough
for this case.
Commit: 176ab0177fb9acf749b90634cae84936fcfac2c5
https://github.com/llvm/llvm-project/commit/176ab0177fb9acf749b90634cae84936fcfac2c5
Author: Yue Huang <2292398666 at qq.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/ControlFlowToSCF/ControlFlowToSCF.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Transforms/CFGToSCF.h
M mlir/lib/Conversion/ControlFlowToSCF/CMakeLists.txt
M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
M mlir/lib/Transforms/Utils/CFGToSCF.cpp
M mlir/test/Conversion/ControlFlowToSCF/test.mlir
Log Message:
-----------
[MLIR][Conversion] Remove func dialect dependency for CF to SCF conversion (#222594)
The pass used to target only `func.func` and generates a `func.return`
with poison values. Now we change it to `ub.unreachable`, as the TODO
suggests.
But this change alone can cause the following pattern to appear after
lifting:
```mlir
func.func @f(%arg0: f32, %arg1: i1) -> f32 {
cf.cond_br %arg1, ^bb1(%arg0 : f32), ^bb2
^bb1(%0: f32): // pred: ^bb0
ub.unreachable
^bb2: // pred: ^bb0
return %arg0 : f32
}
```
This `cf.cond_br` cannot be raised further into `scf.if`, because we
need something as the operand of `return`, while `ub.unreachable`
doesn't provide this. Therefore we reused the code of synthesizing
poison values when `ub.unreachable` can be merged to other return
operations.
---------
Co-authored-by: Markus Böck <markus.boeck02 at gmail.com>
Commit: f2d4b9dfc7e5bba16f6b3b46469e6cad619370db
https://github.com/llvm/llvm-project/commit/f2d4b9dfc7e5bba16f6b3b46469e6cad619370db
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
Log Message:
-----------
[AMDGPU][NFC] Convert v2f16 inreg fabs/fneg tests to have SGPR uses (#222785)
Update v2f16 inreg fabs/fneg tests to have SGPR uses.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 94dcd357325f05a47537794bae692998ec059cdf
https://github.com/llvm/llvm-project/commit/94dcd357325f05a47537794bae692998ec059cdf
Author: Kristina Bessonova <kbessonova at accesssoftek.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
Log Message:
-----------
[AArch64][GlobalISel] Add support for TLS for ELF (#220236)
Mirror the existing DAGISel lowering for the TLS access sequences.
'AArch64 local-dynamic TLS cleanup pass' moved to
`AArch64PassConfig::addMachineSSAOptimization()` hook to make it running
for both instruction selection pipelines.
The generated by GlobalISel code matches DAGISel for the existing TLS
test cases.
Commit: 57bf08dc0f318ce50e6c9fdc0d7c9e770f247ee8
https://github.com/llvm/llvm-project/commit/57bf08dc0f318ce50e6c9fdc0d7c9e770f247ee8
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/scmp.ll
Log Message:
-----------
[PowerPC] simplify the asm of scmp builtin (#200024)
for the IR
```
define noundef signext range(i32 -1, 2) i32 @test_scmp(i64 noundef %a, i64 noundef %b) local_unnamed_addr #0 {
entry:
%cond2 = tail call i32 @llvm.scmp.i32.i64(i64 %a, i64 %b)
ret i32 %cond2
}
```
when compile -mcpu=pwr8 and 64bit
it generated as asm following orginal
sradi 5, 4, 63
rldicl 6, 3, 1, 63
subc 7, 4, 3
adde 5, 6, 5
cmpd 3, 4
li 3, -1
xori 5, 5, 1
isellt 3, 3, 5
extsw 3, 3
blr
the patch will let it generate as
```
cmpd 7, 3, 4
mfocrf 3, 1
rlwinm 4, 3, 30, 31, 31
rlwinm 3, 3, 29, 31, 31
sub 3, 4, 3
blr
```
Commit: bf1b598fff82413353b3ad45c4df06b243c1e6a1
https://github.com/llvm/llvm-project/commit/bf1b598fff82413353b3ad45c4df06b243c1e6a1
Author: Stanislav Bardyuk <6258615+kodlan at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAlignment.cpp
M llvm/test/Transforms/InferAlignment/masked.ll
M llvm/test/Transforms/InferAlignment/memintrinsics.ll
Log Message:
-----------
[InferAlignment] Do not use intrinsic align attributes as base pointer alignment (#221018)
InferAlignment propagates alignment between accesses of the same base
pointer: each load/store records how aligned the base must be, and later
accesses of that base are upgraded. Since #156057 (masked.load/store)
and
#217172 (memcpy/memmove/memset), the align parameter attribute of these
intrinsics is fed into the same table.
That is not sound. A memset with a zero length (or a masked store with
an
all-false mask) does not access memory, and its pointer argument is
allowed
to be poison, so an align attribute on it proves nothing about the
pointer.
For
```llvm
define void @test(ptr %p, i64 %n) {
call void @llvm.memset(ptr align 16 %p, i8 0, i64 %n, i1 false)
store i32 0, ptr %p
ret void
}
```
the store was upgraded to align 16, which is UB when %p is only 4-byte
aligned and %n is 0.
Stop presenting the attribute alignment to the base pointer logic: the
intrinsic branch now passes align 1, the same convention the
and(ptrtoint)/trunc(ptrtoint) patterns use for "this instruction proves
nothing". The attribute can still be improved from a dominating real
access or from known bits. A constant non-zero length would be a
provable access, but it is deliberately not special-cased, as suggested
in the issue.
Fixes #220520
Commit: 2a7919ef03d3d389064a56531bcb3ce7a87afd4c
https://github.com/llvm/llvm-project/commit/2a7919ef03d3d389064a56531bcb3ce7a87afd4c
Author: kwyatt-ext <kwyatt.external at hpe.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/stat.h
M flang-rt/lib/runtime/stat.cpp
M flang/docs/Extensions.md
M flang/docs/Intrinsics.md
M flang/include/flang/Evaluate/common.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-namelist.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/type.cpp
A flang/test/Semantics/enumeration-type-intrinsics-array-fold.f90
A flang/test/Semantics/enumeration-type-intrinsics-gating.f90
A flang/test/Semantics/enumeration-type-intrinsics-keyword.f90
A flang/test/Semantics/enumeration-type-intrinsics-nonenum.f90
A flang/test/Semantics/enumeration-type-intrinsics.f90
A flang/test/Semantics/enumeration-type-io-pdt-order.f90
A flang/test/Semantics/enumeration-type-io.f90
A flang/test/Semantics/enumeration-type-mod-readback.F90
A flang/test/Semantics/enumeration-type-mod.f90
Log Message:
-----------
[flang] Enumeration Type: (PR 3/5) Intrinsics + I/O + Modules (#193235)
This PR adds intrinsics: HUGE, INT, NEXT, and PREVIOUS. It adds support
for I/O, specifically formatted I/O with explicit format. Also, it adds
module support.
It is the 3rd of 5 stacked PRs.
Assisted-by: AI
---------
Co-authored-by: Kevin Wyatt <kwyatt at hpe.com>
Commit: 1cfa469ad1b9a00500e94eac8ec65b1f0041f3ce
https://github.com/llvm/llvm-project/commit/1cfa469ad1b9a00500e94eac8ec65b1f0041f3ce
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOverload.cpp
A clang/test/AST/ast-print-deducing-this.cpp
M clang/test/ASTSYCL/ast-dump-sycl-kernel-call-stmt.cpp
Log Message:
-----------
[clang] Add missing information to AST for calling explicit object member functions (#220463)
For `E1.E2()` and `E1->E2()`,
1. A `MemberExpr` is created to represent `E1.E2` and `E1->E2`.
If overload resolution is performed, it is created using information
from a `UnresolvedMemberExpr`.
2. If `E2` is an explicit object member function, a `DeclRefExpr` is
created to represent `E2` using information from the `MemberExpr`.
This PR adds missed information to the `DeclRefExpr`.
Fixes #218829.
Commit: 8328d74f3a96e70c917a796780b2d7e2ac159958
https://github.com/llvm/llvm-project/commit/8328d74f3a96e70c917a796780b2d7e2ac159958
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/records.cpp
M clang/test/CodeGen/pr4349.c
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
[clang][bytecode] Use opaque pointers for decl-based dummy pointer (#222897)
This uses the recently introduced opaque pointers for what we used to
use dummy pointers for, if the base of the pointer is a declaration.
This of course means we see opaque pointers in a lot more places.
However, we don't need to actually allocate anything for their data
anymore, resulting in a lot fewer allocations for such pointers.
Commit: 1fe126ef2d6330b7459704e28b2cb3f9bb92b63c
https://github.com/llvm/llvm-project/commit/1fe126ef2d6330b7459704e28b2cb3f9bb92b63c
Author: Andrew Ng <andrew.ng at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lld/Common/CommonLinkerContext.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
A lld/test/ELF/dynamic-debug.test
A lld/test/ELF/invalid-dynamic-debug.test
A lld/test/ELF/trace-symbols-dynamic-debug.test
M llvm/include/llvm/BinaryFormat/ELF.h
Log Message:
-----------
[dyndbg][LLD][ELF] Initial LLD support for dynamic debugging (#214188)
LLVM's Dynamic Debugging feature (`llvm/docs/DynamicDebugging.md`)
generates optimized relocatable files with an unoptimized relocatable
copy of the functions from its translation unit embedded in a
`SHT_LLVM_DYNDBG_ELF` section named `.debug_llvm_dyndbg`. The
unoptimized functions in the "inner" embedded relocatable reference the
functions and data of the "outer" optimized relocatable.
When LLD encounters dynamic debugging objects, a nested "inner"
relocatable link is run with the embedded "inner" unoptimized objects.
The output is embedded in a `SHT_LLVM_DYNDBG_ELF` section named
`.debug_llvm_dyndbg` and described by an `NT_LLVM_DYNAMIC_DEBUGGING`
note in the "outer" output. The "inner" relocatable link more closely
resembles a final link rather than a regular relocatable `-r` one,
unless the "outer" link is itself a relocatable `-r` link.
The embedded "inner" objects' undefined symbols are added to the "outer"
symbol table so that the "outer" link resolves the dependencies of the
"inner" relocatable link. Symbols referenced by "inner" relocations from
an allocated section are assigned a PLT/GOT entry as appropriate and are
diagnosed when unresolved. In this initial implementation, these symbols
also act as `--gc-sections` roots for the "outer" link and
`--gc-sections` is not supported for the "inner" relocatable link.
ICF is disabled so that individual functions can be patched when
debugging with dynamic debugging without affecting other identical
functions.
RFC: https://discourse.llvm.org/t/90113
Commit: 4ec3afcec324456abdda0e75a3cfbbbcabff9714
https://github.com/llvm/llvm-project/commit/4ec3afcec324456abdda0e75a3cfbbbcabff9714
Author: Adam Paszke <apaszke at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/IR/parser.mlir
Log Message:
-----------
[mlir] Accept OpaqueAttr as a valid memory space if the context allows unregistered dialects (#187682)
When a context allows unregistered dialects and an unknown attribute is
encountered, it is wrapped in OpaqueAttr from the builtin dialect.
Commit: c89359b132c086c1a98d9b6ec73461e48c004481
https://github.com/llvm/llvm-project/commit/c89359b132c086c1a98d9b6ec73461e48c004481
Author: Robert <robertvuia06 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libsycl/docs/index.md
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
A libsycl/test/basic/context.cpp
M libsycl/unittests/CMakeLists.txt
A libsycl/unittests/context/CMakeLists.txt
A libsycl/unittests/context/context_ctors.cpp
Log Message:
-----------
[libsycl] Add constructors for context (#214538)
Adds public `constructors` API for the `context` class.
It also adds E2E and unit tests.
Assisted by AI for documentation and testing
---------
Co-authored-by: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Commit: 853a7fc14e85659be5b5ac6cfd3481712e3795d1
https://github.com/llvm/llvm-project/commit/853a7fc14e85659be5b5ac6cfd3481712e3795d1
Author: Chris Copeland <chris at chrisnc.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll
M llvm/test/CodeGen/ARM/eabihf-no-fpregs.ll
M llvm/test/CodeGen/ARM/inlineasm-operand-implicit-cast.ll
Log Message:
-----------
[ARM] Prevent use of the VFP calling convention when +soft-float is enabled (#221434)
This check was implemented in #111334 for -fpregs and Thumb1 cases, but
+soft-float is a distinct case that can lead to the same silent calling
convention mismatches.
Fix tests that were using +soft-float and the VFP calling convention.
Clarify comment about hard-float support on mve+nofp cores.
Commit: cfa4135a9d324b3c539d9f874509ba03a8b0106f
https://github.com/llvm/llvm-project/commit/cfa4135a9d324b3c539d9f874509ba03a8b0106f
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP] Don't reserve the generic mode warp on SPIR-V (#222763)
#218790 widened a generic mode kernel's thread bound by a warp so that
the main
thread has one of its own. The bound is what lets the runtime's own warp
addition through: `getEffectiveNumThreads()` adds a warp and then clamps
to the
bound, so before that change the addition was clamped straight back off,
which
is why a `thread_limit` below one wavefront ended up with no workers.
Widening
the bound is the fix, and it is also what makes every generic mode
kernel launch
a warp wider than it used to.
`hasGridValue()` covers SPIR-V, so that geometry change reached Level
Zero.
@sarnex reports hangs and intermittent failures there and asked about a
revert
in
https://github.com/llvm/llvm-project/pull/222097#issuecomment-5609354538.
The
motivating bug was on AMDGPU, so this restricts the reservation to the
targets
it was written for and gives SPIR-V back the launch geometry it had
before.
Measured on gfx90a, generic mode, threads per block for a given
`thread_limit`:
| `thread_limit` | launched |
| --- | --- |
| 1 | 65 |
| 4 | 68 |
| 64 | 128 |
| 256 | 320 |
| 1024 | 1024 (clamped) |
Before #218790 each of those launched exactly `thread_limit`, because
the clamp
removed the runtime's warp again. SPIR-V goes back to that with this
patch:
`thread_limit(4)` writes a bound of 4 rather than 68, while AMDGPU keeps
68.
I have not reproduced the Level Zero failures — I have no Intel device,
and
OpenMP offload to `spirv64-amd-amdhsa` is not a working path, so AMD
hardware
cannot stand in. What this patch does establish is that SPIR-V's bound
returns
to its pre-#218790 value, so it undoes the geometry change whether or
not that
is the whole story. @sarnex, could you try it on the Level Zero runner?
This is a narrowing rather than a claim that SPIR-V never wants the
reserved
warp. Without it a SPIR-V `thread_limit` below a warp has the same
no-workers
problem #218790 fixed elsewhere; it is just not reachable today. If
Level Zero
grows the handling, this can come back.
Testing: `clang/test/OpenMP` 1613 passed,
`llvm/test/Transforms/{OpenMP,Attributor}`
263 passed, `LLVMFrontendTests` 1322 passed. Two tests needed updating,
both of
which encode SPIR-V thread bounds.
Commit: ad72da24e242b6bf5c73b5fcd267a86cefcead12
https://github.com/llvm/llvm-project/commit/ad72da24e242b6bf5c73b5fcd267a86cefcead12
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/force-instruction-cost.ll
Log Message:
-----------
[VPlan] Consider VPDerivedIV & VPScalarIVSteps for forced costs. (#222918)
Now that we compute VPDerivedIV and VPScalarIVSteps costs directly in
VPlan, also account for them with forced costs. They never have
underlying instructions, so always add the forced cost for them.
Previously they would have been accounted for in precomputeCosts.
PR: https://github.com/llvm/llvm-project/pull/222918
Commit: 59658bea07648e2ec4c32ec15e03e13ed130b803
https://github.com/llvm/llvm-project/commit/59658bea07648e2ec4c32ec15e03e13ed130b803
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManySignals.py
Log Message:
-----------
[lldb][test] Disable TestConcurrentManySignals.py on AArch64 Linux (#222948)
It is flakey in pre-commit CI
(https://github.com/llvm/llvm-project/issues/171210) and blocking
https://github.com/llvm/llvm-project/issues/171202 as a result.
No one is going to have time to dig into this soon, so disable it for
now.
Commit: 0bf534a7b76c7623edb7785cd8b21d89ec63e5d9
https://github.com/llvm/llvm-project/commit/0bf534a7b76c7623edb7785cd8b21d89ec63e5d9
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-subreg-index-aligned-vgpr-check.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir
Log Message:
-----------
[AMDGPU] Remove the VGPR-alignment check from the machine verifier (#219230)
The machine verifier had a check that a 64-bit-or-wider VALU operand uses an even-aligned VGPR/AGPR tuple on subtargets that require it. Now that most operands express their alignment requirement through `_AlignTarget`, the check is redundant: the generic verifier already rejects a register that does not fit its operand's class.
This removes the "Subtarget requires even aligned vector registers" and "Operand has incorrect register class" diagnostics, leaving the generic "Illegal virtual/physical register for instruction".
The image `vaddr` parity check is left in place: single-VGPR alignment cannot be expressed as a register class, so it still needs an explicit check.
Commit: f55cb17894f605f8045d74f7ed13322776530acc
https://github.com/llvm/llvm-project/commit/f55cb17894f605f8045d74f7ed13322776530acc
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
Log Message:
-----------
[Clang][NFC] Add regression tests for a couple resolved issues (#222944)
Fixes #38721 (Clang 18)
Fixes #58682 (Clang 18)
Commit: c44ac9eedba61129a76ff5964db9a0d6bf639b64
https://github.com/llvm/llvm-project/commit/c44ac9eedba61129a76ff5964db9a0d6bf639b64
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
A clang/test/APINotes/Inputs/Headers/RedeclAnnotation.apinotes
A clang/test/APINotes/Inputs/Headers/RedeclAnnotation.h
A clang/test/APINotes/Inputs/Headers/RedeclDefinition.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/redecl-after-definition.c
Log Message:
-----------
[clang][APINotes] Do not drop attributes applied after a definition (#222902)
API notes are matched against whichever declaration the compiler
reaches, which can be a redeclaration that follows the definition. When
the definition lives in one module and the annotated redeclaration in
another, that is exactly what happens: checkNewAttributesAfterDef()
warns "attribute declaration must precede definition" and erases the
attribute, so the annotation is silently lost.
The warning exists to tell users that an attribute they wrote has no
effect. Attributes from API notes are not written in the source, so the
warning has nowhere to point and there is nothing for the user to
correct. Skip attributes with an invalid location, alongside the
existing exceptions.
rdar://186930250
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: 1d3366b2f4b641cdff078d51d49cfc849dacbf84
https://github.com/llvm/llvm-project/commit/1d3366b2f4b641cdff078d51d49cfc849dacbf84
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M openmp/runtime/test/transform/split/fill_first.c
M openmp/runtime/test/transform/split/foreach.cpp
M openmp/runtime/test/transform/split/intfor.c
M openmp/runtime/test/transform/split/intfor_negstart.c
M openmp/runtime/test/transform/split/iterfor.cpp
M openmp/runtime/test/transform/split/leq_bound.c
R openmp/runtime/test/transform/split/lit.local.cfg
M openmp/runtime/test/transform/split/negative_incr.c
M openmp/runtime/test/transform/split/nonconstant_incr.c
M openmp/runtime/test/transform/split/parallel-split-intfor.c
M openmp/runtime/test/transform/split/single_fill.c
M openmp/runtime/test/transform/split/three_segments.c
M openmp/runtime/test/transform/split/trip_one.c
M openmp/runtime/test/transform/split/unsigned_iv.c
M openmp/runtime/test/transform/split/zero_first_segment.c
Log Message:
-----------
[OpenMP][NFC] Explicit run-checks for OpenMP 6.0 loop-splitting (#221651)
Move OpenMP 6.0 test flag to RUN lines for loop splitting
Commit: da252a8b6fb505e2395bbb01c2e62037dae95eb3
https://github.com/llvm/llvm-project/commit/da252a8b6fb505e2395bbb01c2e62037dae95eb3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Allow pointer type mismatch in SubPtr op (#222940)
The result of the attached test case is 1, which then gets divided by 8
and the end result is 0. This should evaluate.
Commit: 90466334d0eaabb7debd36cd26cd17c7d2850567
https://github.com/llvm/llvm-project/commit/90466334d0eaabb7debd36cd26cd17c7d2850567
Author: David Green <david.green at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
Log Message:
-----------
[AArch64][GlobalISel] Copy flags in reduction fewerElements (#221608)
Commit: 1952c705fad0187fc0c6fbd1460dbd56d56c8087
https://github.com/llvm/llvm-project/commit/1952c705fad0187fc0c6fbd1460dbd56d56c8087
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/sys-mman-macros.h
M libc/include/sys/mman.yaml
Log Message:
-----------
[libc] Add MAP_ANON as a synonym for MAP_ANONYMOUS. (#222789)
`MAP_ANON` is specified in POSIX, but may not be present in Linux kernel
headers,
which we rely on to get the values of other `MAP_` values. Provide this
macro
ourselves to ensure the user code including `<sys/mman.h>` can use it.
Commit: 185ff0c972cbdf0f221fbf1f45b8554810da79eb
https://github.com/llvm/llvm-project/commit/185ff0c972cbdf0f221fbf1f45b8554810da79eb
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/bfloat-int64-cvt-i686.ll
Log Message:
-----------
[X86] Fix i64-to-bf16 conversion crash on 32-bit targets (#222934)
Converting a loaded `i64` to `bfloat` can crash instruction selection on
i686:
```llvm
define bfloat @convert(ptr %p) {
%value = load i64, ptr %p
%result = sitofp i64 %value to bfloat
ret bfloat %result
}
```
With `llc -mtriple=i686-linux-gnu`, this hits:
```text
Do not know how to custom type legalize this operation!
```
The X86 DAG combine folds the load and conversion into an x87 `FILD`
node
before type legalization. It already excludes `f16` and `f128`, but was
missing
`bf16`, leaving the legalizer with an unsupported result type.
Add `bf16` to that exclusion. This lets the existing legalization
promote the
conversion through `f32` and then round to bf16. The change also covers
the
constrained signed conversion, which uses the same combine.
Assisted by: Fable 5.1, Astra 6
Commit: dceef547706bcc82ad8681b03f2871707e4c3384
https://github.com/llvm/llvm-project/commit/dceef547706bcc82ad8681b03f2871707e4c3384
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 176ab01 (#222943)
This fixes 176ab0177fb9acf749b90634cae84936fcfac2c5 (#222594).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=176ab0177fb9acf749b90634cae84936fcfac2c5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 6acc635735efc0a6bec1e38194d22b6e1061f495
https://github.com/llvm/llvm-project/commit/6acc635735efc0a6bec1e38194d22b6e1061f495
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
Log Message:
-----------
[AMDGPU][NFC] Refactor integer to float lowering (#222898)
Factor common code out of LowerUINT_TO_FP and LowerSINT_TO_FP.
Commit: cc5e9d63b4dcb572483479ed2368783faff416ee
https://github.com/llvm/llvm-project/commit/cc5e9d63b4dcb572483479ed2368783faff416ee
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACCLoop.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR][NFC] Fix CIR build after #219195 (#222822)
https://github.com/llvm/llvm-project/pull/219195 marked certain forms of
the create function, and CIR was using those (most
unintentionally/indirectly).
This change updates the CIR code to use non-deprecated forms
Assisted-by: Cursor / claude-opus-5
Commit: 2078cc8bfe5cdabc47a744810efc52bcca977cb7
https://github.com/llvm/llvm-project/commit/2078cc8bfe5cdabc47a744810efc52bcca977cb7
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M offload/test/jit/type_punning.c
M offload/test/offloading/bug64959_compile_only.c
M offload/test/offloading/complex_reduction.cpp
M offload/test/offloading/ctor_dtor_api.cpp
M offload/test/offloading/nested_parallel_reduction.c
Log Message:
-----------
[offload][lit] Fix failing/hanging/XPASSing tests on Intel GPU (#222342)
The buildbot was down for a few days due to changes that broke it and we
saw some required changes come up during that time. With this PR merged
we can reenable the buildbot as everything consistently passes.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 27d26292f819e2215c1421a41ac19d4b59a2adf2
https://github.com/llvm/llvm-project/commit/27d26292f819e2215c1421a41ac19d4b59a2adf2
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
Log Message:
-----------
Fix Bazel build for 176ab01 (#222963)
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=176ab0177fb9acf749b90634cae84936fcfac2c5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: c83c8de32a9790f313f1017db2c6d5902341b411
https://github.com/llvm/llvm-project/commit/c83c8de32a9790f313f1017db2c6d5902341b411
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb][Windows] Make RM_RF actually delete files (#222950)
On Windows `RM_RF` was `rd /s /q`, which only removes directories — so
any `$(call RM_RF,...)` naming files silently did nothing, and `|| (exit
0)` hid it. POSIX gets `rm -rf`, which removes both.
`clean::` recipes pass file globs and usually run before the build
(`all: clean ...`), so stale artifacts survived into the next run. Hits
upstream `functionalities/disassembler-variables` too.
Fix adds `del /f /q`, joined with `&` not `&&` so `rd` still runs when
the glob matched no files.
This is a follow up to 7d42028e806ab2b17af22ddb8417432e4781d4aa
Commit: 7591f9a5d59eb11293d503fcf01345b10d40eaa7
https://github.com/llvm/llvm-project/commit/7591f9a5d59eb11293d503fcf01345b10d40eaa7
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[NFC][LICM] Hoist `isPotentiallyPromotable` to reusable function (#222684)
Commit: 5d4d6b1692fa21af823c1a8ed00b9dfe4a306964
https://github.com/llvm/llvm-project/commit/5d4d6b1692fa21af823c1a8ed00b9dfe4a306964
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
Log Message:
-----------
[NFC][LICM] Pre-commit tests for loop-invariant store AA (#222685)
Commit: 68f9d9c076d18a2def73035bee18fe9ed6b3d222
https://github.com/llvm/llvm-project/commit/68f9d9c076d18a2def73035bee18fe9ed6b3d222
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
Log Message:
-----------
[LICM] Do not strip invariant AA tags (#222686)
This patch refines #218031 by keeping AA tags of promotable stores when
they are valid for aliasing checks, as determined by ensuring that all
exiting blocks are dominated by a store to the same location, with the
same AA tags.
Commit: a0ad24fcdca9722bdd6bb5770eb5986d15e2e9c1
https://github.com/llvm/llvm-project/commit/a0ad24fcdca9722bdd6bb5770eb5986d15e2e9c1
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-access-chain.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dead-alloca.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-unsupported.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-xderef.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-int-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-line-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-module-scope-variable.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-null-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-poison-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-skip-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-bit-piece.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-cache.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-operation-cache.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-operations.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-expression-out-of-range.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-constant-value.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-init-expr.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugDeclare, DebugExpression and DebugOperation (#222011)
Add support for
[DebugDeclare](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugDeclare),
[DebugExpression](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugExpression)
and
[DebugOperation](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugOperation).
Changes:
- Emit DebugDeclare from an indirect DBG_VALUE whose location register
is defined by OpVariable, which is what the spec requires of the
Variable operand. LLVM IR `#dbg_declare` does not survive as its own
opcode in MIR, `IRTranslator` [lowers
it](https://github.com/llvm/llvm-project/blob/06d0711313b763b65c7e4a9e8613893d7760b6f6/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp#L4592-L4596)
to an indirect DBG_VALUE.
- DebugDeclare has a `Indexes` operand that didn't find necessary to
implement. The SPIRV-LLVM Translator has no support for it either in
both modes (ir <-> spv).
- The following cases are unhandled to avoid emitting invalid code (see
below comment about spirv-val):
- an access chain into a field
([debug-declare-access-chain.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-access-chain.ll))
- an OpFunctionParameter for a byval argument
([debug-declare-function-parameter.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll))
- a constant address
([debug-declare-int-storage.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-int-storage.ll))
- a register left without a def after dead storage was erased
([debug-declare-dead-alloca.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dead-alloca.ll))
- a variadic #dbg_value
([debug-declare-dbg-value-variadic.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll))
- an expression using an unmapped operation
([debug-declare-expression-unsupported.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-unsupported.ll))
- a variable whose DebugLocalVariable was not emitted
([debug-declare-skip-type.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-skip-type.ll))
- Collect expressions from MIR, so DebugExpression and DebugOperation
are emitted at module scope and shared by every declare using the same
DIExpression.
- Map the nine operations the instruction set defines, and reject an
expression whole when an argument does not fit in 32 bits (as per spec).
- Cache DebugLocalVariable result ids, which emitDebugLocalVariable
already returned but nothing stored.
- Add tests for each emitted and skipped case, for the interaction with
DebugLine and DebugScope, and for the expression operations.
spirv-val and the spec disagree in two places, in opposite directions:
- DebugDeclare's Variable operand: spirv-val accepts an
OpFunctionParameter, while the spec names only OpVariable. This patch
follows the spec, so the byval case is skipped even though spirv-val
would take it, see
[debug-declare-function-parameter.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll).
- DebugGlobalVariable's Variable operand: spirv-val rejects a
DebugExpression there although the spec permits one,
KhronosGroup/SPIRV-Tools#6469, see
[debug-global-variable-constant-value.ll](https://github.com/llvm/llvm-project/blob/users/mgcarrasco/nsdi-debug-declare-new/llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-constant-value.ll).
Commit: a969579a9129891bccb63fcc69e76d74b299f322
https://github.com/llvm/llvm-project/commit/a969579a9129891bccb63fcc69e76d74b299f322
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/kdivi.cpp
A libc/src/stdfix/kdivi.h
A libc/src/stdfix/lkdivi.cpp
A libc/src/stdfix/lkdivi.h
A libc/src/stdfix/lrdivi.cpp
A libc/src/stdfix/lrdivi.h
M libc/src/stdfix/rdivi.cpp
M libc/src/stdfix/rdivi.h
A libc/src/stdfix/ukdivi.cpp
A libc/src/stdfix/ukdivi.h
A libc/src/stdfix/ulkdivi.cpp
A libc/src/stdfix/ulkdivi.h
A libc/src/stdfix/ulrdivi.cpp
A libc/src/stdfix/ulrdivi.h
A libc/src/stdfix/urdivi.cpp
A libc/src/stdfix/urdivi.h
M libc/test/src/stdfix/CMakeLists.txt
R libc/test/src/stdfix/DivITest.h
A libc/test/src/stdfix/FxDiviTest.h
A libc/test/src/stdfix/kdivi_test.cpp
A libc/test/src/stdfix/lkdivi_test.cpp
A libc/test/src/stdfix/lrdivi_test.cpp
M libc/test/src/stdfix/rdivi_test.cpp
A libc/test/src/stdfix/ukdivi_test.cpp
A libc/test/src/stdfix/ulkdivi_test.cpp
A libc/test/src/stdfix/ulrdivi_test.cpp
A libc/test/src/stdfix/urdivi_test.cpp
Log Message:
-----------
[libc][stdfix] Implement fixed point fxdivi functions in llvm-libc (#210020)
This PR implements the following 8 functions along with unit tests.
```cpp
fract rdivi(int, int);
long fract lrdivi(long int, long int);
accum kdivi(int, int);
long accum lkdivi(long int, long int);
unsigned fract urdivi(unsigned int, unsigned int);
unsigned long fract ulrdivi(unsigned long int, unsigned long int);
unsigned accum ukdivi(unsigned int, unsigned int);
unsigned long accum ulkdivi(unsigned long int, unsigned long int);
```
Fixes #129126.
Commit: e403b76a16bd8dd7bd4e776b119afae9fa56f803
https://github.com/llvm/llvm-project/commit/e403b76a16bd8dd7bd4e776b119afae9fa56f803
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/stackTrace/Makefile
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
A lldb/test/API/tools/lldb-dap/stackTrace/other.c
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_Types.py
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/unittests/DAP/ProtocolRequestsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Report the compile unit of a stack frame (#222512)
Add StackFrame.compileUnitId, an id that names the frame's compile unit
within the module already reported as StackFrame.moduleId. Clients
resolve it through the compileUnits request, which now reports the same
id on each CompileUnit and takes an optional compileUnitIds filter to
ask for individual compile units instead of the module's full list.
CompileUnitsRequestHandler declared its arguments optional but
dereferenced them unconditionally, so a compileUnits request carrying no
arguments crashed the adapter. Drop the optional and let the request
framework reject the request instead.
Commit: 67d857636c0e9e847f5c777f026908fbf52d9a04
https://github.com/llvm/llvm-project/commit/67d857636c0e9e847f5c777f026908fbf52d9a04
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Init BE vars to CouldNotCompute in howManyLT (NFC) (#222892)
This avoids the risk of initializing ExitLimit with nullptr BE
variables, and cast-asserts on nullptr. This makes the null-BE check
unnecessary, and it can be handled by the common code that follows.
Commit: 06a2917904110ac4cd5ecaab59355ee8bbf54501
https://github.com/llvm/llvm-project/commit/06a2917904110ac4cd5ecaab59355ee8bbf54501
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getscope.cpp
A libc/src/pthread/pthread_attr_getscope.h
A libc/src/pthread/pthread_attr_setscope.cpp
A libc/src/pthread/pthread_attr_setscope.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etscope (#222956)
This patch implements pthread_attr_getscope and pthread_attr_setscope.
Same as other libraries, we only support the system contention scope
(PTHREAD_SCOPE_SYSTEM). Process contention scope (PTHREAD_SCOPE_PROCESS)
is not supported, and would basically require a userspace N:M threading
implementation. Since this value cannot be checked in the kernel, I
reject it directly during the attribute set operation, and don't even
bother storing it in the attribute object.
Assisted-by: Gemini
Commit: d031c595935b6a697e94b55fddbf59261733eb16
https://github.com/llvm/llvm-project/commit/d031c595935b6a697e94b55fddbf59261733eb16
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb][debugserver][NFC] Share the expedited-memory type and emitters (#222911)
Expedited memory had two representations:
- The frame pointer backchain used `StackMemory`, a fixed
`uint8_t[2 * sizeof(nub_addr_t)]` plus a length, held in a `std::map`
keyed
by frame address.
- Frame 0's window used `ExpeditedMemory`, which owns a
`std::vector<uint8_t>`.
Three call sites then open-coded the same emit loop, twice into a JSON
array
and once into a stop reply.
Keep `ExpeditedMemory` for both and emit through
`AppendExpeditedMemoryToJSON`
and `AppendExpeditedMemoryToStopReply`. `ReadFrameZeroStackMemory`'s
local
`read_range` lambda becomes `AppendExpeditedMemory`. `ReadStackMemory`
keeps
its own read, because it needs the bytes to continue the walk.
`ReadStackMemory` gains an explicit `visited` set. It previously relied
on its
`std::map` to stop a corrupt frame pointer chain that loops back on
itself, by
testing whether the key was already present. A `std::vector` has no such
test,
so the guard becomes explicit. This keeps the existing behavior rather
than
changing it.
Chunk count and chunk sizes are unchanged. Backchain chunks now go out
in
frame-walk order rather than ascending frame address; the bytes for a
given
address are the same either way, so the cache the client builds is
unchanged.
This prepares for expediting the another memory read range, which have
arbitrary address and length. `StackMemory`'s fixed buffer cannot hold a
range
of a few hundred bytes, and appending and emitting one costs three lines
with
these functions in place rather than a fourth copy of the emit loop.
Assited-by: claude
Commit: cc511140cf7437110de89e779e8328ad565aa2f1
https://github.com/llvm/llvm-project/commit/cc511140cf7437110de89e779e8328ad565aa2f1
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/QualTypeMapper.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-atomic.c
A clang/test/CodeGen/X86/x86_64-atomic-abi.c
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/lib/ABI/TargetInfo.cpp
M llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/unittests/ABI/X86TargetInfoTest.cpp
Log Message:
-----------
[LLVMABI] Handle Atomic types in the LLVM ABI library (#221367)
The LLVM ABI library's type system had no way to represent atomic types,
so Clang's QualTypeMapper was just mapping them directly to the
underlying value type. This resulted in mis-classification of some
function signatures involving atomic types.
This change adds AtomicType to the ABI type system and QualTypeMapper.
The actual classification didn't require any updates. Simply having the
atomic type as a distinct type was sufficient for it to produce the
expected results.
Assisted-by: Cursor / various models
Commit: 9ae81d242e2e77c8b7dc50cbd4769e9edf84b59b
https://github.com/llvm/llvm-project/commit/9ae81d242e2e77c8b7dc50cbd4769e9edf84b59b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
Log Message:
-----------
ARM: Constify Thumb2SizeReduction (#222973)
Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 3b5f12df5d6b0eba63be43bdfdb34af5fde20c6e
https://github.com/llvm/llvm-project/commit/3b5f12df5d6b0eba63be43bdfdb34af5fde20c6e
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Update full state of scheduler when IR changes (#222180)
Up until now the scheduler state has not been maintained fully upon IR
changes.
This is not really needed for correct operation of the current
vectorizer because scheduling happens before emitting the vectorized IR,
so there is no real need for updating the scheduler with the current
implementation. Nevertheless, the implementation may change so the right
thing to do is to make sure the scheduler's state is always correct.
So this patch implements the missing callbacks for erase, move and set
use and updates the scheduler state accordingly.
Commit: 4e72f2cb637eaf16e1b6f506c36f036f2f865c9c
https://github.com/llvm/llvm-project/commit/4e72f2cb637eaf16e1b6f506c36f036f2f865c9c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/unittests/CodeGen/SelectionDAGTestBase.h
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
M llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
M llvm/unittests/Target/X86/X86SelectionDAGTest.cpp
Log Message:
-----------
[SelectionDAG] Remove dead accessors, variables, and init parameters (NFC) (#222864)
This patch removes several dead accessors in SelectionDAG. It also
adjusts init() and its callers to remove transitively dead variables
and parameters.
SDAGISelPass / getPass:
The last use of SelectionDAG::getPass was removed on February 23, 2026
in commit 9e6a6be8a84f32072e40b27e146fa9076560274e.
RuntimeLibcallInfo / getRuntimeLibcallInfo:
Introduced on January 16, 2026 in commit
01e6245af481dac4604e8a25be6bec0dbe36f99d without any callers, and never
initialized or assigned anywhere.
ORE / getORE:
Introduced on March 30, 2017 in commit
6dd6082472d11b1e1af21e4e4e0789e49de56537 without any callers
for getORE in or out of tree.
MMI / getMMI:
The last use of SelectionDAG::getMMI was removed on July 26, 2024 in
commit 6f83a031e452bb33c0ee23b8c5c4dee97ce2bf52.
Assisted-by: Antigravity
Commit: 1b8f1a297004d99e7f9ad7188b8529153c693b3b
https://github.com/llvm/llvm-project/commit/1b8f1a297004d99e7f9ad7188b8529153c693b3b
Author: Andre Sun <andsun9999 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/index/YAMLSerialization.cpp
M clang-tools-extra/clangd/unittests/SerializationTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
Log Message:
-----------
[clangd] Add missing SymbolKind cases to YAML serialization (#222070)
The YAML index writer maps index::SymbolKind to strings through a list
of enumCase calls that was not updated when Concept, IncludeDirective,
and the template parameter kinds were added to the enum. Writing a
symbol with one of these kinds matches no case, so nothing is emitted
for the value and the next key lands on the same line, producing Kind:
Lang: C. With assertions enabled, the writer aborts rather than emitting
malformed YAML. This affects clangd-indexer --format=yaml when indexing
C++20 concepts.
Add the missing cases so the list mirrors the enum, drop the duplicate
Function entry, and add a test that round-trips every current SymbolKind
through YAML. The binary index format stores the kind as a raw byte and
is unaffected.
Fixes #206875
Commit: 445028c28190b9c883c08cb2ef69e002b65e5af9
https://github.com/llvm/llvm-project/commit/445028c28190b9c883c08cb2ef69e002b65e5af9
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Refactor instantiation of declarations within concepts (#221707)
After implementation of CWG2369, declarations are instantiated on demand
when evaluating a concept.
This was hinged on TemplateInstantiator, where we intercepted most calls
that need an instantiated declaration. This is almost identity to
SetupConstraintScope, which tries to re-instantiate any declarations to
the current scope. This patch removes SetupConstraintScope because we
can instantiate anything on demand.
The concept normalization patch brings us more troubles when we have to
deal with sugars: declarations instantiated outside of the scope (e.g. a
typedef declaration) are never added/instantiated during instantiation
of concepts: this patch makes that function also look up outer scopes
for those declarations. Note that we couldn't simply make the scope of
concepts 'transparent', since we don't want clashes of instantiated
function parameters.
Also also this added a call to instantiateMissingDeclsToScopeForConcepts
for C++26 fold expressions, before checking any pack sizes.
Fixes https://github.com/llvm/llvm-project/issues/198052
Fixes https://github.com/llvm/llvm-project/issues/209632
Commit: 2bb1a24978caa46b5d6105f4527be85a10449940
https://github.com/llvm/llvm-project/commit/2bb1a24978caa46b5d6105f4527be85a10449940
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
Rename my office hours; NFC (#222982)
Other Clang maintainers routinely come to my office hours to help field
questions, so instead of claiming these are my office hours, I'm turning
them into a more general "Clang Maintainers" office hours. I will
continue to chair them as usual, but this is a more accurate way of
describing the office hours and will hopefully encourage other Clang
maintainers to attend periodically if they have time and interest in
doing so.
Commit: 325f2558aea72388cfa3762a8efa184eba7dd3da
https://github.com/llvm/llvm-project/commit/325f2558aea72388cfa3762a8efa184eba7dd3da
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
A flang/test/Fir/OpenACC/support-analysis-varname.mlir
M flang/test/lib/OpenACC/CMakeLists.txt
A flang/test/lib/OpenACC/TestOpenACCSupport.cpp
M flang/tools/fir-opt/fir-opt.cpp
M mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
M mlir/lib/Dialect/OpenACC/Analysis/OpenACCSupport.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
M mlir/test/Dialect/OpenACC/support-analysis-varname.mlir
Log Message:
-----------
[flang][acc] Let getVariableName choose mangled or source names (#222815)
OpenACCSupport can now ask for the name the source spells or the name
the variable is emitted under. Recover names from acc.map_info and
globals, and teach Flang to demangle FIR symbols while still walking the
referenced variable for a mangled data-clause name.
Commit: 177eb76979760d4c3920dc7fa7b2976db545040b
https://github.com/llvm/llvm-project/commit/177eb76979760d4c3920dc7fa7b2976db545040b
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
Log Message:
-----------
[NFC][Attributor] Drop the comment on the indirect-call address space cast (#222139)
Follow-up to #222097, which merged before this was addressed.
@efriedma-quic pointed out that the comment described the change rather
than the
code, and that address space zero is not relevant to the fixed code.
Removing
it; `getProgramAddressSpace()` and the cast say what is happening.
Commit: 565107727b351606963adc3f7732eaae37a0bbdb
https://github.com/llvm/llvm-project/commit/565107727b351606963adc3f7732eaae37a0bbdb
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
Log Message:
-----------
[CIR][NFC] Fix VectorElementType constraints (#222736)
Remove `CIR_AnyPtrType` from the supported types in VectorElementType
constraints
Commit: 9c809473e1a2c39b3b78e8c155e85d58f302bd79
https://github.com/llvm/llvm-project/commit/9c809473e1a2c39b3b78e8c155e85d58f302bd79
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/symstore/TestSymStore.py
Log Message:
-----------
[lldb] Add test variants to build directory name (#222792)
Fix testing with shared build directories to no longer share build
directories between build variants.
For example, use a different build directory for dwarf and dsym
variants, to prevent one variant's build artifacts from being used by
the other.
Assisted-by: claude
Commit: 10c6f34d268cc7af5a160465604dcd40a68d71e1
https://github.com/llvm/llvm-project/commit/10c6f34d268cc7af5a160465604dcd40a68d71e1
Author: Kristina Bessonova <kbessonova at accesssoftek.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
M llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
M llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
Log Message:
-----------
Revert "[AArch64][GlobalISel] Add support for TLS for ELF" (#222989)
Reverts llvm/llvm-project#220236
It seems to break scudo tests.
Commit: 0f47e798205bbaa84d12073c56d5d8c07ea65f59
https://github.com/llvm/llvm-project/commit/0f47e798205bbaa84d12073c56d5d8c07ea65f59
Author: Iasonas Karaprodromidis <iaskarapro at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.cpp
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.h
Log Message:
-----------
[lldb][Fortran] Added DWARFASTParser for Fortran (#218024)
This PR adds the DWARFASTParserFortran class returning nullptr. This is
intended to add the necessary classes for subsequent PRs to add
features.
Changes:
- Adds DWARFASTParserFortran class.
Part of the Add Fortran support to LLDB GSoC 2026 project.
Relates to #109119.
Commit: 4214b4601f498387214d5aa4ca4898fd88c28da6
https://github.com/llvm/llvm-project/commit/4214b4601f498387214d5aa4ca4898fd88c28da6
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/DirectX/SemanticSignatures.md
A llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/lib/Frontend/HLSL/CMakeLists.txt
A llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticSignaturePackingTest.cpp
Log Message:
-----------
[HLSLSemanticSignatures] Implement the stacked packing of elements (#218060)
This change defines a testing harness for the packing algorithms of
semantic signatures.
Then implements the stacked packing algorithm.
Resolves: https://github.com/llvm/llvm-project/issues/205875
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 6c68a1661af7dce1f121fd20dfce72f4ddc4afc9
https://github.com/llvm/llvm-project/commit/6c68a1661af7dce1f121fd20dfce72f4ddc4afc9
Author: Adam Scott <adamscott200322 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/X86/div-rem-i64.ll
A llvm/test/Analysis/CostModel/X86/div-rem-strictfp.ll
M llvm/test/Analysis/CostModel/X86/div.ll
A llvm/test/Analysis/CostModel/X86/masked-divrem.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/size-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-nodes-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-split-non-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[CostModel][X86] Add variable divisor div/rem costs for scalar and <=i32 vectors (#215124)
Div and rem by a variable divisor have no X86 cost entry at all, so they
fall through to the BasicTTI default and cost 1. A 20 to 40 cycle
unpipelined instruction ends up priced the same as an add.
That mattered less while vector integer division always scalarized,
since the price was wrong but the decision was usually right anyway.
After #205263 the <=i32 shapes lower through a float divide, so the
vector cost model is now describing a sequence that really exists and it
still prices it as scalarization.
This adds scalar entries plus five feature gated vector tables.
Numbers are the maximum llvm-mca Block RThroughput across the CPUs that
fold the shape with the low power lines excluded (atom and jaguar).
Vector entries take the max within the tier a CPU's feature level
selects, since the lookup takes the first matching table. Scalar takes
it across all of them.
rem is priced the same as div because a variable rem is the same
instruction and the hardware hands back the remainder in rdx or AH. For
vector the fold pays a multiply and subtract to recover it but the
divide dominates the throughput so the number doesnt change.
div-rem-strictfp.ll is new and pins the strictfp gate. Two SLP tests run
on forced negative thresholds and needed those raised so both produce
output identical to before at the new value.
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: a930601b854d881876a1b953f05f8632ade87304
https://github.com/llvm/llvm-project/commit/a930601b854d881876a1b953f05f8632ade87304
Author: Gauarv Chaudhary <137998824+ANAMASGARD at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
A llvm/test/CodeGen/WebAssembly/simd-relaxed-fptoint.ll
Log Message:
-----------
[WebAssembly] Select relaxed_trunc for vector fptosi/fptoui with +relaxed-simd (#214148)
Fixes #211273
When `+relaxed-simd` is enabled, plain vector `fptosi`/`fptoui` from `<4
x float>` to `<4 x i32>` is still lowered to
`i32x4.trunc_sat_f32x4_{s,u}`. The relaxed SIMD instructions already
exist in the backend, but they were only wired to the
WebAssembly-specific `llvm.wasm.relaxed.trunc.*` intrinsics—not to
generic `fptosi`/`fptoui` IR.
This matters for frontends like LDC that emit ordinary `fptosi` for SIMD
casts (e.g. `_mm_cvttps_epi32`-style code). With
`+simd128,+relaxed-simd`, we should prefer
`i32x4.relaxed_trunc_f32x4_{s,u}`, which typically lowers more
efficiently
on native SIMD hardware.
The fix adds two TableGen selection patterns in
`WebAssemblyInstrSIMD.td`, gated on `HasRelaxedSIMD` with
`AddedComplexity = 1`, so they win over the existing
`fp_to_sint`/`fp_to_uint` → `trunc_sat` patterns when relaxed SIMD is
available.
This does not require fast-math: for representable inputs, relaxed
truncation matches LLVM semantics; for NaN/out-of-range inputs,
`fptosi`/`fptoui` already produce poison, so the backend is not required
to preserve `trunc_sat`'s
saturating behavior.
Explicit saturating conversions (`llvm.fptosi.sat` / `fp_to_sint_sat`)
and `+simd128`-only targets are unchanged.
## Test plan
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-relaxed-fptoint.ll`
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-conversions.ll`
- [x] `llvm-lit llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll`
Signed-off-by: Gaurav Chaudhary <chaudharygaurav2004 at gmail.com>
Commit: 0a8a6c4d77ec8b103d2718f936724179246b9540
https://github.com/llvm/llvm-project/commit/0a8a6c4d77ec8b103d2718f936724179246b9540
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/lib/OpenACC/CMakeLists.txt
Log Message:
-----------
[flang][acc] Add missing dependencies for TestOpenACCSupport (#222996)
Adds missing dependencies to avoid:
undefined reference to `mlir::acc::getOrCreateGPUModule` undefined
reference to `mlir::acc::OpenACCSupport::getVariableName` after
https://github.com/llvm/llvm-project/pull/222815
Commit: 8a36fb2bfef788e6448af7791edd68fd3c0afc56
https://github.com/llvm/llvm-project/commit/8a36fb2bfef788e6448af7791edd68fd3c0afc56
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
Log Message:
-----------
[Bazel] Fixes 0f47e79 (#222999)
This fixes 0f47e798205bbaa84d12073c56d5d8c07ea65f59 (#218024).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=0f47e798205bbaa84d12073c56d5d8c07ea65f59
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5e77e2f8bc888b40753e5add3fa1bcf6e50d9b60
https://github.com/llvm/llvm-project/commit/5e77e2f8bc888b40753e5add3fa1bcf6e50d9b60
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-logical.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmuladd-absorbed-copyable-sched-deps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/lcssa-phi-extract-scale.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/extractelement-insertpoint.ll
Log Message:
-----------
[SLP]Treat 2-element FP reductions as always associative
A reduction of exactly 2 elements is a single operation, so no
reassociation is possible and the associativity check is not needed.
Emit vector.reduce.fadd/fmul with the reassoc flag for such
reductions even when the scalar operation lacks it, instead of
2 extracts + scalar operation.
Reviewers: bababuck, MrSidims
Pull Request: https://github.com/llvm/llvm-project/pull/222715
Commit: 374a8320bf21962b6749965b97294e4815641cb6
https://github.com/llvm/llvm-project/commit/374a8320bf21962b6749965b97294e4815641cb6
Author: Leo Camus <leo.camus23 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/utils/cmake_format.py
M libc/utils/cmake_format_test.py
Log Message:
-----------
[libc] Write LF line endings from cmake_format.py on every platform (#222742)
I ran the libc CMake formatter on Windows and it gave back a file whose
every line had changed:
```
$ printf 'add_library(foo STATIC\n a.c\n)\n' > CMakeLists.txt
$ python libc/utils/cmake_format.py -i CMakeLists.txt
Formatted CMakeLists.txt
$ python -c "print(open('CMakeLists.txt','rb').read())"
b'add_library(foo STATIC\r\n a.c\r\n)\r\n'
```
`format_cmake_content()` joins its lines with `"\n"`, but
`process_file()` hands that string to `open(temp_file, "w",
encoding="utf-8")`, and a text-mode write substitutes the platform line
separator. So on Windows, reformatting one command in a file rewrites
the endings of the whole file. `.gitattributes` declares no `text`/`eol`
rules and `llvm/docs/GettingStarted.md` tells people to clone with
`core.autocrlf=false`, so nothing normalizes those endings back before
the commit.
The read side already normalizes: `open(..., "r")` gives universal
newlines, so a CRLF file is LF by the time the formatter sees it.
Passing `newline="\n"` on the write makes both ends agree and gives the
same bytes on every platform.
The same substitution applies to stdout, which affects the piped output
and the `--diff` text (a CRLF diff does not apply against an LF file),
so I configured stdout the same way in `main()`.
One behaviour change worth flagging: on Windows, a CMake file that
currently has CRLF endings and needs reformatting now comes out with LF
rather than CRLF. Files that are already formatted are not written at
all, before or after, since the comparison is made on the LF-normalized
read.
For the tests, everything in `cmake_format_test.py` today asserts on the
string returned by `format_cmake_content()`, so nothing covers what
lands on disk. I added two cases that compare the bytes on disk and on
stdout against that string. They fail on Windows before this change (the
assertion prints `b'...\r\n...' != b'...\n...'`) and pass after; on
Linux and macOS they pass either way, since the separator is already LF.
The file went from 47 to 49 tests, all passing under `python -m unittest
cmake_format_test`.
I did not have `black` available on that machine, so the added code
follows the surrounding style by hand rather than by running the
formatter.
AI tools used
Commit: ba1687b72476eb368641b9a9f565a38cf41b7393
https://github.com/llvm/llvm-project/commit/ba1687b72476eb368641b9a9f565a38cf41b7393
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBFile.h
M lldb/source/API/SBFile.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
Log Message:
-----------
[lldb][Windows] Remove use of unstable ABI and fix SB API visibility (#222665)
Addresses the post-commit review comments from the original PR
(https://github.com/llvm/llvm-project/pull/217126#pullrequestreview-5162589053).
- `SBFile::OpenFdFromHandle` is now visible on all platforms (just
`#ifndef SWIG`) and returns -1 by default.
- Removed non-stable `PyLong_Check` in favor of `PyErr_Occurred` and
`PyErr_Clear`.
Commit: 93b2629d1d1f52e90549e6e12901c3f51ceba273
https://github.com/llvm/llvm-project/commit/93b2629d1d1f52e90549e6e12901c3f51ceba273
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/AST/ast-dump-expr-json.c
M clang/test/C/C11/n1285_1.c
M clang/test/CodeGen/attr-counted-by-with-sanitizers.c
M clang/test/CodeGen/attr-counted-by-without-sanitizers.c
A clang/test/CodeGen/compound-literal-lifetime.c
M clang/test/CodeGenObjC/arc-ternary-op.m
M clang/test/Sema/scope-check.c
Log Message:
-----------
[clang][CodeGen] Emit lifetime markers for block-scoped compound literals in C (#219045)
In C (C99/C11/C23 §6.2.4.5), block-scoped compound literals have
automatic storage duration extending to the end of the enclosing block
scope. Previously, Clang emitted alloca storage without lifetime
markers (@llvm.lifetime.start / @llvm.lifetime.end), preventing LLVM's
StackColoring pass from merging stack slots across disjoint scopes and
inflating stack frame size.
Following John McCall's guidance in #68746:
1. In Sema, record block-scoped compound literals in ExprCleanupObjects
so
the enclosing full-expression is wrapped in an ExprWithCleanups.
2. In CodeGen, emit @llvm.lifetime.start before evaluating initializers
and
schedule CallLifetimeEnd as a cleanup.
Checking a build of an x86_64 Linux kernel defconfig build, this shaves
448 bytes off the stack usage for azx_probe(), one of the larger stack
users in the kernel.
Assisted-by: Gemini
Fixes: https://github.com/llvm/llvm-project/issues/68746
Commit: cb029994abbda52adf1986df5c6198c3e1fff4da
https://github.com/llvm/llvm-project/commit/cb029994abbda52adf1986df5c6198c3e1fff4da
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/fma-reassociate-pairs.ll
M llvm/test/Transforms/SLPVectorizer/X86/fma-operand-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassociated-fma-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/revectorized_rdx_crash.ll
Log Message:
-----------
[SLP]Allow min-VF vectorization of seed-level reduction groups
Small reduced-value groups of single-use seed-level reductions may
vectorize at VF=2, if the values are used by the reduction operations
only and no scalar leftovers remain. For fadd this replaces the
ordered reduction fallback; for the other kinds trunk leaves such
groups scalar.
Reviewers: RKSimon, bababuck, MrSidims
Pull Request: https://github.com/llvm/llvm-project/pull/222757
Commit: 4e3bec11527cdbca2e79909f7a5badd12db191a7
https://github.com/llvm/llvm-project/commit/4e3bec11527cdbca2e79909f7a5badd12db191a7
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
Log Message:
-----------
[SPIRV] Refactor implicit binding legalization (#222848)
This change rewrites the `SPIRVLegalizeImplicitBinding` pass so that
binding collection is driven by intrinsic declarations rather than a
full-module instruction walk.
Previously, the pass used an `InstVisitor` to visit every instruction in
the module and find calls to a small set of intrinsics. The new
implementation iterates over the intrinsic declarations and their users,
making the cost proportional to the number of relevant resource calls
rather than the size of the module.
There is no change to the SPIR-V emitted for existing shaders. Implicit
bindings are still assigned the same numbers.
Other improvements include:
- Order IDs are extracted once into a `SmallVector` instead of being
recomputed on each sort comparisons.
- The separate `verifyUniqueOrderIdPerResource` walk is folded into the
binding assignment loop.
- Make helpers that replace implicit binding calls static.
- Added a `HasImplicitBinding` flag for early exit and accurate
`Changed` reporting, so a module with no implicit bindings (or with a
declaration that has no users) now returns `PreservedAnalyses::all()`
instead of unconditionally invalidating analyses.
Assisted by Claude Opus 5.
This is a second attempt to land this - I accidentally merged the first
one into a stack branch:
https://github.com/llvm/llvm-project/pull/221662
Commit: 8ad4ac7d28c618d8a35229c480fc8ea912dea1ec
https://github.com/llvm/llvm-project/commit/8ad4ac7d28c618d8a35229c480fc8ea912dea1ec
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
A utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/startup/linux/startup_rules.bzl
A utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add targets for startup objects on linux (#218995)
This PR adds Bazel targets for `crt{1,i,n}.o` startup objects on Linux
x86-64.
Commit: 800e7f8f308196b27cec5880789a1519e0bee70a
https://github.com/llvm/llvm-project/commit/800e7f8f308196b27cec5880789a1519e0bee70a
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
Log Message:
-----------
[clangd] Offer Extract to Function for single expression-statements (#219945)
The tweak refused to trigger whenever the extraction zone contained a
single statement that was an expression, e.g. a lone call like
`log("connection failed");` or an overloaded-operator statement like
`std::cout << "x";`. The former was blocked by an overly broad check in
validSingleChild(); the latter additionally required
getParentOfRootStmts() to recognize that such a statement can be its own
root statement even while marked Unselected, rather than being treated
as a container of root statements.
Fixes clangd/clangd#698
Fixes clangd/clangd#1254
Assisted-by: Claude
Commit: 83d02acbcde4c84e448a4b1d52878b7bcf8ecf6f
https://github.com/llvm/llvm-project/commit/83d02acbcde4c84e448a4b1d52878b7bcf8ecf6f
Author: Dennis Duda <git at seri.tools>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/RISCV/fadd-fmul-dagcombine.ll
Log Message:
-----------
[DAGCombine] Do not gate a pre-legalization FADD fold on FMUL legality (#218748)
Now follows the same check as `fold (fadd A, (fneg B)) -> (fsub A, B)`
and `fold (fadd (fneg A), B) -> (fsub B, A)` a few lines above
Co-authored-by: Claude (Claude-Opus-5) <noreply at anthropic.com>
Commit: 18db3eee9d04da389180f907bfb1bf84bb589abd
https://github.com/llvm/llvm-project/commit/18db3eee9d04da389180f907bfb1bf84bb589abd
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/src/__support/printf_core/CMakeLists.txt
M libc/src/__support/printf_core/core_structs.h
M libc/src/__support/printf_core/parser.h
M libc/src/__support/printf_core/printf_main.h
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/UnitTest/StringUtils.h
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/parser_test.cpp
Log Message:
-----------
[libc] Template printf_core::Parser to support wchar_t. (#222988)
This is the next step in the ongoing refactor to support wide character
printf functions.
`printf_core::FormatSection` is also templated on character type as it
is required for parser_test. `FormatSection` is named in many more
places. In order to keep this PR on the smaller side, it also gets a
rename + `char` alias in the pattern of `basic_string_view` /
`string_view`.
Assisted-by: Automated tooling, human reviewed.
Commit: 241e034bcc466e368d5f61fe1836598390c58e69
https://github.com/llvm/llvm-project/commit/241e034bcc466e368d5f61fe1836598390c58e69
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/lib/Headers/altivec.h
M clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
A clang/test/SemaCXX/altivec-vec-msum-p9.cpp
Log Message:
-----------
[PowerPC] Add missing vec_msum and vec_vmsumudm builtins for POWER9 (#221199)
This patch exposes `__builtin_altivec_vmsumudm` in `BuiltinsPPC.def` and
adds the missing `vec_msum` and `vec_vmsumudm` intrinsics in
`<altivec.h>` matching GCC 11+ behavior.
Commit: abf41391777c822d4f5010b1f38d5a0f09102ea1
https://github.com/llvm/llvm-project/commit/abf41391777c822d4f5010b1f38d5a0f09102ea1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/AArch64/combine_ignore_debug.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/RISCV/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/RISCV/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Use DL.fitsInLegalInteger instead of TTI.isTypeLegal in consecutive load/store combine. (#220310)
riscv64 doesn't have a legal i32 type in the backend, but we
support i16, and i32 loads/stores. AArch64 also supports i16
loads/stores even though i16 isn't legal.
Replace TTI.isTypeLegal with DL.fitsInLegalInteger and a check for
a power of 2 number of bytes. This covers i16 and i32 for RISC-V
and i16 for AArch64.
We could further relax this to cover types that the backend can handle
by splitting, but I'd like to leave that for a future patch.
I had to update some existing tests to have more accurate datalayouts.
The RISC-V tests are reduced from existing tests from AArch64 or X86 to
show some of the load sizes that can now be matched.
Commit: 40de2ac09e4083b773c7fc4f9c701a864baad6be
https://github.com/llvm/llvm-project/commit/40de2ac09e4083b773c7fc4f9c701a864baad6be
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 18db3ee (#223009)
This fixes 18db3eee9d04da389180f907bfb1bf84bb589abd (#222988).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=18db3eee9d04da389180f907bfb1bf84bb589abd
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 318e5ab66c1496784eb16ed1af193a58c75efd59
https://github.com/llvm/llvm-project/commit/318e5ab66c1496784eb16ed1af193a58c75efd59
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-gfx11.mir
Log Message:
-----------
[AMDGPU] Do not commute DPP instructions with a non-identity dpp_ctrl (#218393)
DPP only swizzles src0, and that does not move with the operands, so
commuting changes which value each lane actually reads
Commit: dc7e9b16f229adbad90bafe1bd5685794ffb4710
https://github.com/llvm/llvm-project/commit/dc7e9b16f229adbad90bafe1bd5685794ffb4710
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/release.h
M compiler-rt/lib/scudo/standalone/tests/release_test.cpp
Log Message:
-----------
[scudo] Refactor BufferPool code slightly. (#222811)
Pass the Buffer object in buffer creation functions. Add an error
message if the dynamic buffer creation fails.
Add a threaded unit test to verify the BufferPool handles concurrent
buffer creation properly.
Also, fix a few typos in the code.
Commit: 57ad7898dc17e228c3ce1d34a53626080131f384
https://github.com/llvm/llvm-project/commit/57ad7898dc17e228c3ce1d34a53626080131f384
Author: Kiva <zengtao at iscas.ac.cn>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-load-common-alignment.ll
Log Message:
-----------
[RISCV][SLP] Use common alignment when checking constant-stride loads (#222520)
Fix SLP's constant-stride load legality check, which can widen naturally
aligned 32-bit loads into misaligned 64-bit RVV accesses and cause
`SIGBUS`.
In `BoUpSLP::canVectorizeLoads`, the check uses the first sorted load's
alignment, which may be stronger than that of later widened groups. Pass
`CommonAlignment` to `analyzeConstantStrideCandidate` instead, matching
the existing cost model and code generation. This is conservative: it
fixes the legality check without deriving a more precise alignment for
each widened group's starting address, so it may reject some otherwise
legal widening.
### Reproducer
The following reproduces the failure on the tested [SpacemiT K1 / Banana
Pi F3](https://docs.banana-pi.org/en/BPI-F3/BananaPi_BPI-F3) running
RV64 Linux, compiled with `-O3 -march=rv64gcv -mabi=lp64d
-mstrict-align`:
```c
struct Row {
unsigned x, y, padding[5];
};
_Static_assert(sizeof(unsigned) == 4, "requires 32-bit unsigned");
_Static_assert(sizeof(struct Row) == 28, "requires a 28-byte row");
__attribute__((noinline))
void gather_fields(const struct Row *p, unsigned *restrict out) {
p = __builtin_assume_aligned(p, 16);
out[0] = p[0].x + 3;
out[1] = p[0].y + 3;
out[2] = p[1].x + 3;
out[3] = p[1].y + 3;
}
int main(void) {
_Alignas(16) struct Row rows[2] = {
{5, 9, {0}}, {11, 17, {0}}};
unsigned out[4];
gather_fields(rows, out);
return out[0] != 8 || out[1] != 12 ||
out[2] != 14 || out[3] != 20;
}
```
The alignment assumption is satisfied, and the four loads at byte
offsets `0`, `4`, `28`, and `32` are naturally aligned and in bounds.
SLP widens the adjacent pairs into:
```llvm
%v = call <2 x i64> @llvm.experimental.vp.strided.load.v2i64.p0.i64(
ptr align 4 %p, i64 28, <2 x i1> splat (i1 true), i32 2)
```
On RV64 this lowers to:
```asm
li a2, 28
vsetivli zero, 2, e64, m1, ta, ma
vlse64.v v8, (a0), a2
```
whose second active lane accesses `base + 28`, which is not eight-byte
aligned. The legality check incorrectly uses alignment 16, although the
emitted intrinsic already carries `align 4`.
On the tested machine, the example raises `SIGBUS` before the fix and
returns zero afterward. The fixed compiler uses 32-bit vector loads and
retains vectorized arithmetic.
Commit: 78ae84025be3bc2e711e803b79b8515075c97a80
https://github.com/llvm/llvm-project/commit/78ae84025be3bc2e711e803b79b8515075c97a80
Author: Ambrose Leeb <aleeb at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Headers/__clang_hip_runtime_wrapper.h
A clang/test/CodeGenCUDA/pure_deleted_virtual.cu
M clang/test/Headers/hip-header.hip
M clang/test/OpenMP/nvptx_target_pure_deleted_codegen.cpp
Log Message:
-----------
[Clang] [CUDA] Provide device-side definitions of `__cxa_[pure|deleted]_virtual()` (#217427)
Currently, we don't provide definitions of these on the device side, and
since there is also no C++ runtime on the device side, if a call to a
pure or deleted virtual function makes it into the final IR, the program
will fail to assemble because `ptxas` can’t find a definition of
`__cxa_pure_virtual()` or `__cxa_deleted_virtual()`.
This patch updates Clang to emit weak definitions of these functions
that trap.
Fixes #49183, fixes #67533.
Commit: f47e8e7f5e028c0e441caa2973e5971817927a05
https://github.com/llvm/llvm-project/commit/f47e8e7f5e028c0e441caa2973e5971817927a05
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/test/CIR/CodeGen/array-ctor.cpp
R clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byref.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-vptr.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
M clang/test/CIR/CodeGen/lambda-dtor-field.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
M clang/test/CIR/CodeGenOpenACC/declare-present.cpp
M clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-byref-forward-param.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-byref-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-empty-class.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-record-packed.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-padded.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-vptr.cir
Log Message:
-----------
[CIR] Emit classic's attributes for a non-byval indirect argument (#222445)
CallConvLowering marked an indirect argument that is not byval with
llvm.byref. Classic gives this argument llvm.nofreeobj, llvm.noundef,
llvm.align, and llvm.dereferenceable instead.
A call site forwarding such a parameter used to identify it by reading
llvm.byref back, so the pass now records the parameter where the
signature rewrite creates it. The "byref" vocabulary is removed, since
it no longer names anything CIR emits.
Assisted-by: Cursor / claude-opus-5
Commit: 2e19a54753db13719d99fa126ef1a9cb2d3cc240
https://github.com/llvm/llvm-project/commit/2e19a54753db13719d99fa126ef1a9cb2d3cc240
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/cxx23.cpp
A clang/test/SemaCXX/vector-shuffle.cpp
Log Message:
-----------
[Clang][Sema] Report diagnostic for invalid mask in shufflevector (#221558)
Clang used to accept a vector with an integer representation as a valid
mask; otherwise, it reported a type mismatch. This led to accepting a
vector of booleans as a valid mask and reporting that types are not
equal if both arguments are equal but not vectors of integers.
Currently, it checks for the mask type and reports a clear error message
if the mask is a vector of bool or not a vector of integers
Fixes: #218132
Commit: 0a5aa293a4e76add0a3abefbf41320b70cb77c1f
https://github.com/llvm/llvm-project/commit/0a5aa293a4e76add0a3abefbf41320b70cb77c1f
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-profdata.md
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
A llvm/test/Transforms/SampleProfile/Inputs/composite-cs-profile.proftext
A llvm/test/Transforms/SampleProfile/composite-cs-profile.ll
M llvm/test/Transforms/SampleProfile/csspgo-inline-icall.ll
A llvm/test/tools/llvm-profdata/Inputs/composite-duplicate-type.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-empty-section.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-head-only.proftext
A llvm/test/tools/llvm-profdata/Inputs/composite-mixed-empty.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-mixed-nonempty.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-payload-oversized.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-payload-undersized.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-prepended-unknown.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-nested.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-oob.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-unknown-top.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-version-103.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-version-104.profdata
A llvm/test/tools/llvm-profdata/Inputs/composite-zero-block.proftext
A llvm/test/tools/llvm-profdata/Inputs/sample-composite-empty-lbr.proftext
A llvm/test/tools/llvm-profdata/composite-compress.test
A llvm/test/tools/llvm-profdata/composite-compressed-info.test
A llvm/test/tools/llvm-profdata/composite-empty-lbr.test
A llvm/test/tools/llvm-profdata/composite-eytzinger-split-nametable-partition.test
A llvm/test/tools/llvm-profdata/composite-head-only.test
A llvm/test/tools/llvm-profdata/composite-mixed-sections.test
A llvm/test/tools/llvm-profdata/composite-multiple-blocks.test
A llvm/test/tools/llvm-profdata/composite-payload-boundaries.test
A llvm/test/tools/llvm-profdata/composite-unknown-resume-nested.test
A llvm/test/tools/llvm-profdata/composite-version-reader.test
A llvm/test/tools/llvm-profdata/composite-vtable.test
A llvm/test/tools/llvm-profdata/composite-zero-block.test
M llvm/test/tools/llvm-profdata/sample-flatten-profile.test
M llvm/test/tools/llvm-profdata/sample-split-layout.test
A llvm/test/tools/llvm-profdata/show-composite-profile-info.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
Introduction of Composite Profile section in ExtBinary format (#166553)
New sections are introduced for storing profile of vairous types:
* SecCompositeProfile (like SecLBRProfile but can conain multi-type
profile)
* SecCompositeFuncOffsetTable (like SecFuncOffsetTable but offsets point
to SecCompositeProfile)
The only change in the structure of ExtBinary is a substitution of
SecLBRProfile and SecFuncOffsetTable sections by new (composite) ones,
so, to void duplication of layout description and handling, all changes
are done on low-level: section types are modified in the existing layout
right before profile writing.
No new profile types are introduced - this change is rather a
preparation for future profiling extentions: only LBR profile can be
inside currently.
Processing of VTable profile is unmodified.
Extended description is here:
https://discourse.llvm.org/t/rfc-typifiedprofilesection-generalized-per-function-profile-blocks-in-extbinary-format/87881
Testing of the new scenario is added to
llvm/test/tools/llvm-profdata/sample-flatten-profile.test and also new
tests are introduced.
Assisted by GPT-5.
Commit: 5afbbd04803cc2e30d6026c98b245a1599d09ac9
https://github.com/llvm/llvm-project/commit/5afbbd04803cc2e30d6026c98b245a1599d09ac9
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
A libc/src/__support/CPP/vector.h
M libc/test/src/__support/CPP/CMakeLists.txt
A libc/test/src/__support/CPP/vector_test.cpp
Log Message:
-----------
[libc][CPP] Add vector container and unit tests (#222972)
Sequential group database entrypoints require dynamically resizable
buffers to parse arbitrary-length records and member lists reliably.
Rather than managing raw heap reallocations manually within subsystem
parsers, dynamic growth is encapsulated in a dedicated cpp::vector
container.
Add cpp::vector in libc/src/__support/CPP/vector.h with move semantics,
safe fallible allocation (returning bool for out-of-memory handling
without C++ exceptions), and RAII clean-up for trivially and
non-trivially destructible types.
* Add vector header library in libc/src/__support/CPP/CMakeLists.txt
* Implement vector container in libc/src/__support/CPP/vector.h
* Add comprehensive unit tests in
libc/test/src/__support/CPP/vector_test.cpp
* Register vector_test in libc/test/src/__support/CPP/CMakeLists.txt
Assisted-by: Automated tooling, human reviewed.
Commit: 33578bd6698a455c2faef2c5a5a9652f621ec9d5
https://github.com/llvm/llvm-project/commit/33578bd6698a455c2faef2c5a5a9652f621ec9d5
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Fix lambda added in #222755 which did not build with VS2019. (#223016)
PR #222755 added a lambda which fails to compile with VS2019 as can be
seen on our bot https://lab.llvm.org/buildbot/#/builders/46/builds/41157.
This change fixes the error by explicitly adding the variable Limit to
the lambda capture list.
Commit: 652436711805b4aa035341324465c880f19d297d
https://github.com/llvm/llvm-project/commit/652436711805b4aa035341324465c880f19d297d
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/callback_parallel_regions.ll
M llvm/test/Transforms/OpenMP/custom_state_machines.ll
M llvm/test/Transforms/OpenMP/spmdization.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
M openmp/device/include/Interface.h
M openmp/device/src/Mapping.cpp
Log Message:
-----------
[OpenMPOpt] Ask the runtime how many of a block's threads can be workers (#221450)
The custom state machine gates a thread on `InitCB < BlockHwSize -
WarpSize`,
reconstructing the worker count from the block size on the assumption
that the
main thread occupies a whole warp above them. That arithmetic has to be
kept in
step with whatever launch geometry the toolchain uses, and when it is
not, the
workers in between are left in neither group, waiting for no parallel
region
while the runtime hands them iterations.
Export the number the device runtime already computes in
`mapping::getMaxTeamThreads()`, which its own generic state machine
gates on, as
`__kmpc_get_max_team_threads()`, and gate on that instead. The new entry
point is
added to the virtual-use callback that keeps the state machine's callees
alive,
and the existing `runtimeFnsAvailable()` check skips the rewrite against
an older
device runtime.
NFC upstream, where `getMaxTeamThreads()` is `BlockSize - WarpSize`. It
matters
for a toolchain whose block is not laid out that way, and it is what
lets the
arithmetic live in one place.
Depends on #221449; the first commit is from that PR.
Tested on gfx90a: `llvm/test/Transforms/{OpenMP,Attributor}` 260 passed,
1
unsupported. No kernel in the AOMP smoke and smoke-fort suites changes
execution
mode.
Commit: ecb96165dc0f95cb81267e1178f7e60a4ab7faa6
https://github.com/llvm/llvm-project/commit/ecb96165dc0f95cb81267e1178f7e60a4ab7faa6
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc:__support_fputil_fenv_impl (#223031)
Fixes https://github.com/llvm/llvm-project/pull/192079 (commit
041300fa0515) by adding missing dependency.
Commit: 4371ce908668ab70cbf9cc938657a2230cb9f417
https://github.com/llvm/llvm-project/commit/4371ce908668ab70cbf9cc938657a2230cb9f417
Author: Kevin McAfee <kmcafee at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[NFC][SLPVectorizer] Capture TTI explicitly in the cost-caching lambdas (#223020)
Follow-up to #122348, which converted a number of lambdas in this file
to capture the TTI member explicitly. Covers a couple sites that have
been added since.
Commit: e0d48310ce627ffb85c708c9c3c93d135f14de9e
https://github.com/llvm/llvm-project/commit/e0d48310ce627ffb85c708c9c3c93d135f14de9e
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
Log Message:
-----------
[CIR] Remove the NYI test case for a pointer-element vector (#223019)
#222736 removed CIR_AnyPtrType from VectorElementType, so `!cir.vector<2
x !cir.ptr<!s32i>>` no longer verifies. That stops
x86_64-aggregate-nyi.cir parsing at all, so the whole test fails rather
than just that case.
The case only pinned that the x86_64 bridge refuses the shape. No C or
C++ source produces it, since clang rejects a pointer element with
"invalid vector element type", so the verifier is the earlier and better
place for that rejection. The comment in isSupportedType justifying the
bridge-side exclusion is also removed.
Assisted-by: Cursor / claude-opus-5
Commit: 73abf955baf6a19491c1e70947b63ff411dc94aa
https://github.com/llvm/llvm-project/commit/73abf955baf6a19491c1e70947b63ff411dc94aa
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/bindings/python/get-python-config.py
Log Message:
-----------
[lldb] Use lowercase for path "lib\site-packages" on Windows. (#222816)
Using an uppercase "L" doesn't have any visible effect for most uses.
But if you create a zip file with `set(cpack_generator ZIP)`, you get a
zip file which contains both "lib/" and "Lib/". That produces odd
results if you extract it on Linux.
Commit: 64b7dfef40e59b8596a272a431aa3a4abcef33c1
https://github.com/llvm/llvm-project/commit/64b7dfef40e59b8596a272a431aa3a4abcef33c1
Author: Clemens Wasser <clemens.wasser at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/lib/Transforms/Scalar/InferAlignment.cpp
M llvm/tools/llubi/lib/Interpreter.cpp
M polly/include/polly/ScopInfo.h
Log Message:
-----------
[PassManager] Store analysis results in contiguous storage (#222003)
Store per-IR analysis results in a `SmallVector` instead of `std::list`
to avoid a heap allocation per cached analysis. The lookup map stores
the raw result pointer, which stays stable behind the unique_ptr.
geomean -0.12% for optimizing builds, clang build -0.34%
https://llvm-compile-time-tracker.com/compare.php?from=e6734a41bb41d91cb880fe7abce46d8146182518&to=4fc43802817cf8daddbebadb0b7fbfaa6286e7fe&stat=instructions:u
Commit: 2eb8c73f47c7bf6560fc6458713099fd5e1921a3
https://github.com/llvm/llvm-project/commit/2eb8c73f47c7bf6560fc6458713099fd5e1921a3
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
[AMDGPU] Expose buffer resource num_records width in TargetParser (#220103)
This also fixes the conflict in gfx12.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 9a9ed337c81c4ca2b95e5f8f7fcb449220c722ae
https://github.com/llvm/llvm-project/commit/9a9ed337c81c4ca2b95e5f8f7fcb449220c722ae
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/tools/dsymutil/Inputs/member-hash/2.o
A llvm/test/tools/dsymutil/Inputs/member-hash/debug-map.map
A llvm/test/tools/dsymutil/X86/member-hash.cpp
Log Message:
-----------
[dsymutil] Test qualified name hashing for members (#223017)
hashFullyQualifiedName walks DW_AT_specification to reach a member's
enclosing struct, so the accelerator table entry for a type nested in an
out-of-line member function definition depends on that walk. Pin the
resulting hash.
The test has lived downstream since the fix that made the function take
its DWARFDie by value instead of by pointer, where the pointee went out
of scope during the walk. Give it a debug map of its own describing
member-hash/2.o rather than extending the shared dummy-debug-map.map,
which describes a different set of objects.
rdar://184990209
Commit: e41147d567ee1f3eddc77ff3cbf505a4d5158e84
https://github.com/llvm/llvm-project/commit/e41147d567ee1f3eddc77ff3cbf505a4d5158e84
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
R llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/condbinops.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/pr148084.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/zicond-opts.ll
M llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
R llvm/test/MC/RISCV/XVentanaCondOps-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Remove Ventana Conditional Ops (#221042)
This extension is used by any silicon as far as I am aware.
If any person/company was reliant on this extension, the extension
can be added back in under the same/different name.
AI Usage: Assisted by Codex
Commit: ecb66ef84fc881eb8bea392cbd9b61f83605b196
https://github.com/llvm/llvm-project/commit/ecb66ef84fc881eb8bea392cbd9b61f83605b196
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
M clang/lib/CIR/CodeGen/CIRGenCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenSYCL.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGenCXX/init-priority-attr.cpp
M clang/test/CIR/CodeGenHIP/ternary-struct-addrspace.hip
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
Log Message:
-----------
[CIR][NFCI] Refactor uses of 'mlir::Location' vs 'SourceRange' on calls/etc (#222981)
As a prerequisite to an upcoming patch, emitCall needs access to the
Clang source locations, not just the mlir::Location. We're going to need
this in quite a few more places in the future, since there are various
diagnostics that use clang locations in the code generation.
This patch also has to change the RAII source location stuff, which I
switched to SourceRange. This should improve the amount of data we give
for our source information.
I DID have to remove the assertion on it though, because we do have a
few places that intentionally wanted an invalid location if other stuff
wasn't available (see the CUDA use in particular), but otherwise this
should allow us to improve our source location info, AND use it for
diagnostics in the future.
Commit: 9a762fce97374fb1ce5d2f21f99b5a7ed584ba71
https://github.com/llvm/llvm-project/commit/9a762fce97374fb1ce5d2f21f99b5a7ed584ba71
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Implement 'simple' atomic inc/dec. (#222730)
This only works for types where a compare-exchange instruction (or just
a lock-free implementation matters) is possible, and a loop isn't
necessary. This is basically just a conversion of classic-codegen,
except it clarifies some of the logic (particularly around bools).
Commit: 28efe19f92567ec666e205b860cfd77f6f1764fc
https://github.com/llvm/llvm-project/commit/28efe19f92567ec666e205b860cfd77f6f1764fc
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/UsersManual.md
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/keep-inline-functions.c
A clang/test/CodeGen/keep-inline-functions.cpp
A clang/test/CodeGen/keep-inline-functions.cppm
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/fkeep-inline-functions.c
Log Message:
-----------
[Clang] Implement -fkeep-inline-functions (#218533)
Implement the -fkeep-inline-functions flag, which forces selected inline
function definitions to be emitted into the object file even if they
have been inlined into all their callers. The function retention
behavior follows GCC's semantics.
The front-end has been modified to:
- emit the selected functions even if they are unused; and
- add the selected functions to llvm.compiler.used/llvm.used to ensure
they are retained.
The functions selected for emission are inline function definitions that
are available in the current translation unit. available_externally
definitions are excluded because their authoritative definitions are
expected to be emitted by another translation unit.
This is also done for C99 inline function external definitions with
external linkage, which would normally be emitted into the object file
anyway, to ensure the functions are retained for LTO purposes.
See the proposed Clang documentation update for details on the function
selection criteria.
Commit: 204b703adb18599fc7f5d7b1bc0b0b410ca1ce15
https://github.com/llvm/llvm-project/commit/204b703adb18599fc7f5d7b1bc0b0b410ca1ce15
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc/test/UnitTest:string_utils (#223051)
Fixes https://github.com/llvm/llvm-project/pull/222988 (commit
18db3eee9d04) by adding missing dependencies.
Commit: 105ff16f816ffdce14b1d4895d8584971ef5192c
https://github.com/llvm/llvm-project/commit/105ff16f816ffdce14b1d4895d8584971ef5192c
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lld/test/ELF/lto/riscv-target-abi.ll
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
M llvm/test/CodeGen/RISCV/target-abi-invalid.ll
M llvm/test/MC/RISCV/target-abi-invalid.s
M llvm/unittests/Target/RISCV/RISCVBaseInfoTest.cpp
Log Message:
-----------
[RISCV] Change RISCVABI::computeTargetABI() to return Expected<ABI>
Return Expected<ABI> instead of printing to errs()/reportFatalUsageError
internally, so callers decide whether to fall back to the default ABI
or treat the failure as fatal, and so it's unit-testable. Also fold the
duplicated Hard-float 'f'/'d' ABI checks from RISCVAsmParser.cpp and
RISCVISelLowering.cpp into computeTargetABI(), and add RISCVBaseInfoTest
coverage for the error paths.
This change was created with the help of AI tools
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/213410
Commit: 51450333e1fd156fcdb20b61d7c70ed96461812b
https://github.com/llvm/llvm-project/commit/51450333e1fd156fcdb20b61d7c70ed96461812b
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
Log Message:
-----------
[BOLT][AArch64][Android] Only the dumping thread can longjmp (#222719)
`__bolt_instr_recovery_active` is a process global flag and the reader
in `boltHandleFatalAndRecover()` runs on any thread. When a dump is in
flight, another thread that fails `assert()` or exhausts `GlobalAlloc`
in `instrumentIndirectCall()` could see the flag set, longjmp with the
dumping thread's buffer and restore the dump thread's sp/fp/lr. This
is wrong since the thread would then run on the dumping thread's stack
and later release a mutex that it does not own or hold.
`GlobalWriteProfileMutex` already serializes the writers, so one buffer
would be sufficient; only the reader side needs to know who owns the
buffer. Replace the flag with `__bolt_instr_recovery_tid` holding the
owner's thread ID, and longjmp only when it matches `__gettid()`. Other
threads will fall through to just record the failure and return.
Added a `__gettid()` syscall wrapper, for aarch64 only.
Assited-by: opus
Commit: 5c27600b852b9a86b7811142482a09defd963ad3
https://github.com/llvm/llvm-project/commit/5c27600b852b9a86b7811142482a09defd963ad3
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-nonscalar.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-unsupported-kind.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture.ll
M llvm/test/CodeGen/DirectX/ResourceAtomicBinOp.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/atomic64-typed-resource.ll
Log Message:
-----------
[DirectX] Add texture support to atomicrmw lowering (#221369)
Fixes https://github.com/llvm/llvm-project/issues/218034
Fixes https://github.com/llvm/llvm-project/issues/186154
atomicrmw lowering didn't support textures. This PR adds that missing
support.
Assisted by: Claude Opus 5
Commit: 364bed30971df7fb50d7aadfc21f3996a97bf3a4
https://github.com/llvm/llvm-project/commit/364bed30971df7fb50d7aadfc21f3996a97bf3a4
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Cygwin.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/WebAssembly.cpp
Log Message:
-----------
(NFC)[Clang][Driver] Add ToolChain::GetFilePathIfExists and use it (#221063)
Replaces patterns like `if (TC.GetFilePath("file") != "file")` to avoid
repeating `"file"`.
Commit: 393710bbf74c4e7b92226603a18ead0bba70a8a0
https://github.com/llvm/llvm-project/commit/393710bbf74c4e7b92226603a18ead0bba70a8a0
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
A llvm/test/CodeGen/AArch64/sme-za-tailcall-fpdiff-align.ll
Log Message:
-----------
Reland "[llvm][AArch64] Ensure stack alignment in non-sibcall tail calls with FPDiff" (#220406)
When a caller has a non-multiple of the minimum stack alignment more
argument stack space than the callee it is tail calling, we need to ensure that
the resulting FPDiff's magnitude has been rounded up to a multiple of the
platform's minimum stack alignment.
In this re-land there is a fixup to 234ce03692ede13ffd2fcb35570d801c1e332814,
which, because of the wrong order, wasn't actually moving NumBytes after
FPDiff had been re-aligned.
rdar://184474075
Commit: f77ec648706b957698a61e54a715bd69042ce491
https://github.com/llvm/llvm-project/commit/f77ec648706b957698a61e54a715bd69042ce491
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Fix -Wunused-lambda-capture in #223016 (#223053)
Clang will warn on this despite this being required for MSVC, so add a
workaround for now.
Commit: d42c701dc3d00dacff3806ea428a274aae39fed0
https://github.com/llvm/llvm-project/commit/d42c701dc3d00dacff3806ea428a274aae39fed0
Author: Kunal Pathak <kunalspathak at hotmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
A llvm/test/Transforms/SampleProfile/Inputs/non-probe-stale-profile-indirect-call-anchor.prof
A llvm/test/Transforms/SampleProfile/Inputs/profile-mismatch-indirect-call.prof
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-profile-mismatch-multiple-sampled-callees.prof
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-profile-mismatch-zero-callee.prof
A llvm/test/Transforms/SampleProfile/non-probe-stale-profile-indirect-call-anchor.ll
A llvm/test/Transforms/SampleProfile/profile-mismatch-indirect-call.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-profile-mismatch.ll
Log Message:
-----------
[SampleProfile] Ignore unsampled callees in profile anchors (#219335)
Sample profiles can retain zero-count callee entries in both flattened
body call targets and
unflattened callsite samples:
```text
probe 12:
foo: 10
cleanup: 0
```
Counting every entry as a distinct callee converts the uniquely sampled
foo callsite into
UnknownIndirectCallee. It then fails to match the direct IR call to foo,
causing valid
samples to be reported as stale.
Ignore zero-count entries when the same location has a sampled callee.
Preserve the existing
behavior for genuine multi-callee sites and locations where every callee
has zero samples.
```text
foo: 10, cleanup: 0 -> foo
foo: 10, bar: 1 -> UnknownIndirectCallee
foo: 0, cleanup: 0 -> unchanged
```
The change covers both:
- flattened call targets from body samples;
- inline callees from unflattened callsite samples.
## Related fixes
This is downstream profile-matching robustness related to #219079.
Those changes prevent invalid pseudo-probe context earlier in the
pipeline. This change
ensures that any zero-sample entries reaching the profile matcher are
not treated as
evidence of another executed callee.
## Tests
Added regression coverage for zero-sample callees, genuine multiple
sampled callees,
flattened body targets, and unflattened callsite samples.
Assisted by: Claude
Commit: 55221f7a2baca65325ad073eabdaf8cc18472e12
https://github.com/llvm/llvm-project/commit/55221f7a2baca65325ad073eabdaf8cc18472e12
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/Driver/flang-f-opts.f90
Log Message:
-----------
[Flang/CI] Hotfix of flang/test/Driver/flang-f-opts.f90. (#223076)
The test started failing in Flang CI after #218533. This is just a
hotfix.
Commit: 17de86741560e43304c8c013092d80ae91d401ff
https://github.com/llvm/llvm-project/commit/17de86741560e43304c8c013092d80ae91d401ff
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/IR/Dominators.cpp
Log Message:
-----------
[IR] Make verify<domtree> work in non-asserts builds (#223066)
It doesn't make sense to lose this test coverage in non-assert builds,
and I would expect a release build of opt to have a working
verify<domtree> pass. This also better matches the behavior of the other
verify<*> passes.
Commit: 242ccbf6b6d9d090762a87138c854f2d93b6ab60
https://github.com/llvm/llvm-project/commit/242ccbf6b6d9d090762a87138c854f2d93b6ab60
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
Log Message:
-----------
[BOLT] Fix -Wunused-template (#222439)
This was enabled by default in LLVM 23.1.0. It was disabled in LLVM
23.1.1, but it makes sense to fix the outstanding issues given they are
real.
Commit: 44d1d020a920341903e726506f3efefe27ea3145
https://github.com/llvm/llvm-project/commit/44d1d020a920341903e726506f3efefe27ea3145
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
Add standard libc package features to libc subpackages (#223079)
Commit: 04a04612e6696d36cd26edadddf20d1329794d2e
https://github.com/llvm/llvm-project/commit/04a04612e6696d36cd26edadddf20d1329794d2e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
Log Message:
-----------
[mlir][Cpp] Stop using Operation::getAttrs (NFC) (#223080)
Only discardable attributes on multi-result func.return operations are
C++ tuple arguments; the operation has no inherent attributes relevant
to the translation.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: b5874129d921518823d257770c742da2a860b2cf
https://github.com/llvm/llvm-project/commit/b5874129d921518823d257770c742da2a860b2cf
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Do not hoist fir.field_index out of loops (#222891)
Lowering a consumer of a !fir.field value inspects its defining
operation: for a record whose layout is known at compile time the field
becomes an LLVM GEP struct index, which must be a constant, and
otherwise the `field` attribute is read off the defining op. A field
value therefore may not be a block argument.
LICM broke that. fir.field_index is Pure and takes no operands, so it is
trivially loop-invariant and was hoisted out of the loop. Lowering emits
one inside each arm of a construct -- for example the CASEs of a SELECT
CASE that each pass a different component of the same derived type as an
actual argument -- so hoisting them left those arms as
otherwise-identical blocks differing only in that operand. Block merging
then merged them and threaded the field through a new block argument,
and codegen aborted with "must be a constant".
Leave producers of a !fir.field where they are. The arms then differ by
an operation rather than by an operand, so they are no longer merge
candidates. Consumers are unaffected and still hoist: fir.coordinate_of
uses the attribute form of the field, so it does not depend on the
fir.field_index value.
The check keys on the result type rather than on FieldIndexOp so that
any operation producing a !fir.field is covered, and sits in the
predicate shared by the direct-loop and nested-region hoisting paths.
Commit: f795e9526254f4d1cee4855b40041d5797d2f676
https://github.com/llvm/llvm-project/commit/f795e9526254f4d1cee4855b40041d5797d2f676
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Shape/IR/Shape.cpp
Log Message:
-----------
[mlir][Shape] Stop using Operation::getAttrs in printers (NFC) (#223083)
Print only discardable attributes after inherent fields are handled by
the custom assembly formats.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: bb14dc958cbb7f9742f37cbae6d290a0997e7299
https://github.com/llvm/llvm-project/commit/bb14dc958cbb7f9742f37cbae6d290a0997e7299
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/toy/Ch2/mlir/Dialect.cpp
M mlir/examples/toy/Ch3/mlir/Dialect.cpp
M mlir/examples/toy/Ch4/mlir/Dialect.cpp
M mlir/examples/toy/Ch5/mlir/Dialect.cpp
M mlir/examples/toy/Ch6/mlir/Dialect.cpp
M mlir/examples/toy/Ch7/mlir/Dialect.cpp
Log Message:
-----------
[mlir][Toy] Stop using Operation::getAttrs (NFC) (#223082)
Print only discardable attributes in Toy custom operation printers.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: c7a7f8364a1335b8938af2113fd8ec43cd3a2c47
https://github.com/llvm/llvm-project/commit/c7a7f8364a1335b8938af2113fd8ec43cd3a2c47
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Utils/StructuredOpsUtils.cpp
Log Message:
-----------
[mlir] Stop using Operation::getAttrs in dialect utilities (NFC) (#223081)
Copy operation properties and discardable attributes separately.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 4cec7e6e3082e8abbee08f90db3c353c4c379bdb
https://github.com/llvm/llvm-project/commit/4cec7e6e3082e8abbee08f90db3c353c4c379bdb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SMT/IR/SMTOps.cpp
Log Message:
-----------
[mlir][SMT] Stop using Operation::getAttrs (NFC) (#223086)
Print only discardable attributes after inherent fields are handled by
the custom operation printers.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 0cc524fdf4becec3763cd50930de5156d76ba1d4
https://github.com/llvm/llvm-project/commit/0cc524fdf4becec3763cd50930de5156d76ba1d4
Author: nvptm <pmathew at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-declare-globals.f90
M flang/test/Lower/module-parameter-linkonce-odr.f90
Log Message:
-----------
[flang][OpenACC] Do not emit declare ctor/dtor for module PARAMETER variables (#222993)
A module PARAMETER in !$acc declare is already emitted as an initialized
device global. A host ctor/dtor would still register that same symbol
with the runtime. Skip the registration pair and keep acc.declare so the
constant is
still emitted as an initialized global in the GPU module.
Commit: 5f09d40446ffbcd92d9e1a2a14bae974eb445cdb
https://github.com/llvm/llvm-project/commit/5f09d40446ffbcd92d9e1a2a14bae974eb445cdb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp
Log Message:
-----------
[mlir][PDLInterp] Stop using Operation::getAttrs (NFC) (#223088)
Print the discardable dictionary after the inherent fields handled by
the custom assembly format.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 641dc586869b21dc42785aa72949ed57c408204e
https://github.com/llvm/llvm-project/commit/641dc586869b21dc42785aa72949ed57c408204e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/docs/CodingConventions.md
M orc-rt/include/orc-rt-c/support/CoreTypes.h
M orc-rt/include/orc-rt-c/support/Error.h
A orc-rt/include/orc-rt-c/support/RTTI.h
M orc-rt/include/orc-rt/support/Error.h
M orc-rt/include/orc-rt/support/RTTI.h
M orc-rt/lib/support/Error.cpp
M orc-rt/lib/support/RTTI.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/Inputs/RTTICrossDylibTestError.h
A orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.cpp
A orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.h
M orc-rt/test/unit/support/CAPICompileTest.c
M orc-rt/test/unit/support/ErrorCAPITest.cpp
M orc-rt/test/unit/support/ErrorExceptionInteropTest.cpp
M orc-rt/test/unit/support/ErrorTest.cpp
A orc-rt/test/unit/support/RTTICrossDylibTest.cpp
M orc-rt/test/unit/support/RTTITest.cpp
Log Message:
-----------
[orc-rt] Refactor RTTI for cross-library support, add C API (#222946)
Identify types by name rather than by the address of a per-type ID
object, so that a type's identity survives crossing a library boundary:
an object may be constructed by one library and have its type queried by
another, each with its own copy of orc-rt, where per-type addresses
would not agree. Participating classes now declare an RTTIName, which
must be unique across the process.
RTTIRoot records which library produced each value, so same-library
queries still resolve by pointer comparison, and only cross-library ones
fall back to strcmp.
Adds orc-rt-c/support/RTTI.h to expose this to C.
ORC_RT_RTTI_PARTICIPANT and ORC_RT_C_RTTI_IMPL declare and define a
per-type cast entry point, reached via ORC_RT_DYNCAST, alongside
orc_rt_RTTIRoot_getTypeName for logging. This replaces the
orc_rt_Error_TypeId API (orc_rt_Error_getTypeId,
orc_rt_StringError_getTypeId), which exposed ID addresses and so could
not work across libraries. orc_rt_ErrorRef moves from CoreTypes.h to
Error.h.
RTTICrossDylibTest checks identity across a real boundary: its helper
library links its own copy of orc-rt-bedrock, giving it a distinct
library ID.
Commit: 80bc02604c4ecec507c906552db3e03e5efdaee3
https://github.com/llvm/llvm-project/commit/80bc02604c4ecec507c906552db3e03e5efdaee3
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/lib/Optimizer/OpenACC/Transforms/ACCRecipeBufferization.cpp
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
Log Message:
-----------
[flang][OpenACC] Allocate bufferized recipe descriptors in device memory (#223028)
ACCRecipeBufferization places the descriptor of a bufferized recipe
clause next to the variable it holds. When the clause sits inside a
compute construct and the variable is already produced by a data entry
operation, that memory is host memory no data clause maps, so device
code reading the descriptor through it gets a host address.
Place the descriptor in the construct region in that case. The region is
device memory and needs no data clause of its own, and the mapped
variable is a legal live-in since a data entry operation produces it.
The region entry block is used rather than the clause operation so that
a clause on a nested loop does not allocate on every iteration.
Assisted-by: Cursor
Commit: a8e989fe377385906abdda1f965622fe83941fd4
https://github.com/llvm/llvm-project/commit/a8e989fe377385906abdda1f965622fe83941fd4
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir
M mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
Log Message:
-----------
[mlir][OpenACC] Preserve reduction mappings during materialization. (#222189)
Create or reuse structured reduction mappings before compute-construct
reduction recipes are consumed. Materialize initialization and
combination against the mapped value while leaving nested loop
reductions unchanged.
Assisted-by: Cursor
Commit: 4d10444e7d4c8fcb6533522f39cd0ffb88497253
https://github.com/llvm/llvm-project/commit/4d10444e7d4c8fcb6533522f39cd0ffb88497253
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
Log Message:
-----------
[mlir][OpenACC] Restrict implicit data to compute constructs (#222759)
acc.kernel_environment contains host-side preparation around an outlined
compute region; it is not itself an OpenACC compute construct. Treating
all of its live-ins as implicit device mappings can map
compiler-generated host operations and assign them kernels-style copy
semantics.
Limit ACCImplicitData to parallel, kernels, and serial. In particular,
do not process kernel_environment or the lowered compute_region form.
Assisted-by: Cursor
Commit: 329f45430835fe803b753ac78fc823b5dfc5df69
https://github.com/llvm/llvm-project/commit/329f45430835fe803b753ac78fc823b5dfc5df69
Author: Douglas <Douglas.Gliner at sony.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SafeStack.cpp
A llvm/test/Transforms/SafeStack/X86/pointer-address-domtree.ll
Log Message:
-----------
[CodeGen][SafeStack] Successful InlineFunction should force a recalculation of potentially stale DominatorTree (#222820)
In commit 51a25846c198, Safe Stack began preserving the `DominatorTree`
by the end of the pass' run. Updates to the `DominatorTree` were then
made lazily via inclusion of `DomTreeUpdater` and its use with
`SplitBlockAndInsertIfThen`. Preservation was maintained when updated to
the new pass manager in 3bd517205799. However, there was an overlooked
case where the `DominatorTree` would remain stale by the end of the Safe
Stack pass if the actions under `TryInlinePointerAddress` completed
successfully and modified the caller's CFG.
The conditions for a stale `DominatorTree` to exist are roughly:
1. Safe Stack obtains the Unsafe Stack pointer location as a `CallInst`
(i.e. one way is `-safestack-use-pointer-address`)
2. `__safestack_pointer_address` is defined and inlined successfully.
3. The inlining changes the CFG such that a recalculated `DominatorTree`
would differ.
4. `DominatorTree` remains unchanged since it is preserved and currently
not recalculated.
Here's a simple example that demonstrates the issue:
```
@unsafe_stack_pointer_a = thread_local global ptr null
@unsafe_stack_pointer_b = thread_local global ptr null
declare i32 @get_runtime_mode() nounwind willreturn memory(none)
declare void @escape(ptr)
define ptr @__safestack_pointer_address() alwaysinline {
entry:
%first = call i32 @get_runtime_mode()
%use_a = icmp eq i32 %first, 0
br i1 %use_a, label %a, label %b
a:
ret ptr @unsafe_stack_pointer_a
b:
ret ptr @unsafe_stack_pointer_b
}
define i32 @caller() safestack {
entry:
%unsafe = alloca i32, align 4
call void @escape(ptr %unsafe)
%second = call i32 @get_runtime_mode()
ret i32 %second
}
```
```
> opt -mtriple=x86_64-pc-linux-gnu -safestack-use-pointer-address -passes=require<libcall-lowering-info>,function(safe-stack,verify<domtree>) -disable-output example.ll
DominatorTree is different than a freshly computed one!
Current:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
[1] %entry {4294967295,4294967295} [0]
Roots: %entry
Freshly computed tree:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
[1] %entry {4294967295,4294967295} [0]
[2] %a.i {4294967295,4294967295} [1]
[2] %__safestack_pointer_address.exit {4294967295,4294967295} [1]
[2] %b.i {4294967295,4294967295} [1]
Roots: %entry
```
To avoid a stale `DominatorTree` by the end of the Safe Stack pass, I
propose calling `recalculate` on the `DominatorTree` for the function
which will have the call to `__safestack_pointer_address` inlined
assuming the inlining was successful and `DomTreeUpdater` is non-NULL.
Commit: 923902483c7a6937a65b9679795a247ae2a2ad56
https://github.com/llvm/llvm-project/commit/923902483c7a6937a65b9679795a247ae2a2ad56
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/Host/SafeMachO.h
Log Message:
-----------
[lldb] Attempt to unbreak building lldb with the 27 SDK (#223090)
See this report:
https://github.com/llvm/llvm-project/pull/222721#issuecomment-5636252813
Commit: 4e3b379b6cfcd13a11e26834756519430a9f9377
https://github.com/llvm/llvm-project/commit/4e3b379b6cfcd13a11e26834756519430a9f9377
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/CAPI/Wrap.h
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Query/Matcher/Marshallers.h
M mlir/include/mlir/Support/DebugStringHelper.h
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/lib/Dialect/Shard/Transforms/Partition.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Tools/mlir-pdll-lsp-server/Protocol.cpp
Log Message:
-----------
[MLIR] Fix -Wunused-template (#221480) (#223094)
This warning was enabled by default for clang 23 (although reverted in
23.1.1). Given someone might enable it in the future and the cleanup
seemed nice, we should just do it.
This was done primarily by removing static from templates in headers and
then deleting any unused templates in translation units.
Previously attempted to land this in #221480, but accidentally merged
into a user branch rather than main.
Commit: 675cfb91660e20bfc17456f347c01c310322fc9d
https://github.com/llvm/llvm-project/commit/675cfb91660e20bfc17456f347c01c310322fc9d
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
A llvm/test/CodeGen/NVPTX/atomics-system-scope-sm50.err.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
Log Message:
-----------
[NVPTX] Error on atomics with system scope pre-sm60 (#222458)
Pre-SM60, atomics could only have device scope.
`NVPTXDAGToDAGISel::getAtomicScope` can conservatively emit device scope
for all scopes that are not system scope. For system scope, we need to
error out.
This resolves a TODO in llvm/test/CodeGen/NVPTX/cmpxchg.ll. Update that
and llvm/test/CodeGen/NVPTX/cmpxchg.ll to use SM60 now, demonstrating
correct lowering for system scope.
Commit: 5618cfdae27157a48ea670e6d817310404afb746
https://github.com/llvm/llvm-project/commit/5618cfdae27157a48ea670e6d817310404afb746
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Remove hasCZEROLike() in favor of directly checking for Zicond Extension (#221053)
Only Zicond implements a CZero-Like instruction now that Ventana
Conditional Operations have been removed.
Commit: 7727fb8eaed54b90d08a35fca4896a21a04349b2
https://github.com/llvm/llvm-project/commit/7727fb8eaed54b90d08a35fca4896a21a04349b2
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
Log Message:
-----------
[NFC][AMDGPU] Add tests for converting an i64 that fits in 32 bits (#223030)
It is converted with the full i64 expansion. The shifts by 31 leave a
value that does not fit.
The idea is to optimize conversion of an i64 that fits in 32 bits from
its low half.
Commit: 355cbe15b1c7694cab8590ecd773087b78a31121
https://github.com/llvm/llvm-project/commit/355cbe15b1c7694cab8590ecd773087b78a31121
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[IVDescriptors] Implement MonotonicDescriptor (#214490)
RFC link:
https://discourse.llvm.org/t/rfc-loop-vectorization-of-compress-store-expand-load-patterns/86442
"Monotonic" variable is similar to induction variable, but its value is
updated under some condition, e.g.:
```
int idx = 0;
for(int i = 0; i < n; ++i) {
// some uses of idx
if (cond)
++idx;
}
```
In this example, `i` is induction variable and `idx` is monotonic
variable: it's updated only when cond == true. In LLVM IR, this looks
like:
```
loop_header:
%monotonic_phi = phi [ %start, %preheader ], [ %update, %latch ]
br i1 %do_step, label %step_bb, label %latch
step_bb:
%step = add/gep %monotonic_phi, %step_val
br label %latch
latch:
%update = phi [ %monotonic_phi, %loop_header ], [ %step, %step_bb ]
br label %loop_header
```
This initial patch only matches the case where `%update` directly
selects between the `%monotonic_phi` or the step. We also limit the
descriptor to only matching cases where all users of the
`%monotonic_phi` are loads/stores that can be mapped to expandloads or
compresstores.
This is a continuation Sergey Kachkov's patch (#140720).
---------
Co-authored-by: Sergey Kachkov <sergey.kachkov at syntacore.com>
Commit: 4e865028f0563584bde4e54858855ba4f45946ad
https://github.com/llvm/llvm-project/commit/4e865028f0563584bde4e54858855ba4f45946ad
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.ll
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.mir
Log Message:
-----------
[AArch64] Form CCMP for CBB and CBH (#221113)
AArch64ConditionalCompares forms CMP/CCMP chains to transform patterns
such as
Head Head
/ | CmpBB
/ | / |
| CmpBB => / |
| / | Tail |
| / | | |
Tail | | |
| | | |
... ... ... ...
where Head is terminated by a conditional branch and CmpBB contains
a cmp + conditional branch.
We usually try to split any fused conditional branches to be able to
form CCMP. However, in the case of CBB and CBH, splitting the fused
conditional branch in CmpBB could require the insertion of explicit
zero- or sign-extensions for both operands. In the Head block we can
cheaply fuse at least one of the extensions into cmp.
We therefore convert CBB and CBH unconditionally when we find them in
the Head block. In the CmpBB block, we only do the transformation if
neither operands needs an extension.
Commit: 2c30f74239871203b0a998cd4797e01c3338a9fa
https://github.com/llvm/llvm-project/commit/2c30f74239871203b0a998cd4797e01c3338a9fa
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
A llvm/test/Transforms/RelLookupTableConverter/AArch64/dynamic_relocs.ll
M llvm/test/Transforms/RelLookupTableConverter/AArch64/no_relative_lookup_table.ll
R llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
A llvm/test/Transforms/RelLookupTableConverter/relative_lookup_table.ll
Log Message:
-----------
[llvm] Avoid PREL32 overflow to .data.rel.ro on AArch64 and re-enable (#222809)
Under the [AArch64 Small Code
Model](https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst#code-models),
the text segment (containing .text and .rodata) is limited to 2GB, but
the combined span of text and data segments can be up to 4GB.
When a relative lookup table is emitted in .rodata but references target
operands that require dynamic relocations (placed in .data.rel.ro in the
data segment), the distance between .rodata and .data.rel.ro can legally
exceed the 2GB range of signed 32-bit R_AARCH64_PREL32 relocations.
In this PR:
1. Ensure that on AArch64, lookup table operands do not need dynamic
relocations. If the lookup table were in `.rodata` (text segment), then
any of the target components would need to be in the data segment, so
the dynamic reloc check would suffice.
2. Re-enable RelLookupTableConverter for AArch64 (while keeping Darwin
disabled as before).
3. Limit the existing `AArch64/no_relative_lookup_table.ll` test to just
darwin aarch64.
4. Move the `X86/relative_lookup_table.ll` into the parent dir since
those checks are (mostly) generic, and allow those same checks to be run
for aarch64. That also includes a minor refactor for not checking the
`unnamed_addr` bit since `unnamed_addr` is
[dropped](https://github.com/llvm/llvm-project/blob/6959b7d081df5fb2349e67e0d8e8e87841fa10d9/llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp#L82)
for aarch64.
AI: Gemini was used to help make this patch and debug the issue. I
reviewed this PR to the best of my ability before submitting.
Commit: f471750e042c5da3daf947169c0125e58300df0d
https://github.com/llvm/llvm-project/commit/f471750e042c5da3daf947169c0125e58300df0d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/CIR/CleanupAndEHDesign.md
Log Message:
-----------
[CIR] Document dynamic exception specification design (#222451)
This change adds documentation for the CIR handling of dynamic exception
specification handling in pre-C++17 code. This is not yet implemented.
The implementation will follow in a series of changes based on this
design.
This documentation was generated by Claude Opus 5, based on an
interactive planning session in which I worked out the details of how I
want to implement this feature. I have carefully read the entire
document to verify that it correctly matches my intended implementation.
Commit: 5b1d7415a6cf8f4799b4f586417346abf0c56e84
https://github.com/llvm/llvm-project/commit/5b1d7415a6cf8f4799b4f586417346abf0c56e84
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
A flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Synchronize context before finalization (#223058)
Commit: e471938cf2c9647a33458eed6ad5647b6323d153
https://github.com/llvm/llvm-project/commit/e471938cf2c9647a33458eed6ad5647b6323d153
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/Transforms/AggressiveInstCombine/RISCV/lit.local.cfg
Log Message:
-----------
[AggressiveInstCombine] Add lit.local.cfg to RISCV test directory. NFC (#223067)
To fix buildbot failures after #220310.
Commit: fe36473cb62cca28c14b7174c0797cb74bcdfc7e
https://github.com/llvm/llvm-project/commit/fe36473cb62cca28c14b7174c0797cb74bcdfc7e
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Let amdgcn_lerp and ds_swizzle use the generic codegen path (#222204)
__builtin_amdgcn_lerp and __builtin_amdgcn_ds_swizzle both map 1:1 onto
concrete (non-overloaded) intrinsics and carry the ClangBuiltin<> marker
in IntrinsicsAMDGPU.td, so EmitBuiltinExpr already lowers them
automatically by forwarding the arguments to the intrinsic.
Commit: bb962e790106c624e0668118d0b7d92c706c2da4
https://github.com/llvm/llvm-project/commit/bb962e790106c624e0668118d0b7d92c706c2da4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/bedrock/SocketHandle.h
M orc-rt/lib/bedrock/CMakeLists.txt
A orc-rt/lib/bedrock/sys/posix/SocketHandle.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/SocketHandleTest.cpp
A orc-rt/test/unit/bedrock/SocketTestUtils.h
A orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp
Log Message:
-----------
[orc-rt] Add SocketHandle, NativeSocketHandle APIs (#223114)
SocketHandle is an owning wrapper for a NativeSocketHandle value, and
closes the native socket on destruction.
NativeSocketHandle is a typedef for the platform's native socket handle
type.
Only POSIX is implemented in this patch (in sys/posix/SocketHandle.cpp).
Windows support will be added later.
This will be used for an upcoming SimpleRemote-based ControllerAccess
implementation that uses sockets for transport (SocketSimpleRemoteCA).
Commit: 25fe99bf939c50c7064e714a7edcbeb445bb9dc1
https://github.com/llvm/llvm-project/commit/25fe99bf939c50c7064e714a7edcbeb445bb9dc1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
M llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
Log Message:
-----------
[ORC] Retire rt::SimpleExecutorMemoryManager* for sps_ci (#223113)
Move all clients to the sps_ci SimpleNativeMemoryMap / MemMgr
counterparts and retire the old rt::SimpleExecutorMemoryManager*
interface names.
Commit: 64a6af1666c9bbb63eb86c0697a3709a4cca8e50
https://github.com/llvm/llvm-project/commit/64a6af1666c9bbb63eb86c0697a3709a4cca8e50
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIROpenCLAttrs.cpp
A clang/test/CIR/IR/invalid-version.cir
A clang/test/CIR/IR/version.cir
M clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
Log Message:
-----------
[CIR][OpenCL] Add OpenCL language version module attributes (#219687)
Add structured CIR module attributes for OpenCL and C++ for OpenCL
language versions. Verify their module-level placement and version
components so lowering can consume explicit source-language version
state.
Assisted-by: Codex / GPT-5.6 Sol
Commit: ba3010d7e4520b6aee926f878c5c1771f1c2a6f3
https://github.com/llvm/llvm-project/commit/ba3010d7e4520b6aee926f878c5c1771f1c2a6f3
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
A clang/test/CIR/CodeGenOpenCL/version.cl
M clang/test/CodeGenCUDASPIRV/kernel-cc.cu
M clang/test/CodeGenHIP/hipspv-kernel.cpp
A clang/test/SemaHIP/atomic-init.hip
Log Message:
-----------
[CIR][OpenCL] Emit OpenCL language version metadata in CIR (#219688)
Emit OpenCL and C++ for OpenCL language version attributes from CIRGen.
Preserve the compatible OpenCL version and the C++ for OpenCL version
separately so later lowering does not infer one from the other.
Assisted-by: Codex / GPT-5.6 Sol
Commit: 070455b3f2f77dbd1d5121a9d1bc3d9a3e3f65bc
https://github.com/llvm/llvm-project/commit/070455b3f2f77dbd1d5121a9d1bc3d9a3e3f65bc
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ConvertMemberFunctionsToStaticCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/readability/convert-member-functions-to-static.cpp
Log Message:
-----------
[clang-tidy] Fix convert-member-functions-to-static crash on attributed methods (#223007)
Fixes #222951
Commit: 78f557806dca9c81453e94c038409fb9ad49d063
https://github.com/llvm/llvm-project/commit/78f557806dca9c81453e94c038409fb9ad49d063
Author: shivaramaarao <58245296+shivaramaarao at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
A flang/test/Lower/OpenMP/omp-lib-integer-wrappers.f90
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M openmp/device/include/Interface.h
M openmp/device/src/State.cpp
M openmp/module/omp_lib.F90.var
M openmp/runtime/src/dllexports
M openmp/runtime/src/include/omp.h.var
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_csupport.cpp
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_ftn_os.h
M openmp/runtime/src/kmp_stub.cpp
A openmp/runtime/test/api/kmp_integer_8_apis.f90
Log Message:
-----------
[OpenMP] [Flang] Add Fortran integer(kind=8) overloads for omp_lib APIs (#221451)
Fortran code that uses integer(8) arguments, including
-fdefault-integer-8, did not match omp_lib interfaces declared with
omp_integer_kind (typically kind 4). Added *_8 specific procedures to
named generic interfaces in omp_lib, exported matching Fortran and C
runtime entry points, and implemented the *_8 functions as thin wrappers
that saturate-convert arguments to 32-bit and call the existing APIs.
Commit: a67c8f208e8710ad8b6b6e2ca4de57e4e0db7178
https://github.com/llvm/llvm-project/commit/a67c8f208e8710ad8b6b6e2ca4de57e4e0db7178
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Frontend/FrontendActions.cpp
M flang/test/Driver/frame-pointer-forwarding.f90
A flang/test/Transforms/function-attr-frame-pointer.fir
Log Message:
-----------
[Flang][Driver]Implemented support for option -momit-leaf-frame-pointer/-mno-omit-leaf-frame-pointer in flang (#216700)
Added support for `-momit-leaf-frame-pointer` /
`-mno-omit-leaf-frame-pointer` in the Flang compiler.
- The driver resolves the flags via `getFramePointerKind()` and forwards
`-mframe-pointer=<kind>` to flang -fc1, resulting in the LLVM IR
function attribute "frame-pointer"
- These options, used with `-fno-omit-frame-pointer`, control whether
leaf functions (functions that don't call other functions) retain or
omit the frame pointer.
- `fno-omit-frame-pointer -momit-leaf-frame-pointe`r : Keep the frame
pointer in non-leaf functions, but omit it in leaf functions (produces
"frame-pointer"="non-leaf").
- `fno-omit-frame-pointer -mno-omit-leaf-frame-pointe`r : Keep the frame
pointer in all functions, including leaf functions (produces
"frame-pointer"="all").
Commit: 4388400c3d0a95b75a36f81c7edd2eb95c6d63ea
https://github.com/llvm/llvm-project/commit/4388400c3d0a95b75a36f81c7edd2eb95c6d63ea
Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/IR/TypeDetail.h
M mlir/test/IR/invalid-builtin-types.mlir
M mlir/test/IR/parser.mlir
Log Message:
-----------
[mlir] Remove the memory space attribute restriction on memref types (#222995)
Follow-up to #187682. `isSupportedMemorySpace` only rejected builtin
attributes other than IntegerAttr/StringAttr/DictionaryAttr. This is a
leftover from when memory spaces were restricted to integers, and is now
inconsistent.
Commit: eff88db8f004bf74c54c65bd39a3fc2fb27969f0
https://github.com/llvm/llvm-project/commit/eff88db8f004bf74c54c65bd39a3fc2fb27969f0
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
M clang/test/CIR/CodeGenOpenCL/version.cl
A clang/test/CIR/Lowering/opencl-version-metadata.cir
Log Message:
-----------
[CIR][OpenCL] Lower OpenCL language version metadata to LLVM dialect (#219689)
Propagate CIR OpenCL language version module attributes as LLVM dialect
named metadata before LLVM IR translation.
Assisted-by: Codex / GPT-5.6 Sol
Commit: cebfe6c25f45c81f7be238c835828b97f48730ab
https://github.com/llvm/llvm-project/commit/cebfe6c25f45c81f7be238c835828b97f48730ab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/IR/Verifier.cpp
A llvm/test/Assembler/llvm.loop.align.ll
A llvm/test/Verifier/llvm.loop.align.ll
Log Message:
-----------
IR: Add verifier checks and LangRef for llvm.loop.align (#221933)
Verify the nested !{!"llvm.loop.align", i32 N} tag.
Require exactly two operands, an integer constant of type i32 or
smaller, and a positive power-of-two value
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 1f13035dd3bec940226402c59bbb086ab703caeb
https://github.com/llvm/llvm-project/commit/1f13035dd3bec940226402c59bbb086ab703caeb
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.verify.cpp
Log Message:
-----------
[libc++] Test LWG4113: Disallow `has_unique_object_representations<Incomplete[]>` (#169446)
We have been rejecting `has_unique_object_representations<Incomplete[]>`
since LLVM 6.
Some related change landed in Clang 19 due to
6451806ef73bb033be3f6e1599f3bcb224943206, and then a follow-up change
ae9990ed965118e7274a52399b43e3b9fb419a54 simplified error messages.
Test coverage for incomplete enumeration types is skipped for Clang-cl
mode, because an incomplete enumeration type is incorrectly considered
to be complete. See https://llvm.org/PR169472.
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 25728f8e380096df53f3aa966068ec3a24271b30
https://github.com/llvm/llvm-project/commit/25728f8e380096df53f3aa966068ec3a24271b30
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
A llvm/test/CodeGen/AArch64/misched-postra-only1.mir
Log Message:
-----------
[MISched] Fix post-RA pickOnlyChoice debug logs (#222927)
On the way, adding a stable test for `pickOnlyChoice()` scheduling paths
directly, which has been missing, while filechecking the fixed tracing.
Commit: cad1b33322a4000bad6974b4c40ee5bff987eb89
https://github.com/llvm/llvm-project/commit/cad1b33322a4000bad6974b4c40ee5bff987eb89
Author: lntue <lntue at google.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
Log Message:
-----------
[libc] Pass correct system include flag for macOS. (#223116)
Commit: e17b8cb5341d42f805c538236771edafa737a87e
https://github.com/llvm/llvm-project/commit/e17b8cb5341d42f805c538236771edafa737a87e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/TargetParser/Triple.cpp
A llvm/test/Assembler/module-flags-thread-model.ll
A llvm/test/Linker/module-flags-thread-model.ll
A llvm/test/Verifier/module-flags-thread-model.ll
Log Message:
-----------
IR: Introduce "thread-model" module flag (#222768)
Introduce the replacement for TargetOptions::ThreadModel, but
does not yet wire up the uses. This maintains the current values,
but I question if it makes sense to retain "posix" as the default.
POSIX sounds very target opinionated, but isn't used in a non-binary
way anywhere. Alternatively we could have a simple singlethread binary
flag, or name this something more general.
Follows the precedent of float-abi. It happens the triple default
is just POSIX, but theoretically targets like AVR should be defaulting
to singlethread.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 2706780356665d560cc5a38dee91e7377a6d6002
https://github.com/llvm/llvm-project/commit/2706780356665d560cc5a38dee91e7377a6d6002
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
[InstCombine] support trunc condition in foldSelectICmpAndAnd (#223132)
Reland https://github.com/llvm/llvm-project/pull/220690 with the fix for
asan failure see fixup commit
Commit: d41121260c37b1be088995b375d074f198942114
https://github.com/llvm/llvm-project/commit/d41121260c37b1be088995b375d074f198942114
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/machine-outliner-lpad.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/MC/RISCV/tail-call.s
Log Message:
-----------
[RISCV] Add PseudoTAILX7, PseudoTAILReg for cf-protection-branch (#220657)
Previously, PseudoTAIL selected between X6 and X7 at encode time by
checking the Zicfilp feature bit via getTailExpandUseRegNo. This is
incorrect for the codegen path because -fcf-protection=branch can emit
lpad without requiring Zicfilp to be enabled.
Add PseudoTAILX7 for codegen: when cf-protection-branch is active,
ISelLowering and the machine outliner now emit PseudoTAILX7 which
always expands using X7. The existing PseudoTAIL behavior is unchanged
— it still selects X6 or X7 based on Zicfilp at encode time, as
documented in the assembler manual.
Also add PseudoTAILReg ("tail address, register") assembly form that
lets users explicitly specify the scratch register for AUIPC+JALR
expansion, per the proposed syntax in
https://github.com/riscv-non-isa/riscv-asm-manual/pull/227.
Commit: 3569a1f1d2cee5616a15a992ca49646447efaa47
https://github.com/llvm/llvm-project/commit/3569a1f1d2cee5616a15a992ca49646447efaa47
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Fix placement of FeatureSupportsXNACK (#223111)
This can't be put into 12_50_Common because of conflict in downstream
code.
Commit: 5eff11f8e9b56b1653950409355d829f48547127
https://github.com/llvm/llvm-project/commit/5eff11f8e9b56b1653950409355d829f48547127
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCA.h
M orc-rt/lib/bedrock/sps/SimpleRemoteCA.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
Log Message:
-----------
[orc-rt] Reduce SimpleRemoteCA to transport-independent utils (#223141)
Reduce SimpleRemoteCA to the transport-independent parts: opcodes, setup
and hang-up payload encoding, message validation and dispatch, and the
table of calls awaiting a result. Subclasses are now responsible for the
connection state and synchronization, since they'll usually want to
implement these things for their transports anyway (or the transport
will already manage connection-state/synchronization).
takePendingCall becomes pure virtual, since subclasses must synchronize
access to the pending-call table.
The header moves from orc-rt-internal/ to orc-rt/: with the transport a
subclass concern, there's no reason to preclude library clients from
writing one.
Commit: 1ae00a52bbe432ff8174664ce28fb33cc600f6f0
https://github.com/llvm/llvm-project/commit/1ae00a52bbe432ff8174664ce28fb33cc600f6f0
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M libc/src/__support/FPUtil/float80.h
Log Message:
-----------
[libc] Enable Float80-type for x86_32 (#221408)
Enables for x86_32 by using Uint<96>
```CPP
struct Float80 {
#if __SIZEOF_LONG_DOUBLE__ == 12
UInt<96> bits;
#else
UInt128 bits;
#endif
```
for testing it on x86_32
it needs -m32 and --msse2 extra flags other than your usual cmake for x86_32
Commit: 0adddbb3a5f7f57614e8c59c87d37cec5421e514
https://github.com/llvm/llvm-project/commit/0adddbb3a5f7f57614e8c59c87d37cec5421e514
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode][NFC] Move Remove unused CheckExtern prototype (#223146)
And add an overload taking only a Block.
Commit: 66573c1ecdc0ce1dc5f1cbd7d22974a7eb4ccf5d
https://github.com/llvm/llvm-project/commit/66573c1ecdc0ce1dc5f1cbd7d22974a7eb4ccf5d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/pointer-iv-addrec.ll
Log Message:
-----------
[SCEV] Directly form add recurrences for simple pointer IVs. (#222915)
Add support for PN = PHI(Start, gep Self, LoopInvariant) to
createSimpleAffineAddRec.
This allows to handle simple pointer IVs without going through the more
expensive createAddRecFromPHI machinery in many cases.
This is not completely NFC: previously we created SCEVUnknown for a
trivial AddRec with step 0, now we return the start value.
This gives a modest geomean compile-time decrease
* stage1-O3: -0.05%
* stage1-ReleaseThinLTO: -0.06%
* stage1-ReleaseLTO-g: -0.06%
* stage1-aarch64-O3: -0.07%
* stage2-O3: -0.05%
* clang build: -0.08%
With larger decreases for more SCEV-heavy workloads.
https://llvm-compile-time-tracker.com/compare.php?from=c1b661fde124399f0484c4b39501b37613cc4757&to=5cd19e23596c86eae9607286efe86b7a3e885a86&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/222915
Commit: e1b6027992df8846729ebfaacc9d3ac8573dd106
https://github.com/llvm/llvm-project/commit/e1b6027992df8846729ebfaacc9d3ac8573dd106
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
Log Message:
-----------
[LV] Add test for cost of widened pointer induction (NFC). (#223153)
Add a cost test where the pointer induction is used as a value and
remains a VPWidenPointerInductionRecipe.
PR: https://github.com/llvm/llvm-project/pull/223153
Commit: 345d699de809ee2962307df4ae0bd95f791275b3
https://github.com/llvm/llvm-project/commit/345d699de809ee2962307df4ae0bd95f791275b3
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Remove dead functions and declarations (NFC) (#223126)
SelectionDAG::getStore (with Offset): Added on July 31, 2026 in commit
c57b2b6103cb4bb6c4c2bee901c1eee2b966e5f0 without a definition or any
callers.
SelectionDAG::getIndexedLoadVP, SelectionDAG::getIndexedStoreVP: Added
on August 31, 2021 in commit 524ded7d01a700aa6473d09a877be13fe45b85a3
without any callers.
SelectionDAG::getTruncStridedStoreVP: Added on March 10, 2022 in commit
28cfa764c2e3d36b856b3e70d49f17088b90c1f5 without any callers.
Assisted-by: Antigravity
Commit: d7d7992e58674a2e9ad1ae42e4a627b7fff24cef
https://github.com/llvm/llvm-project/commit/d7d7992e58674a2e9ad1ae42e4a627b7fff24cef
Author: Zhige Chen <zhige_chen at outlook.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/test/tools/llubi/fp_cast.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Implement fast-math flags for `uitofp`/`sitofp` (#222858)
Closes #203773
Commit: eb9844b5ceee01c9d9fad92cbcd027c5798c5ed4
https://github.com/llvm/llvm-project/commit/eb9844b5ceee01c9d9fad92cbcd027c5798c5ed4
Author: Hamed <hamedghorbani17 at live.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/ms-setjmp.c
Log Message:
-----------
[clang][ARM] Use sponentry for setjmp on Windows ARM32 (#222366)
On Windows, _setjmp and _setjmpex take a second argument, the frame,
which the CRT stores in the jmp_buf and which longjmp later hands to
RtlUnwindEx as the frame to unwind. On aarch64, this is the stack pointer
on entry to the function, while x86_64 takes the function frame address.
ARM expects the same as aarch64 here, the stack pointer on entry.
Assisted-by: Claude Opus 5 (Anthropic)
Commit: 148ee2b266b73a49f1f31d0bd17d4818b91bee9f
https://github.com/llvm/llvm-project/commit/148ee2b266b73a49f1f31d0bd17d4818b91bee9f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/cancelled-copyable-self-use-deps.ll
Log Message:
-----------
[SLP] Fix dep accounting when cancelling a bundle with copyable elements
Restore the parent-edge copyable data as a user of the instruction only
if the cancelled element displaced it at creation (chained copyable
self-use); otherwise the extra user dependency is never released and
scheduling asserts.
Fixes #223139
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223174
Commit: ca8f82b625494996d4f9f61f30d25b62a5660dca
https://github.com/llvm/llvm-project/commit/ca8f82b625494996d4f9f61f30d25b62a5660dca
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/unittests/Support/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Restrict KnownFPClass::bitcast/toKnownBits deductions to verified FP semantics (#221133)
`KnownFPClass::bitcast` and `KnownFPClass::toKnownBits` previously made
deductions for floating-point semantics whose bit representations had
not been verified.
I have made it so `KnownFPClass::bitcast` and
`KnownFPClass::toKnownBits` return `fcAllFlags`/unknown for any
`APFloat` semantics we have not verified. Currently, this prevents
potentially invalid deductions for `PPCDoubleDouble` (mostly in regards
to the signbit and endianess). It also allows these functions to be
"safely" used with the 4/6/8 bit floating point types since we
conservatively return unknown.
Currently the list of supported/verified semantics for both `bitcast`
and `toKnownBits` are:
```
IEEEhalf
BFloat
IEEEsingle
IEEEdouble
IEEEquad
x87DoubleExtended
```
Commit: d65afea7b5c25b7be41dd86eaedaac263f04cd40
https://github.com/llvm/llvm-project/commit/d65afea7b5c25b7be41dd86eaedaac263f04cd40
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
Log Message:
-----------
[gn build] Port 0f47e798205b (#223189)
Commit: b6ca452aea0d805fd1f2f98a609e30692184a5bf
https://github.com/llvm/llvm-project/commit/b6ca452aea0d805fd1f2f98a609e30692184a5bf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Frontend/HLSL/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 4214b4601f49 (#223190)
Commit: 5d188c401f7d64daf08b7aac887d93aa5073e1dd
https://github.com/llvm/llvm-project/commit/5d188c401f7d64daf08b7aac887d93aa5073e1dd
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/SymbolTable.cpp
Log Message:
-----------
[ELF] Version scripts: simplify version suffix handling. NFC (#223194)
Use StringRef::split instead of index arithmetic.
Commit: 387c965bb013d14dbcee52098e714c27d6f98249
https://github.com/llvm/llvm-project/commit/387c965bb013d14dbcee52098e714c27d6f98249
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
R lld/test/ELF/dynamic-list-cpp.s
M lld/test/ELF/dynamic-list-glob.s
R lld/test/ELF/version-script-reassign-glob.s
A lld/test/ELF/version-script-wildcard-precedence.s
Log Message:
-----------
[ELF,test] Cover wildcard precedence in version scripts and dynamic lists (#223195)
version-script-wildcard-precedence.s, renamed from
version-script-reassign-glob.s, covers more cases.
dynamic-list-glob.s absorbs dynamic-list-cpp.s and adds an extern "C++"
wildcard, which had no --dynamic-list coverage.
Commit: 474b7358a90e4f22b04e6a0933381d239fb7044e
https://github.com/llvm/llvm-project/commit/474b7358a90e4f22b04e6a0933381d239fb7044e
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/tools/llc/CMakeLists.txt
R llvm/tools/llc/NewPMDriver.cpp
R llvm/tools/llc/NewPMDriver.h
A llvm/tools/llc/lib/CMakeLists.txt
A llvm/tools/llc/lib/NewPMDriver.cpp
A llvm/tools/llc/lib/NewPMDriver.h
A llvm/tools/llc/lib/llcdriver.cpp
R llvm/tools/llc/llcdriver.cpp
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llc] Move LLVMLlcDriver implementation into lib (#222840)
Addressing comment
[here](https://github.com/llvm/llvm-project/pull/221896#discussion_r3982250858)
Commit: 745ff71c706f6a55c7fa1cda660860925e0b2739
https://github.com/llvm/llvm-project/commit/745ff71c706f6a55c7fa1cda660860925e0b2739
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-12 (Sat, 12 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Consistently use RISCVSubtarget::is64Bit() instead of isRV32/isRV64. (#223038)
99% of code uses RISCVSubtarget::is64Bit().
Maybe we should consider removing is64Bit(), and using isRV64() instead
but right now I think we should be consistent.
Commit: 7a7cea921c3e450903b57e5f4b2992f1dce4c410
https://github.com/llvm/llvm-project/commit/7a7cea921c3e450903b57e5f4b2992f1dce4c410
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
Log Message:
-----------
[ELF] Version script: simplify wildcard matching. NFC (#223202)
Replace a loop over non-"*" wildcard patterns and another loop over "*"
with a single loop that calls the inlined
`SymbolTable::assignWildcardVersion`.
Commit: 051c49202368a8478661548b5b8de03549d9d183
https://github.com/llvm/llvm-project/commit/051c49202368a8478661548b5b8de03549d9d183
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/test/SemaCXX/ms-ctor-closure.cpp
Log Message:
-----------
[clang][test] Remove an uninitialized read in a test case (#223120)
This test case was added in
https://github.com/llvm/llvm-project/pull/222212. Its purpose is to
check that explicit constructor calls work at compile time.
However, the test case left var.a uninitialized and the copy constructor
reads an unitialized value. MSVC diagnoses this, but clang currently
fails to do so.
Change the test case to remove the unrelated problem of an uninitialized
read.
Commit: 0d55d0bf81ce2e0d6d3c46b7835efb788bde634a
https://github.com/llvm/llvm-project/commit/0d55d0bf81ce2e0d6d3c46b7835efb788bde634a
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lld/ELF/ICF.cpp
Log Message:
-----------
[ELF] Parallelize ICF's section sort. NFC (#223216)
All candidate sections are sorted by a serial stable_sort, which is a
scalability bottleneck. Switch to parallel sort using Schwartzian
transform. Linking Chromium with --icf=all (--threads=8) drops from
4.47s to 3.18s.
Commit: 8ea78db3c1bf6522ccaf6d75e73a03d80f08a00b
https://github.com/llvm/llvm-project/commit/8ea78db3c1bf6522ccaf6d75e73a03d80f08a00b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/test/Driver/wasm-toolchain.c
Log Message:
-----------
clang/WebAssembly: Add -femscripten-exceptions driver flag (#221431)
Commit: c4628f0385efd0d0d3c9d9ee0b88f89fdd4bd1f3
https://github.com/llvm/llvm-project/commit/c4628f0385efd0d0d3c9d9ee0b88f89fdd4bd1f3
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] Disable linker version scripts for Emscripten (#221647)
Emscripten reports itself as a Unix-like CMake platform, causing LLVM to
set `LLVM_HAVE_LINK_VERSION_SCRIPT` and pass GNU/ELF `--version-script`
options when linking shared libraries.
Emscripten uses `wasm-ld`, which does not support GNU version scripts
and currently reports:
```
em++: warning: ignoring unsupported linker flag: `--version-script`
```
Treat Emscripten like the other platforms without version-script
support. This prevents LLVM and Clang shared-library targets from
passing an unsupported linker option.
This was encountered while building LLVM 23.1.0 for both wasm32 and
wasm64 with Emscripten 6.x in emscripten-forge.
```
[ 45%] Building CXX object tools/clang/lib/Sema/CMakeFiles/obj.clangSema.dir/SemaExceptionSpec.cpp.o
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
.....
[100%] Linking CXX shared library ../../lib/libLTO.so
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
.....
[100%] Linking CXX shared library ../../../../lib/libclang.so
em++: warning: ignoring unsupported linker flag: `--version-script` [-Wlinkflags]
```
Commit: 4dd595b99e4e0a9c7994726065ab99d6c2b071c2
https://github.com/llvm/llvm-project/commit/4dd595b99e4e0a9c7994726065ab99d6c2b071c2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Log Message:
-----------
Wasm: Remove incorrect assumption that intrinsics cannot throw (#221180)
A few intrinsics are marked as Throws
Commit: 709ef4b96668471c7be0bd67abece4ebfce62a22
https://github.com/llvm/llvm-project/commit/709ef4b96668471c7be0bd67abece4ebfce62a22
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
A llvm/test/CodeGen/ARM/cbz-no-kill-flag.mir
Log Message:
-----------
ARM: Avoid relying on kill flags for determining CPSR liveness (#222873)
When forming CBZ/CBNZ in ARMConstantIslands, check if CPSR is live-out
of the block instead of relying on the kill flag. Kill flags have been
soft deprecated for over a decade.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 31a1c03fe67cccd917f11e5ab50cc425770c1400
https://github.com/llvm/llvm-project/commit/31a1c03fe67cccd917f11e5ab50cc425770c1400
Author: Brad Smith <brad at comstyle.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Unix/Path.inc
Log Message:
-----------
[Support] Implement getMainExecutable for OpenBSD with getexecpath() (#220141)
OpenBSD now has a proper function to retrieve the executable and path.
Commit: eae1ec7b1d6752d7d94214e4beaf724ce560aed2
https://github.com/llvm/llvm-project/commit/eae1ec7b1d6752d7d94214e4beaf724ce560aed2
Author: Pkuyo <miku_mi at foxmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
Log Message:
-----------
[SelectionDAG] Handle scalable INSERT_SUBVECTOR in ComputeNumSignBits (#221631)
Handle scalable INSERT_SUBVECTOR in SelectionDAG as a pre-fix for
#220976.
Add coverage for scalable subvectors and fixed subvectors inserted into
scalable vectors.
Commit: 3deeb018ed1d1c61ad9e1798161128e0202e7920
https://github.com/llvm/llvm-project/commit/3deeb018ed1d1c61ad9e1798161128e0202e7920
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/cancelled-copyable-self-use-deps-2.ll
Log Message:
-----------
[SLP]Fix dep accounting when cancelling a bundle with repeated copyable users
Skip duplicate users instead of stopping at the first one when walking
the operand lanes; an early stop misses a trailing self-use lane, the
displaced parent-edge copyable data is never restored, and scheduling
asserts.
Fixes #223225
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223236
Commit: f8a96032096158c992ea4cd369e43068b2b072a7
https://github.com/llvm/llvm-project/commit/f8a96032096158c992ea4cd369e43068b2b072a7
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
Log Message:
-----------
[lldb] Bound Mach-O symtab allocation to the file size (#222955)
Opening a Mach-O file whose LC_SYMTAB claims far more symbols than the
file could possibly hold makes lldb ask for hundreds of gigabytes. A
128-byte file with LC_SYMTAB.nsyms = 0x80000000 (the new unit test's
input, built with yaml2obj) reproduces it through `lldb-target-fuzzer`,
the harness that found this bug:
```
==45515== ERROR: libFuzzer: out-of-memory (malloc(171798691840))
#8 std::__1::__split_buffer<lldb_private::Symbol,...>::__split_buffer(...)
#9 std::__1::vector<lldb_private::Symbol,...>::resize(unsigned long)
#10 lldb_private::Symtab::Resize(unsigned long)
#11 ObjectFileMachO::ParseSymtab(lldb_private::Symtab&)
```
`ParseSymtab()` sizes the destination `Symtab`'s `vector<Symbol>`
directly
from `nsyms` and `nindirectsyms`, two counts read from the file's
`LC_SYMTAB` and `LC_DYSYMTAB` commands. `nlist_data`, the view already
built earlier in the function from the bytes the file actually has at
`symoff`, is far smaller than what those counts claim; the guard gating
this code only checks that it is non-empty, not how many nlist records
it can back.
Bound both counts by what `nlist_data` and `indirect_symbol_index_data`
(already clipped to the available bytes) can hold, instead of trusting
the file's counts outright.
Add a unit test whose LC_SYMTAB claims about two billion symbols in a
128-byte file; completing quickly instead of reserving that much space
is the regression check.
Assited-by: claude
Commit: 3c77eb3a3f2793a75e0ce86d96076637d5989bea
https://github.com/llvm/llvm-project/commit/3c77eb3a3f2793a75e0ce86d96076637d5989bea
Author: Stanislav Bardyuk <6258615+kodlan at users.noreply.github.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
Log Message:
-----------
[DAGCombiner] Only fold shift+mask compare to rotate if the shift amount divides the bit width (#220743)
DAGCombiner::visitSETCC can turn `(X << S) == (X & -(1 << S))` (or the
srl variant) into `rotl(X, S) == X`, and the other way around, when the
target prefers one form over the other. The two forms are only equivalent when
S divides the bit width. The check used `isPowerOf2(S)`, which is the same
thing for i8/i16/i32/i64 but not for odd widths like i3, where S = 2 is a
power of two that does not divide 3. On x86, which prefers the rotate,
the reporter's i3 function returned the wrong value for two of its eight
inputs.
This changes the `MayTransformRotate` flag passed to
`preferedOpcodeForCmpEqPiecesOfOperand` to check `NumBits % S == 0`
(with S != 0) and fixes the two comments that described the old rule. For legal
scalar types nothing changes. On illegal non power of two widths this
also lets a non power of two amount that divides the width use the rotate
(like i6 with S = 3); that is correct for the same reason and legalizes
through the usual rotate promotion, same as i6 with S = 2 did before. The x86
hook already honors the flag in both directions, so the fix lives in the
target independent code.
Tests: the i3 shl and lshr cases from the issue (must stay shift+mask), an
i6 / S = 3 case (3 divides 6, so the rotate is still allowed), and the
reporter's function.
Fixes #220542
Commit: baec9c34d1ecdbabca0cc100ed6de73986174938
https://github.com/llvm/llvm-project/commit/baec9c34d1ecdbabca0cc100ed6de73986174938
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
Log Message:
-----------
[AMDGPU] Fix fneg fold with multi use fadd/fma (#217573)
Commit: db65ace07649b2beb8cdbdfd6af4901809df9966
https://github.com/llvm/llvm-project/commit/db65ace07649b2beb8cdbdfd6af4901809df9966
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
Revert "[Clang] Refactor instantiation of declarations within concepts" (#223235)
This reverts llvm/llvm-project#221707
This broke std::map as reported in
https://github.com/llvm/llvm-project/issues/223220
Commit: d283a555109576cd92b35a88b4d110166043fb77
https://github.com/llvm/llvm-project/commit/d283a555109576cd92b35a88b4d110166043fb77
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/OffloadTools/clang-nvlink-wrapper/nvlink-wrapper.c
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
Log Message:
-----------
[clang-nvlink-wrapper] Fix response file handling for the nvlink wrapper (#220249)
Summary:
Response files were not handled correctly because the copied support
used the `nvlink` argument which is not supported by the argument
parser. Pass to the nvlink wrapper using the canonical format and then
reconstruct it when we execute the sub jobs
Fixes: https://github.com/llvm/llvm-project/issues/219914
Commit: 3409d079b5b76d0cdd51526b29aebd4143ecca64
https://github.com/llvm/llvm-project/commit/3409d079b5b76d0cdd51526b29aebd4143ecca64
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/logical-binops-booleanized-leaves.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed widened boolean optimization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223245
Commit: ca2424325cd9247ac0c11cd2d1c8ea3fb07ab16e
https://github.com/llvm/llvm-project/commit/ca2424325cd9247ac0c11cd2d1c8ea3fb07ab16e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Reject guaranteed tail calls in call lowering (#216260)
The FPDiff immediate was being written to the wrong operand, corrupting
the callee GlobalAddress
Reject required tail calls like SelectionDAG does, and fix the stale
index for the one path that still needs it (cs.chain lowering)
Commit: 0c324f10322b490d66de738d73458f6f65460cdb
https://github.com/llvm/llvm-project/commit/0c324f10322b490d66de738d73458f6f65460cdb
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
Log Message:
-----------
[Support] Fix the return type of AddOverflow, SubOverflow, and MulOverflow (#223217)
This patch fixes the return type of the 3-argument overloads of
AddOverflow, SubOverflow, and MulOverflow to bool.
Without this patch, these functions are declared with a return type
of T:
template <typename T>
std::enable_if_t<std::is_signed_v<T>, T> AddOverflow(T X, T Y, T
&Result);
even though they return a boolean indicating whether an overflow
occurred, as stated in the comment:
/// Add two signed integers, computing the two's complement truncated
result,
/// returning true if overflow occurred.
Assisted-by: Antigravity
Commit: 23f2e449afa0b0de43939a03ea241bc17dfe1141
https://github.com/llvm/llvm-project/commit/23f2e449afa0b0de43939a03ea241bc17dfe1141
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Log Message:
-----------
[SelectionDAG] Remove unused float promotion in DAGTypeLegalizer (NFC) (#223219)
This patch removes PromotedFloats along with GetPromotedFloat and
SetPromotedFloat. The Mapped bitmask in PerformExpensiveChecks is
adjusted accordingly, shifting the bit for SoftPromotedHalfs.
The last uses of DAGTypeLegalizer::GetPromotedFloat and
DAGTypeLegalizer::SetPromotedFloat were removed on January 26, 2026 in
commit a7d48bd305ef3aa4bd543da6f4cd8682a3d35c32 when TypePromoteFloat
and its associated DAG machinery were removed.
With these accessors gone, DAGTypeLegalizer::PromotedFloats is no longer
populated.
Assisted-by: Antigravity
Commit: c67808cf4426290e259f2cd4bd1a48516f9b8d7b
https://github.com/llvm/llvm-project/commit/c67808cf4426290e259f2cd4bd1a48516f9b8d7b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[OpenMP] Change association of some directives from "none" to "explicit" (#222703)
Certain declarative directives are associated with base language
declarations by having the declared entities explicitly listed as
arguments.
Previously these had "none" in OMP.td. Change them to "explicit" to be
consistent with the spec. The existing code does not require any
changes, since the only potentially affected code would be that which
checked the assocation for "none", and the only such cases were applied
to executable directives.
Commit: 483af6c1be7ca13eda7cc5314bb93185d21b272a
https://github.com/llvm/llvm-project/commit/483af6c1be7ca13eda7cc5314bb93185d21b272a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[OpenMP] Add definitions for REDUCTION_KIND and SHIFT clauses (#222745)
This is a barebones change to introduce the enum identifiers for these
clauses.
Commit: 240670d0d5dcd649bd3728871087c938b5e097f2
https://github.com/llvm/llvm-project/commit/240670d0d5dcd649bd3728871087c938b5e097f2
Author: MaoJiaping <maojiaping1 at huawei.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
A llvm/include/llvm/Transforms/Utils/SplitModuleCommon.h
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/SplitModule.cpp
A llvm/lib/Transforms/Utils/SplitModuleCommon.cpp
M llvm/test/tools/llvm-split/unnamed.ll
Log Message:
-----------
[NFC][ModuleUtils] Move externalize() from module splitting utilities (#221181)
`SplitModule.cpp` and `AMDGPUSplitModule.cpp` each carry an identical
static `externalize()` helper that promotes local-linkage globals to
external + hidden visibility and assigns a stable name to unnamed
entities, so they are named consistently across module partitions.
This patch removes the duplication by moving the helper into
`ModuleUtils` as `llvm::externalize`, and updates both users to call the
shared implementation. No functional changes are intended.
This also prepares for upcoming module splitting utilities to reuse a
single, canonical implementation.
Development of this patch was assisted by AI and reviewed by me.
Commit: 860fb775d3d626af6e4a45ea5d62039718957d26
https://github.com/llvm/llvm-project/commit/860fb775d3d626af6e4a45ea5d62039718957d26
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.h
M llvm/test/Transforms/SLPVectorizer/X86/logical-reduction-booleanized-leaves.ll
Log Message:
-----------
[SLP]Reduce logical and/or reductions in the wide leaf type
Logical and/or reductions on i1 with booleanized wide leaves (truncs
of same-op chains, zero-tests of values from [0, 1]) are performed in
the wide type, exposing the underlying consecutive values to the tree;
bit 0 of the result is the final value. Fixes the fragmented reduction
and the gather-of-scalars regression for compile-time-expanded Boolean
reductions.
Fixes #221167
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/221321
Commit: 588304bdb9ee0a9c8229db8c702415e80d05ad33
https://github.com/llvm/llvm-project/commit/588304bdb9ee0a9c8229db8c702415e80d05ad33
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/and-neg-pow2-copyable.ll
Log Message:
-----------
[SLP]Model copyable lanes of idempotent binops as op(V, V) when the operand column has a constant lane
The op(V, identity) form lets the reorder move the lane out of the
joined column, breaking the opcode-peer node; the symmetric form is
reorder-proof.
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/220252
Commit: f4ecba36726d6bede2ab58890dfcc861c2bb28a9
https://github.com/llvm/llvm-project/commit/f4ecba36726d6bede2ab58890dfcc861c2bb28a9
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Unify and refine interested classes for `KnownFPClass::log` (#219751)
Previously, `ValueTracking` and `GISelValueTracking` only called
`KnownFPClass::log` when the requested classes included NaN or infinity.
As a result, narrowly interested queries could miss unconditional
deductions, for example, `log(x)` is never subnormal or negative zero
(With the exception of `PPCDoubleDouble`
https://github.com/llvm/llvm-project/issues/217658).
This change makes the interested-class handling consistent between
`ValueTracking` and `GISelValueTracking`. The source is queried only
when its classes are needed, but `KnownFPClass::log` is always called so
its unconditional deductions are preserved.
Future work:
- Fixing `KnownFPClass::log` for `PPCDoubleDouble`.
AI disclosure:
I used OpenAI Codex (sol 5.6) to help write the unit tests, which I
reviewed and ran locally.
Commit: c1f1a288ccd67f9b9dadefda9c510aa7568022e7
https://github.com/llvm/llvm-project/commit/c1f1a288ccd67f9b9dadefda9c510aa7568022e7
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Complete upstream vector saturating shift left NEON builtins (#221507)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for the vector saturating shift left intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-saturating-shift-left).
This completes the family.
Port tests from `clang/test/CodeGen/AArch64/neon-intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/intrinsics.c`.
Commit: 0eac970fa7478ddf0083dc2a0a5c476ca3bb615a
https://github.com/llvm/llvm-project/commit/0eac970fa7478ddf0083dc2a0a5c476ca3bb615a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
Log Message:
-----------
RegisterCoalescer: Remove empty subranges after merging subranges (#222050)
Merging subranges in joinVirtRegs didn't try to clear empty ranges after
refineSubRanges, manifesting in an assert in overlaps checks later.
Exposed with subregister liveness once LiveIntervals runs before
TwoAddress.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: cff226a5716e4bc3589d4869066ea6687ed142ce
https://github.com/llvm/llvm-project/commit/cff226a5716e4bc3589d4869066ea6687ed142ce
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/sadd-with-overflow.ll
Log Message:
-----------
[ConstraintElim] Fold sadd.with.overflow with a constant op. (#223239)
Generalize the overflow-math simplification to also allow simplifying
sadd.with.overflow if the second operand is constant, using
makeGuaranteedNoWrapRegion.
Note that this partially overlaps with the flag strengthening logic.
I'll share a patch soon to try to unify the code more.
No improvements in llvm-opt-benchmarks-nightly. It improves end-to-end
optimizations for Swift (which emits a lot of checked arithmetic) and
also Clang + UBsan.
An end-to-end improvement with overflow intrinsics is
https://llvm.godbolt.org/z/6nrj7aodd.
PR: https://github.com/llvm/llvm-project/pull/223239
Commit: 979b374a7ca7adc936d9339c1db79b0d6cda06db
https://github.com/llvm/llvm-project/commit/979b374a7ca7adc936d9339c1db79b0d6cda06db
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
Log Message:
-----------
[AggressiveInstCombine] Fix terminology in a few comments (NFC) (#222327)
Fix the comments (and a debug print) that say "dominated by trunc"
rather than "post-dominated".
Also fixes a Doxygen syntax (use \p instead of /p) and fix
capitalization in the middle of a sentence.
Commit: 48cc2ba423cdad35cddc604c0136c997b29d41b0
https://github.com/llvm/llvm-project/commit/48cc2ba423cdad35cddc604c0136c997b29d41b0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-13 (Sun, 13 Sep 2026)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
M .github/workflows/release-binaries.yml
M .mailmap
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Passes/LivenessAnalysis.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/FixRISCVCallsPass.cpp
M bolt/lib/Passes/MCF.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.h
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
A bolt/test/AArch64/edge-weight-estimation-fixes.s
A bolt/test/AArch64/materialize-constant.s
M bolt/test/RISCV/call-link-register.s
A bolt/test/RISCV/call-relocation-pair.s
A bolt/test/RISCV/conditional-tail-call-relocs.s
M bolt/test/RISCV/relax.s
A bolt/test/RISCV/unsymbolized-call-edge.s
A bolt/test/RISCV/unsymbolized-call-entry.s
A bolt/test/RISCV/unsymbolized-call.s
A bolt/test/RISCV/unsymbolized-long-jump.s
A bolt/test/X86/icp-pic.s
M bolt/unittests/Core/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/clang-tidy/readability/ConvertMemberFunctionsToStaticCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.h
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/index/YAMLSerialization.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
M clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/clangd/unittests/SerializationTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.md
R clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/function-size.md
R clang-tools-extra/docs/clang-tidy/checks/readability/function-size.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.md
R clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.md
R clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.md
R clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.md
R clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.md
R clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.md
R clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
R clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.rst
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/convert-member-functions-to-static.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-allow-trailing-underscore.cpp
M clang/CMakeLists.txt
M clang/Maintainers.md
M clang/bindings/python/clang/cindex.py
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M clang/docs/BoundsSafety.md
M clang/docs/BoundsSafetyAdoptionGuide.md
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M clang/docs/CIR/ABILowering.md
M clang/docs/CIR/CleanupAndEHDesign.md
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M clang/docs/CXXTypeAwareAllocators.md
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M clang/test/CIR/Transforms/abi-lowering/x86_64-wide-floats.cir
M clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
M clang/test/CIR/Transforms/hoist-allocas.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/test/CIR/Transforms/lib-opt.cpp
M clang/test/CIR/lib/Analysis/CMakeLists.txt
M clang/test/CMakeLists.txt
M clang/test/CXX/stmt.stmt/stmt.iter/stmt.ranged/p1.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
A clang/test/CodeGen/AArch64/neon/rounding.c
M clang/test/CodeGen/AArch64/sme-inline-callees-streaming-attrs.c
M clang/test/CodeGen/AArch64/targetattr.c
R clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
M clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
M clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/CodeGen/X86/x86_64-atomic-abi.c
M clang/test/CodeGen/attr-counted-by-with-sanitizers.c
M clang/test/CodeGen/attr-counted-by-without-sanitizers.c
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/compound-literal-lifetime.c
A clang/test/CodeGen/keep-inline-functions.c
A clang/test/CodeGen/keep-inline-functions.cpp
A clang/test/CodeGen/keep-inline-functions.cppm
M clang/test/CodeGen/ms-setjmp.c
M clang/test/CodeGen/pr4349.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGen/unique-internal-linkage-names.cpp
M clang/test/CodeGenCUDA/fp-contract.cu
A clang/test/CodeGenCUDA/pure_deleted_virtual.cu
M clang/test/CodeGenCUDASPIRV/kernel-cc.cu
A clang/test/CodeGenCXX/GH128985.cpp
A clang/test/CodeGenCXX/Inputs/embed-data.txt
M clang/test/CodeGenCXX/constructor-attr.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenCoroutines/coro-destructor-of-final_suspend.cpp
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenHIP/hipspv-kernel.cpp
A clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
M clang/test/CodeGenHLSL/builtins/select.hlsl
M clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default.hlsl
M clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/CodeGenHLSL/semantics/DispatchThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/CodeGenObjC/arc-ternary-op.m
M clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm
M clang/test/CodeGenOpenCL/address-spaces-conversions.cl
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/DebugInfo/CXX/verbose-trap.cpp
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.c
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.cpp
A clang/test/Driver/aarch64-mcpu-no-feat.c
M clang/test/Driver/arm-sb.c
M clang/test/Driver/clang_f_opts.c
A clang/test/Driver/fkeep-inline-functions.c
M clang/test/Driver/modules-driver-depscan-log.cpp
A clang/test/Driver/nodefaultrtlibs.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/wasm-toolchain.c
A clang/test/Frontend/optimization-remark-target-features-aarch64.c
A clang/test/Frontend/optimization-remark-target-features-arm.c
M clang/test/Headers/hip-header.hip
M clang/test/Misc/cc1as-darwin-target-variant-sdk-version.s
M clang/test/Misc/cc1as-darwin-target-variant-triple.s
M clang/test/Misc/target-invalid-cpu-note/riscv.c
A clang/test/Modules/odr-hash-using-declarations.cppm
A clang/test/Modules/pr222002.cppm
M clang/test/Modules/pr76638.cppm
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M clang/test/OffloadTools/clang-nvlink-wrapper/nvlink-wrapper.c
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/bug60602.cpp
A clang/test/OpenMP/debug-info-ompirbuilder-handoff.c
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/for_reduction_task_codegen.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/nvptx_SPMD_codegen.cpp
M clang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
M clang/test/OpenMP/nvptx_target_pure_deleted_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_if_codegen_PR51349.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_complex.c
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/scope_codegen.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_codegen_global_capture.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_map_codegen_03.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_tl_codegen.cpp
M clang/test/OpenMP/target_parallel_for_tl_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-2.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_tl_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_parallel_if_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_tl_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_teams_reduction_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
A clang/test/Parser/cuda-operator-lesslessless.cu
M clang/test/Parser/recovery.cpp
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/Sema/assign.c
M clang/test/Sema/attr-c2x.c
M clang/test/Sema/builtins.c
M clang/test/Sema/constant-conversion.c
A clang/test/Sema/global-explicit-register-undefined-type.c
A clang/test/Sema/riscv-pget-index-out-of-range.c
M clang/test/Sema/scope-check.c
M clang/test/Sema/typo-correction.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/Sema/warn-strlcpycat-size.c
M clang/test/SemaCUDA/global-initializers.cu
A clang/test/SemaCXX/GH128985.cpp
M clang/test/SemaCXX/MicrosoftSuper.cpp
A clang/test/SemaCXX/altivec-vec-msum-p9.cpp
M clang/test/SemaCXX/builtin_vectorelements.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
M clang/test/SemaCXX/delete-non-virtual-dtor.cpp
M clang/test/SemaCXX/dllimport.cpp
R clang/test/SemaCXX/gh147127.cpp
A clang/test/SemaCXX/imag-lvalue-with-non-complex-operand.cpp
M clang/test/SemaCXX/ms-ctor-closure.cpp
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaCXX/ptrauth-type-discriminator.cpp
A clang/test/SemaCXX/vector-shuffle.cpp
M clang/test/SemaCXX/warn-implicit-unicode-conversions.cpp
A clang/test/SemaHIP/atomic-init.hip
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ms.input.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ps.output.hlsl
M clang/test/SemaHLSL/Semantics/groupindex.hlsl
M clang/test/SemaHLSL/Semantics/invalid_entry_parameter.hlsl
A clang/test/SemaHLSL/Semantics/output-parameters.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
A clang/test/SemaHLSL/Semantics/semantic-indexing.hlsl
M clang/test/SemaHLSL/Semantics/target.ps.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.output.hlsl
M clang/test/SemaHLSL/Semantics/vertexid.ps.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
A clang/test/SemaOpenCLCXX/vec_step.clcpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/test/TableGen/DiagnosticDocs.inc
A clang/test/TableGen/diag-docs-determinism.td
M clang/test/TableGen/emit-diag-docs.td
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.all.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.all.expected
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-lsp-server/cir-lsp-server.cpp
M clang/tools/cir-opt/CMakeLists.txt
M clang/tools/cir-translate/CMakeLists.txt
M clang/tools/cir-translate/cir-translate.cpp
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
M clang/unittests/AST/TypePrinterTest.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M clang/unittests/CodeGen/CMakeLists.txt
A clang/unittests/CodeGen/QualTypeMapperTest.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/asan/asan_win_common_runtime_thunk.h
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMerge.cpp
M compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
M compiler-rt/lib/msan/tests/msan_test.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.h
M compiler-rt/lib/scudo/standalone/release.h
M compiler-rt/lib/scudo/standalone/tests/release_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/ubsan/ubsan_handlers.cpp
M compiler-rt/test/asan/TestCases/complete_stack_trace.c
M compiler-rt/test/fuzzer/fork.test
M compiler-rt/test/fuzzer/fork_corpus_groups.test
M compiler-rt/test/fuzzer/fuzzer-dirs.test
M compiler-rt/test/fuzzer/fuzzer-finalstats.test
M compiler-rt/test/fuzzer/fuzzer-oom-with-profile.test
M compiler-rt/test/fuzzer/fuzzer-oom.test
M compiler-rt/test/fuzzer/stop-file.test
M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-warnings.ll
A compiler-rt/test/sanitizer_common/TestCases/Linux/opendir_null.cpp
R compiler-rt/test/sanitizer_common/TestCases/Posix/opendir_null.cpp
A compiler-rt/test/tsan/Darwin/os_unfair_lock_deadlock.c
A compiler-rt/test/tsan/Darwin/trylock_no_deadlock.c
M compiler-rt/test/tsan/Darwin/write-interpose.c
A compiler-rt/test/tsan/Linux/epoll_oneshot_norace.cpp
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/include/flang-rt/runtime/stat.h
A flang-rt/include/flang-rt/runtime/unit.h
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/execute.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api-common.h
M flang-rt/lib/runtime/io-api-minimal.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt-minimal.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/stat.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/unit-map.h
M flang-rt/lib/runtime/unit.cpp
R flang-rt/lib/runtime/unit.h
A flang-rt/test/Driver/iotype.f90
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/ChildIO.cpp
M flang/CMakeLists.txt
M flang/docs/CMakeLists.txt
M flang/docs/Extensions.md
M flang/docs/FlangOptionsDocs.td
M flang/docs/FlangOptionsMan.td
M flang/docs/Intrinsics.md
A flang/docs/MeetingNotes/2026/2026-09-09.md
M flang/docs/OpenMPSupport.md
M flang/docs/ReleaseNotes.md
M flang/include/flang/Evaluate/common.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
A flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/HLFIR/Passes.h
M flang/include/flang/Optimizer/HLFIR/Passes.td
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
A flang/include/flang/Optimizer/Support/AllocationPolicy.h
R flang/include/flang/Optimizer/Transforms/AllocationPlacementPolicy.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/runtime-type-info.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
A flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRCopy.cpp
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCRecipeBufferization.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/lib/Optimizer/Support/AllocationPolicy.cpp
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFLaunchAttachAttr.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-data.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-namelist.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/type.cpp
M flang/lib/Utils/OpenMP.cpp
A flang/test/Driver/allocation-policy.f90
M flang/test/Driver/driver-help.f90
M flang/test/Driver/flang-f-opts.f90
M flang/test/Driver/frame-pointer-forwarding.f90
M flang/test/Driver/target-cpu-features.f90
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/OpenACC/acc-declare-gpu-module-insertion.fir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-attach.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-clauses.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-declare-global.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-exit.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-implicit-present.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-privatize.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep-types.mlir
A flang/test/Fir/OpenACC/acc-fir-map-info-prep.mlir
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
A flang/test/Fir/OpenACC/support-analysis-varname.mlir
A flang/test/Fir/allocation-policy-attr.fir
A flang/test/Fir/allocation-policy-pipeline.fir
A flang/test/Fir/call-properties.fir
M flang/test/Fir/convert-fold.fir
M flang/test/Fir/convert-nontemporal-to-llvm.fir
M flang/test/Fir/convert-to-llvm-access-group.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/tbaa.fir
M flang/test/Fir/vector-always-cfg.fir
A flang/test/HLFIR/inline-hlfir-copy-stack.fir
M flang/test/HLFIR/inline-hlfir-copy.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
A flang/test/Lower/CUDA/scalar-to-array-assign-device-O0.cuf
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-declare-globals.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/threadset.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/default-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/implicit-default-mapper-allocatable-field.f90
M flang/test/Lower/OpenMP/implicit-mapper-no-pointer-map.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate-derived-warning.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate-save-warning.f90
A flang/test/Lower/OpenMP/omp-lib-integer-wrappers.f90
A flang/test/Lower/OpenMP/threadset.f90
M flang/test/Lower/math-lowering/exponentiation.f90
M flang/test/Lower/module-parameter-linkonce-odr.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
A flang/test/Lower/split-sum-expression-tree-subscripts.f90
A flang/test/Parser/recovery10.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure-version.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure.f90
M flang/test/Semantics/OpenMP/pure-procedure.f90
A flang/test/Semantics/OpenMP/threadset-clause-v60.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
A flang/test/Semantics/data27.f90
A flang/test/Semantics/enumeration-type-intrinsics-array-fold.f90
A flang/test/Semantics/enumeration-type-intrinsics-gating.f90
A flang/test/Semantics/enumeration-type-intrinsics-keyword.f90
A flang/test/Semantics/enumeration-type-intrinsics-nonenum.f90
A flang/test/Semantics/enumeration-type-intrinsics.f90
A flang/test/Semantics/enumeration-type-io-pdt-order.f90
A flang/test/Semantics/enumeration-type-io.f90
A flang/test/Semantics/enumeration-type-mod-readback.F90
A flang/test/Semantics/enumeration-type-mod.f90
A flang/test/Semantics/modfile86.f90
A flang/test/Semantics/modfile87.f90
A flang/test/Semantics/resolve132.f90
A flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M flang/test/Transforms/allocation-placement.fir
A flang/test/Transforms/allocation-policy-precedence.fir
A flang/test/Transforms/debug-line-table-no-types.fir
M flang/test/Transforms/debug-omp-target-op-1.fir
A flang/test/Transforms/function-attr-frame-pointer.fir
M flang/test/Transforms/licm.fir
R flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
R flang/test/Transforms/omp-map-info-finalization-usm.fir
M flang/test/lib/OpenACC/CMakeLists.txt
A flang/test/lib/OpenACC/TestOpenACCSupport.cpp
M flang/tools/bbc/bbc.cpp
M flang/tools/fir-opt/fir-opt.cpp
A flang/unittests/Optimizer/AliasAnalysisRecursiveEffectsCacheTest.cpp
M flang/unittests/Optimizer/CMakeLists.txt
M flang/unittests/Optimizer/OpenACC/FIROpenACCSupportAnalysisTest.cpp
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/aarch64/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
R libc/docs/_static/copybutton.js
M libc/docs/conf.py
M libc/docs/dev/code_coverage.md
M libc/docs/headers/stdfix.rst
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/hdr/CMakeLists.txt
A libc/hdr/glob_macros.h
A libc/hdr/sys_file_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/glob_t.h
A libc/hdr/types/pthread_attr_t.h
M libc/include/CMakeLists.txt
A libc/include/glob.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/darwin/CMakeLists.txt
A libc/include/llvm-libc-macros/darwin/signal-macros.h
A libc/include/llvm-libc-macros/glob-macros.h
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/netdb-macros.h
A libc/include/llvm-libc-macros/linux/sys-file-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-macros/signal-macros.h
A libc/include/llvm-libc-macros/sys-file-macros.h
M libc/include/llvm-libc-macros/sys-mman-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/__jmp_buf.h
M libc/include/llvm-libc-types/fenv_t.h
A libc/include/llvm-libc-types/glob_t.h
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/netdb.yaml
M libc/include/pthread.yaml
M libc/include/signal.yaml
M libc/include/stdfix.yaml
M libc/include/stdio.yaml
M libc/include/stdlib.yaml
A libc/include/sys/file.yaml
M libc/include/sys/mman.yaml
M libc/include/sys/stat.yaml
M libc/include/unistd.yaml
M libc/include/wchar.yaml
M libc/lib/CMakeLists.txt
M libc/shared/rpc.h
M libc/src/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
A libc/src/__support/CPP/vector.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/float80.h
M libc/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/sigprocmask.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/flock.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/raise.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/tgkill.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/umask.h
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/__support/printf_core/CMakeLists.txt
M libc/src/__support/printf_core/char_converter.h
M libc/src/__support/printf_core/converter.h
M libc/src/__support/printf_core/core_structs.h
M libc/src/__support/printf_core/fixed_converter.h
M libc/src/__support/printf_core/float_dec_converter.h
M libc/src/__support/printf_core/float_dec_converter_limited.h
M libc/src/__support/printf_core/float_hex_converter.h
M libc/src/__support/printf_core/float_inf_nan_converter.h
M libc/src/__support/printf_core/int_converter.h
A libc/src/__support/printf_core/overflow_modes.def
M libc/src/__support/printf_core/parser.h
M libc/src/__support/printf_core/printf_main.h
M libc/src/__support/printf_core/ptr_converter.h
M libc/src/__support/printf_core/strerror_converter.h
M libc/src/__support/printf_core/string_converter.h
M libc/src/__support/printf_core/vasprintf_internal.h
M libc/src/__support/printf_core/vfprintf_internal.h
M libc/src/__support/printf_core/write_int_converter.h
R libc/src/__support/printf_core/write_modes.def
M libc/src/__support/printf_core/writer.h
A libc/src/__support/pwd/CMakeLists.txt
A libc/src/__support/pwd/field_tokenizer.h
A libc/src/__support/pwd/flat_file_db.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/tlsf_table.h
M libc/src/__support/wctype_utils.h
M libc/src/err/report.cpp
A libc/src/glob/CMakeLists.txt
A libc/src/glob/glob.cpp
A libc/src/glob/glob.h
A libc/src/glob/globfree.cpp
A libc/src/glob/globfree.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getschedpolicy.cpp
A libc/src/pthread/pthread_attr_getschedpolicy.h
A libc/src/pthread/pthread_attr_getscope.cpp
A libc/src/pthread/pthread_attr_getscope.h
M libc/src/pthread/pthread_attr_init.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.h
A libc/src/pthread/pthread_attr_setscope.cpp
A libc/src/pthread/pthread_attr_setscope.h
A libc/src/pthread/pthread_getattr_np.cpp
M libc/src/pthread/pthread_getattr_np.h
M libc/src/pwd/CMakeLists.txt
R libc/src/pwd/field_tokenizer.h
R libc/src/pwd/flat_file_db.h
M libc/src/pwd/pwd_utils.cpp
M libc/src/pwd/pwd_utils.h
M libc/src/setjmp/aarch64/sigsetjmp.cpp
M libc/src/setjmp/darwin/CMakeLists.txt
M libc/src/setjmp/darwin/sigsetjmp_epilogue.cpp
M libc/src/setjmp/longjmp.h
M libc/src/setjmp/setjmp_impl.h
M libc/src/signal/CMakeLists.txt
A libc/src/signal/darwin/CMakeLists.txt
A libc/src/signal/darwin/sigaddset.cpp
A libc/src/signal/darwin/sigdelset.cpp
A libc/src/signal/darwin/sigemptyset.cpp
A libc/src/signal/darwin/sigfillset.cpp
A libc/src/signal/darwin/sigprocmask.cpp
M libc/src/signal/linux/CMakeLists.txt
A libc/src/signal/linux/pthread_kill.cpp
A libc/src/signal/pthread_kill.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/kdivi.cpp
A libc/src/stdfix/kdivi.h
A libc/src/stdfix/lkdivi.cpp
A libc/src/stdfix/lkdivi.h
A libc/src/stdfix/lrdivi.cpp
A libc/src/stdfix/lrdivi.h
M libc/src/stdfix/rdivi.cpp
M libc/src/stdfix/rdivi.h
A libc/src/stdfix/ukdivi.cpp
A libc/src/stdfix/ukdivi.h
A libc/src/stdfix/ulkdivi.cpp
A libc/src/stdfix/ulkdivi.h
A libc/src/stdfix/ulrdivi.cpp
A libc/src/stdfix/ulrdivi.h
A libc/src/stdfix/urdivi.cpp
A libc/src/stdfix/urdivi.h
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/baremetal/vfprintf_internal.h
A libc/src/stdio/fmemopen.cpp
A libc/src/stdio/fmemopen.h
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/snprintf_modular.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/sprintf_modular.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsnprintf_modular.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdio/vsprintf_modular.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/mkdtemp.cpp
A libc/src/stdlib/linux/mkstemp.cpp
A libc/src/stdlib/linux/mktemp_util.h
A libc/src/stdlib/mkdtemp.h
R libc/src/stdlib/mkstemp.cpp
M libc/src/stdlib/mkstemp.h
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/sys/CMakeLists.txt
A libc/src/sys/file/CMakeLists.txt
A libc/src/sys/file/flock.h
A libc/src/sys/file/linux/CMakeLists.txt
A libc/src/sys/file/linux/flock.cpp
M libc/src/sys/stat/CMakeLists.txt
A libc/src/sys/stat/futimens.h
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/futimens.cpp
A libc/src/sys/stat/linux/umask.cpp
A libc/src/sys/stat/umask.h
M libc/src/time/asctime_utils.h
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/composite_converter.h
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
M libc/src/time/strftime_core/strftime_main.h
M libc/src/time/strftime_l.cpp
M libc/src/unistd/CMakeLists.txt
A libc/src/unistd/execl.h
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/execl.cpp
M libc/src/unistd/linux/execle.cpp
M libc/src/unistd/linux/sysconf.cpp
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscasecmp.cpp
A libc/src/wchar/wcscasecmp.h
A libc/src/wchar/wcsncasecmp.cpp
A libc/src/wchar/wcsncasecmp.h
M libc/test/UnitTest/CMakeLists.txt
A libc/test/UnitTest/CharLiteralUtils.h
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/UnitTest/StringUtils.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_getattr_np_test.cpp
A libc/test/integration/src/pthread/pthread_kill_test.cpp
M libc/test/integration/src/unistd/CMakeLists.txt
A libc/test/integration/src/unistd/execl_test.cpp
A libc/test/integration/src/unistd/execl_test_normal_exit.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/stringview_test.cpp
A libc/test/src/__support/CPP/vector_test.cpp
A libc/test/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/test/src/__support/OSUtil/darwin/sigprocmask_test.cpp
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/converter_test.cpp
M libc/test/src/__support/printf_core/parser_test.cpp
M libc/test/src/__support/printf_core/writer_test.cpp
A libc/test/src/__support/pwd/CMakeLists.txt
A libc/test/src/__support/pwd/field_tokenizer_test.cpp
A libc/test/src/__support/pwd/flat_file_db_test.cpp
M libc/test/src/__support/tlsf_table_test.cpp
M libc/test/src/__support/wctype_utils_test.cpp
A libc/test/src/glob/CMakeLists.txt
A libc/test/src/glob/glob_test.cpp
M libc/test/src/netdb/CMakeLists.txt
A libc/test/src/netdb/getaddrinfo_test.cpp
R libc/test/src/netdb/netdb_test.cpp
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
M libc/test/src/pwd/CMakeLists.txt
R libc/test/src/pwd/field_tokenizer_test.cpp
R libc/test/src/pwd/flat_file_db_test.cpp
M libc/test/src/signal/sigaddset_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
M libc/test/src/stdfix/CMakeLists.txt
R libc/test/src/stdfix/DivITest.h
A libc/test/src/stdfix/FxDiviTest.h
A libc/test/src/stdfix/kdivi_test.cpp
A libc/test/src/stdfix/lkdivi_test.cpp
A libc/test/src/stdfix/lrdivi_test.cpp
M libc/test/src/stdfix/rdivi_test.cpp
A libc/test/src/stdfix/ukdivi_test.cpp
A libc/test/src/stdfix/ulkdivi_test.cpp
A libc/test/src/stdfix/ulrdivi_test.cpp
A libc/test/src/stdfix/urdivi_test.cpp
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/fmemopen_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/mkdtemp_test.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/file/CMakeLists.txt
A libc/test/src/sys/file/linux/CMakeLists.txt
A libc/test/src/sys/file/linux/flock_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/futimens_test.cpp
A libc/test/src/sys/stat/umask_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/sysconf_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscasecmp_test.cpp
A libc/test/src/wchar/wcsncasecmp_test.cpp
M libc/utils/cmake_format.py
M libc/utils/cmake_format_test.py
M libc/utils/docgen/wchar.yaml
M libclc/clc/lib/generic/math/clc_fmod.cl
M libcxx/CMakeLists.txt
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__atomic/to_gcc_order.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config
M libcxx/include/__configuration/language.h
M libcxx/include/__hash_table
M libcxx/include/__locale_dir/ctype_base.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/support/aix.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/llvm_libc.h
M libcxx/include/__locale_dir/support/newlib.h
M libcxx/include/__locale_dir/support/openbsd.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/include/__locale_dir/wbuffer_convert.h
M libcxx/include/__locale_dir/wstring_convert.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/__optional/optional.h
M libcxx/include/__optional/optional_ref.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/minmax_element.h
M libcxx/include/__ranges/lazy_split_view.h
M libcxx/include/__tree
M libcxx/include/__utility/declval.h
M libcxx/include/__utility/try_key_extraction.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/barrier
M libcxx/include/condition_variable
M libcxx/include/locale
M libcxx/include/module.modulemap.in
M libcxx/include/mutex
M libcxx/include/shared_mutex
M libcxx/include/tuple
M libcxx/include/vector
M libcxx/src/locale.cpp
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
M libcxx/test/libcxx/atomics/clear_padding.pass.cpp
M libcxx/test/libcxx/diagnostics/unused_variables.verify.cpp
M libcxx/test/libcxx/thread/nodiscard.verify.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.ctor.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_until_comp.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element_comp.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
M libcxx/test/std/containers/associative/set/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace_back.pass.cpp
M libcxx/test/std/containers/unord/unord.set/emplace.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/ctor.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_codecvt.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_err_string.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/end.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.compile.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.default.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.iter.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer/deref.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/view_interface.pass.cpp
M libcxx/test/std/thread/thread.condition/thread.condition.condvarany/default.pass.cpp
A libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.verify.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/greater.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/greater_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/less_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/less_than.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/not_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.monadic/transform.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/greater_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/greater_than.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/less_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/less_than.pass.cpp
M libcxx/test/std/utilities/optional/optional.relops/not_equal.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/make_from_tuple.pass.cpp
M libcxx/test/std/utilities/variant/variant.relops/three_way.pass.cpp
M libcxx/test/support/test_comparisons.h
M libcxxabi/CMakeLists.txt
M libsycl/Maintainers.md
M libsycl/docs/index.md
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/exception.hpp
A libsycl/include/sycl/__impl/group_barrier.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
A libsycl/include/sycl/__spirv/spirv_types.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/exception.cpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
A libsycl/test/basic/context.cpp
A libsycl/test/basic/group_barrier.cpp
A libsycl/test/basic/group_barrier_device_code.cpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/unittests/CMakeLists.txt
A libsycl/unittests/context/CMakeLists.txt
A libsycl/unittests/context/context_ctors.cpp
A libsycl/unittests/exception/CMakeLists.txt
A libsycl/unittests/exception/exception.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/program_manager/CMakeLists.txt
A libsycl/unittests/program_manager/program_cache.cpp
M libsycl/unittests/queue/queue.cpp
A libsycl/unittests/usm/CMakeLists.txt
A libsycl/unittests/usm/alloc.cpp
M libunwind/test/dwarf_expression_stack.pass.cpp
M lld/.clang-format
M lld/Common/CommonLinkerContext.cpp
M lld/ELF/Arch/AMDGPU.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/ICF.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/Options.td
M lld/MachO/UnwindInfoSection.cpp
M lld/docs/MachO/ld64-vs-lld.md
M lld/docs/ReleaseNotes.md
M lld/test/ELF/amdgpu-tid.s
A lld/test/ELF/dynamic-debug.test
R lld/test/ELF/dynamic-list-cpp.s
M lld/test/ELF/dynamic-list-glob.s
A lld/test/ELF/invalid-dynamic-debug.test
M lld/test/ELF/lto/amdgcn-oses.ll
M lld/test/ELF/lto/amdgcn.ll
M lld/test/ELF/lto/amdgpu.ll
M lld/test/ELF/lto/riscv-target-abi.ll
A lld/test/ELF/trace-symbols-dynamic-debug.test
R lld/test/ELF/version-script-reassign-glob.s
A lld/test/ELF/version-script-wildcard-precedence.s
A lld/test/MachO/arm64-x1.s
A lld/test/MachO/icf-lsda-reloc.s
A lld/test/MachO/warn-missing-subsections-via-symbols.s
M lldb/bindings/interface/SBCompileUnitDocstrings.i
M lldb/bindings/python/get-python-config.py
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/resources/formatterbytecode.md
M lldb/docs/resources/test.md
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/include/lldb/API/SBFile.h
M lldb/include/lldb/Breakpoint/StopPointSiteList.h
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/include/lldb/DataFormatters/FormatterBytecode.h
M lldb/include/lldb/Host/SafeMachO.h
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/concurrent_base.py
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
R lldb/scripts/convert-lldb-header-to-rpc-header.py
M lldb/scripts/framework-header-fix.py
M lldb/source/API/CMakeLists.txt
M lldb/source/API/SBCompileUnit.cpp
M lldb/source/API/SBFile.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Core/Value.cpp
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/source/DataFormatters/TypeSummary.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/ObjectFile/COFF/ObjectFileCOFF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.cpp
A lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.h
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.cpp
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.h
M lldb/source/Symbol/SymbolFile.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Utility/ArchSpec.cpp
M lldb/source/Utility/RegisterValue.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/test/API/commands/expression/import-std-module/array/TestArrayFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/basic/TestImportStdModule.py
M lldb/test/API/commands/expression/import-std-module/conflicts/TestStdModuleWithConflicts.py
M lldb/test/API/commands/expression/import-std-module/deque-basic/TestDequeFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/empty-module/TestEmptyStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_decl_from_module/TestForwardDeclFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_list-dbg-info-content/TestDbgInfoContentForwardListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_list/TestForwardListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/iterator/TestIteratorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/list/TestListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/missing-module-sources/TestStdModuleSourcesMissing.py
M lldb/test/API/commands/expression/import-std-module/module-build-errors/TestStdModuleBuildErrors.py
M lldb/test/API/commands/expression/import-std-module/no-std-module/TestMissingStdModule.py
M lldb/test/API/commands/expression/import-std-module/non-module-type-separation/TestNonModuleTypeSeparation.py
M lldb/test/API/commands/expression/import-std-module/pair/TestPairFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/queue/TestQueueFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/retry-with-std-module/TestRetryWithStdModule.py
M lldb/test/API/commands/expression/import-std-module/shared_ptr-dbg-info-content/TestSharedPtrDbgInfoContentFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/stack/TestStackFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/sysroot/TestStdModuleSysroot.py
M lldb/test/API/commands/expression/import-std-module/vector-bool/TestVectorBoolFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector/TestVectorFromStdModule.py
M lldb/test/API/commands/frame/recognizer/step-through/TestFrameRecognizerStepThrough.py
M lldb/test/API/commands/frame/var/TestFrameVar.py
M lldb/test/API/functionalities/breakpoint/jit_loader_rtdyld_elf/TestJitBreakPoint.py
M lldb/test/API/functionalities/breakpoint/write_over_software_breakpoint/TestWriteOverSoftwareBreakpoint.py
M lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
A lldb/test/API/functionalities/gdb_remote_client/TestBreakpointNotHit.py
M lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterVector.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManyBreakpoints.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManySignals.py
M lldb/test/API/functionalities/thread/concurrent_events/main.cpp
M lldb/test/API/lang/cpp/abi_tag_structors/TestAbiTagStructors.py
M lldb/test/API/lang/cpp/forward/TestCPPForwardDeclaration.py
M lldb/test/API/python_api/compile_unit/Makefile
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
A lldb/test/API/python_api/compile_unit/other.c
M lldb/test/API/symstore/TestSymStore.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/API/tools/lldb-dap/stackTrace/Makefile
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
A lldb/test/API/tools/lldb-dap/stackTrace/other.c
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_Types.py
M lldb/test/CMakeLists.txt
R lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckBasicIncludesEmit.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckConstCharPointer.h
R lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckBasicIncludesEmit.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckConstCharPointer.test
R lldb/test/Shell/RPC/Generator/lit.local.cfg
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBEnumerations.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBTypes.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckSBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/SBDefines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-defines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-enumerations.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-types.h
R lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
M lldb/test/Shell/Scripts/TestFrameworkFixScript.test
M lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
R lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/AstRestoreTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CallingConventionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ClassLayoutTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CompilandsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest0.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest1.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.h
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.ord
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionNestedBlockTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/PointerTypeTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/SimpleTypesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/TypeQualsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/add-symbols.cpp
A lldb/test/Shell/SymbolFile/NativePDB/ast-restore.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-arm.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-x86.test
A lldb/test/Shell/SymbolFile/NativePDB/class-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/compilands.test
A lldb/test/Shell/SymbolFile/NativePDB/enums-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/expressions.test
M lldb/test/Shell/SymbolFile/NativePDB/func-symbols.test
A lldb/test/Shell/SymbolFile/NativePDB/function-level-linking.test
A lldb/test/Shell/SymbolFile/NativePDB/function-nested-block.test
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-dia.cpp
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-no-dia.cpp
R lldb/test/Shell/SymbolFile/NativePDB/native-setting.cpp
A lldb/test/Shell/SymbolFile/NativePDB/pointers.test
A lldb/test/Shell/SymbolFile/NativePDB/type-quals.test
A lldb/test/Shell/SymbolFile/NativePDB/typedefs.test
A lldb/test/Shell/SymbolFile/NativePDB/variables-locations.test
A lldb/test/Shell/SymbolFile/NativePDB/variables.test
A lldb/test/Shell/SymbolFile/NativePDB/vbases2.test
R lldb/test/Shell/SymbolFile/PDB/Inputs/AstRestoreTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CallingConventionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ClassLayoutTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CompilandsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest0.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest1.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest2.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.h
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.ord
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionNestedBlockTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/PointerTypeTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/TypeQualsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
R lldb/test/Shell/SymbolFile/PDB/ast-restore.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-x86.test
R lldb/test/Shell/SymbolFile/PDB/class-layout.test
R lldb/test/Shell/SymbolFile/PDB/compilands.test
R lldb/test/Shell/SymbolFile/PDB/enums-layout.test
R lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
R lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
R lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
R lldb/test/Shell/SymbolFile/PDB/native-setting.cpp
R lldb/test/Shell/SymbolFile/PDB/pointers.test
R lldb/test/Shell/SymbolFile/PDB/type-quals.test
R lldb/test/Shell/SymbolFile/PDB/typedefs.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
R lldb/test/Shell/SymbolFile/PDB/variables-locations.test
R lldb/test/Shell/SymbolFile/PDB/variables.test
R lldb/test/Shell/SymbolFile/PDB/vbases.test
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
R lldb/tools/lldb-rpc-gen/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/RPCCommon.cpp
R lldb/tools/lldb-rpc-gen/RPCCommon.h
R lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
R lldb/tools/lldb-rpc/CMakeLists.txt
R lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
R lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
M lldb/unittests/API/CMakeLists.txt
M lldb/unittests/DAP/ProtocolRequestsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
M lldb/unittests/ObjectContainer/CMakeLists.txt
M lldb/unittests/ObjectContainer/ObjectContainerUniversalMachOTest.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/Target/MemoryTest.cpp
M lldb/unittests/Target/RegisterTypeBuilderClangTest.cpp
M lldb/unittests/TestingSupport/TestUtilities.h
M lldb/unittests/Utility/ArchSpecTest.cpp
M lldb/unittests/Utility/RegisterValueTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/CrossCompile.cmake
M llvm/cmake/modules/FindLibXml2.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CMake.md
M llvm/docs/CommandGuide/llubi.md
M llvm/docs/CommandGuide/llvm-objdump.md
M llvm/docs/CommandGuide/llvm-profdata.md
M llvm/docs/DirectX/SemanticSignatures.md
M llvm/docs/GettingInvolved.md
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/docs/HowToSubmitABug.rst
M llvm/docs/LangRef.md
M llvm/docs/LibFuzzer.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/PDB/PdbStream.md
M llvm/docs/ProgrammersManual.md
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
R llvm/docs/_static/copybutton.css
M llvm/docs/conf.py
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm-c/lto.h
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/Analysis/CallGraph.h
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/MustExecute.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelWorkList.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/RegisterPressure.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/CodeViewSymbols.def
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/include/llvm/ExecutionEngine/Orc/Mangling.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/Mangler.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolNameSpec.h
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
A llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/include/llvm/Frontend/HLSL/SemanticSignatures.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h.inc
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/ConstantRange.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/IR/Value.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Object/GOFFObjectFile.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/Passes/RunCodeGen.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Support/DataExtractor.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Support/TypeSize.h
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TextAPI/Architecture.def
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
A llvm/include/llvm/Transforms/Utils/SplitModuleCommon.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/FinalizeISel.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RegisterPressure.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetOptionsImpl.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/WindowsSecureHotPatching.cpp
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/DebugInfo/CodeView/SymbolDumper.cpp
M llvm/lib/DebugInfo/CodeView/SymbolRecordMapping.cpp
M llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
A llvm/lib/ExecutionEngine/Orc/Mangler.cpp
M llvm/lib/ExecutionEngine/Orc/Mangling.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.cpp
M llvm/lib/Frontend/HLSL/CMakeLists.txt
A llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/IR/VerifierInternal.h
M llvm/lib/MC/MCGOFFStreamer.cpp
M llvm/lib/MC/StringTableBuilder.cpp
M llvm/lib/MCA/HardwareUnits/LSUnit.cpp
M llvm/lib/MCA/HardwareUnits/ResourceManager.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/RunCodeGen.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/DataExtractor.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3AE.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHazardLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSetWavePriority.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.cpp
M llvm/lib/Target/ARM/ARMInstrVFP.td
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
M llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
R llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrSNP.td
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/XCore/Disassembler/CMakeLists.txt
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/InferAlignment.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFlatten.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/SizeOpts.cpp
M llvm/lib/Transforms/Utils/SplitModule.cpp
A llvm/lib/Transforms/Utils/SplitModuleCommon.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.h
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/X86/clmul.ll
A llvm/test/Analysis/CostModel/X86/div-rem-i64.ll
A llvm/test/Analysis/CostModel/X86/div-rem-strictfp.ll
M llvm/test/Analysis/CostModel/X86/div.ll
A llvm/test/Analysis/CostModel/X86/masked-divrem.ll
A llvm/test/Analysis/CostModel/X86/pdep.ll
A llvm/test/Analysis/CostModel/X86/pext.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
M llvm/test/Analysis/CostModel/X86/size-cost.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
A llvm/test/Analysis/ScalarEvolution/pointer-iv-addrec.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/addrspacecast.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/addrspacecast.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/Assembler/llvm.loop.align.ll
A llvm/test/Assembler/module-flags-thread-model.ll
A llvm/test/Bitcode/amdgcn-addrspacecast-nonnull.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/combine-insert-vec-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-commute-shift.mir
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AArch64/arm64-big-endian-bitconverts.ll
M llvm/test/CodeGen/AArch64/arm64-build-vector.ll
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
M llvm/test/CodeGen/AArch64/arm64-tbl.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/arm64-xaluo.ll
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
M llvm/test/CodeGen/AArch64/bcmp.ll
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.ll
M llvm/test/CodeGen/AArch64/cmpbr-ccmp.mir
M llvm/test/CodeGen/AArch64/cmpbr-early-ifcvt.mir
A llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
A llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
M llvm/test/CodeGen/AArch64/double_reduct.ll
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
A llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
M llvm/test/CodeGen/AArch64/fp-veclib-expansion.ll
M llvm/test/CodeGen/AArch64/i128-imm-compare-ccmp.ll
M llvm/test/CodeGen/AArch64/i128-math.ll
M llvm/test/CodeGen/AArch64/i256-math.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
A llvm/test/CodeGen/AArch64/misched-postra-only1.mir
M llvm/test/CodeGen/AArch64/mul-i128-overflow.ll
A llvm/test/CodeGen/AArch64/neon-addsub-long-reassoc.ll
M llvm/test/CodeGen/AArch64/neon-anyof-splat.ll
A llvm/test/CodeGen/AArch64/neon-implicit-zero-filling.ll
M llvm/test/CodeGen/AArch64/neon-shuffle-vector-tbl.ll
A llvm/test/CodeGen/AArch64/optimization-remark-target-features.ll
A llvm/test/CodeGen/AArch64/overflow-vec.ll
M llvm/test/CodeGen/AArch64/overflow.ll
M llvm/test/CodeGen/AArch64/pdep.ll
M llvm/test/CodeGen/AArch64/pext.ll
M llvm/test/CodeGen/AArch64/pr55644.ll
A llvm/test/CodeGen/AArch64/sme-za-tailcall-fpdiff-align.ll
M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
M llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
M llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-int-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-reductions.ll
M llvm/test/CodeGen/AArch64/sve-bf16-rounding.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-extract-vector-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fma-mix-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-fmed3-const.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-merge-readanylane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-smed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
A llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
A llvm/test/CodeGen/AMDGPU/addrspacecast-nonnull.ll
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M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
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M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine-analysis-invalidation.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
A llvm/test/CodeGen/AMDGPU/barrier-addrspace-dereference.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
A llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
A llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.mir
A llvm/test/CodeGen/AMDGPU/early-lis-two-address-regsequence-undef.mir
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/frexp-inf-nan-combine.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
A llvm/test/CodeGen/AMDGPU/insert-delay-alu-ldsdma.mir
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
A llvm/test/CodeGen/AMDGPU/ldsdma-not-coexec-valu.mir
A llvm/test/CodeGen/AMDGPU/ldsdma-not-valu-wait-sgpr.mir
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-opt.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
A llvm/test/CodeGen/AMDGPU/null-named-barrier-gv.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
M llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-proper-value-replacement.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-select.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
A llvm/test/CodeGen/AMDGPU/read-register-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/read-write-register-src-flat-scratch-base-invalid-subtarget.ll
A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-bad-absolute-symbol.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-wrong-gv-signature.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/si-fold-operands-gfx11.mir
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-epilog-phi.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-gen-structure.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-loop-carried-mem.mir
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
A llvm/test/CodeGen/AMDGPU/type-mismatch-src-flat-scratch-base.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
A llvm/test/CodeGen/AMDGPU/write-register-src-flat-scratch-base.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-isel-fp.ll
M llvm/test/CodeGen/ARM/build-attributes.ll
A llvm/test/CodeGen/ARM/cbz-no-kill-flag.mir
A llvm/test/CodeGen/ARM/eabi-attribute-fp-rounding-strictfp.ll
M llvm/test/CodeGen/ARM/eabihf-no-fpregs.ll
M llvm/test/CodeGen/ARM/fnmul.ll
M llvm/test/CodeGen/ARM/inlineasm-operand-implicit-cast.ll
A llvm/test/CodeGen/ARM/optimization-remark-target-features.ll
M llvm/test/CodeGen/ARM/vtrn.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/handle-cases.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/handle-to-index.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes-resolved.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-nonscalar.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-unsupported-kind.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture.ll
M llvm/test/CodeGen/DirectX/ResourceAtomicBinOp.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/atomic64-typed-resource.ll
M llvm/test/CodeGen/Hexagon/anti-dep-partial.mir
A llvm/test/CodeGen/Hexagon/const-prop-undef.mir
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/swp-large-rec.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
A llvm/test/CodeGen/Hexagon/vreduce-fminmax-nan-fixup.ll
A llvm/test/CodeGen/Hexagon/vreduce-max-lowering.ll
A llvm/test/CodeGen/Hexagon/vreduce-min-lowering.ll
A llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
A llvm/test/CodeGen/MIR/AMDGPU/addrspacecast-nonnull.mir
M llvm/test/CodeGen/MLRegAlloc/default-eviction-advisor.ll
M llvm/test/CodeGen/MLRegAlloc/rel-codepath.ll
A llvm/test/CodeGen/Mips/jalr-no-mangle.ll
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll
M llvm/test/CodeGen/Mips/mips1-load-in-delay-slot.ll
A llvm/test/CodeGen/Mips/mips1-not-support-ldc1-sdc1.ll
A llvm/test/CodeGen/NVPTX/atomics-system-scope-sm50.err.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-override.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-validate-data.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-invalid.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-mc32.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-override.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-validate-data.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-im2colw.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
A llvm/test/CodeGen/NVPTX/mbarrier_layout_sm90_ptx93.ll
M llvm/test/CodeGen/PowerPC/scmp.ll
A llvm/test/CodeGen/PowerPC/vsx-swap-removal-undef.mir
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/load-store.ll
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint-f16.ll
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint.ll
M llvm/test/CodeGen/RISCV/and-negpow2-cmp.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/condbinops.ll
M llvm/test/CodeGen/RISCV/condops.ll
A llvm/test/CodeGen/RISCV/fadd-fmul-dagcombine.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/machine-outliner-lpad.ll
M llvm/test/CodeGen/RISCV/macro-fusion-add-mem.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-imm-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-imm.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-mul-add.mir
M llvm/test/CodeGen/RISCV/macro-fusion-shift-bit-extract.mir
M llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
M llvm/test/CodeGen/RISCV/macro-fusions.mir
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
M llvm/test/CodeGen/RISCV/pr148084.ll
A llvm/test/CodeGen/RISCV/rvp-mul-parts-acc-fold.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
A llvm/test/CodeGen/RISCV/rvv/vsetvli-dead-vl-vtype-liveness.mir
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M llvm/test/CodeGen/RISCV/select.ll
A llvm/test/CodeGen/RISCV/shrinkwrap-save-restore-debug.ll
M llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/target-abi-invalid.ll
M llvm/test/CodeGen/RISCV/xqci-macro-fusions.mir
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A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dead-alloca.ll
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A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-function-parameter.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-int-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-line-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-module-scope-variable.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-null-storage.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-declare-poison-storage.ll
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M llvm/test/CodeGen/SPIRV/debug-info/debug-line-if-phi.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop-merge.ll
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M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
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A llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-retained-nodes.ll
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M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_blocking_pipes/PipeBlocking.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-select-untyped-ptr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-void-call-aggregate-arg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_kernel_attributes/max_work_group_size.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/acos_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/asin_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/atan_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/ceil_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cos_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cosh_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp2_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/exp_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/floor_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log2_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/roundeven_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sin_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sinh_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/sqrt_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tan_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/tanh_mat.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/trunc_mat.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llround.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lround.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
M llvm/test/CodeGen/SystemZ/misched-prera-cmp-elim.mir
M llvm/test/CodeGen/SystemZ/misched-prera-latencies.mir
M llvm/test/CodeGen/SystemZ/misched-prera-loads.mir
A llvm/test/CodeGen/SystemZ/postra-sched-filter.mir
A llvm/test/CodeGen/SystemZ/zos-align-constpool.ll
A llvm/test/CodeGen/SystemZ/zos-eh.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
A llvm/test/CodeGen/SystemZ/zos-xplink64-formal-sub64-extend.ll
A llvm/test/CodeGen/Thumb2/LowOverheadLoops/dbg-verify.ll
A llvm/test/CodeGen/WebAssembly/simd-relaxed-fptoint.ll
M llvm/test/CodeGen/WebAssembly/simd-setcc-reductions.ll
M llvm/test/CodeGen/X86/PR40322.ll
A llvm/test/CodeGen/X86/active_lane_mask.ll
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
A llvm/test/CodeGen/X86/atomic-cmp-fold.ll
M llvm/test/CodeGen/X86/atomic-unordered.ll
M llvm/test/CodeGen/X86/avx512-icmp-sle-zero.ll
M llvm/test/CodeGen/X86/avx512-masked-op-fusion.ll
M llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
M llvm/test/CodeGen/X86/avx512fp16-frem.ll
A llvm/test/CodeGen/X86/bfloat-int64-cvt-i686.ll
M llvm/test/CodeGen/X86/bfloat.ll
A llvm/test/CodeGen/X86/bitcast-sign-mask.ll
A llvm/test/CodeGen/X86/branch-on-zero.ll
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/clmul.ll
M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
M llvm/test/CodeGen/X86/combine-shl.ll
A llvm/test/CodeGen/X86/compress-evex-sign-mask.mir
M llvm/test/CodeGen/X86/compress-evex-vpmov-blendv.mir
M llvm/test/CodeGen/X86/compress-evex-vpmov-kill.mir
A llvm/test/CodeGen/X86/eh-return-shstk-32.ll
A llvm/test/CodeGen/X86/eh-return-shstk.ll
M llvm/test/CodeGen/X86/huge-stack.ll
R llvm/test/CodeGen/X86/llc-fp-contract-warning.ll
M llvm/test/CodeGen/X86/llvm.sincos.vec.ll
M llvm/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll
M llvm/test/CodeGen/X86/pdep-vector-128.ll
M llvm/test/CodeGen/X86/pdep-vector-256.ll
M llvm/test/CodeGen/X86/pdep-vector-512.ll
M llvm/test/CodeGen/X86/pext-vector-128.ll
M llvm/test/CodeGen/X86/pext-vector-256.ll
M llvm/test/CodeGen/X86/pext-vector-512.ll
M llvm/test/CodeGen/X86/pr1505b.ll
A llvm/test/CodeGen/X86/pr222363.ll
A llvm/test/CodeGen/X86/regallocfast-undef-tied-use.mir
M llvm/test/CodeGen/X86/select-lea.ll
M llvm/test/CodeGen/X86/smul-with-overflow.ll
M llvm/test/CodeGen/X86/smul_fix_sat.ll
M llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
M llvm/test/CodeGen/X86/stack-align.ll
M llvm/test/CodeGen/X86/subcarry.ll
M llvm/test/CodeGen/X86/swifterror.ll
A llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
M llvm/test/CodeGen/X86/ucmp.ll
M llvm/test/CodeGen/X86/umul-with-carry.ll
M llvm/test/CodeGen/X86/umul-with-overflow.ll
M llvm/test/CodeGen/X86/umul_fix_sat.ll
M llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll
M llvm/test/CodeGen/X86/var-permute-128.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-compress.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
M llvm/test/CodeGen/X86/vector-shuffle-v192.ll
M llvm/test/CodeGen/X86/xmulo.ll
M llvm/test/CodeGen/X86/znver-pdep.ll
M llvm/test/CodeGen/X86/znver-pext.ll
A llvm/test/DebugInfo/MIR/InstrRef/expr-operand-count-mismatch.mir
M llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
A llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_many_align.s
A llvm/test/Linker/module-flags-thread-model.ll
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
A llvm/test/MC/AMDGPU/buffer-op-lds-operand.s
A llvm/test/MC/AMDGPU/gfx1250-strict_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vopd_errs.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/AMDGPU/xnack-mask.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/X86/x86-64.txt
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
M llvm/test/MC/MachO/diff-with-two-sections.s
M llvm/test/MC/MachO/weakdef.s
M llvm/test/MC/MachO/zero-space.s
R llvm/test/MC/RISCV/XVentanaCondOps-valid.s
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/tail-call.s
M llvm/test/MC/RISCV/target-abi-invalid.s
M llvm/test/MC/X86/SNP-64.s
M llvm/test/MC/X86/x86_errors.s
M llvm/test/MachineVerifier/AMDGPU/unsupported-subreg-index-aligned-vgpr-check.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir
M llvm/test/Other/new-pm-O0-ep-callbacks.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
A llvm/test/TableGen/RuntimeLibcallEmitter-library-dispatch.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-grouping.td
M llvm/test/TableGen/RuntimeLibcallEmitter-library-name-merge.td
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/ThinLTO/X86/memprof-funcassigncloning.ll
M llvm/test/ThinLTO/X86/memprof-funcassigncloning2.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/combine_ignore_debug.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/RISCV/lit.local.cfg
A llvm/test/Transforms/AggressiveInstCombine/RISCV/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/RISCV/store-merge.ll
M llvm/test/Transforms/AggressiveInstCombine/negative-lower-table-based-cttz.ll
M llvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
A llvm/test/Transforms/Attributor/indirect_call_program_address_space.ll
A llvm/test/Transforms/Attributor/nofpclass-fadd-fsub.ll
M llvm/test/Transforms/Attributor/nofpclass-log.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/cond-used-in-phi.ll
M llvm/test/Transforms/ConstraintElimination/header-induction-start-bounds.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
M llvm/test/Transforms/ConstraintElimination/induction-nowrap-from-scev-not-ir.ll
M llvm/test/Transforms/ConstraintElimination/loops.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-cfg.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-decrement.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-wrapping.ll
M llvm/test/Transforms/ConstraintElimination/pr70510.ll
M llvm/test/Transforms/ConstraintElimination/sadd-with-overflow.ll
A llvm/test/Transforms/ConstraintElimination/strengthen-flags-at-uses.ll
M llvm/test/Transforms/ConstraintElimination/transfer-signed-facts-to-unsigned-is-known-non-negative.ll
M llvm/test/Transforms/ConstraintElimination/wrapping-math.ll
M llvm/test/Transforms/Coroutines/ArgAddr.ll
M llvm/test/Transforms/Coroutines/coro-align16.ll
M llvm/test/Transforms/Coroutines/coro-align32.ll
M llvm/test/Transforms/Coroutines/coro-align64-02.ll
M llvm/test/Transforms/Coroutines/coro-align64.ll
M llvm/test/Transforms/Coroutines/coro-align8-02.ll
M llvm/test/Transforms/Coroutines/coro-align8.ll
M llvm/test/Transforms/Coroutines/coro-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-alloca-03.ll
M llvm/test/Transforms/Coroutines/coro-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-alloca-06.ll
M llvm/test/Transforms/Coroutines/coro-alloca-08.ll
M llvm/test/Transforms/Coroutines/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-01.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-arrayalloca.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll
M llvm/test/Transforms/Coroutines/coro-param-copy.ll
M llvm/test/Transforms/Coroutines/coro-spill-defs-before-corobegin.ll
A llvm/test/Transforms/Coroutines/coro-split-index-datalayout.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-02.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-03.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-04.ll
M llvm/test/Transforms/Coroutines/coro-split-tbaa-md.ll
A llvm/test/Transforms/CorrelatedValuePropagation/or-disjoint.ll
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
M llvm/test/Transforms/GVN/PRE/no-phi-translate.ll
M llvm/test/Transforms/GVN/PRE/no-pre-load-for-token-like.ll
M llvm/test/Transforms/GVN/pr46054-md-nonlocaldefcache-cleanup.ll
A llvm/test/Transforms/GVN/pre-coerced-value-not-numbered.ll
M llvm/test/Transforms/InferAlignment/masked.ll
M llvm/test/Transforms/InferAlignment/memintrinsics.ll
M llvm/test/Transforms/Inline/ML/bounds-checks.ll
M llvm/test/Transforms/Inline/ML/coro-split-func-levels.ll
M llvm/test/Transforms/Inline/ML/dead-callee.ll
M llvm/test/Transforms/Inline/ML/enable-inline-advisor-printing-ml.ll
M llvm/test/Transforms/Inline/ML/fpi-update.ll
M llvm/test/Transforms/Inline/ML/ml-test-release-mode.ll
M llvm/test/Transforms/Inline/ML/recursive.ll
M llvm/test/Transforms/Inline/ML/scc-dead-accounting.ll
M llvm/test/Transforms/Inline/ML/skip-unreachable.ll
M llvm/test/Transforms/Inline/ML/state-accounting-skip-non-cold.ll
M llvm/test/Transforms/Inline/inlining-advisor-default.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-and-or-with-all-true.ll
M llvm/test/Transforms/InstCombine/SystemZ/libcall-arg-exts.ll
A llvm/test/Transforms/InstCombine/icmp-urem.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/memchr-11.ll
M llvm/test/Transforms/InstCombine/memchr-2.ll
M llvm/test/Transforms/InstCombine/memchr-3.ll
M llvm/test/Transforms/InstCombine/memchr-6.ll
M llvm/test/Transforms/InstCombine/memchr.ll
M llvm/test/Transforms/InstCombine/negated-bitmask.ll
M llvm/test/Transforms/InstCombine/recurrence.ll
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/wcslen-1.ll
M llvm/test/Transforms/JumpThreading/update-bpi-bfi-unfold-select.ll
M llvm/test/Transforms/LCSSA/token-like-live-out.ll
A llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
A llvm/test/Transforms/LoopFlatten/invalidate-scev-pr203176.ll
M llvm/test/Transforms/LoopIdiom/X86/ctlz.ll
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/confused-dependence-subnest.ll
A llvm/test/Transforms/LoopInterchange/dependency-matrix-padding.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
A llvm/test/Transforms/LoopInterchange/missed-outer-prefix-subnest.ll
A llvm/test/Transforms/LoopInterchange/no-partially-perfect-subnest.ll
M llvm/test/Transforms/LoopInterchange/partially-perfect-loop.ll
A llvm/test/Transforms/LoopInterchange/preserve-sibling-order.ll
M llvm/test/Transforms/LoopUnroll/RISCV/runtime-unroll-max-trip-count.ll
M llvm/test/Transforms/LoopUnroll/RISCV/unroll.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/select-first-index-narrow.ll
A llvm/test/Transforms/LoopVectorize/RISCV/interleaved-load-masked-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/scatter-type-mismatch.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-flags.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-intrinsic.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/store-scalarization-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
Log Message:
-----------
Rebase
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/41359e71e925...48cc2ba423cd
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