[all-commits] [llvm/llvm-project] 590a3b: [CIR] Reposition entry-block allocas ahead of cont...
Juan Manuel Martinez Caamaño via All-commits
all-commits at lists.llvm.org
Fri Sep 11 02:00:43 PDT 2026
Branch: refs/heads/users/jmmartinez/nfs_headache
Home: https://github.com/llvm/llvm-project
Commit: 590a3b87dba125069e962956d562802a8173dc38
https://github.com/llvm/llvm-project/commit/590a3b87dba125069e962956d562802a8173dc38
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/HoistAllocas.cpp
M clang/test/CIR/Transforms/hoist-allocas.cir
Log Message:
-----------
[CIR] Reposition entry-block allocas ahead of control flow (#220496)
HoistAllocas returns early when an alloca was already in the entry
block, but being in the block is not the same as being ahead of the
control flow in it. The pass runs before FlattenCFG, which splits the
body at each structured control-flow op, so an alloca sitting after one
is left in a block that is no longer the entry block.
That matters because SROA only collects allocas from the entry block. An
alloca stranded behind a scope is invisible to it and never promoted, so
anything whose address it holds stays in memory.
Commit: ddf2077559587500f47e3666c696b7366bb36af0
https://github.com/llvm/llvm-project/commit/ddf2077559587500f47e3666c696b7366bb36af0
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/FinalizeISel.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
Log Message:
-----------
[GlobalISel] Fix duplicate finalizeLowering calls (NFC) (#221902)
Improves CTMark geomean -0.07% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=d8b1a78ba013d5e687acc0e8bf00d3d77749f3db&stat=instructions:u
Assisted-by: codex
Commit: cdd1900816f625eb1f38a6e755c49ccadec56209
https://github.com/llvm/llvm-project/commit/cdd1900816f625eb1f38a6e755c49ccadec56209
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/test/Analysis/BasicAA/call-attrs.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.ll
M llvm/test/CodeGen/ARM/returned-ext.ll
M llvm/test/CodeGen/ARM/struct-byval-loop.ll
M llvm/test/CodeGen/M68k/multiple-return.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/RISCV/rvv/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SystemZ/args-14.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/VE/Scalar/call.ll
M llvm/test/CodeGen/VE/Scalar/va_callee.ll
M llvm/test/CodeGen/VE/Vector/fastcc_caller.ll
M llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
M llvm/test/CodeGen/X86/bool-zext.ll
M llvm/test/CodeGen/X86/return-ext.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll
M llvm/test/Transforms/DeadArgElim/deadexternal.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/PhaseOrdering/pr64289-tce.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
M llvm/test/Transforms/SimplifyCFG/hoist-sink-swifterror-store.ll
M llvm/unittests/IR/AttributesTest.cpp
Log Message:
-----------
[IR] Do not inherit ABI attributes from the callee (#207173)
Usually attributes that are missing on the call-site are inherited form
the callee instead. This is fine for optional optimization attributes,
but problematic for ABI-affecting attributes.
ABI attributes generally must be placed at the call-site as well,
because there is no callee to inherit from for indirect calls. Failing
to specify ABI attributes at the call-site generally indicates a bug.
The motivation for being stricter about this (apart from just being the
right thing to do) is to properly support cases where the attributes at
the call-site and the callee actually differ. Two examples I'm aware of
are:
* During cross-language LTO, it's possible to have one side use a `ptr`
argument and the other a `ptr byval(ptr)` argument. Both represent the
same ABI using different IR encodings, but you can't just inherit the
`byval` attribute from one to the other (because the byval case requires
an additional level of indirection in use of the argument).
* To fix our incompatibility with the x86-64 psABI, I believe we'll want
to do something like emit zeroext/signext at function returns and
call-site arguments only, so that we both don't assume incoming values
are zero/sign-extended, but still zero/sign-extend outgoing values. This
makes sure we still remain compatible with old Clang-generated object
files.
We've attempted to make a change like this previously, but ran into
substantial issues with missing call-site attributes on
compiler-inserted calls. The issue was particularly severe on s390x,
which requires zeroext/signext on more values than other architectures.
I believe that the situation here has improved a lot in the meantime,
with libcalls now inferring mandatory ABI attributes, and s390x also
using a noext attribute plus validation logic in the backend to detect
cases where the necessary attributes are missing.
-----
ABI attributes on call-sites must be queried using `hasABIParamAttr()`
and `hasABIRetAttr()` instead of `paramHasAttr()` and `hasRetAttr()`
now. Passing an ABI attribute to the latter two will result in an
assertion failure.
Commit: 8c3cb9c166e8f5ade26bc90a4a4cf5ec628f894f
https://github.com/llvm/llvm-project/commit/8c3cb9c166e8f5ade26bc90a4a4cf5ec628f894f
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-epilog-phi.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-gen-structure.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-loop-carried-mem.mir
Log Message:
-----------
[CodeGen][NPM] Port MachinePipeliner to NPM (#221676)
changes of note,
1. registers the pass with AMDGPUCodeGenPassBuilder::addPreRegAlloc()
2. Changes the core MachinePipeliner::run() method to return actual
"Changed" state
Commit: d0a59913f8cfc3041c9d284e36858aedbf8dfa0e
https://github.com/llvm/llvm-project/commit/d0a59913f8cfc3041c9d284e36858aedbf8dfa0e
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[IR] Remove obsolete visited sets from type queries (NFC) (#221743)
Recursive types have been rejected since 2024 (#114799), making the
visited sets in type queries unnecessary.
Improves CTMark geomean -0.08% on aarch64-O0-g. Also improves
compile-time slightly for several other targets.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=45c1423e7e38b6950ae760fc159ecb69cafdd691&stat=instructions%3Au
Assisted-by: codex
Commit: 531a8ac4c959dbdabcb4fea4a31beecde36bcdd9
https://github.com/llvm/llvm-project/commit/531a8ac4c959dbdabcb4fea4a31beecde36bcdd9
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-call-before-alloca.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-external-call.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at-recursive.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-block.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-if-phi.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-shared.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-no-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-same-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-shared.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope.ll
Log Message:
-----------
Add support for NSDI DebugScope, DebugNoScope and DebugInlinedAt (#218959)
Add support for NSDI
[DebugScope](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugScope),
[DebugNoScope](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugNoScope)
and
[DebugInlinedAt](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugInlinedAt).
DebugScope/DebugNoScope are region delimiters following the same region
rule as DebugLine/DebugNoLine. The two regions are tracked separately
because a DebugScope region could span several DebugLine regions, and
either can skip emission on a cache miss at different times.
DebugInlinedAt is not an region instruction, so it is emitted at module
scope. We allow recursive traversal when building them to support
chains.
The PR also adds a test showing a limitation in the DebugLine
deduplication that is at the DILocation pointer level which may lead to
duplicate opcodes.
Commit: c4cd7b73e27839103badad11e4eff9baf3d53d84
https://github.com/llvm/llvm-project/commit/c4cd7b73e27839103badad11e4eff9baf3d53d84
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M llvm/include/llvm/ADT/DenseMap.h
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/unittests/ADT/DenseMapTest.cpp
M llvm/utils/lldbDataFormatters.py
M third-party/unittest/googletest/include/gtest/internal/custom/gtest-printers.h
Log Message:
-----------
[ADT] Give DenseMapPair its own members instead of a std::pair base. NFC (#221853)
std::pair declares a copy assignment operator, so it is not trivially
copyable. destroyAll and copyFrom therefore ask about KeyT and ValueT
separately. Hold first and second directly.
Conversion to std::pair is explicit; insert also takes a bucket, and a
converting constructor keeps range insert working across pair types.
Co-authored-by: Kazu Hirata <kazu at google.com>
Commit: 5bf967cb132bf6700474813f961f657af6ef83ea
https://github.com/llvm/llvm-project/commit/5bf967cb132bf6700474813f961f657af6ef83ea
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M lld/test/ELF/lto/amdgcn-oses.ll
M lld/test/ELF/lto/amdgcn.ll
M lld/test/ELF/lto/amdgpu.ll
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
A llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
A llvm/test/CodeGen/AMDGPU/barrier-addrspace-dereference.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
A llvm/test/CodeGen/AMDGPU/null-named-barrier-gv.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-bad-absolute-symbol.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-wrong-gv-signature.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barriers-gfx12.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[RFC][AMDGPU] Add BARRIER address space (#209746)
Add a new BARRIER address space that is used for global variables that
are used to represent the barrier IDs in GFX12.5.
These barrier addresses just have values corresponding 1-1 to barrier
IDs. They are still implemented on top of LDS, but the offsetting
happens during an addrspacecast to generic, not whenever the barrier GV
is used.
The motivation for this is to make the relation between LDS and barrier
GVs explicit in the compiler. It does add a bit more complexity, but
that complexity was already there, just hidden by pretending barrier GVs
were actual LDS.
Commit: 59c5d5efb7343424d243e4a3972f7b24a07b115d
https://github.com/llvm/llvm-project/commit/59c5d5efb7343424d243e4a3972f7b24a07b115d
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/test/CodeGen/X86/branch-on-zero.ll
Log Message:
-----------
[X86] Enable preferZeroCompareBranch() (#219919)
This makes CodeGenPrepare reorganize code such as:
```
%c = icmp eq i32 %x, 10
br %c, then, else
%a = add i32 %x, -10
```
into
```
%a = add i32 %x, -10
%cmp = icmp eq %a, 0
%br %cmp, then, else
```
so that the zero-compare and branch gets lowered to a JCC based on the
flags from the arithmetic instruction.
This was already enabled for ARM, SystemZ and RISC-V, but seems a good
fit for X86 too, as mentioned in Issue #58636.
Commit: cdab5d7b28a38112cf91784ea7d404d2d4c6a68e
https://github.com/llvm/llvm-project/commit/cdab5d7b28a38112cf91784ea7d404d2d4c6a68e
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
Log Message:
-----------
[AMDGPU] Add synthetic apertures and use them for barriers (#209748)
Define what a synthetic aperture is, and adjust the barrier AS
to use this new system. This makes the barrier AS even safer to
use as now we can use all 32 bits of it without ever risking
hitting a valid address of any kind (LDS or outside LDS).
Commit: 1770693262b32d2216d7224fd412d78ab07e1bfa
https://github.com/llvm/llvm-project/commit/1770693262b32d2216d7224fd412d78ab07e1bfa
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Add scalar-type-infer assert for casts (NFC) (#222258)
Casts require the ResultTy to be passed: add an assert to
computeScalarTypeForInstruction to guard against incorrect usage.
Commit: 39ffb93f2cc8b24d0b8a588dc042a4d931273ada
https://github.com/llvm/llvm-project/commit/39ffb93f2cc8b24d0b8a588dc042a4d931273ada
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom fp-contract-model attributes from tests (#221925)
This attribute has never been consumed by upstream llvm,
or emitted by upstream clang. I can only guess this existed in
at least one downstream fork.
Commit: f796b25647e378a02482ef383f2db45804d8fb72
https://github.com/llvm/llvm-project/commit/f796b25647e378a02482ef383f2db45804d8fb72
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
A llvm/test/CodeGen/Mips/jalr-no-mangle.ll
Log Message:
-----------
[Mips] Strip \x01 no-mangle prefix from R_MIPS_JALR symbol name (#219427)
R_MIPS_JALR relocation did not strip the \x01 no-mangle prefix, causing
linker to see two different symbols: my_target_sym and
\x01my_target_sym.
Use Mangler::getNameWithPrefix() to process the symbol name.
Fix #207470.
Commit: 68a77b6106d375eabb8a7ec2585a0f3e0382c4a2
https://github.com/llvm/llvm-project/commit/68a77b6106d375eabb8a7ec2585a0f3e0382c4a2
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave32.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave64.hip
Log Message:
-----------
[CIR][AMDGPU] Implement inverse_ballot and read_exec codegen (#221661)
This commit implements the CIR codegen for the following AMDGPU
builtins:
- __builtin_amdgcn_inverse_ballot_w32
- __builtin_amdgcn_inverse_ballot_w64
- __builtin_amdgcn_read_exec
- __builtin_amdgcn_read_exec_lo
- __builtin_amdgcn_read_exec_hi
inverse_ballot_w32/w64 map to llvm.amdgcn.inverse.ballot. read_exec,
read_exec_lo and read_exec_hi read the exec mask as a ballot over an
all-true predicate, at least as wide as the wavefront.
Commit: 411a8eea0c269fff79700da1b3a9e71914718d4b
https://github.com/llvm/llvm-project/commit/411a8eea0c269fff79700da1b3a9e71914718d4b
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M openmp/runtime/src/i18n/en_US.txt
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_traits.cpp
M openmp/runtime/src/kmp_traits.h
M openmp/runtime/unittests/Traits/TestOMPTraitParser.cpp
Log Message:
-----------
[libomp] Parse OMP_DEFAULT_DEVICE with new device trait parser (#176166)
... but do not yet expose the new functionalities to the user. This is a
backward compatible update that is going to be followed by the step to
the OpenMP 6.0 semantics as defined in 4.3.8.
Commit: 9a14832f08551e15620440391910bc6919904775
https://github.com/llvm/llvm-project/commit/9a14832f08551e15620440391910bc6919904775
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Check a wide copy dst reg against the dst operand's regclass (#221789)
The wide-copy check added in #214561 tested the destination against the
source operand's class. No test change: V_MOV_B64's source class VS_64
also accepts a VGPR destination, which is why it currently works. Adding
@robertvirany.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: cd2f66534d425b3db62fea6df9703ffb87c6c3c5
https://github.com/llvm/llvm-project/commit/cd2f66534d425b3db62fea6df9703ffb87c6c3c5
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GISelWorkList.h
Log Message:
-----------
[GlobalISel] Lazily reserve worklist maps (NFC) (#221900)
Small -0.03% geomean improvement on CTMark aarch64-O0-g, but consistent
little improvements across the board.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=1729db67721b79fcb72469111d543e6df28c1185&stat=instructions:u
Assisted-by: codex
Commit: d6a334df0889026e0d91d3fc5adf452e0bbf0682
https://github.com/llvm/llvm-project/commit/d6a334df0889026e0d91d3fc5adf452e0bbf0682
Author: Petr Kurapov <petr.kurapov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/buffer-op-lds-operand.s
A llvm/test/tools/llvm-mca/AMDGPU/buffer-op-lds-operand.s
Log Message:
-----------
[AMDGPU][AsmParser]: Use dummy operand for parsing buffer LDS isAsync… (#219459)
… operand.
After the introduction of .async for LDS buffer ops variants, there a
similar mca crash addressed in
https://github.com/llvm/llvm-project/pull/165305. This parses a dummy
operand as a placeholder.
Commit: 4b8b168e8b6897fe3816949a316002ee8aff2e98
https://github.com/llvm/llvm-project/commit/4b8b168e8b6897fe3816949a316002ee8aff2e98
Author: Andreas Leitner <leitner.andi at googlemail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/read-register-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/read-write-register-src-flat-scratch-base-invalid-subtarget.ll
A llvm/test/CodeGen/AMDGPU/type-mismatch-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/write-register-src-flat-scratch-base.ll
Log Message:
-----------
[AMDGPU] Add getRegisterByName support for src_flat_scratch_base (#220560)
Expose `src_flat_scratch_base`, `src_flat_scratch_base_lo`, and
`src_flat_scratch_base_hi` through `llvm.read_register` /
`llvm.write_register`.
The implementation is basically the same as the existing named-register
support for `flat_scratch`
It errors out on targets without `FeatureGloballyAddressableScratch`
(pre-gfx1250).
Commit: 0c62d834abff9b180def1b32d3cf9c225d504994
https://github.com/llvm/llvm-project/commit/0c62d834abff9b180def1b32d3cf9c225d504994
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Record estimated branch probabilities on VPlan0 for cost modeling (#216172)
Update execution frequency/probability tracking in VPlan to also include
estimates from BFI, and use the information in VPlan for VPlan-based
cost computations, removing another remaining IR-based lookup.
We need to differentiate between estimated and concrete profile
information when annotating branches with information from BFI (using
custom !vplan.prof.estimated metadata instead of !prof) and track if a
computed frequency contains any estimates using an extra bool which is
also encoded in the metadata (so we do not synthesize !prof
for such frequencies during codegen).
The new code should only request BFI if needed, and compile-time impact
should be in the noise:
https://llvm-compile-time-tracker.com/compare.php?from=8436dd4a2bfe57d0b3fb6c9c11c69d75c1d1bccb&to=4d60694fed5e5765d4f5a2a72aac7b8674e512e2&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/216172
Commit: 17b659b8444a957ea2b42cb4e91d65897fee7558
https://github.com/llvm/llvm-project/commit/17b659b8444a957ea2b42cb4e91d65897fee7558
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] [unittests] Cover what the memory cache reads from the inferior (#221015)
`MemoryCache`'s tests checked how many bytes a read returned, never
which requests the cache made to get them, so a change to the request
shape could not fail a test. Add four tests over the request log
`DummyProcess` now keeps.
Two assert what the cache sends: `TestReadRequestShape` checks the
address and size of every request, and `TestReadRangesFromCaches` checks
that a range the cache already holds is served without reaching the
inferior.
`TestFlushAtTheTopOfTheAddressSpace` pins `Flush`'s current behavior at
the wrap, not correct behavior. When a flushed range wraps past
`UINT64_MAX`, `Flush` counts cache lines only from the start of the
range to the top of the address space, never the lines the wrapped
portion covers between address 0 and the range's end. This bug predates
this change; the following cache-partition change fixes it, and this
test's assertion that address 0 survives the flush will need to flip
once
that lands.
`TesetMemoryCacheRead` gains one assertion, that a line whose reply
falls short leaves the error alone, next to the two requests it already
checks.
Also add a `CacheTestProcess` helper and use it in the seven cache
tests, so each states its setup in two lines rather than thirteen, and
expose the L2 map next to L1 for assertions.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 7f0421be7f82a64796fa002b85bedbd6eaacc57f
https://github.com/llvm/llvm-project/commit/7f0421be7f82a64796fa002b85bedbd6eaacc57f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
Log Message:
-----------
[AMDGPU] Remove unsound idempotent atomicrmw to atomic load lowering (#218377)
An idempotent atomicrmw still holds a slot in the modification order, so
folding it to a plain load can drop synchronization the memory model
requires
Commit: 8e84c4a901a7fe6ba80b3c305b200c3e9bbc4606
https://github.com/llvm/llvm-project/commit/8e84c4a901a7fe6ba80b3c305b200c3e9bbc4606
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom ssp-buffers-size attributes from tests (#221928)
"ssp-buffers-size" was never a real function attribute. There is
"stack-protector-buffer-size". This may have existed in a downstream
fork, but it's also irrelevant for these tests.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 4af454042b636fc6f7b1b99e178247989863b8e5
https://github.com/llvm/llvm-project/commit/4af454042b636fc6f7b1b99e178247989863b8e5
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/docs/Remarks.md
M mlir/include/mlir/IR/Remarks.h
M mlir/lib/IR/Remarks.cpp
M mlir/unittests/IR/RemarkTest.cpp
Log Message:
-----------
[MLIR][Remark] Expose RemarkEngine filter queries (#222262)
Expose following filter APIs publicly:
```
| Query | Answers |
|----------------------------------------------|------------------------------------------------------|
| `isAnyRemarkEnabled()` | At least one category filter is active |
| `isAnyRemarkEnabled(category)` | Some kind of remark is enabled for the category |
| `isRemarkEnabled(kind, category)` | Remarks of `kind` are enabled for the category |
| `is{Passed,Missed,Analysis,Failed}OptRemarkEnabled(category)` | Per-kind query |
```
Assisted by Claude Fable 5.1
Commit: 468a7300de067ec0581f51cbfb56421f4b13eaf0
https://github.com/llvm/llvm-project/commit/468a7300de067ec0581f51cbfb56421f4b13eaf0
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Host/common/NativeProcessProtocol.cpp
Log Message:
-----------
[lldb][lldb-server] Log possible breakpoint PC in hex (#222285)
Commit: e87fb92a9719c1f1f0112e108f9444bb5b99ac49
https://github.com/llvm/llvm-project/commit/e87fb92a9719c1f1f0112e108f9444bb5b99ac49
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
Log Message:
-----------
[NFC][LLVM][AArch64] Add test coverage for scalar bfloat constrained intrinsics. (#222076)
Tests are a clone of fp-intrinsics-fp16.ll with s/half/bfloat/ applied
and failing tests (fcmp and i128 variants) removed.
Commit: 4e7628708d6d09c4051fd1fa54cb6b517db326fe
https://github.com/llvm/llvm-project/commit/4e7628708d6d09c4051fd1fa54cb6b517db326fe
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Restrict value offset tracking to aggregates (NFC) (#221287)
The single-vreg fast path added in d30d5fe8dd5d3 still populated an
offset list, even though offsets are only necessary for aggregate
values.
This wasn't the only place doing so. Avoid creating or updating offset
lists for non-aggregate values and add an assertion to enforce this
invariant.
Small -0.04% geomean improvement on CTMark aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=2aeb9d236a2cacf8ab93722b8b629243384bae68&stat=instructions:u
Assisted-by: codex
Commit: cc38b29781cbc0a2b525a18833adf61c51375af2
https://github.com/llvm/llvm-project/commit/cc38b29781cbc0a2b525a18833adf61c51375af2
Author: Tianyi Chen <diannaaav at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/Misc/cc1as-darwin-target-variant-sdk-version.s
M clang/test/Misc/cc1as-darwin-target-variant-triple.s
M llvm/test/MC/MachO/diff-with-two-sections.s
M llvm/test/MC/MachO/weakdef.s
M llvm/test/MC/MachO/zero-space.s
A llvm/test/tools/llvm-readobj/MachO/cpu-capabilities.yaml
M llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
M llvm/test/tools/llvm-readobj/MachO/file-headers.test
M llvm/tools/llvm-readobj/MachODumper.cpp
Log Message:
-----------
[llvm-readobj] Display Mach-O CPU capability bits (#221617)
The Mach-O file header output masks the capability bits out of
`cpusubtype`
without printing them separately, so this information is missing from
the
output.
Add a `CpuCapabilities` field to print the high byte in hexadecimal,
matching the numeric representation used by `llvm-objdump`.
Fixes #80198.
Assisted-by: OpenAI Codex (implementation, tests, and initial
description).
Commit: 6a20cac62912114cbc9208b565cf88fd73f21377
https://github.com/llvm/llvm-project/commit/6a20cac62912114cbc9208b565cf88fd73f21377
Author: Tianyi Chen <diannaaav at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-objdump.md
M llvm/tools/llvm-objdump/ObjdumpOpts.td
Log Message:
-----------
[llvm-objdump] Document selecting symbols containing commas (#221619)
The documentation does not clearly distinguish how
`--disassemble-symbols=`
and `--disassemble=<symbol>` handle their arguments, making it easy to
overlook how to select symbols whose names contain commas.
Update the command guide and help text to explain that the former
accepts
a comma-separated list of symbols, while the latter accepts a single
symbol
name and may be specified multiple times.
Assisted-by: OpenAI Codex
Commit: 95dfce1739bf2719f89a9f6673eb5b23f2d32b09
https://github.com/llvm/llvm-project/commit/95dfce1739bf2719f89a9f6673eb5b23f2d32b09
Author: David Green <david.green at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-neon-instructions.s
Log Message:
-----------
[AArch64] Add Neoverse V3 scheduling info for v264 frecpe (#221917)
This was missing, falling back to the default information. It should be
like the others.
This is the Neoverse V3 equivalent of #219115
Commit: 3d2f88da6e15645080d852d52c32435b62aca97b
https://github.com/llvm/llvm-project/commit/3d2f88da6e15645080d852d52c32435b62aca97b
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-masked-op-fusion.ll
Log Message:
-----------
[X86] Fix commuteSelect miscompile with double-used condition value (#219436)
The multi-use loop iterated `Cond->users()` which yields duplicates when
a select uses the condition in multiple operand positions. This caused a
double-commute and iterator corruption, leaving other selects with an
inverted condition but unswapped operands.
Remove the in-place mutation loop and return a new select node. The DAG
combiner visits each select independently and `getSetCC` CSEs the
inverted condition so all commuted selects share it.
Commit: 4200a8e34e488aaf9c1b5b1966aa4c1bbec8b4d5
https://github.com/llvm/llvm-project/commit/4200a8e34e488aaf9c1b5b1966aa4c1bbec8b4d5
Author: Oscar Priego <oscar.priegov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
M llvm/test/CodeGen/X86/compress-evex-vpmov-blendv.mir
M llvm/test/CodeGen/X86/compress-evex-vpmov-kill.mir
Log Message:
-----------
[X86] Compress masked VPBLENDM using VBLENDV (#221838)
Fixes #221678.
This extends the X86 EVEX compression pass to recognize compatible
`VPMOVD2M/VPMOVQ2M + VPBLENDMD/VPBLENDMQ` patterns and replace them with
the corresponding VEX `VBLENDVPS/VBLENDVPD` instruction when the mask
width and element granularity match.
For example, the reported AVX-512 sequence:
```asm
vpslld $31, %xmm0, %xmm0
vpmovd2m %xmm0, %k1
vpblendmd %xmm1, %xmm2, %xmm0 {%k1}
```
is reduced to:
```asm
vpslld $31, %xmm0, %xmm0
vblendvps %xmm0, %xmm1, %xmm2, %xmm0
```
The fold is restricted to compatible producer/consumer pairs.
Mixed-width or mixed-element-granularity cases such as
`VPMOVD2MZ128 + VPBLENDMQZ256` are intentionally left unchanged.
The MIR coverage includes:
- 128-bit and 256-bit dword/qword positive cases.
- An incompatible-width negative case.
- Kill/liveness preservation for the reused vector mask.
The existing `avx512-regcall-NoMask.ll` codegen checks are also updated
to reflect the optimized `VBLENDVPS` sequence produced by this fold.
Local validation includes:
- `compress-evex-vpmov-blendv.mir`
- `compress-evex-vpmov-kill.mir`
- `avx512-regcall-NoMask.ll`
- `compress-evex-sign-mask.mir`
- `evex-to-vex-compress.mir`
- `bitcast-sign-mask.ll`
AI-assisted tools were used during investigation and development.
The resulting changes were reviewed, modified, validated, and tested by
me.
Signed-off-by: Oscar Priego Verdugo <oscar.priegov at gmail.com>
Commit: 79230407a26e8d7de47e4c8e7b7f7b0d63bee00c
https://github.com/llvm/llvm-project/commit/79230407a26e8d7de47e4c8e7b7f7b0d63bee00c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[clang][AST][NFC] Make ASTContext::isPFPField() static (#220265)
Commit: 09520670fec80a117bb34307ef684cf8bafbe71b
https://github.com/llvm/llvm-project/commit/09520670fec80a117bb34307ef684cf8bafbe71b
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/test/API/commands/frame/recognizer/step-through/TestFrameRecognizerStepThrough.py
Log Message:
-----------
[lldb] Match frame recognizers by function when the frame has no symbol (#222060)
A frame can have a function without having a symbol: a PE/COFF image
built with DWARF carries no symbol table at all, so `symctx.symbol` is
null on Windows while `symctx.function` resolves fine from the debug
info. `GetRecognizerForFrame` bailed out on `!symbol`, so no frame
recognizer ever matched there.
Fall back to the function's start address when there is no symbol. The
symbol still wins when both are present, so this is a no-op on
ELF/Mach-O.
This fixes `TestFrameRecognizerStepThrough.py`.
Commit: 48ae4d3b158042b4ad77a6b23aa412aedac7105a
https://github.com/llvm/llvm-project/commit/48ae4d3b158042b4ad77a6b23aa412aedac7105a
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__optional/optional_ref.h
M libcxx/test/std/utilities/optional/optional.monadic/transform.pass.cpp
Log Message:
-----------
[libc++] Fix `optional<T>::transform` into `optional<T&>` (#221506)
Resolves #220332
- Make `optional<T>` a friend of `optional<T&>`, and add tests.
Commit: 6b728014512aefa838e3b1674355589c901cdde2
https://github.com/llvm/llvm-project/commit/6b728014512aefa838e3b1674355589c901cdde2
Author: Alexander Wilson <rdtscp at meta.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.h
A bolt/test/RISCV/call-relocation-pair.s
A bolt/test/RISCV/unsymbolized-call-edge.s
A bolt/test/RISCV/unsymbolized-call-entry.s
A bolt/test/RISCV/unsymbolized-call.s
A bolt/test/RISCV/unsymbolized-long-jump.s
Log Message:
-----------
[BOLT][RISCV] Fix AUIPC/JALR call rewriting (#216882)
This builds on the RISC-V decoder support from #217550 and the BOLT
target symbolizer and GOT relocation handling from #217944, both of
which are now merged.
`R_RISCV_CALL` and `R_RISCV_CALL_PLT` cover an AUIPC/JALR pair, but BOLT
treated them as four-byte relocations and decoded only the AUIPC
immediate. Read both instructions and combine their signed high and low
immediates so relocated call targets retain the low 12 bits.
LTO can also leave linker-resolved intra-section AUIPC/JALR calls
without relocations. On RV64, recognize standard call and tail-call
pairs during disassembly, reconstruct the target (including JALR
target-bit clearing), and attach an exact entry-point symbol before
function reordering. Alternate link-register preservation is provided by
the merged #218408.
This follows the RISC-V Unprivileged ISA sections on AUIPC and JALR:
https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html
It also follows the RISC-V ELF psABI procedure-call relocations:
https://riscv-non-isa.github.io/riscv-elf-psabi-doc/#_relocations
Tests cover relocation-backed calls, relocation-free RV64 calls and tail
calls, exact function entry points, signed offsets, JALR target-bit
clearing, and rejection of near matches.
Validation:
- Rebuilt `llvm-bolt`, `llvm-mc`, `llvm-objdump`, `llvm-readelf`, and
`lld`.
- All 658 tests in `bolt/test/RISCV` and `llvm/test/MC/RISCV` pass on
current `main`.
**Scope:** Relocation-free recovery is intentionally RV64-only. RV32
XLEN-wrapped target arithmetic remains out of scope. Symbolizer
infrastructure and GOT correctness are provided by #217944 rather than
this PR.
Assisted-by: Codex
Commit: accf16eec44ec81449fe8cbf0ddd53c1ff567247
https://github.com/llvm/llvm-project/commit/accf16eec44ec81449fe8cbf0ddd53c1ff567247
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/Lex/Lexer.h
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
A clang/test/Parser/cuda-operator-lesslessless.cu
Log Message:
-----------
[clang][CUDA/HIP] Fix parsing of `operator<<<...>` (#218384)
In CUDA mode Lexer merges `<<<` into a single token and Parser fails to
recognize that it is actually a template specialization of `operator<<`
and not a CUDA kernel call expression. Split `<<<` following operator
token to `<<` and `<`.
Commit: be7f0c897238a2d4ae742d1b6db50283069bdeef
https://github.com/llvm/llvm-project/commit/be7f0c897238a2d4ae742d1b6db50283069bdeef
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom relocation-model attributes from tests (#221931)
"relocation-model" was never a real function attribute.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: a86b58566a2581160938db41fa258ff84457b80c
https://github.com/llvm/llvm-project/commit/a86b58566a2581160938db41fa258ff84457b80c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lld/test/ELF/amdgpu-tid.s
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/AMDGPU/xnack-mask.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-cov5.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx90a.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx950.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
Log Message:
-----------
AMDGPU: Remove xnack and sramecc subtarget features (#212792)
Now that these are controlled by module flags, the subtarget
features were just used for assembler and disassembler controls.
Now that the assembler and disassembler can infer these from
the e_flags and target directives, they are no longer necessary.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: ebeb871f9a5fd31f088b7fb952c99cc4da17eeb1
https://github.com/llvm/llvm-project/commit/ebeb871f9a5fd31f088b7fb952c99cc4da17eeb1
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
Log Message:
-----------
[MLIR][XeGPU] Restrict XeGPUPropagateLayout analysis scope (#221793)
This PR prevents concurrent access to traversal and mutation of the
shared IR by restricting the walk scope to determine program order
within each gpu.module.
Previously, although the pass is scoped to a single gpu.module, this
walk climbs all the way up to the enclosing top-level builtin.module and
traverses the entire module — including sibling gpu.modules. When there
is multiple gpu.modules, it causes concurrent traversal and mutation of
the shared IR and eventually leads to a segfault.
Assisted-by: Claude
Commit: b3e641630cbe0c25022e6033bdfc1cbf1fc215b4
https://github.com/llvm/llvm-project/commit/b3e641630cbe0c25022e6033bdfc1cbf1fc215b4
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/SemaCXX/dllimport.cpp
Log Message:
-----------
[Clang](NFC) Rewrite test/SemaCXX/dllimport.cpp as done for dllexport.cpp (#191391)
Commit: 2189cea443f1bb69861af2a1994b11f5aaa5be68
https://github.com/llvm/llvm-project/commit/2189cea443f1bb69861af2a1994b11f5aaa5be68
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/select-first-index-narrow.ll
A llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
A llvm/test/Transforms/LoopVectorize/select-first-index-narrow.ll
Log Message:
-----------
[LV] Add tests for argmin/argmax with a narrow index and ptr IVs (NFC) (#222290)
Extend test coverage for argmin/argmax with truncated IVs and pointer
inductions.
Commit: ef208564acbfc9e8fef0d6c436bac1681f1a6778
https://github.com/llvm/llvm-project/commit/ef208564acbfc9e8fef0d6c436bac1681f1a6778
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
A flang/unittests/Optimizer/AliasAnalysisRecursiveEffectsCacheTest.cpp
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[fir][aa] Add opt-in cache for use by fir `AliasAnalysis` clients (#221973)
Adds `AliasAnalysisRecursiveEffectsCache`, an opt-in cache that memoizes
per-operation read/write summaries so that `getModRef` on an operation
with `HasRecursiveMemoryEffects` does not re-walk its nested regions on
every query.
This is independent of the `getSource()` memoization added separately:
that one is keyed on (value, flags) and answers "what memory does this
value refer to", while this one is keyed on the operation and answers
"what does this operation and everything nested in it read and write".
LICM enables both, since it only hoists pure-read ops and so invalidates
neither.
Commit: 5dc123502ac6ef7de22c67685fe3519e88c51ce4
https://github.com/llvm/llvm-project/commit/5dc123502ac6ef7de22c67685fe3519e88c51ce4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
PowerPC: Drop AllowFPOpFusion from isProfitableToHoist (#221347)
Commit: 173ccf9996f99fd93347ca7f245d954979c811b7
https://github.com/llvm/llvm-project/commit/173ccf9996f99fd93347ca7f245d954979c811b7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
Log Message:
-----------
[SLP]Exclude splat gather subtrees from the store chain retry size
The tree size recorded for a failed store chain attempt gates the
larger-VF retries. The splat gather subtrees are auxiliary to the store
tree and inflated the recorded size, so the deviation check skipped the
VF=4 retry and the chain fell back to VF=2 or scalar.
Reviewers: bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/221241
Commit: bb3c1628511349afbc0a0a82ec690a2da7020b63
https://github.com/llvm/llvm-project/commit/bb3c1628511349afbc0a0a82ec690a2da7020b63
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
Log Message:
-----------
[SLP]Drop unprofitable splat gather subtrees
The keep/drop check ran only when trimming changed something and
ignored the splat emission cost on both sides. Run it in both paths
with the actual costs: keep the subtree if its price plus extracts plus
the reusing gathers' current costs is not worse than re-emitting those
gathers without it. Exclude splat roots from the main trimming loop.
Fixes the perf regression from #220250, reported in https://github.com/llvm/llvm-project/pull/220250?email_source=notifications&email_token=ABI45DSHUYRFN4NA4DILB5T5NZTZTA5CNFSNUABFM5UWIORPF5TWS5BNNB2WEL2JONZXKZKDN5WW2ZLOOQXTKNJWG4ZTSMBZGUYKM4TFMFZW63VMON2GC5DFL5RWQYLOM5S2KZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#issuecomment-5567390950.
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/221717
Commit: 82d63a1ee6083c0fda0d0ef795edce180dba298a
https://github.com/llvm/llvm-project/commit/82d63a1ee6083c0fda0d0ef795edce180dba298a
Author: Alexander Wilson <rdtscp at meta.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/test/RISCV/call-relocation-pair.s
Log Message:
-----------
[NFC][BOLT][RISCV] Fix call-relocation-pair test after NOP removal (#222308)
The test introduced by https://github.com/llvm/llvm-project/pull/216882
expects temporary NOPs from FixRISCVCalls in the emitted binary.
https://github.com/llvm/llvm-project/pull/221965 marks those NOPs for
removal, causing FileCheck to match trailing alignment padding instead
of the rewritten calls.
This caused the call-relocation-pair.s failure on
[bolt-aarch64-ubuntu-dylib, build
6378](https://lab.llvm.org/buildbot/#/builders/216/builds/6378).
Check emitted calls independently of the temporary NOPs and verify the
forward-call target symbols. Preserve the intermediate-pass NOP checks.
Validation: all five test RUN commands pass with local BOLT builds that
retain and remove the temporary NOPs. The original test reproduces the
reported FileCheck failure with the NOP-removing build.
Commit: a6aa47a28dcffa1197fd42cd5b61cc8d5693e0f7
https://github.com/llvm/llvm-project/commit/a6aa47a28dcffa1197fd42cd5b61cc8d5693e0f7
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
Log Message:
-----------
[GlobalISel] Avoid unnecessary call setup work (NFC) (#221892)
Avoid processing call-site attributes twice: once in the attribute
helpers (now dead and deleted) and again in setArgFlags. Let setArgFlags
handle the call-site attributes. Also skip return setup for void calls.
Small -0.03% geomean improvement on CTMark aarch64-O0-g, but consistent
little improvements across the board.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=d2dfca2db156c259a66cfe2c749f786fec2946f0&stat=instructions:u
Assisted-by: codex
Commit: 9a5a9a8a59bbfd0253ed005e231509de4436f2e8
https://github.com/llvm/llvm-project/commit/9a5a9a8a59bbfd0253ed005e231509de4436f2e8
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/docs/Remarks.md
A mlir/include/mlir/Remark/LLVMRemarkImport.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/lib/Remark/CMakeLists.txt
A mlir/lib/Remark/LLVMRemarkImport.cpp
M mlir/lib/Target/LLVM/CMakeLists.txt
M mlir/lib/Target/LLVM/ModuleToObject.cpp
A mlir/test/Dialect/GPU/module-to-binary-nvvm-remarks.mlir
M mlir/unittests/CMakeLists.txt
A mlir/unittests/Remark/CMakeLists.txt
A mlir/unittests/Remark/LLVMRemarkImportTest.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
Log Message:
-----------
[MLIR][Remark] Import LLVM optimization remarks into the remark engine (#222300)
Collect LLVM side of remarks with MLIR's remark infra.
LLVM passes emit their own [optimization
remarks](https://llvm.org/docs/Remarks.html) and MLIR has own. This PR
bridges MLIR and LLVM remarks.
`ModuleToObject` installs a `remark::LLVMToMLIRDiagnosticHandler` on the
`llvm::LLVMContext` it compiles with, which imports these remarks into
the remark engine: the category is the LLVM pass name prefixed with
`llvm-`, the LLVM remark name becomes the name, the message is stored
under the `Remark` argument and the structured LLVM arguments are copied
as metrics. The remark filters therefore select LLVM remarks by pass
name, and `llvm-.*` selects all of them.
Assisted by Claude Fable 5.1
---------
Co-authored-by: Claude Fable 5.1 <noreply at anthropic.com>
Commit: 2061c23717d5cc14215b41e4fbde578375150c79
https://github.com/llvm/llvm-project/commit/2061c23717d5cc14215b41e4fbde578375150c79
Author: David Green <david.green at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
Log Message:
-----------
[AArch64] Improve scheduling info for WHILE instruction (#221930)
They should have a throughput of 2, only using a single M microop.
This is the V3 equivalent of #219122.
Commit: 87d9c3c24ff5941ac08799850a6549b561c98a81
https://github.com/llvm/llvm-project/commit/87d9c3c24ff5941ac08799850a6549b561c98a81
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/support/Mangling.h
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/support/ManglingTest.cpp
Log Message:
-----------
[orc-rt] Add Mangling.h with platform symbol name mangling (#222315)
This implements a cut-down version of the LLVM equivalent (in
llvm/include/llvm/ExecutionEngine/Orc/Shared/Mangler.h): SymbolNameSpec
pairs a name with a kind (assembly, C). Mangling functions
(withMangledNameDo, mangledCopy) apply mangling to SymbolNameSpecs based
on the symbol name kind.
These utilities will be used to report symbols (e.g. controller
interface symbols) in the platform's native mangling, so that linking
against them requires no special handling.
Commit: e5d8a1573950731a7e8c2163e4b9946d0556768f
https://github.com/llvm/llvm-project/commit/e5d8a1573950731a7e8c2163e4b9946d0556768f
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__vector/vector_bool.h
M libcxx/include/vector
M libcxx/test/std/containers/sequences/vector.bool/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace_back.pass.cpp
Log Message:
-----------
[libc++] Backport resolution of LWG2187 to C++11 (#222006)
libc++ has LWG2187 implemented in
2d6e2834a8abcce862ef17c44f62e4de41662748 but only since C++14 mode.
Usually, resolution of an LWG issue should be treated as a Defect Report
and applied to old modes. In the case of LWG2187, the resolution should
be applied to C++11.
Commit: 3e78191c307fc59521b7dd0820ce85f34339f90a
https://github.com/llvm/llvm-project/commit/3e78191c307fc59521b7dd0820ce85f34339f90a
Author: Alex <leha-bot at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[cpack][NSIS Installer] Make installer DPI-Aware (#128470)
See
https://cmake.org/cmake/help/latest/cpack_gen/nsis.html#variable:CPACK_NSIS_MANIFEST_DPI_AWARE
for details.
Commit: 10d4bdf93a82fb290b8c55da6ed19ff54da67296
https://github.com/llvm/llvm-project/commit/10d4bdf93a82fb290b8c55da6ed19ff54da67296
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__hash_table
M libcxx/include/__tree
M libcxx/include/__utility/try_key_extraction.h
M libcxx/test/std/containers/associative/set/emplace.pass.cpp
M libcxx/test/std/containers/unord/unord.set/emplace.pass.cpp
Log Message:
-----------
[libc++] Opt `std::*set` out of map key extraction optimization (#220452)
PR #154512 (relanded by #155565) removed `__can_extract_map_key`, which
had a blanket opt-out for `std::*set`s. The new logic does not have that
opt-out, leading to `std::set`s being incorrectly constructed.
The new regression tests demonstrate this, but essentially the idea is:
1. Have `std::set<T> foo;`
2. Call `foo.emplace(some_t,
arg_that_influences_comparisons_or_hashes);`
3. The emplace will internally search using `some_t` as the key, *not*
`T(some_t, arg_that_influences_comparisons_or_hashes);`
This opts out `std::*set` from this optimization to match previous
behavior.
Tests and fix were produced by an LLM. I reviewed them and they seem
reasonable to me, though I don't have a strong background in libc++
testing conventions.
(Credit to Deva S, our partner who tracked this down. Unfortunately I
don't know his GH handle)
Fixes #220451
Commit: 4f1d2ab0a9e57909a30b9fdce73afb00d7e7d686
https://github.com/llvm/llvm-project/commit/4f1d2ab0a9e57909a30b9fdce73afb00d7e7d686
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/test/Dialect/LLVMIR/parameter-attrs-invalid.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][ABI] Add the nofreeobj param attr to the LLVM dialect (#222137)
Since #218404 clang marks every indirect argument nofreeobj rather than
nofree. LLVM allows it on returns too.
Assisted-by: Cursor / claude-opus-5
Commit: 908172d3d701ff198749418e89f3f9917fa773e1
https://github.com/llvm/llvm-project/commit/908172d3d701ff198749418e89f3f9917fa773e1
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/src/__support/tlsf_table.h
M libc/test/src/__support/tlsf_table_test.cpp
Log Message:
-----------
[libc][baremetal] default NUM_TABLE_ENTRIES to a fixed value of 3 in TLSF (#221807)
Commit: ff6ab759dbfd69a7b8138ed782f09dc979bad72e
https://github.com/llvm/llvm-project/commit/ff6ab759dbfd69a7b8138ed782f09dc979bad72e
Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm-c/lto.h
M llvm/tools/lto/lto.cpp
M llvm/tools/lto/lto.exports
Log Message:
-----------
[llvm-c][lto] Add lto_runtime_lib_symbols_list_for_triple (#221217)
The TableGen-generated `setTargetRuntimeLibcallSets` that is reached via
`getRuntimeLibcallSymbols` has no unconditional block — every branch is
arch-gated and returns, so an unknown triple sets nothing available, and
the list of symbols comes back empty.
This patch adds a second entry point to the C LTO API that takes a
triple and passes it along.
Bump `LTO_API_VERSION`.
Commit: 5282d0c073beba1c2569222ede55ff943d46fcef
https://github.com/llvm/llvm-project/commit/5282d0c073beba1c2569222ede55ff943d46fcef
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
Log Message:
-----------
[Clang] Skip invalid fields when synthesizing defaulted comparisons (#221570)
Fixes #194605
`CheckFieldDecl` already rejects `int [[clang::address_space(1)]] i;`
and marks the field invalid, but `DefaultedComparisonVisitor` still
visited it when synthesizing the defaulted `operator==`.
`BuildFieldReferenceExpr` then tripped the
`!MemberQuals.hasAddressSpace()` assertion. Both
`__is_trivially_equality_comparable(S)` and a plain `a == b` reach that
path.
`visitSubobjects` now skips invalid fields, the same way
`SpecialMemberVisitor` and the copy-assignment synthesis already do.
That covers the analyzer and the synthesizer together, and the assertion
stays in place since it still holds for valid code.
Commit: c8460a91f629145012bd1adfc05b08aedfbc7b4d
https://github.com/llvm/llvm-project/commit/c8460a91f629145012bd1adfc05b08aedfbc7b4d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/recurrence.ll
Log Message:
-----------
[ValueTracking] Clarify KnownBits recurrence code (#222266)
While reviewing a related PR, I found the R/L variable naming here very
confusing. Use Start and Step instead, matching the parameter names of
matchSimpleRecurrence().
Also clarify why the context adjustment for the step is necessary, and
add a test that would miscompile if it isn't performed.
Commit: 837a4eab85a2f4e638034a254a2bc74b1986b2ac
https://github.com/llvm/llvm-project/commit/837a4eab85a2f4e638034a254a2bc74b1986b2ac
Author: Linisha <linisha232 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
A llvm/test/CodeGen/X86/eh-return-shstk-32.ll
A llvm/test/CodeGen/X86/eh-return-shstk.ll
Log Message:
-----------
[X86] Avoid invalid ret for EH_RETURN with SHSTK (#219322)
## Summary
Fixes #215298
When lowering `llvm.eh.return` on x86, LLVM rewrites the normal stack
return
address and then emits `ret`. This is incompatible with CET shadow
stacks:
the shadow stack still contains the original return address, so `ret`
raises
a control-protection fault.
This affects code using `__builtin_eh_return` with: -mshstk
-fcf-protection=full
## What changed
When SHSTK is enabled, the x86 `EH_RETURN` pseudo-instruction now
expands to:
```asm
movq %rcx, %rsp
popq %rcx
jmpq *%rcx
```
- The `pop` consumes the rewritten return target and advances the stack
pointer.
- `llvm.eh.return` performs a non-local control transfer to an
explicitly supplied handler address, which was never pushed by a
matching `call`. It therefore cannot satisfy `ret`'s architectural
shadow-stack matching requirement regardless of implementation, so
an indirect `jmp` is used instead.
- The existing `mov %rcx, %rsp; ret` sequence is preserved for targets
without SHSTK support.
- The expansion handles 32-bit and 64-bit targets, including the
existing
Windows/UEFI x64 indirect-jump variant.
## Testing
Added: `eh-return-shstk.ll`
The test verifies that:
- non-SHSTK targets continue to emit `ret`
- SHSTK targets emit `pop` followed by an indirect `jmp`
- machine instruction verification succeeds in both configurations
Validation performed:
```bash
ninja -C build llc FileCheck llvm-config count not
build/bin/llvm-lit -sv llvm/test/CodeGen/X86/eh-return-shstk.ll
```
Passed: 1 (100.00%)
The original C reproducer was also compiled with the rebuilt Clang. Its
`pop_frame` function now emits:
```asm
movq %rcx, %rsp
popq %rcx
jmpq *%rcx
```
Runtime execution of the reproducer could not be fully validated because
the
available environment is WSL2 without usable CET shadow-stack support.
The
compiler output and LLVM regression test both pass, but this does not
confirm the control-protection fault is resolved on real CET-enabled
hardware, only that the expected instruction sequence is now emitted.
---------
Co-authored-by: Phoebe Wang <phoebe.wang at intel.com>
Commit: 6694be0f79c28f1b62556e3ea82ae074af1e27ba
https://github.com/llvm/llvm-project/commit/6694be0f79c28f1b62556e3ea82ae074af1e27ba
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/Interfaces/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
M mlir/include/mlir/Transforms/CMakeLists.txt
M mlir/lib/Bytecode/CMakeLists.txt
M mlir/lib/Dialect/ArmNeon/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSME/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSVE/IR/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
M mlir/lib/Dialect/DLTI/CMakeLists.txt
M mlir/lib/Dialect/EmitC/IR/CMakeLists.txt
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/GPU/Utils/CMakeLists.txt
M mlir/lib/Dialect/IRDL/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/Linalg/IR/CMakeLists.txt
M mlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/OpenACCMPCommon/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Ptr/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
M mlir/lib/Dialect/Transform/IR/CMakeLists.txt
M mlir/lib/Dialect/Transform/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Vector/IR/CMakeLists.txt
M mlir/lib/Dialect/X86/IR/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/SPIRV/CMakeLists.txt
M mlir/lib/Transforms/CMakeLists.txt
M mlir/lib/Transforms/Utils/CMakeLists.txt
Log Message:
-----------
[MLIR] Fix and classify generated-header dependencies (#222329)
This is fixing missing CMake dependencies to make our build graph
correct. It is a bit verbose but will be cleaned up in a following patch
making handling of the generated header automatic.
List the TableGen targets owned by each affected library, and add the
missing LLVM generated-header, SPIR-V source-generation, OpenACC/OpenMP
generated-input, and CIR operation/type prerequisites found by clean
dependency audits. Correct two stale copy-paste dependencies and the
duplicate CIR link entry.
The Transforms pass declarations and dialect inliner interface are
independent of any dialect. Classify both under mlir-generic-headers,
and associate the inliner interface with MLIRTransformUtils, which
publishes InliningUtils.h. This gives every MLIR library the required
ordering without repeated header-only edges.
Assisted-by: Codex
Assisted-by: Claude Code
Co-authored-by: Claude Fable 5.1 <noreply at anthropic.com>
Commit: 660a54c87b3940c7eb1e51a5af523b9a24fc2b99
https://github.com/llvm/llvm-project/commit/660a54c87b3940c7eb1e51a5af523b9a24fc2b99
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
A mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
A mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
M mlir/test/Target/LLVMIR/opaque-ptr.mlir
Log Message:
-----------
[mlir][llvm] Fix metadata and alignment on masked memory intrinsics (#221879)
llvm.intr.masked.load, masked.store, masked.gather and masked.scatter
implemented neither AccessGroupOpInterface nor AliasAnalysisOpInterface,
so they could not carry access_groups, alias_scopes, noalias_scopes or
tbaa. Importing LLVM IR that attached such metadata to one of them
silently dropped it, while llvm.memcpy in the same module preserved it.
Also widen alignment from I32Attr to I64Attr, matching the rest of the
LLVM dialect and LLVM proper, and make it optional. LangRef gives the
default alignment of these four intrinsics as the ABI alignment of the
type, exactly as for llvm.load and llvm.store, so an absent align
parameter attribute now imports as an absent alignment attribute instead
of being materialised as align 1, and an absent alignment attribute
exports without an align parameter attribute. This changes the textual
IR, as alignment = 4 : i32 becomes alignment = 4 : i64. Downstream
updates should rewrite only lines that mention a masked intrinsic rather
than blanket-substituting i32 with i64; other i32 spellings must stay,
including llvm.intr.matrix.*'s rows and columns attributes and i32
vector and element types on the intrinsics themselves.
Co-Authored-By: Claude Opus 5
Commit: da224d66042451154a83001456ea7d4e09819454
https://github.com/llvm/llvm-project/commit/da224d66042451154a83001456ea7d4e09819454
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/function-metadata.ll
Log Message:
-----------
[mlir][llvm] Gate unhandled function metadata warning (#221895)
Emit the warning for unhandled function metadata only when expensive
warnings are requested, matching how the flag is already used for
instruction metadata.
Co-Authored-By: Claude Opus 5
Commit: 31fb1d84516bb48b6f6d1e34b50d069458a64f09
https://github.com/llvm/llvm-project/commit/31fb1d84516bb48b6f6d1e34b50d069458a64f09
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
A llvm/test/CodeGen/AMDGPU/GlobalISel/fma-mix-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
Log Message:
-----------
[AMDGPU] Fix pow with a negative base (#222248)
v_log_f32 of a negative value is NaN, so the old expansion returned NaN
for every negative base
Take the log of `|x|` and fix up the sign
Commit: 18d181c5ea1f4a8bf12c92f6df2d8d8e5c820c0b
https://github.com/llvm/llvm-project/commit/18d181c5ea1f4a8bf12c92f6df2d8d8e5c820c0b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llround.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lround.ll
Log Message:
-----------
[SPIR-V] Fix swapped type sets in G_LROUND/G_LLROUND legalization (#218998)
Result and source types were reversed, only working by luck at widths
where LLT cannot tell int from float, fixes i8 results
Commit: bf5bef4fc3a044818dd4b682caa715c01fabd4fb
https://github.com/llvm/llvm-project/commit/bf5bef4fc3a044818dd4b682caa715c01fabd4fb
Author: estewart08 <ethan.stewart at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
Log Message:
-----------
[openmp] - Remove hwloc INSTALL_INTERFACE on omp target (#218923)
Reasons for removal:
1. hwloc is not present in installed headers, therefore a consumer of
openmp does not need hwloc
2. There is no omp target exported currently, which means
INSTALL_INTERFACE is ignored.
3. If there is a future omp target exported then there is a possible
relocation issue if LIBOMP_HWLOC_INCLUDE_DIR differs in build
environment vs end user's environment.
We need to keep BUILD_INTERFACE for unit testing and ompd build.
Originally introduced in https://reviews.llvm.org/D123888
Commit: b6d2436c2f9f30f8bc4ea58c13c9214e2f302b0a
https://github.com/llvm/llvm-project/commit/b6d2436c2f9f30f8bc4ea58c13c9214e2f302b0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/tools/gold/X86/multiple-sections.ll
Log Message:
-----------
[gold] Don't hardcode section index in test (#222339)
This can either be 1 or 2 depending on whether binutils was
compiled with --enable-rosegment=yes. The test does not care
about the index (only the address), so make it a wildcard.
Commit: f3a5a64129b0b74e1e7132ff8f20829d9c0fd504
https://github.com/llvm/llvm-project/commit/f3a5a64129b0b74e1e7132ff8f20829d9c0fd504
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
Log Message:
-----------
X86: Remove stale EFLAGS live range when converting ADD to LEA (#222029)
convertToThreeAddress may rewrite an EFLAGS-clobbering ADD into an LEA,
which does not define EFLAGS. hasLiveCondCodeDef guarantees the EFLAGS def
was dead, so drop its LiveIntervals value, otherwise the verifier would fail.
Fixes verifier errors with -early-live-intervals.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 87af62fcd0bff82d683dcc3c8f66ef770bd7eaa7
https://github.com/llvm/llvm-project/commit/87af62fcd0bff82d683dcc3c8f66ef770bd7eaa7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
Log Message:
-----------
[CGP] Drop poison generating flags when pushing freeze through cmp (#222314)
We need to clear the samesign flag when pushing freeze through icmp.
In the last commit, I also adjusted the handling of FMF on fcmp to work
the same way -- previously the transform would be skipped instead if the
fcmp had fast math flags. I think just clearing the poison-generating
flags is preferable (and what we'd do anyway in InstCombine and
DAGCombine).
Fixes https://github.com/llvm/llvm-project/issues/222309.
Commit: dacf8ccb5880d9c890db86bb1885e0eb22bc3649
https://github.com/llvm/llvm-project/commit/dacf8ccb5880d9c890db86bb1885e0eb22bc3649
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/store-scalarization-cost.ll
Log Message:
-----------
[VPlan] Cost scalar IV steps in replicate regions. (#221995)
Replace the return 0 bail-out in VPScalarIVStepsRecipe::computeCost in
replicate regions by properly scaling by the execution probability of
the region.
PR: https://github.com/llvm/llvm-project/pull/221995
Commit: 39d5c6238e0b4430c7f5256d689604c19ece7666
https://github.com/llvm/llvm-project/commit/39d5c6238e0b4430c7f5256d689604c19ece7666
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
A llvm/test/tools/llvm-pdbutil/compile3sym.yaml
A llvm/test/tools/llvm-pdbutil/frameprocsym.yaml
Log Message:
-----------
[llvm-pdbutil] Map enums in bitflags for symbols in YAML (#215887)
Both `S_COMPILE3` and `S_FRAMEPROC` have bitflags that also contain
non-bitflag enums. For `S_COMPILE3`, the lower eight bits represent the
language and for `S_FRAMEPROC` there are bits in the middle representing
the frame pointer registers for variables and parameters.
In both cases, the values of the enums were not present in the generated
YAML.
Mapping this in YAML is a bit complicated, because we can't give
`yaml::IO` a reference to the flags. I used local variables and a check
if we're reading to re-assemble the flags.
Commit: 49b63de374d9da1ccabcc70bffbf83efcf49023c
https://github.com/llvm/llvm-project/commit/49b63de374d9da1ccabcc70bffbf83efcf49023c
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/lib/CIR/CodeGen/Address.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byref.cpp
M clang/test/CIR/Transforms/abi-lowering/expand-struct-arg.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-byref-forward-param.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byref-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
Log Message:
-----------
[CIR] Forward a byref argument loaded from a byref parameter (#221057)
When a callee argument comes out of the calling function's own byref
parameter, that pointer already names the object its caller will
destroy, so pass it along as-is.
Assisted-by: Cursor / claude-opus-5
Commit: 647fffcc2173aaee745db7303316740a4c27d138
https://github.com/llvm/llvm-project/commit/647fffcc2173aaee745db7303316740a4c27d138
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
A clang/test/CodeGen/AArch64/neon/rounding.c
R clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
Log Message:
-----------
[CIR][AArch64] Port f64 tests for v8.5 rounding NEON builtins (#221389)
Related to https://github.com/llvm/llvm-project/issues/185382
Port tests from
clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c to
clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
Commit: 757ae56cbe99e0ea4439cc7b0321426828f8c199
https://github.com/llvm/llvm-project/commit/757ae56cbe99e0ea4439cc7b0321426828f8c199
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/ArmNeon/IR/ArmNeonDialect.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/LLVMIR/IR/VCIXDialect.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/test/lib/Dialect/NVGPU/TestNVGPUTransforms.cpp
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[MLIR] Remove unnecessary generated-header include dependencies (NFC) (#222349)
Remove unused dialect and transform headers, and replace broad pass
aggregates with the specific conversion headers used by GPU and
SparseTensor pipelines. Include the core pass and IR builder definitions
directly where unrelated dialect headers previously supplied them
transitively.
These include-only changes avoid unnecessary TableGen header
prerequisites without depending on changes to the CMake generated-header
dependency model.
Assisted-by: Codex
Commit: 86f1e1209a296c6438263d1e9f5be018a6a86dd1
https://github.com/llvm/llvm-project/commit/86f1e1209a296c6438263d1e9f5be018a6a86dd1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
Log Message:
-----------
[SPIR-V] Fix legalized store of single element vector to vector (#222253)
A `<1 x T>` shares its SPIR-V type with the scalar T, so extracting from
it emits OpCompositeExtract on a non-composite, which is rejected by
spirv-val
Commit: e4833173af64d3262a70d518fde99f8ca46f6c1d
https://github.com/llvm/llvm-project/commit/e4833173af64d3262a70d518fde99f8ca46f6c1d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
Log Message:
-----------
[SPIR-V] Fix legalization rewriting non-zero size arrays to pointers (#222276)
legalizeType checked `isa<ArrayType>` with no size guard
Use `shouldLegalizeInstType`, which already checks for zero size
Commit: c664d0dccabe6fc40900f6223284cefe4070a1bf
https://github.com/llvm/llvm-project/commit/c664d0dccabe6fc40900f6223284cefe4070a1bf
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Evaluate/shape.cpp
Log Message:
-----------
[flang] Avoid signed integer overflow in GetNonNegativeExtent (#222207)
`GetNonNegativeExtent()` computes a dimension's extent from constant
bounds as `ub - lb + 1` in `ConstantSubscript` (`int64_t`) arithmetic.
For an oversized dimension such as `integer(1) ::
a(0_8:9223372036854775807_8)`, whose extent is 2\*\*63, that computation
overflows — undefined behavior, and the ubsan failure reported in
#221940.
The wrapped result has to be preserved: storage sequences that are too
large are diagnosed later, while offsets are computed, and that code
tells a genuinely empty dimension from one whose extent wrapped around
by cross-checking the original bounds (`IsEmptyDimension()` in
`Semantics/compute-offsets.cpp`). This patch therefore computes the same
two's complement result with `llvm::SubOverflow()` and
`llvm::AddOverflow()`, which are defined for every input. Subtracting
first also covers bounds of mixed sign, where `ub - lb` can overflow
before the increment.
Fixes #221940
Assisted-by: AI
Commit: 3409f0fd2aea08b57b1ee0047cdec5c26acfa02e
https://github.com/llvm/llvm-project/commit/3409f0fd2aea08b57b1ee0047cdec5c26acfa02e
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
Log Message:
-----------
[AMDGPU] Fix invalid 64-bit DPP formed from folding a 32-bit DPP mov (#222216)
GCNDPPCombine already rejects 64-bit DPP when the DPP move itself is
64-bit, but a 32-bit move folded into a source of a 64-bit instruction
was not checked. On targets without FeatureDPALU_DPP this formed
V_LSHLREV_B64_e64_dpp, whose tied old operand got the move's 32-bit
register class instead of the 64-bit destination class.
Commit: 57edf2997431add187956bd6637f8e83075db957
https://github.com/llvm/llvm-project/commit/57edf2997431add187956bd6637f8e83075db957
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/lib/AST/ODRHash.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RunLoopAutoreleaseLeakChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelConsumer.cpp
Log Message:
-----------
[Clang] Avoid calling hasBody() when calling getBody() directly after (#221845)
`hasBody()` and `getBody()` are virtual functions, so calling them
multiple times should be avoided.
Commit: 1849da9fffcc4a817f83d1c7422e1d98003cfed1
https://github.com/llvm/llvm-project/commit/1849da9fffcc4a817f83d1c7422e1d98003cfed1
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
M clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
M mlir/include/mlir/ABI/ABIRewriteContext.h
M mlir/lib/ABI/Targets/Test/TestTarget.cpp
M mlir/unittests/ABI/ABIRewriteContextTest.cpp
Log Message:
-----------
[CIR] Honor the Direct coercion offset in x86_64 callconv lowering (#220724)
When a record's low eightbyte holds no field, the classifier passes it
in one register read from byte 8 rather than byte 0. CallConvLowering
had no way to represent that, so `convertABIArgInfo` rejected the whole
signature as NYI.
`ArgClassification` now carries the offset and `emitCoercionToMemory`
reads and writes the coerced scalar through a `u8` `cir.ptr_stride` at
that byte. The offset-zero path is untouched.
A register-tuple coercion at an offset is refused rather than read from
the wrong bytes, a pair SysV cannot currently produce.
Drop the pass opt-out flag from one test that no longer needs it.
Supersedes #203640, which had the coercion mechanism but nothing calling
it.
Assisted-by: Cursor / claude-opus-5
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: aaa8531405b31bc17566de55202431c8d6dc22b9
https://github.com/llvm/llvm-project/commit/aaa8531405b31bc17566de55202431c8d6dc22b9
Author: Jake Daly <48452250+jakemdaly at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
Log Message:
-----------
[CodeGen] Visit operands inside bundles in DetectDeadLanes (#220645)
`modifySubRegisterOperandStatus` walked each basic block with
`MachineBasicBlock`'s default iterator, which visits only top-level
instructions and steps over the contents of a `BUNDLE`. Dead/undef flags
were therefore only ever updated on the `BUNDLE` header, even though the
analysis half of the pass walks `MRI` use lists and does account for
bundle-internal operands. The pass reasoned about operands it then refused
to update.
A register referenced both by the header and by a bundled instruction
ends up with the two disagreeing about whether the bundle reads it, and
consumers split on which half they believe: `ScheduleDAGInstrs::buildSchedGraph`
and `LiveIntervals::handleMove` look at the header only, while
`RegisterOperandsCollector` descends into the bundle. The scheduler can
then move a bundle across a dependence it never modelled, and
`RegPressureTracker::recede` asserts on an empty use lane mask.
Walk `MBB.instrs()` instead, so the rewrite sees the same operands the
analysis did.
Commit: cd570f8304b7bb2faaec36d0707ecf8bb8e889f3
https://github.com/llvm/llvm-project/commit/cd570f8304b7bb2faaec36d0707ecf8bb8e889f3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Interfaces/TilingInterface.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Utils/CMakeLists.txt
M mlir/lib/Interfaces/CMakeLists.txt
Log Message:
-----------
[MLIR] Remove and narrow unnecessary header dependencies (NFC) (#222364)
This is prerequisite work on reducing the amount of CMake dependencies
on (TableGen) generated header.
Forward-declare IteratorType in TilingInterface.h instead of including
all structured-operation utilities. Include those utilities directly in
SCF and Tensor implementations that use their enum values and helpers,
and remove TilingInterface's dependency on the DialectUtils library.
Replace DialectUtils's Arith library prerequisite with its operation
generator, and SPIR-V's GPU library prerequisite with its
compilation-interface generator. Drop VCIX's obsolete GPU
compilation-interface prerequisite.
Assisted-by: Codex
Commit: 48aa9f6be52448b362d5b681ccca82c8fa48712a
https://github.com/llvm/llvm-project/commit/48aa9f6be52448b362d5b681ccca82c8fa48712a
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/CallGraph.h
Log Message:
-----------
[CallGraph] Remove dead removeAllCalledFunctions and stealCalledFunctionsFrom (NFC) (#222252)
CallGraphNode::removeAllCalledFunctions: Added on November 26, 2001 in
commit e409c460bf87ef9211d42e1b6ede0df750aeb64a (originally as
removeAllCalledMethods) without any callers.
CallGraphNode::stealCalledFunctionsFrom: The last caller was removed on
June 24, 2022 in commit 217e85761cd1978931e29546e15716614e3b2fcc.
Assisted-by: Antigravity
Commit: 2de38b4861ed4a7be7ddd42fc803e91d1fe81b14
https://github.com/llvm/llvm-project/commit/2de38b4861ed4a7be7ddd42fc803e91d1fe81b14
Author: Hadong Lee <hdchris765 at snu.ac.kr>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/icmp-urem.ll
Log Message:
-----------
[InstCombine] Fold comparisons of urem with dividend (#214933)
This folds equality comparisons of `X urem Y` with `X`
- `(X urem Y) == X` to `X ult Y`
- `(X urem Y) != X` to `X uge Y`
For a defined `urem`, let `Q = X udiv Y` and `R = X urem Y`. Unsigned
division gives `X = Q * Y + R`, so:
```
R == X
<=> Q * Y == 0
<=> Q == 0 (since Y != 0)
<=> X < Y
```
Division by zero is undefined behavior, so no separate handling for `Y
== 0` is required.
This handles commuted compare operands, scalar and vector types, and
remainders with additional uses
Alive2: https://alive2.llvm.org/ce/z/3ryQaE
simplified proof with both folds: https://alive2.llvm.org/ce/z/v39F4d
Fixes #214480
Commit: ecd333f7e71fc67aa388a5824520e2df11c08886
https://github.com/llvm/llvm-project/commit/ecd333f7e71fc67aa388a5824520e2df11c08886
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
Log Message:
-----------
[RISCV] Correct some constants in orc-b-patterns.ll. NFC (#222229)
Based on the test function names being similar to other function, I
assume these were supposed to generate orc.b.
Also remove unnecessary nuw, nsw, and exact flags.
Commit: 4c0681233c84d923b9455b30875304520029c6e5
https://github.com/llvm/llvm-project/commit/4c0681233c84d923b9455b30875304520029c6e5
Author: Usman Nadeem <mnadeem at qti.qualcomm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
M llvm/test/CodeGen/ARM/vtrn.ll
M llvm/test/CodeGen/WebAssembly/simd-setcc-reductions.ll
Log Message:
-----------
[SDAG][ComputeNumSignBits] Look through undefined high bits for EXTRACT_VECTOR_ELT in a BUILD_VECTOR (#218099)
If we have a `BUILD_VECTOR(EXTRACT_VECTOR_ELT()...)` where the
`EXTRACT_VECTOR_ELT` is adding undefined high bits by extending but the
`BUILD_VECTOR` is again truncating those bits, then we can just look
through the extract and call `ComputeNumSignBits` directly on the parent
vector.
Ideally, when the caller is truncating the value, it would be nice for
`ComputeNumSignBits` to have the ability to ignore high bits we don't
care about.
Commit: 44b33260a38c8a0ec0083f950fe9d839ade72ab6
https://github.com/llvm/llvm-project/commit/44b33260a38c8a0ec0083f950fe9d839ade72ab6
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Attr.td
M clang/test/Sema/attr-c2x.c
Log Message:
-----------
[clang] treat [[gnu::flag_enum]] as equivalent to [[clang::flag_enum]] (#219105)
GCC gained a `[[gnu::flag_enum]]` attribute for consistency with clang
in GCC 15. With this patch, the `[[gnu::flag_enum]]` is recognized and
handled equivalently to `[[clang::flag_enum]]`.
The patch introducing `[[gnu::flag_enum]]` in GCC is
https://github.com/gcc-mirror/gcc/commit/1914ca8791ce4e0ba821e818cb6f86c76afdb6f2.
GCC treats `[[clang::flag_enum]]` as equivalent to `[[gnu::flag_enum]`.
Commit: f40e465b112a1a0cc1f6f544b33f3569bd364e36
https://github.com/llvm/llvm-project/commit/f40e465b112a1a0cc1f6f544b33f3569bd364e36
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/split-sum-expression-tree-subscripts.f90
Log Message:
-----------
[flang] Ignore subscript conversions when reassociating sums (#222302)
Implicit conversions of INTEGER(4) array indices to SubscriptInteger
were treated as conversions in the surrounding floating-point sum,
preventing reassociation of ordinary array-element expressions.
Stop only the conversion traversal at subscripts. Keep the independent
side-effect and volatile/asynchronous checks and embedded numeric
conversion restrictions unchanged.
Assisted-by: Codex
Commit: 62b7ae5dc327ba80b54e76a2964f34ff60f6ee91
https://github.com/llvm/llvm-project/commit/62b7ae5dc327ba80b54e76a2964f34ff60f6ee91
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
Log Message:
-----------
[AMDGPU] Compact virtual register numbers in sdwa-ops.mir (NFC) (#222197)
Renumber vregs in appearance order.
Commit: 9f9ed8295a38db3189fcec96fb6f9964e32753c7
https://github.com/llvm/llvm-project/commit/9f9ed8295a38db3189fcec96fb6f9964e32753c7
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/glob_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/glob_t.h
M libc/include/CMakeLists.txt
A libc/include/glob.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/glob-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/glob_t.h
M libc/src/CMakeLists.txt
A libc/src/glob/CMakeLists.txt
A libc/src/glob/glob.cpp
A libc/src/glob/glob.h
A libc/src/glob/globfree.cpp
A libc/src/glob/globfree.h
M libc/test/src/CMakeLists.txt
A libc/test/src/glob/CMakeLists.txt
A libc/test/src/glob/glob_test.cpp
Log Message:
-----------
[libc] Add <glob.h> POSIX header. (#221362)
* Provide the `<glob.h>` header as defined in POSIX:
https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/glob.h.html.
* Provide declaration of `glob_t` struct type, and `GLOB_*` family of
macros for controlling `glob()` function behavior and
for describing `glob()` error return codes.
* Provide stubs / placeholder implementations for `glob()` and
`globfree()` functions - similar to `fnmatch()`
added in f571c5e34a06bc769924ff9100b6f31612279ab0 those would likely
depend in part on pattern matching
logic shared between them and with regex.
* Since there are no real implementations yet, only enable the header
and entrypoints on Linux platforms with
`LLVM_LIBC_ENABLE_EXPERIMENTAL_ENTRYPOINTS` specified.
Commit: abdd057f56f38a469fc13597a5c7f1d43792e56b
https://github.com/llvm/llvm-project/commit/abdd057f56f38a469fc13597a5c7f1d43792e56b
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
Log Message:
-----------
Fixes Bazel BUILD error in #411a8eea0c269fff79700da1b3a9e71914718d4b (#222371)
Adds missing deps for kmt_traits.
Commit: a49d01f26b6c43e4712464e0a07249e92ff792ef
https://github.com/llvm/llvm-project/commit/a49d01f26b6c43e4712464e0a07249e92ff792ef
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A flang-rt/include/flang-rt/runtime/unit.h
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/execute.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api-common.h
M flang-rt/lib/runtime/io-api-minimal.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt-minimal.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/unit-map.h
M flang-rt/lib/runtime/unit.cpp
R flang-rt/lib/runtime/unit.h
A flang-rt/test/Driver/iotype.f90
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/ChildIO.cpp
Log Message:
-----------
[flang][Runtime] Reset the information of namelist formatting when invoking child I/O (#218314)
The flag of namelist formatting is enabled when IONAME(OutputNamelist)
or IONAME(InputNamelist) is called, but it was never disabled afterward.
This patch disables the flag when invoking child I/O, as child I/O
cannot use namelist formatting.
Fixes #201516
Commit: 64ee3d3172c3cc7ebefe71fb3ca7a53bb5a73d44
https://github.com/llvm/llvm-project/commit/64ee3d3172c3cc7ebefe71fb3ca7a53bb5a73d44
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Log Message:
-----------
[AArch64] Cost vector.match intrinsics that require type legalization (#220852)
Recent patches (#218972, #218972) have added type-legalization support
for vector.match. This allows us to remove the exact type and search
size requirements from the intrinsic cost. This in turn will simplify
the combine in #212456.
Commit: 45ffe88d73f5e147315bca4bdb7ce1d730725586
https://github.com/llvm/llvm-project/commit/45ffe88d73f5e147315bca4bdb7ce1d730725586
Author: Hüseyin Kutsi Balcı <balcihkutsi at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/HowToSubmitABug.rst
M llvm/docs/PDB/PdbStream.md
Log Message:
-----------
[docs] Fix two stale file paths (#213994)
Two documentation paths point at files that are not there.
- `HowToSubmitABug.rst` tells readers to run
`clang/utils/creduce-clang-crash.py`. The script was renamed to
`reduce-clang-crash.py` in 59cee030f and the doc was not updated with
it.
- `PDB/PdbStream.rst` gives `llvm/DebugInfo/CodeView/CVDebugRecord.h`.
That header moved to `llvm/include/llvm/Object/CVDebugRecord.h` in
211c67cdb.
Neither old path resolves at `main`; both replacements do.
## AI disclosure
AI-assisted (Claude Code), per the AI Tool Use Policy. A sweep resolved
the repo-internal paths written in `llvm/docs`, `clang/docs`,
`mlir/docs`, `lld/docs`, `libcxx/docs` and `flang/docs` against the
tree; only these two failed to resolve anywhere. Before opening I
checked both replacements in the tree and found the commits that renamed
and moved them, and went through the rest of the sweep's output — the
remaining candidates are correct in context and were left alone. I have
reviewed and understood the change and take responsibility for it.
Commit: 8104261f2c74b41d63d9e043fe3631e20af54609
https://github.com/llvm/llvm-project/commit/8104261f2c74b41d63d9e043fe3631e20af54609
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_until_comp.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of parallel std::is_heap() based on std::is_heap_until() (#221556)
This PR adds a "one-liner" implementation of a parallel `std::is_heap()`
based on `std::is_heap_until()`.
The implementation is effectively a call to `std::is_heap_until()` and a
comparison with the last iterator:
```c++
auto res = IsHeapUntil()(policy, first, last, comp);
if (!res) {
return nullopt;
}
return *res == last;
```
Part of #99938.
Commit: 52feb1fe499914ef1d7669fa75ab46e12b1a37dd
https://github.com/llvm/llvm-project/commit/52feb1fe499914ef1d7669fa75ab46e12b1a37dd
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
Log Message:
-----------
[NFC][VPlan] Move `introduceMasksAndLinearize` into a `VPPredicator`'s method (#217483)
To reduce diff in the next PRs.
AI-assisted.
Commit: eff57ef78633c2eff5ae2cb7e4fa8e11e14d4b46
https://github.com/llvm/llvm-project/commit/eff57ef78633c2eff5ae2cb7e4fa8e11e14d4b46
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Expr.h
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGenCXX/GH128985.cpp
A clang/test/CodeGenCXX/Inputs/embed-data.txt
A clang/test/SemaCXX/GH128985.cpp
Log Message:
-----------
[clang][CodeGen] Fix assertion failure with #embed in array new-expression initializers (#218262)
Fixes #128985
An `EmbedExpr` in a semantic initializer list can represent many array
elements at once, and every consumer of such lists has to expand it. The
array `new` emitter, `EmitNewArrayInitializer`, never did: it counted
the `EmbedExpr` as one element and emitted it through the scalar path,
hitting `assert(E->getDataElementCount() == 1)`. The undercount also
made the runtime minimum allocation check too lax and miscomputed the
trailing zero-fill size.
`Codegen` now emits one store per embed data element, converted to the
element type, and counts initializers with
`getNumInitsWithEmbedExpanded()` in both places. That helper also
learned to look through implicit casts, since Sema wraps a multi-element
`EmbedExpr` in a conversion when the element type isn't `int` — the
other embed consumers already strip casts before checking.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 6f7ca253fc3674856afe665eda40f9856a69e804
https://github.com/llvm/llvm-project/commit/6f7ca253fc3674856afe665eda40f9856a69e804
Author: Michał Górny <mgorny at gentoo.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/test/libcxx/atomics/clear_padding.pass.cpp
Log Message:
-----------
[libc++] Disable SSP in `clear_padding.pass.cpp` (#218130)
Compile `clear_padding.pass.cpp` test `-fno-stack-protector` to fix
crash due to the generated code overflowing the buffer. This is most
likely a bug in clang.
Bug #212002
Fixes a test regression introduced in #76180
CC @huixie90
---------
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: b9d0703f7d6bd040bf317b1099729ba3a421f33c
https://github.com/llvm/llvm-project/commit/b9d0703f7d6bd040bf317b1099729ba3a421f33c
Author: Matt Turner <mattst88 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
M compiler-rt/test/asan/TestCases/complete_stack_trace.c
Log Message:
-----------
[sanitizer_common] Disable the fast unwinder on Alpha Linux (#220231)
BufferedStackTrace::UnwindFast walks the stack assuming frame[0] is the
caller's frame pointer and frame[1] the return address. Alpha chains
neither, so the walk yields a few garbage frames and then stops:
```
freed by thread T0 here:
#0 0x020000971274 in free asan_malloc_linux.cpp:51
#1 0x0200007fa48c (<unknown module>)
```
Opt Alpha out of the fast unwinder the way Linux/MIPS already is. The
_Unwind_Backtrace based unwinder gives complete traces; with it, GCC's
g++.dg/asan/deep-stack-uaf-1.C passes on alpha-unknown-linux-gnu.
Commit: 17092bd38d0d7a4c37d6bcbf6e96177d2aacbc43
https://github.com/llvm/llvm-project/commit/17092bd38d0d7a4c37d6bcbf6e96177d2aacbc43
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
Log Message:
-----------
[SystemZ] XPLINK64: use AExt for 32-bit pointer formals (#222350)
CC_XPLINK64_Pointer was setting LocInfo=ZExt, promising the optimizer
that the caller had zero-extended bit 32. Evidence from Open XL 1.1 and
2.2 shows that callers do not consistently zero-extend `__ptr32`
arguments
-- Open XL 1.1 emits nothing on the caller side; Open XL 2.2 only
zero-extends in the explicit cast case. Every actual use of a 31-bit
pointer goes through `addrspacecast` which emits `LLGTR` to clear bit 32
at
the point of use, so no callee relies on the register being clean at the
parameter boundary. Change LocInfo to AExt to accurately reflect that
only the low 32 bits are valid.
Extracted from #206833 per reviewer request.
Commit: 9756cbfea1d7cdfdd2d15d26cdfbe1db6c775923
https://github.com/llvm/llvm-project/commit/9756cbfea1d7cdfdd2d15d26cdfbe1db6c775923
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Use canonical shift amount type when decomposing a multiply. (#222211)
This allows the shifts to CSE with other shifts that are already in
canonical form.
Commit: 15bf5e575a6a1a5ecb80a98922223e31fda25204
https://github.com/llvm/llvm-project/commit/15bf5e575a6a1a5ecb80a98922223e31fda25204
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
Log Message:
-----------
[InstCombine] Prepare to support trunc nuw condition in foldAndOrOfICmps (NFC) (#221555)
this is a NFC rewrite to be able to support Trunc nuw by using m_IcmpLike matcher in foldAndOrOfICmps
Commit: d506b595872f3e0bf29e2546cd7e5ff55cdd2e32
https://github.com/llvm/llvm-project/commit/d506b595872f3e0bf29e2546cd7e5ff55cdd2e32
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
[InstCombine] support trunc condition in foldSelectICmpAndAnd (#220690)
Fixes regression seen in test in https://github.com/llvm/llvm-project/pull/184182
Commit: 290c4d79e964bb22ca9a4ff8453770c427d5f345
https://github.com/llvm/llvm-project/commit/290c4d79e964bb22ca9a4ff8453770c427d5f345
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[docs][libFuzzer] Fix `-timeout_exitcode` and `-error_exitcode` descriptions (#221776)
Commit: 4f057d974babd7782c175b4f13274346ab44aa21
https://github.com/llvm/llvm-project/commit/4f057d974babd7782c175b4f13274346ab44aa21
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/CXX/stmt.stmt/stmt.iter/stmt.ranged/p1.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
[Clang][Sema] Error message refers to `__begin1` with `constexpr` variable in range-based for loop (#218145)
Fixes #211926
When a range-based for loop variable is declared `constexpr`, its
initializer is the compiler-built `*__begin1`, which normally can't be a
constant expression. The constant evaluator reports what it sees at the
leaf — `read of non-constexpr variable '__begin1' is not allowed in a
constant expression`, plus a `declared here` note pointing at the loop's
colon — without saying what `__begin1` is.
Both constant evaluators now emit a single dedicated note when they read
one of the loop's implicit variables, so the existing `constexpr
variable 'x' must be initialized by a constant expression` error is
followed by `'__begin1'-variable of range-based 'for' loop is not a
constant expression`, pointed at the loop it belongs to. The note takes
the variable as an argument, so it names `__end1` or `__range1` when
those are what was read. No Sema changes. A constexpr loop variable that
*is* valid (CWG1204, when `operator*` never reads the iterator) still
compiles, and expansion statement (`template for`) variables are
unaffected since their synthesized iterators are themselves `constexpr`.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 1c380fe977a121a325110c742032c6bbdfc06d32
https://github.com/llvm/llvm-project/commit/1c380fe977a121a325110c742032c6bbdfc06d32
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-select-remap.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Reapply "[SimplifyCFG] Fix profcheck failure from #213302" (#220932) (#220939)
This reverts commit 02d1fabd22d599bad38b2b926c7bcaaf41aff6e0.
Rerequesting review as I merged prematurely. This fixes a newly
introduced SimplifyCFG profcheck failure by correctly propagating branch
weight information.
Commit: 366be9717d45a9e8f72865bf94a9ef42faf4c2f7
https://github.com/llvm/llvm-project/commit/366be9717d45a9e8f72865bf94a9ef42faf4c2f7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr222363.ll
Log Message:
-----------
[X86] getBT - ensure we ANY_EXTEND or TRUNCATE the bit test index to match the source value (#222374)
Fixes #222363
Commit: cbdd30c4bf239adc33e2025a579372b41bec9512
https://github.com/llvm/llvm-project/commit/cbdd30c4bf239adc33e2025a579372b41bec9512
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lld/.clang-format
Log Message:
-----------
[lld] Set WrapNamespaceBodyWithEmptyLines: Never (#221423)
77% of anonymous namespaces in lld start without an empty line, as do
59% of namespace bodies overall. lld/ELF is the most consistent at 95% and 87%.
Requires clang-format 20.
Commit: 4728d3c8e911e9f67e8eaf2f6756364f10518560
https://github.com/llvm/llvm-project/commit/4728d3c8e911e9f67e8eaf2f6756364f10518560
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/builtin_vectorelements.cpp
M clang/test/SemaCXX/ptrauth-type-discriminator.cpp
A clang/test/SemaOpenCLCXX/vec_step.clcpp
Log Message:
-----------
[clang] Reject references to vector types in `__builtin_vectorelements` (#219767)
Fixes #216997
`__builtin_vectorelements` shares its operand check with `sizeof` and
friends, and that shared code looks through reference types before it
dispatches to the per-builtin check. So `__builtin_vectorelements(veci4
&)` was accepted by Sema, but the expression kept the reference as its
argument type, and everything downstream — constant evaluation, the
bytecode interpreter, CodeGen — expects that type to be a vector.
Constant-evaluating the initializer in the reproducer then trips
`assert(Ty->isSizelessVectorType())`. The alias syntax in the report
isn't the cause; `vec` there is a well-formed reference-to-vector type.
The check now runs before the reference is looked through, so a
reference to a vector type gets the existing "must be of vector type"
error, the same one `__builtin_vectorelements(int &)` already produced.
No other trait kind is affected.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 4bd42ad3ade67d5c1498081df08cab4090a32551
https://github.com/llvm/llvm-project/commit/4bd42ad3ade67d5c1498081df08cab4090a32551
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/test/Transforms/InstCombine/negated-bitmask.ll
Log Message:
-----------
[InstCombine] restrict InstCombineNegator for sub(y,and(lshr(x,C),1)) (#222075)
For the general sub(y,and(lshr(x,C),1)) case the rewrite replaces one
2-instructions
sequence with another without reducing instruction count, and the
resulting shl/ashr form prevents later target-specific combines (e.g.
on PowerPC the original lshr+and maps to a single rldicl, while the
shl+ashr form requires sldi+sradi).
in the patch, Only applies when this is a true negation (LHS is zero).
sub(0,and(lshr(x,C),1)) --> add(ashr(shl(x,(BW-1)-C),BW-1),0)
Commit: 4dce46202961f348bf51a15d73bfe8bcfe8feb28
https://github.com/llvm/llvm-project/commit/4dce46202961f348bf51a15d73bfe8bcfe8feb28
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
A llvm/test/CodeGen/SystemZ/zos-xplink64-formal-sub64-extend.ll
Log Message:
-----------
[SystemZ] XPLINK64: emit narrow sign/zero-extend instructions for sub-i32 formal args (#206833)
Previously, i8/i16 integer formal arguments with signext/zeroext
attributes were promoted to i64 via CC_XPLINK_Promote_i32 using
LocVT=i64, causing the DAG to select LGFR/LLGFR (word-sized extends) for
all sub-i64 types instead of the narrower byte/halfword forms required
for XL compiler binary compatibility.
Root cause: LLVM type-legalizes i8/i16 to i32 before the CC table runs,
so ValVT is always i32 by the time CC_XPLINK_Promote_i32 is called. The
pre-legalization original type (Ins[i].ArgVT) is the only way to
distinguish i8/i16 formals from i32 formals at that point.
Fix:
- Add ArgOrigVTs to SystemZCCState, populated in AnalyzeFormalArguments
from Ins[i].ArgVT (using MVT::Other as sentinel for non-simple EVTs),
with a getArgOrigVT(ValNo) accessor that returns MVT::Other safely when
called outside AnalyzeFormalArguments (e.g. from AnalyzeCallOperands).
- In CC_XPLINK_Promote_i32 with isFormalArgLowering=true: for original
i8/i16, keep LocVT=i32 (GR32 live-in) only when a GPR is still available
(probed via getFirstUnallocated([R1L,R2L,R3L])). When all GPRs are
taken, the arg goes to an 8-byte stack slot where the caller stores a
sign-extended i64 with the value in bytes 6–7; LocVT=i64 is used in that
case so the full 8 bytes are loaded correctly.
- In LowerFormalArguments: after convertLocVTToValVT, truncate from the
legalized i32 down to the true i8/i16 so the DAG folds the
truncate+extend into a narrow instruction. Guarded by isTargetXPLINK64()
and ArgVT.isSimple().
- Extend CCIfType from [i32] to [i8, i16, i32] in CC_SystemZ_XPLINK64.
Result — callee side:
| Type | Attribute | Before | After |
|------|-----------|--------|-------|
| `i8` | `signext` | `LGFR` / `LGF` | `LGBR` / `LGB` |
| `i8` | `zeroext` | `LLGFR` / `LLGF` | `LLGCR` / `LLGC` |
| `i16` | `signext` | `LGFR` / `LGF` | `LGHR` / `LGH` |
| `i16` | `zeroext` | `LLGFR` / `LLGF` | `LLGHR` / `LLGH` |
| `i32` | `signext` | `LGFR` | `LGFR` (unchanged) |
Binary compatibility analysis:
The XPLINK64 ABI requires every caller to deliver a fully
sign/zero-extended 64-bit value in the argument register before the
call, regardless of the original type width. This patch only changes the
callee-side re-extension instruction; the caller side (LowerCall /
AnalyzeCallOperands) is unchanged and continues to emit LGFR/LLGFR for
outgoing sub-i32 arguments, or LGB/LGH/LLGC/LLGH when loading directly
from memory.
Because any ABI-compliant caller always delivers a full 64-bit
sign-extended value, bit 7 (for i8) or bit 15 (for i16) is always the
authoritative sign bit in the incoming register. Re-extending from that
bit with LGBR/LGHR yields the same result as LGFR from bit 31. The
matrix below covers all mixed-version combinations:
| Caller | Callee | Register value at call site | Callee re-extension |
Correct? |
|--------|--------|-----------------------------|---------------------|----------|
| Any (memory load) | new | `LGB`/`LGH` → full i64 | `LGBR`/`LGHR` | ✓
bit 7/15 intact |
| Open XL 1.1 | new | full GR64, no extend needed | `LGBR`/`LGHR` | ✓
ABI-compliant i64 |
| Open XL 2.2 | new | `LGFR` → full i64, bit 7 = sign | `LGBR`/`LGHR` |
✓ bit 7 intact |
| new | Open XL 2.2 | `LGFR` (caller side unchanged) | `LGFR` | ✓
identical to before |
| new | Open XL 1.1 | `LGFR` (caller side unchanged) | none (trusts
GR64) | ✓ GR64 is valid |
| Java/JNI | new | no extend (raw GR64 from JVM) | `LGBR`/`LGHR` | ✓ JVM
guarantees full i64 per JNI spec |
| new | Java/JNI | `LGFR` (caller side unchanged) | none | ✓ GR64 is
valid |
No binary incompatibility in any direction.
Adds lit test zos-xplink64-formal-sub64-extend.ll covering all five
integer types, the optnone spill path, and small struct coercion cases.
Updates call-zos-01.ll and call-zos-vararg.ll.
Commit: 9a9f50ed485aaf42a204a2aa0eae1d46f4aba8e0
https://github.com/llvm/llvm-project/commit/9a9f50ed485aaf42a204a2aa0eae1d46f4aba8e0
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__configuration/language.h
M libcxx/include/__locale_dir/wbuffer_convert.h
M libcxx/include/__locale_dir/wstring_convert.h
M libcxx/include/locale
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/ctor.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_codecvt.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_err_string.pass.cpp
Log Message:
-----------
[libc++] Remove `_LIBCPP_EXPLICIT_SINCE_CXX14` (#222221)
The existence of `_LIBCPP_EXPLICIT_SINCE_CXX14` is a relic of the
questionable status quo of LWG2176 - we only implement its resolution
since C++14 mode (7988106b21628afe7004b57ae66ec9b43cbc8942). In
a11f8b1ad66d68ca0a3a277ce776007abff9c7eb
(https://reviews.llvm.org/D91292), we implemented P0935R0 as a Defect
Report against C++11, and P0935R0 somehow superseded LWG2176. So it is a
bit unreasonable to leave LWG2176 not backported.
This patch backports the remaining parts of LWG2176 to old modes. As the
copy constructor of `wbuffer_convert` and `wstring_convert` are deleted,
implicit conversions to them cannot be performed in C++03 even if the
related converting constructors lack `explicit`.
As drive-by, also drops `// C++20` comments on these constructors due to
P0935R0 and `// C++14` comments due to LWG2176.
Commit: eb5cd179549d68b8b94efd1ddafc6c743ed98597
https://github.com/llvm/llvm-project/commit/eb5cd179549d68b8b94efd1ddafc6c743ed98597
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
R lldb/scripts/convert-lldb-header-to-rpc-header.py
M lldb/scripts/framework-header-fix.py
M lldb/source/API/CMakeLists.txt
M lldb/test/CMakeLists.txt
R lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckBasicIncludesEmit.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckConstCharPointer.h
R lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckBasicIncludesEmit.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckConstCharPointer.test
R lldb/test/Shell/RPC/Generator/lit.local.cfg
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBEnumerations.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBTypes.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckSBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/SBDefines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-defines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-enumerations.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-types.h
R lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
M lldb/test/Shell/Scripts/TestFrameworkFixScript.test
M lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
R lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/RPCCommon.cpp
R lldb/tools/lldb-rpc-gen/RPCCommon.h
R lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
R lldb/tools/lldb-rpc/CMakeLists.txt
R lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
R lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
Log Message:
-----------
[lldb] Remove LLDBRPC (#222093)
Chelsea (the champion of this effort) has left the team and nobody on my
team will have bandwidth to continue upstreaming this. This simplifies
our CMake and support scripts greatly.
Commit: fe9f67b35c068dc39788fd94f5194ca44109992a
https://github.com/llvm/llvm-project/commit/fe9f67b35c068dc39788fd94f5194ca44109992a
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
Log Message:
-----------
[lldb] Replace string type in ELFSectionHeaderInfo (#218490)
I plan on replacing the string type in LLDB's Section class, so the
first thing I will do is remove ConstString from all producers.
Commit: f72d8ff6d3f6dc481a72a63f9fb18aa92353e04c
https://github.com/llvm/llvm-project/commit/f72d8ff6d3f6dc481a72a63f9fb18aa92353e04c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/test/Analysis/BasicAA/call-attrs.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.ll
M llvm/test/CodeGen/ARM/returned-ext.ll
M llvm/test/CodeGen/ARM/struct-byval-loop.ll
M llvm/test/CodeGen/M68k/multiple-return.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/RISCV/rvv/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SystemZ/args-14.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/VE/Scalar/call.ll
M llvm/test/CodeGen/VE/Scalar/va_callee.ll
M llvm/test/CodeGen/VE/Vector/fastcc_caller.ll
M llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
M llvm/test/CodeGen/X86/bool-zext.ll
M llvm/test/CodeGen/X86/return-ext.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll
M llvm/test/Transforms/DeadArgElim/deadexternal.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/PhaseOrdering/pr64289-tce.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
M llvm/test/Transforms/SimplifyCFG/hoist-sink-swifterror-store.ll
M llvm/unittests/IR/AttributesTest.cpp
Log Message:
-----------
Revert [IR] Do not inherit ABI attributes from the callee (#222384)
Reverts #207173, plus #221892 due to a merge conflict.
Apparently we have some issues with call-site zeroext/signext on
libcalls, see
https://github.com/llvm/llvm-project/pull/207173#issuecomment-5604972674.
Commit: 91665e7aa17c4d829be459db92856eb0dbb32620
https://github.com/llvm/llvm-project/commit/91665e7aa17c4d829be459db92856eb0dbb32620
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
A llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
Log Message:
-----------
[CodeGen] Don't derive MODereferenceable from !dereferenceable metadata (#222069)
The two facts are about different pointers. `!dereferenceable` on a load
"tells the optimizer that the value loaded is known to be
dereferenceable" while `MachineMemOperand::MODereferenceable` says the
access itself doesn't trap.
Commit: 31157bbadddf2dafbfffbc23518988fa83dd4884
https://github.com/llvm/llvm-project/commit/31157bbadddf2dafbfffbc23518988fa83dd4884
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[NFC][VPlan] Move `m_RemoveMask` to `VPlanPatternMatch.h` (#219059)
I plan to use it in the `VPlanPredicator.cpp`.
AI-assisted.
Commit: 23de87dae7695634bb618e188912de11267f1dd0
https://github.com/llvm/llvm-project/commit/23de87dae7695634bb618e188912de11267f1dd0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/CMakeLists.txt
M clang/cmake/modules/CMakeLists.txt
M flang/CMakeLists.txt
M llvm/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/CrossCompile.cmake
M llvm/docs/CMake.md
M llvm/docs/ReleaseNotes.md
M mlir/CMakeLists.txt
M mlir/cmake/modules/CMakeLists.txt
M mlir/test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/XeGPU/CMakeLists.txt
Log Message:
-----------
[CMake] Add dependent project mode for Flang's MLIR (#221724)
`LLVM_ENABLE_PROJECTS` historically treats projects enabled to satisfy
another
project's dependency the same as projects selected by the user.
Consequently,
implicit projects attach their complete build, install, and test suites
to
LLVM's aggregate targets.
Keep the cache entry as the user-requested project roots and use the
normal
`LLVM_ENABLE_PROJECTS` variable as the effective dependency closure.
Projects
in the effective list but not the cache entry are configured with
`EXCLUDE_FROM_ALL`. Normalize the special `all` value before comparing
the two
sets.
This makes Flang's MLIR and Clang dependencies dependency-only without a
second
project collection. It also applies the same rule to Clang when it is
added for
LLDB. Forward the cached roots to cross-compilation and bootstrap
configurations so implicit projects do not become explicit in nested
builds.
Let MLIR own its dependency-only test policy: configure its complete
test tree
so `check-mlir` remains available, but exclude MLIR test execution and
build
dependencies from `check-all`. Explicitly enabling MLIR preserves the
existing
behavior.
Validation:
- Configured Flang with implicit MLIR test support.
- Configured Flang and MLIR explicitly with tests enabled.
- Configured `LLVM_ENABLE_PROJECTS=all` with tests disabled.
- Verified implicit mode exposes `check-flang` and `check-mlir` while
`check-all` runs Flang but not MLIR.
- Verified explicit mode includes MLIR tests in `check-all`.
Commit: 0c5f85f9a24a0cdeccb05a362cd40b03da6f1783
https://github.com/llvm/llvm-project/commit/0c5f85f9a24a0cdeccb05a362cd40b03da6f1783
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/macro-fusion-add-mem.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-imm-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-imm.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-mul-add.mir
M llvm/test/CodeGen/RISCV/macro-fusion-shift-bit-extract.mir
M llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
M llvm/test/CodeGen/RISCV/macro-fusions.mir
M llvm/test/CodeGen/RISCV/xqci-macro-fusions.mir
Log Message:
-----------
[RISCV] Use run-pass instead of start-before in macrofusion tests. NFC (#222390)
We're only checking the debug output from the scheduler pass, we don't
need to more of the pipeline.
Commit: 44eec13c0264542d1d116ac0e8c2dcf1153fe37c
https://github.com/llvm/llvm-project/commit/44eec13c0264542d1d116ac0e8c2dcf1153fe37c
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
A flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
Log Message:
-----------
[flang][FIRToMemRef] Do not peel storage-association views (#222376)
After #215402, peelZeroOffsetViews walked through fir.convert that
changes the pointee type (e.g. !fir.ref<complex<T>> → !fir.ref<T>).
Load/store then indexed the parent array and converted the value, which
is wrong for Fortran storage association: it fails verification
(memref.store / illegal fir.convert) or silently changes bits (sitofp /
fpext).
Stop peeling when the accessed element type changes. Marshal the typed
view as a rank-0 memref of the dummy type. Same-type wrappers
(fir.declare, ref<T> → ref<T>) still peel to fir.array_coor.
Commit: e45b19d32e7c5e883ed4b50970a2233bbc6a8a7e
https://github.com/llvm/llvm-project/commit/e45b19d32e7c5e883ed4b50970a2233bbc6a8a7e
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix flang and MLIR bazel builds (#222395)
- Add missing TargetLLVM dependency on RemarkStreamer (introduced in
#9a5a9a8a59bb)
- FlangOptimizerTests missing //mlir:ArithDialect (introduced in
#ef208564acbf)
- GPUPipelines and SparseTensorPipelines fixes (from changes in
#757ae56cbe99)
Commit: e146e27ab993d013ab16a706f0fd84ab3818b575
https://github.com/llvm/llvm-project/commit/e146e27ab993d013ab16a706f0fd84ab3818b575
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/pr70510.ll
Log Message:
-----------
[ConstraintElim] Use largest usable bound to check no-wrap regions. (#222295)
The unsigned no-wrap region of an add with a constant operand has
UMAX - C as upper bound. For 64 bit operations, the upper bound is
usually larger than MaxConstraintValue, so it will be decomposed as
variable instead of a constant value.
This improves results end-to-end in a few more cases, without any
additional queries:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1234.
PR: https://github.com/llvm/llvm-project/pull/222295
Commit: 8e36f93835f1bdb74492d8ac26e7bdab4f4f1884
https://github.com/llvm/llvm-project/commit/8e36f93835f1bdb74492d8ac26e7bdab4f4f1884
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[SimplifyCFG] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/220477
Commit: a173863e63415ae54b5d0abf1bc5897c61604e5f
https://github.com/llvm/llvm-project/commit/a173863e63415ae54b5d0abf1bc5897c61604e5f
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/mkdtemp.cpp
A libc/src/stdlib/linux/mkstemp.cpp
A libc/src/stdlib/linux/mktemp_util.h
A libc/src/stdlib/mkdtemp.h
R libc/src/stdlib/mkstemp.cpp
M libc/src/stdlib/mkstemp.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/mkdtemp_test.cpp
Log Message:
-----------
[libc] Implement mkdtemp (#222106)
Add the POSIX mkdtemp entrypoint for Linux targets (aarch64, riscv,
x86_64).
Extract the shared template replacement and random character retry loop
into linux/mktemp_util.h, relocating mkstemp to linux/mkstemp.cpp and
reusing the helper across both entrypoints.
Add comprehensive unit tests covering directory creation, permissions,
uniqueness, and invalid template handling.
Assisted-by: Automated tooling, human reviewed.
Commit: d638a855953de5cd12bd0e257f617bc943bd58e5
https://github.com/llvm/llvm-project/commit/d638a855953de5cd12bd0e257f617bc943bd58e5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration.ll
Log Message:
-----------
[Transforms][Utils] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222382
Commit: 244ec9557be24db8ca9d212f2f7bd29e91ea06ec
https://github.com/llvm/llvm-project/commit/244ec9557be24db8ca9d212f2f7bd29e91ea06ec
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
Log Message:
-----------
[Transforms][Scalar] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222388
Commit: 4b8c39ea8e67fe1ed07bbf0fec0229a5ebfc90fb
https://github.com/llvm/llvm-project/commit/4b8c39ea8e67fe1ed07bbf0fec0229a5ebfc90fb
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
Revert "[InstCombine] support trunc condition in foldSelectICmpAndAnd" (#222413)
Reverts llvm/llvm-project#220690
seems like this fails asan builds eg
https://lab.llvm.org/buildbot/#/builders/24/builds/23814
Commit: 4471c681e781fe14922a2ecf1684654a4522f271
https://github.com/llvm/llvm-project/commit/4471c681e781fe14922a2ecf1684654a4522f271
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-privatize.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep.mlir
Log Message:
-----------
[flang][acc] Support sizing array of derived type for openacc mapping (#222404)
Adds support for array of derived type - tested both for mapping and
privatization. Now acc.map_info can be generated for this.
Commit: 33cdc33dd6e941fe4dd1a61ba7d7ec32933e3bfd
https://github.com/llvm/llvm-project/commit/33cdc33dd6e941fe4dd1a61ba7d7ec32933e3bfd
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
Log Message:
-----------
[AMDGPU] Fix CHECKs for sdwa-ops.mir test13 and also eliminated unnecessary global live-ins (#222392)
Address #220798 reviewer comments for sdwa-ops.mir test13
Commit: 0a566538519064f8587dd930c88bf553761c405f
https://github.com/llvm/llvm-project/commit/0a566538519064f8587dd930c88bf553761c405f
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb] Accept the non-Darwin test build dir in the clean rule guard (#222412)
#197237 dropped the `.noindex` suffix from the test build directory on
non-Darwin, but the guard on the `clean` rule still looks for
`lldb-test-build.noindex`. In Swiftlang, every test that invokes it
fails off Darwin:
```
Makefile.rules:741: *** Trying to invoke the clean rule, but not using the default build tree layout. Stop.
```
Match `lldb-test-build` instead, which covers both layouts and keeps the
guard's intent of not letting the rule loose on an arbitrary directory.
Commit: e9f1f00dd49cb382b3eaef136666664eaaa16450
https://github.com/llvm/llvm-project/commit/e9f1f00dd49cb382b3eaef136666664eaaa16450
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Transforms/PhaseOrdering/lto-is-constant.ll
Log Message:
-----------
[LLVM][libc] Defer lowering of constant intrinsics in full LTO (#221505)
Summary:
This PR defers the lowering of the constant intrinsics. Currently it was
inheriting the default module pipeline and being done pessimistically in
the pre-link LTO phase. This means that some objects which would become
known constants were returned as failures. Doing this in the post-link
phase is more optimistic.
I included the `libc` change that justifies this in the PR, but it can
be split out if needed. The observation is that the ExpandVariadics pass
will lower most variadic calls on the GPU to an alloca of known size.
Using this opportunistically saves us a spill to stack ordinarily needed
to copy back the size from the GPU. Without this, every use of GPU
printf resulted in a spill to stack memory.
Hopefully this is benign enough.
Commit: 68da0c7ac7ed94a5f1c4df1119335cb74da4be8f
https://github.com/llvm/llvm-project/commit/68da0c7ac7ed94a5f1c4df1119335cb74da4be8f
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-shared-loop-invariant.ll
Log Message:
-----------
[SLP] De-duplicate costing of perfect-diamond gather spills (#220569)
Commit: 228749bf71a0f05b2ce214a153969603f1a902f8
https://github.com/llvm/llvm-project/commit/228749bf71a0f05b2ce214a153969603f1a902f8
Author: kwyatt-ext <kwyatt.external at hpe.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Parser/executable-parsers.cpp
A flang/test/Parser/recovery10.f90
Log Message:
-----------
[flang] Collapse execution-part statement error flood into one error message (#220988)
An unrecognizable statement in the execution part of a source file
produced one "expected 'KEYWORD'" error for every possible statement
because each execution-part-construct alternative failed at the same
source position and the alternative combinator merges the messages of
same-position ties.
Wrapped the keyword-led alternatives in `withMessage` so that when none
of them matches a token, the flood is discarded in favor of a single
"expected an executable statement" diagnostic.
This fixes the problem identified in Issue:
https://github.com/llvm/llvm-project/issues/220696
Assisted-by: AI (Claude)
Commit: 8aebfb31ab1a454187763bbfa1619f1f64d191f6
https://github.com/llvm/llvm-project/commit/8aebfb31ab1a454187763bbfa1619f1f64d191f6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
Log Message:
-----------
[Transforms] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222393
Commit: e829049823905405779c6b908437b200e7ed1b2e
https://github.com/llvm/llvm-project/commit/e829049823905405779c6b908437b200e7ed1b2e
Author: Gábor Tóthvári <gabor.tothvari at ericsson.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
Log Message:
-----------
[NFC][analyzer] Cleanup checker calls in `ExprEngine::ProcessStmt`, `ExprEngine::Visit*` (#218691)
Begin standardizing how `PreStmt` checkers and `PostStmt` checkers are
called by the analyzer engine. Previously, checkers were called either
from `ExprEngine::Visit` or the visit method of the statement. Now this
logic was hoisted out into `ExprEngine::ProcessStmt` and most of the
checker calls happen from there.
There are several statement kinds that do not call checkers at all or
only call `PreVisit` or only call `PostVisit` checkers. There are also
statement kinds whose visit code does not easily lend itself to the
`PreVisit`, `Visit`, `PostVisit` scheme, so those have been left
unmodified and will be refactored in a separate patch. The checker
calling status of statement kinds have been documented in the function
`shouldJustCallCheckers`.
Commit: 2c9afb46c32ccf19fe048688e273cad4c7b3dfc6
https://github.com/llvm/llvm-project/commit/2c9afb46c32ccf19fe048688e273cad4c7b3dfc6
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN bitfield extract builtins (#222186)
Adds codegen for the following AMDGCN bitfield extract builtins:
* __builtin_amdgcn_ubfe (unsigned)
* __builtin_amdgcn_sbfe (signed)
These are lowered to the corresponding `llvm.amdgcn.ubfe` and
`llvm.amdgcn.sbfe` intrinsics.
Commit: 3cab00bd5674d374e702807a57a3db432a351086
https://github.com/llvm/llvm-project/commit/3cab00bd5674d374e702807a57a3db432a351086
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN fract builtins (#222185)
Adds codegen for the following AMDGCN fract builtins:
* __builtin_amdgcn_fract (double)
* __builtin_amdgcn_fractf (float)
* __builtin_amdgcn_fracth (half)
These are lowered to the corresponding `llvm.amdgcn.fract` intrinsics.
Commit: 5ad3dd8a19d4ef59a13ac0052abe5fbca7b2823c
https://github.com/llvm/llvm-project/commit/5ad3dd8a19d4ef59a13ac0052abe5fbca7b2823c
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
Log Message:
-----------
[AMDGPU] Add more attributes to some intrinsics to help with attribute propagation (#222222)
Commit: 2c09e15d1cd4e6c42a7eddf4f09bed9dab0145e3
https://github.com/llvm/llvm-project/commit/2c09e15d1cd4e6c42a7eddf4f09bed9dab0145e3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang-rt/lib/cuda/init.cpp
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Emit Mcuda_compiled sentinel for CUDA Fortran objects (#222421)
Objects compiled as CUDA Fortran now declare an undefined Mcuda_compiled
symbol from CUFAddConstructor when emit-cuda-compiled is set. Linking
without the CUDA Fortran runtime then fails with a clear undefined
reference instead of only _FortranACUFInit, which is limited to PROGRAM
units.
The CUDA Fortran runtime defines the symbol so linking with the CUDA
Fortran runtime still succeeds.
Commit: 9c4200de17ced044bd832ec5e4e78c2e0ab25fd7
https://github.com/llvm/llvm-project/commit/9c4200de17ced044bd832ec5e4e78c2e0ab25fd7
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
Log Message:
-----------
[AMDGPU] Update REV Opcode DPP Combine test to have True16 and Fake16 runs (#222217)
DPP is not implemented for VGPR16 operands, so we also need runs with
True16 disabled to verify that combining into opcodes that might use
them is being properly guarded.
Commit: 77874a5794a3bb007cda2e6a5ac77e7ce48cf8c4
https://github.com/llvm/llvm-project/commit/77874a5794a3bb007cda2e6a5ac77e7ce48cf8c4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprClassification.cpp
A clang/test/SemaCXX/imag-lvalue-with-non-complex-operand.cpp
Log Message:
-----------
[Clang][Sema] Make _Imag int/float LValue not assignable (#218270)
Clang accepts `__real int/float` as an LValue because it's equal to the
scalar value itself, so the assignment will work fine, but it's not the
case for `__imag` because, for int and float, there is no imaginary part
to assign a value to it, so in the sema we can reject this case, similar
to GCC.
Fixes: #119498
Commit: 6fb705da6eac41c4ff4625c0a89861defc67e124
https://github.com/llvm/llvm-project/commit/6fb705da6eac41c4ff4625c0a89861defc67e124
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadx-heap.mlir
Log Message:
-----------
[mlir][openacc] Keep vector-private storage per-lane in ACCCGToGPU (#222134)
Give each lane its own allocation when `ThreadX` is active and the shape
is too large or too dynamic to be considered for stack alloca.
`processPrivatize` published a single allocation through a workgroup
slot indexed by `ThreadY`, so all lanes of a worker ended up sharing one
buffer.
Commit: c4c32a50adc88bf28a9188dcd946cdc2af7c19f2
https://github.com/llvm/llvm-project/commit/c4c32a50adc88bf28a9188dcd946cdc2af7c19f2
Author: Tim Kientzle <tkientzle at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
Log Message:
-----------
[LIT] Fix quadratic behavior collecting process output (#222419)
Repeatedly appending to a string is quadratic.
This makes lit very slow when tests emit large amounts of output.
Fixing this speeds up one Swift compiler test by 36x (from 720s down to
20s).
Commit: cd10182794b76adacc6a1c94953cdb2891d5735b
https://github.com/llvm/llvm-project/commit/cd10182794b76adacc6a1c94953cdb2891d5735b
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv-btc.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
Log Message:
-----------
[NFC][VPlan] Add extra tests for VPlan-based stride speculation (#218795)
For https://github.com/llvm/llvm-project/pull/182595.
Commit: 2f91c9c95a93be6d559dd0028a35c9f5e15d3dcf
https://github.com/llvm/llvm-project/commit/2f91c9c95a93be6d559dd0028a35c9f5e15d3dcf
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm
Log Message:
-----------
[CodeGen] Relax an overly strict assert in EmitAggregateCopy (#219090)
EmitAggregateCopy contains a sanity check verifying that a record being
bitwise copied has a genuinely trivial copy/move constructor or
assignment operator. The check did not account for records that are
non-trivial only because they contain an ARC __strong field. Such
records are still trivial for the purposes of calls, so clang can
legitimately use memcpy to copy them when passing or returning the type
by value.
Relax the assertion by using hasTrivialCopyConstructorForCall() and
hasTrivialMoveConstructorForCall() instead of the plain
hasTrivialCopyConstructor()/hasTrivialMoveConstructor() checks, since
these are exactly the predicates that capture that notion of triviality
for calls. This also makes the separate hasAttr<TrivialABIAttr>() check
redundant, since the trivial_abi attribute unconditionally sets the
for-call bits for the copy constructor, move constructor, and
destructor.
rdar://182749806
Commit: 44fc88bb27df4cbbe94d225398894d5175ae5f30
https://github.com/llvm/llvm-project/commit/44fc88bb27df4cbbe94d225398894d5175ae5f30
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[offload][level_zero] Remove async queues (#222267)
Remove old queues now that new inorder queues seems stable enough (and
more in line with what is needed for liboffload).
Commit: f6f71edb4346d586bb97485116175efd9a696ee8
https://github.com/llvm/llvm-project/commit/f6f71edb4346d586bb97485116175efd9a696ee8
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/IR/VerifierInternal.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/Verifier/AMDGPU/alloca.ll
A llvm/test/Verifier/AMDGPU/global-variable.ll
Log Message:
-----------
[AMDGPU] Introduce address space 13 for VGPR as memory (#208557)
Introduce address space 13 (enum, datalayout, verifier allowance, docs)
for VGPR as memory. No codegen in this PR.
Co-authored-by: Nicolai Hähnle <Nicolai.Haehnle at amd.com>
Commit: 177bbcb1dffa5459436f6472ca23c3d9a1479e73
https://github.com/llvm/llvm-project/commit/177bbcb1dffa5459436f6472ca23c3d9a1479e73
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[InstCombine] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: nikic, mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222409
Commit: 836b5a419d792cd56f1cb8c91a8cf4d00172be2e
https://github.com/llvm/llvm-project/commit/836b5a419d792cd56f1cb8c91a8cf4d00172be2e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
Log Message:
-----------
[IR] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Also remove some calls to applyProfMetadataIfEnabled that were added
before the cutoff date. Leave the rest that were added afterwards.
Reviewers: mtrofin, nikic
Pull Request: https://github.com/llvm/llvm-project/pull/222425
Commit: 68080c4a963f8d7dd0a1bec65555dd5ef8a5e3bc
https://github.com/llvm/llvm-project/commit/68080c4a963f8d7dd0a1bec65555dd5ef8a5e3bc
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGenOpenMP/barrier.c
M clang/test/CIR/CodeGenOpenMP/decl-not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CIR/CodeGenOpenMP/target-host-op-filtering.c
M clang/test/CIR/CodeGenOpenMP/target-map-llvm-device.c
M clang/test/CIR/CodeGenOpenMP/target-map.c
Log Message:
-----------
[CIR] Fix OpenMP tests by adding a triple. (#222345)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that.
Commit: c2e89e8955bacc8c6b10fba311038f4c12b55e00
https://github.com/llvm/llvm-project/commit/c2e89e8955bacc8c6b10fba311038f4c12b55e00
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copy.c
M clang/test/CIR/CodeGenOpenACC/compute-copy.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data-copy-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/declare-deviceptr.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/routine-anon-ns.cpp
M clang/test/CIR/CodeGenOpenACC/routine-bind.c
M clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
M clang/test/CIR/CodeGenOpenACC/routine-clauses.cpp
M clang/test/CIR/CodeGenOpenACC/routine-device_type.cpp
M clang/test/CIR/CodeGenOpenACC/routine-globals.cpp
M clang/test/CIR/CodeGenOpenACC/routine-globals2.cpp
M clang/test/CIR/CodeGenOpenACC/routine-locals.cpp
M clang/test/CIR/CodeGenOpenACC/routine-members.cpp
M clang/test/CIR/CodeGenOpenACC/routine-ns.cpp
M clang/test/CIR/CodeGenOpenACC/routine-templ.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/update.c
M clang/test/CIR/CodeGenOpenACC/wait.c
Log Message:
-----------
[CIR] Fix OpenACC tests by adding a triple. (#222344)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that.
Commit: eff777582665d7c076824cec211fe20c6fb154e5
https://github.com/llvm/llvm-project/commit/eff777582665d7c076824cec211fe20c6fb154e5
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/ProfileData/SampleProfWriter.cpp
Log Message:
-----------
[nfc][ProfileData] Fix -Wrange-loop-construct in SampleProfileWriter (#220726)
Fixes warnings:
```
SampleProfWriter.cpp:804:12: note: use reference type 'std::pair<llvm::sampleprof::FunctionId, unsigned long> const &' to prevent copying
804 | for (const auto [TypeName, Count] : *Map) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| &
SampleProfWriter.cpp:829:12: note: use reference type 'std::pair<llvm::sampleprof::FunctionId, unsigned long> const &' to prevent copying
829 | for (const auto [TypeId, Count] : *Map) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| &
```
Commit: 1daadb8ac65d52e612e4ced185467ff9d363afd9
https://github.com/llvm/llvm-project/commit/1daadb8ac65d52e612e4ced185467ff9d363afd9
Author: Augusto Noronha <anoronha at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M llvm/include/llvm/TargetParser/Triple.h
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[Triple] Sink clang's DebugEntryValueArchs list into Triple (#222136)
So that other frontends can use it.
Assisted-by: claude
rdar://186478816
Commit: 3ff11b27bbd8eca219dab55e9589fcf6a76a79cb
https://github.com/llvm/llvm-project/commit/3ff11b27bbd8eca219dab55e9589fcf6a76a79cb
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/test/fuzzer/fuzzer-finalstats.test
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[libFuzzer] Don't count leak-verification re-executions towards `-runs` (#221036)
Fixes #66331. Stop countring the verification run in
TryDetectingAMemoryLeak() as part of TotalNumberOfRuns, as the number of
executed units could exceed -runs=N.
Commit: 173a02c755bf91fecf90ac4df972128baea91da8
https://github.com/llvm/llvm-project/commit/173a02c755bf91fecf90ac4df972128baea91da8
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/convert-nontemporal-to-llvm.fir
M flang/test/Fir/convert-to-llvm-access-group.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/tbaa.fir
M flang/test/Fir/vector-always-cfg.fir
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMOps.h
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ComplexToLLVM/complex-range-option.mlir
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
M mlir/test/Conversion/VectorToLLVM/vector-load-store-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/bytecode.mlir
M mlir/test/Dialect/LLVMIR/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/dereferenceable-invalid.mlir
M mlir/test/Dialect/LLVMIR/ifunc.mlir
M mlir/test/Dialect/LLVMIR/inlining-alias-scopes.mlir
M mlir/test/Dialect/LLVMIR/inlining-loop-annotation.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/LLVMIR/tbaa-roundtrip.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/Import/ifunc.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/Import/metadata-loop.ll
M mlir/test/Target/LLVMIR/Import/metadata-profiling.ll
M mlir/test/Target/LLVMIR/Import/metadata-tbaa.ll
M mlir/test/Target/LLVMIR/Import/target-ext-type.ll
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction.mlir
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
M mlir/test/Target/LLVMIR/anonymous-tbaa.mlir
M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
M mlir/test/Target/LLVMIR/attribute-dereferenceable.mlir
M mlir/test/Target/LLVMIR/attribute-tbaa.mlir
M mlir/test/Target/LLVMIR/ifunc.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/loop-metadata.mlir
M mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
M mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-nowait.mlir
M mlir/test/Target/LLVMIR/opaque-ptr.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-nontemporal.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-simd-private.mlir
M mlir/test/Target/LLVMIR/openmp-simd-reduction-simple.mlir
M mlir/test/Target/LLVMIR/openmp-target-private.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir
M mlir/test/Target/LLVMIR/target-ext-type.mlir
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[MLIR][LLVM] Enable strict property assembly format (#217277)
Enable strict property assembly format mode for the LLVM dialect. Bind
LLVM operation properties directly in declarative assembly formats so
strict parsing does not rely on fallback handling.
Update LLVM dialect, target, and conversion tests to use the direct
property spelling.
Assisted-by: Codex
Commit: b1b68627b9da8d4bbdf9a39bb2bde52dd6ce8bf3
https://github.com/llvm/llvm-project/commit/b1b68627b9da8d4bbdf9a39bb2bde52dd6ce8bf3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/CMakeLists.txt
M llvm/CMakeLists.txt
Log Message:
-----------
[CIR][CMake] Configure MLIR as a dependency-only project (#221739)
Enable MLIR implicitly for ClangIR without attaching its unrelated tools
and test suite to the aggregate build. An explicit MLIR selection
retains its normal behavior. Add MLIR after all Clang consumers enable
Clang, so CIR also works when Clang is enabled for LLDB.
Package the required MLIR libraries through Clang's existing exports and
LLVM's distribution policy. Register dependency library and header
install components and honor toolchain-only installations. When Clang is
itself an implicit Flang dependency, let Flang package the required
targets.
Keep MLIR test support available for CIR and retain the standalone
ClangIR restriction. Leave MLIR disabled when CIR is disabled.
Assisted-by: Codex
Commit: e6114dbeed424ce7c483000e181f97b962a56fe7
https://github.com/llvm/llvm-project/commit/e6114dbeed424ce7c483000e181f97b962a56fe7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeVectorStorage.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
M mlir/lib/Dialect/SCF/Transforms/ForallToParallel.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/Transforms/scf-replace-with-new-yields.mlir
M mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
Log Message:
-----------
[mlir][Affine][SCF][Vector] Migrate to split inherent/discardable attribute APIs (#218913)
Migrate the Affine, Arith, Arm vector, SCF, and Vector dialect families
and related conversions to explicit discardable or typed attribute
access.
Assisted-by: Codex
Commit: 97d5de84b6936c6366a0e184211f683b43e73429
https://github.com/llvm/llvm-project/commit/97d5de84b6936c6366a0e184211f683b43e73429
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU][NFC] Simplify conditional return in SIInstrInfo.cpp (#222426)
Commit: d3db069999553568848400c84cbf815c03f5470f
https://github.com/llvm/llvm-project/commit/d3db069999553568848400c84cbf815c03f5470f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable wmma_*_f4 instructions for gfx1250-strict (#222434)
Commit: 92e630bec71c247905906d5c72d8cba64963c9f8
https://github.com/llvm/llvm-project/commit/92e630bec71c247905906d5c72d8cba64963c9f8
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/Textures-scalar-AST.hlsl
M clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
M clang/test/AST/HLSL/Textures-vector-AST.hlsl
M clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default.hlsl
M clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
Log Message:
-----------
[HLSL] Add Texture3D and RWTexture3D types (#220438)
Fixes https://github.com/llvm/llvm-project/issues/194739 and fixes
https://github.com/llvm/llvm-project/issues/194743
This PR implements Texture3D and RWTexture3D and adds+modifies tests for
the two types.
Assisted by: Claude Opus 5
---------
Co-authored-by: Finn Plummer <mail at inbelic.dev>
Commit: 7c5e5cab746af48a82e46cca9d9abc930a92d68a
https://github.com/llvm/llvm-project/commit/7c5e5cab746af48a82e46cca9d9abc930a92d68a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Removing passing tests from xfail list (#222473)
These tests appear to be passing/deleted as of 9/9/26.
Commit: 70e79a05f791115fd5a9e36447981e7251af2bfd
https://github.com/llvm/llvm-project/commit/70e79a05f791115fd5a9e36447981e7251af2bfd
Author: Zane Hambly <zanehambly at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/test/MC/X86/x86_errors.s
Log Message:
-----------
[X86] Reject a register where a memory operand displacement belongs (#216068)
Fixes #61438
Commit: 265bb9f2a77b30c95bcbe1ad9b0a5ae9fe52e799
https://github.com/llvm/llvm-project/commit/265bb9f2a77b30c95bcbe1ad9b0a5ae9fe52e799
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Migrate R600 onto generated TargetParser bitset (#222461)
Follow the new amdgcn system so we don't have to carry 2 different
forms of this infrastructure.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 2d7043922b150f728de861f23d6b1a61dace37e5
https://github.com/llvm/llvm-project/commit/2d7043922b150f728de861f23d6b1a61dace37e5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] port eb5cd179549d68 (#222476)
Commit: 707c032dae3bee24eae29c6f4c459a6d6dc6556d
https://github.com/llvm/llvm-project/commit/707c032dae3bee24eae29c6f4c459a6d6dc6556d
Author: Yuvaraj Venkatesh <yuvaraj.venkatesh at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP SCATTER (#222288)
Tosa specification changes in
https://github.com/arm/tosa-specification/pull/78
Commit: 18a8d12cb4075251657519a0cdd5e31d5dcc4fb1
https://github.com/llvm/llvm-project/commit/18a8d12cb4075251657519a0cdd5e31d5dcc4fb1
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/cxx20-module-initializer.cppm
M clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CIR/CodeGenCXX/typeid-should-throw.cpp
M clang/test/CIR/Lowering/calling-conv.cir
M clang/test/CIR/Lowering/module-asm.cir
M clang/test/CIR/Lowering/poison.cir
M clang/test/CIR/Lowering/select.cir
M clang/test/CIR/Lowering/strictfp.cir
M clang/test/CIR/Lowering/ternary.cir
M clang/test/CIR/Tools/warn-default-triple.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/test/CIR/Transforms/lib-opt.cpp
Log Message:
-----------
[CIR] Fix CIR tests by adding a triple/Requires. (#222346)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that. Tests that execute 'clang' in some way are given a triple, ones
that are on .cir files we just add a 'requires'. Some day we should be
able to remove those, but it'll require us to add the cxxabi/etc for
windows.
Commit: 2f704c94bf5c396f33da4684540cb22f38a757cc
https://github.com/llvm/llvm-project/commit/2f704c94bf5c396f33da4684540cb22f38a757cc
Author: Tadeusz <tadeuszjt at protonmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
Log Message:
-----------
[Clang][OpenACC] Fixed getExtValue Call on Invalid Gang Dim (#221502)
**Problem**
When an invalid 'gang dim' value is used in `CheckGangDimExpr`, the
function prints the value into the diagnostic message by calling
`getExtValue`. This function asserts on values that can't fit into a
signed integer.
**Solution**
`APSInt` has a `<<` operator anyway so just use that.
The fix causes the message to print with the following formatting:
```
test.cpp:5:40: error: argument to 'gang' clause dimension must be 1, 2, or 3: evaluated to 18'446'744'073'709'551'574
5 | #pragma acc routine(S::foo) gang(dim : S::foo())
| ^
1 warning and 1 error generated.
```
Fixes #221418
Commit: a5ef934a8d295dc03be3960f2b3744ec2e53238e
https://github.com/llvm/llvm-project/commit/a5ef934a8d295dc03be3960f2b3744ec2e53238e
Author: Alex <filaka771 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/constant-conversion.c
Log Message:
-----------
[clang] Warn on signed char array constant conversion (#203792)
This resolves #181730: fixes a missing `-Wconstant-conversion`
diagnostic for `signed char` array initialization.
Before this change, Clang warned for `signed char foo = 255;` but did
not
warn for `signed char bar[] = {255};`.
The warning suppression helper did not distinguish between `char`,
`unsigned char`, and `signed char` in brace-initialized arrays. Now it
does.
Commit: 2c4c9d84bd948a92bb78b46a1c34044e246fd187
https://github.com/llvm/llvm-project/commit/2c4c9d84bd948a92bb78b46a1c34044e246fd187
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
Log Message:
-----------
[SPIRV] Fix inconsistent operand order for counter resource intrinsic (#221646)
The `llvm.spv.resource.handlefrombinding` intrinsic stores its binding
operands in the order (DescriptorSet, BindingNo, ...). The
`llvm.spv.resource.counterhandlefrombinding` intrinsic should use the
same order.
The `llvm.spv.resource.counterhandlefrombinding` intrinsic is currently
emitted only by the `SPIRVLegalizeImplicitBinding` pass. The pass
previously built its operands in the wrong order, and the instruction
selector repeated the same inversion when emitting decorations.
This change makes the operand order consistent with
`llvm.spv.resource.handlefrombinding`.
Test update closes a coverage gap - there were no tests for explicit
`llvm.spv.resource.counterhandlefrombinding` calls.
Assisted by GPT-5.6 Sol.
Commit: 6b0c1836d05ab22f55ec5b8e76bc797415de10f3
https://github.com/llvm/llvm-project/commit/6b0c1836d05ab22f55ec5b8e76bc797415de10f3
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint-f16.ll
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint.ll
Log Message:
-----------
[RISCV][GlobalISel] Support G_INTRINSIC_LRINT/G_INTRINSIC_LLRINT (#221992)
Add legalizer rules so llvm.lrint/llrint lower to fcvt.{w,l}.{h,s,d}
with FRM_DYN, mirroring the existing G_LROUND/G_LLROUND handling.
Commit: 5524a2192f6d6b29f5be1ff72947e99bf7e27ad9
https://github.com/llvm/llvm-project/commit/5524a2192f6d6b29f5be1ff72947e99bf7e27ad9
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
Log Message:
-----------
[CIR] Add cir.coro.intrinsic.resume/destroy/done Ops (#222210)
Adds CoroResumeOp, CoroDestroyOp, and CoroDoneOp, representing
llvm.coro.resume, llvm.coro.destroy, and llvm.coro.done respectively.
Commit: ffde4cee43edacbf0680a08822c4ce7e16d29857
https://github.com/llvm/llvm-project/commit/ffde4cee43edacbf0680a08822c4ce7e16d29857
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
Log Message:
-----------
[RISCV] Add RV64 RUN lines to orc-b-patterns.ll. NFC (#222424)
Add some i16 and i64 tests.
Commit: ed6de5998d473b30f502979b87531f21c4cd27b4
https://github.com/llvm/llvm-project/commit/ed6de5998d473b30f502979b87531f21c4cd27b4
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/ObjectYAML/COFFEmitter.cpp
Log Message:
-----------
[ObjectYAML] Fold layoutCOFF into writeCOFF (#221683)
Fold the COFF layout pass into writeCOFF so the
ContiguousBlobAccumulator tracks section offsets and sizes as data is
written. Reserve and fill in the optional header and section table once
the section layout is final.
This is almost NFC, except when the output size exceeds the limit.
Commit: 1474da952ed7d2b7be855a07d5fcca2dfc46b8fb
https://github.com/llvm/llvm-project/commit/1474da952ed7d2b7be855a07d5fcca2dfc46b8fb
Author: Yuta Saito <kateinoigakukun at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
Log Message:
-----------
[ASan] Recognize WASI as a platform with 64-bit off_t (#144441)
WASI defines `off_t` as 64-bit signed integers to support files larger
than 2 GiB.
https://github.com/WebAssembly/wasi-libc/blob/wasi-sdk-25/libc-bottom-half/headers/public/__typedef_off_t.h
Commit: 7cdf4c8bc306e0f1a0022898e70ab63a7c466ebf
https://github.com/llvm/llvm-project/commit/7cdf4c8bc306e0f1a0022898e70ab63a7c466ebf
Author: Mike Aizatsky <maizatskyi at cloudflare.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
A compiler-rt/test/tsan/Linux/epoll_oneshot_norace.cpp
Log Message:
-----------
[tsan] recognize EPOLL_CTL_MOD with EPOLLONESHOT (#220304)
Handles it the same way as EPOLL_CTL_ADD
Commit: 2e2c316fd5d7e8cff94703992928d5882d00478e
https://github.com/llvm/llvm-project/commit/2e2c316fd5d7e8cff94703992928d5882d00478e
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
M compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
Log Message:
-----------
[libFuzzer] Clamp `ConsumeFloatingPointInRange` result to `max` (#221552)
Fixes #65312. Floating point rounding could push the result above `max`,
or even overflow to infinity, so we clamp it instead.
---------
Co-authored-by: Dan Blackwell <danblackwell95 at gmail.com>
Commit: 91d7ee658c9cd67a7b95df4be51be553bfd9c549
https://github.com/llvm/llvm-project/commit/91d7ee658c9cd67a7b95df4be51be553bfd9c549
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/wcslen-1.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation for wcslen folding (#222475)
Commit: 92c1693b574850644535dcb8e18a70fdd115dc94
https://github.com/llvm/llvm-project/commit/92c1693b574850644535dcb8e18a70fdd115dc94
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Remove unused MC insts in isPackedSingleSGPR64BitInst (#222463)
There is no opsel support for these instructions, and thus we do not have
to manipulate opsel at MC layer. As a result, isPackedSingleSGPR64BitIns
is currently only used before pseudo-expansion. So we remove MC instruction
check inside.
Commit: 18a61f5a44dda16720754584aee95cac652e3646
https://github.com/llvm/llvm-project/commit/18a61f5a44dda16720754584aee95cac652e3646
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Move feature LDSBankCount64 to specific subtargets. NFC (#222469)
Commit: 7c9031580a129b0488a81cb8c2e668920bebb5a2
https://github.com/llvm/llvm-project/commit/7c9031580a129b0488a81cb8c2e668920bebb5a2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[GitHub] Bump CI Container Runner Version to 2.337.0 (#222480)
This is the latest version and keeps us ahead of the relatively short
runner support horizon.
Commit: a2e2038fc932039ee5e101432b4a549c92fdf9c8
https://github.com/llvm/llvm-project/commit/a2e2038fc932039ee5e101432b4a549c92fdf9c8
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
[AMDGPU] Add missing attributes to llvm.amdgcn.init.whole.wave (#222493)
`llvm.amdgcn.init.whole.wave` only sets the EXEC mask and reports
whether the lane was active on entry. It never calls into the module,
never frees memory, and always returns, so it can carry `nocallback`,
`nofree`, and `willreturn`.
The neighboring `llvm.amdgcn.init.exec` and
`llvm.amdgcn.init.exec.from.input` already have all three; this brings
`init.whole.wave` in line and lets the attributor propagate them to
callers.
Commit: e32ffd8b546f4a743812756efe11a7424cf9de5f
https://github.com/llvm/llvm-project/commit/e32ffd8b546f4a743812756efe11a7424cf9de5f
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/IR/invalid-offload-container.cir
A clang/test/CIR/IR/offload-container.cir
Log Message:
-----------
[CIR] Add offload container attribute (#206576)
Introduce `cir.offload.container`, a CIR dialect unit attribute that marks an
MLIR module as holding a host CIR module and its associated device CIR
modules in one IR unit while later offload merge/split pipeline passes need
visibility into both sides.
The marked module's body holds nested `builtin.module` operations. Each
nested module is tagged with `cir.offload.kind`, represented by the new
`#cir.offload_kind<host>` / `#cir.offload_kind<device>` enum attribute.
The structural contract expected by the follow-up pipeline work is
enforced in `CIRDialect::verifyOperationAttribute`, following the
`gpu.container_module` precedent:
* `cir.offload.container` is a unit attribute attached to a
`builtin.module`
* the first nested module is the host module
* all following nested modules are device modules
* the body contains only nested `builtin.module` operations
* at least one device module is present
* `cir.offload.kind` is only ever attached to a `builtin.module`
This patch only introduces the IR representation and verifier tests. The
passes that create, consume, or split this container are left to follow-up
patches.
This is part of the Host-Device CIR Combine Pipeline work discussed on
Discourse:
[discourse.llvm.org/t/gsoc-2026-host-device-cir-combine-pipeline-project-idea-discussion/89623](https://discourse.llvm.org/t/gsoc-2026-host-device-cir-combine-pipeline-project-idea-discussion/89623)
Commit: e01829dfee891cfaf61752c926b0532aaa261ad2
https://github.com/llvm/llvm-project/commit/e01829dfee891cfaf61752c926b0532aaa261ad2
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[Clang] Avoid unnecessary overload resolution when building RecoveryExpr (#222296)
When overload resolution fails, we tried RecoveryCallExpr which
ended up performing duplicate overload resolutions, where the template
argument deduction can be expensive.
This patch removes those 'known' invalid overload candidates before
RecoveryCallExpr.
Commit: f1245b6a7b2fb2e5c96434b9fb3107b4cf873d10
https://github.com/llvm/llvm-project/commit/f1245b6a7b2fb2e5c96434b9fb3107b4cf873d10
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/test/CodeGen/Hexagon/anti-dep-partial.mir
Log Message:
-----------
[CodeGen] Skip pseudo instructions in AggressiveAntiDepBreaker (#222271)
`ScheduleDAGInstrs` does not create SUnits for debug or pseudo
instructions. The aggressive anti-dependency breaker only skipped debug
instructions, so encountering a pseudo such as `PSEUDO_PROBE`
dereferenced a null SUnit.
Skip both debug and pseudo instructions and add a Hexagon regression
covering the existing aggressive anti-dependency path with legacy and
new machine pass managers.
Split from #221984 in response to review.
Commit: cdf59b384a48610a6450011279005b1e34f8572d
https://github.com/llvm/llvm-project/commit/cdf59b384a48610a6450011279005b1e34f8572d
Author: Ritanya-B-Bharadwaj <ritanya.b.bharadwaj at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/threadset.f90
A flang/test/Lower/OpenMP/threadset.f90
A flang/test/Semantics/OpenMP/threadset-clause-v60.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-task-threadset.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-threadset.mlir
Log Message:
-----------
[Flang][OpenMP] Add lowering and translation for the threadset clause (#215513)
Adds Flang lowering, and LLVM IR translation for the OpenMP 6.0 `threadset` clause (spec 14.8) on `task` and `taskloop`.
- Add a `ThreadsetPolicy` enum (`omp_pool`/`omp_team`) and clause on `omp.task` and `omp.taskloop.context`, lowered from Flang.
- Translate `threadset(omp_pool)` to the free-agent task flag (`0x80`); `omp_team` leaves it unset, matching clang.
- Add semantics, lowering, and translation tests.
Related: https://github.com/llvm/llvm-project/pull/135807,
https://github.com/llvm/llvm-project/pull/144409,
https://github.com/llvm/llvm-project/pull/169856
Commit: feabb30f0feef2361ac301618ff56566289919e7
https://github.com/llvm/llvm-project/commit/feabb30f0feef2361ac301618ff56566289919e7
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
A llvm/test/CodeGen/SystemZ/postra-sched-filter.mir
Log Message:
-----------
[MISched] Apply debug filters before starting a block (#222270)
Apply the `misched-only-func` and `misched-only-block` filters before
calling `startBlock`. This avoids entering a target scheduling strategy
for a filtered block without a matching `finishBlock`/`leaveMBB` call.
Add a SystemZ post-RA scheduler regression that checks a filtered block
does not contribute hazard-recognizer state.
Split from #221984 in response to review.
Commit: 6594e8248e7d9dae26b7909d8c5eec4784d55000
https://github.com/llvm/llvm-project/commit/6594e8248e7d9dae26b7909d8c5eec4784d55000
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
Log Message:
-----------
[AMDGPU] Reject DPP combine when old is narrower than dst (#217894)
Old is copied from the mov dst class, but the combined dst can be wider
(e.g. V_CVT_F64_I32), making old illegal for it
Commit: 4acc5f1ff8d181bb948a60b7eb2a6371e241051e
https://github.com/llvm/llvm-project/commit/4acc5f1ff8d181bb948a60b7eb2a6371e241051e
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move clusterSortPtrAccesses to SLPMemoryUtils (#222235)
Move the BoUpSLP-independent pointer-clustering sort out of
SLPVectorizer.cpp into SLPVectorizer/SLPMemoryUtils.{h,cpp}.
clusterSortPtrAccesses reads the file-local RecursionMaxDepth cl::opt
via getUnderlyingObject; the option stays static in SLPVectorizer.cpp
and the moved helper takes its value as an explicit unsigned parameter
(also captured by the local comparison lambda). Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI
Commit: 34a9870a9851ce16686282fa4d4a19bf477d5934
https://github.com/llvm/llvm-project/commit/34a9870a9851ce16686282fa4d4a19bf477d5934
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/bindings/interface/SBCompileUnitDocstrings.i
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/source/API/SBCompileUnit.cpp
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
Log Message:
-----------
[lldb] Add SBCompileUnit::GetIsOptimized (#222403)
Expose Module::GetIsOptimized through the SB API so clients can tell
whether a compile unit was built with optimization. This change is
motivated by lldb-dap, where I want to extend the protocol::CompileUnit
with this information.
The new tests build the same source with and without -O1, so the test
case can no longer share a build with the others.
Commit: 4d5358b1d224b7eba12b6868e2e112487b876353
https://github.com/llvm/llvm-project/commit/4d5358b1d224b7eba12b6868e2e112487b876353
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
Log Message:
-----------
[SLP][modularisation][NFC] Move BaseShuffleAnalysis to SLPShuffleAnalysis.h (#222236)
Move the BoUpSLP-independent shuffle-analysis base class out of
SLPVectorizer.cpp into a new header-only
SLPVectorizer/SLPShuffleAnalysis.h. BoUpSLP::ShuffleCostEstimator and
BoUpSLP::ShuffleInstructionBuilder keep deriving from it.
createShuffle read the file-local SLPReVec cl::opt in an assert; the
option stays static in SLPVectorizer.cpp and the moved template takes
its value as an explicit bool parameter. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI.
Commit: 90cebef1411617fc3eedd359bdf00cb44b1c2439
https://github.com/llvm/llvm-project/commit/90cebef1411617fc3eedd359bdf00cb44b1c2439
Author: Addmisol <addmisol9 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
Log Message:
-----------
[MemCpyOpt] Remove libcall availability checks for memory intrinsics (#198558)
Fixes #197683
- Delete the enable-memcpyopt-without-libcalls flag from MemCpyOptimizer
- Remove libcall availability checks in processStoreOfLoad() and
processStore()
- Remove the flag from CUDA/OpenMP toolchain in Clang
- Update no-libcalls.ll test to expect optimizations on all targets
cc @arsenm
Signed-off-by: addmisol <addmisol9 at gmail.com>
Commit: 4cbc99688044679498075d5b2da5e9444832e82a
https://github.com/llvm/llvm-project/commit/4cbc99688044679498075d5b2da5e9444832e82a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
M lldb/tools/lldb-dap/EventHelper.cpp
Log Message:
-----------
[lldb-dap] Set stopped event text for signals and instrumentation (#222394)
DAP maps signals and instrumentation to reason 'exception'. Populate
'text' with the signal or runtime name to distinguish stop types. For
example, text contains the specific signal name (e.g., "SIGABRT") or
instrumentation runtime name (e.g., "AddressSanitizer").
Commit: d54f5e540685516fef383f8fe7cd0ef45382770b
https://github.com/llvm/llvm-project/commit/d54f5e540685516fef383f8fe7cd0ef45382770b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/source/API/SBCompileUnit.cpp
M lldb/source/Symbol/SymbolFile.cpp
M lldb/test/API/python_api/compile_unit/Makefile
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
A lldb/test/API/python_api/compile_unit/other.c
Log Message:
-----------
[lldb] Add SBCompileUnit::GetIDInModule (#222470)
Expose an ID that identifies a compile unit within its module so clients
can name a CU across API calls and look it up again with
SBModule::GetCompileUnitAtIndex. The user ID is not usable for this:
with a Darwin debug map every compile unit reports uid 0.
CompileUnit stores the index, set by SymbolFileCommon when a CU is
parsed or installed at a given slot.
Commit: f590dfa8e989652cdd906d6ec74ebfe7f8d8d869
https://github.com/llvm/llvm-project/commit/f590dfa8e989652cdd906d6ec74ebfe7f8d8d869
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
A llvm/test/CodeGen/X86/regallocfast-undef-tied-use.mir
Log Message:
-----------
[RegAllocFast] Give an undef tied use the register of its tied def (#222249)
X86TargetLowering::emitSetJmpShadowStackFix zeroes a register by
building an XOR whose two uses are undef reads of its own def (per
MachineOperand.h "... reading the same dont-care value"). Def processing
frees a def whose tied use is undef before the uses are allocated, so
allocVirtRegUndef() no longer finds the virtual register and takes the
head of the allocation order instead. -verify-machineinstrs would fail:
```
renamable $rcx = XOR64rr undef renamable $rax(tied-def 0), undef renamable $rax, implicit-def dead $eflags
*** Bad machine code: Tied physical registers must match. ***
```
Take the register from the tie, and rewrite the instruction's other
reads of the value with it so that they keep agreeing on one register.
Aided by Opus 5
Commit: 6f54fe6b6fb22f8a335fd19b94049fc769dfea25
https://github.com/llvm/llvm-project/commit/6f54fe6b6fb22f8a335fd19b94049fc769dfea25
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
Log Message:
-----------
[BOLT][AArch64][Android] Recover from dump failure instead of exit (#221292)
Embedded in Android app, failed assert() or reportError() during a BOLT
profile dump should not exit the host process. Install a recovery point
in __bolt_instr_data_dump(), so any failure can longjmp back, return a
non-zero value to caller, and set a flag so later dumps can be skipped.
Clang does not support __builtin_setjmp/longjmp for the AArch64 Android
target, so add a minimal hand-written setjmp/longjmp in sys_aarch64.h.
Since the majority Android apps run on AArch64 CPUs, while at this I
defined `ANDROID_AARCH64` and replaced `__ANDROID__` with it in the
instrumentation runtime code.
Assisted-by: opus
Commit: ab618ec375ffe8f2474bac9e4ac82d1f5330fd46
https://github.com/llvm/llvm-project/commit/ab618ec375ffe8f2474bac9e4ac82d1f5330fd46
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Gate 64-bit VGPR copy lowering on operand register class in copyPhysReg (#219562)
copyPhysReg lowers a 64-bit VGPR copy to V_MOV_B64_e32 / V_PK_MOV_B32
when available. Emit the wide move only when the destination and source
are members of the move's HwMode-resolved operand classes; otherwise
fall through to the element-wise V_MOV_B32 expansion, to respect
alignment requirements.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 93ad0d2dbd1d9a27797aefb028ee210b91c2f29d
https://github.com/llvm/llvm-project/commit/93ad0d2dbd1d9a27797aefb028ee210b91c2f29d
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
Log Message:
-----------
[AMDGPU] Restructure VGPR-alignment verifier tests, NFC (#219229)
Rewrite verify-gfx90a-aligned-vgprs.mir and verify-ds-gws-align.mir so each case
documents inline what makes it invalid, and match the verifier's fuller output -
the "*** Bad machine code ***" kind and the "- instruction:" line - instead of a
single message fragment. Pure test restructure with no functional change, so the
follow-up commit that derives alignment from the operand register class shows
only the change in diagnostic wording.
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 1646fcc603b9eea03c6f09a3ed6be25260d3e875
https://github.com/llvm/llvm-project/commit/1646fcc603b9eea03c6f09a3ed6be25260d3e875
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Add myself as NVPTX backend co-maintainer (#215627)
I've been contributing to the NVPTX backend (TableGen, ISel lowering)
and would also like to help maintain it going forward.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: a700f8e71cf4cdf37330aecc41445af2ff4dd105
https://github.com/llvm/llvm-project/commit/a700f8e71cf4cdf37330aecc41445af2ff4dd105
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Semantics/OpenMP/do-concurrent-pure-version.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure.f90
M flang/test/Semantics/OpenMP/pure-procedure.f90
Log Message:
-----------
[FLANG][OpenMP] Handling pure directives in DO CONCURRENT (#216642)
A directive with the PURE property is allowed inside a DO CONCURRENT
construct starting with OpenMP 6.0.
Commit: 17caaa3bdbb229aa63c56864c1452100cfe36f39
https://github.com/llvm/llvm-project/commit/17caaa3bdbb229aa63c56864c1452100cfe36f39
Author: SharonXSharon <xiaoranxu.nju at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/unique-internal-linkage-names.cpp
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.c
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.cpp
Log Message:
-----------
Revert "[clang] Revert "Disable Unique Internal Linkage Names for internal global vars." (#219261)" (#222486)
This reverts commit 9abbc9183d2231c2e44198100a6cd22ef66e2eb8.
Will reland with a proper fix of the GNU AsmLabelAttr
Co-authored-by: Sharon Xu <sharonxu at fb.com>
Commit: 3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8
https://github.com/llvm/llvm-project/commit/3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/X86/icp-pic.s
Log Message:
-----------
[BOLT][ICP] Use PC-relative instructions for x86 PIC binaries in ICP (#216587)
Currently, BOLT x86 ICP optimization inserts an immediate-to-register
comparison instruction, which forces the use of 32-bit signed (32S)
relocations due to ABI limitations. This behavior does not align well
with the conventions of PIC/PIE binaries and **makes it highly prone to
JITLink relocation overflow errors when dealing with large binaries.**
Therefore, this patch introduces an additional lea instruction for the
x86 architecture to leverage PC-relative (32PC) addressing. This change
is intended to apply by default to PIC binaries, or when specific
options are provided.
Commit: 6fbfc9261c8f453e346773200a13458a170a9a8c
https://github.com/llvm/llvm-project/commit/6fbfc9261c8f453e346773200a13458a170a9a8c
Author: Peiqi Li <voyager.lpq at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
M clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
Log Message:
-----------
[clangd] Enable query-based custom checks (#216336)
Enable query-based custom checks in clangd behind a new `Diagnostics.ClangTidy.ExperimentalCustomChecks` configuration option.
Custom checks are registered from the per-file clang-tidy options and remain subject to clangd's `FastCheckFilter` policy.
Fixes #206696
Assisted by GPT-5.6
Commit: 9e68cbda7816edded93e2c3a4dd03af5d4700026
https://github.com/llvm/llvm-project/commit/9e68cbda7816edded93e2c3a4dd03af5d4700026
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx.c
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
A llvm/test/CodeGen/NVPTX/mbarrier_layout_sm90_ptx93.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm_trait.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_check_layout.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_init.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
Log Message:
-----------
[LLVM][NVPTX][MLIR] Support layouts in mbarrier.init and add mbarrier.check_layout (#217252)
This commit adds LLVM NVPTX and MLIR NVVM support for the mbarrier layout extensions:
- llvm.nvvm.mbarrier.init with trailing immarg `layout` operand, and nvvm.mbarrier.init a matching `layout` attribute (default to 0) Layout 0 is the default in-memory layout and is emitted as a plain mbarrier.init; layout 1 is emitted as mbarrier.init.layout::v1.
- llvm.nvvm.mbarrier.check_layout / nvvm.mbarrier.check_layout, lowering to mbarrier.check_layout.layout::v{0,1}.
Only the layout::v1 form of mbarrier.init and mbarrier.check_layout require PTX ISA 9.3 and sm_90
llvm.nvvm.mbarrier.init{.shared } are also merged into a pointer-overloaded llvm.nvvm.mbarrier.init with calls to either older forms auto-upgraded
Please refer [PTX ISA](https://docs.nvidia.com/cuda/developer-preview/13.4/parallel-thread-execution/index.html)
for more details
Assisted by: Claude Code (Opus 5)
Commit: b89710b49c4a2da1f98ba4b407dcfecaaa90246a
https://github.com/llvm/llvm-project/commit/b89710b49c4a2da1f98ba4b407dcfecaaa90246a
Author: David Green <david.green at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/overflow-vec.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
Log Message:
-----------
[AArch64][GlobalISel] Lower vector overflow intrinsics (#222091)
As we have no native support for vector version of these intrinsics they
should be lowered.
Commit: a91c7395c3fb1a37f69f7d8fb0e78c048faf6cb7
https://github.com/llvm/llvm-project/commit/a91c7395c3fb1a37f69f7d8fb0e78c048faf6cb7
Author: PushkarSingh <149073046+iitianpushkar at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[Lifetime Safety] Name operator calls in alias-chain diagnostics (#221803)
This updates Lifetime Safety alias-chain diagnostics to identify
overloaded operator and conversion calls instead of describing them
generically as an `expression`.
Previously, these calls were reported as `expression aliases the storage
of ...`, which could make it unclear which operation introduced the
alias. The diagnostic now reports the callee using the existing
diagnostic name printer, producing descriptions such as:
- `result of call to 'operator->'`
- `result of call to 'operator()'`
- `result of call to 'operator basic_string_view'`
Template arguments are preserved for operator function-template
specializations. For example:
- `result of call to 'operator+<const int>'`
- `result of call to 'operator-<__gnu_cxx::basic_iterator<const int>>'`
This makes each aliasing step explicit and identifies the particular
call responsible for propagating the alias.
References to
[#220248#discussion_r3905817437](https://github.com/llvm/llvm-project/pull/220248#discussion_r3905817437)
Commit: be215a25f00139d68517589d78a79c3aa7a7eb26
https://github.com/llvm/llvm-project/commit/be215a25f00139d68517589d78a79c3aa7a7eb26
Author: Ryan VanderMeulen <ryanvm at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/extract_symbols.py
Log Message:
-----------
[Windows] Don't export clang::interp symbols for plugins (#221295)
With `LLVM_EXPORT_SYMBOLS_FOR_PLUGINS=ON`, `clang.exe` built from the
23.x release branch exports 66679 symbols on x86_64 Windows, over the
65535 limit of the PE export table, so it no longer links:
```
lld-link: error: too many exported symbols (got 66679, max 65535)
```
For comparison, the same configuration on 22.1.8 exports 65465 symbols,
so the headroom was already almost gone.
`clang::interp`, the constant expression bytecode interpreter, accounts
for roughly 4500 of the exported symbols (counted with `llvm-readobj
--coff-exports` on a linked aarch64 23.1.0 `clang.exe`). Its headers
live in `clang/lib/AST/ByteCode` and are not installed; the only mention
in a public header is the forward declaration of `interp::Context` in
`ASTContext.h`. A plugin cannot call into it, so there is no reason to
keep exporting it. Filtering it out follows the existing
`dump`/`dumpColor`/`printPretty` exclusions in
`should_keep_microsoft_symbol`.
Related: #87865 (open; earlier rounds #60109, #56109). This does not get
the MSVC-with-examples configuration from that issue under the limit by
itself, but it removes the largest block of symbols that can never be
used by a plugin, and is what gets the Firefox clang 23 toolchain
(x86_64-pc-windows-msvc, X86;ARM;AArch64;WebAssembly,
clang+lld+clang-tools-extra) from 66679 to roughly 62100 exports.
---
**AI tool use disclosure** (per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html)): this change was
developed with Claude Code assisting in the analysis and drafting. The
root cause was established against real 23.1.0 binaries and libraries,
the patch was reviewed and tested by the author in Firefox's CI, and the
author is accountable for and able to answer questions about it. Commits
carry an `Assisted-by:` trailer.
Commit: a9e26aca790bb0a45f90598223597a9ce2b2b763
https://github.com/llvm/llvm-project/commit/a9e26aca790bb0a45f90598223597a9ce2b2b763
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Avoid `std::optional<VPValue *>` (NFC) (#222352)
`VPValue *` is already nullable, the `std::optional` is not needed.
Commit: bc6c76a4d4f8b4f6d5e9b663736703f91fcbb6ed
https://github.com/llvm/llvm-project/commit/bc6c76a4d4f8b4f6d5e9b663736703f91fcbb6ed
Author: Ryan VanderMeulen <ryanvm at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A llvm/test/tools/extract_symbols/Inputs/lib-itanium.s
A llvm/test/tools/extract_symbols/Inputs/lib-msvc.s
A llvm/test/tools/extract_symbols/Inputs/user-itanium.s
A llvm/test/tools/extract_symbols/Inputs/user-msvc.s
A llvm/test/tools/extract_symbols/lit.local.cfg
A llvm/test/tools/extract_symbols/registry-itanium.test
A llvm/test/tools/extract_symbols/registry-microsoft.test
M llvm/utils/extract_symbols.py
Log Message:
-----------
[Windows] Export Registry<T> members and accessors for plugins again (#221296)
Since #185141 reworked `llvm::Registry`, the registered-node list lives
behind the explicitly specialized
`llvm::detail::getRegistryLinkListInstance<R>()` accessor defined by
`LLVM_DEFINE_REGISTRY`, and the `Head`/`Tail` static data members that
used to be referenced across objects are gone (#163391 had special-cased
those).
`extract_symbols.py` handles neither. The accessor is a `??$` function
template specialization, which the script drops on the assumption that
it can be instantiated in the importing translation unit; here it
cannot, it is defined once by `LLVM_DEFINE_REGISTRY`. And `Registry<T>`
members are only exported when some object references the `Registry`
template, which nothing does anymore because every use goes through the
accessor. On a static clang.exe built with
`LLVM_EXPORT_SYMBOLS_FOR_PLUGINS`, the export table went from 11
`Registry<clang::PluginASTAction>` symbols on 22.1.8 to zero on 23.1.0,
and linking a plugin fails:
```
lld-link: error: undefined symbol: __declspec(dllimport) public: static void __cdecl llvm::Registry<class clang::PluginASTAction>::add_node(class llvm::Registry<class clang::PluginASTAction>::node *)
>>> referenced by host_Registration.obj:(_GLOBAL__sub_I_Registration.cpp)
```
Keep the accessor specializations, and treat a reference to an accessor
as a reference to the `Registry` template so its explicitly instantiated
members are exported as they were before. Verified on the 23.1.0 static
libraries: `Registry<PluginASTAction>::add_node`, the node/iterator
members and the accessor come back for every registry (PluginASTAction,
PragmaHandler, GCStrategy, GCMetadataPrinter, ...), 141 symbols in total
in the Itanium run over the clang libraries. The `Head`/`Tail` rule from
#163391 no longer matches anything and is dropped.
Related: #163367 / #163391 (the previous Registry export fix), #87865.
---
**AI tool use disclosure** (per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html)): this change was
developed with Claude Code assisting in the analysis and drafting. The
root cause was established against real 23.1.0 binaries and libraries,
and the fix was verified by running extract_symbols.py over the 23.1.0
clang static libraries (the Registry members and accessors come back)
and against MSVC-mangled test objects; Firefox's Windows clang-plugin
and mozsearch builds link and run against a clang.exe built with it.
`llvm/test/tools/extract_symbols/` adds lit coverage for both manglings.
The author reviewed the change and is accountable for and able to answer
questions about it. Commits carry an `Assisted-by:` trailer.
Commit: 4d689e68a8e3849cdeb3dae026c07c5f85bdb1b3
https://github.com/llvm/llvm-project/commit/4d689e68a8e3849cdeb3dae026c07c5f85bdb1b3
Author: David Green <david.green at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
Log Message:
-----------
[AArch64][GlobalISel] Use integer types for widening shift icmp (#222257)
Commit: 4e22a6ef80ac0ac234acca473706cc5cce17d6c4
https://github.com/llvm/llvm-project/commit/4e22a6ef80ac0ac234acca473706cc5cce17d6c4
Author: Oren Azad <orenazad at berkeley.edu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/test/tools/llvm-rc/helpmsg.test
A llvm/test/tools/llvm-rc/show-includes.test
M llvm/tools/llvm-rc/Opts.td
M llvm/tools/llvm-rc/ResourceFileWriter.cpp
M llvm/tools/llvm-rc/ResourceFileWriter.h
M llvm/tools/llvm-rc/llvm-rc.cpp
Log Message:
-----------
[llvm-rc] Add /showIncludes dependency reporting (#217102)
Add `/showIncludes` support to `llvm-rc` so build systems can discover
the files a resource compile depends on. This enables Ninja and other
build systems to track and correctly recompile the `.rc` file when
inputs change.
Two kinds of dependencies are reported:
- Preprocessor header dependencies, by forwarding `--show-includes` to
the clang preprocessor.
- Resource files, (bitmaps, icons, manifests, etc) that are used in the
resource file.
The output format matches the `/showIncludes` format that cl.exe and
clang-cl.exe use, and that Ninja can consume natively via `deps=msvc`.
Assisted-by: Anthropic Claude Code (Opus 4.8)
Assisted-by: OpenAI Codex (GPT 5.6 Sol)
Commit: a9f7095c26175f363282ed2cdfb52acada3c2d93
https://github.com/llvm/llvm-project/commit/a9f7095c26175f363282ed2cdfb52acada3c2d93
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/records.cpp
M clang/test/CodeGen/pr4349.c
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
[clang][bytecode] Use opaque pointers for decl-based dummy pointers (#220917)
This uses the recently introduced opaque pointers for what we used to
use dummy pointers for, if the base of the pointer is a declaration.
This of course means we see opaque pointers in a lot more places.
However, we don't need to actually allocate anything for their data
anymore, resulting in a lot fewer allocations for such pointers.
Commit: 96295a1412f9afbee9d4a3c2701e83f5a529a9cc
https://github.com/llvm/llvm-project/commit/96295a1412f9afbee9d4a3c2701e83f5a529a9cc
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Parse/ParseExpr.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
Log Message:
-----------
[Clang] Fix a crash when forming a type from an indexed TTP. (#222326)
Unreported 24 issue so no release note.
Commit: ab7245d75cc97db490d73037b5f021a561381d0d
https://github.com/llvm/llvm-project/commit/ab7245d75cc97db490d73037b5f021a561381d0d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_fmod.cl
Log Message:
-----------
libclc: Update fmod implementations (#222369)
This was originally ported from rocm device libs in
93af966747b59d37c57312a0c0242151076c072b. Merge in more
recent changes. This should also approximately match the default
expansion in ExpandIRInsts
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 672843a3f2ee2aaaed0463ec9064b6ccea2a5d4d
https://github.com/llvm/llvm-project/commit/672843a3f2ee2aaaed0463ec9064b6ccea2a5d4d
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/minmax_element.h
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element_comp.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of parallel std::minmax_element() based on parallel reduce (#221572)
This PR adds an implementation of parallel `std::minmax_element()` based
on parallel reduce.
The implementation formulates `minmax_element` as a reduction of
iterators over the input range.
The iterators are first transformed into a min-max iterator pair.
The reduction is provided in two forms: 2-element reduction that makes
an iterator pair pointing to a smaller and a greater value, and a
range-based reduction with init value.
The latter delegates the heavy-lifting to the serial implementation of
`std::minmax_element()`.
Part of #99938.
Commit: bab513bedcf5c7582a24c97976042af4dba19c01
https://github.com/llvm/llvm-project/commit/bab513bedcf5c7582a24c97976042af4dba19c01
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
Log Message:
-----------
[AMDGPU] Use new CSR cost calculation (#219220)
So far, AMDGPU backend relied on the legacy calculation for the cost of
the first use of a callee-save register. This legacy path scales the
entry block frequency by a fixed value, making a comparison with
alternatives, e.g., rematerialization, difficult due to different
scales. One example for that is the work in
https://github.com/llvm/llvm-project/pull/206756, where comparison of
rematerialization cost and first use of a CSR is hard to compare due to
the different scales.
Change to instead use the new calculation path with different target
hooks for better comparability.
As the new scale is different, the cost was changed. The new cost value
accounts for various factors impacting CSR cost.
This change (with different cost value) was originally part of
https://github.com/llvm/llvm-project/pull/202007. Another part of that
PR was already extracted into
https://github.com/llvm/llvm-project/pull/214857.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 0573ec95004aad9970129dce97d3d3ef34aba978
https://github.com/llvm/llvm-project/commit/0573ec95004aad9970129dce97d3d3ef34aba978
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
M mlir/test/mlir-lsp-server/definition.test
M mlir/test/mlir-lsp-server/diagnostics.test
Log Message:
-----------
[mlir][lsp] Handle unrepresentable file locations (#220913)
Commit: 51daef2bd9d2aadffa2fb0b9abd981b84e616e31
https://github.com/llvm/llvm-project/commit/51daef2bd9d2aadffa2fb0b9abd981b84e616e31
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
Log Message:
-----------
X86: Mark EFLAGS dead on MOV32r0 emitted outside SelectionDAG (#222464)
Currently these get set by LiveVariables after the fact, but
ideally we would not rely on that since it's long overdue for
deletion.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 3b99e79991bede38fb18e0169df3009ce30e0c1d
https://github.com/llvm/llvm-project/commit/3b99e79991bede38fb18e0169df3009ce30e0c1d
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/Transforms/CategoryToNamedOp.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Bufferization/canonicalize.mlir
M mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
R mlir/test/Dialect/Linalg/linalg-morph-category-ops.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
M mlir/test/Dialect/Linalg/linalg-morph-multi-step.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/named-ops-fail.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
M mlir/test/Dialect/Linalg/scalable-unpack-producer-fusion.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-generalize.mlir
R mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-unary.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/python/dialects/linalg/opdsl/test_core_named_ops.py
Log Message:
-----------
[MLIR][Linalg] Remove unary named ops (#220905)
Remove ops, change tests to elementwise to continue working as is.
Ref:
https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531
Assisted by: Claude Opus
Commit: 70f5696eaf0280812fb4e3888875538634d806f1
https://github.com/llvm/llvm-project/commit/70f5696eaf0280812fb4e3888875538634d806f1
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/lib/Dialect/Linalg/Transforms/CategoryToNamedOp.cpp
M mlir/lib/Dialect/Linalg/Transforms/FoldAddIntoDest.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Arith/sharding-propagation.mlir
M mlir/test/Dialect/Linalg/block-pack-matmul.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
M mlir/test/Dialect/Linalg/fold-add-into-dest.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
R mlir/test/Dialect/Linalg/linalg-morph-multi-step.mlir
M mlir/test/Dialect/Linalg/named-ops-fail.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-binary.mlir
M mlir/test/Dialect/SparseTensor/encoding_with_symbols.mlir
M mlir/test/Dialect/SparseTensor/external_after_codegen.mlir
M mlir/test/Dialect/Transform/test-promote-tensors.mlir
M mlir/test/Interfaces/TilingInterface/query-fusability.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Interfaces/TilingInterface/tile-fuse-and-yield-using-interface.mlir
Log Message:
-----------
[MLIR][Linalg] Remove binary named ops (#220912)
Remove ops, change tests to elementwise to continue working as is.
Depends on the unary removal branch. #220905
Ref:
https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531
Assisted by: Claude Opus
Commit: 80164074c01fead28cbf013861eeab23d277bbaf
https://github.com/llvm/llvm-project/commit/80164074c01fead28cbf013861eeab23d277bbaf
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Linalg/Transforms/CategoryToNamedOp.cpp
M mlir/lib/Dialect/Linalg/Transforms/MorphOps.cpp
R mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
R mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
R mlir/test/Dialect/Linalg/named-ops-fail.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-binary.mlir
Log Message:
-----------
[MLIR][Linalg] Remove Linalg named ops (#220916)
Removes the named ops from the Linalg dialect.
I have also updated the ElementwiseOp builder to simplify the default
case: kind + no affine map.
Depends on both unary and binary removal branches. #220905 #220912
This PR also has the final cleanup, which turned out to be simple
enough.
Ref:
https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531
Assisted by: Claude Opus
Commit: 404ceba2628b7f925ce650b63e1ea90440927481
https://github.com/llvm/llvm-project/commit/404ceba2628b7f925ce650b63e1ea90440927481
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/neon-implicit-zero-filling.ll
Log Message:
-----------
[AArch64][NEON] Fold insert(zero, extract(X, 0), 0) -> X when X is known to zero lanes 1-N (#213940)
Add patterns for NEON across-lane reductions whose scalar result
is inserted into lane zero of a zero vector.
This is valid because these instructions place their result in lane zero
and
clear the remaining lanes.
Limit this change to matching input and result vector types. Mixed
vector
sizes and scalar conversions are not part of this PR.
Handle llvm.vector.reduce.add.v2i64 separately because it lowers to
ADDP.
NEON has no equivalent instruction for v2i64 signed or unsigned min/max
reductions, so they cannot use this fold. Double-precision
floating-point
reductions are already handled by pairwise instruction patterns.
Commit: 182f0ea1f8228c893093dabe824f9ad3eea81a60
https://github.com/llvm/llvm-project/commit/182f0ea1f8228c893093dabe824f9ad3eea81a60
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/test/fuzzer/stop-file.test
Log Message:
-----------
[libFuzzer] Modify stop-file.test to support remote devices (#222012)
Currently this test fails when running on remote devices because the
'rm' command only removes the file from the host, and the second part of
the test expects the file to have been removed. This patch changes the later
run command to point to a non-existent file in order to work around this.
rdar://186683123
Commit: 35a6d33ca2f330c6a45588e5bd907f3729bc6011
https://github.com/llvm/llvm-project/commit/35a6d33ca2f330c6a45588e5bd907f3729bc6011
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
M llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Remove deprecated getArchAttr and ArchFeatures TableGen (#222462)
Everything should now use getFeatureBitset*
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 246beeb1eef7344750419fd1f584019f7c62b750
https://github.com/llvm/llvm-project/commit/246beeb1eef7344750419fd1f584019f7c62b750
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
Log Message:
-----------
[BuildLibCalls] Use emitLibCall() in more places (NFCI) (#222557)
Commit: 6b2ef39be51f46e2f359f6965588577913765af4
https://github.com/llvm/llvm-project/commit/6b2ef39be51f46e2f359f6965588577913765af4
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Reserve IRTranslator value map and virtual register storage (NFC) (#222311)
Reserve storage based on the number of IR arguments and instructions to
avoid unnecessary container growth.
Improves CTMark geomean -0.08% on aarch64-O0-g, including 0.18% on
sqlite.
https://llvm-compile-time-tracker.com/compare.php?from=cec101b15dd27fb1c51b6c87cb6e9d78517d2b09&to=996caa798ca6e27dfc657296db4b8ae6519701b0&stat=instructions:u
Assisted-by: codex
Commit: 2cd17898705456c546359b0683cbc6fb252698d9
https://github.com/llvm/llvm-project/commit/2cd17898705456c546359b0683cbc6fb252698d9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/SimpleSymbolTable.h
M orc-rt/include/orc-rt/bedrock/sps/CallSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/GDBJITRegistrarSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/MemoryAccessSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/NativeDylibManagerSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/SimpleNativeMemoryMapSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/StandaloneMachOUnwindInfoRegistrarSPSCI.h
M orc-rt/include/orc-rt/support/sps/SPSAllocAction.h
M orc-rt/include/orc-rt/support/sps/SPSWrapperFunction.h
M orc-rt/lib/bedrock/BootstrapInfo.cpp
M orc-rt/lib/bedrock/NativeDylibManager.cpp
M orc-rt/lib/bedrock/SimpleNativeMemoryMap.cpp
M orc-rt/lib/bedrock/sps/CallSPSCI.cpp
M orc-rt/lib/bedrock/sps/GDBJITRegistrarSPSCI.cpp
M orc-rt/lib/bedrock/sps/MemoryAccessSPSCI.cpp
M orc-rt/lib/bedrock/sps/NativeDylibManagerSPSCI.cpp
M orc-rt/lib/bedrock/sps/SimpleNativeMemoryMapSPSCI.cpp
M orc-rt/lib/bedrock/sps/StandaloneMachOUnwindInfoRegistrarSPSCI.cpp
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/test/unit/bedrock/SimpleSymbolTableTest.cpp
M orc-rt/test/unit/bedrock/sps/CallSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/MemoryAccessSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/support/sps/SPSAllocActionTest.cpp
M orc-rt/test/unit/support/sps/SPSWrapperFunctionTest.cpp
Log Message:
-----------
[orc-rt] Express CI symbols as C-level names (#222564)
Controller-interface wrapper functions are now declared extern "C",
exported, and registered under their C-level names, so that they resolve
identically whether looked up through the bootstrap symbol map or via
dlsym.
In addition to removing the inconsistency between the symbol-table and
dlsym names, making CI functions public declarations allows unit tests
to call CI wrappers directly (rather than having to resigster them and
then look them up in a symbol table).
ORC_RT_SPS_WRAPPER and ORC_RT_SPS_ALLOC_ACTION each split into _DECL and
_IMPL forms sharing a _SIG macro, giving the wrappers extern "C" linkage
and an ORC_RT_C_EXPORT annotation.
SimpleSymbolTable::addUnique now takes SymbolNameSpec names and mangles
them, with a second overload for merging one table into another.
Commit: c9e07d91eb9338f1922adbc120f68cf071bd9c2c
https://github.com/llvm/llvm-project/commit/c9e07d91eb9338f1922adbc120f68cf071bd9c2c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/lib/Dialect/LLVMIR/IR/NVVMOps.cpp
A mlir/lib/Dialect/LLVMIR/IR/NVVMOps.h
Log Message:
-----------
[MLIR][NVVM] Shard generated operation definitions (NFC) (#221812)
Generate the NVVM operation definitions in eight shards, use the
generated registration hook, and expose only the four parser and range
helpers referenced by generated code.
Assisted-by: Codex
Commit: 9679fbfea993cb2e815fe0fa5eefde310f917349
https://github.com/llvm/llvm-project/commit/9679fbfea993cb2e815fe0fa5eefde310f917349
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
M llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-int-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-reductions.ll
M llvm/test/CodeGen/AArch64/sve-bf16-rounding.ll
Log Message:
-----------
[LLVM][CodeGen][SME] Don't use non-streaming zeroing instruction when in streaming mode. (#222353)
When selecting scalable vector bf16-f32 converts we emit zip(0,vec).
Unfortunately, the typical zero-latency zeroing instruction is not
available when in streaming mode.
Commit: 278e125048fd83b66b6d053c40e31d47b4551884
https://github.com/llvm/llvm-project/commit/278e125048fd83b66b6d053c40e31d47b4551884
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Fix incorrect chain usage when lowering ISD::STRICT_FP_EXTEND. (#222287)
The chain was being passed as the last operand when it should be the
first.
Commit: 3a25949882c3ee496b523bcc816974c6ddfa9850
https://github.com/llvm/llvm-project/commit/3a25949882c3ee496b523bcc816974c6ddfa9850
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Tools/mlir-translate/MlirTranslateMain.cpp
M mlir/tools/mlir-translate/mlir-translate.cpp
Log Message:
-----------
[mlir-translate] Move InitLLVM ownership to the standalone tool (#222570)
Please Read: [RFC: Embeddable LLVM tool drivers for long-lived
hosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and [Why `InitLLVM` ownership matters section in the
RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-why-initllvm-ownership-matters-7)
`mlirTranslateMain` currently constructs `InitLLVM` internally. This is
fine when `mlir-translate` runs once as a standalone executable, but it
does not work for an in-process setting where the host remains alive and
invokes multiple LLVM tools. When `mlirTranslateMain` returns, the
`InitLLVM` destructor calls `llvm_shutdown()` and destroys
process-global `ManagedStatic` state that may still be needed by the
host and subsequent tool invocations.
[WasmBolt](https://github.com/anutosh491/WasmBolt) (try
[here](https://anutosh21.github.io/WasmBolt/)) is a concrete example of
such a host. It runs Clang, `mlir-opt`, `opt`, `llc` and LLD inside one
browser-hosted LLVM process, allowing users to inspect and transform
code without a remote compilation server.
As described in the [MLIR section of the
RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-mlir-13),
the real `mlir-opt` driver already works in this environment.
`MlirOptMain` does not own `InitLLVM`, so the surrounding host can
control the process lifetime. `mlirTranslateMain` does not currently
provide the same ownership boundary, which prevents us from integrating
it in the same clean way.
The working `mlir-opt` pipeline can be seen here:
https://www.youtube.com/watch?v=yga2lWelne4
This patch makes the two MLIR driver interfaces consistent by moving
`InitLLVM` from the reusable `mlirTranslateMain` entry point into the
standalone `mlir-translate` executable:
```text
standalone:
main -> InitLLVM -> mlirTranslateMain -> process exit
embedded:
host-owned InitLLVM / LLVMToolSession -> mlirTranslateMain
```
Standalone behaviour remains unchanged, while MLIRTranslateLib can now
borrow the process lifetime owned by a long-lived host.
Commit: 8d1a8fc4be3dc404bdaf63a493c3acc4cb48db52
https://github.com/llvm/llvm-project/commit/8d1a8fc4be3dc404bdaf63a493c3acc4cb48db52
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-strings/radix.test
M llvm/tools/llvm-strings/llvm-strings.cpp
Log Message:
-----------
[llvm-strings] Style updates primarily for --radix (#222454)
* Silence clang-tidy by moving radix into anonymous namespace
* Adjust type and variable naming to match LLVM style
* Adjust --radix command line error message to match llvm-objdump
* Use llvm::StringSwitch to map option values to enumerators
* Remove undocumented and untested --radix="" option which was an
implementation detail to handle --radix not being specified
Commit: c7e6e9881a42780852d535bfc7d59f63e76642e4
https://github.com/llvm/llvm-project/commit/c7e6e9881a42780852d535bfc7d59f63e76642e4
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
Log Message:
-----------
[VPlan] Simplify PlainCFG VPI construction (NFC) (#216435)
Commit: 0fa0a5db4dd51db8c4ec7f0a68f48f6586e0a29a
https://github.com/llvm/llvm-project/commit/0fa0a5db4dd51db8c4ec7f0a68f48f6586e0a29a
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Inline a using declaration in single use-site (NFC) (#222259)
Commit: c86292488b86080d994de4164342b8e0fdd43543
https://github.com/llvm/llvm-project/commit/c86292488b86080d994de4164342b8e0fdd43543
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/tools/llc/CMakeLists.txt
M llvm/tools/llc/llc.cpp
A llvm/tools/llc/llcdriver.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llc] Add a reusable LLVMLlcDriver library (#221896)
Please read :
[RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and [RFC
section](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-proposed-first-change-llvmllcdriver-8)
This splits `llc` into a small standalone executable and a reusable
`LLVMLlcDriver` library.
The change follows the structure introduced for `opt` by @wsmoses in
[#79205](https://github.com/llvm/llvm-project/pull/79205): the
command-line implementation moves into a driver library, while `llc.cpp`
remains the standalone entry point and continues to own `InitLLVM`.
The immediate motivation is embedding `llc` in long-lived applications
such as [WasmBolt](https://github.com/anutosh491/WasmBolt) (try
[here](https://anutosh21.github.io/WasmBolt/))
Currently, embedders must compile and modify a copy of `llc.cpp` because
the implementation and `main()` live in the same translation unit. This
split provides a reusable entry point without changing the behavior of
the
standalone `llc` executable.
Commit: eb3aad0e4c85c8ce083648297950aa11c46b27e4
https://github.com/llvm/llvm-project/commit/eb3aad0e4c85c8ce083648297950aa11c46b27e4
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
Log Message:
-----------
[BrainF] Remove use of getSizeOf() (#222590)
getSizeOf() is incompatible with ptradd. Also entirely unnecessary
here.
Commit: bde886d4e2a244045390da84a8cb9238ad1d3ab7
https://github.com/llvm/llvm-project/commit/bde886d4e2a244045390da84a8cb9238ad1d3ab7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Start using subarch in attributor instead of subtarget (#212207)
Avoid querying the subtarget for functions when the relevant
properties are known from the triple. The various subtarget
group size functions should also be decoupled from the subtarget,
but those are trickier to untangle.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: b3e7900e74098de130402d0a3ea857e77d817540
https://github.com/llvm/llvm-project/commit/b3e7900e74098de130402d0a3ea857e77d817540
Author: Tianyi Chen <diannaaav at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-readobj/MachO/needed-libs.test
M llvm/tools/llvm-readobj/MachODumper.cpp
Log Message:
-----------
[llvm-readobj] Exclude Mach-O dylib IDs from needed libraries (#221618)
For Mach-O files, `--needed-libs` includes `LC_ID_DYLIB`, causing a
dynamic
library to list its own install name as a dependency.
Exclude this command while retaining the actual dependency load
commands.
Fixes #39505.
Assisted-by: OpenAI Codex (implementation, tests, and initial
description).
Commit: f2ba88c9a5ce27c4a90a14c4190f3c41c6069e92
https://github.com/llvm/llvm-project/commit/f2ba88c9a5ce27c4a90a14c4190f3c41c6069e92
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/IR/Attributes.cpp
Log Message:
-----------
[IR] Mark whether param/ret attributes are ABI relevant (#222575)
This is specified using ABIAttr in TableGen and queried using
isABIAttr().
Make use of this in the Lint pass, instead of maintaining its own
(outdated) list of ABI attributes.
This has been split out from #207173.
Commit: 5bb6f55462541521488c0bbd59e028ee891f829b
https://github.com/llvm/llvm-project/commit/5bb6f55462541521488c0bbd59e028ee891f829b
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libsycl/Maintainers.md
Log Message:
-----------
[libsycl][NFC] Extend list of libsycl maintainers. (#222414)
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: c52a3432d6a8187dd0f22ad1f8fde6774167dc89
https://github.com/llvm/llvm-project/commit/c52a3432d6a8187dd0f22ad1f8fde6774167dc89
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A clang/test/Frontend/optimization-remark-target-features-aarch64.c
A clang/test/Frontend/optimization-remark-target-features-arm.c
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
A llvm/test/CodeGen/AArch64/optimization-remark-target-features.ll
A llvm/test/CodeGen/ARM/optimization-remark-target-features.ll
Log Message:
-----------
[AsmPrinter] add optimisation remark for target-features (#222074)
In clang we have `--print-enabled-extensions` which will print the
AArch64 extensions enabled for a given TU. However, sometimes it is
useful to be able to print out the actual subtarget features for each
function, for debugging/testing purposes. Add an optimisation remark for
that.
Commit: bc25ad46580963afb2056b929b1089133d006dbb
https://github.com/llvm/llvm-project/commit/bc25ad46580963afb2056b929b1089133d006dbb
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir
M mlir/test/Target/Cpp/arithmetic_operators.mlir
Log Message:
-----------
[mlir][emitc] Fix arith.{div,rem}ui index support (#221546)
These ops were failing to lower to emitc.{div,rem} when applied to index
operands since the code was:
- only checking for IntegerType, rejecting the !emitc.size_t into which
IndexType is converted.
- using the original operands instead of the converted ops, creating
unrealized_conversion_cast ops.
Commit: 5da4b50d7a4f12c283b1253a8e4d2c1e1c68a360
https://github.com/llvm/llvm-project/commit/5da4b50d7a4f12c283b1253a8e4d2c1e1c68a360
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
M llvm/test/CodeGen/AMDGPU/trap.ll
Log Message:
-----------
[AMDGPU][GISel] Notify GISel observers when splitting trap blocks (#219128)
`legalizeTrapEndpgm` can split a MBB and move the instructions following
a trap. Since an instruction's parent block is part of its GISel CSE
profile, notify active observers around the moved instructions so they
are re-profiled with the new parent block.
CSE consistency gap exposed by #217258.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Co-authored-by: GPT-5 Codex <noreply at openai.com>
Commit: f3909e073dd93f830f842c0bfe33b443b8fa0624
https://github.com/llvm/llvm-project/commit/f3909e073dd93f830f842c0bfe33b443b8fa0624
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/MLRegAlloc/default-eviction-advisor.ll
M llvm/test/CodeGen/MLRegAlloc/rel-codepath.ll
M llvm/test/Transforms/Inline/ML/bounds-checks.ll
M llvm/test/Transforms/Inline/ML/coro-split-func-levels.ll
M llvm/test/Transforms/Inline/ML/dead-callee.ll
M llvm/test/Transforms/Inline/ML/enable-inline-advisor-printing-ml.ll
M llvm/test/Transforms/Inline/ML/fpi-update.ll
M llvm/test/Transforms/Inline/ML/ml-test-release-mode.ll
M llvm/test/Transforms/Inline/ML/recursive.ll
M llvm/test/Transforms/Inline/ML/scc-dead-accounting.ll
M llvm/test/Transforms/Inline/ML/skip-unreachable.ll
M llvm/test/Transforms/Inline/ML/state-accounting-skip-non-cold.ll
M llvm/test/Transforms/Inline/inlining-advisor-default.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[MLGO] Gate model tests on optimization-specific lit features (#217906)
### Context
`have_mlir_lowering` only indicates that `LLVM_MLGO_MODELS` is
non-empty. It does not identify which model type was compiled.
### Motivation
An inliner-only configuration incorrectly enabled regalloc-specific test
commands, and vice versa.
### Changes
Add `have_mlir_lowering_inliner` and `have_mlir_lowering_regalloc` lit
features derived from the corresponding model-generation targets. Update
MLGO tests to use the appropriate model-specific feature, including GN
configuration defaults.
I leveraged AI to write this PR.
Commit: 05e74e7b5e065d05e33efd264e6f42d9cd40f06c
https://github.com/llvm/llvm-project/commit/05e74e7b5e065d05e33efd264e6f42d9cd40f06c
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/tools/opt/opt.cpp
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[opt] Move InitLLVM ownership to the standalone entry point (#222559)
Please Read: [RFC: Embeddable LLVM tool drivers for long-lived
hosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and [Why `InitLLVM` ownership matters section in the
RFC](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-why-initllvm-ownership-matters-7)
`LLVMOptDriver` is already separated from the standalone `opt`
executable, but `optMain` currently constructs `InitLLVM` internally.
This means its destructor calls `llvm_shutdown()` whenever one driver
invocation finishes.
That is appropriate for a standalone executable, but not for a reusable
driver called by a long-lived host. For example,
[WasmBolt](https://github.com/anutosh491/WasmBolt) (try
[here](https://anutosh21.github.io/WasmBolt/)) invokes `opt`, `llc`,
Clang and LLD within one browser-hosted LLVM process and needs the LLVM
process state to remain alive between tool invocations.
This patch moves `InitLLVM` ownership into `opt.cpp`:
```text
standalone opt:
main -> InitLLVM -> optMain -> shutdown
embedded host:
host-owned InitLLVM / LLVMToolSession -> optMain
```
Standalone opt therefore keeps the same lifetime and behaviour, while
LLVMOptDriver can borrow the lifetime owned by an embedding application.
This patch is independent of the proposed `LLVMToolSession `and
`LLVMLlcDriver` changes that I've proposed in the RFC and can be
reviewed separately.
Commit: e2955810d33ea0fb04522fc9f7cb12b71088ccc8
https://github.com/llvm/llvm-project/commit/e2955810d33ea0fb04522fc9f7cb12b71088ccc8
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
Log Message:
-----------
[MLIR]: Fix test after 70f5696e (#222601)
[MLIR]: Fix test after 70f5696e
Commit: abf3bd63bb37d00aa4cd8b5dad873e1140d06348
https://github.com/llvm/llvm-project/commit/abf3bd63bb37d00aa4cd8b5dad873e1140d06348
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/DebugInfo/CXX/verbose-trap.cpp
Log Message:
-----------
[clang][DebugInfo] Fix verbose trap source line (#222456)
The artificial inline location for `__builtin_verbose_trap` used line
zero. As a result, the emitted trap could inherit the preceding source
line in DWARF line tables.
Keep the artificial trap-message frame while assigning the builtin
call's line and column to the trap instruction.
Commit: 26012d67fef70763f6593eacfe2af41272cf7b72
https://github.com/llvm/llvm-project/commit/26012d67fef70763f6593eacfe2af41272cf7b72
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A llvm/test/Analysis/CostModel/X86/pdep.ll
A llvm/test/Analysis/CostModel/X86/pext.ll
Log Message:
-----------
[CostModel][X86] Add baseline cost test for pdep/pext intrinsics (#222603)
Slow pdep/pext targets in particular are highly inaccurate
Commit: 38fb876bf1e9ce9c5ccdc6f38fac4eb60ac66fce
https://github.com/llvm/llvm-project/commit/38fb876bf1e9ce9c5ccdc6f38fac4eb60ac66fce
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Move up getEpilogueTailLowering() (#222358)
This patch only moves up `getEpilogueTailLowering()` so that it can be
used by `planForEpilogueTF` as needed here: https://github.com/llvm/llvm-project/pull/208764
Commit: 73f0077ff60c58cae6c1f753b046ce93ebc4db3f
https://github.com/llvm/llvm-project/commit/73f0077ff60c58cae6c1f753b046ce93ebc4db3f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/records.cpp
M clang/test/CodeGen/pr4349.c
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/unittests/AST/ByteCode/toAPValue.cpp
Log Message:
-----------
Revert "[clang][bytecode] Use opaque pointers for decl-based dummy pointers" (#222599)
Reverts llvm/llvm-project#220917
Looks like this breaks some memory-sanitizier builders:
https://lab.llvm.org/buildbot/#/builders/169/builds/26405
https://lab.llvm.org/buildbot/#/builders/164/builds/25236
Commit: 11cf968d0d79f5809b4f3fd6b526f0d16ec2a6d1
https://github.com/llvm/llvm-project/commit/11cf968d0d79f5809b4f3fd6b526f0d16ec2a6d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/LLVMVisualizers/llvm.natvis
Log Message:
-----------
[NATVIS] Fix ConstantInt APInt value access (#221719)
Ensure we peek through the APInt::U VAL / *pVal union
Commit: e4d40831076278ffbfc7d883510d49db8fbfaa7c
https://github.com/llvm/llvm-project/commit/e4d40831076278ffbfc7d883510d49db8fbfaa7c
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
A mlir/test/Target/LLVMIR/omptarget-debug-shared-alloc-loc.mlir
Log Message:
-----------
[OpenMP] Give the device shared memory allocations a debug location. (#221842)
Fixes https://github.com/llvm/llvm-project/issues/221831.
In generic mode on the device, the buffers that carry values into an
outlined region come from device shared memory rather than the stack, so
they are emitted as calls to `__kmpc_alloc_shared` and
`__kmpc_free_shared`. Those are definitions in the DeviceRTL, which
makes them inlinable calls, and the verifier requires an inlinable call
in a function with debug info to carry a !dbg location. None of these
calls had one, for two separate reasons.
1. `allocateVar()` and `deallocateVar()` took a bare insertion point, so
an override had no debug location to set on the runtime calls it emits
in place of the alloca the base class would have created. Fixed by
adding a `DebugLoc` parameter that carries one.
2. The `createOMPAllocShared `and `createOMPFreeShared` calls in
`createParallel` relied on the implicit conversion from an insertion
point to a `LocationDescription`, which selects the constructor that
leaves the debug location empty, and `updateToLocation` then installs
that empty location over whatever the builder had. Fixed by passing the
`Builder`, which carries the debug location along with the insertion
point. This is the same fix as #218961.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: cc45d4f54199e005db594c22cf29545a0d020bae
https://github.com/llvm/llvm-project/commit/cc45d4f54199e005db594c22cf29545a0d020bae
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/clmul.ll
Log Message:
-----------
[CostModel][X86] clmul.ll - add test coverage for vpclmulqdq targets (#222610)
Commit: 46f9c228668a406cec6160552dea699846d91fd6
https://github.com/llvm/llvm-project/commit/46f9c228668a406cec6160552dea699846d91fd6
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/Scalarizer/bitcast-scalar-to-vector.ll
M llvm/test/Transforms/Scalarizer/bitcast-vector-to-scalar.ll
Log Message:
-----------
[Scalarizer] Update tests to use update_test_checks.py (#222460)
This PR is to address feedback on this comment:
https://github.com/llvm/llvm-project/pull/221033#discussion_r3973313815
requesting the tests use utils/update_test_checks.py instead.
Commit: cb46e8530f3c45be6f968fcdef47f37e5220fe95
https://github.com/llvm/llvm-project/commit/cb46e8530f3c45be6f968fcdef47f37e5220fe95
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
A llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_many_align.s
Log Message:
-----------
[JITLink][RISCV] Avoid quadratic removal of alignment edges (#222317)
We encountered this issue while using BOLT to instrument clang on
RISC-V. JITLink spent significant time removing alignment edges during
relaxation finalization in large code blocks with many alignment
relocations.
During RISC-V relaxation finalization, finalizeBlockRelax removes
AlignRelaxable edges individually from a block's edge vector. Each erase
shifts the remaining suffix, making this cleanup quadratic when the
number of alignment edges grows with the total edge count.
Compact surviving edges once and remove the trailing entries from the
back, preserving edge order and making cleanup linear. Count the
trailing entries before erasing to avoid comparing an invalidated
iterator.
These results support the performance benefit, but they come from
**GPT-generated** synthetic benchmarks and do not represent speedups on
real BOLT workloads.
count | origin | new
-- | -- | --
16,384 | 92.6 ms | 6.2 ms
32,768 | 430.0 ms | 9.5 ms
65,536 | 1,732.3 ms | 16.2 ms
Assisted by GPT-6.
Commit: 3eeb9b2bdb2a9ac4020a8ab8729e96ecb283691c
https://github.com/llvm/llvm-project/commit/3eeb9b2bdb2a9ac4020a8ab8729e96ecb283691c
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/HLFIR/Passes.h
M flang/include/flang/Optimizer/HLFIR/Passes.td
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
A flang/include/flang/Optimizer/Support/AllocationPolicy.h
R flang/include/flang/Optimizer/Transforms/AllocationPlacementPolicy.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRCopy.cpp
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/lib/Optimizer/Support/AllocationPolicy.cpp
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
A flang/test/Driver/allocation-policy.f90
A flang/test/Fir/allocation-policy-attr.fir
A flang/test/Fir/allocation-policy-pipeline.fir
A flang/test/HLFIR/inline-hlfir-copy-stack.fir
M flang/test/HLFIR/inline-hlfir-copy.fir
M flang/test/Transforms/allocation-placement.fir
A flang/test/Transforms/allocation-policy-precedence.fir
Log Message:
-----------
[flang] add AllocationPolicy attribute to module and use it in InlineHLFIRCopy (#222013)
The StackArrays/AllocationPlacement pass cannot move fir.allocmem
created during InlineHLFIRCopy for the copy-in/cop-out buffers because
of there placement in branches.
Moving these allocmem outside of the branches is suboptimal as these
allocations may never occur at runtime (when the data is actually
already contiguous).
Extending the StackArrays pass is doable but very tedious (the data flow
analysis passes used in the pass cannot recognized "same
predicates"/understand that the two fir.if block that
allocate/deallocates will be both reached or never reached (even when
modifying InlineHLFIRCopy to use the same SSA value for both fir.if). So
this requires custom logic, and was adding 200 lines of non trivial code
to audit and I did not like it.
I decided to expose the allocation policy so that other passes can rely
on it. To make it the most flexible and future proof this is done via a
new module attribute instead of threading options in the driver to this
and that pass. This way, it will also be possible to have custom per
function policy if ever needed.
The InlineHLFIRCopy is updated to apply the small array threshold policy
(that decide when constant size arrays should always be placed on the
stack, regardless of the -fstack-array/-fno-stack-array). I also
increased this threshold from 64 to 1024 so that it cover my application
use case. This increase is in line with the industry practice (NV, IFX,
and gfortran will all allocate few Kb temporary copy-in/out buffers on
the stack, regardless of the optimization level). For now, I decided to
not apply the `-fstack-array` aspect as it is on by default with flang
and I want to measure the effect first before doing so (gfortran/ifx
also control dynamic copy-in/out buffer allocations with the stack-array
related flag, so there is a good chance we end-up doing it at some
point).
Commit: b3eab3a932118c3a462741000d2118428f5bd268
https://github.com/llvm/llvm-project/commit/b3eab3a932118c3a462741000d2118428f5bd268
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
A mlir/test/Integration/Dialect/Vector/CPU/reductions-masked-minmax-f32.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][vector] Fix mask neutral value for masked fmaximum/fminimum reductions (#222275)
Masked maximumf/minimumf reductions were lowered by replacing inactive
lanes with a neutral value before applying an unmasked reduction. The
maximumf neutral was incorrectly set to the negative subnormal closest
to zero, causing it to beat any negative active value. Similarly,
minimumf used FLT_MAX, which loses to an active +Inf.
This change adds LLVM dialect support for
llvm.vp.reduce.fmaximum/fminimum and lowers masked reductions directly
to these predicated intrinsics.
Commit: 21d80e82d137f9a30e2626a9953d63015bcb280c
https://github.com/llvm/llvm-project/commit/21d80e82d137f9a30e2626a9953d63015bcb280c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Logging.h
Log Message:
-----------
[orc-rt] Remove redundant extern keyword. (#222619)
orc_rt_log_OSLogHandles is already extern via ORC_RT_C_EXPORT.
Commit: 0afee5c04021a2c8218beb6a64f3afd5f2578c02
https://github.com/llvm/llvm-project/commit/0afee5c04021a2c8218beb6a64f3afd5f2578c02
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
A compiler-rt/test/tsan/Darwin/os_unfair_lock_deadlock.c
A compiler-rt/test/tsan/Darwin/trylock_no_deadlock.c
Log Message:
-----------
[Darwin][TSan] Use deadlock detector aware calls for Darwin-specific lock interceptors (#216040)
Currently the deadlock detector is unaware of these lock types because
the interceptors use bare Acquire-Release calls. This patch switches
them over to the Mutex(Pre|Post)Lock calls instead.
Assisted by: Claude
rdar://155410097
Commit: 3ec60e826f522bbe6b0af7c9392968a9f6c660c5
https://github.com/llvm/llvm-project/commit/3ec60e826f522bbe6b0af7c9392968a9f6c660c5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/src/stdio/gpu/vfprintf_utils.h
Log Message:
-----------
[libc] Optimize the GPU printf implementation with size hints (#222474)
Summary:
The GPU printf interface is functionally a shim to pass a `va_list` and
format string to the CPU for formatting. The size of the argument list
isn't exposed by the C ABI, but we can use `__builtin_object_size` to
try to look it up. This will bind to the `alloca` holding our arguments
in the ABI and return a positive size if it is known.
We do this opportunistically, as the check is lossy. In cases where it
is known, this saves a stack spill to store the true size. Additionally,
we can use this to detect cases where `printf` is being used as a simple
`puts`.
This saves 10 VGPRs for the `printf("string")` case. It also saves 8
bytes of stack in most all cases.
Commit: 14789f78610ab6caa79d18737185755c199e0f95
https://github.com/llvm/llvm-project/commit/14789f78610ab6caa79d18737185755c199e0f95
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M orc-rt/test/regression/darwin/check-rt-process-info.test
M orc-rt/test/regression/linux/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Generalize testcases for different target archs (#222629)
Drop the hard-coded archs from the check-rt-process-info testcases.
Instead, check against an arch value derived from the build's target
triple.
Commit: c69a5ebf6b961d1296cb42a104008df40cf3bc36
https://github.com/llvm/llvm-project/commit/c69a5ebf6b961d1296cb42a104008df40cf3bc36
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__utility/declval.h
Log Message:
-----------
[libc++] Simplify the implementation of std::declval (#222303)
The implementation of `std::declval` calling `__declval` was originally
introduced for improved compile times. However, we now have a builtin
for `add_rvalue_reference`, which makes the old implementation faster
again, since we avoid instantiating any class types _and_ avoid overload
resolution.
Commit: c363b393529bc652c97344042a3b5e6f136d41c5
https://github.com/llvm/llvm-project/commit/c363b393529bc652c97344042a3b5e6f136d41c5
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] NFC: Remove redundant expression from getBuildVectorCost (#222547)
Gathers is initialized with the contents from VL and then not modified,
so `VL.equals(Gathers)` is always true.
Commit: 36fe08a5f92230655dd9662f121c092ced307ddd
https://github.com/llvm/llvm-project/commit/36fe08a5f92230655dd9662f121c092ced307ddd
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Analysis/CMakeLists.txt
Log Message:
-----------
[MLIR][CIR][NFCI] Split TestAliasAnalysis into its own library (#222174)
This is a target for the CIR alias analysis, and bringing in all of the
MLIRTestAnalysis is too heavy: it results in a significant increase in
CIR test size. This patch, plus a few little things, gets us ~850 edges
removed from the Clang Build (after Medhi's patches).
This also has CIR use it.
Commit: 8be8161a037daf2417c669336b777e986d0fc21f
https://github.com/llvm/llvm-project/commit/8be8161a037daf2417c669336b777e986d0fc21f
Author: Marcos Maronas <mmaronas at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/ConstantInitBuilder.h
M clang/lib/CodeGen/ConstantInitBuilder.cpp
M clang/test/CodeGenCXX/constructor-attr.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
Log Message:
-----------
[clang][CodeGen] Stop overriding GlobalVariable's default address space (#222367)
The `GlobalVariable` constructor used by `createGlobal` receives a
`std::optional<unsigned> AddressSpace` that, when unspecified, falls
back to `M.getDataLayout().getDefaultGlobalsAddressSpace()`. However,
`createGlobal`'s `AddressSpace` arg was a bare `unsigned` defaulting to
0. By doing that, it was effectively overriding the `GlobalVariable`'s
constructor fallback with 0. On targets whose default globals address
space is not 0 (AMDGPU, SPIR/SPIR-V), this emitted
`@llvm.global_ctors/dtors` in address space 0 causing some issues (see
https://github.com/ROCm/SPIRV-LLVM-Translator/issues/293).
Commit: 41fc4d5609d5f2414a2bbf9cf7e1ecd09fe5a01a
https://github.com/llvm/llvm-project/commit/41fc4d5609d5f2414a2bbf9cf7e1ecd09fe5a01a
Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/Decl.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/builtins.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/Sema/warn-strlcpycat-size.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for strlcpy (#221325)
Add `-Wfortify-source` diagnostics for `strlcpy` and `__builtin_strlcpy`
when the size argument exceeds the destination buffer size.
This is directly analogous to the previous PR for `strlcat` (#220341).
Also update `clang/test/Sema/warn-strlcpycat-size.c` and
`clang/test/Sema/builtins.c` to expect the `-Wfortify-source` warnings
where test calls pass sizes larger than the destination buffer capacity.
Part of #142230
Assisted-by: Gemini
Commit: da15729d2108024fc2e65fdcb17143393823d6a3
https://github.com/llvm/llvm-project/commit/da15729d2108024fc2e65fdcb17143393823d6a3
Author: Kieran B <kieran.bailey at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
Log Message:
-----------
[AArch64] Reorder ZPR stack spills to maximize ld1b/st1b pairings (#218950)
Currently, the stack allocation algorithm can order spilled ZPR
callee-saves in a way that prevents pairing.
Reorder ZPR callee-saves before frame indices are assigned to maximize
pairing opportunities. Pairing requires consecutive even/odd registers
at even stack offsets.
The remaining legality requirements are already checked when the
register pairs are formed.
The reordering algorithm primarily works by determining the parity of
the lowest ZPR spill offset. If the offset is odd, it places one
unpaired ZPR spill first so that subsequent register pairs begin at even
offsets.
Windows is not supported by this reordering algorithm for now, to keep
this change minimal.
New tests have been added to sve-callee-save-restore-pairs.ll to test
the reordering algorithm.
Commit: d7f2abda7020b4ca336732dd2984f6a668fd766a
https://github.com/llvm/llvm-project/commit/d7f2abda7020b4ca336732dd2984f6a668fd766a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
Log Message:
-----------
[SCEV] Use the refined BE-count formula if the addition cannot overflow (#221227)
Generalize the logic added in
https://github.com/llvm/llvm-project/pull/218694
to consider AddingStrideMinusOneMayOverflow (was MayAddOverflow) instead
of just the !IVMayOverflow part.
This handles 2 additional cases when Start < RHS:
* Stride is known power-of-2:
* Start == Stride and Start == Stride -1.
The patch includes a mechanical change to move up the existing
MayAddOverflow with comments, and clarifies the name to
AddingStrideMinusOneMayOverflow.
This improves trip count computations in a number of real-world cases:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1195.
End-to-end Alive2 Proofs for both cases in unsigned:
https://alive2.llvm.org/ce/z/MQ2YLf
PR: https://github.com/llvm/llvm-project/pull/221227
Commit: 148604aed3511a41af5e000b0440e0afb884daa6
https://github.com/llvm/llvm-project/commit/148604aed3511a41af5e000b0440e0afb884daa6
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel]Add missing utils/extract_symbols.py (#222653)
This was added in https://github.com/llvm/llvm-project/pull/221296
Commit: a774efbad6f74d695e37841c72b2a0175e4724e9
https://github.com/llvm/llvm-project/commit/a774efbad6f74d695e37841c72b2a0175e4724e9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/barrier
M libcxx/include/condition_variable
M libcxx/include/mutex
M libcxx/include/shared_mutex
M libcxx/test/libcxx/diagnostics/unused_variables.verify.cpp
M libcxx/test/libcxx/thread/nodiscard.verify.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.ctor.pass.cpp
M libcxx/test/std/thread/thread.condition/thread.condition.condvarany/default.pass.cpp
Log Message:
-----------
[libc++] Add [[gnu::warn_unused]] to a bunch of threading utilities (#213963)
Commit: fb69e1dcea0e527647525240af45a87420a3a593
https://github.com/llvm/llvm-project/commit/fb69e1dcea0e527647525240af45a87420a3a593
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Query waves-per-EU and flat-wg range from subarch in attributor (#222596)
The maximum flat work group range is a pair of constants and the maximum
waves per execution unit is fully known from the subarch. Use TargetParser
information and continue working to remove the dependence on codegen.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 3c478e1597c11abbdafef9c08d7e11655ba1cdd5
https://github.com/llvm/llvm-project/commit/3c478e1597c11abbdafef9c08d7e11655ba1cdd5
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/MC/MCGOFFStreamer.cpp
A llvm/test/CodeGen/SystemZ/zos-eh.ll
Log Message:
-----------
[SystemZ][z/OS] Relax check for additional symbols in PR section (#222435)
The current check in `emitLabel()` is too strict. Inside a PR, there
cannot be no other external visible label. However, temporary labels
which are used e.g. for calculating offsets can be emitted. A situation
in which this occurs is the emission of the DWARF EH tables, in which a
temporary symbol (with an empty name) is emitted at the begin of the
table, causing an error message. This change limits the error to
non-temporary labels.
Commit: 28d39b47e98af5a6fd8dc676f9ef576fe4b30724
https://github.com/llvm/llvm-project/commit/28d39b47e98af5a6fd8dc676f9ef576fe4b30724
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
Log Message:
-----------
CodeGen: Remove dead LiveVariables plumbing from MachineSink (#222563)
MachineSink threaded a LiveVariables pointer through to
SplitCriticalEdge so the analysis would be updated. It never used
LiveVariables for any decision, and MachineSinking runs before
LiveVariables in every pipeline.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 659faef7717be80c12e47604e61c01f2d7fc4975
https://github.com/llvm/llvm-project/commit/659faef7717be80c12e47604e61c01f2d7fc4975
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Add paging into modules request (#222122)
Added support for modules paging according to [DAP
specification](https://microsoft.github.io/debug-adapter-protocol/specification#Requests_Modules)
Commit: 26c633bf88337258f1b488bccfd74faa1efbafaa
https://github.com/llvm/llvm-project/commit/26c633bf88337258f1b488bccfd74faa1efbafaa
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/AstRestoreTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CallingConventionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ClassLayoutTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CompilandsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest0.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest1.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.h
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.ord
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionNestedBlockTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/PointerTypeTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/SimpleTypesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/TypeQualsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/add-symbols.cpp
A lldb/test/Shell/SymbolFile/NativePDB/ast-restore.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-arm.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-x86.test
A lldb/test/Shell/SymbolFile/NativePDB/class-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/compilands.test
A lldb/test/Shell/SymbolFile/NativePDB/enums-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/expressions.test
M lldb/test/Shell/SymbolFile/NativePDB/func-symbols.test
A lldb/test/Shell/SymbolFile/NativePDB/function-level-linking.test
A lldb/test/Shell/SymbolFile/NativePDB/function-nested-block.test
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-dia.cpp
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-no-dia.cpp
R lldb/test/Shell/SymbolFile/NativePDB/native-setting.cpp
A lldb/test/Shell/SymbolFile/NativePDB/pointers.test
A lldb/test/Shell/SymbolFile/NativePDB/type-quals.test
A lldb/test/Shell/SymbolFile/NativePDB/typedefs.test
A lldb/test/Shell/SymbolFile/NativePDB/variables-locations.test
A lldb/test/Shell/SymbolFile/NativePDB/variables.test
A lldb/test/Shell/SymbolFile/NativePDB/vbases2.test
R lldb/test/Shell/SymbolFile/PDB/Inputs/AstRestoreTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CallingConventionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ClassLayoutTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CompilandsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest0.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest1.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest2.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.h
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.ord
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionNestedBlockTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/PointerTypeTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/TypeQualsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
R lldb/test/Shell/SymbolFile/PDB/ast-restore.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-x86.test
R lldb/test/Shell/SymbolFile/PDB/class-layout.test
R lldb/test/Shell/SymbolFile/PDB/compilands.test
R lldb/test/Shell/SymbolFile/PDB/enums-layout.test
R lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
R lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
R lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
R lldb/test/Shell/SymbolFile/PDB/native-setting.cpp
R lldb/test/Shell/SymbolFile/PDB/pointers.test
R lldb/test/Shell/SymbolFile/PDB/type-quals.test
R lldb/test/Shell/SymbolFile/PDB/typedefs.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
R lldb/test/Shell/SymbolFile/PDB/variables-locations.test
R lldb/test/Shell/SymbolFile/PDB/variables.test
R lldb/test/Shell/SymbolFile/PDB/vbases.test
Log Message:
-----------
[lldb] Move most PDB shell tests to NativePDB (#222370)
I plan to remove the DIA PDB plugin before the 24 release - we switched
the default to the native one in 22. To avoid losing test coverage in
the process, this moves the SymbolFile/PDB tests to
SymbolFile/NativePDB. They were already running with both plugins. In
some cases, we set `env LLDB_USE_NATIVE_PDB_READER=1`, which I flipped.
The remaining shell tests are:
- `func-symbols.test`: Has a duplicate in NativePDB with different
checks, because the two plugins don't create identical types (see
comment in test)
- `udt-layout.test`: Also has a duplicate with different checks, because
the two plugins show the base classes in a different order.
Other than that, there's also a [unittest for
PDB](https://github.com/llvm/llvm-project/blob/2de38b4861ed4a7be7ddd42fc803e91d1fe81b14/lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp).
I'm not sure what we should do about it. Looking over the tests there,
most of these are already covered by the shell tests.
Commit: e6e102aa9ee5f8163d6d300614734b6c009aec34
https://github.com/llvm/llvm-project/commit/e6e102aa9ee5f8163d6d300614734b6c009aec34
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/Passes/RunCodeGen.h
M llvm/lib/Passes/RunCodeGen.cpp
Log Message:
-----------
[Passes] Add DisableSimplifyLibCalls flag to runCodeGenPipeline (#222430)
This enables this abstraction to be a drop-in replacement for rustc
after some minor refactoring.
Commit: 6b706509f983459f43708c42f80ec2f152a4cc42
https://github.com/llvm/llvm-project/commit/6b706509f983459f43708c42f80ec2f152a4cc42
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/IR/pch.h
M mlir/lib/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
M mlir/lib/Tools/mlir-lsp-server/LSPServer.cpp
Log Message:
-----------
[mlir] Reuse a precompiled header for MLIRIR (NFC) (#222576)
Build a private precompiled header from the common MLIR IR headers and
use it for MLIRIR. Build Support and IR first so the PCH is available
early, and qualify the LLVM LSP Location name that the broader header
surface exposes.
On current main, clean Release builds of LLVM and MLIR with `ninja -j16`
improved as follows:
```
wall: 535.99s -> 420.41s (-21.56%)
user: 7550.29s -> 6125.97s (-18.86%)
system: 569.85s -> 481.88s (-15.44%)
```
Assisted-by: Codex
Commit: 29a48499738db1829f9a6b71a38bc4461867a3c4
https://github.com/llvm/llvm-project/commit/29a48499738db1829f9a6b71a38bc4461867a3c4
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
A llvm/test/CodeGen/Hexagon/vreduce-fminmax-nan-fixup.ll
A llvm/test/CodeGen/Hexagon/vreduce-max-lowering.ll
A llvm/test/CodeGen/Hexagon/vreduce-min-lowering.ll
Log Message:
-----------
[Hexagon] Lower vreduce(min|max)((imum)?) (#211898)
Add custom lowering for VECREDUCE_FMIN/FMAX/FMINIMUM/FMAXIMUM on HVX
float vector types. The target-independent default expansion reduces
these pairwise using the hardware min/max instruction directly, which
does not implement IEEE-754 NaN-propagation semantics: a NaN in the
input can silently corrupt the reduction result, and an all-NaN input
produces a non-NaN value instead of NaN.
The custom lowering strips NaN elements to the appropriate neutral value
(+/-Inf) before the pairwise tree reduction so a NaN can't corrupt other
lanes, then fixes up the scalar result to NaN if every input element was
NaN.
FMINNUM/FMAXNUM on HVX vector types get the same treatment: NaN operands
are replaced with the neutral value before delegating to the hardware
min/max, with a fixup to restore NaN when both operands were NaN (per
llvm.minnum/maxnum semantics).
Co-authored-by: Kaushik Kulkarni <kauskulk at qti.qualcomm.com>
Commit: 972a171dd102201089ea65673a72b832f29de297
https://github.com/llvm/llvm-project/commit/972a171dd102201089ea65673a72b832f29de297
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/InstCombine/SystemZ/libcall-arg-exts.ll
Log Message:
-----------
[InstCombine] Generate test checks (NFC) (#222670)
With UTC_ARGS --disable to preserve the declaration check lines
at the end.
Commit: 658872c4dffbe435042faee03672b5b03c620977
https://github.com/llvm/llvm-project/commit/658872c4dffbe435042faee03672b5b03c620977
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
A llvm/test/CodeGen/SystemZ/zos-align-constpool.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
Log Message:
-----------
[SystemZ][z/OS] Correctly align the constant pool and the PPA1 (#222128)
Both should be half-word aligned. However, testing revealed that both
can end up on odd addresses, which leads to relocation errors. Fix is to
change the alignment.
Commit: af00b1753fe813df84e1c262fe48a215929ea1a3
https://github.com/llvm/llvm-project/commit/af00b1753fe813df84e1c262fe48a215929ea1a3
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[BUILD]: Fix for #221812 (#222671)
[BUILD]: Fix for #221812
Commit: 5e497ce1838bd4448aa484262a00ce60c324ed4f
https://github.com/llvm/llvm-project/commit/5e497ce1838bd4448aa484262a00ce60c324ed4f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/for_reduction_task_codegen.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
Log Message:
-----------
[OpenMP] Avoid use of ConstantExpr::getSizeOf() (#222662)
Support for this will be dropped as part of the ptradd migration.
Replace with a constant size.
While I'm touching the code anyway, I also simplified the size
calculation a bit. It's computing both the size in bytes and in
elements. Avoid doing an unnecessary division followed by multiply for
the size in bytes.
Commit: 847fb5cfde68fdea490171bc24087ebb0cd90738
https://github.com/llvm/llvm-project/commit/847fb5cfde68fdea490171bc24087ebb0cd90738
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Object/GOFFObjectFile.h
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
A llvm/test/tools/llvm-ar/zos-symattrs.test
M llvm/test/tools/llvm-ar/zos-write.test
Log Message:
-----------
[llvm-ar][GOFF] Implement symbol attributes for GOFF archives (#214528)
z/OS archive symbol table entries contain a 32-bit attribute word
alongside each member offset.
The low three bits encode:
```
bit 2 (0x4): 64-bit addressing (AMODE 64)
bit 1 (0x2): XPLink calling convention
bit 0 (0x1): Writable Static Area (WSA)
```
Previously in e2c8fa0, llvm-ar wrote zero for these attributes. This
patch reads them from GOFF ESD
records and stores them in a SymbolAttrs vector parallel to the existing
Symbols vector in MemberData
to emit the correct word per symbol.
These attributes are tested using `llvm-nm --print-armap` implemented in
#214527 within the LIT test.
Commit: 746d09af26a84cdbe1e03aeb436c8ada09ac8ecf
https://github.com/llvm/llvm-project/commit/746d09af26a84cdbe1e03aeb436c8ada09ac8ecf
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/SystemZ/zos-eh.ll
Log Message:
-----------
[SystemZ][z/OS] Fix "relative immediate relocation section mismatch" (#222437)
Constants should go inside the text section, but this is not explicitly
coded. In the test case, the EH table is generated into a PR section.
Then the constant pool of function `fn_with_const_pool()` is emitted,
which goes into the PR section of the EH table instead of the code
section. When the constant is later referenced in the code, the relative
offset cannot be calculated because different sections are involved.
The fix is to explicitly return the text section for constants.
Commit: f24c52bc14c55646ce37e8e5a6e5f174e896fbf4
https://github.com/llvm/llvm-project/commit/f24c52bc14c55646ce37e8e5a6e5f174e896fbf4
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR]: Fix format after #222671 (#222674)
[MLIR]: Fix format after #222671
Commit: b879ce97a1a7b097b5ed98468ced33d543af9558
https://github.com/llvm/llvm-project/commit/b879ce97a1a7b097b5ed98468ced33d543af9558
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-warnings.ll
Log Message:
-----------
[compiler-rt][profdata] Use x86 triple in instrprof-debug-info-correlate-warnings.ll (#222668)
Test added by #163254 / 28c048ec0f0a677115a0b00a88a7d013f925f2b8.
It has been failing in Armv8 (32-bit) builds since then. I'm only just
getting to it.
warning: overriding the module target triple with
armv8a-unknown-linux-gnueabihf [-Woverride-module]
'x86-64' is not a recognized processor for this target (ignoring
processor)
'+cmov' is not a recognized feature for this target (ignoring feature)
'+cx8' is not a recognized feature for this target (ignoring feature)
<...>
error: a.c:1:0: in function main i32 (): calling convention is
hard-float, but floating-point registers are unavailable
Happens on AArch64 too, but it's not fatal there. This happens because
the ll has x86 options in it, but the RUN used whatever the host triple
was.
I don't know what's critical in this file, so I'm adding a --target x86
option to the test to fix this.
Commit: fc6a6716ed7a0b90535ad2b02abff1b041cce542
https://github.com/llvm/llvm-project/commit/fc6a6716ed7a0b90535ad2b02abff1b041cce542
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
Promote BOLT from Office hours to Online Sync-Up (#222492)
Office hours are intended for chats with individual contributors:
> A number of experienced LLVM contributors make themselves available
for a chat on a regular schedule, to anyone who is looking for some
guidance.
BOLT community has outgrown office hours format and has been operating
as sync-up.
Reflect that in the Getting Involved page.
Commit: 6e85ed2ede8bc34753e7b8740ccdf4b309a80fdf
https://github.com/llvm/llvm-project/commit/6e85ed2ede8bc34753e7b8740ccdf4b309a80fdf
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/LLVMIR/pch.h
M mlir/lib/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
Log Message:
-----------
[mlir][LLVM] Reuse a PCH for MLIRLLVMDialect (NFC) (#222578)
Build a private precompiled header from the LLVM dialect and LLVM IR
headers and use it for MLIRLLVMDialect. Build dialect libraries before
conversions so the PCH is available early and repeated parsing is
avoided.
Relative to the MLIRIR PCH parent, clean Release builds of LLVM and MLIR
with `ninja -j16` improved as follows:
```
wall: 420.41s -> 398.79s (-5.14%)
user: 6125.97s -> 5789.14s (-5.50%)
system: 481.88s -> 455.05s (-5.57%)
```
Assisted-by: Codex
Commit: a726ed254aeaae71a92fddd094130b2e1588ce42
https://github.com/llvm/llvm-project/commit/a726ed254aeaae71a92fddd094130b2e1588ce42
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
Log Message:
-----------
[AMDGPU][NFC] Fix salu use to use SGPR (#222657)
Fix tests with "salu_use" in their name to use SGPRs.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 3dfd0f8f396075678ae16f623eb01390b5b140d0
https://github.com/llvm/llvm-project/commit/3dfd0f8f396075678ae16f623eb01390b5b140d0
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/IRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
Log Message:
-----------
[IRBuilder] Remove unused AllocTy argument (#222667)
This argument is not used at all. The size is explicitly passed in a
separate argument.
Commit: 4d09d062b4fb2e22f54b1125cbcea734efda81a8
https://github.com/llvm/llvm-project/commit/4d09d062b4fb2e22f54b1125cbcea734efda81a8
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/CodeViewSymbols.def
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/DebugInfo/CodeView/SymbolDumper.cpp
M llvm/lib/DebugInfo/CodeView/SymbolRecordMapping.cpp
M llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
A llvm/test/tools/llvm-pdbutil/s-association.yaml
M llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp
Log Message:
-----------
[CodeView] Read and dump `S_ASSOCIATION` (#221034)
`S_ASSOCIATION` associates one symbol with another one. Right now, it's
only used for coroutines. The `get_associatedSymbol*` functions from
[`IDiaSymbol8`](https://learn.microsoft.com/en-us/visualstudio/debugger/debug-interface-access/idiasymbol8)
use this record. I'm not sure if the VS debugger uses this at all.
The symbol value was added earlier, but we weren't able to read/write
it. Also, lld would remove it when linking, as it didn't know if it
contained type indices.
This PR adds support for that. It's only visible in llvm-pdbutil where
we can dump it and roundtrip through yaml. I checked that it uses the
correct format when used with the DIA dump sample.
The coroutine kind is still missing. It's contained in the flags of an
`S_FRAMEPROC`. But it'd like to wait for #215887 which touches the flags
in YAML.
Commit: 8f100d2b11256fb538ace5ac45c9cd9be5d56335
https://github.com/llvm/llvm-project/commit/8f100d2b11256fb538ace5ac45c9cd9be5d56335
Author: Pablo Reble <pablo.reble at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
Log Message:
-----------
[SLP][AMDGPU] Fix test to actually exercise count-check condition (#222022)
The gfx906 RUN lines in `inst-count-heuristic.ll` never exercised the
`SLPInstCountCheck` heuristic they were meant to test.
This patch converts the test kernel from `i32` to `i16` elements so the
heuristic's `getVectorFactor() == 2` gate is actually reachable on
gfx906, and adds a `-slp-inst-count-check=false` RUN line to cover the
non-default behavior.
Commit: 5777c75fd91efa7abce23a74c4ec2381e8084b44
https://github.com/llvm/llvm-project/commit/5777c75fd91efa7abce23a74c4ec2381e8084b44
Author: Pablo Reble <pablo.reble at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
Log Message:
-----------
[SLP][AMDGPU] Fix load-address typo in v4f16 combine tests (#222112)
Patch addresses issue where tests are not performing 4 contiguous
elements load/store chain as intended.
- Correcting both typos (`%tmp6` vs. `%tmp10`) so each function
represents a contiguous 4-element chain.
- `copysign_combine_v4f16` and `canonicalize_combine_v4f16` now
vectorize identically on `GFX8` and `GFX9`.
- Adding `canonicalize_combine_v4f16_noncontiguous`, to preserve
existing test coverage, so the non-contiguous-gather path isn't silently
dropped.
Commit: 3c3c3d8141fe7582baab9c15ffd0bbfbba4ac8eb
https://github.com/llvm/llvm-project/commit/3c3c3d8141fe7582baab9c15ffd0bbfbba4ac8eb
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[LV] Strip unnecessary cl::opts from headers (NFC) (#221891)
Mark the ones which are static as such, strip declarations in headers to
avoid unnecessary dependencies, and nest the non-static ones under the
llvm namespace.
Commit: c47af0575fcfd5c3713ee009595500eb1ec0104b
https://github.com/llvm/llvm-project/commit/c47af0575fcfd5c3713ee009595500eb1ec0104b
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
Log Message:
-----------
[AMDGPU] Change physical VGPRs to 1024 for gfx13 (#222615)
GFX13 has 1024 physical VGPRs per SIMD in wave32 (512 in wave64)
Commit: fff83ec21990ed0bfee300f175b03317b1f709d6
https://github.com/llvm/llvm-project/commit/fff83ec21990ed0bfee300f175b03317b1f709d6
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
Log Message:
-----------
[AMDGPU] Add gfx13 MC support for v_cvt_scale_pk32_* instructions (#222616)
Commit: d5c0de99769824a032ef2f602f9939e28d259f06
https://github.com/llvm/llvm-project/commit/d5c0de99769824a032ef2f602f9939e28d259f06
Author: Anirudh Mathur <126768505+AnirudhMathur12 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/sys/stat/CMakeLists.txt
A libc/src/sys/stat/futimens.h
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/futimens.cpp
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/futimens_test.cpp
Log Message:
-----------
[libc] Implement futimens (#222251)
futimens(fd, times) is implemented on Linux by delegating to
the utimensat system call.
Fixes #220764
Commit: a4cff758b654b7c49c35e7445a025681b8e7a7f2
https://github.com/llvm/llvm-project/commit/a4cff758b654b7c49c35e7445a025681b8e7a7f2
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][VecUtils] Introduce DeadInstrMorgue (#221482)
Move dead instructions collector and erasor into VecUtils, so that
it is usable by both, BundleVec and LoadStoreVec, vectorizers. NFC
Commit: 7962fc367a83caf8442a474660ab93ec5ed1ac22
https://github.com/llvm/llvm-project/commit/7962fc367a83caf8442a474660ab93ec5ed1ac22
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
Log Message:
-----------
[AMDGPU] Enable CSE in the GlobalISel post-legalizer combiner (#217258)
Enable GISel CSE in the legacy AMDGPU post-legalizer combiner so it
matches the new pass-manager path.
Use the standard CSE configuration for the optimization level. Create
correctly constrained virtual registers during legalization instead of
mutating register classes after creation, and notify GlobalISel
observers when register operands are replaced. This also updates the
affected GlobalISel checks.
More context:
https://github.com/llvm/llvm-project/pull/216274#pullrequestreview-4964537468
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 1e6f0cbabe1bce674eadb77814d98e2263823384
https://github.com/llvm/llvm-project/commit/1e6f0cbabe1bce674eadb77814d98e2263823384
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/semantics/DispatchThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ms.input.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ps.output.hlsl
M clang/test/SemaHLSL/Semantics/groupindex.hlsl
M clang/test/SemaHLSL/Semantics/invalid_entry_parameter.hlsl
A clang/test/SemaHLSL/Semantics/output-parameters.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
A clang/test/SemaHLSL/Semantics/semantic-indexing.hlsl
M clang/test/SemaHLSL/Semantics/target.ps.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.output.hlsl
M clang/test/SemaHLSL/Semantics/vertexid.ps.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M llvm/include/llvm/Frontend/HLSL/SemanticSignatures.h
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticStagesTest.cpp
Log Message:
-----------
[NFC][SemaHLSL][CGHLSL] Move semantic classification to common `HLSL/SemanticSignatures` (#218058)
Updates SemaHLSL and CGHLSL to not use stringref compares to distinguish
semantics and converts them to a common `SemanticKind` enum.
Further, it moves the classification of valid shader stages into a
common table to denote where a semantic is interpreted and how it is
used to to derive if it is valid.
This also updates tests that were using invalid semantic constructs to
use corrected versions.
This is a pre-req for the signature packing issues (#205875, etc) and
#189765
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 5784163e14db80f999a4269da2877215791e2617
https://github.com/llvm/llvm-project/commit/5784163e14db80f999a4269da2877215791e2617
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SizeOpts.cpp
Log Message:
-----------
[SizeOpts] Remove dead struct BasicBlockBFIAdapter (NFC) (#222536)
The last uses were removed on June 28, 2023 in commit
80155cbf0be1744953edf68b9729c24bd0de79c4 when hotness/coldness queries
were refactored into templated ProfileSummaryInfo member functions.
Assisted-by: Antigravity
Commit: f7dd24bbe0e94ba94e3c6feda1703544e631a485
https://github.com/llvm/llvm-project/commit/f7dd24bbe0e94ba94e3c6feda1703544e631a485
Author: Renato Golin <rengolin at systemcall.eu>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/docs/Tutorials/transform/Ch1.md
M mlir/docs/Tutorials/transform/Ch4.md
M mlir/docs/Tutorials/transform/ChH.md
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/test/Dialect/Arith/sharding-propagation.mlir
M mlir/test/Dialect/Bufferization/canonicalize.mlir
M mlir/test/Dialect/Linalg/block-pack-matmul.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/elementwise/fold.mlir
M mlir/test/Dialect/Linalg/elementwise/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/elementwise/invalid.mlir
M mlir/test/Dialect/Linalg/elementwise/roundtrip.mlir
M mlir/test/Dialect/Linalg/fold-add-into-dest.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/scalable-unpack-producer-fusion.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-generalize.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-binary.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/Dialect/SparseTensor/encoding_with_symbols.mlir
M mlir/test/Dialect/SparseTensor/external_after_codegen.mlir
M mlir/test/Dialect/Transform/test-promote-tensors.mlir
M mlir/test/Examples/transform/Ch1/invalidation-1.mlir
M mlir/test/Examples/transform/Ch1/invalidation-2.mlir
M mlir/test/Examples/transform/Ch1/sequence.mlir
M mlir/test/Examples/transform/Ch2/sequence.mlir
M mlir/test/Examples/transform/Ch3/sequence.mlir
M mlir/test/Examples/transform/Ch4/multiple.mlir
M mlir/test/Examples/transform/Ch4/sequence.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
M mlir/test/Interfaces/TilingInterface/query-fusability.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Interfaces/TilingInterface/tile-elementwise.mlir
M mlir/test/Interfaces/TilingInterface/tile-fuse-and-yield-using-interface.mlir
M mlir/test/python/dialects/linalg/ops.py
Log Message:
-----------
[MLIR][Linalg] Change the syntax of elementwise kind attribute (#222569)
Remove the need to add a "kind=" lead for the elementwise operation
name, as well as the fully specified namespace for the attribute,
shortening the syntax from:
```
linalg.elementwise kind=#linalg.elementwise_kind<add>
```
to
```
linalg.elementwise <add>
```
Closes #221194
Assisted by: Claude Opus
Commit: e8c833b96ccd6a9e950e9a67fb59d451668532d1
https://github.com/llvm/llvm-project/commit/e8c833b96ccd6a9e950e9a67fb59d451668532d1
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/extf_truncf.mlir
Log Message:
-----------
[MLIR][XeGPU] Lower arith.truncf wider than one xevm.truncf group (#217130)
`xevm.truncf` lowers to device builtins that convert exactly 16 f16/bf16
elements
per call, so `TruncfToXeVMPattern` only matched a 16-element source. A
workgroup-level mxfp GEMM that quantizes A in the kernel produces a
wider one,
which nothing else lowers, so the module failed to build:
%r = arith.truncf %a : vector<32xbf16> to vector<32xf4E2M1FN>
// cannot be converted to LLVM IR: missing
`LLVMTranslationDialectInterface`
// registration ... for op: arith.truncf
Convert a whole number of groups at a time instead: slice the source
into
16-element groups, emit one `xevm.truncf` per group, and concatenate the
packed
results before the final bitcast. A source of exactly one group takes
the original
path with unchanged code, and a source that is not a whole number of
groups is
still left to the regular arith-to-LLVM path.
`arith.extf` carries the same restriction on its result, but no wider
case has come
up, so it is left as is.
Commit: 9d4a7d05d2ef4774f08a0f95faef510c0be469a9
https://github.com/llvm/llvm-project/commit/9d4a7d05d2ef4774f08a0f95faef510c0be469a9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Basic/LangOptions.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/test/CodeGen/Hexagon/swp-large-rec.ll
R llvm/test/CodeGen/X86/llc-fp-contract-warning.ll
M llvm/tools/llc/llcdriver.cpp
Log Message:
-----------
CodeGen: Remove AllowFPOpFusion from TargetOptions (#222683)
Commit: a56fd548f257c4fc89387ab2bb483acee7c59747
https://github.com/llvm/llvm-project/commit/a56fd548f257c4fc89387ab2bb483acee7c59747
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Tools/mlir-translate/MlirTranslateMain.h
M mlir/lib/Tools/mlir-translate/MlirTranslateMain.cpp
Log Message:
-----------
[mlir-translate] Add structured translation entry point (#222623)
Please read: [RFC: Embeddable LLVM tool drivers for long-lived
hosts](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754)
and the [MLIR
section](https://discourse.llvm.org/t/rfc-embeddable-llvm-tool-drivers-for-long-lived-hosts/91754#p-367966-mlir-13).
`mlir-opt` already separates its standalone command-line frontend from
its reusable implementation:
```text
command-line parsing
↓
MlirOptMainConfig
↓
MlirOptMain(input buffer, output stream, registry, config)
```
`mlir-translate` currently combines those responsibilities inside
`mlirTranslateMain(int argc, char **argv, ...)`: it registers and parses
its command-line options, opens the input and output files, and then
performs the translations.
This patch applies the existing mlir-opt structure to mlir-translate. It
extracts the MLIR translation executor behind a structured overload
accepting an input buffer, output stream, selected Translation objects
and an MlirTranslateMainConfig. The existing command-line entry point
continues to parse the same options and delegates to the new overload,
so its command-line behaviour remains unchanged.
Separating parsing from execution is useful for any application
embedding MLIR. Such an application already has its input, output and
selected translation, and should not be required to install another
command-line frontend into the process merely to call MLIRTranslateLib.
[WasmBolt](https://github.com/anutosh491/WasmBolt)(try
[here](https://anutosh21.github.io/WasmBolt/)) is one concrete consumer.
It runs `mlir-opt`, `opt`, `llc`, Clang and LLD inside one long-lived
browser-hosted LLVM process. Calling the complete `mlir-opt` and
`mlir-translate` command-line frontends in that process causes common
options such as `-o` to be registered twice in LLVM's process-global
command-line registry.
```
mlir-translate: CommandLine Error: Option 'o' registered more than once!
LLVM ERROR: inconsistency in registered CommandLine options
```
The structured entry point allows WasmBolt to invoke the actual MLIR
translation operation without registering another command-line frontend.
This is needed to continue naturally from the MLIR LLVM dialect to LLVM
IR inside the same compiler session.
Add a simple test where the test register its own `-o` option first,
then runs two translations through the new API and checks the output.
This confirms that the translation path works without touching the
command-line parser. **Can Improve it a bit if it looks too informal.**
Commit: 5b757b81db35e7611f0d5f242a2bd53f3894c084
https://github.com/llvm/llvm-project/commit/5b757b81db35e7611f0d5f242a2bd53f3894c084
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__configuration/compiler.h
M libcxx/include/__memory/allocator.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_temporary_buffer.h
R libcxx/include/__new/allocate.h
M libcxx/include/__utility/small_buffer.h
M libcxx/include/module.modulemap.in
M libcxx/include/new
M libcxx/src/include/aligned_alloc.h
R libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.capacity/max_size.pass.cpp
M libcxx/test/std/language.support/support.dynamic/hardware_inference_size.compile.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cons/size.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/pointer_destruction.pass.cpp
Log Message:
-----------
[libc++] Remove __libcpp_allocate (#220981)
We use `__libcpp_allocate` and friends only in very specific
circumstances. Instead of providing a private API we can make
`std::allocator` the default API for the uses of `__libcpp_allocate`.
Commit: 20ddf3e2f5a9fa2717d9cfea19660ef1f0399044
https://github.com/llvm/llvm-project/commit/20ddf3e2f5a9fa2717d9cfea19660ef1f0399044
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMerge.cpp
M compiler-rt/test/fuzzer/fuzzer-dirs.test
M compiler-rt/test/fuzzer/fuzzer-oom-with-profile.test
M compiler-rt/test/fuzzer/fuzzer-oom.test
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[libFuzzer] Use uppercase "B" for byte units in output (#220828)
Fixes issue #56766. libFuzzer printed data sizes as "b", "Kb" and "Mb",
which denote bits. Use "B", "KB" and "MB" instead.
Commit: 72f5694df7b6c9fa94f22468f5cd468d305b9917
https://github.com/llvm/llvm-project/commit/72f5694df7b6c9fa94f22468f5cd468d305b9917
Author: Tapiwa Gonga <126596199+tapiwagonga at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/docs/dev/code_coverage.md
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/HermeticTestUtils.cpp
Log Message:
-----------
[libc] Enable full-build code coverage (#221802)
Extended LIBC_ENABLE_COVERAGE to support LLVM_LIBC_FULL_BUILD=ON and
added the LIBC_ENABLE_COVERAGE_MCDC CMake option for MC/DC coverage.
This enables developers and CI pipelines to measure source-level and
MC/DC coverage directly on hermetic tests in full-build configurations
without relying on the host C library.
Updated add_libc_hermetic in LLVMLibCTestRules.cmake to link hermetic
tests with -noprofilelib, -u__llvm_profile_runtime, and compiler-rt's
profiling library. Replaced internal entrypoint objects in
link_object_files with public entrypoint objects for the C functions
referenced by libclang_rt.profile.a.
Added calloc and __errno_location to HermeticTestUtils.cpp to satisfy
remaining freestanding profiling runtime dependencies. Updated
libc/docs/dev/code_coverage.md with full-build instructions.
Assisted-by: Automated tooling, human reviewed.
Commit: 19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4
https://github.com/llvm/llvm-project/commit/19eb8bf1a5fd01e2bca2c7112b7f393f946d67f4
Author: Bar Soloveychik <barsolo at meta.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/source/Core/Value.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.h
M lldb/source/Utility/RegisterValue.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterVector.py
M lldb/unittests/Target/RegisterTypeBuilderClangTest.cpp
M lldb/unittests/Utility/RegisterValueTest.cpp
Log Message:
-----------
[lldb] Expose vector registers through SBValue (#220707)
This is adding GDB remote vector register support.
- Build exact Clang types from parsed vector metadata.
- Use native Clang vectors where valid and arrays where required to
preserve exact layouts.
- Support nested, pointer, boolean, and non-power-of-two vectors.
- Expose vector lanes through `SBValue` children and expression paths.
- Handle typed vector data correctly across target byte orders.
- Add builder, SB API, layout, cache, and big-endian tests.
Example:
```
vector = frame.FindRegister("v0")
vector.GetNumChildren() # 4
vector.GetChildAtIndex(2).GetValue() # "3.5"
vector.GetValueForExpressionPath("[2]").GetValue() # "3.5"
v = frame.FindRegister("v0")
print([v.GetChildAtIndex(i).GetValue()
for i in range(v.GetNumChildren())])
# ['1.5', '2.5', '3.5', '4.5']
```
Structured `register read` output is added separately in patch 5.
---------
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: d23678bd45b149107e43eed3d56a02571bafef7f
https://github.com/llvm/llvm-project/commit/d23678bd45b149107e43eed3d56a02571bafef7f
Author: Ran Regev <regev.ran at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/AST/DeclPrinter.cpp
A clang/test/AST/ast-print-decomposition.cpp
M clang/test/Analysis/anonymous-decls.cpp
M clang/test/Analysis/cfg.cpp
Log Message:
-----------
[clang] Support DecompositionDecl in -ast-print (#221711)
`DeclPrinter` had no `VisitDecompositionDecl`, so `auto [a, b] = get();`
printed as `auto = get();`, silently dropping the binding list (worse
at namespace scope, where it also produced a stray empty statement per
binding).
Add `DeclPrinter::VisitDecompositionDecl`, printing the full
`type [bindings] = init;` form for all three decomposition kinds
(aggregate/member, array, tuple-like), matching what `VisitVarDecl` does
for an ordinary declaration. Specifier and initializer printing is
shared between the two via two helpers (`printVarDeclSpecifiers`,
`printVarInitializer`) so they can't drift apart.
Each binding prints correctly, including a pack's leading `...` and
per-binding attributes. `BindingDecls` are skipped when walking a
`DeclContext` directly, since each is already printed as part of its
`DecompositionDecl;` a decomposition declaration is likewise kept out of
the tag-declaration grouping in `VisitDeclContext`, which would
otherwise merge it into a preceding `struct S { ... } obj;`.
Assisted-by: AI
Commit: bdf81254f94e1449ee10e50593df1211f43ba2e1
https://github.com/llvm/llvm-project/commit/bdf81254f94e1449ee10e50593df1211f43ba2e1
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.h
M compiler-rt/lib/ubsan/ubsan_handlers.cpp
Log Message:
-----------
[compiler-rt] Handle weak interfaces with MinGW GCC (#222706)
Windows weak-function emulation uses MSVC linker /alternatename
directives, which GNU ld does not support. Use direct exported
definitions, avoid registering unsupported DLL weak aliases, and
reference UBSan's real C++ implementation.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: 8124aa1a3567930ab0823b760ec81ac2457b7477
https://github.com/llvm/llvm-project/commit/8124aa1a3567930ab0823b760ec81ac2457b7477
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix bazel build for FrontendHLSL (#222716)
Fixes #1e6f0cbabe1bce674eadb77814d98e2263823384 by adding missing
dependency.
Commit: 8c520baeb4ed4f1c8d07f84ce5d5f5922a754bed
https://github.com/llvm/llvm-project/commit/8c520baeb4ed4f1c8d07f84ce5d5f5922a754bed
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/asan/asan_globals_win.cpp
Log Message:
-----------
[compiler-rt][asan] Include intrin.h for MinGW GCC (#222709)
asan_globals_win.cpp calls __debugbreak in the runtime thunk
configurations. Include MinGW's intrinsic header so the function is
declared when this file is compiled with GCC.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: bd05ca8ca6da9a275234c59fcb1886505a5958e0
https://github.com/llvm/llvm-project/commit/bd05ca8ca6da9a275234c59fcb1886505a5958e0
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/asan/asan_win_common_runtime_thunk.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win_defs.h
Log Message:
-----------
[compiler-rt] Support GNU section attributes on Windows (#222707)
MSVC and Clang place sanitizer sentinels and CRT callbacks with
__declspec(allocate) after declaring their sections with #pragma
section. MinGW GCC uses the section attribute instead, so select the
appropriate spelling for each compiler.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: 2d51e69fd09e4bdeeed441c8c5fc256584178c79
https://github.com/llvm/llvm-project/commit/2d51e69fd09e4bdeeed441c8c5fc256584178c79
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/cmake/modules/CMakeLists.txt
M mlir/cmake/modules/CMakeLists.txt
Log Message:
-----------
[CMake] Don't reference unexported targets from dependency-only configs (#222630)
#221724 stopped exporting a project's targets file when that project is
enabled only as another project's dependency, but the build-tree
`ClangConfig.cmake` and `MLIRConfig.cmake` still include it
unconditionally. `find_package()` therefore finds the config and fails
inside it:
```
CMake Error at build/lib/cmake/clang/ClangConfig.cmake:19 (include):
include could not find requested file:
build/lib/cmake/clang/ClangTargets.cmake
Call Stack (most recent call first):
CMakeLists.txt:90 (find_package)
```
This breaks any configuration that enables Flang without also enabling
Clang or MLIR explicitly: `runtimes/CMakeLists.txt` calls
`find_package(Clang ...)`, which is deliberately not `REQUIRED` and is
expected to tolerate an unavailable package — but a *half-generated*
package is a hard error rather than a "not found". Concretely,
`-DLLVM_ENABLE_PROJECTS=flang -DLLVM_ENABLE_RUNTIMES=flang-rt` fails at
`runtimes-configure`, which is the configuration premerge uses for
flang-rt changes.
This patch guards the include the same way the export itself is guarded,
so a dependency-only project generates a config without a dangling
include. The install-tree path already handles this through
`get_config_exports_includes()`; only the build-tree path was missed.
MLIR has the same defect and is fixed here too. It is currently latent
only because `runtimes/CMakeLists.txt` calls `find_package(Clang)` and
not `find_package(MLIR)`; a `find_package(MLIR)` against a
dependency-only build tree fails identically at `MLIRConfig.cmake:33`.
Assisted-by: AI
Commit: dbeea4508e52856497e4080b1d3b265975044795
https://github.com/llvm/llvm-project/commit/dbeea4508e52856497e4080b1d3b265975044795
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang-rt/lib/cuda/init.cpp
Log Message:
-----------
[flang][cuda] Drop Mcuda_compiled definition (#222695)
Commit: bfe74bd081a4ad6322c6932c146d4d99815029ed
https://github.com/llvm/llvm-project/commit/bfe74bd081a4ad6322c6932c146d4d99815029ed
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-function-pointer-debug-none-base.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_blocking_pipes/PipeBlocking.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-select-untyped-ptr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-void-call-aggregate-arg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_kernel_attributes/max_work_group_size.ll
Log Message:
-----------
[NFC][SPIR-V] Fix missing RUN prefix that disabled spirv-val checks (#222609)
Commit: 4814e098872b365e52401a3ebb64c91b3bd0b90d
https://github.com/llvm/llvm-project/commit/4814e098872b365e52401a3ebb64c91b3bd0b90d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/Lowering/fenv.cir
M clang/test/CIR/Lowering/goto.cir
Log Message:
-----------
[Clang][CIR] Adapt tests post #217277 (#222583)
Adapt tests post #217277. Failing bot:
* https://lab.llvm.org/staging/#/builders/241/builds/13
Commit: 9974c3864e1ffb5feed8e99d4191084a96d84a09
https://github.com/llvm/llvm-project/commit/9974c3864e1ffb5feed8e99d4191084a96d84a09
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Log Message:
-----------
[gn] port 6fbfc9261c8f453 (#222726)
6fbfc9261c8f453 make c-t-extra/clangd/unittests/DiagnosticsTests.cpp
include clang-tidy-config.h.
Commit: 7c0969c0842a1b19bcffd8bf3b67a76badb2c431
https://github.com/llvm/llvm-project/commit/7c0969c0842a1b19bcffd8bf3b67a76badb2c431
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Tosa/Transforms/TosaGatherScatterHardening.cpp
A mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening-invalid.mlir
A mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening.mlir
Log Message:
-----------
[TOSA] Add pass to sanitize gather/scatter indices (#221200)
Add new TosaGatherScatterHardeningPass TOSA pass to clamp indices before
they are fed to a tosa.gather or tosa.scatter unless a suitable clamp
sequence already exists. This enables avoiding out-of-bounds accesses on
untrusted indices in tosa.gather and tosa.scatter lowering.
The pass fails if the dimension indexed by the indices tensor of any of
the tosa.gather or tosa.scatter is dynamic. The pass supports EXT-INT64
by using the same element type in the clamp min/max sequence as the
indices tensor. In case the indexed dimension is bigger than can be
represented in the element type bitwidth the maximum value in that
bitwidth is used.
Assisted-by: codex
Signed-off-by: Thomas Preud'homme <thomas.preudhomme at arm.com>
Commit: e47d10f55719cb5bc7dac81d49277938813b5ee4
https://github.com/llvm/llvm-project/commit/e47d10f55719cb5bc7dac81d49277938813b5ee4
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/__support/wctype_utils.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscasecmp.cpp
A libc/src/wchar/wcscasecmp.h
A libc/src/wchar/wcsncasecmp.cpp
A libc/src/wchar/wcsncasecmp.h
M libc/test/src/__support/wctype_utils_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscasecmp_test.cpp
A libc/test/src/wchar/wcsncasecmp_test.cpp
M libc/utils/docgen/wchar.yaml
Log Message:
-----------
[libc] Add wcscasecmp and wcsncasecmp implementations. (#222154)
Add a helper to wctype_utils.h for three-way comparison of individual
`wchar_t`s. As is the case in existing code, `wchar_t` is presumed to be
UTF-32.
Assisted-by: Automated tooling, human reviewed.
Commit: e286cb01a6ff6c01024db4e8216134b49163d1e6
https://github.com/llvm/llvm-project/commit/e286cb01a6ff6c01024db4e8216134b49163d1e6
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] fix mistake from f3909e073dd93f (#222735)
Commit: d90d78fe5ba15d66fea0fd0f9a3977f20f34aceb
https://github.com/llvm/llvm-project/commit/d90d78fe5ba15d66fea0fd0f9a3977f20f34aceb
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/HLFIR/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
Fix bazel builds (#222733)
- For flang/lib/Optimizer/HLFIR/Transforms -- fixes
https://github.com/llvm/llvm-project/pull/222013 by adding missing
dependencies.
- For lldb/source/Plugins:PluginRegisterTypeBuilderClang -- fixes
https://github.com/llvm/llvm-project/pull/220707 by adding missing
dependency
Commit: 4eae56cc40e02d55d926de8485ad846d74612449
https://github.com/llvm/llvm-project/commit/4eae56cc40e02d55d926de8485ad846d74612449
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 672843a3f2ee (#222740)
Commit: 30eac2a761a9773f970b539f9ea029c39e88b21a
https://github.com/llvm/llvm-project/commit/30eac2a761a9773f970b539f9ea029c39e88b21a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 5b757b81db35 (#222739)
Commit: 93ab99f40d86dead34ccb0d2aa45dfdd06d65cc9
https://github.com/llvm/llvm-project/commit/93ab99f40d86dead34ccb0d2aa45dfdd06d65cc9
Author: Konstantin Bogdanov <thevar1able at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/X86/ctlz.ll
M llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll
Log Message:
-----------
[LoopIdiom] Recognize the ctlz/cttz idiom when the input is known non-zero (#222373)
LoopIdiomRecognize converts a shift-until-zero loop to `ctlz`/`cttz`.
When the loop uses the count outside the loop, it needs a zero check of
the input before the loop. Without the check, the inputs 0 and 1 give
the same count. The recognizer stops when the check is not present.
The check is not necessary when the input is known non-zero. InstCombine
can remove the check for such inputs. Then the recognizer does not
convert the loop. This happens in `sbc_calc_scalefactors` from ffmpeg
with #222334: the input is an or reduction that starts at 32768, so it
is never zero, and the loop stays a loop.
This patch makes the recognizer accept a known non-zero input in place
of the zero check. The conversion is exact in this case.
`ctlz-loop.ll` in PhaseOrdering had a FIXME for a loop over `abs(n)`.
The recognizer now converts that loop too.
For the ffmpeg case, `isKnownNonZero` must also see that an or
recurrence with a non-zero start is non-zero. That change goes into
#222334.
Commit: a241c37f86cfe135cfa6c130b4aaf2ecd6a9d064
https://github.com/llvm/llvm-project/commit/a241c37f86cfe135cfa6c130b4aaf2ecd6a9d064
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 1e6f0cbabe1b (#222738)
Commit: a4f04ab5e25fa5dfebf83e3808b6ab96fd94f9bf
https://github.com/llvm/llvm-project/commit/a4f04ab5e25fa5dfebf83e3808b6ab96fd94f9bf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
Log Message:
-----------
[gn build] Port c86292488b86 (#222741)
Commit: 2d57805c92fb15e0a6c7c2f76d1927fbe3d3522a
https://github.com/llvm/llvm-project/commit/2d57805c92fb15e0a6c7c2f76d1927fbe3d3522a
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix bazel build for libc:__support_wctype_utils (#222743)
Fixes https://github.com/llvm/llvm-project/pull/222154 (commit
e47d10f55719cb5bc7dac81d49277938813b5ee4) by adding missing dependency.
Commit: b686fb567fa4baeb810b0ae184811415daae68a1
https://github.com/llvm/llvm-project/commit/b686fb567fa4baeb810b0ae184811415daae68a1
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/delete-non-virtual-dtor.cpp
Log Message:
-----------
[clang][Sema] Don't warn about non-virtual destructors on destroying delete (#222047)
A destroying `operator delete `takes over destruction, so the delete
expression never invokes the destructor and
[[expr.delete]p3](https://eel.is/c++draft/expr.delete#3) carves it out.
Skip `CheckVirtualDtorCall` when the selected deallocation function is
destroying. `::delete` and `delete[]` keep warning.
Fixes #65524
Commit: 26609f5b95679e02d2373a7c97ff811872a4b505
https://github.com/llvm/llvm-project/commit/26609f5b95679e02d2373a7c97ff811872a4b505
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
A llvm/test/Transforms/SimpleLoopUnswitch/pr219510.ll
Log Message:
-----------
[SimpleLoopUnswitch] Fix bug in partially invariant unswitching (#222118)
Partial invariant unswitching can potentially hoist a load from header
to the preheader of the loop. If a potentially no-return function call
exists in the loop header before the load instruction, the
transformation is still performed, but this is not correct.
Commit: ffdc7df10d016542cee44dec8b777161a309bd55
https://github.com/llvm/llvm-project/commit/ffdc7df10d016542cee44dec8b777161a309bd55
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/memchr-11.ll
M llvm/test/Transforms/InstCombine/memchr-2.ll
M llvm/test/Transforms/InstCombine/memchr-3.ll
M llvm/test/Transforms/InstCombine/memchr-6.ll
M llvm/test/Transforms/InstCombine/memchr.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[SimplifyLibCalls] Explicitly annotate memchr selects (#222734)
SimplifyLibCalls creates a variety of selects when optimizing calls to
memchr. Explicitly annotate them as unknown as the conditions always
depend on a non-constant parameter to memchr with which we cannot infer
probability information without value profile data.
Commit: 1db5b9c26f5c153244e7617ad95ef140a1bdd2a0
https://github.com/llvm/llvm-project/commit/1db5b9c26f5c153244e7617ad95ef140a1bdd2a0
Author: SharonXSharon <xiaoranxu.nju at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A compiler-rt/test/sanitizer_common/TestCases/Linux/opendir_null.cpp
R compiler-rt/test/sanitizer_common/TestCases/Posix/opendir_null.cpp
Log Message:
-----------
[sanitizer] Address opendir interceptor test review comments (#222732)
Address comments on https://github.com/llvm/llvm-project/pull/221309
Move `opendir_null.cpp` to the `Linux` tests, convert the `LD_PRELOAD`
shim from `C++` to `C`, and simplify the null path construction.
Co-authored-by: Sharon Xu <sharonxu at fb.com>
Commit: aa7bd9ad7bd7f80da145af88e33acf95a7a6f671
https://github.com/llvm/llvm-project/commit/aa7bd9ad7bd7f80da145af88e33acf95a7a6f671
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/ConstantRange.h
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/CorrelatedValuePropagation/or-disjoint.ll
A llvm/test/Transforms/SCCP/or-disjoint.ll
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[ConstantRange] Add binaryOp supporting 'or disjoint'. (#222573)
Promote logic from https://github.com/llvm/llvm-project/pull/221832 to
ConstantRange::binaryOp so it can also be re-used from SCCP.
This enables a few additional folds & flag inference end-to-end:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1227
PR: https://github.com/llvm/llvm-project/pull/222573
Commit: e267729a4290b9ccd82c35dfbd2257473253b3e5
https://github.com/llvm/llvm-project/commit/e267729a4290b9ccd82c35dfbd2257473253b3e5
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-lsp-server/cir-lsp-server.cpp
Log Message:
-----------
[CIR][NFC] Reduce the dialects referenced by cir-lsp-server to minimum (#222131)
This is 1 of 2 patches that build on the work of others, and reduces the
list of dialects to just those in CIR + a handful of others. Between
this, 1 other commit, and the existing patches proposed by others, we
reduce the 'overhead' of the CIR build to +30%.
AI Disclaimer: Claude came up with this and the list. I'm not sure it is
correct, but we pass all tests.
Commit: db5421adfa1d8984bf0015ded33d12f9bbfbe80f
https://github.com/llvm/llvm-project/commit/db5421adfa1d8984bf0015ded33d12f9bbfbe80f
Author: ThePo1es <choijinbeom9 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/umask.h
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/umask.cpp
A libc/src/sys/stat/umask.h
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/umask_test.cpp
Log Message:
-----------
[libc] Implement umask (#222499)
Implement the POSIX umask() entrypoint for Linux and register it for
aarch64, riscv and x86_64. umask cannot fail, so the syscall wrapper
returns mode_t directly and the entrypoint does not touch errno.
Fixes #220759
Assisted-by: Claude Code
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 78d1301c0ffda9d2a1ebcbc90ed60ed3f0a4f04d
https://github.com/llvm/llvm-project/commit/78d1301c0ffda9d2a1ebcbc90ed60ed3f0a4f04d
Author: Oliver Old <mail at oold.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
[llvm][release] Update package versions in the Windows release script (#215749)
- Upgrade LibXML2 to version 2.15.3
- Fix clang-cl/lld-link check never failing
- Fix PYTHONHOME detection failing if no `head` utility is installed
- Fix PYTHONHOME detection failing for Python Manager-installed Python
Fixes #207197.
Fixes #215138.
Commit: 8ed9cadeb6224ca3818f4277935aca31a6c73609
https://github.com/llvm/llvm-project/commit/8ed9cadeb6224ca3818f4277935aca31a6c73609
Author: Jeong Jihyeon <84846295+JihyeonJeong129 at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdio.yaml
M libc/src/stdio/CMakeLists.txt
A libc/src/stdio/fmemopen.cpp
A libc/src/stdio/fmemopen.h
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/fmemopen_test.cpp
Log Message:
-----------
[libc] Implement fmemopen (#221748)
Implement the POSIX `fmemopen` function.
### Validation
- Ran `ninja -C build-libc -j8 libc_stdio_unittests`.
- Ran `ninja -C build-libc -j8 check-libc`.
Fixes #220762
Commit: 5b6710a6cc6cca5f182a3fc4f12ce82fd2646c6e
https://github.com/llvm/llvm-project/commit/5b6710a6cc6cca5f182a3fc4f12ce82fd2646c6e
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
Log Message:
-----------
[CIR] Fix a dependency problem in ABI test (#222717)
A recent change removed mlir-translate as a dependency of CIR and
changed tests to use cir-translate instead. One test was committed after
that change and missed the update.
Commit: be9584e0dfc480193fa47645b302f630f41fb772
https://github.com/llvm/llvm-project/commit/be9584e0dfc480193fa47645b302f630f41fb772
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/test/tsan/Darwin/write-interpose.c
Log Message:
-----------
[TSan][Darwin][Test-only] Fix crash in write-interpose.c test (#222656)
Due to this test running with verbosity turned up, an early 'Report'
happened to get caught by the test's write interceptor, and on newer
macOS versions the interceptor's call to printf was attempting to
allocate before the allocator was initialized - leading to a crash.
This patch instead uses snprintf to a stack allocated buffer in order to
avoid allocating in the interceptor.
rdar://184804426
Commit: c5a4e6d87b7dcde64e1a2f4422e1eeccb0d4a509
https://github.com/llvm/llvm-project/commit/c5a4e6d87b7dcde64e1a2f4422e1eeccb0d4a509
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add packed multiply-parts accumulate intrinsics (#222571)
Support the RISC-V P packed multiply-parts accumulate instructions, which
add selected products into `rd`.
The intrinsics lower to dedicated `PMACC_HALVES_*` SelectionDAG nodes
rather than an `add` of plain products, ensuring instruction selection
does not depend on DAGCombine folding. On RV32, the word forms
accumulate into a GPR pair via new `WMACC`, `WMACCU`, and `WMACCSU`
nodes.
Also add corresponding Clang builtins and wrappers in
`riscv_packed_simd.h`.
Spec:
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-multiply-parts-accumulate
Commit: b4af99a87e1fbea9dd170c2c3bd15b9f87a69419
https://github.com/llvm/llvm-project/commit/b4af99a87e1fbea9dd170c2c3bd15b9f87a69419
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
Log Message:
-----------
[VPlan] Use VPlan-based costs for scalarized FP inductions. (#222442)
Continue the migration of induction costs to be VPlan-based by dropping
the legacy fallback in precomputeCosts for FP inductions. Widened FP
inductions were already costed by VPWidenIntOrFpInductionRecipe; the
missing piece is the scalarized form. Extend both VPDerivedIVRecipe and
VPScalarIVStepsRecipe to support FP inductions.
This also removes WidenedIVs, which becomes dead: it is only ever filled
from VPWidenIntOrFpInductionRecipe, and the legacy path now only sees
pointer inductions.
The new cost numbers should be more accurate, taking into account the
int->fp conversion cost, plus FMul and FAdds we generate.
Checking if FAdd/FMul can be folded requires a few additional checks (in
particluar the FAdd requires -0.0 to fold, FMul needs 1.0,
https://alive2.llvm.org/ce/z/g_khUS). Currently we do not yet carry
fast-math flags on the VPDerivedIVRecipes, so those are not considered
for now. The difference should be negligable in practice.
PR: https://github.com/llvm/llvm-project/pull/222442
Commit: 3d9b5d0d0f0a7affd4a5cd34523c60647b9164dc
https://github.com/llvm/llvm-project/commit/3d9b5d0d0f0a7affd4a5cd34523c60647b9164dc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Dialect/LLVMIR/invalid.mlir
Log Message:
-----------
[mlir][LLVM] Prevent vector bit-width overflow (#220898)
Compute vector bit widths from the rank-one MLIR dimension and saturate
the 64-bit product. Otherwise, large dimensions can overflow the
multiplication or be truncated by ElementCount and bypass the 2^17-bit
verifier limit.
Add regression coverage for both vector.insert and vector.extract.
Before the fix, the oversized vector.insert case was accepted and its
expected diagnostic was not produced.
Found by Coverity.
Assisted-by: Codex
Commit: 56d496fa86a8fd4be06b459c278753b4660f42d6
https://github.com/llvm/llvm-project/commit/56d496fa86a8fd4be06b459c278753b4660f42d6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
Log Message:
-----------
[RISCV] Remove TuneHasSingleElementVecFP64 has a configurable tune feature for sifive-x180. (#222496)
X180 is a DLEN=64 CPU with 1 vector ALU. By definition it is always
single element FP64.
Commit: 7d7238007b1f09bf7d4a91115173a996f7758fb1
https://github.com/llvm/llvm-project/commit/7d7238007b1f09bf7d4a91115173a996f7758fb1
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-clang-flang.py
Log Message:
-----------
[Offload] Fix AMDGPU clang/flang buildbot config (#222761)
It appears that this buildbot was misconfigured for quite some time and
not quite running the way it should have been running.
This patch should address the issue of CMake not being able to split the
two paths for the additional cache files at the ';' and thus, not
picking them up correctly.
A local test build succeeded after this fix.
Commit: fc696f791e06bdc0c0aa10afa65e2243db528409
https://github.com/llvm/llvm-project/commit/fc696f791e06bdc0c0aa10afa65e2243db528409
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
A flang/test/Fir/call-properties.fir
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/TableGen/Operator.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Math/Transforms/ExtendToSupportedTypes.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/TableGen/Operator.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
A mlir/test/Conversion/FuncToLLVM/call-attributes.mlir
M mlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir
M mlir/test/Dialect/SPIRV/IR/target-env.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTest.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
Log Message:
-----------
[mlir] Migrate aggregate builders to explicit properties (#219195)
Pass typed property structs and discardable attributes separately at ODS
aggregate builder call sites.
This is part of a general migration to use the "new" properties-based
APIs #155475
Assisted-by: Codex
Commit: 2fc19f8c9d70209bada5249632fd0d2523a59952
https://github.com/llvm/llvm-project/commit/2fc19f8c9d70209bada5249632fd0d2523a59952
Author: Colin De Vlieghere <cdevlieghere at tesla.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
Log Message:
-----------
[mlir][bufferization] Expose checkPreBufferizationAssumptions helper (#221302)
Downstream users of bufferization may want to run this check without
invoking the entire one-shot module analysis. If the check is not run
and invalid IR is encountered, OneShotBufferize tends to crash rather
than emitting a nice error message.
This patch simply exposes `checkPreBufferizationAssumptions` to the
header file so it is accessible to other users.
Commit: 041300fa05151b3819478f33daa4384922b4b74e
https://github.com/llvm/llvm-project/commit/041300fa05151b3819478f33daa4384922b4b74e
Author: Kacper Fiedorowicz <kacper at mail.openlinux.dev>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/aarch64/headers.txt
M libc/include/llvm-libc-macros/darwin/CMakeLists.txt
A libc/include/llvm-libc-macros/darwin/signal-macros.h
M libc/include/llvm-libc-macros/signal-macros.h
M libc/include/llvm-libc-types/__jmp_buf.h
M libc/include/llvm-libc-types/fenv_t.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/sigprocmask.h
M libc/src/setjmp/aarch64/sigsetjmp.cpp
M libc/src/setjmp/darwin/CMakeLists.txt
M libc/src/setjmp/darwin/sigsetjmp_epilogue.cpp
M libc/src/setjmp/longjmp.h
M libc/src/setjmp/setjmp_impl.h
A libc/src/signal/darwin/CMakeLists.txt
A libc/src/signal/darwin/sigaddset.cpp
A libc/src/signal/darwin/sigdelset.cpp
A libc/src/signal/darwin/sigemptyset.cpp
A libc/src/signal/darwin/sigfillset.cpp
A libc/src/signal/darwin/sigprocmask.cpp
M libc/test/UnitTest/FEnvSafeTest.cpp
A libc/test/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/test/src/__support/OSUtil/darwin/sigprocmask_test.cpp
M libc/test/src/signal/sigaddset_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
Log Message:
-----------
[libc] Fix Darwin aarch64 fenv and sigsetjmp build support (#192079)
This patch fixes Darwin aarch64 build failures in libc around fenv and
sigsetjmp support.
Before this change, the Darwin aarch64 fenv implementation did not match
the public fenv_t layout and referenced several Darwin-specific
exception/control bits that were not defined in llvm-libc. This caused
libc builds to fail in fenv_darwin_impl.h with a sizeof(fenv_t) vs.
internal-state mismatch and multiple undeclared-identifier errors for
FE_FLUSHTOZERO and the FPCR trap/flush bits.
This patch fixes that by updating the internal Darwin aarch64
floating-point state layout to match fenv_t, defining the missing Darwin
FPCR bit values used by the implementation, and handling the
flush-to-zero exception bit consistently.
The patch also fixes the Darwin sigsetjmp path by enabling sigjmp_buf
support on Apple targets, adding the Darwin signal pieces needed by that
path (sigaddset, sigdelset, sigemptyset, sigfillset, sigprocmask, plus
Darwin signal macros), and updating the aarch64 sigsetjmp inline
assembly to branch through a local label before jumping to setjmp,
avoiding an assembler error from using cbz with an external symbol
target.
Commit: f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
https://github.com/llvm/llvm-project/commit/f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/test/UnitTest/CMakeLists.txt
A libc/test/UnitTest/CharLiteralUtils.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/stringview_test.cpp
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/writer_test.cpp
Log Message:
-----------
[libc] Parameterize printf_core::Writer test to cover wchar_t. (#222744)
This is a follow-up to #220669, which did the initial refactor of
`printf_core::Writer` enabling the `CharT` template parameter.
Move the helper for selecting character literals added in #203355 out of
stringview_test into a util header library.
Assisted-by: Automated tooling, human reviewed.
Commit: 240b9213c8d6dfa8a089267212bcf3964731746e
https://github.com/llvm/llvm-project/commit/240b9213c8d6dfa8a089267212bcf3964731746e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
A mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialectDecl.h
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][NVGPU] Split out the dialect declaration to improve build time (NFC) (#222767)
Move NVGPUDialect to a self-contained declaration header and use it in
three consumers that do not need generated NVGPU operations.
Median instructions fell from 221.225B to 166.874B (-24.568%) and wall
time from 34.31s to 25.61s (-25.357%).
Assisted-by: Codex
Commit: 00b8327d38e533068f78e5e8170e1c3ea4ef094a
https://github.com/llvm/llvm-project/commit/00b8327d38e533068f78e5e8170e1c3ea4ef094a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/IR/Tensor.h
A mlir/include/mlir/Dialect/Tensor/IR/TensorDialect.h
M mlir/lib/CAPI/Dialect/Tensor.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCFPass.cpp
Log Message:
-----------
[mlir][Tensor] Split out the dialect declaration to improve build time (NFC) (#222781)
Move TensorDialect to a self-contained declaration header and use it in
the two consumers that only need the dialect class.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 25.499B to 21.072B (-17.363%) and median wall
time fell from 3.55s to 2.81s (-20.845%).
Assisted-by: Codex
Commit: 50026fd902b58e6ccee33786a3a3138fbb7b0dce
https://github.com/llvm/llvm-project/commit/50026fd902b58e6ccee33786a3a3138fbb7b0dce
Author: Iasonas Karaprodromidis <iaskarapro at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/lldb-forward.h
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.cpp
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.h
Log Message:
-----------
[lldb][Fortran] Add TypeSystemFortran files (#218016)
This PR adds the foundational TypeSystemFortran class. To satisfy the
compiler, it implements all required pure virtual functions from the
base TypeSystem class as stubs (returning nullptr or 0).
Changes:
- Adds the TypeSystemFortran class.
- Provides stub implementations for all inherited pure virtual
functions.
Part of the Add Fortran support to LLDB GSoC 2026 project.
Relates to #109119.
Commit: 9d399869e907ff2ed44da3b12d2d97a6a918547b
https://github.com/llvm/llvm-project/commit/9d399869e907ff2ed44da3b12d2d97a6a918547b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
A mlir/include/mlir/Dialect/LLVMIR/LLVMDialectDecl.h
M mlir/lib/Conversion/ConvertToLLVM/ConvertToLLVMPass.cpp
M mlir/lib/Conversion/LLVMCommon/ConversionTarget.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVMPass.cpp
M mlir/lib/Dialect/Func/TransformOps/FuncTransformOps.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/test/lib/Conversion/MemRefToLLVM/TestMemRefToLLVMWithTransforms.cpp
M mlir/test/lib/Dialect/ControlFlow/TestAssert.cpp
M mlir/test/lib/Dialect/LLVM/TestPatterns.cpp
Log Message:
-----------
[mlir][LLVM] Split out the dialect declaration (NFC) (#222782)
Move LLVMDialect to a declaration header that retains its attribute and
type API but excludes generated operation classes. This narrows 12
dialect-only consumers.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 207.570B to 176.073B (-15.174%) and median wall
time fell from 30.72s to 25.52s (-16.927%).
Assisted-by: Codex
Commit: 795c3cab959f7bbe330ecec84833f3e4e227d714
https://github.com/llvm/llvm-project/commit/795c3cab959f7bbe330ecec84833f3e4e227d714
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
A mlir/include/mlir/Dialect/LLVMIR/NVVMDialectDecl.h
M mlir/lib/CAPI/Dialect/NVVM.cpp
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Conversion/NVVMToLLVM/NVVMToLLVM.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
Log Message:
-----------
[mlir][NVVM] Split out the dialect declaration to improve build time (NFC) (#222783)
Move NVVMDialect to a self-contained declaration header and use it in
five consumers that do not need generated NVVM operations.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 215.791B to 161.538B (-25.141%) and median wall
time fell from 33.40s to 24.66s (-26.168%).
Assisted-by: Codex
Commit: 40d4395bb229bd827108bfae196bc79f6c340695
https://github.com/llvm/llvm-project/commit/40d4395bb229bd827108bfae196bc79f6c340695
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Conversion/ComplexCommon/DivisionConverter.h
M mlir/include/mlir/Dialect/Affine/Analysis/AffineAnalysis.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/Arith/IR/Arith.h
A mlir/include/mlir/Dialect/Arith/IR/ArithAttributes.h
A mlir/include/mlir/Dialect/Arith/IR/ArithDialect.h
A mlir/include/mlir/Dialect/Arith/IR/ArithOpInterfaces.h
M mlir/include/mlir/Dialect/Complex/IR/Complex.h
M mlir/include/mlir/Dialect/GPU/Utils/DistributionUtils.h
M mlir/include/mlir/Dialect/Math/IR/Math.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsReduction.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACCMPCommon/Interfaces/AtomicInterfaces.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h
M mlir/lib/CAPI/Dialect/Arith.cpp
M mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitCPass.cpp
M mlir/lib/Conversion/ComplexCommon/DivisionConverter.cpp
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/TosaToArith/TosaToArithPass.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
M mlir/test/lib/Transforms/TestTransformsOps.cpp
M mlir/unittests/Interfaces/InferTypeOpInterfaceTest.cpp
Log Message:
-----------
[mlir][Arith] Split dialect and support declarations to improve build time (NFC) (#222784)
Expose the Arith dialect, attributes, and interfaces without importing
generated operation classes. This lets registration and support-only
users avoid parsing the operation umbrella and its dependencies.
Across three controlled serial rebuilds of five dialect-only TUs, median
instructions fell from 49.429B to 39.665B (-19.755%) and wall time fell
from 7.40s to 5.85s (-20.946%). Across three -j16 rebuilds of 97 support
users, instructions fell from 1,686.265B to 1,531.867B (-9.156%) and
wall time fell from 29.17s to 28.07s (-3.771%).
Assisted-by: Codex
Commit: cdc2b9445ae4f2c2f9ba19cba2cf249d1fbd2faa
https://github.com/llvm/llvm-project/commit/cdc2b9445ae4f2c2f9ba19cba2cf249d1fbd2faa
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_file_macros.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/sys-file-macros.h
A libc/include/llvm-libc-macros/sys-file-macros.h
A libc/include/sys/file.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/flock.h
M libc/src/sys/CMakeLists.txt
A libc/src/sys/file/CMakeLists.txt
A libc/src/sys/file/flock.h
A libc/src/sys/file/linux/CMakeLists.txt
A libc/src/sys/file/linux/flock.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/file/CMakeLists.txt
A libc/test/src/sys/file/linux/CMakeLists.txt
A libc/test/src/sys/file/linux/flock_test.cpp
Log Message:
-----------
[libc] Add sys/file.h and flock function. (#222737)
`flock` is a BSD function that manages advisory locks on opened files
(see https://man7.org/linux/man-pages/man2/flock.2.html)
It has enough differences from `fcntl`-based locking mechanism, and is
provided and used on Linux platforms.
* Add `<sys/file.h>` public header on Linux platforms with `flock`
declaration
and proper macro used for `op` function argument.
* Provide a Linux implementation, which is a simple syscall wrapper
around
`SYS_flock` syscall.
Assisted by: automated tooling, human-reviewed
Commit: 1e9bc138d8f3b097dd8bd343f8b325f7e1830796
https://github.com/llvm/llvm-project/commit/1e9bc138d8f3b097dd8bd343f8b325f7e1830796
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
Log Message:
-----------
[mlir][Tosa] Optimize compliance initialization for size to improve build time (NFC) (#222791)
The compliance-map constructor includes a 4,920-line generated
initializer. Mark it minsize because it runs only when creating the
validation pass and optimizing this single large function at -O3 is
expensive.
LLVM pass timing attributes most of the saving to code generation.
Greedy register allocation fell from 7.070s to 1.348s as global
live-range splitting fell from 6.403s to 0.021s after the constructor
became 47.6% smaller.
Across five controlled rebuilds of the affected TU, median instructions
fell from 205.087B to 66.157B (-67.742%) and median wall time fell from
19.83s to 7.95s (-59.909%).
Assisted-by: Codex
Commit: 65b48e45ea94568ced6d1c5d93d58f55d9e2da62
https://github.com/llvm/llvm-project/commit/65b48e45ea94568ced6d1c5d93d58f55d9e2da62
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/Affine/IR/AffineDialect.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/lib/CAPI/Dialect/Affine.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/lib/Dialect/Linalg/Transforms/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Analysis/DataFlow/TestIntegerDivisibilityAnalysis.cpp
M mlir/test/lib/Dialect/Affine/TestLoopMapping.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgDecomposeOps.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgElementwiseFusion.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgFusionTransforms.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgRankReduceContractionOps.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
M mlir/test/lib/Dialect/Linalg/TestPadFusion.cpp
M mlir/test/lib/Dialect/MemRef/TestComposeSubView.cpp
M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
M mlir/test/lib/Dialect/MemRef/TestMultiBuffer.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
Log Message:
-----------
[mlir][Affine] Split out the dialect declaration to improve build time (NFC) (#222766)
Move AffineDialect to a self-contained declaration header and narrow 23
callers that only register or reference the dialect class.
Median instructions fell from 700.601B to 681.315B (-2.753%) and wall
time from 107.36s to 104.17s (-2.971%).
Assisted-by: Codex
Commit: d9fd8ceac7a8577160a4d2ea7ff3af0acd778253
https://github.com/llvm/llvm-project/commit/d9fd8ceac7a8577160a4d2ea7ff3af0acd778253
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
A mlir/include/mlir/Dialect/Linalg/IR/LinalgDialect.h
M mlir/lib/Conversion/TensorToLinalg/TensorToLinalgPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Tensor/TestTensorTransforms.cpp
Log Message:
-----------
[mlir][Linalg] Split the dialect declaration to improve build time (NFC) (#222795)
Introduce a self-contained dialect declaration and use it in five
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 130.162B to 114.154B (-12.298%) and median wall
time fell from 20.30s to 17.85s (-12.069%).
Assisted-by: Codex
Commit: a34fddf44eca79cbbb7c04477bd9ed0825027fbc
https://github.com/llvm/llvm-project/commit/a34fddf44eca79cbbb7c04477bd9ed0825027fbc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
A mlir/include/mlir/Dialect/LLVMIR/ROCDLDialectDecl.h
M mlir/lib/CAPI/Dialect/ROCDL.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
Log Message:
-----------
[mlir][ROCDL] Split the dialect declaration to improve build time (NFC) (#222794)
Introduce a self-contained dialect declaration and use it in three
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 129.372B to 111.587B (-13.748%) and median wall
time fell from 20.62s to 17.72s (-14.064%).
Assisted-by: Codex
Commit: b89aa045ae06fa0d7729ee9883ff60503d11747f
https://github.com/llvm/llvm-project/commit/b89aa045ae06fa0d7729ee9883ff60503d11747f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h
A mlir/include/mlir/Dialect/GPU/IR/GPUDialectDecl.h
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
Log Message:
-----------
[mlir][GPU] Split the dialect declaration to improve build time (NFC) (#222798)
Introduce a self-contained dialect declaration and use it in two
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 82.473B to 75.865B (-8.012%) and median wall time
fell from 12.51s to 11.34s (-9.353%).
Assisted-by: Codex
Commit: b570e2aa0aa41694d7f53988948259f39258b529
https://github.com/llvm/llvm-project/commit/b570e2aa0aa41694d7f53988948259f39258b529
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A mlir/include/mlir/Dialect/Vector/IR/VectorDialect.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/lib/CAPI/Dialect/Vector.cpp
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Dialect/Affine/TransformOps/AffineTransformOps.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/lib/Dialect/MemRef/Transforms/EmulateWideInt.cpp
M mlir/test/lib/Conversion/VectorToSPIRV/TestVectorReductionToSPIRVDotProd.cpp
M mlir/test/lib/Dialect/Arith/TestEmulateWideInt.cpp
M mlir/test/lib/Dialect/Math/TestAlgebraicSimplification.cpp
M mlir/test/lib/Dialect/Math/TestPolynomialApproximation.cpp
Log Message:
-----------
[mlir][Vector] Split the dialect declaration to improve build time (NFC) (#222799)
Introduce a self-contained dialect declaration and use it in ten
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 209.277B to 192.946B (-7.804%) and median wall
time fell from 31.94s to 29.26s (-8.391%).
Assisted-by: Codex
Commit: 3d847b85849d88b65156fd7c252df81b322ccaf1
https://github.com/llvm/llvm-project/commit/3d847b85849d88b65156fd7c252df81b322ccaf1
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-09-09.md
Log Message:
-----------
[flang] Add notes for Sept. 9 Flang Community Call (#222436)
Co-authored-by: Eugene Epshteyn <eepshteyn at nvidia.com>
Commit: a1e8420613f12c770ad37cf72cd180f59dedc5fa
https://github.com/llvm/llvm-project/commit/a1e8420613f12c770ad37cf72cd180f59dedc5fa
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes f1706d3 (#222779)
This fixes f1706d38f8271adfc5105ddf9b2dcc1573ebfa85 (#222744).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=f1706d38f8271adfc5105ddf9b2dcc1573ebfa85
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5d1b4094534c7a7c041882380603ee0927e27082
https://github.com/llvm/llvm-project/commit/5d1b4094534c7a7c041882380603ee0927e27082
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
A mlir/include/mlir/Dialect/MemRef/IR/MemRefDialect.h
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitCPass.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp
M mlir/test/lib/Dialect/Affine/TestReifyValueBounds.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/test/lib/Dialect/OpenACC/TestOpenACCSupport.cpp
M mlir/test/lib/Dialect/OpenACC/TestPointerLikeTypeInterface.cpp
M mlir/test/lib/Dialect/OpenACC/TestRecipePopulate.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTilingTest.cpp
Log Message:
-----------
[mlir][MemRef] Split the dialect declaration to improve build time (NFC) (#222801)
Introduce a self-contained dialect declaration and use it in thirteen
consumers that need registration but not the generated operation
umbrella.
Across three controlled rebuilds of the affected TUs, median
instructions fell from 296.237B to 278.383B (-6.027%) and median wall
time fell from 47.57s to 44.50s (-6.454%).
Assisted-by: Codex
Commit: a1cd84100bd0bd70f5b6b0c30826844aa1813350
https://github.com/llvm/llvm-project/commit/a1cd84100bd0bd70f5b6b0c30826844aa1813350
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/CodeGen/QualTypeMapper.h
M clang/unittests/CodeGen/CMakeLists.txt
A clang/unittests/CodeGen/QualTypeMapperTest.cpp
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/unittests/ABI/CMakeLists.txt
A llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/utils/gn/secondary/clang/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
Log Message:
-----------
[LLVMABI] Add support for SVE types in the LLVM ABI library (#221375)
This change extends the LLVM ABI library's VectorType to be able to
describe SVE types and updates Clang's QualTypeMapper to map them.
The AArch64 target info class in the ABI library is still a work in
progress. It will continue to report "not yet implemented" for function
signatures involving SVE types. This change is a neceasary prerequisite
for correctly handling them or correctly deferring handling of these
specific types.
Assisted-by: Cursor / claude-opus-5
Commit: 8c05a1167dd2f00cfa64966cb1572a6d97178c8b
https://github.com/llvm/llvm-project/commit/8c05a1167dd2f00cfa64966cb1572a6d97178c8b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/MLIRContext.cpp
Log Message:
-----------
[mlir] Outline registered operation-model allocation (NFC) (#222803)
Allocate operation-model storage through an out-of-line helper so every
registration TU does not instantiate the allocation machinery.
Across three controlled -j16 rebuilds of 44 registration TUs, median
instructions fell from 2.284T to 2.202T (-3.594%) and median wall time
fell from 40.44s to 38.54s (-4.698%).
Assisted-by: Codex
Commit: ec5a61a1454082773a9071c8a9db0472306a2517
https://github.com/llvm/llvm-project/commit/ec5a61a1454082773a9071c8a9db0472306a2517
Author: Dave MacLachlan <dmaclach at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/Options.td
M lld/docs/MachO/ld64-vs-lld.md
M lld/docs/ReleaseNotes.md
A lld/test/MachO/warn-missing-subsections-via-symbols.s
Log Message:
-----------
[lld][MachO] Add `--warn-missing-subsections-via-symbols` flag (#221464)
This change introduces:
* `--warn-missing-subsections-via-symbols`: Warns when an input object
file with non-empty sections is missing `MH_SUBSECTIONS_VIA_SYMBOLS`.
* `--no-warn-missing-subsections-via-symbols`: Disables the warning
(default).
Also adds documentation and lit tests.
Object files missing `MH_SUBSECTIONS_VIA_SYMBOLS` can prevent
dead-stripping and subsection splitting.
We have seen a number of cases where we are compiling assembly, and this
allows us to track them down.
Commit: 6959b7d081df5fb2349e67e0d8e8e87841fa10d9
https://github.com/llvm/llvm-project/commit/6959b7d081df5fb2349e67e0d8e8e87841fa10d9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OpDefinition.h
Log Message:
-----------
[mlir] Use pointers for static operation hooks to improve build time (NFC) (#222804)
Return raw function pointers from static operation-hook accessors to
avoid instantiating unique-function construction machinery for every
operation.
Across three controlled -j16 rebuilds of 44 registration TUs, median
instructions fell from 2.284T to 2.201T (-3.646%) and median wall time
fell from 41.04s to 38.80s (-5.458%).
Assisted-by: Codex
Commit: c027b3cff0d1cd1a9e30f72e7eba8a1cb8954a75
https://github.com/llvm/llvm-project/commit/c027b3cff0d1cd1a9e30f72e7eba8a1cb8954a75
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Error.h
Log Message:
-----------
[orc-rt] Fix typo in file header. (#222636)
Commit: 9ac5a0ffb64f80e6f5aecf430b9e62c2a300942c
https://github.com/llvm/llvm-project/commit/9ac5a0ffb64f80e6f5aecf430b9e62c2a300942c
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-attach.mlir
Log Message:
-----------
[flang][acc] Update descriptor attach rules to only pointer/allocatable (#222760)
When a clause maps only a descriptor's data, ACCMapInfoPrep should infer
an attach point and name the descriptor only for POINTER and
ALLOCATABLE, which OpenACC requires to be maintained on the device. See
flang/docs/OpenACC-descriptor-management.md.
Commit: ce0642ef834c89775fad321bdc0601163885ff1d
https://github.com/llvm/llvm-project/commit/ce0642ef834c89775fad321bdc0601163885ff1d
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fixes MLIR dialect Bazel dependencies from commit 5d1b4094534c etc (#222812)
Added missing deps.
Fixes current bazel failures in @llvm-project//flang/unittests:all
Commit: 5ce6d3a2423ef046b5d1d5e9ec699dd9fe7af377
https://github.com/llvm/llvm-project/commit/5ce6d3a2423ef046b5d1d5e9ec699dd9fe7af377
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
A lldb/test/API/functionalities/gdb_remote_client/TestBreakpointNotHit.py
M lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManyBreakpoints.py
Log Message:
-----------
[lldb][Darwin] Don't mark threads as having hit bp if not (#222488)
When a multithreaded program stops exeuction with a mach exception on
more than one thread, if one of the threads is *at* a breakpoint site,
but hasn't *hit* the breakpoint yet, lldb was incorrectly stepping over
the breakpoint instruction when it resumed execution. This would result
in TestConcurrentManyBreakpoints reporting that a breakpoint hit on 100
threads was only hit 99 times, because one of the breakpoints was
silently stepped past without being counted.
The bug happened because on Darwin/debugserver systems the stop info
packet includes a `jstopinfo` which is a JSON dictionary of all threads
that have an exception. When `jstopinfo` is present, ProcessGDBRemote
was initializing any thread not included in `jstopinfo` as having an
empty StopInfo. It did this without checking if we are _at_ a breakpoint
site, and marking the thread as "Stopped at unexecuted breakpoint
instruction". Because the threads now had an empty StopInfo already, the
other places where we might check "if stopped at unexecuted breakpoint
instruction" were never executed.
I created a gdb_remote_client API test with a synthetic test case where
four threads stop at a breakpoint; three of them have hit the
breakpoint, one has not. And confirm that lldb only registers 3
breakpoint hits initially, and then the 4th as we resume. Debugging the
"99 breakpoints hit instead of 100" failures was tricky and involved
running the test in a loop on a heavily loaded machine to get the
necessary timing, and it was easy to give up, so I wanted a much simpler
synthetic case to show the problem if we might regress.
rdar://180565704
Commit: b8007a8e4020b8bca2b12e941660e10bf5bf6716
https://github.com/llvm/llvm-project/commit/b8007a8e4020b8bca2b12e941660e10bf5bf6716
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A lld/test/MachO/arm64-x1.s
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TextAPI/Architecture.def
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
A llvm/test/tools/llvm-readobj/macho-arm64e_x1.test
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-readobj/MachODumper.cpp
M llvm/unittests/BinaryFormat/MachOTest.cpp
Log Message:
-----------
[ld64.lld, llvm-otool] Minimal arm64e.x1 support (#222721)
Just enough for `llvm-otool -hv` to dump the cpusubtype, and for
ld64.lld to not reject .tbd files that have an arm64e.x1 slice.
This is needed to link mac binaries against the macOS 27 SDK.
Commit: 5ced7fcfdb22dc6ec31d021d4b64242e7e35a397
https://github.com/llvm/llvm-project/commit/5ced7fcfdb22dc6ec31d021d4b64242e7e35a397
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
Fix bazel build for clang/unittests:codegen_tests (#222817)
Fixes https://github.com/llvm/llvm-project/pull/221375 (commit
a1cd84100bd0) by exporting QualTypeMapper.h and adding missing
dependencies.
Commit: f896082fb9ea598c548bcb63515da7b23ff40f6d
https://github.com/llvm/llvm-project/commit/f896082fb9ea598c548bcb63515da7b23ff40f6d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__configuration/compiler.h
M libcxx/include/__memory/allocator.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_temporary_buffer.h
A libcxx/include/__new/allocate.h
M libcxx/include/__utility/small_buffer.h
M libcxx/include/module.modulemap.in
M libcxx/include/new
M libcxx/src/include/aligned_alloc.h
A libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.capacity/max_size.pass.cpp
M libcxx/test/std/language.support/support.dynamic/hardware_inference_size.compile.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cons/size.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/pointer_destruction.pass.cpp
Log Message:
-----------
Revert "[libc++] Remove __libcpp_allocate" (#222814)
Reverts llvm/llvm-project#220981
This is breaking premerge. See comments on the original PR.
Commit: 4def46cc3fd51bee21f4a167a99a79c9f6bb66ba
https://github.com/llvm/llvm-project/commit/4def46cc3fd51bee21f4a167a99a79c9f6bb66ba
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/convert-fold.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
Log Message:
-----------
[flang] Fold fir.convert of an integer constant between integer types (#222188)
`fir::ConvertOp::fold` doesn't handle an integer constant converted to
another integer type. `ForwardConstantConvertPattern` covers the
neighboring case where the result is `index`, so `fir.convert %c10_i32 :
(i32) -> index` already canonicalizes to an index constant while
`fir.convert %c1_i32 : (i32) -> i64` does not. This PR adds the
integer-to-integer case.
The width change follows the rules codegen applies to a non-constant
operand (`CodeGen.cpp`'s integer-to-integer conversion): narrowing
truncates, widening zero-extends an i1 or unsigned source and
sign-extends anything else. The result must be signless because the
constant materialises as an `arith.constant`, which only accepts
signless integers.
It composes with `arith::IndexCastOp::fold`, so a value widened then
cast to `index` collapses to one index constant, and it lets other
patterns see through the constant: with a literal shift,
`simplify-hlfir-intrinsics` can now fold away `hlfir.eoshift`'s
shift-direction arithmetic.
`getIntIfConstant` only matches `arith` and `llvm` constants, which are
signless, so `isUnsignedInteger()` is never true today, but I still kept
the unsigned case anyway so that the fold cannot disagree with codegen.
Commit: c9e8899e31dba827a9c738252de1762f3b6fd3df
https://github.com/llvm/llvm-project/commit/c9e8899e31dba827a9c738252de1762f3b6fd3df
Author: wanglei <wanglei at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
Log Message:
-----------
[LoongArch] Generate more PCRel relocations for resolvable sub-symbols
Use PC-relative relocations when the sub-symbol offset can be resolved
during assembly, avoiding ADD/SUB relocation pairs.
Fixes #210052
Reviewers: SixWeining, MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/211754
Commit: e152f54b8417c5db0550b463653145f758de40d0
https://github.com/llvm/llvm-project/commit/e152f54b8417c5db0550b463653145f758de40d0
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port f896082fb9ea (#222824)
Commit: 07d67299a15ce03b053736e2d31a668ee0576987
https://github.com/llvm/llvm-project/commit/07d67299a15ce03b053736e2d31a668ee0576987
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/test/CodeGen/Mips/mips1-not-support-ldc1-sdc1.ll
Log Message:
-----------
[Mips] Fix buildbot failure of MIPS I double store using SWC1 (#221912)
Expand ExtractElementF64_FPR to FMOV_S instead of MFC1 to avoid
incorrect integer store.
Fix x86_64-expensive-checks compile error as for pr
https://github.com/llvm/llvm-project/pull/209362.
Fix #62190.
Commit: 7c3849ae3bc162f383c54e38b1ed32b733a31bd8
https://github.com/llvm/llvm-project/commit/7c3849ae3bc162f383c54e38b1ed32b733a31bd8
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250-load-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950-read-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w32.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w64.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN global/DS load builtins (#220611)
Adds codegen support for AMDGCN global and DS load/read builtins with
transpose variants. These builtins are lowered to their corresponding
`llvm.amdgcn.*` intrinsics.
Commit: fd7eac5f532128a245bcfa67aa251af784395701
https://github.com/llvm/llvm-project/commit/fd7eac5f532128a245bcfa67aa251af784395701
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lld/ELF/Arch/AMDGPU.cpp
Log Message:
-----------
[AMDGPU][lld] Remove "using namespace llvm" from AMDGPU.cpp (#222818)
AMDGPU class in anonymous namespace collides with llvm::AMDGPU, causing
an error with MSVC.
Commit: 95267015df795c02d829b3545610a5f5e95609e8
https://github.com/llvm/llvm-project/commit/95267015df795c02d829b3545610a5f5e95609e8
Author: Jian Li <hellothedreamer at 126.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/get-named-operand-idx.td
Log Message:
-----------
[RISCV][GlobalISel] Add G_CLMULH support (#221686)
Add G_CLMULH to represent the high half of a carry-less multiplication
in generic Machine IR.
Translate llvm.riscv.clmulh to G_CLMULH and mark it legal for native
XLEN scalar types when Zbkc is available. Reuse the existing
SelectionDAG pattern to select the RISC-V CLMULH instruction.
Commit: 821ff7cd6803d719515c2ae9ada665c4bc3c4c35
https://github.com/llvm/llvm-project/commit/821ff7cd6803d719515c2ae9ada665c4bc3c4c35
Author: Rohit Garg <rohgarg at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/confused-dependence-subnest.ll
A llvm/test/Transforms/LoopInterchange/dependency-matrix-padding.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
A llvm/test/Transforms/LoopInterchange/missed-outer-prefix-subnest.ll
A llvm/test/Transforms/LoopInterchange/no-partially-perfect-subnest.ll
M llvm/test/Transforms/LoopInterchange/partially-perfect-loop.ll
A llvm/test/Transforms/LoopInterchange/preserve-sibling-order.ll
Log Message:
-----------
[LoopInterchange] Supported partially-perfect Loop Nests (#199511)
In the current implementation when the outermost loop contains sibling
sub-loops (i.e. multiple independent loop nests at the same depth), the
pass silently skips the entire loop nest without attempting to
interchange any of the valid sub-nests (See Below Example).
Example:
```
for(int i=0; i<n; i++){ // Loop 1
for(int j=0; j<m; j++){ // Loop 2
for(int r=0; r<m; r++){ // Loop 3
// Do something
}
}
for(int k=0; k<p; k++){ // Loop 4
for(int l=0; l<p; l++){ // Loop 5
//Access A[l][k]
}
}
}
```
In the Example , GCC 16 performs loop interchange on (Loop2, Loop3) or
(Loop4, Loop5), provided the interchange is both legal and profitable.
Fixes: https://github.com/llvm/llvm-project/issues/196006
Commit: 5f00f13eba2ededa5da62e0dd80b6d1f0c72ca84
https://github.com/llvm/llvm-project/commit/5f00f13eba2ededa5da62e0dd80b6d1f0c72ca84
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/Support/KnownFPClassTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[KnownFPClass] Refactor direct access to KnownFPClasses [NFC] (#220315)
Part of https://github.com/llvm/llvm-project/issues/217072
Follow up to https://github.com/llvm/llvm-project/pull/218514
Replaces direct uses of the `KnownFPClasses` field with getters/setters.
Commit: 426706131e7300fe67f4dac5ccc744548605f394
https://github.com/llvm/llvm-project/commit/426706131e7300fe67f4dac5ccc744548605f394
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine-analysis-invalidation.ll
Log Message:
-----------
[AMDGPU] Invalidate uniformity info after intrinsic combine (#222357)
The uniform intrinsic combine pass changed IR while preserving
uniformity information. Its result keeps references to cycle
information. Those references could be invalidated and later accessed
by another pass.
Invalidate uniformity information after a change. Before erasing an
instruction, remove it from the analysis state used by the pass. Also
report each erasure as a change so invalidation always runs.
Commit: db70744d03adbc9e76f08a66c003b6b362df888d
https://github.com/llvm/llvm-project/commit/db70744d03adbc9e76f08a66c003b6b362df888d
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvp-mul-parts-acc-fold.ll
Log Message:
-----------
[RISCV][P-ext] Fold an add of a multiply-parts product into the accumulate form (#222748)
An add of a multiply-parts product selects the accumulating instruction, so
that a loop written with `sum += __riscv_mul_h00_i32(a, b)` gets `macc.h00`
rather than a separate multiply and add.
Rewriting the add before type legalization keeps the shapes whose result is
illegal, so the existing accumulate lowering covers all of them.
Commit: 980c9bbdd3ddda88da6b8b63261c8d514c5d4306
https://github.com/llvm/llvm-project/commit/980c9bbdd3ddda88da6b8b63261c8d514c5d4306
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/features-info.ll
Log Message:
-----------
[RISCV] Remove VeyronV1 processor definition (#220623)
Processor no longer exists.
Commit: a929f4af3904d5089a7855b5f82cf019df6afd69
https://github.com/llvm/llvm-project/commit/a929f4af3904d5089a7855b5f82cf019df6afd69
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Utils/OpenMP.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/default-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/implicit-default-mapper-allocatable-field.f90
M flang/test/Lower/OpenMP/implicit-mapper-no-pointer-map.f90
R flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
R flang/test/Transforms/omp-map-info-finalization-usm.fir
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-host-ref-semantics.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-overlapping-record-member-map.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
A offload/test/offloading/fortran/implicit-map-allocatable-field.f90
Log Message:
-----------
[Flang][OpenMP] Remove target implicit allocatable member mapping from MapInfoFinalization and extend lowering to support it (#219434)
This PR aims to remove the partially implemented implicit allocatable
member mapping code from MapInfoFinalization, and move it to the
lowering.
The MapInfoFinalization code should no longer be required as the
DeclareMapper infrastructure in the frontend is capable of handling
these cases now and already does so for the majority of them, so we are
better consolidating the implementation to one location and extending it
to support more cases.
This PR removes the old code from MapInfoFinalization, and enables the
default declare mapper generation that handles most other implicit
mapping cases for derived types in the initial lowering to handle the
previously supported cases and more.
The implicit default declare mapper generation has been modified to only
map the necessary bits of a derived type, which are record types (to
hold any nested mappers and to make sure we map all non-allocatable
bits, including descriptors) and the data for any allocatable bits
(specifically just the ref_ptee and then an attach emission).
Commit: be09c15fa047178ff4818192ea97ba3a3d8254a0
https://github.com/llvm/llvm-project/commit/be09c15fa047178ff4818192ea97ba3a3d8254a0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Compiler.h
Log Message:
-----------
[orc-rt] Add a maybe-unused attribute macro. (#222834)
This will be used in upcoming commits to suppress unused function
warnings.
Commit: 2a0177189f4be62eb51ddca3fd4b8836c538dc12
https://github.com/llvm/llvm-project/commit/2a0177189f4be62eb51ddca3fd4b8836c538dc12
Author: hev <wangrui at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for memory barrier optimization (#218596)
Commit: c9a1fc8d1deee527a3ff43592ed4e0e5b81d7fca
https://github.com/llvm/llvm-project/commit/c9a1fc8d1deee527a3ff43592ed4e0e5b81d7fca
Author: hev <wangrui at loongson.cn>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
Log Message:
-----------
[LoongArch] Add memory barrier optimization pass (#218597)
Add a machine-level pass to remove redundant DBARs and merge them with
atomic memory operations. The pass uses machine dominator and
post-dominator trees to ensure the transformation is safe across basic
blocks.
Commit: 13d63aa55eb7d8877fb3243e7f050b590e569d96
https://github.com/llvm/llvm-project/commit/13d63aa55eb7d8877fb3243e7f050b590e569d96
Author: Jeff Trull <edaskel at att.net>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Make the value of a true bool enum 1, not -1 (#221497)
When converted to int a bool value is either `0` or `1`, but the `enum_value`
of a bool enum was reported as either `0` or `-1` in the Python bindings.
Make bool enums take the unsigned value code path so that `0` or `+1` is
returned instead.
Resolves #221326
Commit: 816b4c13bd851e6df4416c0d41e6735760ca72df
https://github.com/llvm/llvm-project/commit/816b4c13bd851e6df4416c0d41e6735760ca72df
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable block16 conversions on gfx1250-strict (#222597)
Commit: 06a26f2ff3a2c5464a5dca8cf42314bae5e635cc
https://github.com/llvm/llvm-project/commit/06a26f2ff3a2c5464a5dca8cf42314bae5e635cc
Author: John Hui <j-hui at apple.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/swift-attr-redeclaration.cpp
M clang/test/APINotes/swift-import-as.cpp
Log Message:
-----------
[clang][APINotes] Apply API notes 'swift_attr's idempotently (#222526)
Commit: 79775da1838e64b0a6c294ff25483484841910a1
https://github.com/llvm/llvm-project/commit/79775da1838e64b0a6c294ff25483484841910a1
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Add vputils::reconstructSSA (#212209)
Adds a simple implementation of the algorithm described in "Simple and
Efficient SSA Construction" by Braun et al.
https://www.researchgate.net/publication/236997796_Simple_and_Efficient_Construction_of_Static_Single_Assignment_Form
This can be used to reconstruct SSA form whenever the control flow graph
is changed, which #201784 plans to use to model predicated early exiting
conditions.
Added three unit tests for now which should exercise all the code paths,
including what happens when there's a cycle.
Commit: faa60cf51f1eeef568a7a111b3174375122617aa
https://github.com/llvm/llvm-project/commit/faa60cf51f1eeef568a7a111b3174375122617aa
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/Session.cpp
M orc-rt/lib/support/Error.cpp
M orc-rt/lib/support/Logging.cpp
M orc-rt/lib/support/Logging_oslog.cpp
M orc-rt/lib/support/Logging_printf.cpp
Log Message:
-----------
[orc-rt] Wrap C API implementation in `extern "C" {..}` blocks (#222846)
Adopt a consistent style for C API implementation: A banner comment and
an `extern "C" { ... }` block around the definitions.
Commit: e94a0b2a4971c381cc6f72309d1dea5350780099
https://github.com/llvm/llvm-project/commit/e94a0b2a4971c381cc6f72309d1dea5350780099
Author: shivaramaarao <58245296+shivaramaarao at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
[flang] Add driver support for x86 -m[option] target feature flags (#220159)
Added FlangOption visibility to m_x86_Features_Group so flags such as
-mavx, -mavx2, and -mavx512f are accepted by flang and forwarded as
-target-feature to -fc1 via the shared Clang driver logic.
Also extended target-cpu-features.f90 with grouped driver tests that
cover m_x86_Features_Group options, including representative -mno-*, APX
cases
Assisted by : Cursor (testcase generation)
Commit: 75ca063b3b303e499a798ef84d04d32fb96d44c8
https://github.com/llvm/llvm-project/commit/75ca063b3b303e499a798ef84d04d32fb96d44c8
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
Log Message:
-----------
[AMDGPU][GIsel][NPM] Port AMDGPUPostLegalizerCombiner to NPM (#216274)
Porting `AMDGPUPostLegalizerCombiner` to work with the New PassManager
to support GISel.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 4735d351182f874d61690f6fc2d2e3b154914ad5
https://github.com/llvm/llvm-project/commit/4735d351182f874d61690f6fc2d2e3b154914ad5
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaCUDA.cpp
M clang/test/SemaCUDA/global-initializers.cu
Log Message:
-----------
[CUDA/HIP] Fix errors for device function used in host global initializers (#222338)
The existing checker was simply looking for a call or `CXXConstructExpr`
which would miss a call to device function in case an implicit cast was
in place or if a call was a part of an expression. Use a visitor to
improve the situation.
Commit: c1b661fde124399f0484c4b39501b37613cc4757
https://github.com/llvm/llvm-project/commit/c1b661fde124399f0484c4b39501b37613cc4757
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
Log Message:
-----------
[clang][SVE][nfc] Remove spurious compare instruction (#222652)
When lowering `sve_svdup_n_bN` SVE builtins, the compare Op is not
required. In fact, that compare Op is removed by subsequent
optimisations, as evident in the tests.
Instead of relying on the middle-end to clean it up, improve the
front-end code-gen by not generating that spurious Op at all.
Commit: 68f9d8d45cad616e223ffe460404edd86dd972ca
https://github.com/llvm/llvm-project/commit/68f9d8d45cad616e223ffe460404edd86dd972ca
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Token.cpp
M mlir/lib/AsmParser/Token.h
M mlir/test/Dialect/Builtin/Bytecode/attrs.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed_0.mlirbc
M mlir/test/IR/custom-float-attr-roundtrip.mlir
M mlir/test/IR/parser.mlir
Log Message:
-----------
[MLIR][Parser] Fix precision loss when parsing f80 and f128 literals (#220267)
While analyzing this CIR issue
[216422](https://github.com/llvm/llvm-project/issues/216422), I traced
the issue to the MLIR asm parser.
For the following case:
```
%0 = arith.constant 1.0E+309 : f80
```
using `mlir-opt repro.mlir`
we get (infinity):
```
module {
%cst = arith.constant 0x7FFF8000000000000000 : f80
}
```
instead of
```
module {
%cst = arith.constant 9.99999999999999999986E+308 : f80
}
```
Currently the parser casts floats to a double before converting to the
requested semantics, as noted in the
[comments](https://github.com/llvm/llvm-project/blob/bb3b509138f4a34cb3d5c659955ccc16745ae82e/mlir/lib/AsmParser/AsmParserImpl.h#L286).
Not entirely sure why this was the default, anyway this patch instead
parses the float with the given semantics directly, so we don't lose
precision.
I used Claude to generate tests and reproducers for this patch. I've
also updated a few existing lit tests to show the improved precision
this patch introduces.
**Note:** This fixes the CIR issue I mentioned above.
Commit: 7ba3ce428af7f6e7f1e642dba128c2afc13dba90
https://github.com/llvm/llvm-project/commit/7ba3ce428af7f6e7f1e642dba128c2afc13dba90
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/Bufferization.h
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationDialect.h
M mlir/lib/CAPI/Dialect/Bufferization.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
Log Message:
-----------
[mlir][Bufferization] Split the dialect declaration (NFC) (#222859)
Introduce a self-contained dialect declaration and use it in four
consumers that do not need the generated operation umbrella.
Across three controlled serial rebuilds of the affected TUs, median
instructions fell from 97.470B to 94.887B (-2.650%) and median wall time
fell from 15.20s to 14.70s (-3.289%). Three -j16 runs confirmed a 2.623%
reduction in instructions, with wall time improving 0.722% on the
parallel critical path.
Assisted-by: Codex
Commit: 7544b08a04ce084bf34bd3f4f1e8fb6f4d3aa2e4
https://github.com/llvm/llvm-project/commit/7544b08a04ce084bf34bd3f4f1e8fb6f4d3aa2e4
Author: Teja Alaghari <teja.alaghari at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
A llvm/test/DebugInfo/MIR/InstrRef/expr-operand-count-mismatch.mir
Log Message:
-----------
[LiveDebugValues] Do not join debug values whose operand counts disagree (#221929)
Currently, `DbgValueProperties::isJoinable()` decides whether two values
could be joined by comparing their `DIExpressions` only. That was safe
when location-operand count was taken from the expression. In
instruction-referencing `LiveDebugValues`, `NumLocOps` is taken from the
`MachineInstr` (`getNumDebugOperands()`), so two values can share an
expression and still differ in operand count.
Joining pairs location operands by index. When the counts disagreed,
`pickVPHILoc` indexed past the shorter list and hit `assert(Index <
OpCount)` in `DbgValue::getDbgOpID`.
This change makes `isJoinable()` return `false` unless `NumLocOps`
**also agrees**.
Commit: fa1d3e300559d69678a66b2ddb45eb127a1b8407
https://github.com/llvm/llvm-project/commit/fa1d3e300559d69678a66b2ddb45eb127a1b8407
Author: nishant-sachdeva-amd <nishant.sachdeva at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
Log Message:
-----------
[X86][NFC] Share isDispOrCDisp8 between the encoder and CompressEVEX (#222591)
The disp8 / compressed-disp8*N size rule was written twice: as a static
helper in X86MCCodeEmitter.cpp and re-inlined in the CompressEVEX size
veto (hasShorterEVEXViaCDisp8), kept in sync only by a comment. Hoist it
into X86II::isDispOrCDisp8 in X86BaseInfo.h (ImmOffset now optional) and
call it from both, so the size model cannot drift from what the encoder
emits. No functional change.
Addresses https://github.com/llvm/llvm-project/issues/206963
Changes made here use AI model inputs
---------
Co-authored-by: Simon Pilgrim <git at redking.me.uk>
Commit: 02dc8a35a9d074613f0a262dbec00afeb9963345
https://github.com/llvm/llvm-project/commit/02dc8a35a9d074613f0a262dbec00afeb9963345
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
A mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialectDecl.h
M mlir/lib/RegisterAllDialects.cpp
Log Message:
-----------
[mlir][AMDGPU] Split the dialect declaration (NFC) (#222861)
Introduce a self-contained dialect declaration so RegisterAllDialects
does not need the generated AMDGPU operation umbrella.
Across five controlled rebuilds of the affected TU, median instructions
fell from 71.757B to 70.331B (-1.987%) and median wall time fell from
11.01s to 10.77s (-2.180%).
Assisted-by: Codex
Commit: f1bf3f217c8c006112a876cee61fe04f92f221ca
https://github.com/llvm/llvm-project/commit/f1bf3f217c8c006112a876cee61fe04f92f221ca
Author: Alexey Moksyakov <moksyakov.alexey at huawei.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/materialize-constant.s
Log Message:
-----------
[bolt] Simplify rodata/literal load for X86_64 & AArch64 (#179474)
This patch fixed the issue related to load literal for AArch64, where
constant island move to the end of a function (emitCI), available
address range for ldr instruction is limited +/- 1MB, and can be out of
range. For AArch64 the available data sizes are 4, 8 bytes. For X86_64
this patch materializes the constants with sizes 2, 4 and 8 bytes.
Note: SimplifyRODataLoads is turn off for non-relocation binary
Co-authored-by: yavtuk <yavtuk at ya.ru>
Commit: 4f56a89ad74f82403500d6392e2d3a90ba912f37
https://github.com/llvm/llvm-project/commit/4f56a89ad74f82403500d6392e2d3a90ba912f37
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
A mlir/include/mlir/Dialect/Func/IR/FuncDialect.h
M mlir/include/mlir/Dialect/Func/IR/FuncOps.h
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Target/Cpp/TranslateRegistration.cpp
M mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
M mlir/lib/Target/SMTLIB/ExportSMTLIB.cpp
M mlir/test/lib/Conversion/ConvertToSPIRV/TestSPIRVFuncSignatureConversion.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/unittests/Dialect/Linalg/InferConvolutionDimsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
M mlir/unittests/Dialect/Transform/BuildOnlyExtensionTest.cpp
Log Message:
-----------
[mlir][Func] Split the dialect declaration (NFC) (#222860)
Introduce a self-contained dialect declaration and use it in ten
configured consumers that do not need the generated operation umbrella.
Across three controlled -j16 rebuilds of the affected TUs, median
instructions fell from 224.883B to 220.787B (-1.821%) and median wall
time fell from 8.44s to 8.31s (-1.540%).
Assisted-by: Codex
Commit: 3ec1c433b3a4bacbb055f2a2ce2d5ef3ca4172ae
https://github.com/llvm/llvm-project/commit/3ec1c433b3a4bacbb055f2a2ce2d5ef3ca4172ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
A llvm/test/Transforms/ConstraintElimination/strengthen-flags-at-uses.ll
Log Message:
-----------
[ConstraintElim] Strengthen flags at the closest dominator of all uses. (#220918)
Flags are currently only strengthened using the facts that hold on entry
to the block defining the instruction. This overly pessimistic. It is
sufficient to check at the closest instruction dominating all uses.
Extend FactOrCheck to carry this point as context instruction (in union
with the mutually exclusive DoesHold to avoid size growth) and retrieve
the common dominating instruction when queuing instructions for flag
strengthening.
This strengthens flag inference in a number of real-world cases, as well
as enables additional folds due stronger flags:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1171
Compile-time impact is in the noise
https://llvm-compile-time-tracker.com/compare.php?from=11bc6ce46e227718c3b54aa6889d7458656e8ab4&to=6f67fdcdb62a5fe56060cb266448db8b763e13d7&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/220918
Commit: f284ae2ed3f9b74b213633b0e5cab52b490728f2
https://github.com/llvm/llvm-project/commit/f284ae2ed3f9b74b213633b0e5cab52b490728f2
Author: Yongqiang Tian <yqtian668 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
A llvm/test/CodeGen/RISCV/shrinkwrap-save-restore-debug.ll
Log Message:
-----------
[RISCV] Ignore debug instructions in epilogue block checks (#219401)
A debug instruction in a return-only block can make
`RISCVFrameLowering::canUseAsEpilogue` reject an otherwise valid
shrink-wrap
point. This moves the save and restore libcalls onto the fast path.
Ignore debug instructions in the successor cardinality check while
continuing
to count bundle interiors, pseudo probes, and other non-debug
instructions.
The first commit records the existing behavior. The second applies the
fix and
updates the test expectations to require localized save and restore
calls.
Fixes #219378
Testing:
- Verified that the regression test fails on an affected compiler.
- Verified the targeted test after the fix.
- RISC-V CodeGen: 2654/2654 passed.
Assisted-by: OpenAI Codex 5.6 Sol, co-reviewed by Claude and Yongqiang
Tian.
Commit: e8a0d25ac75b3123f98e7dce16f6d096f2179b97
https://github.com/llvm/llvm-project/commit/e8a0d25ac75b3123f98e7dce16f6d096f2179b97
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
Log Message:
-----------
[CostModel][X86] Cleanup unary shuffle cost tests to use poison instead of undef in second operand (#222718)
Commit: c382571b2b3cede5de97cbbd314597db21f89435
https://github.com/llvm/llvm-project/commit/c382571b2b3cede5de97cbbd314597db21f89435
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/cmake/modules/CrossCompile.cmake
Log Message:
-----------
[CMake] Forward CLANG_ENABLE_CIR to native tool builds (#222771)
Commit: 5e64eb8ffffa3e845ca01d81c1e45ef68d07d306
https://github.com/llvm/llvm-project/commit/5e64eb8ffffa3e845ca01d81c1e45ef68d07d306
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
Log Message:
-----------
[Clang] Improve error recovery for indexed template names (#222328)
There were a few issues here:
- Names that are not templates were not diagnosed and led to a crash (in
part because clang think they can be template names that will be later
resolved by ADL)
- Names that refer to a variable template decl, etc also led to a crash.
Fixes #220502
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: e4b9c07d30119fa37202233973629e3143c27685
https://github.com/llvm/llvm-project/commit/e4b9c07d30119fa37202233973629e3143c27685
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
Log Message:
-----------
[GlobalISel] Fast path exact LLT equality (NFC) (#222550)
Improves CTMark geomean -0.05% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=87d9c3c24ff5941ac08799850a6549b561c98a81&to=a5391cd5be815299b2cddcabf62a86369b247f72&stat=instructions:u
Assisted-by: codex
Commit: 19dad062e98520c641617fda2cec07592764d5dc
https://github.com/llvm/llvm-project/commit/19dad062e98520c641617fda2cec07592764d5dc
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/StopPointSiteList.h
M lldb/test/API/functionalities/breakpoint/write_over_software_breakpoint/TestWriteOverSoftwareBreakpoint.py
Log Message:
-----------
[lldb] Fix handling of lldb managed software breakpoints (#222009)
Fixes #217910.
When the debug server can manage its own breakpoints this is called an
"external" breakpoint. When it cannot, lldb must manage the breakpoint
itself from the client side.
Part of doing that is FindInRange which is used to patch reads and
writes over software breakpoint sites. It had an issue where it would
not account for a breakpoint that started before the range, but extended
into the range. For example:
```
Memory content: ABCDEFGHIJKL
Read range: ----[--]----
Breakpoint location: -BKPT-------
Overlap with read: ---- at -------
Expected read result: ----EFGH----
Would actually get: ----TFGH----
```
This change fixes that mistake:
* Exit early if there are no sites to check.
* Exit early if the lower_bound result is beyond the upper bound of the
range - only if the result is not the end of the list. In the result was
end(), there may be one site before which we must also check.
The existing "Over end of breakpoint" test covers the bug I'm fixing.
The tests have been refactored to run normally and via. a proxy that
refuses breakpoint packets.
We could instead use two different proxies where one supports the
packets and one doesn't. However, that's more overhead per test and you
can't run proxy tests remotely.
Due to https://github.com/llvm/llvm-project/issues/222284, the proxy
tests cannot be run everywhere, but it can run on AArch64 which is
common.
Commit: 2684037ea97ebb068941b699ef9639334958c509
https://github.com/llvm/llvm-project/commit/2684037ea97ebb068941b699ef9639334958c509
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
Log Message:
-----------
[AMDGPU] Update buildbot cmake cache files (#222807)
This fixes one issue where the compiler-rt entry was not propagated to
the build.
We also want to select libgcc as the default unwindlib explicitly (as
this is what we do downstream).
Commit: 9f634aa12509462631e9dc799b987c2aac617a2c
https://github.com/llvm/llvm-project/commit/9f634aa12509462631e9dc799b987c2aac617a2c
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 7ba3ce4 (#222865)
This fixes 7ba3ce428af7f6e7f1e642dba128c2afc13dba90 (#222859).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=7ba3ce428af7f6e7f1e642dba128c2afc13dba90
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4f32e473933d4a039d13fe2c0a4ccdde73c8b929
https://github.com/llvm/llvm-project/commit/4f32e473933d4a039d13fe2c0a4ccdde73c8b929
Author: yamash-fj <yamashita.ta-16 at fujitsu.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
Log Message:
-----------
[AArch64] Parameterize repeated FP divisor combine threshold by subtarget (#216930)
Changes:
This patch makes the threshold for combining repeated FP divisors
configurable per AArch64 subtarget, instead of using a single fixed
value 3 for all CPUs. Additionaly, set this value 2 for A64FX based on
observed profitability for this transform on A64FX.
Motivation:
Today, AArch64 uses a fixed threshold of 3 for reciprocal transform.
This means the transform runs when there are 3 FDIVs with the same
divisor (not 2). That is conservative for some subtargets, and it can
miss profitable opportunities on CPUs such as A64FX, where a lower
threshold appears to produce better code generation.
```
a / D; b / D; ...
=>
recip = 1.0 / D; a * recip; b * recip; ...
```
Note:
It does not change the semantics of the reciprocal transform itself.
Commit: 478b91b6f8a2b08dce9673555e3f6da8e6e69051
https://github.com/llvm/llvm-project/commit/478b91b6f8a2b08dce9673555e3f6da8e6e69051
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][ComplexToStandard] Fix Conj and Neg ops fmf propagation (#222622)
Commit: 7bb74b19b7f0bbe491898de2289e72d09e4a6b26
https://github.com/llvm/llvm-project/commit/7bb74b19b7f0bbe491898de2289e72d09e4a6b26
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
Log Message:
-----------
[mlir][ComplexToLLVM] Fix abs op fmf propagation (#222621)
Commit: 12f00f9cd311a910a84f3e8a05b5b0c96e2bdf78
https://github.com/llvm/llvm-project/commit/12f00f9cd311a910a84f3e8a05b5b0c96e2bdf78
Author: Nikhil Ludder <72620320+badnikhil at users.noreply.github.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/pre-coerced-value-not-numbered.ll
Log Message:
-----------
[GVN] Skip instructions without value numbers in `processNonLocalLoad` (#219851)
GVN may insert coercion instructions (MaterializeAdjustedValue) without
assigning them value numbers. If one becomes a GEP index of a PRE'd load
in the same processBlock sweep, the GEP-index scalar PRE in
processNonLocalLoad reaches it before the next re-numbering iteration
and the verifying VN.lookup() may assert. Avoid performing PRE on such
instructions.
Fixes: #216265.
Commit: 6700445cfe301eb079e13ed1079fb86d1f7b1402
https://github.com/llvm/llvm-project/commit/6700445cfe301eb079e13ed1079fb86d1f7b1402
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
A llvm/test/CodeGen/RISCV/rvv/vsetvli-dead-vl-vtype-liveness.mir
Log Message:
-----------
RISCV: Maintain VL/VTYPE liveness when clearing dead flags in InsertVSETVLI (#222862)
Drop the stale VL/VTYPE ranges when a dead flag is cleared.
RISCVInsertVSETVLI marks the VL and VTYPE defs of an explicit VSETVLI as
live by clearing their dead flags, but did not update LiveIntervals. When a def
was previously a dead def, its live range is a zero-length dead-def segment
ending at the def slot; clearing the flag extends the def past that slot
without extending the range leaving a segment that references no instruction.
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
Commit: 18b9d7282c067d83edda8006c25542d9490e3c6e
https://github.com/llvm/llvm-project/commit/18b9d7282c067d83edda8006c25542d9490e3c6e
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
M llvm/test/Transforms/Attributor/nofpclass-log.ll
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
Log Message:
-----------
[KnownFPClass] Add sNaN deductions for log/log2/log10 (#219703)
`log(x)` can only produce `sNaN` if `x` is `sNaN`.
This also affects tests for `llvm.amdgcn.log.f16` and
`llvm.amdgcn.log.f32`.
Commit: 5f604ff568a9493f1eee44441ef475a2aaad329c
https://github.com/llvm/llvm-project/commit/5f604ff568a9493f1eee44441ef475a2aaad329c
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[BUILD] Fix for 02dc8a35 (#222876)
[BUILD] Fix for 02dc8a35
Commit: 3d6ae4bdf4c6d45d5e2f2c55c06f84568fde0fe0
https://github.com/llvm/llvm-project/commit/3d6ae4bdf4c6d45d5e2f2c55c06f84568fde0fe0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M mlir/lib/IR/Builders.cpp
M mlir/test/Transforms/test-legalizer.mlir
Log Message:
-----------
[MLIR] Fix infinite loop in tryFold in Graph Regions (#189232)
In a graph region (e.g. the module body), an op may use its own result
as an operand, creating a circular SSA dependency. When such an op was
passed to OpBuilder::tryFold, the do-while loop could spin forever:
1. foldCommutative moved the constant operand to the RHS (in-place fold,
foldResults still empty).
2. The next fold call returned the op's own result, signalling an
in-place fold, but foldSingleResultHook re-ran trait folds, found
nothing to swap, and returned success with empty foldResults.
3. Step 2 repeated without end.
Fix: cap the number of in-place fold iterations at 64. Legitimate chains
are very short in practice (foldCommutative swaps once, then the op folds to
a value or constant), so the cap is never reached for correct IR. For the
circular-SSA case the loop now terminates and tryFold returns failure,
letting dialect conversion fall through to a conversion pattern instead of
looping.
An alternative could be for each iteration of the loop, snapshot the
operand list and attributes/properties. If a fold returns empty results
but the operands are unchanged, we have reached a fixpoint. Stop the
loop and return failure.
However this is more expensive for the common case, while fixing an edge
case.
Fixes #159675
Assisted-by: Claude Code
Commit: 63cc989e0f7c4d7965fea43ac72c1bc713fbc967
https://github.com/llvm/llvm-project/commit/63cc989e0f7c4d7965fea43ac72c1bc713fbc967
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
Log Message:
-----------
[ORC] Move ExecutorSharedMemoryMapperService names to sps_ci (#222835)
Relocate the service's interface names and SPS signatures from rt:: in
OrcRTBridge into a new Shared/SPSCI/SharedMemoryMapperSPSCI.h, matching
the existing SPSCI descriptor convention. Name-neutral: the symbol
strings are unchanged.
Commit: 58c46bae21181fb4240cf964461bea738d96d50e
https://github.com/llvm/llvm-project/commit/58c46bae21181fb4240cf964461bea738d96d50e
Author: David Green <david.green at arm.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/bcmp.ll
M llvm/test/CodeGen/AArch64/i128-imm-compare-ccmp.ll
Log Message:
-----------
[AArch64] Guard against large types in performOrXorChainCombine (#222146)
Larger type sizes will be legalized to i64, and will hit a crash in
checking constants.
Fixes #222089
Commit: 1821d5d4fcabdd878e8c0278b59105802fe47d51
https://github.com/llvm/llvm-project/commit/1821d5d4fcabdd878e8c0278b59105802fe47d51
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
R clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [3/5] (#221533)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the third part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: e885b0d31b1e9d5dd83620d09ee76a92c8c38c39
https://github.com/llvm/llvm-project/commit/e885b0d31b1e9d5dd83620d09ee76a92c8c38c39
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
M clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
M clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
M clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [3/5] (#221534)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the third part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
Commit: bc9886e720f178e0d35db1c2e11f17739b5106ce
https://github.com/llvm/llvm-project/commit/bc9886e720f178e0d35db1c2e11f17739b5106ce
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
Log Message:
-----------
[flang][OpenACC] Don't emit unstructured-loop TODO for wrappable loops (#222260)
`genOpenACCLoopFromDoConstruct` raised an NYI for any unstructured DO
inside `acc kernels`. That check ran before the wrapping in
`genFIR(DoConstruct)`, so a loop whose CFG is self-contained aborted
lowering even though the fall-back path would have wrapped it in an
`scf.execute_region`.
Skip the TODO when `isWrappableConstruct()` accepts the loop. Such a
loop is not attached to a directive; it is only nested inside the
kernels region.
Correspondingly, a DO loop sitting directly in an `acc kernels` body is
no longer wrappable, since it is the loop the directive parallelizes and
hiding its CFG would leave the kernels region with nothing to partition.
Commit: 6e25eaedeee9ee4845565514dce823988ac7f23c
https://github.com/llvm/llvm-project/commit/6e25eaedeee9ee4845565514dce823988ac7f23c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getschedpolicy.cpp
A libc/src/pthread/pthread_attr_getschedpolicy.h
M libc/src/pthread/pthread_attr_init.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.h
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
Log Message:
-----------
[libc] Implement pthread_attr_[gs]etschedpolicy (#222682)
This patch implements pthread_attr_setschedpolicy and
pthread_attr_getschedpolicy.
This commit only operates on the pthread_attr_t object. It does not
attempt to install the scheduling policy when creating a new thread. I'm
leaving that for a separate patch as it requires a moderately
complicated startup dance to ensure that the scheduling policy takes
effect before the startup code runs.
The validation of inputs in pthread_attr_setschedpolicy is an
interesting question. Glibc accepts only policies explicitly declared in
POSIX, while other implementations let the user pass anything, and rely
on the kernel to validate the arguments. Interestingly, even glibc does
not validate the arguments in pthread_setschedparam.
For llvm-libc, I chose not to validate the arguments either. This is
*mostly* consistent with POSIX, which says (emphasis mine):
> The supported values of policy shall *include* SCHED_FIFO, SCHED_RR,
and
> SCHED_OTHER, which are defined in the <sched.h> header.
I say mostly, because the spec does say we should return ENOTSUP if "an
attempt was made to set the attribute to an unsupported value", but I'm
not sure that's worthwhile, as it means we would need to update our list
of supported policies whenever the kernel adds a new one (and anyway, we
cannot be sure that our understanding of supported policies matches what
the running kernel actually supports).
Assisted-by: Gemini
Commit: eb6fe5a664bfa6813223d4a71b088d53900404d4
https://github.com/llvm/llvm-project/commit/eb6fe5a664bfa6813223d4a71b088d53900404d4
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/neon-addsub-long-reassoc.ll
Log Message:
-----------
[AArch64] Reassociate adds/subs of extends for [SU](ADD|SUB)L. (#222561)
We do this for expressions that can't use widening add/sub.
Commit: dc6825047c42442c5e18dd09d260bee983bc5712
https://github.com/llvm/llvm-project/commit/dc6825047c42442c5e18dd09d260bee983bc5712
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
Log Message:
-----------
[SLP] Limit second pass to register VF in vectorizeNonVectorizableInsts. (#222755)
The second tryToVectorizeList pass in vectorizeNonVectorizableInsts
would try all roots for each possible VF between 1 and the number of
entries in the list.
This can cause super-linear compile-time, for example when there are
basic blocks with calls taking a large number of loads as arguments.
For example, running SLPVectorizer on a block with 1024 loads passed to
calls (https://llvm.godbolt.org/z/8M53G6WzW) will take a large amount of
time (timeout on godbolt, locally on Apple M1 it takes ~30s). With the
fix, it only takes 0.01s.
On large IR corpus, I did not see any difference in vectorization
decisions on AArch64.
PR: https://github.com/llvm/llvm-project/pull/222755
Commit: f214b9adbdaf7333f35595a3d200079bb32e8f81
https://github.com/llvm/llvm-project/commit/f214b9adbdaf7333f35595a3d200079bb32e8f81
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-09-11 (Fri, 11 Sep 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.h
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
A bolt/test/AArch64/materialize-constant.s
A bolt/test/RISCV/call-relocation-pair.s
A bolt/test/RISCV/unsymbolized-call-edge.s
A bolt/test/RISCV/unsymbolized-call-entry.s
A bolt/test/RISCV/unsymbolized-call.s
A bolt/test/RISCV/unsymbolized-long-jump.s
A bolt/test/X86/icp-pic.s
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
M clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/misleading-indentation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.md
R clang-tools-extra/docs/clang-tidy/checks/readability/non-const-parameter.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.md
R clang-tools-extra/docs/clang-tidy/checks/readability/operators-representation.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.md
R clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-access-specifiers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-control-flow.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.rst
M clang/CMakeLists.txt
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/cmake/modules/CMakeLists.txt
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CodeGen/ConstantInitBuilder.h
M clang/include/clang/Lex/Lexer.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/CIR/CodeGen/Address.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/HoistAllocas.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Interfaces/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/ConstantInitBuilder.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/CodeGen/QualTypeMapper.h
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RunLoopAutoreleaseLeakChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelConsumer.cpp
A clang/test/APINotes/swift-attr-redeclaration.cpp
M clang/test/APINotes/swift-import-as.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/HLSL/Textures-scalar-AST.hlsl
M clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
M clang/test/AST/HLSL/Textures-vector-AST.hlsl
A clang/test/AST/ast-print-decomposition.cpp
M clang/test/Analysis/anonymous-decls.cpp
M clang/test/Analysis/cfg.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byref.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
M clang/test/CIR/CodeGen/cxx20-module-initializer.cppm
M clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CIR/CodeGenCXX/typeid-should-throw.cpp
M clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
M clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250-load-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950-read-tr.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w32.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w64.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave32.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave64.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copy.c
M clang/test/CIR/CodeGenOpenACC/compute-copy.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data-copy-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/declare-deviceptr.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/routine-anon-ns.cpp
M clang/test/CIR/CodeGenOpenACC/routine-bind.c
M clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
M clang/test/CIR/CodeGenOpenACC/routine-clauses.cpp
M clang/test/CIR/CodeGenOpenACC/routine-device_type.cpp
M clang/test/CIR/CodeGenOpenACC/routine-globals.cpp
M clang/test/CIR/CodeGenOpenACC/routine-globals2.cpp
M clang/test/CIR/CodeGenOpenACC/routine-locals.cpp
M clang/test/CIR/CodeGenOpenACC/routine-members.cpp
M clang/test/CIR/CodeGenOpenACC/routine-ns.cpp
M clang/test/CIR/CodeGenOpenACC/routine-templ.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/update.c
M clang/test/CIR/CodeGenOpenACC/wait.c
M clang/test/CIR/CodeGenOpenMP/barrier.c
M clang/test/CIR/CodeGenOpenMP/decl-not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CIR/CodeGenOpenMP/target-host-op-filtering.c
M clang/test/CIR/CodeGenOpenMP/target-map-llvm-device.c
M clang/test/CIR/CodeGenOpenMP/target-map.c
A clang/test/CIR/IR/invalid-offload-container.cir
A clang/test/CIR/IR/offload-container.cir
M clang/test/CIR/Lowering/calling-conv.cir
M clang/test/CIR/Lowering/fenv.cir
M clang/test/CIR/Lowering/goto.cir
M clang/test/CIR/Lowering/module-asm.cir
M clang/test/CIR/Lowering/poison.cir
M clang/test/CIR/Lowering/select.cir
M clang/test/CIR/Lowering/strictfp.cir
M clang/test/CIR/Lowering/ternary.cir
M clang/test/CIR/Tools/warn-default-triple.cir
M clang/test/CIR/Transforms/abi-lowering/expand-struct-arg.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-byref-forward-param.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byref-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
M clang/test/CIR/Transforms/hoist-allocas.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/test/CIR/Transforms/lib-opt.cpp
M clang/test/CIR/lib/Analysis/CMakeLists.txt
M clang/test/CXX/stmt.stmt/stmt.iter/stmt.ranged/p1.cpp
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
A clang/test/CodeGen/AArch64/neon/rounding.c
R clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
M clang/test/CodeGen/RISCV/builtin-cpu-is.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGen/unique-internal-linkage-names.cpp
A clang/test/CodeGenCXX/GH128985.cpp
A clang/test/CodeGenCXX/Inputs/embed-data.txt
M clang/test/CodeGenCXX/constructor-attr.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default.hlsl
M clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/CodeGenHLSL/semantics/DispatchThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_GroupThreadID-noindex.hlsl
M clang/test/CodeGenHLSL/semantics/SV_Position.ps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
M clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/DebugInfo/CXX/verbose-trap.cpp
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.c
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.cpp
M clang/test/Driver/riscv-cpus.c
A clang/test/Frontend/optimization-remark-target-features-aarch64.c
A clang/test/Frontend/optimization-remark-target-features-arm.c
M clang/test/Misc/cc1as-darwin-target-variant-sdk-version.s
M clang/test/Misc/cc1as-darwin-target-variant-triple.s
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/for_reduction_task_codegen.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
A clang/test/Parser/cuda-operator-lesslessless.cu
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/Sema/attr-c2x.c
M clang/test/Sema/builtins.c
M clang/test/Sema/constant-conversion.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/Sema/warn-strlcpycat-size.c
M clang/test/SemaCUDA/global-initializers.cu
A clang/test/SemaCXX/GH128985.cpp
M clang/test/SemaCXX/builtin_vectorelements.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
M clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
M clang/test/SemaCXX/delete-non-virtual-dtor.cpp
M clang/test/SemaCXX/dllimport.cpp
A clang/test/SemaCXX/imag-lvalue-with-non-complex-operand.cpp
M clang/test/SemaCXX/ptrauth-type-discriminator.cpp
M clang/test/SemaHLSL/Availability/attr-availability-pixel.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ms.input.hlsl
A clang/test/SemaHLSL/Semantics/arbitrary.ps.output.hlsl
M clang/test/SemaHLSL/Semantics/groupindex.hlsl
M clang/test/SemaHLSL/Semantics/invalid_entry_parameter.hlsl
A clang/test/SemaHLSL/Semantics/output-parameters.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.hlsl
M clang/test/SemaHLSL/Semantics/position.ps.struct.reuse.hlsl
A clang/test/SemaHLSL/Semantics/semantic-indexing.hlsl
M clang/test/SemaHLSL/Semantics/target.ps.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.input.hlsl
M clang/test/SemaHLSL/Semantics/target.vs.output.hlsl
M clang/test/SemaHLSL/Semantics/vertexid.ps.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/shader_type_attr.hlsl
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
A clang/test/SemaOpenCLCXX/vec_step.clcpp
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-lsp-server/cir-lsp-server.cpp
M clang/unittests/CodeGen/CMakeLists.txt
A clang/unittests/CodeGen/QualTypeMapperTest.cpp
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/asan/asan_win_common_runtime_thunk.h
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/lib/fuzzer/FuzzerMerge.cpp
M compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/ubsan/ubsan_handlers.cpp
M compiler-rt/test/asan/TestCases/complete_stack_trace.c
M compiler-rt/test/fuzzer/fuzzer-dirs.test
M compiler-rt/test/fuzzer/fuzzer-finalstats.test
M compiler-rt/test/fuzzer/fuzzer-oom-with-profile.test
M compiler-rt/test/fuzzer/fuzzer-oom.test
M compiler-rt/test/fuzzer/stop-file.test
M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-warnings.ll
A compiler-rt/test/sanitizer_common/TestCases/Linux/opendir_null.cpp
R compiler-rt/test/sanitizer_common/TestCases/Posix/opendir_null.cpp
A compiler-rt/test/tsan/Darwin/os_unfair_lock_deadlock.c
A compiler-rt/test/tsan/Darwin/trylock_no_deadlock.c
M compiler-rt/test/tsan/Darwin/write-interpose.c
A compiler-rt/test/tsan/Linux/epoll_oneshot_norace.cpp
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
A flang-rt/include/flang-rt/runtime/unit.h
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/execute.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api-common.h
M flang-rt/lib/runtime/io-api-minimal.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt-minimal.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/unit-map.h
M flang-rt/lib/runtime/unit.cpp
R flang-rt/lib/runtime/unit.h
A flang-rt/test/Driver/iotype.f90
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/ChildIO.cpp
M flang/CMakeLists.txt
A flang/docs/MeetingNotes/2026/2026-09-09.md
M flang/docs/OpenMPSupport.md
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/HLFIR/Passes.h
M flang/include/flang/Optimizer/HLFIR/Passes.td
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
A flang/include/flang/Optimizer/Support/AllocationPolicy.h
R flang/include/flang/Optimizer/Transforms/AllocationPlacementPolicy.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRCopy.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/lib/Optimizer/Support/AllocationPolicy.cpp
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Utils/OpenMP.cpp
A flang/test/Driver/allocation-policy.f90
M flang/test/Driver/target-cpu-features.f90
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-attach.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-privatize.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep.mlir
A flang/test/Fir/allocation-policy-attr.fir
A flang/test/Fir/allocation-policy-pipeline.fir
A flang/test/Fir/call-properties.fir
M flang/test/Fir/convert-fold.fir
M flang/test/Fir/convert-nontemporal-to-llvm.fir
M flang/test/Fir/convert-to-llvm-access-group.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/tbaa.fir
M flang/test/Fir/vector-always-cfg.fir
A flang/test/HLFIR/inline-hlfir-copy-stack.fir
M flang/test/HLFIR/inline-hlfir-copy.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/threadset.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/default-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/implicit-default-mapper-allocatable-field.f90
M flang/test/Lower/OpenMP/implicit-mapper-no-pointer-map.f90
A flang/test/Lower/OpenMP/threadset.f90
A flang/test/Lower/split-sum-expression-tree-subscripts.f90
A flang/test/Parser/recovery10.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure-version.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure.f90
M flang/test/Semantics/OpenMP/pure-procedure.f90
A flang/test/Semantics/OpenMP/threadset-clause-v60.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
A flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
M flang/test/Transforms/allocation-placement.fir
A flang/test/Transforms/allocation-policy-precedence.fir
R flang/test/Transforms/omp-map-info-finalization-implicit-field.fir
R flang/test/Transforms/omp-map-info-finalization-usm.fir
A flang/unittests/Optimizer/AliasAnalysisRecursiveEffectsCacheTest.cpp
M flang/unittests/Optimizer/CMakeLists.txt
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/aarch64/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/dev/code_coverage.md
M libc/hdr/CMakeLists.txt
A libc/hdr/glob_macros.h
A libc/hdr/sys_file_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/glob_t.h
M libc/include/CMakeLists.txt
A libc/include/glob.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/darwin/CMakeLists.txt
A libc/include/llvm-libc-macros/darwin/signal-macros.h
A libc/include/llvm-libc-macros/glob-macros.h
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/sys-file-macros.h
M libc/include/llvm-libc-macros/signal-macros.h
A libc/include/llvm-libc-macros/sys-file-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/__jmp_buf.h
M libc/include/llvm-libc-types/fenv_t.h
A libc/include/llvm-libc-types/glob_t.h
M libc/include/llvm-libc-types/pthread_attr_t.h
M libc/include/pthread.yaml
M libc/include/stdio.yaml
M libc/include/stdlib.yaml
A libc/include/sys/file.yaml
M libc/include/sys/stat.yaml
M libc/include/wchar.yaml
M libc/src/CMakeLists.txt
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/syscall_wrappers/sigprocmask.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/flock.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/umask.h
M libc/src/__support/tlsf_table.h
M libc/src/__support/wctype_utils.h
A libc/src/glob/CMakeLists.txt
A libc/src/glob/glob.cpp
A libc/src/glob/glob.h
A libc/src/glob/globfree.cpp
A libc/src/glob/globfree.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr_getschedpolicy.cpp
A libc/src/pthread/pthread_attr_getschedpolicy.h
M libc/src/pthread/pthread_attr_init.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.cpp
A libc/src/pthread/pthread_attr_setschedpolicy.h
M libc/src/setjmp/aarch64/sigsetjmp.cpp
M libc/src/setjmp/darwin/CMakeLists.txt
M libc/src/setjmp/darwin/sigsetjmp_epilogue.cpp
M libc/src/setjmp/longjmp.h
M libc/src/setjmp/setjmp_impl.h
A libc/src/signal/darwin/CMakeLists.txt
A libc/src/signal/darwin/sigaddset.cpp
A libc/src/signal/darwin/sigdelset.cpp
A libc/src/signal/darwin/sigemptyset.cpp
A libc/src/signal/darwin/sigfillset.cpp
A libc/src/signal/darwin/sigprocmask.cpp
M libc/src/stdio/CMakeLists.txt
A libc/src/stdio/fmemopen.cpp
A libc/src/stdio/fmemopen.h
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/mkdtemp.cpp
A libc/src/stdlib/linux/mkstemp.cpp
A libc/src/stdlib/linux/mktemp_util.h
A libc/src/stdlib/mkdtemp.h
R libc/src/stdlib/mkstemp.cpp
M libc/src/stdlib/mkstemp.h
M libc/src/sys/CMakeLists.txt
A libc/src/sys/file/CMakeLists.txt
A libc/src/sys/file/flock.h
A libc/src/sys/file/linux/CMakeLists.txt
A libc/src/sys/file/linux/flock.cpp
M libc/src/sys/stat/CMakeLists.txt
A libc/src/sys/stat/futimens.h
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/futimens.cpp
A libc/src/sys/stat/linux/umask.cpp
A libc/src/sys/stat/umask.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcscasecmp.cpp
A libc/src/wchar/wcscasecmp.h
A libc/src/wchar/wcsncasecmp.cpp
A libc/src/wchar/wcsncasecmp.h
M libc/test/UnitTest/CMakeLists.txt
A libc/test/UnitTest/CharLiteralUtils.h
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/stringview_test.cpp
A libc/test/src/__support/OSUtil/darwin/CMakeLists.txt
A libc/test/src/__support/OSUtil/darwin/sigprocmask_test.cpp
M libc/test/src/__support/printf_core/CMakeLists.txt
M libc/test/src/__support/printf_core/writer_test.cpp
M libc/test/src/__support/tlsf_table_test.cpp
M libc/test/src/__support/wctype_utils_test.cpp
A libc/test/src/glob/CMakeLists.txt
A libc/test/src/glob/glob_test.cpp
M libc/test/src/pthread/CMakeLists.txt
M libc/test/src/pthread/pthread_attr_test.cpp
M libc/test/src/signal/sigaddset_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/fmemopen_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/mkdtemp_test.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/file/CMakeLists.txt
A libc/test/src/sys/file/linux/CMakeLists.txt
A libc/test/src/sys/file/linux/flock_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/futimens_test.cpp
A libc/test/src/sys/stat/umask_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcscasecmp_test.cpp
A libc/test/src/wchar/wcsncasecmp_test.cpp
M libc/utils/docgen/wchar.yaml
M libclc/clc/lib/generic/math/clc_fmod.cl
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__configuration/language.h
M libcxx/include/__hash_table
M libcxx/include/__locale_dir/wbuffer_convert.h
M libcxx/include/__locale_dir/wstring_convert.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/__optional/optional_ref.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/minmax_element.h
M libcxx/include/__tree
M libcxx/include/__utility/declval.h
M libcxx/include/__utility/try_key_extraction.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/barrier
M libcxx/include/condition_variable
M libcxx/include/locale
M libcxx/include/module.modulemap.in
M libcxx/include/mutex
M libcxx/include/shared_mutex
M libcxx/include/vector
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
M libcxx/test/libcxx/atomics/clear_padding.pass.cpp
M libcxx/test/libcxx/diagnostics/unused_variables.verify.cpp
M libcxx/test/libcxx/thread/nodiscard.verify.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.ctor.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_until_comp.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.min.max/pstl.minmax_element_comp.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
M libcxx/test/std/containers/associative/set/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace_back.pass.cpp
M libcxx/test/std/containers/unord/unord.set/emplace.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/ctor.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_codecvt.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_err_string.pass.cpp
M libcxx/test/std/thread/thread.condition/thread.condition.condvarany/default.pass.cpp
M libcxx/test/std/utilities/optional/optional.monadic/transform.pass.cpp
M libsycl/Maintainers.md
M lld/.clang-format
M lld/ELF/Arch/AMDGPU.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/Options.td
M lld/docs/MachO/ld64-vs-lld.md
M lld/docs/ReleaseNotes.md
M lld/test/ELF/amdgpu-tid.s
M lld/test/ELF/lto/amdgcn-oses.ll
M lld/test/ELF/lto/amdgcn.ll
M lld/test/ELF/lto/amdgpu.ll
A lld/test/MachO/arm64-x1.s
A lld/test/MachO/warn-missing-subsections-via-symbols.s
M lldb/bindings/interface/SBCompileUnitDocstrings.i
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/include/lldb/Breakpoint/StopPointSiteList.h
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/gdbclientutils.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
R lldb/scripts/convert-lldb-header-to-rpc-header.py
M lldb/scripts/framework-header-fix.py
M lldb/source/API/CMakeLists.txt
M lldb/source/API/SBCompileUnit.cpp
M lldb/source/Core/Value.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.h
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.cpp
A lldb/source/Plugins/TypeSystem/Fortran/TypeSystemFortran.h
M lldb/source/Symbol/SymbolFile.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Utility/RegisterValue.cpp
M lldb/source/ValueObject/ValueObjectRegister.cpp
M lldb/test/API/commands/frame/recognizer/step-through/TestFrameRecognizerStepThrough.py
M lldb/test/API/functionalities/breakpoint/write_over_software_breakpoint/TestWriteOverSoftwareBreakpoint.py
M lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
A lldb/test/API/functionalities/gdb_remote_client/TestBreakpointNotHit.py
M lldb/test/API/functionalities/gdb_remote_client/TestMSP430MSPDebug.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterVector.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManyBreakpoints.py
M lldb/test/API/python_api/compile_unit/Makefile
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
A lldb/test/API/python_api/compile_unit/other.c
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/CMakeLists.txt
R lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckBasicIncludesEmit.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckConstCharPointer.h
R lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckBasicIncludesEmit.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckConstCharPointer.test
R lldb/test/Shell/RPC/Generator/lit.local.cfg
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBEnumerations.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBTypes.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckSBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/SBDefines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-defines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-enumerations.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-types.h
R lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
M lldb/test/Shell/Scripts/TestFrameworkFixScript.test
M lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
R lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/AstRestoreTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CallingConventionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ClassLayoutTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/CompilandsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest0.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest1.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/ExpressionsTest2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.h
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionLevelLinkingTest.ord
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/FunctionNestedBlockTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/PointerTypeTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/SimpleTypesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/TypeQualsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VBases2.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesLocationsTest.script
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/VariablesTest.cpp
A lldb/test/Shell/SymbolFile/NativePDB/add-symbols.cpp
A lldb/test/Shell/SymbolFile/NativePDB/ast-restore.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-arm.test
A lldb/test/Shell/SymbolFile/NativePDB/calling-conventions-x86.test
A lldb/test/Shell/SymbolFile/NativePDB/class-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/compilands.test
A lldb/test/Shell/SymbolFile/NativePDB/enums-layout.test
A lldb/test/Shell/SymbolFile/NativePDB/expressions.test
M lldb/test/Shell/SymbolFile/NativePDB/func-symbols.test
A lldb/test/Shell/SymbolFile/NativePDB/function-level-linking.test
A lldb/test/Shell/SymbolFile/NativePDB/function-nested-block.test
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-dia.cpp
A lldb/test/Shell/SymbolFile/NativePDB/native-setting-no-dia.cpp
R lldb/test/Shell/SymbolFile/NativePDB/native-setting.cpp
A lldb/test/Shell/SymbolFile/NativePDB/pointers.test
A lldb/test/Shell/SymbolFile/NativePDB/type-quals.test
A lldb/test/Shell/SymbolFile/NativePDB/typedefs.test
A lldb/test/Shell/SymbolFile/NativePDB/variables-locations.test
A lldb/test/Shell/SymbolFile/NativePDB/variables.test
A lldb/test/Shell/SymbolFile/NativePDB/vbases2.test
R lldb/test/Shell/SymbolFile/PDB/Inputs/AstRestoreTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CallingConventionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ClassLayoutTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/CompilandsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest0.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest1.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/ExpressionsTest2.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.h
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionLevelLinkingTest.ord
R lldb/test/Shell/SymbolFile/PDB/Inputs/FunctionNestedBlockTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/PointerTypeTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/SimpleTypesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/TypeQualsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VBases.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.cpp
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesLocationsTest.script
R lldb/test/Shell/SymbolFile/PDB/Inputs/VariablesTest.cpp
R lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
R lldb/test/Shell/SymbolFile/PDB/ast-restore.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-arm.test
R lldb/test/Shell/SymbolFile/PDB/calling-conventions-x86.test
R lldb/test/Shell/SymbolFile/PDB/class-layout.test
R lldb/test/Shell/SymbolFile/PDB/compilands.test
R lldb/test/Shell/SymbolFile/PDB/enums-layout.test
R lldb/test/Shell/SymbolFile/PDB/expressions.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
R lldb/test/Shell/SymbolFile/PDB/function-level-linking.test
R lldb/test/Shell/SymbolFile/PDB/function-nested-block.test
R lldb/test/Shell/SymbolFile/PDB/native-setting.cpp
R lldb/test/Shell/SymbolFile/PDB/pointers.test
R lldb/test/Shell/SymbolFile/PDB/type-quals.test
R lldb/test/Shell/SymbolFile/PDB/typedefs.test
M lldb/test/Shell/SymbolFile/PDB/udt-layout.test
R lldb/test/Shell/SymbolFile/PDB/variables-locations.test
R lldb/test/Shell/SymbolFile/PDB/variables.test
R lldb/test/Shell/SymbolFile/PDB/vbases.test
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
R lldb/tools/lldb-rpc-gen/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/RPCCommon.cpp
R lldb/tools/lldb-rpc-gen/RPCCommon.h
R lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
R lldb/tools/lldb-rpc/CMakeLists.txt
R lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
R lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
M lldb/unittests/Target/MemoryTest.cpp
M lldb/unittests/Target/RegisterTypeBuilderClangTest.cpp
M lldb/unittests/Utility/RegisterValueTest.cpp
M llvm/CMakeLists.txt
M llvm/Maintainers.md
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/CrossCompile.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CMake.md
M llvm/docs/CommandGuide/llvm-objdump.md
M llvm/docs/GettingInvolved.md
M llvm/docs/GlobalISel/GenericOpcode.md
M llvm/docs/HowToSubmitABug.rst
M llvm/docs/LibFuzzer.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/PDB/PdbStream.md
M llvm/docs/ReleaseNotes.md
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm-c/lto.h
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/Analysis/CallGraph.h
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelWorkList.h
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/CodeViewSymbols.def
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
M llvm/include/llvm/Frontend/HLSL/SemanticSignatures.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/ConstantRange.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Object/GOFFObjectFile.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/RunCodeGen.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TextAPI/Architecture.def
M llvm/include/llvm/Transforms/Utils/CodeExtractor.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/MachO.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/FinalizeISel.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/DebugInfo/CodeView/SymbolDumper.cpp
M llvm/lib/DebugInfo/CodeView/SymbolRecordMapping.cpp
M llvm/lib/DebugInfo/CodeView/TypeIndexDiscovery.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
M llvm/lib/ExecutionEngine/Orc/MemoryMapper.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.cpp
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/IR/VerifierInternal.h
M llvm/lib/MC/MCGOFFStreamer.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/RunCodeGen.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
A llvm/lib/Target/LoongArch/LoongArchMemoryBarrierOpt.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/SizeOpts.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/X86/clmul.ll
A llvm/test/Analysis/CostModel/X86/pdep.ll
A llvm/test/Analysis/CostModel/X86/pext.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src-fp16.ll
M llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll
M llvm/test/Analysis/CostModel/X86/shuffle-splat.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-unknown-stride.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AArch64/bcmp.ll
A llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
M llvm/test/CodeGen/AArch64/fdiv-combine.ll
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
A llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
M llvm/test/CodeGen/AArch64/i128-imm-compare-ccmp.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
A llvm/test/CodeGen/AArch64/neon-addsub-long-reassoc.ll
A llvm/test/CodeGen/AArch64/neon-implicit-zero-filling.ll
A llvm/test/CodeGen/AArch64/optimization-remark-target-features.ll
M llvm/test/CodeGen/AArch64/overflow-vec.ll
M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvt.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-bf16-compares.ll
M llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-int-converts.ll
M llvm/test/CodeGen/AArch64/sve-bf16-reductions.ll
M llvm/test/CodeGen/AArch64/sve-bf16-rounding.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fma-mix-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
A llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine-analysis-invalidation.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
A llvm/test/CodeGen/AMDGPU/barrier-addrspace-dereference.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
A llvm/test/CodeGen/AMDGPU/null-named-barrier-gv.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
A llvm/test/CodeGen/AMDGPU/read-register-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/read-write-register-src-flat-scratch-base-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-bad-absolute-symbol.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-wrong-gv-signature.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-epilog-phi.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-gen-structure.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-loop-carried-mem.mir
M llvm/test/CodeGen/AMDGPU/trap.ll
A llvm/test/CodeGen/AMDGPU/type-mismatch-src-flat-scratch-base.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
A llvm/test/CodeGen/AMDGPU/write-register-src-flat-scratch-base.ll
A llvm/test/CodeGen/ARM/optimization-remark-target-features.ll
M llvm/test/CodeGen/ARM/vtrn.ll
M llvm/test/CodeGen/Hexagon/anti-dep-partial.mir
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/swp-large-rec.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
A llvm/test/CodeGen/Hexagon/vreduce-fminmax-nan-fixup.ll
A llvm/test/CodeGen/Hexagon/vreduce-max-lowering.ll
A llvm/test/CodeGen/Hexagon/vreduce-min-lowering.ll
A llvm/test/CodeGen/LoongArch/memory-barrier-opt.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/MLRegAlloc/default-eviction-advisor.ll
M llvm/test/CodeGen/MLRegAlloc/rel-codepath.ll
A llvm/test/CodeGen/Mips/jalr-no-mangle.ll
M llvm/test/CodeGen/Mips/mips1-not-support-ldc1-sdc1.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
A llvm/test/CodeGen/NVPTX/mbarrier_layout_sm90_ptx93.ll
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint-f16.ll
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/macro-fusion-add-mem.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-imm-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-imm.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-mul-add.mir
M llvm/test/CodeGen/RISCV/macro-fusion-shift-bit-extract.mir
M llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
M llvm/test/CodeGen/RISCV/macro-fusions.mir
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
A llvm/test/CodeGen/RISCV/rvp-mul-parts-acc-fold.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
A llvm/test/CodeGen/RISCV/rvv/vsetvli-dead-vl-vtype-liveness.mir
A llvm/test/CodeGen/RISCV/shrinkwrap-save-restore-debug.ll
M llvm/test/CodeGen/RISCV/xqci-macro-fusions.mir
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-call-before-alloca.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-external-call.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at-recursive.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-block.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-if-phi.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-shared.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-no-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-same-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-shared.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-function-pointer-debug-none-base.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_blocking_pipes/PipeBlocking.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-select-untyped-ptr.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-void-call-aggregate-arg.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_kernel_attributes/max_work_group_size.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llround.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lround.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
A llvm/test/CodeGen/SystemZ/postra-sched-filter.mir
A llvm/test/CodeGen/SystemZ/zos-align-constpool.ll
A llvm/test/CodeGen/SystemZ/zos-eh.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
A llvm/test/CodeGen/SystemZ/zos-xplink64-formal-sub64-extend.ll
M llvm/test/CodeGen/WebAssembly/simd-setcc-reductions.ll
M llvm/test/CodeGen/X86/avx512-masked-op-fusion.ll
M llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
A llvm/test/CodeGen/X86/branch-on-zero.ll
M llvm/test/CodeGen/X86/compress-evex-vpmov-blendv.mir
M llvm/test/CodeGen/X86/compress-evex-vpmov-kill.mir
A llvm/test/CodeGen/X86/eh-return-shstk-32.ll
A llvm/test/CodeGen/X86/eh-return-shstk.ll
R llvm/test/CodeGen/X86/llc-fp-contract-warning.ll
A llvm/test/CodeGen/X86/pr222363.ll
A llvm/test/CodeGen/X86/regallocfast-undef-tied-use.mir
A llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
A llvm/test/DebugInfo/MIR/InstrRef/expr-operand-count-mismatch.mir
A llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_many_align.s
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
A llvm/test/MC/AMDGPU/buffer-op-lds-operand.s
A llvm/test/MC/AMDGPU/gfx1250-strict_err.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/AMDGPU/xnack-mask.s
M llvm/test/MC/LoongArch/Relocations/sub-expr.s
M llvm/test/MC/MachO/diff-with-two-sections.s
M llvm/test/MC/MachO/weakdef.s
M llvm/test/MC/MachO/zero-space.s
M llvm/test/MC/X86/x86_errors.s
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
M llvm/test/Transforms/Attributor/nofpclass-log.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
M llvm/test/Transforms/ConstraintElimination/pr70510.ll
A llvm/test/Transforms/ConstraintElimination/strengthen-flags-at-uses.ll
A llvm/test/Transforms/CorrelatedValuePropagation/or-disjoint.ll
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
A llvm/test/Transforms/GVN/pre-coerced-value-not-numbered.ll
M llvm/test/Transforms/Inline/ML/bounds-checks.ll
M llvm/test/Transforms/Inline/ML/coro-split-func-levels.ll
M llvm/test/Transforms/Inline/ML/dead-callee.ll
M llvm/test/Transforms/Inline/ML/enable-inline-advisor-printing-ml.ll
M llvm/test/Transforms/Inline/ML/fpi-update.ll
M llvm/test/Transforms/Inline/ML/ml-test-release-mode.ll
M llvm/test/Transforms/Inline/ML/recursive.ll
M llvm/test/Transforms/Inline/ML/scc-dead-accounting.ll
M llvm/test/Transforms/Inline/ML/skip-unreachable.ll
M llvm/test/Transforms/Inline/ML/state-accounting-skip-non-cold.ll
M llvm/test/Transforms/Inline/inlining-advisor-default.ll
M llvm/test/Transforms/InstCombine/SystemZ/libcall-arg-exts.ll
A llvm/test/Transforms/InstCombine/icmp-urem.ll
M llvm/test/Transforms/InstCombine/memchr-11.ll
M llvm/test/Transforms/InstCombine/memchr-2.ll
M llvm/test/Transforms/InstCombine/memchr-3.ll
M llvm/test/Transforms/InstCombine/memchr-6.ll
M llvm/test/Transforms/InstCombine/memchr.ll
M llvm/test/Transforms/InstCombine/negated-bitmask.ll
M llvm/test/Transforms/InstCombine/recurrence.ll
M llvm/test/Transforms/InstCombine/wcslen-1.ll
M llvm/test/Transforms/LoopIdiom/X86/ctlz.ll
M llvm/test/Transforms/LoopInterchange/bail-out-one-loop.ll
A llvm/test/Transforms/LoopInterchange/confused-dependence-subnest.ll
A llvm/test/Transforms/LoopInterchange/dependency-matrix-padding.ll
M llvm/test/Transforms/LoopInterchange/large-nested-6d.ll
A llvm/test/Transforms/LoopInterchange/missed-outer-prefix-subnest.ll
A llvm/test/Transforms/LoopInterchange/no-partially-perfect-subnest.ll
M llvm/test/Transforms/LoopInterchange/partially-perfect-loop.ll
A llvm/test/Transforms/LoopInterchange/preserve-sibling-order.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/select-first-index-narrow.ll
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/store-scalarization-cost.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
A llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
A llvm/test/Transforms/LoopVectorize/select-first-index-narrow.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv-btc.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
M llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll
A llvm/test/Transforms/PhaseOrdering/lto-is-constant.ll
A llvm/test/Transforms/SCCP/or-disjoint.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/operand-chains-max-reg-vf.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-shared-loop-invariant.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
M llvm/test/Transforms/Scalarizer/bitcast-scalar-to-vector.ll
M llvm/test/Transforms/Scalarizer/bitcast-vector-to-scalar.ll
A llvm/test/Transforms/SimpleLoopUnswitch/pr219510.ll
M llvm/test/Transforms/SimplifyCFG/switch-select-remap.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
M llvm/test/Verifier/AMDGPU/alloca.ll
A llvm/test/Verifier/AMDGPU/global-variable.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
A llvm/test/tools/extract_symbols/Inputs/lib-itanium.s
A llvm/test/tools/extract_symbols/Inputs/lib-msvc.s
A llvm/test/tools/extract_symbols/Inputs/user-itanium.s
A llvm/test/tools/extract_symbols/Inputs/user-msvc.s
A llvm/test/tools/extract_symbols/lit.local.cfg
A llvm/test/tools/extract_symbols/registry-itanium.test
A llvm/test/tools/extract_symbols/registry-microsoft.test
M llvm/test/tools/gold/X86/multiple-sections.ll
A llvm/test/tools/llvm-ar/zos-symattrs.test
M llvm/test/tools/llvm-ar/zos-write.test
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
A llvm/test/tools/llvm-mca/AMDGPU/buffer-op-lds-operand.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-cov5.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx90a.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx950.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
A llvm/test/tools/llvm-pdbutil/compile3sym.yaml
A llvm/test/tools/llvm-pdbutil/frameprocsym.yaml
A llvm/test/tools/llvm-pdbutil/s-association.yaml
M llvm/test/tools/llvm-rc/helpmsg.test
A llvm/test/tools/llvm-rc/show-includes.test
A llvm/test/tools/llvm-readobj/MachO/cpu-capabilities.yaml
M llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
M llvm/test/tools/llvm-readobj/MachO/file-headers.test
M llvm/test/tools/llvm-readobj/MachO/needed-libs.test
A llvm/test/tools/llvm-readobj/macho-arm64e_x1.test
M llvm/test/tools/llvm-strings/radix.test
M llvm/tools/llc/CMakeLists.txt
M llvm/tools/llc/llc.cpp
A llvm/tools/llc/llcdriver.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/ObjdumpOpts.td
M llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp
M llvm/tools/llvm-rc/Opts.td
M llvm/tools/llvm-rc/ResourceFileWriter.cpp
M llvm/tools/llvm-rc/ResourceFileWriter.h
M llvm/tools/llvm-rc/llvm-rc.cpp
M llvm/tools/llvm-readobj/MachODumper.cpp
M llvm/tools/llvm-strings/llvm-strings.cpp
M llvm/tools/lto/lto.cpp
M llvm/tools/lto/lto.exports
M llvm/tools/opt/opt.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/ABI/CMakeLists.txt
A llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/unittests/ADT/DenseMapTest.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/BinaryFormat/MachOTest.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticStagesTest.cpp
M llvm/unittests/IR/ConstantRangeTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
M llvm/unittests/Support/KnownFPClassTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M llvm/utils/LLVMVisualizers/llvm.natvis
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
M llvm/utils/extract_symbols.py
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lldbDataFormatters.py
M llvm/utils/profcheck-xfail.txt
M llvm/utils/release/build_llvm_release.bat
M mlir/CMakeLists.txt
M mlir/cmake/modules/CMakeLists.txt
M mlir/docs/DefiningDialects/Operations.md
M mlir/docs/Remarks.md
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/docs/Tutorials/transform/Ch1.md
M mlir/docs/Tutorials/transform/Ch4.md
M mlir/docs/Tutorials/transform/ChH.md
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
M mlir/include/mlir/ABI/ABIRewriteContext.h
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Conversion/ComplexCommon/DivisionConverter.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
A mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialectDecl.h
M mlir/include/mlir/Dialect/Affine/Analysis/AffineAnalysis.h
A mlir/include/mlir/Dialect/Affine/IR/AffineDialect.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/Arith/IR/Arith.h
A mlir/include/mlir/Dialect/Arith/IR/ArithAttributes.h
A mlir/include/mlir/Dialect/Arith/IR/ArithDialect.h
A mlir/include/mlir/Dialect/Arith/IR/ArithOpInterfaces.h
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/include/mlir/Dialect/Bufferization/IR/Bufferization.h
A mlir/include/mlir/Dialect/Bufferization/IR/BufferizationDialect.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/include/mlir/Dialect/Complex/IR/Complex.h
A mlir/include/mlir/Dialect/Func/IR/FuncDialect.h
M mlir/include/mlir/Dialect/Func/IR/FuncOps.h
M mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h
A mlir/include/mlir/Dialect/GPU/IR/GPUDialectDecl.h
M mlir/include/mlir/Dialect/GPU/Utils/DistributionUtils.h
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
A mlir/include/mlir/Dialect/LLVMIR/LLVMDialectDecl.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
A mlir/include/mlir/Dialect/LLVMIR/NVVMDialectDecl.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
A mlir/include/mlir/Dialect/LLVMIR/ROCDLDialectDecl.h
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
A mlir/include/mlir/Dialect/LLVMIR/pch.h
M mlir/include/mlir/Dialect/Linalg/IR/Linalg.h
A mlir/include/mlir/Dialect/Linalg/IR/LinalgDialect.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Math/IR/Math.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRef.h
A mlir/include/mlir/Dialect/MemRef/IR/MemRefDialect.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
A mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialectDecl.h
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsReduction.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACCMPCommon/Interfaces/AtomicInterfaces.h
M mlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/Tensor/IR/Tensor.h
A mlir/include/mlir/Dialect/Tensor/IR/TensorDialect.h
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
A mlir/include/mlir/Dialect/Vector/IR/VectorDialect.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/OperationSupport.h
M mlir/include/mlir/IR/Remarks.h
A mlir/include/mlir/IR/pch.h
M mlir/include/mlir/Interfaces/TilingInterface.h
A mlir/include/mlir/Remark/LLVMRemarkImport.h
M mlir/include/mlir/TableGen/Operator.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/include/mlir/Tools/mlir-translate/MlirTranslateMain.h
M mlir/include/mlir/Transforms/CMakeLists.txt
M mlir/lib/ABI/Targets/Test/TestTarget.cpp
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/AsmParser/AttributeParser.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Token.cpp
M mlir/lib/AsmParser/Token.h
M mlir/lib/Bytecode/CMakeLists.txt
M mlir/lib/CAPI/Dialect/Affine.cpp
M mlir/lib/CAPI/Dialect/Arith.cpp
M mlir/lib/CAPI/Dialect/Bufferization.cpp
M mlir/lib/CAPI/Dialect/NVVM.cpp
M mlir/lib/CAPI/Dialect/ROCDL.cpp
M mlir/lib/CAPI/Dialect/Tensor.cpp
M mlir/lib/CAPI/Dialect/Vector.cpp
M mlir/lib/CMakeLists.txt
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitCPass.cpp
M mlir/lib/Conversion/ComplexCommon/DivisionConverter.cpp
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp
M mlir/lib/Conversion/ConvertToLLVM/ConvertToLLVMPass.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/LLVMCommon/ConversionTarget.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/MathToNVVM/MathToNVVM.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitCPass.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/NVVMToLLVM/NVVMToLLVM.cpp
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVMPass.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Conversion/TensorToLinalg/TensorToLinalgPass.cpp
M mlir/lib/Conversion/TosaToArith/TosaToArithPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCFPass.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/TransformOps/AffineTransformOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/ArmNeon/IR/ArmNeonDialect.cpp
M mlir/lib/Dialect/ArmNeon/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSME/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/lib/Dialect/ArmSVE/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeVectorStorage.cpp
M mlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/DLTI/CMakeLists.txt
M mlir/lib/Dialect/EmitC/IR/CMakeLists.txt
M mlir/lib/Dialect/Func/TransformOps/FuncTransformOps.cpp
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/GPU/Utils/CMakeLists.txt
M mlir/lib/Dialect/IRDL/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMOps.h
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/lib/Dialect/LLVMIR/IR/NVVMOps.cpp
A mlir/lib/Dialect/LLVMIR/IR/NVVMOps.h
M mlir/lib/Dialect/LLVMIR/IR/VCIXDialect.cpp
M mlir/lib/Dialect/Linalg/IR/CMakeLists.txt
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/DialectExtension.cpp
M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Linalg/Transforms/CategoryToNamedOp.cpp
M mlir/lib/Dialect/Linalg/Transforms/FoldAddIntoDest.cpp
M mlir/lib/Dialect/Linalg/Transforms/MorphOps.cpp
R mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Math/Transforms/ExtendToSupportedTypes.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/EmulateWideInt.cpp
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/OpenACCMPCommon/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Ptr/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
M mlir/lib/Dialect/SCF/Transforms/ForallToParallel.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
M mlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Tosa/Transforms/TosaGatherScatterHardening.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Transform/IR/CMakeLists.txt
M mlir/lib/Dialect/Transform/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Utils/CMakeLists.txt
M mlir/lib/Dialect/Vector/IR/CMakeLists.txt
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/X86/IR/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/CMakeLists.txt
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Remarks.cpp
M mlir/lib/Interfaces/CMakeLists.txt
M mlir/lib/RegisterAllDialects.cpp
M mlir/lib/Remark/CMakeLists.txt
A mlir/lib/Remark/LLVMRemarkImport.cpp
M mlir/lib/TableGen/Operator.cpp
M mlir/lib/Target/Cpp/TranslateRegistration.cpp
M mlir/lib/Target/LLVM/CMakeLists.txt
M mlir/lib/Target/LLVM/ModuleToObject.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/SMTLIB/ExportSMTLIB.cpp
M mlir/lib/Target/SPIRV/CMakeLists.txt
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
M mlir/lib/Tools/mlir-lsp-server/LSPServer.cpp
M mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
M mlir/lib/Tools/mlir-translate/MlirTranslateMain.cpp
M mlir/lib/Transforms/CMakeLists.txt
M mlir/lib/Transforms/Utils/CMakeLists.txt
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/ArithToEmitC/arith-to-emitc.mlir
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ComplexToLLVM/complex-range-option.mlir
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
A mlir/test/Conversion/FuncToLLVM/call-attributes.mlir
M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barriers-gfx12.mlir
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
M mlir/test/Conversion/VectorToLLVM/vector-load-store-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Conversion/XeGPUToXeVM/extf_truncf.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Arith/sharding-propagation.mlir
M mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir
M mlir/test/Dialect/Bufferization/canonicalize.mlir
M mlir/test/Dialect/Builtin/Bytecode/attrs.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed.mlir
M mlir/test/Dialect/Builtin/Bytecode/builtin_fixed_0.mlirbc
A mlir/test/Dialect/GPU/module-to-binary-nvvm-remarks.mlir
M mlir/test/Dialect/LLVMIR/bytecode.mlir
M mlir/test/Dialect/LLVMIR/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/dereferenceable-invalid.mlir
M mlir/test/Dialect/LLVMIR/ifunc.mlir
M mlir/test/Dialect/LLVMIR/inlining-alias-scopes.mlir
M mlir/test/Dialect/LLVMIR/inlining-loop-annotation.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm_trait.mlir
M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
M mlir/test/Dialect/LLVMIR/parameter-attrs-invalid.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/LLVMIR/tbaa-roundtrip.mlir
M mlir/test/Dialect/Linalg/block-pack-matmul.mlir
M mlir/test/Dialect/Linalg/decompose-generic-by-unfolding-projected-permutation.mlir
M mlir/test/Dialect/Linalg/elementwise/fold.mlir
M mlir/test/Dialect/Linalg/elementwise/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/elementwise/invalid.mlir
R mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
M mlir/test/Dialect/Linalg/elementwise/roundtrip.mlir
M mlir/test/Dialect/Linalg/fold-add-into-dest.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
R mlir/test/Dialect/Linalg/linalg-morph-category-ops.mlir
M mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
R mlir/test/Dialect/Linalg/linalg-morph-multi-step.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
R mlir/test/Dialect/Linalg/named-ops-fail.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/Dialect/Linalg/reshape_fusion.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
M mlir/test/Dialect/Linalg/scalable-unpack-producer-fusion.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-generalize.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-binary.mlir
R mlir/test/Dialect/Linalg/transform-op-specialize-elemwise-unary.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadx-heap.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/SCF/parallel-loop-unroll.mlir
M mlir/test/Dialect/SPIRV/IR/target-env.mlir
M mlir/test/Dialect/SparseTensor/encoding_with_symbols.mlir
M mlir/test/Dialect/SparseTensor/external_after_codegen.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
A mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening-invalid.mlir
A mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Transform/test-promote-tensors.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
M mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/Examples/transform/Ch1/invalidation-1.mlir
M mlir/test/Examples/transform/Ch1/invalidation-2.mlir
M mlir/test/Examples/transform/Ch1/sequence.mlir
M mlir/test/Examples/transform/Ch2/sequence.mlir
M mlir/test/Examples/transform/Ch3/sequence.mlir
M mlir/test/Examples/transform/Ch4/multiple.mlir
M mlir/test/Examples/transform/Ch4/sequence.mlir
M mlir/test/IR/custom-float-attr-roundtrip.mlir
M mlir/test/IR/parser.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
A mlir/test/Integration/Dialect/Vector/CPU/reductions-masked-minmax-f32.mlir
M mlir/test/Interfaces/TilingInterface/query-fusability.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer-using-slices.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Interfaces/TilingInterface/tile-elementwise.mlir
M mlir/test/Interfaces/TilingInterface/tile-fuse-and-yield-using-interface.mlir
M mlir/test/Target/Cpp/arithmetic_operators.mlir
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/function-metadata.ll
M mlir/test/Target/LLVMIR/Import/ifunc.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
A mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/Import/metadata-loop.ll
M mlir/test/Target/LLVMIR/Import/metadata-profiling.ll
M mlir/test/Target/LLVMIR/Import/metadata-tbaa.ll
M mlir/test/Target/LLVMIR/Import/target-ext-type.ll
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction.mlir
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
M mlir/test/Target/LLVMIR/anonymous-tbaa.mlir
M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
M mlir/test/Target/LLVMIR/attribute-dereferenceable.mlir
M mlir/test/Target/LLVMIR/attribute-tbaa.mlir
M mlir/test/Target/LLVMIR/ifunc.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/loop-metadata.mlir
A mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_check_layout.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_init.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
M mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
A mlir/test/Target/LLVMIR/omptarget-debug-shared-alloc-loc.mlir
M mlir/test/Target/LLVMIR/omptarget-host-ref-semantics.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-ptr-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-nowait.mlir
M mlir/test/Target/LLVMIR/omptarget-overlapping-record-member-map.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
M mlir/test/Target/LLVMIR/opaque-ptr.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-nontemporal.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-simd-private.mlir
M mlir/test/Target/LLVMIR/openmp-simd-reduction-simple.mlir
M mlir/test/Target/LLVMIR/openmp-target-private.mlir
A mlir/test/Target/LLVMIR/openmp-task-threadset.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-threadset.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/target-ext-type.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/Transforms/scf-replace-with-new-yields.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Analysis/CMakeLists.txt
M mlir/test/lib/Analysis/DataFlow/TestIntegerDivisibilityAnalysis.cpp
M mlir/test/lib/Conversion/ConvertToSPIRV/TestSPIRVFuncSignatureConversion.cpp
M mlir/test/lib/Conversion/MemRefToLLVM/TestMemRefToLLVMWithTransforms.cpp
M mlir/test/lib/Conversion/VectorToSPIRV/TestVectorReductionToSPIRVDotProd.cpp
M mlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp
M mlir/test/lib/Dialect/Affine/TestLoopMapping.cpp
M mlir/test/lib/Dialect/Affine/TestReifyValueBounds.cpp
M mlir/test/lib/Dialect/Arith/TestEmulateWideInt.cpp
M mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
M mlir/test/lib/Dialect/ControlFlow/TestAssert.cpp
M mlir/test/lib/Dialect/GPU/TestGpuMemoryPromotion.cpp
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
M mlir/test/lib/Dialect/LLVM/TestPatterns.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgDecomposeOps.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgElementwiseFusion.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgFusionTransforms.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgRankReduceContractionOps.cpp
M mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
M mlir/test/lib/Dialect/Linalg/TestPadFusion.cpp
M mlir/test/lib/Dialect/Math/TestAlgebraicSimplification.cpp
M mlir/test/lib/Dialect/Math/TestPolynomialApproximation.cpp
M mlir/test/lib/Dialect/MemRef/TestComposeSubView.cpp
M mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
M mlir/test/lib/Dialect/MemRef/TestMultiBuffer.cpp
M mlir/test/lib/Dialect/NVGPU/TestNVGPUTransforms.cpp
M mlir/test/lib/Dialect/OpenACC/TestOpenACCSupport.cpp
M mlir/test/lib/Dialect/OpenACC/TestPointerLikeTypeInterface.cpp
M mlir/test/lib/Dialect/OpenACC/TestRecipePopulate.cpp
M mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
M mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
M mlir/test/lib/Dialect/Tensor/TestTensorTransforms.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/test/lib/Dialect/XeGPU/CMakeLists.txt
M mlir/test/lib/Transforms/TestTransformsOps.cpp
M mlir/test/mlir-lsp-server/definition.test
M mlir/test/mlir-lsp-server/diagnostics.test
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/test/python/dialects/linalg/opdsl/test_core_named_ops.py
M mlir/test/python/dialects/linalg/ops.py
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
M mlir/tools/mlir-translate/mlir-translate.cpp
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
M mlir/unittests/ABI/ABIRewriteContextTest.cpp
M mlir/unittests/CMakeLists.txt
M mlir/unittests/Dialect/Linalg/InferConvolutionDimsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTilingTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
M mlir/unittests/Dialect/Transform/BuildOnlyExtensionTest.cpp
M mlir/unittests/IR/RemarkTest.cpp
M mlir/unittests/Interfaces/InferTypeOpInterfaceTest.cpp
A mlir/unittests/Remark/CMakeLists.txt
A mlir/unittests/Remark/LLVMRemarkImportTest.cpp
M mlir/unittests/TableGen/OpBuildGen.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
M offload/ci/openmp-offload-amdgpu-clang-flang.py
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
A offload/test/offloading/fortran/implicit-map-allocatable-field.f90
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/i18n/en_US.txt
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_traits.cpp
M openmp/runtime/src/kmp_traits.h
M openmp/runtime/unittests/Traits/TestOMPTraitParser.cpp
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt-c/support/Compiler.h
M orc-rt/include/orc-rt-c/support/Error.h
M orc-rt/include/orc-rt-c/support/Logging.h
M orc-rt/include/orc-rt/bedrock/SimpleSymbolTable.h
M orc-rt/include/orc-rt/bedrock/sps/CallSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/GDBJITRegistrarSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/MemoryAccessSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/NativeDylibManagerSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/SimpleNativeMemoryMapSPSCI.h
M orc-rt/include/orc-rt/bedrock/sps/StandaloneMachOUnwindInfoRegistrarSPSCI.h
A orc-rt/include/orc-rt/support/Mangling.h
M orc-rt/include/orc-rt/support/sps/SPSAllocAction.h
M orc-rt/include/orc-rt/support/sps/SPSWrapperFunction.h
M orc-rt/lib/bedrock/BootstrapInfo.cpp
M orc-rt/lib/bedrock/NativeDylibManager.cpp
M orc-rt/lib/bedrock/Session.cpp
M orc-rt/lib/bedrock/SimpleNativeMemoryMap.cpp
M orc-rt/lib/bedrock/sps/CallSPSCI.cpp
M orc-rt/lib/bedrock/sps/GDBJITRegistrarSPSCI.cpp
M orc-rt/lib/bedrock/sps/MemoryAccessSPSCI.cpp
M orc-rt/lib/bedrock/sps/NativeDylibManagerSPSCI.cpp
M orc-rt/lib/bedrock/sps/SimpleNativeMemoryMapSPSCI.cpp
M orc-rt/lib/bedrock/sps/StandaloneMachOUnwindInfoRegistrarSPSCI.cpp
M orc-rt/lib/support/Error.cpp
M orc-rt/lib/support/Logging.cpp
M orc-rt/lib/support/Logging_oslog.cpp
M orc-rt/lib/support/Logging_printf.cpp
M orc-rt/test/regression/darwin/check-rt-process-info.test
M orc-rt/test/regression/linux/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/test/unit/bedrock/SimpleSymbolTableTest.cpp
M orc-rt/test/unit/bedrock/sps/CallSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/MemoryAccessSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
A orc-rt/test/unit/support/ManglingTest.cpp
M orc-rt/test/unit/support/sps/SPSAllocActionTest.cpp
M orc-rt/test/unit/support/sps/SPSWrapperFunctionTest.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
M third-party/unittest/googletest/include/gtest/internal/custom/gtest-printers.h
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/HLFIR/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/jmmartinez/nfs_headache
Compare: https://github.com/llvm/llvm-project/compare/7af13b371dde...f214b9adbdaf
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