[all-commits] [llvm/llvm-project] da1572: [AArch64] Reorder ZPR stack spills to maximize ld1...

[Kieran B via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: da15729d2108024fc2e65fdcb17143393823d6a3
      https://github.com/llvm/llvm-project/commit/da15729d2108024fc2e65fdcb17143393823d6a3
  Author: Kieran B <kieran.bailey at arm.com>
  Date:   2026-09-10 (Thu, 10 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/test/CodeGen/AArch64/sme2-fp8-intrinsics-cvt.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-qcvt.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-qrshr.ll
    M llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll
    M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll

  Log Message:
  -----------
  [AArch64] Reorder ZPR stack spills to maximize ld1b/st1b pairings (#218950)

Currently, the stack allocation algorithm can order spilled ZPR
callee-saves in a way that prevents pairing.

Reorder ZPR callee-saves before frame indices are assigned to maximize
pairing opportunities. Pairing requires consecutive even/odd registers
at even stack offsets.
The remaining legality requirements are already checked when the
register pairs are formed.

The reordering algorithm primarily works by determining the parity of
the lowest ZPR spill offset. If the offset is odd, it places one
unpaired ZPR spill first so that subsequent register pairs begin at even
offsets.

Windows is not supported by this reordering algorithm for now, to keep
this change minimal.

New tests have been added to sve-callee-save-restore-pairs.ll to test
the reordering algorithm.



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