[all-commits] [llvm/llvm-project] 49d09a: [SelectionDAG][NFC] Move EmitStackConvert from Leg...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Thu Sep 10 00:20:00 PDT 2026
Branch: refs/heads/users/vitalybuka/spr/main.do_not_mergeelf-add-statistics-for-cfi-jump-table-relaxation-1
Home: https://github.com/llvm/llvm-project
Commit: 49d09aaac230988c61fa700c7ace90e4e2376c51
https://github.com/llvm/llvm-project/commit/49d09aaac230988c61fa700c7ace90e4e2376c51
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG][NFC] Move EmitStackConvert from LegalizeDAG to SelectionDAG (#221357)
I've ran into multiple instances, include #221358 , where I need to
effectively "bitcast" an integer value to a floating point value with
different width (and vice versa). To my best understandings storing into
stack and loading back is the only feasible way. LegalizeDAG already has
this routine, so I thought it might be a good idea to extract it out and
put inside SelectionDAG.
NFC.
Commit: 1a4e4cbd2317320e5432664bbd709feb03bb1067
https://github.com/llvm/llvm-project/commit/1a4e4cbd2317320e5432664bbd709feb03bb1067
Author: jinge90 <ge.jin at intel.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Add llvm-link deps when building compiler-rt builtins for spirv64 targets (#221906)
https://github.com/llvm/llvm-project/pull/214149 uses llvm-link to
create libclang_rt.builtins.bc from static archive library. It is better
to follow libclc approach to add llvm-link dependency for
builtin-spirv64* in llvm runtime CMakeLists.txt.
Signed-off-by: jinge90 <ge.jin at intel.com>
Commit: 3ba57d142cc3b70ee49798d47d5da9fd99b482dd
https://github.com/llvm/llvm-project/commit/3ba57d142cc3b70ee49798d47d5da9fd99b482dd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/header-induction-start-bounds.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
Log Message:
-----------
[ConstraintElim] Support IV increments via [u|s]add.with.overflow. (#221771)
Treat [u|s]add.with.overflow like plain add when looking for increment
of an IV. We do not retrieve any wrap flags from the IR in that case, and
leave it to SCEV to determine them as needed.
This did not show any improvements on the workloads in
llvm-opt-benchmark-nightly, but helps to remove runtime checks for Swift
code end-to-end (see newly added PhaseOrdering test).
Alive2 Proof: https://alive2.llvm.org/ce/z/o2vMyw
PR: https://github.com/llvm/llvm-project/pull/221771
Commit: 30cfec3b4e6fc18c46d253028c52ee7bacaaf860
https://github.com/llvm/llvm-project/commit/30cfec3b4e6fc18c46d253028c52ee7bacaaf860
Author: David Green <david.green at arm.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-big-endian-bitconverts.ll
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
Log Message:
-----------
[AArch64] Regenerate and update arm64-big-endian-bitconverts.ll. NFC (#222107)
Commit: 37dd96fedb5973485b37d03ec7a1fdbf6d1e6dbc
https://github.com/llvm/llvm-project/commit/37dd96fedb5973485b37d03ec7a1fdbf6d1e6dbc
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/Transforms/Attributor/indirect_call_program_address_space.ll
Log Message:
-----------
[Attributor] Compare an indirect call's callee in the program address space (#222097)
Specializing an indirect call emits, for each candidate callee, an
`icmp` between
the call's callee operand and the candidate. The operand was first
normalized to
address space 0, but the candidates are functions, and functions live in
the
target's program address space. Where that is not 0 the two sides of the
comparison had different types and the `icmp` asserted:
```
Instructions.h:1266: void llvm::ICmpInst::AssertOK(): Assertion
`getOperand(0)->getType() == getOperand(1)->getType() &&
"Both operands to ICmp instruction are not of the same type!"' failed.
```
Normalize to the program address space instead. It is 0 unless a target
says
otherwise, so nothing changes for those; for `spirv64`, whose data
layout sets
`P9`, it is the difference between comparing a `ptr` with a `ptr
addrspace(9)`
and comparing two `ptr addrspace(9)`.
This was found on the `intel-sycl-gpu` builder, which crashed compiling
`offload/test/offloading/nested_parallel_reduction.c` for
`spirv64-intel` once
841d4ad6b315 let that call site reach the specialization path: before,
it took
the single-callee promotion path, which emits no comparison. The bug it
reached
is older than that commit and is not specific to OpenMP, so the test
added here
is a plain Attributor one that needs only a data layout with a non-zero
program
address space.
Commit: 6a77c9113211f81804455102823b996e01283ffc
https://github.com/llvm/llvm-project/commit/6a77c9113211f81804455102823b996e01283ffc
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
Log Message:
-----------
[VPlan] Don't cost scalar IV steps if the vector body runs at most once. (#221974)
If the vector loop executes exactly once, each scalar IV step folds to a
constant, and there's nothing to cost.
Similarly to BranchOnCount and VPRegionBlock::cost, treat
VPScalarIVSteps as free in that case.
This fixes a slight inaccuracy introduced when moving to computing
VPScalarIVSteps costs in VPlan directly.
PR: https://github.com/llvm/llvm-project/pull/221974
Commit: 4afa58e64810be046a9427d3cf7827a0dc2c235c
https://github.com/llvm/llvm-project/commit/4afa58e64810be046a9427d3cf7827a0dc2c235c
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/source/Utility/ArchSpec.cpp
M lldb/unittests/Utility/ArchSpecTest.cpp
Log Message:
-----------
[lldb] Fix infinite recursion in ArchSpec's core matching (#221899)
`target create` never returns for a little-endian 32-bit MIPS ELF file,
on any host whose platform advertises `armv7m`/`armv7em` compatibility.
On Darwin that is every platform, since
`PlatformDarwin::GetCompatibleArchs()`
lists both for every arm64/arm64e host and falls through to that same
list
for any other host core. It is found by `lldb-target-fuzzer`.
Reproduce with a 52-byte ELF32 header (`ELFCLASS32`, `ELFDATA2LSB`,
`e_machine = EM_MIPS`, `e_flags = EF_MIPS_ARCH_32`, everything else
zero),
saved as `mips32el.elf`:
```
(lldb) target create mips32el.elf
```
This never returns. Attaching a debugger to the hung process shows the
same three frames looping forever, with the call stack never growing:
```
frame #1: cores_match(core1=eCore_arm_armv7m, core2=eCore_mips32el, try_inverse=false, ...) at ArchSpec.cpp:1575 [inlined]
frame #2: ArchSpec::IsMatch(rhs=..., match=CompatibleMatch) at ArchSpec.cpp:1449
frame #3: Platform::IsCompatibleArchitecture(...) at Platform.cpp:1193
```
`cores_match()` checks `core1` against `core2`. When nothing matches and
the caller did not ask for an exact match, it sets `try_inverse` and
retries once with the two cores swapped. It retries because the rule
tables are not symmetric: a core lists only what it accepts, not
everything
that accepts it.
Every case that reaches this fallback must leave `try_inverse` false on
the
way out, so the swap happens at most once. Three cases,
`eCore_arm_armv7em`, `eCore_arm_armv7m`, and `eCore_mips32el`, instead
set
it back to true unconditionally. When both sides of a comparison are one
of these three, the swapped call re-arms `try_inverse`, and the tail
call
back into `cores_match()` recurses forever.
This is a tail call, so an optimizing compiler turns the recursion into
a
loop instead of a growing stack. That is why the process spins instead
of
crashing with a stack overflow.
The three cases cannot simply leave `try_inverse` false like their
siblings. `ArchSpec("mipsel").IsCompatibleMatch(ArchSpec("mips64el"))`
is
true today only because of this same swap: `eCore_mips32el`'s own rule
says
nothing about 64-bit MIPS, but `eCore_mips64el`'s rule accepts any
32-bit
MIPS core with the same endianness, and only the inverted comparison
reaches that rule.
Instead, split the switch into a one-directional helper that never
recurses, and try both directions from a plain, non-recursive wrapper:
```
cores_match(A, B) := cores_match_one_direction(A, B) ||
cores_match_one_direction(B, A)
```
This keeps every existing one-directional rule exactly as it was,
including
the mips32el/mips64el rule above, and makes a second retry impossible no
matter what any case does.
Adds two regression tests to ArchSpecTest.cpp. One asserts that the
previously-hanging pairs now return false right away. The other locks in
the two relationships that depend on checking both directions, so a
future
change cannot bring the recursion back by "fixing" the three cases the
naive way.
Assisted-by: claude
Commit: 220294cbf949a487daed4739701d82dfee4054f3
https://github.com/llvm/llvm-project/commit/220294cbf949a487daed4739701d82dfee4054f3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove VPWidenInductionRecipe::getStartValue (NFC). (#222015)
It now shadows VPHeaderPHIRecipe::getStartValue, which returns the same
VPValue and, as the base class accessor, also has a non-const overload.
Narrowing the return type to VPIRValue * was its only purpose.
Commit: ede01decbcb34bd2f04b9102ab96664cc6d5aa4b
https://github.com/llvm/llvm-project/commit/ede01decbcb34bd2f04b9102ab96664cc6d5aa4b
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/lib/CMakeLists.txt
Log Message:
-----------
[libc] Generate a stub for libdl.a (#222098)
Avoid link errors when build rules explicitly add `-ldl` to the linker
invocation -
create an empty `libdl.a` static archive on Linux. It's necessary, for
example,
to build Clang (https://github.com/llvm/llvm-project/issues/97191)
Follow the approach from f88e9de37a52abf9b269a7232bf4d4028bc4ace8
which added a similar stub for `libpthread.a`. Like pthread, dynamic
loader
functions (although they are mostly unimplemented in LLVM-libc as of
today)
are residing in the main `libc.a` archive instead.
Commit: f91b6a0319fd900cb6e665fc8f8dcc5c1a801e4c
https://github.com/llvm/llvm-project/commit/f91b6a0319fd900cb6e665fc8f8dcc5c1a801e4c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
A llvm/test/CodeGen/PowerPC/vsx-swap-removal-undef.mir
Log Message:
-----------
PowerPC: Fix VSX swap removal crash on an undef register (#216714)
formWebs walks each vector-register use and unions its equivalence class
with that of its defining instruction, which it requires to be present
in the swap map. A use of an undef register has no defining instruction, so
the web formation crashed. Treat it like a physical-register mention so the
web is conservatively rejected.
Found by AI while working on something else.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 7024b9e1b423b3c3c6ac76ab6a73cb2c9e4ef842
https://github.com/llvm/llvm-project/commit/7024b9e1b423b3c3c6ac76ab6a73cb2c9e4ef842
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/vector-strict-fp.cpp
Log Message:
-----------
[CIR] Support fp strict for vector logical and, or ops (#221808)
Support fp strict for vector logical `cir.or` and `cir.and` ops
Commit: de2a0dd540f714f5e5ae2d3017fe22e2aa6de002
https://github.com/llvm/llvm-project/commit/de2a0dd540f714f5e5ae2d3017fe22e2aa6de002
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
A llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#222125)
9853cb54d9d2
b182b415d9b2
b90c062f3f03
e91092685eab
4c986c23921d
Commit: 43e82f2b4570c9f5be05ae7113260775bd8773a4
https://github.com/llvm/llvm-project/commit/43e82f2b4570c9f5be05ae7113260775bd8773a4
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/source/Commands/CommandObjectType.cpp
Log Message:
-----------
[lldb] Remove ConstString from CommandObjectType interfaces (#218811)
CommandObjectType was creating ConstStrings type names, function names,
etc. before they needed to be. I'd like to remove ConstString from the
DataFormatter code entirely, so pushing the creation down as far as
possible first is a good first step.
The only remaining use (outside of function arguments) is
ScriptAddOptions. I need to understand it more before I can really
remove it.
Commit: 733c1ec3a313db0e1b5162ff3b2b4438de6cc45c
https://github.com/llvm/llvm-project/commit/733c1ec3a313db0e1b5162ff3b2b4438de6cc45c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/src/__support/CMakeLists.txt
A libc/src/__support/pwd/CMakeLists.txt
A libc/src/__support/pwd/field_tokenizer.h
A libc/src/__support/pwd/flat_file_db.h
M libc/src/pwd/CMakeLists.txt
R libc/src/pwd/field_tokenizer.h
R libc/src/pwd/flat_file_db.h
M libc/src/pwd/pwd_utils.cpp
M libc/src/pwd/pwd_utils.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/pwd/CMakeLists.txt
A libc/test/src/__support/pwd/field_tokenizer_test.cpp
A libc/test/src/__support/pwd/flat_file_db_test.cpp
M libc/test/src/pwd/CMakeLists.txt
R libc/test/src/pwd/field_tokenizer_test.cpp
R libc/test/src/pwd/flat_file_db_test.cpp
Log Message:
-----------
[libc][NFC] Move flat-file database to src/__support/pwd (#221778)
Move FieldTokenizer and FlatFileDatabase from libc/src/pwd to
libc/src/__support/pwd so they can be reused across subsystems (such as
grp) without cross-directory dependencies.
* Move headers to libc/src/__support/pwd/
* Move unit tests to libc/test/src/__support/pwd/
* Update include paths and CMake dependencies in libc/src/pwd/
Assisted-by: Automated tooling, human reviewed.
Commit: d4816e76ca0d005880fa9b581232f0b905a85bb0
https://github.com/llvm/llvm-project/commit/d4816e76ca0d005880fa9b581232f0b905a85bb0
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Semantics/check-data.cpp
A flang/test/Semantics/data27.f90
Log Message:
-----------
[flang] Fix crash with legacy DATA initializer for an invalid declaration (#221170)
For legacy DATA /initialization/, declarations weren't checked for
errors before construction, resulting in an assert crash. This PR fixes
this by adding a check.
Fixes #220846
Commit: d298cac180f6c68a89458aaf450c9d84af8f56cc
https://github.com/llvm/llvm-project/commit/d298cac180f6c68a89458aaf450c9d84af8f56cc
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/DataExtractor.h
M llvm/lib/Support/DataExtractor.cpp
M llvm/unittests/Support/DataExtractorTest.cpp
Log Message:
-----------
[Support] Add DataExtractor::getSLEB128APSInt (#218801)
Add a APSInt variant of `getSLEB128`, supporting values greater than
int64_t.
The new `getSLEB128APSInt` can support values greater than `INT64_MAX`.
This functionality will be used by LLDB formatter bytecode.
Assisted-by: claude
Commit: 9f5246879112eb81a925e02beb1822a4287e81df
https://github.com/llvm/llvm-project/commit/9f5246879112eb81a925e02beb1822a4287e81df
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticDocs.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/test/TableGen/DiagnosticDocs.inc
A clang/test/TableGen/diag-docs-determinism.td
M clang/test/TableGen/emit-diag-docs.td
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
Log Message:
-----------
[clang][docs] Generate diagnostics reference as Markdown (#221361)
Generate Clang's diagnostics reference from MyST Markdown rather than
reStructuredText. Update diagnostic-group documentation to use native MyST
roles and references, and have the TableGen emitter produce MyST list tables
for diagnostic alternatives.
The new list-table emission code is more verbose, but it is conceptually
simpler, since it's just tracking nested indentation as it emits table cells.
Here's a sample of the table markdown output:
```
* - {warning}`warning:` {diagtext}`They say`
- :::{list-table}
:widths: auto
* - {diagtext}`good`
* - {diagtext}`bad`
:::
-
- :::{list-table}
:widths: auto
* - {diagtext}`food`
* - {diagtext}`forests`
:::
- {diagtext}`are`
- :::{list-table}
:widths: auto
* - {diagtext}`good`
* - {diagtext}`bad`
:::
- {diagtext}`according to` {placeholder}`D`
```
See clang/test/TableGen/emit-diag-docs.td for examples of how it looks.
Tracking issue: #201242
Assisted-By: Codex & Claude
Commit: 540f5aca4a2cbd88b998e155db5b85a6a95ef024
https://github.com/llvm/llvm-project/commit/540f5aca4a2cbd88b998e155db5b85a6a95ef024
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/test/CodeGenHLSL/builtins/select.hlsl
Log Message:
-----------
[HLSL] Fix float type promotion to double of the select intrinsic (#222056)
fixes #222055
A previous pr replaced per vector 2-4 overloads with an all inclusive
vector template overload. These vector overloads needed to be guarded so
that vec1s go down the scalar overload path.
Assisted by Copilot MA-code-1.1-flash
Commit: accc84148aae88d54c11403d04929afaccecf4d6
https://github.com/llvm/llvm-project/commit/accc84148aae88d54c11403d04929afaccecf4d6
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
Log Message:
-----------
[AMDGPU] Refresh RegisterClassInfo after reserving WWM registers (#221849)
AMDGPUReserveWWMRegs reserves the VGPRs the WWM allocator picked for SGPR
spill lanes and clears the per-lane VGPR mask, but updates neither
MachineRegisterInfo nor the shared RegisterClassInfo. RegAllocBase
re-freezes the reserved set, but owns its RegisterClassInfo by value, so
only its private copy is refreshed, and a later user of the analysis is
offered an allocation order that still lists the reserved register.
AMDGPURewriteAGPRCopyMFMA became such a user in #216510: its spill slot
elimination assigned that register, which asserts in VirtRegMap and, in a
build without assertions, silently clobbers the spilled SGPRs. #216510 was
reverted in #221749; this is a prerequisite for relanding it.
Update MRI and the analysis at the end of the pass, as SIPreAllocateWWMRegs
already does, after clearPerLaneVGPRAllocMask() since the mask is itself an
input to getReservedRegs().
AI-assisted.
Commit: cc5c51457347547dbac6edcfe9887ca5aeee1b3d
https://github.com/llvm/llvm-project/commit/cc5c51457347547dbac6edcfe9887ca5aeee1b3d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/TestingSupport/TestUtilities.h
Log Message:
-----------
[lldb] Fix -Wunused-template (#221815)
This warning was enabled by default in clang 23.1.0 (although reverted
for 23.1.1). These fixes still make sense to perform though. Template
definitions in headers should not use static, and others are completely
unused.
Commit: 1f388eaf27616aceced0dd292af066ea8dbcd066
https://github.com/llvm/llvm-project/commit/1f388eaf27616aceced0dd292af066ea8dbcd066
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop.ll
Log Message:
-----------
[SLP][NFC]Add a test with missed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/222141
Commit: 8fdbba5073a6fe2ae16be0117f8f473eea27dc2a
https://github.com/llvm/llvm-project/commit/8fdbba5073a6fe2ae16be0117f8f473eea27dc2a
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/unistd-macros.h
M libc/include/unistd.yaml
M libc/src/unistd/linux/sysconf.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/sysconf_test.cpp
Log Message:
-----------
[libc][unistd] Support _SC_GET(GR|PW)_R_SIZE_MAX in sysconf. (#222135)
* Add support for POSIX-specified `_SC_GETGR_R_SIZE_MAX` and
`_SC_GETPW_R_SIZE_MAX`
constants used as arguments to `sysconf` function;
* Return -1 for these values - they provide "initial size" for
user-supplied buffers passed to `getgr*` and `getpw*`
functions, but there's no real maximum limit imposed by the LLVM-libc
implementation, and user might provide a
size they can, and rely on `ERANGE` return values if the chosen size
ended up being too small for pwd/group entries.
* Add unit test coverage, and update the unit test to use proxy headers
instead of system-provided `<unistd.h>`.
Also, properly test errno values returned by `sysconf`.
This fixes one of the remaining blockers for building Clang against
LLVM-libc (https://github.com/llvm/llvm-project/issues/97191)
Commit: 915c3497042d7cbbaa01128c0c044e46caae69da
https://github.com/llvm/llvm-project/commit/915c3497042d7cbbaa01128c0c044e46caae69da
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
[Github] Match backend:NVPTX files outside llvm/ (#221968)
The backend:NVPTX labeler rules are anchored to the llvm/ subtree (every
glob starts with llvm/**), so NVPTX/NVVM-related files elsewhere in the
tree never get the label. In particular, ClangIR's lowering under clang/
touches NVPTX code but the PR is not tagged backend:NVPTX.
This drops the llvm/ prefix so the patterns match anywhere in the tree.
Commit: c0a6b4bee96cc2c81716c5238c453ca68fee8042
https://github.com/llvm/llvm-project/commit/c0a6b4bee96cc2c81716c5238c453ca68fee8042
Author: 简 <32090825+LittleJianCH at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[CodeGen] Avoid quadratic operand removal in MachineInstr::insert (#220165)
This optimizes MachineInstr::insert by copying trailing operands
first and then removing them from the end. This avoids repeatedly
shifting the remaining operands, reducing the operation from quadratic
to linear time without changing behavior.
Commit: 1936b4a95dadcdeddefce26facb208413a9b3b86
https://github.com/llvm/llvm-project/commit/1936b4a95dadcdeddefce26facb208413a9b3b86
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Log Message:
-----------
[AMDGPU] Factor the AsmParser match-specificity comparison into a helper, NFC (#221987)
Extract the "keep the most specific match status" comparison in
matchAndEmitInstruction into an atLeastAsSpecific() lambda ranking
Match_MnemonicFail < Match_InvalidOperand < Match_MissingFeature. No
functional change.
Commit: 15034a76b21551f0e62c7c40f0878e8eeb0deebc
https://github.com/llvm/llvm-project/commit/15034a76b21551f0e62c7c40f0878e8eeb0deebc
Author: Raghu Maddhipatla <raghu.maddhipatla at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate-derived-warning.f90
A flang/test/Lower/OpenMP/omp-declarative-allocate-save-warning.f90
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-allocate-directive.mlir
Log Message:
-----------
[OpenMP] [MLIR] [Flang] Replace all uses of variables in ALLOCATE directive to use new value which is created. (#212361)
Limitation:
Right now, added a TODO warning about lowering of variable with SAVE
attribute or named COMMON block are not completely supported end to end.
So a warning is emitted.
Commit: fa4d413ea4cfd0ab00c4d7b6d3f27087a3fc46bc
https://github.com/llvm/llvm-project/commit/fa4d413ea4cfd0ab00c4d7b6d3f27087a3fc46bc
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Port 35fe7e14ec (#222150)
Commit: e94e2be5be17bb3221c622bb3c638f4a1d9cd1c8
https://github.com/llvm/llvm-project/commit/e94e2be5be17bb3221c622bb3c638f4a1d9cd1c8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Collect predecessors/successors up front (NFC) (#222145)
Collect predecessors and successors up front in reassociateBlocks.
Currently NFC, but makes it more robust in the future, because it also
correctly handles self-edges.
Commit: 9a6ba310ff3d2ed4a88352dd164bfd94518e3cff
https://github.com/llvm/llvm-project/commit/9a6ba310ff3d2ed4a88352dd164bfd94518e3cff
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
Log Message:
-----------
[VPlan] Add helper to add incoming values for last predecessor (NFC). (#222149)
Factor logic to helper function, so it can be re-used in follow-up
changes.
Commit: 6d53e28d51d931eaa50f832cac81b3da4afc779d
https://github.com/llvm/llvm-project/commit/6d53e28d51d931eaa50f832cac81b3da4afc779d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/TransformOps/AffineTransformOps.td
M mlir/include/mlir/Dialect/Bufferization/TransformOps/BufferizationTransformOps.td
M mlir/include/mlir/Dialect/Func/TransformOps/FuncTransformOps.td
M mlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgMatchOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/MemRef/TransformOps/MemRefTransformOps.td
M mlir/include/mlir/Dialect/NVGPU/TransformOps/NVGPUTransformOps.td
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/include/mlir/Dialect/Tensor/TransformOps/TensorTransformOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/Dialect/Transform/TuneExtension/TuneExtensionOps.td
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/XeGPU/TransformOps/XeGPUTransformOps.td
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/test/CAPI/transform_interpreter.c
M mlir/test/Conversion/FuncToLLVM/func-memref-return.mlir
M mlir/test/Conversion/FuncToLLVM/func-to-llvm.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-32b.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/Func/func-transform.mlir
M mlir/test/Dialect/GPU/transform-gpu-failing.mlir
M mlir/test/Dialect/GPU/transform-gpu.mlir
M mlir/test/Dialect/LLVM/lower-to-llvm-transform-symbol-def.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/Linalg/continuous-tiling-full.mlir
M mlir/test/Dialect/Linalg/continuous-tiling-multiway-split.mlir
M mlir/test/Dialect/Linalg/convert-conv2d-to-img2col.mlir
M mlir/test/Dialect/Linalg/hoisting.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/match-ops-invalid.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/multisize-tiling-full.mlir
M mlir/test/Dialect/Linalg/pad-to-specific-memory-space.mlir
M mlir/test/Dialect/Linalg/promote.mlir
M mlir/test/Dialect/Linalg/promotion_options.mlir
M mlir/test/Dialect/Linalg/td/decompose-pack.mlir
M mlir/test/Dialect/Linalg/td/decompose-unpack.mlir
M mlir/test/Dialect/Linalg/td/propagate-data-layout.mlir
M mlir/test/Dialect/Linalg/td/vectorize-with-patterns.mlir
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Dialect/Linalg/transform-op-bufferize-to-allocation.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-hoist-pad-build-packing-loop-nest.mlir
M mlir/test/Dialect/Linalg/transform-op-hoist-pad.mlir
M mlir/test/Dialect/Linalg/transform-op-multitile-sizes.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface-multiple-of.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir
M mlir/test/Dialect/Linalg/transform-op-pad.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-matmul.mlir
M mlir/test/Dialect/Linalg/transform-op-split-reduction-by-scaling.mlir
M mlir/test/Dialect/Linalg/transform-op-split-reduction.mlir
M mlir/test/Dialect/Linalg/transform-op-split.mlir
M mlir/test/Dialect/Linalg/transform-op-vectorize.mlir
M mlir/test/Dialect/Linalg/transform-ops-invalid.mlir
M mlir/test/Dialect/Linalg/transform-ops.mlir
M mlir/test/Dialect/Linalg/transform-promotion.mlir
M mlir/test/Dialect/Linalg/transform-tile-and-fuse-pack-unpack.mlir
M mlir/test/Dialect/Linalg/transform-winograd-conv2d.mlir
M mlir/test/Dialect/Linalg/vectorization/contraction-interface.mlir
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns-flatten.mlir
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/extract.mlir
M mlir/test/Dialect/Linalg/vectorization/insert-slice-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
M mlir/test/Dialect/Linalg/vectorization/pad-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/unsupported.mlir
M mlir/test/Dialect/MemRef/make-loop-independent.mlir
A mlir/test/Dialect/MemRef/transform-ops-assembly-invalid.mlir
A mlir/test/Dialect/MemRef/transform-ops-assembly.mlir
M mlir/test/Dialect/MemRef/transform-ops.mlir
M mlir/test/Dialect/NVGPU/transform-create-async-groups.mlir
M mlir/test/Dialect/NVGPU/transform-pipeline-shared.mlir
M mlir/test/Dialect/SCF/transform-op-coalesce.mlir
M mlir/test/Dialect/SCF/transform-ops-invalid.mlir
M mlir/test/Dialect/SCF/transform-ops.mlir
M mlir/test/Dialect/Tensor/fold-empty-op.mlir
M mlir/test/Dialect/Tensor/transform-op-make-loop-independent.mlir
M mlir/test/Dialect/Transform/Library/lower-to-llvm-transform-symbol-def.mlir
M mlir/test/Dialect/Transform/check-use-after-free.mlir
M mlir/test/Dialect/Transform/expensive-checks.mlir
M mlir/test/Dialect/Transform/include/Library/lower-to-llvm.mlir
M mlir/test/Dialect/Transform/interpreter-entry-point-2.mlir
M mlir/test/Dialect/Transform/normal-forms.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/Dialect/Transform/ops.mlir
M mlir/test/Dialect/Transform/selective-targeting.mlir
M mlir/test/Dialect/Transform/test-dialect-injection.mlir
M mlir/test/Dialect/Transform/test-interpreter-printing.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
M mlir/test/Dialect/Transform/test-loop-transforms.mlir
M mlir/test/Dialect/Transform/test-pass-application.mlir
M mlir/test/Dialect/Transform/test-pattern-application.mlir
M mlir/test/Dialect/Transform/test-tune-extension.mlir
M mlir/test/Dialect/Vector/transform-op-vector-to-llvm.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Dialect/Vector/vector-transfer-drop-unit-dims-patterns.mlir
M mlir/test/Examples/transform-opt/external-def.mlir
M mlir/test/Examples/transform-opt/self-contained.mlir
M mlir/test/Examples/transform/Ch1/invalidation-2.mlir
M mlir/test/Examples/transform/Ch1/sequence.mlir
M mlir/test/Examples/transform/Ch2/sequence.mlir
M mlir/test/Examples/transform/Ch3/sequence.mlir
M mlir/test/Examples/transform/Ch4/features.mlir
M mlir/test/Examples/transform/ChH/full.mlir
M mlir/test/Integration/Dialect/EmitC/td.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmNeon/matmul-i8.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/td/pack-unpack.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul_common.mlir
M mlir/test/Integration/Dialect/Transform/match_reduction.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-using-interface.mlir
M mlir/test/Transforms/test-block-legalization.mlir
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.td
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
M mlir/test/python/dialects/transform.py
M mlir/test/python/dialects/transform_bufferization_ext.py
M mlir/test/python/dialects/transform_extras.py
M mlir/test/python/dialects/transform_interpreter.py
M mlir/test/python/dialects/transform_loop_ext.py
M mlir/test/python/dialects/transform_memref_ext.py
M mlir/test/python/dialects/transform_structured_ext.py
M mlir/test/python/dialects/transform_tensor_ext.py
M mlir/test/python/integration/dialects/transform.py
Log Message:
-----------
[MLIR][Transform] Enable strict property assembly format (#217290)
Enable strict property assembly format mode for the Transform dialect
and its extensions. Bind transform operation options directly in
declarative assembly formats so strict parsing does not rely on fallback
handling.
Update transform dialect, extension, and transform-driven tests to use
the direct property spelling.
Assisted-by: Codex
Commit: 4e12d4bc6b5fc33f0e556f8f282cf97d2843c39b
https://github.com/llvm/llvm-project/commit/4e12d4bc6b5fc33f0e556f8f282cf97d2843c39b
Author: Addmisol <addmisol9 at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/CodeGenOpenCL/address-spaces-conversions.cl
M clang/test/CodeGenOpenCL/size_t.cl
Log Message:
-----------
[Clang][Sema] Promote pointers to common address space in pointer subtraction (#217341)
fixes #216804
## Summary
This PR fixes pointer subtraction between pointers with different but
overlapping address spaces (e.g., `private` and `generic` in
OpenCL).
Previously, when subtracting a private pointer from a generic pointer on
AMDGPU:
- The private pointer (AS5, 32-bit) was converted directly to i32 via
`ptrtoaddr`
- The generic pointer (AS0, 64-bit) was converted to i64 via `ptrtoaddr`
- This resulted in incorrect comparison of 32-bit vs 64-bit values
Now, pointers are first promoted to the composite (superset) address
space using `addrspacecast` before the subtraction. This
mirrors how the conditional operator (`?:`) already handles mixed
address space pointers.
## Test plan
- `clang/test/CodeGenOpenCL/size_t.cl` updated and passes
- Verified generated IR shows correct `addrspacecast` before `ptrtoaddr`
for AMDGCN and SPIR targets
---------
Signed-off-by: addmisol <addmisol9 at gmail.com>
Commit: 19a128ca460284d1274581dd6fedbc6e5f0f1a7d
https://github.com/llvm/llvm-project/commit/19a128ca460284d1274581dd6fedbc6e5f0f1a7d
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Reinsert deferred ready nodes to the ready list (#222054)
Up until now if trySchedule() failed, the ready instructions would be
removed from the ready list for no good reason.
This patch fixes this and reinserts the deferred nodes to the ready
list.
This also helps reduce the scan for ready instructions in trySchedule().
Commit: 644f006fba2b52f0cc0fd58917f2a3ad7d67e6c6
https://github.com/llvm/llvm-project/commit/644f006fba2b52f0cc0fd58917f2a3ad7d67e6c6
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
A utils/bazel/linux_uapi.bzl
Log Message:
-----------
[libc][bazel] Add a repo with linux kernel UAPI headers (#216867)
This PR exposes a target `@linux_uapi//:linux_uapi_headers` that points
to a local directory configured by the `LINUX_UAPI_INCLUDE_DIR`
environment variable. Linux UAPI headers are required to support libc's
`FULL_BUILD` configuration, which uses `-nostdlibinc` and thus requires
a copy of linux kernel headers.
Commit: b586da6cd57c3e8f4abfc46bc08af52e2f68f25a
https://github.com/llvm/llvm-project/commit/b586da6cd57c3e8f4abfc46bc08af52e2f68f25a
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
[libc][bazel] Allow building with -DLIBC_FULL_BUILD (#218992)
This PR defines a flag `-- at llvm-project//libc:build_mode` that
configures LLVM-libc to build with full-build flags. This is only
compatible with clang at the moment, since it relies on the
`-nostdlibinc` flag.
This PR contains the logic for LLVM-libc full build in Bazel. A largely
AI generated follow-on PR has `libc/BUILD.bazel` changes for building
libc targets in full-build mode:
https://github.com/llvm/llvm-project/pull/218993.
Commit: 4a78f273acba2f3bc10b683df252b20f5a8198b0
https://github.com/llvm/llvm-project/commit/4a78f273acba2f3bc10b683df252b20f5a8198b0
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/Maintainers.md
M clang/docs/AMDGPUSupport.md
M clang/docs/AddressSanitizer.md
M clang/docs/AllocToken.md
M clang/docs/AutomaticReferenceCounting.md
M clang/docs/Block-ABI-Apple.md
M clang/docs/BlockLanguageSpec.md
M clang/docs/BoundsSafety.md
M clang/docs/BoundsSafetyAdoptionGuide.md
M clang/docs/BoundsSafetyImplPlans.md
M clang/docs/CIR/ABILowering.md
M clang/docs/CIR/CleanupAndEHDesign.md
M clang/docs/CIR/CodeDuplication.md
M clang/docs/CXXTypeAwareAllocators.md
M clang/docs/ClangLinkerWrapper.md
M clang/docs/ClangNVLinkWrapper.md
M clang/docs/ClangOffloadBundler.md
M clang/docs/ClangSYCLLinker.md
M clang/docs/ClangTransformerTutorial.md
M clang/docs/ConstantInterpreter.md
M clang/docs/ControlFlowIntegrity.md
M clang/docs/DataFlowSanitizer.md
M clang/docs/DebuggingCoroutines.md
M clang/docs/DriverInternals.md
M clang/docs/FAQ.md
M clang/docs/FunctionEffectAnalysis.md
M clang/docs/HIPSupport.md
M clang/docs/HLSL/AvailabilityDiagnostics.md
M clang/docs/HLSL/EntryFunctions.md
M clang/docs/HLSL/ExpectedDifferences.md
M clang/docs/HLSL/FunctionCalls.md
M clang/docs/HLSL/HLSLIRReference.md
M clang/docs/HLSL/HLSLSupport.md
M clang/docs/HLSL/ResourceTypes.md
M clang/docs/HardwareAssistedAddressSanitizer.md
M clang/docs/InternalsManual.md
M clang/docs/LLVMExceptionHandlingCodeGen.md
M clang/docs/LanguageExtensions.md
M clang/docs/LeakSanitizer.md
M clang/docs/LibASTImporter.md
M clang/docs/LifetimeSafety.md
M clang/docs/MatrixTypes.md
M clang/docs/MemorySanitizer.md
M clang/docs/MisExpect.md
M clang/docs/Modules.md
M clang/docs/OffloadingDesign.md
M clang/docs/OpenCLSupport.md
M clang/docs/OpenMPSupport.md
M clang/docs/OverflowBehaviorTypes.md
M clang/docs/PCHInternals.md
M clang/docs/PointerAuthentication.md
M clang/docs/RISCVSupport.md
M clang/docs/RealtimeSanitizer.md
M clang/docs/ReleaseNotes.md
M clang/docs/SYCLSupport.md
M clang/docs/SafeBuffers.md
M clang/docs/SafeStack.md
M clang/docs/SanitizerCoverage.md
M clang/docs/SanitizerSpecialCaseList.md
M clang/docs/SanitizerStats.md
M clang/docs/ShadowCallStack.md
M clang/docs/SourceBasedCodeCoverage.md
M clang/docs/StandardCPlusPlusModules.md
M clang/docs/StructureProtection.md
M clang/docs/ThinLTO.md
M clang/docs/Toolchain.md
M clang/docs/TypeSanitizer.md
M clang/docs/UndefinedBehaviorSanitizer.md
M clang/docs/UsersManual.md
M clang/docs/WarningSuppressionMappings.md
M clang/docs/analyzer/checkers.md
M clang/docs/analyzer/developer-docs/DebugChecks.md
M clang/docs/analyzer/user-docs/Annotations.md
M clang/docs/analyzer/user-docs/CrossTranslationUnit.md
M clang/docs/analyzer/user-docs/FAQ.md
M clang/docs/analyzer/user-docs/TaintAnalysisConfiguration.md
M clang/docs/analyzer/user-docs/UsingWithXCode.md
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/DiagnosticDocs.td
M clang/include/clang/Options/ClangOptionDocs.td
Log Message:
-----------
[docs] Remove TOCs from Clang docs to prepare for Furo migration (#214868)
This is a mechanical change generated by
`utils/docs/remove_page_tocs.py`. In case of conflicts, which are
likely, due to the ongoing markdown migration (#201242), this script can
be re-run to regenerate the change. I'm creating a separate PR for it to
minimize the diff on the functional changes for the furo PR.
Commit: 600241fd49f1d5d5a9aac608da8b2872d23fa082
https://github.com/llvm/llvm-project/commit/600241fd49f1d5d5a9aac608da8b2872d23fa082
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/DataFlowAnalysisIntro.md
M clang/docs/LifetimeSafety.md
M clang/docs/UsersManual.md
A clang/docs/_static/custom.css
M clang/docs/analyzer/conf.py
M clang/docs/conf.py
R libc/docs/_static/copybutton.css
R libc/docs/_static/copybutton.js
M libc/docs/conf.py
R llvm/docs/_static/LLVMWyvernSmall.png
R llvm/docs/_static/copybutton.css
R llvm/docs/_static/copybutton.js
M llvm/docs/conf.py
M utils/docs/llvm_sphinx/__init__.py
A utils/docs/llvm_sphinx/_static/LLVMWyvernSmall.png
A utils/docs/llvm_sphinx/_static/copybutton.css
A utils/docs/llvm_sphinx/_static/copybutton.js
A utils/docs/llvm_sphinx/ext/furo.py
Log Message:
-----------
[clang][docs] Adopt the furo theme used by llvm and libc (#214869)
This change moves the static assets into utils/docs/llvm_sphinx, and
centralizes some of the furo theme logic there.
It then configures furo from clang/docs/conf.py and
clang/analyzer/docs/conf.py.
The temporary preview for the site is here:
https://clangdocs.staging.reidkleckner.dev/after/clang/docs/
The RFC is here:
https://discourse.llvm.org/t/rfc-use-furo-theme-for-clang-docs/91505/7
I plan to wait until at least Aug 13 before merging to gather more
feedback.
Commit: 1977a8b9130e9d0af669feba15d5641f9740ec9d
https://github.com/llvm/llvm-project/commit/1977a8b9130e9d0af669feba15d5641f9740ec9d
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/netdb-macros.h
M libc/include/netdb.yaml
M libc/test/src/netdb/CMakeLists.txt
A libc/test/src/netdb/getaddrinfo_test.cpp
R libc/test/src/netdb/netdb_test.cpp
Log Message:
-----------
[libc][netdb] Add AI_* family of constants. (#221360)
* Provide the values for `AI_*` flags that are passed in `ai_flags`
field of `addrinfo`
structure to `getaddrinfo` calls.
* Reference some of those constant in a placeholder unittest. Rename it
to `getaddrinfo_test`
to clarify its scope (we'll likely be using different test files for
other netdb.h functions).
Commit: b249fd3c6e3dd0e9f9617e57a5cf64fa42d1b486
https://github.com/llvm/llvm-project/commit/b249fd3c6e3dd0e9f9617e57a5cf64fa42d1b486
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/test/Dialect/Linalg/vectorization/contraction-interface.mlir
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns.mlir
Log Message:
-----------
[MLIR][Linalg] Update transform tests for strict properties (#222184)
Update recently added vectorization tests to use the custom assembly
syntax.
Strict Transform dialect properties no longer parse inherent attributes
from the generic attribute dictionary.
These tests landed concurrently with the strict-properties migration.
Assisted-by: Codex
Commit: 66462afa7e4a33f0d720877f2228589d5b43de81
https://github.com/llvm/llvm-project/commit/66462afa7e4a33f0d720877f2228589d5b43de81
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/cmpbr-early-ifcvt.mir
Log Message:
-----------
[AArch64][CMPBR] Fix splitting of CBB/CBH instructions into ext + cmp (#221112)
We falsely split CBB/CBH instructions by explicitly extending the
second register operand instead of the first one, leading to the
following, wrong codegen:
cbh $wn, $wm, cc, trgt => sxth $wt, $wm
cmp $wn, $wt, cc, sxth
Correct is
cbh $wn, $wm, cc, trgt => sxth $wt, $wn
cmp $wt, $wm, cc, sxth
since cmp with extended register extends it's second, not its first
operand.
Commit: df55ebfbe36ec8c6e19fd5b06f218a56cc6f5e23
https://github.com/llvm/llvm-project/commit/df55ebfbe36ec8c6e19fd5b06f218a56cc6f5e23
Author: jiel-nv <37816794+jiel-nv at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/test/Fir/CUDA/predefined-variables.mlir
Log Message:
-----------
[flang][cuda] Create predefined variable reads at the location of use (#222058)
Commit: 1462d6f99a0cdf8c99108cb32eb020efe6ba5f89
https://github.com/llvm/llvm-project/commit/1462d6f99a0cdf8c99108cb32eb020efe6ba5f89
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__optional/optional.h
M libcxx/include/__optional/optional_ref.h
Log Message:
-----------
[libc++][NFC] Remove `optional::__get` (#217218)
Internal communicating functions `optional::__get` can be superseded by
either `value`, `operator*()`, or direct use of data member. Even though
`value()` is checked, checks are already performed before internal calls
to it, so compilers should be able to remove duplicated checks.
It is intended to use `opt.value()` instead of `*opt` to avoid undesired
argument-dependent lookup.
Commit: 58d0cb5a6e50748b4e577da18b1ce34c3418119b
https://github.com/llvm/llvm-project/commit/58d0cb5a6e50748b4e577da18b1ce34c3418119b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
M mlir/test/Dialect/EmitC/canonicalize.mlir
M mlir/test/Dialect/EmitC/form-expressions.mlir
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/invalid_types.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Dialect/EmitC/types.mlir
M mlir/test/Target/Cpp/attrs.mlir
M mlir/test/Target/Cpp/call.mlir
M mlir/test/Target/Cpp/common-cpp.mlir
M mlir/test/Target/Cpp/const.mlir
M mlir/test/Target/Cpp/expressions.mlir
M mlir/test/Target/Cpp/invalid.mlir
M mlir/test/Target/Cpp/literal_call_operand.mlir
M mlir/test/Target/Cpp/lvalue.mlir
M mlir/test/Target/Cpp/member.mlir
M mlir/test/Target/Cpp/subscript.mlir
M mlir/test/Target/Cpp/switch.mlir
M mlir/test/Target/Cpp/types.mlir
M mlir/test/Target/Cpp/variable.mlir
M mlir/test/Target/Cpp/verbatim.mlir
M mlir/test/Transforms/sccp.mlir
Log Message:
-----------
[MLIR][EmitC] Enable strict property assembly format (#217271)
Enable strict property assembly format mode for the EmitC dialect. Spell
call metadata directly in the affected declarative assembly formats and
drop unneeded property dictionaries from formats that already cover
their inherent attributes.
Refresh EmitC tests and related C++ target checks so call properties use
direct syntax while ordinary attributes remain in attr-dict.
Assisted-by: Codex
Commit: 68622e02c9e51d8202a82aca96421662a06eaa18
https://github.com/llvm/llvm-project/commit/68622e02c9e51d8202a82aca96421662a06eaa18
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M compiler-rt/test/fuzzer/fork.test
M compiler-rt/test/fuzzer/fork_corpus_groups.test
Log Message:
-----------
[Fuzzer] Bump rss_limit again. (#222187)
The two tests libFuzzer-x86-64-default-Linux::fork_corpus_groups.test
and libFuzzer-x86-64-default-Linux::fork.test have started being flaky
again on two of my bots, so bumping up the rss limit in the test which
temporarily solved the issue back in #204701.
See comment in #222187 for links to the bots and recent failures.
Commit: 5e282718a88c5e19dfe3524dee0bc91a5fa1e224
https://github.com/llvm/llvm-project/commit/5e282718a88c5e19dfe3524dee0bc91a5fa1e224
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/IR/core-ops.mlir
M mlir/test/Transforms/canonicalize.mlir
M mlir/test/Transforms/inlining.mlir
Log Message:
-----------
[MLIR][Func] Enable strict property assembly format (#217300)
Enable the strict properties assembly format mode for the Func dialect.
Spell inherent call attributes directly in the call formats so they are
no longer parsed from attr-dict in strict mode.
Assisted-by: Codex
Commit: bbd998f0186f5362d3c9c1cc575bf6ce20007685
https://github.com/llvm/llvm-project/commit/bbd998f0186f5362d3c9c1cc575bf6ce20007685
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M flang/test/Semantics/data27.f90
Log Message:
-----------
[flang][test] Expand test for legacy DATA initializer on invalid declarations (#222171)
Follow-up to #221170. Expands `flang/test/Semantics/data27.f90` with the
other shapes that crashed the same way before that fix and now produce
the expected error
Assisted-by: AI
Commit: 9851e4f8979b8b57557d03cd98b54f57287a128f
https://github.com/llvm/llvm-project/commit/9851e4f8979b8b57557d03cd98b54f57287a128f
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][bazel] Make a large swath of targets full-build compatible (#218993)
After this PR, all compatible targets in `@llvm-project//libc:all` are
buildable under full-build mode.
```
bazel build @llvm-project//libc:all -- at llvm-project//libc:build_mode=full --config=generic_clang --keep_going
```
Assited-by: Gemini 3.5
Commit: a953c8466be3dc855f99bf0433386fcae4ef2627
https://github.com/llvm/llvm-project/commit/a953c8466be3dc855f99bf0433386fcae4ef2627
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
Log Message:
-----------
[RISCV][MC]Fix encoding for psati.dw/dh (#221889)
psati.dh: the width is specified by uimm4+1.
psati.dw: the width is specified by uimm5+1.
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-proposal.adoc#psati-dh-rv32
Commit: ea3f107a84eaa2459f6eb5d1c8dbeefea7576689
https://github.com/llvm/llvm-project/commit/ea3f107a84eaa2459f6eb5d1c8dbeefea7576689
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/nvptx_SPMD_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_codegen.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M clang/test/OpenMP/target_teams_reduction_codegen.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
M offload/plugins-nextgen/common/src/RecordReplay.cpp
A offload/test/offloading/thread_limit_below_wavefront.c
Log Message:
-----------
[OpenMP] Reserve the main thread's warp for generic mode kernels (#218790)
In generic mode one warp of the block runs the main thread and the rest
run the
user's threads, so everything needing the team size computes
`BlockSize - WarpSize`: the device runtime's `getMaxTeamThreads`, and
the state
machine OpenMPOpt builds. The bound written into the kernel was the
program's
`thread_limit` exactly, so on gfx90a `thread_limit(4)` launched a block
of 4
threads and the team size came out as `4 - 64`. That subtraction is
unsigned, so
the runtime saw four billion workers rather than none: the parallel
region never
ran, and on current trunk the launch dies with a memory access fault.
Any
`thread_limit` below one warp was affected, so anything under 64 on a
wave64
target.
Add the warp where the bound is written, in `createTargetInit`, for
generic mode
only, so `thread_limit(4)` writes 68 and the team gets its 4, clamped to
the
target's maximum work group size because an out-of-range bound is
dropped rather
than clamped. A fixed 64 is reserved rather than the target's own
wavefront: the
bound is only a ceiling, and the runtime still adds the real warp size
and
clamps to it, so the block that launches is unchanged. Where the warp is
narrower the ceiling is 32 too high, which costs the backend some
register
budget and nothing else; NVPTX with `thread_limit(20)` now gets
`maxntid=84`
where it would have got 52, and still launches 52.
The record-replay recorder, which wrote `thread_limit` as the largest
launch a
replay would accept, now records the larger block that was actually
launched.
`thread_limit_below_wavefront.c` is the reproducer, and the remaining
files are
regenerated clang and MLIR expectations.
## Testing
Tested on `main` at 68622e02c9e5: `clang/test/OpenMP`,
`mlir/test/Target/LLVMIR`
and `llvm/test/Transforms/OpenMP` give 2114 passed, 14 unsupported, 4
failed.
The four are `mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-shared*`, which
fail on
`main` independently of this change: their RUN lines hand `llc` an
`-mxcoff-roptr` it only accepts on AIX.
`check-offload` on an MI210 has nothing failing: 1134 passed, 4
expectedly
failed, 363 unsupported, 12 skipped. That covers the new test,
`thread_limit_below_wavefront.c`, and the six `omp-kernel-replay` tests.
Commit: d1c0cc5e760f9cbb68e2acec80a476c4b8b898b7
https://github.com/llvm/llvm-project/commit/d1c0cc5e760f9cbb68e2acec80a476c4b8b898b7
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
Log Message:
-----------
[AMDGPU] Do not freeze reserved registers in AMDGPUReserveWWMRegs (#222193)
Refreshing the shared RegisterClassInfo needs an up-to-date reserved set, but
freezing it into MachineRegisterInfo, as #221849 did, publishes it too early:
clearing the per-lane VGPR mask unreserves those registers, and LiveIntervals
does not extend a reserved register's unit ranges to its uses, so those uses
fail verification.
Take the set from TargetRegisterInfo instead. It is the same set, and the
register allocator still freezes it into MachineRegisterInfo itself.
AI-assisted.
Commit: d7da49ea2bbc11a93f162ab2ef9755e57843075d
https://github.com/llvm/llvm-project/commit/d7da49ea2bbc11a93f162ab2ef9755e57843075d
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/docs/CMakeLists.txt
M clang/include/clang/Options/ClangOptionDocs.td
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Options/Options.td
M clang/utils/TableGen/ClangOptionDocEmitter.cpp
M flang/docs/CMakeLists.txt
M flang/docs/FlangOptionsDocs.td
M flang/docs/FlangOptionsMan.td
Log Message:
-----------
[clang][flang][docs] Re-land Markdown CLI ref generator (#222147)
Reverts llvm/llvm-project#221937
Relands llvm/llvm-project#220385
This time, the migration includes flang command line reference
documentation, so the change passes `ninja docs-flang-html/man`.
Tracking issue: #201242
Assisted-By: Codex
Commit: 4383c7f120edc4e31294eb148a57c762d7d53170
https://github.com/llvm/llvm-project/commit/4383c7f120edc4e31294eb148a57c762d7d53170
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Fix relocation type for `LDRSW` (#221939)
Fix the incorrect relocation type for `LDRSW`. It should be
`ELF::R_AARCH64_LDST32_ABS_LO12_NC`, but it was mistakenly set to
`ELF::R_AARCH64_LDST64_ABS_LO12_NC` in PR #196051.
Commit: 7209c7af3323615c632a3409a2a776b29fbac528
https://github.com/llvm/llvm-project/commit/7209c7af3323615c632a3409a2a776b29fbac528
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M clang/test/Driver/modules-driver-depscan-log.cpp
Log Message:
-----------
[clang][Driver][test] Specify output path in modules-driver-depscan-log.cpp (#222209)
In `clang/test/Driver/modules-driver-depscan-log.cpp`, `%clang -c` is
invoked on `%t/A.cppm` without an explicit output file (`-o`). By
default, Clang writes the resulting object file (`A.o`) to the current
working directory.
In sandboxed or hermetic test environments where the test runner
executes with a read-only working directory (e.g., Bazel, Nix, or remote
build executors), the test fails with:
```text
error: unable to open output file 'A.o': 'Permission denied'
1 error generated.
Commit: dea8e298844a7721d6db80e2474c178d454b148c
https://github.com/llvm/llvm-project/commit/dea8e298844a7721d6db80e2474c178d454b148c
Author: Shengxin Pei <TPPPP72 at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/SemaCXX/cxx20-default-compare.cpp
R clang/test/SemaCXX/gh147127.cpp
Log Message:
-----------
[clang][test] Move test `gh147127.cpp` to `cxx20-default-compare.cpp` NFC (#222208)
Follow-up #198830
Commit: e1683efa7ce0c77dbd2f3b04e05e18313aee4338
https://github.com/llvm/llvm-project/commit/e1683efa7ce0c77dbd2f3b04e05e18313aee4338
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/IR/Type.cpp
M llvm/test/CodeGen/DirectX/ResourceAccess/handle-cases.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/handle-to-index.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes-resolved.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes.ll
M llvm/test/Transforms/GVN/PRE/no-phi-translate.ll
M llvm/test/Transforms/GVN/PRE/no-pre-load-for-token-like.ll
M llvm/test/Transforms/LCSSA/token-like-live-out.ll
M llvm/test/Transforms/SimpleLoopUnswitch/token-uses.ll
R llvm/test/Transforms/SimplifyCFG/token_like_type.ll
M llvm/test/Verifier/tokenlike1.ll
M llvm/test/Verifier/tokenlike5.ll
M llvm/test/Verifier/tokenlike6.ll
M llvm/test/Verifier/tokenlike7.ll
M llvm/unittests/Transforms/Utils/LocalTest.cpp
Log Message:
-----------
[IR][DirectX] Drop IsTokenLike from `dx.*` target types (#222130)
We made the DirectX resource types "token-like" a while ago in order to
prevent transforms from moving them into PHIs and the like in ways that
made determining their provenance more difficult. However, there are
patterns in HLSL that can generate the problematic IR directly and we've
since implemented logic in `DXILResourceAccess` to handle such cases
anyway. Because of this, we aren't really getting any benefit from the
types being `IsTokenLike`, and in some cases we're working with
intermediate IR that doesn't actually pass the verifier.
Drop `IsTokenLike` from the `dx.*` types since it's no longer correct or
useful. I've updated the tests to use `amdgpu.stridemark` instead, and
slightly abused `llvm.ssa.copy` in order to manufacture SSA values of
that type. I had to drop the test that actually needed a load from a
value depending on the token-like type, as there just isn't really a way
for that to come up without the resource types.
Commit: 33898fffd3c09eba75e4199749117923bc1beee2
https://github.com/llvm/llvm-project/commit/33898fffd3c09eba75e4199749117923bc1beee2
Author: Shengxin Pei <TPPPP72 at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/SemaCXX/ms-ctor-closure.cpp
Log Message:
-----------
[clang][test] Add test for #67685 NFC (#222212)
Commit: 8c7d76bfc1b5c75effc7bd8ecc4892be9970ea5d
https://github.com/llvm/llvm-project/commit/8c7d76bfc1b5c75effc7bd8ecc4892be9970ea5d
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-funcassigncloning.ll
M llvm/test/ThinLTO/X86/memprof-funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/duplicate-context-ids.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloningrecursion.ll
M llvm/test/Transforms/MemProfContextDisambiguation/inlined3.ll
Log Message:
-----------
[MemProf] Use NodeId to break ties deterministically in identifyClones (#222126)
In identifyClones(), ties between caller edges with identical allocation
types and matching clone candidates were previously broken by comparing
the first element of ContextIds (*A->ContextIds.begin() <
*B->ContextIds.begin()).
Because ContextIds is a DenseSet, its iteration order depends on hash
table
layout and bucket distribution, introducing non-determinism across
different
runs or architectures.
Replace this tie-breaker with caller NodeId (A->Caller->NodeId <
B->Caller->NodeId),
which provides a deterministic and stable ordering. Also apply
Callee->NodeId
in CalleeCallerEdgeLessThan for consistency.
Update tests whose remark or dump order depended on the previous
tie-breaker.
For tests that verify multi-clone greedy assignment behavior
(funcassigncloning*.ll),
reorder the input MIB contexts so caller NodeIds reproduce the visit
order
exercising the extra clone creation.
Assisted-by: Gemini
Commit: b113e2640849cd75a39efeae6256d5aecc3f1446
https://github.com/llvm/llvm-project/commit/b113e2640849cd75a39efeae6256d5aecc3f1446
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
Log Message:
-----------
Fix Bazel build for 52d922a (#222219)
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=52d922aa153b1232813470e014635419ce006023
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5503fa587536afa2624971224dbfc6e25d762d37
https://github.com/llvm/llvm-project/commit/5503fa587536afa2624971224dbfc6e25d762d37
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/lib/Passes/FixRISCVCallsPass.cpp
M bolt/test/RISCV/call-link-register.s
M bolt/test/RISCV/relax.s
Log Message:
-----------
[BOLT][RISCV] Remove redundant AUIPCs when rewriting call pairs (#221965)
`FixRISCVCallsPass` replaces the AUIPC instruction with a Noop when
converting an AUIPC/JALR pair into a call or tail-call pseudo. Add the
`NOP` annotation so the existing RemoveNops pass can remove it, avoiding
an unnecessary instruction in the output.
Commit: 7caac9be9a7f9ecda3f31802ef451a25f2b61658
https://github.com/llvm/llvm-project/commit/7caac9be9a7f9ecda3f31802ef451a25f2b61658
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Passes/LivenessAnalysis.h
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][RISCV] Implement register analysis hooks (#220581)
This patch implements the RISC-V register-analysis hooks in
`RISCVMCPlusBuilder` that previously fell back to the unimplemented
base-class methods.
The `MCPlusBuilder` unittests fixture is also extended to create a
RISC-V binary context. New tests cover the flags-register result,
zeroing-XOR recognition, ABI register masks, general-purpose register
masks, and non-scavengeable registers. These hooks provide the
target-specific register information required by BOLT analyses and
transformations on RISC-V.
BTW, this is split out as a prerequisite fo LongJump pass implement for
RISCV.
Commit: 6ef30f15d71bab018de258496f83b8dee529ce60
https://github.com/llvm/llvm-project/commit/6ef30f15d71bab018de258496f83b8dee529ce60
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
Log Message:
-----------
[GlobalISel] Use getTypeFromIdx instead of direct table indexing in GIR_AddCImm (#222114)
Commit: 83728c8a9fe27b1427cf0125e5a7896bbb55b6ae
https://github.com/llvm/llvm-project/commit/83728c8a9fe27b1427cf0125e5a7896bbb55b6ae
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/docs/resources/formatterbytecode.md
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/include/lldb/DataFormatters/FormatterBytecode.h
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/source/DataFormatters/TypeSummary.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb] Add APSInt representation to formatter bytecode (#220665)
Adopt a single representation for integers in the formatter bytecode
interpreter. This simplifies code generation, where the (now deprecated)
distinction of `uint64_t` and `int64_t` types could make conditionals
and other operations more complicated, by having to have code paths for
signed and unsigned.
Depends on https://github.com/llvm/llvm-project/pull/218801
Assisted-by: claude
Commit: 1261f5003d93e83295b93782b871be06db2564c4
https://github.com/llvm/llvm-project/commit/1261f5003d93e83295b93782b871be06db2564c4
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
M llvm/test/Transforms/LoopVectorize/X86/funclet.ll
M llvm/test/Transforms/LoopVectorize/vplan-print-before-after.ll
Log Message:
-----------
[VPlan] Split simplifyRecipes into simplifyRecipes and combineRecipes (#221924)
Bringing it in line with InstSimplify and InstCombine, split up
simplifyRecipe into a function that modifies and creates recipes
(combineRecipe), and one that is analysis-only (simplifyRecipe).
This allows us to avoid adding simplficiation only folds to the worklist
in #213899.
The funclet.ll test no longer erases the constant-folded intrinsic call
because vputils::isDeadRecipe returns false.
Commit: bcef85f08355c76d1e7e98604ed68fa1d93c2022
https://github.com/llvm/llvm-project/commit/bcef85f08355c76d1e7e98604ed68fa1d93c2022
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move compress load/store helpers to SLPMemoryUtils (#222038)
Move the following BoUpSLP-independent masked-load/store compress
helpers out of SLPVectorizer.cpp into
SLPVectorizer/SLPMemoryUtils.{h,cpp}:
isMaskedLoadCompress (both overloads)
isMaskedStoreCompress
buildCompressMask, used only by isMaskedLoadCompress, moves alongside
them and stays file-local. isMaskedLoadCompress reads the file-local
SLPReVec cl::opt; the option stays static in SLPVectorizer.cpp and the
moved helper takes its value as an explicit bool parameter. Behavior is
unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI
Commit: 4f45ae199557874671659bf59b2875e06ec2a0ff
https://github.com/llvm/llvm-project/commit/4f45ae199557874671659bf59b2875e06ec2a0ff
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.h
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[SLP][modularisation][NFC] Move reduction match helpers to SLPReductionUtils (#222052)
Move the following BoUpSLP-independent reduction pattern-match helpers
out of SLPVectorizer.cpp into a new
SLPVectorizer/SLPReductionUtils.{h,cpp}:
getNonPhiOperand
isReductionCandidate
matchRdxBop, used only by these two, moves alongside them and stays
file-local. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI
Commit: 90e4efa54ff95f7895522fbe152a8da86bf4e446
https://github.com/llvm/llvm-project/commit/90e4efa54ff95f7895522fbe152a8da86bf4e446
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/unittests/Core/CMakeLists.txt
Log Message:
-----------
[BOLT][NFC] Fix CoreTests linking with shared libraries (#222225)
`CoreTests` directly uses `Triple` and `SubtargetFeatures` constructors
from `LLVMTargetParser` but does not declare the dependency. This causes
undefined-symbol errors with BUILD_SHARED_LIBS=ON.
https://github.com/llvm/llvm-project/pull/220581
Fix https://lab.llvm.org/buildbot/#/builders/218/builds/6464.
Commit: 7c4aac7e60f9f813df5693dcc735bda7873594f7
https://github.com/llvm/llvm-project/commit/7c4aac7e60f9f813df5693dcc735bda7873594f7
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M lldb/unittests/API/CMakeLists.txt
Log Message:
-----------
[lldb] Link API unit tests against LLVMTestingSupport. (#222206)
Changes to lldb have added a dependency on llvm::detail::TakeError, this
fails to link on my desktop without the dependency. Most other unittests
already link to LLVMTestingSupport.
Commit: 23074079b992a232aabca0d982ee15d818a5b4a7
https://github.com/llvm/llvm-project/commit/23074079b992a232aabca0d982ee15d818a5b4a7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/Session.h
M orc-rt/test/unit/bedrock/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add Session::attach for pre-mode ControllerAccesses. (#222227)
Allow clients to attach a session using a pre-constructed
ControllerAccess object. This allows clients to use non-trivial
construction methods (e.g. factories) to build ControllerAccess objects.
Commit: 786ba30e072e92648840ddbb5bc3f76e0af35b07
https://github.com/llvm/llvm-project/commit/786ba30e072e92648840ddbb5bc3f76e0af35b07
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[LLVM][AutoUpgrade] Support default args on undeclared multi-call upgrades (#216246)
When an `.ll` file contains multiple calls to an intrinsic without an explicit
declaration, only the first call is upgraded successfully, and the remaining
subsequent calls fail.
`LLParser` builds one temporary Function per call, so after the first
upgrade occupies the canonical name the later functions are uniquified
(eg. `llvm.foo.1`). The intrinsic ID was previously looked up using `F->getName()`,
which requires an exact name match. So, the uniquified names resolved to `not_intrinsic`,
causing the upgrade to return and the default arguments were not applied.
This patch fixes this issue by using the cached `F->getIntrinsicID()`,
which is set when the temporary function is created from the original name.
It also `rename(F)` before inserting the full declaration, so the temporary
function no longer occupies the canonical name.
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 1fddb91bf4ad2c3012c107f0cf792e2b2a5a9b67
https://github.com/llvm/llvm-project/commit/1fddb91bf4ad2c3012c107f0cf792e2b2a5a9b67
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/modfile86.f90
A flang/test/Semantics/modfile87.f90
A flang/test/Semantics/resolve132.f90
Log Message:
-----------
[Flang][Semantics] Diagnose missing MODULE prefix in submodule procedures (#197173)
Add a portability warning when a submodule procedure is missing the
MODULE prefix required by a MODULE PROCEDURE interface in its parent
module.
Commit: b53c11f42061e7e020af1a0e2a54f53b4a2dde3f
https://github.com/llvm/llvm-project/commit/b53c11f42061e7e020af1a0e2a54f53b4a2dde3f
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-08 (Tue, 08 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Support/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix Bazel build (#222232)
Add missing deps and update sharding for ROCDLDialect
Commit: 8d4c923371a73b9f60bee93d91c1cc0c3b49b89e
https://github.com/llvm/llvm-project/commit/8d4c923371a73b9f60bee93d91c1cc0c3b49b89e
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.md
R clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/function-size.md
R clang-tools-extra/docs/clang-tidy/checks/readability/function-size.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.md
R clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.md
R clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.md
R clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.md
R clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.md
R clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.md
R clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [2/5] (#221528)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the second part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: 30e244ed348addbc4611466404dd717d5906a1a7
https://github.com/llvm/llvm-project/commit/30e244ed348addbc4611466404dd717d5906a1a7
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.md
M clang-tools-extra/docs/clang-tidy/checks/readability/function-size.md
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.md
M clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.md
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.md
M clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.md
M clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.md
M clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.md
M clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.md
M clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [2/5] (#221529)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the second part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
---------
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Commit: c1872e7fd3307679a2da53f9d83de0ccf234b4ad
https://github.com/llvm/llvm-project/commit/c1872e7fd3307679a2da53f9d83de0ccf234b4ad
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M .mailmap
Log Message:
-----------
[mailmap] Add entry for Zeyi Xu (#222237)
Commit: 5e973ba5721412c7d31349e56172ed9086f4c5e2
https://github.com/llvm/llvm-project/commit/5e973ba5721412c7d31349e56172ed9086f4c5e2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/AST/absurdly_big_struct.cpp
Log Message:
-----------
[clang][test] Make new absurdly_big_struct test more targeted (#219897)
The previous version of `y()` used `c2[i]`, which can't be evaluated at
compile-time.
The emitted diagnostic depends on something calling
`ASTContext::getASTRecordLayout()` for `b`, which currently happens in
the constant evaluator. If the evaluator decides to evaluate `c2[i]`
before calling `getASTRecordLayout()`, the test fails since the
diagnostic is never emitted.
Fix this by simply using `c2[0]` instead.
Commit: 60969adcbc2fca5779580ca93ba00a7b06cc0e40
https://github.com/llvm/llvm-project/commit/60969adcbc2fca5779580ca93ba00a7b06cc0e40
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/FileSystem.h
Log Message:
-----------
[Support][FileSystem] Prefer `status` with `file_t` parameter. NFC. (#157581)
When searching the documentation for LLVM for `llvm::sys::fs::status`,
only the version with file descriptor can be found because the
documentation is built on the UNIX host and the file handle version is
defined out.
In reality, file handle version is more portable and should be displayed
instead. On UNIX, these two functions have the same underlying type,
thus it shouldn't matter which one is declared, and both versions are
still available on Windows for compatibility.
Commit: bf1d0038c9715c93e8d3ec95bf5923d57acd2b39
https://github.com/llvm/llvm-project/commit/bf1d0038c9715c93e8d3ec95bf5923d57acd2b39
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][LLVM] Add clmul intrinsics (#222113)
Assisted-by: gpt-5.6-sol
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: 79f1047ae03783dbcf7506b99d265e5a803fbd3c
https://github.com/llvm/llvm-project/commit/79f1047ae03783dbcf7506b99d265e5a803fbd3c
Author: Wenju He <wenju.he at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-O0-ep-callbacks.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/tools/opt/NewPMDriver.cpp
Log Message:
-----------
[PassBuilder] Add ThinLTO EP callbacks mirroring FullLinkTimeOptimizationEarly/Last (#221857)
Our downstream has a request to add customization pass into
ThinLinkTimeOptimizationEarlyEPCallback, but buildThinLTODefaultPipeline
has no equivalent EPCallback like buildLTODefaultPipeline does. This PR
add it and ThinLinkTimeOptimizationLastEPCallback as well.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: b61bc342396753be2c56dc6abb7d06cfc6be6b25
https://github.com/llvm/llvm-project/commit/b61bc342396753be2c56dc6abb7d06cfc6be6b25
Author: David Green <david.green at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
Log Message:
-----------
[AArch64] Update and regenerate vec-combine-compare-to-bitmask.ll. NFC (#222242)
Commit: b4b7775cfa79d7e3382657037eb037f8c7cb2428
https://github.com/llvm/llvm-project/commit/b4b7775cfa79d7e3382657037eb037f8c7cb2428
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Preserve volatile semantics for atomic operations (#220874)
This commit fixes the preservation of volatile semantics for atomic RMW
operations in CIR CodeGen.
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: e3a60a700dfa488adebd546705424aae7c8b3a35
https://github.com/llvm/llvm-project/commit/e3a60a700dfa488adebd546705424aae7c8b3a35
Author: Vishank Singh <vishanksinghh at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__ranges/lazy_split_view.h
A libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.compile.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.default.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.iter.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer/deref.pass.cpp
Log Message:
-----------
[libc++][ranges] Implement LWG4013: Make `lazy_split_view::outer-iterator::value_type` non-default-constructible (#221919)
Remove the default constructor of `outer-iterator::value_type` and make
the remaining constructor private (exposition-only), as required by LWG
4013.
Update the corresponding tests:
- `ctor.default.pass.cpp` and `ctor.iter.pass.cpp` are now deleted.
- `ctor.compile.pass.cpp` is added to verify `value_type` is not
default-constructible and its construction from iterator is not
available.
- Cases testing construction of `value_type` via `operator*` are moved
to `range.lazy.split.outer/deref.pass.cpp`.
Closes #105321
Commit: 580484b5032d55cf6adac0fe1274a4ee8eaa0c2a
https://github.com/llvm/llvm-project/commit/580484b5032d55cf6adac0fe1274a4ee8eaa0c2a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Remove unused getBaseArchNameAMDGCN (#222157)
This ended up unused for gfx1250-strict
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 1e744320ff27ee748c1a2a121fe226984efddc1b
https://github.com/llvm/llvm-project/commit/1e744320ff27ee748c1a2a121fe226984efddc1b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
Log Message:
-----------
GlobalISel: Drop AllowFPOpFusion from CombinerHelper FMA formation (#221918)
Only rely on the contract flags.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 27e964eceb2f15fb99618e73bd92f02f4a938816
https://github.com/llvm/llvm-project/commit/27e964eceb2f15fb99618e73bd92f02f4a938816
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SymbolNameSpec.h
Log Message:
-----------
[ORC] Require symbol name kind in SymbolNameSpec constructor. (#222238)
Require clients to spell out the naming level that SymbolNameSpecs are
expressed in. (An implicit default is a footgun, and adds limited
convenience)
Commit: 7bb9b13816ef9616425525651ea629f2138b194f
https://github.com/llvm/llvm-project/commit/7bb9b13816ef9616425525651ea629f2138b194f
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.mir
M llvm/test/MC/AMDGPU/gfx12_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
Log Message:
-----------
[AMDGPU] Rework pseudo-scalar transcendental inline constant restriction handling (#208459)
The f16 pseudo-scalar transcendental instructions do not support inline
constants on gfx12. The existing handling of this restriction is
incomplete. It involves checking the
hasNoF16PseudoScalarTransInlineConstants function in the right places.
For the SIInstrInfo::isInlineConstant function, for instance, this has
led to a situation where some overloads respect the restriction and
others do not. This approach also relies on completely disabling the
folding of constant operands. The machine code emission does still use
the inline constant encoding if it encounters a suitable operand.
Introduce a new "noinline" operand type and use it for the instruction
variant that is used on gfx12. This does also enable the use of literal
constants.
Commit: f4b84aa292909aa0e737cc0cdfa9eda7ef4bd4f2
https://github.com/llvm/llvm-project/commit/f4b84aa292909aa0e737cc0cdfa9eda7ef4bd4f2
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
A llvm/test/Transforms/LoopVectorize/RISCV/scatter-type-mismatch.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-flags.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-intrinsic.ll
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Consolidate VPIWithType and VPI (NFC) (#203019)
The extra ResultType has been absorbed into VPInstruction, and the
recipe classes can now be consolidated. The patch also fixes missing
flags-printing in the case of WideIVStep, and includes a test to guard
against bad changes, discovered during the review process.
Commit: 962a202be1f642f119921413293e8325e2e06757
https://github.com/llvm/llvm-project/commit/962a202be1f642f119921413293e8325e2e06757
Author: Machillka <machillka2007 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
Log Message:
-----------
[clangd] Place deduced return type hints after noexcept (#219829)
Deduced return type hints for functions and lambdas could appear before
a `noexcept` specifier, even though a trailing return type belongs after
the exception specification.
Use the end of the function type's local source range when it is
available. For lambdas without a function type location, keep the end of
the lambda introducer as a fallback.
Fixes clangd/clangd#2696
Assisted-by: Codex
Commit: a1f878adc64fee90fca87382a01013eca7e19b2b
https://github.com/llvm/llvm-project/commit/a1f878adc64fee90fca87382a01013eca7e19b2b
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/pr222002.cppm
Log Message:
-----------
[C++20] [Modules] Keep DeductionGuideDecl in the general lookup table (#222246)
Close https://github.com/llvm/llvm-project/issues/222002
The root cause of the problem is, the deduction guide was not in the
general lookup table. The fix is to move them into the general lookup
table. This should be fine as the DeductionGuide may not pollute the
name lookup results.
Commit: 6dc6c67b786260486641eb62546c34b48143e131
https://github.com/llvm/llvm-project/commit/6dc6c67b786260486641eb62546c34b48143e131
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/CMakeLists.txt
M libcxxabi/CMakeLists.txt
A runtimes/cmake/Modules/GetSanitizerFlags.cmake
Log Message:
-----------
[libcxx][libcxxabi][cmake] Deduplicate sanitizer flags function (#221757)
While experimenting with flang-rt builds I realised there were two
copies of this function.
We don't need it in flang-rt right now but I figure reducing duplication
is good anyway.
Commit: 3a8bd232cfa8c08a6c7e88801696af65ed1562ea
https://github.com/llvm/llvm-project/commit/3a8bd232cfa8c08a6c7e88801696af65ed1562ea
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/test/tools/llvm-offload-wrapper/offload-wrapper.ll
Log Message:
-----------
[OffloadWrapper] Use getPtrAdd() instead of getGetElementPtr() (#222014)
One case has a redundant zero-offset GEP. The other two just add
a byte offset in a convoluted way.
Commit: 1c1ea3793471775c5dc1bb2a4757a5ea32097967
https://github.com/llvm/llvm-project/commit/1c1ea3793471775c5dc1bb2a4757a5ea32097967
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/MustExecute.h
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[LoopSafetyInfo] Compute block colors lazily (NFC) (#221954)
Computing the block colors is fairly expensive, but only rarely actually
needed. We can delay computation to first use.
Fixes https://github.com/llvm/llvm-project/issues/221162.
Commit: 590a3b87dba125069e962956d562802a8173dc38
https://github.com/llvm/llvm-project/commit/590a3b87dba125069e962956d562802a8173dc38
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/HoistAllocas.cpp
M clang/test/CIR/Transforms/hoist-allocas.cir
Log Message:
-----------
[CIR] Reposition entry-block allocas ahead of control flow (#220496)
HoistAllocas returns early when an alloca was already in the entry
block, but being in the block is not the same as being ahead of the
control flow in it. The pass runs before FlattenCFG, which splits the
body at each structured control-flow op, so an alloca sitting after one
is left in a block that is no longer the entry block.
That matters because SROA only collects allocas from the entry block. An
alloca stranded behind a scope is invisible to it and never promoted, so
anything whose address it holds stays in memory.
Commit: ddf2077559587500f47e3666c696b7366bb36af0
https://github.com/llvm/llvm-project/commit/ddf2077559587500f47e3666c696b7366bb36af0
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/FinalizeISel.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
Log Message:
-----------
[GlobalISel] Fix duplicate finalizeLowering calls (NFC) (#221902)
Improves CTMark geomean -0.07% on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=d8b1a78ba013d5e687acc0e8bf00d3d77749f3db&stat=instructions:u
Assisted-by: codex
Commit: cdd1900816f625eb1f38a6e755c49ccadec56209
https://github.com/llvm/llvm-project/commit/cdd1900816f625eb1f38a6e755c49ccadec56209
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/test/Analysis/BasicAA/call-attrs.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.ll
M llvm/test/CodeGen/ARM/returned-ext.ll
M llvm/test/CodeGen/ARM/struct-byval-loop.ll
M llvm/test/CodeGen/M68k/multiple-return.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/RISCV/rvv/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SystemZ/args-14.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/VE/Scalar/call.ll
M llvm/test/CodeGen/VE/Scalar/va_callee.ll
M llvm/test/CodeGen/VE/Vector/fastcc_caller.ll
M llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
M llvm/test/CodeGen/X86/bool-zext.ll
M llvm/test/CodeGen/X86/return-ext.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll
M llvm/test/Transforms/DeadArgElim/deadexternal.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/PhaseOrdering/pr64289-tce.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
M llvm/test/Transforms/SimplifyCFG/hoist-sink-swifterror-store.ll
M llvm/unittests/IR/AttributesTest.cpp
Log Message:
-----------
[IR] Do not inherit ABI attributes from the callee (#207173)
Usually attributes that are missing on the call-site are inherited form
the callee instead. This is fine for optional optimization attributes,
but problematic for ABI-affecting attributes.
ABI attributes generally must be placed at the call-site as well,
because there is no callee to inherit from for indirect calls. Failing
to specify ABI attributes at the call-site generally indicates a bug.
The motivation for being stricter about this (apart from just being the
right thing to do) is to properly support cases where the attributes at
the call-site and the callee actually differ. Two examples I'm aware of
are:
* During cross-language LTO, it's possible to have one side use a `ptr`
argument and the other a `ptr byval(ptr)` argument. Both represent the
same ABI using different IR encodings, but you can't just inherit the
`byval` attribute from one to the other (because the byval case requires
an additional level of indirection in use of the argument).
* To fix our incompatibility with the x86-64 psABI, I believe we'll want
to do something like emit zeroext/signext at function returns and
call-site arguments only, so that we both don't assume incoming values
are zero/sign-extended, but still zero/sign-extend outgoing values. This
makes sure we still remain compatible with old Clang-generated object
files.
We've attempted to make a change like this previously, but ran into
substantial issues with missing call-site attributes on
compiler-inserted calls. The issue was particularly severe on s390x,
which requires zeroext/signext on more values than other architectures.
I believe that the situation here has improved a lot in the meantime,
with libcalls now inferring mandatory ABI attributes, and s390x also
using a noext attribute plus validation logic in the backend to detect
cases where the necessary attributes are missing.
-----
ABI attributes on call-sites must be queried using `hasABIParamAttr()`
and `hasABIRetAttr()` instead of `paramHasAttr()` and `hasRetAttr()`
now. Passing an ABI attribute to the latter two will result in an
assertion failure.
Commit: 8c3cb9c166e8f5ade26bc90a4a4cf5ec628f894f
https://github.com/llvm/llvm-project/commit/8c3cb9c166e8f5ade26bc90a4a4cf5ec628f894f
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-epilog-phi.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-gen-structure.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-loop-carried-mem.mir
Log Message:
-----------
[CodeGen][NPM] Port MachinePipeliner to NPM (#221676)
changes of note,
1. registers the pass with AMDGPUCodeGenPassBuilder::addPreRegAlloc()
2. Changes the core MachinePipeliner::run() method to return actual
"Changed" state
Commit: d0a59913f8cfc3041c9d284e36858aedbf8dfa0e
https://github.com/llvm/llvm-project/commit/d0a59913f8cfc3041c9d284e36858aedbf8dfa0e
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[IR] Remove obsolete visited sets from type queries (NFC) (#221743)
Recursive types have been rejected since 2024 (#114799), making the
visited sets in type queries unnecessary.
Improves CTMark geomean -0.08% on aarch64-O0-g. Also improves
compile-time slightly for several other targets.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=45c1423e7e38b6950ae760fc159ecb69cafdd691&stat=instructions%3Au
Assisted-by: codex
Commit: 531a8ac4c959dbdabcb4fea4a31beecde36bcdd9
https://github.com/llvm/llvm-project/commit/531a8ac4c959dbdabcb4fea4a31beecde36bcdd9
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-call-before-alloca.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-external-call.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at-recursive.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-block.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-if-phi.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-shared.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-no-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-same-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-shared.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope.ll
Log Message:
-----------
Add support for NSDI DebugScope, DebugNoScope and DebugInlinedAt (#218959)
Add support for NSDI
[DebugScope](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugScope),
[DebugNoScope](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugNoScope)
and
[DebugInlinedAt](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugInlinedAt).
DebugScope/DebugNoScope are region delimiters following the same region
rule as DebugLine/DebugNoLine. The two regions are tracked separately
because a DebugScope region could span several DebugLine regions, and
either can skip emission on a cache miss at different times.
DebugInlinedAt is not an region instruction, so it is emitted at module
scope. We allow recursive traversal when building them to support
chains.
The PR also adds a test showing a limitation in the DebugLine
deduplication that is at the DILocation pointer level which may lead to
duplicate opcodes.
Commit: c4cd7b73e27839103badad11e4eff9baf3d53d84
https://github.com/llvm/llvm-project/commit/c4cd7b73e27839103badad11e4eff9baf3d53d84
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M llvm/include/llvm/ADT/DenseMap.h
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/unittests/ADT/DenseMapTest.cpp
M llvm/utils/lldbDataFormatters.py
M third-party/unittest/googletest/include/gtest/internal/custom/gtest-printers.h
Log Message:
-----------
[ADT] Give DenseMapPair its own members instead of a std::pair base. NFC (#221853)
std::pair declares a copy assignment operator, so it is not trivially
copyable. destroyAll and copyFrom therefore ask about KeyT and ValueT
separately. Hold first and second directly.
Conversion to std::pair is explicit; insert also takes a bucket, and a
converting constructor keeps range insert working across pair types.
Co-authored-by: Kazu Hirata <kazu at google.com>
Commit: 5bf967cb132bf6700474813f961f657af6ef83ea
https://github.com/llvm/llvm-project/commit/5bf967cb132bf6700474813f961f657af6ef83ea
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M lld/test/ELF/lto/amdgcn-oses.ll
M lld/test/ELF/lto/amdgcn.ll
M lld/test/ELF/lto/amdgpu.ll
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
A llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
A llvm/test/CodeGen/AMDGPU/barrier-addrspace-dereference.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
A llvm/test/CodeGen/AMDGPU/null-named-barrier-gv.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-bad-absolute-symbol.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-wrong-gv-signature.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barriers-gfx12.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[RFC][AMDGPU] Add BARRIER address space (#209746)
Add a new BARRIER address space that is used for global variables that
are used to represent the barrier IDs in GFX12.5.
These barrier addresses just have values corresponding 1-1 to barrier
IDs. They are still implemented on top of LDS, but the offsetting
happens during an addrspacecast to generic, not whenever the barrier GV
is used.
The motivation for this is to make the relation between LDS and barrier
GVs explicit in the compiler. It does add a bit more complexity, but
that complexity was already there, just hidden by pretending barrier GVs
were actual LDS.
Commit: 59c5d5efb7343424d243e4a3972f7b24a07b115d
https://github.com/llvm/llvm-project/commit/59c5d5efb7343424d243e4a3972f7b24a07b115d
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/test/CodeGen/X86/branch-on-zero.ll
Log Message:
-----------
[X86] Enable preferZeroCompareBranch() (#219919)
This makes CodeGenPrepare reorganize code such as:
```
%c = icmp eq i32 %x, 10
br %c, then, else
%a = add i32 %x, -10
```
into
```
%a = add i32 %x, -10
%cmp = icmp eq %a, 0
%br %cmp, then, else
```
so that the zero-compare and branch gets lowered to a JCC based on the
flags from the arithmetic instruction.
This was already enabled for ARM, SystemZ and RISC-V, but seems a good
fit for X86 too, as mentioned in Issue #58636.
Commit: cdab5d7b28a38112cf91784ea7d404d2d4c6a68e
https://github.com/llvm/llvm-project/commit/cdab5d7b28a38112cf91784ea7d404d2d4c6a68e
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
Log Message:
-----------
[AMDGPU] Add synthetic apertures and use them for barriers (#209748)
Define what a synthetic aperture is, and adjust the barrier AS
to use this new system. This makes the barrier AS even safer to
use as now we can use all 32 bits of it without ever risking
hitting a valid address of any kind (LDS or outside LDS).
Commit: 1770693262b32d2216d7224fd412d78ab07e1bfa
https://github.com/llvm/llvm-project/commit/1770693262b32d2216d7224fd412d78ab07e1bfa
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Add scalar-type-infer assert for casts (NFC) (#222258)
Casts require the ResultTy to be passed: add an assert to
computeScalarTypeForInstruction to guard against incorrect usage.
Commit: 39ffb93f2cc8b24d0b8a588dc042a4d931273ada
https://github.com/llvm/llvm-project/commit/39ffb93f2cc8b24d0b8a588dc042a4d931273ada
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom fp-contract-model attributes from tests (#221925)
This attribute has never been consumed by upstream llvm,
or emitted by upstream clang. I can only guess this existed in
at least one downstream fork.
Commit: f796b25647e378a02482ef383f2db45804d8fb72
https://github.com/llvm/llvm-project/commit/f796b25647e378a02482ef383f2db45804d8fb72
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
A llvm/test/CodeGen/Mips/jalr-no-mangle.ll
Log Message:
-----------
[Mips] Strip \x01 no-mangle prefix from R_MIPS_JALR symbol name (#219427)
R_MIPS_JALR relocation did not strip the \x01 no-mangle prefix, causing
linker to see two different symbols: my_target_sym and
\x01my_target_sym.
Use Mangler::getNameWithPrefix() to process the symbol name.
Fix #207470.
Commit: 68a77b6106d375eabb8a7ec2585a0f3e0382c4a2
https://github.com/llvm/llvm-project/commit/68a77b6106d375eabb8a7ec2585a0f3e0382c4a2
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave32.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave64.hip
Log Message:
-----------
[CIR][AMDGPU] Implement inverse_ballot and read_exec codegen (#221661)
This commit implements the CIR codegen for the following AMDGPU
builtins:
- __builtin_amdgcn_inverse_ballot_w32
- __builtin_amdgcn_inverse_ballot_w64
- __builtin_amdgcn_read_exec
- __builtin_amdgcn_read_exec_lo
- __builtin_amdgcn_read_exec_hi
inverse_ballot_w32/w64 map to llvm.amdgcn.inverse.ballot. read_exec,
read_exec_lo and read_exec_hi read the exec mask as a ballot over an
all-true predicate, at least as wide as the wavefront.
Commit: 411a8eea0c269fff79700da1b3a9e71914718d4b
https://github.com/llvm/llvm-project/commit/411a8eea0c269fff79700da1b3a9e71914718d4b
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M openmp/runtime/src/i18n/en_US.txt
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_traits.cpp
M openmp/runtime/src/kmp_traits.h
M openmp/runtime/unittests/Traits/TestOMPTraitParser.cpp
Log Message:
-----------
[libomp] Parse OMP_DEFAULT_DEVICE with new device trait parser (#176166)
... but do not yet expose the new functionalities to the user. This is a
backward compatible update that is going to be followed by the step to
the OpenMP 6.0 semantics as defined in 4.3.8.
Commit: 9a14832f08551e15620440391910bc6919904775
https://github.com/llvm/llvm-project/commit/9a14832f08551e15620440391910bc6919904775
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Check a wide copy dst reg against the dst operand's regclass (#221789)
The wide-copy check added in #214561 tested the destination against the
source operand's class. No test change: V_MOV_B64's source class VS_64
also accepts a VGPR destination, which is why it currently works. Adding
@robertvirany.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: cd2f66534d425b3db62fea6df9703ffb87c6c3c5
https://github.com/llvm/llvm-project/commit/cd2f66534d425b3db62fea6df9703ffb87c6c3c5
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GISelWorkList.h
Log Message:
-----------
[GlobalISel] Lazily reserve worklist maps (NFC) (#221900)
Small -0.03% geomean improvement on CTMark aarch64-O0-g, but consistent
little improvements across the board.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=1729db67721b79fcb72469111d543e6df28c1185&stat=instructions:u
Assisted-by: codex
Commit: d6a334df0889026e0d91d3fc5adf452e0bbf0682
https://github.com/llvm/llvm-project/commit/d6a334df0889026e0d91d3fc5adf452e0bbf0682
Author: Petr Kurapov <petr.kurapov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/buffer-op-lds-operand.s
A llvm/test/tools/llvm-mca/AMDGPU/buffer-op-lds-operand.s
Log Message:
-----------
[AMDGPU][AsmParser]: Use dummy operand for parsing buffer LDS isAsync… (#219459)
… operand.
After the introduction of .async for LDS buffer ops variants, there a
similar mca crash addressed in
https://github.com/llvm/llvm-project/pull/165305. This parses a dummy
operand as a placeholder.
Commit: 4b8b168e8b6897fe3816949a316002ee8aff2e98
https://github.com/llvm/llvm-project/commit/4b8b168e8b6897fe3816949a316002ee8aff2e98
Author: Andreas Leitner <leitner.andi at googlemail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/read-register-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/read-write-register-src-flat-scratch-base-invalid-subtarget.ll
A llvm/test/CodeGen/AMDGPU/type-mismatch-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/write-register-src-flat-scratch-base.ll
Log Message:
-----------
[AMDGPU] Add getRegisterByName support for src_flat_scratch_base (#220560)
Expose `src_flat_scratch_base`, `src_flat_scratch_base_lo`, and
`src_flat_scratch_base_hi` through `llvm.read_register` /
`llvm.write_register`.
The implementation is basically the same as the existing named-register
support for `flat_scratch`
It errors out on targets without `FeatureGloballyAddressableScratch`
(pre-gfx1250).
Commit: 0c62d834abff9b180def1b32d3cf9c225d504994
https://github.com/llvm/llvm-project/commit/0c62d834abff9b180def1b32d3cf9c225d504994
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Record estimated branch probabilities on VPlan0 for cost modeling (#216172)
Update execution frequency/probability tracking in VPlan to also include
estimates from BFI, and use the information in VPlan for VPlan-based
cost computations, removing another remaining IR-based lookup.
We need to differentiate between estimated and concrete profile
information when annotating branches with information from BFI (using
custom !vplan.prof.estimated metadata instead of !prof) and track if a
computed frequency contains any estimates using an extra bool which is
also encoded in the metadata (so we do not synthesize !prof
for such frequencies during codegen).
The new code should only request BFI if needed, and compile-time impact
should be in the noise:
https://llvm-compile-time-tracker.com/compare.php?from=8436dd4a2bfe57d0b3fb6c9c11c69d75c1d1bccb&to=4d60694fed5e5765d4f5a2a72aac7b8674e512e2&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/216172
Commit: 17b659b8444a957ea2b42cb4e91d65897fee7558
https://github.com/llvm/llvm-project/commit/17b659b8444a957ea2b42cb4e91d65897fee7558
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] [unittests] Cover what the memory cache reads from the inferior (#221015)
`MemoryCache`'s tests checked how many bytes a read returned, never
which requests the cache made to get them, so a change to the request
shape could not fail a test. Add four tests over the request log
`DummyProcess` now keeps.
Two assert what the cache sends: `TestReadRequestShape` checks the
address and size of every request, and `TestReadRangesFromCaches` checks
that a range the cache already holds is served without reaching the
inferior.
`TestFlushAtTheTopOfTheAddressSpace` pins `Flush`'s current behavior at
the wrap, not correct behavior. When a flushed range wraps past
`UINT64_MAX`, `Flush` counts cache lines only from the start of the
range to the top of the address space, never the lines the wrapped
portion covers between address 0 and the range's end. This bug predates
this change; the following cache-partition change fixes it, and this
test's assertion that address 0 survives the flush will need to flip
once
that lands.
`TesetMemoryCacheRead` gains one assertion, that a line whose reply
falls short leaves the error alone, next to the two requests it already
checks.
Also add a `CacheTestProcess` helper and use it in the seven cache
tests, so each states its setup in two lines rather than thirteen, and
expose the L2 map next to L1 for assertions.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 7f0421be7f82a64796fa002b85bedbd6eaacc57f
https://github.com/llvm/llvm-project/commit/7f0421be7f82a64796fa002b85bedbd6eaacc57f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
Log Message:
-----------
[AMDGPU] Remove unsound idempotent atomicrmw to atomic load lowering (#218377)
An idempotent atomicrmw still holds a slot in the modification order, so
folding it to a plain load can drop synchronization the memory model
requires
Commit: 8e84c4a901a7fe6ba80b3c305b200c3e9bbc4606
https://github.com/llvm/llvm-project/commit/8e84c4a901a7fe6ba80b3c305b200c3e9bbc4606
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom ssp-buffers-size attributes from tests (#221928)
"ssp-buffers-size" was never a real function attribute. There is
"stack-protector-buffer-size". This may have existed in a downstream
fork, but it's also irrelevant for these tests.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 4af454042b636fc6f7b1b99e178247989863b8e5
https://github.com/llvm/llvm-project/commit/4af454042b636fc6f7b1b99e178247989863b8e5
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/docs/Remarks.md
M mlir/include/mlir/IR/Remarks.h
M mlir/lib/IR/Remarks.cpp
M mlir/unittests/IR/RemarkTest.cpp
Log Message:
-----------
[MLIR][Remark] Expose RemarkEngine filter queries (#222262)
Expose following filter APIs publicly:
```
| Query | Answers |
|----------------------------------------------|------------------------------------------------------|
| `isAnyRemarkEnabled()` | At least one category filter is active |
| `isAnyRemarkEnabled(category)` | Some kind of remark is enabled for the category |
| `isRemarkEnabled(kind, category)` | Remarks of `kind` are enabled for the category |
| `is{Passed,Missed,Analysis,Failed}OptRemarkEnabled(category)` | Per-kind query |
```
Assisted by Claude Fable 5.1
Commit: 468a7300de067ec0581f51cbfb56421f4b13eaf0
https://github.com/llvm/llvm-project/commit/468a7300de067ec0581f51cbfb56421f4b13eaf0
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Host/common/NativeProcessProtocol.cpp
Log Message:
-----------
[lldb][lldb-server] Log possible breakpoint PC in hex (#222285)
Commit: e87fb92a9719c1f1f0112e108f9444bb5b99ac49
https://github.com/llvm/llvm-project/commit/e87fb92a9719c1f1f0112e108f9444bb5b99ac49
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
Log Message:
-----------
[NFC][LLVM][AArch64] Add test coverage for scalar bfloat constrained intrinsics. (#222076)
Tests are a clone of fp-intrinsics-fp16.ll with s/half/bfloat/ applied
and failing tests (fcmp and i128 variants) removed.
Commit: 4e7628708d6d09c4051fd1fa54cb6b517db326fe
https://github.com/llvm/llvm-project/commit/4e7628708d6d09c4051fd1fa54cb6b517db326fe
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Log Message:
-----------
[GlobalISel] Restrict value offset tracking to aggregates (NFC) (#221287)
The single-vreg fast path added in d30d5fe8dd5d3 still populated an
offset list, even though offsets are only necessary for aggregate
values.
This wasn't the only place doing so. Avoid creating or updating offset
lists for non-aggregate values and add an assertion to enforce this
invariant.
Small -0.04% geomean improvement on CTMark aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=2aeb9d236a2cacf8ab93722b8b629243384bae68&stat=instructions:u
Assisted-by: codex
Commit: cc38b29781cbc0a2b525a18833adf61c51375af2
https://github.com/llvm/llvm-project/commit/cc38b29781cbc0a2b525a18833adf61c51375af2
Author: Tianyi Chen <diannaaav at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/Misc/cc1as-darwin-target-variant-sdk-version.s
M clang/test/Misc/cc1as-darwin-target-variant-triple.s
M llvm/test/MC/MachO/diff-with-two-sections.s
M llvm/test/MC/MachO/weakdef.s
M llvm/test/MC/MachO/zero-space.s
A llvm/test/tools/llvm-readobj/MachO/cpu-capabilities.yaml
M llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
M llvm/test/tools/llvm-readobj/MachO/file-headers.test
M llvm/tools/llvm-readobj/MachODumper.cpp
Log Message:
-----------
[llvm-readobj] Display Mach-O CPU capability bits (#221617)
The Mach-O file header output masks the capability bits out of
`cpusubtype`
without printing them separately, so this information is missing from
the
output.
Add a `CpuCapabilities` field to print the high byte in hexadecimal,
matching the numeric representation used by `llvm-objdump`.
Fixes #80198.
Assisted-by: OpenAI Codex (implementation, tests, and initial
description).
Commit: 6a20cac62912114cbc9208b565cf88fd73f21377
https://github.com/llvm/llvm-project/commit/6a20cac62912114cbc9208b565cf88fd73f21377
Author: Tianyi Chen <diannaaav at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-objdump.md
M llvm/tools/llvm-objdump/ObjdumpOpts.td
Log Message:
-----------
[llvm-objdump] Document selecting symbols containing commas (#221619)
The documentation does not clearly distinguish how
`--disassemble-symbols=`
and `--disassemble=<symbol>` handle their arguments, making it easy to
overlook how to select symbols whose names contain commas.
Update the command guide and help text to explain that the former
accepts
a comma-separated list of symbols, while the latter accepts a single
symbol
name and may be specified multiple times.
Assisted-by: OpenAI Codex
Commit: 95dfce1739bf2719f89a9f6673eb5b23f2d32b09
https://github.com/llvm/llvm-project/commit/95dfce1739bf2719f89a9f6673eb5b23f2d32b09
Author: David Green <david.green at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-neon-instructions.s
Log Message:
-----------
[AArch64] Add Neoverse V3 scheduling info for v264 frecpe (#221917)
This was missing, falling back to the default information. It should be
like the others.
This is the Neoverse V3 equivalent of #219115
Commit: 3d2f88da6e15645080d852d52c32435b62aca97b
https://github.com/llvm/llvm-project/commit/3d2f88da6e15645080d852d52c32435b62aca97b
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-masked-op-fusion.ll
Log Message:
-----------
[X86] Fix commuteSelect miscompile with double-used condition value (#219436)
The multi-use loop iterated `Cond->users()` which yields duplicates when
a select uses the condition in multiple operand positions. This caused a
double-commute and iterator corruption, leaving other selects with an
inverted condition but unswapped operands.
Remove the in-place mutation loop and return a new select node. The DAG
combiner visits each select independently and `getSetCC` CSEs the
inverted condition so all commuted selects share it.
Commit: 4200a8e34e488aaf9c1b5b1966aa4c1bbec8b4d5
https://github.com/llvm/llvm-project/commit/4200a8e34e488aaf9c1b5b1966aa4c1bbec8b4d5
Author: Oscar Priego <oscar.priegov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
M llvm/test/CodeGen/X86/compress-evex-vpmov-blendv.mir
M llvm/test/CodeGen/X86/compress-evex-vpmov-kill.mir
Log Message:
-----------
[X86] Compress masked VPBLENDM using VBLENDV (#221838)
Fixes #221678.
This extends the X86 EVEX compression pass to recognize compatible
`VPMOVD2M/VPMOVQ2M + VPBLENDMD/VPBLENDMQ` patterns and replace them with
the corresponding VEX `VBLENDVPS/VBLENDVPD` instruction when the mask
width and element granularity match.
For example, the reported AVX-512 sequence:
```asm
vpslld $31, %xmm0, %xmm0
vpmovd2m %xmm0, %k1
vpblendmd %xmm1, %xmm2, %xmm0 {%k1}
```
is reduced to:
```asm
vpslld $31, %xmm0, %xmm0
vblendvps %xmm0, %xmm1, %xmm2, %xmm0
```
The fold is restricted to compatible producer/consumer pairs.
Mixed-width or mixed-element-granularity cases such as
`VPMOVD2MZ128 + VPBLENDMQZ256` are intentionally left unchanged.
The MIR coverage includes:
- 128-bit and 256-bit dword/qword positive cases.
- An incompatible-width negative case.
- Kill/liveness preservation for the reused vector mask.
The existing `avx512-regcall-NoMask.ll` codegen checks are also updated
to reflect the optimized `VBLENDVPS` sequence produced by this fold.
Local validation includes:
- `compress-evex-vpmov-blendv.mir`
- `compress-evex-vpmov-kill.mir`
- `avx512-regcall-NoMask.ll`
- `compress-evex-sign-mask.mir`
- `evex-to-vex-compress.mir`
- `bitcast-sign-mask.ll`
AI-assisted tools were used during investigation and development.
The resulting changes were reviewed, modified, validated, and tested by
me.
Signed-off-by: Oscar Priego Verdugo <oscar.priegov at gmail.com>
Commit: 79230407a26e8d7de47e4c8e7b7f7b0d63bee00c
https://github.com/llvm/llvm-project/commit/79230407a26e8d7de47e4c8e7b7f7b0d63bee00c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[clang][AST][NFC] Make ASTContext::isPFPField() static (#220265)
Commit: 09520670fec80a117bb34307ef684cf8bafbe71b
https://github.com/llvm/llvm-project/commit/09520670fec80a117bb34307ef684cf8bafbe71b
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/test/API/commands/frame/recognizer/step-through/TestFrameRecognizerStepThrough.py
Log Message:
-----------
[lldb] Match frame recognizers by function when the frame has no symbol (#222060)
A frame can have a function without having a symbol: a PE/COFF image
built with DWARF carries no symbol table at all, so `symctx.symbol` is
null on Windows while `symctx.function` resolves fine from the debug
info. `GetRecognizerForFrame` bailed out on `!symbol`, so no frame
recognizer ever matched there.
Fall back to the function's start address when there is no symbol. The
symbol still wins when both are present, so this is a no-op on
ELF/Mach-O.
This fixes `TestFrameRecognizerStepThrough.py`.
Commit: 48ae4d3b158042b4ad77a6b23aa412aedac7105a
https://github.com/llvm/llvm-project/commit/48ae4d3b158042b4ad77a6b23aa412aedac7105a
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__optional/optional_ref.h
M libcxx/test/std/utilities/optional/optional.monadic/transform.pass.cpp
Log Message:
-----------
[libc++] Fix `optional<T>::transform` into `optional<T&>` (#221506)
Resolves #220332
- Make `optional<T>` a friend of `optional<T&>`, and add tests.
Commit: 6b728014512aefa838e3b1674355589c901cdde2
https://github.com/llvm/llvm-project/commit/6b728014512aefa838e3b1674355589c901cdde2
Author: Alexander Wilson <rdtscp at meta.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.h
A bolt/test/RISCV/call-relocation-pair.s
A bolt/test/RISCV/unsymbolized-call-edge.s
A bolt/test/RISCV/unsymbolized-call-entry.s
A bolt/test/RISCV/unsymbolized-call.s
A bolt/test/RISCV/unsymbolized-long-jump.s
Log Message:
-----------
[BOLT][RISCV] Fix AUIPC/JALR call rewriting (#216882)
This builds on the RISC-V decoder support from #217550 and the BOLT
target symbolizer and GOT relocation handling from #217944, both of
which are now merged.
`R_RISCV_CALL` and `R_RISCV_CALL_PLT` cover an AUIPC/JALR pair, but BOLT
treated them as four-byte relocations and decoded only the AUIPC
immediate. Read both instructions and combine their signed high and low
immediates so relocated call targets retain the low 12 bits.
LTO can also leave linker-resolved intra-section AUIPC/JALR calls
without relocations. On RV64, recognize standard call and tail-call
pairs during disassembly, reconstruct the target (including JALR
target-bit clearing), and attach an exact entry-point symbol before
function reordering. Alternate link-register preservation is provided by
the merged #218408.
This follows the RISC-V Unprivileged ISA sections on AUIPC and JALR:
https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html
It also follows the RISC-V ELF psABI procedure-call relocations:
https://riscv-non-isa.github.io/riscv-elf-psabi-doc/#_relocations
Tests cover relocation-backed calls, relocation-free RV64 calls and tail
calls, exact function entry points, signed offsets, JALR target-bit
clearing, and rejection of near matches.
Validation:
- Rebuilt `llvm-bolt`, `llvm-mc`, `llvm-objdump`, `llvm-readelf`, and
`lld`.
- All 658 tests in `bolt/test/RISCV` and `llvm/test/MC/RISCV` pass on
current `main`.
**Scope:** Relocation-free recovery is intentionally RV64-only. RV32
XLEN-wrapped target arithmetic remains out of scope. Symbolizer
infrastructure and GOT correctness are provided by #217944 rather than
this PR.
Assisted-by: Codex
Commit: accf16eec44ec81449fe8cbf0ddd53c1ff567247
https://github.com/llvm/llvm-project/commit/accf16eec44ec81449fe8cbf0ddd53c1ff567247
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/Lex/Lexer.h
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
A clang/test/Parser/cuda-operator-lesslessless.cu
Log Message:
-----------
[clang][CUDA/HIP] Fix parsing of `operator<<<...>` (#218384)
In CUDA mode Lexer merges `<<<` into a single token and Parser fails to
recognize that it is actually a template specialization of `operator<<`
and not a CUDA kernel call expression. Split `<<<` following operator
token to `<<` and `<`.
Commit: be7f0c897238a2d4ae742d1b6db50283069bdeef
https://github.com/llvm/llvm-project/commit/be7f0c897238a2d4ae742d1b6db50283069bdeef
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
Log Message:
-----------
llvm: Remove phantom relocation-model attributes from tests (#221931)
"relocation-model" was never a real function attribute.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: a86b58566a2581160938db41fa258ff84457b80c
https://github.com/llvm/llvm-project/commit/a86b58566a2581160938db41fa258ff84457b80c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lld/test/ELF/amdgpu-tid.s
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/AMDGPU/xnack-mask.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-cov5.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx90a.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx950.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
Log Message:
-----------
AMDGPU: Remove xnack and sramecc subtarget features (#212792)
Now that these are controlled by module flags, the subtarget
features were just used for assembler and disassembler controls.
Now that the assembler and disassembler can infer these from
the e_flags and target directives, they are no longer necessary.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: ebeb871f9a5fd31f088b7fb952c99cc4da17eeb1
https://github.com/llvm/llvm-project/commit/ebeb871f9a5fd31f088b7fb952c99cc4da17eeb1
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
Log Message:
-----------
[MLIR][XeGPU] Restrict XeGPUPropagateLayout analysis scope (#221793)
This PR prevents concurrent access to traversal and mutation of the
shared IR by restricting the walk scope to determine program order
within each gpu.module.
Previously, although the pass is scoped to a single gpu.module, this
walk climbs all the way up to the enclosing top-level builtin.module and
traverses the entire module — including sibling gpu.modules. When there
is multiple gpu.modules, it causes concurrent traversal and mutation of
the shared IR and eventually leads to a segfault.
Assisted-by: Claude
Commit: b3e641630cbe0c25022e6033bdfc1cbf1fc215b4
https://github.com/llvm/llvm-project/commit/b3e641630cbe0c25022e6033bdfc1cbf1fc215b4
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/SemaCXX/dllimport.cpp
Log Message:
-----------
[Clang](NFC) Rewrite test/SemaCXX/dllimport.cpp as done for dllexport.cpp (#191391)
Commit: 2189cea443f1bb69861af2a1994b11f5aaa5be68
https://github.com/llvm/llvm-project/commit/2189cea443f1bb69861af2a1994b11f5aaa5be68
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/select-first-index-narrow.ll
A llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
A llvm/test/Transforms/LoopVectorize/select-first-index-narrow.ll
Log Message:
-----------
[LV] Add tests for argmin/argmax with a narrow index and ptr IVs (NFC) (#222290)
Extend test coverage for argmin/argmax with truncated IVs and pointer
inductions.
Commit: ef208564acbfc9e8fef0d6c436bac1681f1a6778
https://github.com/llvm/llvm-project/commit/ef208564acbfc9e8fef0d6c436bac1681f1a6778
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
A flang/unittests/Optimizer/AliasAnalysisRecursiveEffectsCacheTest.cpp
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[fir][aa] Add opt-in cache for use by fir `AliasAnalysis` clients (#221973)
Adds `AliasAnalysisRecursiveEffectsCache`, an opt-in cache that memoizes
per-operation read/write summaries so that `getModRef` on an operation
with `HasRecursiveMemoryEffects` does not re-walk its nested regions on
every query.
This is independent of the `getSource()` memoization added separately:
that one is keyed on (value, flags) and answers "what memory does this
value refer to", while this one is keyed on the operation and answers
"what does this operation and everything nested in it read and write".
LICM enables both, since it only hoists pure-read ops and so invalidates
neither.
Commit: 5dc123502ac6ef7de22c67685fe3519e88c51ce4
https://github.com/llvm/llvm-project/commit/5dc123502ac6ef7de22c67685fe3519e88c51ce4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
PowerPC: Drop AllowFPOpFusion from isProfitableToHoist (#221347)
Commit: 173ccf9996f99fd93347ca7f245d954979c811b7
https://github.com/llvm/llvm-project/commit/173ccf9996f99fd93347ca7f245d954979c811b7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
Log Message:
-----------
[SLP]Exclude splat gather subtrees from the store chain retry size
The tree size recorded for a failed store chain attempt gates the
larger-VF retries. The splat gather subtrees are auxiliary to the store
tree and inflated the recorded size, so the deviation check skipped the
VF=4 retry and the chain fell back to VF=2 or scalar.
Reviewers: bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/221241
Commit: bb3c1628511349afbc0a0a82ec690a2da7020b63
https://github.com/llvm/llvm-project/commit/bb3c1628511349afbc0a0a82ec690a2da7020b63
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
Log Message:
-----------
[SLP]Drop unprofitable splat gather subtrees
The keep/drop check ran only when trimming changed something and
ignored the splat emission cost on both sides. Run it in both paths
with the actual costs: keep the subtree if its price plus extracts plus
the reusing gathers' current costs is not worse than re-emitting those
gathers without it. Exclude splat roots from the main trimming loop.
Fixes the perf regression from #220250, reported in https://github.com/llvm/llvm-project/pull/220250?email_source=notifications&email_token=ABI45DSHUYRFN4NA4DILB5T5NZTZTA5CNFSNUABFM5UWIORPF5TWS5BNNB2WEL2JONZXKZKDN5WW2ZLOOQXTKNJWG4ZTSMBZGUYKM4TFMFZW63VMON2GC5DFL5RWQYLOM5S2KZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#issuecomment-5567390950.
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/221717
Commit: 82d63a1ee6083c0fda0d0ef795edce180dba298a
https://github.com/llvm/llvm-project/commit/82d63a1ee6083c0fda0d0ef795edce180dba298a
Author: Alexander Wilson <rdtscp at meta.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/test/RISCV/call-relocation-pair.s
Log Message:
-----------
[NFC][BOLT][RISCV] Fix call-relocation-pair test after NOP removal (#222308)
The test introduced by https://github.com/llvm/llvm-project/pull/216882
expects temporary NOPs from FixRISCVCalls in the emitted binary.
https://github.com/llvm/llvm-project/pull/221965 marks those NOPs for
removal, causing FileCheck to match trailing alignment padding instead
of the rewritten calls.
This caused the call-relocation-pair.s failure on
[bolt-aarch64-ubuntu-dylib, build
6378](https://lab.llvm.org/buildbot/#/builders/216/builds/6378).
Check emitted calls independently of the temporary NOPs and verify the
forward-call target symbols. Preserve the intermediate-pass NOP checks.
Validation: all five test RUN commands pass with local BOLT builds that
retain and remove the temporary NOPs. The original test reproduces the
reported FileCheck failure with the NOP-removing build.
Commit: a6aa47a28dcffa1197fd42cd5b61cc8d5693e0f7
https://github.com/llvm/llvm-project/commit/a6aa47a28dcffa1197fd42cd5b61cc8d5693e0f7
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
Log Message:
-----------
[GlobalISel] Avoid unnecessary call setup work (NFC) (#221892)
Avoid processing call-site attributes twice: once in the attribute
helpers (now dead and deleted) and again in setArgFlags. Let setArgFlags
handle the call-site attributes. Also skip return setup for void calls.
Small -0.03% geomean improvement on CTMark aarch64-O0-g, but consistent
little improvements across the board.
https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=d2dfca2db156c259a66cfe2c749f786fec2946f0&stat=instructions:u
Assisted-by: codex
Commit: 9a5a9a8a59bbfd0253ed005e231509de4436f2e8
https://github.com/llvm/llvm-project/commit/9a5a9a8a59bbfd0253ed005e231509de4436f2e8
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/docs/Remarks.md
A mlir/include/mlir/Remark/LLVMRemarkImport.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/lib/Remark/CMakeLists.txt
A mlir/lib/Remark/LLVMRemarkImport.cpp
M mlir/lib/Target/LLVM/CMakeLists.txt
M mlir/lib/Target/LLVM/ModuleToObject.cpp
A mlir/test/Dialect/GPU/module-to-binary-nvvm-remarks.mlir
M mlir/unittests/CMakeLists.txt
A mlir/unittests/Remark/CMakeLists.txt
A mlir/unittests/Remark/LLVMRemarkImportTest.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
Log Message:
-----------
[MLIR][Remark] Import LLVM optimization remarks into the remark engine (#222300)
Collect LLVM side of remarks with MLIR's remark infra.
LLVM passes emit their own [optimization
remarks](https://llvm.org/docs/Remarks.html) and MLIR has own. This PR
bridges MLIR and LLVM remarks.
`ModuleToObject` installs a `remark::LLVMToMLIRDiagnosticHandler` on the
`llvm::LLVMContext` it compiles with, which imports these remarks into
the remark engine: the category is the LLVM pass name prefixed with
`llvm-`, the LLVM remark name becomes the name, the message is stored
under the `Remark` argument and the structured LLVM arguments are copied
as metrics. The remark filters therefore select LLVM remarks by pass
name, and `llvm-.*` selects all of them.
Assisted by Claude Fable 5.1
---------
Co-authored-by: Claude Fable 5.1 <noreply at anthropic.com>
Commit: 2061c23717d5cc14215b41e4fbde578375150c79
https://github.com/llvm/llvm-project/commit/2061c23717d5cc14215b41e4fbde578375150c79
Author: David Green <david.green at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
Log Message:
-----------
[AArch64] Improve scheduling info for WHILE instruction (#221930)
They should have a throughput of 2, only using a single M microop.
This is the V3 equivalent of #219122.
Commit: 87d9c3c24ff5941ac08799850a6549b561c98a81
https://github.com/llvm/llvm-project/commit/87d9c3c24ff5941ac08799850a6549b561c98a81
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/support/Mangling.h
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/support/ManglingTest.cpp
Log Message:
-----------
[orc-rt] Add Mangling.h with platform symbol name mangling (#222315)
This implements a cut-down version of the LLVM equivalent (in
llvm/include/llvm/ExecutionEngine/Orc/Shared/Mangler.h): SymbolNameSpec
pairs a name with a kind (assembly, C). Mangling functions
(withMangledNameDo, mangledCopy) apply mangling to SymbolNameSpecs based
on the symbol name kind.
These utilities will be used to report symbols (e.g. controller
interface symbols) in the platform's native mangling, so that linking
against them requires no special handling.
Commit: e5d8a1573950731a7e8c2163e4b9946d0556768f
https://github.com/llvm/llvm-project/commit/e5d8a1573950731a7e8c2163e4b9946d0556768f
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__vector/vector_bool.h
M libcxx/include/vector
M libcxx/test/std/containers/sequences/vector.bool/emplace.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/emplace_back.pass.cpp
Log Message:
-----------
[libc++] Backport resolution of LWG2187 to C++11 (#222006)
libc++ has LWG2187 implemented in
2d6e2834a8abcce862ef17c44f62e4de41662748 but only since C++14 mode.
Usually, resolution of an LWG issue should be treated as a Defect Report
and applied to old modes. In the case of LWG2187, the resolution should
be applied to C++11.
Commit: 3e78191c307fc59521b7dd0820ce85f34339f90a
https://github.com/llvm/llvm-project/commit/3e78191c307fc59521b7dd0820ce85f34339f90a
Author: Alex <leha-bot at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[cpack][NSIS Installer] Make installer DPI-Aware (#128470)
See
https://cmake.org/cmake/help/latest/cpack_gen/nsis.html#variable:CPACK_NSIS_MANIFEST_DPI_AWARE
for details.
Commit: 10d4bdf93a82fb290b8c55da6ed19ff54da67296
https://github.com/llvm/llvm-project/commit/10d4bdf93a82fb290b8c55da6ed19ff54da67296
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__hash_table
M libcxx/include/__tree
M libcxx/include/__utility/try_key_extraction.h
M libcxx/test/std/containers/associative/set/emplace.pass.cpp
M libcxx/test/std/containers/unord/unord.set/emplace.pass.cpp
Log Message:
-----------
[libc++] Opt `std::*set` out of map key extraction optimization (#220452)
PR #154512 (relanded by #155565) removed `__can_extract_map_key`, which
had a blanket opt-out for `std::*set`s. The new logic does not have that
opt-out, leading to `std::set`s being incorrectly constructed.
The new regression tests demonstrate this, but essentially the idea is:
1. Have `std::set<T> foo;`
2. Call `foo.emplace(some_t,
arg_that_influences_comparisons_or_hashes);`
3. The emplace will internally search using `some_t` as the key, *not*
`T(some_t, arg_that_influences_comparisons_or_hashes);`
This opts out `std::*set` from this optimization to match previous
behavior.
Tests and fix were produced by an LLM. I reviewed them and they seem
reasonable to me, though I don't have a strong background in libc++
testing conventions.
(Credit to Deva S, our partner who tracked this down. Unfortunately I
don't know his GH handle)
Fixes #220451
Commit: 4f1d2ab0a9e57909a30b9fdce73afb00d7e7d686
https://github.com/llvm/llvm-project/commit/4f1d2ab0a9e57909a30b9fdce73afb00d7e7d686
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/test/Dialect/LLVMIR/parameter-attrs-invalid.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][ABI] Add the nofreeobj param attr to the LLVM dialect (#222137)
Since #218404 clang marks every indirect argument nofreeobj rather than
nofree. LLVM allows it on returns too.
Assisted-by: Cursor / claude-opus-5
Commit: 908172d3d701ff198749418e89f3f9917fa773e1
https://github.com/llvm/llvm-project/commit/908172d3d701ff198749418e89f3f9917fa773e1
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/src/__support/tlsf_table.h
M libc/test/src/__support/tlsf_table_test.cpp
Log Message:
-----------
[libc][baremetal] default NUM_TABLE_ENTRIES to a fixed value of 3 in TLSF (#221807)
Commit: ff6ab759dbfd69a7b8138ed782f09dc979bad72e
https://github.com/llvm/llvm-project/commit/ff6ab759dbfd69a7b8138ed782f09dc979bad72e
Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm-c/lto.h
M llvm/tools/lto/lto.cpp
M llvm/tools/lto/lto.exports
Log Message:
-----------
[llvm-c][lto] Add lto_runtime_lib_symbols_list_for_triple (#221217)
The TableGen-generated `setTargetRuntimeLibcallSets` that is reached via
`getRuntimeLibcallSymbols` has no unconditional block — every branch is
arch-gated and returns, so an unknown triple sets nothing available, and
the list of symbols comes back empty.
This patch adds a second entry point to the C LTO API that takes a
triple and passes it along.
Bump `LTO_API_VERSION`.
Commit: 5282d0c073beba1c2569222ede55ff943d46fcef
https://github.com/llvm/llvm-project/commit/5282d0c073beba1c2569222ede55ff943d46fcef
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
Log Message:
-----------
[Clang] Skip invalid fields when synthesizing defaulted comparisons (#221570)
Fixes #194605
`CheckFieldDecl` already rejects `int [[clang::address_space(1)]] i;`
and marks the field invalid, but `DefaultedComparisonVisitor` still
visited it when synthesizing the defaulted `operator==`.
`BuildFieldReferenceExpr` then tripped the
`!MemberQuals.hasAddressSpace()` assertion. Both
`__is_trivially_equality_comparable(S)` and a plain `a == b` reach that
path.
`visitSubobjects` now skips invalid fields, the same way
`SpecialMemberVisitor` and the copy-assignment synthesis already do.
That covers the analyzer and the synthesizer together, and the assertion
stays in place since it still holds for valid code.
Commit: c8460a91f629145012bd1adfc05b08aedfbc7b4d
https://github.com/llvm/llvm-project/commit/c8460a91f629145012bd1adfc05b08aedfbc7b4d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/recurrence.ll
Log Message:
-----------
[ValueTracking] Clarify KnownBits recurrence code (#222266)
While reviewing a related PR, I found the R/L variable naming here very
confusing. Use Start and Step instead, matching the parameter names of
matchSimpleRecurrence().
Also clarify why the context adjustment for the step is necessary, and
add a test that would miscompile if it isn't performed.
Commit: 837a4eab85a2f4e638034a254a2bc74b1986b2ac
https://github.com/llvm/llvm-project/commit/837a4eab85a2f4e638034a254a2bc74b1986b2ac
Author: Linisha <linisha232 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
A llvm/test/CodeGen/X86/eh-return-shstk-32.ll
A llvm/test/CodeGen/X86/eh-return-shstk.ll
Log Message:
-----------
[X86] Avoid invalid ret for EH_RETURN with SHSTK (#219322)
## Summary
Fixes #215298
When lowering `llvm.eh.return` on x86, LLVM rewrites the normal stack
return
address and then emits `ret`. This is incompatible with CET shadow
stacks:
the shadow stack still contains the original return address, so `ret`
raises
a control-protection fault.
This affects code using `__builtin_eh_return` with: -mshstk
-fcf-protection=full
## What changed
When SHSTK is enabled, the x86 `EH_RETURN` pseudo-instruction now
expands to:
```asm
movq %rcx, %rsp
popq %rcx
jmpq *%rcx
```
- The `pop` consumes the rewritten return target and advances the stack
pointer.
- `llvm.eh.return` performs a non-local control transfer to an
explicitly supplied handler address, which was never pushed by a
matching `call`. It therefore cannot satisfy `ret`'s architectural
shadow-stack matching requirement regardless of implementation, so
an indirect `jmp` is used instead.
- The existing `mov %rcx, %rsp; ret` sequence is preserved for targets
without SHSTK support.
- The expansion handles 32-bit and 64-bit targets, including the
existing
Windows/UEFI x64 indirect-jump variant.
## Testing
Added: `eh-return-shstk.ll`
The test verifies that:
- non-SHSTK targets continue to emit `ret`
- SHSTK targets emit `pop` followed by an indirect `jmp`
- machine instruction verification succeeds in both configurations
Validation performed:
```bash
ninja -C build llc FileCheck llvm-config count not
build/bin/llvm-lit -sv llvm/test/CodeGen/X86/eh-return-shstk.ll
```
Passed: 1 (100.00%)
The original C reproducer was also compiled with the rebuilt Clang. Its
`pop_frame` function now emits:
```asm
movq %rcx, %rsp
popq %rcx
jmpq *%rcx
```
Runtime execution of the reproducer could not be fully validated because
the
available environment is WSL2 without usable CET shadow-stack support.
The
compiler output and LLVM regression test both pass, but this does not
confirm the control-protection fault is resolved on real CET-enabled
hardware, only that the expected instruction sequence is now emitted.
---------
Co-authored-by: Phoebe Wang <phoebe.wang at intel.com>
Commit: 6694be0f79c28f1b62556e3ea82ae074af1e27ba
https://github.com/llvm/llvm-project/commit/6694be0f79c28f1b62556e3ea82ae074af1e27ba
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CMakeLists.txt
M clang/lib/CIR/Interfaces/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
M mlir/include/mlir/Transforms/CMakeLists.txt
M mlir/lib/Bytecode/CMakeLists.txt
M mlir/lib/Dialect/ArmNeon/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSME/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSVE/IR/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
M mlir/lib/Dialect/DLTI/CMakeLists.txt
M mlir/lib/Dialect/EmitC/IR/CMakeLists.txt
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/GPU/Utils/CMakeLists.txt
M mlir/lib/Dialect/IRDL/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/Linalg/IR/CMakeLists.txt
M mlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/OpenACCMPCommon/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Ptr/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
M mlir/lib/Dialect/Transform/IR/CMakeLists.txt
M mlir/lib/Dialect/Transform/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/Vector/IR/CMakeLists.txt
M mlir/lib/Dialect/X86/IR/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/SPIRV/CMakeLists.txt
M mlir/lib/Transforms/CMakeLists.txt
M mlir/lib/Transforms/Utils/CMakeLists.txt
Log Message:
-----------
[MLIR] Fix and classify generated-header dependencies (#222329)
This is fixing missing CMake dependencies to make our build graph
correct. It is a bit verbose but will be cleaned up in a following patch
making handling of the generated header automatic.
List the TableGen targets owned by each affected library, and add the
missing LLVM generated-header, SPIR-V source-generation, OpenACC/OpenMP
generated-input, and CIR operation/type prerequisites found by clean
dependency audits. Correct two stale copy-paste dependencies and the
duplicate CIR link entry.
The Transforms pass declarations and dialect inliner interface are
independent of any dialect. Classify both under mlir-generic-headers,
and associate the inliner interface with MLIRTransformUtils, which
publishes InliningUtils.h. This gives every MLIR library the required
ordering without repeated header-only edges.
Assisted-by: Codex
Assisted-by: Claude Code
Co-authored-by: Claude Fable 5.1 <noreply at anthropic.com>
Commit: 660a54c87b3940c7eb1e51a5af523b9a24fc2b99
https://github.com/llvm/llvm-project/commit/660a54c87b3940c7eb1e51a5af523b9a24fc2b99
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
A mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
A mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
M mlir/test/Target/LLVMIR/opaque-ptr.mlir
Log Message:
-----------
[mlir][llvm] Fix metadata and alignment on masked memory intrinsics (#221879)
llvm.intr.masked.load, masked.store, masked.gather and masked.scatter
implemented neither AccessGroupOpInterface nor AliasAnalysisOpInterface,
so they could not carry access_groups, alias_scopes, noalias_scopes or
tbaa. Importing LLVM IR that attached such metadata to one of them
silently dropped it, while llvm.memcpy in the same module preserved it.
Also widen alignment from I32Attr to I64Attr, matching the rest of the
LLVM dialect and LLVM proper, and make it optional. LangRef gives the
default alignment of these four intrinsics as the ABI alignment of the
type, exactly as for llvm.load and llvm.store, so an absent align
parameter attribute now imports as an absent alignment attribute instead
of being materialised as align 1, and an absent alignment attribute
exports without an align parameter attribute. This changes the textual
IR, as alignment = 4 : i32 becomes alignment = 4 : i64. Downstream
updates should rewrite only lines that mention a masked intrinsic rather
than blanket-substituting i32 with i64; other i32 spellings must stay,
including llvm.intr.matrix.*'s rows and columns attributes and i32
vector and element types on the intrinsics themselves.
Co-Authored-By: Claude Opus 5
Commit: da224d66042451154a83001456ea7d4e09819454
https://github.com/llvm/llvm-project/commit/da224d66042451154a83001456ea7d4e09819454
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/function-metadata.ll
Log Message:
-----------
[mlir][llvm] Gate unhandled function metadata warning (#221895)
Emit the warning for unhandled function metadata only when expensive
warnings are requested, matching how the flag is already used for
instruction metadata.
Co-Authored-By: Claude Opus 5
Commit: 31fb1d84516bb48b6f6d1e34b50d069458a64f09
https://github.com/llvm/llvm-project/commit/31fb1d84516bb48b6f6d1e34b50d069458a64f09
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
A llvm/test/CodeGen/AMDGPU/GlobalISel/fma-mix-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
Log Message:
-----------
[AMDGPU] Fix pow with a negative base (#222248)
v_log_f32 of a negative value is NaN, so the old expansion returned NaN
for every negative base
Take the log of `|x|` and fix up the sign
Commit: 18d181c5ea1f4a8bf12c92f6df2d8d8e5c820c0b
https://github.com/llvm/llvm-project/commit/18d181c5ea1f4a8bf12c92f6df2d8d8e5c820c0b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llround.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lround.ll
Log Message:
-----------
[SPIR-V] Fix swapped type sets in G_LROUND/G_LLROUND legalization (#218998)
Result and source types were reversed, only working by luck at widths
where LLT cannot tell int from float, fixes i8 results
Commit: bf5bef4fc3a044818dd4b682caa715c01fabd4fb
https://github.com/llvm/llvm-project/commit/bf5bef4fc3a044818dd4b682caa715c01fabd4fb
Author: estewart08 <ethan.stewart at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
Log Message:
-----------
[openmp] - Remove hwloc INSTALL_INTERFACE on omp target (#218923)
Reasons for removal:
1. hwloc is not present in installed headers, therefore a consumer of
openmp does not need hwloc
2. There is no omp target exported currently, which means
INSTALL_INTERFACE is ignored.
3. If there is a future omp target exported then there is a possible
relocation issue if LIBOMP_HWLOC_INCLUDE_DIR differs in build
environment vs end user's environment.
We need to keep BUILD_INTERFACE for unit testing and ompd build.
Originally introduced in https://reviews.llvm.org/D123888
Commit: b6d2436c2f9f30f8bc4ea58c13c9214e2f302b0a
https://github.com/llvm/llvm-project/commit/b6d2436c2f9f30f8bc4ea58c13c9214e2f302b0a
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/tools/gold/X86/multiple-sections.ll
Log Message:
-----------
[gold] Don't hardcode section index in test (#222339)
This can either be 1 or 2 depending on whether binutils was
compiled with --enable-rosegment=yes. The test does not care
about the index (only the address), so make it a wildcard.
Commit: f3a5a64129b0b74e1e7132ff8f20829d9c0fd504
https://github.com/llvm/llvm-project/commit/f3a5a64129b0b74e1e7132ff8f20829d9c0fd504
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
Log Message:
-----------
X86: Remove stale EFLAGS live range when converting ADD to LEA (#222029)
convertToThreeAddress may rewrite an EFLAGS-clobbering ADD into an LEA,
which does not define EFLAGS. hasLiveCondCodeDef guarantees the EFLAGS def
was dead, so drop its LiveIntervals value, otherwise the verifier would fail.
Fixes verifier errors with -early-live-intervals.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 87af62fcd0bff82d683dcc3c8f66ef770bd7eaa7
https://github.com/llvm/llvm-project/commit/87af62fcd0bff82d683dcc3c8f66ef770bd7eaa7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
Log Message:
-----------
[CGP] Drop poison generating flags when pushing freeze through cmp (#222314)
We need to clear the samesign flag when pushing freeze through icmp.
In the last commit, I also adjusted the handling of FMF on fcmp to work
the same way -- previously the transform would be skipped instead if the
fcmp had fast math flags. I think just clearing the poison-generating
flags is preferable (and what we'd do anyway in InstCombine and
DAGCombine).
Fixes https://github.com/llvm/llvm-project/issues/222309.
Commit: dacf8ccb5880d9c890db86bb1885e0eb22bc3649
https://github.com/llvm/llvm-project/commit/dacf8ccb5880d9c890db86bb1885e0eb22bc3649
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/store-scalarization-cost.ll
Log Message:
-----------
[VPlan] Cost scalar IV steps in replicate regions. (#221995)
Replace the return 0 bail-out in VPScalarIVStepsRecipe::computeCost in
replicate regions by properly scaling by the execution probability of
the region.
PR: https://github.com/llvm/llvm-project/pull/221995
Commit: 39d5c6238e0b4430c7f5256d689604c19ece7666
https://github.com/llvm/llvm-project/commit/39d5c6238e0b4430c7f5256d689604c19ece7666
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/CodeView.h
M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
M llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
A llvm/test/tools/llvm-pdbutil/compile3sym.yaml
A llvm/test/tools/llvm-pdbutil/frameprocsym.yaml
Log Message:
-----------
[llvm-pdbutil] Map enums in bitflags for symbols in YAML (#215887)
Both `S_COMPILE3` and `S_FRAMEPROC` have bitflags that also contain
non-bitflag enums. For `S_COMPILE3`, the lower eight bits represent the
language and for `S_FRAMEPROC` there are bits in the middle representing
the frame pointer registers for variables and parameters.
In both cases, the values of the enums were not present in the generated
YAML.
Mapping this in YAML is a bit complicated, because we can't give
`yaml::IO` a reference to the flags. I used local variables and a check
if we're reading to re-assemble the flags.
Commit: 49b63de374d9da1ccabcc70bffbf83efcf49023c
https://github.com/llvm/llvm-project/commit/49b63de374d9da1ccabcc70bffbf83efcf49023c
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/lib/CIR/CodeGen/Address.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byref.cpp
M clang/test/CIR/Transforms/abi-lowering/expand-struct-arg.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-byref-forward-param.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byref-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
Log Message:
-----------
[CIR] Forward a byref argument loaded from a byref parameter (#221057)
When a callee argument comes out of the calling function's own byref
parameter, that pointer already names the object its caller will
destroy, so pass it along as-is.
Assisted-by: Cursor / claude-opus-5
Commit: 647fffcc2173aaee745db7303316740a4c27d138
https://github.com/llvm/llvm-project/commit/647fffcc2173aaee745db7303316740a4c27d138
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
A clang/test/CodeGen/AArch64/neon/rounding.c
R clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
Log Message:
-----------
[CIR][AArch64] Port f64 tests for v8.5 rounding NEON builtins (#221389)
Related to https://github.com/llvm/llvm-project/issues/185382
Port tests from
clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c to
clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
Commit: 757ae56cbe99e0ea4439cc7b0321426828f8c199
https://github.com/llvm/llvm-project/commit/757ae56cbe99e0ea4439cc7b0321426828f8c199
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/ArmNeon/IR/ArmNeonDialect.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/LLVMIR/IR/VCIXDialect.cpp
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/test/lib/Dialect/NVGPU/TestNVGPUTransforms.cpp
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[MLIR] Remove unnecessary generated-header include dependencies (NFC) (#222349)
Remove unused dialect and transform headers, and replace broad pass
aggregates with the specific conversion headers used by GPU and
SparseTensor pipelines. Include the core pass and IR builder definitions
directly where unrelated dialect headers previously supplied them
transitively.
These include-only changes avoid unnecessary TableGen header
prerequisites without depending on changes to the CMake generated-header
dependency model.
Assisted-by: Codex
Commit: 86f1e1209a296c6438263d1e9f5be018a6a86dd1
https://github.com/llvm/llvm-project/commit/86f1e1209a296c6438263d1e9f5be018a6a86dd1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
Log Message:
-----------
[SPIR-V] Fix legalized store of single element vector to vector (#222253)
A `<1 x T>` shares its SPIR-V type with the scalar T, so extracting from
it emits OpCompositeExtract on a non-composite, which is rejected by
spirv-val
Commit: e4833173af64d3262a70d518fde99f8ca46f6c1d
https://github.com/llvm/llvm-project/commit/e4833173af64d3262a70d518fde99f8ca46f6c1d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
Log Message:
-----------
[SPIR-V] Fix legalization rewriting non-zero size arrays to pointers (#222276)
legalizeType checked `isa<ArrayType>` with no size guard
Use `shouldLegalizeInstType`, which already checks for zero size
Commit: c664d0dccabe6fc40900f6223284cefe4070a1bf
https://github.com/llvm/llvm-project/commit/c664d0dccabe6fc40900f6223284cefe4070a1bf
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Evaluate/shape.cpp
Log Message:
-----------
[flang] Avoid signed integer overflow in GetNonNegativeExtent (#222207)
`GetNonNegativeExtent()` computes a dimension's extent from constant
bounds as `ub - lb + 1` in `ConstantSubscript` (`int64_t`) arithmetic.
For an oversized dimension such as `integer(1) ::
a(0_8:9223372036854775807_8)`, whose extent is 2\*\*63, that computation
overflows — undefined behavior, and the ubsan failure reported in
#221940.
The wrapped result has to be preserved: storage sequences that are too
large are diagnosed later, while offsets are computed, and that code
tells a genuinely empty dimension from one whose extent wrapped around
by cross-checking the original bounds (`IsEmptyDimension()` in
`Semantics/compute-offsets.cpp`). This patch therefore computes the same
two's complement result with `llvm::SubOverflow()` and
`llvm::AddOverflow()`, which are defined for every input. Subtracting
first also covers bounds of mixed sign, where `ub - lb` can overflow
before the increment.
Fixes #221940
Assisted-by: AI
Commit: 3409f0fd2aea08b57b1ee0047cdec5c26acfa02e
https://github.com/llvm/llvm-project/commit/3409f0fd2aea08b57b1ee0047cdec5c26acfa02e
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
Log Message:
-----------
[AMDGPU] Fix invalid 64-bit DPP formed from folding a 32-bit DPP mov (#222216)
GCNDPPCombine already rejects 64-bit DPP when the DPP move itself is
64-bit, but a 32-bit move folded into a source of a 64-bit instruction
was not checked. On targets without FeatureDPALU_DPP this formed
V_LSHLREV_B64_e64_dpp, whose tied old operand got the move's 32-bit
register class instead of the 64-bit destination class.
Commit: 57edf2997431add187956bd6637f8e83075db957
https://github.com/llvm/llvm-project/commit/57edf2997431add187956bd6637f8e83075db957
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/lib/AST/ODRHash.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RunLoopAutoreleaseLeakChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelConsumer.cpp
Log Message:
-----------
[Clang] Avoid calling hasBody() when calling getBody() directly after (#221845)
`hasBody()` and `getBody()` are virtual functions, so calling them
multiple times should be avoided.
Commit: 1849da9fffcc4a817f83d1c7422e1d98003cfed1
https://github.com/llvm/llvm-project/commit/1849da9fffcc4a817f83d1c7422e1d98003cfed1
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
M clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
M mlir/include/mlir/ABI/ABIRewriteContext.h
M mlir/lib/ABI/Targets/Test/TestTarget.cpp
M mlir/unittests/ABI/ABIRewriteContextTest.cpp
Log Message:
-----------
[CIR] Honor the Direct coercion offset in x86_64 callconv lowering (#220724)
When a record's low eightbyte holds no field, the classifier passes it
in one register read from byte 8 rather than byte 0. CallConvLowering
had no way to represent that, so `convertABIArgInfo` rejected the whole
signature as NYI.
`ArgClassification` now carries the offset and `emitCoercionToMemory`
reads and writes the coerced scalar through a `u8` `cir.ptr_stride` at
that byte. The offset-zero path is untouched.
A register-tuple coercion at an offset is refused rather than read from
the wrong bytes, a pair SysV cannot currently produce.
Drop the pass opt-out flag from one test that no longer needs it.
Supersedes #203640, which had the coercion mechanism but nothing calling
it.
Assisted-by: Cursor / claude-opus-5
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: aaa8531405b31bc17566de55202431c8d6dc22b9
https://github.com/llvm/llvm-project/commit/aaa8531405b31bc17566de55202431c8d6dc22b9
Author: Jake Daly <48452250+jakemdaly at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
Log Message:
-----------
[CodeGen] Visit operands inside bundles in DetectDeadLanes (#220645)
`modifySubRegisterOperandStatus` walked each basic block with
`MachineBasicBlock`'s default iterator, which visits only top-level
instructions and steps over the contents of a `BUNDLE`. Dead/undef flags
were therefore only ever updated on the `BUNDLE` header, even though the
analysis half of the pass walks `MRI` use lists and does account for
bundle-internal operands. The pass reasoned about operands it then refused
to update.
A register referenced both by the header and by a bundled instruction
ends up with the two disagreeing about whether the bundle reads it, and
consumers split on which half they believe: `ScheduleDAGInstrs::buildSchedGraph`
and `LiveIntervals::handleMove` look at the header only, while
`RegisterOperandsCollector` descends into the bundle. The scheduler can
then move a bundle across a dependence it never modelled, and
`RegPressureTracker::recede` asserts on an empty use lane mask.
Walk `MBB.instrs()` instead, so the rewrite sees the same operands the
analysis did.
Commit: cd570f8304b7bb2faaec36d0707ecf8bb8e889f3
https://github.com/llvm/llvm-project/commit/cd570f8304b7bb2faaec36d0707ecf8bb8e889f3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Interfaces/TilingInterface.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Utils/CMakeLists.txt
M mlir/lib/Interfaces/CMakeLists.txt
Log Message:
-----------
[MLIR] Remove and narrow unnecessary header dependencies (NFC) (#222364)
This is prerequisite work on reducing the amount of CMake dependencies
on (TableGen) generated header.
Forward-declare IteratorType in TilingInterface.h instead of including
all structured-operation utilities. Include those utilities directly in
SCF and Tensor implementations that use their enum values and helpers,
and remove TilingInterface's dependency on the DialectUtils library.
Replace DialectUtils's Arith library prerequisite with its operation
generator, and SPIR-V's GPU library prerequisite with its
compilation-interface generator. Drop VCIX's obsolete GPU
compilation-interface prerequisite.
Assisted-by: Codex
Commit: 48aa9f6be52448b362d5b681ccca82c8fa48712a
https://github.com/llvm/llvm-project/commit/48aa9f6be52448b362d5b681ccca82c8fa48712a
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/CallGraph.h
Log Message:
-----------
[CallGraph] Remove dead removeAllCalledFunctions and stealCalledFunctionsFrom (NFC) (#222252)
CallGraphNode::removeAllCalledFunctions: Added on November 26, 2001 in
commit e409c460bf87ef9211d42e1b6ede0df750aeb64a (originally as
removeAllCalledMethods) without any callers.
CallGraphNode::stealCalledFunctionsFrom: The last caller was removed on
June 24, 2022 in commit 217e85761cd1978931e29546e15716614e3b2fcc.
Assisted-by: Antigravity
Commit: 2de38b4861ed4a7be7ddd42fc803e91d1fe81b14
https://github.com/llvm/llvm-project/commit/2de38b4861ed4a7be7ddd42fc803e91d1fe81b14
Author: Hadong Lee <hdchris765 at snu.ac.kr>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/icmp-urem.ll
Log Message:
-----------
[InstCombine] Fold comparisons of urem with dividend (#214933)
This folds equality comparisons of `X urem Y` with `X`
- `(X urem Y) == X` to `X ult Y`
- `(X urem Y) != X` to `X uge Y`
For a defined `urem`, let `Q = X udiv Y` and `R = X urem Y`. Unsigned
division gives `X = Q * Y + R`, so:
```
R == X
<=> Q * Y == 0
<=> Q == 0 (since Y != 0)
<=> X < Y
```
Division by zero is undefined behavior, so no separate handling for `Y
== 0` is required.
This handles commuted compare operands, scalar and vector types, and
remainders with additional uses
Alive2: https://alive2.llvm.org/ce/z/3ryQaE
simplified proof with both folds: https://alive2.llvm.org/ce/z/v39F4d
Fixes #214480
Commit: ecd333f7e71fc67aa388a5824520e2df11c08886
https://github.com/llvm/llvm-project/commit/ecd333f7e71fc67aa388a5824520e2df11c08886
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
Log Message:
-----------
[RISCV] Correct some constants in orc-b-patterns.ll. NFC (#222229)
Based on the test function names being similar to other function, I
assume these were supposed to generate orc.b.
Also remove unnecessary nuw, nsw, and exact flags.
Commit: 4c0681233c84d923b9455b30875304520029c6e5
https://github.com/llvm/llvm-project/commit/4c0681233c84d923b9455b30875304520029c6e5
Author: Usman Nadeem <mnadeem at qti.qualcomm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
M llvm/test/CodeGen/ARM/vtrn.ll
M llvm/test/CodeGen/WebAssembly/simd-setcc-reductions.ll
Log Message:
-----------
[SDAG][ComputeNumSignBits] Look through undefined high bits for EXTRACT_VECTOR_ELT in a BUILD_VECTOR (#218099)
If we have a `BUILD_VECTOR(EXTRACT_VECTOR_ELT()...)` where the
`EXTRACT_VECTOR_ELT` is adding undefined high bits by extending but the
`BUILD_VECTOR` is again truncating those bits, then we can just look
through the extract and call `ComputeNumSignBits` directly on the parent
vector.
Ideally, when the caller is truncating the value, it would be nice for
`ComputeNumSignBits` to have the ability to ignore high bits we don't
care about.
Commit: 44b33260a38c8a0ec0083f950fe9d839ade72ab6
https://github.com/llvm/llvm-project/commit/44b33260a38c8a0ec0083f950fe9d839ade72ab6
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Attr.td
M clang/test/Sema/attr-c2x.c
Log Message:
-----------
[clang] treat [[gnu::flag_enum]] as equivalent to [[clang::flag_enum]] (#219105)
GCC gained a `[[gnu::flag_enum]]` attribute for consistency with clang
in GCC 15. With this patch, the `[[gnu::flag_enum]]` is recognized and
handled equivalently to `[[clang::flag_enum]]`.
The patch introducing `[[gnu::flag_enum]]` in GCC is
https://github.com/gcc-mirror/gcc/commit/1914ca8791ce4e0ba821e818cb6f86c76afdb6f2.
GCC treats `[[clang::flag_enum]]` as equivalent to `[[gnu::flag_enum]`.
Commit: f40e465b112a1a0cc1f6f544b33f3569bd364e36
https://github.com/llvm/llvm-project/commit/f40e465b112a1a0cc1f6f544b33f3569bd364e36
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/split-sum-expression-tree-subscripts.f90
Log Message:
-----------
[flang] Ignore subscript conversions when reassociating sums (#222302)
Implicit conversions of INTEGER(4) array indices to SubscriptInteger
were treated as conversions in the surrounding floating-point sum,
preventing reassociation of ordinary array-element expressions.
Stop only the conversion traversal at subscripts. Keep the independent
side-effect and volatile/asynchronous checks and embedded numeric
conversion restrictions unchanged.
Assisted-by: Codex
Commit: 62b7ae5dc327ba80b54e76a2964f34ff60f6ee91
https://github.com/llvm/llvm-project/commit/62b7ae5dc327ba80b54e76a2964f34ff60f6ee91
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
Log Message:
-----------
[AMDGPU] Compact virtual register numbers in sdwa-ops.mir (NFC) (#222197)
Renumber vregs in appearance order.
Commit: 9f9ed8295a38db3189fcec96fb6f9964e32753c7
https://github.com/llvm/llvm-project/commit/9f9ed8295a38db3189fcec96fb6f9964e32753c7
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/glob_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/glob_t.h
M libc/include/CMakeLists.txt
A libc/include/glob.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/glob-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/glob_t.h
M libc/src/CMakeLists.txt
A libc/src/glob/CMakeLists.txt
A libc/src/glob/glob.cpp
A libc/src/glob/glob.h
A libc/src/glob/globfree.cpp
A libc/src/glob/globfree.h
M libc/test/src/CMakeLists.txt
A libc/test/src/glob/CMakeLists.txt
A libc/test/src/glob/glob_test.cpp
Log Message:
-----------
[libc] Add <glob.h> POSIX header. (#221362)
* Provide the `<glob.h>` header as defined in POSIX:
https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/glob.h.html.
* Provide declaration of `glob_t` struct type, and `GLOB_*` family of
macros for controlling `glob()` function behavior and
for describing `glob()` error return codes.
* Provide stubs / placeholder implementations for `glob()` and
`globfree()` functions - similar to `fnmatch()`
added in f571c5e34a06bc769924ff9100b6f31612279ab0 those would likely
depend in part on pattern matching
logic shared between them and with regex.
* Since there are no real implementations yet, only enable the header
and entrypoints on Linux platforms with
`LLVM_LIBC_ENABLE_EXPERIMENTAL_ENTRYPOINTS` specified.
Commit: abdd057f56f38a469fc13597a5c7f1d43792e56b
https://github.com/llvm/llvm-project/commit/abdd057f56f38a469fc13597a5c7f1d43792e56b
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
Log Message:
-----------
Fixes Bazel BUILD error in #411a8eea0c269fff79700da1b3a9e71914718d4b (#222371)
Adds missing deps for kmt_traits.
Commit: a49d01f26b6c43e4712464e0a07249e92ff792ef
https://github.com/llvm/llvm-project/commit/a49d01f26b6c43e4712464e0a07249e92ff792ef
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
A flang-rt/include/flang-rt/runtime/unit.h
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/execute.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api-common.h
M flang-rt/lib/runtime/io-api-minimal.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt-minimal.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/unit-map.h
M flang-rt/lib/runtime/unit.cpp
R flang-rt/lib/runtime/unit.h
A flang-rt/test/Driver/iotype.f90
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/ChildIO.cpp
Log Message:
-----------
[flang][Runtime] Reset the information of namelist formatting when invoking child I/O (#218314)
The flag of namelist formatting is enabled when IONAME(OutputNamelist)
or IONAME(InputNamelist) is called, but it was never disabled afterward.
This patch disables the flag when invoking child I/O, as child I/O
cannot use namelist formatting.
Fixes #201516
Commit: 64ee3d3172c3cc7ebefe71fb3ca7a53bb5a73d44
https://github.com/llvm/llvm-project/commit/64ee3d3172c3cc7ebefe71fb3ca7a53bb5a73d44
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Log Message:
-----------
[AArch64] Cost vector.match intrinsics that require type legalization (#220852)
Recent patches (#218972, #218972) have added type-legalization support
for vector.match. This allows us to remove the exact type and search
size requirements from the intrinsic cost. This in turn will simplify
the combine in #212456.
Commit: 45ffe88d73f5e147315bca4bdb7ce1d730725586
https://github.com/llvm/llvm-project/commit/45ffe88d73f5e147315bca4bdb7ce1d730725586
Author: Hüseyin Kutsi Balcı <balcihkutsi at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/HowToSubmitABug.rst
M llvm/docs/PDB/PdbStream.md
Log Message:
-----------
[docs] Fix two stale file paths (#213994)
Two documentation paths point at files that are not there.
- `HowToSubmitABug.rst` tells readers to run
`clang/utils/creduce-clang-crash.py`. The script was renamed to
`reduce-clang-crash.py` in 59cee030f and the doc was not updated with
it.
- `PDB/PdbStream.rst` gives `llvm/DebugInfo/CodeView/CVDebugRecord.h`.
That header moved to `llvm/include/llvm/Object/CVDebugRecord.h` in
211c67cdb.
Neither old path resolves at `main`; both replacements do.
## AI disclosure
AI-assisted (Claude Code), per the AI Tool Use Policy. A sweep resolved
the repo-internal paths written in `llvm/docs`, `clang/docs`,
`mlir/docs`, `lld/docs`, `libcxx/docs` and `flang/docs` against the
tree; only these two failed to resolve anywhere. Before opening I
checked both replacements in the tree and found the commits that renamed
and moved them, and went through the rest of the sweep's output — the
remaining candidates are correct in context and were left alone. I have
reviewed and understood the change and take responsibility for it.
Commit: 8104261f2c74b41d63d9e043fe3631e20af54609
https://github.com/llvm/llvm-project/commit/8104261f2c74b41d63d9e043fe3631e20af54609
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap.pass.cpp
A libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_comp.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/pstl.is_heap_until_comp.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of parallel std::is_heap() based on std::is_heap_until() (#221556)
This PR adds a "one-liner" implementation of a parallel `std::is_heap()`
based on `std::is_heap_until()`.
The implementation is effectively a call to `std::is_heap_until()` and a
comparison with the last iterator:
```c++
auto res = IsHeapUntil()(policy, first, last, comp);
if (!res) {
return nullopt;
}
return *res == last;
```
Part of #99938.
Commit: 52feb1fe499914ef1d7669fa75ab46e12b1a37dd
https://github.com/llvm/llvm-project/commit/52feb1fe499914ef1d7669fa75ab46e12b1a37dd
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
Log Message:
-----------
[NFC][VPlan] Move `introduceMasksAndLinearize` into a `VPPredicator`'s method (#217483)
To reduce diff in the next PRs.
AI-assisted.
Commit: eff57ef78633c2eff5ae2cb7e4fa8e11e14d4b46
https://github.com/llvm/llvm-project/commit/eff57ef78633c2eff5ae2cb7e4fa8e11e14d4b46
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Expr.h
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGenCXX/GH128985.cpp
A clang/test/CodeGenCXX/Inputs/embed-data.txt
A clang/test/SemaCXX/GH128985.cpp
Log Message:
-----------
[clang][CodeGen] Fix assertion failure with #embed in array new-expression initializers (#218262)
Fixes #128985
An `EmbedExpr` in a semantic initializer list can represent many array
elements at once, and every consumer of such lists has to expand it. The
array `new` emitter, `EmitNewArrayInitializer`, never did: it counted
the `EmbedExpr` as one element and emitted it through the scalar path,
hitting `assert(E->getDataElementCount() == 1)`. The undercount also
made the runtime minimum allocation check too lax and miscomputed the
trailing zero-fill size.
`Codegen` now emits one store per embed data element, converted to the
element type, and counts initializers with
`getNumInitsWithEmbedExpanded()` in both places. That helper also
learned to look through implicit casts, since Sema wraps a multi-element
`EmbedExpr` in a conversion when the element type isn't `int` — the
other embed consumers already strip casts before checking.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 6f7ca253fc3674856afe665eda40f9856a69e804
https://github.com/llvm/llvm-project/commit/6f7ca253fc3674856afe665eda40f9856a69e804
Author: Michał Górny <mgorny at gentoo.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libcxx/test/libcxx/atomics/clear_padding.pass.cpp
Log Message:
-----------
[libc++] Disable SSP in `clear_padding.pass.cpp` (#218130)
Compile `clear_padding.pass.cpp` test `-fno-stack-protector` to fix
crash due to the generated code overflowing the buffer. This is most
likely a bug in clang.
Bug #212002
Fixes a test regression introduced in #76180
CC @huixie90
---------
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: b9d0703f7d6bd040bf317b1099729ba3a421f33c
https://github.com/llvm/llvm-project/commit/b9d0703f7d6bd040bf317b1099729ba3a421f33c
Author: Matt Turner <mattst88 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
M compiler-rt/test/asan/TestCases/complete_stack_trace.c
Log Message:
-----------
[sanitizer_common] Disable the fast unwinder on Alpha Linux (#220231)
BufferedStackTrace::UnwindFast walks the stack assuming frame[0] is the
caller's frame pointer and frame[1] the return address. Alpha chains
neither, so the walk yields a few garbage frames and then stops:
```
freed by thread T0 here:
#0 0x020000971274 in free asan_malloc_linux.cpp:51
#1 0x0200007fa48c (<unknown module>)
```
Opt Alpha out of the fast unwinder the way Linux/MIPS already is. The
_Unwind_Backtrace based unwinder gives complete traces; with it, GCC's
g++.dg/asan/deep-stack-uaf-1.C passes on alpha-unknown-linux-gnu.
Commit: 17092bd38d0d7a4c37d6bcbf6e96177d2aacbc43
https://github.com/llvm/llvm-project/commit/17092bd38d0d7a4c37d6bcbf6e96177d2aacbc43
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
Log Message:
-----------
[SystemZ] XPLINK64: use AExt for 32-bit pointer formals (#222350)
CC_XPLINK64_Pointer was setting LocInfo=ZExt, promising the optimizer
that the caller had zero-extended bit 32. Evidence from Open XL 1.1 and
2.2 shows that callers do not consistently zero-extend `__ptr32`
arguments
-- Open XL 1.1 emits nothing on the caller side; Open XL 2.2 only
zero-extends in the explicit cast case. Every actual use of a 31-bit
pointer goes through `addrspacecast` which emits `LLGTR` to clear bit 32
at
the point of use, so no callee relies on the register being clean at the
parameter boundary. Change LocInfo to AExt to accurately reflect that
only the low 32 bits are valid.
Extracted from #206833 per reviewer request.
Commit: 9756cbfea1d7cdfdd2d15d26cdfbe1db6c775923
https://github.com/llvm/llvm-project/commit/9756cbfea1d7cdfdd2d15d26cdfbe1db6c775923
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Use canonical shift amount type when decomposing a multiply. (#222211)
This allows the shifts to CSE with other shifts that are already in
canonical form.
Commit: 15bf5e575a6a1a5ecb80a98922223e31fda25204
https://github.com/llvm/llvm-project/commit/15bf5e575a6a1a5ecb80a98922223e31fda25204
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
Log Message:
-----------
[InstCombine] Prepare to support trunc nuw condition in foldAndOrOfICmps (NFC) (#221555)
this is a NFC rewrite to be able to support Trunc nuw by using m_IcmpLike matcher in foldAndOrOfICmps
Commit: d506b595872f3e0bf29e2546cd7e5ff55cdd2e32
https://github.com/llvm/llvm-project/commit/d506b595872f3e0bf29e2546cd7e5ff55cdd2e32
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
[InstCombine] support trunc condition in foldSelectICmpAndAnd (#220690)
Fixes regression seen in test in https://github.com/llvm/llvm-project/pull/184182
Commit: 290c4d79e964bb22ca9a4ff8453770c427d5f345
https://github.com/llvm/llvm-project/commit/290c4d79e964bb22ca9a4ff8453770c427d5f345
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[docs][libFuzzer] Fix `-timeout_exitcode` and `-error_exitcode` descriptions (#221776)
Commit: 4f057d974babd7782c175b4f13274346ab44aa21
https://github.com/llvm/llvm-project/commit/4f057d974babd7782c175b4f13274346ab44aa21
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/CXX/stmt.stmt/stmt.iter/stmt.ranged/p1.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
[Clang][Sema] Error message refers to `__begin1` with `constexpr` variable in range-based for loop (#218145)
Fixes #211926
When a range-based for loop variable is declared `constexpr`, its
initializer is the compiler-built `*__begin1`, which normally can't be a
constant expression. The constant evaluator reports what it sees at the
leaf — `read of non-constexpr variable '__begin1' is not allowed in a
constant expression`, plus a `declared here` note pointing at the loop's
colon — without saying what `__begin1` is.
Both constant evaluators now emit a single dedicated note when they read
one of the loop's implicit variables, so the existing `constexpr
variable 'x' must be initialized by a constant expression` error is
followed by `'__begin1'-variable of range-based 'for' loop is not a
constant expression`, pointed at the loop it belongs to. The note takes
the variable as an argument, so it names `__end1` or `__range1` when
those are what was read. No Sema changes. A constexpr loop variable that
*is* valid (CWG1204, when `operator*` never reads the iterator) still
compiles, and expansion statement (`template for`) variables are
unaffected since their synthesized iterators are themselves `constexpr`.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 1c380fe977a121a325110c742032c6bbdfc06d32
https://github.com/llvm/llvm-project/commit/1c380fe977a121a325110c742032c6bbdfc06d32
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-select-remap.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Reapply "[SimplifyCFG] Fix profcheck failure from #213302" (#220932) (#220939)
This reverts commit 02d1fabd22d599bad38b2b926c7bcaaf41aff6e0.
Rerequesting review as I merged prematurely. This fixes a newly
introduced SimplifyCFG profcheck failure by correctly propagating branch
weight information.
Commit: 366be9717d45a9e8f72865bf94a9ef42faf4c2f7
https://github.com/llvm/llvm-project/commit/366be9717d45a9e8f72865bf94a9ef42faf4c2f7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr222363.ll
Log Message:
-----------
[X86] getBT - ensure we ANY_EXTEND or TRUNCATE the bit test index to match the source value (#222374)
Fixes #222363
Commit: cbdd30c4bf239adc33e2025a579372b41bec9512
https://github.com/llvm/llvm-project/commit/cbdd30c4bf239adc33e2025a579372b41bec9512
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lld/.clang-format
Log Message:
-----------
[lld] Set WrapNamespaceBodyWithEmptyLines: Never (#221423)
77% of anonymous namespaces in lld start without an empty line, as do
59% of namespace bodies overall. lld/ELF is the most consistent at 95% and 87%.
Requires clang-format 20.
Commit: 4728d3c8e911e9f67e8eaf2f6756364f10518560
https://github.com/llvm/llvm-project/commit/4728d3c8e911e9f67e8eaf2f6756364f10518560
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/builtin_vectorelements.cpp
M clang/test/SemaCXX/ptrauth-type-discriminator.cpp
A clang/test/SemaOpenCLCXX/vec_step.clcpp
Log Message:
-----------
[clang] Reject references to vector types in `__builtin_vectorelements` (#219767)
Fixes #216997
`__builtin_vectorelements` shares its operand check with `sizeof` and
friends, and that shared code looks through reference types before it
dispatches to the per-builtin check. So `__builtin_vectorelements(veci4
&)` was accepted by Sema, but the expression kept the reference as its
argument type, and everything downstream — constant evaluation, the
bytecode interpreter, CodeGen — expects that type to be a vector.
Constant-evaluating the initializer in the reproducer then trips
`assert(Ty->isSizelessVectorType())`. The alias syntax in the report
isn't the cause; `vec` there is a well-formed reference-to-vector type.
The check now runs before the reference is looked through, so a
reference to a vector type gets the existing "must be of vector type"
error, the same one `__builtin_vectorelements(int &)` already produced.
No other trait kind is affected.
LLM tools were used for this contribution. I've reviewed, built, and
tested the change myself before pushing to GitHub.
Commit: 4bd42ad3ade67d5c1498081df08cab4090a32551
https://github.com/llvm/llvm-project/commit/4bd42ad3ade67d5c1498081df08cab4090a32551
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/test/Transforms/InstCombine/negated-bitmask.ll
Log Message:
-----------
[InstCombine] restrict InstCombineNegator for sub(y,and(lshr(x,C),1)) (#222075)
For the general sub(y,and(lshr(x,C),1)) case the rewrite replaces one
2-instructions
sequence with another without reducing instruction count, and the
resulting shl/ashr form prevents later target-specific combines (e.g.
on PowerPC the original lshr+and maps to a single rldicl, while the
shl+ashr form requires sldi+sradi).
in the patch, Only applies when this is a true negation (LHS is zero).
sub(0,and(lshr(x,C),1)) --> add(ashr(shl(x,(BW-1)-C),BW-1),0)
Commit: 4dce46202961f348bf51a15d73bfe8bcfe8feb28
https://github.com/llvm/llvm-project/commit/4dce46202961f348bf51a15d73bfe8bcfe8feb28
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
A llvm/test/CodeGen/SystemZ/zos-xplink64-formal-sub64-extend.ll
Log Message:
-----------
[SystemZ] XPLINK64: emit narrow sign/zero-extend instructions for sub-i32 formal args (#206833)
Previously, i8/i16 integer formal arguments with signext/zeroext
attributes were promoted to i64 via CC_XPLINK_Promote_i32 using
LocVT=i64, causing the DAG to select LGFR/LLGFR (word-sized extends) for
all sub-i64 types instead of the narrower byte/halfword forms required
for XL compiler binary compatibility.
Root cause: LLVM type-legalizes i8/i16 to i32 before the CC table runs,
so ValVT is always i32 by the time CC_XPLINK_Promote_i32 is called. The
pre-legalization original type (Ins[i].ArgVT) is the only way to
distinguish i8/i16 formals from i32 formals at that point.
Fix:
- Add ArgOrigVTs to SystemZCCState, populated in AnalyzeFormalArguments
from Ins[i].ArgVT (using MVT::Other as sentinel for non-simple EVTs),
with a getArgOrigVT(ValNo) accessor that returns MVT::Other safely when
called outside AnalyzeFormalArguments (e.g. from AnalyzeCallOperands).
- In CC_XPLINK_Promote_i32 with isFormalArgLowering=true: for original
i8/i16, keep LocVT=i32 (GR32 live-in) only when a GPR is still available
(probed via getFirstUnallocated([R1L,R2L,R3L])). When all GPRs are
taken, the arg goes to an 8-byte stack slot where the caller stores a
sign-extended i64 with the value in bytes 6–7; LocVT=i64 is used in that
case so the full 8 bytes are loaded correctly.
- In LowerFormalArguments: after convertLocVTToValVT, truncate from the
legalized i32 down to the true i8/i16 so the DAG folds the
truncate+extend into a narrow instruction. Guarded by isTargetXPLINK64()
and ArgVT.isSimple().
- Extend CCIfType from [i32] to [i8, i16, i32] in CC_SystemZ_XPLINK64.
Result — callee side:
| Type | Attribute | Before | After |
|------|-----------|--------|-------|
| `i8` | `signext` | `LGFR` / `LGF` | `LGBR` / `LGB` |
| `i8` | `zeroext` | `LLGFR` / `LLGF` | `LLGCR` / `LLGC` |
| `i16` | `signext` | `LGFR` / `LGF` | `LGHR` / `LGH` |
| `i16` | `zeroext` | `LLGFR` / `LLGF` | `LLGHR` / `LLGH` |
| `i32` | `signext` | `LGFR` | `LGFR` (unchanged) |
Binary compatibility analysis:
The XPLINK64 ABI requires every caller to deliver a fully
sign/zero-extended 64-bit value in the argument register before the
call, regardless of the original type width. This patch only changes the
callee-side re-extension instruction; the caller side (LowerCall /
AnalyzeCallOperands) is unchanged and continues to emit LGFR/LLGFR for
outgoing sub-i32 arguments, or LGB/LGH/LLGC/LLGH when loading directly
from memory.
Because any ABI-compliant caller always delivers a full 64-bit
sign-extended value, bit 7 (for i8) or bit 15 (for i16) is always the
authoritative sign bit in the incoming register. Re-extending from that
bit with LGBR/LGHR yields the same result as LGFR from bit 31. The
matrix below covers all mixed-version combinations:
| Caller | Callee | Register value at call site | Callee re-extension |
Correct? |
|--------|--------|-----------------------------|---------------------|----------|
| Any (memory load) | new | `LGB`/`LGH` → full i64 | `LGBR`/`LGHR` | ✓
bit 7/15 intact |
| Open XL 1.1 | new | full GR64, no extend needed | `LGBR`/`LGHR` | ✓
ABI-compliant i64 |
| Open XL 2.2 | new | `LGFR` → full i64, bit 7 = sign | `LGBR`/`LGHR` |
✓ bit 7 intact |
| new | Open XL 2.2 | `LGFR` (caller side unchanged) | `LGFR` | ✓
identical to before |
| new | Open XL 1.1 | `LGFR` (caller side unchanged) | none (trusts
GR64) | ✓ GR64 is valid |
| Java/JNI | new | no extend (raw GR64 from JVM) | `LGBR`/`LGHR` | ✓ JVM
guarantees full i64 per JNI spec |
| new | Java/JNI | `LGFR` (caller side unchanged) | none | ✓ GR64 is
valid |
No binary incompatibility in any direction.
Adds lit test zos-xplink64-formal-sub64-extend.ll covering all five
integer types, the optnone spill path, and small struct coercion cases.
Updates call-zos-01.ll and call-zos-vararg.ll.
Commit: 9a9f50ed485aaf42a204a2aa0eae1d46f4aba8e0
https://github.com/llvm/llvm-project/commit/9a9f50ed485aaf42a204a2aa0eae1d46f4aba8e0
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M libcxx/include/__configuration/language.h
M libcxx/include/__locale_dir/wbuffer_convert.h
M libcxx/include/__locale_dir/wstring_convert.h
M libcxx/include/locale
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.buffer/ctor.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_codecvt.pass.cpp
M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_err_string.pass.cpp
Log Message:
-----------
[libc++] Remove `_LIBCPP_EXPLICIT_SINCE_CXX14` (#222221)
The existence of `_LIBCPP_EXPLICIT_SINCE_CXX14` is a relic of the
questionable status quo of LWG2176 - we only implement its resolution
since C++14 mode (7988106b21628afe7004b57ae66ec9b43cbc8942). In
a11f8b1ad66d68ca0a3a277ce776007abff9c7eb
(https://reviews.llvm.org/D91292), we implemented P0935R0 as a Defect
Report against C++11, and P0935R0 somehow superseded LWG2176. So it is a
bit unreasonable to leave LWG2176 not backported.
This patch backports the remaining parts of LWG2176 to old modes. As the
copy constructor of `wbuffer_convert` and `wstring_convert` are deleted,
implicit conversions to them cannot be performed in C++03 even if the
related converting constructors lack `explicit`.
As drive-by, also drops `// C++20` comments on these constructors due to
P0935R0 and `// C++14` comments due to LWG2176.
Commit: eb5cd179549d68b8b94efd1ddafc6c743ed98597
https://github.com/llvm/llvm-project/commit/eb5cd179549d68b8b94efd1ddafc6c743ed98597
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
R lldb/scripts/convert-lldb-header-to-rpc-header.py
M lldb/scripts/framework-header-fix.py
M lldb/source/API/CMakeLists.txt
M lldb/test/CMakeLists.txt
R lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckBasicIncludesEmit.h
R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckConstCharPointer.h
R lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckBasicIncludesEmit.test
R lldb/test/Shell/RPC/Generator/Tests/Server/CheckConstCharPointer.test
R lldb/test/Shell/RPC/Generator/lit.local.cfg
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBEnumerations.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckLLDBTypes.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/CheckSBDefines.test
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/SBDefines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-defines.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-enumerations.h
R lldb/test/Shell/RPC/Scripts/TestConvertScript/Inputs/lldb-types.h
R lldb/test/Shell/Scripts/Inputs/RPC/RPCSBAddress.h
M lldb/test/Shell/Scripts/TestFrameworkFixScript.test
M lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
R lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/CMakeLists.txt
R lldb/tools/lldb-rpc-gen/RPCCommon.cpp
R lldb/tools/lldb-rpc-gen/RPCCommon.h
R lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
R lldb/tools/lldb-rpc/CMakeLists.txt
R lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
R lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
Log Message:
-----------
[lldb] Remove LLDBRPC (#222093)
Chelsea (the champion of this effort) has left the team and nobody on my
team will have bandwidth to continue upstreaming this. This simplifies
our CMake and support scripts greatly.
Commit: fe9f67b35c068dc39788fd94f5194ca44109992a
https://github.com/llvm/llvm-project/commit/fe9f67b35c068dc39788fd94f5194ca44109992a
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
Log Message:
-----------
[lldb] Replace string type in ELFSectionHeaderInfo (#218490)
I plan on replacing the string type in LLDB's Section class, so the
first thing I will do is remove ConstString from all producers.
Commit: f72d8ff6d3f6dc481a72a63f9fb18aa92353e04c
https://github.com/llvm/llvm-project/commit/f72d8ff6d3f6dc481a72a63f9fb18aa92353e04c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/test/Analysis/BasicAA/call-attrs.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
M llvm/test/CodeGen/AArch64/GlobalISel/swiftself.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.ll
M llvm/test/CodeGen/ARM/returned-ext.ll
M llvm/test/CodeGen/ARM/struct-byval-loop.ll
M llvm/test/CodeGen/M68k/multiple-return.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/RISCV/rvv/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SystemZ/args-14.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/VE/Scalar/call.ll
M llvm/test/CodeGen/VE/Scalar/va_callee.ll
M llvm/test/CodeGen/VE/Vector/fastcc_caller.ll
M llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
M llvm/test/CodeGen/X86/bool-zext.ll
M llvm/test/CodeGen/X86/return-ext.ll
M llvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll
M llvm/test/Transforms/DeadArgElim/deadexternal.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/PhaseOrdering/pr64289-tce.ll
M llvm/test/Transforms/SROA/readonlynocapture.ll
M llvm/test/Transforms/SimplifyCFG/hoist-sink-swifterror-store.ll
M llvm/unittests/IR/AttributesTest.cpp
Log Message:
-----------
Revert [IR] Do not inherit ABI attributes from the callee (#222384)
Reverts #207173, plus #221892 due to a merge conflict.
Apparently we have some issues with call-site zeroext/signext on
libcalls, see
https://github.com/llvm/llvm-project/pull/207173#issuecomment-5604972674.
Commit: 91665e7aa17c4d829be459db92856eb0dbb32620
https://github.com/llvm/llvm-project/commit/91665e7aa17c4d829be459db92856eb0dbb32620
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
A llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
Log Message:
-----------
[CodeGen] Don't derive MODereferenceable from !dereferenceable metadata (#222069)
The two facts are about different pointers. `!dereferenceable` on a load
"tells the optimizer that the value loaded is known to be
dereferenceable" while `MachineMemOperand::MODereferenceable` says the
access itself doesn't trap.
Commit: 31157bbadddf2dafbfffbc23518988fa83dd4884
https://github.com/llvm/llvm-project/commit/31157bbadddf2dafbfffbc23518988fa83dd4884
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[NFC][VPlan] Move `m_RemoveMask` to `VPlanPatternMatch.h` (#219059)
I plan to use it in the `VPlanPredicator.cpp`.
AI-assisted.
Commit: 23de87dae7695634bb618e188912de11267f1dd0
https://github.com/llvm/llvm-project/commit/23de87dae7695634bb618e188912de11267f1dd0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/CMakeLists.txt
M clang/cmake/modules/CMakeLists.txt
M flang/CMakeLists.txt
M llvm/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/CrossCompile.cmake
M llvm/docs/CMake.md
M llvm/docs/ReleaseNotes.md
M mlir/CMakeLists.txt
M mlir/cmake/modules/CMakeLists.txt
M mlir/test/CMakeLists.txt
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/XeGPU/CMakeLists.txt
Log Message:
-----------
[CMake] Add dependent project mode for Flang's MLIR (#221724)
`LLVM_ENABLE_PROJECTS` historically treats projects enabled to satisfy
another
project's dependency the same as projects selected by the user.
Consequently,
implicit projects attach their complete build, install, and test suites
to
LLVM's aggregate targets.
Keep the cache entry as the user-requested project roots and use the
normal
`LLVM_ENABLE_PROJECTS` variable as the effective dependency closure.
Projects
in the effective list but not the cache entry are configured with
`EXCLUDE_FROM_ALL`. Normalize the special `all` value before comparing
the two
sets.
This makes Flang's MLIR and Clang dependencies dependency-only without a
second
project collection. It also applies the same rule to Clang when it is
added for
LLDB. Forward the cached roots to cross-compilation and bootstrap
configurations so implicit projects do not become explicit in nested
builds.
Let MLIR own its dependency-only test policy: configure its complete
test tree
so `check-mlir` remains available, but exclude MLIR test execution and
build
dependencies from `check-all`. Explicitly enabling MLIR preserves the
existing
behavior.
Validation:
- Configured Flang with implicit MLIR test support.
- Configured Flang and MLIR explicitly with tests enabled.
- Configured `LLVM_ENABLE_PROJECTS=all` with tests disabled.
- Verified implicit mode exposes `check-flang` and `check-mlir` while
`check-all` runs Flang but not MLIR.
- Verified explicit mode includes MLIR tests in `check-all`.
Commit: 0c5f85f9a24a0cdeccb05a362cd40b03da6f1783
https://github.com/llvm/llvm-project/commit/0c5f85f9a24a0cdeccb05a362cd40b03da6f1783
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/macro-fusion-add-mem.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-imm-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-imm.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-mul-add.mir
M llvm/test/CodeGen/RISCV/macro-fusion-shift-bit-extract.mir
M llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
M llvm/test/CodeGen/RISCV/macro-fusions.mir
M llvm/test/CodeGen/RISCV/xqci-macro-fusions.mir
Log Message:
-----------
[RISCV] Use run-pass instead of start-before in macrofusion tests. NFC (#222390)
We're only checking the debug output from the scheduler pass, we don't
need to more of the pipeline.
Commit: 44eec13c0264542d1d116ac0e8c2dcf1153fe37c
https://github.com/llvm/llvm-project/commit/44eec13c0264542d1d116ac0e8c2dcf1153fe37c
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
A flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
Log Message:
-----------
[flang][FIRToMemRef] Do not peel storage-association views (#222376)
After #215402, peelZeroOffsetViews walked through fir.convert that
changes the pointee type (e.g. !fir.ref<complex<T>> → !fir.ref<T>).
Load/store then indexed the parent array and converted the value, which
is wrong for Fortran storage association: it fails verification
(memref.store / illegal fir.convert) or silently changes bits (sitofp /
fpext).
Stop peeling when the accessed element type changes. Marshal the typed
view as a rank-0 memref of the dummy type. Same-type wrappers
(fir.declare, ref<T> → ref<T>) still peel to fir.array_coor.
Commit: e45b19d32e7c5e883ed4b50970a2233bbc6a8a7e
https://github.com/llvm/llvm-project/commit/e45b19d32e7c5e883ed4b50970a2233bbc6a8a7e
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix flang and MLIR bazel builds (#222395)
- Add missing TargetLLVM dependency on RemarkStreamer (introduced in
#9a5a9a8a59bb)
- FlangOptimizerTests missing //mlir:ArithDialect (introduced in
#ef208564acbf)
- GPUPipelines and SparseTensorPipelines fixes (from changes in
#757ae56cbe99)
Commit: e146e27ab993d013ab16a706f0fd84ab3818b575
https://github.com/llvm/llvm-project/commit/e146e27ab993d013ab16a706f0fd84ab3818b575
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/pr70510.ll
Log Message:
-----------
[ConstraintElim] Use largest usable bound to check no-wrap regions. (#222295)
The unsigned no-wrap region of an add with a constant operand has
UMAX - C as upper bound. For 64 bit operations, the upper bound is
usually larger than MaxConstraintValue, so it will be decomposed as
variable instead of a constant value.
This improves results end-to-end in a few more cases, without any
additional queries:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1234.
PR: https://github.com/llvm/llvm-project/pull/222295
Commit: 8e36f93835f1bdb74492d8ac26e7bdab4f4f1884
https://github.com/llvm/llvm-project/commit/8e36f93835f1bdb74492d8ac26e7bdab4f4f1884
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[SimplifyCFG] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/220477
Commit: a173863e63415ae54b5d0abf1bc5897c61604e5f
https://github.com/llvm/llvm-project/commit/a173863e63415ae54b5d0abf1bc5897c61604e5f
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/mkdtemp.cpp
A libc/src/stdlib/linux/mkstemp.cpp
A libc/src/stdlib/linux/mktemp_util.h
A libc/src/stdlib/mkdtemp.h
R libc/src/stdlib/mkstemp.cpp
M libc/src/stdlib/mkstemp.h
M libc/test/src/stdlib/CMakeLists.txt
A libc/test/src/stdlib/mkdtemp_test.cpp
Log Message:
-----------
[libc] Implement mkdtemp (#222106)
Add the POSIX mkdtemp entrypoint for Linux targets (aarch64, riscv,
x86_64).
Extract the shared template replacement and random character retry loop
into linux/mktemp_util.h, relocating mkstemp to linux/mkstemp.cpp and
reusing the helper across both entrypoints.
Add comprehensive unit tests covering directory creation, permissions,
uniqueness, and invalid template handling.
Assisted-by: Automated tooling, human reviewed.
Commit: d638a855953de5cd12bd0e257f617bc943bd58e5
https://github.com/llvm/llvm-project/commit/d638a855953de5cd12bd0e257f617bc943bd58e5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration.ll
Log Message:
-----------
[Transforms][Utils] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222382
Commit: 244ec9557be24db8ca9d212f2f7bd29e91ea06ec
https://github.com/llvm/llvm-project/commit/244ec9557be24db8ca9d212f2f7bd29e91ea06ec
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
Log Message:
-----------
[Transforms][Scalar] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222388
Commit: 4b8c39ea8e67fe1ed07bbf0fec0229a5ebfc90fb
https://github.com/llvm/llvm-project/commit/4b8c39ea8e67fe1ed07bbf0fec0229a5ebfc90fb
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-of-bittest.ll
Log Message:
-----------
Revert "[InstCombine] support trunc condition in foldSelectICmpAndAnd" (#222413)
Reverts llvm/llvm-project#220690
seems like this fails asan builds eg
https://lab.llvm.org/buildbot/#/builders/24/builds/23814
Commit: 4471c681e781fe14922a2ecf1684654a4522f271
https://github.com/llvm/llvm-project/commit/4471c681e781fe14922a2ecf1684654a4522f271
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Transforms/ACCMapInfoPrep.cpp
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-privatize.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep.mlir
Log Message:
-----------
[flang][acc] Support sizing array of derived type for openacc mapping (#222404)
Adds support for array of derived type - tested both for mapping and
privatization. Now acc.map_info can be generated for this.
Commit: 33cdc33dd6e941fe4dd1a61ba7d7ec32933e3bfd
https://github.com/llvm/llvm-project/commit/33cdc33dd6e941fe4dd1a61ba7d7ec32933e3bfd
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
Log Message:
-----------
[AMDGPU] Fix CHECKs for sdwa-ops.mir test13 and also eliminated unnecessary global live-ins (#222392)
Address #220798 reviewer comments for sdwa-ops.mir test13
Commit: 0a566538519064f8587dd930c88bf553761c405f
https://github.com/llvm/llvm-project/commit/0a566538519064f8587dd930c88bf553761c405f
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb] Accept the non-Darwin test build dir in the clean rule guard (#222412)
#197237 dropped the `.noindex` suffix from the test build directory on
non-Darwin, but the guard on the `clean` rule still looks for
`lldb-test-build.noindex`. In Swiftlang, every test that invokes it
fails off Darwin:
```
Makefile.rules:741: *** Trying to invoke the clean rule, but not using the default build tree layout. Stop.
```
Match `lldb-test-build` instead, which covers both layouts and keeps the
guard's intent of not letting the rule loose on an arbitrary directory.
Commit: e9f1f00dd49cb382b3eaef136666664eaaa16450
https://github.com/llvm/llvm-project/commit/e9f1f00dd49cb382b3eaef136666664eaaa16450
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
A llvm/test/Transforms/PhaseOrdering/lto-is-constant.ll
Log Message:
-----------
[LLVM][libc] Defer lowering of constant intrinsics in full LTO (#221505)
Summary:
This PR defers the lowering of the constant intrinsics. Currently it was
inheriting the default module pipeline and being done pessimistically in
the pre-link LTO phase. This means that some objects which would become
known constants were returned as failures. Doing this in the post-link
phase is more optimistic.
I included the `libc` change that justifies this in the PR, but it can
be split out if needed. The observation is that the ExpandVariadics pass
will lower most variadic calls on the GPU to an alloca of known size.
Using this opportunistically saves us a spill to stack ordinarily needed
to copy back the size from the GPU. Without this, every use of GPU
printf resulted in a spill to stack memory.
Hopefully this is benign enough.
Commit: 68da0c7ac7ed94a5f1c4df1119335cb74da4be8f
https://github.com/llvm/llvm-project/commit/68da0c7ac7ed94a5f1c4df1119335cb74da4be8f
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-shared-loop-invariant.ll
Log Message:
-----------
[SLP] De-duplicate costing of perfect-diamond gather spills (#220569)
Commit: 228749bf71a0f05b2ce214a153969603f1a902f8
https://github.com/llvm/llvm-project/commit/228749bf71a0f05b2ce214a153969603f1a902f8
Author: kwyatt-ext <kwyatt.external at hpe.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/lib/Parser/executable-parsers.cpp
A flang/test/Parser/recovery10.f90
Log Message:
-----------
[flang] Collapse execution-part statement error flood into one error message (#220988)
An unrecognizable statement in the execution part of a source file
produced one "expected 'KEYWORD'" error for every possible statement
because each execution-part-construct alternative failed at the same
source position and the alternative combinator merges the messages of
same-position ties.
Wrapped the keyword-led alternatives in `withMessage` so that when none
of them matches a token, the flood is discarded in favor of a single
"expected an executable statement" diagnostic.
This fixes the problem identified in Issue:
https://github.com/llvm/llvm-project/issues/220696
Assisted-by: AI (Claude)
Commit: 8aebfb31ab1a454187763bbfa1619f1f64d191f6
https://github.com/llvm/llvm-project/commit/8aebfb31ab1a454187763bbfa1619f1f64d191f6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
Log Message:
-----------
[Transforms] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222393
Commit: e829049823905405779c6b908437b200e7ed1b2e
https://github.com/llvm/llvm-project/commit/e829049823905405779c6b908437b200e7ed1b2e
Author: Gábor Tóthvári <gabor.tothvari at ericsson.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
Log Message:
-----------
[NFC][analyzer] Cleanup checker calls in `ExprEngine::ProcessStmt`, `ExprEngine::Visit*` (#218691)
Begin standardizing how `PreStmt` checkers and `PostStmt` checkers are
called by the analyzer engine. Previously, checkers were called either
from `ExprEngine::Visit` or the visit method of the statement. Now this
logic was hoisted out into `ExprEngine::ProcessStmt` and most of the
checker calls happen from there.
There are several statement kinds that do not call checkers at all or
only call `PreVisit` or only call `PostVisit` checkers. There are also
statement kinds whose visit code does not easily lend itself to the
`PreVisit`, `Visit`, `PostVisit` scheme, so those have been left
unmodified and will be refactored in a separate patch. The checker
calling status of statement kinds have been documented in the function
`shouldJustCallCheckers`.
Commit: 2c9afb46c32ccf19fe048688e273cad4c7b3dfc6
https://github.com/llvm/llvm-project/commit/2c9afb46c32ccf19fe048688e273cad4c7b3dfc6
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN bitfield extract builtins (#222186)
Adds codegen for the following AMDGCN bitfield extract builtins:
* __builtin_amdgcn_ubfe (unsigned)
* __builtin_amdgcn_sbfe (signed)
These are lowered to the corresponding `llvm.amdgcn.ubfe` and
`llvm.amdgcn.sbfe` intrinsics.
Commit: 3cab00bd5674d374e702807a57a3db432a351086
https://github.com/llvm/llvm-project/commit/3cab00bd5674d374e702807a57a3db432a351086
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN fract builtins (#222185)
Adds codegen for the following AMDGCN fract builtins:
* __builtin_amdgcn_fract (double)
* __builtin_amdgcn_fractf (float)
* __builtin_amdgcn_fracth (half)
These are lowered to the corresponding `llvm.amdgcn.fract` intrinsics.
Commit: 5ad3dd8a19d4ef59a13ac0052abe5fbca7b2823c
https://github.com/llvm/llvm-project/commit/5ad3dd8a19d4ef59a13ac0052abe5fbca7b2823c
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
Log Message:
-----------
[AMDGPU] Add more attributes to some intrinsics to help with attribute propagation (#222222)
Commit: 2c09e15d1cd4e6c42a7eddf4f09bed9dab0145e3
https://github.com/llvm/llvm-project/commit/2c09e15d1cd4e6c42a7eddf4f09bed9dab0145e3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang-rt/lib/cuda/init.cpp
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Emit Mcuda_compiled sentinel for CUDA Fortran objects (#222421)
Objects compiled as CUDA Fortran now declare an undefined Mcuda_compiled
symbol from CUFAddConstructor when emit-cuda-compiled is set. Linking
without the CUDA Fortran runtime then fails with a clear undefined
reference instead of only _FortranACUFInit, which is limited to PROGRAM
units.
The CUDA Fortran runtime defines the symbol so linking with the CUDA
Fortran runtime still succeeds.
Commit: 9c4200de17ced044bd832ec5e4e78c2e0ab25fd7
https://github.com/llvm/llvm-project/commit/9c4200de17ced044bd832ec5e4e78c2e0ab25fd7
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
Log Message:
-----------
[AMDGPU] Update REV Opcode DPP Combine test to have True16 and Fake16 runs (#222217)
DPP is not implemented for VGPR16 operands, so we also need runs with
True16 disabled to verify that combining into opcodes that might use
them is being properly guarded.
Commit: 77874a5794a3bb007cda2e6a5ac77e7ce48cf8c4
https://github.com/llvm/llvm-project/commit/77874a5794a3bb007cda2e6a5ac77e7ce48cf8c4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprClassification.cpp
A clang/test/SemaCXX/imag-lvalue-with-non-complex-operand.cpp
Log Message:
-----------
[Clang][Sema] Make _Imag int/float LValue not assignable (#218270)
Clang accepts `__real int/float` as an LValue because it's equal to the
scalar value itself, so the assignment will work fine, but it's not the
case for `__imag` because, for int and float, there is no imaginary part
to assign a value to it, so in the sema we can reject this case, similar
to GCC.
Fixes: #119498
Commit: 6fb705da6eac41c4ff4625c0a89861defc67e124
https://github.com/llvm/llvm-project/commit/6fb705da6eac41c4ff4625c0a89861defc67e124
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadx-heap.mlir
Log Message:
-----------
[mlir][openacc] Keep vector-private storage per-lane in ACCCGToGPU (#222134)
Give each lane its own allocation when `ThreadX` is active and the shape
is too large or too dynamic to be considered for stack alloca.
`processPrivatize` published a single allocation through a workgroup
slot indexed by `ThreadY`, so all lanes of a worker ended up sharing one
buffer.
Commit: c4c32a50adc88bf28a9188dcd946cdc2af7c19f2
https://github.com/llvm/llvm-project/commit/c4c32a50adc88bf28a9188dcd946cdc2af7c19f2
Author: Tim Kientzle <tkientzle at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
Log Message:
-----------
[LIT] Fix quadratic behavior collecting process output (#222419)
Repeatedly appending to a string is quadratic.
This makes lit very slow when tests emit large amounts of output.
Fixing this speeds up one Swift compiler test by 36x (from 720s down to
20s).
Commit: cd10182794b76adacc6a1c94953cdb2891d5735b
https://github.com/llvm/llvm-project/commit/cd10182794b76adacc6a1c94953cdb2891d5735b
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv-btc.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
Log Message:
-----------
[NFC][VPlan] Add extra tests for VPlan-based stride speculation (#218795)
For https://github.com/llvm/llvm-project/pull/182595.
Commit: 2f91c9c95a93be6d559dd0028a35c9f5e15d3dcf
https://github.com/llvm/llvm-project/commit/2f91c9c95a93be6d559dd0028a35c9f5e15d3dcf
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm
Log Message:
-----------
[CodeGen] Relax an overly strict assert in EmitAggregateCopy (#219090)
EmitAggregateCopy contains a sanity check verifying that a record being
bitwise copied has a genuinely trivial copy/move constructor or
assignment operator. The check did not account for records that are
non-trivial only because they contain an ARC __strong field. Such
records are still trivial for the purposes of calls, so clang can
legitimately use memcpy to copy them when passing or returning the type
by value.
Relax the assertion by using hasTrivialCopyConstructorForCall() and
hasTrivialMoveConstructorForCall() instead of the plain
hasTrivialCopyConstructor()/hasTrivialMoveConstructor() checks, since
these are exactly the predicates that capture that notion of triviality
for calls. This also makes the separate hasAttr<TrivialABIAttr>() check
redundant, since the trivial_abi attribute unconditionally sets the
for-call bits for the copy constructor, move constructor, and
destructor.
rdar://182749806
Commit: 44fc88bb27df4cbbe94d225398894d5175ae5f30
https://github.com/llvm/llvm-project/commit/44fc88bb27df4cbbe94d225398894d5175ae5f30
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[offload][level_zero] Remove async queues (#222267)
Remove old queues now that new inorder queues seems stable enough (and
more in line with what is needed for liboffload).
Commit: f6f71edb4346d586bb97485116175efd9a696ee8
https://github.com/llvm/llvm-project/commit/f6f71edb4346d586bb97485116175efd9a696ee8
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/IR/VerifierInternal.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/Verifier/AMDGPU/alloca.ll
A llvm/test/Verifier/AMDGPU/global-variable.ll
Log Message:
-----------
[AMDGPU] Introduce address space 13 for VGPR as memory (#208557)
Introduce address space 13 (enum, datalayout, verifier allowance, docs)
for VGPR as memory. No codegen in this PR.
Co-authored-by: Nicolai Hähnle <Nicolai.Haehnle at amd.com>
Commit: 177bbcb1dffa5459436f6472ca23c3d9a1479e73
https://github.com/llvm/llvm-project/commit/177bbcb1dffa5459436f6472ca23c3d9a1479e73
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[InstCombine] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Reviewers: nikic, mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/222409
Commit: 836b5a419d792cd56f1cb8c91a8cf4d00172be2e
https://github.com/llvm/llvm-project/commit/836b5a419d792cd56f1cb8c91a8cf4d00172be2e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
Log Message:
-----------
[IR] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Also remove some calls to applyProfMetadataIfEnabled that were added
before the cutoff date. Leave the rest that were added afterwards.
Reviewers: mtrofin, nikic
Pull Request: https://github.com/llvm/llvm-project/pull/222425
Commit: 68080c4a963f8d7dd0a1bec65555dd5ef8a5e3bc
https://github.com/llvm/llvm-project/commit/68080c4a963f8d7dd0a1bec65555dd5ef8a5e3bc
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGenOpenMP/barrier.c
M clang/test/CIR/CodeGenOpenMP/decl-not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CIR/CodeGenOpenMP/target-host-op-filtering.c
M clang/test/CIR/CodeGenOpenMP/target-map-llvm-device.c
M clang/test/CIR/CodeGenOpenMP/target-map.c
Log Message:
-----------
[CIR] Fix OpenMP tests by adding a triple. (#222345)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that.
Commit: c2e89e8955bacc8c6b10fba311038f4c12b55e00
https://github.com/llvm/llvm-project/commit/c2e89e8955bacc8c6b10fba311038f4c12b55e00
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copy.c
M clang/test/CIR/CodeGenOpenACC/compute-copy.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data-copy-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/declare-deviceptr.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/routine-anon-ns.cpp
M clang/test/CIR/CodeGenOpenACC/routine-bind.c
M clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
M clang/test/CIR/CodeGenOpenACC/routine-clauses.cpp
M clang/test/CIR/CodeGenOpenACC/routine-device_type.cpp
M clang/test/CIR/CodeGenOpenACC/routine-globals.cpp
M clang/test/CIR/CodeGenOpenACC/routine-globals2.cpp
M clang/test/CIR/CodeGenOpenACC/routine-locals.cpp
M clang/test/CIR/CodeGenOpenACC/routine-members.cpp
M clang/test/CIR/CodeGenOpenACC/routine-ns.cpp
M clang/test/CIR/CodeGenOpenACC/routine-templ.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/update.c
M clang/test/CIR/CodeGenOpenACC/wait.c
Log Message:
-----------
[CIR] Fix OpenACC tests by adding a triple. (#222344)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that.
Commit: eff777582665d7c076824cec211fe20c6fb154e5
https://github.com/llvm/llvm-project/commit/eff777582665d7c076824cec211fe20c6fb154e5
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/ProfileData/SampleProfWriter.cpp
Log Message:
-----------
[nfc][ProfileData] Fix -Wrange-loop-construct in SampleProfileWriter (#220726)
Fixes warnings:
```
SampleProfWriter.cpp:804:12: note: use reference type 'std::pair<llvm::sampleprof::FunctionId, unsigned long> const &' to prevent copying
804 | for (const auto [TypeName, Count] : *Map) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| &
SampleProfWriter.cpp:829:12: note: use reference type 'std::pair<llvm::sampleprof::FunctionId, unsigned long> const &' to prevent copying
829 | for (const auto [TypeId, Count] : *Map) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| &
```
Commit: 1daadb8ac65d52e612e4ced185467ff9d363afd9
https://github.com/llvm/llvm-project/commit/1daadb8ac65d52e612e4ced185467ff9d363afd9
Author: Augusto Noronha <anoronha at apple.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M llvm/include/llvm/TargetParser/Triple.h
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[Triple] Sink clang's DebugEntryValueArchs list into Triple (#222136)
So that other frontends can use it.
Assisted-by: claude
rdar://186478816
Commit: 3ff11b27bbd8eca219dab55e9589fcf6a76a79cb
https://github.com/llvm/llvm-project/commit/3ff11b27bbd8eca219dab55e9589fcf6a76a79cb
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerLoop.cpp
M compiler-rt/test/fuzzer/fuzzer-finalstats.test
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[libFuzzer] Don't count leak-verification re-executions towards `-runs` (#221036)
Fixes #66331. Stop countring the verification run in
TryDetectingAMemoryLeak() as part of TotalNumberOfRuns, as the number of
executed units could exceed -runs=N.
Commit: 173a02c755bf91fecf90ac4df972128baea91da8
https://github.com/llvm/llvm-project/commit/173a02c755bf91fecf90ac4df972128baea91da8
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/convert-nontemporal-to-llvm.fir
M flang/test/Fir/convert-to-llvm-access-group.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/tbaa.fir
M flang/test/Fir/vector-always-cfg.fir
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMOps.h
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ComplexToLLVM/complex-range-option.mlir
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
M mlir/test/Conversion/VectorToLLVM/vector-load-store-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/bytecode.mlir
M mlir/test/Dialect/LLVMIR/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/dereferenceable-invalid.mlir
M mlir/test/Dialect/LLVMIR/ifunc.mlir
M mlir/test/Dialect/LLVMIR/inlining-alias-scopes.mlir
M mlir/test/Dialect/LLVMIR/inlining-loop-annotation.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/LLVMIR/tbaa-roundtrip.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/Import/ifunc.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/Import/metadata-loop.ll
M mlir/test/Target/LLVMIR/Import/metadata-profiling.ll
M mlir/test/Target/LLVMIR/Import/metadata-tbaa.ll
M mlir/test/Target/LLVMIR/Import/target-ext-type.ll
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction.mlir
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
M mlir/test/Target/LLVMIR/anonymous-tbaa.mlir
M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
M mlir/test/Target/LLVMIR/attribute-dereferenceable.mlir
M mlir/test/Target/LLVMIR/attribute-tbaa.mlir
M mlir/test/Target/LLVMIR/ifunc.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/loop-metadata.mlir
M mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
M mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-nowait.mlir
M mlir/test/Target/LLVMIR/opaque-ptr.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-nontemporal.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-simd-private.mlir
M mlir/test/Target/LLVMIR/openmp-simd-reduction-simple.mlir
M mlir/test/Target/LLVMIR/openmp-target-private.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir
M mlir/test/Target/LLVMIR/target-ext-type.mlir
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[MLIR][LLVM] Enable strict property assembly format (#217277)
Enable strict property assembly format mode for the LLVM dialect. Bind
LLVM operation properties directly in declarative assembly formats so
strict parsing does not rely on fallback handling.
Update LLVM dialect, target, and conversion tests to use the direct
property spelling.
Assisted-by: Codex
Commit: b1b68627b9da8d4bbdf9a39bb2bde52dd6ce8bf3
https://github.com/llvm/llvm-project/commit/b1b68627b9da8d4bbdf9a39bb2bde52dd6ce8bf3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/CMakeLists.txt
M llvm/CMakeLists.txt
Log Message:
-----------
[CIR][CMake] Configure MLIR as a dependency-only project (#221739)
Enable MLIR implicitly for ClangIR without attaching its unrelated tools
and test suite to the aggregate build. An explicit MLIR selection
retains its normal behavior. Add MLIR after all Clang consumers enable
Clang, so CIR also works when Clang is enabled for LLDB.
Package the required MLIR libraries through Clang's existing exports and
LLVM's distribution policy. Register dependency library and header
install components and honor toolchain-only installations. When Clang is
itself an implicit Flang dependency, let Flang package the required
targets.
Keep MLIR test support available for CIR and retain the standalone
ClangIR restriction. Leave MLIR disabled when CIR is disabled.
Assisted-by: Codex
Commit: e6114dbeed424ce7c483000e181f97b962a56fe7
https://github.com/llvm/llvm-project/commit/e6114dbeed424ce7c483000e181f97b962a56fe7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeVectorStorage.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
M mlir/lib/Dialect/SCF/Transforms/ForallToParallel.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/Transforms/scf-replace-with-new-yields.mlir
M mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
Log Message:
-----------
[mlir][Affine][SCF][Vector] Migrate to split inherent/discardable attribute APIs (#218913)
Migrate the Affine, Arith, Arm vector, SCF, and Vector dialect families
and related conversions to explicit discardable or typed attribute
access.
Assisted-by: Codex
Commit: 97d5de84b6936c6366a0e184211f683b43e73429
https://github.com/llvm/llvm-project/commit/97d5de84b6936c6366a0e184211f683b43e73429
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU][NFC] Simplify conditional return in SIInstrInfo.cpp (#222426)
Commit: d3db069999553568848400c84cbf815c03f5470f
https://github.com/llvm/llvm-project/commit/d3db069999553568848400c84cbf815c03f5470f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable wmma_*_f4 instructions for gfx1250-strict (#222434)
Commit: 92e630bec71c247905906d5c72d8cba64963c9f8
https://github.com/llvm/llvm-project/commit/92e630bec71c247905906d5c72d8cba64963c9f8
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/Textures-scalar-AST.hlsl
M clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
M clang/test/AST/HLSL/Textures-vector-AST.hlsl
M clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
M clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
M clang/test/CodeGenHLSL/resources/Textures-default.hlsl
M clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
M clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
M clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
M clang/test/SemaHLSL/Resources/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-unsupported-methods-errors.hlsl
Log Message:
-----------
[HLSL] Add Texture3D and RWTexture3D types (#220438)
Fixes https://github.com/llvm/llvm-project/issues/194739 and fixes
https://github.com/llvm/llvm-project/issues/194743
This PR implements Texture3D and RWTexture3D and adds+modifies tests for
the two types.
Assisted by: Claude Opus 5
---------
Co-authored-by: Finn Plummer <mail at inbelic.dev>
Commit: 7c5e5cab746af48a82e46cca9d9abc930a92d68a
https://github.com/llvm/llvm-project/commit/7c5e5cab746af48a82e46cca9d9abc930a92d68a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Removing passing tests from xfail list (#222473)
These tests appear to be passing/deleted as of 9/9/26.
Commit: 70e79a05f791115fd5a9e36447981e7251af2bfd
https://github.com/llvm/llvm-project/commit/70e79a05f791115fd5a9e36447981e7251af2bfd
Author: Zane Hambly <zanehambly at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/test/MC/X86/x86_errors.s
Log Message:
-----------
[X86] Reject a register where a memory operand displacement belongs (#216068)
Fixes #61438
Commit: 265bb9f2a77b30c95bcbe1ad9b0a5ae9fe52e799
https://github.com/llvm/llvm-project/commit/265bb9f2a77b30c95bcbe1ad9b0a5ae9fe52e799
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Migrate R600 onto generated TargetParser bitset (#222461)
Follow the new amdgcn system so we don't have to carry 2 different
forms of this infrastructure.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 2d7043922b150f728de861f23d6b1a61dace37e5
https://github.com/llvm/llvm-project/commit/2d7043922b150f728de861f23d6b1a61dace37e5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] port eb5cd179549d68 (#222476)
Commit: 707c032dae3bee24eae29c6f4c459a6d6dc6556d
https://github.com/llvm/llvm-project/commit/707c032dae3bee24eae29c6f4c459a6d6dc6556d
Author: Yuvaraj Venkatesh <yuvaraj.venkatesh at arm.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP SCATTER (#222288)
Tosa specification changes in
https://github.com/arm/tosa-specification/pull/78
Commit: 18a8d12cb4075251657519a0cdd5e31d5dcc4fb1
https://github.com/llvm/llvm-project/commit/18a8d12cb4075251657519a0cdd5e31d5dcc4fb1
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/cxx20-module-initializer.cppm
M clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CIR/CodeGenCXX/typeid-should-throw.cpp
M clang/test/CIR/Lowering/calling-conv.cir
M clang/test/CIR/Lowering/module-asm.cir
M clang/test/CIR/Lowering/poison.cir
M clang/test/CIR/Lowering/select.cir
M clang/test/CIR/Lowering/strictfp.cir
M clang/test/CIR/Lowering/ternary.cir
M clang/test/CIR/Tools/warn-default-triple.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/test/CIR/Transforms/lib-opt.cpp
Log Message:
-----------
[CIR] Fix CIR tests by adding a triple/Requires. (#222346)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that. Tests that execute 'clang' in some way are given a triple, ones
that are on .cir files we just add a 'requires'. Some day we should be
able to remove those, but it'll require us to add the cxxabi/etc for
windows.
Commit: 2f704c94bf5c396f33da4684540cb22f38a757cc
https://github.com/llvm/llvm-project/commit/2f704c94bf5c396f33da4684540cb22f38a757cc
Author: Tadeusz <tadeuszjt at protonmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/test/SemaOpenACC/routine-construct-clauses.cpp
Log Message:
-----------
[Clang][OpenACC] Fixed getExtValue Call on Invalid Gang Dim (#221502)
**Problem**
When an invalid 'gang dim' value is used in `CheckGangDimExpr`, the
function prints the value into the diagnostic message by calling
`getExtValue`. This function asserts on values that can't fit into a
signed integer.
**Solution**
`APSInt` has a `<<` operator anyway so just use that.
The fix causes the message to print with the following formatting:
```
test.cpp:5:40: error: argument to 'gang' clause dimension must be 1, 2, or 3: evaluated to 18'446'744'073'709'551'574
5 | #pragma acc routine(S::foo) gang(dim : S::foo())
| ^
1 warning and 1 error generated.
```
Fixes #221418
Commit: a5ef934a8d295dc03be3960f2b3744ec2e53238e
https://github.com/llvm/llvm-project/commit/a5ef934a8d295dc03be3960f2b3744ec2e53238e
Author: Alex <filaka771 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/constant-conversion.c
Log Message:
-----------
[clang] Warn on signed char array constant conversion (#203792)
This resolves #181730: fixes a missing `-Wconstant-conversion`
diagnostic for `signed char` array initialization.
Before this change, Clang warned for `signed char foo = 255;` but did
not
warn for `signed char bar[] = {255};`.
The warning suppression helper did not distinguish between `char`,
`unsigned char`, and `signed char` in brace-initialized arrays. Now it
does.
Commit: 2c4c9d84bd948a92bb78b46a1c34044e246fd187
https://github.com/llvm/llvm-project/commit/2c4c9d84bd948a92bb78b46a1c34044e246fd187
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
Log Message:
-----------
[SPIRV] Fix inconsistent operand order for counter resource intrinsic (#221646)
The `llvm.spv.resource.handlefrombinding` intrinsic stores its binding
operands in the order (DescriptorSet, BindingNo, ...). The
`llvm.spv.resource.counterhandlefrombinding` intrinsic should use the
same order.
The `llvm.spv.resource.counterhandlefrombinding` intrinsic is currently
emitted only by the `SPIRVLegalizeImplicitBinding` pass. The pass
previously built its operands in the wrong order, and the instruction
selector repeated the same inversion when emitting decorations.
This change makes the operand order consistent with
`llvm.spv.resource.handlefrombinding`.
Test update closes a coverage gap - there were no tests for explicit
`llvm.spv.resource.counterhandlefrombinding` calls.
Assisted by GPT-5.6 Sol.
Commit: 6b0c1836d05ab22f55ec5b8e76bc797415de10f3
https://github.com/llvm/llvm-project/commit/6b0c1836d05ab22f55ec5b8e76bc797415de10f3
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint-f16.ll
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint.ll
Log Message:
-----------
[RISCV][GlobalISel] Support G_INTRINSIC_LRINT/G_INTRINSIC_LLRINT (#221992)
Add legalizer rules so llvm.lrint/llrint lower to fcvt.{w,l}.{h,s,d}
with FRM_DYN, mirroring the existing G_LROUND/G_LLROUND handling.
Commit: 5524a2192f6d6b29f5be1ff72947e99bf7e27ad9
https://github.com/llvm/llvm-project/commit/5524a2192f6d6b29f5be1ff72947e99bf7e27ad9
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
Log Message:
-----------
[CIR] Add cir.coro.intrinsic.resume/destroy/done Ops (#222210)
Adds CoroResumeOp, CoroDestroyOp, and CoroDoneOp, representing
llvm.coro.resume, llvm.coro.destroy, and llvm.coro.done respectively.
Commit: ffde4cee43edacbf0680a08822c4ce7e16d29857
https://github.com/llvm/llvm-project/commit/ffde4cee43edacbf0680a08822c4ce7e16d29857
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
Log Message:
-----------
[RISCV] Add RV64 RUN lines to orc-b-patterns.ll. NFC (#222424)
Add some i16 and i64 tests.
Commit: ed6de5998d473b30f502979b87531f21c4cd27b4
https://github.com/llvm/llvm-project/commit/ed6de5998d473b30f502979b87531f21c4cd27b4
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/ObjectYAML/COFFEmitter.cpp
Log Message:
-----------
[ObjectYAML] Fold layoutCOFF into writeCOFF (#221683)
Fold the COFF layout pass into writeCOFF so the
ContiguousBlobAccumulator tracks section offsets and sizes as data is
written. Reserve and fill in the optional header and section table once
the section layout is final.
This is almost NFC, except when the output size exceeds the limit.
Commit: 1474da952ed7d2b7be855a07d5fcca2dfc46b8fb
https://github.com/llvm/llvm-project/commit/1474da952ed7d2b7be855a07d5fcca2dfc46b8fb
Author: Yuta Saito <kateinoigakukun at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
Log Message:
-----------
[ASan] Recognize WASI as a platform with 64-bit off_t (#144441)
WASI defines `off_t` as 64-bit signed integers to support files larger
than 2 GiB.
https://github.com/WebAssembly/wasi-libc/blob/wasi-sdk-25/libc-bottom-half/headers/public/__typedef_off_t.h
Commit: 7cdf4c8bc306e0f1a0022898e70ab63a7c466ebf
https://github.com/llvm/llvm-project/commit/7cdf4c8bc306e0f1a0022898e70ab63a7c466ebf
Author: Mike Aizatsky <maizatskyi at cloudflare.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
A compiler-rt/test/tsan/Linux/epoll_oneshot_norace.cpp
Log Message:
-----------
[tsan] recognize EPOLL_CTL_MOD with EPOLLONESHOT (#220304)
Handles it the same way as EPOLL_CTL_ADD
Commit: 2e2c316fd5d7e8cff94703992928d5882d00478e
https://github.com/llvm/llvm-project/commit/2e2c316fd5d7e8cff94703992928d5882d00478e
Author: Stan Ulbrych <stan at python.org>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
M compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
Log Message:
-----------
[libFuzzer] Clamp `ConsumeFloatingPointInRange` result to `max` (#221552)
Fixes #65312. Floating point rounding could push the result above `max`,
or even overflow to infinity, so we clamp it instead.
---------
Co-authored-by: Dan Blackwell <danblackwell95 at gmail.com>
Commit: 91d7ee658c9cd67a7b95df4be51be553bfd9c549
https://github.com/llvm/llvm-project/commit/91d7ee658c9cd67a7b95df4be51be553bfd9c549
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/wcslen-1.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation for wcslen folding (#222475)
Commit: 92c1693b574850644535dcb8e18a70fdd115dc94
https://github.com/llvm/llvm-project/commit/92c1693b574850644535dcb8e18a70fdd115dc94
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Remove unused MC insts in isPackedSingleSGPR64BitInst (#222463)
There is no opsel support for these instructions, and thus we do not have
to manipulate opsel at MC layer. As a result, isPackedSingleSGPR64BitIns
is currently only used before pseudo-expansion. So we remove MC instruction
check inside.
Commit: 18a61f5a44dda16720754584aee95cac652e3646
https://github.com/llvm/llvm-project/commit/18a61f5a44dda16720754584aee95cac652e3646
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Move feature LDSBankCount64 to specific subtargets. NFC (#222469)
Commit: 7c9031580a129b0488a81cb8c2e668920bebb5a2
https://github.com/llvm/llvm-project/commit/7c9031580a129b0488a81cb8c2e668920bebb5a2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[GitHub] Bump CI Container Runner Version to 2.337.0 (#222480)
This is the latest version and keeps us ahead of the relatively short
runner support horizon.
Commit: a2e2038fc932039ee5e101432b4a549c92fdf9c8
https://github.com/llvm/llvm-project/commit/a2e2038fc932039ee5e101432b4a549c92fdf9c8
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
[AMDGPU] Add missing attributes to llvm.amdgcn.init.whole.wave (#222493)
`llvm.amdgcn.init.whole.wave` only sets the EXEC mask and reports
whether the lane was active on entry. It never calls into the module,
never frees memory, and always returns, so it can carry `nocallback`,
`nofree`, and `willreturn`.
The neighboring `llvm.amdgcn.init.exec` and
`llvm.amdgcn.init.exec.from.input` already have all three; this brings
`init.whole.wave` in line and lets the attributor propagate them to
callers.
Commit: e32ffd8b546f4a743812756efe11a7424cf9de5f
https://github.com/llvm/llvm-project/commit/e32ffd8b546f4a743812756efe11a7424cf9de5f
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/IR/invalid-offload-container.cir
A clang/test/CIR/IR/offload-container.cir
Log Message:
-----------
[CIR] Add offload container attribute (#206576)
Introduce `cir.offload.container`, a CIR dialect unit attribute that marks an
MLIR module as holding a host CIR module and its associated device CIR
modules in one IR unit while later offload merge/split pipeline passes need
visibility into both sides.
The marked module's body holds nested `builtin.module` operations. Each
nested module is tagged with `cir.offload.kind`, represented by the new
`#cir.offload_kind<host>` / `#cir.offload_kind<device>` enum attribute.
The structural contract expected by the follow-up pipeline work is
enforced in `CIRDialect::verifyOperationAttribute`, following the
`gpu.container_module` precedent:
* `cir.offload.container` is a unit attribute attached to a
`builtin.module`
* the first nested module is the host module
* all following nested modules are device modules
* the body contains only nested `builtin.module` operations
* at least one device module is present
* `cir.offload.kind` is only ever attached to a `builtin.module`
This patch only introduces the IR representation and verifier tests. The
passes that create, consume, or split this container are left to follow-up
patches.
This is part of the Host-Device CIR Combine Pipeline work discussed on
Discourse:
[discourse.llvm.org/t/gsoc-2026-host-device-cir-combine-pipeline-project-idea-discussion/89623](https://discourse.llvm.org/t/gsoc-2026-host-device-cir-combine-pipeline-project-idea-discussion/89623)
Commit: e01829dfee891cfaf61752c926b0532aaa261ad2
https://github.com/llvm/llvm-project/commit/e01829dfee891cfaf61752c926b0532aaa261ad2
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[Clang] Avoid unnecessary overload resolution when building RecoveryExpr (#222296)
When overload resolution fails, we tried RecoveryCallExpr which
ended up performing duplicate overload resolutions, where the template
argument deduction can be expensive.
This patch removes those 'known' invalid overload candidates before
RecoveryCallExpr.
Commit: f1245b6a7b2fb2e5c96434b9fb3107b4cf873d10
https://github.com/llvm/llvm-project/commit/f1245b6a7b2fb2e5c96434b9fb3107b4cf873d10
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/test/CodeGen/Hexagon/anti-dep-partial.mir
Log Message:
-----------
[CodeGen] Skip pseudo instructions in AggressiveAntiDepBreaker (#222271)
`ScheduleDAGInstrs` does not create SUnits for debug or pseudo
instructions. The aggressive anti-dependency breaker only skipped debug
instructions, so encountering a pseudo such as `PSEUDO_PROBE`
dereferenced a null SUnit.
Skip both debug and pseudo instructions and add a Hexagon regression
covering the existing aggressive anti-dependency path with legacy and
new machine pass managers.
Split from #221984 in response to review.
Commit: cdf59b384a48610a6450011279005b1e34f8572d
https://github.com/llvm/llvm-project/commit/cdf59b384a48610a6450011279005b1e34f8572d
Author: Ritanya-B-Bharadwaj <ritanya.b.bharadwaj at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/threadset.f90
A flang/test/Lower/OpenMP/threadset.f90
A flang/test/Semantics/OpenMP/threadset-clause-v60.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-task-threadset.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-threadset.mlir
Log Message:
-----------
[Flang][OpenMP] Add lowering and translation for the threadset clause (#215513)
Adds Flang lowering, and LLVM IR translation for the OpenMP 6.0 `threadset` clause (spec 14.8) on `task` and `taskloop`.
- Add a `ThreadsetPolicy` enum (`omp_pool`/`omp_team`) and clause on `omp.task` and `omp.taskloop.context`, lowered from Flang.
- Translate `threadset(omp_pool)` to the free-agent task flag (`0x80`); `omp_team` leaves it unset, matching clang.
- Add semantics, lowering, and translation tests.
Related: https://github.com/llvm/llvm-project/pull/135807,
https://github.com/llvm/llvm-project/pull/144409,
https://github.com/llvm/llvm-project/pull/169856
Commit: feabb30f0feef2361ac301618ff56566289919e7
https://github.com/llvm/llvm-project/commit/feabb30f0feef2361ac301618ff56566289919e7
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
A llvm/test/CodeGen/SystemZ/postra-sched-filter.mir
Log Message:
-----------
[MISched] Apply debug filters before starting a block (#222270)
Apply the `misched-only-func` and `misched-only-block` filters before
calling `startBlock`. This avoids entering a target scheduling strategy
for a filtered block without a matching `finishBlock`/`leaveMBB` call.
Add a SystemZ post-RA scheduler regression that checks a filtered block
does not contribute hazard-recognizer state.
Split from #221984 in response to review.
Commit: 6594e8248e7d9dae26b7909d8c5eec4784d55000
https://github.com/llvm/llvm-project/commit/6594e8248e7d9dae26b7909d8c5eec4784d55000
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
Log Message:
-----------
[AMDGPU] Reject DPP combine when old is narrower than dst (#217894)
Old is copied from the mov dst class, but the combined dst can be wider
(e.g. V_CVT_F64_I32), making old illegal for it
Commit: 4acc5f1ff8d181bb948a60b7eb2a6371e241051e
https://github.com/llvm/llvm-project/commit/4acc5f1ff8d181bb948a60b7eb2a6371e241051e
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move clusterSortPtrAccesses to SLPMemoryUtils (#222235)
Move the BoUpSLP-independent pointer-clustering sort out of
SLPVectorizer.cpp into SLPVectorizer/SLPMemoryUtils.{h,cpp}.
clusterSortPtrAccesses reads the file-local RecursionMaxDepth cl::opt
via getUnderlyingObject; the option stays static in SLPVectorizer.cpp
and the moved helper takes its value as an explicit unsigned parameter
(also captured by the local comparison lambda). Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI
Commit: 34a9870a9851ce16686282fa4d4a19bf477d5934
https://github.com/llvm/llvm-project/commit/34a9870a9851ce16686282fa4d4a19bf477d5934
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/bindings/interface/SBCompileUnitDocstrings.i
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/source/API/SBCompileUnit.cpp
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
Log Message:
-----------
[lldb] Add SBCompileUnit::GetIsOptimized (#222403)
Expose Module::GetIsOptimized through the SB API so clients can tell
whether a compile unit was built with optimization. This change is
motivated by lldb-dap, where I want to extend the protocol::CompileUnit
with this information.
The new tests build the same source with and without -O1, so the test
case can no longer share a build with the others.
Commit: 4d5358b1d224b7eba12b6868e2e112487b876353
https://github.com/llvm/llvm-project/commit/4d5358b1d224b7eba12b6868e2e112487b876353
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
Log Message:
-----------
[SLP][modularisation][NFC] Move BaseShuffleAnalysis to SLPShuffleAnalysis.h (#222236)
Move the BoUpSLP-independent shuffle-analysis base class out of
SLPVectorizer.cpp into a new header-only
SLPVectorizer/SLPShuffleAnalysis.h. BoUpSLP::ShuffleCostEstimator and
BoUpSLP::ShuffleInstructionBuilder keep deriving from it.
createShuffle read the file-local SLPReVec cl::opt in an assert; the
option stays static in SLPVectorizer.cpp and the moved template takes
its value as an explicit bool parameter. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Assisted by AI.
Commit: 90cebef1411617fc3eedd359bdf00cb44b1c2439
https://github.com/llvm/llvm-project/commit/90cebef1411617fc3eedd359bdf00cb44b1c2439
Author: Addmisol <addmisol9 at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
Log Message:
-----------
[MemCpyOpt] Remove libcall availability checks for memory intrinsics (#198558)
Fixes #197683
- Delete the enable-memcpyopt-without-libcalls flag from MemCpyOptimizer
- Remove libcall availability checks in processStoreOfLoad() and
processStore()
- Remove the flag from CUDA/OpenMP toolchain in Clang
- Update no-libcalls.ll test to expect optimizations on all targets
cc @arsenm
Signed-off-by: addmisol <addmisol9 at gmail.com>
Commit: 4cbc99688044679498075d5b2da5e9444832e82a
https://github.com/llvm/llvm-project/commit/4cbc99688044679498075d5b2da5e9444832e82a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
M lldb/tools/lldb-dap/EventHelper.cpp
Log Message:
-----------
[lldb-dap] Set stopped event text for signals and instrumentation (#222394)
DAP maps signals and instrumentation to reason 'exception'. Populate
'text' with the signal or runtime name to distinguish stop types. For
example, text contains the specific signal name (e.g., "SIGABRT") or
instrumentation runtime name (e.g., "AddressSanitizer").
Commit: d54f5e540685516fef383f8fe7cd0ef45382770b
https://github.com/llvm/llvm-project/commit/d54f5e540685516fef383f8fe7cd0ef45382770b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBCompileUnit.h
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/source/API/SBCompileUnit.cpp
M lldb/source/Symbol/SymbolFile.cpp
M lldb/test/API/python_api/compile_unit/Makefile
M lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
A lldb/test/API/python_api/compile_unit/other.c
Log Message:
-----------
[lldb] Add SBCompileUnit::GetIDInModule (#222470)
Expose an ID that identifies a compile unit within its module so clients
can name a CU across API calls and look it up again with
SBModule::GetCompileUnitAtIndex. The user ID is not usable for this:
with a Darwin debug map every compile unit reports uid 0.
CompileUnit stores the index, set by SymbolFileCommon when a CU is
parsed or installed at a given slot.
Commit: f590dfa8e989652cdd906d6ec74ebfe7f8d8d869
https://github.com/llvm/llvm-project/commit/f590dfa8e989652cdd906d6ec74ebfe7f8d8d869
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
A llvm/test/CodeGen/X86/regallocfast-undef-tied-use.mir
Log Message:
-----------
[RegAllocFast] Give an undef tied use the register of its tied def (#222249)
X86TargetLowering::emitSetJmpShadowStackFix zeroes a register by
building an XOR whose two uses are undef reads of its own def (per
MachineOperand.h "... reading the same dont-care value"). Def processing
frees a def whose tied use is undef before the uses are allocated, so
allocVirtRegUndef() no longer finds the virtual register and takes the
head of the allocation order instead. -verify-machineinstrs would fail:
```
renamable $rcx = XOR64rr undef renamable $rax(tied-def 0), undef renamable $rax, implicit-def dead $eflags
*** Bad machine code: Tied physical registers must match. ***
```
Take the register from the tie, and rewrite the instruction's other
reads of the value with it so that they keep agreeing on one register.
Aided by Opus 5
Commit: 6f54fe6b6fb22f8a335fd19b94049fc769dfea25
https://github.com/llvm/llvm-project/commit/6f54fe6b6fb22f8a335fd19b94049fc769dfea25
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
Log Message:
-----------
[BOLT][AArch64][Android] Recover from dump failure instead of exit (#221292)
Embedded in Android app, failed assert() or reportError() during a BOLT
profile dump should not exit the host process. Install a recovery point
in __bolt_instr_data_dump(), so any failure can longjmp back, return a
non-zero value to caller, and set a flag so later dumps can be skipped.
Clang does not support __builtin_setjmp/longjmp for the AArch64 Android
target, so add a minimal hand-written setjmp/longjmp in sys_aarch64.h.
Since the majority Android apps run on AArch64 CPUs, while at this I
defined `ANDROID_AARCH64` and replaced `__ANDROID__` with it in the
instrumentation runtime code.
Assisted-by: opus
Commit: ab618ec375ffe8f2474bac9e4ac82d1f5330fd46
https://github.com/llvm/llvm-project/commit/ab618ec375ffe8f2474bac9e4ac82d1f5330fd46
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Gate 64-bit VGPR copy lowering on operand register class in copyPhysReg (#219562)
copyPhysReg lowers a 64-bit VGPR copy to V_MOV_B64_e32 / V_PK_MOV_B32
when available. Emit the wide move only when the destination and source
are members of the move's HwMode-resolved operand classes; otherwise
fall through to the element-wise V_MOV_B32 expansion, to respect
alignment requirements.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 93ad0d2dbd1d9a27797aefb028ee210b91c2f29d
https://github.com/llvm/llvm-project/commit/93ad0d2dbd1d9a27797aefb028ee210b91c2f29d
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
Log Message:
-----------
[AMDGPU] Restructure VGPR-alignment verifier tests, NFC (#219229)
Rewrite verify-gfx90a-aligned-vgprs.mir and verify-ds-gws-align.mir so each case
documents inline what makes it invalid, and match the verifier's fuller output -
the "*** Bad machine code ***" kind and the "- instruction:" line - instead of a
single message fragment. Pure test restructure with no functional change, so the
follow-up commit that derives alignment from the operand register class shows
only the change in diagnostic wording.
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 1646fcc603b9eea03c6f09a3ed6be25260d3e875
https://github.com/llvm/llvm-project/commit/1646fcc603b9eea03c6f09a3ed6be25260d3e875
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Add myself as NVPTX backend co-maintainer (#215627)
I've been contributing to the NVPTX backend (TableGen, ISel lowering)
and would also like to help maintain it going forward.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: a700f8e71cf4cdf37330aecc41445af2ff4dd105
https://github.com/llvm/llvm-project/commit/a700f8e71cf4cdf37330aecc41445af2ff4dd105
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Semantics/OpenMP/do-concurrent-pure-version.f90
A flang/test/Semantics/OpenMP/do-concurrent-pure.f90
M flang/test/Semantics/OpenMP/pure-procedure.f90
Log Message:
-----------
[FLANG][OpenMP] Handling pure directives in DO CONCURRENT (#216642)
A directive with the PURE property is allowed inside a DO CONCURRENT
construct starting with OpenMP 6.0.
Commit: 17caaa3bdbb229aa63c56864c1452100cfe36f39
https://github.com/llvm/llvm-project/commit/17caaa3bdbb229aa63c56864c1452100cfe36f39
Author: SharonXSharon <xiaoranxu.nju at gmail.com>
Date: 2026-09-09 (Wed, 09 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/unique-internal-linkage-names.cpp
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.c
M clang/test/DebugInfo/Generic/unique-internal-linkage-names-dwarf.cpp
Log Message:
-----------
Revert "[clang] Revert "Disable Unique Internal Linkage Names for internal global vars." (#219261)" (#222486)
This reverts commit 9abbc9183d2231c2e44198100a6cd22ef66e2eb8.
Will reland with a proper fix of the GNU AsmLabelAttr
Co-authored-by: Sharon Xu <sharonxu at fb.com>
Commit: 3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8
https://github.com/llvm/llvm-project/commit/3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/X86/icp-pic.s
Log Message:
-----------
[BOLT][ICP] Use PC-relative instructions for x86 PIC binaries in ICP (#216587)
Currently, BOLT x86 ICP optimization inserts an immediate-to-register
comparison instruction, which forces the use of 32-bit signed (32S)
relocations due to ABI limitations. This behavior does not align well
with the conventions of PIC/PIE binaries and **makes it highly prone to
JITLink relocation overflow errors when dealing with large binaries.**
Therefore, this patch introduces an additional lea instruction for the
x86 architecture to leverage PC-relative (32PC) addressing. This change
is intended to apply by default to PIC binaries, or when specific
options are provided.
Commit: 6fbfc9261c8f453e346773200a13458a170a9a8c
https://github.com/llvm/llvm-project/commit/6fbfc9261c8f453e346773200a13458a170a9a8c
Author: Peiqi Li <voyager.lpq at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
M clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
Log Message:
-----------
[clangd] Enable query-based custom checks (#216336)
Enable query-based custom checks in clangd behind a new `Diagnostics.ClangTidy.ExperimentalCustomChecks` configuration option.
Custom checks are registered from the per-file clang-tidy options and remain subject to clangd's `FastCheckFilter` policy.
Fixes #206696
Assisted by GPT-5.6
Commit: 9e68cbda7816edded93e2c3a4dd03af5d4700026
https://github.com/llvm/llvm-project/commit/9e68cbda7816edded93e2c3a4dd03af5d4700026
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx.c
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
A llvm/test/CodeGen/NVPTX/mbarrier_layout_sm90_ptx93.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm_trait.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_check_layout.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_init.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
Log Message:
-----------
[LLVM][NVPTX][MLIR] Support layouts in mbarrier.init and add mbarrier.check_layout (#217252)
This commit adds LLVM NVPTX and MLIR NVVM support for the mbarrier layout extensions:
- llvm.nvvm.mbarrier.init with trailing immarg `layout` operand, and nvvm.mbarrier.init a matching `layout` attribute (default to 0) Layout 0 is the default in-memory layout and is emitted as a plain mbarrier.init; layout 1 is emitted as mbarrier.init.layout::v1.
- llvm.nvvm.mbarrier.check_layout / nvvm.mbarrier.check_layout, lowering to mbarrier.check_layout.layout::v{0,1}.
Only the layout::v1 form of mbarrier.init and mbarrier.check_layout require PTX ISA 9.3 and sm_90
llvm.nvvm.mbarrier.init{.shared } are also merged into a pointer-overloaded llvm.nvvm.mbarrier.init with calls to either older forms auto-upgraded
Please refer [PTX ISA](https://docs.nvidia.com/cuda/developer-preview/13.4/parallel-thread-execution/index.html)
for more details
Assisted by: Claude Code (Opus 5)
Commit: b89710b49c4a2da1f98ba4b407dcfecaaa90246a
https://github.com/llvm/llvm-project/commit/b89710b49c4a2da1f98ba4b407dcfecaaa90246a
Author: David Green <david.green at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/overflow-vec.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
Log Message:
-----------
[AArch64][GlobalISel] Lower vector overflow intrinsics (#222091)
As we have no native support for vector version of these intrinsics they
should be lowered.
Commit: a91c7395c3fb1a37f69f7d8fb0e78c048faf6cb7
https://github.com/llvm/llvm-project/commit/a91c7395c3fb1a37f69f7d8fb0e78c048faf6cb7
Author: PushkarSingh <149073046+iitianpushkar at users.noreply.github.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[Lifetime Safety] Name operator calls in alias-chain diagnostics (#221803)
This updates Lifetime Safety alias-chain diagnostics to identify
overloaded operator and conversion calls instead of describing them
generically as an `expression`.
Previously, these calls were reported as `expression aliases the storage
of ...`, which could make it unclear which operation introduced the
alias. The diagnostic now reports the callee using the existing
diagnostic name printer, producing descriptions such as:
- `result of call to 'operator->'`
- `result of call to 'operator()'`
- `result of call to 'operator basic_string_view'`
Template arguments are preserved for operator function-template
specializations. For example:
- `result of call to 'operator+<const int>'`
- `result of call to 'operator-<__gnu_cxx::basic_iterator<const int>>'`
This makes each aliasing step explicit and identifies the particular
call responsible for propagating the alias.
References to
[#220248#discussion_r3905817437](https://github.com/llvm/llvm-project/pull/220248#discussion_r3905817437)
Commit: be215a25f00139d68517589d78a79c3aa7a7eb26
https://github.com/llvm/llvm-project/commit/be215a25f00139d68517589d78a79c3aa7a7eb26
Author: Ryan VanderMeulen <ryanvm at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/utils/extract_symbols.py
Log Message:
-----------
[Windows] Don't export clang::interp symbols for plugins (#221295)
With `LLVM_EXPORT_SYMBOLS_FOR_PLUGINS=ON`, `clang.exe` built from the
23.x release branch exports 66679 symbols on x86_64 Windows, over the
65535 limit of the PE export table, so it no longer links:
```
lld-link: error: too many exported symbols (got 66679, max 65535)
```
For comparison, the same configuration on 22.1.8 exports 65465 symbols,
so the headroom was already almost gone.
`clang::interp`, the constant expression bytecode interpreter, accounts
for roughly 4500 of the exported symbols (counted with `llvm-readobj
--coff-exports` on a linked aarch64 23.1.0 `clang.exe`). Its headers
live in `clang/lib/AST/ByteCode` and are not installed; the only mention
in a public header is the forward declaration of `interp::Context` in
`ASTContext.h`. A plugin cannot call into it, so there is no reason to
keep exporting it. Filtering it out follows the existing
`dump`/`dumpColor`/`printPretty` exclusions in
`should_keep_microsoft_symbol`.
Related: #87865 (open; earlier rounds #60109, #56109). This does not get
the MSVC-with-examples configuration from that issue under the limit by
itself, but it removes the largest block of symbols that can never be
used by a plugin, and is what gets the Firefox clang 23 toolchain
(x86_64-pc-windows-msvc, X86;ARM;AArch64;WebAssembly,
clang+lld+clang-tools-extra) from 66679 to roughly 62100 exports.
---
**AI tool use disclosure** (per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html)): this change was
developed with Claude Code assisting in the analysis and drafting. The
root cause was established against real 23.1.0 binaries and libraries,
the patch was reviewed and tested by the author in Firefox's CI, and the
author is accountable for and able to answer questions about it. Commits
carry an `Assisted-by:` trailer.
Commit: a9e26aca790bb0a45f90598223597a9ce2b2b763
https://github.com/llvm/llvm-project/commit/a9e26aca790bb0a45f90598223597a9ce2b2b763
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] Avoid `std::optional<VPValue *>` (NFC) (#222352)
`VPValue *` is already nullable, the `std::optional` is not needed.
Commit: bc6c76a4d4f8b4f6d5e9b663736703f91fcbb6ed
https://github.com/llvm/llvm-project/commit/bc6c76a4d4f8b4f6d5e9b663736703f91fcbb6ed
Author: Ryan VanderMeulen <ryanvm at gmail.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
A llvm/test/tools/extract_symbols/Inputs/lib-itanium.s
A llvm/test/tools/extract_symbols/Inputs/lib-msvc.s
A llvm/test/tools/extract_symbols/Inputs/user-itanium.s
A llvm/test/tools/extract_symbols/Inputs/user-msvc.s
A llvm/test/tools/extract_symbols/lit.local.cfg
A llvm/test/tools/extract_symbols/registry-itanium.test
A llvm/test/tools/extract_symbols/registry-microsoft.test
M llvm/utils/extract_symbols.py
Log Message:
-----------
[Windows] Export Registry<T> members and accessors for plugins again (#221296)
Since #185141 reworked `llvm::Registry`, the registered-node list lives
behind the explicitly specialized
`llvm::detail::getRegistryLinkListInstance<R>()` accessor defined by
`LLVM_DEFINE_REGISTRY`, and the `Head`/`Tail` static data members that
used to be referenced across objects are gone (#163391 had special-cased
those).
`extract_symbols.py` handles neither. The accessor is a `??$` function
template specialization, which the script drops on the assumption that
it can be instantiated in the importing translation unit; here it
cannot, it is defined once by `LLVM_DEFINE_REGISTRY`. And `Registry<T>`
members are only exported when some object references the `Registry`
template, which nothing does anymore because every use goes through the
accessor. On a static clang.exe built with
`LLVM_EXPORT_SYMBOLS_FOR_PLUGINS`, the export table went from 11
`Registry<clang::PluginASTAction>` symbols on 22.1.8 to zero on 23.1.0,
and linking a plugin fails:
```
lld-link: error: undefined symbol: __declspec(dllimport) public: static void __cdecl llvm::Registry<class clang::PluginASTAction>::add_node(class llvm::Registry<class clang::PluginASTAction>::node *)
>>> referenced by host_Registration.obj:(_GLOBAL__sub_I_Registration.cpp)
```
Keep the accessor specializations, and treat a reference to an accessor
as a reference to the `Registry` template so its explicitly instantiated
members are exported as they were before. Verified on the 23.1.0 static
libraries: `Registry<PluginASTAction>::add_node`, the node/iterator
members and the accessor come back for every registry (PluginASTAction,
PragmaHandler, GCStrategy, GCMetadataPrinter, ...), 141 symbols in total
in the Itanium run over the clang libraries. The `Head`/`Tail` rule from
#163391 no longer matches anything and is dropped.
Related: #163367 / #163391 (the previous Registry export fix), #87865.
---
**AI tool use disclosure** (per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html)): this change was
developed with Claude Code assisting in the analysis and drafting. The
root cause was established against real 23.1.0 binaries and libraries,
and the fix was verified by running extract_symbols.py over the 23.1.0
clang static libraries (the Registry members and accessors come back)
and against MSVC-mangled test objects; Firefox's Windows clang-plugin
and mozsearch builds link and run against a clang.exe built with it.
`llvm/test/tools/extract_symbols/` adds lit coverage for both manglings.
The author reviewed the change and is accountable for and able to answer
questions about it. Commits carry an `Assisted-by:` trailer.
Commit: 4d689e68a8e3849cdeb3dae026c07c5f85bdb1b3
https://github.com/llvm/llvm-project/commit/4d689e68a8e3849cdeb3dae026c07c5f85bdb1b3
Author: David Green <david.green at arm.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
Log Message:
-----------
[AArch64][GlobalISel] Use integer types for widening shift icmp (#222257)
Commit: 73db52efe2a644238d7f83af848cc9f76cb5db3a
https://github.com/llvm/llvm-project/commit/73db52efe2a644238d7f83af848cc9f76cb5db3a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M .github/new-prs-labeler.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .mailmap
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Passes/LivenessAnalysis.h
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/FixRISCVCallsPass.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.cpp
M bolt/lib/Target/RISCV/RISCVMCSymbolizer.h
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/runtime/common.h
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
M bolt/test/RISCV/call-link-register.s
A bolt/test/RISCV/call-relocation-pair.s
M bolt/test/RISCV/relax.s
A bolt/test/RISCV/unsymbolized-call-edge.s
A bolt/test/RISCV/unsymbolized-call-entry.s
A bolt/test/RISCV/unsymbolized-call.s
A bolt/test/RISCV/unsymbolized-long-jump.s
A bolt/test/X86/icp-pic.s
M bolt/unittests/Core/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
M clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/QueryBasedCustomChecks.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.md
R clang-tools-extra/docs/clang-tidy/checks/readability/function-cognitive-complexity.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/function-size.md
R clang-tools-extra/docs/clang-tidy/checks/readability/function-size.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.md
R clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.md
R clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.md
R clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-conversion.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.md
R clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-declaration-parameter-name.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.md
R clang-tools-extra/docs/clang-tidy/checks/readability/inconsistent-ifelse-braces.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.md
R clang-tools-extra/docs/clang-tidy/checks/readability/isolate-declaration.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.md
R clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.md
R clang-tools-extra/docs/clang-tidy/checks/readability/make-member-function-const.rst
M clang/CMakeLists.txt
M clang/Maintainers.md
M clang/cmake/modules/CMakeLists.txt
M clang/docs/AMDGPUSupport.md
M clang/docs/AddressSanitizer.md
M clang/docs/AllocToken.md
M clang/docs/AutomaticReferenceCounting.md
M clang/docs/Block-ABI-Apple.md
M clang/docs/BlockLanguageSpec.md
M clang/docs/BoundsSafety.md
M clang/docs/BoundsSafetyAdoptionGuide.md
M clang/docs/BoundsSafetyImplPlans.md
M clang/docs/CIR/ABILowering.md
M clang/docs/CIR/CleanupAndEHDesign.md
M clang/docs/CIR/CodeDuplication.md
M clang/docs/CMakeLists.txt
M clang/docs/CXXTypeAwareAllocators.md
M clang/docs/ClangLinkerWrapper.md
M clang/docs/ClangNVLinkWrapper.md
M clang/docs/ClangOffloadBundler.md
M clang/docs/ClangSYCLLinker.md
M clang/docs/ClangTransformerTutorial.md
M clang/docs/ConstantInterpreter.md
M clang/docs/ControlFlowIntegrity.md
M clang/docs/DataFlowAnalysisIntro.md
M clang/docs/DataFlowSanitizer.md
M clang/docs/DebuggingCoroutines.md
M clang/docs/DriverInternals.md
M clang/docs/FAQ.md
M clang/docs/FunctionEffectAnalysis.md
M clang/docs/HIPSupport.md
M clang/docs/HLSL/AvailabilityDiagnostics.md
M clang/docs/HLSL/EntryFunctions.md
M clang/docs/HLSL/ExpectedDifferences.md
M clang/docs/HLSL/FunctionCalls.md
M clang/docs/HLSL/HLSLIRReference.md
M clang/docs/HLSL/HLSLSupport.md
M clang/docs/HLSL/ResourceTypes.md
M clang/docs/HardwareAssistedAddressSanitizer.md
M clang/docs/InternalsManual.md
M clang/docs/LLVMExceptionHandlingCodeGen.md
M clang/docs/LanguageExtensions.md
M clang/docs/LeakSanitizer.md
M clang/docs/LibASTImporter.md
M clang/docs/LifetimeSafety.md
M clang/docs/MatrixTypes.md
M clang/docs/MemorySanitizer.md
M clang/docs/MisExpect.md
M clang/docs/Modules.md
M clang/docs/OffloadingDesign.md
M clang/docs/OpenCLSupport.md
M clang/docs/OpenMPSupport.md
M clang/docs/OverflowBehaviorTypes.md
M clang/docs/PCHInternals.md
M clang/docs/PointerAuthentication.md
M clang/docs/RISCVSupport.md
M clang/docs/RealtimeSanitizer.md
M clang/docs/ReleaseNotes.md
M clang/docs/SYCLSupport.md
M clang/docs/SafeBuffers.md
M clang/docs/SafeStack.md
M clang/docs/SanitizerCoverage.md
M clang/docs/SanitizerSpecialCaseList.md
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M libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ctor_codecvt.pass.cpp
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R libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer.value/ctor.iter.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer/deref.pass.cpp
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M lldb/source/DataFormatters/TypeSynthetic.cpp
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R lldb/test/Shell/RPC/Generator/Inputs/Server/CheckConstCharPointer.h
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M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/Target/MemoryTest.cpp
M lldb/unittests/TestingSupport/TestUtilities.h
M lldb/unittests/Utility/ArchSpecTest.cpp
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M llvm/cmake/modules/CrossCompile.cmake
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M llvm/include/llvm/ADT/DenseMap.h
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M llvm/include/llvm/CodeGen/SelectionDAG.h
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M llvm/include/llvm/DebugInfo/CodeView/EnumTables.h
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M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/Support/AMDGPUAddrSpace.h
M llvm/include/llvm/Support/DataExtractor.h
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/FinalizeISel.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DebugInfo/CodeView/EnumTables.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/IR/VerifierInternal.h
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/DataExtractor.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPReductionUtils.h
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
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M llvm/test/CodeGen/AArch64/arm64-big-endian-bitconverts.ll
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/cmpbr-early-ifcvt.mir
A llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
A llvm/test/CodeGen/AArch64/fp-intrinsics-bf16.ll
M llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
M llvm/test/CodeGen/AArch64/overflow-vec.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fma-mix-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
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A llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
A llvm/test/CodeGen/AMDGPU/barrier-addrspace-dereference.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_rev_opcode.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
A llvm/test/CodeGen/AMDGPU/null-named-barrier-gv.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.mir
A llvm/test/CodeGen/AMDGPU/read-register-src-flat-scratch-base.ll
A llvm/test/CodeGen/AMDGPU/read-write-register-src-flat-scratch-base-invalid-subtarget.ll
A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-bad-absolute-symbol.ll
A llvm/test/CodeGen/AMDGPU/s-barrier-lowering-wrong-gv-signature.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-epilog-phi.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-gen-structure.mir
M llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-loop-carried-mem.mir
A llvm/test/CodeGen/AMDGPU/type-mismatch-src-flat-scratch-base.ll
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
A llvm/test/CodeGen/AMDGPU/write-register-src-flat-scratch-base.ll
M llvm/test/CodeGen/ARM/vtrn.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/handle-cases.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/handle-to-index.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes-resolved.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes.ll
M llvm/test/CodeGen/Hexagon/anti-dep-partial.mir
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
M llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
A llvm/test/CodeGen/Mips/jalr-no-mangle.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
A llvm/test/CodeGen/NVPTX/mbarrier_layout_sm90_ptx93.ll
A llvm/test/CodeGen/PowerPC/vsx-swap-removal-undef.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint-f16.ll
A llvm/test/CodeGen/RISCV/GlobalISel/lrint-llrint.ll
M llvm/test/CodeGen/RISCV/macro-fusion-add-mem.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-imm-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-imm.mir
M llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-reg.mir
M llvm/test/CodeGen/RISCV/macro-fusion-mul-add.mir
M llvm/test/CodeGen/RISCV/macro-fusion-shift-bit-extract.mir
M llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
M llvm/test/CodeGen/RISCV/macro-fusions.mir
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
M llvm/test/CodeGen/RISCV/xqci-macro-fusions.mir
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-call-before-alloca.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-function-definition-external-call.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at-recursive.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-block.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-calls.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-if-phi.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-loop.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-shared.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-no-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-no-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-same-line.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope-shared.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-scope.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llround.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lround.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
A llvm/test/CodeGen/SystemZ/postra-sched-filter.mir
A llvm/test/CodeGen/SystemZ/zos-xplink64-formal-sub64-extend.ll
M llvm/test/CodeGen/WebAssembly/simd-setcc-reductions.ll
M llvm/test/CodeGen/X86/avx512-masked-op-fusion.ll
M llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
A llvm/test/CodeGen/X86/branch-on-zero.ll
M llvm/test/CodeGen/X86/compress-evex-vpmov-blendv.mir
M llvm/test/CodeGen/X86/compress-evex-vpmov-kill.mir
A llvm/test/CodeGen/X86/eh-return-shstk-32.ll
A llvm/test/CodeGen/X86/eh-return-shstk.ll
A llvm/test/CodeGen/X86/pr222363.ll
A llvm/test/CodeGen/X86/regallocfast-undef-tied-use.mir
A llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
A llvm/test/MC/AMDGPU/buffer-op-lds-operand.s
A llvm/test/MC/AMDGPU/gfx1250-strict_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/AMDGPU/xnack-mask.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/MachO/diff-with-two-sections.s
M llvm/test/MC/MachO/weakdef.s
M llvm/test/MC/MachO/zero-space.s
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/X86/x86_errors.s
M llvm/test/Other/new-pm-O0-ep-callbacks.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-lto-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
M llvm/test/ThinLTO/X86/memprof-funcassigncloning.ll
M llvm/test/ThinLTO/X86/memprof-funcassigncloning2.ll
A llvm/test/Transforms/Attributor/indirect_call_program_address_space.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/header-induction-start-bounds.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/pr70510.ll
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
M llvm/test/Transforms/GVN/PRE/no-phi-translate.ll
M llvm/test/Transforms/GVN/PRE/no-pre-load-for-token-like.ll
A llvm/test/Transforms/InstCombine/icmp-urem.ll
M llvm/test/Transforms/InstCombine/negated-bitmask.ll
M llvm/test/Transforms/InstCombine/recurrence.ll
M llvm/test/Transforms/InstCombine/wcslen-1.ll
M llvm/test/Transforms/LCSSA/token-like-live-out.ll
M llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel-last-iteration.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalar-steps-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/select-first-index-narrow.ll
A llvm/test/Transforms/LoopVectorize/RISCV/scatter-type-mismatch.ll
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-flags.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-intrinsic.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/store-scalarization-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/funclet.ll
M llvm/test/Transforms/LoopVectorize/dbg.value.ll
A llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
A llvm/test/Transforms/LoopVectorize/select-first-index-narrow.ll
M llvm/test/Transforms/LoopVectorize/vectorize-once.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv-btc.ll
M llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/vplan-print-before-after.ll
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
M llvm/test/Transforms/MemProfContextDisambiguation/duplicate-context-ids.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloning2.ll
M llvm/test/Transforms/MemProfContextDisambiguation/funcassigncloningrecursion.ll
M llvm/test/Transforms/MemProfContextDisambiguation/inlined3.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
A llvm/test/Transforms/PhaseOrdering/lto-is-constant.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-shared-loop-invariant.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
M llvm/test/Transforms/SimpleLoopUnswitch/token-uses.ll
M llvm/test/Transforms/SimplifyCFG/switch-select-remap.ll
R llvm/test/Transforms/SimplifyCFG/token_like_type.ll
M llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
M llvm/test/Verifier/AMDGPU/alloca.ll
A llvm/test/Verifier/AMDGPU/global-variable.ll
M llvm/test/Verifier/tokenlike1.ll
M llvm/test/Verifier/tokenlike5.ll
M llvm/test/Verifier/tokenlike6.ll
M llvm/test/Verifier/tokenlike7.ll
A llvm/test/tools/extract_symbols/Inputs/lib-itanium.s
A llvm/test/tools/extract_symbols/Inputs/lib-msvc.s
A llvm/test/tools/extract_symbols/Inputs/user-itanium.s
A llvm/test/tools/extract_symbols/Inputs/user-msvc.s
A llvm/test/tools/extract_symbols/lit.local.cfg
A llvm/test/tools/extract_symbols/registry-itanium.test
A llvm/test/tools/extract_symbols/registry-microsoft.test
M llvm/test/tools/gold/X86/multiple-sections.ll
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
A llvm/test/tools/llvm-mca/AMDGPU/buffer-op-lds-operand.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-cov5.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx90a.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx950.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
M llvm/test/tools/llvm-offload-wrapper/offload-wrapper.ll
A llvm/test/tools/llvm-pdbutil/compile3sym.yaml
A llvm/test/tools/llvm-pdbutil/frameprocsym.yaml
A llvm/test/tools/llvm-readobj/MachO/cpu-capabilities.yaml
M llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
M llvm/test/tools/llvm-readobj/MachO/file-headers.test
M llvm/tools/llvm-objdump/ObjdumpOpts.td
M llvm/tools/llvm-readobj/MachODumper.cpp
M llvm/tools/lto/lto.cpp
M llvm/tools/lto/lto.exports
M llvm/tools/opt/NewPMDriver.cpp
M llvm/unittests/ADT/DenseMapTest.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
M llvm/unittests/Support/DataExtractorTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/unittests/Transforms/Utils/LocalTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
M llvm/utils/extract_symbols.py
M llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
A llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lldbDataFormatters.py
M llvm/utils/profcheck-xfail.txt
M mlir/CMakeLists.txt
M mlir/cmake/modules/CMakeLists.txt
M mlir/docs/Remarks.md
M mlir/docs/SPIRVToLLVMDialectConversion.md
M mlir/include/mlir/ABI/ABIRewriteContext.h
M mlir/include/mlir/Dialect/Affine/TransformOps/AffineTransformOps.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/include/mlir/Dialect/Bufferization/TransformOps/BufferizationTransformOps.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
M mlir/include/mlir/Dialect/Func/TransformOps/FuncTransformOps.td
M mlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgMatchOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/MemRef/TransformOps/MemRefTransformOps.td
M mlir/include/mlir/Dialect/NVGPU/TransformOps/NVGPUTransformOps.td
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/include/mlir/Dialect/Tensor/TransformOps/TensorTransformOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/Dialect/Transform/TuneExtension/TuneExtensionOps.td
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/XeGPU/TransformOps/XeGPUTransformOps.td
M mlir/include/mlir/IR/Remarks.h
M mlir/include/mlir/Interfaces/TilingInterface.h
A mlir/include/mlir/Remark/LLVMRemarkImport.h
M mlir/include/mlir/Target/LLVM/ModuleToObject.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/include/mlir/Transforms/CMakeLists.txt
M mlir/lib/ABI/Targets/Test/TestTarget.cpp
M mlir/lib/Bytecode/CMakeLists.txt
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp
M mlir/lib/Dialect/ArmNeon/IR/ArmNeonDialect.cpp
M mlir/lib/Dialect/ArmNeon/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSME/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp
M mlir/lib/Dialect/ArmSVE/IR/CMakeLists.txt
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeVectorStorage.cpp
M mlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
M mlir/lib/Dialect/DLTI/CMakeLists.txt
M mlir/lib/Dialect/EmitC/IR/CMakeLists.txt
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/GPU/Utils/CMakeLists.txt
M mlir/lib/Dialect/IRDL/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMOps.h
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/VCIXDialect.cpp
M mlir/lib/Dialect/Linalg/IR/CMakeLists.txt
M mlir/lib/Dialect/MemRef/TransformOps/MemRefTransformOps.cpp
M mlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/OpenACCMPCommon/Interfaces/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Ptr/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
M mlir/lib/Dialect/SCF/Transforms/ForallToParallel.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/lib/Dialect/SparseTensor/IR/CMakeLists.txt
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
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M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
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M mlir/lib/Remark/CMakeLists.txt
A mlir/lib/Remark/LLVMRemarkImport.cpp
M mlir/lib/Target/LLVM/CMakeLists.txt
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M mlir/lib/Target/SPIRV/CMakeLists.txt
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M mlir/test/CMakeLists.txt
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ComplexToLLVM/complex-range-option.mlir
M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
M mlir/test/Conversion/FuncToLLVM/func-memref-return.mlir
M mlir/test/Conversion/FuncToLLVM/func-to-llvm.mlir
M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
M mlir/test/Conversion/GPUCommon/transfer_write.mlir
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M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barriers-gfx12.mlir
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
M mlir/test/Conversion/VectorToLLVM/vector-load-store-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/ops.mlir
M mlir/test/Dialect/Arith/unsigned-when-equivalent.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/EmitC/canonicalize.mlir
M mlir/test/Dialect/EmitC/form-expressions.mlir
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/invalid_types.mlir
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M mlir/test/Dialect/EmitC/types.mlir
M mlir/test/Dialect/Func/func-transform.mlir
A mlir/test/Dialect/GPU/module-to-binary-nvvm-remarks.mlir
M mlir/test/Dialect/GPU/transform-gpu-failing.mlir
M mlir/test/Dialect/GPU/transform-gpu.mlir
M mlir/test/Dialect/LLVM/lower-to-llvm-transform-symbol-def.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/LLVMIR/bytecode.mlir
M mlir/test/Dialect/LLVMIR/canonicalize.mlir
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M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm_trait.mlir
M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
M mlir/test/Dialect/LLVMIR/parameter-attrs-invalid.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/LLVMIR/tbaa-roundtrip.mlir
M mlir/test/Dialect/Linalg/continuous-tiling-full.mlir
M mlir/test/Dialect/Linalg/continuous-tiling-multiway-split.mlir
M mlir/test/Dialect/Linalg/convert-conv2d-to-img2col.mlir
M mlir/test/Dialect/Linalg/hoisting.mlir
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/match-ops-invalid.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/multisize-tiling-full.mlir
M mlir/test/Dialect/Linalg/pad-to-specific-memory-space.mlir
M mlir/test/Dialect/Linalg/promote.mlir
M mlir/test/Dialect/Linalg/promotion_options.mlir
M mlir/test/Dialect/Linalg/td/decompose-pack.mlir
M mlir/test/Dialect/Linalg/td/decompose-unpack.mlir
M mlir/test/Dialect/Linalg/td/propagate-data-layout.mlir
M mlir/test/Dialect/Linalg/td/vectorize-with-patterns.mlir
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Dialect/Linalg/transform-op-bufferize-to-allocation.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse.mlir
M mlir/test/Dialect/Linalg/transform-op-hoist-pad-build-packing-loop-nest.mlir
M mlir/test/Dialect/Linalg/transform-op-hoist-pad.mlir
M mlir/test/Dialect/Linalg/transform-op-multitile-sizes.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface-multiple-of.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir
M mlir/test/Dialect/Linalg/transform-op-pad.mlir
M mlir/test/Dialect/Linalg/transform-op-rewrite-in-destination-passing-style.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize-matmul.mlir
M mlir/test/Dialect/Linalg/transform-op-split-reduction-by-scaling.mlir
M mlir/test/Dialect/Linalg/transform-op-split-reduction.mlir
M mlir/test/Dialect/Linalg/transform-op-split.mlir
M mlir/test/Dialect/Linalg/transform-op-vectorize.mlir
M mlir/test/Dialect/Linalg/transform-ops-invalid.mlir
M mlir/test/Dialect/Linalg/transform-ops.mlir
M mlir/test/Dialect/Linalg/transform-promotion.mlir
M mlir/test/Dialect/Linalg/transform-tile-and-fuse-pack-unpack.mlir
M mlir/test/Dialect/Linalg/transform-winograd-conv2d.mlir
M mlir/test/Dialect/Linalg/vectorization/contraction-interface.mlir
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns-flatten.mlir
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/extract.mlir
M mlir/test/Dialect/Linalg/vectorization/insert-slice-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
M mlir/test/Dialect/Linalg/vectorization/pad-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/unsupported.mlir
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A mlir/test/Dialect/MemRef/transform-ops-assembly-invalid.mlir
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M mlir/test/Dialect/MemRef/transform-ops.mlir
M mlir/test/Dialect/NVGPU/transform-create-async-groups.mlir
M mlir/test/Dialect/NVGPU/transform-pipeline-shared.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadx-heap.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/SCF/transform-op-coalesce.mlir
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M mlir/test/Dialect/Transform/check-use-after-free.mlir
M mlir/test/Dialect/Transform/expensive-checks.mlir
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M mlir/test/Dialect/Transform/selective-targeting.mlir
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M mlir/test/Dialect/Transform/test-interpreter-printing.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
M mlir/test/Dialect/Transform/test-loop-transforms.mlir
M mlir/test/Dialect/Transform/test-pass-application.mlir
M mlir/test/Dialect/Transform/test-pattern-application.mlir
M mlir/test/Dialect/Transform/test-tune-extension.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/transform-op-vector-to-llvm.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
M mlir/test/Dialect/Vector/vector-transfer-drop-unit-dims-patterns.mlir
M mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
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M mlir/test/Examples/transform-opt/self-contained.mlir
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M mlir/test/Examples/transform/Ch3/sequence.mlir
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M mlir/test/IR/core-ops.mlir
M mlir/test/Integration/Dialect/EmitC/td.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmNeon/matmul-i8.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
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M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir
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M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/td/pack-unpack.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/mmt4d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-dynamic-inner-tile.mlir
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M mlir/test/Integration/Dialect/Linalg/CPU/unpack-dynamic-inner-tile.mlir
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M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-using-interface.mlir
M mlir/test/Target/Cpp/attrs.mlir
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M mlir/test/Target/Cpp/member.mlir
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M mlir/test/Target/Cpp/variable.mlir
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M mlir/test/Target/LLVMIR/Import/fastmath.ll
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/function-metadata.ll
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M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
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M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
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M mlir/test/Target/LLVMIR/loop-metadata.mlir
A mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_check_layout.mlir
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M mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
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M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/opaque-ptr.mlir
M mlir/test/Target/LLVMIR/openmp-allocate-directive.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-nontemporal.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-simd-private.mlir
M mlir/test/Target/LLVMIR/openmp-simd-reduction-simple.mlir
M mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
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A mlir/test/Target/LLVMIR/openmp-task-threadset.mlir
A mlir/test/Target/LLVMIR/openmp-taskloop-threadset.mlir
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M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/target-ext-type.mlir
M mlir/test/Transforms/canonicalize.mlir
M mlir/test/Transforms/inlining.mlir
M mlir/test/Transforms/sccp.mlir
M mlir/test/Transforms/scf-replace-with-new-yields.mlir
M mlir/test/Transforms/test-block-legalization.mlir
M mlir/test/lib/Dialect/NVGPU/TestNVGPUTransforms.cpp
M mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
M mlir/test/lib/Dialect/TestDyn/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/CMakeLists.txt
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.td
M mlir/test/lib/Dialect/XeGPU/CMakeLists.txt
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/test/python/dialects/transform.py
M mlir/test/python/dialects/transform_bufferization_ext.py
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M mlir/test/python/dialects/transform_loop_ext.py
M mlir/test/python/dialects/transform_memref_ext.py
M mlir/test/python/dialects/transform_structured_ext.py
M mlir/test/python/dialects/transform_tensor_ext.py
M mlir/test/python/integration/dialects/transform.py
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/unittests/ABI/ABIRewriteContextTest.cpp
M mlir/unittests/CMakeLists.txt
M mlir/unittests/IR/RemarkTest.cpp
A mlir/unittests/Remark/CMakeLists.txt
A mlir/unittests/Remark/LLVMRemarkImportTest.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
M offload/plugins-nextgen/level_zero/include/L0Options.h
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M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
A offload/test/offloading/thread_limit_below_wavefront.c
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/i18n/en_US.txt
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_traits.cpp
M openmp/runtime/src/kmp_traits.h
M openmp/runtime/unittests/Traits/TestOMPTraitParser.cpp
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A orc-rt/test/unit/support/ManglingTest.cpp
A runtimes/cmake/Modules/GetSanitizerFlags.cmake
M third-party/unittest/googletest/include/gtest/internal/custom/gtest-printers.h
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A utils/docs/llvm_sphinx/ext/furo.py
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-----------
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Created using spr 1.3.7
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