[all-commits] [llvm/llvm-project] 3fd4d1: [BOLT][ICP] Use PC-relative instructions for x86 P...
Jinjie Huang via All-commits
all-commits at lists.llvm.org
Wed Sep 9 22:57:58 PDT 2026
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8
https://github.com/llvm/llvm-project/commit/3fd4d1fa4ddfc9aca3522c58247962eeb8f21cd8
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2026-09-10 (Thu, 10 Sep 2026)
Changed paths:
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/X86/icp-pic.s
Log Message:
-----------
[BOLT][ICP] Use PC-relative instructions for x86 PIC binaries in ICP (#216587)
Currently, BOLT x86 ICP optimization inserts an immediate-to-register
comparison instruction, which forces the use of 32-bit signed (32S)
relocations due to ABI limitations. This behavior does not align well
with the conventions of PIC/PIE binaries and **makes it highly prone to
JITLink relocation overflow errors when dealing with large binaries.**
Therefore, this patch introduces an additional lea instruction for the
x86 architecture to leverage PC-relative (32PC) addressing. This change
is intended to apply by default to PIC binaries, or when specific
options are provided.
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