[all-commits] [llvm/llvm-project] 148612: Stop reporting two M0-indexed accesses as triviall...

[Gheorghe-Teodor Bercea via All-commits]

  Branch: refs/heads/users/doru1004/pr2-more-as13
  Home:   https://github.com/llvm/llvm-project
  Commit: 148612fed7bc1c9a9eeaa7730c120eb6e539eef5
      https://github.com/llvm/llvm-project/commit/148612fed7bc1c9a9eeaa7730c120eb6e539eef5
  Author: Gheorghe-Teodor Bercea <dobercea at amd.com>
  Date:   2026-09-09 (Wed, 09 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/unittests/Target/AMDGPU/VGPRAsMemory.cpp

  Log Message:
  -----------
  Stop reporting two M0-indexed accesses as trivially disjoint


  Commit: ce3b4bb2ae9e4bafaffa95cc43c5bb02d1847fac
      https://github.com/llvm/llvm-project/commit/ce3b4bb2ae9e4bafaffa95cc43c5bb02d1847fac
  Author: Gheorghe-Teodor Bercea <dobercea at amd.com>
  Date:   2026-09-09 (Wed, 09 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td

  Log Message:
  -----------
  Set up M0 for VGPR-memory accesses in a custom inserter


Compare: https://github.com/llvm/llvm-project/compare/00c6bbcf0e9d...ce3b4bb2ae9e

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