[all-commits] [llvm/llvm-project] 6b7280: [BOLT][RISCV] Fix AUIPC/JALR call rewriting (#216882)

[Alexander Wilson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6b728014512aefa838e3b1674355589c901cdde2
      https://github.com/llvm/llvm-project/commit/6b728014512aefa838e3b1674355589c901cdde2
  Author: Alexander Wilson <rdtscp at meta.com>
  Date:   2026-09-09 (Wed, 09 Sep 2026)

  Changed paths:
    M bolt/lib/Core/Relocation.cpp
    M bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
    M bolt/lib/Target/RISCV/RISCVMCSymbolizer.cpp
    M bolt/lib/Target/RISCV/RISCVMCSymbolizer.h
    A bolt/test/RISCV/call-relocation-pair.s
    A bolt/test/RISCV/unsymbolized-call-edge.s
    A bolt/test/RISCV/unsymbolized-call-entry.s
    A bolt/test/RISCV/unsymbolized-call.s
    A bolt/test/RISCV/unsymbolized-long-jump.s

  Log Message:
  -----------
  [BOLT][RISCV] Fix AUIPC/JALR call rewriting (#216882)

This builds on the RISC-V decoder support from #217550 and the BOLT
target symbolizer and GOT relocation handling from #217944, both of
which are now merged.

`R_RISCV_CALL` and `R_RISCV_CALL_PLT` cover an AUIPC/JALR pair, but BOLT
treated them as four-byte relocations and decoded only the AUIPC
immediate. Read both instructions and combine their signed high and low
immediates so relocated call targets retain the low 12 bits.

LTO can also leave linker-resolved intra-section AUIPC/JALR calls
without relocations. On RV64, recognize standard call and tail-call
pairs during disassembly, reconstruct the target (including JALR
target-bit clearing), and attach an exact entry-point symbol before
function reordering. Alternate link-register preservation is provided by
the merged #218408.

This follows the RISC-V Unprivileged ISA sections on AUIPC and JALR:
https://docs.riscv.org/reference/isa/v20260120/unpriv/rv32.html

It also follows the RISC-V ELF psABI procedure-call relocations:
https://riscv-non-isa.github.io/riscv-elf-psabi-doc/#_relocations

Tests cover relocation-backed calls, relocation-free RV64 calls and tail
calls, exact function entry points, signed offsets, JALR target-bit
clearing, and rejection of near matches.

Validation:

- Rebuilt `llvm-bolt`, `llvm-mc`, `llvm-objdump`, `llvm-readelf`, and
`lld`.
- All 658 tests in `bolt/test/RISCV` and `llvm/test/MC/RISCV` pass on
current `main`.

**Scope:** Relocation-free recovery is intentionally RV64-only. RV32
XLEN-wrapped target arithmetic remains out of scope. Symbolizer
infrastructure and GOT correctness are provided by #217944 rather than
this PR.

Assisted-by: Codex



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