[all-commits] [llvm/llvm-project] d1c0cc: [AMDGPU] Do not freeze reserved registers in AMDGP...

[Michael Halkenhäuser via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d1c0cc5e760f9cbb68e2acec80a476c4b8b898b7
      https://github.com/llvm/llvm-project/commit/d1c0cc5e760f9cbb68e2acec80a476c4b8b898b7
  Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
  Date:   2026-09-09 (Wed, 09 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
    M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll

  Log Message:
  -----------
  [AMDGPU] Do not freeze reserved registers in AMDGPUReserveWWMRegs (#222193)

Refreshing the shared RegisterClassInfo needs an up-to-date reserved set, but
freezing it into MachineRegisterInfo, as #221849 did, publishes it too early:
clearing the per-lane VGPR mask unreserves those registers, and LiveIntervals
does not extend a reserved register's unit ranges to its uses, so those uses
fail verification.

Take the set from TargetRegisterInfo instead. It is the same set, and the
register allocator still freezes it into MachineRegisterInfo itself.

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