[all-commits] [llvm/llvm-project] 7fd679: [Bazel] Fixes 64171f0 (#221585)
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Mon Sep 7 11:31:33 PDT 2026
Branch: refs/heads/users/alexey-bataev/spr/slpsupport-copyable-gepzext-main-ops-and-relax-gather-pointer-compatibility
Home: https://github.com/llvm/llvm-project
Commit: 7fd679a3fdb585f2fd75d950e396c11901bfd62c
https://github.com/llvm/llvm-project/commit/7fd679a3fdb585f2fd75d950e396c11901bfd62c
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-06 (Sun, 06 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 64171f0 (#221585)
This fixes 64171f09367ae70475eebe9184353ca5948681fb (#221123).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=64171f09367ae70475eebe9184353ca5948681fb
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: cc4b3c91c6d3b557d175622c2c326e98ced61fbe
https://github.com/llvm/llvm-project/commit/cc4b3c91c6d3b557d175622c2c326e98ced61fbe
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-06 (Sun, 06 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/Hexagon/sffms.ll
Log Message:
-----------
DAGCombiner: Drop AllowFPOpFusion from visitFSUBForFMACombine (#221439)
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: c2dd24dc601f9e7f66ec813ab33baab34585d506
https://github.com/llvm/llvm-project/commit/c2dd24dc601f9e7f66ec813ab33baab34585d506
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/overflow-mul.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
Log Message:
-----------
[InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (#220658)
Change processUMulZExtIdiom to also support adds, since the idiom is the
same, except with add instead of mul.
Alive2: https://alive2.llvm.org/ce/z/SsB4AK
Commit: 08fb771d71de39421d1e9e200c8b8a0b06d74220
https://github.com/llvm/llvm-project/commit/08fb771d71de39421d1e9e200c8b8a0b06d74220
Author: Avi Kivity <avi at scylladb.com>
Date: 2026-09-06 (Sun, 06 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/DebugInfo/CXX/limited-ctor.cpp
Log Message:
-----------
Revert "[DebugInfo] Ignore undefined constexpr constructors in constructor homing." (#221566)
This reverts commit
https://github.com/llvm/llvm-project/commit/6ba0802b406e0963720a698702b9136578dde149
(https://github.com/llvm/llvm-project/pull/218165).
canUseCtorHoming() used to bail out on
hasConstexprNonCopyMoveConstructor().
That commit narrowed the exemption to *defined* constexpr constructors,
on the
assumption that a constructor which is not defined here will be defined
- and
will therefore emit the type's debug info - in whichever translation
unit
constructs the object.
That assumption does not hold when the constructor is never invoked at
all. A
constructor of a class template specialization is only instantiated, and
hence
only defined, where it is used. If nothing ever constructs the
specialization,
its constructors are defined in no translation unit, and so nothing
anywhere
homes the type - even though the type still has to be complete in order
to read
a member.
(The reverted commit's stated rationale, that "declared constexpr
constructors
are not callable in a TU that doesn't see their definition", does not
hold
either: such a constructor can be called outside a constant expression,
with
the definition supplied by another translation unit, and clang emits an
ordinary external call for it. But that is not what breaks here.)
Unions of layout-compatible types are where this bites. The common
initial
sequence rule ([class.mem.general]p26, 9.2/19 in C++11) lets a program
write
through one union member and read through another where the two share a
common
initial sequence, and absl::container_internal::map_slot_type is built
on it:
it aliases std::pair<const K, V> and std::pair<K, V> so that
flat_hash_map<K, V> can hand out pair<const K, V> references while still
moving
keys efficiently. Slots are created and destroyed through the mutable
pair and
only read through the const-key one, so a std::pair<const K, V> is never
constructed, none of its constructors is ever instantiated, and its type
is
emitted nowhere.
Reduced, and linkable - the following compiles, links and returns 0:
template <class A, class B> struct mypair {
A first;
B second;
constexpr mypair() : first(), second() {}
constexpr mypair(const A& a, const B& b) : first(a), second(b) {}
};
template <class K, class V>
union map_slot_type {
map_slot_type() {}
~map_slot_type() {}
using value_type = mypair<const K, V>; // read, never constructed
using mutable_value_type = mypair<K, V>; // constructed
value_type value;
mutable_value_type mutable_value;
K key;
};
map_slot_type<unsigned long, void*> slot;
int marker;
int main() {
slot.mutable_value = mypair<unsigned long, void*>(42, &marker);
return (slot.value.first == 42 && slot.value.second == &marker) ? 0 : 1;
}
mypair<unsigned long, void*> is constructed and keeps its debug info.
mypair<const unsigned long, void*> is only read, and is emitted as a
declaration in every translation unit, so a debugger cannot show first
and
second:
clang 22.1.8 DW_AT_byte_size (0x10)
clang 24.0.0git DW_AT_declaration (true)
This is how it was found - gdb reporting "<incomplete type>" for
std::pair<const size_t, ...> in ScyllaDB, which broke the flat_hash_map
readers
in its gdb scripts.
Keep the test coverage the reverted commit added for the cases whose
expected
output is unchanged, restore the DeclaredConstexpr expectation to full
debug
info, and add the aliased-pair case above.
Fixes https://github.com/llvm/llvm-project/issues/221560
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 68f48bd751e4def54642707b2e44bbcab4f8d948
https://github.com/llvm/llvm-project/commit/68f48bd751e4def54642707b2e44bbcab4f8d948
Author: benscharl <benscharl42 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/icmp-power2-and-icmp-shifted-mask.ll
M llvm/test/Transforms/InstCombine/nested-select.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[ValueTracking] Infer implied conditions through masked bit tests (#219626)
Fixes #214397
`isImpliedCondICmps` failed when one compare constrains X and the other
tests a value derived from X. For example:
`X u<13` implies `(X & 16) == 0`
This adds an additional check. When both compares have constant RHS
operands and the second compare's LHS is `and (L0, C)`, following
strategy is applied: L0's range is derived from the first compare and
the mask is applied. If the resulting range satisfies the second
predicate for all values, the implication is correct. If the inverse
predicate is satisfied for all values, the implication is false.
Otherwise the result is unknown.
Alive2: https://alive2.llvm.org/ce/z/aa62Yy
Commit: e384c0d60bf44f432a9e9d56c81c2f372452fb02
https://github.com/llvm/llvm-project/commit/e384c0d60bf44f432a9e9d56c81c2f372452fb02
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-06 (Sun, 06 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/all-ones-null-pointer.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/negative-step-deref-off-by-eltsize.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis-forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
Log Message:
-----------
[LAA] Fix inverted bounds for negative-step AddRecs with unknown end. (#218388)
Currently we use an conservative upper bound (-1) for runtime checks
when evaluating the AddRec may wrap.
This does not properly account for negative steps. In that case, we need
to use null as conservative lower bound.
One complication is that the null pointer may not be zero, so we need to
check for that, and bail out completely if that's the case. We then must
clean up any pointers partially added.
PR: https://github.com/llvm/llvm-project/pull/218388
Commit: be3c61a954c5f80f179991df6eefa3d4e3570bba
https://github.com/llvm/llvm-project/commit/be3c61a954c5f80f179991df6eefa3d4e3570bba
Author: Yongqiang Tian <yqtian668 at gmail.com>
Date: 2026-09-06 (Sun, 06 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineOutliner.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/test/CodeGen/AArch64/machine-outliner-debug-admission.mir
M llvm/test/CodeGen/AArch64/machine-outliner-macho-compact-unwind-frame.mir
M llvm/test/CodeGen/AArch64/machine-outliner-mapper-stats.mir
M llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir
A llvm/test/CodeGen/AArch64/machine-outliner-range-debug.mir
A llvm/test/CodeGen/RISCV/machine-outliner-debug-codegen.mir
A llvm/test/CodeGen/RISCV/machine-outliner-mapper-debug-state.mir
Log Message:
-----------
[MachineOutliner] Properly handle Debug MachineInstrs (#219326)
Fixes #219176.
Debug instructions could affect `MachineOutliner` output in two ways:
- The minimum basic-block size check used `MachineBasicBlock::size()`,
which includes debug instructions. A block containing one ordinary
instruction and one debug instruction could therefore enter the mapper
even though it was too small to outline.
- Mapping an invisible debug instruction cleared `AddedIllegalLastTime`.
This changed the separator state and could affect persistent token
numbering, outlined-function ordering, and ultimately the generated
object code.
This patch makes debug instructions transparent to both decisions:
- Use the non-debug instruction count for the minimum block-size check.
- Preserve the mapper's separator state for debug instructions while
retaining the existing behavior for other invisible pseudos.
The patch adds MIR coverage for both cases and updates the existing
mapper statistics test to reflect blocks that are now skipped.
Testing:
- The original reproducer produces identical ordinary MIR before and
after the outliner for `-g0` and `-g`.
- The normalized machine-code fingerprints for the original reproducer
are identical with and without debug information.
- The complete AArch64 and RISC-V CodeGen test directories pass: 6852
passed, 5 expectedly failed, 0 failed.
AI assistance disclosure: OpenAI Codex 5.6 Sol assisted with the
implementation and testing. The changes were co-reviewed by Claude and
Yongqiang Tian.
Commit: adbd9456bdc3cf6287f3cee6fb15424f6f5001cc
https://github.com/llvm/llvm-project/commit/adbd9456bdc3cf6287f3cee6fb15424f6f5001cc
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2026-09-06 (Sun, 06 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
A llvm/test/CodeGen/AArch64/cmpbr-ccmp.ll
A llvm/test/CodeGen/AArch64/cmpbr-ccmp.mir
Log Message:
-----------
[AArch64] Allow forming CCMPs for CB branches (#221111)
AArch64ConditionalCompares currently doesn't consider FEAT_CMPBR CB
instructions when trying to form CCMPs. This leads to a lot more
branches which is usually hurtful for performance.
The patchs adds handling CB instructions, just like we do for other
fused conditional branches such as CBZ or CBNZ.
Commit: 067b6d90b64e8f43c9a2388530b7f98911d77421
https://github.com/llvm/llvm-project/commit/067b6d90b64e8f43c9a2388530b7f98911d77421
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
A orc-rt/test/unit/BedrockTestUtils.h
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/bedrock/NativeDylibManagerTest.cpp
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/support/ProxyTest.cpp
Log Message:
-----------
[orc-rt] Split unit tests into SupportTests and BedrockTests (#221562)
Replace CoreTests with one test binary per layer. SupportTests links the
Support object library and nothing else, so a new support-to-bedrock
dependency fails to link rather than going unnoticed.
Making that work required splitting CommonTestUtils.h: its
Bedrock-dependent helpers move to a new BedrockTestUtils.h, so that no
SupportTests translation unit includes a Bedrock header. That in turn
lets ProxyTest join SupportTests -- Proxy.h only forward-declares
Session, so the test can define its own instead of constructing a real
one.
Commit: b1f20dd48e11439d5a592662b407e07d8213ffee
https://github.com/llvm/llvm-project/commit/b1f20dd48e11439d5a592662b407e07d8213ffee
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-06 (Sun, 06 Sep 2026)
Changed paths:
M llvm/lib/TableGen/StringToOffsetTable.cpp
Log Message:
-----------
[TableGen] Escape single quotes when emitting a string table as char literals (#221612)
Fix a latent bug in StringToOffsetTable, which led to breakage after
#218845
```
C:\_work\llvm-project\llvm-project\build\tools\clang\include\clang/Options/Options.inc(135,18): error: expected expression
C:\_work\llvm-project\llvm-project\build\tools\clang\include\clang/Options/Options.inc(135,24): warning: invalid suffix on literal; C++11 requires a space between literal and identifier [-Wreserved-user-defined-literal]
135 | 'D', 'o', 'n', ''', 't', ' ', 'e', 'm', 'i', 't', ' ', 'e', 'r', 'r', 'o', 'r', 's', ' ', 'o', 'n', ' ', 'i', 'n', 'v', 'a', 'l', 'i', 'd', ' ', 'a', 'n', 'a', 'l', 'y', 'z', 'e', 'r', '-', 'c', 'o', 'n', 'f', 'i', 'g', ' ', 'i', 'n', 'p', 'u', 't', 's', '\0',
| ^
```
Commit: 91d3532e2261e168e85ebcf5c5112419b47ef530
https://github.com/llvm/llvm-project/commit/91d3532e2261e168e85ebcf5c5112419b47ef530
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/X86.cpp
A clang/test/CodeGen/X86/x86_64-unnamed-bitfield-abi-compat.c
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/Targets/X86.cpp
Log Message:
-----------
[Clang][X86] Add Clang23Compat for __int128 bit-field ABI change (#220788)
Follow up of #216777.
Assisted-by: Claude Opus 4.8
Commit: c6fd19f0fe4eb4f9ddd978eb9a6dbc8039acc3dd
https://github.com/llvm/llvm-project/commit/c6fd19f0fe4eb4f9ddd978eb9a6dbc8039acc3dd
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[VPlan] Make m_False and m_True matchers stateless. NFC (#221581)
is_zero_int and is_one avoid storage unlike is_specific_int, and allow
the match function to be an inlined isZero/isOne call instead of
APInt::isSameValue.
Improves compile time:
https://llvm-compile-time-tracker.com/compare.php?from=8f7d3ba08f14c3d54b8b407d1758dbd1da01bb38&to=c766163e82ec7a377efc7a26ef1e6db38e0dec1d&stat=instructions:u
Commit: 2fb183588d6a5067f9a782b822968ddd0f6b4472
https://github.com/llvm/llvm-project/commit/2fb183588d6a5067f9a782b822968ddd0f6b4472
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M lld/ELF/EhFrame.cpp
M lld/ELF/EhFrame.h
M lld/ELF/SyntheticSections.cpp
M lld/test/ELF/eh-frame-fde-encoding.s
R lld/test/ELF/eh-frame-hdr-zero-range.s
M lld/test/ELF/eh-frame-negative-pcrel-sdata2.s
M lld/test/ELF/eh-frame-negative-pcrel-sdata4.s
Log Message:
-----------
Revert "[ELF] Omit zero-range FDEs from .eh_frame_hdr" (#221624)
Reverts llvm/llvm-project#220492
This causes the RISC-V buildbots to fail in the exception handling
tests, see https://lab.llvm.org/buildbot/#/builders/210/builds/12623 for
the gauntlet build logs
Apologies this revert is coming in so late, there is a proposed fix at
https://github.com/llvm/llvm-project/pull/221342 but it looks like it
might require additional rounds of review so reverting to get the
buildbots back to green for now
cc @MaskRay @Prabhuk
Commit: 98baf03a3ca629fa2d690286fb751a05c9fd6965
https://github.com/llvm/llvm-project/commit/98baf03a3ca629fa2d690286fb751a05c9fd6965
Author: Dan Shan <3shandan at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__optional/comparison.h
M libcxx/test/std/utilities/optional/optional.comp_with_t/equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/greater.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/greater_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/less_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/less_than.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/not_equal.pass.cpp
Log Message:
-----------
[libc++] Implement LWG4072: std::optional comparisons: constrain harder (#209968)
Resolves #118345.
Previously, the heterogeneous comparison operators (`==`, `!=`, `<`,
`<=`, `>`, `>=`) for arguments `T` and `U` don't check that `T` or `U`
are not a `std::optional` themselves. This allowed the operators to
cause ambiguous overload resolution instead of falling back to
`optional`'s own operators, which possibly caused hard error when there
should not be a matched overload.
This patch implements the resolution by adding
`!__is_std_optional_v<_Up>` (and the `_Tp` equivalent for the reversed)
to the constraints in all twelve involved operators.
As required by the LLVM Project's AI use policy:
- The fix and test processes were revised and verified with AI
assistance.
Commit: 4edfeaddedd4a1b337a1c17af571127c63f2bbd6
https://github.com/llvm/llvm-project/commit/4edfeaddedd4a1b337a1c17af571127c63f2bbd6
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
A llvm/test/CodeGen/AArch64/interleaved-load-combine-many-candidates.ll
Log Message:
-----------
[InterleavedLoadCombine] Index candidates to avoid quadratic matching (#213053)
Matching scanned every candidate against every other candidate, which
got very slow on functions with many interleaved loads. Index by address
offset and look up neighbors instead.
llc's Compile-time drops from 212s to ~2s on a Grace machine for the
test case in the issue.
[ Compile-time remains flat
](https://llvm-compile-time-tracker.com/?config=Overview&stat=instructions%3Au&remote=madhur13490)
Fixes #162299.
Assisted by Cursor.
Commit: 210e20a4967c19199ab3fe6eae7e9a2a52845459
https://github.com/llvm/llvm-project/commit/210e20a4967c19199ab3fe6eae7e9a2a52845459
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPTypeUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPTypeUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move getNumberOfParts, isAllowedNonPowerOf2VF (#220827)
Move the following BoUpSLP-independent type/width helpers out of
SLPVectorizer.cpp into SLPVectorizer/SLPTypeUtils.{h,cpp}:
getNumberOfParts
isAllowedNonPowerOf2VF
Both read a file-local cl::opt (SLPReVec and VectorizeNonPowerOf2
respectively). The options stay static in SLPVectorizer.cpp; the moved
helpers take their values as explicit bool parameters. Behavior is
unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 18a91e03873c3f8c189e84f446040d7abd2abd66
https://github.com/llvm/llvm-project/commit/18a91e03873c3f8c189e84f446040d7abd2abd66
Author: Jim Lin <jim at andestech.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/memcpy.ll
Log Message:
-----------
[RISCV] Andes: model fast unaligned accesses for the 45-series (#221166)
The 45-series cores support unaligned scalar accesses. Add
FeatureUnalignedScalarMem to each 45-series processor (andes-n45,
andes-nx45, andes-a45, andes-ax45 and andes-ax45mpv), so that it is
selected by -mcpu rather than -mtune. Other processors declare it this
way too. The feature is somewhat architectural: -mtune is only supposed
to affect performance, but reaching it through tune features lets -mtune
introduce unaligned accesses that crash on a CPU which does not support
them.
Cover this in memcpy.ll using -mcpu=andes-a45/-mcpu=andes-ax45. The new
RUN lines pass -mtune=rocket so that the 45-series scheduling model does
not reorder the output, letting them reuse the existing check lines.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 1f74b1a7093113a10d6e8762bad779be2cddfe8f
https://github.com/llvm/llvm-project/commit/1f74b1a7093113a10d6e8762bad779be2cddfe8f
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-prelegalizer-combiner-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-add-nullptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-zext-trunc.mir
Log Message:
-----------
[AMDGPU][GIsel][NPM] Port "AMDGPUPreLegalizerCombiner" to NPM (#217222)
same as https://github.com/llvm/llvm-project/pull/215759
Commit: 2362eeb5f75560740146975e9eabe84c6bd25a0d
https://github.com/llvm/llvm-project/commit/2362eeb5f75560740146975e9eabe84c6bd25a0d
Author: Oliver Hunt <oliver at apple.com>
Date: 2026-09-06 (Sun, 06 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/SemaCUDA/attr-instantiation-duplication-amdgpu.cu
A clang/test/SemaCUDA/attr-instantiation-duplication-spirv.cu
Log Message:
-----------
[clang][Sema][CUDA,SPIRV] Instantiating function templates duplicates GPU attrs (#218582)
A number of GPU related attributes were incorrectly falling back to the
generic attribute instatiation logic which resulted in duplicating the
attributes. The duplicates were also not correctly instantiated.
This also exposed a failure to prevent duplicate addition in
handleGlobalAttr as well.
Commit: b0aa16f2613e45acdaa5cb82db40bfb6359e6fda
https://github.com/llvm/llvm-project/commit/b0aa16f2613e45acdaa5cb82db40bfb6359e6fda
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move isFixedVectorShuffle to SLPUtils (#221639)
Move the BoUpSLP-independent shuffle helper out of SLPVectorizer.cpp
into SLPVectorizer/SLPUtils.{h,cpp}:
isFixedVectorShuffle
It sits with the existing shuffle/mask helpers. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: bfdc7668ae617a228d7d96604580fffc99d239ff
https://github.com/llvm/llvm-project/commit/bfdc7668ae617a228d7d96604580fffc99d239ff
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/support/CMakeLists.txt
M orc-rt/test/unit/CMakeLists.txt
Log Message:
-----------
[orc-rt] Compose Bedrock from object libraries (#221650)
Add orc-rt-bedrock-objects, and rename orc-rt-support to
orc-rt-support-objects, leaving orc-rt-bedrock as a shipped library with
no sources of its own that is composed from both. The -objects suffix
marks targets that produce no artifact.
The unit tests now link the object libraries directly rather than the
shipped library. This will allow them to continue working when Bedrock
becomes buildable as a dylib with no C++ API exported.
Commit: 8878fda06d6885971a4b2fc18d76546583b6dd0d
https://github.com/llvm/llvm-project/commit/8878fda06d6885971a4b2fc18d76546583b6dd0d
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
A clang/test/CIR/CodeGen/spirv-target-lowering-as.cpp
M clang/test/CIR/CodeGenOpenCL/address-space-conversions.cl
M clang/test/CIR/CodeGenOpenCL/address-spaces.cl
M clang/test/CIR/Lowering/address-space.cir
Log Message:
-----------
[CIR][OpenCL][NFC] Add language address-space lowering coverage (#219900)
Expand coverage for lowering OpenCL language address spaces through
target-specific CIR and LLVM IR, including comparison with classic
CodeGen.
Assisted-by: Codex / GPT-5.6 Sol
Commit: e81ab5ffd45b8d870fad4c8a0e14aea7d47f62cf
https://github.com/llvm/llvm-project/commit/e81ab5ffd45b8d870fad4c8a0e14aea7d47f62cf
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/CallingConvLower.h
Log Message:
-----------
[CodeGen] Increase CCState::UsedRegs inline capacity (NFC) (#221259)
CCState::UsedRegs holds one bit per target register. Its inline capacity
of 16 x 32-bit words only covers 512 registers, causing heap allocations
for AArch64 (895), RISCV (645), and PowerPC (612). Increase it to 32,
covering up to 1024 registers and keeping the storage inline for these
targets.
Assisted-by: codex
Commit: a9e273890dc99a3c2662fb14f244fa0acdb1155b
https://github.com/llvm/llvm-project/commit/a9e273890dc99a3c2662fb14f244fa0acdb1155b
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGenHIP/builtin-bool-result.hip
Log Message:
-----------
[CIR] Convert i1 intrinsic results for bool-returning builtins (#220576)
A target builtin with no special case is emitted through the generic
intrinsic path, which returns the intrinsic's own result type. For a
builtin declared to return bool that type is i1, which CIR models as
!cir.int<u, 1> rather than !cir.bool. cir.if accepts only !cir.bool, so
CIR builtin handling needs to convert i1 results to !cir.bool when used
in this context.
This is verified using __builtin_amdgcn_is_shared.
---------
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 8ca2e679a9b3cc149e766e6a04645d7efc50f4f1
https://github.com/llvm/llvm-project/commit/8ca2e679a9b3cc149e766e6a04645d7efc50f4f1
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
[CodeGen] Avoid temporary SmallVector for single memops (NFC) (#221254)
Assisted-by: codex
Commit: d93b10ea300fa0e86a736b3f0aac8605b23caeb9
https://github.com/llvm/llvm-project/commit/d93b10ea300fa0e86a736b3f0aac8605b23caeb9
Author: Rong "Mantle" Bao <rong.bao at csmantle.top>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M bolt/unittests/Core/BinaryContext.cpp
M bolt/unittests/Core/MCPlusBuilder.cpp
M bolt/unittests/Core/MemoryMaps.cpp
M bolt/unittests/Profile/PerfScripts.cpp
Log Message:
-----------
[BOLT][test] Allow uninstantiated tests when no matching targets are enabled (#217604)
When neither X86 nor AArch64 is enabled, e.g. when only enabling the
RISCV target, `check-bolt-unit` triggers GTest's uninstantiated suite
errors on the following cases:
```plain-text
BOLT-Unit :: Core/./CoreTests/GoogleTestVerification/UninstantiatedParameterizedTestSuite<BinaryContextTester>
BOLT-Unit :: Core/./CoreTests/GoogleTestVerification/UninstantiatedParameterizedTestSuite<MCPlusBuilderTester>
BOLT-Unit :: Core/./CoreTests/GoogleTestVerification/UninstantiatedParameterizedTestSuite<MemoryMapsTester>
BOLT-Unit :: Profile/./ProfileTests/GoogleTestVerification/UninstantiatedParameterizedTestSuite<PerfScriptTestHelper>
```
... which looks like the following:
```plain-text
******************** 20:28 [95/2055]
FAIL: BOLT-Unit :: Core/./CoreTests/6/9 (7 of 12)
******************** TEST 'BOLT-Unit :: Core/./CoreTests/6/9' FAILED ********************
Script(shard):
--
GTEST_OUTPUT=json:/home/csmantle/workspace/llvm-project/build/tools/bolt/unittests/Core/./CoreTests-BOLT-Unit-718646-6-9.json GTEST_SHUFFLE=0 GTEST_TOTAL_SHARDS=9 GTEST_SHARD_INDE
X=6 /home/csmantle/workspace/llvm-project/build/tools/bolt/unittests/Core/./CoreTests
--
Script:
--
/home/csmantle/workspace/llvm-project/build/tools/bolt/unittests/Core/./CoreTests --gtest_filter=GoogleTestVerification.UninstantiatedParameterizedTestSuite<BinaryContextTester>
--
/home/csmantle/workspace/llvm-project/bolt/unittests/Core/BinaryContext.cpp:211: Failure
Parameterized test suite BinaryContextTester is defined via TEST_P, but never instantiated. None of the test cases will run. Either no INSTANTIATE_TEST_SUITE_P is provided or the
only ones provided expand to nothing.
Ideally, TEST_P definitions should only ever be included as part of binaries that intend to use them. (As opposed to, for example, being placed in a library that may be linked in
to get other utilities.)
To suppress this error for this test suite, insert the following line (in a non-header) in the namespace it is defined in:
GTEST_ALLOW_UNINSTANTIATED_PARAMETERIZED_TEST(BinaryContextTester);
/home/csmantle/workspace/llvm-project/bolt/unittests/Core/BinaryContext.cpp:211
Parameterized test suite BinaryContextTester is defined via TEST_P, but never instantiated. None of the test cases will run. Either no INSTANTIATE_TEST_SUITE_P is provided or the
only ones provided expand to nothing.
Ideally, TEST_P definitions should only ever be included as part of binaries that intend to use them. (As opposed to, for example, being placed in a library that may be linked in
to get other utilities.)
To suppress this error for this test suite, insert the following line (in a non-header) in the namespace it is defined in:
GTEST_ALLOW_UNINSTANTIATED_PARAMETERIZED_TEST(BinaryContextTester);
```
Add gated `GTEST_ALLOW_UNINSTANTIATED_PARAMETERIZED_TEST` to suppress
such warnings until appropriate tests have been implemented.
Commit: 2cb4f837f087d7ed38aad292b5037cabcb2fcd4c
https://github.com/llvm/llvm-project/commit/2cb4f837f087d7ed38aad292b5037cabcb2fcd4c
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s
Log Message:
-----------
[AMDGPU][NFC] Add gfx13 MC tests for v_mov_b16 and v_swap_b16 (#220863)
Both instructions were already supported on gfx13 but had limited MC
tests coverage.
Commit: b966c71b74e498c3a9570c790a71a5a1a2fe0e2f
https://github.com/llvm/llvm-project/commit/b966c71b74e498c3a9570c790a71a5a1a2fe0e2f
Author: Barbara Mitic <Barbara.Mitic at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll
Log Message:
-----------
[AMDGPU] Fix true16 high-half packing when the low operand is not a VGPR (#220843)
The true16 (hi << 16) | z pattern used v_or_b16 and EXTRACT_SUBREG hi16
on z. That is only valid when z is a VGPR. When z is an immediate (e.g.
0x3c00), EXTRACT_SUBREG hi16 does not isolate the high 16 bits, so the
whole constant is ORed into hi: we get (hi | 0x3c00) << 16 instead of hi
<< 16.
Select v_lshl_or_b32 instead, with z as VSrc_b32, matching the fake16
path.
Commit: 5950bbf1e12fa2445c9de948c3f602f03ba12d62
https://github.com/llvm/llvm-project/commit/5950bbf1e12fa2445c9de948c3f602f03ba12d62
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
Log Message:
-----------
[VPlan] Fix merged replicate region frequency when only one is known. (#221607)
When merging two replicate regions guarded by the same mask, the merged
region's entry frequency should be the higher of the two original
frequencies, since it now fires whenever either original region did.
The existing check only updated the frequency when both were known,
leaving the second region's own (possibly much lower) frequency in place
whenever the first was unknown. This means we might set a misleadingly
low frequency. Conservatively set to unknown instead.
Commit: d1a653eadd3a0b314388965edcbd26fd6890f744
https://github.com/llvm/llvm-project/commit/d1a653eadd3a0b314388965edcbd26fd6890f744
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
Log Message:
-----------
[Sparc] Fix instruction size for delay slot with UNIMP (#220955)
Sparc currently reports all instructions with delay slots as having
twice the size. However, there is a special case for struct returns,
where there is an extra UNIMP instruction. Move needsUnimp() into
SparcInstrInfo, and account for it in the instruction size calculation.
Part of enabling instruction size verification by default.
Commit: 90bc5b106b5f36fd6c6fffd7eb914946ce75b4a3
https://github.com/llvm/llvm-project/commit/90bc5b106b5f36fd6c6fffd7eb914946ce75b4a3
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
A llvm/test/tools/gold/X86/Inputs/multiple-data-section-ordering.txt
M llvm/test/tools/gold/X86/multiple-data.s
M llvm/test/tools/gold/X86/multiple-sections.ll
M llvm/test/tools/gold/lit.local.cfg
Log Message:
-----------
[gold] Switch section-ordering-file tests to use ld.bfd (#219150)
ld.bfd supports `--section-ordering-file` since 2.43. Use it if the
binutils version is sufficiently recent.
The implementation in ld.bfd is significantly different, with the
section ordering file looking more like an incomplete linker script,
rather than a plain section listing.
The addresses of the sections are also slightly different than with
ld.gold. Use hex matches + arithmetic to just check the correct
order/offsets instead of hardcoding the exact choice of address.
ld.bfd also supports --start-lib/--end-lib since 2.47, but it seems like
those don't actually work with linker plugins, so I'm not migrating them
(https://sourceware.org/bugzilla/show_bug.cgi?id=34572).
Followup to https://github.com/llvm/llvm-project/pull/130981.
Commit: 7a67a1ab6f3f6d716462872114a5e12f28cdb42a
https://github.com/llvm/llvm-project/commit/7a67a1ab6f3f6d716462872114a5e12f28cdb42a
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstCombine/ptr-int-cast.ll
M llvm/test/Transforms/InstSimplify/ptrtoint.ll
Log Message:
-----------
[InstSimplify] Don't fold ptrtoint of ptradd of sub (#221188)
Don't fold `ptrtoint (ptradd (Ptr, X - ptrtoint(Ptr))) -> X`. While
valid by itself, the fact that LLVM currently does not properly model
the ptrtoint side effect means that we lose the provenance exposure of
Ptr. This results in end-to-end miscompiles that led to the revert of
#210729.
We can still perform the optimization for ptrtoaddr, which does not
expose provenance.
Commit: 9707960f6f229118dc4500e5c3f1be239fd7efb2
https://github.com/llvm/llvm-project/commit/9707960f6f229118dc4500e5c3f1be239fd7efb2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/and-implied-by-operands.ll
A llvm/test/Transforms/ConstraintElimination/induction-exit-condition-or-and.ll
Log Message:
-----------
[ConstraintElim] Handle single And/Or as exit condition in loop. (#221228)
In some cases, exits conditions in the loop are And/Or of and IV-based
condition and another condition. If the loop continues only if all
conditions are true (AND + true successor is the header, OR + false
successor is the header), we can still use the IV based condition to
bound the IV.
For now, just peels a single AND/OR.
This enables folds in a few additional cases:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1193.
PR: https://github.com/llvm/llvm-project/pull/221228
Commit: ccfc54aa053e1e0614660cc5f3ff0122eff02ab9
https://github.com/llvm/llvm-project/commit/ccfc54aa053e1e0614660cc5f3ff0122eff02ab9
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Attributes.h
M llvm/lib/IR/AttributeImpl.h
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/LLVMContextImpl.h
Log Message:
-----------
[IR] Split the attribute pool by kind. NFC (#221620)
Change Attribute::get overloads to use fine-grained hash-consing pools
(Enum/Int/String/Type), avoiding FoldingSetNodeID serialization
overhead. Use a flat array for Enum attributes, which carry no value.
The two ConstantRange kinds keep using FoldingSet: they are not used
often, and UniquingSet cannot be used with custom UniquingSetInfo
(`APInt::operator==` asserts identical BitWidth).
Aided by Opus 5
Commit: c5a85b9c6996b2459c169ef6a410c501980c9ea0
https://github.com/llvm/llvm-project/commit/c5a85b9c6996b2459c169ef6a410c501980c9ea0
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/CodeGen/Targets/SPIRV.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
M clang/test/CIR/CodeGenOpenCL/address-space-local-var.clcpp
M clang/test/CIR/CodeGenOpenCL/address-spaces.cl
Log Message:
-----------
[CIR] Fix address space issues related to SPIR/SPIR-V targets (#220982)
This adds support for address space lowering for spir/spir64 (not v)
which are still widely used in OpenCL testing despite spirv32/spirv64
targets existence. This also corrects alloca address space for all
mentioned targets from default to private which is semantically correct
for them and avoids emission of spurious address space casts.
Assisted-by: claude in test cases updating
Commit: fc3ad3f8c655e0f74bb763a2d320e2792a96f0b5
https://github.com/llvm/llvm-project/commit/fc3ad3f8c655e0f74bb763a2d320e2792a96f0b5
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
M clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
M clang/test/CIR/IR/enum-attrs.cir
Log Message:
-----------
[CIR] Migrate the FPClassTest bit enum and unquote its flags (#220888)
cir.is_fp_class printed its flags inconsistently. Single-bit values came
out
bare, as in `fcSNan`, while group values and combinations came out
quoted, as
in `"fcInf"` and `"fcSNan|fcNegInf"`. That comes from I32BitEnumAttr
setting
printBitEnumQuoted, which EnumAttr.td keeps only for backwards
compatibility.
Clearing the bit and using the `enum` directive selects the
separator-aware
parser and printer, so every value now spells unquoted:
cir.is_fp_class %x, fcSNan|fcNegInf : (!cir.float) -> !cir.bool
The enum also drops its specialized IntegerAttr for a CIR_EnumAttr
wrapper,
giving it the standalone spelling `#cir.fp_class<fcSNan|fcNegInf>`.
Commit: ae814d03d870475d03446ad9195c305912f062ea
https://github.com/llvm/llvm-project/commit/ae814d03d870475d03446ad9195c305912f062ea
Author: Vimal Patel <vimal.patel at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/call.ll
Log Message:
-----------
[InstSimplify] Improve coverage for zero-shift-guard folding for rotate (#217033)
The current logic responsible to fold zero-shift-guard performed the
folding only when the shift amount is exactly zero. But, the guard could
be eliminated as long as the funnel shift instruction is performing a
bitwise rotate and the shift amount is a multiple of the bitwidth of the
value being rotated. This commit makes this change.
Commit: 345dd01072956b7ddc36dbdfe39df2d991193e07
https://github.com/llvm/llvm-project/commit/345dd01072956b7ddc36dbdfe39df2d991193e07
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/docs/StandardCPlusPlusModules.md
M clang/include/clang/DependencyScanning/ModuleDepCollector.h
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/test/ClangScanDeps/P1689.cppm
A clang/test/ClangScanDeps/p1689-module-map.cppm
Log Message:
-----------
[C++20] [Modules] [ScanDeps] Scan results for module map file (#221652)
Previously we described the trick to use module map to import std module
implicitly. But in practice, this may not work as build tools can't get
the dependencies.
In this patch, we updated clang-scan-deps to report the dependencies
between consumers and the corresponding module described in module map
file in P1689 format. The P1689 format in clang-scan-deps is the defacto
dependency description between compiler and build tools. This helps end
users to use the trick without waiting for the support from various
build tools.
Commit: 1191f353cefe3c7ceb8e76fd03296e082a247685
https://github.com/llvm/llvm-project/commit/1191f353cefe3c7ceb8e76fd03296e082a247685
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/glibc_ptr_align.c
M clang/test/CodeGen/ptr-subtract-stable.c
M clang/test/CodeGen/vla.c
M clang/test/CodeGenCUDA/managed-var.cu
M clang/test/CodeGenOpenCL/address-spaces-conversions.cl
M clang/test/CodeGenOpenCL/nullptr.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/OpenMP/depobj_codegen.cpp
M clang/test/OpenMP/for_range_loop_codegen.cpp
M clang/test/OpenMP/fuse_codegen.cpp
M clang/test/OpenMP/interchange_codegen.cpp
M clang/test/OpenMP/parallel_for_codegen.cpp
M clang/test/OpenMP/reverse_codegen.cpp
M clang/test/OpenMP/split_codegen.cpp
M clang/test/OpenMP/stripe_codegen.cpp
M clang/test/OpenMP/tile_codegen.cpp
Log Message:
-----------
Reapply [Clang][CodeGen] Use ptrtoaddr for pointer diff (#210729) (#221675)
Reapply https://github.com/llvm/llvm-project/pull/210729 without change
after https://github.com/llvm/llvm-project/pull/221188, which should fix
the miscompiles this change exposed.
-----
We don't have to expose the provenance of pointers for pointer
subtraction, so use ptrtoaddr instead of ptrtoint if -fwrapv-pointer is
not set.
Co-authored-by: Alexis Engelke <engelke at in.tum.de>
Commit: 038e968a7ec08ba7d9a262059f8fab91853656ea
https://github.com/llvm/llvm-project/commit/038e968a7ec08ba7d9a262059f8fab91853656ea
Author: Raphael Isemann <rise at apple.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
A lldb/test/API/commands/watchpoints/watchpoint_set_errors/Makefile
A lldb/test/API/commands/watchpoints/watchpoint_set_errors/TestWatchpointSetErrors.py
A lldb/test/API/commands/watchpoints/watchpoint_set_errors/main.c
R lldb/test/Shell/Watchpoint/Inputs/main.cpp
R lldb/test/Shell/Watchpoint/SetErrorCases.test
Log Message:
-----------
[lldb][test] Rewrite Watchpoint/SetErrorCases as API test (#221563)
This test is randomly failing on macOS bots with this error:
```
error: Command requires a process which is currently stopped.
```
There is no test logic in shell tests that can diagnose what is going on
with the process, so this patch rewrites this test as an API test where
we have better error handling.
Commit: 41a09be5d09b14c9f06a2b46f903b388a671546a
https://github.com/llvm/llvm-project/commit/41a09be5d09b14c9f06a2b46f903b388a671546a
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Don't recompute getPlan in simplifyRecipes. NFC (#221582)
getPlan involves a traversal, so avoid doing it on every recipe
simplified.
Improves compile time:
https://llvm-compile-time-tracker.com/compare.php?from=8f7d3ba08f14c3d54b8b407d1758dbd1da01bb38&to=aaeebfa47f57bbf1bc9f26ce9a4e777939f46352&stat=instructions:u
Commit: 544171da142fd5a380a943c9f7ea5150b9f2a293
https://github.com/llvm/llvm-project/commit/544171da142fd5a380a943c9f7ea5150b9f2a293
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/MustExecute.h
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
Log Message:
-----------
[LoopSafetyInfo] Store Loop and automatically compute (NFC) (#221238)
This makes two changes:
* LoopSafetyInfo is bound to a single loop. Store the Loop in the ctor,
so it does not need to be passed to individual queries.
* Automatically compute LoopSafetyInfo on construction, instead of in a
separate call. This is mostly to clarify that (contrary to the doc
comment) nobody is actually trying to invalidate LoopSafetyInfo by
rerunning computeLoopSafetyInfo().
This makes it easier to change implementation details, like computing
information lazily.
Commit: 8d9c175633eb6a6100bdd1b6b67ff780cfc5d1b2
https://github.com/llvm/llvm-project/commit/8d9c175633eb6a6100bdd1b6b67ff780cfc5d1b2
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/test/CIR/IR/invalid-call.cir
M clang/test/CIR/IR/invalid-lang-attr.cir
Log Message:
-----------
[CIR] Move the CIR enums off the legacy EnumAttrInfo hierarchy (#220889)
MLIR has two enum hierarchies. `EnumAttrInfo` doubles as an
`IntegerAttr`
constraint, so every CIR enum had to clear `genSpecializedAttr` to say
it did
not want one. `EnumInfo` describes a C++ enum and nothing more.
Derive the CIR bases from `I32Enum`, `I64Enum` and `I32BitEnum`, and
widen
`CIR_EnumAttr` to the `EnumInfo` that upstream `EnumAttr` already takes.
The
flag no longer exists to clear. `FPClassTestEnum` gets unquoted printing
from
`BitEnumBase` rather than overriding `printBitEnumQuoted`, and
`CIR_KnownFuncKind` drops a `parameterPrinter` the generated
`operator<<`
now covers, still spelling `#cir.func_identity<"std::find">`.
Commit: 2fd8d41d7b8824637be32d569c1e1482128b057b
https://github.com/llvm/llvm-project/commit/2fd8d41d7b8824637be32d569c1e1482128b057b
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/pr216504.ll
Log Message:
-----------
[X86] Don't fold loads from non-fixed stack objects into tail calls (#221243)
Fixes #216504
The callee of a tail call can be folded into the jump as a memory
operand (`TCRETURNmi64`). That jump runs after the epilogue, so the
operand is resolved relative to the incoming stack pointer, which only
works for fixed objects such as incoming arguments. Here the callee was
a `volatile` local, so the load stayed on the stack and got folded,
while a variable-index extract from a 256-bit vector went through a
32-byte stack temporary and forced dynamic realignment. Once the stack
is realigned a local has no static offset from the incoming stack
pointer, and PEI tripped the assertion. The sibcall eligibility check
does look at realignment, but it runs before legalization, so it never
saw the temporary. Spill slots created during register allocation can
cause the same thing, so no check at that point can be complete.
The fold is now refused whenever the load's address may use a non-fixed
frame index, in `checkTCRetEnoughRegs`, which gates both the
`TCRETURNmi` patterns and the callee-load hoisting in
`PreprocessISelDAG`. The callee is loaded into a register before the
epilogue and the call is still emitted as a tail call. Loads from fixed
objects fold as before. As a side effect this also stops the jump from
reading a slot below the restored stack pointer, which was only safe
inside the red zone.
Commit: 73344b523c93f25c9dafcabf803295e92bf5cb5f
https://github.com/llvm/llvm-project/commit/73344b523c93f25c9dafcabf803295e92bf5cb5f
Author: Clemens Wasser <clemens.wasser at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/test/DebugInfo/Generic/debug-label-inline.c
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/id.ll
M llvm/test/DebugInfo/Generic/inline-dbg-values.ll
M llvm/test/DebugInfo/Generic/inline-debug-info-multiret.ll
M llvm/test/DebugInfo/Generic/inline-debug-info.ll
M llvm/test/DebugInfo/Generic/inline-no-debug-info.ll
M llvm/test/DebugInfo/KeyInstructions/Generic/inline.ll
M llvm/test/Transforms/CodeExtractor/PartialInlineDebug.ll
M llvm/test/Transforms/CodeExtractor/PartialInlineVarArgsDebug.ll
M llvm/test/Transforms/Inline/X86/inline-landing-pad.ll
M llvm/test/Transforms/Inline/debug-invoke.ll
M llvm/test/Transforms/Inline/dilocation-loop-metadata-update.ll
M llvm/test/Transforms/Inline/inline_dbg_declare.ll
M llvm/test/Transforms/SafeStack/ARM/debug.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-emit-inline.ll
Log Message:
-----------
[Inliner] Use distinct DILocations and cache inlineDebugLoc by OrigDL (#204817)
Found while profiling clang compiling `SLPVectorizer.cpp`.
The call chain `DILocation::get` -> `DILocation::getImpl` ->
`llvm::getUniqued` caused lots of expensive `DenseSet` `find_as` and
`grow` operations due to the cache being really inefficient. Switch to
`DILocation::getDistinct` and cache `inlineDebugLoc` by `OrigDL` for a
more efficient cache.
Commit: 34c0dc0bbf96ed16f47115b1c9033a450ad2bcf4
https://github.com/llvm/llvm-project/commit/34c0dc0bbf96ed16f47115b1c9033a450ad2bcf4
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/tools/llvm-readobj/COFFDumper.cpp
Log Message:
-----------
[llvm][llvm-readobj][NFC] clang-format COFFDumper.cpp (#221688)
Prior to changes to it in #221224.
This formats the whole file, and when it's landed I'll add the commit
hash to .git-blame-ignore-revs.
Commit: 39daa556ccaa69f6a2db45f414f33fad128e5d48
https://github.com/llvm/llvm-project/commit/39daa556ccaa69f6a2db45f414f33fad128e5d48
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
AArch64: Drop AllowFPOpFusion from isProfitableToHoist (#221402)
Commit: abbc159932f12e00ae4ee834ab662951811be772
https://github.com/llvm/llvm-project/commit/abbc159932f12e00ae4ee834ab662951811be772
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
[llvm][llvm-readobj][NFC] Add formatting commit to ignore revs (#221693)
See #221688.
Commit: 8727da4880d069d0feb0c4346b902dc917500083
https://github.com/llvm/llvm-project/commit/8727da4880d069d0feb0c4346b902dc917500083
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/ambiguous-smartptr-reset-call.md
R clang-tools-extra/docs/clang-tidy/checks/readability/ambiguous-smartptr-reset-call.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/avoid-return-with-void-value.md
R clang-tools-extra/docs/clang-tidy/checks/readability/avoid-return-with-void-value.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/avoid-unconditional-preprocessor-if.md
R clang-tools-extra/docs/clang-tidy/checks/readability/avoid-unconditional-preprocessor-if.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/braces-around-statements.md
R clang-tools-extra/docs/clang-tidy/checks/readability/braces-around-statements.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/const-return-type.md
R clang-tools-extra/docs/clang-tidy/checks/readability/const-return-type.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.md
R clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.md
R clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.md
R clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.md
R clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/enum-initial-value.md
R clang-tools-extra/docs/clang-tidy/checks/readability/enum-initial-value.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [1/5] (#221446)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the first part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: 76a090dfd9d81761087453de3ada2eb7ff2528f7
https://github.com/llvm/llvm-project/commit/76a090dfd9d81761087453de3ada2eb7ff2528f7
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/ambiguous-smartptr-reset-call.md
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-return-with-void-value.md
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-unconditional-preprocessor-if.md
M clang-tools-extra/docs/clang-tidy/checks/readability/braces-around-statements.md
M clang-tools-extra/docs/clang-tidy/checks/readability/const-return-type.md
M clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.md
M clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.md
M clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.md
M clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.md
M clang-tools-extra/docs/clang-tidy/checks/readability/enum-initial-value.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [1/5] (#221447)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the first part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
---------
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Commit: d268cdb7d1fdb5fbc595426092991f9885d18dbf
https://github.com/llvm/llvm-project/commit/d268cdb7d1fdb5fbc595426092991f9885d18dbf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-fmuladd.ll
Log Message:
-----------
CodeGen: Drop AllowFPOpFusion check from fmuladd lowering (#221667)
Commit: 2e30c8e267256e3a2b43985d9be68831c412a1b5
https://github.com/llvm/llvm-project/commit/2e30c8e267256e3a2b43985d9be68831c412a1b5
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
A flang/include/flang/Evaluate/char.h
M flang/include/flang/Evaluate/complex.h
M flang/include/flang/Evaluate/initial-image.h
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Evaluate/logical.h
M flang/include/flang/Evaluate/real.h
M flang/lib/Evaluate/host.h
M flang/lib/Evaluate/initial-image.cpp
Log Message:
-----------
[Flang][NFCI] Use abstraction for binary scalar data (#212956)
There is currently the assumption that the binary representation of the
scalar data classes (Integer, Real, Complex, Logical) is identical to
the binary representation of native types. For instance `Integer<64>`
can be reinterpret-casted to a `int64_t` or serialized using `memcpy`.
This will not be the case anymore with #206907. This first PR introduces
`LoadRawBytes` and `StoreRawBytes` abstractions that can be adapted when
the binary data layout of the scalar data classes change. No functional
change intended.
The binary representation is assumed for these uses:
1. Data serialization in initial-image.h/.cpp
2. Calling native math functions to constant-fold functions such as
`sin` in intrinsics-library.cpp. An abstraction layer has been created
in host.h/host.cpp to convert between host-native types and the scalar
data classes.
Some implementation notes:
* I originally used `CharacterUtils` but it is in a private header file.
Instead I created `CharacterValue` which similar to what #216960 will
introduce to allow a consistent interface between the scalar value
classes (such as `kind()` returning the current runtime kind)
* `bytesStored` is another such common interface. It it meant to
resemble `llvm::DataLayout::getTypeStoreSize` (there is also
`getTypeAllocSize`, `llvm::Type::getPrimitiveSizeInBits()`,
`llvm::Type::getScalarSizeInBits()`) and must match
`common::TypeSizeInBytes`.
* `Real<10>` uses 16-byte alignment regardless what the host compiler
thinks what `long double` should be. The padding is unitialized data in
`X87IntegerContainer`. Even though x87 is the classic example where
"allocation size" and "store size" would be different, Flang does not
differentiate between them and treats all bytes also as stored bytes,
see `common::TypeSizeInBytes`. As a consequence, `Complex<10>` is 32
bytes. initial-image.h/.cpp will even load/store/compare that
uninitialized data. host.h/host.cpp instead reads/writes the floats
separately to translate to whatever the host compiler does.
* initial-image.cpp/.h is inconsistent when it uses number of bytes and
when it uses number of characters
* For the case the image does not have sufficient bytes to read, I did
not want to insert checks whether another byte can be read into every
ReadRawBytes function, and instead add zero-padding explicitly when
necessary.
Assisted-by: AI
Commit: d9bcffd284812c3e29805af27d32fdedd82c5acc
https://github.com/llvm/llvm-project/commit/d9bcffd284812c3e29805af27d32fdedd82c5acc
Author: Romanov Vlad <Vladislav.Romanov at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
A llvm/test/CodeGen/AMDGPU/coexec-sched-agpr-excess.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
Log Message:
-----------
[AMDGPU] Add AGPR pressure tracking (#214745)
Add AGPR pressure tacking in RPDelta.
Commit: 11a9127fbe072d84571712bb5e2aa9ebd964a802
https://github.com/llvm/llvm-project/commit/11a9127fbe072d84571712bb5e2aa9ebd964a802
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M lld/test/COFF/arm64ec-export-thunks.test
M lld/test/COFF/arm64ec-import.test
M lld/test/COFF/baserel.test
M lld/test/COFF/code-merge.s
M lld/test/COFF/common-replacement.s
M lld/test/COFF/merge-data-bss.test
M lld/test/COFF/nodbgdirmerge.test
M lld/test/COFF/secrel-common.s
M lldb/test/Shell/SymbolFile/NativePDB/globals-bss.cpp
M llvm/test/MC/AArch64/seh-large-func-multi-epilog.s
M llvm/test/MC/AArch64/seh-large-func.s
M llvm/test/MC/AArch64/seh.s
M llvm/test/MC/AArch64/win-import-call-optimization.s
M llvm/test/MC/ARM/seh.s
M llvm/test/MC/COFF/addrsig.s
M llvm/test/MC/COFF/align-nops.s
M llvm/test/MC/COFF/basic-coff-64.s
M llvm/test/MC/COFF/basic-coff.s
M llvm/test/MC/COFF/bss.s
M llvm/test/MC/COFF/cgprofile.s
M llvm/test/MC/COFF/module-asm.ll
M llvm/test/MC/COFF/section.s
M llvm/test/MC/COFF/seh-align1.s
M llvm/test/MC/COFF/seh-align2.s
M llvm/test/MC/COFF/seh-align3.s
M llvm/test/MC/COFF/seh-section.s
M llvm/test/MC/COFF/seh.s
M llvm/test/MC/COFF/symbol-fragment-offset-64.s
M llvm/test/MC/COFF/symbol-fragment-offset.s
M llvm/test/MC/X86/win-import-call-optimization.s
M llvm/test/tools/llvm-ar/arm64x-split.yaml
M llvm/test/tools/llvm-objcopy/COFF/add-gnu-debuglink.test
M llvm/test/tools/llvm-objcopy/COFF/add-section-and-set-flags.test
M llvm/test/tools/llvm-objcopy/COFF/empty-sections.s
M llvm/test/tools/llvm-objcopy/COFF/only-keep-debug-rdata.test
M llvm/test/tools/llvm-objcopy/COFF/only-keep-debug.test
M llvm/test/tools/llvm-objcopy/COFF/update-section.test
M llvm/test/tools/llvm-offload-wrapper/coff-opt-ref.ll
M llvm/test/tools/llvm-readobj/COFF/arm64x-hybridobj.yaml
M llvm/test/tools/llvm-readobj/COFF/bigobj.test
M llvm/test/tools/llvm-readobj/COFF/sections-ext.test
M llvm/test/tools/llvm-readobj/COFF/sections.test
M llvm/test/tools/yaml2obj/COFF/xrelocs.yaml
M llvm/tools/llvm-readobj/COFFDumper.cpp
Log Message:
-----------
[llvm][llvm-readobj] Print COFF RawDataSize as hex (#221224)
To match VirtualSize, and Microsoft's dumpbin which prints both as hex:
SECTION HEADER #1
.text name
440B4 virtual size
1000 virtual address (0000000140001000 to 00000001400450B3)
44200 size of raw data
llvm-readobj before this change:
VirtualSize: 0x3478
VirtualAddress: 0x74000
RawDataSize: 3584
And after:
VirtualSize: 0x3478
VirtualAddress: 0x74000
RawDataSize: 0xe00
This was pointed out on
https://github.com/llvm/llvm-project/issues/220618, where I was having
to manually convert the numbers to compare them.
Commit: 65b2748a68c9d20ec4303c3e9bf1ca0398be8777
https://github.com/llvm/llvm-project/commit/65b2748a68c9d20ec4303c3e9bf1ca0398be8777
Author: Tapiwa Gonga <126596199+tapiwagonga at users.noreply.github.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M libc/CMakeLists.txt
A libc/docs/dev/code_coverage.md
M libc/docs/dev/index.md
Log Message:
-----------
[libc] Enable code coverage using continuous instrumentation profiling (#213271)
This patch adds coverage to LLVM-libc using Clang continuous
instrumentation.
The `LIBC_ENABLE_COVERAGE` CMake option enables
`-fprofile-instr-generate=libc_cov_%c%p.profraw`, `-fcoverage-mapping`,
and `-fprofile-continuous` for Clang overlay builds, and is limited to
overlay build.
Developer documentation and usage instructions are added in
`libc/docs/dev/code_coverage.md` and indexed in
`libc/docs/dev/index.md`.
Assisted-by: Automated tooling, human reviewed.
Commit: bb577f620571ce3bb97f2e717b53500574a9cf27
https://github.com/llvm/llvm-project/commit/bb577f620571ce3bb97f2e717b53500574a9cf27
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-bitcast.mir
Log Message:
-----------
[AArch64][GlobalISel] Select i16/f16 cross-bank bitcasts (#220612)
Test bitcast_to_half in
llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll crashes with
H0 = COPY W8
unimplemented reg-to-reg copy
UNREACHABLE executed at
/home/culrho01/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:6363!
when type-based RegBankSelect (#199040) is enabled. Normal RBS keeps
both operands on GPR and moves to FPR afterward. This extends
instruction select to support bitcasts where src/dst reg bank doens't
match.
Assisted-by: codex
Commit: bf7aaf77d0916adaa3cd043fc0966a33c1364e2c
https://github.com/llvm/llvm-project/commit/bf7aaf77d0916adaa3cd043fc0966a33c1364e2c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
A llvm/test/Transforms/DeadStoreElimination/wide-pointer-index-offset.ll
Log Message:
-----------
[ValueTracking] Handle idx widths > 64 bit in GetPointerBaseWithConst. (#221692)
GetPointerBaseWithConstantOffset may be called for GEPs with indices
that do not fit into 64 bit. Use trySExtValue to avoid assertions in the
newly added tests.
PR: https://github.com/llvm/llvm-project/pull/221692
Commit: afb42af9cc18d0dd08ccac3577310e049095700b
https://github.com/llvm/llvm-project/commit/afb42af9cc18d0dd08ccac3577310e049095700b
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CIR/CodeGenCUDA/builtins-nvvm-math.cu
M clang/test/CodeGen/builtins-nvptx.c
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/CodeGen/NVPTX/bf16-add.ll
A llvm/test/CodeGen/NVPTX/bf16-sub.ll
R llvm/test/CodeGen/NVPTX/f16-add-sat.ll
A llvm/test/CodeGen/NVPTX/f16-add.ll
R llvm/test/CodeGen/NVPTX/f16-sub-sat.ll
A llvm/test/CodeGen/NVPTX/f16-sub.ll
A llvm/test/CodeGen/NVPTX/fp-add-f32x2.ll
A llvm/test/CodeGen/NVPTX/fp-add-invalid.ll
M llvm/test/CodeGen/NVPTX/fp-arith-sat.ll
A llvm/test/CodeGen/NVPTX/fp-fold-sub-f32x2.ll
M llvm/test/CodeGen/NVPTX/fp-fold-sub.ll
M llvm/test/CodeGen/NVPTX/mixed-precision-fp.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstSimplify/const-fold-nvvm-add.ll
A llvm/test/Verifier/NVPTX/fadd.ll
M llvm/unittests/IR/IntrinsicsTest.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/nvvm/addf/addf.mlir
M mlir/test/Target/LLVMIR/nvvm/addf/addf_invalid.mlir
M mlir/test/Target/LLVMIR/nvvm/addf/addf_vector.mlir
M mlir/test/Target/LLVMIR/nvvm/subf/subf.mlir
M mlir/test/Target/LLVMIR/nvvm/subf/subf_invalid.mlir
M mlir/test/Target/LLVMIR/nvvm/subf/subf_vector.mlir
Log Message:
-----------
[clang][NVPTX][MLIR][NVVM] Add overloaded fadd intrinsics (#221681)
This change adds the following overloaded `fadd` intrinsics with
NVPTX codegen:
- `llvm.nvvm.fadd`
- `llvm.nvvm.fadd.ftz`
- `llvm.nvvm.fadd.sat`
- `llvm.nvvm.fadd.ftz.sat`
The rounding mode is passed in as an `i32` immediate operand.
Auto-upgrades the older non-overloaded intrinsics to the new
ones, and updates clang builtins, CIR codegen, and MLIR NVVM ops
to lower to the new intrinsics.
In the interest of completion, this also:
- Adds intrinsics support for lowering some half-precision additions
that were omitted earlier (`f16/f16x2` without saturation, and
`bf16/bf16x2` additions), and support for the `f32x2` type.
- Extends the DAG combine pattern for lowering `fneg + add-intrinsic`
to `sub` instructions to all supported types.
- Adds tests for constant folding of these intrinsics with the newly
supported scalar types.
PTX Spec Reference:
https://docs.nvidia.com/cuda/developer-preview/13.4/parallel-thread-execution/index.html#floating-point-instructions-add
Assisted-by: Claude Opus 5
Commit: 41235ec98c8a152d5be53f78437faf36fe9d2a15
https://github.com/llvm/llvm-project/commit/41235ec98c8a152d5be53f78437faf36fe9d2a15
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Bring isLegalGatherOrScatter in line with existing method (NFC) (#221698)
Bring isLegalGatherOrScatter in line with isLegalMaskedLoadOrStore in
prepartion to widen gathers/scatters in VPlan.
Commit: be0fa604519d749fdd6e3f3b943f85a9cbdb13bf
https://github.com/llvm/llvm-project/commit/be0fa604519d749fdd6e3f3b943f85a9cbdb13bf
Author: Jonas Hahnfeld <jonas.hahnfeld at cern.ch>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/lib/AST/ExternalASTSource.cpp
M clang/unittests/AST/ExternalASTSourceTest.cpp
Log Message:
-----------
[clang][AST] Fix generation with multiple external sources (#219189)
ExternalASTSource::incrementGeneration returns the OldGeneration,
which must be taken into account in case it is delegated to the topmost
external source.
This obsoletes a long-standing downstream patch in Cling that was
previously submitted in https://reviews.llvm.org/D39714.
Test proposed by Vassil Vassilev, assisted by Claude.
Commit: 102073935c094577b0f88c7be8e432211d74cfb0
https://github.com/llvm/llvm-project/commit/102073935c094577b0f88c7be8e432211d74cfb0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M orc-rt/CMakeLists.txt
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/support/CMakeLists.txt
Log Message:
-----------
[orc-rt] Add ORC_RT_ENABLE_PIC, default on. (#221705)
An upcoming patch will add support for building bedrock as a dylib. In
preparation for this, add ORC_RT_ENABLE_PIC option, and use it to set
POSITION_INDEPENDENT_CODE (needed for shared library builds) on the
bedrock and support object libraries.
Commit: cd3a2657c7193abbdba4620649ff5b8f7409e47a
https://github.com/llvm/llvm-project/commit/cd3a2657c7193abbdba4620649ff5b8f7409e47a
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/MacroParenthesesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/bugprone/macro-parentheses.cpp
Log Message:
-----------
[clang-tidy] Fix bugprone-macro-parentheses false positives for alias names (#219955)
Fixes #219922.
Commit: 24319927cb0c4acbe9fb3f2bd042b07dad2a4f9f
https://github.com/llvm/llvm-project/commit/24319927cb0c4acbe9fb3f2bd042b07dad2a4f9f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
Log Message:
-----------
[mlir][NVVM] Reject f16 WGMMA accumulators for BF16 inputs (#220869)
WGMMA supports an f32 accumulator for BF16 multiplicands. The verifier
also accepted an f16 accumulator, allowing an unsupported operation
through dialect verification.
Restrict the BF16 case to f32 and add verifier coverage to the existing
NVVM dialect test.
Found by Coverity.
Assisted-by: Codex
Commit: ef23a997b4e0f555d467158c0ac47357c41b1314
https://github.com/llvm/llvm-project/commit/ef23a997b4e0f555d467158c0ac47357c41b1314
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
Log Message:
-----------
[LifetimeSafety] Gate lifetime checks behind per-diagnostic opts (#221610)
Granular Lifetime Safety Check Gating
We split `IsLifetimeSafetyEnabled` into individual check functions in
`SemaLifetimeSafety.h`.
These properties are stored in `LifetimeSafetyOpts`, which are then
checked inside the `Checker` to avoid invoking expensive reporting
functions mapping to diagnostics that are disabled.
`reportMisplacedLifetimebound` was found to be the most expensive
(possibly because it iterates on redecls).
Commit: 9fcc880e5a724c7fb95b646595eb081033a601d7
https://github.com/llvm/llvm-project/commit/9fcc880e5a724c7fb95b646595eb081033a601d7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/induction-relational-predicate-latch.ll
M llvm/test/Transforms/ConstraintElimination/induction-symbolic-start-postinc.ll
Log Message:
-----------
[ConstraintElim] Support loops where header is also latch. (#221494)
Remove the bail out for header == latch. We now support deriving facts
from the latch condition and the restriction is no longer necessary.
This enables inferring additional flags in a number of cases, and a few
additional folds in practice:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1200.
It also removes a surprising limitation when writing manual tests.
PR: https://github.com/llvm/llvm-project/pull/221494
Commit: 34dff487dd711a6a6d6a22f474ce475bce757b47
https://github.com/llvm/llvm-project/commit/34dff487dd711a6a6d6a22f474ce475bce757b47
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/many-uses-fma-candidate.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/fma-operand-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reduction-replaced.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-fadd-reassoc.ll
Log Message:
-----------
[SLP]Flatten fsub/fneg chains into fadd reductions with per-operand signs
For unordered fadd reductions, reassociable (reassoc+nsz) fsub/fneg
chain links are recursed into and their leaves tracked with a flipped
sign, which is part of the grouping key, so reduced-values groups are
sign-uniform by construction. If per-value signs cannot model the
chain, the analysis restarts once without the flattening. Negated
parts are combined with vector fsub (may form per-lane fma) and
subtracted once in the final combine; no extra negations are emitted.
Fixes #211521
Reviewers: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/215840
Commit: 0fc0c614130666dbf626db6650285f83340b7c17
https://github.com/llvm/llvm-project/commit/0fc0c614130666dbf626db6650285f83340b7c17
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
M llvm/test/CodeGen/AArch64/PBQP-chain.ll
M llvm/test/CodeGen/AArch64/PBQP-coalesce-benefit.ll
M llvm/test/CodeGen/AArch64/PBQP-csr.ll
M llvm/test/CodeGen/AArch64/arithmetic_fence.ll
M llvm/test/CodeGen/AArch64/arm64-2013-01-13-ffast-fcmp.ll
M llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll
M llvm/test/CodeGen/AArch64/arm64-fml-combines.ll
M llvm/test/CodeGen/AArch64/arm64-neon-2velem-high.ll
M llvm/test/CodeGen/AArch64/arm64-neon-scalar-by-elem-mul.ll
M llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
M llvm/test/CodeGen/AArch64/arm64-neon-vector-list-spill.ll
M llvm/test/CodeGen/AArch64/fnmul.ll
M llvm/test/CodeGen/AArch64/fp16-fmla.ll
M llvm/test/CodeGen/AArch64/neon-fpextend_f16.ll
M llvm/test/CodeGen/AArch64/neon-fpround_f128.ll
M llvm/test/CodeGen/AArch64/neon-scalar-by-elem-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-reuse.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-reuse2.ll
M llvm/test/CodeGen/Hexagon/swp-loop-carried.ll
M llvm/test/CodeGen/Hexagon/swp-max-stage3.ll
M llvm/test/CodeGen/Hexagon/swp-memrefs-epilog.ll
M llvm/test/CodeGen/Hexagon/swp-rename-dead-phi.ll
M llvm/test/CodeGen/Hexagon/swp-reuse-phi.ll
M llvm/test/CodeGen/PowerPC/fma-mutate-duplicate-vreg.ll
Log Message:
-----------
CodeGen: Drop inert -fp-contract flags from tests (#221710)
-fp-contract is nearly dead, but referenced in tests. These have
no output change with or without the flag now.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: bbed4e22becfb7f271ad11d9e408e43b2500e459
https://github.com/llvm/llvm-project/commit/bbed4e22becfb7f271ad11d9e408e43b2500e459
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
Log Message:
-----------
[X86] LowerCLMUL - improve CLMULH vXi32 codegen (#221668)
Extension to #221289 - adds CLMULH handling by ensuring we zero out the
upper 64-bits of the PCLMULQDQ input and extract the upper i32 element
during unpacking the vector result back together
Commit: 8436dd4a2bfe57d0b3fb6c9c11c69d75c1d1bccb
https://github.com/llvm/llvm-project/commit/8436dd4a2bfe57d0b3fb6c9c11c69d75c1d1bccb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
Log Message:
-----------
[mlir][NVVM] Move MMA verifier type sets (NFC) (#221712)
Build the fixed-size operand type collection by moving the locally
computed allowed-type sets. The verifier does not use the individual
sets afterward, so copying their nested vectors is unnecessary.
Found by Coverity.
Assisted-by: Codex
Commit: e5f39fb259ea9c6d52fe9b2cd4213c17b7f11a56
https://github.com/llvm/llvm-project/commit/e5f39fb259ea9c6d52fe9b2cd4213c17b7f11a56
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
Log Message:
-----------
[SLP][NFC]Add a test with the regression in SLP perf, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/221716
Commit: ac129cd8965f557bbc361011c3c28a378b86c969
https://github.com/llvm/llvm-project/commit/ac129cd8965f557bbc361011c3c28a378b86c969
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/ptrdiff.c
M clang/test/CIR/CodeGen/ptrdiff.cpp
Log Message:
-----------
[CIR] Fix ptrdiff tests after 1191f353cefe3c7ceb8e76fd03296e082a247685 (#221703)
Commit: 42b846980eeacd8052d7a463e1aea8bb91aff248
https://github.com/llvm/llvm-project/commit/42b846980eeacd8052d7a463e1aea8bb91aff248
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/split-node-struct-type.ll
Log Message:
-----------
[SLP]Fix crash in canBuildSplitNode on struct-typed scalars
Split nodes require plain vector types for the cost model and codegen,
but getWidenedType on a struct scalar type returns a struct-of-vectors,
so the cast<VectorType> asserted. Bail out on struct-typed scalars, they
are not supported.
Fixes #221715
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/221721
Commit: cb9654f7491d429d03eaf3fd5c01c45c90c32200
https://github.com/llvm/llvm-project/commit/cb9654f7491d429d03eaf3fd5c01c45c90c32200
Author: Raphael Isemann <rise at apple.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb][test] Bump utility expression timeout to 10 minutes (#221691)
LLDB needs to sometimes run utility expressions such as loading
libraries via a call to `dlopen`. These utility expressions have a
timeout associated with them which is only 15 seconds (and 60 on
sanitized builds).
I suspect our expressions reaching this timeout is the reason why
TestLoadUsingPaths.py sometimes fails to load libraries and produces
this error:
```
File "../TestLoadUsingPaths.py", line 78, in test_load_using_paths
self.assertNotEqual(token, lldb.LLDB_INVALID_IMAGE_TOKEN, "Got a valid token")
```
This patch bumps the timeout to 10 minutes. There is no good reason why
this timeout should exist in the first place on test bots, and maybe we
should remove them or make them fatal errors on the test bots. But for
now this patch should at least fix the test randomly failing on very
slow bots.
Commit: e30a45f88b003e3baaf268040e85b80826a83394
https://github.com/llvm/llvm-project/commit/e30a45f88b003e3baaf268040e85b80826a83394
Author: Raphael Isemann <rise at apple.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M lldb/unittests/Core/MangledTest.cpp
Log Message:
-----------
[lldb][test] Merge demangling tests into one test (#221214)
The XML test report that LIT generates describes the outcome of every
test in the test suite. Currently, the test report for the LLDB unit
tests alone is about 5MiB of which 4.7MiB (about 94%) are used to
describe all 30'000 DemanglingInfoCorrectnessTest instances names (they
don't have any output on success, so this is just used to describe the
test names).
This patch merges all these test instances into one. To make test
failures still easy to parse, this patch changes test function to use a
gtest scrope (which annotates failures with the mangled name) and use
non-fatal checks to continue testing when one test fails.
This reduces the test report size overhead of these tests from 4.7MiB to
about 100B.
assisted-by: claude
Commit: b9b5fb9fec7a078e9d5471db19fccc681eb3559a
https://github.com/llvm/llvm-project/commit/b9b5fb9fec7a078e9d5471db19fccc681eb3559a
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
Log Message:
-----------
[flang] Enable wrap-unstructured-constructs-in-execute-region by default (#221637)
More extensive testing since the flag was introduced, with the
regressions it uncovered now fixed, see:
* https://github.com/llvm/llvm-project/pull/218674
* https://github.com/llvm/llvm-project/pull/217220
* https://github.com/llvm/llvm-project/pull/217842
* https://github.com/llvm/llvm-project/pull/216280
Commit: 59f30df017e98a45ae2d209f71f95f6ac168151d
https://github.com/llvm/llvm-project/commit/59f30df017e98a45ae2d209f71f95f6ac168151d
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
A mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16-aggressive.mlir
A mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
Log Message:
-----------
[mlir][tosa] Add F32 to F16 type narrowing pass (#218900)
Add `tosa-narrow-f32-to-f16`, extending the shared TOSA type narrowing
infrastructure with support for destructively converting F32 tensors,
scalar attributes, dense constants, and resource-backed constants to
F16.
The pass supports conservative and aggressive rewriting, optional
function-boundary conversion, and optional preservation of F32
accumulator types.
Add coverage for constant precision loss, function boundaries, regions,
dense resources, aggressive rewriting, and accumulator-type
preservation.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 7987830e776411a0de84c0c75e9f1059acadceb5
https://github.com/llvm/llvm-project/commit/7987830e776411a0de84c0c75e9f1059acadceb5
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Types.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/Types.cpp
A clang/test/Driver/Inputs/object0.o
M clang/test/Driver/aix-ld.c
A clang/test/Driver/pch-inputs.h
Log Message:
-----------
[Clang][Driver] Final phase also determined by input (#218802)
Before this PR, `getFinalPhase` assumed that when no option is give then
the final phase will a linking step. This is objectively wrong: For
instance passing a header file as input (`-x c-header` or `-x
c++-header`) triggers precompilation, not linking. Other inputs that do
not have a link phase as specified by `Types.def`
are `.dxo`, `.ifs`, and `.hlsl` files.
Instead of defaulting to link in the absence of any action flag, this PR
uses the last phase that `Types.def` specifies for the given input
files. The effect of this is relevant when handling linking options
which are categorized as "input" like any other file.
Usually these should be filtered out if
there is no linking step. But, since `getFinalPhase` says there is a
linking flag, those are forwarded to the precompile handling which gets
confused with such "inputs". An accurate determination of the final
phase filters out those non-applicable linker options.
Note that the second condition of
`clang::diag::warn_drv_input_file_unused` was inverted: It would print
> clang: warning: -lfoo: 'linker' input unused when '' is present
[-Wunused-command-line-argument]
when passing a linker option to a non-link command that is not the
result of an action command flag. Inversely, when a non-link action flag
was used, it wasn't mentioned in the diagnostic message.
Commit: 1871cb232f00d67193c3ef085e26b67b56029d21
https://github.com/llvm/llvm-project/commit/1871cb232f00d67193c3ef085e26b67b56029d21
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/.clang-tidy
Log Message:
-----------
[clang-tidy][NFC] Convert check list to yaml format (#221411)
Yaml format was introduced in 19-20 release which is old enough to
safely transition our file to new version since we are on 23 release
already.
Commit: 71036f99e0dcc24b12cbcbcc2088b8d715465e0f
https://github.com/llvm/llvm-project/commit/71036f99e0dcc24b12cbcbcc2088b8d715465e0f
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Log Message:
-----------
[NFC] Stop relying on the LocationDescription conversion in unit tests. (#221004)
`LocationDescription` has an implicit conversion from a bare insertion
point, and it leaves DL default-constructed. `OpenMPIRBuilderTest`
depends on that in a number of places, either by naming an insertion
point directly or by handing `Builder.saveIP()` to an entry point that
takes a `LocationDescription`.
Spell out what each of those sites means instead. Where a live builder
is already sitting at the insertion point it is passed directly, and
where the test names an insertion point of its own the empty location is
written out, which is what it was getting before, so no test changes
behavior.
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 137d8e684984df207576c8f24bd8743ddb71c5c9
https://github.com/llvm/llvm-project/commit/137d8e684984df207576c8f24bd8743ddb71c5c9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/test/CodeGen/X86/avx512f-large-stack.ll
A llvm/test/CodeGen/X86/huge-frame-index.ll
Log Message:
-----------
[X86] Fix eliminateFrameIndex dropping existing index register for huge frame offsets
When the frame offset does not fit in disp32 and the address mode already
uses an index register, the register-scavenging path overwrote the index
operand with the scratch register, silently dropping the index from the
effective address (and applying the stale scale to the frame offset).
Fold the offset into the base register with an LEA in this case instead.
Fixes #213960
Assisted-by: Cursor
Reviewers: RKSimon, qcolombet
Pull Request: https://github.com/llvm/llvm-project/pull/221016
Commit: b9871b325ed34e4dea7ea81e8ec5c72fd6e1f0e7
https://github.com/llvm/llvm-project/commit/b9871b325ed34e4dea7ea81e8ec5c72fd6e1f0e7
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
R clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
R clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_len.c
M clang/test/CodeGen/AArch64/lit.local.cfg
A clang/test/CodeGen/AArch64/sve/dup.c
A clang/test/CodeGen/AArch64/sve/len.c
Log Message:
-----------
[clang][CIR][AArch64] Move and reformat SVE test (#220599)
Adapts SVE tests to match the approach that we took for Neon. In
particular, test are moved to:
* "clang/test/CodeGen/AArch64/sve"
There is no change in test coverage.
Commit: 759e1fff9e41cf4ad313c117cd024650b4566a71
https://github.com/llvm/llvm-project/commit/759e1fff9e41cf4ad313c117cd024650b4566a71
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/wide-vscale-range-max-runtime-vf.ll
Log Message:
-----------
[LV] Use getMaxRuntimeElementCount for MaxPowerOf2RuntimeVF. (#221219)
Use new getMaxRuntimeElementCount to compute MaxPowerOf2RuntimeVF to
avoid overflow by performing computations in uint64_t.
This fixes an overflow in the test added in #219290. We now correctly
determine that a tail is needed for a low trip count loop.
PR: https://github.com/llvm/llvm-project/pull/221219
Commit: 972cd3ddf3d58ecb79a4e6b62b35147513f3aeea
https://github.com/llvm/llvm-project/commit/972cd3ddf3d58ecb79a4e6b62b35147513f3aeea
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Silence unused variable warning on Windows on Arm (#221176)
<...>/llvm-project/lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp(507,8):
warning: unused variable 'log' [-Wunused-variable]
507 | Log *log = GetLog(WindowsLog::Exception);
| ^~~
Move that line into the `#ifndef __aarch64__` block to fix this.
Commit: c84706fd8cab200aa460b7737fa5412a0c1628d8
https://github.com/llvm/llvm-project/commit/c84706fd8cab200aa460b7737fa5412a0c1628d8
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/load.ll
M llvm/test/CodeGen/AArch64/neon-extadd-extract.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
Log Message:
-----------
[AArch64][SVE] Lower extended v2i8 loads using SVE. (#217006)
Loads of v2i8 are promoted to v2i32, which requires two extend
operations; v2i8 -> v2i16, then v2i16 -> v2i32. This comes largely for
free when using SVE's extending loads.
Commit: 330bb868b4a5d6035a1511169dacc72e913d009f
https://github.com/llvm/llvm-project/commit/330bb868b4a5d6035a1511169dacc72e913d009f
Author: Mikhail Titov <42744001+Anchels at users.noreply.github.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/docs/LibFuzzer.md
Log Message:
-----------
[docs][libFuzzer] Fix formatting and collapsed definition lists (#206709)
This PR fixes broken formatting and collapsed definition lists in the
libFuzzer documentation by adding missing blank lines.
Closes #206706
Signed-off-by: Anchels <mishtitov at gmail.com>
Commit: 95de5eb9942a20285afd59f7c197ba005a9b937b
https://github.com/llvm/llvm-project/commit/95de5eb9942a20285afd59f7c197ba005a9b937b
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
Log Message:
-----------
[CIR] Drop dead ceremony around the CIR enum attributes (#220890)
Five things that no longer earn their place in the CIR enum attribute
machinery.
CIR_CleanupKindAttr carried three. Its cppClassName restated the default
AttrDef already derives. Its skipDefaultBuilders plus hand-written
AttrBuilder existed only to default $value to CleanupKind::All, which no
caller relies on, so the generated builders stayed suppressed for
nothing.
And its summary and description restated the name, overriding the enum's
own
"cleanup kind" that EnumAttr would otherwise inherit. The isNormal, isEH
and
isNormalAndEH helpers stay.
CIR_TLSModelAttr's summary restated its name the same way, so only that
goes.
CIR_DefaultValuedEnumParameter has never had a user.
Commit: d246c5ee925edc79ed12e6269faa296b83362075
https://github.com/llvm/llvm-project/commit/d246c5ee925edc79ed12e6269faa296b83362075
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Move order/mask helpers to SLPUtils (#221663)
Move the following BoUpSLP-independent order/mask helpers out of
SLPVectorizer.cpp into SLPVectorizer/SLPUtils.{h,cpp}:
reorderReuses
reorderOrder
isReverseOrder
isRepeatedNonIdentityClusteredMask
combineOrders
They sit with the existing permutation helpers. Behavior is unchanged.
Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 07f6736c8a7ee21c51466f09cb2458f35d665597
https://github.com/llvm/llvm-project/commit/07f6736c8a7ee21c51466f09cb2458f35d665597
Author: Iasonas Karaprodromidis <iaskarapro at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/Language.h
M lldb/source/Plugins/Language/CMakeLists.txt
A lldb/source/Plugins/Language/Fortran/CMakeLists.txt
A lldb/source/Plugins/Language/Fortran/FortranLanguage.cpp
A lldb/source/Plugins/Language/Fortran/FortranLanguage.h
M lldb/source/Target/Language.cpp
M lldb/unittests/Language/CMakeLists.txt
A lldb/unittests/Language/Fortran/CMakeLists.txt
A lldb/unittests/Language/Fortran/FortranLanguageTest.cpp
Log Message:
-----------
[lldb][Fortran] Add Fortran language plugin to LLDB (#221301)
This PR adds the Plugin necessary for LLDB to recognise Fortran.
Subsequent PRs will add the TypeSystem and the DWARFASTParser for
Fortran.
Changes:
- Adds Fortran language Plugin.
- Adds LanguageIsFortran function to the Language class to help identify
Fortran.
Testing:
- Check if language Plugin is registered.
Part of the Add Fortran support to LLDB GSoC 2026 project.
Relates to #109119.
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: f16746ae332fed263a69464e38085706e96dad9b
https://github.com/llvm/llvm-project/commit/f16746ae332fed263a69464e38085706e96dad9b
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Remove dead D16ImageDimIntrinsic and lookupD16ImageDimIntrinsic (NFC) (#221660)
The corresponding TableGen table and callers were removed on June 21,
2018 in commit 7a9c03f484fee744b1cbcc45e77f949b4ebfcbee, leaving behind
the struct, the declaration, and the unused macro definition.
Assisted-by: Antigravity
Commit: e92c19abae25beb03234bfbf6cfa1a431c6d380a
https://github.com/llvm/llvm-project/commit/e92c19abae25beb03234bfbf6cfa1a431c6d380a
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/algorithm.h
M libc/src/__support/CPP/utility.h
A libc/src/__support/CPP/utility/swap.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/powf.h
M libc/src/__support/wctype/CMakeLists.txt
M libc/src/__support/wctype/perfect_hash_map.h
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/parser.h
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/qsort_data.h
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/algorithm_test.cpp
A libc/test/src/__support/CPP/swap_test.cpp
M libc/test/src/stdio/scanf_core/parser_test.cpp
Log Message:
-----------
[libc] Add cpp::swap and cpp::clamp utilities (#221236)
Added cpp::swap to src/__support/CPP/utility/swap.h with move semantics
and array support, and cpp::clamp to src/__support/CPP/algorithm.h with
comparator support.
Included unit tests in swap_test.cpp and algorithm_test.cpp.
Adopted the new utilities in initial callsites:
* stdlib: Used cpp::swap in qsort_data.h
* wctype: Used cpp::swap in perfect_hash_map.h
* math: Used cpp::clamp in powf.h
* scanf_core: Used cpp::min and cpp::max in parser.h
Also fixed sign extension when parsing scanset specifiers in parser.h:
signed characters greater than or equal to 128 produced negative values,
inverting comparisons and causing out-of-bounds writes in the bitset.
Scanset characters are now cast through uint8_t, and non-ASCII tests
were added to parser_test.cpp.
Assisted-by: Automated tooling, human reviewed.
Commit: 10a37889d4d14a30a7fef19e61acf8b8808ddeae
https://github.com/llvm/llvm-project/commit/10a37889d4d14a30a7fef19e61acf8b8808ddeae
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
Log Message:
-----------
[RISCV] Add VPatBinaryVL_R_VX to share between VRSUB.VX and VDOT4AUS.VX. NFC (#221284)
Assisted-by: Claude
Commit: 1ce91bb26f31a773979c813cd8c2904f9076295c
https://github.com/llvm/llvm-project/commit/1ce91bb26f31a773979c813cd8c2904f9076295c
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/preserve-unpredictable-switch-create.ll
Log Message:
-----------
[SimplifyCFG] Preserve !unpredictable when forming a switch (#221580)
SimplifyCFG turns a chain of equality comparisons into a switch in two
places, performValueComparisonIntoPredecessorFolding() and
simplifyBranchOnICmpChain(), and neither propagated !unpredictable. The
hint was therefore dropped even though it is valid on a switch and the
reverse transform, simplifySwitchOfCmpIntrinsic(), already preserves it.
Propagate the metadata in both. Folding a comparison into a predecessor
merges two decisions into a single switch, so the result is only marked
unpredictable when both of the folded comparisons were. That also makes
chains longer than two blocks work: the fold runs once per predecessor
and reads the metadata back off the switch it built on the previous
iteration.
simplifyBranchOnICmpChain() also emits a range check instead of a switch
when the case values are contiguous. That branch is an exact replacement
for the original one, so it inherits the metadata unconditionally, and
the flag now survives into the machine IR.
Fixes #42658.
Commit: ce27ca449c564f8b38a60ea8db28e10a76cfb4ef
https://github.com/llvm/llvm-project/commit/ce27ca449c564f8b38a60ea8db28e10a76cfb4ef
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/ext-addrec-wrap-flags.ll
R llvm/test/Analysis/ScalarEvolution/incorrect-nsw.ll
Log Message:
-----------
[SCEV] Add test coverage for ext-nusw/nsuw inference (#218943)
Complete the existing incorrect-nsw test, showing that zext-addrec nusw
is not implied by nw on the pre-inc AR, and that sext-addrec nsuw is not
implied by nw on the pre-inc AR. See also: #217405 and #217362.
Assisted-by: AI
Commit: 1afead77810533576bc2bc2c0c900afba82cb6af
https://github.com/llvm/llvm-project/commit/1afead77810533576bc2bc2c0c900afba82cb6af
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Log Message:
-----------
Revert "[CodeGen] Use RegisterClassInfo for remaining allocation-order users" (#221749)
Reverts llvm/llvm-project#216510
breaks tests MIOpen/CK shard 1-4 in CI
queueing this up in case we want to save a bit of time
Commit: c5fc98310a8897773e188d1c6a0d76db92384ab8
https://github.com/llvm/llvm-project/commit/c5fc98310a8897773e188d1c6a0d76db92384ab8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/pr1505b.ll
Log Message:
-----------
[X86] pr1505b.ll - regenerate test checks (#221774)
Commit: b1a72e31f29d4d5ede41f42443a34a2e6a1396b6
https://github.com/llvm/llvm-project/commit/b1a72e31f29d4d5ede41f42443a34a2e6a1396b6
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes e92c19a (#221761)
This fixes e92c19abae25beb03234bfbf6cfa1a431c6d380a (#221236).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=e92c19abae25beb03234bfbf6cfa1a431c6d380a
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 271af38dfc3aa02e329821daf46730686e52fb1c
https://github.com/llvm/llvm-project/commit/271af38dfc3aa02e329821daf46730686e52fb1c
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
Log Message:
-----------
[AMDGPU][GIsel][NPM] Port "AMDGPURegBankSelect" to NPM (#217321)
Assisted-by: Opus-4.8
Commit: 0c553f573a076091f60df21618494584e9641e96
https://github.com/llvm/llvm-project/commit/0c553f573a076091f60df21618494584e9641e96
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Use common flags for shl in shl/trunc fold. (#221769)
As pointed out post-commit in
https://github.com/llvm/llvm-project/pull/219443, whether the flags from
the trunc can be transferred directly to the shl depends on the involved
types: https://alive2.llvm.org/ce/z/zN_TFq
For now, just use the common flags.
PR: https://github.com/llvm/llvm-project/pull/221769
Commit: 2bd26099ecf9b58f17c829738bb3c6e533106071
https://github.com/llvm/llvm-project/commit/2bd26099ecf9b58f17c829738bb3c6e533106071
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-07 (Mon, 07 Sep 2026)
Changed paths:
M .git-blame-ignore-revs
M bolt/unittests/Core/BinaryContext.cpp
M bolt/unittests/Core/MCPlusBuilder.cpp
M bolt/unittests/Core/MemoryMaps.cpp
M bolt/unittests/Profile/PerfScripts.cpp
M clang-tools-extra/clang-tidy/.clang-tidy
M clang-tools-extra/clang-tidy/bugprone/MacroParenthesesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
A clang-tools-extra/docs/clang-tidy/checks/readability/ambiguous-smartptr-reset-call.md
R clang-tools-extra/docs/clang-tidy/checks/readability/ambiguous-smartptr-reset-call.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/avoid-return-with-void-value.md
R clang-tools-extra/docs/clang-tidy/checks/readability/avoid-return-with-void-value.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/avoid-unconditional-preprocessor-if.md
R clang-tools-extra/docs/clang-tidy/checks/readability/avoid-unconditional-preprocessor-if.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/braces-around-statements.md
R clang-tools-extra/docs/clang-tidy/checks/readability/braces-around-statements.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/const-return-type.md
R clang-tools-extra/docs/clang-tidy/checks/readability/const-return-type.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.md
R clang-tools-extra/docs/clang-tidy/checks/readability/container-contains.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.md
R clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.md
R clang-tools-extra/docs/clang-tidy/checks/readability/duplicate-include.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.md
R clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/enum-initial-value.md
R clang-tools-extra/docs/clang-tidy/checks/readability/enum-initial-value.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/macro-parentheses.cpp
M clang/docs/ReleaseNotes.md
M clang/docs/StandardCPlusPlusModules.md
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/DependencyScanning/ModuleDepCollector.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Types.h
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/lib/AST/ExternalASTSource.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/CodeGen/Targets/SPIRV.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/test/CIR/CodeGen/ptrdiff.c
M clang/test/CIR/CodeGen/ptrdiff.cpp
A clang/test/CIR/CodeGen/spirv-target-lowering-as.cpp
R clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
R clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_len.c
M clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
M clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
M clang/test/CIR/CodeGenCUDA/builtins-nvvm-math.cu
A clang/test/CIR/CodeGenHIP/builtin-bool-result.hip
M clang/test/CIR/CodeGenOpenCL/address-space-conversions.cl
M clang/test/CIR/CodeGenOpenCL/address-space-local-var.clcpp
M clang/test/CIR/CodeGenOpenCL/address-spaces.cl
M clang/test/CIR/IR/enum-attrs.cir
M clang/test/CIR/IR/invalid-call.cir
M clang/test/CIR/IR/invalid-lang-attr.cir
M clang/test/CIR/Lowering/address-space.cir
M clang/test/ClangScanDeps/P1689.cppm
A clang/test/ClangScanDeps/p1689-module-map.cppm
M clang/test/CodeGen/AArch64/lit.local.cfg
A clang/test/CodeGen/AArch64/sve/dup.c
A clang/test/CodeGen/AArch64/sve/len.c
A clang/test/CodeGen/X86/x86_64-unnamed-bitfield-abi-compat.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/glibc_ptr_align.c
M clang/test/CodeGen/ptr-subtract-stable.c
M clang/test/CodeGen/vla.c
M clang/test/CodeGenCUDA/managed-var.cu
M clang/test/CodeGenOpenCL/address-spaces-conversions.cl
M clang/test/CodeGenOpenCL/nullptr.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/DebugInfo/CXX/limited-ctor.cpp
M clang/test/DebugInfo/Generic/debug-label-inline.c
A clang/test/Driver/Inputs/object0.o
M clang/test/Driver/aix-ld.c
A clang/test/Driver/pch-inputs.h
M clang/test/OpenMP/depobj_codegen.cpp
M clang/test/OpenMP/for_range_loop_codegen.cpp
M clang/test/OpenMP/fuse_codegen.cpp
M clang/test/OpenMP/interchange_codegen.cpp
M clang/test/OpenMP/parallel_for_codegen.cpp
M clang/test/OpenMP/reverse_codegen.cpp
M clang/test/OpenMP/split_codegen.cpp
M clang/test/OpenMP/stripe_codegen.cpp
M clang/test/OpenMP/tile_codegen.cpp
A clang/test/SemaCUDA/attr-instantiation-duplication-amdgpu.cu
A clang/test/SemaCUDA/attr-instantiation-duplication-spirv.cu
M clang/unittests/AST/ExternalASTSourceTest.cpp
A flang/include/flang/Evaluate/char.h
M flang/include/flang/Evaluate/complex.h
M flang/include/flang/Evaluate/initial-image.h
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Evaluate/logical.h
M flang/include/flang/Evaluate/real.h
M flang/lib/Evaluate/host.h
M flang/lib/Evaluate/initial-image.cpp
M flang/lib/Lower/PFTBuilder.cpp
M libc/CMakeLists.txt
A libc/docs/dev/code_coverage.md
M libc/docs/dev/index.md
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/algorithm.h
M libc/src/__support/CPP/utility.h
A libc/src/__support/CPP/utility/swap.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/powf.h
M libc/src/__support/wctype/CMakeLists.txt
M libc/src/__support/wctype/perfect_hash_map.h
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/parser.h
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/qsort_data.h
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/algorithm_test.cpp
A libc/test/src/__support/CPP/swap_test.cpp
M libc/test/src/stdio/scanf_core/parser_test.cpp
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__optional/comparison.h
M libcxx/test/std/utilities/optional/optional.comp_with_t/equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/greater.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/greater_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/less_equal.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/less_than.pass.cpp
M libcxx/test/std/utilities/optional/optional.comp_with_t/not_equal.pass.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/EhFrame.h
M lld/ELF/SyntheticSections.cpp
M lld/test/COFF/arm64ec-export-thunks.test
M lld/test/COFF/arm64ec-import.test
M lld/test/COFF/baserel.test
M lld/test/COFF/code-merge.s
M lld/test/COFF/common-replacement.s
M lld/test/COFF/merge-data-bss.test
M lld/test/COFF/nodbgdirmerge.test
M lld/test/COFF/secrel-common.s
M lld/test/ELF/eh-frame-fde-encoding.s
R lld/test/ELF/eh-frame-hdr-zero-range.s
M lld/test/ELF/eh-frame-negative-pcrel-sdata2.s
M lld/test/ELF/eh-frame-negative-pcrel-sdata4.s
M lldb/include/lldb/Target/Language.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Plugins/Language/CMakeLists.txt
A lldb/source/Plugins/Language/Fortran/CMakeLists.txt
A lldb/source/Plugins/Language/Fortran/FortranLanguage.cpp
A lldb/source/Plugins/Language/Fortran/FortranLanguage.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Target/Language.cpp
A lldb/test/API/commands/watchpoints/watchpoint_set_errors/Makefile
A lldb/test/API/commands/watchpoints/watchpoint_set_errors/TestWatchpointSetErrors.py
A lldb/test/API/commands/watchpoints/watchpoint_set_errors/main.c
M lldb/test/Shell/SymbolFile/NativePDB/globals-bss.cpp
R lldb/test/Shell/Watchpoint/Inputs/main.cpp
R lldb/test/Shell/Watchpoint/SetErrorCases.test
M lldb/unittests/Core/MangledTest.cpp
M lldb/unittests/Language/CMakeLists.txt
A lldb/unittests/Language/Fortran/CMakeLists.txt
A lldb/unittests/Language/Fortran/FortranLanguageTest.cpp
M llvm/docs/LibFuzzer.md
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/MustExecute.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/CodeGen/CallingConvLower.h
M llvm/include/llvm/CodeGen/MachineOutliner.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/ABI/Targets/X86.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MustExecute.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/IR/AttributeImpl.h
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugLoc.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/NVVMIntrinsicUtils.cpp
M llvm/lib/TableGen/StringToOffsetTable.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPTypeUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPTypeUtils.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
M llvm/test/Analysis/LoopAccessAnalysis/all-ones-null-pointer.ll
M llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
M llvm/test/Analysis/LoopAccessAnalysis/negative-step-deref-off-by-eltsize.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis-forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
A llvm/test/Analysis/ScalarEvolution/ext-addrec-wrap-flags.ll
R llvm/test/Analysis/ScalarEvolution/incorrect-nsw.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-fmuladd.ll
M llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-bitcast.mir
M llvm/test/CodeGen/AArch64/PBQP-chain.ll
M llvm/test/CodeGen/AArch64/PBQP-coalesce-benefit.ll
M llvm/test/CodeGen/AArch64/PBQP-csr.ll
M llvm/test/CodeGen/AArch64/arithmetic_fence.ll
M llvm/test/CodeGen/AArch64/arm64-2013-01-13-ffast-fcmp.ll
M llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll
M llvm/test/CodeGen/AArch64/arm64-fml-combines.ll
M llvm/test/CodeGen/AArch64/arm64-neon-2velem-high.ll
M llvm/test/CodeGen/AArch64/arm64-neon-scalar-by-elem-mul.ll
M llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
M llvm/test/CodeGen/AArch64/arm64-neon-vector-list-spill.ll
A llvm/test/CodeGen/AArch64/cmpbr-ccmp.ll
A llvm/test/CodeGen/AArch64/cmpbr-ccmp.mir
M llvm/test/CodeGen/AArch64/fnmul.ll
M llvm/test/CodeGen/AArch64/fp16-fmla.ll
A llvm/test/CodeGen/AArch64/interleaved-load-combine-many-candidates.ll
M llvm/test/CodeGen/AArch64/load.ll
A llvm/test/CodeGen/AArch64/machine-outliner-debug-admission.mir
M llvm/test/CodeGen/AArch64/machine-outliner-macho-compact-unwind-frame.mir
M llvm/test/CodeGen/AArch64/machine-outliner-mapper-stats.mir
M llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir
A llvm/test/CodeGen/AArch64/machine-outliner-range-debug.mir
M llvm/test/CodeGen/AArch64/neon-extadd-extract.ll
M llvm/test/CodeGen/AArch64/neon-fpextend_f16.ll
M llvm/test/CodeGen/AArch64/neon-fpround_f128.ll
M llvm/test/CodeGen/AArch64/neon-scalar-by-elem-fma.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-prelegalizer-combiner-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-add-nullptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-zext-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
A llvm/test/CodeGen/AMDGPU/coexec-sched-agpr-excess.mir
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll
M llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/Hexagon/sffms.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-reuse.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-reuse2.ll
M llvm/test/CodeGen/Hexagon/swp-loop-carried.ll
M llvm/test/CodeGen/Hexagon/swp-max-stage3.ll
M llvm/test/CodeGen/Hexagon/swp-memrefs-epilog.ll
M llvm/test/CodeGen/Hexagon/swp-rename-dead-phi.ll
M llvm/test/CodeGen/Hexagon/swp-reuse-phi.ll
A llvm/test/CodeGen/NVPTX/bf16-add.ll
A llvm/test/CodeGen/NVPTX/bf16-sub.ll
R llvm/test/CodeGen/NVPTX/f16-add-sat.ll
A llvm/test/CodeGen/NVPTX/f16-add.ll
R llvm/test/CodeGen/NVPTX/f16-sub-sat.ll
A llvm/test/CodeGen/NVPTX/f16-sub.ll
A llvm/test/CodeGen/NVPTX/fp-add-f32x2.ll
A llvm/test/CodeGen/NVPTX/fp-add-invalid.ll
M llvm/test/CodeGen/NVPTX/fp-arith-sat.ll
A llvm/test/CodeGen/NVPTX/fp-fold-sub-f32x2.ll
M llvm/test/CodeGen/NVPTX/fp-fold-sub.ll
M llvm/test/CodeGen/NVPTX/mixed-precision-fp.ll
M llvm/test/CodeGen/PowerPC/fma-mutate-duplicate-vreg.ll
A llvm/test/CodeGen/RISCV/machine-outliner-debug-codegen.mir
A llvm/test/CodeGen/RISCV/machine-outliner-mapper-debug-state.mir
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/X86/avx512f-large-stack.ll
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
A llvm/test/CodeGen/X86/huge-frame-index.ll
M llvm/test/CodeGen/X86/pr1505b.ll
A llvm/test/CodeGen/X86/pr216504.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/id.ll
M llvm/test/DebugInfo/Generic/inline-dbg-values.ll
M llvm/test/DebugInfo/Generic/inline-debug-info-multiret.ll
M llvm/test/DebugInfo/Generic/inline-debug-info.ll
M llvm/test/DebugInfo/Generic/inline-no-debug-info.ll
M llvm/test/DebugInfo/KeyInstructions/Generic/inline.ll
M llvm/test/MC/AArch64/seh-large-func-multi-epilog.s
M llvm/test/MC/AArch64/seh-large-func.s
M llvm/test/MC/AArch64/seh.s
M llvm/test/MC/AArch64/win-import-call-optimization.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/ARM/seh.s
M llvm/test/MC/COFF/addrsig.s
M llvm/test/MC/COFF/align-nops.s
M llvm/test/MC/COFF/basic-coff-64.s
M llvm/test/MC/COFF/basic-coff.s
M llvm/test/MC/COFF/bss.s
M llvm/test/MC/COFF/cgprofile.s
M llvm/test/MC/COFF/module-asm.ll
M llvm/test/MC/COFF/section.s
M llvm/test/MC/COFF/seh-align1.s
M llvm/test/MC/COFF/seh-align2.s
M llvm/test/MC/COFF/seh-align3.s
M llvm/test/MC/COFF/seh-section.s
M llvm/test/MC/COFF/seh.s
M llvm/test/MC/COFF/symbol-fragment-offset-64.s
M llvm/test/MC/COFF/symbol-fragment-offset.s
M llvm/test/MC/X86/win-import-call-optimization.s
M llvm/test/Transforms/CodeExtractor/PartialInlineDebug.ll
M llvm/test/Transforms/CodeExtractor/PartialInlineVarArgsDebug.ll
M llvm/test/Transforms/ConstraintElimination/and-implied-by-operands.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
A llvm/test/Transforms/ConstraintElimination/induction-exit-condition-or-and.ll
M llvm/test/Transforms/ConstraintElimination/induction-relational-predicate-latch.ll
M llvm/test/Transforms/ConstraintElimination/induction-symbolic-start-postinc.ll
A llvm/test/Transforms/DeadStoreElimination/wide-pointer-index-offset.ll
M llvm/test/Transforms/Inline/X86/inline-landing-pad.ll
M llvm/test/Transforms/Inline/debug-invoke.ll
M llvm/test/Transforms/Inline/dilocation-loop-metadata-update.ll
M llvm/test/Transforms/Inline/inline_dbg_declare.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/icmp-power2-and-icmp-shifted-mask.ll
M llvm/test/Transforms/InstCombine/nested-select.ll
M llvm/test/Transforms/InstCombine/overflow-mul.ll
M llvm/test/Transforms/InstCombine/ptr-int-cast.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
M llvm/test/Transforms/InstSimplify/call.ll
M llvm/test/Transforms/InstSimplify/const-fold-nvvm-add.ll
M llvm/test/Transforms/InstSimplify/ptrtoint.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wide-vscale-range-max-runtime-vf.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/many-uses-fma-candidate.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/fma-operand-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reduction-replaced.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-fadd-reassoc.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-node-struct-type.ll
M llvm/test/Transforms/SafeStack/ARM/debug.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-emit-inline.ll
A llvm/test/Transforms/SimplifyCFG/preserve-unpredictable-switch-create.ll
A llvm/test/Verifier/NVPTX/fadd.ll
A llvm/test/tools/gold/X86/Inputs/multiple-data-section-ordering.txt
M llvm/test/tools/gold/X86/multiple-data.s
M llvm/test/tools/gold/X86/multiple-sections.ll
M llvm/test/tools/gold/lit.local.cfg
M llvm/test/tools/llvm-ar/arm64x-split.yaml
M llvm/test/tools/llvm-objcopy/COFF/add-gnu-debuglink.test
M llvm/test/tools/llvm-objcopy/COFF/add-section-and-set-flags.test
M llvm/test/tools/llvm-objcopy/COFF/empty-sections.s
M llvm/test/tools/llvm-objcopy/COFF/only-keep-debug-rdata.test
M llvm/test/tools/llvm-objcopy/COFF/only-keep-debug.test
M llvm/test/tools/llvm-objcopy/COFF/update-section.test
M llvm/test/tools/llvm-offload-wrapper/coff-opt-ref.ll
M llvm/test/tools/llvm-readobj/COFF/arm64x-hybridobj.yaml
M llvm/test/tools/llvm-readobj/COFF/bigobj.test
M llvm/test/tools/llvm-readobj/COFF/sections-ext.test
M llvm/test/tools/llvm-readobj/COFF/sections.test
M llvm/test/tools/yaml2obj/COFF/xrelocs.yaml
M llvm/tools/llvm-readobj/COFFDumper.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/IntrinsicsTest.cpp
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
A mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16-aggressive.mlir
A mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
M mlir/test/Target/LLVMIR/nvvm/addf/addf.mlir
M mlir/test/Target/LLVMIR/nvvm/addf/addf_invalid.mlir
M mlir/test/Target/LLVMIR/nvvm/addf/addf_vector.mlir
M mlir/test/Target/LLVMIR/nvvm/subf/subf.mlir
M mlir/test/Target/LLVMIR/nvvm/subf/subf_invalid.mlir
M mlir/test/Target/LLVMIR/nvvm/subf/subf_vector.mlir
M orc-rt/CMakeLists.txt
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/support/CMakeLists.txt
A orc-rt/test/unit/BedrockTestUtils.h
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/bedrock/NativeDylibManagerTest.cpp
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/support/ProxyTest.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Rebase
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/ca6485493ddd...2bd26099ecf9
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