[all-commits] [llvm/llvm-project] 2e3553: [X86] Lower vector integer division and remainder ...

[Adam Scott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2e3553def14cbc819013c107ff3edd4fb08e348c
      https://github.com/llvm/llvm-project/commit/2e3553def14cbc819013c107ff3edd4fb08e348c
  Author: Adam Scott <adamscott200322 at gmail.com>
  Date:   2026-08-07 (Fri, 07 Aug 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
    M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
    M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
    M llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
    M llvm/test/CodeGen/X86/known-bits.ll
    M llvm/test/CodeGen/X86/known-never-zero.ll
    M llvm/test/CodeGen/X86/masked-sdiv.ll
    M llvm/test/CodeGen/X86/masked-srem.ll
    M llvm/test/CodeGen/X86/masked-udiv.ll
    M llvm/test/CodeGen/X86/masked-urem.ll
    M llvm/test/CodeGen/X86/min-legal-vector-width.ll
    M llvm/test/CodeGen/X86/scalar_widen_div.ll
    M llvm/test/CodeGen/X86/shrink_vmul.ll
    M llvm/test/CodeGen/X86/split-vector-rem.ll
    M llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
    M llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
    M llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
    A llvm/test/CodeGen/X86/vector-idiv-strictfp.ll
    M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
    M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
    M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
    M llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
    M llvm/test/CodeGen/X86/vector-rem.ll

  Log Message:
  -----------
  [X86] Lower vector integer division and remainder through float division (#205263)

x86 has no vector integer divide instruction so a vector `udiv` by a
variable divisor scalarizes into N scalar divides. Since there is no
vector idiv to fall back on, lowering through vector float division is
better.

This is implemented as a new DAG combine (combineIntDivRem in
X86ISelLowering.cpp) that runs before legalization and rewrites the
vector divide before it scalarizes. Handles udiv, sdiv, urem and srem.

- <=32-bit elements (i8/i16/i32): a single float divide (f32 for
<=16-bit, f64 for 32-bit) recovers the exact quotient because the
operands fit the mantissa
(https://lemire.me/blog/2017/11/16/fast-exact-integer-divisions-using-floating-point-operations/).
  Enabled from SSE2.

Part of #201319.



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