[all-commits] [llvm/llvm-project] 56a654: [DAG] Change `isExtractSubvectorCheap` into `getEx...

[Shoreshen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 56a654b9a9cffd32318d7ca5c6ee997827c07ecf
      https://github.com/llvm/llvm-project/commit/56a654b9a9cffd32318d7ca5c6ee997827c07ecf
  Author: Shoreshen <372660931 at qq.com>
  Date:   2026-08-07 (Fri, 07 Aug 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.h
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLowering.h
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h

  Log Message:
  -----------
  [DAG] Change `isExtractSubvectorCheap` into `getExtractSubvectorCost` (#213614)

This changes `isExtractSubvectorCheap` into `getExtractSubvectorCost`.

This is preparing for #201056 in order to remove `isNarrowingProfitable`
bail out for `narrowInsertExtractVectorBinOp`.

The reason is `isNarrowingProfitable` should be applying on scalar
variable instead of vectors.

---------

Co-authored-by: shore <shorshen at amd.com>



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