[all-commits] [llvm/llvm-project] c34959: [AMDGPU][GISel] RegBankLegalize rules for the QSAD...
Chinmay Deshpande via All-commits
all-commits at lists.llvm.org
Wed Aug 5 12:57:36 PDT 2026
Branch: refs/heads/users/chinmaydd/regbanklegalize-qsad
Home: https://github.com/llvm/llvm-project
Commit: c34959a0974a2c6c0e03b3f211f697ac56a5761d
https://github.com/llvm/llvm-project/commit/c34959a0974a2c6c0e03b3f211f697ac56a5761d
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-08-05 (Wed, 05 Aug 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.u32.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll
Log Message:
-----------
[AMDGPU][GISel] RegBankLegalize rules for the QSAD intrinsics
llvm.amdgcn.{qsad.pk.u16.u8,mqsad.pk.u16.u8,mqsad.u32.u8} all reached
AMDGPURegBankLegalize without a rule and failed with "No AMDGPU
RegBankLegalize rules defined for opcode".
The two pk forms share a shape - an i64 result from an i64, an i32 and an i64,
all in VGPRs - so they get one rule. mqsad_u32_u8 returns <4 x i32> and takes
a <4 x i32> accumulator, which has no slot in the Standard fast rules, so it
uses explicit Any rules on Uni/DivV4S32 instead.
Convert the lit tests to autogenerated checks and run them through both
SelectionDAG and GlobalISel.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list