[all-commits] [llvm/llvm-project] fc2f41: Add PISA target registration and backend stub

[Michal Paszkowski via All-commits]

  Branch: refs/heads/users/michalpaszkowski/pisa_backend_upstreaming_1
  Home:   https://github.com/llvm/llvm-project
  Commit: fc2f4176644c42d3c04d1bc3347e629ea7f1efbc
      https://github.com/llvm/llvm-project/commit/fc2f4176644c42d3c04d1bc3347e629ea7f1efbc
  Author: Michal Paszkowski <michal.paszkowski at intel.com>
  Date:   2026-08-04 (Tue, 04 Aug 2026)

  Changed paths:
    M llvm/CMakeLists.txt
    M llvm/include/llvm/TargetParser/Triple.h
    A llvm/lib/Target/PISA/CMakeLists.txt
    A llvm/lib/Target/PISA/MCTargetDesc/CMakeLists.txt
    A llvm/lib/Target/PISA/MCTargetDesc/PISAInstPrinter.cpp
    A llvm/lib/Target/PISA/MCTargetDesc/PISAInstPrinter.h
    A llvm/lib/Target/PISA/MCTargetDesc/PISAMCAsmInfo.cpp
    A llvm/lib/Target/PISA/MCTargetDesc/PISAMCAsmInfo.h
    A llvm/lib/Target/PISA/MCTargetDesc/PISAMCTargetDesc.cpp
    A llvm/lib/Target/PISA/MCTargetDesc/PISAMCTargetDesc.h
    A llvm/lib/Target/PISA/PISA.h
    A llvm/lib/Target/PISA/PISA.td
    A llvm/lib/Target/PISA/PISAFeatures.td
    A llvm/lib/Target/PISA/PISAFrameLowering.h
    A llvm/lib/Target/PISA/PISAInstrInfo.cpp
    A llvm/lib/Target/PISA/PISAInstrInfo.h
    A llvm/lib/Target/PISA/PISAInstrInfo.td
    A llvm/lib/Target/PISA/PISARegisterInfo.cpp
    A llvm/lib/Target/PISA/PISARegisterInfo.h
    A llvm/lib/Target/PISA/PISARegisterInfo.td
    A llvm/lib/Target/PISA/PISASubtarget.cpp
    A llvm/lib/Target/PISA/PISASubtarget.h
    A llvm/lib/Target/PISA/PISATargetMachine.cpp
    A llvm/lib/Target/PISA/PISATargetMachine.h
    A llvm/lib/Target/PISA/TargetInfo/CMakeLists.txt
    A llvm/lib/Target/PISA/TargetInfo/PISATargetInfo.cpp
    A llvm/lib/Target/PISA/TargetInfo/PISATargetInfo.h
    M llvm/lib/TargetParser/TargetDataLayout.cpp
    M llvm/lib/TargetParser/Triple.cpp
    A llvm/test/CodeGen/PISA/lit.local.cfg
    A llvm/test/CodeGen/PISA/target-registration.ll

  Log Message:
  -----------
  Add PISA target registration and backend stub

Register the Intel GPU portable ISA (PISA) target. Add the pisa Triple
arch, data layout, and a minimal MC/TargetMachine skeleton.



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