[all-commits] [llvm/llvm-project] 1e9c8c: [mlir][xegpu] Lower 1D vector transfers to scatter...

[Jianhui Li via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1e9c8ce9c6aca205a7cff2e3530ab759a1b691f1
      https://github.com/llvm/llvm-project/commit/1e9c8ce9c6aca205a7cff2e3530ab759a1b691f1
  Author: Jianhui Li <jian.hui.li at intel.com>
  Date:   2026-08-03 (Mon, 03 Aug 2026)

  Changed paths:
    M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
    M mlir/test/Conversion/VectorToXeGPU/gather-to-xegpu.mlir
    M mlir/test/Conversion/VectorToXeGPU/scatter-to-xegpu.mlir
    M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
    M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir

  Log Message:
  -----------
  [mlir][xegpu] Lower 1D vector transfers to scattered load/store (#213469)

Both 1D vector.transfer_read / vector.transfer_write now lower to the
scattered xegpu.load / xegpu.store path instead of xegpu.load_nd /
xegpu.store_nd. We reserve the nd block path for rank ≥ 2 vectors.

Cleanup Test: Where both RUN configurations (with and without
--xevm-attach-target) produce identical IR for a function, the
duplicated LOAD-ND/LOAD-GATHER (and STORE-ND/STORE-SCATTER) check blocks
are collapsed into a single shared CHECK block.

---------

Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>



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