[all-commits] [llvm/llvm-project] 41eded: [spr] initial version

[Alexis Engelke via All-commits]

  Branch: refs/heads/users/aengelke/spr/analysis-use-cycleinfo-for-blockfrequencyinfo
  Home:   https://github.com/llvm/llvm-project
  Commit: 41ededa3d8778edaf5fdca05dfbd33b5b5790a81
      https://github.com/llvm/llvm-project/commit/41ededa3d8778edaf5fdca05dfbd33b5b5790a81
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2026-08-01 (Sat, 01 Aug 2026)

  Changed paths:
    M llvm/include/llvm/Analysis/BlockFrequencyInfo.h
    M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
    M llvm/include/llvm/Analysis/LazyBlockFrequencyInfo.h
    M llvm/include/llvm/CodeGen/LazyMachineBlockFrequencyInfo.h
    M llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
    M llvm/lib/Analysis/BlockFrequencyInfo.cpp
    M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
    M llvm/lib/Analysis/LazyBlockFrequencyInfo.cpp
    M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
    M llvm/lib/Analysis/OptimizationRemarkEmitter.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
    M llvm/lib/CodeGen/MIRSampleProfile.cpp
    M llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Transforms/IPO/PartialInlining.cpp
    M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
    M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
    M llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
    M llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    M llvm/test/CodeGen/M68k/pipeline.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
    M llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
    M llvm/test/Transforms/GlobalOpt/dbg-intrinsic-loopanalysis.ll
    M llvm/test/Transforms/Inline/cgscc-incremental-invalidate.ll
    M llvm/unittests/Analysis/BlockFrequencyInfoTest.cpp
    M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
    M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
    M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
    M llvm/unittests/Transforms/Utils/SizeOptsTest.cpp

  Log Message:
  -----------
  [spr] initial version

Created using spr 1.3.8-wip



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