[all-commits] [llvm/llvm-project] 230e5d: [AArch64] Fix zero-call-used-regs crash on targets...

[Akshay K via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 230e5d9a02cafb7fdb7b85075ca16217ee6f5f5a
      https://github.com/llvm/llvm-project/commit/230e5d9a02cafb7fdb7b85075ca16217ee6f5f5a
  Author: Akshay K <iit.akshay at gmail.com>
  Date:   2026-07-31 (Fri, 31 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    A llvm/test/CodeGen/AArch64/zero-call-used-regs-no-neon.ll

  Log Message:
  -----------
  [AArch64] Fix zero-call-used-regs crash on targets without NEON (#211603)

## Summary

`-fzero-call-used-regs=all` crashes on AArch64 targets without NEON
support, such as `-mgeneral-regs-only` or `-march=armv8-a+nosimd`. The
former is a common configuration used by the Linux kernel.

```c
int p(int a) { return a + 1; }
```

```sh
$ clang --target=aarch64-linux-gnu -O2 -S -mgeneral-regs-only \
        -fzero-call-used-regs=all test.c -o -

Assertion failed: (STI.hasNEON() && "Expected to have NEON."),
buildClearRegister
```

## Cause

`buildClearRegister()` assumes clearing floating-point registers always
requires NEON. However, `-march=armv8-a+nosimd` still has the Armv8
floating-point extension, so FP registers must be cleared without NEON,
while `-mgeneral-regs-only` has no FP support but still collects FP
registers for clearing.

## Fix

Replace the `hasNEON()` assertion with `hasFPARMv8()` for the no-NEON FP
case, and skip collecting floating-point registers entirely when the
target has no Armv8 floating-point support.

**Fixes:** #211151

Assisted-by: Cursor



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