[all-commits] [llvm/llvm-project] b80689: [AMDGPU] gfx1250 co-execution scheduler

[Austin Kerbow via All-commits]

  Branch: refs/heads/users/kerbowa/gfx1250-coexec-release1-base-7570d2da
  Home:   https://github.com/llvm/llvm-project
  Commit: b80689ad5aeb433336ff6bc3fbdae7ae8601198c
      https://github.com/llvm/llvm-project/commit/b80689ad5aeb433336ff6bc3fbdae7ae8601198c
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2026-07-31 (Fri, 31 Jul 2026)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst
    M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
    M llvm/lib/CodeGen/AllocationOrder.cpp
    M llvm/lib/CodeGen/AllocationOrder.h
    M llvm/lib/CodeGen/MachineRegisterInfo.cpp
    M llvm/lib/CodeGen/MachineScheduler.cpp
    M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
    M llvm/lib/CodeGen/TargetRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
    A llvm/lib/Target/AMDGPU/AMDGPUCoExecInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
    M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
    M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
    M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
    A llvm/lib/Target/AMDGPU/AMDGPUStaticSimulator.cpp
    A llvm/lib/Target/AMDGPU/AMDGPUStaticSimulator.h
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
    M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
    M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
    M llvm/lib/Target/AMDGPU/GCNRegPressure.h
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
    M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
    M llvm/lib/Target/AMDGPU/SISchedule.td
    M llvm/lib/Target/AMDGPU/SOPInstructions.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
    M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
    M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
    M llvm/test/CodeGen/AMDGPU/add-max.ll
    M llvm/test/CodeGen/AMDGPU/add_i128.ll
    M llvm/test/CodeGen/AMDGPU/add_i64.ll
    M llvm/test/CodeGen/AMDGPU/add_u64.ll
    M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
    M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
    M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
    A llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare-canon-pad-zero.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
    A llvm/test/CodeGen/AMDGPU/anti-hints-va-vdst.gfx1250.mir
    A llvm/test/CodeGen/AMDGPU/anti-hints.gfx1250.mir
    M llvm/test/CodeGen/AMDGPU/anyext.ll
    M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
    M llvm/test/CodeGen/AMDGPU/atomic-optimizer-strict-wqm.ll
    M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
    M llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
    M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
    M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
    M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
    M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
    M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
    M llvm/test/CodeGen/AMDGPU/barrier-signal-wait-latency.ll
    M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
    M llvm/test/CodeGen/AMDGPU/bf16-math.ll
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
    M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
    M llvm/test/CodeGen/AMDGPU/bfm.ll
    M llvm/test/CodeGen/AMDGPU/bitop3.ll
    M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/bswap.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_cond.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_sat.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
    M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
    M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
    M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
    M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
    M llvm/test/CodeGen/AMDGPU/clmul.ll
    M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
    A llvm/test/CodeGen/AMDGPU/coexec-hazardrec-preRA.mir
    A llvm/test/CodeGen/AMDGPU/coexec-sched-ds-read-by-consumer-order.mir
    M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
    M llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
    A llvm/test/CodeGen/AMDGPU/coexec-sched-missed-slots.mir
    A llvm/test/CodeGen/AMDGPU/coexec-sched-shadow-mix.mir
    A llvm/test/CodeGen/AMDGPU/coexec-sched-slot-preferences.mir
    A llvm/test/CodeGen/AMDGPU/coexec-sched-wmma-exitsu.mir
    M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
    A llvm/test/CodeGen/AMDGPU/coexec-tryshadowmix.mir
    A llvm/test/CodeGen/AMDGPU/coexec-wide-copy-handling.mir
    A llvm/test/CodeGen/AMDGPU/coexec-window-populate-priority.mir
    M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
    M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
    M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
    M llvm/test/CodeGen/AMDGPU/commute-compares.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
    M llvm/test/CodeGen/AMDGPU/cttz.ll
    M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
    M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2.ll
    M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
    M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
    M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
    M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
    M llvm/test/CodeGen/AMDGPU/fceil64.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/flat-load-saddr-to-vaddr.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
    M llvm/test/CodeGen/AMDGPU/fmax3.ll
    M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
    M llvm/test/CodeGen/AMDGPU/fmed3.ll
    M llvm/test/CodeGen/AMDGPU/fmin3.ll
    M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
    M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
    M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
    M llvm/test/CodeGen/AMDGPU/fp-classify.ll
    M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.ll
    M llvm/test/CodeGen/AMDGPU/freeze.ll
    M llvm/test/CodeGen/AMDGPU/frem.ll
    M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
    M llvm/test/CodeGen/AMDGPU/global-address.ll
    M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
    M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/global-constant.ll
    M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
    M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
    M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
    M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
    M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
    M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
    M llvm/test/CodeGen/AMDGPU/indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
    M llvm/test/CodeGen/AMDGPU/insert-delay-alu-attr.ll
    M llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
    M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
    M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
    M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
    M llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
    M llvm/test/CodeGen/AMDGPU/kernel-args.ll
    M llvm/test/CodeGen/AMDGPU/ldsdmacnt_sched.mir
    A llvm/test/CodeGen/AMDGPU/lirp-reschedule.mir
    M llvm/test/CodeGen/AMDGPU/literal64.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.flat.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk16.gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk8.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.pk.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.async.barrier.arrive.b64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.barrier.arrive.rtn.b64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2c.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.tr.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.tfe.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.tfe.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1251.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1251.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.index.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
    M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
    M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
    M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
    M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
    M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
    M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
    M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
    M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
    M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
    M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
    M llvm/test/CodeGen/AMDGPU/mad_int24.ll
    M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
    M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
    M llvm/test/CodeGen/AMDGPU/max.ll
    M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-barriers.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
    R llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
    M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
    M llvm/test/CodeGen/AMDGPU/minmax.ll
    M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
    M llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir
    M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
    M llvm/test/CodeGen/AMDGPU/mul.ll
    M llvm/test/CodeGen/AMDGPU/mul_int24.ll
    M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
    M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
    M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
    M llvm/test/CodeGen/AMDGPU/packed-u64.ll
    M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
    M llvm/test/CodeGen/AMDGPU/pr155452.ll
    M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
    M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
    M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
    M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-mir.mir
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
    M llvm/test/CodeGen/AMDGPU/rotate-add.ll
    M llvm/test/CodeGen/AMDGPU/rotl.ll
    M llvm/test/CodeGen/AMDGPU/rotr.ll
    M llvm/test/CodeGen/AMDGPU/s-barrier.ll
    M llvm/test/CodeGen/AMDGPU/s-cluster-barrier.ll
    M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
    M llvm/test/CodeGen/AMDGPU/s_cmp_0.ll
    M llvm/test/CodeGen/AMDGPU/saddo.ll
    M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
    M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir
    A llvm/test/CodeGen/AMDGPU/schedule-vgpr-excess-threshold-waves.ll
    A llvm/test/CodeGen/AMDGPU/schedule-vgpr-excess-threshold.ll
    M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
    M llvm/test/CodeGen/AMDGPU/select.f16.ll
    M llvm/test/CodeGen/AMDGPU/setcc-multiple-use.ll
    M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.ll
    M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
    M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
    M llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
    M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
    M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
    M llvm/test/CodeGen/AMDGPU/smed3.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
    A llvm/test/CodeGen/AMDGPU/soft-waitcnt-deletion.mir
    A llvm/test/CodeGen/AMDGPU/soft-waitcnt-loop-deletion.ll
    M llvm/test/CodeGen/AMDGPU/spillv16Kernel.ll
    M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
    M llvm/test/CodeGen/AMDGPU/ssubo.ll
    A llvm/test/CodeGen/AMDGPU/static-simulator/basic-timing-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/cfg-frequency-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/delay-alu-skip-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/lolvalu-trans-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/operand-cache-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/scoreboard-raw-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/ssrc-stall-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/va-vdst-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/waitcnt-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/wmma-coexec-test.mir
    A llvm/test/CodeGen/AMDGPU/static-simulator/wmma-window-ldscale.ll
    M llvm/test/CodeGen/AMDGPU/sub_u64.ll
    A llvm/test/CodeGen/AMDGPU/tensor-load-latency.mir
    M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
    M llvm/test/CodeGen/AMDGPU/uaddo.ll
    M llvm/test/CodeGen/AMDGPU/udivrem24.ll
    M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
    M llvm/test/CodeGen/AMDGPU/umed3.ll
    M llvm/test/CodeGen/AMDGPU/usubo.ll
    M llvm/test/CodeGen/AMDGPU/usubsat.ll
    M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
    M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
    M llvm/test/CodeGen/AMDGPU/valu-i1.ll
    A llvm/test/CodeGen/AMDGPU/valu-sgpr-to-salu-hazard-sched.mir
    M llvm/test/CodeGen/AMDGPU/vgpr-excess-threshold-percent-invalid.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-excess-threshold-percent.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
    A llvm/test/CodeGen/AMDGPU/vgpr-setreg-pred-block.mir
    M llvm/test/CodeGen/AMDGPU/vselect.ll
    M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
    M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
    M llvm/test/CodeGen/AMDGPU/wait-xcnt-drain.mir
    M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
    A llvm/test/CodeGen/AMDGPU/waitcnt-forcezero-gfx1250.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-store-barrier.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-opt.mir
    A llvm/test/CodeGen/AMDGPU/waitcnt-vavdst-per-pipe-optimization.mir
    A llvm/test/CodeGen/AMDGPU/waitcnt-vavdst-xdl-fence.mir
    A llvm/test/CodeGen/AMDGPU/waitcnt-vavdst-xdl-ordered-event.mir
    M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
    M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
    M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
    M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
    M llvm/test/CodeGen/AMDGPU/wmma-nop-hoisting.mir
    A llvm/test/CodeGen/AMDGPU/wmma-trans-multi-shadow-hazard.mir
    M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
    M llvm/test/CodeGen/AMDGPU/zero_extend.ll
    R llvm/test/CodeGen/NVPTX/insert-vector-elt-bitcast-legalize.ll
    A llvm/test/Transforms/InstCombine/shufflevector-phi-shuffle.ll
    A llvm/test/tools/llvm-mca/AMDGPU/gfx1250-repeat-rate.s
    M llvm/unittests/Target/AMDGPU/CMakeLists.txt
    A llvm/unittests/Target/AMDGPU/CoExecInfoTest.cpp
    M llvm/utils/TableGen/SubtargetEmitter.cpp

  Log Message:
  -----------
  [AMDGPU] gfx1250 co-execution scheduler

Snapshot of the gfx1250 co-execution scheduling work, squashed into a
single commit on top of llvm/llvm-project 7570d2daec56.

Includes the co-execution window model (AMDGPUCoExecInfo.h), the
CoExecSchedStrategy window-slot-demand machinery, pre-RA and post-RA
co-execution hazard tracking in GCNHazardRecognizer, the gfx1250 static
simulator (AMDGPUStaticSimulator), expert-mode waitcnt work in
SIInsertWaitcnts, and the supporting lit and MIR tests.

Authored by, in no particular order:

  Austin Kerbow, Jeffrey Byrnes, Alexey Sachkov, Lucas Ramirez,
  Volkan Keles, Hideki Saito, Jay Foad, Brendon Cahoon,
  Ilia Cherniavskii, Alexander Weinrauch, Vigneshwar, proaditya,
  mssefat, Lei Zhang



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