[all-commits] [llvm/llvm-project] d211ec: Add TOSA -> EmitC tests for MLGO mock models (#211...
Pengcheng Wang via All-commits
all-commits at lists.llvm.org
Wed Jul 29 23:47:51 PDT 2026
Branch: refs/heads/users/wangpc-pp/spr/main.riscv-support-codegen-of-zilx-extension
Home: https://github.com/llvm/llvm-project
Commit: d211ecfc817f73e1395a0dc32e45b84de7b9bdb3
https://github.com/llvm/llvm-project/commit/d211ecfc817f73e1395a0dc32e45b84de7b9bdb3
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A mlir/test/Integration/Dialect/EmitC/inline-oz-test-model-tosa.mlir
A mlir/test/Integration/Dialect/EmitC/regalloc-eviction-test-model-tosa.mlir
Log Message:
-----------
Add TOSA -> EmitC tests for MLGO mock models (#211833)
These tests are the first step towards monitoring the recently enabled
TOSA -> EmitC path that ML optimization models will switch to, for a
fully in-tree, framework free serving alternative.
For simplicity, yet testing the core functionality, these tests don't
use production models, but rather in-tree mock models, generated by
these scripts:
[llvm/lib/Analysis/models/gen-regalloc-eviction-test-model.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/gen-regalloc-eviction-test-model.py)
/
[llvm/lib/Analysis/models/gen-inline-oz-test-model.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/gen-inline-oz-test-model.py)
\+
[llvm/lib/Analysis/models/saved-model-to-tflite.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/saved-model-to-tflite.py)
+
[tosa-converter-for-tflite](https://www.piwheels.org/project/tosa-converter-for-tflite/)
> Note: `saved-model-to-tflite.py` renames the TFLite converted
SavedModel function to `main()`, which causes `clang` errors. Changing
this behaviour requires interventions in Tensorflow, which are out of
scope. Therefore, the functions were manually renamed.
> Note: The includes passed by argument to `clang` should have been
handled by EmitC. This only becomes a problem when compiling these
models standalone. Embedding the models in LLVM does not cause issues.
Nonetheless, future work will ensure `ConvertToEmitC` includes required
libraries for these ops.
Commit: 3b6e754c0a048f034d7241a4eac6ccc8b3d0134c
https://github.com/llvm/llvm-project/commit/3b6e754c0a048f034d7241a4eac6ccc8b3d0134c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/test/AST/ByteCode/amdgpu-nullptr.cl
M clang/test/AST/ast-dump-amdgpu-types.c
M clang/test/Analysis/addrspace-null.c
M clang/test/Analysis/cast-value-notes.cpp
M clang/test/Analysis/element-region-address-space.c
M clang/test/Analysis/ptr-cmp-const-trunc.cl
M clang/test/Analysis/solver-sym-simplification-ptr-bool.cl
M clang/test/Analysis/z3/cstring-addrspace.c
M clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
M clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
M clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
M clang/test/CIR/CodeGenHIP/amdgpu-module-flags.hip
M clang/test/CIR/CodeGenHIP/hip-cuid.hip
M clang/test/CIR/CodeGenHIP/simple.cpp
M clang/test/CIR/CodeGenOpenMP/emit-device-functions.cpp
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CodeGen/AMDGPU/sanitizer.c
M clang/test/CodeGen/address-space.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/amdgpu-image-rsrc-type-debug-info.c
M clang/test/CodeGen/amdgpu-variadic-call.c
M clang/test/CodeGen/annotations-field.c
M clang/test/CodeGen/annotations-loc.c
M clang/test/CodeGen/bitfield-access-unit.c
M clang/test/CodeGen/default-address-space.c
M clang/test/CodeGen/dynamic-alloca-with-address-space.c
M clang/test/CodeGen/fp-atomic-ops.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/linking-bitcode-postopt.cpp
M clang/test/CodeGen/logb_scalbn.c
M clang/test/CodeGen/pragma-detect_mismatch.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/scoped-fence-ops.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCUDA/address-spaces.cu
M clang/test/CodeGenCUDA/alias.cu
M clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
M clang/test/CodeGenCUDA/amdgpu-visibility.cu
M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
M clang/test/CodeGenCUDA/anon-ns.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/const-var.cu
M clang/test/CodeGenCUDA/dependent-libs.cu
M clang/test/CodeGenCUDA/device-const-var-linkage.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/device-use-host-var.cu
M clang/test/CodeGenCUDA/device-var-init.cu
M clang/test/CodeGenCUDA/device-var-linkage.cu
M clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip
M clang/test/CodeGenCUDA/host-used-device-var.cu
M clang/test/CodeGenCUDA/implicit-hd-dtor-trap-stub-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-explicit-inst-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-overload-ambig-hip.hip
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCUDA/kernel-arg-name-metadata.cu
M clang/test/CodeGenCUDA/kernel-args.cu
M clang/test/CodeGenCUDA/kernel-dbg-info.cu
M clang/test/CodeGenCUDA/lambda-constexpr-capture.cu
M clang/test/CodeGenCUDA/lambda-noinline.cu
M clang/test/CodeGenCUDA/lambda-reference-var.cu
M clang/test/CodeGenCUDA/lambda.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-gpu-attrs-preserved.cu
M clang/test/CodeGenCUDA/managed-var.cu
M clang/test/CodeGenCUDA/ms-linker-options.cu
M clang/test/CodeGenCUDA/noinline.cu
M clang/test/CodeGenCUDA/norecurse.cu
M clang/test/CodeGenCUDA/nosanitize-cuid.hip
M clang/test/CodeGenCUDA/static-device-var-no-rdc.cu
M clang/test/CodeGenCUDA/static-device-var-rdc.cu
M clang/test/CodeGenCUDA/template-class-static-member.cu
M clang/test/CodeGenCUDA/types.cu
M clang/test/CodeGenCUDA/unnamed-types.cu
M clang/test/CodeGenCXX/address-space-cast-coerce.cpp
M clang/test/CodeGenCXX/address-space-cast.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/amdgcn-string-literal.cpp
M clang/test/CodeGenCXX/amdgcn_declspec_get.cpp
M clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-buffer-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-image-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-kernel-arg-pointer-type.cpp
M clang/test/CodeGenCXX/bitfield-access-empty.cpp
M clang/test/CodeGenCXX/bitfield-access-tail.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
M clang/test/CodeGenCXX/conditional-temporaries.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenCXX/cxx11-extern-constexpr.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/no-elide-constructors.cpp
M clang/test/CodeGenCXX/template-param-objects-address-space.cpp
M clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp
M clang/test/CodeGenCXX/try-catch-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-with-address-space.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-consteval-address-space.cpp
M clang/test/CodeGenCXX/vtable-constexpr-address-space.cpp
M clang/test/CodeGenCXX/vtable-key-function-address-space.cpp
M clang/test/CodeGenCXX/vtable-layout-extreme-address-space.cpp
M clang/test/CodeGenCXX/vtable-linkage-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtt-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
M clang/test/CodeGenHIP/debug-info-language-hip.hip
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/device-function-huge-arg-ret.hip
M clang/test/CodeGenHIP/half.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHIP/placement-new-addrspace.hip
M clang/test/CodeGenHIP/printf-aggregate.cpp
M clang/test/CodeGenHIP/printf-builtin.hip
M clang/test/CodeGenHIP/printf-kind-module-flag.hip
M clang/test/CodeGenHIP/printf.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenHIP/sret-lifetime-markers.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
M clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
M clang/test/CodeGenHipStdPar/unsupported-ASM.cpp
M clang/test/CodeGenHipStdPar/unsupported-builtins.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/address-space-constant-initializers.cl
M clang/test/CodeGenOpenCL/address-spaces.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgcn-flat-scratch-name.cl
M clang/test/CodeGenOpenCL/amdgcn-large-globals.cl
M clang/test/CodeGenOpenCL/amdgcn-non-temporal-store.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-alignment.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-calling-conv.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M clang/test/CodeGenOpenCL/amdgpu-ieee.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
M clang/test/CodeGenOpenCL/atomic-builtins-default-to-device-scope.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/backend-unsupported-warning.ll
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-cvt-off-f32-i4.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/CodeGenOpenCL/byval.cl
M clang/test/CodeGenOpenCL/cast_image.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/func-call-dbg-loc.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCL/lifetime.cl
M clang/test/CodeGenOpenCL/nullptr.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
M clang/test/CodeGenOpenCL/private-array-initialization.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/CodeGenOpenCL/sqrt-fpmath.cl
M clang/test/CodeGenOpenCL/visibility.cl
M clang/test/CodeGenOpenCL/vla.cl
M clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/DebugInfo/Generic/amdgpu-barrier-type-debug-info.c
M clang/test/DebugInfo/Generic/amdgpu-buffer-rsrc-type-debug-info.c
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
M clang/test/Frontend/opencl.cl
M clang/test/Headers/__clang_hip_libdevice_declares.cpp
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/amdgcn_openmp_device_math.c
M clang/test/Headers/amdgcn_openmp_device_math_c.c
M clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
M clang/test/Headers/amdhsa_abi.cl
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/openmp-device-functions-bool.c
M clang/test/Headers/openmp_device_math_isnan.cpp
M clang/test/Headers/openmp_new_nothrow.cpp
M clang/test/Index/pipe-size.cl
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
M clang/test/Misc/backend-resource-limit-diagnostics.cl
M clang/test/PCH/aarch64-sve-types.c
M clang/test/Preprocessor/builtin_aux_info.cpp
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-macros.c
M clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/amdgcn-va-list-type.c
M clang/test/Sema/attr-model.cpp
M clang/test/Sema/builtin-amdgcn-atomic-inc-dec-failure.cpp
M clang/test/Sema/builtin-amdgcn-fence-failure.cpp
M clang/test/Sema/callingconv-devicekernel.cpp
M clang/test/Sema/inline-asm-validate-amdgpu.cl
M clang/test/Sema/scoped-atomic-ops.c
M clang/test/Sema/wave-reduce-builtins-validate-amdgpu.cl
M clang/test/SemaCUDA/addr-of-overloaded-fn.cu
M clang/test/SemaCUDA/addr-of-overloaded-template-fn.cu
M clang/test/SemaCUDA/allow-int128.cu
M clang/test/SemaCUDA/amdgpu-builtins-pointer-args.cu
M clang/test/SemaCUDA/amdgpu-f128.cu
M clang/test/SemaCUDA/amdgpu-size_t.cu
M clang/test/SemaCUDA/amdgpu-windows-vectorcall.cu
M clang/test/SemaCUDA/atomic-ops.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/const-var.cu
M clang/test/SemaCUDA/constexpr-var.cu
M clang/test/SemaCUDA/deferred-diags-dedup.cu
M clang/test/SemaCUDA/fp16-arg-return.cu
M clang/test/SemaCUDA/implicit-hd-dtor-explicit-instantiation.cu
M clang/test/SemaCUDA/implicit-hd-explicit-inst-organic-caller.cu
M clang/test/SemaCUDA/implicit-hd-overload-ambig-organic-caller.cu
M clang/test/SemaCUDA/overloaded-builtin.cu
M clang/test/SemaCUDA/windows-calling-conv.cu
M clang/test/SemaCXX/amdgpu-barrier.cpp
M clang/test/SemaCXX/amdgpu-buffer-rsrc.cpp
M clang/test/SemaCXX/amdgpu-image-rsrc.cpp
M clang/test/SemaCXX/amdgpu-sizeof-alignof.cpp
M clang/test/SemaHIP/amdgpu-barrier.hip
M clang/test/SemaHIP/amdgpu-buffer-rsrc.hip
M clang/test/SemaHIP/amdgpu-feature-predicate.hip
M clang/test/SemaHIP/amdgpu-is-invocable.hip
M clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/test/SemaHIP/atomic-deprecated.hip
M clang/test/SemaHIP/zero-sized-device-array.hip
M clang/test/SemaHipStdPar/device-can-call-host.cpp
M clang/test/SemaOpenCL/amd-media-ops.cl
M clang/test/SemaOpenCL/amdgpu-attrs.cl
M clang/test/SemaOpenCL/amdgpu-barrier.cl
M clang/test/SemaOpenCL/amdgpu-buffer-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-image-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-num-sgpr-vgpr-deprecated.cl
M clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
M clang/test/SemaOpenCL/atomic-ops.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cvt-off-f32-i4-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-f16.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/numbered-address-space.cl
M clang/test/SemaOpenCL/sampler_t.cl
M clang/test/SemaOpenCLCXX/amdgpu-nullptr.clcpp
M clang/test/SemaSYCL/sycl-cconv-win.cpp
Log Message:
-----------
clang/AMDGPU: Rename amdgcn triples to amdgpu in cc1 tests (14) (#212053)
Replace the legacy amdgcn architecture name with amdgpu in various
test triples. This set of updates covers cases that did not have
a set -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 2d289b24a9f99c4357d8783c2d4f25fa46ef619a
https://github.com/llvm/llvm-project/commit/2d289b24a9f99c4357d8783c2d4f25fa46ef619a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-canonical-prefixes.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-amdgcnspirv.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/test/OffloadTools/clang-offload-bundler/standardize.c
M clang/test/OffloadTools/clang-offload-bundler/zlib.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
Log Message:
-----------
clang/AMDGPU: Migrate clang-linker-wrapper tests to amdgpu triples (15) (#212054)
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: ed326421d27ea8c38b11c84aa23bd655063cb4f9
https://github.com/llvm/llvm-project/commit/ed326421d27ea8c38b11c84aa23bd655063cb4f9
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
Log Message:
-----------
[LifetimeSafety][NFC] Update Checker to use prefix comparison interfaces (#207519)
This patch switches the Checker's expiry and invalidation checks to use
`AccessPath::isPrefixOf` instead of equality (`==`).
Since all generated access paths are currently empty, `isPrefixOf` is
behaviourally identical to `==` (NFC). This prepares the checker to
handle nested paths (fields and container interiors) in subsequent
commits.
Commit: b8de72900b1da9dc1ca1d6a9961a8da7498b2295
https://github.com/llvm/llvm-project/commit/b8de72900b1da9dc1ca1d6a9961a8da7498b2295
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
R llvm/test/CodeGen/AArch64/GlobalISel/irtranslater-samesign.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
Log Message:
-----------
[AArch64][GlobalISel] Rename irtranslater -> irtranslator test. NFC (#212205)
Commit: f901499b11c1fe4fec3075a4b2d01e330f3a00c6
https://github.com/llvm/llvm-project/commit/f901499b11c1fe4fec3075a4b2d01e330f3a00c6
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/entry-point-at-function-end.s
Log Message:
-----------
[BOLT] Split unmarked tail code after CFI-bounded functions into separate functions (#176173)
Detect trailing unmarked code after CFI-bounded predecessors
(__BOLT_FDE_FUNC* or symbols whose FDE address range equals their size)
and promote it into separate BinaryFunction objects named
__BOLT_UNMARKED_TAILat<addr>.
A predecessor is only considered when:
- the target is AArch64
- it is not a pseudo or fragment function
- it has slack beyond its recorded size (MaxSize > Size)
- it is CFI-bounded
- no function is already registered at the tail start address
The trailing region is measured conservatively and we bail out (leaving
the slack attached to the predecessor) when:
- the tail range is not fully contained in the predecessor's origin
section
- a data marker ($d) or a constant island overlaps the region
(data-in-code)
- disassembly fails or yields a zero-length instruction
- after trimming trailing padding, the tail is empty (i.e. it contained
only padding) or does not end in a return
- any bytes past the decoded code are non-zero, i.e. not pure zero
padding.
The bug was introduced in commit
[cd27741](https://github.com/llvm/llvm-project/commit/cd27741c1111f8a97af5fbca4153fa94f50ed9f3)
Commit: ecd8d61126426b5fd92a48aa02e93c2c4a869577
https://github.com/llvm/llvm-project/commit/ecd8d61126426b5fd92a48aa02e93c2c4a869577
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/liboffload/API/Common.td
A offload/liboffload/API/Context.td
M offload/liboffload/API/OffloadAPI.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/context/olCreateContext.cpp
A offload/unittests/OffloadAPI/context/olDestroyContext.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfo.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfoSize.cpp
Log Message:
-----------
[Offload] Add olCreateContext / olDestroyContext / olGetContextInfo API (#209144)
Add the initial Context handle API to liboffload:
- olCreateContext / olDestroyContext
- olGetContextInfo / olGetContextInfoSize
- OL_ERRC_INVALID_CONTEXT error code
- OL_CONTEXT_INFO_{NUM_DEVICES,DEVICES,PLATFORM} queries
This is the first patch in a series. I decided to split the original
change into multiple smaller PRs to make the review process faster and
more manageable.
This patch introduces context management functions, but the context
handle is not used anywhere yet. The following patches will extend the
API to use contexts in:
``` c
ol_result_t olMemAlloc(ol_context_handle_t, ol_device_handle_t, ol_alloc_type_t, size_t, void**);
ol_result_t olMemFree(ol_context_handle_t, void*);
ol_result_t olGetMemInfo(ol_context_handle_t, const void*, ol_mem_info_t, size_t, void*);
ol_result_t olGetMemInfoSize(ol_context_handle_t, const void*, ol_mem_info_t, size_t*);
ol_result_t olCreateQueue(ol_context_handle_t, ol_device_handle_t, ol_queue_handle_t*);
ol_result_t olCreateProgram(ol_context_handle_t, ol_device_handle_t, const void*, size_t, ol_program_handle_t*);
```
You can also take a look at #201398, which contains the first version of
the complete change. I'm cleaning it up as I go, so the patches in this
series are not a direct 1:1 split of that PR.
Commit: 8dfdcfb11624fe3eba614af21aa739fffd7ae94f
https://github.com/llvm/llvm-project/commit/8dfdcfb11624fe3eba614af21aa739fffd7ae94f
Author: Lucas Chollet <lucas.chollet at free.fr>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Driver/ToolChains/Clang.cpp
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
A llvm/test/CodeGen/RISCV/zero-call-used-regs-v.ll
Log Message:
-----------
[RISCV] Add support for vector registers with -fzero-call-used-regs (#206206)
The implementation is quite straightforward. Compared to the FP or GP
register implementations, the main difference is that we need to
configure the vector registers before clearing them.
Now that the backend supports clearing all standard registers, this
patch makes the clang driver accept all -fzero-call-used-regs options.
Commit: bc634a8c98dc0588bcde8f8d37c172841f579ef1
https://github.com/llvm/llvm-project/commit/bc634a8c98dc0588bcde8f8d37c172841f579ef1
Author: Karol Zwolak <karolzwolak7 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
Log Message:
-----------
[NFC] remove const_cast in DebugSSAUpdater (#212192)
#206059 added non-const `getInstruction()` overload so we can drop the
const_cast here.
Commit: cf08d4bc700245f85ce528f6c9f4d9a3fdd316a0
https://github.com/llvm/llvm-project/commit/cf08d4bc700245f85ce528f6c9f4d9a3fdd316a0
Author: blazej-smorawski <56126596+blazej-smorawski at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/include/L0Defs.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Event.h
M offload/plugins-nextgen/level_zero/include/L0Interop.h
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/include/L0Program.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Event.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Memory.cpp
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[offload] Align style of level zero plugin with llvm coding standard (#211762)
This patch does a small cleanup of level zero plugin. Mainly I changed
names of variables to use `CamelCase` whenever they relate to our
internal structures - not objects coming directly from level zero API
etc., so I left some variables and arguments like `zeDevice`, but only
if they are directly related to level zero APIs or structures.
Added a few `auto *` declarations, but again - only when they refer to
our internal objects and not to structures from level zero which might
be pointers underneath, but we use them as transparent objects.
Also did small cleanup of unused headers, making sure that we include
directly what we need rather than use transitive dependencies.
@adurang Please let me know if this patch is okay with you, if you think
this will cause more harm then it's worth I'll close it.
---------
Co-authored-by: Łukasz Plewa <lukasz.plewa at intel.com>
Commit: 1b3d208c77145b670207a646050bbe2cc8aea567
https://github.com/llvm/llvm-project/commit/1b3d208c77145b670207a646050bbe2cc8aea567
Author: Avi Patel <aviipatel06 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/memory
M libcxx/include/version
M libcxx/modules/std/memory.inc
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerequal/owner_equal.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerhash/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_hash.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P1901R2: owner_hash and owner_equal for shared_ptr/weak_ptr (#210551)
Fixes #105372.
## Acknowledgements
Claude assisted with test development.
Commit: a744ab39c43cf6ae483bbd72613cf589daaade56
https://github.com/llvm/llvm-project/commit/a744ab39c43cf6ae483bbd72613cf589daaade56
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/www/cxx_dr_status.html
M clang/www/make_cxx_dr_status
Log Message:
-----------
[clang] Update C++ DR status page (#212210)
On top of updating the status page, this PR updates the `latest_release`
constant to 22 and fixes a small `cwg_index.html` parsing issue that
arose during the update.
Commit: 47e51bdd4fc247008a5c9638f99cb073496e7d2e
https://github.com/llvm/llvm-project/commit/47e51bdd4fc247008a5c9638f99cb073496e7d2e
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/liboffload/API/Memory.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfo.cpp
M offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
M offload/unittests/OffloadAPI/memory/olMemAllocAligned.cpp
M offload/unittests/OffloadAPI/memory/olMemFree.cpp
Log Message:
-----------
[offload] Split olMemAlloc to separate functions (#209196)
At the previous community meeting, we agreed to introduce contexts into
the liboffload API. I also mentioned that, as part of this work, we
could split the allocation function into three separate functions, but
we did not discuss this idea in detail.
This patch only splits the allocation functions, allowing us to discuss
and agree on the proposed interface before introducing contexts into the
`olMemAlloc` API.
Once contexts are added, the device parameter will be removed from host
allocations, and the final interface would look like this:
```c
ol_result_t olMemAllocDevice(ol_context_handle_t, ol_device_handle_t, size_t, void **);
ol_result_t olMemAllocHost(ol_context_handle_t, size_t, void **);
ol_result_t olMemAllocManaged(ol_context_handle_t, ol_device_handle_t, size_t, void **);
```
Currently, for host allocations, the device parameter is required mainly
to determine which plugin should perform the allocation. Once contexts
are introduced, this information will be provided by the context, making
the device parameter redundant.
Requiring both a context and a device for host allocations could also be
misleading, since it is unclear what the device parameter actually
represents in this API.
Assisted by: Claude.
Commit: e07c6e6ac477058fd7f897879054e8b2f0e8868b
https://github.com/llvm/llvm-project/commit/e07c6e6ac477058fd7f897879054e8b2f0e8868b
Author: Varad Rahul Kamthe <133588066+varadk27 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/is_fpclass.ll
Log Message:
-----------
[InstCombine][NFC] Reorder isKnownAlways(Mask) check in foldIntrinsicIsFPClass (#212216)
Fixes #189949
The preceding mask-narrowing step already guarantees `Mask` is a subset
of `Known.KnownFPClasses` by the time the old equality check ran, so
`Mask == Known.KnownFPClasses` was already equivalent (see #190504).
This patch replaces that equality check with `Known.isKnownAlways(Mask)`
(matching the SelectionDAG equivalent's naming) and moves it before the
narrowing step, avoiding a redundant worklist re-visit.
Added a regression test in `is_fpclass.ll`.
Commit: b1a6c7d4cf9163b2cb347005e8743400b0d0e4fb
https://github.com/llvm/llvm-project/commit/b1a6c7d4cf9163b2cb347005e8743400b0d0e4fb
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero-unsupported.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-with-success.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop-no-implicit-float.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-dyn-alloca.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-hint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-indexed-load-stores.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-get-dynamic-area-offset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-range.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-xor.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rotr-rotl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-zext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-store-vector-bools.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-threeway-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadd-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usub-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-compress.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xtn.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-zextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner-zext-trunc-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
Log Message:
-----------
[AArch64][GlobalISel] Update legalize tests with concrete types. NFC (#212217)
Commit: 8e374dbdf2ef1cc74eac8880786e79b2b2dd0890
https://github.com/llvm/llvm-project/commit/8e374dbdf2ef1cc74eac8880786e79b2b2dd0890
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
Log Message:
-----------
[NFC][analyzer] Eliminate NodeBuilder in VisitBlockExpr (#211865)
This is part of the commit series that gradually eliminates the class
`NodeBuilder` from the analyzer engine.
This is a straightforward case where `makeNodeWithBinding` can be
clearly applied.
The node set `Tmp` was superfluous because we can directly pass the node
to `runCheckersForPostStmt` where it will be implicitly converted to a
one-element set. (There are many precedents for this.)
Also notice that we explicitly pass the `State` to `makeNodeWithBinding`
because it can be different from `Pred->getState()` (which would have
been used implicitly by the 4-argument form of `makeNodeWithBinding`.)
Commit: bd3551611ea19adae70a744be8d4f4ec096a114a
https://github.com/llvm/llvm-project/commit/bd3551611ea19adae70a744be8d4f4ec096a114a
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/Transforms/Utils/CloningTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
Log Message:
-----------
[IR][NFC] Rename insertDbgValueIntrinsic -> insertDbgValue (#212151)
Rename `insertDbgValueIntrinsic` to `insertDbgValue`, which is
consistent with the other insert helpers like `insertDbgAssign`,
`insertDeclare`, etc.
Also use debug record instead of intrinsic terminology in doc comments.
Commit: 9facc238463a8b10189534bb9da2e1e2f7503dd6
https://github.com/llvm/llvm-project/commit/9facc238463a8b10189534bb9da2e1e2f7503dd6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
Log Message:
-----------
[SCEV] Avoid building throwaway nodes in SCEVURem_match (NFC) (#212149)
URem matching currently constructs rather complex
`A - ((A udiv B) * B)` expressions just to check if the given expression
is an URem op.
Exit early without building the expression, if neither of the operands
is UDiv.
This gives significant compile-time improvements end-to-end:
* stage1-O3: -0.23%
* stage1-ReleaseThinLTO: -0.24%
* stage1-ReleaseLTO-g: -0.18%
* stage1-aarch64-O3: -0.21%
* stage2-O3: -0.23%
https://llvm-compile-time-tracker.com/compare.php?from=5771cd03344ba3a8df7ed364b6f98451b68fcb30&to=597567670167f7c60be659389bd22b773fbac4ac&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/212149
Commit: cd653d59160ee91fd33b949cc6989c7945d9cdf3
https://github.com/llvm/llvm-project/commit/cd653d59160ee91fd33b949cc6989c7945d9cdf3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A orc-rt/include/orc-rt-c/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add C API for Session::callController. (#212204)
Add orc-rt-c/Session.h with a C API, orc_rt_Session_callController,
wrapping the C++ Session::callController method.
Commit: 1333e0a05d822b96e76d9edf55f1af66e2cbb0b3
https://github.com/llvm/llvm-project/commit/1333e0a05d822b96e76d9edf55f1af66e2cbb0b3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/__locale
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Remove locale::id::__next_id from the ABI (#210360)
`__next_id` is only ever used inside the dylib, so we can avoid making it public.
Commit: e10674378de70647d666499c6fd7f11a7ee03f6e
https://github.com/llvm/llvm-project/commit/e10674378de70647d666499c6fd7f11a7ee03f6e
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/instructions/ret-single-element-array.ll
Log Message:
-----------
[SPIR-V] Fix direct return of aggregate extractvalue (#209762)
SPIRVPrepareFunctions rewrites aggregate function returns to i32 value
IDs, but an aggregate extractvalue used directly by ret kept its
original type, leaving invalid IR for the verifier. Mutate the lowered
spv_extractv result when it feeds a rewritten return so the LLVM type
matches while the registry preserves the aggregate SPIR-V type.
Closes https://github.com/llvm/llvm-project/issues/208899.
Replaces https://github.com/llvm/llvm-project/pull/209027 (that PR seems
spam? although the diagnosis was largely correct)
Co-authored-by: Claude Fable 5 <noreply at anthropic.com>
Commit: 187d096d44bfabc0a392d0abf1d87123e67f5efb
https://github.com/llvm/llvm-project/commit/187d096d44bfabc0a392d0abf1d87123e67f5efb
Author: Hardik Kumar <hardikxk at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constexpr.c
Log Message:
-----------
[clang] Fix the StringRef assertion failure for non-narrow strings. (#212108)
StringRef assertion fires up when passing wide literals to
`__builtin_nanf()`.
The patch updates the `TryEvaluateBuiltinNan` method to reject
non-narrow string literals preventing the downstream assertion failure
caused by `getString()` in cases where the user might pass a non-narrow
/ non 1 byte literal."
Fix #205306
Commit: c84136af3d15893fe3f2bc608280ccaa71e18db1
https://github.com/llvm/llvm-project/commit/c84136af3d15893fe3f2bc608280ccaa71e18db1
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/text_encoding
A libcxx/test/libcxx/text/text_encoding/aliases_count.pass.cpp
R libcxx/test/std/text/text_encoding/test_text_encoding.h
M libcxx/test/std/text/text_encoding/text_encoding.ctor/id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.ctor/string_view.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.eq/equal.id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/empty.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/operator-bool.pass.cpp
M libcxx/test/support/module.modulemap
A libcxx/test/support/test_text_encoding.h
Log Message:
-----------
[libc++] Inline `text_encoding` alias offset table std::count to 884 (#207471)
- Add count test to verify the exact number of aliases our table
contains
- Should reduce compile time cost of gathering that count
Commit: 42b4ee6383e340c4c3ab4cfddd17f864ab331e0d
https://github.com/llvm/llvm-project/commit/42b4ee6383e340c4c3ab4cfddd17f864ab331e0d
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/HowToReleaseLLVM.rst
Log Message:
-----------
docs: Adjust HowToReleaseLLVM to include man page signing (#210092)
This adds documentation on how to sign man pages.
Commit: f92e977a8e76a0e40e3af255f13c30b6710fd871
https://github.com/llvm/llvm-project/commit/f92e977a8e76a0e40e3af255f13c30b6710fd871
Author: Chibuoyim (Wilson) Ogbonna <ogbonnachibuoyim12 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/roundtrip.mlir
Log Message:
-----------
[MLIR][Linalg] Fix crash on duplicate dimensions in linalg.broadcast (#211203)
per
[#210738](https://github.com/llvm/llvm-project/pull/210738#discussion_r3622744153)
Currently, the following crashes on verification with a segfault:
```
func.func @broadcast_rank0_tensor(%arg0: tensor<i32>, %arg1: tensor<32x2xi32>) -> tensor<32x2xi32> {
%0 = linalg.broadcast ins(%arg0 : tensor<i32>) outs(%arg1 : tensor<32x2xi32>) dimensions = [0, 0]
return %0 : tensor<32x2xi32>
}
```
The verifier should reject cases like this where we have a duplicate
dimension. I've also added a couple of tests covering `linalg.broadcast`
on various input scenarios to confirm they are being handled properly.
Commit: 08c7b4203815b3502c04ecb9cd8b6dae21fc5661
https://github.com/llvm/llvm-project/commit/08c7b4203815b3502c04ecb9cd8b6dae21fc5661
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.h
Log Message:
-----------
[offload] update llvm-gpu-loader the new liboffload allocation API (#212225)
PR #209196 split host memory allocations into a dedicated API. Update
llvm-gpu-loader to use the new host allocation function introduced by
that change.
Commit: dcfadf69caf127b021c3f7de0c8abc0e45bb3b64
https://github.com/llvm/llvm-project/commit/dcfadf69caf127b021c3f7de0c8abc0e45bb3b64
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/ThreadPoolRunner.h
M orc-rt/lib/executor/ThreadPoolRunner.cpp
M orc-rt/test/unit/ThreadPoolRunnerTest.cpp
Log Message:
-----------
[orc-rt] Make ThreadPoolRunner a generic task runner. (#212229)
Commit 01683dbe7e207 generalized the Session's dispatch mechanism to
hand each runner an opaque Task (move_only_function<void()>), and
simplified QueueingRunner accordingly, but failed to update
ThreadPoolRunner.
Update ThreadPoolRunner to conform to Session's dispatch requirements
and update its unit test to dispatch plain tasks rather than
wrapper-function calls.
Commit: 2f60c93e01321a0434f8a3ad4f88afed9f35a583
https://github.com/llvm/llvm-project/commit/2f60c93e01321a0434f8a3ad4f88afed9f35a583
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libsycl/src/usm_functions.cpp
Log Message:
-----------
[SYCL] Update SYCL to use the new liboffload allocation API (#212223)
PR #209196 split host memory allocations into a dedicated API. Update
SYCL to use the new host allocation function introduced by that change.
Commit: a48aefd6ea9404916b0efa53942cbeae2d9781ff
https://github.com/llvm/llvm-project/commit/a48aefd6ea9404916b0efa53942cbeae2d9781ff
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/NonUniformIdx/RWBufferNonUniformIdxLoop.ll
Log Message:
-----------
[SPIR-V] Guard against infinite loop in decorateUsesAsNonUniform (#208224)
Add a visited set so an SSA cycle through a loop-carried phi does not
hang the worklist walk
Commit: d7acf8cb4c00560d7f31eabd869a0a8d8fc7e313
https://github.com/llvm/llvm-project/commit/d7acf8cb4c00560d7f31eabd869a0a8d8fc7e313
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
A llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-interference.mir
Log Message:
-----------
[InlineSpiller] Avoid spill hoisting interference (#211809)
When hoisting spills and the source is a PHI, the "hoisted" spill may be
inserted only after the basic block prologue. This may require extending
this segment of the source value's live interval.
Abort the hoisting if this extension of the segment would interfere with
another live interval assigned to the same physical register.
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 225e988b3d9e3bd05a0a79e071f07d22f1f1e0ad
https://github.com/llvm/llvm-project/commit/225e988b3d9e3bd05a0a79e071f07d22f1f1e0ad
Author: Romanov Vlad <Vladislav.Romanov at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-regalloc.mir
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-sched.mir
Log Message:
-----------
[AMDGPU] Add per-class register stress options (#210907)
Add options -amdgpu-stress-vgpr=N, -amdgpu-stress-agpr=N, and
-amdgpu-stress-sgpr=N to limit each register class independently by
reserving registers beyond N.
Commit: 3ca666f496681600f5528f4346c0303dd1171230
https://github.com/llvm/llvm-project/commit/3ca666f496681600f5528f4346c0303dd1171230
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/test/CodeGen/SystemZ/memmove-01.ll
Log Message:
-----------
[SystemZ] Improve handling of memmoves. (#196285)
Handle memmoves of constant lengths up to 256 bytes with target
instructions instead of libcall.
Commit: aa50eb69d6eba1bcdfe6d3a15f0b9b8e278e828b
https://github.com/llvm/llvm-project/commit/aa50eb69d6eba1bcdfe6d3a15f0b9b8e278e828b
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/DebugInfo/Generic/debug-info-qualifiers.ll
M llvm/test/DebugInfo/Generic/dwarf5-debug-info-static-member.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/incorrect-variable-debugloc.ll
M llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
M llvm/test/DebugInfo/Generic/namespace.ll
M llvm/test/DebugInfo/Generic/varargs.ll
M llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/X86/align_cpp11.ll
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/string-offsets-multiple-cus.ll
M llvm/test/DebugInfo/X86/string-offsets-table.ll
Log Message:
-----------
[DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (#211536)
RFC
https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544
This patch proposes to move the emission of types and type-like entities
from `DwarfDebug::beginModule()` to `DwarfDebug::endModule()`.
Effectively, this changes nothing but the order of debug entities in the
resulting DWARF.
This is needed to simplify DWARF emission in a context of proper support
of function-local types, making all the types handled in a single place,
together with other global and local entities.
This change has already been reviewed and approved in
https://reviews.llvm.org/D144008, but I’m opening a new PR for
visibility.
Co-authored-by: Kristina Bessonova <kbessonova at accesssoftek.com>
Commit: 0695ea8d442c3271634892a7bec78b3b3a4368b9
https://github.com/llvm/llvm-project/commit/0695ea8d442c3271634892a7bec78b3b3a4368b9
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/TableGen/TGLexer.cpp
A llvm/test/TableGen/eof-after-endif.td
Log Message:
-----------
[TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (#208961)
Part of #151476
prepSkipRegion currently scans a line until it finds a newline before
advancing to the next line. It crashes if it finds an EOF first. This
change checks for EOF to prevent a segmentation fault.
Commit: 6bb73fd3e418d1bade9050776ddb6a8f84a8bfb3
https://github.com/llvm/llvm-project/commit/6bb73fd3e418d1bade9050776ddb6a8f84a8bfb3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/StringExtras.h
Log Message:
-----------
[orc-rt] Fix maybe_unused attribute. (#212237)
Commit: 98d41d2f75395ab1f91198f2493cff62a33b80c1
https://github.com/llvm/llvm-project/commit/98d41d2f75395ab1f91198f2493cff62a33b80c1
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/include/lldb/Utility/Environment.h
M lldb/source/Plugins/Platform/Windows/CMakeLists.txt
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.h
A lldb/source/Plugins/Platform/Windows/PlatformWindowsProperties.td
A lldb/test/API/windows/debug-heap/Makefile
A lldb/test/API/windows/debug-heap/TestWindowsDebugHeap.py
A lldb/test/API/windows/debug-heap/main.c
Log Message:
-----------
[lldb][Windows] Disable debug heap by default (#212126)
This disables Windows' default debug heap when launching a process.
The motivation is similar to what Microsoft wrote on their [blog post
for Visual Studio
2015](https://devblogs.microsoft.com/cppblog/c-debugging-improvements-in-visual-studio-14/)
where they disabled it: The debug heap comes with a performance cost and
the [C runtime already does some heap
checking](https://learn.microsoft.com/en-us/cpp/c-runtime-library/crt-debug-heap-details?view=msvc-170).
Towards #201690. Notably, lldb-dap won't set this when launching in a
terminal. I think we'd want an option similar to `disableASLR` for
lldb-dap.
Commit: 456e73ff83e0ea352509d9fb687660bd3c2eb390
https://github.com/llvm/llvm-project/commit/456e73ff83e0ea352509d9fb687660bd3c2eb390
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-umin.ll
Log Message:
-----------
[SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (#212008)
In the test `switch_remove_dead_cases`, both case 4 and case 5 jump into
bb `%case_ret`. Thus, the edge will be removed twice, triggering an
assertion failure. This patch only removes the edge in DT when we remove
the last edge to `DeadCaseBB`.
Commit: e2b23dbda6551c81377ae712749c58c27eefb857
https://github.com/llvm/llvm-project/commit/e2b23dbda6551c81377ae712749c58c27eefb857
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/AArch64/clmul.ll
Log Message:
-----------
[AArch64] Test all cost kinds in clmul tests. NFC (#212246)
Commit: b10d4473a01e77ef0c973d29610ebc81c5a20c1a
https://github.com/llvm/llvm-project/commit/b10d4473a01e77ef0c973d29610ebc81c5a20c1a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/opencl/vload_halfn.ll
Log Message:
-----------
[SPIR-V] Fix vloada_halfn builtin number (#212218)
vloada_halfn was incorrectly mapped to vload_half builtin number (174)
instead of its own (179), causing it to demangle to the wrong OpenCL
builtin
Commit: c18296f5db60be977366a42f044a623b557f5dd2
https://github.com/llvm/llvm-project/commit/c18296f5db60be977366a42f044a623b557f5dd2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
Log Message:
-----------
DAG: Canonicalize undef shuffle operands and results to poison (#212102)
Commit: 8c835ee87def288eca2587293499008dce54c4e7
https://github.com/llvm/llvm-project/commit/8c835ee87def288eca2587293499008dce54c4e7
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
Log Message:
-----------
[VectorCombine] Align shrinkLoadForShuffles to register boundaries (#209775)
Round up the shrunk load element count to the next full vector register
boundary to avoid scalar remainders that prevent shuffle lowering.
For example, on X86 AVX-512 a <16 x double> load with shuffle indices
1-8 was shrunk to <9 x double>. This legalizes to v8f64 + scalar f64,
and the scalar operand in BUILD_VECTOR prevents DAGCombiner from folding
it into a VECTOR_SHUFFLE, producing ~15 instructions instead of 2
(VMOVDQA64 + VALIGNQ).
Commit: bd9e922d448ce6a492b1b323c359b7c8a4030ad9
https://github.com/llvm/llvm-project/commit/bd9e922d448ce6a492b1b323c359b7c8a4030ad9
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libc/src/string/memory_utils/aarch64/inline_memmove.h
Log Message:
-----------
[libc][AArch64] Avoid -Wshadow warnings about uint128_t etc (#212227)
`aarch64/inline_memset.h` defines type aliases `uint128_t`, `uint256_t`
and `uint512_t` at file scope. `aarch64/inline_memmove.h`, alongside it,
defines the same aliases at function scope. If both headers are included
by the same source file, this can lead to a warning about the
function-scope aliases shadowing the file-scope ones, which turns into a
compile error if you build with `clang -Werror -Wshadow`.
Commit a81db64570f94c2 (PR #210895) exposed this latent compile failure,
by making `CPP/string.h` include both files. But there's nothing wrong
with that, so the right fix is to make it _safe_ to include both files,
not to stop doing it.
This commit moves the function-scope aliases in memmove up to file
scope. That makes them duplicate definitions in the _same_ scope, which
doesn't cause the same error.
Other options would be to move the memset aliases down into function
scope (duplicating them in two functions), or to move them into a tiny
AArch64-specific header file with an include guard. Both of those are
more intrusive than this fix.
Commit: acf113c195682ec3eceafd9a0023f1e8401e71c9
https://github.com/llvm/llvm-project/commit/acf113c195682ec3eceafd9a0023f1e8401e71c9
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
Log Message:
-----------
[lldb][Windows] Preserve breakpoint locations across process exit (#212219)
`ProcessWindows::OnExitProcess` unloads the executable module with
`delete_locations=true`, which deletes the target's breakpoint locations
when the debuggee exits. Other platforms keep them, so inspecting a
breakpoint after the process died returns no location on Windows.
Pass `delete_locations=false` to match the other platforms.
Commit: 0a75f1f77fe54e9e366e48f78c9865aee8839809
https://github.com/llvm/llvm-project/commit/0a75f1f77fe54e9e366e48f78c9865aee8839809
Author: Serafean <martin at serafean.cz>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/test/Index/cxx14-lambdas.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[libclang]Visit lambda init-capture as VarDeclaration (#174116)
```
int foo(){
int i = 42;
int j = 43;
auto l1 = [x = i, &j ](){};
}
```
in the lambda capture:
- `x` is visited as VariableRef (referencing an unvisited VarDecl at the
same location)
- `i` is visited as DelcRefExpr (fair enough, same as in an assignment)
- `j` is visited as VariableRef
Visit `x` as a `VarDecl`, and stop visiting it as a `VariableRef`, as it
makes no sense (referencing itself at an unvisited cursor).
---------
Co-authored-by: Serafean <Serafean at users.noreply.github.com>
Commit: 26480c7d1678fbea8e7b1cd064775d0f48649f91
https://github.com/llvm/llvm-project/commit/26480c7d1678fbea8e7b1cd064775d0f48649f91
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
Log Message:
-----------
AMDGPU/GlobalISel: Test for cs_chain argument from G_EXTRACT_VECTOR_ELT (#212247)
This is a bug since G_EXTRACT_VECTOR_ELT will end up with a register
class on the dst operand. The combiner will crash because of it.
Commit: be2e6bc89a8a9f421bbc50c72425a2c7436c604d
https://github.com/llvm/llvm-project/commit/be2e6bc89a8a9f421bbc50c72425a2c7436c604d
Author: Romanov Vlad <Vladislav.Romanov at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
A llvm/test/CodeGen/AMDGPU/mfma-no-multiple-copies.mir
A llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
Log Message:
-----------
[AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (#209179)
When multiple VGPR-requiring uses of an MFMA dst are in the
same block as the MFMA, share a single AGPR->VGPR copy placed
before the earliest use, instead of creating one per use.
Commit: 4fbefd6025ca1a9e12683a766dbbbeadd2861136
https://github.com/llvm/llvm-project/commit/4fbefd6025ca1a9e12683a766dbbbeadd2861136
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/large-system-growth.ll
M llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
M llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll
Log Message:
-----------
[ConstraintElim] Skip decomposition if precondition does not hold. (#212140)
Currently we fully decompose expressions, collect all preconditions and
then bail out if any precondition is false. This means we miss out on
simplifications in cases where the precondition does not hold, but we could
still reason about the un-decomposed sub-expression.
This patch updates `decompose` to take the constraint system as argument
instead and eagerly check preconditions. If the precondition does not hold,
we don't decompose the sub-expression and don't further recurse, but simply
treat the sub-expression as variable.
This improves results in some cases
(https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/794)
and is also slightly cheaper (or neutral) in most cases compile-time
wise, as we cut off decomposition before recursing further. The number of queries
for preconditions overall should stay the same
PR: https://github.com/llvm/llvm-project/pull/212140
Commit: 8a3d15b952636489a14e1244fdfe871b730d67d7
https://github.com/llvm/llvm-project/commit/8a3d15b952636489a14e1244fdfe871b730d67d7
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 98d41d2 (#212244)
This fixes 98d41d2f75395ab1f91198f2493cff62a33b80c1 (#212126).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=98d41d2f75395ab1f91198f2493cff62a33b80c1
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 919919c80a834405a2908525372c754c03f47606
https://github.com/llvm/llvm-project/commit/919919c80a834405a2908525372c754c03f47606
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Platform/Windows/BUILD.gn
Log Message:
-----------
[gn] port 98d41d2f75395a (PlatformWindowsProperties.td) (#212257)
Commit: 6ca0e4a67193836fe696eb0273d523da1950cfda
https://github.com/llvm/llvm-project/commit/6ca0e4a67193836fe696eb0273d523da1950cfda
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm-invalid.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-simd-guided.mlir
M mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
Log Message:
-----------
[mlir][OpenMP] Fix update of linear iteration variables (#183800)
The final value of a linear iteration variable must be the loop
limit_value + step. Before this patch it was limit_value.
Fixes #170784.
Commit: 7e607a0931394460ab9f4994f6928553da13e472
https://github.com/llvm/llvm-project/commit/7e607a0931394460ab9f4994f6928553da13e472
Author: muhammadshayanasim1-web <muhammadshayanasim1 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-masked_load.ll
Log Message:
-----------
[InstCombine] Copy metadata in select-to-masked.load fold (#211965)
Preserve AA metadata when folding select of masked.load to masked.load.
We cannot preserve value metadata, as it may not be valid for the new
passthru.
Fixes #209022.
Assisted-by: Claude
Commit: f613ead38efdc327c78d4b00f9195e84092c2d57
https://github.com/llvm/llvm-project/commit/f613ead38efdc327c78d4b00f9195e84092c2d57
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix cs_chain use of constrainOperandRegClass (#212248)
Make a copy before constraining to avoid setting register class on
a register that can be defined by generic opcode.
Commit: 491f16472b0f08ed72481b671c1470c6de953fa0
https://github.com/llvm/llvm-project/commit/491f16472b0f08ed72481b671c1470c6de953fa0
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/lib/Lower/ConvertExprToHLFIR.cpp
A flang/test/Lower/HLFIR/elemental-array-constant-shape.f90
M flang/test/Lower/HLFIR/matmul.f90
Log Message:
-----------
[flang][hlfir] Prefer a constant-shape operand for elemental array results (#209791)
Elemental operands are conformable, so their extents are identical and
the result shape may be taken from either operand. This patch prefers an
operand whose shape is a compile-time constant, producing a statically
shaped result. The left operand is checked first to avoid churn in lit
test expectations.
Commit: d6b8c83138892bd64d33e44102e0aed6cfe3556f
https://github.com/llvm/llvm-project/commit/d6b8c83138892bd64d33e44102e0aed6cfe3556f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Change return type of ConstraintTy::empty to bool (NFC) (#212259)
empty() returns a bool, fix return type as pointed out in
https://github.com/llvm/llvm-project/pull/212140.
Commit: 750ed0a8239147a5ce81eb31d54591c2b01b8e8f
https://github.com/llvm/llvm-project/commit/750ed0a8239147a5ce81eb31d54591c2b01b8e8f
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
A flang/test/Driver/openmp-target-fast-flag.f90
Log Message:
-----------
[Flang][OpenMP] Add support for -fopenmp-target-fast (#212181)
The `-fopenmp-target-fast` is a meta flag that enables several
optimizations for device code.
Commit: 07dfc602db220f015fab975248d3376a5ffe03f7
https://github.com/llvm/llvm-project/commit/07dfc602db220f015fab975248d3376a5ffe03f7
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/metadirective-v50.f90
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[flang][OpenMP] Split DEFAULT into DEFAULT(dsa) and DEFAULT(variant) (#212128)
The 5.0 and 5.1 specs used DEFAULT clause for what is now OTHERWISE.
Separate these two claues to be able to specify their properties
independently.
Commit: a0710105925b8455f38fd861712279d04f656d4c
https://github.com/llvm/llvm-project/commit/a0710105925b8455f38fd861712279d04f656d4c
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
A llvm/test/Analysis/HashRecognize/def-use-chains-visited.ll
R llvm/test/Analysis/HashRecognize/dig-recurrence.ll
Log Message:
-----------
[HashRecognize] Fix two more compiler hangs on dense use-def chains (#211887)
The bug in `digRecurrence` fixed by #211711 applies to
`isConditionalOnXorOfPHIs` and `containsUnreachable` as well. Implement
a fix for both using the same approach.
- `isConditionalOnXorOfPHIs` hang: https://godbolt.org/z/jo8eMvoeY
- `containsUnreachable` hang: https://godbolt.org/z/Eeo89W6qW
Assisted-by: Claude Opus 5
Commit: 3d20ba7135d93de7a6cd7db5a196c41d25e391a7
https://github.com/llvm/llvm-project/commit/3d20ba7135d93de7a6cd7db5a196c41d25e391a7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++][NFC] Use [[deprecated]] for __grow_by (#209126)
`__grow_by` is an internal function, and we deprecated it to avoid
accidental use of it inside the library. `_LIBCPP_DEPRECATED_` is meant
for user-configuration, which doesn't apply here.
Fixes #124940
Commit: 92cdb9dc836e24705c46b77ebabf4f3596a56998
https://github.com/llvm/llvm-project/commit/92cdb9dc836e24705c46b77ebabf4f3596a56998
Author: Gang Chen <gangc at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenHIP/builtins-amdgcn-prefetch.hip
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
[AMDGPU] Add amdgcn builtin for s_prefetch_inst (#211642)
Commit: 39d3b9344f4796e963d8d73bfd1e7cd3014d1fe6
https://github.com/llvm/llvm-project/commit/39d3b9344f4796e963d8d73bfd1e7cd3014d1fe6
Author: Alex Strelnikov <strel at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/time.yaml
M libc/src/time/CMakeLists.txt
A libc/src/time/strptime.cpp
A libc/src/time/strptime.h
M libc/test/src/time/CMakeLists.txt
A libc/test/src/time/strptime_test.cpp
Log Message:
-----------
[libc] Add stub implementation for strptime. (#211088)
This PR adds a stub for `strptime` under
`LLVM_LIBC_ENABLE_EXPERIMENTAL_ENTRYPOINTS` for x86_64 and aarch64 as a
first step in implementing the function.
Commit: 6baa9c9ac22c60e00471c6412387b5a48aa12e3e
https://github.com/llvm/llvm-project/commit/6baa9c9ac22c60e00471c6412387b5a48aa12e3e
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
Log Message:
-----------
[lldb][Mach-O] Fix null __LINKEDIT deref in ParseSymtab for shared cache images (#207448)
`ObjectFileMachO::ParseSymtab`, when handling a local shared cache image
(`MH_DYLIB_IN_CACHE` set and not read from memory), unconditionally
called
`linkedit_section_sp->GetFileOffset()` to slide the load command
offsets.
If the Mach-O has no `__LINKEDIT` segment, `FindSectionByName` returns a
`null` SectionSP, and this is a member call on a null pointer (caught by
UBSan;
crashes in release builds).
```
* thread #1, queue = 'com.apple.main-thread', stop reason =
EXC_BAD_ACCESS (code=1, address=0x68)
* frame #0: 0x0000000100121ff0 ObjectFileMachOTests`lldb_private::Section::GetFileOffset(this=0x0000000000000000) const at Section.h:181:49 [opt] [inlined]
frame #1: 0x0000000100121ff0 ObjectFileMachOTests`ObjectFileMachO::ParseSymtab(this=0x00000001055616b0, symtab=
0x000000016fdfe988) at ObjectFileMachO.cpp:2353:59 [opt]
```
Guard the shared-cache slide branch with a null check on
`linkedit_section_sp`, matching the existing guard used on the in-memory
path.
Found by lldb-target-fuzzer.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: e4c07b9c57952cd099d72985044f70e0e6f02756
https://github.com/llvm/llvm-project/commit/e4c07b9c57952cd099d72985044f70e0e6f02756
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
Log Message:
-----------
[AArch64] Rename SVEShuffleOpts to AArch64SVEShuffleOpts
To be more consistent with other AArch64 passes and other CodeGen passes
in general which are almost always prefixed with the name of the target
(and ideally will be once we finish the NewPM transition).
Reviewers: davemgreen, huntergr-arm, paulwalker-arm
Pull Request: https://github.com/llvm/llvm-project/pull/211876
Commit: dd32eae8187d88b902a5a3b988f39d06d86cd797
https://github.com/llvm/llvm-project/commit/dd32eae8187d88b902a5a3b988f39d06d86cd797
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/AssignGUID.h
Log Message:
-----------
[ThinLTO] Mark AssignGUIDPass as RequiredPassInfoMixin
PassInfoMixin is going away, so switch to RequiredPassInfoMixin and
remove the explicit isRequired implementation.
Reviewers: mtrofin, orodley
Pull Request: https://github.com/llvm/llvm-project/pull/211987
Commit: c44443f22b6f4f345e20cf947d26e873036923bf
https://github.com/llvm/llvm-project/commit/c44443f22b6f4f345e20cf947d26e873036923bf
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/AArch64SME.md
M llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUAsyncOperations.md
M llvm/docs/AMDGPUDMAOperations.md
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUExecutionSynchronization.md
M llvm/docs/AMDGPUInstructionNotation.rst
M llvm/docs/AMDGPUInstructionSyntax.rst
M llvm/docs/AMDGPUMemoryModel.md
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUOperandSyntax.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AddingConstrainedIntrinsics.md
M llvm/docs/AdvancedBuilds.md
M llvm/docs/AliasAnalysis.md
M llvm/docs/Atomics.md
M llvm/docs/BigEndianNEON.md
M llvm/docs/BitCodeFormat.md
M llvm/docs/BlockFrequencyTerminology.rst
M llvm/docs/BranchWeightMetadata.rst
M llvm/docs/BugLifeCycle.rst
M llvm/docs/BuildingADistribution.md
M llvm/docs/CFIVerify.md
M llvm/docs/CMake.md
M llvm/docs/CMakePrimer.rst
M llvm/docs/CodeGenerator.md
M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/docs/CommandGuide/llvm-pdbutil.rst
M llvm/docs/CommandLine.md
M llvm/docs/CompileCudaWithLLVM.md
M llvm/docs/CompilerWriterInfo.md
M llvm/docs/Contributing.md
M llvm/docs/ConvergenceAndUniformity.rst
M llvm/docs/ConvergentOperations.rst
M llvm/docs/Coroutines.md
M llvm/docs/CoverageMappingFormat.md
M llvm/docs/CycleTerminology.md
M llvm/docs/DTLTO.md
M llvm/docs/DependenceGraphs/index.rst
M llvm/docs/DeveloperPolicy.md
M llvm/docs/DirectX/DXContainer.rst
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/docs/DirectX/DXILOpTableGenDesign.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/ExceptionHandling.md
M llvm/docs/Extensions.md
M llvm/docs/FAQ.md
M llvm/docs/FatLTO.rst
M llvm/docs/FaultMaps.rst
M llvm/docs/Frontend/PerformanceTips.md
M llvm/docs/FuzzingLLVM.rst
M llvm/docs/GarbageCollection.md
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingInvolved.md
M llvm/docs/GettingStarted.md
M llvm/docs/GettingStartedVS.md
M llvm/docs/GitHub.md
M llvm/docs/GlobalISel/GMIR.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/GlobalISel/IRTranslator.rst
M llvm/docs/GlobalISel/MIRPatterns.rst
M llvm/docs/GlobalISel/index.rst
M llvm/docs/GwpAsan.rst
M llvm/docs/HowToReleaseLLVM.rst
M llvm/docs/HowToSetUpLLVMStyleRTTI.rst
M llvm/docs/HowToUpdateDebugInfo.md
M llvm/docs/HowToUseAttributes.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/InstCombineContributorGuide.md
M llvm/docs/InstrProfileFormat.md
M llvm/docs/Instrumentor.md
M llvm/docs/JITLink.md
M llvm/docs/KernelInfo.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.md
M llvm/docs/LibFuzzer.md
M llvm/docs/LinkTimeOptimization.md
M llvm/docs/LoopTerminology.md
M llvm/docs/MIRLangRef.md
M llvm/docs/MLGO.rst
M llvm/docs/MarkedUpDisassembly.rst
M llvm/docs/MemProf.md
M llvm/docs/MemTagSanitizer.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/MemorySSA.md
M llvm/docs/MergeFunctions.md
M llvm/docs/MisExpect.rst
M llvm/docs/MyFirstTypoFix.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/NewPassManager.md
M llvm/docs/ORCv2.md
M llvm/docs/OptBisect.rst
M llvm/docs/PCSectionsMetadata.rst
M llvm/docs/PDB/CodeViewSymbols.rst
M llvm/docs/PDB/CodeViewTypes.rst
M llvm/docs/PDB/DbiStream.rst
M llvm/docs/PDB/HashTable.rst
M llvm/docs/PDB/ModiStream.rst
M llvm/docs/PDB/MsfFile.rst
M llvm/docs/PDB/PdbStream.rst
M llvm/docs/PDB/TpiStream.rst
M llvm/docs/PDB/index.rst
M llvm/docs/Passes.md
M llvm/docs/ProgrammersManual.md
M llvm/docs/ProjectGovernance.md
M llvm/docs/Projects.rst
M llvm/docs/Proposals/GitHubMove.rst
M llvm/docs/Proposals/TestSuite.rst
M llvm/docs/Proposals/VariableNames.rst
M llvm/docs/Proposals/VectorPredication.rst
M llvm/docs/RFCProcess.md
M llvm/docs/RISCV/RISCVVCIX.rst
M llvm/docs/RISCV/RISCVVectorExtension.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/Reference.md
M llvm/docs/ReleaseNotes.md
M llvm/docs/ReleaseProcess.rst
M llvm/docs/Remarks.md
M llvm/docs/SPIRVUsage.md
M llvm/docs/SandboxVectorizer.md
M llvm/docs/ScudoHardenedAllocator.rst
M llvm/docs/SegmentedStacks.rst
M llvm/docs/SourceLevelDebugging.md
M llvm/docs/SphinxQuickstartTemplate.md
M llvm/docs/StackMaps.rst
M llvm/docs/Statepoints.rst
M llvm/docs/SymbolizerMarkupFormat.rst
M llvm/docs/TableGen/BackEnds.rst
M llvm/docs/TableGen/BackGuide.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/docs/TableGen/index.md
M llvm/docs/Telemetry.rst
M llvm/docs/TestingGuide.md
M llvm/docs/TransformMetadata.rst
M llvm/docs/UndefinedBehavior.rst
M llvm/docs/UserGuides.md
M llvm/docs/VectorizationPlan.rst
M llvm/docs/Vectorizers.md
M llvm/docs/WritingAnLLVMBackend.md
M llvm/docs/WritingAnLLVMNewPMPass.md
M llvm/docs/WritingAnLLVMPass.md
M llvm/docs/XRay.rst
M llvm/docs/XRayExample.rst
M llvm/docs/XRayFDRFormat.rst
M llvm/docs/YamlIO.rst
A llvm/docs/_static/LLVMWyvernSmall.png
A llvm/docs/_static/copybutton.css
A llvm/docs/_static/copybutton.js
A llvm/docs/_static/custom.css
M llvm/docs/conf.py
M llvm/docs/tutorial/BuildingAJIT1.rst
M llvm/docs/tutorial/BuildingAJIT2.rst
M llvm/docs/tutorial/BuildingAJIT3.rst
M llvm/docs/tutorial/BuildingAJIT4.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl01.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl02.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl03.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl05.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl06.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl09.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl10.rst
Log Message:
-----------
[Docs] Reland Furo theme for LLVM docs (#211993)
Relands https://github.com/llvm/llvm-project/pull/184440 which was
reverted in https://github.com/llvm/llvm-project/pull/208619 because of
doc generation slowness.
The main root cause (https://github.com/llvm/llvm-project/issues/208786)
has been addressed, so attempting a reland at this point.
As before, Furo output at
https://nigham.github.io/llvm_docs_furo/LangRef.html
Comparing the generation times for "Build LLVM docs" step, this PR took
< 3m vs > 15m for the previous reverted PR.
Commit: 7f46263d2b6c01ee41ba7973b0c6c825f77cc8e2
https://github.com/llvm/llvm-project/commit/7f46263d2b6c01ee41ba7973b0c6c825f77cc8e2
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[NFC][ELF] Use hasPhdrsCommands() wrapper instead of direct access (#212273)
This is the only place outside of LinkerScript/ScriptParser that
directly accesses the phdrsCommands member, introduced in 5a58e98c2018
("[ELF] Align the end of PT_GNU_RELRO associated PT_LOAD to a
common-page-size boundary (#66042)").
Commit: cbf48349e3e1cc0fe7944090cc825532d75b6c3e
https://github.com/llvm/llvm-project/commit/cbf48349e3e1cc0fe7944090cc825532d75b6c3e
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
Log Message:
-----------
[NFC][ELF][PPC64] Pass address not offset to writePPC64LoadAndBranch (#212275)
Every caller currently subtracts the TOC base in its argument, so move
that into common code inside writePPC64LoadAndBranch. This will also
allow a different computation to be used in some cases in a future
commit.
Note that offset is now unsigned not signed; even previously, all
arguments were uint64_t, and all uses are unsigned, so making it signed
doesn't make much sense.
Commit: 0d70ca384090b709eb651fe4ea43398d591e4711
https://github.com/llvm/llvm-project/commit/0d70ca384090b709eb651fe4ea43398d591e4711
Author: Sadaf Ebrahimi <sadafebrahimi at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
Log Message:
-----------
[scudo] Add unmap and eviction stats to Secondary
Track and print stats on the number of memory unmaps and cache evictions
in the MapAllocator. These statistics track total unmaps, as well as
unmaps triggered by exceeding the maximum cache entry size or the
maximum number of entries in the cache.
Commit: 30603f527e689520ab6b3166c8c8168bcee6202c
https://github.com/llvm/llvm-project/commit/30603f527e689520ab6b3166c8c8168bcee6202c
Author: jinge90 <ge.jin at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
Update image sha256 for libc fullbuild tests (#212168)
Commit: 2af577aab9be88a2669f1b31a354c57e3509b45e
https://github.com/llvm/llvm-project/commit/2af577aab9be88a2669f1b31a354c57e3509b45e
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
Log Message:
-----------
[lldb][DIL] Fix size check when assigning a signed value with DIL (#207404)
The DIL assignment path (`frame variable 'lhs = rhs'`) routes through
`ValueObject::SetValueFromInteger`, which verifies that the new value
fits
in the destination type before writing it. That size check compared the
source `APInt`'s raw 64-bit word, treated as an unsigned value, against
the
destination type's unsigned maximum:
```
uint64_t u_max = (1 << (byte_size * CHAR_BIT)) - 1;
if (*(value.getRawData()) > u_max)
return llvm::createStringError("Illegal argument: new value is too big");
```
This is wrong in both directions:
* Small negative values that fit are rejected. A literal such as `-2`
has a
32-bit `APInt` of `0xFFFFFFFE`, whose raw word is `0xFFFFFFFFFFFFFFFE`.
Compared as unsigned against a short's `0xFFFF` it looks "too big", so
```
(lldb) frame variable 's = -2'
error: Illegal argument: new value is too big
```
even though -2 fits a `short`.
* Positive values that overflow the signed range are accepted and
silently
wrap and stored a value that displayed as `-32768`.
```
(lldb) frame variable 's = 32768'
(short) s = -32768
```
Check the number of significant bits with respect to the destination's
signedness instead: `getSignificantBits()` for a signed destination and
`getActiveBits()` for an unsigned one. This accepts the valid range
(`[-32768, 32767]` for a signed short) and rejects everything outside
it.
Also extend the value before building the `DataExtractor` used to write
it.
The extractor reads exactly `byte_size` bytes from the `APInt`'s raw
storage,
so a value narrower than the destination must be extended to cover the
full
read. Use a sign extension so negative values keep their value in the
wider
destination.
Extends the DIL assignment API test (`TestFrameVarDILAssign`) to cover
assigning negative and boundary values to the existing `short` variable:
`-2`, `-4` (from `int j`), and the `[-32768, 32767]` boundaries are
accepted,
while `32768` and `-32769` are rejected. Without the fix these
narrow-type
assignments either fail with "new value is too big" or silently wrap.
Commit: ce8a458b1bb954af613972ac5f914ac41b6710f1
https://github.com/llvm/llvm-project/commit/ce8a458b1bb954af613972ac5f914ac41b6710f1
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
Log Message:
-----------
[AMDGPU][True16] Apply v2s copies to non-def operand 0 (#212261)
`legalizeOperandsVALUt16` iterates over all operands except for the
zeroth one, as the zeroth one is typically a definition. However, if the
zeroth operand is an input (e.g., for a `V_CMP`), then this causes the
compiler to generate illegal machine code.
This patch extends `legalizeOperandsVALUt16` to apply also to the zeroth
operand, guarding for when this operand is a definition.
Commit: 3d822156e54ddff4ba60d7d338df910c12b90a8f
https://github.com/llvm/llvm-project/commit/3d822156e54ddff4ba60d7d338df910c12b90a8f
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Fix compiler crash on missing latch compare instruction (#211895)
It is never checked whether a candidate loop `L` is latched by a compare
instruction, yet `L.getLatchCmpInst()` is added to the `Roots` for
`containsUnreachable`. If a loop is predicated on anything other than a
compare instruction, `getLatchCmpInst()` returns `nullptr`, causing
`containsUnreachable` to crash when calling `isa<PHINode>`. To fix,
consider loops where `L.getLatchCmpInst()` is null to be not in
canonical form, and reject them.
- Crash: https://godbolt.org/z/Tboo4jo5Y
Assisted-by: Claude Opus 5
Commit: 3031d2d67f2c428013fe0f1885eca56038ff9853
https://github.com/llvm/llvm-project/commit/3031d2d67f2c428013fe0f1885eca56038ff9853
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/docs/resources/addingtargetsupport.md
Log Message:
-----------
[lldb][docs] Add hardware feature considerations to target doc (#211213)
As requested on #207166, this change adds information about hardware
features that can help or hinder porting LLDB.
I decided not to add an explicit "help" or "hinder" tag to them because
the descriptions are pretty general and I'd rather people took them as
starting points to think for themselves.
Debugging is a pile of things working together, so it's hard to say that
lack of one thing is "bad" without seeing it in context. Hopefully by
thinking about all these items for their target, developers will be able
to do that.
Commit: 3d2d8a9905f31f45721d3f15a0d0042675d74ec5
https://github.com/llvm/llvm-project/commit/3d2d8a9905f31f45721d3f15a0d0042675d74ec5
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/unittests/Tooling/HeaderIncludesTest.cpp
Log Message:
-----------
[clang][Tooling] Fix main header matching for headers with special characters. (#211934)
In Clang Tooling, escape HeaderStem before constructing MainIncludeRegex
to prevent special characters (such as '+') from being interpreted as
regex operators. Useful for Objective-C where "Foo+Bar.h" headers are
very common for categories.
Commit: bece576b2b682582e85c14bb1a9ea0ba7110ba80
https://github.com/llvm/llvm-project/commit/bece576b2b682582e85c14bb1a9ea0ba7110ba80
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerCommentStringPass.h
Log Message:
-----------
[PowerPC][AIX] Mark LowerCommentStringPass as RequiredPassInfoMixin
Directly using isRequired is deprecated and PassInfoMixin will soon be
moved to a detail namespace.
Reviewers: tonykuttai, w2yehia, hubert-reinterpretcast
Pull Request: https://github.com/llvm/llvm-project/pull/212018
Commit: ebd9c2c3b131f37d4cd12caf32d6b31b6852b148
https://github.com/llvm/llvm-project/commit/ebd9c2c3b131f37d4cd12caf32d6b31b6852b148
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
Log Message:
-----------
Add Objective-C support to include-cleaner's AST walker. (#211119)
Extend WalkAST to recognize and report references in Objective-C
constructs, including interfaces, protocols, message expressions,
properties, categories, compatible aliases, and instance variables. Also
update the test helper to support custom compiler arguments and add
corresponding unit tests.
Commit: d2e3e96dedbedca0bfc39fc94f64e04cfa4ec74e
https://github.com/llvm/llvm-project/commit/d2e3e96dedbedca0bfc39fc94f64e04cfa4ec74e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/sorting/permutation.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::next_permutation and std::prev_permutation (#210966)
Commit: c060161b318f5162556d22d801a6ae704841c983
https://github.com/llvm/llvm-project/commit/c060161b318f5162556d22d801a6ae704841c983
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
R libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/min_max_element.bench.cpp
R libcxx/test/benchmarks/algorithms/minmax.bench.cpp
A libcxx/test/benchmarks/algorithms/ranges_min_max.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::min_element, std::max_element and std::ranges::max (#209590)
Extend missing coverage and increase consistency across how the
benchmarks are written.
Commit: a3b6e0baca37a717b3c498c21514256df4c29ef2
https://github.com/llvm/llvm-project/commit/a3b6e0baca37a717b3c498c21514256df4c29ef2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/sorting/nth_element.bench.cpp
Log Message:
-----------
[libc++] Add benchmark for std::nth_element (#210112)
Commit: 20f06e490149867d2a261cbcca41fa176bdc87b1
https://github.com/llvm/llvm-project/commit/20f06e490149867d2a261cbcca41fa176bdc87b1
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
[IR][NFC] Remove DbgInstPtr PointerUnion (#212233)
DbgInstPtr was needed in the transitionary phase between intrinsics and
records, but can be removed now.
Commit: 26bf39cdba0bfcd0ea781f95cf44519922a8eb56
https://github.com/llvm/llvm-project/commit/26bf39cdba0bfcd0ea781f95cf44519922a8eb56
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
M lld/test/ELF/ppc64-ifunc.s
Log Message:
-----------
[ELF][PowerPC] Don't assume TOC pointer is valid in IPLT entries (#207555)
Unlike normal PLT entries, IPLT entries can be called indirectly even
when in PIEs/DSOs, and so there's no guarantee on what's in the TOC
pointer register at that time. Therefore we must emit variants of the
existing code that work without it, whether r12-relative (playing the
same role as MIPS's $25) in the same number of instructions, or first
retrieving PC in an i386-like manner, being careful not to clobber LR.
On 32-bit PowerPC even direct calls to IPLT entries face the same issue,
since we'd use the TOC base of the resolver, which may not be the same
as the caller, even within the same object.
Normal canonical PLTs still look broken on 64-bit PowerPC as they use
the TOC pointer register too, and similarly on 32-bit PowerPC for PIEs.
We should probably treat these cases the same as PIE on i386 (except
including PDEs for 64-bit PowerPC), where it's an error due to the use
of %ebx in PLT entries.
Commit: 0733641570c25e6323e39c4ee66693a4668429a8
https://github.com/llvm/llvm-project/commit/0733641570c25e6323e39c4ee66693a4668429a8
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
Log Message:
-----------
[libc++][test] re-enable clear padding runtime test (#211258)
Commit: de793e832cc5cddf9d8554ec07f42e1298908f72
https://github.com/llvm/llvm-project/commit/de793e832cc5cddf9d8554ec07f42e1298908f72
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/spillv16.ll
Log Message:
-----------
[AMDGPU][True16] Retain `hi16` subregisters through v2s copies (#211848)
The current legalisation for SGPR/VGPR copies with mismatched sizes does
not check which VGPR subregister is used, and defaults to using `lo16`.
If the `hi16` subregister is used instead, this information is lost, and
the subregister is incorrectly replaced with `lo16`.
This patch retains the subregister used when legalising the copy.
Commit: ec96f85d6d82c5e71b36f9c827f09bb3b4825390
https://github.com/llvm/llvm-project/commit/ec96f85d6d82c5e71b36f9c827f09bb3b4825390
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/Target/AArch64/AArch64Processors.td
A llvm/test/TableGen/ProcessorAlias.td
A llvm/test/TableGen/ProcessorAliasErrors.td
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
TableGen: Add first class support for processor aliases (#211775)
Previously isCPUStringValid was virtual so TableGen could emit an
AArch64 specific hack for recognizing cpu aliases. Teach tablegen
about aliases, and insert each alias into the CPU subtype table as its
own entry (sorted by name, carrying the canonical processor's features
and scheduling model).
There is further opportunity for code sharing improvements. AArch64's
aliases are consumed by ARMTargetDefEmitter to emit a custom inc file
in TargetParser which should be universalized.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 58a6567a166e0cb44227d162914778176a4faf62
https://github.com/llvm/llvm-project/commit/58a6567a166e0cb44227d162914778176a4faf62
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNProcessors.td
Log Message:
-----------
AMDGPU: Use ProcessorAlias for legacy arch names (#211776)
Older targets have aliasing names which were previously implemented
by defining a second copy of the processor, identical except for the
name Use the recently improved tablegen mechanism for defining name-only
aliases. This dedupliates some redundant table entries, like the sched model.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d53cb74cbbc24fc5deba87b94ec38a7636bb52a9
https://github.com/llvm/llvm-project/commit/d53cb74cbbc24fc5deba87b94ec38a7636bb52a9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
Log Message:
-----------
X86: Use ProcessorAlias for duplicated processor names (#211953)
Many X86 processors were defined multiple times under different names,
emitting an identical ProcessorModel for each spelling and duplicating
the feature masks, tune features, and scheduling model index in the
subtype table.
Define each processor once under its canonical name and express the
alternate spellings with ProcessorAlias, using the tablegen alias
mechanism. This deduplicates the redundant subtype table entries and
saves about 4.6k with the new alias table (#211952)
Co-Authored-By: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 7baccda8dde277b16cb87318536b3ca70d448db1
https://github.com/llvm/llvm-project/commit/7baccda8dde277b16cb87318536b3ca70d448db1
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
M llvm/test/CodeGen/AMDGPU/si-late-branch-lowering-preserve-loop-info.mir
M llvm/test/CodeGen/AMDGPU/si-pre-emit-peephole-preserve-loop-info.mir
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
M llvm/test/Transforms/SCCP/preserve-analysis.ll
Log Message:
-----------
[LoopInfo] Build dominator tree only for irreducible CFG (#212098)
analyze() requires a dominator tree, so LoopAnalysis and
MachineLoopAnalysis request one for every function, though only an
irreducible CFG queries it. Clients that build their own, from
InlineCost to XRayInstrumentation, need it for nothing else.
Take the function and a callback returning the tree instead, and call it
when an edge re-enters a loop. Add an analyze(F) overload for a client
that holds no tree.
The number of dominator tree builds does not change in an -O2 pipeline
building sqlite3.bc, where SROA and InstCombine cache one before
LoopAnalysis runs.
Tests that observed the tree through LoopAnalysis now require it
explicitly.
MachineLoopInfoWrapperPass keeps requiring one: the legacy pass manager
cannot provide it on demand.
Aided by Claude Opus 5
Commit: 3c6d9cdb08c9245bb4d80e3262f74ea372046bcb
https://github.com/llvm/llvm-project/commit/3c6d9cdb08c9245bb4d80e3262f74ea372046bcb
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Add missing action to checkout (#211720)
The upload-release-artifact action uses the require-team-membership
action so we need to make sure that latter is checkout out when calling
upload-release-artifact.
Commit: 07aa3b710f2622f662cab7a53ddf1288c725a9be
https://github.com/llvm/llvm-project/commit/07aa3b710f2622f662cab7a53ddf1288c725a9be
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/buildvector-used-by-insertvalue.ll
Log Message:
-----------
[SLP] Only consider BuildVector inserts into the same object. (#212269)
When following insertelement instruction for a BuildVector sequence, we
may discover a user that inserts into a different vector.
Bail out when that happens instead of crashing.
PR: https://github.com/llvm/llvm-project/pull/212269
Commit: e59df8e339bc5bc07991e0a67d3d0cb8c25a94c2
https://github.com/llvm/llvm-project/commit/e59df8e339bc5bc07991e0a67d3d0cb8c25a94c2
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array-skip-element-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugTypeArray. (#211537)
This PR adds `DebugTypeArray` to `SPIRVNonSemanticDebugHandler`:
1. `partitionTypes` buckets `DICompositeType` nodes tagged
`DW_TAG_array_type` without `DINode::FlagVector` (vectors are emitted
separately).
2. `emitNonSemanticGlobalDebugInfo` emits one `DebugTypeArray` per node
after the pointer types and records the id in `DebugTypeRegs`.
3. `emitDebugTypeArray` appends one `OpConstant` component count per
`DISubrange`, in subrange order. A subrange with no constant count emits
0, matching `OpTypeRuntimeArray`. An array whose element type is not in
`DebugTypeRegs` is skipped.
Clang lowers a matrix to a `DW_TAG_array_type` with two subranges in
`CGDebugInfo::CreateType(const ConstantMatrixType *)`, so an HLSL
`float4x4` emits as a `DebugTypeArray` with two counts.
`DebugTypeMatrix` needs a distinguishing flag from the frontend.
Added a couple of tests in `llvm/test/CodeGen/SPIRV/debug-info/`:
1. `debug-type-array.ll` covers a 1D array, a 2D array, a runtime-sized
array, and an array of vectors, and asserts that we are not emitting
`DebugTypeMatrix` (this will need to be changed when/if we start
emitting them).
2. `debug-type-array-skip-element-not-in-regs.ll` tests arrays of types
that cannot have debug info (I used array of pointers wit no DWARF
address space).
Commit: 2a323d5bb13890cc0667d5e21e43f41020f4f606
https://github.com/llvm/llvm-project/commit/2a323d5bb13890cc0667d5e21e43f41020f4f606
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/lib/ProfileData/SampleProf.cpp
Log Message:
-----------
[ProfileData] Make FunctionSamples profile-format flags atomic (#208964)
`lld/test/ELF/lto/sample-profile.ll` is failing in ThreadSanitizer
build.
In a parallel in-process ThinLTO link, each backend thread reads the
sample profile in SampleProfileLoader::doInitialization and writes these
globals.
Make the variables std::atomic<bool> so the same-value writes are
well-defined. An architectural ideal solution that holds these states in
a container seems very intrusive.
Commit: b8bd63c69c83bc13b31e808f9b7d84a562251396
https://github.com/llvm/llvm-project/commit/b8bd63c69c83bc13b31e808f9b7d84a562251396
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCEmitNYIFlang.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCInitializeFIRAnalyses.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCPipeline.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/test/Driver/openacc-nyi.f90
A flang/test/Transforms/OpenACC/acc-emit-nyi-flang.fir
Log Message:
-----------
[flang][acc] Emit NYI messages for unsupported directives (#211894)
Add an OpenACC MLIR pass that emits not-yet-implemented messages for
unsupported directives immediately after HLFIR generation. This allows
OpenACC dialect operations to be emitted with -emit-hlfir while making
full compilation fail early with clear diagnostics, instead of later
when unhandled OpenACC operations reach LLVM dialect conversion.
Commit: 41a5357e389b3c04d4c44631360dd3661488c629
https://github.com/llvm/llvm-project/commit/41a5357e389b3c04d4c44631360dd3661488c629
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaType.cpp
M clang/test/CXX/drs/cwg14xx.cpp
A clang/test/SemaCXX/qualified-function-typeof.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][Sema] Allow abstract declarators to specify cv-qualified function types as per CWG1417 (#209836)
Abstract declarator contexts (specifically `DeclaratorContext::TypeName`) now properly bypass this restricted rule, allowing cv-qualified function types in `__typeof__` while maintaining restrictions in other contexts like `typeid`, `sizeof`, C-style casts, and `new` expressions per CWG1417.
Commit: 5565740f2367093b89481ba7371adf820971977d
https://github.com/llvm/llvm-project/commit/5565740f2367093b89481ba7371adf820971977d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.h
A lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
Log Message:
-----------
[lld] Don't drop RELR relocations for late-added GOT entries (#211911)
In #208959 we started dropping RELR relocations for late-added GOT
entries when reverting x86-64 GOTPCRELX relaxations in
X86_64::relaxOnce.
There is a separate unrelaxation bug where if the object files didn't
have any relocations of a certain type, we'd prune .relr.dyn (or even
.rela.dyn). Will be addressed separately.
Assisted-by: Gemini
Commit: ad791f26ef495dbc2c3c6c283518872697210898
https://github.com/llvm/llvm-project/commit/ad791f26ef495dbc2c3c6c283518872697210898
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
Log Message:
-----------
[scudo] Test to verify fork and allocate does not deadlock. (#211975)
Commit: 751eb22c1b835b675166e4936a93f903b952f28f
https://github.com/llvm/llvm-project/commit/751eb22c1b835b675166e4936a93f903b952f28f
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
Log Message:
-----------
[AArch64][GlobalISel] Use integer type for truncating merged call args. (#212208)
Commit: 02da01251156c831a54417d4882aad7226cdbbe1
https://github.com/llvm/llvm-project/commit/02da01251156c831a54417d4882aad7226cdbbe1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/lib/CodeGen/TargetSubtargetInfo.cpp
M llvm/lib/MC/MCSubtargetInfo.cpp
M llvm/test/TableGen/ProcessorAlias.td
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
TableGen: Use a compact table for CPU aliases (#211952)
Commit: b9a7aad4a9d50b9ec60b59d197be43a973a0572c
https://github.com/llvm/llvm-project/commit/b9a7aad4a9d50b9ec60b59d197be43a973a0572c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/release-tasks.yml
Log Message:
-----------
workflows/release-tasks: Fix permissions for release-documentation (#212310)
Commit: 0600aeae3ba6c41da80bbb84c10f1cad4c9a58ba
https://github.com/llvm/llvm-project/commit/0600aeae3ba6c41da80bbb84c10f1cad4c9a58ba
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
Log Message:
-----------
[AArch64][GlobalISel] Use integer types for inline assembly lowering (#212214)
If we need to generate a trunc then we can use an integer type for the
lowering.
Commit: 7336a38e5c6dea03c243bb37b44a2207471e63d3
https://github.com/llvm/llvm-project/commit/7336a38e5c6dea03c243bb37b44a2207471e63d3
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/AST/TypeLoc.cpp
A clang/test/SemaCXX/atomic-auto.cpp
Log Message:
-----------
[clang] Add missing VisitAtomicTypeLoc to TypeLoc.cpp GetContainedAutoTypeLocVisitor (#211752)
Adds the missing `VisitAtomicTypeLoc` method to TypeLoc.cpp `GetContainedAutoTypeLocVisitor`.
Fixes: https://github.com/llvm/llvm-project/issues/211556 ICE.
Assisted-by: Codex
Commit: 68e94c904067b1b984c6b337819633aee9f0c7da
https://github.com/llvm/llvm-project/commit/68e94c904067b1b984c6b337819633aee9f0c7da
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/test/Analysis/dangling-ptr-deref.cpp
Log Message:
-----------
[analyzer] Improve dangling value tracking in DanglingPtrDeref (#211818)
Improve dangling value tracking in the `DanglingPtrDeref` checker by
adding `trackExpressionValue`. The report with this change now tracks
the dangling value and shows where the value originated from. Currently
the checker only points at the destruction and use sites which isn't
always useful for the user.
Commit: f83fcfbdc7fc1bee6ebf242b110a5c2b46703ae9
https://github.com/llvm/llvm-project/commit/f83fcfbdc7fc1bee6ebf242b110a5c2b46703ae9
Author: Florian Mayer <fmayer at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
A llvm/test/CodeGen/MIR/X86/machine-verifier-nophi.mir
Log Message:
-----------
[MachineVerifier] do not use !NoPHI to check if a MF has phi nodes (#211941)
We were violating the property expressed in MachineFunction.h:
```
The properties are stated in "positive" form; i.e. a pass could require
that the property hold, but not that it does not hold.
```
Resolves a false positive "MBB has allocatable live-in, [...]" error in
our downstream target.
Commit: 79ea87c8da20263fa54c9f60b4befb3a9bf962cf
https://github.com/llvm/llvm-project/commit/79ea87c8da20263fa54c9f60b4befb3a9bf962cf
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/tools/llubi/attribute_noundef_ub.ll
M llvm/test/tools/llubi/attributes.ll
M llvm/test/tools/llubi/bitcast_be.ll
M llvm/test/tools/llubi/bitcast_le.ll
A llvm/test/tools/llubi/bytes_poison.ll
A llvm/test/tools/llubi/bytes_undef.ll
M llvm/test/tools/llubi/freeze.ll
M llvm/test/tools/llubi/global.ll
M llvm/test/tools/llubi/load_noundef_ub_undef.ll
M llvm/test/tools/llubi/loadstore_be.ll
M llvm/test/tools/llubi/loadstore_le.ll
M llvm/tools/llubi/lib/Context.cpp
M llvm/tools/llubi/lib/Context.h
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llubi/lib/Value.cpp
M llvm/tools/llubi/lib/Value.h
Log Message:
-----------
[llubi] Add support for byte types (#200672)
This patch implements the support for byte types. The byte order depends
on the endianness for better performance in the fast path. For
non-byte-sized byte types, high bits are zeroed out.
Commit: a41a3359ec24f019a5a9576631228f0314be38a6
https://github.com/llvm/llvm-project/commit/a41a3359ec24f019a5a9576631228f0314be38a6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/CUDA/cuf02.cuf
Log Message:
-----------
[flang][cuda] Do not check dummy in stmt function in device code (#212037)
Commit: 289a2d901a480e3c0ba8aac80c40f2fcd768506f
https://github.com/llvm/llvm-project/commit/289a2d901a480e3c0ba8aac80c40f2fcd768506f
Author: Stephen Long <63318318+steplong at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
A mlir/test/Dialect/Linalg/block-pack-matmul-scalable.mlir
Log Message:
-----------
[mlir][LinalgBlockPackMatmul] Add support for scalable block factors (#211354)
Assisted by: Claude Sonnet 4.6
---------
Co-authored-by: Adam Siemieniuk <adam.siemieniuk at intel.com>
Commit: a950d4a527311fbfe202d563331f133400fd2c5e
https://github.com/llvm/llvm-project/commit/a950d4a527311fbfe202d563331f133400fd2c5e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
Log Message:
-----------
AMDGPU: Use uint8_t for IsaVersion fields (#212311)
Commit: 460dbfc7ec59a89cc80f7c03879f60278ec2a6c4
https://github.com/llvm/llvm-project/commit/460dbfc7ec59a89cc80f7c03879f60278ec2a6c4
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Use loop latch to determine step/start for conditional recurrence (#211916)
The function `matchConditionalRecurrence` iterates over both PHI inputs
and attempts to match each one to determine which is `Start` and which
is `Step`. However, some of the failure conditions in the loop `return
false`, which has the potential to classify some valid CRC loops as not
having a conditional recurrence. The loop here is not really needed at
all-- instead, use `L.getLoopLatch()` to determine `Start`/`Step`, since
the incoming value from the latch block will always be the `Step`. This
also avoids the aforementioned false negative classifications.
Assisted-by: Claude Opus 5
Commit: c2b22642d289413e136da29eaa1ce176ce438484
https://github.com/llvm/llvm-project/commit/c2b22642d289413e136da29eaa1ce176ce438484
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
Log Message:
-----------
[AArch64][MacroFusion] Add per cluster kind statistic (#212103)
So we can easily differentiate between different cluster kinds on
AArch64 backend.
Commit: bd7bb26108bd86eeeef0962577b52d0f435a7ac3
https://github.com/llvm/llvm-project/commit/bd7bb26108bd86eeeef0962577b52d0f435a7ac3
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/RecordLayout.h
M clang/lib/AST/RecordLayout.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
A clang/test/Layout/ms-arm64-aligned-base-tail-padding.cpp
Log Message:
-----------
[clang] Match MSVC ABI for over-aligned base tail padding on Arm64 (#210461)
When targeting aarch64-pc-windows-msvc, clang laid out a base following
an over-aligned, non-standard-layout base at the wrong offset. MSVC on
Arm64 reuses the over-aligned base's tail padding for the subsequent
base, but clang rounded the base up to a full slot, so the two disagreed
on member offsets, breaking interop between clang- and MSVC-built
binaries.
Fix: store each record's natural non-virtual alignment (excluding
`alignas`/`__declspec(align)` over-alignment) as
`getNonRequiredNVAlignment()`, and on Arm64 fold in a base's natural
alignment rather than its full alignment. This is gated to Arm64 only;
Arm64EC and x64 follow the x64 rule (no reuse) and are unchanged.
Validated against MSVC (Hostx64\arm64\cl.exe
/d1reportSingleClassLayout): clang now matches MSVC Arm64 exactly for
the reduced repro, the original polymorphic case (vftable + empty base +
template), and a range of probe cases covering natural vs.
over-alignment padding and field vs. base reuse. Arm64EC and x64 output
is byte-identical to before.
Fixes #210174
Commit: 4d14e9641ddf38d4b6cc2dbb5c882135d94c68c1
https://github.com/llvm/llvm-project/commit/4d14e9641ddf38d4b6cc2dbb5c882135d94c68c1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][MathToSPIRV] Allow math.cttz lowering for non-i32 integer widths (#206400)
Co-authored-by: Igor Wodiany <dev at wodiany.com>
Commit: c881d81f6b189f14c56c9bec8842ddba6255d0e5
https://github.com/llvm/llvm-project/commit/c881d81f6b189f14c56c9bec8842ddba6255d0e5
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/SDTRewriter.cpp
Log Message:
-----------
[BOLT] Release pseudo-probe decoder after emit (#211935)
PseudoProbeRewriter builds sizable data structures and then hold onto
them after they are needed.
PseudoProbeRewriter::postEmitFinalizer() parses the input .pseudo_probe
sections into an MCPseudoProbeDecoder whose address-to-probe and
GUID-to-function-desc maps can be very large (tens of GiB on big
binaries with many probes). This is not used again once probes have been
updated, yet they survive into the memory-heavy DWARF rewrite
(updateDebugInfo), directly inflating BOLT's peak RSS at the worst
possible time.
This frees them at the end of the postEmitFinalizer() calls, before
updateDebugInfo runs.
Stacked on top of the .dwo DIE diff, in large binaries you should
observe ~17% peak RSS wins if your
build uses pseudo probe maps.
Commit: 63e60a2853b1ff6fdac3cbaf668e2d2a63d51fae
https://github.com/llvm/llvm-project/commit/63e60a2853b1ff6fdac3cbaf668e2d2a63d51fae
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/lib/Passes/BinaryPasses.cpp
A bolt/test/X86/jump-table-empty-block-strict.s
Log Message:
-----------
[BOLT] Fix strict mode bug in removal of block referenced by JT (#211940)
Summary:
BOLT can create a jump table object from a PC-relative operand reference
(e.g. leaq JT(%rip)) whenever the referenced memory looks like a PIC
jump table -- see
BinaryContext::handleAddressRef. This is independent of whether BOLT
recognizes the indirect jump dispatch itself. The jump table annotation
is only attached to the jmp instruction later, in
BinaryFunction::analyzeIndirectBranch, and only when the target-specific
analyzeIndirectBranch matcher recognizes the dispatch pattern.
If the matcher does not recognize the pattern, the annotation is never
attached to the jmp, even though the jump table object and its entries
exist and reference basic blocks in the function.
In strict mode BOLT still fully processes such a function: it stays
simple, the block is marked as having unknown control flow, and the jump
table object is kept intact. Because the terminator carries no jump
table annotation, BinaryBasicBlock::hasJumpTable() returns false for it.
Later passes then transform the function normally: remove-nops can empty
a jump table target block that consists only of nops, and NormalizeCFG
then redirects the block's predecessor and deletes the empty block - it
does not recognize the block as a jump table target, since the
predecessor's hasJumpTable() is false. The jump table object still
references the deleted block by label, which produces an "Undefined
temporary symbol" error and fails emission.
Fix NormalizeCFG so it does not redirect/remove a block whose
predecessor ends in an indirect branch, not only one flagged by
hasJumpTable().
Commit: 767716657985094ce2e73eafe87d5fa8a24ac843
https://github.com/llvm/llvm-project/commit/767716657985094ce2e73eafe87d5fa8a24ac843
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[OFFLOAD][L0] Fix zero argurment kernel launch (#212296)
PR #205224 changed the path for kernels with no arguments to not use
appendLaunchKernelWithArgs, while at the same time it removed
zeKernelSetGroupSize which resulted in incorrect sizing of the kernel.
This PR removes the alternate path and makes sure all launches go
through appendLaunchKernelWithArgs.
Alternatively we can restore zeKernelSetGroupSize on the alternate path.
Commit: 6534ceefd231771466abc9c388b93bb8b0913316
https://github.com/llvm/llvm-project/commit/6534ceefd231771466abc9c388b93bb8b0913316
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Basic/OptionalUnsigned.h
Log Message:
-----------
[Clang] [NFC] Update OptionalUnsigned ctor to only reject signed integers (#212321)
Currently, the `OptionalUnsigned(int) = delete;` constructor means that
constructing e.g. an `OptionalOrUnsigned<uint64_t>` from an `unsigned`
fails because overload resolution is ambiguous (because `unsigned` ->
`int` and `unsigned` -> `uint64_t` are both valid conversions). This
patch adds a constraint to make sure the deleted constructor only
catches signed integer types.
This is needed for #212319.
Commit: 864f9a09887559491ef3f7ad39d57c703bc14f40
https://github.com/llvm/llvm-project/commit/864f9a09887559491ef3f7ad39d57c703bc14f40
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate C# UTF 8 string literals (#211919)
Fixes #210506
Commit: 34c7c5ccca260c695d6b212a06c0e620d494adb4
https://github.com/llvm/llvm-project/commit/34c7c5ccca260c695d6b212a06c0e620d494adb4
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
[AMDGPU][NFC] Rename packed instruction helper functions for clarity (#211933)
Renames packed instruction helper functions to better reflect their
purpose:
- isPackedFP32or64BitInst → isSingleSGPRReadInst
- isLegalGFX12PlusPackedMathFP32or64BitOperand → isLegalSingleSGPRReadInstOperand
Commit: cef8432f7d149ef4e5888e29ff4d39ea580a806c
https://github.com/llvm/llvm-project/commit/cef8432f7d149ef4e5888e29ff4d39ea580a806c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
Log Message:
-----------
[VPlan] Account for masked VPInstructions in getIntrinsicID. (#212234)
getIntrinsicID may be called with masked VPInstructions. Update to skip
the mask, which is always the last operand.
Fixes https://github.com/llvm/llvm-project/issues/212165.
PR: https://github.com/llvm/llvm-project/pull/212234
Commit: aa8942dbf406e9e4c0cae84a6567dac37fac57c6
https://github.com/llvm/llvm-project/commit/aa8942dbf406e9e4c0cae84a6567dac37fac57c6
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDMAOperations.md
Log Message:
-----------
[Docs][AMDGPU] Eliminate incorrect use of double backticks [NFC] (#212343)
Commit: 30bff76d3a294fe0882a05472234b25bb752b16a
https://github.com/llvm/llvm-project/commit/30bff76d3a294fe0882a05472234b25bb752b16a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Do not emit cuf.register_variable_static for device/constant under unified mode (#212344)
Commit: 295c3a461c7dd9d7f34306a89181ceb7139760ba
https://github.com/llvm/llvm-project/commit/295c3a461c7dd9d7f34306a89181ceb7139760ba
Author: Sophia Herrmann <herrmann15 at llnl.gov>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Headers/__clang_gpu_device_functions.h
Log Message:
-----------
[Offload] Decouple CUDA source from NVPTX syncthreads assumption (#212339)
With the introduction of offloading via LLVM, the frontend language will
not necessarily determine the backend target anymore. Thus it is
necessary to guard against NVPTX instead of CUDA, since we could have
CUDA-language device code targeting a non-NVPTX backend, where Clang
does not provide __syncthreads as an NVPTX builtin and the generic shim
is still needed.
This also avoids duplicate definitions on NVPTX. Clang already provides
`__syncthreads` as an NVPTX target builtin, so
`__clang_gpu_device_functions.h` should not also define an inline
`__syncthreads` shim for NVPTX targets.
Commit: 4ca573fb7947b3bebf5c1da512b5142679545905
https://github.com/llvm/llvm-project/commit/4ca573fb7947b3bebf5c1da512b5142679545905
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/schema.yaml
Log Message:
-----------
[libc++] Rename the test suite used on LNT (#212347)
The LNT instance on http://lnt.llvm.org was wiped since I created the
original schema, and we can now start over clean with a new test suite
named `libcxx`.
Commit: a22416ba1ec8894ef98a437275e91f0ade3e2ba1
https://github.com/llvm/llvm-project/commit/a22416ba1ec8894ef98a437275e91f0ade3e2ba1
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
A llvm/test/Analysis/DXILResource/has-atomic64-use.ll
A llvm/test/CodeGen/DirectX/ContainerData/PSVResources-UsedByAtomic64.ll
Log Message:
-----------
[HLSL] Add UsedByAtomic64 shader flag (#211691)
This PR adds the `UsedByAtomic64` shader flag.
It detects any usage of an atomic instruction with a 64 bit type, and if
detected, sets the shader flag to true.
This is needed to pass DXIL validation.
Fixes https://github.com/llvm/llvm-project/issues/104392
Assisted by: Github Copilot
Commit: 8a49f8839cdf743af250d3501262da0bb9876c98
https://github.com/llvm/llvm-project/commit/8a49f8839cdf743af250d3501262da0bb9876c98
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/LogicalView/BUILD.gn
Log Message:
-----------
[gn build] Add missing deps (#212352)
>From e7290b1f1815626c4461d38671d93093590bf405
Commit: 4f02e1e45c2711a94dae0eac2051ad7c2e5ca8c2
https://github.com/llvm/llvm-project/commit/4f02e1e45c2711a94dae0eac2051ad7c2e5ca8c2
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.h
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
A lldb/test/API/lang/objc/tagged-pointer-children/Makefile
A lldb/test/API/lang/objc/tagged-pointer-children/TestTaggedPointerChildren.py
A lldb/test/API/lang/objc/tagged-pointer-children/main.m
A lldb/test/API/lang/objc/tagged-pointer-children/tagged_synth_provider.py
Log Message:
-----------
[LLDB] Hide unresolvable children from ObjC tagged pointers (#211936)
Foundation's small value inline representations have valid summaries and
sometimed synthetic children, but LLDB cannot access any ivars from
their base classes (such as [NSObject isa]).
Use a synthetic child provider to hide them.
rdar://182434208
Assisted-by: claude
Commit: 61225df551b071f07dbf9fab98242a7477506b49
https://github.com/llvm/llvm-project/commit/61225df551b071f07dbf9fab98242a7477506b49
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/TableGen/RuntimeLibcallEmitter-bad-system-library-entry-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter-nested-predicates-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag-errors.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
Log Message:
-----------
RuntimeLibcalls: Migrate to dag libcall predicates (#210674)
Switch to using dag predicates instead of free-form code predicates.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d8d33abac0140c0554fd754b2646e142edcca484
https://github.com/llvm/llvm-project/commit/d8d33abac0140c0554fd754b2646e142edcca484
Author: William Moses <gh at wsmoses.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Analysis/FlatLinearValueConstraints.h
M mlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/unittests/Analysis/Presburger/Parser.h
Log Message:
-----------
[MLIR] Allow recovering from semi-affine sets in FlatLinearValueConst… (#212346)
…raints
The IntegerSet constructor of FlatLinearValueConstraints asserts when
flattening fails, which happens for semi-affine integer sets. Since the
failure is signalled from inside a constructor, callers have no way to
detect the unsupported case ahead of time and no way to work around it;
they simply crash.
Add an optional `bool *error` parameter to the constructor. When it is
non-null, hitting the unimplemented case sets `*error` to true and
returns instead of asserting, letting callers bail out gracefully.
`*error` is set to false on success. When the pointer is null the
previous assert behavior is retained, so existing callers are
unaffected.
Commit: 0fa9cfa567277a1fadd71e4c8cf41db5a7c84cff
https://github.com/llvm/llvm-project/commit/0fa9cfa567277a1fadd71e4c8cf41db5a7c84cff
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/CIBestPractices.rst
A llvm/docs/GitHubActionsRunners.rst
M llvm/docs/Reference.md
Log Message:
-----------
[CI] Add documentation for self-hosted runners (#211622)
This patch adds (work in progress) documentation for the various
self-hosted runner groups we have access to in the LLVM monorepo.
Commit: 05eba618a37839999d3eb6ca7328337cd4765dfd
https://github.com/llvm/llvm-project/commit/05eba618a37839999d3eb6ca7328337cd4765dfd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Add vputils::getEarlyExits helper (NFC) (#212348)
Both handleUncountableEarlyExits and the countable early-exit disconnect
in handleEarlyExits walk all exit blocks and skip predecessors coming
from the middle block to find the early exiting blocks.
Factor that walk out into vputils::getEarlyExits, returning the (early
exiting block, exit block) pairs.
Commit: bd5883c35f43b01ab96bbdba1bc14a81f78694ea
https://github.com/llvm/llvm-project/commit/bd5883c35f43b01ab96bbdba1bc14a81f78694ea
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/AST/RecordLayoutBuilder.cpp
A clang/test/CodeGenCXX/Inputs/override-layout-aligned-base.layout
A clang/test/CodeGenCXX/override-layout-aligned-base.cpp
Log Message:
-----------
[clang] Fix record alignment lost via external layout on Arm64 (#212362)
An external layout source (such as LLDB reading DWARF) supplies a
record's final alignment directly, since `alignas` / `__declspec(align)`
attributes are not recoverable from debug info. `finalizeLayout`
captured `NonRequiredAlignment` before applying the external alignment,
so an externally laid out record published a stale, too-small value.
On Arm64 this field is used to fold a base's alignment into the derived
record, so a derived class picked up the stale value instead of the
base's actual alignment. This regressed
`lldb/test/API/lang/cpp/alignas_base_class` when #210461 was merged,
where `alignof(Derived)` evaluated to 1 instead of 8. Other targets were
unaffected as they do not read this field.
Treat all of an externally supplied alignment as non-required, as there
is no way to tell how much of it was imposed by an alignment attribute.
Commit: 4053f2b96988b69d68c8cc12913f51c149f1ac46
https://github.com/llvm/llvm-project/commit/4053f2b96988b69d68c8cc12913f51c149f1ac46
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang-rt][cuda] Keep CUFDeviceIsActive working under runtime/driver skew (#212320)
Resolve cuDevicePrimaryCtxGetState via the installed driver version, and
prefer running scope-exit cleanup when the probe cannot prove teardown,
so local device allocations are not leaked when the unversioned lookup
fails.
Commit: 7d96bd2ac1532e9ec6adf8eada303b5fe646857f
https://github.com/llvm/llvm-project/commit/7d96bd2ac1532e9ec6adf8eada303b5fe646857f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
Log Message:
-----------
[AMDGPU] Allow scalar operands in V_PK_LSHL_ADD_U64 (#212334)
Patch creates dummy source modifiers for this instruction to use
with OPSEL. Even though these do not support modifiers we can reuse
the same mechanics as with packed fp64 and other u64 to allow scalar
operands.
Commit: 63fe0cfe25e6e438d64c81785b93e500855adb78
https://github.com/llvm/llvm-project/commit/63fe0cfe25e6e438d64c81785b93e500855adb78
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/test/Transforms/RelLookupTableConverter/AArch64/no_relative_lookup_table.ll
M llvm/test/Transforms/RelLookupTableConverter/unnamed_addr.ll
Log Message:
-----------
Reapply "Disable RelLookupTableConverter on AArch64" (#212358)
This reverts commit ce8cf3f0a427f7fcf178a9a64ea48a4167211f82 (#207046).
Reland of #204669.
https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst#code-models
says that under the small code model rodata + text must fit in 2GB, but
the RelLookupTableConverter pass introduces PREL32 relocations from
.rodata to .data.rel.ro:
```
$ cat /tmp/a.c
extern void ext_func0(void);
extern void ext_func1(void);
typedef void (*func_t)(void);
static const func_t table0[2] = { ext_func0, ext_func1 };
static const func_t table1[2] = { ext_func1, ext_func0 };
static const func_t table2[2] = { ext_func0, ext_func0 };
static const func_t table3[2] = { ext_func1, ext_func1 };
const func_t *get_table(unsigned int idx) {
switch (idx % 4) {
case 0: return table0;
case 1: return table1;
case 2: return table2;
case 3: return table3;
}
return table0;
}
$ clang -O2 --target=aarch64-linux-gnu -fPIC -c /tmp/repro.c -o /tmp/repro.o
$ llvm-readelf -r /tmp/repro.o
...
Relocation section '.rela.rodata' at offset 0x370 contains 4 entries:
Offset Info Type Symbol's Value Symbol's Name + Addend
0000000000000000 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 0
0000000000000004 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 14
0000000000000008 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 28
000000000000000c 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 3c
...
```
Commit: e364a21086c71a68cac28f25469a7b014d1c2abd
https://github.com/llvm/llvm-project/commit/e364a21086c71a68cac28f25469a7b014d1c2abd
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/Instrumentor.md
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/test/Instrumentation/Instrumentor/default_config.json
A llvm/test/Instrumentation/Instrumentor/inline_runtime.ll
A llvm/test/Instrumentation/Instrumentor/inline_runtime_config.json
M llvm/test/Instrumentation/Instrumentor/lit.local.cfg
A llvm/test/Instrumentation/Instrumentor/runtimes/bytes_computed_rt.ll
Log Message:
-----------
[Instrumentor] Reintroduce runtime inlining (#208072)
The ability to link in and eagerly inline a specified runtime was
present in older dev versions of the instrumentor. This patch ports that
functionality to the current instrumentor pass and adds a test.
Co-authored-by: Johannes Doerfert <johannes at jdoerfert.de>
Co-authored-by: Kevin Sala <salapenades1 at llnl.gov>
Co-authored-by: Ivan Radanov Ivanov <ivanov.i.aa at m.titech.ac.jp>
Commit: 912128312f026605bce4ff11ef8a37d56a1a03f8
https://github.com/llvm/llvm-project/commit/912128312f026605bce4ff11ef8a37d56a1a03f8
Author: Patryk Stefanski <patryk.stefanski at protonmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
A clang/test/Index/USR/class-type-tpl-arg.cpp
Log Message:
-----------
[clang][Index][USR] Generate USRs for class-type non-type template arguments (#212356)
A class-type non-type template parameter is represented in the AST by a
TemplateParamObjectDecl, which has an empty DeclarationName.
USRGenerator had no visitor for it, so it fell through to
VisitNamedDecl, where EmitDeclName fails on the empty name and sets
IgnoreResults. That discarded the USR of the enclosing declaration.
Add a visitor that encodes the parameter object's type and value, so
specializations on distinct values get distinct USRs and equal values
agree.
Fixes #212351
Commit: 5e91f5d57a19752fe245ab64c1265e26c44d0d76
https://github.com/llvm/llvm-project/commit/5e91f5d57a19752fe245ab64c1265e26c44d0d76
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle-missing-for-expanded-binop-parent.ll
Log Message:
-----------
[SLP]Fix dep accounting for expanded binops in non-scheduled entries
The extra dependency counted for the expanded form was never released
when the expanding entry had no schedule bundle and the block had no
copyable elements, leaving the operand's bundle unscheduled forever.
Take the pseudo-bundle path also when the instruction is an expanded
binop in some tree entry.
Fixes #212220
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/212380
Commit: 30b8cb2003f7490eef20d8f31a8daa1cdb95f45d
https://github.com/llvm/llvm-project/commit/30b8cb2003f7490eef20d8f31a8daa1cdb95f45d
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/Target/TargetMacroFusion.td
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[MacroFusion] Add RunPreRA/RunPostRA to select the scheduling stage (#212182)
MacroFusion runs in both the pre-RA and post-RA machine schedulers.
Add two `bit` fields to the `Fusion` base class, `RunPreRA` and
`RunPostRA`, both defaulting to `true`, so a fusion can opt out of a
scheduling stage. At least one of them must be `true`.
When a stage is disabled, `MacroFusionPredicatorEmitter` emits an early
`return false` guard for that stage (detected via the `NoVRegs` machine
function property) and only keeps the statistic counter for the stage
the fusion actually runs in. A pre-RA-only fusion is generated as:
```cpp
STATISTIC(NumNAMEPreRA, "Times NAME Triggered (pre-ra)");
bool isNAME(...) {
...
if (SecondMI.getMF()->getProperties().hasNoVRegs())
return false;
/* Predicates */
++NumNAMEPreRA;
return true;
}
```
Since the guard already establishes the stage, the trailing counter
`if/else` collapses to a single increment, dropping the redundant
`hasNoVRegs()` call and the counter that could never fire.
Assisted-by: TRAE CLI (GPT 5.5)
Commit: bba25a8d818e146c132f927cc13b651359da4f26
https://github.com/llvm/llvm-project/commit/bba25a8d818e146c132f927cc13b651359da4f26
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/NVPTX/alias.ll
M llvm/test/CodeGen/NVPTX/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/blocksareclusters-kernel-attr.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-sm90-ptx86.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
M llvm/test/CodeGen/NVPTX/fence-proxy.ll
M llvm/test/CodeGen/NVPTX/fence.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/global-cycle-alias.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/NVPTX/op-fence.ll
M llvm/test/CodeGen/NVPTX/prmt-const-folding.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/switch.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/thread-fence.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Emit some more PTX directives through target streamer (#212070)
Move `.branchtargets`, `.reg`, `.local`, `.alias`, `.pragma`, and the
empty `.debug_macinfo` section out of hand-built strings in
`NVPTXAsmPrinter` and into `NVPTXTargetStreamer` hooks.
Opportunistically pulled at a few other threads that could use cleanup
as well.
Three behavior changes:
1. Jump table labels now come from `MachineFunction::getJTISymbol`, so
`$L_brx_<idx>` becomes `JTI<func>_<idx>` and is no longer shared across
functions
2. `.alias` names its aliasee by mangled symbol rather than raw IR name,
fixing `.alias a, ;` for an unnamed aliasee.
3. The rest of the test diff is a duplicated blank line that functions
with no register declarations no longer emit.
Co-Authored by Opus 5
Commit: 1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d
https://github.com/llvm/llvm-project/commit/1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/CMakeLists.txt
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
A llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
A llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
A llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
Log Message:
-----------
AMDGPU: Add -gen-amdgpu-target-def TableGen backend (#212318)
Commit: 065179637e5331424ffdef8060593c57a53a6391
https://github.com/llvm/llvm-project/commit/065179637e5331424ffdef8060593c57a53a6391
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][OpenACC] Lower single-block thread-only array reductions (#212369)
Example:
```fortran
!$acc parallel loop vector reduction(+:b)
do i = 1, n
b(i) = i
end do
```
In this code the array reduction is thread(vector)-only with no
gang/block launch dim, so a within-block `all_reduce` is a complete
reduction. ACCCGToGPU still rejected it as NYI because the accumulate
had no block context.
Fix: keep the NYI only when the region actually launches block
dimensions; allow the existing per-element `all_reduce` path for
single-block thread-only array accumulates.
Commit: 6a55a52cabb5760902af7aa970dd37a323e255ad
https://github.com/llvm/llvm-project/commit/6a55a52cabb5760902af7aa970dd37a323e255ad
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-access-wide-stride.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-narrow-iv.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
[VPlan] zext canonical IV in convertToStridedAccesses (#212291)
Currently we sext it which isn't correct at TCs > UINT32_MAX. Makes
#209611 NFC
Commit: 776971a11fdce76b243bd94b1fe7d2b1957da969
https://github.com/llvm/llvm-project/commit/776971a11fdce76b243bd94b1fe7d2b1957da969
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/RISCV/vector.ll
Log Message:
-----------
Revert "[RISCV] Add TuneNoDefaultUnroll to generic CPUs (#135318)" (#212400)
This reverts commit 9c5858eb699390c2cac5f7f032279be275fa6aef which
causes some regressions.
Commit: 2f6ec89938aa12ba5190477032b974524c956b54
https://github.com/llvm/llvm-project/commit/2f6ec89938aa12ba5190477032b974524c956b54
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/UnicodeCharSets.h
M clang/test/Lexer/unicode.c
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Implement P3658R1 (#212131)
As a DR in all C++ language modes.
Because we already supported the feature this is only modifying the
extensions warnings.
Commit: 0a30b0c8909dca8764d994a748bd7d53c68d94f7
https://github.com/llvm/llvm-project/commit/0a30b0c8909dca8764d994a748bd7d53c68d94f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
AMDGPU: Declare FeatureDPP with AMDGPUSubtargetFeature (#212408)
All other features were defined using the AMDGPUSubtargetFeature
subclass of SubtargetFeature, so fix the odd one out.
Commit: de962dda125154abb64446c198b5349cf05311cb
https://github.com/llvm/llvm-project/commit/de962dda125154abb64446c198b5349cf05311cb
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__atomic/clear_padding.h
M libcxx/include/__atomic/support/c11.h
M libcxx/include/__atomic/support/gcc.h
M libcxx/include/module.modulemap.in
A libcxx/test/libcxx/atomics/atomics.types.generic/padding.pass.cpp
R libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
A libcxx/test/libcxx/atomics/clear_padding.pass.cpp
A libcxx/test/std/atomics/atomics.types.generic/padding.pass.cpp
M libcxx/utils/libcxx/test/features/misc.py
Log Message:
-----------
[libc++] Implement P0528R3 `std::atomic` CAS for types with padding (#76180)
Fixes #99984
Implement P0528R3 The Curious Case of Padding Bits, Featuring Atomic
Compare-and-Exchange
The unit test padding.pass.cpp is assisted by Cursor. However, all tests
have been modified to test what I wanted to test
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: ed4090047fb6c40d8d014559da16cee934f124c0
https://github.com/llvm/llvm-project/commit/ed4090047fb6c40d8d014559da16cee934f124c0
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/lib/ProfileData/SampleProfWriter.cpp
A llvm/test/tools/llvm-profdata/eytzinger-split-nametable-partition.test
Log Message:
-----------
[SampleProfile] Fix symbol partitioning in Eytzinger name table (#211906)
This patch fixes the symbol partitioning between context-sensitive
and flat profiles in writeEytzingerNameTableSection.
In split-layout profiles, top-level symbols in the Eytzinger name
table are partitioned into two bins -- context-sensitive and flat keys
-- so that they form parallel arrays with function offsets.
Without this patch, writeEytzingerNameTableSection uses:
if (Ctx.hasContext())
to decide which bin to use even though splitProfileMapToTwo uses:
if (!I.second.getCallsiteSamples().empty())
to partition the profile. This difference causes certain symbols to
be classified into FlatKeys in the name table but into
ContextProfileMap in the LBR profile.
The patch fixes the problem by using the same condition to partition
keys.
This misclassification happens to top-level symbols (like main or
un-inlined root callers) that lack context delimiters in their
function names (hasContext() == false) but still contain inlined
callees in their profile hierarchies.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: d1ce5f95fb661999bcc99a3a816cc72c1220a36d
https://github.com/llvm/llvm-project/commit/d1ce5f95fb661999bcc99a3a816cc72c1220a36d
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll
Log Message:
-----------
[ASan] Instrument ptrtoaddr as pointer difference (#211988)
We want to emit ptrtoaddr instead of ptrtoint for pointer differences to
not expose the provenance. Adjust ASan instrumentation to handle this
case as well.
Commit: f2c7e2bcd57ef2a9db23e5071618d3e02ee9c33d
https://github.com/llvm/llvm-project/commit/f2c7e2bcd57ef2a9db23e5071618d3e02ee9c33d
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/__support/threads/thread.cpp
M libc/test/src/stdlib/CMakeLists.txt
Log Message:
-----------
[libc] Fix atexit_test in hermetic mode (#210656)
We never unlocked the ThreadAtExit mutex, which meant the second call to
exit deadlocked. This was detected in the unit tests as they were
calling __cxa_thread_atexit from the system C library.
Commit: ee8bf569630bd45559227434f6cdf7aa67eb6a77
https://github.com/llvm/llvm-project/commit/ee8bf569630bd45559227434f6cdf7aa67eb6a77
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/wasm/Symbols.cpp
Log Message:
-----------
[lld][WebAssembly] Fix SharedTagKind in toString (#212385)
Commit: d81bb91dfe1a32bdb9621d483c7a059ddd56970b
https://github.com/llvm/llvm-project/commit/d81bb91dfe1a32bdb9621d483c7a059ddd56970b
Author: Yuyang Zhang <yuyzhang at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AMDGPU/insert-vector-elt-build-vector-poison.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
Log Message:
-----------
[DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR (#210905)
The `insert_vector_elt -> build_vector` fold requires the source
`BUILD_VECTOR` to have a single use, to avoid duplicating it. Allow it
for a multi-use base when the target sets
`aggressivelyPreferBuildVectorSources`: a `BUILD_VECTOR` is just glue
there (e.g. `REG_SEQUENCE` on AMDGPU), so rebuilding re-references the
base's existing scalar operands and adds no real work. This un-shares a
CSE-shared base produced by `insertelement` on a poison vector, so each
derived vector is built from scalars independently, as GlobalISel
already does.
The gate mirrors the sibling `extract_vector_elt` fold: `hasOneUse() ||
TLI.aggressivelyPreferBuildVectorSources(VT)`.
Split out from #199631 per review. Opted-in targets are AMDGPU, NVPTX,
and AArch64: AMDGPU and NVPTX improve, AArch64 is unchanged; non-opted
targets are unaffected. Affected AMDGPU and NVPTX tests are regenerated.
The undef-deprecator flag on `splitkit-getsubrangeformask.ll` is a false
positive — those are MIR subregister-def flags (`undef %reg.sub`), not
IR `undef` values.
Commit: 9a5434468bf5a5aa77f46de98d17ec2eccdce39d
https://github.com/llvm/llvm-project/commit/9a5434468bf5a5aa77f46de98d17ec2eccdce39d
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
A flang/lib/Optimizer/Transforms/StackArrays.h
Log Message:
-----------
[flang][NFC] Extract StackArrays analysis and rewrite into a header - memory passes unification [1/5] (#210721)
Move InsertionPoint, StackArraysAnalysisWrapper, and AllocMemConversion
out of the anonymous namespace in StackArrays.cpp into a new
StackArrays.h header (in namespace fir), so the "which fir.allocmem can
be safely moved to the stack, and where" analysis and the heap-to-stack
rewrite pattern can be reused by other passes.
The dataflow internals (AllocationState, LatticePoint,
AllocationAnalysis), the command-line options, and all method
definitions remain in the .cpp. No functional change intended.
RFC:
https://discourse.llvm.org/t/rfc-flang-improving-temporary-and-local-array-allocations-unify-stackarray-memoryallocation/91353
Assisted-by: AI
Commit: 4b60d133e3f80bac153bef496f56ee85936dfea1
https://github.com/llvm/llvm-project/commit/4b60d133e3f80bac153bef496f56ee85936dfea1
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmulh.ll
Log Message:
-----------
[RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (#210429)
`CLMUL` and `CLMULH` currently expand for fixed vector types on RISC-V,
even if `Zvbc` and/or `Zvbc32e` are available. Add custom lowering to
convert to scalable vector operations according to extension
availability.
Assisted-by: Claude Opus 4.8
Commit: b59d69d79e547a432485c18611efd2ec8d9540ca
https://github.com/llvm/llvm-project/commit/b59d69d79e547a432485c18611efd2ec8d9540ca
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[RISCV][P-Ext] Unify pncvt(h) intrinsics between RV32 and RV64. (#210996)
Use __builtin_convertvector for pncvt and __builtin_shufflevector for
pncvth.
Alternatively we could use shift+__builtin_convertvector for pncvth but
that requires combining psrl+unzip(8/16)p to unzip(8/16)hp. I'm not sure
which is better right now.
Commit: ce62aab97e58c52e6bb0972c49d6fd1aaa6a08a0
https://github.com/llvm/llvm-project/commit/ce62aab97e58c52e6bb0972c49d6fd1aaa6a08a0
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/search/CMakeLists.txt
Log Message:
-----------
[libc] Add aligned_alloc and delete[] to hermetic tests (#210693)
This lets us run (at least) <search.h> tests in hermetic mode.
Commit: f75eef2acb00eb8ff99cf9d7abb0d1649d0cbc90
https://github.com/llvm/llvm-project/commit/f75eef2acb00eb8ff99cf9d7abb0d1649d0cbc90
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/cast_ptr.ll
M llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
Log Message:
-----------
[InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (#212101)
Followup of #211991. icmp ptrtoint, ptrtoint cannot be folded away for
non-integral pointers, this is only possible with ptrtoaddr.
For consistency, this also restricts the inttoptr direction, which
causes the change in the phase ordering test. (Note that in this
particular case, not doing the folding is actualle beneficial, as it
keeps the inttoptr-inttoptr comparison outside the loop avoiding one
comparison inside the loop. I wouldn't expect any practical impact,
though.)
Commit: 022bf7ba97fa1897bf52cf3db2e3fa42cd19b29f
https://github.com/llvm/llvm-project/commit/022bf7ba97fa1897bf52cf3db2e3fa42cd19b29f
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopPassManager.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
M llvm/unittests/Transforms/Utils/LoopUtilsTest.cpp
Log Message:
-----------
[LoopInfo] Take no dominator tree in verify(). NFC (#212414)
Similar to the recent change that makes analyze() lazy in building
DomTree.
Commit: 9ccf2a81a1b86c6b4d953259bbbdc678cc791493
https://github.com/llvm/llvm-project/commit/9ccf2a81a1b86c6b4d953259bbbdc678cc791493
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A clang/test/CIR/CodeGen/default-func-attrs-invoke.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVM] Preserve default function attributes on invokes (#212263)
Represent `default_func_attrs` on `LLVM::InvokeOp` and translate the
collection onto the generated LLVM invoke instruction. Preserve default
call-site attributes when throwing calls are lowered through the LLVM
dialect, including CIR `try_call` operations.
Commit: 4df68548fcfd82ddfdfe5ae52e691966065cf2e1
https://github.com/llvm/llvm-project/commit/4df68548fcfd82ddfdfe5ae52e691966065cf2e1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M orc-rt/docs/CodingConventions.md
M orc-rt/include/orc-rt-c/WrapperFunction.h
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/include/orc-rt/WrapperFunction.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/DirectCaller.h
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/SPSWrapperFunctionTest.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Reorder wrapper-fn args to trailing-callback style. (#212243)
Bring the wrapper-function call and return prototypes into line with the
convention adopted for orc_rt_Session_callController: the session handle
comes first, then the payload buffer, then the completion callback
immediately followed by its threaded token, with the token last.
orc_rt_WrapperFunctionReturn: (S, CallId, ResultBytes)
-> (S, ResultBytes, CallId)
orc_rt_WrapperFunction: (S, CallId, Return, ArgBytes)
-> (S, ArgBytes, Return, CallId)
The C++ adapters that mirror these signatures are updated to match --
WrapperFunction::handle, SPSWrapperFunction::handle, the
ORC_RT_SPS_WRAPPER macro, and StructuredYield -- along with the Session
dispatch path and the affected unit tests. No functional change beyond
argument order.
Commit: 7bc2770064d3afbb4ce49c159d99c69a9e4b5c5b
https://github.com/llvm/llvm-project/commit/7bc2770064d3afbb4ce49c159d99c69a9e4b5c5b
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/src/assert/CMakeLists.txt
M libc/test/src/assert/assert_test.cpp
Log Message:
-----------
[libc] Make assert_test hermetic (#210700)
Call our own close() instead of the system one.
Commit: f5437c4d4f2e9920614d856158d9683d650acffa
https://github.com/llvm/llvm-project/commit/f5437c4d4f2e9920614d856158d9683d650acffa
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
Log Message:
-----------
[clang][NFC] Refactor flag enum caching (#210632)
Extracts cache insertion logic from `IsValueInFlagEnum`. This allows us
to drop `mutable` on `FlagBitsCache` while making it reusable as work
list for additional flag_enum diagnostics.
Commit: b53f2d57b086d93dc8421c74c17913951122e9d9
https://github.com/llvm/llvm-project/commit/b53f2d57b086d93dc8421c74c17913951122e9d9
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 1e1274b (#212405)
This fixes 1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d (#212318).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 39549cd7c62e9a2db44d186e0fe5d99e1473cb24
https://github.com/llvm/llvm-project/commit/39549cd7c62e9a2db44d186e0fe5d99e1473cb24
Author: StefanPaulet <tudor.stefan.paulet at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/ScopeInfo.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/source_location.cpp
Log Message:
-----------
[clang] Fixed predefined expressions after lambda parameters (#211811)
After the parameter declaration of a lambda expression, `Sema` enters
the declaration context of the lambda call operator (in
`ActOnLambdaClosureParameters`), so the lambda specifiers and the
trailing return type are analyzed within that context. Because of this,
predefined expressions such as `__func__` resolve to the lambda call
operator, and not to the possibly enclosing function. (issue #122657)
Added a member to `LambdaScopeInfo` to mark whether or not the compound
statement of the lambda expression has been entered, to be used when
resolving a `PredefinedExpr`
Commit: 0bcff14b1740cf32f9e0983726238dcf353c6ac8
https://github.com/llvm/llvm-project/commit/0bcff14b1740cf32f9e0983726238dcf353c6ac8
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/pkey_test.cpp
Log Message:
-----------
[libc] Make <sys/mman.h> tests hermetic (#210697)
The only issue was in pkey_test, which uses function-local static to do
lazy initialization. This requires the c++ runtime
(__cxa_guard_acquire/release).
There are no threads in this test, so we can just use the
(non-thread-safe) hand-rolled version of that. This is currently our
only test with such a pattern.
This would be something that in gtest would go into a SetUpTestSuite
method, but our test framework currently doesn't have an equivalent.
Commit: 7c58d4de4af550ba3d54bf217f27a1e6b3736dbc
https://github.com/llvm/llvm-project/commit/7c58d4de4af550ba3d54bf217f27a1e6b3736dbc
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/source/Host/linux/HostInfoLinux.cpp
M lldb/unittests/Host/HostInfoTest.cpp
Log Message:
-----------
[lldb][AArch64] Fix launching Arm32 applications on AArch64 Linux (#211692)
When LLDB runs on an AArch64 Linux, it adds both 64- and 32-bit
architectures as supported; see `PlatformLinux` ctor. The triple for the
32-bit variant is computed by replacing the architecture while keeping
all other fields; i.e., for the main host triple
`aarch64-unknown-linux-gnu`, the generated 32-bit triple is
`arm-unknown-linux-gnu`.
When a 32-bit target is created, its triple would be something like
`arm--linux-eabihf`. This triple is incompatible with the one added to
the supported architectures per condition in `ArchSpec::IsMatch()`,
which checks for compatibility between environments. As a result, LLDB
fails to launch this target:
```
> arm-linux-gnueabihf-g++ -g test.cpp -o test.out
> lldb
(lldb) file test.out
Current executable set to '/tmp/test.out' (arm).
(lldb) run
error: failed to launch or debug process
```
Clearing the environment of the computed triple for Arm32 allows the
compatibility check to pass.
---------
Co-authored-by: David Spickett <david.spickett at arm.com>
Commit: 162cdf496003e9bed7e7c7d0cbbd507365443b85
https://github.com/llvm/llvm-project/commit/162cdf496003e9bed7e7c7d0cbbd507365443b85
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-apply-to-adds.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-minmax.ll
M llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
M llvm/test/Transforms/LoopIdiom/add-nsw-zext-fold.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
Log Message:
-----------
[SCEV] Rewrite more SCEVAddExpr when applying guards. (#159942)
When re-writing SCEVAddExprs to apply information from guards, check if
we have information for the expression itself. If so, apply it.
When we have an expression of the form (Const + A), check if we have
have guard info for (Const + 1 + A) and use it. This is needed to avoid
regressions in a few cases, where we have BTCs with a subtracted
constant.
Rewriting expressions could cause regressions, e.g. when comparing 2
SCEV expressions where we are only able to rewrite one side, but I could
not find any cases where this happens more with this patch in practice.
Depends on https://github.com/llvm/llvm-project/pull/160012.
Proofs for some of the test changes: https://alive2.llvm.org/ce/z/RPX6t_
This comes with a slight compile-time increase, mostly due to changes in
downstream optimizations (like extra unrolling).
stage1-O3: +0.03%
stage1-ReleaseThinLTO: +0.02%
stage1-ReleaseLTO-g: +0.04%
stage1-aarch64-O3: +0.04%
stage2-O3: +0.03%
https://llvm-compile-time-tracker.com/compare.php?from=42b4ee6383e340c4c3ab4cfddd17f864ab331e0d&to=7b5221e21c2c18152dcb72a82122730690153aed&stat=instructions%3Au
Improves optimizations end-to-end in a number of cases on real-world workloads
(dtcxzyw/llvm-opt-benchmark-nightly#802).
PR: https://github.com/llvm/llvm-project/pull/159942
Commit: 8e9802b45829d473bce51197ce95f3ab40d94426
https://github.com/llvm/llvm-project/commit/8e9802b45829d473bce51197ce95f3ab40d94426
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/gdb_remote_client/TestGdbClientModuleLoad.py
Log Message:
-----------
[lldb][test] Do not return a PID in TestGdbClientModuleLoad (#212256)
This test has been flaky on x86 Github CI. It expects:
[ 0] {{.*}} 0x0000000000ee0000 {{.*}}module_load
[ 1] {{.*}} 0x0000000000ef0000 {{.*}}[vdso]
However in one run it got:
[ 0] 98FC07B8 0x0000000000ef0000 [vdso] (0xef0000)
[ 1] 75B11BBB-EF8B-5645-B9B1-A7261EC8ABCF-05413284 0x0000000000ed8ed0
/home/gha/actions-runner/bin/Runner.Worker
This happened because the responder says it's debugging PID 0x47, which
is usually some root process that we cannot read the /proc/pid/exe link
for. However when it is readable, we will assume that is the program
file and it replaces the "module_load" entry (this never happened on
AArch64 because an AArch64 program file is never compatible with an x86
triple).
In the failing case, 0x47 happened to be a github runner process that
lldb could get the exe for. I was able to reproduce this by putting a
long sleep in the background and replacing 0x47 with that sleep's PID.
To fix this I am returning the value of `PID_MAX_LIMIT` which is the
limit of what `pid_max` can be set to. This should be parsed by lldb
into an invalid PID and cause it to give up looking at the host.
I tried returning 0, this found a process somehow, returning no PID at
all, again it found a process. The only other way is to make this test
connect to a fake remote linux platform first, but this would take much
more code to set up.
Commit: 697f9892bef88f22f630e7e78541dd29d3cd716b
https://github.com/llvm/llvm-project/commit/697f9892bef88f22f630e7e78541dd29d3cd716b
Author: David Green <david.green at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/reg-bank-128bit.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-sext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-zext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-ceil.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-dup.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fma.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fmaximum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fminimum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic-round.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-llround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-lround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-maxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-minnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-nearbyint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-shift-imm-64.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-trunc-s128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-fp-loads.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-reductions.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-reg_sequence.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-unmerge-vec.mir
Log Message:
-----------
[AArch64][GlobalISel] Update regbank tests with concrete types. NFC (#212367)
Commit: 6aeeec83ec1d979ea2a2e3f4629ac361b5cdb70e
https://github.com/llvm/llvm-project/commit/6aeeec83ec1d979ea2a2e3f4629ac361b5cdb70e
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/test/API/commands/gui/spawn-threads/TestGuiSpawnThreads.py
Log Message:
-----------
[lldb][test] Skip TestGuiSpawnThreads.py on Linux (#212431)
See https://github.com/llvm/llvm-project/issues/209874.
We are still hitting the larger timeout.
Commit: c6603cce864078da43741e36fb9586a6c72782fe
https://github.com/llvm/llvm-project/commit/c6603cce864078da43741e36fb9586a6c72782fe
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/Basic/TokenKinds.h
M clang/utils/TableGen/ClangTraitsEmitter.cpp
Log Message:
-----------
[clang][NFC] generate TokenKey from tablegen (#210857)
Currently the enumerator constants of `TokenKey` are duplicated between
TokenKinds.h and Traits.td. This patch generates the `TokenKey` enum
from tablegen.
This is a followup patch for
https://github.com/llvm/llvm-project/pull/201491#discussion_r3567423553
Commit: 564be89eaee5227ec21980ca2054f00d595044c7
https://github.com/llvm/llvm-project/commit/564be89eaee5227ec21980ca2054f00d595044c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
Log Message:
-----------
clang: Fix subarchless amdgpu triples in offload bundler tests (#212424)
Commit: 10d1b41f8cd9aa327fb15f698a0b564a3d5c4118
https://github.com/llvm/llvm-project/commit/10d1b41f8cd9aa327fb15f698a0b564a3d5c4118
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Core.cpp
Log Message:
-----------
[ORC] Fix buildSimpleReexportsAliasMap signature. (#212420)
The header declared a `const SymbolNameSet&` argument, but the
implementation took a `SymbolNameSet` by value. Update the
implementation to also take a `const SymbolNameSet&`.
No testcase. The corrected implementation will be used in an upcoming
commit.
Commit: 437b42f23250660f9a3f262ca6626324cd32a094
https://github.com/llvm/llvm-project/commit/437b42f23250660f9a3f262ca6626324cd32a094
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/TableGen/TGParser.cpp
M llvm/test/TableGen/eof-after-endif.td
Log Message:
-----------
[TableGen] don't print redundant diagnostic when parser sees Error token at end of file. (#212410)
Fixes #151476.
Currently TableGen parser emits `error: Unexpected token at top level`
when it sees `tgtok::Error` token after failing to parse the object
list, even though that token's corresponding diagnostics were already
emitted during lexing. This change makes `ParseFile` return true when it
sees `tgtok::Error` at end of file, thereby avoiding the redundant
diagnostic.
Commit: b349bef025f294ef100d02ac8c928836cd979f3f
https://github.com/llvm/llvm-project/commit/b349bef025f294ef100d02ac8c928836cd979f3f
Author: David Green <david.green at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Log Message:
-----------
[AArch64][GlobalISel] Use integer type for cttz icmp type. (#212327)
Commit: 6520ac73f22d53e93e5ae8da6351a1714723497c
https://github.com/llvm/llvm-project/commit/6520ac73f22d53e93e5ae8da6351a1714723497c
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A lldb/test/API/linux/aarch64/aarch32_compat/Makefile
A lldb/test/API/linux/aarch64/aarch32_compat/TestAArch64LinuxAArch32Compat.py
A lldb/test/API/linux/aarch64/aarch32_compat/main.s
Log Message:
-----------
[lldb][test][AArch64] Add test for AArch32 compatibility execution (#211793)
This should catch obvious problems like the one in #211692 in
future.
To run AArch32 programs on AArch64 you need a few things:
* Hardware that has AArch32 mode at EL0.
* A kernel built with CONFIG_COMPAT on.
* (usually) A bunch of 32-bit libraries installed.
We are dodging the 3rd one by compiling a standalone assembly
program that doesn't use any other libraries.
With clang being a cross-compiler and lld a cross-linker,
we should be able to do this without any 32-bit compatibility
libraries being installed.
To check for the first 2, we run that program normally.
If it fails to run, we don't have them. If it does run,
we have to double check that it's not being emulated. If
it is not being emulated, finally we can run it with lldb to
check that lldb works correctly.
Inside of lldb we place a breakpoint and read some
registers. GPRs are set to their own register number,
and FPR to their register number plus 1. So if we mixed
up the set order, we would know about it.
Tested on a Graviton 3 which allowed AArch32 execution and a Graviton 5
which did not. For the latter, the error without an emulator is:
```
$ ~/test.o
-bash: /home/davspi01/test.o: cannot execute binary file: Exec format error
```
This we detect when `Popen` fails. If you install qemu and setup
binfmt_misc, we detect that via. the exe path:
```
$ ~/test.o &
[2] 433187
$ ls -la /proc/433187/exe
lrwxrwxrwx 1 davspi01 davspi01 0 Jul 27 11:47 /proc/433187/exe -> /usr/bin/qemu-arm
```
Commit: 2d7aaf670d704bbb4bfb3ef023f18ba0b85b58c7
https://github.com/llvm/llvm-project/commit/2d7aaf670d704bbb4bfb3ef023f18ba0b85b58c7
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/chown_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/test/src/unistd/truncate_test.cpp
Log Message:
-----------
[libc] Fix path collisions between unit and hermetic tests (#212425)
Use the APPEND_LIBC_TEST macro to ensure each test gets a unique path to
operate on. Enable the affected tests in hermetic mode.
Commit: 636d8a253e71651ffa75f3bb515a14de0f20341d
https://github.com/llvm/llvm-project/commit/636d8a253e71651ffa75f3bb515a14de0f20341d
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
Log Message:
-----------
[lldb][AArch64][Linux] Track all register cache validity in one place (#197113)
In this change I've expanded the existing RegisterSetType enum
to be used as part of a singular cache tracking object which replaces
all the separate booleans. These booleans were hard to track and
set/reset in the right places.
This new validity object can be reset by default constructing,
and uses a member initialiser so everything starts out as invalid.
RegisterSetType is now a bitmask enum for easier storage.
It's 32-bit now which is enough for now. Just in case we expand it.
(and I previously updated all sizeof calls to use RegisterSetType
instead of the raw type)
The SME and SME 2 entries have been renamed to ZA and ZT
as this is what ptrace calls them. Note that SME's pseudo registers
are still managed in their own unique way, I hope to address that
later.
Over time, RegisterSetType will become the key for all the
operations in the register context. You can see a preview of
that "vision" in #193174.
For instance getting the buffer location and size, looking up
the ptrace set number, finding out what a set write invalidates,
and so on.
I did consider using optional for the register storage. I think this
could work if we had done it from the beginning but starting from
this point it has too many issues with it.
* We cannot assume that sizeof(buffer) == sizeof(buffer_type). Which
leads to some places where you have to write sizeof(some_generic_type).
Which is not ideal. Being able to use the member variable name is
clearer.
* We have to make the buffer "valid" before trying to read, then make it
invalid if it fails. Rather than read and if it succeeds mark it valid.
3 steps vs. 2.
* Some things like SVE resize the buffer when we get the new vector
length, then at some point later assume the buffer can hold the result
of a read. We'd have to track the expected size separately, and use that
to resize it just before read. Which is not difficult, but it's a
different strategy and I don't want to disturb all the SVE/SME handling
at this stage.
* Though our buffer + bool is in theory an optional, the way the class
is designed where one thing fills the buffer and another reads from it
later, the flexibility of when to set the bool does help us. Versus the
automatic handling optional does.
Once this whole class has been simplified and I can see the "unusual"
code paths more easily, I might revisit the optional idea.
Commit: a1194be1baefa99d20a09bd04b16056be0ab7225
https://github.com/llvm/llvm-project/commit/a1194be1baefa99d20a09bd04b16056be0ab7225
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/test/CodeGen/SPIRV/literals.ll
Log Message:
-----------
[SPIR-V] Fix hex float exponent for f64 Inf/NaN literals (#212295)
The asm printer hardcoded the f32 exponent (+128) when printing Inf/NaN
as hex floats, so f64 Inf/NaN literals were misencoded and silently
reassembled as finite values by consumers
Derive the exponent from the operand actual semantic instead
Commit: 7e1719546578ed523f5deb4ac499cdc833280d9c
https://github.com/llvm/llvm-project/commit/7e1719546578ed523f5deb4ac499cdc833280d9c
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions-min-max.ll
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[LoopUnroll] Allow vector types for minmax reductions (#207630)
Our downstream patched RecurrenceDescriptor in IVDescriptors.cpp to
recognize min/max reductions on vector-typed phis. After ffa02793,
vector min/max intrinsic reductions now flow into getReductionIdentity()
with vector type and then runtime-unroll-reductions-min-max.ll test
crashed.
This PR upstreams our RecurrenceDescriptor change to avoid further
downstream change to LoopUtils.cpp (in this PR) that fixes the crash.
LIT change in runtime-unroll-reductions-min-max.ll shows a long serial
reduction chain now breaks into two independent ones, which is the
purpose of unroll-add-parallel-reductions.
---------
Co-authored-by: skozhukh <sergey.s.kozhukhov at intel.com>
Commit: b626ec036e8551c4aa7d548e718bc5aa91562be0
https://github.com/llvm/llvm-project/commit/b626ec036e8551c4aa7d548e718bc5aa91562be0
Author: Peng Sun <peng.sun at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add FP8 and MXFP support to RESIZE (#212276)
- Added FP8 and all six MXFP extension/type combinations
- Updated RESIZE availability and enforced NEAREST_NEIGHBOR for MXFP
- Added positive, negative, version, extension, mixed-type, and verifier
tests.
Signed-off-by: Peng Sun <peng.sun at arm.com>
Commit: 74aae4e43edbf1843b886516893fd2b880d70dfa
https://github.com/llvm/llvm-project/commit/74aae4e43edbf1843b886516893fd2b880d70dfa
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Eta-reduce fn in pullOutPermutations (NFC) (#212439)
fun x => f x can be eta-reduced to just f.
Commit: b443896c13aded8b40d7bae4a5a9adbc96fd0d31
https://github.com/llvm/llvm-project/commit/b443896c13aded8b40d7bae4a5a9adbc96fd0d31
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Use pointee-range in blocksOnly (NFC) (#212441)
The map_range can be replaced by make_pointee_range.
Commit: 6bb30c03650c9ebc816d089ea78b36a246116f07
https://github.com/llvm/llvm-project/commit/6bb30c03650c9ebc816d089ea78b36a246116f07
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
A clang/include/clang/Basic/BuiltinTraits.h
R clang/include/clang/Basic/ExpressionTraits.h
R clang/include/clang/Basic/TypeTraits.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
A clang/lib/Basic/BuiltinTraits.cpp
M clang/lib/Basic/CMakeLists.txt
R clang/lib/Basic/ExpressionTraits.cpp
R clang/lib/Basic/TypeTraits.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringSyntaxChecker.cpp
M clang/utils/TableGen/ClangTraitsEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Log Message:
-----------
[clang][NFC] fold ExpressionTraits and TypeTraits helpers into BuiltinTraits (#210838)
ExpressionTraits.h defines utilities such as `getTraitName`,
`getTraitSpelling` and an enumeration for expression traits. All other
overloads of these utilities can be found in TypeTraits.h - this patch
combines them to BuiltinTraits.h/cpp.
This is a followup patch for
https://github.com/llvm/llvm-project/pull/201491#discussion_r3460883247
Commit: 840060f2f85c2d3f8ebe1c9304770d682e4141f6
https://github.com/llvm/llvm-project/commit/840060f2f85c2d3f8ebe1c9304770d682e4141f6
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
Log Message:
-----------
[RISCV] Don't move memory instructions across calls in isSafeToMove (#212236)
RISCVInstrInfo::isSafeToMove scans the instructions between From and To
to decide whether a memory instruction can be moved, but it only treated
mayStore() instructions as barriers. Calls on RISC-V are modeled with
isCall() and a register mask rather than mayStore(), so a load could be
moved across a call even though the callee may clobber the loaded
memory.
RISCVVectorPeephole::foldVMergeToMask uses this helper via ensureDominates()
to sink a load into a masked load when folding it into a vmerge, which
produced wrong code when the load was sunk past a call.
Instead of hand-rolling the barrier check, call MachineInstr::isSafeToMove
on each intervening instruction to populate SawStore. That is the same
helper used on From below, and it already treats calls (as well as PHIs
and ordered memory references) as stores.
This fixes #212226.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
Commit: ff46298372dc64d8fb56f1397c2914772b815605
https://github.com/llvm/llvm-project/commit/ff46298372dc64d8fb56f1397c2914772b815605
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/test/Conversion/GPUToSPIRV/reductions.mlir
Log Message:
-----------
[mlir][SPIR-V] Support bitwise and/or/xor in gpu reduction lowering (#202351)
Commit: bcdff65a953758e3a72cf99586c6ce809d4aaf9e
https://github.com/llvm/llvm-project/commit/bcdff65a953758e3a72cf99586c6ce809d4aaf9e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/include/tuple
Log Message:
-----------
[libc++] Simplify some meta-programming in tuple (#212436)
This does two things:
- replace `_Not<T>::value` with `!T::value` when we already evaluate
lazily
- remove `_And`s that aren't useful because they only have a single
argument
Commit: 321642826552ff4e4c7d67ea236f8669d4598c9f
https://github.com/llvm/llvm-project/commit/321642826552ff4e4c7d67ea236f8669d4598c9f
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/test/support/test_macros.h
Log Message:
-----------
[libc++][test] Disable test coverage for `_BitInt` for non-libc++ implementations (#212435)
Currently, library support for `_BitInt(N)` is an extension explicitly
supported by libc++. However, when using Clang with other standard
library implementations, `TEST_HAS_BITINT` is currently `1` as the
condition only detects compiler support of `_BitInt`.
This patch disables `_BitInt` coverage for other implementations for
now.
Commit: abd3b3a1445b5a8eeffae5c3912883faa9287fb7
https://github.com/llvm/llvm-project/commit/abd3b3a1445b5a8eeffae5c3912883faa9287fb7
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/test/support/test_macros.h
Log Message:
-----------
[libc++][test][NFC] Format `test_macros.h` (#212442)
Avoiding errors about untouched lines from clang-format when modifying
conditions in `test_macros.h`.
Commit: 391d298c2ae471c28e7db8538d867a017f9d08df
https://github.com/llvm/llvm-project/commit/391d298c2ae471c28e7db8538d867a017f9d08df
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/test/Integration/GPU/CUDA/command-line-arg.mlir
Log Message:
-----------
[mlir][Target] Make nvptxcompiler passed options high priority to keep consistent with ptxas behavior (#121036)
When using `ptxas` to do ptx->cubin, the options passed (via `cmd`) have
higher priority than the gpuModule target (such as `opt-level`). When
using `nvptxcompiler`, it is the opposite and we need to be consistent.
Commit: f11d740e204f0551ac72ab1a2cacd72ae5c41b26
https://github.com/llvm/llvm-project/commit/f11d740e204f0551ac72ab1a2cacd72ae5c41b26
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/hash_test.cpp
Log Message:
-----------
[libc] Make hash_test hermetic (#212428)
Aligned allocation is now supported, but the test burns through our 1MB
never-freeing bump pointer allocation buffer. I tweak the test to reuse
the buffer between loop iterations, reducing its memory usage by about
300x :P.
Commit: 2a50c95322bc0ff3bbd976564914ce297b251a1a
https://github.com/llvm/llvm-project/commit/2a50c95322bc0ff3bbd976564914ce297b251a1a
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Honor try-lock branches of a void conditional (#211973)
Try-locks are not acquired on the arms of a `?:`, because the arms would
then disagree about whether the capability is held and warn where they
join. That reasoning assumes the `?:` produces a result that is branched
on later, which is where the acquisition is handled instead.
A void `?:` has no such result. Its branch is all there is to interpret,
and its arms might not join at all because one of them does not return
(this is how glibc before 2.32 spells `assert()`).
So asserting that a try-lock succeeded left the capability unheld on
every path, and a function documented to acquire it warned that it did
not, if written like so:
void lock(void) ACQUIRE(mu) {
int got = trylock();
assert(got); // warning: expecting mutex 'mu' to be held at the end of
function
}
Only bail out for a `?:` that has a result to be used, so that a void
`?:` acquires on its branch like any other terminator (for example,
including `&&` and `||`).
Assisted-by: Claude Opus 5
Commit: ac8b30c74b595dd8dfa612912663e57dafcf3355
https://github.com/llvm/llvm-project/commit/ac8b30c74b595dd8dfa612912663e57dafcf3355
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/test/std/language.support/support.types/byteops/lshift.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.pass.cpp
Log Message:
-----------
[libc++][test] Suppress warning on bitwise shift with `bool` operands in `std::byte` tests for MSVC (#212433)
It was intentional in https://llvm.org/PR204116 that tests for
`operator<<`, `operator<<=`, `operator>>`, `operator>>=` used `bool`
operands, because `bool` is an integral type and thus satisfies the
constraints of these operators.
However, MSVC considers `bool` is unsafe as an operand of bitwise shift
operators and emits warning C4804. So this patch suppresses the warning
for MSVC.
Commit: c273220275a7cbb8384812e1a4c84e773e1dd820
https://github.com/llvm/llvm-project/commit/c273220275a7cbb8384812e1a4c84e773e1dd820
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/test/Conversion/SCFToSPIRV/for.mlir
Log Message:
-----------
[mlir][SCFToSPIRV] Fix iter_args returning undef on zero trip scf.for (#206280)
Commit: 584734513c63b309b46a945cddbf0a516a9d133c
https://github.com/llvm/llvm-project/commit/584734513c63b309b46a945cddbf0a516a9d133c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ReOptimizeLayer.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
Log Message:
-----------
[ORC] Drop ExecutorProcessControl::JITDispatchInfo. (#212434)
The JIT-dispatch mechanism lets JIT'd code call handlers in an ORC
ExecutionSession, via the "__orc_rt_jit_dispatch" and
"__orc_rt_jit_dispatch_ctx" symbols. Until now ExecutorProcessControl
carried the addresses backing those symbols in a dedicated
JITDispatchInfo struct, which every EPC had to populate and each
Platform read back to define the symbols.
That detour couples ExecutorProcessControl to the shape of the dispatch
mechanism -- two symbols with fixed names -- and forces every EPC to
provide the addresses whether or not a given JIT setup uses dispatch.
Represent the two addresses as ordinary bootstrap symbols instead. EPCs
that support dispatch add __orc_rt_jit_dispatch(_ctx) to their bootstrap
symbols; Platforms reexport them from the bootstrap JITDylib rather than
reading JITDispatchInfo. EPCs that don't use dispatch provide nothing,
and ExecutorProcessControl no longer references the mechanism at all.
Commit: 8c8cc1cfb9f04fc57716b9ccc3ea74c9a5495bf7
https://github.com/llvm/llvm-project/commit/8c8cc1cfb9f04fc57716b9ccc3ea74c9a5495bf7
Author: Akash Agrawal <akashag at qti.qualcomm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Parse/ParseDecl.cpp
A clang/test/Parser/decltype-crash.cpp
Log Message:
-----------
[Clang][Parse] Fix assertion when annotating a failed decltype-specifier (#211221)
`ParseDeclaratorInternal's` member-pointer special case enters a
speculative scope-specifier parse whenever it sees `decltype`, without
checking that `( `follows:
```
if (getLangOpts().CPlusPlus &&
(Tok.is(tok::coloncolon) || Tok.is(tok::kw_decltype) || ...)) {
```
But `decltype-specifier` is always `decltype ( expression ) — decltype`
not followed by `(` can never be valid. When that happens,
`ParseOptionalCXXScopeSpecifier` still tries to parse it as one, fails,
and error recovery skips tokens. The EndLoc returned is then stale by
the time `AnnotateExistingDecltypeSpecifier` uses it to annotate, which
trips the invariant in `Preprocessor::AnnotatePreviousCachedTokens`:
```
int decltype; // crashed
int *decltype = 0; // crashed
```
Fix: only take this path when decltype is followed by (.
`(Tok.is(tok::kw_decltype) && NextToken().is(tok::l_paren)) ||`
`ParseDecltypeSpecifier` already requires `(` right after `decltype` or
bails with `TST_error`, so this check drops no valid parse —
`decltype(expr)` (including as a member-pointer scope, e.g.` int
decltype(obj)::*p = &S::m;) `is unaffected.
Fixes #211207
Co-authored - Claude-Sonnet
Commit: ad6cb6dedc9dc1d965d60e1a34289c2bb30e7cec
https://github.com/llvm/llvm-project/commit/ad6cb6dedc9dc1d965d60e1a34289c2bb30e7cec
Author: Nikita Taranov <nikita.taranov at clickhouse.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/test/CodeGen/X86/lea-opt-cse1.ll
M llvm/test/CodeGen/X86/lea-opt-cse2.ll
M llvm/test/CodeGen/X86/lea-opt-cse4.ll
M llvm/test/CodeGen/X86/lea-recursion.ll
A llvm/test/CodeGen/X86/lea-reuse-rip-relative.ll
A llvm/test/CodeGen/X86/pr51707.ll
Log Message:
-----------
[X86] Reapply #210739 with a fix (#212020)
This reapplies #210739, which was reverted in #211958 because it could
crash the backend with "Invalid rip-relative address" when an LEA added
a RIP-relative global and an already-materialized value.
Fixes #51707
Commit: 9572596c3951a5fef5eecc011c617c1b264357b7
https://github.com/llvm/llvm-project/commit/9572596c3951a5fef5eecc011c617c1b264357b7
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
A llvm/test/CodeGen/AArch64/sve-fixed-length-bf16-vselect.ll
Log Message:
-----------
[LLVM][CodeGen] Clean up uses of useSVEForFixedLengthVectorVT(). (#211605)
During lowering `useSVEForFixedLengthVectorVT` only serves to separate
NEON sized vectors from those made legal for SVE VLS. When no separation
is required there is no reason to call the function. That means
`useSVEForFixedLengthVectorVT(VT, /*OverrideNEON=*/true)` is largely
synonymous to `isSVEorStreamingSVEAvailable()`.
`useSVEForFixedLengthVectorVT` is not a per operation property. For this
reason I have removed the AllowBF16 parameter and replaced it by a
command line option that can be used during SVE VLS bfloat bringup. The
one existing use has been removed because it falls under the previous
issue in there being no need to call `useSVEForFixedLengthVectorVT`.
Commit: c154f4aa5483915702d8447d541d5d9a4dfaac46
https://github.com/llvm/llvm-project/commit/c154f4aa5483915702d8447d541d5d9a4dfaac46
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
Log Message:
-----------
AMDGPU: Remove dead FEATURE_FP64/FEATURE_LDEXP from ArchFeatureKind (#212479)
No GPU ever sets these bits, and clang's hasFP64()/hasLDEXPF()
short-circuit on isAMDGCN() before testing them, so the bits are
never observed.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: e432cb12962f1619bc73c50a2dc4d2ad5ac6b44c
https://github.com/llvm/llvm-project/commit/e432cb12962f1619bc73c50a2dc4d2ad5ac6b44c
Author: Natanael Cintean <natanael.cintean at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/test/IR/invalid-properties.mlir
M mlir/test/IR/properties.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[mlir]Add resultSegmentSizes/operandSegmentSizes to prop-dict. (#211222)
`setPropertiesFromParsedAttr` (generated by `OpFormatGen.cpp` for ops
using a custom `assemblyFormat`) rejects the trait-injected
`operandSegmentSizes` /. `resultSegmentSizes` properties when they
appear in a `prop-dict`, even though the printer emits them there for ops
whose format uses a bulk operand/result type directive
(`type(operands)`, `type(results)`, `functional-type(operands, results)`).
This breaks round-tripping: any op combining `AttrSizedOperandSegments`
/ `AttrSizedResultSegments` with such a bulk directive fails to re-parse
its own printed output, because printer-side elision of these keys
(introduced in #115930) is intentionally skipped in that case — the
sizes can't be reconstructed from individually-typed operand/result
groups, so they must survive in the text, but the custom parser was never
taught to read them back.
`setPropertiesFromAttr` (used by the generic-form parser, bytecode, and
C++ construction) already special-cases these two keys, so this change
makes `setPropertiesFromParsedAttr` mirror that behavior: keys are
accepted from the dictionary attr when the corresponding trait is present,
and required exactly when the format can't reconstruct the sizes itself
(i.e. when `fmt.allOperands` / `fmt.allResultTypes` is true). Otherwise the
key remains optional, since `genParserVariadicSegmentResolution`
overwrites it with the sizes inferred from the parsed operand/result
groups.
The contents of the PR as well as description has been made using
github-copilot. However I've reviewed the contents and tested locally
the change.
Fixes #211220
Commit: 89d39f69cb18f21d92b261cc0ca2a2314453b1fe
https://github.com/llvm/llvm-project/commit/89d39f69cb18f21d92b261cc0ca2a2314453b1fe
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/branch-nested.ll
Log Message:
-----------
[SimplifyCFG] Bail out on trivial cases in `mergeNestedCondBranch` (#212309)
Closes https://github.com/llvm/llvm-project/issues/212300.
When BB3 is identical to BB4, it is no longer profitable to perform this
fold, since it creates an unused xor instruction. The DomTree update
issue is also easy to fix. But I think this solution is better.
The following IR was dumped just before this function:
```
define void @func(i1 %cond1, i1 %cond2, i1 %cond3) {
entry:
br i1 %cond1, label %bb2, label %else
else: ; preds = %entry
br i1 %cond2, label %bb0, label %common.ret
bb0: ; preds = %else
br i1 %cond1, label %bb1, label %bb2
bb2: ; preds = %bb0, %entry
br i1 %cond3, label %common.ret, label %common.ret
bb1: ; preds = %bb0
br i1 %cond3, label %common.ret, label %common.ret
common.ret: ; preds = %bb2, %bb1, %bb2, %bb1, %else
ret void
}
```
The previous functions will simplify it. So the reproducer cannot be
further reduced.
Commit: 857746b37949a87faa42faff4fae12c35b34db51
https://github.com/llvm/llvm-project/commit/857746b37949a87faa42faff4fae12c35b34db51
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-extended-image.hip
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/builtins-extended-image.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
A clang/test/SemaOpenCL/builtins-extended-image-supported.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
AMDGPU: Fix missing extended-image-insts missing from feature map (#212418)
Unsurprisingly, this manually maintained table is buggy.
fillAMDGCNFeatureMap never set extended-image-insts, so clang's builtin
feature check rejected every case. The tests were working around this
with manually specified -target-features flags.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 34be3a62bf9a309fb00a4a2ec2150fa87750ad96
https://github.com/llvm/llvm-project/commit/34be3a62bf9a309fb00a4a2ec2150fa87750ad96
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M offload/unittests/OffloadAPI/queue/olLaunchHostFunction.cpp
Log Message:
-----------
[OFFLOAD][L0][NFC] Mark as skip unittest with driver issue (#212466)
Commit: 8d632c0a8eef06b7be509d10a6d87c9bd814a10e
https://github.com/llvm/llvm-project/commit/8d632c0a8eef06b7be509d10a6d87c9bd814a10e
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86InsertX87Wait.cpp
M llvm/test/CodeGen/X86/zero-call-used-regs.ll
Log Message:
-----------
[X86] Don't clobber x87 return values when zeroing call-used registers (#211129)
### Summary
`-fzero-call-used-regs=all` / `zero_call_used_regs("all")`
unconditionally push eight `fldz` onto the x87 stack before returning.
When a value is live in `ST0` (`long double`) or `ST0:ST1` (`_Complex
long double`), the pushes overflow the 8-slot x87 stack and the return
value becomes an indefinite NaN. Reproduces on x86-64 at every
optimization level, via both the flag and the attribute.
```c++
__attribute__((zero_call_used_regs("all")))
long double g(long double a) { return a + 1; }
// g(1.0L) returns nan, expected 2.0
```
### Root cause
The x87 return value lives in `ST0` (and `ST1` for `_Complex long
double`), but the FP stackifier's `handleReturn` deletes the `RET`'s FP
register operands after stackification (the `FP0`-`FP6` pseudos no
longer exist) without recording that the top of the x87 stack is live.
The scrub in `emitZeroCallUsedRegs` therefore has nothing telling it
`ST0` is occupied, so it pushes a zero over the return value.
### Fix
`handleReturn` now re-records the returned values as implicit
`ST0`/`ST1` uses on the return instruction — the same way every other
return register (`RAX`, `XMM0`, ...) is modeled — and
`emitZeroCallUsedRegs` pushes only `8 - live` zeros, filling the dead
slots and leaving the return value intact. This matches GCC.
Note: the implicit `ST0`/`ST1` operands are recorded on every
x87-returning `RET`, not only under `zero-call-used-regs`. One
consequence is that a `RET` now satisfies `isX87Instruction`, so
`X86InsertX87Wait` is adjusted so a return no longer suppresses the
strict-FP `wait` (a return performs no exception sync).
### Secondary fix (i386)
The old count was hardcoded `ST.is64Bit() ? 8 : 7`. On i386, a function
with no x87 value live at the return (e.g. an integer return) cleared
only seven of the eight physical x87 registers, so `"all"` silently left
one call-used register uncleared. The unified `8 - live` formula fixes
this too: i386 with no x87 return now pushes 8 (previously 7).
### Tests
`zero-call-used-regs.ll` adds `all_x87_return` (`x86_fp80`, 1 live -> 7
pushes), `all_x87_complex_return` (`_Complex long double`, 2 live -> 6
pushes), and `all_no_x87_live` (no x87 live -> 8 pushes, guarding the
i386 secondary fix). The full X86 CodeGen suite passes.
Fixes #211064
Assisted-by: Cursor
Commit: 2c01f3cb3caf2dfcdcd65ced4ec124a672465cb5
https://github.com/llvm/llvm-project/commit/2c01f3cb3caf2dfcdcd65ced4ec124a672465cb5
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Transforms/BUILD.bazel
Log Message:
-----------
[BUILD]Fixes 9a543446 (#212499)
[BUILD]Fixes 9a543446
Commit: 3d325269ece14bfb98af65443c8d345d6434bdee
https://github.com/llvm/llvm-project/commit/3d325269ece14bfb98af65443c8d345d6434bdee
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
[offload][lit] Run check-offload as part of check-all (#212500)
It's unclear why these were excluded from `check-all`, but we made all
tests pass on Level Zero and our local testing shows they pass on AMD
and NVIDIA too, so enable it by default.
Context: https://github.com/llvm/llvm-project/pull/211633
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 7d4160e52ba0e06d1450fa8e9c31518c0e58895c
https://github.com/llvm/llvm-project/commit/7d4160e52ba0e06d1450fa8e9c31518c0e58895c
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
Log Message:
-----------
[AMDGPU] Stop rounding up LDS block size for gfx950 (#208046)
The AMDGPUAsmPrinter::getSIProgramInfo function calculates the number of
LDS blocks in a somewhat indirect way: It obtains the LDS granularity
from another function, determines an "LDSAlignShift" based on this and
then uses shifts to determine the alignment and for division. The use of
shifts forces the alignment to be a power of two which works for all LDS
granularity values except for the value of 1280 bytes used for gfx950.
For this, the function uses LDSAlignShift = 11 which means that the
block size gets rounded up to 2048. This implies that the computed
number of LDS blocks is too small.
Remove the use of LDSAlignShift from getSIProgramInfo and use the LDS
granularity directly for alignment and division.
Commit: 298355525c28343fecdee28b0cf75c8d94e96952
https://github.com/llvm/llvm-project/commit/298355525c28343fecdee28b0cf75c8d94e96952
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/hip-link-offload-binary.c
Log Message:
-----------
[HIP] Support device-only linking of bitcode offload binaries (#212342)
The new offload driver packages multi-architecture bitcode in LLVM
offload binaries. A later `--hip-link --offload-device-only`
invocation treated these `.bc` inputs as host LLVM IR and dropped
them before linking.
Pass these inputs directly to clang-linker-wrapper when producing a
device fat binary. The wrapper can then extract and link each
requested GPU architecture.
Commit: b976ce0867d1f828863c61899c5d779f2bd4bfff
https://github.com/llvm/llvm-project/commit/b976ce0867d1f828863c61899c5d779f2bd4bfff
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
Revert "[offload][lit] Run check-offload as part of check-all" (#212506)
Reverts llvm/llvm-project#212500
Commit: 56fd82467c5b5a98411c02df1957528aaf57b487
https://github.com/llvm/llvm-project/commit/56fd82467c5b5a98411c02df1957528aaf57b487
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/Verifier/AMDGPU/alloca.ll
M llvm/test/Verifier/AMDGPU/reqd-work-group-size.ll
Log Message:
-----------
AMDGPU: Migrate verifier tests to subarch triples (#212494)
Commit: 55076d312e30e28c9440fc25b9e60bb7764c1540
https://github.com/llvm/llvm-project/commit/55076d312e30e28c9440fc25b9e60bb7764c1540
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_constant_global_redzones.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_global_redzones.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_lds.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_scratch.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_constant_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_global_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/global_metadata_addrspacecasts.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_lds_globals.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_scratch_globals.ll
Log Message:
-----------
AMDGPU: Migrate asan tests to subarch triples (#212496)
Commit: 455ef3684fae3273b3423bb0229e33584745c6cc
https://github.com/llvm/llvm-project/commit/455ef3684fae3273b3423bb0229e33584745c6cc
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/include/fstream
M libcxx/src/ios.instantiations.cpp
A libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/test.dat
A libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/xsgetn.buffer.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
Log Message:
-----------
[libc++] Fix ungetc failing after xsgetn (#210951)
After #206453 we don't correctly handle `unget()` anymore. This fixes
the issue by updating the internal buffer to contain the tail of the
read data.
Fixes #210203
Commit: 371b78a9638d4fcea397af5a318b1f3d562b20fa
https://github.com/llvm/llvm-project/commit/371b78a9638d4fcea397af5a318b1f3d562b20fa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
Log Message:
-----------
AMDGPU: Migrate assembler tests with content changes to subarch triples (#212495)
Convert tests which failed after converting the arguments due to content
changes from checking the emitted target id string.
Commit: 5a650306e4e1069d194d8fcfeee821d7e424f9b3
https://github.com/llvm/llvm-project/commit/5a650306e4e1069d194d8fcfeee821d7e424f9b3
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
A clang/test/Driver/Inputs/spirv64-sycl/lib/spirv64-unknown-unknown/libclang_rt.builtins.bc
A clang/test/Driver/sycl-device-lib-spirv64.cpp
M clang/test/Driver/sycl-offload-jit-unix.cpp
M clang/test/Driver/sycl-offload-jit-xarch.cpp
M clang/test/Driver/sycl-offload-jit.cpp
M clang/test/Driver/sycl-print-internal-defines.cpp
M clang/test/Driver/sycl-rtlib-sysroot-mismatch.cpp
M clang/test/Driver/sycl-std-default.cpp
M clang/test/Driver/sycl-windows.cpp
M clang/test/Driver/sycl.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[Driver][SYCL] Add compile-time device library linking for SPIR-V targets (#196656)
This PR implements compile-time device library linking for SYCL
offloading to SPIR-V targets, using `libclang_rt.builtins.bc` - an
in-tree compiler-rt artifact produced alongside the existing
`libclang_rt.builtins.a` for `SPIRV64`.
## Motivation
SYCL device compilations targeting SPIR-V need access to compiler
builtins (integer arithmetic, floating-point helpers, etc.) at compile
time so the compiler can optimize across user code and builtins, inline
aggressively, and eliminate dead code. This PR lays the foundation by
wiring up the first in-tree device library : `libclang_rt.builtins.bc` -
using the same `-mlink-builtin-bitcode` mechanism already used by
`libclc` and `HIP`.
## Changes
**compiler-rt (compiler-rt/lib/builtins/CMakeLists.txt)**
For the `spirv64` target, after building
`libclang_rt.builtins-spirv64.a`, runs `llvm-link` to merge all bitcode
objects into a single `libclang_rt.builtins.bc`. This file is installed
to `<ResourceDir>/lib/spirv64-unknown-unknown/` alongside the static
archive. The `-mlink-builtin-bitcode` flag requires raw LLVM IR and
cannot unpack a static archive directly, hence the extra step.
**Clang Driver (clang/lib/Driver/ToolChains/SYCL.cpp)**
`SYCLToolChain::getDeviceLibs()` now constructs the path to
`libclang_rt.builtins.bc` under the clang resource directory and returns
it for `-mlink-builtin-bitcode` injection during `spirv64` device
compilation. If the file is absent (e.g. compiler-rt was not built with
spirv64 support), a specific diagnostic is emitted. Linking is
suppressed when `--no-offloadlib` is passed.
**Diagnostics (clang/include/clang/Basic/DiagnosticDriverKinds.td)**
Added `err_drv_no_compiler_rt_builtins_bc`, following the
`err_drv_libclc_not_found` community pattern, with actionable guidance
on how to build compiler-rt with SPIR-V support.
### Test Infrastructure
1. `clang/test/Driver/sycl-device-lib-spirv64.cpp` - new test verifying
-mlink-builtin-bitcode is passed for spirv64, suppressed with
--no-offloadlib, and that a missing .bc produces the correct diagnostic.
2. `clang/test/Driver/Inputs/spirv64-sycl/` - dummy resource-dir fixture
used by driver tests.
3. All existing SYCL driver tests updated to pass -`resource-dir
%S/Inputs/spirv64-sycl `on -fsycl RUN lines, making them independent of
the installed clang resource directory on CI runners.
## Behavior
### Default
```bash
clang -fsycl myprogram.cpp
# Device compilation includes:
# "-mlink-builtin-bitcode" "<ResourceDir>/lib/spirv64-unknown-unknown/libclang_rt.builtins.bc"
```
Automatically links device libraries from `<clang-install>/lib/` during
device compilation.
### Without device libraries
```bash
clang -fsycl --no-offloadlib myprogram.cpp
# -mlink-builtin-bitcode is suppressed
```
Missing .bc (compiler-rt not built with spirv64 support)
```bash
error: no compiler-rt builtins bitcode library '...' found in the clang resource directory;
build compiler-rt with SPIR-V support or pass '--no-offloadlib' to compile without it ```
Commit: e362f3c8466dfb4021d409f50eae179b9b0b1957
https://github.com/llvm/llvm-project/commit/e362f3c8466dfb4021d409f50eae179b9b0b1957
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/environ_internal.cpp
M libc/src/stdlib/environ_internal.h
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/putenv.cpp
A libc/src/stdlib/putenv.h
M libc/test/integration/src/stdlib/CMakeLists.txt
A libc/test/integration/src/stdlib/putenv_test.cpp
Log Message:
-----------
[libc][stdlib] Add putenv (#208339)
Added the POSIX putenv() function and its internal support.
Implemented EnvironmentManager::put() to insert caller-provided
"name=value" strings directly into the environment array, managing
ownership correctly (caller retains ownership).
Registered for x86_64, aarch64, and riscv. Integration tests cover basic
operations, ownership semantics, validation, and edge cases.
Assisted-by: Automated tooling, human reviewed.
Commit: 7cf62f99cd707d09f4dab5f999cb1ce5d57d25a5
https://github.com/llvm/llvm-project/commit/7cf62f99cd707d09f4dab5f999cb1ce5d57d25a5
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/memory.yaml
A libc/include/sys/fcntl.yaml
A libc/include/sys/poll.yaml
A libc/include/sys/signal.yaml
A libc/include/sys/unistd.yaml
Log Message:
-----------
[libc] Add POSIX redirection header specifications in YAML (#211859)
Add header YAML specifications for memory.h, sys/poll.h, sys/unistd.h,
sys/fcntl.h, and sys/signal.h using public_includes.
POSIX.1-2017 and historical X/Open System Interfaces (XSI) standards
define these headers as alternate or legacy header locations that
forward to string.h, poll.h, unistd.h, fcntl.h, and signal.h
respectively. The YAML header specs allow hdrgen to generate the public
headers automatically with proper license headers and guards.
Updated Linux target headers.txt configuration files to register the new
public header targets for installation.
Assisted-by: Automated tooling, human reviewed.
Commit: 557dcec6258aac87f9c2bb6d651ec7e774f7d09d
https://github.com/llvm/llvm-project/commit/557dcec6258aac87f9c2bb6d651ec7e774f7d09d
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/VE/VEInstrPatternsVec.td
M llvm/test/CodeGen/VE/Packed/vp_mul.ll
Log Message:
-----------
[VE] Fix crash when splitting all-ones v512i1 mask (#212489)
The added test case crashes because we try to extract a subreg from vmp0
when selecting vec_unpack_*, but vmp0 has no subregisters, see
d46e49838e17800cb72d95db1b23c04bbca610e2
vmp0 is hardwired to all ones, so it gets selected for an all ones mask.
Fix it by adding an explicit pattern for an all ones mask that selects
vm0, the v256i1 version of vmp0, instead of creating an invalid subreg
extract.
Commit: b6b9603c7675fff5ec9befacf54391a516fc723c
https://github.com/llvm/llvm-project/commit/b6b9603c7675fff5ec9befacf54391a516fc723c
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/long-jmp-one-stub.s
Log Message:
-----------
[RFC][BOLT] Enable lite mode by default on AArch64 (#205545)
Commit: 760fc017332d4d5a5cdf1b6cf754f40774a97821
https://github.com/llvm/llvm-project/commit/760fc017332d4d5a5cdf1b6cf754f40774a97821
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
[offload][lit] Run check-offload-unit as part of check-all (#212513)
I tried to do `check-offload` instead but that
[caused](https://github.com/llvm/llvm-project/pull/212500) a bloodbath,
so just enable `check-offload-unit` as part of `check-all`.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 034f0f1ad4badc02d9d26b6f1ae3324a09276c4a
https://github.com/llvm/llvm-project/commit/034f0f1ad4badc02d9d26b6f1ae3324a09276c4a
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
R flang/test/Fir/arrexp.fir
M flang/test/Fir/basic-program.fir
Log Message:
-----------
[flang] Stop running array-value-copy in the default pipeline (#211816)
Since the removal of the legacy expression lowering (#210385, #210621,
#210639, #210873), nothing in flang produces the array-value operations
(fir.array_load and friends) that the array-value-copy pass legalizes,
so the pass runs as a guaranteed no-op on every function. Remove it from
the default pipeline (addAVC and the disable-avc mlir option); the pass
itself and its fir-opt tests remain and still run via fir-opt
--array-value-copy.
The array-value operations themselves and the pass are planned for
removal in follow-up patches.
flang/test/Fir/arrexp.fir is deleted rather than updated: it feeds
legacy array-value ops through tco's full pipeline, which no longer
legalizes them (the ops have no codegen patterns), and the file
exercises no live feature beyond that legalization.
Assisted-by: AI
Commit: 807de2dc44794205b336ed8b2ca4731bc3ab865b
https://github.com/llvm/llvm-project/commit/807de2dc44794205b336ed8b2ca4731bc3ab865b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/idot4-test.ll
M llvm/test/CodeGen/AMDGPU/no-corresponding-integer-type.ll
Log Message:
-----------
[AMDGPU] Stop iDot4 chain walker at non-ADD nodes (#198412)
The loop body in performAddCombine dot4 matcher unconditionally treats
TempNode operands as the next link's addends, so the chain only works
when TempNode is an `ISD::ADD`
The old getNumOperands() guard let AND/OR/XOR/etc. through, leaking
their non-addend operands (e.g. a constant mask) into the dot4
accumulator and miscompiling kernels
Commit: 1c31d28d1a1e746db9070c90ff40f8a6f53ff0db
https://github.com/llvm/llvm-project/commit/1c31d28d1a1e746db9070c90ff40f8a6f53ff0db
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/test/CIR/Transforms/mem2reg.cir
Log Message:
-----------
[CIR] Disallow mem2reg for volatile/atomic loads and stores (#212262)
Current mem2reg implementation for `cir.load` and `cir.store` does not
check whether the load/store is volatile or atomic. Fix this.
Commit: df89bcad92cd1a8539d85b200e89182f26743b6f
https://github.com/llvm/llvm-project/commit/df89bcad92cd1a8539d85b200e89182f26743b6f
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/TableGen/TGLexer.cpp
A llvm/test/TableGen/ifdef-cr-instead-of-newline.td
Log Message:
-----------
[TableGen] Treat carriage return as line end in prepSkipRegion (#212411)
`prepSkipRegion` currently only treats newline and EOF as end of line.
However, in the TableGen Programmer's Reference:
LineEnd ::= newline | return | EOF
So carriage return is a valid end-of-line, but `prepSkipRegion` ignores
it and skips code after the carriage return that it shouldn't. This
change fixes the end-of-line check in `prepSkipRegion` so that it also
treats carriage return as end of line.
Related issue: #151476.
Commit: 62f429ec6e85224a0f7fa6d4e51595b27e5ac9c1
https://github.com/llvm/llvm-project/commit/62f429ec6e85224a0f7fa6d4e51595b27e5ac9c1
Author: Emery Conrad <conrade.ctc at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/Interpreter/used-global-after-error.cpp
Log Message:
-----------
[clang][CodeGen] Skip deleted globals in emitUsed (#210959)
A global on the `llvm.used`/`llvm.compiler.used` list can be deleted
before the module is released: CodeGen erases an unreferenced
`GlobalValue` without RAUW when the same mangled name is redefined with
a different type (`GetOrCreateLLVMGlobal`), which nulls the
`WeakTrackingVH` on the used list — value handles are not uses, so the
`use_empty()` guard does not protect them.
In whole-TU compilation this is unobservable because the accompanying
`err_duplicate_mangled_name` suppresses `Release()`. The incremental
interpreter, however, clears the diagnostic state after the failed parse
and keeps building the same module, so the next successful parse runs
`Release()` and crashes in `emitUsed` dereferencing the dead handle:
```
clang-repl> __attribute__((used)) int a asm("sym") = 1; float b asm("sym") = 2.0f;
clang-repl> int ok = 0;
clang-repl: .../ValueHandle.h:95: llvm::Value& llvm::ValueHandleBase::operator*() const: Assertion `V && "Dereferencing deleted ValueHandle"' failed.
```
Out-of-tree incremental clients hit the same crash through other routes
that delete an emitted used global before module release (e.g.
CppInterOp's force-emission of reflection queries, see
compiler-research/CppInterOp#1068).
Fix: skip null handles when building the used array. The repro above is
included as a lit test; `clang/test/Interpreter`, `clang/test/CodeGen`,
and `clang/test/CodeGenCXX` pass locally.
🤖 Done with the help of [Claude Code](https://claude.com/claude-code)
(Fable 5, human in the loop)
Co-authored-by: Emery Conrad <emery.conrad at chicagotrading.com>
Commit: 0fc8ce3bb59ba1ebbb0aecf564158a0c145eeb50
https://github.com/llvm/llvm-project/commit/0fc8ce3bb59ba1ebbb0aecf564158a0c145eeb50
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/include/optional
Log Message:
-----------
[libc++][optional][NFC] Use variable templates instead of class templates (#212443)
Modernizing similar to: https://github.com/llvm/llvm-project/pull/199481
Commit: a69addf4fb640c34fa8249543003c375247c4933
https://github.com/llvm/llvm-project/commit/a69addf4fb640c34fa8249543003c375247c4933
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/include/__math/traits.h
M libcxx/include/cmath
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
A libcxx/test/std/numerics/c.math/isgreater.pass.cpp
A libcxx/test/std/numerics/c.math/isgreaterequal.pass.cpp
A libcxx/test/std/numerics/c.math/isless.pass.cpp
A libcxx/test/std/numerics/c.math/islessequal.pass.cpp
A libcxx/test/std/numerics/c.math/islessgreater.pass.cpp
A libcxx/test/std/numerics/c.math/isunordered.pass.cpp
Log Message:
-----------
[libc++][math] Add `constexpr` to comparison functions (#210075)
Implement `constexpr` to all comparison functions (`std::isgreater`,
`std::isgreaterequal`, `std::isless`, `std::islessequal`,
`std::islessgreater`, `std::isunordered`) as defined by
[P0533R9](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf).
Towards https://github.com/llvm/llvm-project/issues/105174. Follows-up
https://github.com/llvm/llvm-project/pull/94118.
Commit: 1cfc77fdd6368dd6527c620645ec6f351e1c658f
https://github.com/llvm/llvm-project/commit/1cfc77fdd6368dd6527c620645ec6f351e1c658f
Author: Petr Kurapov <petr.kurapov at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MIR2Vec.h
M llvm/lib/CodeGen/MIR2Vec.cpp
A llvm/test/CodeGen/MIR2Vec/Inputs/mir2vec_classless_vocab.json
A llvm/test/CodeGen/MIR2Vec/classless-physreg.mir
A llvm/test/CodeGen/MIR2Vec/classless-vreg.mir
Log Message:
-----------
[MIR2Vec] Handle registers without a register class (#212280)
getRegisterOperandIndex() hit an llvm_unreachable for registers in no
register class. That is a supported outcome, not an error: tablegen
emits InvalidRegClassID for such registers and getMinimalPhysRegClass()
returns nullptr. It hits classless physregs (X86 $mxcsr/$fpcw, AMDGPU
$mode), which crashed any function with FP math, and generic vregs
before ISel, where MRI.getRegClass() asserts -- so use
getRegClassOrNull().
Return std::nullopt instead. Both callers already handle the analogous
NoRegister and stack-slot cases, so the vocabulary layout is unchanged.
We could avoid the special casing by adding a special value for such
registers. It would actually hold some meaningful information for
models. I didn't include it in this patch since it would require seed
vocab re-generation.
Commit: 511502bfd869ebb74448bd3f67c6c0162507ef85
https://github.com/llvm/llvm-project/commit/511502bfd869ebb74448bd3f67c6c0162507ef85
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Strip dead code in optimizeEarlyExitIndUser (NFC) (#212463)
The check is already present in getOptimizableIVOf, and is an
impossiblity in the IVInc case.
Commit: 9876e0469e315b767c4ba114e7f51207d198e762
https://github.com/llvm/llvm-project/commit/9876e0469e315b767c4ba114e7f51207d198e762
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add SPIRVToLLVM conversion for VectorTimesScalar (#206949)
Commit: 88d26e71960579c5a7b40856664b1f57791597ce
https://github.com/llvm/llvm-project/commit/88d26e71960579c5a7b40856664b1f57791597ce
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A llvm/test/Transforms/ConstraintElimination/ne-tightening.ll
A llvm/test/Transforms/ConstraintElimination/srem.ll
Log Message:
-----------
[ConstraintElim] Add tests with SRem and NE predicates. (NFC (#212511)
Precommit tests for improved reasoning about SRem and NE predicates.
Commit: 326d563cf70d7f43d8c15eb78f65dd22c1fbdf87
https://github.com/llvm/llvm-project/commit/326d563cf70d7f43d8c15eb78f65dd22c1fbdf87
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/AST/ExprObjC.h
M clang/include/clang/Sema/SemaObjC.h
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/unittests/AST/SourceLocationTest.cpp
Log Message:
-----------
Tracks source location of the selector name within ObjCSelectorExpr (#211623)
Store selector name location alongside the existing @-sign and paren locations, exposed via getSelectorLoc(), so tools and diagnostics can reference the name rather than the @selector keyword. While here, rename things to disambiguate locations.
Commit: 98fb5dae73c3887e6659ee126b131b004d12592d
https://github.com/llvm/llvm-project/commit/98fb5dae73c3887e6659ee126b131b004d12592d
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/vfscanf_internal.h
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fscanf_test.cpp
Log Message:
-----------
[libc] Fix EOF handling in fscanf (#211982)
`fscanf` family of functions should return EOF if:
- end of input is reached before either the first successful conversion
or a matching failure occurs;
- a read error occurs.
This wasn't handled correctly before - in "system FILE" mode (in overlay
build) `EOF` return value from `getc` was passed through to parser,
violating `Reader` interface, which triggered infinite loops on
"while-not-EOF" `fscanf` loops. In llvm-libc-FILE mode `fscanf` simply
returned zero instead of EOF, because the code only checked error
indicator on a stream.
This PR removes _any_ lookups of eof/error indicators on an input stream
- instead we can simply rely on the `getc` (system or internal) function
behavior, which returns `EOF` on unsuccessful reads.
Extend the test cases for `fscanf` to cover various return values in
cases when `EOF` is reached (before or after conversions / matching
errors).
Commit: 687818b3fbab242132b91ed2a1815507a7b2a371
https://github.com/llvm/llvm-project/commit/687818b3fbab242132b91ed2a1815507a7b2a371
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
R llvm/docs/BugpointRedesign.md
M llvm/docs/GettingInvolved.md
Log Message:
-----------
[Docs] Delete BugpointRedesign (#212518)
Bugpoint was removed recently, so this does not make sense to keep
around.
Commit: 8efaaf1811f13ea3255ec352a812af949e216d99
https://github.com/llvm/llvm-project/commit/8efaaf1811f13ea3255ec352a812af949e216d99
Author: Mishal Shah <mishal_shah at apple.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[premerge] Build and check runtimes on macOS premerge (#210852)
Compute and pass through LLVM_ENABLE_RUNTIMES and the corresponding
check targets for the macOS premerge job, mirroring existing support for
projects.
Commit: 9ec13f1b2b8701167d428124048cb2cec2366bfa
https://github.com/llvm/llvm-project/commit/9ec13f1b2b8701167d428124048cb2cec2366bfa
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 98fb5da (#212522)
This fixes 98fb5dae73c3887e6659ee126b131b004d12592d (#211982).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=98fb5dae73c3887e6659ee126b131b004d12592d
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 8ea8a288d3a4a446c2229c9d8f682723dd33eee5
https://github.com/llvm/llvm-project/commit/8ea8a288d3a4a446c2229c9d8f682723dd33eee5
Author: Keno Fischer <keno at juliahub.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopConstrainer.h
M llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/test/Transforms/IRCE/compound-loop-bound.ll
A llvm/test/Transforms/IRCE/expansion-cleanup-analysis-invalidation.ll
Log Message:
-----------
[IRCE] Discard speculative SCEV expansions when bailing out (#211089)
LoopStructure::parseLoopStructure materializes SCEVs in the preheader
while merely analyzing the loop, and LoopConstrainer::run expands its
exit limits before all of its bail-out points have been passed. When a
later check failed, those expansions were left behind: the pass mutated
the IR while reporting the function unchanged, which leaves stale
analyses behind (observable with -verify-analysis-invalidation) and
produces dead instructions that differ depending on how far the analysis
got.
Fix this by having callers own the SCEVExpander passed to
parseLoopStructure and wrapping both expanders (IRCE's and
LoopConstrainer::run's) in a SCEVExpanderCleaner whose result is only
marked used once the transformation is guaranteed to proceed. Value
names ("indvar.start", "exit.preloop.at") are now applied only at that
point, since the expander may have reused pre-existing values that must
not be renamed when the transformation is abandoned.
Also return the correct Changed value from
InductiveRangeCheckElimination::run when subrange computation fails,
since earlier steps may already have modified the function.
Co-authored-by: Claude Fable 5 <noreply at anthropic.com>
Commit: 9a7284cedd2c75a7d53e44a49bfa03bfc0c27cae
https://github.com/llvm/llvm-project/commit/9a7284cedd2c75a7d53e44a49bfa03bfc0c27cae
Author: satyanarayana reddy janga <satyajanga at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceDumpInstructions.py
M lldb/test/API/commands/trace/TestTraceExport.py
M lldb/test/API/commands/trace/TestTraceSave.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
Log Message:
-----------
[lldb] Fix trace test assertions after error-message style change (#212372)
Commit 820f4402745d ([lldb] Correct style of error messages, #156774)
changed the "process is not being traced" error emitted by
CommandObject::CheckRequirements from "Process is not being traced." to
"process is not being traced" (lowercase, no trailing period), but did
not update the trace API tests that assert on that string.
These tests only run when the intel-pt plugin is enabled and the host
has Intel PT support (TraceIntelPTTestCaseBase.setUp skips otherwise),
so they are skipped on most buildbots and the stale assertions went
unnoticed. Update all five affected tests to match the new message.
Commit: 4b1cd29ffb39ea94590869657e9170230155a979
https://github.com/llvm/llvm-project/commit/4b1cd29ffb39ea94590869657e9170230155a979
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ThreadSafetyAnalysis.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/test/SemaCXX/warn-thread-safety-parsing.cpp
Log Message:
-----------
Thread Safety Analysis: Don't treat function pointer parameters as scoped capabilities (#211885)
Capability attributes on a parameter mean one of two unrelated things:
on a scoped-lockable parameter they describe the locks the passed scope
object holds, while on a function pointer parameter they describe the
requirements of the function called through the pointer. Since #191187
allowed the latter, both of the scoped-lockable code paths have been
misreading function pointer parameters as scope objects.
At a call site, the argument bound to the parameter was translated into
a capability and required to be held, so passing a callback that
requires a capability was reported as a missing lock named after the
callback:
```
void apply(fn_t fn EXCLUSIVE_LOCKS_REQUIRED(mu));
static int my_fn() EXCLUSIVE_LOCKS_REQUIRED(mu);
...
apply(my_fn); // warning: requires holding mutex 'fn'
```
In the callee, the same confusion seeded the parameter's capabilities
into the function's entry lockset, so they were considered held
throughout the body and the calls made through the pointer went
unchecked -- the opposite of what the annotation asks for.
Skip function pointer parameters in both places; their attributes are
already checked at the indirect call sites (by #191187), the same way as
for annotated function pointer variables and fields.
Assisted-by: Claude Opus 5
Commit: 54eb229d48a45b61cd93a795c7e95443c3a73c26
https://github.com/llvm/llvm-project/commit/54eb229d48a45b61cd93a795c7e95443c3a73c26
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
R llvm/test/CodeGen/PowerPC/fp-classify-nan.ll
Log Message:
-----------
Revert "[PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict" (#212509)
The PR https://github.com/llvm/llvm-project/pull/204170 cause a
regression on the test_suite fail as
Check '!__builtin_issignaling(X)' in file
'/home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-test-suite/clang-ppc64le-test-suite/test/test-suite/SingleSource/UnitTests/Float/classify-f32.h'
at line 101 failed for the value '7fffffff'
This patch reverts the PR
https://github.com/llvm/llvm-project/pull/204170.
, we will reland a new version fix of "improve performance on the isNan
and !isNan function in case of -ffp-model=strict" later after the
regression is fixed.
Commit: 40d457bf353c9f5f3e9a187ee8f24327ab61fe1a
https://github.com/llvm/llvm-project/commit/40d457bf353c9f5f3e9a187ee8f24327ab61fe1a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
Log Message:
-----------
[gn] Port 1e1274b2ddfe (R600TargetParserDef.inc) (#212525)
Commit: ec1015a98216f83bb93b46935f4d096b80ba88e8
https://github.com/llvm/llvm-project/commit/ec1015a98216f83bb93b46935f4d096b80ba88e8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port de962dda1251 (#212526)
Commit: 2db6978f724bfb0f9ae6f37b8ea585c707e65ce8
https://github.com/llvm/llvm-project/commit/2db6978f724bfb0f9ae6f37b8ea585c707e65ce8
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session.py
A lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_win_debug_heap.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/runInTerminal/main.c
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap][Windows] Respect debug-heap setting when launching (#212290)
In #212126, a setting was added to control the heap used when debugging
on Windows. By default, we disable the debug-heap with
`_NO_DEBUG_HEAP=1`. When launching a program from lldb-dap with
`integratedTerminal` or `externalTerminal`, we need to tell the client
about that variable.
This adds the variable in the runInTerminal reverse request if needed.
Closes #201690.
Commit: 3a30af978df0b6f39505fd702f4bfd55b3adb96c
https://github.com/llvm/llvm-project/commit/3a30af978df0b6f39505fd702f4bfd55b3adb96c
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M openmp/device/include/DeviceTypes.h
Log Message:
-----------
[OpenMP][offload] Fix Global addrspace (#212529)
Commit: 65e373abbb7bd39b242ae3c0e9ce647c1aedf607
https://github.com/llvm/llvm-project/commit/65e373abbb7bd39b242ae3c0e9ce647c1aedf607
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/cmake/config-ix.cmake
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
Log Message:
-----------
[Darwin] Improve ld64 based configs (#212329)
Improve and fix the llvm configurations so that:
* Do not look for ld64 when building or testing. The new apple linker is
compatible with the classic ld64 and the ld64 is removed in Xcode 27.
Build and test should not fall back to ld64 or use `-ld-classic`.
* For LTO lit tests, they will fail if `CMAKE_OSX_SYSROOT` is not
specified. Fix the tests so that inferred SYSROOT also work with those
tests.
Commit: 4674ce3fe91a0edea6cf780332891575af0884e9
https://github.com/llvm/llvm-project/commit/4674ce3fe91a0edea6cf780332891575af0884e9
Author: Alok Kumar Sharma <AlokKumar.Sharma at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
A llvm/test/Transforms/SimplifyCFG/switch-default-fold-weight-overflow.ll
Log Message:
-----------
[SimplifyCFG] Fix branch-weight overflow when folding switch case into default (#212520)
The overflow guard added in #178964 for merging a switch case's weight
into the default's calls fitWeights() to downscale the weights, but the
returned value was never assigned back to Weights, so the downscale
didn't take effect. As a result, a default+case sum that overflows
uint64_t would wrap around, turning a dominant default weight into a
small, incorrect one.
Assign fitWeights()'s result back to Weights before the addition so the
downscale takes effect as intended.
Commit: 462b109cbcfe5d8adb46af4e6f82dc96c0a5c9f7
https://github.com/llvm/llvm-project/commit/462b109cbcfe5d8adb46af4e6f82dc96c0a5c9f7
Author: Patryk Stefanski <patryk.stefanski at protonmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
A clang/test/ExtractAPI/invalid_utf8_doc_comment.c
Log Message:
-----------
[clang][ExtractAPI] Fix assertion on invalid UTF-8 in doc comments (#212394)
A doc comment can contain invalid UTF-8. The raw bytes reach
serializeDocComment, which assigned them to a llvm::json::Value,
tripping its valid-UTF-8 assertion. This is hit by legacy headers that
are not UTF-8 encoded, which compile fine but crash -extract-api.
Sanitize with json::isUTF8/fixUTF8 before serializing.
Fixes #212393
Commit: 4d575e790fef3995b23d6838e4ce557d2f9b5b98
https://github.com/llvm/llvm-project/commit/4d575e790fef3995b23d6838e4ce557d2f9b5b98
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/test/ELF/aarch64-thunk-align.s
M lld/test/ELF/aarch64-thunk-bti-execute-only.s
M lld/test/ELF/aarch64-thunk-bti-multipass.s
M lld/test/ELF/aarch64-thunk-bti.s
M lld/test/ELF/aarch64-thunk-script.s
A lld/test/ELF/aarch64-thunk-sort.s
M lld/test/ELF/arm-bl-v4t.s
M lld/test/ELF/arm-branch-rangethunk.s
M lld/test/ELF/arm-force-pi-thunk.s
M lld/test/ELF/arm-thumb-condbranch-thunk.s
M lld/test/ELF/arm-thumb-interwork-shared.s
M lld/test/ELF/arm-thumb-interwork-thunk.s
M lld/test/ELF/arm-thumb-mix-range-thunk-os.s
M lld/test/ELF/arm-thumb-plt-range-thunk-os.s
M lld/test/ELF/arm-thumb-range-thunk-os-no-ext.s
M lld/test/ELF/arm-thumb-range-thunk-os.s
M lld/test/ELF/arm-thunk-arm-thumb-reuse.s
M lld/test/ELF/arm-thunk-linkerscript-dotexpr.s
M lld/test/ELF/arm-thunk-linkerscript-orphan.s
M lld/test/ELF/arm-thunk-linkerscript.s
M lld/test/ELF/arm-thunk-re-add.s
M lld/test/ELF/hexagon-thunk-range-b22rel.s
M lld/test/ELF/ppc32-call-stub-nopic.s
M lld/test/ELF/ppc32-call-stub-pic.s
M lld/test/ELF/ppc32-long-thunk.s
M lld/test/ELF/ppc64-call-reach.s
M lld/test/ELF/ppc64-ifunc.s
M lld/test/ELF/ppc64-long-branch-pi.s
M lld/test/ELF/ppc64-long-branch-rel14.s
M lld/test/ELF/ppc64-long-branch.s
Log Message:
-----------
[ELF] Sort forward thunks by destination to prevent convergence failures (#211721)
A thunk's distance to a forward destination grows when a thunk after it
grows.
For
```
[forward A B C] dstA dstB dstC
```
When all thunks are initially short, promoting C can push B to be
enlarged on the following pass, which in turn pushes A to be promoted on
the following pass. Promoting just one thunk on a pass can therefore
trigger "address assignment did not converge".
Sort each ThunkSection once pass 0 has created its thunks. A forward
thunk's distance grows only when a thunk after it grows, so order
forward thunks by descending destination. A backward thunk's distance
grows only with a promotion before it, already applied when we reach
it, so backward thunks need no ordering; partition them ahead of the
forward thunks in creation order.
Tests that depend on creation order are pinned with -z nosort-thunks;
they can be migrated individually, after which the option can be
removed.
Fixes #61250
Co-authored-by: Pranav Kant <prka at google.com>
Commit: eae09240391b592e89719ca53c1b45ab4e124772
https://github.com/llvm/llvm-project/commit/eae09240391b592e89719ca53c1b45ab4e124772
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaType.cpp
A clang/test/SemaCXX/ms-ptr-qualifiers.cpp
M clang/test/SemaCXX/wasm-funcref.cpp
Log Message:
-----------
[clang][Sema] Preserve CV qualifiers when applying pointer and funcref attributes (#211709)
This patch fixes a bug in handleMSPointerTypeQualifierAttr and
HandleWebAssemblyFuncrefAttr where applying these pointer attributes
would implicitly drop top-level CV qualifiers (like `const`, `volatile`,
and `restrict`) from the pointer type.
Commit: d5c35335fbd694e254294fbafd25ce7926230a3e
https://github.com/llvm/llvm-project/commit/d5c35335fbd694e254294fbafd25ce7926230a3e
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][Windows] Cleanup release notes (#212527)
The other release notes were meant for the 23 release.
Commit: 8ea9597ccb04253c5b46b3c967ee7b5092d6dd7c
https://github.com/llvm/llvm-project/commit/8ea9597ccb04253c5b46b3c967ee7b5092d6dd7c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/include/__memory/allocator.h
M libcxx/include/bitset
Log Message:
-----------
[libc++] Defer removal of two escape hatches to LLVM 25 (#211553)
Rather than removing the escape hatches for trivially default
constructible allocator and bitset's const reference type in LLVM 24,
keep them around for another release since they have not been widely
deployed yet.
Commit: 15b9ee4ee263e8c6c98e89ed7b33ff35cf540255
https://github.com/llvm/llvm-project/commit/15b9ee4ee263e8c6c98e89ed7b33ff35cf540255
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++] Drop char8_t instantiation from string benchmarks (#212283)
The string benchmarks instantiated every benchmark for char, char8_t and
wchar_t. char8_t exercises the same code paths as char, so drop it to
get roughly a 30% speedup on this benchmark time.
Commit: 583a958f83d813da3e2d9e801304d58de2493b62
https://github.com/llvm/llvm-project/commit/583a958f83d813da3e2d9e801304d58de2493b62
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
Log Message:
-----------
[libc++] Reduce sequence container benchmark size ladder (#212281)
The sequence containers were registered for 32, 1024 and 8192. This
patch drops the mid-size point to get roughly a 30% speedup when running
the benchmarks.
Commit: 2db82ed13cce7d09a32053030965e404ca63cfcf
https://github.com/llvm/llvm-project/commit/2db82ed13cce7d09a32053030965e404ca63cfcf
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/test/CMakeLists.txt
M mlir/test/Unit/lit.site.cfg.py.in
M mlir/test/lit.site.cfg.py.in
Log Message:
-----------
[mlir] Make lit site configs relocatable (#212406)
Follow the same pattern as all the other test suites where the PATHS
option to configure_lit_site_cfg and the path() function in the lit site
config are used to make site configs relocatable.
Commit: 266f2b372453463b6ff8d281d4c9fbdb640eaa1a
https://github.com/llvm/llvm-project/commit/266f2b372453463b6ff8d281d4c9fbdb640eaa1a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] port 65e373abbb7b (#212548)
Commit: 65418144ffa87d65d99d649b215f6376b6fad4a7
https://github.com/llvm/llvm-project/commit/65418144ffa87d65d99d649b215f6376b6fad4a7
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/call-decisions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/partial-reduce-usabs.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/single-scalar-cast.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/VPlan/PowerPC/vplan-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/scalarize-wide-load-for-address-use.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/find-last.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/phi-with-fastflags-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/print-attributes.ll
M llvm/test/Transforms/LoopVectorize/VPlan/scalarize-irregular-type-memops.ll
M llvm/test/Transforms/LoopVectorize/VPlan/simplify-reverse-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-alias-mask.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions-tail-folded.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-widen-struct-return.ll
M llvm/test/Transforms/LoopVectorize/VPlan/widen-canonical-iv-register-pressure.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-small-size.ll
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/vplan.ll.expected
Log Message:
-----------
[NFC][VPlan] Print element type for vector[-end]-pointer recipes (#212332)
Commit: 833951e349498bbe81721620ca549699117f7040
https://github.com/llvm/llvm-project/commit/833951e349498bbe81721620ca549699117f7040
Author: Pranav Kant <prka at google.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/Instrumentation/Instrumentor/inline_runtime.ll
Log Message:
-----------
[test] Use temp directory for output (#212379)
Test was added in #208072
Some test environment run tests in a readonly directory. Writing is only
allowed in temp directory.
Commit: db534dccb2ea151cf8ac1b4f92a656402e71c968
https://github.com/llvm/llvm-project/commit/db534dccb2ea151cf8ac1b4f92a656402e71c968
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/__support/GPU/utils.h
Log Message:
-----------
[libc] Fix Global addrspace (#212531)
Commit: a0a18e45b16e82000c7cb8a1e39469ac8897ab0a
https://github.com/llvm/llvm-project/commit/a0a18e45b16e82000c7cb8a1e39469ac8897ab0a
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
A llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
Log Message:
-----------
[NFC][VPlan] Add initial tests for future VPlan-based stride MV (#182594)
I tried to include both the features that current
LoopAccessAnalysis-based transformation supports (e.g., trunc/sext of
stride) but also cases where the current implementation behaves poorly,
e.g., https://godbolt.org/z/h31c3zKxK; as well as some other potentially
interesting scenarios I could imagine.
The are two test files with the same content. One is for VPlan dump
change of the future transformation alone (I'll update
`-vplan-print-after` in the next PR), another is for the full vectorizer
pipeline. The latter has two `RUN:` lines:
* No multiversioning, so the next PR diff can show the transformation
itself
* Stride multiversionin performed in LAA, so that we can compare next
PR's
VPlan-based transformation vs old behavior.
Commit: f27602f77d2bccdd1ab17e6afc4b48fc0a32b993
https://github.com/llvm/llvm-project/commit/f27602f77d2bccdd1ab17e6afc4b48fc0a32b993
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
R llvm/test/Transforms/SimplifyCFG/switch-default-fold-weight-overflow.ll
Log Message:
-----------
Revert "[SimplifyCFG] Fix branch-weight overflow when folding switch case into default" (#212540)
Commit: 98568f6567999d03e15a611b3fed1abcfab2f123
https://github.com/llvm/llvm-project/commit/98568f6567999d03e15a611b3fed1abcfab2f123
Author: adams381 <adams at nvidia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
A clang/test/CIR/Transforms/abi-lowering/x86_64-int-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
Log Message:
-----------
[CIR] Accept __int128 in x86_64 calling-convention lowering (#211142)
The x86_64 calling-convention bridge rejected every integer wider than 64
bits, so a function taking or returning `__int128` hit `errorNYI` even though
its ABI treatment is simple.
On x86_64 `__int128` is Direct and passes in a pair of integer registers,
matching an i128 argument or return in classic CodeGen. `isSupportedType` now
accepts non-bitint integers of width 128 alongside the register-sized widths.
A struct holding a single `__int128` is exactly two eightbytes, so it reaches
the aggregate path and is Direct-coerced to i128; a struct spanning more than
two eightbytes stays Indirect (byval/sret).
`_BitInt` stays rejected pending its register-pair coercion and padding
handling, including `_BitInt(128)`. Non-C intermediate widths (65..127) stay
rejected too: the scalar Direct branch would pass them through unchanged,
without the register-pair coercion they would need.
Commit: 7ac6b9ff31dbd3a028585ccd18d8a7a290303d58
https://github.com/llvm/llvm-project/commit/7ac6b9ff31dbd3a028585ccd18d8a7a290303d58
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/wasm/RegisterContextWasm.cpp
M lldb/source/Plugins/Process/wasm/ThreadWasm.cpp
M lldb/source/Plugins/Process/wasm/ThreadWasm.h
Log Message:
-----------
[lldb] Report the unwound PC for WebAssembly caller frames (#212326)
RegisterContextWasm delegated the PC register read to
GDBRemoteRegisterContext, which reports the live innermost PC for every
frame. Resolving a variable whose DWARF location is a location list in a
caller frame therefore chose the entry using the innermost frame's PC
instead of the caller's, so the variable read back as unavailable even
though its location covered the caller's PC.
Return the program counter the WebAssembly unwinder recorded for the
frame (from qWasmCallStack) when reading a caller frame's PC, so the
location list entry uses the correct frame.
Commit: d4d007b581bef93d6b7cee4bf9d621804826a9d6
https://github.com/llvm/llvm-project/commit/d4d007b581bef93d6b7cee4bf9d621804826a9d6
Author: Jinseok Kim <always.starving0 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M compiler-rt/lib/asan/asan_poisoning.cpp
Log Message:
-----------
[asan][NFC] Fix comments in asan_poisoning.cpp (#212449)
Remove duplicated wording and fix typos in comments.
Signed-off-by: Jinseok Kim <always.starving0 at gmail.com>
Commit: 488ba8b8d28fbab361a56111591acb1bf8c33371
https://github.com/llvm/llvm-project/commit/488ba8b8d28fbab361a56111591acb1bf8c33371
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Split R600 feature bitmask into separate enum from amdgcn (#212484)
Commit: a4a9b6864c6f185500f08a5a037d93b5e67657dc
https://github.com/llvm/llvm-project/commit/a4a9b6864c6f185500f08a5a037d93b5e67657dc
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
Log Message:
-----------
[SimplifyCFG] Handle degenerate conditional branch (#212552)
IR before entering the function:
```
define void @func(i1 %cond) {
entry:
br i1 %cond, label %exit, label %exit
exit: ; preds = %entry, %entry
%phi = phi i1 [ false, %entry ], [ false, %entry ]
tail call void @llvm.assume(i1 %phi)
ret void
}
```
The original code only removes one edge. There is still an edge from
entry to exit, triggering the `Deleted edge still exists in the CFG`
assertion.
Closes https://github.com/llvm/llvm-project/issues/212542
Commit: ee25d3ec23a8b612ae3fa3eed8f8b88b00f582df
https://github.com/llvm/llvm-project/commit/ee25d3ec23a8b612ae3fa3eed8f8b88b00f582df
Author: Faijul Amin <md.faijul.amin at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
Log Message:
-----------
[SPIRV] Preserve sign-sensitive width record across G_TRUNC replacement (#211626)
**Summary**
Follow-up to #203661. When the `G_TRUNC` handler in `SPIRVPreLegalizer`
collapses source and destination to the same widened width, it calls
`MRI.replaceRegWith(DstReg, MaskedReg)` and drops the original
`G_TRUNC`. The `SignSensitiveInfo.OrigWidth` map, however, was still
keyed on `DstReg`, so `widenSignSensitiveOps` no longer found the narrow
original width and skipped the `shl/ashr` sign extension for signed
users of the truncated value.
Rekey `OrigWidth` from `DstReg` to `MaskedReg` before the
`replaceRegWith` so signed ops fed by the truncated value still receive
`G_SEXT_INREG` on the widened type.
**Test plan**
New test case is added to
`llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll`: `trunc i8 →
i4` feeding `icmp slt` — src and dst both widen to `i8`, exercising the
same-width `replaceRegWith` path. Checks that the widened `i8` compare
is preceded by matching `OpShiftLeftLogical / OpShiftRightArithmetic`
pairs on both operands.
Commit: b0960bd33024c6e22b680df5d4fb675f61b64ad0
https://github.com/llvm/llvm-project/commit/b0960bd33024c6e22b680df5d4fb675f61b64ad0
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/PostRASchedulerList.cpp
M llvm/lib/CodeGen/StaticDataSplitter.cpp
M llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
M llvm/lib/Target/AMDGPU/R600Packetizer.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
M llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp
M llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
M llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
Log Message:
-----------
[CodeGen] Stop requiring analyses that no pass reads (#212430)
Remove analysis requirements whose pass never calls getAnalysis for
them, and MachineSchedContext::MDT, which no scheduler reads. Also remove
addPreserved calls subsumed by setPreservesCFG (MachineDominatorTree and
MachineLoopInfo are CFG-only analyses) and a now-unpaired INITIALIZE_PASS_DEPENDENCY.
The PowerPC, Hexagon and R600 pipelines each drop a MachineDominatorTree
construction.
Aided by Claude Opus 5
Commit: 0db95253f93987e4c37594883208a42d3ebee563
https://github.com/llvm/llvm-project/commit/0db95253f93987e4c37594883208a42d3ebee563
Author: Taimuraz Kaitmazov <5769345+atassis at users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/test/ClangScanDeps/logging-two-threads.c
Log Message:
-----------
[clang][ClangScanDeps] Relax logging-two-threads for duplicate module validation (#210587)
`ClangScanDeps/logging-two-threads.c` is flaky. It asserts each module's
timestamp is written exactly once, but under
`-fmodules-validate-once-per-build-session` two workers scanning
different TUs can both notice the shared module is unvalidated this
session and each validate and record it before the other's write lands,
so its timestamp is written once or twice depending on the interleaving.
The double write is harmless: the timestamp field is atomic and both
workers store the same session time. Only the exact-count assertion was
wrong.
Relax the test to the real invariant: the shared module A is written
once or twice and the single-TU module B exactly once. Module compile
and pcm write stay exactly once (the in-memory cache builds each module
once) and the per-module event ordering is still checked by the sequence
blocks.
The redundant validation itself (two workers validating the same module)
is a separate, pre-existing issue noted by the validation-lock TODO in
`ModuleCache.h`; I plan to look at that separately.
AI assistance: drafted with AI help; reviewed and validated by me.
Commit: 6d59a24272b7d0ffbf5c04b8878dfcc08c0bc0d9
https://github.com/llvm/llvm-project/commit/6d59a24272b7d0ffbf5c04b8878dfcc08c0bc0d9
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Generate literal32 operand for packed fp32 instructions (#212530)
Literal32 operand is supported for gfx1250+ for v_pk_*_f32
Commit: 9d4eb0a855242a37a7541682934a6dd811474d11
https://github.com/llvm/llvm-project/commit/9d4eb0a855242a37a7541682934a6dd811474d11
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/CodeGen/Targets/PPC.cpp
R clang/test/CodeGen/ppc64-float-abi-attr.c
A clang/test/CodeGen/ppc64-long-double-type-attr.c
M llvm/docs/LangRef.md
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
A llvm/test/Assembler/module-flags-long-double-type.ll
A llvm/test/Bitcode/upgrade-ppc-float-abi.ll
M llvm/test/CodeGen/PowerPC/gnu-attribute.ll
A llvm/test/Linker/module-flags-long-double-type.ll
A llvm/test/Verifier/module-flags-long-double-type.ll
Log Message:
-----------
PowerPC: Rename "float-abi" module flag to "long-double-type" (#210817)
PPC was emitting a "float-abi" module flag for indicating the type of
long double. The "float ABI" naming is already widely taken by soft vs.
hard float controls (e.g., the clang flag is called -mfloat-abi), so this
shouldn't have taken it. This should also not be PPC specific; x86 has
the same problem. Rename the flag to the more specific
long-double-type, and add appropriate verification and documentation
(which was also missing). Also changes the value names to match the IR
type names.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 3919897e1b1b2c4f4327e9a8a9eebfb91bc75616
https://github.com/llvm/llvm-project/commit/3919897e1b1b2c4f4327e9a8a9eebfb91bc75616
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
R clang/test/Driver/Inputs/spirv64-sycl/lib/spirv64-unknown-unknown/libclang_rt.builtins.bc
R clang/test/Driver/sycl-device-lib-spirv64.cpp
M clang/test/Driver/sycl-offload-jit-unix.cpp
M clang/test/Driver/sycl-offload-jit-xarch.cpp
M clang/test/Driver/sycl-offload-jit.cpp
M clang/test/Driver/sycl-print-internal-defines.cpp
M clang/test/Driver/sycl-rtlib-sysroot-mismatch.cpp
M clang/test/Driver/sycl-std-default.cpp
M clang/test/Driver/sycl-windows.cpp
M clang/test/Driver/sycl.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
Revert "[Driver][SYCL] Add compile-time device library linking for SPIR-V targets" (#212550)
Reverts llvm/llvm-project#196656
The CI does not yet build compiler-rt with SPIR-V support, so
libclang_rt.builtins.bc is absent on that bot. This change made the
missing file a hard error, breaking all libsycl functional tests that
compile with -fsycl.
Re-landing after CI is updated to build compiler-rt for SPIR-V.
Commit: 1a2691c3d3ff24dc5dc52a80b3e1ed3f8ee1706a
https://github.com/llvm/llvm-project/commit/1a2691c3d3ff24dc5dc52a80b3e1ed3f8ee1706a
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
M offload/test/mapping/declare_mapper_nested_mappers.cpp
M offload/test/mapping/declare_mapper_target.cpp
M offload/test/mapping/declare_mapper_target_data.cpp
M offload/test/mapping/declare_mapper_target_data_enter_exit.cpp
M offload/test/mapping/declare_mapper_target_update.cpp
A offload/test/mapping/mapper_enter_data_always_present_ptee.c
A offload/test/mapping/mapper_map_always_from.c
A offload/test/mapping/mapper_map_always_to_enter_data.c
A offload/test/mapping/mapper_map_mbr_ptee_then_present_mbr_ptee.c
A offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
A offload/test/mapping/mapper_map_present_ptee.c
A offload/test/mapping/mapper_map_ptee_only.c
A offload/test/mapping/mapper_map_ptee_only_2_ptr_indirections.c
A offload/test/mapping/mapper_map_ptee_only_2_ptr_indirections_array.c
A offload/test/mapping/mapper_map_ptee_only_2ndlevel.c
A offload/test/mapping/mapper_map_ptee_only_2ndlevel_array.c
A offload/test/mapping/mapper_map_ptee_only_always_array.c
A offload/test/mapping/mapper_map_ptee_only_array.c
A offload/test/mapping/mapper_map_ptee_then_present_absent_mbr.c
A offload/test/mapping/mapper_map_ptr_ptee_nomapper_del_ptee.c
A offload/test/mapping/mapper_map_ptr_ptee_nomapper_del_ptr.c
A offload/test/mapping/mapper_target_update_present_ptee.c
A offload/test/mapping/multiple_deletes_within_one_struct.c
A offload/test/offloading/fortran/mapper-map-always-to-enter-data.f90
Log Message:
-----------
[NFC][OpenMP] Add mapper-specific tests exercising pointee section mapping. (#204269)
* Add a few tests for when a mapper does something like `map(s.p[0:10])`
where `p` is a pointer.
* Add a few tests that require propagation of bits like `present/always`
into a mapper.
* Fix a few tests that were expecting `p` to be mapped when the mapper
only said `map(s.p[0:10])`.
The output of a few tests is different from what we expect. They have
been annotated with FIXMEs, and the expected output for when the
follow-up changes in this stack to propagate the map-type-modifier bits
and using attach-style mapping for mappers get merged.
---------
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: 16f45b7f184c776b40a6893c8d6f6f02d5185c47
https://github.com/llvm/llvm-project/commit/16f45b7f184c776b40a6893c8d6f6f02d5185c47
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor.f90
Log Message:
-----------
[flang][cuda] Add option to set priority to the CUDA Fortran constructor (#212561)
Commit: 8aceb2f64b33f3c70b712ccd464774fa7d620d19
https://github.com/llvm/llvm-project/commit/8aceb2f64b33f3c70b712ccd464774fa7d620d19
Author: Alexander Johnston <14348472+Alexander-Johnston at users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedXor.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedXor.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedXor.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedXor-errors.hlsl
Log Message:
-----------
[HLSL] Implement HLSL InterlockedXor (#209254)
Follows existing HLSL InterlockedOp implementations to provide
InterlockedXor in HLSL, with DirectX and SPIRV support.
https://github.com/llvm/llvm-project/issues/99127
Commit: 6bf2f466c1a77c1e97175dc14a11564133a0638b
https://github.com/llvm/llvm-project/commit/6bf2f466c1a77c1e97175dc14a11564133a0638b
Author: Petr Kurapov <petr.kurapov at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/MIR2Vec.cpp
A llvm/test/CodeGen/MIR2Vec/empty-machine-function.mir
Log Message:
-----------
[MIR2Vec] Handle machine functions with no basic blocks (#212294)
depth_first() asserts on an empty MachineFunction, since getEntryNode()
dereferences the block list sentinel via front(). Return the zero vector
instead, as IR2Vec does for declarations.
Commit: 26643a89ddf98e48e986d25ceb10f673735bc7d7
https://github.com/llvm/llvm-project/commit/26643a89ddf98e48e986d25ceb10f673735bc7d7
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Headers/ptrauth.h
Log Message:
-----------
[PAC][Headers] Fix incorrect comment in ptrauth.h (#207265)
The discriminator which is used to sign pointers to v-tables
is not always zero.
Commit: 85305ba2b67ea806e1e04b61dcc8743b19f51fc8
https://github.com/llvm/llvm-project/commit/85305ba2b67ea806e1e04b61dcc8743b19f51fc8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.wave64.err.ll
Log Message:
-----------
[AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size (#211493)
Before wave mask was emitted directly in the requested return type,
which failed to select for i32 ballots on wave64 (and vice versa)
Compute the mask at the wavefront width and then zext or trunc it to the
result type
Commit: e146c04973fc3faf6dbf74bacdf8d62553f6fed5
https://github.com/llvm/llvm-project/commit/e146c04973fc3faf6dbf74bacdf8d62553f6fed5
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
Log Message:
-----------
[AMDGPU] Add SRAMECC to feature list for gfx12-5-generic (#212573)
Commit: 34e04039fd7c5341b964443659c2e1677d97c55e
https://github.com/llvm/llvm-project/commit/34e04039fd7c5341b964443659c2e1677d97c55e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/module-flags-long-double-type.ll
Log Message:
-----------
IR: Accept x86_fp80 and float as a long-double-type value (#210818)
Prepare to emit long-double-type for all targets. x86 obviously needs
x87, and AVR uses float.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: ed591cc9d78a73eef2fffa93510bd99c3a7170df
https://github.com/llvm/llvm-project/commit/ed591cc9d78a73eef2fffa93510bd99c3a7170df
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/utils/lit/CMakeLists.txt
M llvm/utils/lit/tests/lit.site.cfg.in
Log Message:
-----------
[lit] Switch tests to using path function (#212381)
All the other test suites use the PATHS option to configure_lit_site_cfg
and the path() function in lit.site.cfg to make the site configs
relocatable. Apply the same pattern to lit's own suite as well.
Commit: 7ae83531cb7cfcfb266ba6aa927caf77745995bf
https://github.com/llvm/llvm-project/commit/7ae83531cb7cfcfb266ba6aa927caf77745995bf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/MC/AMDGPU/vop3-literal.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_wave64_feature.s
Log Message:
-----------
AMDGPU: Add dedicated features for wavesize support (#212581)
Previously we had features for which wavesize is active,
and unstructured checks for which targets support which
wavesize.
One assembler test changes because it was artificially
forcing wave64 on gfx1250 for test simplification, and
the supportsWave32 helper function was buggy.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 531445c572936b72864f377b02b96001fa0fa799
https://github.com/llvm/llvm-project/commit/531445c572936b72864f377b02b96001fa0fa799
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add SPIRVToLLVM conversions for IAddCarry and ISubBorrow (#203605)
Commit: ab5f244f0f043c138d4d9ee7e0bbdea2309d2010
https://github.com/llvm/llvm-project/commit/ab5f244f0f043c138d4d9ee7e0bbdea2309d2010
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
Triple: Add query for the default long double format (#211239)
The long double format changes the library call info, which needs
to be computed independently of codegen. Implement this based on the
clang target code.
---------
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 617dd98854c1f436a90e457f38f8d90643c0b641
https://github.com/llvm/llvm-project/commit/617dd98854c1f436a90e457f38f8d90643c0b641
Author: Yi Zhang <cathyzhyi at google.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] fix #212406 (#212585)
Commit: bd69a84b5618922f776d14710221b8ca7bf58758
https://github.com/llvm/llvm-project/commit/bd69a84b5618922f776d14710221b8ca7bf58758
Author: earnol <earnol at users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Format/WhitespaceManager.cpp
M clang/unittests/Format/FormatTestComments.cpp
Log Message:
-----------
[clang-format] Fix OverEmptyLines aligning trailing comments across block boundaries (#208324)
Fix `AlignTrailingComments` with `OverEmptyLines` aligning trailing
comments across block boundaries (e.g., between two functions or
structs). The alignment sequence now breaks at block-type braces
(`BK_Block`).
This is an `OverEmptyLines` bug exposed by
bae9ddca423145baf0c35e31898b723aa273f85c (#206393).
Fixes https://github.com/llvm/llvm-project/issues/208266
(https://github.com/llvm/llvm-project/issues/208266).
Commit created with the help of kiro-cli.
Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
Commit: 592b344b377db4a81ac6930ae6c0131730b0432c
https://github.com/llvm/llvm-project/commit/592b344b377db4a81ac6930ae6c0131730b0432c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/isa-version-pal.s
M llvm/test/MC/AMDGPU/isa-version-unk.s
Log Message:
-----------
AMDGPU: Migrate target ID diagnostic tests to subarch triples (#212588)
Commit: 255162ae0ebe805df151c5c4b48e1a47a5dd74f0
https://github.com/llvm/llvm-project/commit/255162ae0ebe805df151c5c4b48e1a47a5dd74f0
Author: Nemanja Ivanovic <nemanja.i.llvm at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
A llvm/test/CodeGen/RISCV/shadow-stack-zcmp.ll
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
Log Message:
-----------
[RISC-V] Do not emit cm.popret[z] with zicfiss (#196267)
When emitting shadow call stack protection instructions, the push/pop
optimization needs to be turned off because an sspopchk before a
cm.popret[z] is guaranteed to fail in a non-leaf function. In addition,
the sspopchk must be emitted after a cm.pop so that the ra has the
correct value when the check is performed.
Fixes: https://github.com/llvm/llvm-project/issues/196261
Co-authored-by: Nemanja Ivanovic <nemanja at synopsys.com>
Commit: 810062e9771d8b47c25a89311139c621c13bbf9f
https://github.com/llvm/llvm-project/commit/810062e9771d8b47c25a89311139c621c13bbf9f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
Log Message:
-----------
[libc++] Require selecting a machine when dispatching the benchmark workflow (#212591)
This resolves a TODO to allow selecting which machine we're running on.
As I am working on automation to dispatch these benchmarking jobs, it
turns out that we always want to specify the machine, and we always want
to specify a single machine to run per workflow, since this is the only
way we can track which commits have been attempted (or are still in
flight) on a given machine.
Therefore, the ability to run benchmarks on all machines at once is
removed from this workflow (but not from the related PR A/B benchmarking
workflow).
This patch also includes the machine name and the commit being
benchmarked into the runs's name, which is necessary for automation to
know what the workflow was benchmarking.
Commit: 83dfacdbda1a8b87c1f170ec6ce4e240e1fa79db
https://github.com/llvm/llvm-project/commit/83dfacdbda1a8b87c1f170ec6ce4e240e1fa79db
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/type_traits.h
A libc/src/__support/CPP/unique_ptr.h
M libc/src/__support/macros/attributes.h
M libc/test/src/__support/CPP/CMakeLists.txt
A libc/test/src/__support/CPP/unique_ptr_test.cpp
Log Message:
-----------
[libc] Implement cpp::unique_ptr utility (#206701)
[libc] Implement cpp::unique_ptr utility
Implemented cpp::unique_ptr and cpp::default_delete in
libc/src/__support/CPP/unique_ptr.h for internal use within LLVM-libc.
* Added cpp::default_delete and its array specialization.
* Implemented cpp::unique_ptr with support for custom deleters and
array specialization.
* Applied LIBC_TRIVIAL_ABI to unique_ptr and LIBC_NO_UNIQUE_ADDRESS to
the
deleter to enable empty member optimization and register-passing ABI.
* Defined portable LIBC_NO_UNIQUE_ADDRESS and LIBC_TRIVIAL_ABI macros in
attributes.h.
* Included is_assignable.h in type_traits.h to support conversion
assignment constraints.
* Modernized template constraints using enable_if_t and
is_convertible_v.
* Added comprehensive unit tests in
libc/test/src/__support/CPP/unique_ptr_test.cpp, including coverage for
reset sequencing, custom deleters, and conversion constructors.
This is a simplified implementation with the following limitations:
* No support for custom pointer types (hardcoded to T*).
* No support for reference deleter types or array conversion.
Adding this to LLVM libc because some things (like regex) require
dynamic
memory allocation, and this will help with correct memory management.
Assisted-by: Automated tooling, human reviewed.
Commit: 6084459105d2d022122508cfbcae990d7516488b
https://github.com/llvm/llvm-project/commit/6084459105d2d022122508cfbcae990d7516488b
Author: Pankaj Gode <pgode at qti.qualcomm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/SubtargetFeature.h
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
A llvm/lib/Target/RISCV/RISCVMacroFusionXQCI.td
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
Log Message:
-----------
[RISCV] Add macro fusion support for the Xqci extension instructions (#209542)
Add macro fusion definitions for the Qualcomm Xqci extension covering
movimm-alu, movimm-mul, movimm-ldst, movimm-jump, movimm-longlogical,
movimm-mov, mov-mov, mov-longlogical fusions.
The fusion definitions live in a new RISCVMacroFusionXQCI.td which is
included from RISCVMacroFusion.td. A MIR test and the feature list test
are updated accordingly.
To accomodate additional features, increased MAX_SUBTARGET_FEATURES to
448 (from 384).
Signed-off-by: Pankaj Gode <pgode at qti.qualcomm.com>
Commit: d814f55809820baee51a23eab92c24df8f5824ce
https://github.com/llvm/llvm-project/commit/d814f55809820baee51a23eab92c24df8f5824ce
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/MathToXeVM/CMakeLists.txt
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
Log Message:
-----------
[mlir][MathToXeVM] Convert fastmath math ops on size-1 vectors (#211921)
SPIR-V has no size-1 vector type, so `convert-math-to-xevm` previously
rejected `math.exp fastmath<fast> : vector<1xf32>` (and the other native
OCL patterns), leaving them as unconverted `math.exp`. These degenerate
size-1 vectors are the result of the XeGPU pipeline distributing and
linearizing larger vectors down to a single element per lane, so in
practice fastmath exps in e.g. flash-attention softmax were never
lowered to `__spirv_ocl_native_exp`, hurting performance.
Handle size-1 vectors by unwrapping them to the scalar element type:
`vector.extract [0]` -> scalar native intrinsic -> `vector.broadcast`
back. `vector::ExtractOp`/`BroadcastOp` are marked legal in the
conversion target so the partial conversion does not roll back, and the
pass now depends on the Vector dialect.
---------
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: f5c5aee722763817448fcd0f7951853ea456be04
https://github.com/llvm/llvm-project/commit/f5c5aee722763817448fcd0f7951853ea456be04
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/MC/AMDGPU/ds-err.s
M llvm/test/MC/AMDGPU/flat.s
M llvm/test/MC/AMDGPU/regression/bug28538.s
M llvm/test/MC/AMDGPU/sop1-err.s
M llvm/test/MC/AMDGPU/sop2.s
M llvm/test/MC/AMDGPU/sopk-err.s
M llvm/test/MC/AMDGPU/sopp-err.s
M llvm/test/MC/AMDGPU/trap.s
M llvm/test/MC/AMDGPU/vop2-err.s
M llvm/test/MC/AMDGPU/vopc-errs.s
Log Message:
-----------
AMDGPU: Remove some assembler tests using dummy target (#212595)
In the future it will be illegal to do anything with a binary
without a specific subarch. Most of these were redundant with an
existing run line.
Commit: e5ac0f33554dbeca8b809a38b0aa228e4655bd18
https://github.com/llvm/llvm-project/commit/e5ac0f33554dbeca8b809a38b0aa228e4655bd18
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes d814f55 (#212610)
This fixes d814f55809820baee51a23eab92c24df8f5824ce (#211921).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=d814f55809820baee51a23eab92c24df8f5824ce
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 3b26f265c9608750c9f912b41e038a27fd595860
https://github.com/llvm/llvm-project/commit/3b26f265c9608750c9f912b41e038a27fd595860
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteKernelArguments.cpp
Log Message:
-----------
[AMDGPU][NFC] Document flat-to-global promotion assumption in AMDGPUP… (#212590)
…romoteKernelArguments
AMDGPUPromoteKernelArguments promotes flat pointer kernel arguments to
global by inserting a round-trip addrspacecast (flat -> global -> flat)
as a hint to InferAddressSpaces. Add a comment explaining why this is
valid: in the HSA offload model, the host populates kernarg slots at
dispatch time and can only supply global-aperture addresses, so any flat
pointer reachable from a kernel argument can be assumed to be in the
global aperture. This mirrors the same assumption made by
getAssumedAddrSpace in AMDGPUTargetMachine.cpp, which independently
promotes flat kernel arguments to global via InferAddressSpaces.
Commit: 93d45dce2fc704e28bacb1eea399fb9900385418
https://github.com/llvm/llvm-project/commit/93d45dce2fc704e28bacb1eea399fb9900385418
Author: Moazin K. <mkhatti at nvidia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCRoutineLowering.cpp
M mlir/test/Dialect/OpenACC/acc-routine-lowering.mlir
Log Message:
-----------
[OpenACC] Do not clean up nohost routines in `ACCRoutineLowering`. (#212534)
The design of the ACC routine lowering supports multiple device side
specializations of an ACC routine function. Earlier in the pipeline, all
calls to the function are expected to refer the original host function
and not their device side specialized versions. Once there is enough
parallelism context, the calls can be changed to point to the
appropriate specialized routine.
The nohost handling in `ACCRoutineLowering` goes against this design.
This change removes the special handling of nohost routines and this
clean up should be done in later passes.
Assisted-by: Codex
Commit: 2031237267b8fa2f7e3840de33fdb305963d7adf
https://github.com/llvm/llvm-project/commit/2031237267b8fa2f7e3840de33fdb305963d7adf
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/source/Plugins/Language/ObjC/CF.cpp
M lldb/source/Plugins/Language/ObjC/Cocoa.cpp
M lldb/source/Plugins/Language/ObjC/NSArray.cpp
M lldb/source/Plugins/Language/ObjC/NSDictionary.cpp
M lldb/source/Plugins/Language/ObjC/NSError.cpp
M lldb/source/Plugins/Language/ObjC/NSException.cpp
M lldb/source/Plugins/Language/ObjC/NSIndexPath.cpp
M lldb/source/Plugins/Language/ObjC/NSSet.cpp
Log Message:
-----------
[lldb] Stop creating ConstStrings for ObjC framework type names (#211679)
For a given ObjC framework type (e.g. NSArray from Foundation), LLDB may
need to do something different to format the type correctly depending on
its backing implementation type. Many of these types have well known
variants that LLDB knows how to handle, but they need to be identified
on a case-by-case basis.
These type names were stored into ConstStrings but don't need to be.
Instead we can statically create a StringLiteral to avoid repeated
StringRef creation for these type names.
Commit: 7a3aa7da4c0254483ae32c6fa7f65d756026d56c
https://github.com/llvm/llvm-project/commit/7a3aa7da4c0254483ae32c6fa7f65d756026d56c
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/reproducer-remarks.ll
M llvm/test/Transforms/ConstraintElimination/sub.ll
Log Message:
-----------
[ConstraintElim] decompose subtract with guard as precondition (#209615)
ConstraintElimination's unsigned constraint system already decomposes
`sub nuw a, b` into `a − b` (nuw guarantees b ≤ a),
The fix decomposes 'sub nsw a, b' or 'sub a , b' into 'a − b'
with precondition b u≤ a provided by dominating guard.
Motivating example is a bound check of the form that reaches CE.
```
int f(const int *a, int len, int k, unsigned n) {
if ((unsigned)k <= (unsigned)len && (unsigned)len <= n) {
int off = len - k; // sub nsw i32
if ((unsigned)off <= n) // survives instcombine; CE folds via off<=len<=n
return a[off];
}
return -1;
}
```
https://alive2.llvm.org/ce/z/e8vka7
Commit: 96d7cb506f1df1fb3e1f0fa3fa40610c62bc1d88
https://github.com/llvm/llvm-project/commit/96d7cb506f1df1fb3e1f0fa3fa40610c62bc1d88
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/X86/CostModel/store-scalarization-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
Log Message:
-----------
[LV] Add cost tests for store scalarization (NFC). (#212592)
Extra test coverage for tests where legacy cost model incorrectly
assumes predication.
Commit: 8dc4bb72970097b5cb9013d67537f0647707b179
https://github.com/llvm/llvm-project/commit/8dc4bb72970097b5cb9013d67537f0647707b179
Author: Sunil Shrestha <sunil.shrestha at hpe.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Lower/OpenMP/interop.f90
M flang/test/Parser/OpenMP/interop-construct.f90
M flang/test/Semantics/OpenMP/init-clause.f90
M flang/test/Semantics/OpenMP/interop-construct.f90
Log Message:
-----------
[Flang][OpenMP] Fix interop-var handling and diagnostics (#203959) (#211693)
This change builds on top of the work done in PR #203959
- Diagnose interop destroy without an interop variable
- Lower array-element / derived-component interop-vars via their
designator
- Require interop-var to be a scalar integer of omp_interop_kind
- Remove "hsa" prefer_type (no omp_ifr_hsa in the runtime)
- Fix a latent bug in Parser/OpenMP/interop-construct.f90
Commit: 1cfa9292e38de7e66f5d6d1ef40eab1c8e02dca2
https://github.com/llvm/llvm-project/commit/1cfa9292e38de7e66f5d6d1ef40eab1c8e02dca2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Prepare replaceSymbolicStrides to handle plain CFG (NFC). (#212609)
Update replaceSymbolicStrides to use general getPlainCFGHeaderAndLatch
helper to make it more robust w.r.t. to pipeline changes.
Also tighten check for phis to skip replacement if loop executes
unconditionally.
Commit: c7c4ecea10bedd55d3ef8c8b9136f5d592d87c9e
https://github.com/llvm/llvm-project/commit/c7c4ecea10bedd55d3ef8c8b9136f5d592d87c9e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
Log Message:
-----------
[VPlan] Prepare replaceSymbolicStrides to handle plain CFG (NFC). (#212609)
Update replaceSymbolicStrides to use general getPlainCFGHeaderAndLatch
helper to make it more robust w.r.t. to pipeline changes.
Also tighten check for phis to skip replacement if loop executes
unconditionally.
Commit: 74a90e28db0878a01583cd32de4269014c8ecb78
https://github.com/llvm/llvm-project/commit/74a90e28db0878a01583cd32de4269014c8ecb78
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang-tools-extra/include-cleaner/lib/LocateSymbol.cpp
M clang-tools-extra/include-cleaner/unittests/LocateSymbolTest.cpp
Log Message:
-----------
[include-cleaner] Support ObjC interface and protocol declarations in LocateSymbol (#212617)
Treats forward declarations of Objective-C interfaces
(ObjCInterfaceDecl) and protocols (ObjCProtocolDecl) as incomplete,
allowing the symbol locator to prefer their definitions.
Also updates the unit tests to support Objective-C and adds test cases
for these declarations.
Also update the unit tests for forward declarations of enums and enum
classes.
Commit: 9b9dc9d501d9bff70208056439490f9987e2b38b
https://github.com/llvm/llvm-project/commit/9b9dc9d501d9bff70208056439490f9987e2b38b
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/unittests/Tooling/HeaderIncludesTest.cpp
Log Message:
-----------
[include-cleaner]Support #import directives in HeaderIncludes (#212582)
This change updates HeaderIncludes to recognize #import directives in
addition to #include when parsing existing headers. It also fixes up an
existing issue parsing include/import statements that may have contained
tabs.
Commit: 8adefe858549981181c4fae81d77277047696f2e
https://github.com/llvm/llvm-project/commit/8adefe858549981181c4fae81d77277047696f2e
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
Log Message:
-----------
[include-cleaner] Cleanup Headers and Warnings (#212570)
Add missing headers and get rid of warning about param name mismatch.
Commit: d8fb9ea73bb68e3d86a3fb7fffd2e038449af2c2
https://github.com/llvm/llvm-project/commit/d8fb9ea73bb68e3d86a3fb7fffd2e038449af2c2
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
A mlir/lib/Dialect/OpenACC/Transforms/ACCEmitRemarksData.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/test/Dialect/OpenACC/acc-emit-remarks-data.mlir
Log Message:
-----------
[mlir][acc] Add pass to emit remarks for openacc data mapping (#212623)
This pass emits MLIR remarks for all OpenACC data mapping actions.
Intended to be used when all the data actions are committed (typically
right before codegen to call runtime).
Commit: 575898b60d805e6a7259a5db0a2d0ee9913f6790
https://github.com/llvm/llvm-project/commit/575898b60d805e6a7259a5db0a2d0ee9913f6790
Author: satyanarayana reddy janga <satyajanga at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
A lldb/test/API/functionalities/process_save_core_minidump_size_of_image/Makefile
A lldb/test/API/functionalities/process_save_core_minidump_size_of_image/TestMinidumpSizeOfImage.py
A lldb/test/API/functionalities/process_save_core_minidump_size_of_image/main.c
A lldb/test/API/functionalities/process_save_core_minidump_size_of_image/testlib.c
Log Message:
-----------
[lldb][Minidump] Fix wrong variable in getModuleFileSize loop (#188363)
Use next_sect_sp instead of sect_sp when getting the byte size inside
the section-walking loop. Using the original sect_sp meant sect_size
never changed between iterations, producing an incorrect SizeOfImage and
risking an infinite loop when sections have different sizes.
Commit: 0eee6132fcccedd0ac9be9e445f74c62af537fbe
https://github.com/llvm/llvm-project/commit/0eee6132fcccedd0ac9be9e445f74c62af537fbe
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/reassociate-ops.ll
Log Message:
-----------
[SLP][NFC]Add extra test for operand reassociation, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/212631
Commit: dc7e9df5d2d43db18bfccadb0e1bcc05a0ac8b84
https://github.com/llvm/llvm-project/commit/dc7e9df5d2d43db18bfccadb0e1bcc05a0ac8b84
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M .github/workflows/release-sources.yml
Log Message:
-----------
workflows/release-sources: Make sure to checkout all the composite actions (#212544)
Commit: b43247627d628ea5d901f0faebf15a099fa99d91
https://github.com/llvm/llvm-project/commit/b43247627d628ea5d901f0faebf15a099fa99d91
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/cuda-cross-compiling.c
Log Message:
-----------
[NVPTX] Fix typo 'pxtas-path' -> 'ptxas-path' in tool invocation (#212599)
Commit: e0a970988cd8fe749e24c21f9c4c833dab70ec03
https://github.com/llvm/llvm-project/commit/e0a970988cd8fe749e24c21f9c4c833dab70ec03
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/test/tools/llvm-offload-wrapper/offload-wrapper.ll
Log Message:
-----------
[LinkerWrapper] Retain the offloading entries section under --gc-sections (#212614)
Summary:
These sections are generated for 'relocatable' linking. Under
`--gc-sections` this could be stripped and then fail following links. We
sould mark it as used to ensure that these sections are retained.
Commit: efe202c769aa2cc772d50bed87af30199bb6b239
https://github.com/llvm/llvm-project/commit/efe202c769aa2cc772d50bed87af30199bb6b239
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/__support/CPP/new.cpp
M libc/src/__support/CPP/new.h
Log Message:
-----------
[libc][CPP] Fix ASan alloc-dealloc-mismatch in custom operator delete (#212629)
Bypass custom operator delete redirection in new.h and new.cpp when
building with AddressSanitizer (LIBC_HAS_ADDRESS_SANITIZER).
cpp::unique_ptr is the first heap-owning utility in src/__support/CPP/
that executes delete/delete[] expressions. Previously, new.h redirected
operator delete via asm-renaming to __llvm_libc_delete (calling free()),
which caused ASan to report an alloc-dealloc-mismatch (operator new vs
free) when objects allocated via host operator new were deleted by
cpp::unique_ptr.
Guarding the custom operator delete implementations under ASan enables
ASan deallocation tracking while preserving hermetic libc behavior for
non-ASan builds.
Assisted-by: Automated tooling, human reviewed.
Commit: 9f761055cfdb4ffed8c7f70a1c896837490df691
https://github.com/llvm/llvm-project/commit/9f761055cfdb4ffed8c7f70a1c896837490df691
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
Log Message:
-----------
AMDGPU/GlobalISel: Lower bf16 G_FPTRUNC from f32 and f64 (#212302)
Port the SDAG bf16 fptrunc lowering to GlobalISel.
Commit: c6f775c5fa370eb2b97f7047781654337134eb10
https://github.com/llvm/llvm-project/commit/c6f775c5fa370eb2b97f7047781654337134eb10
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.wave64.err.ll
Log Message:
-----------
Revert "[AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size" (#212628)
Reverts llvm/llvm-project#211493
unblock bot: https://lab.llvm.org/buildbot/#/builders/232
Commit: 33d2c6ad8c342d40aa443afb7dd03ad0af0e103c
https://github.com/llvm/llvm-project/commit/33d2c6ad8c342d40aa443afb7dd03ad0af0e103c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/include/CMakeLists.txt
Log Message:
-----------
[libc] Add missing type dependencies to sys_types header target (#212601)
Add missing type dependencies to the sys_types header target in
libc/include/CMakeLists.txt for types defined in sys/types.yaml,
including __off_t, __off64_t, __uint64_t, off64_t, and BSD/System V
types added in commit 39df67d0edef.
Without these DEPENDS entries, CMake and Ninja do not copy the
corresponding type headers into the build and install directories,
causing missing header includes (e.g. __off64_t.h) when consuming
generated <sys/types.h>.
Assisted-by: Automated tooling, human reviewed.
Commit: 2a58643cc3b00c8904a6dcc8f3a12ee6444ddf68
https://github.com/llvm/llvm-project/commit/2a58643cc3b00c8904a6dcc8f3a12ee6444ddf68
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes efe202c (#212637)
This fixes efe202c769aa2cc772d50bed87af30199bb6b239 (#212629).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=efe202c769aa2cc772d50bed87af30199bb6b239
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4361bc96c73bc85592d19a5aab504ee1a97525c7
https://github.com/llvm/llvm-project/commit/4361bc96c73bc85592d19a5aab504ee1a97525c7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M flang/test/Parser/acc-unparse.f90
M flang/test/Semantics/OpenACC/acc-loop.f90
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[flang][openacc] Allow blank around ':' in generated clause parser with keyword (#212638)
Follow up to https://github.com/llvm/llvm-project/pull/210446 to also
allow the space in the parser generated by TableGen.
Commit: 6d1ace547c9f9ecf7df9ab87e2db74b5bd3f199d
https://github.com/llvm/llvm-project/commit/6d1ace547c9f9ecf7df9ab87e2db74b5bd3f199d
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/new.cpp
M libc/src/__support/CPP/new.h
M libc/src/__support/CPP/type_traits.h
R libc/src/__support/CPP/unique_ptr.h
M libc/src/__support/macros/attributes.h
M libc/test/src/__support/CPP/CMakeLists.txt
R libc/test/src/__support/CPP/unique_ptr_test.cpp
Log Message:
-----------
Revert "[libc] Implement cpp::unique_ptr utility" (#212644)
Reverts efe202c769aa2cc772d50bed87af30199bb6b239 and
83dfacdbda1a8b87c1f170ec6ce4e240e1fa79db.
Reverts #212629 and #206701.
Commit: c35bdc99a36bd518ff59b6cb209e84a5c7df24e1
https://github.com/llvm/llvm-project/commit/c35bdc99a36bd518ff59b6cb209e84a5c7df24e1
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/CMakeLists.txt
A lldb/examples/python/templates/scripted_command.py
M lldb/include/lldb/API/SBCommandReturnObject.h
M lldb/include/lldb/API/SBDebugger.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedCommandInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/API/SBCommandReturnObject.cpp
A lldb/source/API/SBCommandReturnObjectImpl.h
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedCommandPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedCommandPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
[lldb/script] Migrate ParsedCommand & raw commands onto ScriptedPythonInterface (#210430)
Give both `command script add -c` (raw class) and `-p` (ParsedCommand) a
single, shared
`ScriptedCommandInterface`/`ScriptedCommandPythonInterface`, built on
the existing `ScriptedPythonInterface` machinery: `CreatePluginObject`
delegates to the base template, and every other method goes through
`Dispatch`.
Add a lighter `ScriptedCommand` ABC template (`scripted_command.py`) for
raw mode; the existing `ParsedCommand`/`LLDBOptionValueParser` classes
are kept as-is.
Extend `ScriptedPythonInterface` with a few `Transform` overloads
(`DebuggerSP`, `std::vector<std::string>`, `CommandReturnObject &`) so
those argument types route through `Dispatch` without extra plumbing.
Delete the standalone SWIG bridge functions this plugin was the sole
caller of. `CommandObjectScriptingObjectRaw` and
`CommandObjectScriptingObjectParsed` now hold a
`ScriptedCommandInterfaceSP` instead of a raw
`StructuredData::GenericSP`; `command script add`'s `DoExecute`
constructs the interface once via
`CreateScriptedCommandInterface()->CreatePluginObject` for either flag.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: a13822ff14b6e4082caa553b230beb1a7252cb8e
https://github.com/llvm/llvm-project/commit/a13822ff14b6e4082caa553b230beb1a7252cb8e
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/adddf3.cpp
A compiler-rt/lib/builtins/addsf3.cpp
M compiler-rt/lib/builtins/addtf3.cpp
A compiler-rt/lib/builtins/divdf3.cpp
A compiler-rt/lib/builtins/divsf3.cpp
A compiler-rt/lib/builtins/divtf3.cpp
M compiler-rt/lib/builtins/fp_lib.h
A compiler-rt/lib/builtins/muldf3.cpp
A compiler-rt/lib/builtins/mulsf3.cpp
A compiler-rt/lib/builtins/multf3.cpp
A compiler-rt/lib/builtins/negdf2.cpp
A compiler-rt/lib/builtins/negsf2.cpp
M compiler-rt/lib/builtins/subdf3.c
A compiler-rt/lib/builtins/subdf3.cpp
M compiler-rt/lib/builtins/subsf3.c
A compiler-rt/lib/builtins/subsf3.cpp
A compiler-rt/lib/builtins/subtf3.cpp
M libc/shared/builtins.h
A libc/shared/builtins/negdf2.h
A libc/shared/builtins/negsf2.h
M libc/src/__support/builtins/CMakeLists.txt
A libc/src/__support/builtins/negdf2.h
A libc/src/__support/builtins/negsf2.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_builtins_test.cpp
Log Message:
-----------
[compiler-rt][builtins] add libc-backed arithmetic builtins (#207092)
Add libc-backed arithmetic builtins
Depends on #197950
Part of #197824
Commit: f1ba92abeffcd4d262d70843fa083c10b179cb4d
https://github.com/llvm/llvm-project/commit/f1ba92abeffcd4d262d70843fa083c10b179cb4d
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedCommandPythonInterface.cpp
Log Message:
-----------
[lldb] Include `Debugger.h` in `ScriptedCommandPythonInterface.cpp` (NFC) (#212662)
Commit c35bdc99a36b passes a `lldb::DebuggerSP` to the
`ScriptedPythonInterface` base template, whose `Transform` overload is
constrained on `std::is_base_of_v` and so needs `Debugger` to be
complete. This patch includes `lldb/Core/Debugger.h` since the
translation unit only saw the forward declaration.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: b3607548955c1ad318ea5b2019ea95b64c93ebe8
https://github.com/llvm/llvm-project/commit/b3607548955c1ad318ea5b2019ea95b64c93ebe8
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes c35bdc9 (#212659)
This fixes c35bdc99a36bd518ff59b6cb209e84a5c7df24e1 (#210430).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=c35bdc99a36bd518ff59b6cb209e84a5c7df24e1
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: e73371acbc8f0eb70e8392d9a560fe0445486571
https://github.com/llvm/llvm-project/commit/e73371acbc8f0eb70e8392d9a560fe0445486571
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A .ci/monolithic-macos.sh
M .github/workflows/premerge.yaml
Log Message:
-----------
[premerge] Route macOS build through a monolithic script to enable Job Summary (#211565)
The macOS premerge job built inline instead of via a `monolithic-*.sh`
script, so it never emitted a GitHub Job Summary or JUnit XML like
Linux/Windows do on failure
Commit: 1d4e04f7a7c2669dd652861e7dccc22f67ab3355
https://github.com/llvm/llvm-project/commit/1d4e04f7a7c2669dd652861e7dccc22f67ab3355
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGException.cpp
M clang/test/CodeGen/WebAssembly/wasm-eh.ll
M libcxxabi/src/cxa_personality.cpp
M libunwind/include/unwind.h
A libunwind/include/unwind_wasm.h
M libunwind/src/Unwind-wasm.c
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/eh-lsda.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/function-info.mir
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj-phi.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-em-sjlj-error.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-invalid-personality.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-sjlj-setjmp-within-catch.ll
M llvm/test/Transforms/ExpandVariadics/invoke.ll
M llvm/test/Transforms/InstCombine/catchswitch-phi.ll
M llvm/test/Transforms/PGOProfile/memop_profile_funclet_wasm.ll
M llvm/test/Transforms/SROA/phi-catchswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/catchswitch.ll
M llvm/test/Transforms/SimplifyCFG/cleanup-phis.ll
Log Message:
-----------
[WebAssembly] Call EH personality function instead of `Unwind_CallPersonality` (#209282)
On Wasm, it's not currently possibly to change which `personality` is
attached to a given IR function. This is primarily because no matter
what `personality` is attached, codegen creates a call to a
`Unwind_CallPersonality` wrapper hard-coded to call c++abi's
personality.
In order to allow alternative personalities without introducing bloat at
each personality call site, this PR adjusts the ABI of the personality
on Wasm. `Unwind_CallPersonality` is moved to `libcxxabi` under the name
`__gxx_wasm_personality_v0`, with the "real" personality code renamed
`__gxx_personality_imp` and called by `__gxx_wasm_personality_v0` (after
resetting the landing pad context).
The signature of EH personalities on Wasm is now `int personality(void*
exception_object)` (where the int return is `_Unwind_Reason_Code` and
the `void*` is `_Unwind_Exception*`), and personalities are expected to
`__wasm_lpad_context.selector = 0;`.
Based on #175202
Commit: 78f84b6ded1f30703faa148ab2c9fd6d0c5a40b7
https://github.com/llvm/llvm-project/commit/78f84b6ded1f30703faa148ab2c9fd6d0c5a40b7
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/AST/MicrosoftMangle.cpp
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (#210720)
This commit adds APFloat support for UE5M3 type and the associated tests. It is an 8 bit FP type with no sign bit, 5 exponent and 3 mantissa bits
| Property | Value |
|-----------------|------------|
| Max exponent | 31 |
| Bias | 15 |
| Zero encoding | 00000 000 |
| Smallest denorm | 00000 001 |
| Largest denorm | 00000 111 |
| Smallest norm | 00001 000 |
| Largest norm | 11111 110 |
| Canonical NaN | 11111 111 |
Please refer [PTX ISA](https://docs.nvidia.com/cuda/developer-preview/13.4/parallel-thread-execution/index.html#alternate-floating-point-data-formats) for more info
Assisted by: Claude Code (Opus 4.8)
Commit: fd364511f721451771970b39c3d61593eda508c9
https://github.com/llvm/llvm-project/commit/fd364511f721451771970b39c3d61593eda508c9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
Log Message:
-----------
[ORC] Remove SymbolInstance class. (#212665)
This class had only one user, and no tests. Remove it for now and update
the single user to call ExecutionSession::lookup directly.
Commit: bb33de72920a7a62633af0f1ab484d114a07fe7f
https://github.com/llvm/llvm-project/commit/bb33de72920a7a62633af0f1ab484d114a07fe7f
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lld/test/wasm/lto/libcall-archive-bitcode.ll
M llvm/test/CodeGen/WebAssembly/immutable-global-alias.ll
M llvm/test/CodeGen/WebAssembly/imported-const-global.ll
Log Message:
-----------
[WebAssembly] Add a newline at end of file (#212674)
Some tests files lack a newline at end of file. This adds it.
Commit: e91c8a4c204340ef344916dc1007cc538170e0f4
https://github.com/llvm/llvm-project/commit/e91c8a4c204340ef344916dc1007cc538170e0f4
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/LiveRangeShrink.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PostRASchedulerList.cpp
M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/TypePromotion.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp
M llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp
M llvm/lib/Target/AArch64/AArch64SRLTDefineSuperRegs.cpp
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/ARC/ARCOptAddrMode.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/Hexagon/HexagonLiveVariables.cpp
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
M llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/X86/GISel/X86PostLegalizerCombiner.cpp
M llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/NaryReassociate.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/Sink.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
Log Message:
-----------
Remove analysis preservations subsumed by CFG preservation. NFC (#212672)
Legacy PM: setPreservesCFG() adds every pass registered as CFG-only
(dominator/post-dominator trees, loop/cycle info, block frequency,
register class info, BasicAA, ...) to the preserved set, so a separate
addPreserved<X> for such X is a no-op, as is
addPreservedID(MachineDominatorsID) / addPreservedID(MachineLoopInfoID).
New PM: preserveSet<CFGAnalyses>() keeps every result whose invalidate()
accepts the CFGAnalyses set, making an explicit preserve<X>() on the
same PreservedAnalyses redundant. SLPVectorizer, AggressiveInstCombine
and SROA keep their explicit preserves, which are load-bearing on paths
that change the CFG.
Suggested by jmmartinez in
https://github.com/llvm/llvm-project/pull/212430#discussion_r3664131067
Aided by Claude Fable 5
Commit: 10ce0f74886f04a78b1183b598a656cb0957b15a
https://github.com/llvm/llvm-project/commit/10ce0f74886f04a78b1183b598a656cb0957b15a
Author: Congzhe Cao <congzhe.cao at huawei.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
A llvm/test/Transforms/PGOProfile/icp_hot_func_threshold.ll
Log Message:
-----------
[ICP] Introduce a hot function cutoff threshold for ICP (#208060)
Introduce a new hot function cutoff threshold specific to Indirect Call
Promotion (ICP) that can enable promotion of more indirect call targets.
Currently by default the threshold value is the same as the general
threshold `ProfileSummaryCutoffHot` that had also been used for ICP, so
by default the ICP behavior stays exactly the same unless users
specify some other value for the new threshold `-hot-func-cutoff-for-icp`.
Commit: c2fa4128681863d92b2fe1615beb73e2ed62876f
https://github.com/llvm/llvm-project/commit/c2fa4128681863d92b2fe1615beb73e2ed62876f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Sema/CMakeLists.txt
R llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/CMakeLists.txt
M llvm/include/module.install.modulemap
M llvm/include/module.modulemap
M llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
Log Message:
-----------
AMDGPU: Generate TargetParser table from TableGen (#212353)
Migrate .def file to tablegen. The initial TargetParser
AMDGPU backend only handled R600. Extend to modern targets.
Stub out some tablegen definitions which will be used in future
changes.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: ab993800519301853d4dfebcf4aa454d95938ee4
https://github.com/llvm/llvm-project/commit/ab993800519301853d4dfebcf4aa454d95938ee4
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
A llvm/test/CodeGen/X86/vector-sint-to-fp-zero.ll
A llvm/test/CodeGen/X86/vector-uint-to-fp-zero.ll
Log Message:
-----------
[X86] Fix redundant zeroing operations when casting ints to FP vectors (#212065)
Commit: 4e326b492aadea4b65f19b5581b0b3e52e8aaed3
https://github.com/llvm/llvm-project/commit/4e326b492aadea4b65f19b5581b0b3e52e8aaed3
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
Log Message:
-----------
[BFI] Remove redundant getHeaderIndex lookup in adjustLoopHeaderMass. NFC (#212679)
getHeaderIndex(Loop.Nodes[H]) is H.
Commit: cf8b0ad96a57570695fba02013590939ffe36af9
https://github.com/llvm/llvm-project/commit/cf8b0ad96a57570695fba02013590939ffe36af9
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/WebAssembly/cast.ll
Log Message:
-----------
[WebAssembly] Fix v8i16-to-v8f32 uitofp cost (#212501)
I think there was a wrong duplication here. The WebAssembly SIMD
conversion cost table accidentally duplicated the
`UINT_TO_FP` entry for `v8i8` to `v8f32`. As a result, the unsigned
`v8i16` to `v8f32` conversion missed the target-specific table entry and
fell back to the generic cost of 5 instead of the intended cost of 10.
I've added ` llvm/test/Analysis/CostModel/WebAssembly/cast.ll` which I
think is good here as it would help test other casting errors in the
future too.
Commit: 40f95afe42db06e2f4226353039de96d66b5d18e
https://github.com/llvm/llvm-project/commit/40f95afe42db06e2f4226353039de96d66b5d18e
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes c2fa412 (#212688)
This fixes c2fa4128681863d92b2fe1615beb73e2ed62876f (#212353).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=c2fa4128681863d92b2fe1615beb73e2ed62876f
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: f4382bedc245a22ea7c354d08eb13543166a5f0d
https://github.com/llvm/llvm-project/commit/f4382bedc245a22ea7c354d08eb13543166a5f0d
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/test/CodeGen/ARM/elf-preemption.ll
Log Message:
-----------
[ARM] Exclude TLS symbols from the .reloc/R_ARM_REL32 path (#212549)
The .reloc branch in emitMachineConstantPoolValue fired for any
isWeakForLinker() + isDSOLocal() symbol, including TLS (thread_local)
weak symbols. R_ARM_REL32 is wrong for TLS: TLS symbols need
TLS-specific relocations (R_ARM_TLS_GD32 etc.). Using R_ARM_REL32 for a
TLS symbol produces a wrong address at runtime.
This broke the 2-stage ARM 32-bit buildbots: stage 1 (with the .reloc
branch) miscompiled stage 2's BPF codegen (BTFDebug.cpp references
llvm::sys::sandbox::Enabled, an inline thread_local weak variable),
causing a SIGSEGV in the BPF Assembly Printer.
Add a regression test (tls_weak_var in elf-preemption.ll) verifying that
TLS weak symbols get TLSGD/TPOFF, not R_ARM_REL32.
Fix #212545
Commit: ad300a7712f3506e702501097ddfe6b322cfa0fb
https://github.com/llvm/llvm-project/commit/ad300a7712f3506e702501097ddfe6b322cfa0fb
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/IR/Instruction.cpp
Log Message:
-----------
[IR] Remove deprecated InsertPosition(Instruction*) constructor (#212640)
This implicit constructor has been marked deprecated since almost 2
years in favor of constructing an InsertPosition from a
BasicBlock::iterator.
Remove it now that in-tree users no longer rely on it.
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 9cdb4219e8edb617076a8c1a118cce119179e288
https://github.com/llvm/llvm-project/commit/9cdb4219e8edb617076a8c1a118cce119179e288
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M mlir/test/IR/invalid-ops.mlir
M mlir/test/lib/Dialect/Test/TestOpsSyntax.td
M mlir/test/mlir-tblgen/op-format.mlir
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[MLIR] Validate directly parsed optional operand types (#212493)
Commit 6c51938067fa ([MLIR] Guard optional operand resolution in
generated op parsers) guarded resolution of every optional operand to
avoid indexing an empty inferred type range. The guard also skipped
resolveOperands when an optional operand was absent but an independently
optional type directive was present. This accepted malformed assembly
and silently discarded the orphan type when printing the operation.
Keep the guard for inferred type resolutions, which may access an empty
optional type vector, but always resolve directly parsed type ranges so
resolveOperands validates operand/type cardinality. Add coverage for
both valid forms and a type-only negative reproducer.
Commit: 52f6c88c2c1b6f0c10b9c8fb09ec35e147c593e3
https://github.com/llvm/llvm-project/commit/52f6c88c2c1b6f0c10b9c8fb09ec35e147c593e3
Author: David Green <david.green at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
Log Message:
-----------
[Codegen] Replace any_of with is_contained. NFC (#212289)
A new operator== for SVT and EVT was apparently needed with reverse
operands.
Commit: 3df3102da5c0ebb5d32a9146f6b0aec925bc4742
https://github.com/llvm/llvm-project/commit/3df3102da5c0ebb5d32a9146f6b0aec925bc4742
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lld/test/ELF/hexagon-thunk-range-b22rel.s
M lld/test/ELF/ppc32-call-stub-nopic.s
M lld/test/ELF/ppc32-call-stub-pic.s
M lld/test/ELF/ppc32-long-thunk.s
M lld/test/ELF/ppc64-call-reach.s
M lld/test/ELF/ppc64-ifunc.s
M lld/test/ELF/ppc64-long-branch-pi.s
M lld/test/ELF/ppc64-long-branch-rel14.s
M lld/test/ELF/ppc64-long-branch.s
Log Message:
-----------
[test] Migrate Hexagon/PowerPC thunk tests to the default thunk order (#212693)
Drop -z nosort-thunks (added by #211721 to keep creation order) and
update expectations to the default order: forward thunks sorted by
descending destination.
Commit: a7b2a20f01681186bb6872c077a52e22632db9ad
https://github.com/llvm/llvm-project/commit/a7b2a20f01681186bb6872c077a52e22632db9ad
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/State.cpp
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/constexpr-steps.cpp
M clang/test/AST/ByteCode/dynalloc-limits.cpp
M clang/test/SemaCXX/constexpr-function-recovery-crash.cpp
M clang/test/SemaCXX/constexpr-steps.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc-limits.cpp
M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
Log Message:
-----------
[clang] Improve diagnostics around constexpr limits (#212091)
1) Mention the limit in the "constexpr evaluation hit maximum step
limit" diagnostic as well
2) Move the "use -fconstexpr-steps" instruction to its own note so we
can reuse it for two different diagnostics
For
```c++
struct S {
constexpr S() {}
};
constexpr S foo[1'500'000] = {};
```
we used to emit
```console
array.cpp:1028:13: error: constexpr variable 'foo' must be initialized by a constant expression
1028 | constexpr S foo[1'500'000] = {};
| ^ ~~
array.cpp:1026:17: note: constexpr evaluation hit maximum step limit; possible infinite loop?
1026 | constexpr S() {}
| ^
array.cpp:1028:31: note: in call to 'S()'
1028 | constexpr S foo[1'500'000] = {};
| ^
```
and now we emit
```console
array.cpp:1028:13: error: constexpr variable 'foo' must be initialized by a constant expression
1028 | constexpr S foo[1'500'000] = {};
| ^ ~~
array.cpp:1026:17: note: constexpr evaluation hit maximum step limit of 1048576; possible infinite loop?
1026 | constexpr S() {}
| ^
array.cpp:1028:31: note: in call to 'S()'
1028 | constexpr S foo[1'500'000] = {};
| ^
array.cpp:1026:17: note: use -fconstexpr-steps= to increase this limit (=0 will remove the limit)
1026 | constexpr S() {}
```
Commit: 8c5193b41f2f1f5fb704a70e1f4bb7c0153d2d9d
https://github.com/llvm/llvm-project/commit/8c5193b41f2f1f5fb704a70e1f4bb7c0153d2d9d
Author: Raul Tambre <raul at tambre.ee>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/test/Shell/Settings/TestCxxFrameFormatRecursive.test
Log Message:
-----------
[lldb][test] Use C++ frontend for building C++ test file (#212611)
Commit: 9ba969c46204e4723cf4b5720a34fc537ce2d458
https://github.com/llvm/llvm-project/commit/9ba969c46204e4723cf4b5720a34fc537ce2d458
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_tensor_float32_conversion/tf32-conv.ll
A llvm/test/CodeGen/SPIRV/get-global-id-non-integer-dim.ll
Log Message:
-----------
[SPIR-V] Reject builtin calls if mangled argument types do not match the IR (#208152)
Commit: 83ed1d0925ef5523e3be4f182db1df712ed490fa
https://github.com/llvm/llvm-project/commit/83ed1d0925ef5523e3be4f182db1df712ed490fa
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
Log Message:
-----------
[NFC][SPIR-V] Add constrainSelectedInstRegOperands helper to dedup repeating pattern in global registry (#208703)
Commit: f193d19d2127023966cbeb6ccf1487f975f53acc
https://github.com/llvm/llvm-project/commit/f193d19d2127023966cbeb6ccf1487f975f53acc
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/NonUniformIdx/RWBufferNonUniformIdxLoop.ll
Log Message:
-----------
[SPIR-V] Fix OpDecorate insertion point for non-PHI defs in decorateUsesAsNonUniform (#212524)
Inserting before the defining instruction placed the decoration ahead of
its own operand, breaking dominance for the loop-carried case
Fix machine code errors from
https://github.com/llvm/llvm-project/pull/208224#issuecomment-5095074660
Commit: b2b5c13f69e4cfcba339967e0c16b06b081b5e2e
https://github.com/llvm/llvm-project/commit/b2b5c13f69e4cfcba339967e0c16b06b081b5e2e
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/modernize/redundant-void-arg.md
Log Message:
-----------
[clang-tidy][docs] Fix broken redundant-void-arg documentation. NFC. (#212692)
Commit: acd22eec9e79b69515aa2204dc96dcfa3ff0d387
https://github.com/llvm/llvm-project/commit/acd22eec9e79b69515aa2204dc96dcfa3ff0d387
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
Log Message:
-----------
[clang][bytecode][NFC] Add Record::findField to look up fields by offset (#212697)
Commit: 9cd13c11bacc9a5b83640a7168ab0f51160e4ee0
https://github.com/llvm/llvm-project/commit/9cd13c11bacc9a5b83640a7168ab0f51160e4ee0
Author: 222rohan <rohanshenoy405 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
Log Message:
-----------
[X86] Remove TuningFastSHLDRotate from BMI2 targets (#211217)
This flag has no effect at `x86-64-v3` or `v4`. It only enables a pseudo
that lowers `rotl`/`rotr` by immediate to `shld $imm, %reg, %reg`, but a
higher-priority `RORX` pattern matches the same case and always wins the
iSel tie.
Both patterns match `rotl(GR64, imm)`; only their `AddedComplexity`
differs:
```
// X86InstrShiftRotate.td:507 -- SHLD-rotate pseudo, complexity 5
let Predicates = [HasFastSHLDRotate], AddedComplexity = 5, ... in {
def SHLDROT64ri : ... [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$shamt)))]>;
}
// X86InstrShiftRotate.td:602 -- RORX pattern, complexity 10, only needs BMI2
let AddedComplexity = 10 in {
def : Pat<(rotl GR64:$src, (i8 imm:$shamt)),
(RORX64ri GR64:$src, (ROT64L2R_imm8 imm:$shamt))>;
}
```
LLVM's iSel always picks `RORX`, and it only requires BMI2, which is
part of `x86-64-v3` and up, so it is picked unconditionally on every
v3/v4 build regardless of `TuningFastSHLDRotate`.
No codegen change; existing lit tests unaffected.
Commit: 17df4290daed63acd8171af570fa8b6190d758f0
https://github.com/llvm/llvm-project/commit/17df4290daed63acd8171af570fa8b6190d758f0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/test/AST/ByteCode/builtin-object-size-codegen.cpp
Log Message:
-----------
[clang][bytecode][NFC] Add CHECK markers for functions in test (#212699)
We aren't testing the existence of the function in the output here, but
without these markers, debugging test failures here can become very
cumbersome.
Commit: a6614ee07b916785321eb046d525374a022b8ebb
https://github.com/llvm/llvm-project/commit/a6614ee07b916785321eb046d525374a022b8ebb
Author: StoeckOverflow <95052643+StoeckOverflow at users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/include/clang/APINotes/Types.h
M clang/include/clang/Sema/Sema.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/lib/Sema/SemaAPINotesInternal.h
A clang/test/APINotes/where-parameters-diagnostics.cpp
Log Message:
-----------
[APINotes] Diagnose invalid Where.Parameters selectors (#209408)
This PR adds diagnostics for exact `Where.Parameters` selectors on top
of the existing parsing, serialization, and Sema matching support.
It diagnoses duplicate exact selectors during API notes conversion,
including duplicate `Where.Parameters: []`, while still allowing broad
name-only entries and same-name entries with different selectors.
It also adds reader/Sema support to warn under `-Wapinotes` when an
exact selector in API notes does not match any visible overload. The
reader can now enumerate stored exact selectors for global functions and
C++ methods, and Sema compares those against the selector candidates
derived from the visible overload set.
The diagnostic path follows the same matching policy as Sema, including
the desugared alias fallback, so valid matched selectors do not produce
false warnings.
Tests cover duplicate selector errors, unmatched selector warnings for
globals and C++ methods, broad-plus-exact coexistence, exact notes not
silently applying on mismatch, and no false warnings for matched or
alias-fallback selectors.
Reviewers: @Xazax-hun @j-hui @egorzhdan
---------
Co-authored-by: John Hui <updog at j-hui.com>
Commit: 005c18eac0a70158c2db4611bf824af6e0bc80ac
https://github.com/llvm/llvm-project/commit/005c18eac0a70158c2db4611bf824af6e0bc80ac
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A flang/include/flang/Optimizer/Transforms/AllocationPlacementPolicy.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
A flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/test/Transforms/allocation-placement-budget.fir
A flang/test/Transforms/allocation-placement-stack-arrays-mode.fir
A flang/test/Transforms/allocation-placement.fir
Log Message:
-----------
[flang] Add policy-driven allocation-placement pass - memory passes unification [2/5] (#210742)
Introduce a new function-level pass, allocation-placement, that unifies
the stack/heap placement decisions currently split between the
stack-arrays and memory-allocation-opt passes. For each array allocation
it consults a policy to decide whether it should live on the stack
(fir.alloca) or the heap (fir.allocmem) and rewrites it accordingly,
reusing fir::replaceAllocas for stack-to-heap and the StackArrays
analysis/rewrite for heap-to-stack (so heap-to-stack only happens where
it is provably safe).
The default policy (AllocationPlacementPolicy.h) is threshold-driven:
- small constant-size arrays go on the stack within a per-function stack
budget, otherwise on the heap;
- big constant-size arrays: user variables stay on the stack,
temporaries go on the heap;
- runtime-sized arrays go on the heap;
- an aggressive mode places all arrays on the stack (best effort). User
variables are distinguished from compiler temporaries via the presence
of a uniqued name. A hook lets downstream users override the thresholds
per allocation (e.g. for device routines or parallel regions).
The pass is not wired into any pipeline yet; it is reachable through
fir-opt and covered by isolated tests.
Assisted-by: AI
Commit: ebc5778e5dc9e195311911595c0b1a415f807c7f
https://github.com/llvm/llvm-project/commit/ebc5778e5dc9e195311911595c0b1a415f807c7f
Author: Weronika Lewandowska <weronika.lewandowska at intel.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
[Offload] Enable offload test on Windows (#212480)
Description:
This change enables the offload test build on Windows by adding
compatibility guards around libomptarget test suites.
Why:
libomptarget is not available on Windows. Without these guards, CMake
fails when referencing the missing omptarget target. With these guards,
Windows builds complete successfully and run available tests (using
check-offload-unit), while Linux/macOS builds remain unaffected.
Commit: b95ce5ed68edad82e766ee8a7e9dae7809bc84dc
https://github.com/llvm/llvm-project/commit/b95ce5ed68edad82e766ee8a7e9dae7809bc84dc
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
Log Message:
-----------
[LLVM] Disambiguate MVT and SVT comparisons (#212711)
[LLVM] Disambiguate MVT and SVT comparisons
Without this:
```
error: use of overloaded operator '==' is ambiguous (with operand types 'MVT' and 'llvm::MVT::SimpleValueType')
167 | if (VT == MVT::Untyped)
| ~~ ^ ~~~~~~~~~~~~
llvm/include/llvm/CodeGenTypes/MachineValueType.h:62:10: note: candidate function
62 | bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
| ^
llvm/include/llvm/CodeGen/ValueTypes.h:598:15: note: candidate function (with reversed parameter order)
598 | inline bool operator==(MVT::SimpleValueType SVT, EVT VT) { return VT == SVT; }
| ^
1 error generated.
```
Fixes 52f6c88c2c1b6f0c10b9c8fb09ec35e147c593e3
Commit: 61d6e494e97a8fda6946291fd3bc6bb648c86e93
https://github.com/llvm/llvm-project/commit/61d6e494e97a8fda6946291fd3bc6bb648c86e93
Author: vsimion26 <vlad.simion at intel.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Quant/IR/QuantTypes.h
M mlir/lib/Dialect/Quant/IR/QuantTypes.cpp
M mlir/test/Dialect/Quant/invalid-quantile-types.mlir
M mlir/test/Dialect/Quant/quantile-types.mlir
Log Message:
-----------
QuantileType relax quantileType conditions and inheritance issue (#204793)
# Recategorize QuantileType as Storage Format, Not Quantization Scheme
## Summary
Reclassify `QuantileType` from inheriting `QuantizedType` to functioning
as a pure storage type.
## Motivation
### QuantileType is a Storage Format, Not a Quantization Scheme
After careful consideration, there was a conclusion reached that
**QuantileType should not be registered as a subtype of QuantizedType**.
The architectural distinction is critical:
- **QuantizedType** represents different quantization schemes (uniform,
per-axis, etc.), semantic operations that map values into a
lower-precision domain
- **QuantileType** is purely a **storage format** that specifies how to
interpret indices within a lookup table (LUT)
QuantileType was never meant to function as a quantization scheme on its
own. Instead, its purpose is to indicate **how to interpret indices
based on the given LUT**. It is an orthogonal concern to quantization
semantics; it describes data organization, not mathematical
transformation.
### Relaxed Type Conditions
The previous implementation restricted the LUT values to float types
only. However, float types are not the only types that can exist inside
a LUT, integer types are valid as well.
This PR removes the type restriction, allowing **both floating-point and
integer-based LUT interpretations** to coexist, better matching actual
use cases.
## Changes
- **Removed**: Incorrect inheritance of `QuantizedType` by
`QuantileType`
- **Relaxed**: Type constraints to accept both float and integer LUT
value types
Commit: e062a29cf865bb7cadea6cb605c9f3515e5b883f
https://github.com/llvm/llvm-project/commit/e062a29cf865bb7cadea6cb605c9f3515e5b883f
Author: Yordan Vásquez <vyordangiovani at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/test/std/numerics/numarray/template.valarray/valarray.access/access.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.access/const_access.pass.cpp
Log Message:
-----------
[libc++] Mark LWG3133 as Complete and add valarray operator[] safety tests (#208145)
This verifies that libc++ has implemented the resolution of LWG3133,
which modernizes the requirements on `T` for `std::complex<T>` and
`std::valarray<T>` in [numeric.requirements].
- No code changes were needed for `std::valarray<T>`: its `operator[]`
already indexes through a raw pointer and never relies on a
user-overloadable `operator&`, so it already conforms to the revised
wording.
- Added o`perator_hijacker`-based tests to `valarray`'s
`access.pass.cpp`/`const_access.pass.cpp`, confirming `operator[]`
doesn't rely on a user-overloadable `operator&`.
Commit: 0cce7a09237402359113036e9fe6469301e53a9c
https://github.com/llvm/llvm-project/commit/0cce7a09237402359113036e9fe6469301e53a9c
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix Vcc reg bank apply method for sgpr i1 input (#212532)
Need to clean up high bits on sgpr bool use, simlar to Sgpr32AExtBoolInReg.
G_AMDGPU_COPY_VCC_SCC assumes clean (zero) high bits in sgpr i32 input.
This should be combined away in most cases, for example if input is result
of a compare. But should stay for example for truncated input from s_load.
Commit: 9df6ca12f24bd35b02f5eae7a27cc92533482e03
https://github.com/llvm/llvm-project/commit/9df6ca12f24bd35b02f5eae7a27cc92533482e03
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-ptrue-coalesce.mir
Log Message:
-----------
[LLVM][CodeGen][SVE] Add ElementSize information to fp compare, continuous/replicating load and store instructions (#204821)
This information was originally used to implement MOVPFRX support.
However https://github.com/llvm/llvm-project/pull/204820 uses the same
information to determine which bits of an instruction's predicate
operand are used so that PTRUE instructions can be coalesced.
MOVPRFXable instructions are a subset of all predicated instructions, so
this patch extends some non-MOVPRFXable instructions with ElementSize
information.
Commit: 3120980d24f67f5754742c1dc8865e30307529ce
https://github.com/llvm/llvm-project/commit/3120980d24f67f5754742c1dc8865e30307529ce
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC]: Use CostCtx.CM instead of CM in precomputeCosts (#212287)
Commit: 462602de4245031e363b80a208f595826e738831
https://github.com/llvm/llvm-project/commit/462602de4245031e363b80a208f595826e738831
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
A llvm/test/CodeGen/AMDGPU/soft-waitcnt-deletion.mir
Log Message:
-----------
[AMDGPU] Fix incorrect VM_VSRC simplification after async instruction (#212481)
Add ASYNC_CNT to the list of VMEM counters. The implication is that only
if all these counters are zero can we know that there are no outstanding
VMEM instructions, so VM_VSRC must be zero.
Commit: e7db113dca5582f512e95053dd1b770f594ae2e8
https://github.com/llvm/llvm-project/commit/e7db113dca5582f512e95053dd1b770f594ae2e8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/MachineVerifier/AMDGPU/verify-ds-vdata-vdst-both-agpr-or-vgpr.mir
Log Message:
-----------
[AMDGPU] Remove redundant AGPR/VGPR register class verification (#212721)
Commit: 3757c5d331d5d4781a7325ea890b2754c6dad5bb
https://github.com/llvm/llvm-project/commit/3757c5d331d5d4781a7325ea890b2754c6dad5bb
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/clmul.ll
A llvm/test/CodeGen/AArch64/misched-reg-pressure-limits.mir
M llvm/test/CodeGen/AArch64/neon-dotreduce.ll
M llvm/test/CodeGen/AArch64/neon-extadd.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-vselect.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc.ll
M llvm/test/TableGen/aarch64-register-info-stats.td
Log Message:
-----------
[AArch64] Mark FIXED_REGS register class as non-allocatable (#212250)
FIXED_REGS is not used for register allocation, but since it overlaps
the GPR classes via FP and SP, TableGen merges VG and FFR into the GPR
pressure set, giving it a static limit of 35.
The underlying GPR32all class has 33 registers: W0-W30, WZR, and WSP.
WZR and WSP are always reserved, leaving up to 31 allocatable registers
depending on whether W29 (FP) and W30 (LR) are reserved.
Marking FIXED_REGS non-allocatable removes VG and FFR from the pressure
set, reducing its static limit from 35 to 33 and its dynamic limit from
33 to 31. The corrected limit changes scheduling decisions made by the
register-pressure heuristics, which explains the test churn.
Assisted-by: codex
Commit: 9c9e12c80a421d6454c49869fdf14aa78d11078b
https://github.com/llvm/llvm-project/commit/9c9e12c80a421d6454c49869fdf14aa78d11078b
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/MC/Disassembler/AMDGPU/gfx9_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_smem_features.txt
Log Message:
-----------
[AMDGPU] Fix typos SGRP and VGRP. NFC. (#212732)
Commit: 29bc0749034c4f2bda0752360ecacd4e89d7439c
https://github.com/llvm/llvm-project/commit/29bc0749034c4f2bda0752360ecacd4e89d7439c
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/source/API/SBTarget.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Fix crash on creating string error (#212503)
It crashes because the `default` error string may not be a format string
compared to the `fallback` error string
Commit: 5989d40ab1d0db8333b5976d957a49525d36cf35
https://github.com/llvm/llvm-project/commit/5989d40ab1d0db8333b5976d957a49525d36cf35
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
A flang/test/Fir/allocation-placement-pipeline.fir
Log Message:
-----------
[flang] Wire allocation-placement into the optimizer pipeline (default off) - memory passes unification [3/5] (#210745)
Add a hidden -enable-allocation-placement flag that, when set, replaces
the stack-arrays and memory-allocation-opt passes in the default FIR
optimizer pipeline with the unified allocation-placement pass. The flag
is off by default, so the legacy passes remain the default path and
behavior is unchanged.
When enabled, the pass runs with its default byte-size thresholds; the
-fstack-arrays strategy is forwarded through the new stackArrays option.
Assisted-by: AI
Commit: 6e116760ca4010be890b7fa39c93f2c902ab2a31
https://github.com/llvm/llvm-project/commit/6e116760ca4010be890b7fa39c93f2c902ab2a31
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-add-part.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
Log Message:
-----------
[SLP]Initial support for copyables in fmuladd intrinsic
Adds llvm.fmuladd as a main operation for copyable elements. A
non-fmuladd lane V is modeled as fmuladd(0.0, -0.0, V), which equals
-0.0 + V == V for every V. Only the addend operand is supported for
now; multiplicand operands may be added later.
Reviewers: bababuck, hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/211245
Commit: a41d59740625948c6b334abbf921d0888b6f0377
https://github.com/llvm/llvm-project/commit/a41d59740625948c6b334abbf921d0888b6f0377
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M libcxx/test/libcxx/atomics/clear_padding.pass.cpp
Log Message:
-----------
[libc++][test][NFC] remove old UNSUPPORTED clang from clear_padding.pass.cpp (#212690)
Follow up PR for comment
https://github.com/llvm/llvm-project/pull/211258/changes#r3663614103
I think I must have made an oversight while resolving a merge conflict
Commit: 2545a108f4d173ed509e3eea33753227bdd6f847
https://github.com/llvm/llvm-project/commit/2545a108f4d173ed509e3eea33753227bdd6f847
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model-i386.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
Log Message:
-----------
[VPlan] Compute cost of some VPWidenIntOrFpInductions in VPlan (#202232)
Add initial implementation of VPWidenIntOrFpInductionRecipe::computeCost,
handling un-truncated inductions.
For the first patch, only compute costs in VPlan if there are no
truncated inductions (in that case, there are additional differences for
the cost model, as previously we would not cost the truncate properly)
and the vector loop won't get unrolled (no induction cost).
Note that some decision change. This is due to the legacy cost model
computing the cost of the original IR, where the induction is scaled in
the loop in each iteration (e.g. with mul), while in the vector loop we
scale the increment, and there is just an add to increment the
induction. This is more accurate than the legacy cost computation.
PR: https://github.com/llvm/llvm-project/pull/202232
Commit: 6314c9731eafa68837bbbab65e347922134b004a
https://github.com/llvm/llvm-project/commit/6314c9731eafa68837bbbab65e347922134b004a
Author: firmiana <firmiana402 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb][NFC] Explicitly list unsupported DWARF expression opcodes (#210363)
This PR addresses
[#202251](https://github.com/llvm/llvm-project/issues/202251).
Several opcodes recognized by LLDB's DWARF expression decoding logic
currently have no explicit `case` in `DWARFExpression::Evaluate`. They
therefore reach the generic default path, which makes it unclear whether
their evaluator status is intentional or an omission.
Explicitly list the affected opcodes and group them with the existing
`DW_OP_xderef`, `DW_OP_xderef_size`, `DW_OP_call2`, and `DW_OP_call4`
cases. All twelve known but unsupported opcodes now share an
`unimplemented opcode` return, while `default` remains responsible for
unknown and vendor-handled opcodes. No opcode evaluation semantics
change.
The affected opcodes are `DW_OP_call_ref`, `DW_OP_constx`,
`DW_OP_const_type`, `DW_OP_regval_type`, `DW_OP_deref_type`,
`DW_OP_xderef_type`, `DW_OP_reinterpret`, and
`DW_OP_GNU_implicit_pointer`.
## Tests
The existing per-opcode status-locking tests in
`DWARFExpressionTest.cpp` cover all affected cases and are updated to
check the unified diagnostic.
Commit: d630025295d5ef6724ec9deab162b983ffee6638
https://github.com/llvm/llvm-project/commit/d630025295d5ef6724ec9deab162b983ffee6638
Author: Felix Ye <felixyjs at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M mlir/test/Examples/Toy/Ch6/llvm-lowering.mlir
M mlir/test/Examples/Toy/Ch7/llvm-lowering.mlir
Log Message:
-----------
[mlir][toy] Fix Ch6/Ch7 llvm-lowering tests (#212118)
Add missing `| FileCheck %s` to `RUN` lines so `CHECK` lines can be
verified. Also correct the expected result from `30` to `36`. The result
should be `6*6=36`.
The example in the tutorial is correct (`3.600000e+01`).
https://mlir.llvm.org/docs/Tutorials/Toy/Ch-6/
Signed-off-by: Felix Ye <felixyjs at gmail.com>
Commit: c53789fcf54979f7986d2e396920b725ce88f3e4
https://github.com/llvm/llvm-project/commit/c53789fcf54979f7986d2e396920b725ce88f3e4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M libcxx/src/include/atomic_support.h
Log Message:
-----------
[libc++][NFC] Clean up atomic_support.h (#212464)
We don't support any compilers which don't have the atomic builtins, so
we don't need to check whether they exist. There is also no need for an
anonymous namespace, since all the functions are inline.
Commit: 25cc0d29e2c34966116f897e0db496d94cf91acf
https://github.com/llvm/llvm-project/commit/25cc0d29e2c34966116f897e0db496d94cf91acf
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Log Message:
-----------
[AArch64] NFC: simplify isCopyInstrImpl expression (#212487)
To something more intuitive by applying the following logic:
* `!isVirtual()` -> `isPhysical()`
* `!isPhysical()` -> `isVirtual()`
* `(a || b) && (!a || c)` -> `(!a && b) || (a && c)`
Commit: f53596de0e42e9df10831cb50438bc8b85f826b3
https://github.com/llvm/llvm-project/commit/f53596de0e42e9df10831cb50438bc8b85f826b3
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/lib/CodeGen/Targets/Mips.cpp
A clang/test/CodeGen/mips-complex-abi.c
Log Message:
-----------
[MIPS][clang] make `_Complex` ABI match GCC (#212119)
fixes https://github.com/llvm/llvm-project/issues/212109
>From the edits to the release notes:
- On MIPS, a `_Complex` value with an integer element type is now
returned packed
into a single integer register when it fits in one, matching GCC. A
`_Complex char` or
`_Complex short`, and on N32/N64 also a `_Complex int`, is no longer
returned
with one part per register. `-fclang-abi-compat=23` restores the
previous
behavior. (#GH212109)
- On MIPS N32/N64, a `_Complex float` or `_Complex double` argument is
now packed
into integer registers, or onto the stack, once there is no longer room
to give
each of its parts a floating-point register, matching GCC. Clang
previously
always passed the parts separately. `-fclang-abi-compat=23` restores the
previous
behavior. (#GH212109)
Commit: 1d6a3dd80b48ad1990ed5e3e11acd3b06d2909b6
https://github.com/llvm/llvm-project/commit/1d6a3dd80b48ad1990ed5e3e11acd3b06d2909b6
Author: antoine moynault <antoine.moynault at linaro.org>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-offload-wrapper/offload-wrapper.ll
Log Message:
-----------
[LinkerWrapper][test] fix test offload-wrapper.ll (#212713)
The llc RUN command added in #212614 needs the X86 backend registered
Commit: deed195c31f0ece487aa5ef79c90633860f10b93
https://github.com/llvm/llvm-project/commit/deed195c31f0ece487aa5ef79c90633860f10b93
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
M clang/lib/StaticAnalyzer/Core/RangedConstraintManager.cpp
M clang/test/Analysis/pthreadlock.c
A clang/test/Analysis/simplify-drops-concrete.c
M clang/test/Analysis/z3/z3-crosscheck.c
Log Message:
-----------
[analyzer] Prune infeasible states related to concrete ints early to fix a crash (#210912)
RangedConstraintManager discards a simplified symbol if it reduces to a
concrete integer. This leads to delayed realization that some state
might be infeasible (because the concrete integer does not fit in the
assumed range), which might produce unexpected null pointers on the
following state splits.
PthreadLockChecker has fallen just into this trap. It assumes
`pthread_mutex_lock` is always called in a feasible state, which is was
not true.
In particular, in ZFS the analyzer crashes when runs in CTU mode because
it reaches `pthread_mutex_lock()` in over-constraint state (see the
reduced example in the first commit).
Checkers rely on the invariant that a state split can never result in
both `StateRef`s being null. To fix this violation of the invariant,
this patch helps RangedConstraintManager to realize a state is
infeasible and abort its exploration early so no follow-up state split
produce unexpected null-null pair.
Assisted by Claude Opus 4.8
--
CPP-8665
Commit: ed389ca093797baab0bcc95ffd2b6ca41741c40d
https://github.com/llvm/llvm-project/commit/ed389ca093797baab0bcc95ffd2b6ca41741c40d
Author: Aochang Liu <102237385+HelloWorldU at users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A llvm/test/CodeGen/ARM/regcoalesce-undef-copy-subreg-redef.ll
A llvm/test/CodeGen/ARM/regcoalesce-undef-copy-subreg-redef.mir
Log Message:
-----------
[CodeGen][ARM] Add regression tests for #202263 (#202599)
The underlying issue—RegisterCoalescer eliminating an undef COPY and
leaving a partial subregister redef that reads a value that no longer
exists—was fixed in #204039.
This PR adds the regression coverage originally developed alongside the
fix attempt, so the pattern remains covered:
- an end-to-end IR test that checks the generated assembly with
FileCheck;
- a focused single-pass `-run-pass=register-coalescer` MIR test using
`-verify-coalescing`, which reproduces the "Instruction is reading
nonexistent value" verifier error from #202263 when #204039 is reverted,
and passes with the fix applied.
Fixes #202263
Commit: e393b0a120de3cc3b0055d129056b30e48777cb6
https://github.com/llvm/llvm-project/commit/e393b0a120de3cc3b0055d129056b30e48777cb6
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/update_clause_ast_dump.cpp
M clang/tools/libclang/CIndex.cpp
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/test/Parser/OpenMP/atomic-compare.f90
M flang/test/Parser/OpenMP/depobj-construct.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[OpenMP] Split UPDATE clause into two: for ATOMIC and for DEPOBJ (#212270)
The UPDATE clause has the same spelling on both of these directives, but
functionally it's two different clauses. Split them into "update", and
"update_depend_objects" to be able to tie their properties to their enum
ids.
This should make it easier to implement auto-generating of clause
properties in the future by avoiding spelling conflicts.
---------
Co-authored-by: Alexey Bataev <a.bataev at outlook.com>
Commit: f43c0e2dac8d75362a07e283f44ae20339cd1de2
https://github.com/llvm/llvm-project/commit/f43c0e2dac8d75362a07e283f44ae20339cd1de2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/test/MC/AMDGPU/alignto_mcexpr.s
M llvm/test/MC/AMDGPU/branch-comment.s
M llvm/test/MC/AMDGPU/data.s
M llvm/test/MC/AMDGPU/dl-insts-err.s
M llvm/test/MC/AMDGPU/elf-lds-error.s
M llvm/test/MC/AMDGPU/elf-lds.s
M llvm/test/MC/AMDGPU/elf-notes-verify-amdgcn.s
M llvm/test/MC/AMDGPU/exp-err.s
M llvm/test/MC/AMDGPU/exp-pregfx11.s
M llvm/test/MC/AMDGPU/exp.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-code-props-v3.s
M llvm/test/MC/AMDGPU/labels-branch-err.s
M llvm/test/MC/AMDGPU/labels-branch-gfx9.s
M llvm/test/MC/AMDGPU/labels-branch.s
M llvm/test/MC/AMDGPU/max-branch-distance.s
M llvm/test/MC/AMDGPU/mcexpr_amd.s
M llvm/test/MC/AMDGPU/mcexpr_amd_err.s
M llvm/test/MC/AMDGPU/occupancy_mcexpr.s
M llvm/test/MC/AMDGPU/offset-expr.s
M llvm/test/MC/AMDGPU/offsetbug_once.s
M llvm/test/MC/AMDGPU/offsetbug_one_and_one.s
M llvm/test/MC/AMDGPU/offsetbug_twice.s
M llvm/test/MC/AMDGPU/pal-registers.s
M llvm/test/MC/AMDGPU/reloc-directive.s
M llvm/test/MC/AMDGPU/round-trip.s
M llvm/test/MC/AMDGPU/s_endpgm.s
M llvm/test/MC/AMDGPU/sop1.s
M llvm/test/MC/AMDGPU/sop2-err.s
M llvm/test/MC/AMDGPU/sopp.s
M llvm/test/MC/AMDGPU/sym_kernel_scope.s
M llvm/test/MC/AMDGPU/vcc_tuples.s
M llvm/test/MC/AMDGPU/vintrp-err.s
Log Message:
-----------
AMDGPU: Manually convert some MC tests to subarch triples (#212728)
Commit: 31de6f2c4b4d38bbcabea7a1eeb000f90f368604
https://github.com/llvm/llvm-project/commit/31de6f2c4b4d38bbcabea7a1eeb000f90f368604
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add SPIRVToLLVM conversions for GL.FSign and GL.SSign (#206934)
Commit: 6279654d605a6821a4ece039d13504a15b09ac03
https://github.com/llvm/llvm-project/commit/6279654d605a6821a4ece039d13504a15b09ac03
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
Log Message:
-----------
[gn] port c2fa41286818 (AMDGPUTargetParserDef.inc) (#212763)
Commit: 2f910f66e7e181c8c1b6ed97d44e6f4bceb6c557
https://github.com/llvm/llvm-project/commit/2f910f66e7e181c8c1b6ed97d44e6f4bceb6c557
Author: newgre <jannewger at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A llvm/include/llvm/Transforms/Instrumentation/CopyProf.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Instrumentation/CMakeLists.txt
A llvm/lib/Transforms/Instrumentation/CopyProf.cpp
A llvm/test/Instrumentation/CopyProf/function-instrumentation.ll
A llvm/test/Instrumentation/CopyProf/no-instrumentation.ll
A llvm/test/Instrumentation/CopyProf/store-instrumentation.ll
Log Message:
-----------
[CopyProf] Add CopyProf instrumentation passes. (#207385)
This patch introduces the instrumentation passes and corresponding tests
for CopyProf, a profiling tool designed to identify unnecessary object
copies in C++ applications.
RFC at
https://discourse.llvm.org/t/rfc-copysanitizer-csan-detecting-unneccessary-object-copies-at-runtime/91038.
Three passes are added:
- CopyProfPass inserts enter/exit callback around special member
functions.
- CopyPRofStoresPass instruments store instructions to track memory
modifications.
- ModuleCopyProfPass inserts a module constructor to initialize the
CopyProf runtime at program startup (will be added later).
Commit: b3115cd807196e465ce3fc16f0cab58be24e47fc
https://github.com/llvm/llvm-project/commit/b3115cd807196e465ce3fc16f0cab58be24e47fc
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Transforms/Passes.h
M mlir/include/mlir/Dialect/Affine/Transforms/Passes.td
M mlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp
M mlir/test/Dialect/Affine/affine-loop-normalize.mlir
Log Message:
-----------
[mlir][affine] Add useExpensiveMath option to AffineLoopNormalize pass (#211989)
This PR integrates constant bound inference into the existing
`AffineLoopNormalize` pass under a new `useExpensiveMath` option. When
`useExpensiveMath` is enabled (disabled by default due to potential
compilation time overhead), the pass leverages
`ValueBoundsConstraintSet` (uss presburger) analysis to refine dynamic
`affine.for` loop bounds into compile-time constant bounds. RFC:
https://discourse.llvm.org/t/rfc-mlir-enable-dynamic-and-tighter-affine-unrolling-via-valueboundsconstraintset/91055/2
---------
Co-authored-by: Oleksandr "Alex" Zinenko <azinenko at amd.com>
Commit: c8c6c0ff7461a5a4c19c110d830945967bc97329
https://github.com/llvm/llvm-project/commit/c8c6c0ff7461a5a4c19c110d830945967bc97329
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/array_coor_nuw_nusw.fir
M flang/test/Fir/convert-to-llvm.fir
Log Message:
-----------
[flang] Drop nuw on XArrayCoor for non-positive slice steps (#212639)
Example:
```fortran
z(:, 3:2:-1) = z(:, 1:2)
```
In this code, reverse-section indexing lowers `idx*step` / `diff+adj`
with `nuw`. A negative step can make the product negative, so `nuw` is
invalid and LLVM `-O2` can drop the stores.
Fix: keep `nsw|nuw` only for known positive steps; otherwise keep `nsw`
and drop `nuw` (negative, zero, or unknown).
Commit: 03de9b148a19996fd722e9af6d09ecaf95f8a1b2
https://github.com/llvm/llvm-project/commit/03de9b148a19996fd722e9af6d09ecaf95f8a1b2
Author: Ian Tayler Lessa <ian.taylerlessa at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Extend cancelling block-scaled cast optimisation to bf16 (#212517)
The CancellingBlockScaledCastsOptimization optimises away sequences
where a block-scaled tensor is cast to fp32 and then cast back to its
original block-scaled type.
This patch extends it to also cover cases where the intermediate type is
bf16, since the 7 bits of mantissa and 8 bits in the exponent are
sufficient to encode any `element * scale` product with valid
block-scaled type combinations.
---------
Signed-off-by: Ian Tayler Lessa <ian.taylerlessa at arm.com>
Commit: dc5f2aae75b1f80cd30c57f9298d63b104da94d4
https://github.com/llvm/llvm-project/commit/dc5f2aae75b1f80cd30c57f9298d63b104da94d4
Author: Chirag Patel <chirag198838 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/Attributor/nofpclass-arbitrary-fp.ll
Log Message:
-----------
[Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (#208585)
fixes #208437
>From LangRef for intrinsic convert_from_arbitrary_fp ,
"Normal finite values are converted exactly. NaN values follow LLVM’s
standard NaN rules; the NaN representation is preserved... and the NaN
payload may be truncated or extended..."
-> if src has Nan -> preserve nan
"If a value exceeds the representable range of the target type (for
example, converting Float8E8M0FNU with large exponents to half), the
result is converted to infinity with the appropriate sign."
Commit: 13a6fc28ac56e0abd84d90e60d9fb325c7c3ec84
https://github.com/llvm/llvm-project/commit/13a6fc28ac56e0abd84d90e60d9fb325c7c3ec84
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M third-party/benchmark/src/sysinfo.cc
Log Message:
-----------
[benchmark] Back port 2b0bff7 from upstream (#212278)
Fix compile error with clang -Werror -Wunused-template
(cherry picked from commit 2b0bff7444a8df460daab2e5af18bce45ca00657)
Commit: 7f0e5f9eb7466f68bb10d418421c9295bf80b345
https://github.com/llvm/llvm-project/commit/7f0e5f9eb7466f68bb10d418421c9295bf80b345
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Sema/AnalysisBasedWarnings.h
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/Sema.cpp
Log Message:
-----------
[clang] Cache the analysis-based warning policy in effect (#212213)
While benchmarking with warnings enabled, I found that
`AnalysisBasedWarnings::getPolicyInEffectAt` runs at the end of every
function body, performing six location-sensitive `isIgnored()` queries.
This overhead comes from #136323 ([compile-time
impact](https://llvm-compile-time-tracker.com/compare.php?from=2a9f77f6bd48d757b2d45aadcb6cf76ef4b4ef32&to=71ce9e26aec00e4af27a69ccfab8ca1773ed7018&stat=instructions:u)).
Since these six diagnostics only depend on the diagnostic state at the
query location and whether it is in a system header or macro, we can
cache the computed policy rather than recomputing it for every function.
The cache flushes when a `#pragma clang diagnostic` changes severities,
and it bypasses active diagnostic suppression mappings.
Compile-time results for this pr:
https://llvm-compile-time-tracker.com/compare.php?from=49de424f45389cb757c3cc8c50daf38d024e2314&to=a61503b54e9568254885777cf89f5ca1586ec99f&stat=instructions%3Au
Commit: 7e1aba74a4f702dbd0b5c2ebc87f88dffb851b6e
https://github.com/llvm/llvm-project/commit/7e1aba74a4f702dbd0b5c2ebc87f88dffb851b6e
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
A llvm/test/CodeGen/PowerPC/fp-classify-nan.ll
Log Message:
-----------
Reland [PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (#212565)
1. reland the patch https://github.com/llvm/llvm-project/pull/204170
2. and fix the regression caused by above patch.
Commit: e61b2abe8b7d7baef9192b41aa92f123640ca598
https://github.com/llvm/llvm-project/commit/e61b2abe8b7d7baef9192b41aa92f123640ca598
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/TableGen/aarch64-register-info-stats.td
Log Message:
-----------
[AArch64] Remove GPR64arg register class (#212457)
GPR64arg was added in fcbec02ea6fb to describe X0-X7 for the reserved
argument-register check. It is an ABI register set rather than an
allocation constraint and should not be used for register allocation.
Given it has a single use that only cares about the number of registers,
a register class isn't necessary.
This exposes that GlobalISel recomputes the minimal register class when
a matching inline asm input is tied to a fixed physical-register output.
For X2 that class was GPR64arg, getRegistersForValue already asks the
target which class implements the output constraint. Retain that class
and reuse it for the matching input.
Assisted-by: codex
Commit: 2faa90a208a14b7e681dc9122a889c894823814a
https://github.com/llvm/llvm-project/commit/2faa90a208a14b7e681dc9122a889c894823814a
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
Log Message:
-----------
[AMDGPU] Retain subreg when legalising generic operand (#212636)
When building a `COPY` to legalise a generic operand whose register
class does not match what is expected, the subregister is not retained
in the copy, and is not dropped from the newly created virtual
destination register.
Commit: a463071dc427777a2a2bfc155c6680d7ff220994
https://github.com/llvm/llvm-project/commit/a463071dc427777a2a2bfc155c6680d7ff220994
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/LTO/LTOModule.cpp
A llvm/test/LTO/X86/ifunc.ll
Log Message:
-----------
[LTO] Handle GlobalIFunc in LTOModule::parseSymbols (#212515)
Avoids the assert immediately below.
Fixes #45694
rdar://182744700
Commit: 82c7b9ac09e55cfc9887cb4e0de6221209c690b5
https://github.com/llvm/llvm-project/commit/82c7b9ac09e55cfc9887cb4e0de6221209c690b5
Author: Tshaka Lekholoane <mail+git at tshaka.dev>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/SortIncludesTest.cpp
Log Message:
-----------
[clang-format] Add Natural option for SortIncludes (#210788)
`SortIncludes` currently orders includes lexicographically with the
option to ignore case or extension. This adds another option, `Natural`,
that compares embedded runs of digits as numbers rather than sequences
of characters, matching the "natural sort" behaviour found in most file
managers and tools like `sort` when called with the `-V` option.
**Disclaimer**
AI assistance was used in initial exploration and review but the code is
"hand generated".
Commit: f2453af624353273325fe888d794a925ea9fe852
https://github.com/llvm/llvm-project/commit/f2453af624353273325fe888d794a925ea9fe852
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
Log Message:
-----------
[AMDGPU] Improve MemorySSA walking in isClobberedInFunction (#211817)
Consistently call the two argument overload
`MemorySSAWalker::getClobberingMemoryAccess(MemoryAccess,
MemoryLocation)` to get a clobbering def (according to the AliasAnalysis
used by MSSA) before applying the special cases in `isReallyAClobber`.
This has the effect of marking more loads as `amdgpu-noclobber` and
selecting SMEM load instructions for them.
Fixes: ROCM-28492
Commit: 2b06cb5e103886e9606d431defcd5159302ab87f
https://github.com/llvm/llvm-project/commit/2b06cb5e103886e9606d431defcd5159302ab87f
Author: Dhruva <dhruvakodiadka at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
A llvm/test/CodeGen/AMDGPU/freeze-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
Log Message:
-----------
[DAGCombine] Freeze after load is scalarized. (#212587)
fixes #211567
Commit: 01891953eea17544f6181bb51c973711a382702b
https://github.com/llvm/llvm-project/commit/01891953eea17544f6181bb51c973711a382702b
Author: Shengxin Pei <TPPPP72 at outlook.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Parse/ParseOpenMP.cpp
A clang/test/SemaOpenMP/gh197162.c
Log Message:
-----------
[Clang][OpenMP] Fixed an assertion on omp taskloop transparent (#200663)
In
https://github.com/llvm/llvm-project/blob/15bb4a97a798ed43b3966c99d37585651b965e5e/clang/lib/Parse/ParseOpenMP.cpp#L3289-L3295
We missed a check for `WrongDirective` before calling
`ActOnOpenMPTransparentClause`.
This patch adds the missing check.
fix #197162
Commit: e854fb756ef1f5e65bd03a16a7d1bde1ebf7769c
https://github.com/llvm/llvm-project/commit/e854fb756ef1f5e65bd03a16a7d1bde1ebf7769c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Instrumentation/BUILD.gn
Log Message:
-----------
[gn build] Port 2f910f66e7e1 (#212782)
Commit: 82a4cd776063b8c1013045b00b6bb3449c45e8b6
https://github.com/llvm/llvm-project/commit/82a4cd776063b8c1013045b00b6bb3449c45e8b6
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/AST/StmtOpenMP.h
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/fuse_codegen.cpp
M clang/test/OpenMP/interchange_codegen.cpp
A clang/test/OpenMP/loop_transform_final_iv.c
M clang/test/OpenMP/reverse_codegen.cpp
M clang/test/OpenMP/stripe_codegen.cpp
M clang/test/OpenMP/tile_codegen.cpp
Log Message:
-----------
[OpenMP] Restore loop variable values after loop-tranformation constructs. (#208533)
This patch fixes loop variable finalization for OpenMP 6.0
loop-transformations constructs: `tile`, `stripe`, `reverse`,
`interchange` and `fuse` to comply with spec requirement page 371, lines
19-21. The spec requires that "After the execution of the
loop-transforming construct, the loop-iteration variables of any of its
transformation-affected loops have the values that they would have
without the loop-transforming directive".
Commit: 196b4b6a2dec34c19bca14f4ba15aee56f2abfe7
https://github.com/llvm/llvm-project/commit/196b4b6a2dec34c19bca14f4ba15aee56f2abfe7
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/alg.adjacent.find/pstl.adjacent_find.pass.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/alg.adjacent.find/pstl.adjacent_find_pred.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of a parallel std::adjacent_find() based on std::mismatch() (#210604)
This PR implements a parallel `std::adjacent_find()` based on parallel
`std::mismatch`. The implementation reshapes the input range as two ranges
offset by 1 element and asks `std::mismatch` to find the first equal pair.
Part of #99938.
Commit: 705aa2a864d1573a17e62cfbcffbafdab7745a6d
https://github.com/llvm/llvm-project/commit/705aa2a864d1573a17e62cfbcffbafdab7745a6d
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
A llvm/test/Transforms/JumpThreading/dup-cond-br-recursive-phi.ll
M llvm/test/Transforms/JumpThreading/phi-copy-to-pred.ll
Log Message:
-----------
[JumpThreading] Materialize PHIs in duplicateCondBranchOnPHIIntoPred (#204859)
In duplicateCondBranchOnPHIIntoPred, updateSSA iteratively updates the
uses of
the instructions of BB (the duplicated block) according to ValueMapping.
For
PHIs, however, the mapping is inconsistent: the keys refer to the values
before
the parallel assignment of the PHIs, while the mapped-to values refer to
the
values after it. E.g.
BB:
%arr = phi [ %ov.0, %PredBB ], ...
%ov.0 = phi [ %ov.sel, %PredBB ], ...
--->
%arr => %ov.0
%ov.0 => %ov.sel
So an iterative replacement miscompiles: a use of the duplicated %arr is
replaced by %ov.sel, while the correct replacement is %ov.0.
Fix this by splitting PredBB -> BB (SplitEdge) into a PredEdgeBB,
cloning the
PHIs into PredEdgeBB and mapping BB's PHIs to the clones:
BB:
%arr = phi [ %ov.0, %PredEdgeBB ], ...
%ov.0 = phi [ %ov.sel, %PredEdgeBB ], ...
PredEdgeBB:
%arr.dup = phi [ %ov.0, %PredBB ]
%ov.0.dup = phi [ %ov.sel, %PredBB ]
--->
%arr => %arr.dup
%ov.0 => %ov.0.dup
Since a distinct set of PHIs is used as the mapped-to values, the
iterative
replacement is correct.
Fixes #197725.
Fixes #203868.
Assisted-by: Opus-4.8 (Claude Code)
Commit: be76618bc973b0009fa0618fbc6978f4c74bfdc7
https://github.com/llvm/llvm-project/commit/be76618bc973b0009fa0618fbc6978f4c74bfdc7
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/source/Core/IOHandler.cpp
Log Message:
-----------
[lldb][Windows] Check for EOF before the ctrl-c retry in GetLine (#212745)
On Windows `lldb --repl` can hang forever instead of exiting at EOF.
`IOHandlerEditline::GetLine` checks `GetLastError() ==
ERROR_OPERATION_ABORTED` and does a `continue` before checking `feof`.
However `fgets` is a CRT function and does not set the Win32 last error
value, so the `GetLastError` read is not the expected error. When it
happens to be `ERROR_OPERATION_ABORTED` (995) the loop never reaches the
EOF check.
This reorders the checks so EOF wins unconditionally, and adds
`clearerr` before the ctrl-c retry (a real interrupt leaves the error
flag set, which would fail the next `fgets`). ctrl-c handling is
otherwise unchanged.
rdar://183335061
Commit: 4fabb4360701da1210f0456f2bcc05f8dfa1a0c0
https://github.com/llvm/llvm-project/commit/4fabb4360701da1210f0456f2bcc05f8dfa1a0c0
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Analysis/CostModel/AArch64/sve-vls-reduce-bfp.ll
A llvm/test/Analysis/CostModel/AArch64/sve-vls-reduce-fp.ll
A llvm/test/Analysis/CostModel/AArch64/sve-vls-reduce-int.ll
Log Message:
-----------
[AArch64][CostModel] Lower wide fixed-length vector reductions cost (#211824)
When vscale is known > 1, SVE will be used to perform most reductions.
This should be reflected in the cost model.
Commit: 312aa8cf8ccd97c0d2a6980c0a0fb9ee0ee5290e
https://github.com/llvm/llvm-project/commit/312aa8cf8ccd97c0d2a6980c0a0fb9ee0ee5290e
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/builders/builder.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[LLDB] Remove Xcode sdk guessing from Makefile.rules (NFC) (#212378)
This cleanup patch pushes the auto-detection of the `macosx` SDK from
Makefile.rules up into `dotest.py` and unifies it with the existing SDK
handling for other Apple platforms.
Assisted-by: claude
Commit: e3f24d8cf7d07d8c7f6208e5cce4b422cb1d0806
https://github.com/llvm/llvm-project/commit/e3f24d8cf7d07d8c7f6208e5cce4b422cb1d0806
Author: John Brawn <john.brawn at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
A llvm/test/Transforms/LoopIdiom/memmove-ext.ll
Log Message:
-----------
[LoopIdiom] Use SCEV for deciding memmove validity (#211274)
When the loop index variable is smaller than the GEP offset size, and is
thus sign or zero extended before being used, then the IR that is
expanded from the SCEV expressions for the load and store locations will
be in a form that means GetPointerBaseWithConstantOffset can't deduce
the base and offset, meaning we can't generate memmove.
Solve this by deciding memmove validity based on the SCEV expressions
instead of the IR that is expanded from them. This means we also need to
insert a check to handle a null base pointer, as that was previously
handled implicitly due to how SCEVExpander expands expressions involving
null pointers.
Commit: 45ef27a69895fcb756fec0d7a16d39706e5d9c06
https://github.com/llvm/llvm-project/commit/45ef27a69895fcb756fec0d7a16d39706e5d9c06
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll
Log Message:
-----------
[AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (#211102)
With True16 instructions, the high-half packing idiom from #206058 tries
to `OR` a 16-bit VGPR operand into the high half of the other operand,
but this causes a crash if the other operand is uniform, as this
generates an invalid `$sgpr = COPY $sgpr_hi16`.
Commit: 7140530173c72de832458c12ac9bdcba1ca2d2ba
https://github.com/llvm/llvm-project/commit/7140530173c72de832458c12ac9bdcba1ca2d2ba
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-mul-part.ll
Log Message:
-----------
[SLP][NFC]Add a test with nother candidate for fmuladd copyables, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/212802
Commit: f24da9d03ba5d25c523e050da2ca3c4060ca23d5
https://github.com/llvm/llvm-project/commit/f24da9d03ba5d25c523e050da2ca3c4060ca23d5
Author: Nemanja Ivanovic <nemanja.i.llvm at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
A llvm/test/CodeGen/RISCV/epilog-crash.ll
Log Message:
-----------
[RISC-V] Fix assert after 255162a (#212791)
The iterator passed-in may point to the end of the block which causes an
assertion failure when attempting to inspect the MI it points to. Guard
against this.
Commit: 8d445c6cab429f062d5b73db5f243fff7b49c276
https://github.com/llvm/llvm-project/commit/8d445c6cab429f062d5b73db5f243fff7b49c276
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
Log Message:
-----------
[AMDGPU][NFC] Add previously failing bitop3 tests. (#212335)
The following two expressions used to return the wrong truth table for
v_bitop3:
; ((b & T) | T) & ~T, where T = a & c
; U ^ (~U | T), where T = c ^ b and U = (T | a) & T
The fix was implemented in:
https://github.com/llvm/llvm-project/pull/198556
Assisted-by: Cursor (Claude)
Commit: 421d2e88e4f08f39a4bd48b9591c62d1145ec0ac
https://github.com/llvm/llvm-project/commit/421d2e88e4f08f39a4bd48b9591c62d1145ec0ac
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
Log Message:
-----------
[OpenMP] Fix ambiguous namespace lookup with delayed template parsing (#212720)
Running `check-llvm` on Windows fails while compiling LLVMFrontendTests
with the following error:
error: reference to 'detail' is ambiguous
Clang enables delayed template parsing by default when targeting the
MSVC ABI on Windows. When ConstructDecompositionT is instantiated after
a using-directive for `llvm::omp`, both `::detail` and
`llvm::omp::detail` are
visible, making `detail::find_unique` ambiguous.
Explicitly qualify find_unique with the global namespace. This fixes
check-llvm on Windows and other environments using
-fdelayed-template-parsing, without changing behavior.
Commit: e0e0b57127085fd6b246ce8a7a4ba5d3da32c1f3
https://github.com/llvm/llvm-project/commit/e0e0b57127085fd6b246ce8a7a4ba5d3da32c1f3
Author: David Green <david.green at arm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
Log Message:
-----------
Revert "[Codegen] Replace any_of with is_contained. NFC (#212289)" (#212794)
This reverts commit 52f6c88c2c1b6f0c10b9c8fb09ec35e147c593e3 due to
errors in the C++20 builder.
It does not revert the followup from #212711.
Commit: e12e16f6e03ba4b9008314dbb885e8c1dddf875f
https://github.com/llvm/llvm-project/commit/e12e16f6e03ba4b9008314dbb885e8c1dddf875f
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-07-29.md
Log Message:
-----------
[flang] Add Flang Community Call Notes for July 29th meeting (#212810)
Commit: eb64c21b7954bdb66ed9ebaefcf400715be321eb
https://github.com/llvm/llvm-project/commit/eb64c21b7954bdb66ed9ebaefcf400715be321eb
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-managed-assign.cuf
Log Message:
-----------
[flang][cuda] Restrict managed data transfers to whole-array assignments (#212593)
Assignments involving managed or unified data are lowered to
`cuf.data_transfer`, a synchronous copy. The predicate only excluded
scalar left-hand sides, so array sections were transferred too, turning
a loop that assigns one section per
iteration into a sequence of blocking copies.
Key the decision on the managed operand instead: a transfer when the
managed variable or array is whole, host code when it is a section or an
element. Managed data is host-addressable, so the host assignment is
safe. Managed function results and assignments involving device memory
are unaffected.
This is the behavior specified in the CUDA Fortran Programming Guide
3.4.1:
> An assignment statement where the right hand side is a managed array
section and
> the left hand side is any host or managed variable copies data using
generated
> host code.
Commit: 1f5e93294eddb3309d530392344ee0271ccaa64c
https://github.com/llvm/llvm-project/commit/1f5e93294eddb3309d530392344ee0271ccaa64c
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-readobj.rst
M llvm/include/llvm/BinaryFormat/MachO.def
M llvm/include/llvm/BinaryFormat/MachO.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/MC/MCMachObjectWriter.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/Object/MachO.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/ObjectYAML/MachOYAML.cpp
M llvm/test/ExecutionEngine/JITLink/Generic/Inputs/MachO_Universal_libFoo_dylib.yaml
A llvm/test/MC/MachO/target-triple-padding.s
A llvm/test/MC/MachO/target-triple.s
A llvm/test/Object/Inputs/macho-invalid-target-triple-name_offset-toobig.yaml
A llvm/test/Object/Inputs/macho-invalid-target-triple-name_offset-toosmall.yaml
A llvm/test/Object/Inputs/macho-invalid-target-triple-name_toobig.yaml
A llvm/test/Object/Inputs/macho-invalid-target-triple-small.yaml
M llvm/test/Object/macho-invalid.test
A llvm/test/ObjectYAML/MachO/target_triple_command.yaml
A llvm/test/tools/dsymutil/AArch64/lc_target_triple.test
A llvm/test/tools/dsymutil/AArch64/lc_target_triple_duplicate.test
A llvm/test/tools/dsymutil/AArch64/lc_target_triple_universal.test
A llvm/test/tools/dsymutil/Inputs/lc_target_triple.arm64
A llvm/test/tools/dsymutil/Inputs/lc_target_triple_duplicate.arm64
A llvm/test/tools/dsymutil/Inputs/lc_target_triple_universal.arm64
A llvm/test/tools/llvm-objcopy/MachO/lc-target-triple.test
A llvm/test/tools/llvm-objdump/MachO/target-triple.yaml
A llvm/test/tools/llvm-readobj/MachO/target-triple.test
M llvm/tools/dsymutil/MachOUtils.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-readobj/MachODumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.h
M llvm/tools/llvm-readobj/Opts.td
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/tools/obj2yaml/macho2yaml.cpp
M llvm/unittests/ExecutionEngine/Orc/MachOBuilderTest.cpp
Log Message:
-----------
[llvm][macho] Support the LC_TARGET_TRIPLE load command (#210276)
Add support for the new LC_TARGET_TRIPLE load command.
rdar://140301164
Commit: e24eb10725e514cece9a21da97040165a199f23c
https://github.com/llvm/llvm-project/commit/e24eb10725e514cece9a21da97040165a199f23c
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/unittests/PreambleTests.cpp
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/PrintPreprocessedOutput.cpp
M clang/lib/Frontend/Rewrite/InclusionRewriter.cpp
M clang/lib/Lex/PPDirectives.cpp
R clang/test/Frontend/linemarker-invalid-escape.c
M clang/test/Frontend/rewrite-includes.c
M clang/test/Modules/cxx20-hu-05.cpp
M clang/test/Modules/cxx20-hu-06.cpp
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/Preprocessor/line-directive-output.c
M clang/test/Preprocessor/line-directive.c
M clang/test/VFS/external-names-multi-overlay.c
M clang/test/VFS/fallback.c
Log Message:
-----------
[Clang] Treat line directives as header names. (#211512)
We treated line directives as being unevaluated string literal. However
- The standard has no such restriction - or rather the standard has
different, unclear restriction (https://wg21.link/CWG2693)
- Because of Windows paths, it's common for "C:\foo\bar" to be used, and
these should not form escape sequences.
To remain consistent with other implementations, we do not allow `#line
1 <>` at this time. We do however support `#line 1 ""` to avoid a
breaking change.
Fixes a regression introduced by #201413
Commit: 32eae3a39471911888ba50bf03379450b4d96e3e
https://github.com/llvm/llvm-project/commit/32eae3a39471911888ba50bf03379450b4d96e3e
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/stmt-func04.f90
Log Message:
-----------
[flang] Statement function dummy names do not clash with host or unreferenced global names (#212396)
The check added for F2023 19.4 p2 (statement function dummy argument
name may be the same as an accessible name only if that name is a scalar
variable) looked the name up through the whole host scope chain and,
failing that, in the global scope. Both lookups overshoot what is
"accessible" in the scoping unit:
* Per F2023 19.5.1.4 p2 item (11), the appearance of a name as a
dummy-arg-name in a stmt-function-stmt makes any host entity of that
name inaccessible by host association throughout the scoping unit, so a
host entity can never conflict with the dummy.
* A global entity to which the scoping unit makes no reference at all is
not accessible in it; otherwise conformance would depend on whether
unrelated program units happen to be compiled in the same file.
This caused bogus errors on conforming code such as
```
program p
logical, external :: x
contains
subroutine s
real :: f
f(x) = x * x ! 'x' is an implicitly typed real dummy here
end
end
```
where the dummy 'x' must be implicitly typed real (both NAG and gfortran
accept this and type it that way; flang already typed it correctly, but
rejected the program).
Restrict the lookup to names made visible by the scoping unit itself
(declared, referenced, or USE-associated there), matching the lookup
HandleStmtFunction already uses to type the dummies.
Assisted-by: AI
Commit: 13ac5c62ce5aab0395849fec322eb402ab784b76
https://github.com/llvm/llvm-project/commit/13ac5c62ce5aab0395849fec322eb402ab784b76
Author: Thirumalai Shaktivel <74826228+Thirumalai-Shaktivel at users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/declare-target02.f90
M flang/test/Semantics/OpenMP/threadprivate02.f90
Log Message:
-----------
[flang][openmp] Add semantic checks in THREADPRIVATE/DECLARE TARGET (#209084)
The problem is that the automatic object was used as the
threadprivate argument.
Solution:
>From the documentation (J3/24-007):
> C814 An automatic data object shall not have the SAVE attribute.
> C862 The SAVE attribute shall not be specified for a dummy argument,
> a function result, an automatic data object, or an object
> that is in a common block.
The bare SAVE statement makes any valid local variables tagged
with the SAVE attribute. As the restriction mentioned above, the
automatic object cannot have a SAVE attribute and shall not be
used as the THREADPRIVATE argument. This patch adds semantic
checks for dummy arguments, function results, and automatic data
objects in both THREADPRIVATE and DECLARE TARGET directives.
[flang][OpenMP] Fix DECLARE TARGET to reject distinct result name
When a function uses a distinct result name (e.g. result(res)),
DECLARE TARGET(res) was not diagnosed because ResolveOmpDesignator
rebound it to the procedure, skipping the IsFunctionResult check.
Commit: 13310e947e510320bfde9a800a6292265f630b97
https://github.com/llvm/llvm-project/commit/13310e947e510320bfde9a800a6292265f630b97
Author: Navaneeth Shanmugasundaram <nshanmug at qti.qualcomm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[GitHub] Fix authentication for release workflow git push (#212634)
Update the push URL format to use GitHub's required authentication
format with the 'x-access-token' prefix. GitHub now requires:
https://x-access-token:{token}@github.com/{repo}
instead of the deprecated format:
https://{token}@github.com/{repo}
Without this change, the release workflow fails when attempting to push
branches with the error:
fatal: could not read Password for 'https://***@github.com':
No such device or address
This occurs because Git attempts to prompt for credentials in the
non-interactive GitHub Actions environment when the token format is not
recognized.
Fixes the /cherry-pick command in the issue-release-workflow.
Signed-off-by: nshanmug <nshanmug at qti.qualcomm.com>
Commit: b979a119274a13fdee769478702148006219fc5b
https://github.com/llvm/llvm-project/commit/b979a119274a13fdee769478702148006219fc5b
Author: Adam Smith <adams at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-indirect.c
A clang/test/CIR/Transforms/abi-lowering/indirect-call-classification-attr.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-call-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-call-test-target.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-call.cir
Log Message:
-----------
[CIR] Lower indirect calls in CallConvLowering (#211636)
Indirect calls were unsupported by CallConvLowering. `rewriteCallSite` bailed
with "indirect call not yet implemented", and the pass driver rejected any
module that both needed call-site rewriting and contained an indirect call. A
function pointer whose signature required ABI reshaping (a by-value struct
argument, or an sret return) could not be compiled at all, even though a
direct call to the same signature lowered fine.
The callee is opaque, but its type is a pointer to a `FuncType` that carries the
full signature. Classification is now driven from that pointee signature
through the same LLVM ABI path as the direct case: `classifyX86_64Function` is
split into `classifyX86_64Signature`, taking a return type, an argument
`TypeRange`, and an `emitError` callback. The driver collects indirect calls,
classifies each callee signature (x86_64, or the test target used by the pass
tests), and runs `rewriteCallSite`. `prependIndirectCallee` re-adds the callee
as operand 0, bitcasting the function pointer to the coerced signature when it
differs so the rebuilt call matches its reshaped return.
The `classification-attr` driver mode injects a per-function classification
that cannot describe a callee resolved at run time, so an indirect call is a
diagnosed error there rather than being left silently unrewritten while direct
calls are coerced.
Commit: f958a55f66a062b4c005015b691a949deb24e237
https://github.com/llvm/llvm-project/commit/f958a55f66a062b4c005015b691a949deb24e237
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/test/CMakeLists.txt
A lldb/test/Shell/MCP/TestHelp.test
A lldb/test/Shell/MCP/TestUnknownArgument.test
A lldb/test/Shell/MCP/TestVersion.test
M lldb/test/Shell/helper/toolchain.py
M lldb/tools/lldb-mcp/lldb-mcp.cpp
Log Message:
-----------
[lldb-mcp] Add --help and --version (#212680)
lldb-mcp accepted no arguments at all, so --help and --version fell
through to the protocol loop and blocked reading stdin, and a mistyped
flag was silently ignored while the tool waited for MCP traffic. Handle
both flags and reject anything else with a usage message.
Commit: 130dccc2c3192d9f49c2e85bcd047ed67a9fa9e1
https://github.com/llvm/llvm-project/commit/130dccc2c3192d9f49c2e85bcd047ed67a9fa9e1
Author: Nikita Taranov <nikita.taranov at clickhouse.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M compiler-rt/test/xray/TestCases/Posix/fdr-mode.cpp
Log Message:
-----------
[XRay][test] Raise fdr-mode.cpp unwrite threshold to deflake it (#211595)
It was observed failing on `sanitizer-aarch64-linux` ([build
40750](https://lab.llvm.org/buildbot/#/builders/51/builds/40750)).
The failure is in the `UNWRITE` run
(`XRAY_FDR_OPTIONS="func_duration_threshold_us=5000"`), which asserts
that every short function record is "unwritten" (rewound) except
arg1-logging records. In the failing output an `fA()` enter/exit pair
survived:
```
<stdin>:9: - { func-id: 3, function: 'fA()', cpu: 0, thread: 1909237, kind: function-enter, tsc: 1784775492023431847 }
<stdin>:10: - { func-id: 3, function: 'fA()', cpu: 0, thread: 1909237, kind: function-exit, tsc: 1784775492029462345 }
<stdin>:11: - { func-id: 4, function: 'fArg(int)', args: [ 1 ], ..., kind: function-enter-arg, ... }
```
so `UNWRITE-NEXT` (and `UNWRITE-NOT: function-enter`) no longer hold.
FDR mode only rewinds a function's enter record when its exit lands
within the threshold (`XRayFDRController::functionExit`: `TSC -
LastFunctionEntryTSC < CycleThreshold`).
```
1784775492029462345 - 1784775492023431847 = 6,030,498 cycles / 1 GHz = 6.03 ms > 5 ms threshold
```
i.e. the thread was preempted for ~6 ms mid-function, so the record was
(correctly, by the runtime's own rule) not unwritten.
The proposed fix is to raise the `UNWRITE` run's
`func_duration_threshold_us` from `5000` to `100000`, so realistic
scheduling jitter cannot push a short function over the threshold. This
mirrors the accepted fix for the sibling test in
[PR #186611](https://github.com/llvm/llvm-project/pull/186611)
(`basic-filtering.cpp`), which flaked the same way.
Commit: 125080fbaa17ddab3313f580a2d2ab686a03be55
https://github.com/llvm/llvm-project/commit/125080fbaa17ddab3313f580a2d2ab686a03be55
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/cmake/config-ix.cmake
Log Message:
-----------
[Darwin][tests] Partially restore some of the change in #212329 (#212826)
Restore the fallback path for ld-classic in #212329 to fix some of the
failing CI jobs due to some Xcode releases doesn't have the new linker
that supports `-save-temps` flag. Restore the logic so that `ld-classic`
is preferred over `ld` but no longer requires ld64/ld-classic.
In legacy releases only has ld64, ld64 is used. In latest releases where
ld64 is removed, new linker is feature completed and fully compatible
with ld64. During the transition period where ld64 is shipped as
ld-classic, prefer ld64 since new linker might not be feature complete.
rdar://183454376
Commit: aa924278efbd4f76329bb95ebd33fd3e445d4ff4
https://github.com/llvm/llvm-project/commit/aa924278efbd4f76329bb95ebd33fd3e445d4ff4
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M libcxx/include/cmath
Log Message:
-----------
[libc++][math] Add missing `constexpr since C++23` comment for `signbit` (#212458)
Adds the missing `// constexpr since C++23` for `std::signbit` in the
synopsis comments of `<cmath>`.
Follows-up: https://github.com/llvm/llvm-project/pull/105946.
Commit: d6a165836cc7bc64bda1ceab22937839cb88d5cc
https://github.com/llvm/llvm-project/commit/d6a165836cc7bc64bda1ceab22937839cb88d5cc
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[CMake][Fuchsia] Compile runtimes with -ffuchsia-api-level (#211753)
Use the supplied Fuchsia SDK's version_history.json to deduce the
oldest API level still supported, and target that for toolchain
runtimes so they'll be runtime-compatible when linked into user
programs that target any SDK-supported API level.
Commit: 0e351245ff0cf7a824207658c189ef099b3aaaab
https://github.com/llvm/llvm-project/commit/0e351245ff0cf7a824207658c189ef099b3aaaab
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/longpath/TestDAP_launch_longPath.py
M lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/TestDAP_subtleFrames.py
M lldb/test/API/tools/lldb-dap/unknown/TestDAP_unknownRequest.py
Log Message:
-----------
[lldb-dap] Migrate unknownRequest, subtleFrames and longpath (#211627)
Migrated tests:
- TestDAP_unknownRequest.py
- TestDAP_subtleFrames.py
- TestDAP_launch_longPath.py
Commit: 8d404384dd842d43362732a11b233ee3d6ead023
https://github.com/llvm/llvm-project/commit/8d404384dd842d43362732a11b233ee3d6ead023
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/string.h
M libc/src/stdlib/linux/CMakeLists.txt
M libc/src/stdlib/linux/realpath.cpp
M libc/test/src/__support/CPP/string_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][realpath] Follow symlinks (#212164)
This commit updates realpath to call `readlinkat` on symlinks during
path resolution.
Some notes on implementation:
- `PendingPath` uses a `cpp::string` to store unprocessed path
components. This could be more efficient by using a `PATH_MAX` buffer
and storing the path at the end of the buffer, which would allow for
easy prepending. However, using a `cpp::string` avoids the pointer
arithmetic and memory management that would involve.
- This PR implements `cpp::string::replace` to avoid pointer arithmetic
inside `realpath`. This should hopefully not be too inefficient, since
`prepend` reuses space from processed path components there's enough
room, there certainly exist some bad inputs that would cause many
`memmove` operations.
Commit: 7bed6591be3191446ec2cf92ef247487fff03a84
https://github.com/llvm/llvm-project/commit/7bed6591be3191446ec2cf92ef247487fff03a84
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-type-not-in-regs.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array-of-composite-drop.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite-nested-drop.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite-skip-member-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite-static-member-skipped.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer-to-composite-drop.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (#211638)
This PR adds `DebugTypeComposite` (opcode 10) and `DebugTypeMember`
(opcode 11):
1. `partitionTypes` clusters `DICompositeType` with
`DW_TAG_structure_type`, `DW_TAG_class_type`, or `DW_TAG_union_type`.
2. Each composite emits one `DebugTypeMember` per `DW_TAG_member`, then
a `DebugTypeComposite`. Members precede the composite.
3. Tag maps class, structure, and union to 0, 1, and 2. A forward
declaration emits `DebugInfoNone` for Size and no members.
4. A member whose type is not in `DebugTypeRegs` is skipped.
`DebugTypeMember` has no Parent operand, per the spec. Only the
composite references its members.
Tests in `llvm/test/CodeGen/SPIRV/debug-info/`:
1. `debug-type-composite.ll`: a struct with two members and a forward
declaration.
2. `debug-type-composite-skip-member-not-in-regs.ll`: a member whose
type is a pointer with no DWARF address space, exercising the skip.
`debug-global-variable-skip-type-not-in-regs.ll` and
`debug-global-variable-static-member.ll` assumed composites and members
are never emitted. Both now use a no-address-space pointer to avoid
disabling the existing test.
Commit: a42bed3f72c427dcd023aae169bec9305ec29ed6
https://github.com/llvm/llvm-project/commit/a42bed3f72c427dcd023aae169bec9305ec29ed6
Author: fineg74 <61437305+fineg74 at users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/src/JIT.cpp
Log Message:
-----------
[OFFLOAD] Add JIT support for SPIRV backend (#212823)
This PR adds support for SPIRV to plugins JIT. It is required in cases
when kernel is supplied in bitcode format for spirv triple.
Commit: 16f116f476c248c345fd8ffe4b3e863f2700161f
https://github.com/llvm/llvm-project/commit/16f116f476c248c345fd8ffe4b3e863f2700161f
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Transport.h
M lldb/source/Host/common/JSONTransport.cpp
M lldb/source/Protocol/MCP/Transport.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
Log Message:
-----------
[lldb] Reply to malformed requests and use JSON-RPC error codes (#212678)
The transport dropped a message that failed to parse: it logged the
error and returned, so a peer waiting on that request hung forever and
every message already buffered behind it was discarded. Keep going after
a failed parse, and add ReplyWithParseError so a message that is valid
JSON but not a valid request is answered against its own id. Unparseable
JSON still gets no reply, since it carries no id and JSON-RPC forbids
inventing one.
Method-not-found was raised with createStringError, which converts
through inconvertibleErrorCode() to -32603, so clients could not tell a
misspelled method from a server fault. Use the MethodNotFound error,
which already carries -32601, and give InvalidParams the -32602 code it
was missing.
Commit: 58a93a1eec10d30dfa358afda73f402fb308a5e4
https://github.com/llvm/llvm-project/commit/58a93a1eec10d30dfa358afda73f402fb308a5e4
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/source/Plugins/Protocol/MCP/Tool.cpp
Log Message:
-----------
[lldb-mcp] Run managed debug sessions synchronously (#212681)
A debugger created for an MCP session has no event loop to service
asynchronous stops, so a resume returned before the process stopped and
every subsequent command failed against a still-running process. That
made breakpoint debugging unusable: `run` reported only the launch, and
`bt` that followed it errored out. Create these debuggers in synchronous
mode, as lldb-dap does.
Commit: 33c7ef4a631db53440f569f048660474e0a46bd6
https://github.com/llvm/llvm-project/commit/33c7ef4a631db53440f569f048660474e0a46bd6
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[Clang][RISCV] Add packed pair byte intrinsics (#212589)
Add the 32-bit byte forms and the 64-bit byte/halfword forms of the
P-extension packed pair intrinsics to riscv_packed_simd.h using generic
shufflevector IR.
Extend the existing packed pair shuffle lowering to recognize the mixed
even/odd forms and select ppaireo/ppairoe in addition to ppaire/ppairo.
Add Clang CodeGen, LLVM CodeGen, and intrinsic header tests for the new
forms.
Commit: 0475ef459c0bf24d79330372fef29a4aaf68c87d
https://github.com/llvm/llvm-project/commit/0475ef459c0bf24d79330372fef29a4aaf68c87d
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/AST/StmtOpenMP.h
M clang/lib/AST/StmtOpenMP.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/fuse_codegen.cpp
M clang/test/OpenMP/interchange_codegen.cpp
R clang/test/OpenMP/loop_transform_final_iv.c
M clang/test/OpenMP/reverse_codegen.cpp
M clang/test/OpenMP/stripe_codegen.cpp
M clang/test/OpenMP/tile_codegen.cpp
Log Message:
-----------
Revert "[OpenMP] Restore loop variable values after loop-tranformation constructs." (#212832)
Reverts llvm/llvm-project#208533
PR breaks several bots. Revert to unblock.
https://lab.llvm.org/buildbot/#/builders/10/builds/32840
https://lab.llvm.org/buildbot/#/builders/88/builds/24941
https://lab.llvm.org/buildbot/#/builders/225/builds/13974
Commit: bacfe2950f8218268fcc0a8765644ea0c15f0360
https://github.com/llvm/llvm-project/commit/bacfe2950f8218268fcc0a8765644ea0c15f0360
Author: Mikhail Romanov <mmromanov at ispras.ru>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
Log Message:
-----------
[MLIR] Fix transform.apply_patterns with apply_cse option (#212818)
This patch fixes a crash in `transform.apply_patterns` when `apply_cse`
is enabled and the target operation does not have the
`IsolatedFromAbove` trait.
For non-`IsolatedFromAbove` targets, `transform.apply_patterns` cannot
apply patterns directly to the target operation. Instead, it collects
the operations within the target into a worklist and passes that
worklist to `applyOpPatternsGreedily`. When `apply_cse` is enabled,
pattern application and CSE are performed repeatedly until a fixpoint is
reached.
Previously, the worklist was collected only once before entering the
fixpoint loop. However, pattern application may erase operations from
the IR, leaving stale pointers in the cached worklist. Reusing this
worklist in subsequent iterations may therefore result in a crash.
This patch rebuilds the worklist at the beginning of each iteration,
ensuring that it always reflects the current IR state.
A representative reproducer is shown below:
```llvm
module attributes {transform.with_named_sequence} {
func.func @test(%A: tensor<128x256xf32>,
%B: tensor<256x512xf32>,
%C: tensor<128x512xf32>) -> tensor<128x512xf32> {
%res = linalg.matmul
ins(%A, %B : tensor<128x256xf32>, tensor<256x512xf32>)
outs(%C : tensor<128x512xf32>) -> tensor<128x512xf32>
return %res : tensor<128x512xf32>
}
transform.named_sequence @__transform_main(%root: !transform.any_op) {
%matmul = transform.structured.match
ops{["linalg.matmul"]}
in %root
: (!transform.any_op) -> !transform.any_op
%tiled, %loops:3 =
transform.structured.tile_using_for %matmul
tile_sizes [4, 4, 4]
: (!transform.any_op)
-> (!transform.any_op,
!transform.any_op,
!transform.any_op,
!transform.any_op)
transform.structured.vectorize %tiled : !transform.any_op
transform.apply_patterns to %loops#0 {
transform.apply_patterns.canonicalization
} {apply_cse} : !transform.any_op
transform.yield
}
}
```
Here, `transform.apply_patterns` is applied to the `scf.for` loop
produced by tiling, which is not `IsolatedFromAbove`. Running `mlir-opt
--transform-interpreter` on this example crashes before this change and
completes successfully with this patch.
Signed-off-by: Mikhail Romanov <mmromanov at ispras.ru>
Commit: a9749e8e26273338c6c115c0d70c538fa30bba85
https://github.com/llvm/llvm-project/commit/a9749e8e26273338c6c115c0d70c538fa30bba85
Author: Andre Kuhlenschmidt <akuhlenschmi at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M flang/include/flang/Parser/tools.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Parser/tools.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/modfile31.f90
M flang/test/Semantics/resolve60.f90
Log Message:
-----------
[flang][semantics] Accept BOZ initializers for C enum values (#211904)
Fortran 2023 7.6.1 errata f23/013 changes R762 so an interoperable
enumerator may be a named-constant initialized by a
boz-literal-constant, and specifies the value as
INT(boz-literal-constant, C_INT).
Handle that named-constant restriction directly in enum resolution while
preserving the usual scalar integer expression checks for non-enumerator
contexts. This mirrors the general named-constant initializer path,
which already converts BOZ values through the declared type before
folding.
Commit: 499db7987c994cf9a7742928bfd88ceb7bd12204
https://github.com/llvm/llvm-project/commit/499db7987c994cf9a7742928bfd88ceb7bd12204
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/CMakeLists.txt
Log Message:
-----------
Revert "[Clang] Don't build static analyzer if disabled" (#212836)
Breaks unusual build configs where clang-tidy static analyzer is enabled
while clang static analyzer is disabled.
Reverts llvm/llvm-project#212024
Commit: 5c57064076a189c457fc0cff463fb2090ccc7347
https://github.com/llvm/llvm-project/commit/5c57064076a189c457fc0cff463fb2090ccc7347
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/DebugData.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/DIEBuilder.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
Log Message:
-----------
[BOLT] Stop materializing .dwo DIE vectors early in the pipeline (#207292)
Summary: preprocessDWODebugInfo() eagerly force-extracted every .dwo
compile unit's DIE tree (getNonSkeletonUnitDIE(false)) very early in
BOLT pipeline, way before DWARFRewriter kicked in. Those vectors then
sit in memory throughout the entire rewrite pipeline, directly
contributing to BOLT's RSS peak. I did a fair amount of digging and
didn't find any reason as to why we need to keep all DIEs of DWO CU
materialized at all, since DWARFRewriter won't even read this vector
(the #197359 concurrency fix did use that, but that is unnecessary). The
problem is that these DIE trees are a massive contribution to RSS when
processing large binaries where we have 10s of K of dwos, storing
complete trees for each processed dwo.
This diff changes the #197359 concurrency fix to not rely on the DIE
sibling/children structure. It parses DWP type units selectively per
compile unit (DIEBuilder::buildDWPTypeUnitsForUnit ->
collectReferencedTypeSignatures) by finding the DW_FORM_ref_sig8
references in a unit's DIEs to decide which type units belong in that
unit's output .dwo. That walk previously used DWARFDie::children(),
which requires the unit's full DIE vector. Here we rewrite the walk to
stream the unit's DIEs one at a time with
DWARFDebugInfoEntry::extractFast (the same technique already used by
DIEBuilder::constructFromUnit and DWARFRewriter::partitionCUs), reading
DW_FORM_ref_sig8 attributes off a single reusable transient entry. The
tree structure is irrelevant -- every DIE in the unit is visited
regardless -- so no DIE vector is
built. collectReferencedTypeSignatures now takes a DWARFUnit& instead of
a DWARFDie.
With the walk self-sufficient:
- preprocessDWODebugInfo() now extracts only the .dwo CU DIE
(getNonSkeletonUnitDIE(true)); nothing reads the full array off it
anymore (constructFromUnit and the signature walk both stream).
- BinaryContext::collectDebugScopeBoundaries() drops its split-DWARF
fast-path, which called DWARFUnit::dies() (= full extraction); DWO units
are now streamed like monolithic ones.
The result is that .dwo DIE vectors are never materialized during BOLT
processing.
Expected to be a ~10% RSS win on large split-dwarf binaries.
Depends on #207291
Commit: 9064e230ab52b82853dbe0d79c8cc75d708a0907
https://github.com/llvm/llvm-project/commit/9064e230ab52b82853dbe0d79c8cc75d708a0907
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
Add some bazel libc review coverage (#209789)
This should improve timezone coverage for keeping the bazel build
working due to libc breakages, e.g. #209433 broke things and the bazel
fixer bot sent out #209689. But since it wasn't landed until just
recently, manual fixes were needed for other changes like #209449. This
wouldn't be as bad if the bazel fixer bot could handle layered
breakages.
Commit: 834d585b7c6836996e7fd78ad3fe7675d7c490e2
https://github.com/llvm/llvm-project/commit/834d585b7c6836996e7fd78ad3fe7675d7c490e2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A llvm/test/tools/llubi/ptrtoint_cast.ll
M llvm/tools/llubi/lib/Context.cpp
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Fix ptrtoint's return type (#212839)
Closes https://github.com/llvm/llvm-project/issues/212788.
Commit: 86fb40ddfa3c7cd5c32d758f4b1709d01028a7db
https://github.com/llvm/llvm-project/commit/86fb40ddfa3c7cd5c32d758f4b1709d01028a7db
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[ProfileData] Implement contains in SampleProfileNameTable (NFC) (#211995)
This patch implements contains(StringRef) and contains(uint64_t) in
SampleProfileNameTable and SampleProfileReader to serve symbol
membership queries directly from the reader -- "is this symbol in the
name table?".
Without this patch, users of the sample profile reader, namely
SampleProfileLoader::doInitialization and SampleProfileNameSet, each
construct their own StringSet<> containing all name table entries.
That is, we end up with two instances of StringSet<> with identical
contents. Since these instances hold their own copies of symbol
strings on the heap, both the constructor and destructor take up a
large portion of compilation time.
This patch teaches SampleProfileReader::contains to directly serve
symbol membership queries.
- For EytzingerSampleProfileNameTable, contains performs binary search
directly across the three concatenated Eytzinger table spans
(CSKeys, FlatKeys, and Inlinees) in a cache-friendly manner.
- Other representations of the name table lazily construct an internal
DenseSet on demand.
This patch updates existing customers to call Reader->contains.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: 6554a9709a9b9d12ec7eacd7c0a51eac5f94ddff
https://github.com/llvm/llvm-project/commit/6554a9709a9b9d12ec7eacd7c0a51eac5f94ddff
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/test/Driver/aarch64-ptrauth.c
Log Message:
-----------
[PAC][clang][test] Fix incorrect usage of `-NOT` suffix for FileCheck (#212445)
Previously, `-NOT` checks were not doing what was intended: checking
that given strings are not present within the same line where other
patterns are confirmed present by other checks. `-NOT` semantics is
checking pattern absense in between other checks, not total absense.
This patch makes use of `--implicit-check-not` instead for this purpose.
Commit: 705d0ec6115cef3232eafe6221f42f78e7b884e8
https://github.com/llvm/llvm-project/commit/705d0ec6115cef3232eafe6221f42f78e7b884e8
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCGOFFStreamer.h
M llvm/lib/MC/MCGOFFStreamer.cpp
A llvm/test/CodeGen/SystemZ/zos-common-global.ll
Log Message:
-----------
[SystemZ][z/OS] Implement emitCommonSymbol in MCGOFFStreamer (#210179)
Common globals were not emitted in GOFF object files due to a missing
emitCommonSymbol implementation. This adds the implementation to emit
the required SD/ED/PR ESD records in the GOFF object file.
Commit: ae76985401e3e89e273e43da283f513c7316272d
https://github.com/llvm/llvm-project/commit/ae76985401e3e89e273e43da283f513c7316272d
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/docs/_static/custom.css
Log Message:
-----------
[Docs] don't stylize syntax errors in code blocks (#212698)
When a code block in the documentation contains (almost) pseudocode, the
Pygments parser flags errors and renders them with red-bordered boxes.
This is unnecessarily ugly. We can see examples of this in the LangRef
with LLVM code blocks.
Instead set the style to just render them as plain text. This is still
recognizable as incorrect syntax, but does not distract the reader from
the actual example.
Assisted-by: Claude Opus 4.8
Commit: b76b177fc93645cc5a6d2c1e0fc9d941415b1282
https://github.com/llvm/llvm-project/commit/b76b177fc93645cc5a6d2c1e0fc9d941415b1282
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-with-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordering-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassociate-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
Log Message:
-----------
[SLP] Gather operands of associative binary chains into one node
Flatten associative single-use chains like ((a+b)+c)+d into one N-ary
tree node instead of nested 2-operand entries, so vectorizable operand
groupings (consecutive loads, broadcasts) spanning the whole chain
aren't hidden by the nesting. The flattened layout is kept only when it
scores better than the natural 2-operand shape. Codegen combines the
columns pairwise, reusing a scalar's IR flags where a combine step
reproduces it exactly and dropping nsw/nuw/nnan/ninf otherwise, since
regrouping can change what may overflow or produce NaN/Inf. Controlled
by the hidden -slp-reassociate-ops flag (default on).
Reviewers: bababuck, RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/208514
Commit: 8e564ec0a2215967b1a305d9fd27200a5bece2b0
https://github.com/llvm/llvm-project/commit/8e564ec0a2215967b1a305d9fd27200a5bece2b0
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A llvm/include/llvm/Frontend/HLSL/SemanticSignatures.h
M llvm/include/llvm/Support/DXILABI.h
M llvm/lib/Frontend/HLSL/CMakeLists.txt
A llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticSignatureMetadataTest.cpp
Log Message:
-----------
[HLSL] Add in-memory representation of Semantic Signatures (#209907)
Defines the `SemanticSignatureElement` struct in
`llvm/Frontend/HLSL/SemanticSignatures` to represent a semantic
signature in-memory for use during packing and metadata
construction/parsing.
Adds unit testing of the conversion.
Resolves: https://github.com/llvm/llvm-project/issues/204878
Assisted by: Claude Opus 4.8
Commit: ec27629e6f82e17c5f900f6d16ad1d65766cd4e3
https://github.com/llvm/llvm-project/commit/ec27629e6f82e17c5f900f6d16ad1d65766cd4e3
Author: Adam Smith <adams at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/Dialect/Transforms/GotoSolver.cpp
M clang/test/CIR/CodeGen/goto-address-label-table.c
A clang/test/CIR/CodeGen/goto-indirect-cleanup-nyi.c
A clang/test/CIR/CodeGen/goto-indirect-nested.c
M clang/test/CIR/CodeGen/label-values.c
A clang/test/CIR/IR/goto-indirect.cir
M clang/test/CIR/Transforms/goto_solver.cir
Log Message:
-----------
[CIR] Defer indirect goto resolution to GotoSolver (#206176)
A computed `goto *p` placed inside a nested scope -- an if or a loop
body --
made CIRGen produce invalid IR that the region verifier rejected with
"reference to block defined in another region", aborting the compile.
Regular
`goto` avoids this because CIRGen emits a symbolic
`cir.goto` that references no block and is later resolved into a
`cir.br` by
GotoSolver, which runs after FlattenCFG has merged the nested scopes
into one
region. Indirect goto skipped that indirection: `emitIndirectGotoStmt`
built
a real indirect-branch block during CIRGen and branched to it from
inside the
nested region, and `finishIndirectBranch` wired the `cir.indirect_br`
successors at the end of the function -- both while the scopes were
still
separate regions.
This gives indirect goto the same symbolic treatment. A new terminator,
`cir.indirect_goto`, carries the target address and references no
successor,
so it is valid in any region. GotoSolver now rewrites each one into a
`cir.br` to a single shared block holding the `cir.indirect_br` over
every
address-taken label; running after FlattenCFG, it sees all blocks in one
region, so the cross-region branch can no longer occur. GotoSolver
already
collects the address-taken labels -- from `cir.block_address` ops and
from
block-address attributes in global initializers -- so the CIRGen-side
bookkeeping it supersedes (the lazily-built indirect-goto block, the
per-function target list, and the `CIRGenModule` block-address-to-label
map)
is removed.
An indirect goto that branches out of a scope needing cleanup (a VLA
stack
restore, or a non-trivial destructor on the edge) must run that cleanup
on the
branch, which this does not implement. Rather than emit a branch that
silently skips the cleanup, `emitIndirectGotoStmt` reports it with
`errorNYI`.
With the fix, the `evalloop`, `20041214-1`, and `comp-goto-1` programs
in the
LLVM test-suite go from a CIRGen crash to building and running.
Commit: ce0c2f8e3e66588ac8304fe3f5304652fac877fb
https://github.com/llvm/llvm-project/commit/ce0c2f8e3e66588ac8304fe3f5304652fac877fb
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
A clang/test/SemaHLSL/Resources/Textures-derivative-availability.hlsl
Log Message:
-----------
[HLSL] Add availability attributes to texture sample methods that require implicit derivatives (#212846)
This PR adds availability attributes to texture sample methods that
require implicit derivatives (fixes
https://github.com/llvm/llvm-project/issues/198885)
To make these availability attributes actually get checked,
`DiagnoseHLSLAvailability::HandleFunctionOrMethodRef` in `SemaHLSL.cpp`
has been changed to check availability attributes regardless of whether
or not a function has a body/definition (fixes
https://github.com/llvm/llvm-project/issues/212842).
Assisted by: Claude Opus 5
Commit: 13834ee4dc48abe421c9c13e65b67909f62624a0
https://github.com/llvm/llvm-project/commit/13834ee4dc48abe421c9c13e65b67909f62624a0
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.h
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
A clang/test/CIR/IR/fenv.cir
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/FenvOpTest.cpp
Log Message:
-----------
[CIR] Introduce fenv attribute for strict fp handling (#211144)
This introduces a new CIR attribute that will be used to describe
floating-point environment assumptions and restrictions, allowing for
general modeling of floating-point environment access. A new interface
is also introduced to simplify handling of default settings when the
attribute or one of its optional components is not present.
This patch adds the attribute and interface to FPBinaryOp,
BinaryFPToFPBuiltinOp, and UnaryFPToFPBuiltin. Support for generating
operations with this attribute and lowering them to the LLVM dialect
will be added in a future change.
Assisted-by: Cursor / claude-opus-4.8
Commit: 045fc453c8ccf78b1ccc0bd6b63a719645311cec
https://github.com/llvm/llvm-project/commit/045fc453c8ccf78b1ccc0bd6b63a719645311cec
Author: Philip DePetro <pdepetro at meta.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/test/API/commands/expression/expr-with-fork/TestExprWithFork.py
Log Message:
-----------
[lldb] Fix flaky test_expr_with_fork_trap by increasing expression timeout (#212574)
The test evaluates an expression that forks a child which returns
normally (triggering SIGTRAP from the JIT wrapper trap at _start). The
parent blocks in waitpid() until the detached child terminates. With the
default 250ms expression timeout, the kernel sometimes doesn't schedule
the detached child fast enough, causing waitpid() to still be blocking
when the timeout fires and the expression gets interrupted.
Set a 5-second expression timeout to give the kernel ample time to
schedule the detached child process.
Commit: 8a50e79aabbde1b669c939c35b752864d25af2eb
https://github.com/llvm/llvm-project/commit/8a50e79aabbde1b669c939c35b752864d25af2eb
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
Log Message:
-----------
[CIR] Switch FlattenCFGPass to no longer use greedy manager. (#211368)
This showed up doing a self-build of MLIR's Presburger
IntegerRelation.cpp, which is a bit pathalogical. It resulted in us
doing a lot of rewrite patterns during flatten, taking about 20s. After
this patch, we're down to sub-1s spent doing that.
This is because applyOpPatternsGreedily was re-enqueing every child
opops every time we modified anything nearby. This caused us in cases
where there were operations that were visited TONS of times just because
a parent got modified.
This patch replaces this with a very simple inside-out iteration of
these operations. The recent loop-op 'cleanup' flattening modification
necessitates us re-visiting these sometimes (hence the loop).
This patch is effectively 'NFC' other than build time, so there really
isn't a test I could write.
AI: Note: I've used Claude Opus 4.8 to help me with this patch. I've
read/attempted to comprehend as much of this as possible, but I'm still
pretty inexperienced as to how to manage passes/etc. Claude promises me
this is the best way, and I haven't been able to find anything better
grepping around other transformations in other projects, but please
comment if you have a better idea!
Commit: 8c4dce6ba0d1eb7d6cc273bdd7496f7bfc4162e3
https://github.com/llvm/llvm-project/commit/8c4dce6ba0d1eb7d6cc273bdd7496f7bfc4162e3
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGen/arithmetic-fence-builtin.c
Log Message:
-----------
[CIR] Implement non-reassoc __arithmetic_fence (#211915)
This builtin is a no-op (just a load/store) if we don't have reassociate
turned on. This patch implements the 'easy' path to unblock libraries
that use this builtin.
Commit: b9afaf239da61761b870921941bcee1279da0373
https://github.com/llvm/llvm-project/commit/b9afaf239da61761b870921941bcee1279da0373
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/test/Driver/invalid-target-id.cl
M clang/test/Driver/openmp-invalid-target-id.c
Log Message:
-----------
clang/AMDGPU: Add missing driver tests for invalid target names (#212451)
Make sure -march and -mcpu both error for nonoffload and for
-Xopenmp-target arguments. Defends against regression I almost
introduced.
Commit: 1d894ed4930663405e7aed2b608d7f04a709c4e5
https://github.com/llvm/llvm-project/commit/1d894ed4930663405e7aed2b608d7f04a709c4e5
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/test/MC/MachO/target-triple-padding.s
M llvm/test/MC/MachO/target-triple.s
M llvm/test/Object/Inputs/macho-invalid-target-triple-name_offset-toosmall.yaml
M llvm/test/Object/Inputs/macho-invalid-target-triple-name_toobig.yaml
Log Message:
-----------
[llvm][macho][test] Fix failing target triple tests (#212876)
`llvm-mc -triple arm64-*` requires aarch64-registered-target.
Commit: f3159b97be5deff08b5bcb6a5d4cf71c991b5555
https://github.com/llvm/llvm-project/commit/f3159b97be5deff08b5bcb6a5d4cf71c991b5555
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/external.ll
Log Message:
-----------
[SLP] Precommit test for deferred extracts (#212658)
Tests for #211680.
Commit: 738cbf1883083525a76a6eeb30671ea778661bd3
https://github.com/llvm/llvm-project/commit/738cbf1883083525a76a6eeb30671ea778661bd3
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.cpp
Log Message:
-----------
[scudo] Fix all deadlocks with condition code variables. (#212604)
Added a ScopedFLLock that automatically handles notify calls if there
are waiters. Replace all ScopedLock of FLLock with this new
ScopedFLLock. Updated the enable function to properly notify FLLock
waiters if necessary.
Added a new function for re-enabling in the child process after a fork
to clear the variables used by the condition code.
Commit: 739bf5e18d9df470c540c5c61f086c95ae5aa370
https://github.com/llvm/llvm-project/commit/739bf5e18d9df470c540c5c61f086c95ae5aa370
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
A lldb/source/Plugins/ObjectFile/wasm/WasmAddress.h
M lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
M lldb/source/Plugins/Process/wasm/ProcessWasm.h
M lldb/source/Symbol/ObjectFile.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
A lldb/test/Shell/ObjectFile/wasm/wasm-globals.yaml
Log Message:
-----------
[lldb] Add support for Wasm globals (#212516)
WebAssembly globals are not addressable: they live in an index space of
their own and hold values (rather than bytes) in the module, or need to
be read from the runtime.
Give them a synthetic address space in which an address holds the global
index where it would otherwise hold an offset, and a section spanning
that index space so a global becomes a symbol. With a process, a read of
such an address asks the engine over qWasmGlobal. Without one, the
object file serves the initializer, which is all that is known before
the module is instantiated.
The section is based in a range of its own rather than at zero. Code and
linear memory are both addressed from zero, so a global index would
otherwise name a code or data address as well.
The import section now parses each import descriptor by kind, because
the global index space includes imported globals and finding the next
import means knowing the shape of the current one.
Commit: 1842e2d1e66cdf850d6afdd3a16506175097fd78
https://github.com/llvm/llvm-project/commit/1842e2d1e66cdf850d6afdd3a16506175097fd78
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/OSTargets.h
M clang/test/Sema/darwin-tls.c
Log Message:
-----------
[clang][darwin] Firmware needs to support thread local storage (#212657)
rdar://182496170
Commit: 20fd9488f9b5eb50e4b2c595faa8018b2728cb27
https://github.com/llvm/llvm-project/commit/20fd9488f9b5eb50e4b2c595faa8018b2728cb27
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A clang/test/ClangScanDeps/modules-async-scan.c
Log Message:
-----------
[clang][DependencyScanning] Adding a test that exercies the async-scanning code path (#211402)
This PR adds a test that exercises the async-scanning code path to
sanity check that async-scanning generates identical results as TU
scanning.
---
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href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 316a29603228c5d5000e0ddf8dfba2a494ac7ee9
https://github.com/llvm/llvm-project/commit/316a29603228c5d5000e0ddf8dfba2a494ac7ee9
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
A clang/test/ClangScanDeps/canonicalize-macros-multiarch.c
Log Message:
-----------
[clang][DependencyScanning] Adding a Multiarch clang-scan-deps Test (#211404)
This test adds coverage of multiarch scanning command macro
canonicalization.
---
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href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 5c49c5fa5678dffdaa7e6c19b83e52a5b89cfbc2
https://github.com/llvm/llvm-project/commit/5c49c5fa5678dffdaa7e6c19b83e52a5b89cfbc2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
R llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
A llvm/test/TableGen/RuntimeLibcallEmitter-multiple-impls.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcalls: Emit all available impls for a libcall, not just one (#210915)
The intent is RuntimeLibcalls should represent all functions that are
callable from the module, which may have contextually selectable
alternatives. Previously we had this warning since there was no mechanism
to select which one you want, and as a workaround the library call sets avoided
adding the variants which should nto be selected.
Now targets can use initLibcallLoweringInfo, so remove the warning to
unblock more libcall cleanups. Eventually initLibcallLoweringInfo should also
be tablegen driven.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 1b161aad81546fc7ea42f3c14d29b02065197e55
https://github.com/llvm/llvm-project/commit/1b161aad81546fc7ea42f3c14d29b02065197e55
Author: joaosaffran <joaosaffranllvm at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/test/CodeGenHLSL/builtins/cross.hlsl
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/DirectX/cross.ll
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cross.ll
Log Message:
-----------
[HLSL] Move cross implementation to header files (#211446)
This patch removes the previous implementation of cross; instead, it
adds a new one inside the header files.
Fix: https://github.com/llvm/llvm-project/issues/135425
Assisted by: Claude Opus 4.8
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: 17efc66a340e35ae03a18e34e7f267832fff7940
https://github.com/llvm/llvm-project/commit/17efc66a340e35ae03a18e34e7f267832fff7940
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 739bf5e (#212885)
This fixes 739bf5e18d9df470c540c5c61f086c95ae5aa370 (#212516).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=739bf5e18d9df470c540c5c61f086c95ae5aa370
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: ade128740327db281859708ddcb3b072903b3414
https://github.com/llvm/llvm-project/commit/ade128740327db281859708ddcb3b072903b3414
Author: Augusto Noronha <anoronha at apple.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
A llvm/test/tools/dsymutil/X86/keep-enumerators.test
Log Message:
-----------
[DWARFLinker] Keep DW_TAG_enumerator children of a live enumeration_type (#212849)
Swift allows functions inside enums:
enum Foo: Int {
case bar = 0
func baz() { ... }
}
DW_TAG_enumeration_type "Foo"
DW_TAG_enumerator "bar"
DW_TAG_subprogram "baz" DW_AT_declaration
...
DW_TAG_subprogram DW_AT_low_pc(...) DW_AT_specification -> "baz"
dieNeedsChildrenToBeMeaningful() did not list DW_TAG_enumeration_type,
so the parent walk skipped the enum's children.
Assisted-by: claude
rdar://183549452
Commit: 64dfcdb01ffa6aac06f6cf3b4ed7a4f8ce74c986
https://github.com/llvm/llvm-project/commit/64dfcdb01ffa6aac06f6cf3b4ed7a4f8ce74c986
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/test/CIR/IR/fenv.cir
M clang/unittests/CIR/FenvOpTest.cpp
Log Message:
-----------
[CIR] Add fenv attribute to more builtins (#212880)
This adds the #cir.fenv attribute to the CIR_UnaryFPToIntBuiltinOp and
CIR_TernaryFPToFPBuiltinOp base classes, and through them to the
cir.lround, cir.llround, cir.lrint, cir.llrint, and cir.fma operations.
This attribute is still missing from various cast and compare
operations. Those will be added in a follow-up change.
Assisted-by: Cursor / various models
Commit: b0541c38cd786cc4abeec921a92a9b0153c188a4
https://github.com/llvm/llvm-project/commit/b0541c38cd786cc4abeec921a92a9b0153c188a4
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Checkers/AnalyzerStatsChecker.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[NFC][analyzer] Remove BlockEdge parameter of processCFGBlockEntrance (#212804)
As a side effect of my previous refactoring efforts, the method
`ExprEngine::processCFGBlockEntrance` had two very similar parameters: a
`BlockEdge` and a `BlockEntrance` instance.
These are both subclasses of `ProgramPoint`, stored the same data (the
`BlockEntrance` was initialized with data taken from the `BlockEdge`
just before the call) and the `BlockEdge` was almost completely unused
within `processCFGBlockEntrance`.
The only reason for having the `BlockEdge` was that it was stored in the
debug statistic table `blocksExhausted`; so this commit transitions that
simple debug code to use `BlockEntrance` instances instead (which is
also perfectly sufficient for its goals). This allows the removal of the
redundant argument of `processCFGBlockEntrance`.
This prepares the ground for further cleanup in this method.
Commit: 0d1c3c0ba49bf35f272b0b3baa1fb880e641b9c4
https://github.com/llvm/llvm-project/commit/0d1c3c0ba49bf35f272b0b3baa1fb880e641b9c4
Author: Adam Smith <adams at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/enum-bool.cpp
M clang/test/CIR/IR/cmp.cir
Log Message:
-----------
[CIR] Allow boolean operands in cir.cmp (#206846)
GROMACS uses scoped enums with a boolean underlying type as type-safe
flags (`enum class EmulateGpuNonbonded : bool`), and compares them with
`==` / `!=` / `<`. A scoped enum is not integer-promoted before the
comparison, so the operand reaches `cir.cmp` as a `!cir.bool` (CIR
already
represents a boolean-underlying enum with `!cir.bool`). The `cir.cmp`
operand constraint `CIR_ComparableType` does not list bool, so module
verification fails before the CIR-to-CIR passes with:
```
'cir.cmp' op operand #0 must be comparable type, but got '!cir.bool'
```
Add bool to `CIR_ComparableType` and let the comparison lowering compare
`!cir.bool` the same way it already compares pointers, as an unsigned
`icmp` (`ult` for `<`), which is what classic CodeGen does with these as
`i1`. Plain `bool` comparisons are unchanged, since they still carry the
AST integral promotion and compare as `i32`, and unscoped `enum : bool`
still promotes too.
Six translation units in a minimal GROMACS build hit this
(`taskassignment/decidegpuusage`, `mdrun/runner`, the three `domdec`
topology files, and a gtest-based test), and they compile under
`-fclangir` with the fix. `enum-bool.cpp` covers all six comparison
predicates, and `cmp.cir` gains an unpromoted `!cir.bool` round-trip
next to the existing promoted one. The signature checks in
`enum-bool.cpp` are split into `LLVMCIR` and `OGCG`
because classic codegen marks these `i1` values `zeroext` and CIR does
not, which is call-conv lowering being off in the default pipeline
rather
than anything specific to bool.
Commit: 76403ad686f735341f765603978c30b92cc1617b
https://github.com/llvm/llvm-project/commit/76403ad686f735341f765603978c30b92cc1617b
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/test/Lower/CUDA/cuda-managed-assign.cuf
Log Message:
-----------
[flang][cuda] Keep data transfers for allocatable assignments with device data (#212855)
An assignment to a whole allocatable was lowered as a host assignment to
keep reallocation semantics, without checking the memory kind, so a
device allocatable assigned from a managed array wrote device memory
from the host and segfaulted.
Keep the transfer when either side is device or constant data. CUDA
Fortran Programming Guide 3.4.1 makes an assignment between managed and
device data a copy in both directions, with no exception for an
allocatable left-hand side.
Commit: a9349342b25dbf68cd89c432f5c808a58742b77a
https://github.com/llvm/llvm-project/commit/a9349342b25dbf68cd89c432f5c808a58742b77a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Unify registration under -gpu=mem:unified (#212871)
Always use the cuf operation under -gpu=unified as registration might be
differed to the backend. Add a UnitAttr to distinguish device resident
variable that will not use cudaRegisterHostVar but cudaRegisterVar.
Commit: cd1db2648ecd53b7a67faf7cc2acd1d0a63777e0
https://github.com/llvm/llvm-project/commit/cd1db2648ecd53b7a67faf7cc2acd1d0a63777e0
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port 13834ee4dc48 (#212896)
Commit: c4dbdfc12e8ab5e7df90bde1aedbec566e552f09
https://github.com/llvm/llvm-project/commit/c4dbdfc12e8ab5e7df90bde1aedbec566e552f09
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Frontend/HLSL/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 8e564ec0a221 (#212897)
Commit: 2815f298d1fae984188d3854acd6f0ca503fcd53
https://github.com/llvm/llvm-project/commit/2815f298d1fae984188d3854acd6f0ca503fcd53
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/Resources/Textures-double-element-type-errors.hlsl
A clang/test/SemaHLSL/Resources/Textures-integer-element-type.hlsl
Log Message:
-----------
[HLSL] Add sema for use of samplers and gathers on textures of doubles and ints (#212613)
Fixes https://github.com/llvm/llvm-project/issues/198882 and
https://github.com/llvm/llvm-project/issues/198883
This PR:
- Implements sema checks to reject the use of samplers and gathers on
textures of doubles.
- Implements sema checks to reject use of samplers on textures of
integers before shader model 6.7
Assisted by: Claude Opus 5
Commit: c56ea6d942e7160d6d2ec82ace17a31c7806ae9e
https://github.com/llvm/llvm-project/commit/c56ea6d942e7160d6d2ec82ace17a31c7806ae9e
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MacroFusion.h
M llvm/lib/CodeGen/MacroFusion.cpp
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/ARM/ARMMacroFusion.cpp
M llvm/lib/Target/PowerPC/PPCMacroFusion.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/X86/X86MacroFusion.cpp
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[MacroFusion] Add SDep param to predicates(NFC) (#212255)
This patch aims to extend the API for macro fusion predicates with an
additional SDep param which allows each predicate to individually decide
wether a pair should be macro fused based on the kind of dependency
between the 2 instructions.
A followup patch https://github.com/llvm/llvm-project/pull/212603
introduces a real user in AArch64.
Commit: 397743f4301326b23f70d0f8505090eb8be30dcf
https://github.com/llvm/llvm-project/commit/397743f4301326b23f70d0f8505090eb8be30dcf
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Implement complex rvalues NYI (#211645)
emitReturnOfRValue had an NYI for _Complex types, so returning one as an
Rvalue (see example of a lambda invoker) would NYI. Since the logic to
the store is already handled in the lower-to-LLVM, this ended up being a
pretty trivial patch.
Note; There are some differences in how this lowers, because our calling
convention for the ret is different here, and we maintain the 'complex'
type differently even through LLVM-IR. However, the IR looks to be
equivilent.
Commit: d998634dbeaa1b651026f1180043f68ba62c2313
https://github.com/llvm/llvm-project/commit/d998634dbeaa1b651026f1180043f68ba62c2313
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/test/Driver/aarch64-ptrauth.c
Log Message:
-----------
[PAC][clang] Enable `-fptrauth-elf-got` as part of pauthtest (#212446)
Commit: 3ca8b6e0afef0370c189721f71cb9092ea8009fd
https://github.com/llvm/llvm-project/commit/3ca8b6e0afef0370c189721f71cb9092ea8009fd
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/test/CIR/CodeGenCUDA/builtins-nvvm-atomic.cu
Log Message:
-----------
[CIR][CUDA] Add support for NVVM xchg builtins (#211815)
Adds codegen support for the scoped and unscoped NVVM atomic exchange
builtins:
`atom_xchg,` `atom_cta_xchg,` and `atom_sys_xchg.`
These are lowered to the corresponding CIR `cir.atomic.xchg` operations
and subsequently lowered to LLVM `atomicrmw xchg` instructions.
Commit: 5e0a2aa0d72b832ee9a9b2f29d6183e1d94f4354
https://github.com/llvm/llvm-project/commit/5e0a2aa0d72b832ee9a9b2f29d6183e1d94f4354
Author: compilersutra <osc at compilersutra.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/win64-eh-unwindv2-errors.mir
Log Message:
-----------
[X86] Make WinEH crash test reliable under ASan (#212820)
The WinEH unwind `v2 error` test uses `not --crash` for malformed MIR
inputs.
In AddressSanitizer builds, the default `abort_on_error=0` can prevent
the
expected fatal error from being reported as a crash, causing FileCheck
to
receive no diagnostic output.
Set `ASAN_OPTIONS=abort_on_error=1` for the expected-crash invocations
in
`win64-eh-unwindv2-errors.mir`.
## Testing
- ASan build focused test passes.
- Non-ASan build focused test passes.
- Five additional serial ASan reruns pass.
- `git diff --check` passes.
Fixes #212684
Co-authored-by: aabhinavg1 <tiwariabhinavak at gmail.com>
Commit: e82a934f56d27a06168d2e8c04edf3b223f4920f
https://github.com/llvm/llvm-project/commit/e82a934f56d27a06168d2e8c04edf3b223f4920f
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/docs/_static/custom.css
Log Message:
-----------
[docs] de-highlight code snippet errors in dark mode (#212894)
Apply https://github.com/llvm/llvm-project/pull/212698 to dark mode as
well as light mode.
Commit: 3889ccc1a35fdd3f18eecbc01663534fb3f64478
https://github.com/llvm/llvm-project/commit/3889ccc1a35fdd3f18eecbc01663534fb3f64478
Author: wieDasDing <6884440+dingxiangfei2009 at users.noreply.github.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/lib/MC/MCParser/MasmParser.cpp
A llvm/test/tools/llvm-ml/textequ_expansion.asm
Log Message:
-----------
[llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (#209526)
We observed a crash in `TEXTEQU` that pastes two macros into one.
```masm
.data
part1 TEXTEQU <1>
part2 TEXTEQU <0>
joined TEXTEQU part1, part2 ; crash
```
`part1` is immediately rewritten into `1` as integer, which is rejected
by `TEXTEQU` parser. We need to keep `part1` as identifier for `TEXTEQU`
to pick up later.
Commit: e7b04c15e6b18294c923f874f16e2d5a8e885706
https://github.com/llvm/llvm-project/commit/e7b04c15e6b18294c923f874f16e2d5a8e885706
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/dirent.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/dirent-macros.h
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/dirent-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/reclen_t.h
M libc/include/llvm-libc-types/struct_dirent.h
A libc/include/llvm-libc-types/struct_posix_dent.h
M libc/test/src/dirent/dirent_test.cpp
Log Message:
-----------
[libc] Modernize and extend dirent.h header. (#212902)
Extend the `<dirent.h>` header with macro and types specified in recent
POSIX.1-2024:
* Add `posix_dent` structure, which has more fields than `dirent`, that
are actually used in practice. This struct would be identical to
`dirent` that we have on Linux
* Add `reclen_t` type for `d_reclen` field.
* Add macro `DT_BLK` and friends
Also, extend the tests to verify the values of `d_type` field, now that
we have the proper macro defined.
Assisted by: Gemini, human-verified
Commit: 5857e09ae75d08c93de717f5a2e1c0e2c1ddd06f
https://github.com/llvm/llvm-project/commit/5857e09ae75d08c93de717f5a2e1c0e2c1ddd06f
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M llvm/unittests/Frontend/HLSLSemanticSignatureMetadataTest.cpp
Log Message:
-----------
[NFC][HLSL] Fix msan errors in tests (#212901)
Some of the tests were not initializing all the fields prior to
generating metadata, this caused a read of uninitialized memory and
caused the sanitizer to fail.
Assisted by: Claude Opus 5
Caught here: https://lab.llvm.org/buildbot/#/builders/94/builds/19767
Commit: 1a5fc1c6b6bfff561f767d5e2ffe8b0a7d81cb34
https://github.com/llvm/llvm-project/commit/1a5fc1c6b6bfff561f767d5e2ffe8b0a7d81cb34
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/lib/Dialect/Linalg/Transforms/FoldIntoElementwise.cpp
M mlir/test/Dialect/Linalg/elementwise/fold.mlir
Log Message:
-----------
[mlir] [linalg] Fold broadcast/transpose into linalg.generic (#212415)
Currently we are able to fold broadcast/transpose into
linalg.elementwise. This patch extends the ability to fold
broadcast/transpose into linalg.generic.
For example,
```
%empty = tensor.empty() : tensor<8x16xf32>
%broadcasted = linalg.broadcast ins(%A : tensor<8xf32>) outs(%empty : tensor<8x16xf32>) dimensions = [1]
%result = linalg.generic {
indexing_maps = [affine_map<(d0, d1) -> (d0, d1)>,
affine_map<(d0, d1) -> (d0, d1)>],
iterator_types = ["parallel", "parallel"]
} ins(%broadcasted : tensor<8x16xf32>) outs(%B : tensor<8x16xf32>) {
^bb0(%in: f32, %out: f32):
%v = arith.addf %in, %in : f32
linalg.yield %v : f32
} -> tensor<8x16xf32>
```
we can fold the broadcast into:
```
%result = linalg.generic {
indexing_maps = [affine_map<(d0, d1) -> (d0)>,
affine_map<(d0, d1) -> (d0, d1)>],
iterator_types = ["parallel", "parallel"]
} ins(%A: tensor<8xf32>) outs(%B : tensor<8x16xf32>) {
^bb0(%in: f32, %out: f32):
%v = arith.addf %in, %in : f32
linalg.yield %v : f32
} -> tensor<8x16xf32>
```
For simplicity, we only consider all parallel linalg.generic right now.
AI assisted.
Commit: 44a11330d9c246c7c042c16f26a10373956731f7
https://github.com/llvm/llvm-project/commit/44a11330d9c246c7c042c16f26a10373956731f7
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/docs/CMakeLists.txt
A lldb/examples/python/templates/scripted_string_summary.py
M lldb/include/lldb/API/SBTypeSummary.h
M lldb/include/lldb/DataFormatters/TypeSummary.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStringSummaryInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/API/SBTypeSummary.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/DataFormatters/TypeSummary.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStringSummaryPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStringSummaryPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
Log Message:
-----------
[lldb/script] Add class-based summary providers via ScriptedStringSummaryInterface (#210469)
Commit: dc57785129b1e3dfd489ef8c39e74a262d90a0c2
https://github.com/llvm/llvm-project/commit/dc57785129b1e3dfd489ef8c39e74a262d90a0c2
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-xandesperf-rv32.c
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-xandesperf-rv64.c
Log Message:
-----------
[CIR][RISCV] Support XAndesPerf builtins (#211490)
Commit: bdddd3e7202477e37c0a73dd036a0377d762f2e6
https://github.com/llvm/llvm-project/commit/bdddd3e7202477e37c0a73dd036a0377d762f2e6
Author: Zane Hambly <zanehambly at gmail.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
A llvm/test/MC/X86/intel-syntax-data32-16.s
Log Message:
-----------
[X86] Apply the data32 mode switch in the Intel matcher (#212417)
In .code16, `data32 push 8` in Intel syntax assembled as `pushw $8` with
the 66 prefix dropped, and `data32 push 0x1234` truncated the immediate
to 16 bits. AT&T syntax gets both right.
`ForcedDataPrefix` is set while parsing either syntax, but only
`matchAndEmitATTInstruction` switched mode on it, so the Intel path took
the operand size from the mode and never saw the prefix.
Do the same switch in `matchAndEmitIntelInstruction`. The mode has to go
back to 16-bit before the instruction is emitted, otherwise the 32-bit
form is emitted without its 66 prefix. That function has several error
returns partway through matching, so a scope guard covers those.
Encodings after the change match both AT&T syntax and GNU as:
```
data32 push 8 [0x6a,0x08] -> [0x66,0x6a,0x08]
data32 push 0x1234 [0x68,0x34,0x12] -> [0x66,0x68,0x34,0x12,0x00,0x00]
```
Fixes #156286
Commit: a01f8c85bcac35be5b6b9d5f081a3763feb5b530
https://github.com/llvm/llvm-project/commit/a01f8c85bcac35be5b6b9d5f081a3763feb5b530
Author: higher-performance <higher.performance.github at gmail.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M libcxx/include/variant
Log Message:
-----------
Speed up compilation of typical invocations of std::visit(std::variant<...>) for up to 11 types (#164196)
Similar to https://reviews.llvm.org/D90168 which was reverted (https://github.com/llvm/llvm-project/issues/62648#issuecomment-1832315651), but uses `switch` statements rather than function pointer tables.
Commit: 7ded638ea33b96d9fd628e2a5cbc06df12ede153
https://github.com/llvm/llvm-project/commit/7ded638ea33b96d9fd628e2a5cbc06df12ede153
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
A libcxx/include/__fwd/optional.h
A libcxx/include/__optional/common.h
A libcxx/include/__optional/comparison.h
A libcxx/include/__optional/hash.h
A libcxx/include/__optional/make_optional.h
A libcxx/include/__optional/nullopt_t.h
A libcxx/include/__optional/optional.h
A libcxx/include/__optional/optional_ref.h
A libcxx/include/__optional/swap.h
M libcxx/include/module.modulemap.in
M libcxx/include/optional
M libcxx/test/std/experimental/iterator/ostream.joiner/ostream.joiner.creation/make_ostream_joiner.pass.cpp
M libcxx/test/std/experimental/iterator/ostream.joiner/ostream.joiner.ops/ostream_joiner.op.assign.pass.cpp
M libcxx/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/ctor.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/deduct.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional_requires_destructible_object.verify.cpp
Log Message:
-----------
[libc++] Granularize `<optional>` (#206644)
Certain headers require `optional<T&>`, so it may be beneficial to split
out `optional<T>` and `optional<T&>`. This can allow consumers to only
bring in the `optional` flavour it needs..
- Parcel out the respective pieces into their own header.
- Certain sources rely on transitive includes brought in by
`<optional>`, so they're kept there for now, and only tests have been
fixed.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 693d0a9d04fcbdd20730922f3218cfed701d3004
https://github.com/llvm/llvm-project/commit/693d0a9d04fcbdd20730922f3218cfed701d3004
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
Log Message:
-----------
[SLP][modularisation][NFC] Extract InstructionsState (2/3) (#211461)
Move the InstructionsState class out of SLPVectorizer.cpp into the
existing private module SLPVectorizer/SLPCompatibilityAnalysis.{h,cpp}.
The class declaration (with trivial accessors) lives in the header; the
non-trivial method bodies are defined out-of-line in the .cpp:
isSameOperation
getMatchingMainOpOrAltOp
isMulDivLikeOp
isAddSubLikeOp
isCopyableElement
isExpandedBinOp
isExpandedOperand
isNonSchedulable
Part of the effort to modularize SLPVectorizer.cpp. See the RFC:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: c94c7cc893d72dfa37c1cfe667ea9dac6da5e4a4
https://github.com/llvm/llvm-project/commit/c94c7cc893d72dfa37c1cfe667ea9dac6da5e4a4
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Lower/OpenMP/defaultmap.f90
Log Message:
-----------
[Flang][OpenMP] Remove present modifier application on descriptor (#211856)
This was a minor change upstreamed in the original PR:
https://github.com/llvm/llvm-project/pull/208133
However, it is a modification that needs a little more thought from a
specification perspective before it is rolled out, there's a number of
code bases that depend on the presence modifier being applied only to
the underlying data. However, this leads to inconsistencies when a user
makes use of any reference semantic modifiers when mapping as they
SHOULD be allowed to specify present applying to the descriptor. So, we
need to work out what the correct defualt behaviour is, and regardless
of the default support a user intentionally specifying presence
application on a descriptor via reference semantics.
For now, we will revert to previous state.
Commit: e5359187080a4250c40fe9aee8b1cb9b518a63ef
https://github.com/llvm/llvm-project/commit/e5359187080a4250c40fe9aee8b1cb9b518a63ef
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/extract-fmul-cost.ll
Log Message:
-----------
[AArch64][SLP][NFC] Precommit scalar fmul extract cost test (#212837)
Precommit a baseline SLP test for the AArch64 scalar fmul extract cost.
The current cost model overestimates the cost of the lane-1 use, so only
one of the two fadd pairs is vectorized at the selected SLP threshold.
A follow-up patch will correct this #212739 should correct this.
Commit: 3f28472185bb8df103f2fbf9f3ccc22b62f1fe1c
https://github.com/llvm/llvm-project/commit/3f28472185bb8df103f2fbf9f3ccc22b62f1fe1c
Author: adeshcom14 <aadikane at amd.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
Log Message:
-----------
[AMDGPU] Fix S_ADD_I32 frame index folding emitting COPY with immediate (#212440)
When eliminating a frame index in `S_ADD_I32 %fi, imm`,
`SIRegisterInfo::eliminateFrameIndex` can simplify `0 + offset` into a
COPY or S_MOV_B32. The pass used a `MachineOperand` reference captured
before `removeOperand()`, which becomes stale after operands are removed
and shifted. That caused the wrong opcode to be selected (`COPY` instead
of `S_MOV_B32`), producing invalid machine IR such as `copy s4, 4`.
The invalid COPY is later hit by Machine Copy Propagation, which asserts
when calling `getReg()` on the immediate source operand.
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: 508b5be88431b3cce7546baf752ed628a531d699
https://github.com/llvm/llvm-project/commit/508b5be88431b3cce7546baf752ed628a531d699
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
Log Message:
-----------
AMDGPU: Add supports-wgp subtarget feature (#212704)
Commit: b65d79f8800e3d15d1f6cbf1a52f5426da992b59
https://github.com/llvm/llvm-project/commit/b65d79f8800e3d15d1f6cbf1a52f5426da992b59
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/mai.s
Log Message:
-----------
[AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (#210892)
POPS hardware is graphics-pipe-only and absent on compute-only CDNA
targets (gfx908, gfx90a, gfx940, gfx942, gfx950), which incorrectly
matched the isGFX9GFX10 predicate and selected a nonexistent register
Commit: f21b9cc9c6386cc1f4b057d8af6a3fdf617cddf9
https://github.com/llvm/llvm-project/commit/f21b9cc9c6386cc1f4b057d8af6a3fdf617cddf9
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-29 (Wed, 29 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/builtin-cpu-is-cputype.c
A clang/test/CIR/CodeGen/builtin-cpu-is-subtype.c
A clang/test/CIR/CodeGen/builtin-cpu-is-vendor.c
A clang/test/CIR/CodeGen/builtin-cpu-supports.c
Log Message:
-----------
[CIR] Implement __builtin_cpu_supports, _init, and _is (#212900)
These are pretty trivial checks to a builtin variable, so this
implements it for x86, as this shows up in self-build. The tests are
pulled from classic-codegen and shows that we do the reasonable thing
for each of them.
Commit: 1af0f1f0ea33e0df10f31c7d7f48dc4f194c3450
https://github.com/llvm/llvm-project/commit/1af0f1f0ea33e0df10f31c7d7f48dc4f194c3450
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-30 (Thu, 30 Jul 2026)
Changed paths:
A .ci/monolithic-macos.sh
M .github/CODEOWNERS
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-binaries.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/DebugData.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/DIEBuilder.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Rewrite/SDTRewriter.cpp
A bolt/test/AArch64/entry-point-at-function-end.s
M bolt/test/AArch64/long-jmp-one-stub.s
A bolt/test/X86/jump-table-empty-block-strict.s
M clang-tools-extra/clangd/unittests/PreambleTests.cpp
M clang-tools-extra/docs/clang-tidy/checks/modernize/redundant-void-arg.md
M clang-tools-extra/include-cleaner/lib/LocateSymbol.cpp
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/LocateSymbolTest.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.md
M clang/docs/ThreadSafetyAnalysis.md
M clang/include/clang/APINotes/APINotesReader.h
M clang/include/clang/APINotes/Types.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/ExprObjC.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecordLayout.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/ABIVersions.def
A clang/include/clang/Basic/BuiltinTraits.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
R clang/include/clang/Basic/ExpressionTraits.h
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/include/clang/Basic/OptionalUnsigned.h
M clang/include/clang/Basic/TokenKinds.h
R clang/include/clang/Basic/TypeTraits.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.h
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/AnalysisBasedWarnings.h
M clang/include/clang/Sema/ScopeInfo.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesTypes.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
M clang/lib/AST/ByteCode/State.cpp
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/RecordLayout.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
M clang/lib/Analysis/ThreadSafety.cpp
A clang/lib/Basic/BuiltinTraits.cpp
M clang/lib/Basic/CMakeLists.txt
R clang/lib/Basic/ExpressionTraits.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/OSTargets.h
R clang/lib/Basic/TypeTraits.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/GotoSolver.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CMakeLists.txt
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.h
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/Targets/Mips.cpp
M clang/lib/CodeGen/Targets/PPC.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/PrintPreprocessedOutput.cpp
M clang/lib/Frontend/Rewrite/InclusionRewriter.cpp
M clang/lib/Headers/__clang_gpu_device_functions.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/ptrauth.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/UnicodeCharSets.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/lib/Sema/SemaAPINotesInternal.h
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/AnalyzerStatsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringSyntaxChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/RangedConstraintManager.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
A clang/test/APINotes/where-parameters-diagnostics.cpp
M clang/test/AST/ByteCode/amdgpu-nullptr.cl
M clang/test/AST/ByteCode/builtin-object-size-codegen.cpp
M clang/test/AST/ByteCode/constexpr-steps.cpp
M clang/test/AST/ByteCode/dynalloc-limits.cpp
M clang/test/AST/ast-dump-amdgpu-types.c
M clang/test/Analysis/addrspace-null.c
M clang/test/Analysis/cast-value-notes.cpp
M clang/test/Analysis/dangling-ptr-deref.cpp
M clang/test/Analysis/element-region-address-space.c
M clang/test/Analysis/pthreadlock.c
M clang/test/Analysis/ptr-cmp-const-trunc.cl
A clang/test/Analysis/simplify-drops-concrete.c
M clang/test/Analysis/solver-sym-simplification-ptr-bool.cl
M clang/test/Analysis/z3/cstring-addrspace.c
M clang/test/Analysis/z3/z3-crosscheck.c
M clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
M clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
A clang/test/CIR/CodeGen/arithmetic-fence-builtin.c
A clang/test/CIR/CodeGen/builtin-cpu-is-cputype.c
A clang/test/CIR/CodeGen/builtin-cpu-is-subtype.c
A clang/test/CIR/CodeGen/builtin-cpu-is-vendor.c
A clang/test/CIR/CodeGen/builtin-cpu-supports.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-indirect.c
M clang/test/CIR/CodeGen/complex.cpp
A clang/test/CIR/CodeGen/default-func-attrs-invoke.cpp
M clang/test/CIR/CodeGen/enum-bool.cpp
M clang/test/CIR/CodeGen/goto-address-label-table.c
A clang/test/CIR/CodeGen/goto-indirect-cleanup-nyi.c
A clang/test/CIR/CodeGen/goto-indirect-nested.c
M clang/test/CIR/CodeGen/label-values.c
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-xandesperf-rv32.c
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-xandesperf-rv64.c
M clang/test/CIR/CodeGenCUDA/builtins-nvvm-atomic.cu
M clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
M clang/test/CIR/CodeGenHIP/amdgpu-module-flags.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-extended-image.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
M clang/test/CIR/CodeGenHIP/hip-cuid.hip
M clang/test/CIR/CodeGenHIP/simple.cpp
M clang/test/CIR/CodeGenOpenMP/emit-device-functions.cpp
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CIR/IR/cmp.cir
A clang/test/CIR/IR/fenv.cir
A clang/test/CIR/IR/goto-indirect.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-call-classification-attr.cir
R clang/test/CIR/Transforms/abi-lowering/indirect-call-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-call-test-target.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-call.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-int-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
M clang/test/CIR/Transforms/goto_solver.cir
M clang/test/CIR/Transforms/mem2reg.cir
M clang/test/CXX/drs/cwg14xx.cpp
A clang/test/ClangScanDeps/canonicalize-macros-multiarch.c
M clang/test/ClangScanDeps/logging-two-threads.c
A clang/test/ClangScanDeps/modules-async-scan.c
M clang/test/CodeGen/AMDGPU/sanitizer.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/WebAssembly/wasm-eh.ll
M clang/test/CodeGen/address-space.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/amdgpu-image-rsrc-type-debug-info.c
M clang/test/CodeGen/amdgpu-variadic-call.c
M clang/test/CodeGen/annotations-field.c
M clang/test/CodeGen/annotations-loc.c
M clang/test/CodeGen/bitfield-access-unit.c
M clang/test/CodeGen/builtins-extended-image.c
M clang/test/CodeGen/default-address-space.c
M clang/test/CodeGen/dynamic-alloca-with-address-space.c
M clang/test/CodeGen/fp-atomic-ops.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/linking-bitcode-postopt.cpp
M clang/test/CodeGen/logb_scalbn.c
A clang/test/CodeGen/mips-complex-abi.c
R clang/test/CodeGen/ppc64-float-abi-attr.c
A clang/test/CodeGen/ppc64-long-double-type-attr.c
M clang/test/CodeGen/pragma-detect_mismatch.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/scoped-fence-ops.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCUDA/address-spaces.cu
M clang/test/CodeGenCUDA/alias.cu
M clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
M clang/test/CodeGenCUDA/amdgpu-visibility.cu
M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
M clang/test/CodeGenCUDA/anon-ns.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/const-var.cu
M clang/test/CodeGenCUDA/dependent-libs.cu
M clang/test/CodeGenCUDA/device-const-var-linkage.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/device-use-host-var.cu
M clang/test/CodeGenCUDA/device-var-init.cu
M clang/test/CodeGenCUDA/device-var-linkage.cu
M clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip
M clang/test/CodeGenCUDA/host-used-device-var.cu
M clang/test/CodeGenCUDA/implicit-hd-dtor-trap-stub-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-explicit-inst-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-overload-ambig-hip.hip
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCUDA/kernel-arg-name-metadata.cu
M clang/test/CodeGenCUDA/kernel-args.cu
M clang/test/CodeGenCUDA/kernel-dbg-info.cu
M clang/test/CodeGenCUDA/lambda-constexpr-capture.cu
M clang/test/CodeGenCUDA/lambda-noinline.cu
M clang/test/CodeGenCUDA/lambda-reference-var.cu
M clang/test/CodeGenCUDA/lambda.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-gpu-attrs-preserved.cu
M clang/test/CodeGenCUDA/managed-var.cu
M clang/test/CodeGenCUDA/ms-linker-options.cu
M clang/test/CodeGenCUDA/noinline.cu
M clang/test/CodeGenCUDA/norecurse.cu
M clang/test/CodeGenCUDA/nosanitize-cuid.hip
M clang/test/CodeGenCUDA/static-device-var-no-rdc.cu
M clang/test/CodeGenCUDA/static-device-var-rdc.cu
M clang/test/CodeGenCUDA/template-class-static-member.cu
M clang/test/CodeGenCUDA/types.cu
M clang/test/CodeGenCUDA/unnamed-types.cu
A clang/test/CodeGenCXX/Inputs/override-layout-aligned-base.layout
M clang/test/CodeGenCXX/address-space-cast-coerce.cpp
M clang/test/CodeGenCXX/address-space-cast.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/amdgcn-string-literal.cpp
M clang/test/CodeGenCXX/amdgcn_declspec_get.cpp
M clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-buffer-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-image-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-kernel-arg-pointer-type.cpp
M clang/test/CodeGenCXX/bitfield-access-empty.cpp
M clang/test/CodeGenCXX/bitfield-access-tail.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
M clang/test/CodeGenCXX/conditional-temporaries.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenCXX/cxx11-extern-constexpr.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/no-elide-constructors.cpp
A clang/test/CodeGenCXX/override-layout-aligned-base.cpp
M clang/test/CodeGenCXX/template-param-objects-address-space.cpp
M clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp
M clang/test/CodeGenCXX/try-catch-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-with-address-space.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-consteval-address-space.cpp
M clang/test/CodeGenCXX/vtable-constexpr-address-space.cpp
M clang/test/CodeGenCXX/vtable-key-function-address-space.cpp
M clang/test/CodeGenCXX/vtable-layout-extreme-address-space.cpp
M clang/test/CodeGenCXX/vtable-linkage-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtt-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
A clang/test/CodeGenHIP/builtins-amdgcn-prefetch.hip
M clang/test/CodeGenHIP/debug-info-language-hip.hip
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/device-function-huge-arg-ret.hip
M clang/test/CodeGenHIP/half.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHIP/placement-new-addrspace.hip
M clang/test/CodeGenHIP/printf-aggregate.cpp
M clang/test/CodeGenHIP/printf-builtin.hip
M clang/test/CodeGenHIP/printf-kind-module-flag.hip
M clang/test/CodeGenHIP/printf.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenHIP/sret-lifetime-markers.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
A clang/test/CodeGenHLSL/builtins/InterlockedXor.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedXor.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedXor.hlsl
M clang/test/CodeGenHLSL/builtins/cross.hlsl
M clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
M clang/test/CodeGenHipStdPar/unsupported-ASM.cpp
M clang/test/CodeGenHipStdPar/unsupported-builtins.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/address-space-constant-initializers.cl
M clang/test/CodeGenOpenCL/address-spaces.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgcn-flat-scratch-name.cl
M clang/test/CodeGenOpenCL/amdgcn-large-globals.cl
M clang/test/CodeGenOpenCL/amdgcn-non-temporal-store.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-alignment.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-calling-conv.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M clang/test/CodeGenOpenCL/amdgpu-ieee.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
M clang/test/CodeGenOpenCL/atomic-builtins-default-to-device-scope.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/backend-unsupported-warning.ll
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-cvt-off-f32-i4.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/CodeGenOpenCL/byval.cl
M clang/test/CodeGenOpenCL/cast_image.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/func-call-dbg-loc.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCL/lifetime.cl
M clang/test/CodeGenOpenCL/nullptr.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
M clang/test/CodeGenOpenCL/private-array-initialization.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/CodeGenOpenCL/sqrt-fpmath.cl
M clang/test/CodeGenOpenCL/visibility.cl
M clang/test/CodeGenOpenCL/vla.cl
M clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/DebugInfo/Generic/amdgpu-barrier-type-debug-info.c
M clang/test/DebugInfo/Generic/amdgpu-buffer-rsrc-type-debug-info.c
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
M clang/test/Driver/aarch64-ptrauth.c
M clang/test/Driver/cuda-cross-compiling.c
A clang/test/Driver/hip-link-offload-binary.c
M clang/test/Driver/invalid-target-id.cl
M clang/test/Driver/openmp-invalid-target-id.c
A clang/test/ExtractAPI/invalid_utf8_doc_comment.c
R clang/test/Frontend/linemarker-invalid-escape.c
M clang/test/Frontend/opencl.cl
M clang/test/Frontend/rewrite-includes.c
M clang/test/Headers/__clang_hip_libdevice_declares.cpp
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/amdgcn_openmp_device_math.c
M clang/test/Headers/amdgcn_openmp_device_math_c.c
M clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
M clang/test/Headers/amdhsa_abi.cl
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/openmp-device-functions-bool.c
M clang/test/Headers/openmp_device_math_isnan.cpp
M clang/test/Headers/openmp_new_nothrow.cpp
A clang/test/Index/USR/class-type-tpl-arg.cpp
M clang/test/Index/cxx14-lambdas.cpp
M clang/test/Index/pipe-size.cl
A clang/test/Interpreter/used-global-after-error.cpp
A clang/test/Layout/ms-arm64-aligned-base-tail-padding.cpp
M clang/test/Lexer/unicode.c
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
M clang/test/Misc/backend-resource-limit-diagnostics.cl
M clang/test/Modules/cxx20-hu-05.cpp
M clang/test/Modules/cxx20-hu-06.cpp
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-canonical-prefixes.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-amdgcnspirv.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/test/OffloadTools/clang-offload-bundler/standardize.c
M clang/test/OffloadTools/clang-offload-bundler/zlib.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
A clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
A clang/test/OpenMP/update_clause_ast_dump.cpp
M clang/test/PCH/aarch64-sve-types.c
M clang/test/Parser/cxx11-user-defined-literals.cpp
A clang/test/Parser/decltype-crash.cpp
M clang/test/Preprocessor/builtin_aux_info.cpp
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/line-directive-output.c
M clang/test/Preprocessor/line-directive.c
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-macros.c
M clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/amdgcn-va-list-type.c
M clang/test/Sema/attr-model.cpp
M clang/test/Sema/builtin-amdgcn-atomic-inc-dec-failure.cpp
M clang/test/Sema/builtin-amdgcn-fence-failure.cpp
M clang/test/Sema/callingconv-devicekernel.cpp
M clang/test/Sema/constexpr.c
M clang/test/Sema/darwin-tls.c
M clang/test/Sema/inline-asm-validate-amdgpu.cl
M clang/test/Sema/scoped-atomic-ops.c
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/Sema/wave-reduce-builtins-validate-amdgpu.cl
M clang/test/SemaCUDA/addr-of-overloaded-fn.cu
M clang/test/SemaCUDA/addr-of-overloaded-template-fn.cu
M clang/test/SemaCUDA/allow-int128.cu
M clang/test/SemaCUDA/amdgpu-builtins-pointer-args.cu
M clang/test/SemaCUDA/amdgpu-f128.cu
M clang/test/SemaCUDA/amdgpu-size_t.cu
M clang/test/SemaCUDA/amdgpu-windows-vectorcall.cu
M clang/test/SemaCUDA/atomic-ops.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/const-var.cu
M clang/test/SemaCUDA/constexpr-var.cu
M clang/test/SemaCUDA/deferred-diags-dedup.cu
M clang/test/SemaCUDA/fp16-arg-return.cu
M clang/test/SemaCUDA/implicit-hd-dtor-explicit-instantiation.cu
M clang/test/SemaCUDA/implicit-hd-explicit-inst-organic-caller.cu
M clang/test/SemaCUDA/implicit-hd-overload-ambig-organic-caller.cu
M clang/test/SemaCUDA/overloaded-builtin.cu
M clang/test/SemaCUDA/windows-calling-conv.cu
M clang/test/SemaCXX/amdgpu-barrier.cpp
M clang/test/SemaCXX/amdgpu-buffer-rsrc.cpp
M clang/test/SemaCXX/amdgpu-image-rsrc.cpp
M clang/test/SemaCXX/amdgpu-sizeof-alignof.cpp
A clang/test/SemaCXX/atomic-auto.cpp
M clang/test/SemaCXX/constexpr-function-recovery-crash.cpp
M clang/test/SemaCXX/constexpr-steps.cpp
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc-limits.cpp
M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
A clang/test/SemaCXX/ms-ptr-qualifiers.cpp
A clang/test/SemaCXX/qualified-function-typeof.cpp
M clang/test/SemaCXX/source_location.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/test/SemaCXX/warn-thread-safety-parsing.cpp
M clang/test/SemaCXX/wasm-funcref.cpp
M clang/test/SemaHIP/amdgpu-barrier.hip
M clang/test/SemaHIP/amdgpu-buffer-rsrc.hip
M clang/test/SemaHIP/amdgpu-feature-predicate.hip
M clang/test/SemaHIP/amdgpu-is-invocable.hip
M clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/test/SemaHIP/atomic-deprecated.hip
M clang/test/SemaHIP/zero-sized-device-array.hip
M clang/test/SemaHLSL/Availability/avail-diag-default-compute.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedXor-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/cross-errors.hlsl
A clang/test/SemaHLSL/Resources/Textures-derivative-availability.hlsl
A clang/test/SemaHLSL/Resources/Textures-double-element-type-errors.hlsl
A clang/test/SemaHLSL/Resources/Textures-integer-element-type.hlsl
M clang/test/SemaHipStdPar/device-can-call-host.cpp
M clang/test/SemaOpenCL/amd-media-ops.cl
M clang/test/SemaOpenCL/amdgpu-attrs.cl
M clang/test/SemaOpenCL/amdgpu-barrier.cl
M clang/test/SemaOpenCL/amdgpu-buffer-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-image-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-num-sgpr-vgpr-deprecated.cl
M clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
M clang/test/SemaOpenCL/atomic-ops.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cvt-off-f32-i4-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-f16.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
A clang/test/SemaOpenCL/builtins-extended-image-supported.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/numbered-address-space.cl
M clang/test/SemaOpenCL/sampler_t.cl
M clang/test/SemaOpenCLCXX/amdgpu-nullptr.clcpp
A clang/test/SemaOpenMP/gh197162.c
M clang/test/SemaSYCL/sycl-cconv-win.cpp
M clang/test/VFS/external-names-multi-overlay.c
M clang/test/VFS/fallback.c
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/SourceLocationTest.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/FenvOpTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/SortIncludesTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Tooling/HeaderIncludesTest.cpp
M clang/utils/TableGen/ClangTraitsEmitter.cpp
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M clang/www/make_cxx_dr_status
M compiler-rt/lib/asan/asan_poisoning.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/adddf3.cpp
A compiler-rt/lib/builtins/addsf3.cpp
M compiler-rt/lib/builtins/addtf3.cpp
A compiler-rt/lib/builtins/divdf3.cpp
A compiler-rt/lib/builtins/divsf3.cpp
A compiler-rt/lib/builtins/divtf3.cpp
M compiler-rt/lib/builtins/fp_lib.h
A compiler-rt/lib/builtins/muldf3.cpp
A compiler-rt/lib/builtins/mulsf3.cpp
A compiler-rt/lib/builtins/multf3.cpp
A compiler-rt/lib/builtins/negdf2.cpp
A compiler-rt/lib/builtins/negsf2.cpp
M compiler-rt/lib/builtins/subdf3.c
A compiler-rt/lib/builtins/subdf3.cpp
M compiler-rt/lib/builtins/subsf3.c
A compiler-rt/lib/builtins/subsf3.cpp
A compiler-rt/lib/builtins/subtf3.cpp
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode.cpp
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
A flang/docs/MeetingNotes/2026/2026-07-29.md
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Lower/OpenMP/Clauses.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/OpenACC/Passes.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
A flang/include/flang/Optimizer/Transforms/AllocationPlacementPolicy.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/tools.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCEmitNYIFlang.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCInitializeFIRAnalyses.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCPipeline.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
A flang/lib/Optimizer/Transforms/StackArrays.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/tools.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
A flang/test/Driver/openacc-nyi.f90
A flang/test/Driver/openmp-target-fast-flag.f90
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-constructor.f90
A flang/test/Fir/allocation-placement-pipeline.fir
M flang/test/Fir/array_coor_nuw_nusw.fir
R flang/test/Fir/arrexp.fir
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-managed-assign.cuf
A flang/test/Lower/HLFIR/elemental-array-constant-shape.f90
M flang/test/Lower/HLFIR/matmul.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/interop.f90
M flang/test/Parser/OpenMP/atomic-compare.f90
M flang/test/Parser/OpenMP/depobj-construct.f90
M flang/test/Parser/OpenMP/interop-construct.f90
M flang/test/Parser/OpenMP/metadirective-v50.f90
M flang/test/Parser/acc-unparse.f90
M flang/test/Semantics/CUDA/cuf02.cuf
M flang/test/Semantics/OpenACC/acc-loop.f90
M flang/test/Semantics/OpenMP/declare-target02.f90
M flang/test/Semantics/OpenMP/init-clause.f90
M flang/test/Semantics/OpenMP/interop-construct.f90
M flang/test/Semantics/OpenMP/threadprivate02.f90
M flang/test/Semantics/modfile31.f90
M flang/test/Semantics/resolve60.f90
M flang/test/Semantics/stmt-func04.f90
A flang/test/Transforms/OpenACC/acc-emit-nyi-flang.fir
A flang/test/Transforms/allocation-placement-budget.fir
A flang/test/Transforms/allocation-placement-stack-arrays-mode.fir
A flang/test/Transforms/allocation-placement.fir
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
M libc/include/dirent.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/dirent-macros.h
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/dirent-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/reclen_t.h
M libc/include/llvm-libc-types/struct_dirent.h
A libc/include/llvm-libc-types/struct_posix_dent.h
A libc/include/memory.yaml
M libc/include/stdlib.yaml
A libc/include/sys/fcntl.yaml
A libc/include/sys/poll.yaml
A libc/include/sys/signal.yaml
A libc/include/sys/unistd.yaml
M libc/include/time.yaml
M libc/shared/builtins.h
A libc/shared/builtins/negdf2.h
A libc/shared/builtins/negsf2.h
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/string.h
M libc/src/__support/GPU/utils.h
M libc/src/__support/builtins/CMakeLists.txt
A libc/src/__support/builtins/negdf2.h
A libc/src/__support/builtins/negsf2.h
M libc/src/__support/threads/thread.cpp
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/vfscanf_internal.h
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/environ_internal.cpp
M libc/src/stdlib/environ_internal.h
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/putenv.cpp
M libc/src/stdlib/linux/realpath.cpp
A libc/src/stdlib/putenv.h
M libc/src/string/memory_utils/aarch64/inline_memmove.h
M libc/src/time/CMakeLists.txt
A libc/src/time/strptime.cpp
A libc/src/time/strptime.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/integration/src/stdlib/CMakeLists.txt
A libc/test/integration/src/stdlib/putenv_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_builtins_test.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/CPP/string_test.cpp
M libc/test/src/__support/hash_test.cpp
M libc/test/src/assert/CMakeLists.txt
M libc/test/src/assert/assert_test.cpp
M libc/test/src/dirent/dirent_test.cpp
M libc/test/src/search/CMakeLists.txt
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fscanf_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/pkey_test.cpp
M libc/test/src/time/CMakeLists.txt
A libc/test/src/time/strptime_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/chown_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/test/src/unistd/truncate_test.cpp
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
A libcxx/include/__atomic/clear_padding.h
M libcxx/include/__atomic/support/c11.h
M libcxx/include/__atomic/support/gcc.h
A libcxx/include/__fwd/optional.h
M libcxx/include/__locale
M libcxx/include/__math/traits.h
M libcxx/include/__memory/allocator.h
M libcxx/include/__memory/shared_ptr.h
A libcxx/include/__optional/common.h
A libcxx/include/__optional/comparison.h
A libcxx/include/__optional/hash.h
A libcxx/include/__optional/make_optional.h
A libcxx/include/__optional/nullopt_t.h
A libcxx/include/__optional/optional.h
A libcxx/include/__optional/optional_ref.h
A libcxx/include/__optional/swap.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/bitset
M libcxx/include/cmath
M libcxx/include/fstream
M libcxx/include/memory
M libcxx/include/module.modulemap.in
M libcxx/include/optional
M libcxx/include/string
M libcxx/include/text_encoding
M libcxx/include/tuple
M libcxx/include/variant
M libcxx/include/version
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/modules/std/memory.inc
M libcxx/src/include/atomic_support.h
M libcxx/src/ios.instantiations.cpp
M libcxx/src/locale.cpp
R libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/min_max_element.bench.cpp
R libcxx/test/benchmarks/algorithms/minmax.bench.cpp
A libcxx/test/benchmarks/algorithms/ranges_min_max.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/nth_element.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/permutation.bench.cpp
M libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
M libcxx/test/benchmarks/containers/string.bench.cpp
A libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/test.dat
A libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/xsgetn.buffer.pass.cpp
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/libcxx/atomics/atomics.types.generic/padding.pass.cpp
R libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
A libcxx/test/libcxx/atomics/clear_padding.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
A libcxx/test/libcxx/text/text_encoding/aliases_count.pass.cpp
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/alg.adjacent.find/pstl.adjacent_find.pass.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/alg.adjacent.find/pstl.adjacent_find_pred.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
A libcxx/test/std/atomics/atomics.types.generic/padding.pass.cpp
M libcxx/test/std/experimental/iterator/ostream.joiner/ostream.joiner.creation/make_ostream_joiner.pass.cpp
M libcxx/test/std/experimental/iterator/ostream.joiner/ostream.joiner.ops/ostream_joiner.op.assign.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.pass.cpp
A libcxx/test/std/numerics/c.math/isgreater.pass.cpp
A libcxx/test/std/numerics/c.math/isgreaterequal.pass.cpp
A libcxx/test/std/numerics/c.math/isless.pass.cpp
A libcxx/test/std/numerics/c.math/islessequal.pass.cpp
A libcxx/test/std/numerics/c.math/islessgreater.pass.cpp
A libcxx/test/std/numerics/c.math/isunordered.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.access/access.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.access/const_access.pass.cpp
R libcxx/test/std/text/text_encoding/test_text_encoding.h
M libcxx/test/std/text/text_encoding/text_encoding.ctor/id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.ctor/string_view.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.eq/equal.id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/empty.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/operator-bool.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerequal/owner_equal.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerhash/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_hash.pass.cpp
M libcxx/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/ctor.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/deduct.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional_requires_destructible_object.verify.cpp
M libcxx/test/support/module.modulemap
M libcxx/test/support/test_macros.h
A libcxx/test/support/test_text_encoding.h
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/schema.yaml
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/features/misc.py
M libcxxabi/src/cxa_personality.cpp
M libsycl/src/usm_functions.cpp
M libunwind/include/unwind.h
A libunwind/include/unwind_wasm.h
M libunwind/src/Unwind-wasm.c
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/test/ELF/aarch64-thunk-align.s
M lld/test/ELF/aarch64-thunk-bti-execute-only.s
M lld/test/ELF/aarch64-thunk-bti-multipass.s
M lld/test/ELF/aarch64-thunk-bti.s
M lld/test/ELF/aarch64-thunk-script.s
A lld/test/ELF/aarch64-thunk-sort.s
M lld/test/ELF/arm-bl-v4t.s
M lld/test/ELF/arm-branch-rangethunk.s
M lld/test/ELF/arm-force-pi-thunk.s
M lld/test/ELF/arm-thumb-condbranch-thunk.s
M lld/test/ELF/arm-thumb-interwork-shared.s
M lld/test/ELF/arm-thumb-interwork-thunk.s
M lld/test/ELF/arm-thumb-mix-range-thunk-os.s
M lld/test/ELF/arm-thumb-plt-range-thunk-os.s
M lld/test/ELF/arm-thumb-range-thunk-os-no-ext.s
M lld/test/ELF/arm-thumb-range-thunk-os.s
M lld/test/ELF/arm-thunk-arm-thumb-reuse.s
M lld/test/ELF/arm-thunk-linkerscript-dotexpr.s
M lld/test/ELF/arm-thunk-linkerscript-orphan.s
M lld/test/ELF/arm-thunk-linkerscript.s
M lld/test/ELF/arm-thunk-re-add.s
M lld/test/ELF/hexagon-thunk-range-b22rel.s
M lld/test/ELF/ppc32-call-stub-nopic.s
M lld/test/ELF/ppc32-call-stub-pic.s
M lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
M lld/test/ELF/ppc32-long-thunk.s
M lld/test/ELF/ppc64-call-reach.s
M lld/test/ELF/ppc64-ifunc.s
M lld/test/ELF/ppc64-long-branch-pi.s
M lld/test/ELF/ppc64-long-branch-rel14.s
M lld/test/ELF/ppc64-long-branch.s
A lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
M lld/test/wasm/lto/libcall-archive-bitcode.ll
M lld/wasm/Symbols.cpp
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/CMakeLists.txt
M lldb/docs/resources/addingtargetsupport.md
A lldb/examples/python/templates/scripted_command.py
A lldb/examples/python/templates/scripted_string_summary.py
M lldb/include/lldb/API/SBCommandReturnObject.h
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBTypeSummary.h
M lldb/include/lldb/DataFormatters/TypeSummary.h
M lldb/include/lldb/Host/JSONTransport.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedCommandInterface.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStringSummaryInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Protocol/MCP/Transport.h
M lldb/include/lldb/Utility/Environment.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/builders/builder.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session.py
M lldb/source/API/SBCommandReturnObject.cpp
A lldb/source/API/SBCommandReturnObjectImpl.h
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBTypeSummary.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Core/IOHandler.cpp
M lldb/source/Core/Section.cpp
M lldb/source/DataFormatters/TypeSummary.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Host/common/JSONTransport.cpp
M lldb/source/Host/linux/HostInfoLinux.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/Language/ObjC/CF.cpp
M lldb/source/Plugins/Language/ObjC/Cocoa.cpp
M lldb/source/Plugins/Language/ObjC/NSArray.cpp
M lldb/source/Plugins/Language/ObjC/NSDictionary.cpp
M lldb/source/Plugins/Language/ObjC/NSError.cpp
M lldb/source/Plugins/Language/ObjC/NSException.cpp
M lldb/source/Plugins/Language/ObjC/NSIndexPath.cpp
M lldb/source/Plugins/Language/ObjC/NSSet.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.h
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
A lldb/source/Plugins/ObjectFile/wasm/WasmAddress.h
M lldb/source/Plugins/Platform/Windows/CMakeLists.txt
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.h
A lldb/source/Plugins/Platform/Windows/PlatformWindowsProperties.td
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
M lldb/source/Plugins/Process/wasm/ProcessWasm.h
M lldb/source/Plugins/Process/wasm/RegisterContextWasm.cpp
M lldb/source/Plugins/Process/wasm/ThreadWasm.cpp
M lldb/source/Plugins/Process/wasm/ThreadWasm.h
M lldb/source/Plugins/Protocol/MCP/Tool.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedCommandPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedCommandPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStringSummaryPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStringSummaryPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Protocol/MCP/Transport.cpp
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Target/Target.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/expression/expr-with-fork/TestExprWithFork.py
M lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
M lldb/test/API/commands/gui/spawn-threads/TestGuiSpawnThreads.py
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceDumpInstructions.py
M lldb/test/API/commands/trace/TestTraceExport.py
M lldb/test/API/commands/trace/TestTraceSave.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/gdb_remote_client/TestGdbClientModuleLoad.py
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
A lldb/test/API/functionalities/process_save_core_minidump_size_of_image/Makefile
A lldb/test/API/functionalities/process_save_core_minidump_size_of_image/TestMinidumpSizeOfImage.py
A lldb/test/API/functionalities/process_save_core_minidump_size_of_image/main.c
A lldb/test/API/functionalities/process_save_core_minidump_size_of_image/testlib.c
A lldb/test/API/lang/objc/tagged-pointer-children/Makefile
A lldb/test/API/lang/objc/tagged-pointer-children/TestTaggedPointerChildren.py
A lldb/test/API/lang/objc/tagged-pointer-children/main.m
A lldb/test/API/lang/objc/tagged-pointer-children/tagged_synth_provider.py
A lldb/test/API/linux/aarch64/aarch32_compat/Makefile
A lldb/test/API/linux/aarch64/aarch32_compat/TestAArch64LinuxAArch32Compat.py
A lldb/test/API/linux/aarch64/aarch32_compat/main.s
A lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_win_debug_heap.py
M lldb/test/API/tools/lldb-dap/longpath/TestDAP_launch_longPath.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/runInTerminal/main.c
M lldb/test/API/tools/lldb-dap/stackTrace/subtleFrames/TestDAP_subtleFrames.py
M lldb/test/API/tools/lldb-dap/unknown/TestDAP_unknownRequest.py
A lldb/test/API/windows/debug-heap/Makefile
A lldb/test/API/windows/debug-heap/TestWindowsDebugHeap.py
A lldb/test/API/windows/debug-heap/main.c
M lldb/test/CMakeLists.txt
A lldb/test/Shell/MCP/TestHelp.test
A lldb/test/Shell/MCP/TestUnknownArgument.test
A lldb/test/Shell/MCP/TestVersion.test
A lldb/test/Shell/ObjectFile/wasm/wasm-globals.yaml
M lldb/test/Shell/Settings/TestCxxFrameFormatRecursive.test
M lldb/test/Shell/helper/toolchain.py
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Host/HostInfoTest.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M llvm/docs/AArch64SME.md
M llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUAsyncOperations.md
M llvm/docs/AMDGPUDMAOperations.md
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUExecutionSynchronization.md
M llvm/docs/AMDGPUInstructionNotation.rst
M llvm/docs/AMDGPUInstructionSyntax.rst
M llvm/docs/AMDGPUMemoryModel.md
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUOperandSyntax.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AddingConstrainedIntrinsics.md
M llvm/docs/AdvancedBuilds.md
M llvm/docs/AliasAnalysis.md
M llvm/docs/Atomics.md
M llvm/docs/BigEndianNEON.md
M llvm/docs/BitCodeFormat.md
M llvm/docs/BlockFrequencyTerminology.rst
M llvm/docs/BranchWeightMetadata.rst
M llvm/docs/BugLifeCycle.rst
R llvm/docs/BugpointRedesign.md
M llvm/docs/BuildingADistribution.md
M llvm/docs/CFIVerify.md
M llvm/docs/CIBestPractices.rst
M llvm/docs/CMake.md
M llvm/docs/CMakePrimer.rst
M llvm/docs/CodeGenerator.md
M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/docs/CommandGuide/llvm-pdbutil.rst
M llvm/docs/CommandGuide/llvm-readobj.rst
M llvm/docs/CommandLine.md
M llvm/docs/CompileCudaWithLLVM.md
M llvm/docs/CompilerWriterInfo.md
M llvm/docs/Contributing.md
M llvm/docs/ConvergenceAndUniformity.rst
M llvm/docs/ConvergentOperations.rst
M llvm/docs/Coroutines.md
M llvm/docs/CoverageMappingFormat.md
M llvm/docs/CycleTerminology.md
M llvm/docs/DTLTO.md
M llvm/docs/DependenceGraphs/index.rst
M llvm/docs/DeveloperPolicy.md
M llvm/docs/DirectX/DXContainer.rst
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/docs/DirectX/DXILOpTableGenDesign.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/ExceptionHandling.md
M llvm/docs/Extensions.md
M llvm/docs/FAQ.md
M llvm/docs/FatLTO.rst
M llvm/docs/FaultMaps.rst
M llvm/docs/Frontend/PerformanceTips.md
M llvm/docs/FuzzingLLVM.rst
M llvm/docs/GarbageCollection.md
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingInvolved.md
M llvm/docs/GettingStarted.md
M llvm/docs/GettingStartedVS.md
M llvm/docs/GitHub.md
A llvm/docs/GitHubActionsRunners.rst
M llvm/docs/GlobalISel/GMIR.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/GlobalISel/IRTranslator.rst
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M llvm/include/llvm/Analysis/DXILResource.h
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M llvm/include/llvm/BinaryFormat/MachO.def
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M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
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M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
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M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
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M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
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M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
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M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
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M llvm/lib/Target/AMDGPU/AMDGPUPromoteKernelArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
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M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
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M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
M llvm/lib/Target/AMDGPU/R600Packetizer.cpp
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
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M llvm/lib/Target/AMDGPU/SIInstructions.td
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M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARC/ARCOptAddrMode.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMMacroFusion.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
M llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
M llvm/lib/Target/Hexagon/HexagonLiveVariables.cpp
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
M llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCGenScalarMASSEntries.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
M llvm/lib/Target/PowerPC/PPCMacroFusion.cpp
M llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
A llvm/lib/Target/RISCV/RISCVMacroFusionXQCI.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/lib/Target/VE/VEInstrPatternsVec.td
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/GISel/X86PostLegalizerCombiner.cpp
M llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86InsertX87Wait.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86MacroFusion.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/IPO/SampleProfile.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/CMakeLists.txt
A llvm/lib/Transforms/Instrumentation/CopyProf.cpp
M llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopPassManager.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/NaryReassociate.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/Sink.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/AArch64/clmul.ll
A llvm/test/Analysis/CostModel/AArch64/sve-vls-reduce-bfp.ll
A llvm/test/Analysis/CostModel/AArch64/sve-vls-reduce-fp.ll
A llvm/test/Analysis/CostModel/AArch64/sve-vls-reduce-int.ll
A llvm/test/Analysis/CostModel/WebAssembly/cast.ll
A llvm/test/Analysis/DXILResource/has-atomic64-use.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
A llvm/test/Analysis/HashRecognize/def-use-chains-visited.ll
R llvm/test/Analysis/HashRecognize/dig-recurrence.ll
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-apply-to-adds.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-minmax.ll
A llvm/test/Assembler/module-flags-long-double-type.ll
A llvm/test/Bitcode/upgrade-ppc-float-abi.ll
R llvm/test/CodeGen/AArch64/GlobalISel/irtranslater-samesign.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero-unsupported.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-with-success.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop-no-implicit-float.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-dyn-alloca.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-hint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-indexed-load-stores.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-get-dynamic-area-offset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-range.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-xor.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rotr-rotl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-zext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-store-vector-bools.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-threeway-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadd-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usub-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-compress.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xtn.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-zextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner-zext-trunc-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
M llvm/test/CodeGen/AArch64/GlobalISel/reg-bank-128bit.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-sext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-zext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-ceil.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-dup.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fma.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fmaximum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fminimum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic-round.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-llround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-lround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-maxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-minnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-nearbyint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-shift-imm-64.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-trunc-s128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-fp-loads.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-reductions.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-reg_sequence.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-unmerge-vec.mir
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/clmul.ll
A llvm/test/CodeGen/AArch64/misched-reg-pressure-limits.mir
M llvm/test/CodeGen/AArch64/neon-dotreduce.ll
M llvm/test/CodeGen/AArch64/neon-extadd.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-bf16-vselect.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
M llvm/test/CodeGen/AArch64/sve-ptrue-coalesce.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-vselect.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
A llvm/test/CodeGen/AMDGPU/freeze-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/idot4-test.ll
A llvm/test/CodeGen/AMDGPU/insert-vector-elt-build-vector-poison.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
A llvm/test/CodeGen/AMDGPU/mfma-no-multiple-copies.mir
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/no-corresponding-integer-type.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
A llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-interference.mir
A llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
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A llvm/test/CodeGen/AMDGPU/soft-waitcnt-deletion.mir
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M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-regalloc.mir
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-sched.mir
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/ARM/elf-preemption.ll
A llvm/test/CodeGen/ARM/regcoalesce-undef-copy-subreg-redef.ll
A llvm/test/CodeGen/ARM/regcoalesce-undef-copy-subreg-redef.mir
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
A llvm/test/CodeGen/DirectX/ContainerData/PSVResources-UsedByAtomic64.ll
R llvm/test/CodeGen/DirectX/cross.ll
A llvm/test/CodeGen/MIR/X86/machine-verifier-nophi.mir
A llvm/test/CodeGen/MIR2Vec/Inputs/mir2vec_classless_vocab.json
A llvm/test/CodeGen/MIR2Vec/classless-physreg.mir
A llvm/test/CodeGen/MIR2Vec/classless-vreg.mir
A llvm/test/CodeGen/MIR2Vec/empty-machine-function.mir
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M llvm/test/CodeGen/NVPTX/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/blocksareclusters-kernel-attr.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
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M llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
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M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/global-cycle-alias.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/NVPTX/op-fence.ll
M llvm/test/CodeGen/NVPTX/prmt-const-folding.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/switch.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/thread-fence.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/gnu-attribute.ll
A llvm/test/CodeGen/RISCV/epilog-crash.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
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M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
A llvm/test/CodeGen/RISCV/shadow-stack-zcmp.ll
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
A llvm/test/CodeGen/RISCV/zero-call-used-regs-v.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-type-not-in-regs.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array-of-composite-drop.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array-skip-element-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite-nested-drop.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite-skip-member-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite-static-member-skipped.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-composite.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer-to-composite-drop.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_tensor_float32_conversion/tf32-conv.ll
A llvm/test/CodeGen/SPIRV/get-global-id-non-integer-dim.ll
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/cross.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/NonUniformIdx/RWBufferNonUniformIdxLoop.ll
A llvm/test/CodeGen/SPIRV/instructions/ret-single-element-array.ll
M llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
M llvm/test/CodeGen/SPIRV/literals.ll
M llvm/test/CodeGen/SPIRV/opencl/vload_halfn.ll
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
M llvm/test/CodeGen/SystemZ/memmove-01.ll
A llvm/test/CodeGen/SystemZ/zos-common-global.ll
M llvm/test/CodeGen/VE/Packed/vp_mul.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
M llvm/test/CodeGen/WebAssembly/eh-lsda.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/function-info.mir
M llvm/test/CodeGen/WebAssembly/immutable-global-alias.ll
M llvm/test/CodeGen/WebAssembly/imported-const-global.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj-phi.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-em-sjlj-error.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-invalid-personality.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-sjlj-setjmp-within-catch.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
M llvm/test/CodeGen/X86/lea-opt-cse1.ll
M llvm/test/CodeGen/X86/lea-opt-cse2.ll
M llvm/test/CodeGen/X86/lea-opt-cse4.ll
M llvm/test/CodeGen/X86/lea-recursion.ll
A llvm/test/CodeGen/X86/lea-reuse-rip-relative.ll
A llvm/test/CodeGen/X86/pr51707.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
A llvm/test/CodeGen/X86/vector-sint-to-fp-zero.ll
A llvm/test/CodeGen/X86/vector-uint-to-fp-zero.ll
M llvm/test/CodeGen/X86/win64-eh-unwindv2-errors.mir
M llvm/test/CodeGen/X86/zero-call-used-regs.ll
M llvm/test/DebugInfo/Generic/debug-info-qualifiers.ll
M llvm/test/DebugInfo/Generic/dwarf5-debug-info-static-member.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/incorrect-variable-debugloc.ll
M llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
M llvm/test/DebugInfo/Generic/namespace.ll
M llvm/test/DebugInfo/Generic/varargs.ll
M llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/X86/align_cpp11.ll
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/string-offsets-multiple-cus.ll
M llvm/test/DebugInfo/X86/string-offsets-table.ll
M llvm/test/ExecutionEngine/JITLink/Generic/Inputs/MachO_Universal_libFoo_dylib.yaml
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_constant_global_redzones.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_global_redzones.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_lds.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_scratch.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_constant_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_global_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/global_metadata_addrspacecasts.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_lds_globals.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_scratch_globals.ll
M llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll
A llvm/test/Instrumentation/CopyProf/function-instrumentation.ll
A llvm/test/Instrumentation/CopyProf/no-instrumentation.ll
A llvm/test/Instrumentation/CopyProf/store-instrumentation.ll
M llvm/test/Instrumentation/Instrumentor/default_config.json
A llvm/test/Instrumentation/Instrumentor/inline_runtime.ll
A llvm/test/Instrumentation/Instrumentor/inline_runtime_config.json
M llvm/test/Instrumentation/Instrumentor/lit.local.cfg
A llvm/test/Instrumentation/Instrumentor/runtimes/bytes_computed_rt.ll
A llvm/test/LTO/X86/ifunc.ll
A llvm/test/Linker/module-flags-long-double-type.ll
M llvm/test/MC/AMDGPU/alignto_mcexpr.s
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
M llvm/test/MC/AMDGPU/branch-comment.s
M llvm/test/MC/AMDGPU/data.s
M llvm/test/MC/AMDGPU/dl-insts-err.s
M llvm/test/MC/AMDGPU/ds-err.s
M llvm/test/MC/AMDGPU/elf-lds-error.s
M llvm/test/MC/AMDGPU/elf-lds.s
M llvm/test/MC/AMDGPU/elf-notes-verify-amdgcn.s
M llvm/test/MC/AMDGPU/exp-err.s
M llvm/test/MC/AMDGPU/exp-pregfx11.s
M llvm/test/MC/AMDGPU/exp.s
M llvm/test/MC/AMDGPU/flat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-code-props-v3.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/isa-version-pal.s
M llvm/test/MC/AMDGPU/isa-version-unk.s
M llvm/test/MC/AMDGPU/labels-branch-err.s
M llvm/test/MC/AMDGPU/labels-branch-gfx9.s
M llvm/test/MC/AMDGPU/labels-branch.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/mai.s
M llvm/test/MC/AMDGPU/max-branch-distance.s
M llvm/test/MC/AMDGPU/mcexpr_amd.s
M llvm/test/MC/AMDGPU/mcexpr_amd_err.s
M llvm/test/MC/AMDGPU/occupancy_mcexpr.s
M llvm/test/MC/AMDGPU/offset-expr.s
M llvm/test/MC/AMDGPU/offsetbug_once.s
M llvm/test/MC/AMDGPU/offsetbug_one_and_one.s
M llvm/test/MC/AMDGPU/offsetbug_twice.s
M llvm/test/MC/AMDGPU/pal-registers.s
M llvm/test/MC/AMDGPU/regression/bug28538.s
M llvm/test/MC/AMDGPU/reloc-directive.s
M llvm/test/MC/AMDGPU/round-trip.s
M llvm/test/MC/AMDGPU/s_endpgm.s
M llvm/test/MC/AMDGPU/sop1-err.s
M llvm/test/MC/AMDGPU/sop1.s
M llvm/test/MC/AMDGPU/sop2-err.s
M llvm/test/MC/AMDGPU/sop2.s
M llvm/test/MC/AMDGPU/sopk-err.s
M llvm/test/MC/AMDGPU/sopp-err.s
M llvm/test/MC/AMDGPU/sopp.s
M llvm/test/MC/AMDGPU/sym_kernel_scope.s
M llvm/test/MC/AMDGPU/trap.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/AMDGPU/vcc_tuples.s
M llvm/test/MC/AMDGPU/vintrp-err.s
M llvm/test/MC/AMDGPU/vop2-err.s
M llvm/test/MC/AMDGPU/vop3-literal.s
M llvm/test/MC/AMDGPU/vopc-errs.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_wave64_feature.s
M llvm/test/MC/Disassembler/AMDGPU/gfx9_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_smem_features.txt
A llvm/test/MC/MachO/target-triple-padding.s
A llvm/test/MC/MachO/target-triple.s
A llvm/test/MC/X86/intel-syntax-data32-16.s
M llvm/test/MachineVerifier/AMDGPU/verify-ds-vdata-vdst-both-agpr-or-vgpr.mir
A llvm/test/Object/Inputs/macho-invalid-target-triple-name_offset-toobig.yaml
A llvm/test/Object/Inputs/macho-invalid-target-triple-name_offset-toosmall.yaml
A llvm/test/Object/Inputs/macho-invalid-target-triple-name_toobig.yaml
A llvm/test/Object/Inputs/macho-invalid-target-triple-small.yaml
M llvm/test/Object/macho-invalid.test
A llvm/test/ObjectYAML/MachO/target_triple_command.yaml
A llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/test/TableGen/MacroFusion.td
A llvm/test/TableGen/ProcessorAlias.td
A llvm/test/TableGen/ProcessorAliasErrors.td
M llvm/test/TableGen/RuntimeLibcallEmitter-bad-system-library-entry-error.td
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R llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
A llvm/test/TableGen/RuntimeLibcallEmitter-multiple-impls.td
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M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag-errors.td
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A llvm/test/TableGen/eof-after-endif.td
A llvm/test/TableGen/ifdef-cr-instead-of-newline.td
A llvm/test/Transforms/Attributor/nofpclass-arbitrary-fp.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/large-system-growth.ll
A llvm/test/Transforms/ConstraintElimination/ne-tightening.ll
M llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
M llvm/test/Transforms/ConstraintElimination/reproducer-remarks.ll
M llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll
A llvm/test/Transforms/ConstraintElimination/srem.ll
M llvm/test/Transforms/ConstraintElimination/sub.ll
M llvm/test/Transforms/ExpandVariadics/invoke.ll
M llvm/test/Transforms/IRCE/compound-loop-bound.ll
A llvm/test/Transforms/IRCE/expansion-cleanup-analysis-invalidation.ll
M llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
M llvm/test/Transforms/InstCombine/cast_ptr.ll
M llvm/test/Transforms/InstCombine/catchswitch-phi.ll
M llvm/test/Transforms/InstCombine/is_fpclass.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
A llvm/test/Transforms/JumpThreading/dup-cond-br-recursive-phi.ll
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M llvm/test/Transforms/LoopIdiom/add-nsw-zext-fold.ll
A llvm/test/Transforms/LoopIdiom/memmove-ext.ll
M llvm/test/Transforms/LoopUnroll/RISCV/vector.ll
M llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions-min-max.ll
M llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-access-wide-stride.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-narrow-iv.ll
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M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/call-decisions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/partial-reduce-usabs.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/single-scalar-cast.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
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M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/VPlan/PowerPC/vplan-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/scalarize-wide-load-for-address-use.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/find-last.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/phi-with-fastflags-vplan.ll
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M llvm/test/Transforms/LoopVectorize/VPlan/scalarize-irregular-type-memops.ll
M llvm/test/Transforms/LoopVectorize/VPlan/simplify-reverse-reverse.ll
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A llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
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M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-alias-mask.ll
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M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions-tail-folded.ll
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M llvm/test/Transforms/LoopVectorize/VPlan/vplan-widen-struct-return.ll
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A llvm/test/Transforms/LoopVectorize/X86/CostModel/store-scalarization-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model-i386.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/induction-cost.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
A llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
A llvm/test/Transforms/PGOProfile/icp_hot_func_threshold.ll
M llvm/test/Transforms/PGOProfile/memop_profile_funclet_wasm.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
M llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
A llvm/test/Transforms/RelLookupTableConverter/AArch64/no_relative_lookup_table.ll
M llvm/test/Transforms/RelLookupTableConverter/unnamed_addr.ll
M llvm/test/Transforms/SCCP/preserve-analysis.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/buildvector-used-by-insertvalue.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/extract-fmul-cost.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/external.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-with-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-add-part.ll
A llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-mul-part.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordering-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassociate-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
A llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle-missing-for-expanded-binop-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SROA/phi-catchswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/catchswitch.ll
M llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
M llvm/test/Transforms/SimplifyCFG/branch-nested.ll
M llvm/test/Transforms/SimplifyCFG/cleanup-phis.ll
M llvm/test/Transforms/SimplifyCFG/switch-umin.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
M llvm/test/Verifier/AMDGPU/alloca.ll
M llvm/test/Verifier/AMDGPU/reqd-work-group-size.ll
A llvm/test/Verifier/module-flags-long-double-type.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/vplan.ll.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
A llvm/test/tools/dsymutil/AArch64/lc_target_triple.test
A llvm/test/tools/dsymutil/AArch64/lc_target_triple_duplicate.test
A llvm/test/tools/dsymutil/AArch64/lc_target_triple_universal.test
A llvm/test/tools/dsymutil/Inputs/lc_target_triple.arm64
A llvm/test/tools/dsymutil/Inputs/lc_target_triple_duplicate.arm64
A llvm/test/tools/dsymutil/Inputs/lc_target_triple_universal.arm64
A llvm/test/tools/dsymutil/X86/keep-enumerators.test
M llvm/test/tools/llubi/attribute_noundef_ub.ll
M llvm/test/tools/llubi/attributes.ll
M llvm/test/tools/llubi/bitcast_be.ll
M llvm/test/tools/llubi/bitcast_le.ll
A llvm/test/tools/llubi/bytes_poison.ll
A llvm/test/tools/llubi/bytes_undef.ll
M llvm/test/tools/llubi/freeze.ll
M llvm/test/tools/llubi/global.ll
M llvm/test/tools/llubi/load_noundef_ub_undef.ll
M llvm/test/tools/llubi/loadstore_be.ll
M llvm/test/tools/llubi/loadstore_le.ll
A llvm/test/tools/llubi/ptrtoint_cast.ll
A llvm/test/tools/llvm-ml/textequ_expansion.asm
A llvm/test/tools/llvm-objcopy/MachO/lc-target-triple.test
A llvm/test/tools/llvm-objdump/MachO/target-triple.yaml
M llvm/test/tools/llvm-offload-wrapper/offload-wrapper.ll
A llvm/test/tools/llvm-profdata/eytzinger-split-nametable-partition.test
A llvm/test/tools/llvm-readobj/MachO/target-triple.test
M llvm/tools/dsymutil/MachOUtils.cpp
M llvm/tools/llubi/lib/Context.cpp
M llvm/tools/llubi/lib/Context.h
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llubi/lib/Value.cpp
M llvm/tools/llubi/lib/Value.h
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.h
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-readobj/MachODumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.h
M llvm/tools/llvm-readobj/Opts.td
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/tools/obj2yaml/macho2yaml.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/ExecutionEngine/Orc/MachOBuilderTest.cpp
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/HLSLSemanticSignatureMetadataTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
M llvm/unittests/Transforms/Utils/CloningTest.cpp
M llvm/unittests/Transforms/Utils/LoopUtilsTest.cpp
A llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Platform/Windows/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/LogicalView/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Frontend/HLSL/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Instrumentation/BUILD.gn
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
M llvm/utils/lit/CMakeLists.txt
M llvm/utils/lit/tests/lit.site.cfg.in
M mlir/include/mlir/Analysis/FlatLinearValueConstraints.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
M mlir/include/mlir/Dialect/Affine/Transforms/Passes.h
M mlir/include/mlir/Dialect/Affine/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/Quant/IR/QuantTypes.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/MathToXeVM/CMakeLists.txt
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
M mlir/lib/Dialect/Linalg/Transforms/FoldIntoElementwise.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/lib/Dialect/OpenACC/Transforms/ACCEmitRemarksData.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCRoutineLowering.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Quant/IR/QuantTypes.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/GPUToSPIRV/reductions.mlir
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
M mlir/test/Conversion/SCFToSPIRV/for.mlir
M mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
M mlir/test/Dialect/Affine/affine-loop-normalize.mlir
A mlir/test/Dialect/Linalg/block-pack-matmul-scalable.mlir
M mlir/test/Dialect/Linalg/elementwise/fold.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/roundtrip.mlir
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
A mlir/test/Dialect/OpenACC/acc-emit-remarks-data.mlir
M mlir/test/Dialect/OpenACC/acc-routine-lowering.mlir
M mlir/test/Dialect/Quant/invalid-quantile-types.mlir
M mlir/test/Dialect/Quant/quantile-types.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Examples/Toy/Ch6/llvm-lowering.mlir
M mlir/test/Examples/Toy/Ch7/llvm-lowering.mlir
M mlir/test/IR/invalid-ops.mlir
M mlir/test/IR/invalid-properties.mlir
M mlir/test/IR/properties.mlir
A mlir/test/Integration/Dialect/EmitC/inline-oz-test-model-tosa.mlir
A mlir/test/Integration/Dialect/EmitC/regalloc-eviction-test-model-tosa.mlir
M mlir/test/Integration/GPU/CUDA/command-line-arg.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/openmp-llvm-invalid.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-simd-guided.mlir
M mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/Unit/lit.site.cfg.py.in
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestOpsSyntax.td
M mlir/test/lit.site.cfg.py.in
M mlir/test/mlir-tblgen/op-format.mlir
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/unittests/Analysis/Presburger/Parser.h
M offload/liboffload/API/Common.td
A offload/liboffload/API/Context.td
M offload/liboffload/API/Memory.td
M offload/liboffload/API/OffloadAPI.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/JIT.cpp
M offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/include/L0Defs.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Event.h
M offload/plugins-nextgen/level_zero/include/L0Interop.h
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/include/L0Program.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Event.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Memory.cpp
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
M offload/test/CMakeLists.txt
M offload/test/mapping/declare_mapper_nested_mappers.cpp
M offload/test/mapping/declare_mapper_target.cpp
M offload/test/mapping/declare_mapper_target_data.cpp
M offload/test/mapping/declare_mapper_target_data_enter_exit.cpp
M offload/test/mapping/declare_mapper_target_update.cpp
A offload/test/mapping/mapper_enter_data_always_present_ptee.c
A offload/test/mapping/mapper_map_always_from.c
A offload/test/mapping/mapper_map_always_to_enter_data.c
A offload/test/mapping/mapper_map_mbr_ptee_then_present_mbr_ptee.c
A offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
A offload/test/mapping/mapper_map_present_ptee.c
A offload/test/mapping/mapper_map_ptee_only.c
A offload/test/mapping/mapper_map_ptee_only_2_ptr_indirections.c
A offload/test/mapping/mapper_map_ptee_only_2_ptr_indirections_array.c
A offload/test/mapping/mapper_map_ptee_only_2ndlevel.c
A offload/test/mapping/mapper_map_ptee_only_2ndlevel_array.c
A offload/test/mapping/mapper_map_ptee_only_always_array.c
A offload/test/mapping/mapper_map_ptee_only_array.c
A offload/test/mapping/mapper_map_ptee_then_present_absent_mbr.c
A offload/test/mapping/mapper_map_ptr_ptee_nomapper_del_ptee.c
A offload/test/mapping/mapper_map_ptr_ptee_nomapper_del_ptr.c
A offload/test/mapping/mapper_target_update_present_ptee.c
A offload/test/mapping/multiple_deletes_within_one_struct.c
A offload/test/offloading/fortran/mapper-map-always-to-enter-data.f90
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/context/olCreateContext.cpp
A offload/unittests/OffloadAPI/context/olDestroyContext.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfo.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfoSize.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfo.cpp
M offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
M offload/unittests/OffloadAPI/memory/olMemAllocAligned.cpp
M offload/unittests/OffloadAPI/memory/olMemFree.cpp
M offload/unittests/OffloadAPI/queue/olLaunchHostFunction.cpp
M openmp/device/include/DeviceTypes.h
M orc-rt/docs/CodingConventions.md
A orc-rt/include/orc-rt-c/Session.h
M orc-rt/include/orc-rt-c/WrapperFunction.h
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/include/orc-rt/StringExtras.h
M orc-rt/include/orc-rt/ThreadPoolRunner.h
M orc-rt/include/orc-rt/WrapperFunction.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/lib/executor/Session.cpp
M orc-rt/lib/executor/ThreadPoolRunner.cpp
M orc-rt/test/unit/DirectCaller.h
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/SPSWrapperFunctionTest.cpp
M orc-rt/test/unit/SessionTest.cpp
M orc-rt/test/unit/ThreadPoolRunnerTest.cpp
M third-party/benchmark/src/sysinfo.cc
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/29c1afcc5c10...1af0f1f0ea33
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