[all-commits] [llvm/llvm-project] bdddd3: [X86] Apply the data32 mode switch in the Intel ma...

[Zane Hambly via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bdddd3e7202477e37c0a73dd036a0377d762f2e6
      https://github.com/llvm/llvm-project/commit/bdddd3e7202477e37c0a73dd036a0377d762f2e6
  Author: Zane Hambly <zanehambly at gmail.com>
  Date:   2026-07-30 (Thu, 30 Jul 2026)

  Changed paths:
    M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    A llvm/test/MC/X86/intel-syntax-data32-16.s

  Log Message:
  -----------
  [X86] Apply the data32 mode switch in the Intel matcher (#212417)

In .code16, `data32 push 8` in Intel syntax assembled as `pushw $8` with
the 66 prefix dropped, and `data32 push 0x1234` truncated the immediate
to 16 bits. AT&T syntax gets both right.

`ForcedDataPrefix` is set while parsing either syntax, but only
`matchAndEmitATTInstruction` switched mode on it, so the Intel path took
the operand size from the mode and never saw the prefix.

Do the same switch in `matchAndEmitIntelInstruction`. The mode has to go
back to 16-bit before the instruction is emitted, otherwise the 32-bit
form is emitted without its 66 prefix. That function has several error
returns partway through matching, so a scope guard covers those.

Encodings after the change match both AT&T syntax and GNU as:

```
data32 push 8       [0x6a,0x08]      -> [0x66,0x6a,0x08]
data32 push 0x1234  [0x68,0x34,0x12] -> [0x66,0x68,0x34,0x12,0x00,0x00]
```

Fixes #156286



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