[all-commits] [llvm/llvm-project] 1301a6: Fix Strong VTables Accidentally Emitted by #159856...
Andrei Elovikov via All-commits
all-commits at lists.llvm.org
Tue Jul 28 09:33:30 PDT 2026
Branch: refs/heads/users/eas/vplan-based-stride-mv-tests
Home: https://github.com/llvm/llvm-project
Commit: 1301a69bc23e3dbf9e60e7ca2acc8171bb358bac
https://github.com/llvm/llvm-project/commit/1301a69bc23e3dbf9e60e7ca2acc8171bb358bac
Author: Patrick Simmons <patrick.simmons at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
A clang/test/OpenMP/openmp_offload_weak_vtables.cpp
Log Message:
-----------
Fix Strong VTables Accidentally Emitted by #159856 (#200942)
Users have reported link errors due to duplicate vtables after the merge
of #159856. Root cause analysis revealed that these errors were due to
the VTables emitted in `CGOpenMPRuntime::emitAndRegisterVTable`, which
was added by PR #159856. This PR fixes the issue by changing that
function to emit its VTables as weak symbols.
Commit: 315c8bba65673457cd118f167ce2fa62f1347e9e
https://github.com/llvm/llvm-project/commit/315c8bba65673457cd118f167ce2fa62f1347e9e
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/sysv_abi.c
A clang/test/CodeGen/target-avx-function-abi.c
A clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
Log Message:
-----------
Reland "[clang][CodeGen][X86_64] Honor per-function AVX ABI in C/C++ call paths, maintain old psABI for PlayStation." (#210349)
https://github.com/llvm/llvm-project/pull/193298 was reverted because of
a compile time regression (see results
[here](https://llvm-compile-time-tracker.com/compare.php?from=b9869c8c920a7dfa983e215bc30729b13d8b353b&to=464b46a73b7592c95222cf2e64b34ffe6f2cf251&stat=instructions:u))
I added a conditional statement so that getFunctionFeatureMap and the
subsequent string lookup is only called if FD->hasAttr<TargetAttr>()
evaluates to true which should be very rare.
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: ec8e379cac62ddbad5d0319be0cf2369fa5102c9
https://github.com/llvm/llvm-project/commit/ec8e379cac62ddbad5d0319be0cf2369fa5102c9
Author: Ian Li <ian.li at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
Log Message:
-----------
[NFC][Clang] Remove dead code from LifetimeSafety/FactsGenerator.cpp (#210830)
This PR removes dead code in
`clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp`. This was
discovered by a Coverity scan on clang.
Commit: b59caeffc273ddd057b7a5d0f1129afbfa3b3c7b
https://github.com/llvm/llvm-project/commit/b59caeffc273ddd057b7a5d0f1129afbfa3b3c7b
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
A lldb/test/API/tools/lldb-dap/eventStatistic/TestDAP_eventStatistic.py
R lldb/test/API/tools/lldb-dap/eventStatistic/TestVSCode_eventStatistic.py
M lldb/test/API/tools/lldb-dap/invalidated-event/TestDAP_invalidatedEvent.py
M lldb/test/API/tools/lldb-dap/send-event/TestDAP_sendEvent.py
M lldb/test/API/tools/lldb-dap/stopped-events/TestDAP_stopped_events.py
M lldb/test/API/tools/lldb-dap/terminated-event/TestDAP_terminatedEvent.py
Log Message:
-----------
[lldb-dap] Migrate lldb-dap events tests. (#209285)
Migrate
- TestDAP_breakpointEvent.py
- TestDAP_eventStatistic.py
- TestDAP_invalidatedEvent.py
- TestDAP_sendEvent.py
- TestDAP_stopped_events.py
- TestDAP_terminatedEvent.py
Some test's helper methods are no longer necessary as there is already
existing session function doing something similar.
Commit: 19822360d87121ac12d201997bf82af94926ef36
https://github.com/llvm/llvm-project/commit/19822360d87121ac12d201997bf82af94926ef36
Author: asraa <asraa at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/unittests/Analysis/Presburger/IntegerRelationTest.cpp
Log Message:
-----------
[mlir][Analysis][Presburger] Remove redundant local vars after composition (#211023)
Call `removeRedundantLocalVars()` at the end of
`IntegerRelation::compose` to simplify existential constraints generated
when projecting out intermediate dimensions.
Removing redundant local vars also happens in
`IntegerRelation::mergeAndCompose` and `FlatAffineRelation::compose`.
When composing A->B with B->C, intermediate vars B are converted to
local existential variables. When performing multiple compositions, this
causes bloat of existential variables that impact later performance,
bounds checks, and emptiness checks.
Signed-off-by: Asra Ali <asraa at google.com>
Commit: 5b1fa37be65be730784a675c40b15d5a702f38ab
https://github.com/llvm/llvm-project/commit/5b1fa37be65be730784a675c40b15d5a702f38ab
Author: Andy Ames <andy.ames at jobyaviation.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/initializer.cpp
A clang/test/Analysis/issue-210183.cpp
Log Message:
-----------
[analyzer] Fix crash in RegionStoreManager::bindArray from constructor array-to-pointer decay (#210649)
ProcessInitializer() strips implicit casts from a CXXCtorInitializer's
init expression via IgnoreImplicit(), then decides whether to treat the
initializer as a direct array-to-array member copy by checking
Init->getType()->isArrayType(). For a pointer member initialized via
array-to-pointer decay of a reference-to-array constructor parameter
(e.g. `Foo(T (&arr)[N]) : ptr_(arr) {}`), IgnoreImplicit() strips the
ArrayToPointerDecay cast, exposing the underlying array-typed
expression, so this check misfires even though the field itself is a
pointer, not an array. That branch fetches the raw region address of the
whole array, bypassing the normal decay logic (which produces an
ElementRegion), so the pointer member ends up holding the address of the
whole array typed as the array itself, instead of an ElementRegion at
index 0.
Later, dereferencing and storing through that mistyped pointer routes
into RegionStoreManager::bindArray() (instead of bindScalar()), which
unconditionally casts its Init value to nonloc::CompoundVal, asserting
in a debug build and segfaulting in a release build when Init is
anything else, e.g. a nonloc::LocAsInteger produced by round-tripping a
pointer through an integer type.
Fix the actual bug by checking the field's type instead of the
initializer expression's type. Also generalize bindArray()'s existing
guard (added by #178923 for issue #178797) from an enumeration of
specific SVal kinds to the same exhaustive
`!isa<nonloc::CompoundVal>()` check already used by its siblings
bindStruct() and bindVector(), so it doesn't need to be extended again
every time a new SVal kind reaches this path -- this is what actually
catches our case (nonloc::LocAsInteger), which the prior enumeration
didn't cover.
This is the same underlying bug behind #147686 (fixed by #153177, which
its own author noted was "more of a workaround") and #178797 (fixed by
#178923); both those fixes patched symptoms at bindArray() without
addressing the ProcessInitializer() root cause. Fixing the root cause
also resolves two FIXME-annotated precision gaps in
clang/test/Analysis/initializer.cpp's gh147686 regression test.
Fixes #210183
AI tool use disclosure: Claude Code (Anthropic) assisted in reducing the
original crash to a minimal, dependency-free reproducer (via creduce
plus manual bisection, verifying each reduction step against the actual
crash), which informed root-causing this bug in
RegionStoreManager::bindArray and ExprEngine::ProcessInitializer. The
commits made here were drafted with Claude's assistance and reviewed by
me before being pushed. I've reviewed all AI-assisted contributions here
and take full responsibility for the correctness of this change.
---------
Co-authored-by: Andy Ames <andy.ames at joby.aero>
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 0f398c5f1a26ee67ed500e85c91759610cccc3fe
https://github.com/llvm/llvm-project/commit/0f398c5f1a26ee67ed500e85c91759610cccc3fe
Author: Vito Secona <77039267+secona at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
M mlir/test/Dialect/SparseTensor/constant_index_map.mlir
M mlir/test/Dialect/SparseTensor/conversion_invalid.mlir
M mlir/test/Dialect/SparseTensor/vectorize_reduction.mlir
Log Message:
-----------
[mlir][SparseTensor] Reject sparse encoding on non-primary types (#209591)
SparseTensorConversion rewrite patterns assume element types are valid
primary types, but the dialect does not actually enforce this
restriction. This change makes it so that sparse tensor encodings
gracefully reject invalid primary types by verifying the encoding.
Closes #202787
Supersedes and closes #208913
Commit: ac5aea3e462726d6ad44332b1de2e74638804947
https://github.com/llvm/llvm-project/commit/ac5aea3e462726d6ad44332b1de2e74638804947
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
AMDGPU: Validate processor and features in TargetID parsing (#209304)
TargetID::parseTargetIDString previously only checked that the string
was structurally a 4-component triple followed by a processor field. It
accepted unrecognized processors and silently ignored malformed or
unsupported feature modifiers. Work towards improving validation so in
the future clang's copy of TargetID can be replaced.
Co-authored-by: Claude (Opus 4.8)
Commit: c991dbda3184943378b115699f60f51cca0af1fa
https://github.com/llvm/llvm-project/commit/c991dbda3184943378b115699f60f51cca0af1fa
Author: ustachow <urszula.stachowiak at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/MemorySSAUpdater.h
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
Log Message:
-----------
[MemorySSA] Make getPreviousDef iterative to avoid stack overflow (#205159)
MemorySSAUpdater::getPreviousDefRecursive walked the CFG
predecessor-first
using native recursion (mutually recursive with getPreviousDefFromEnd).
On
functions with very deep control flow - e.g. long chains of blocks
produced
by large auto-generated kernels/shaders - the recursion depth scales
with the
number of blocks and can overflow the native stack.
Rewrite the walk as an explicit worklist of frames on the heap. Each
frame
tracks the block being processed and a resume stage so a child block's
result
can be folded back into its parent, exactly mirroring the previous
recursive
control flow. Behaviour is otherwise unchanged: cache lookups,
VisitedBlocks
cycle detection (including the single-predecessor insert-without-erase
asymmetry), predecessor operand order, and phi placement/simplification
are
all preserved. The helper is renamed getPreviousDefRecursive ->
getPreviousDefIterative since it no longer recurses.
Add a unit test that builds a long single-predecessor chain and
incrementally
updates MemorySSA; the previous recursive implementation overflowed the
stack
on such input.
Fixes: https://github.com/llvm/llvm-project/issues/121279
Commit: e959a280d5ac91d219abb802913c4e5cadb45f2a
https://github.com/llvm/llvm-project/commit/e959a280d5ac91d219abb802913c4e5cadb45f2a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCRoutineToGPUFunc.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-bound-routine-call.mlir
Log Message:
-----------
[mlir][openacc] Do not erase acc routine information early (#210813)
acc routine information is used in ACCCGToGPU to compute parallelism. If
the info is missing, predicated region might be wrong and lead to
deadlock.
Just keep them in ACCRountineToGPUFunc and they will be cleaned up later
in the pipeline.
Commit: 9b362c71c51a45871d5fe337c7da7ff1ed9fe0cb
https://github.com/llvm/llvm-project/commit/9b362c71c51a45871d5fe337c7da7ff1ed9fe0cb
Author: David Young <davidayoung at meta.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/llvm-config.h
Log Message:
-----------
[bazel] Only set LLVM_ENABLE_DIA_SDK in bazel build defs to zero if not set by build args (#210723)
Windows lldb build support via bazel is still a work in progress.
LLVM_ENABLE_DIA_SDK enables windows specific functionality. With it
hard-coded to 0 here, an override via build args via buck2 (internally
at Meta) of
'-DLLVM_ENABLE_DIA_SDK=1' had no effect. So modify this set of
configurations to allow that build arg to take precedence while avoiding
a larger amount of changes for windows/bazel lldb support (for now).
As cannot build with bazel locally, I will rely on CI to confirm lint
and building.
Commit: 350c2d86228f330d986f6c8cd63899cd147427c3
https://github.com/llvm/llvm-project/commit/350c2d86228f330d986f6c8cd63899cd147427c3
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
Log Message:
-----------
[AMDGPU] Fix `GCNRegPressureTest`'s super-class to ensure proper target initialization (#211030)
The typo made it so that all tests in the file would be skipped if no
other testsuite explicitly initialized the AMDGPU target (for example
when running `./unittests/Target/AMDGPU/AMDGPUTests
--gtest_filter=GCNRegPressureTest.*`). `AMDGPUCodeGenTestBase`
initializes the target so tests always run as long as LLVM is built with
the AMDGPU target.
Commit: d53ebd23aabd9286075650b663ff0bcbbef9ebd8
https://github.com/llvm/llvm-project/commit/d53ebd23aabd9286075650b663ff0bcbbef9ebd8
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Fix typo (#210815)
GITHUB_OUT -> GITHUB_OUTPUT
Commit: c6e184686cd7d0acfb88531738764f6134700382
https://github.com/llvm/llvm-project/commit/c6e184686cd7d0acfb88531738764f6134700382
Author: eleviant <eleviant at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/BranchRelaxation.cpp
M llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
A llvm/test/CodeGen/AArch64/branch-relax-tbz.mir
Log Message:
-----------
[AArch64][CodeGen] Fix trampoline basic block offset (#202716)
Trampoline basic blocks are initially created with an offset of zero. As
a result, `isBlockInRange()` may operate on incorrect block offset,
potentially causing unnecessary conditional branch inversions or the
insertion of redundant trampolines.
Commit: abe757bd5dfd91718858402375d99152592ab73a
https://github.com/llvm/llvm-project/commit/abe757bd5dfd91718858402375d99152592ab73a
Author: Sayan Sivakumaran <sivakusayan at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll
Log Message:
-----------
[SimplifyCFG] Simplify switch default branch when branch proves operand value (#206597)
If the default branch of a switch proves that there is only one value
that can be sent to the default branch, we can transform the default
branch into an explicit case of the switch. This can assist in further
simplification of the CFG during the simplification loop.
For example, we should be able to create an explicit case for the
default block in cases like the following:
```llvm-ir
switch_bb:
switch i8 %x, label %default_bb [...]
default_bb:
%cmp = icmp eq i8 %x, 1
call void llvm.assume(i1 %cmp) ; Implies %x must be 1
```
Related to #50665.
Commit: 03fc6d19191b64dfff4036a3829737b81ee34748
https://github.com/llvm/llvm-project/commit/03fc6d19191b64dfff4036a3829737b81ee34748
Author: John Otken <john.otken at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/docs/TestingGuide.md
Log Message:
-----------
[llvm][docs] Update TestingGuide with LLVM PR merge advice (#207754)
Add guidance on waiting for LLVM PR merges before test-suite merges to
prevent failures.
Co-authored-by: John Otken john.otken at hpe.com
Commit: ee1eab2a1d28651d0dc675f4f101c0bd78f31e44
https://github.com/llvm/llvm-project/commit/ee1eab2a1d28651d0dc675f4f101c0bd78f31e44
Author: Alex Sepkowski <alsepkow at microsoft.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/test/Sema/aarch64-sve-vector-exp-ops.c
M clang/test/Sema/aarch64-sve-vector-log-ops.c
M clang/test/Sema/aarch64-sve-vector-pow-ops.c
M clang/test/Sema/aarch64-sve-vector-trig-ops.c
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/Sema/riscv-rvv-vector-exp-ops.c
M clang/test/Sema/riscv-rvv-vector-log-ops.c
M clang/test/Sema/riscv-rvv-vector-trig-ops.c
M clang/test/Sema/riscv-sve-vector-pow-ops.c
M clang/test/SemaHLSL/BuiltIns/atan2-errors_mat.hlsl
M clang/test/SemaHLSL/BuiltIns/ddx-coarse-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddx-fine-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddy-coarse-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddy-fine-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/degrees-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/exp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/frac-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors2.hlsl
M clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/isnan-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/normalize-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/radians-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rcp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/round-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
M clang/test/SemaSPIRV/BuiltIns/ddx-errors.c
M clang/test/SemaSPIRV/BuiltIns/ddy-errors.c
M clang/test/SemaSPIRV/BuiltIns/faceforward-errors.c
M clang/test/SemaSPIRV/BuiltIns/fwidth-errors.c
M clang/test/SemaSPIRV/BuiltIns/smoothstep-errors.c
Log Message:
-----------
[clang] Update diagnostics to include matrices as accepted types (#201237)
Several `err_builtin_invalid_arg_type` call sites still emit "scalar or
vector of ..." even though the underlying checkers already unwrap matrix
types. This extends the diagnostic with a new "scalar, vector, or matrix
of" option (index 6) and migrates the call sites whose checkers do
accept matrices:
Call sites whose checkers only unwrap VectorType are left at index 5 so
their diagnostic text continues to accurately describe what is accepted.
Tests using the old wording are updated to match.
Fixes #189147
Assisted by copilot
---------
Co-authored-by: Copilot <223556219+Copilot at users.noreply.github.com>
Commit: accd1ed5226b4a8009c33f0a6d1bcfe58902f69e
https://github.com/llvm/llvm-project/commit/accd1ed5226b4a8009c33f0a6d1bcfe58902f69e
Author: John Paul Jepko <john.jepko at ericsson.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdVariantChecker.cpp
M clang/test/Analysis/std-variant-checker.cpp
Log Message:
-----------
[analyzer] Fix StdVariantChecker crash on std::get with a non-ptr arg (#210167)
When `std::get` is called on a dereferenced integer-to-pointer cast, the
checker `alpha.core.StdVariant` crashes. Minimal reproducer:
```
std::get<int>(*(std::variant<int, char> *)11);
```
Godbolt reproducer - https://godbolt.org/z/4EKe1PrKb
The root cause is that `StdVariantChecker::handleStdGetCall()` calls
`SVal::getType()` on any non-unknown argument, then calls
`getPointeeType()` on the result while assuming it is a pointer type. In
the case of a concrete integer cast to a pointer and then dereferenced,
it is modeled as `loc::ConcreteInt`, whose recovered type is an integer.
`getPointeeType()` on such an input returns a null QualType, on which
`getTypePtr()` crashes.
Fix the crash by using the argument's static type rather than recovering
its SVal, eliminating the need to guard and call `getPointeeType()`.
Commit: 4f5675a0500f9ccc60dcbabb57e1c4dc88c40a84
https://github.com/llvm/llvm-project/commit/4f5675a0500f9ccc60dcbabb57e1c4dc88c40a84
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/DTLTO/CMakeLists.txt
Log Message:
-----------
[CMake] Added missing LLVM_PTHREAD_LIB dependency. (#211041)
Required after #209423.
Commit: a896e12c5e7031a45eca3ca9392a3c56c304f157
https://github.com/llvm/llvm-project/commit/a896e12c5e7031a45eca3ca9392a3c56c304f157
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/Rematerializer.cpp
A llvm/test/CodeGen/AMDGPU/remat-subrange-full-and-partial-use.ll
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Rematerializer: Handle subranges for full-mask users (#211031)
- Create live-interval subranges for new users reading a full lane mask.
- Fixes a missing-subranges case that tripped the `SubRegIdx != 0 &&
LI.hasSubRanges()` assertion in VirtRegRewriter for subreg-tracked
registers.
- Add corresponding unit and lit regression tests.
Commit: 1510167f2cf3a9e89cdb69eee5b3984abd9c930a
https://github.com/llvm/llvm-project/commit/1510167f2cf3a9e89cdb69eee5b3984abd9c930a
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck][NFC] Introduce FileCheckDiagAnnotator (#207485)
This PR is stacked on PR #207484.
In the way that `SearchRangeAnnotator` encapsulates generating search
range annotations, this patch introduces `FileCheckDiagAnnotator` to
encapsulate generating the main annotation for a `FileCheckDiag`. This
change makes `buildInputAnnotations` easier to read, especially after a
third annotator class that will be introduced in a future patch.
Commit: 61b877a57de9fc37b8a94a71840ec66b4abfee2c
https://github.com/llvm/llvm-project/commit/61b877a57de9fc37b8a94a71840ec66b4abfee2c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/cmake/modules/LLVMProcessSources.cmake
Log Message:
-----------
cmake: Filter dangling symlinks from add_td_sources glob (#211051)
Editor lock files (e.g. Emacs' `.#foo.td`) are dangling symlinks that
`file(GLOB *.td)` picks up and passes to add_library(), which then fails
with "Cannot find source file". Filter them out with an EXISTS check, as
already done for header files in add_header_files_for_glob.
Co-authored-by: Claude (Claude Opus 4.8)
Commit: f63615b2fdbf153ceaf5e2444e89fdb1aa59ab6c
https://github.com/llvm/llvm-project/commit/f63615b2fdbf153ceaf5e2444e89fdb1aa59ab6c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/fmed3.ll
Log Message:
-----------
[AMDGPU] Fix wrong min/max for amdgcn.fmed3 NaN 3rd operand (#203822)
Commit: 879db2f9478f454f8dcf961b660a9078b73bf1b5
https://github.com/llvm/llvm-project/commit/879db2f9478f454f8dcf961b660a9078b73bf1b5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.err.ll
Log Message:
-----------
[AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (#210971)
Commit: 35d69e3fe344e063174f54a9785a08249ba18cd9
https://github.com/llvm/llvm-project/commit/35d69e3fe344e063174f54a9785a08249ba18cd9
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/LazyBranchProbabilityInfo.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/LazyBranchProbabilityInfo.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/OptimizationRemarkEmitter.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/test/Analysis/BranchProbabilityInfo/loop.ll
M llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/annotate-tablejump.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pr38795.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/Transforms/Inline/cgscc-incremental-invalidate.ll
M llvm/test/Transforms/PGOProfile/Inputs/irreducible.proftext
M llvm/test/Transforms/PGOProfile/Inputs/irreducible_entry.proftext
M llvm/unittests/Analysis/BlockFrequencyInfoTest.cpp
M llvm/unittests/Analysis/BranchProbabilityInfoTest.cpp
M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
M llvm/unittests/Transforms/IPO/FunctionSpecializationTest.cpp
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
M llvm/unittests/Transforms/Utils/SizeOptsTest.cpp
Log Message:
-----------
[Analysis] Use CycleInfo for BranchProbabilityInfo (#210301)
Instead of computing a cycle info (SccInfo) internally in
BranchProbabilityInfo, use CycleInfo and remove the use of LoopInfo.
After recent improvements to CycleInfo, the extra analysis is cheaper
than computing the same information internally.
Replacing LoopInfo with CycleInfo has some impliciation that the
loop/cycle forest can differ if the header of an irreducible loop (which
is ignored by loop info) also happens to be the header of a different
natural loop. (Simple example: S -> A, B; A -> A, B; B -> A, B --
LoopInfo will find {{A}, {B}}; CycleInfo will find {A, {B}}].) In these
cases, the default weights will differ.
This change also makes the handling of entering/exiting edges
consistent between reducible and irreducible loops, therefore,
there are also minor changes for reducible CFGs.
Commit: c2fac16a870fd77772b05ca11f7aa1f4e5a4d595
https://github.com/llvm/llvm-project/commit/c2fac16a870fd77772b05ca11f7aa1f4e5a4d595
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/TargetInfo.cpp
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Function.h
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/is_fpclass.ll
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-fmuladd.ll
M llvm/test/Transforms/EarlyCSE/replace-calls-def-attrs.ll
M llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fdim.ll
M llvm/test/Transforms/InstSimplify/disable_folding.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad.ll
M llvm/unittests/IR/VerifierTest.cpp
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
Revert "[IR] Make semantics of strictfp consistent" (#211057)
Reverts llvm/llvm-project#209465
Causes verifier issues:
https://github.com/llvm/llvm-project/pull/209465#issuecomment-5025559698
Commit: 48883c5aa6428ea91cf22417a519e6302e88a529
https://github.com/llvm/llvm-project/commit/48883c5aa6428ea91cf22417a519e6302e88a529
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/test/MC/WebAssembly/atomics-orderings.s
Log Message:
-----------
[WebAssembly] Swap encoding bits for HAS_MEMORY_ORDER for relaxed atomics (#210854)
Following the decision in
https://github.com/WebAssembly/relaxed-atomics/issues/3
Commit: 15de5a2c4c14070d0c42ab0ca436ce4e192a9baf
https://github.com/llvm/llvm-project/commit/15de5a2c4c14070d0c42ab0ca436ce4e192a9baf
Author: Brad Smith <brad at comstyle.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
Log Message:
-----------
[Driver] Remove SUSE SLES special casing for hash-style (#210223)
Commit: d81e22df458858e0ab1fdd56710d1d12251674b0
https://github.com/llvm/llvm-project/commit/d81e22df458858e0ab1fdd56710d1d12251674b0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
Log Message:
-----------
[SLP][NFC]Add extra tests for blended loads vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211080
Commit: 0aa8e45b04e548e34d7e6b1262cf7fec53678061
https://github.com/llvm/llvm-project/commit/0aa8e45b04e548e34d7e6b1262cf7fec53678061
Author: adams381 <adams at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/test/CIR/CodeGen/array.cpp
A clang/test/CIR/CodeGen/bitint-memory.c
A clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
M clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/Lowering/global-var-simple.cpp
Log Message:
-----------
[CIR] Lower _BitInt to its in-memory storage integer (#206606)
ClangIR keeps a `_BitInt(N)` at its literal width, but in memory it has
to live in a wider padded integer, the same way `bool` is `i1` as a
value and `i8` in memory. Because CIRGen emitted the constant at its
exact width, the storage padding was left undefined: a `signed
_BitInt(6) = -1` wrote `0x3f` where classic CodeGen and GCC write
`0xff`. @andykaylor pointed this out on
[#205605](https://github.com/llvm/llvm-project/pull/205605).
The fix widens `_BitInt` to its storage integer `iM` and
sign/zero-extends by signedness during lowering to the LLVM dialect, the
same place `bool` becomes `i8` (`convertTypeForMemory` and the
to/from-memory helpers). CIRGen keeps the literal `!cir.int<N, bitint>`
unchanged.
The byte-array storage form for wide "split" widths, where the storage
integer's alloc size exceeds its store size (e.g. `_BitInt(129)` to
`i192`, 32 vs 24 bytes), is not implemented. The global, alloca, load,
and store lowerings report an NYI error and the aggregate type
converters fail the conversion, rather than emit a wrong-sized integer.
Atomic read-modify-write on a padded `_BitInt` and vector-of-`_BitInt`
are also unimplemented.
The storage width comes from `IntType::getABIAlignment`, which assumes a
fixed 64-bit maximum alignment (x86-64). It is verified byte-for-byte on
x86-64; on targets with a larger maximum (e.g. AArch64) any width that
would be mis-sized instead hits the split-storage NYI. On a target whose
`_BitInt` maximum alignment is below 64 bits (e.g. a 32-bit target) the
storage can be mis-sized. Making the computation target-aware needs the
target's `getBitIntAlign`, which is not in the data layout, and is left
as a follow-up.
The approach follows the RFC [Widen bool / _BitInt / ext-vector-bool to
their in-memory types in
lowering](https://discourse.llvm.org/t/rfc-clangir-widen-bool-bitint-ext-vector-bool-to-their-in-memory-types-in-lowering/91160).
It supersedes
[#205605](https://github.com/llvm/llvm-project/pull/205605), which
emitted the constant at its literal width.
Commit: 49d568a8d60d5912a5a7d8b2c3ac1caf58dab3e6
https://github.com/llvm/llvm-project/commit/49d568a8d60d5912a5a7d8b2c3ac1caf58dab3e6
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M cross-project-tests/dtlto/remote-options.test
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/test/ThinLTO/X86/dtlto/json.ll
Log Message:
-----------
[DTLTO] Forward loop interchange to DTLTO remote compilations (#208591)
Recent upstream LLVM changes enabled `LoopInterchangePass` by default
through `PipelineTuningOptions`. TLTO observes that state directly from
the LTO config, but DTLTO was not forwarding the equivalent Clang option
to the remote compiler. As a result, TLTO could run loop interchange
pass while DTLTO did not, producing codegen differences for
configurations that exposed profitable/legally interchangeable loops.
Note that this was a pre-existing issue, the change in default has
simply exposed it.
Forward `C.PTO.LoopInterchange` as `-floop-interchange` when
constructing the common DTLTO remote compiler options. Extend the
testing to check that the SN-DBS remote command line includes the
forwarded option.
The code for forwarding such options is only intended as a temporary
measure. A more comprehensive solution is in discussion here:
https://discourse.llvm.org/t/synchronizing-lto-code-generation-configuration-between-clang-and-lld-dtlto
Commit: b35c1aab487dd89537114612c5a1ed3dd0a3ce11
https://github.com/llvm/llvm-project/commit/b35c1aab487dd89537114612c5a1ed3dd0a3ce11
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/test/Sema/aarch64-sve-vector-exp-ops.c
M clang/test/Sema/aarch64-sve-vector-log-ops.c
M clang/test/Sema/aarch64-sve-vector-pow-ops.c
M clang/test/Sema/aarch64-sve-vector-trig-ops.c
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/Sema/riscv-rvv-vector-exp-ops.c
M clang/test/Sema/riscv-rvv-vector-log-ops.c
M clang/test/Sema/riscv-rvv-vector-trig-ops.c
M clang/test/Sema/riscv-sve-vector-pow-ops.c
M clang/test/SemaHLSL/BuiltIns/atan2-errors_mat.hlsl
M clang/test/SemaHLSL/BuiltIns/ddx-coarse-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddx-fine-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddy-coarse-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddy-fine-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/degrees-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/exp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/frac-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors2.hlsl
M clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/isnan-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/normalize-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/radians-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rcp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/round-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
M clang/test/SemaSPIRV/BuiltIns/ddx-errors.c
M clang/test/SemaSPIRV/BuiltIns/ddy-errors.c
M clang/test/SemaSPIRV/BuiltIns/faceforward-errors.c
M clang/test/SemaSPIRV/BuiltIns/fwidth-errors.c
M clang/test/SemaSPIRV/BuiltIns/smoothstep-errors.c
Log Message:
-----------
Revert "[clang] Update diagnostics to include matrices as accepted types" (#211070)
Reverts llvm/llvm-project#201237. The PR did not update the test
assertions for `Sema/builtins-elementwise-math.c`
https://github.com/llvm/llvm-project/pull/201237#issuecomment-5037239584
Commit: 18220e793fbda204b66c08989cde11ad4583f26c
https://github.com/llvm/llvm-project/commit/18220e793fbda204b66c08989cde11ad4583f26c
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/CSKY/CSKYInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/frameindex.td
Log Message:
-----------
[SelectionDAG][GlobalISel] Move `to_tframeindex` & `renderFrameIndex` from targets into common code. (#210896)
Consolidates the multiple copies across the targets of the
`to_tframeindex` `SDNodeXForm` (frame index => target frame index) and
its GISel counterpart/equiv `renderFrameIndex`, moving them into
appropriate common areas.
As suggested/requested in
https://github.com/llvm/llvm-project/pull/206885#discussion_r3504014131
Commit: 0ee0b9701bc1486d084014185f674321e714c079
https://github.com/llvm/llvm-project/commit/0ee0b9701bc1486d084014185f674321e714c079
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCDeclareGPUModuleInsertion.cpp
M mlir/test/Dialect/OpenACC/acc-declare-gpu-module-insertion.mlir
Log Message:
-----------
[mlir][openacc] Support already existing global in GPU module (#210806)
Commit: 3f928aec54e28dd470a3f0fbbe2ebafb73691dcc
https://github.com/llvm/llvm-project/commit/3f928aec54e28dd470a3f0fbbe2ebafb73691dcc
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/X86/rgb_phi.ll
Log Message:
-----------
[SLP]Make the instruction-count check loop-aware
Raw getNum{Scalar,Vector}Insts() counted one-time, LICM-hoisted
broadcasts/buildvectors against the loop body, rejecting profitable loop
trees (508.namd_r). Weight each entry by its loop-nest trip
count and drop nest-invariant ones; flat code is unchanged (scale 1).
Fixes #207572
Reviewers: bababuck, RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/210074
Commit: 1f1fcb9518cbe324d2af2aca51e32c93b324690f
https://github.com/llvm/llvm-project/commit/1f1fcb9518cbe324d2af2aca51e32c93b324690f
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
Log Message:
-----------
[Analysis][NFC] Remove LoopBlock in BranchProbabilityInfo (#211083)
After removing SccInfo, this data structure is largely pointless.
Commit: 4bf0d282b9afd8f1a46a5bb0403c8363eca3deb4
https://github.com/llvm/llvm-project/commit/4bf0d282b9afd8f1a46a5bb0403c8363eca3deb4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
Log Message:
-----------
[OpenACC/CIR] Remove std::transform_inclusive_scan use (#211076)
This seemingly is only added for GCC libstdcxx 11.1's C++17 support, but
our support matrix is 7.4. Replace it with a loop that implements the
same requirement.
Commit: 5009f54dd420f3c9df3f7e54022fc2234e2f0ebe
https://github.com/llvm/llvm-project/commit/5009f54dd420f3c9df3f7e54022fc2234e2f0ebe
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
A flang/test/Lower/OpenMP/collapse-labeled-do-host-eval.f90
A flang/test/Lower/OpenMP/collapse-loop-transform.f90
A flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
A flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
Log Message:
-----------
[flang][OpenMP] Reland implement collapse for imperfectly nested loops (#211000)
Reland of combined #208528 and #210753.
Fixes #199092 - Flang previously rejected intervening code between
associated loops in a collapsed nest (e.g. collapse(2) with statements
between the outer and inner DO). This patch removes that restriction and
implements correct lowering.
Commit: 12e1c7f70f34d59c023d05d0fe2c228a4e9aac11
https://github.com/llvm/llvm-project/commit/12e1c7f70f34d59c023d05d0fe2c228a4e9aac11
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
[PAC][libc++] Fix build with `ptrauth_calls` feature (#211033)
After partial revert of #208330 in #209928, the libcxx build started
failing because of missing `<cstdint>` include required for `uintptr_t`
declaration used only by code behind `ptrauth_calls` feature check. See
https://lab.llvm.org/buildbot/#/builders/227/builds/3358
This patch adds the missing include.
Commit: c7e1531885e787e909ee06e1b625ae04197350bf
https://github.com/llvm/llvm-project/commit/c7e1531885e787e909ee06e1b625ae04197350bf
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
A clang/test/CodeGenHLSL/semantics/flat-decoration.ps.hlsl
A llvm/test/CodeGen/SPIRV/semantics/flat.ps.ll
Log Message:
-----------
[HLSL][SPIRV] Support Flat and Location decorators in the frontend (#210116)
fixes #194293
fixes #194432
In HLSL we need both Location and and Flat must be emitted as a single
`spirv.Decorations` node.
Also we need to apply Flat decoration to pixe/fragment shades with
inputs of integer or double because only 32 bit floats can be
interpolated.
Assisted with Claude Opus 4.8 via Copilot
Commit: bf42992272b66002ffe2a814c916a6b74e477ada
https://github.com/llvm/llvm-project/commit/bf42992272b66002ffe2a814c916a6b74e477ada
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/X86/rgb_phi.ll
Log Message:
-----------
Revert "[SLP]Make the instruction-count check loop-aware"
This reverts commit 3f928aec54e28dd470a3f0fbbe2ebafb73691dcc to fix
buildbots https://lab.llvm.org/buildbot/#/builders/11/builds/44691
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211091
Commit: 16e009f63499bb3c8e62388521593dc11f17c8f9
https://github.com/llvm/llvm-project/commit/16e009f63499bb3c8e62388521593dc11f17c8f9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
Log Message:
-----------
[ConstraintElim] Derive signed facts for post-increment inductions. (#210079)
Extend logic added in https://github.com/llvm/llvm-project/pull/209199
to also derive signed facts.
To do so, we keep track of whether LowerBound = Start + Step overflows
signed/unsigned. Code that previously bailed out if we were handling a
post-increment induction has been updated to use the computed
LowerBound, if it does not signed-wrap.
Alive2 Proof: https://alive2.llvm.org/ce/z/frskVt
PR: https://github.com/llvm/llvm-project/pull/210079
Commit: e328d6e08979f163da46f2a12bf74d632b95f168
https://github.com/llvm/llvm-project/commit/e328d6e08979f163da46f2a12bf74d632b95f168
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
Log Message:
-----------
[libc++] Use github-script instead of pygithub for benchmark jobs, and report failure (#211074)
Switch GitHub API interactions to use actions/github-script instead of
pygithub, as is done in other Github workflows in the repository. This
is simpler and it also resolves the issue that if setting up the Python
virtual environment fails, there's no way to communicate the issue back
since doing so would require pygithub.
As a drive-by, also report the failure when a step in the libc++ PR
benchmark job fails, instead of leaving a "Running benchmarks in ..."
comment indefinitely.
Assisted by Claude
Fixes #210985
Commit: 5b6ebc25e08c35d30edbe6aa7b64d06c46686b18
https://github.com/llvm/llvm-project/commit/5b6ebc25e08c35d30edbe6aa7b64d06c46686b18
Author: nvptm <pmathew at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
Log Message:
-----------
[flang][cuda][openacc] Support CUDA calls to ACC routines (#210165)
Enable CUDA device procedures to call !$acc routine procedures.
- Treat ACC routines as device-callable during CUDA semantic checking.
- Apply implicit-device dummy argument handling to ACC routines called
from CUDA device code.
- Defer CUDA cloning of ACC routines until ACC lowering materializes and
moves the specialized routine into the GPU module.
- Add a CUF device-function transform regression test.
Commit: 5df4aa19aa1e6308509356db19b5e46884d47361
https://github.com/llvm/llvm-project/commit/5df4aa19aa1e6308509356db19b5e46884d47361
Author: nvptm <pmathew at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A flang/test/Fir/OpenACC/acc-declare-gpu-module-insertion.fir
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCDeclareGPUModuleInsertion.cpp
Log Message:
-----------
[flang][acc] Emit unified declare globals as extern. (#210757)
Emit external device symbols for OpenACC declare create and copyin
globals in -gpu=mem:unified; preserve device definitions for
device_resident globals.
Commit: 5697319382fb2ea2f5a15883304edc643ead8fcd
https://github.com/llvm/llvm-project/commit/5697319382fb2ea2f5a15883304edc643ead8fcd
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/switch-loop-header.mir
M llvm/test/CodeGen/NVPTX/switch.ll
Log Message:
-----------
[NVPTX] Simplify BRX emission avoiding pseduo-instruction chain (#209952)
This is much more idiomatic and simpler as well and avoids a series of
instructions which would cause syntax errors if somehow something were
scheduled between them.
Commit: e8b684a64aa5176a1da5ff18c712343af695e456
https://github.com/llvm/llvm-project/commit/e8b684a64aa5176a1da5ff18c712343af695e456
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/X86/rgb_phi.ll
Log Message:
-----------
[SLP]Make the instruction-count check loop-aware
Raw getNum{Scalar,Vector}Insts() counted one-time, LICM-hoisted
broadcasts/buildvectors against the loop body, rejecting profitable loop
trees (508.namd_r). Weight each entry by its loop-nest trip
count and drop nest-invariant ones; flat code is unchanged (scale 1).
Fixes #207572
Original Pull Request: https://github.com/llvm/llvm-project/pull/210074
Recommit after revert in bf42992272b66002ffe2a814c916a6b74e477ada
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211096
Commit: f1685cb3d97ca73e88e9435a5700bc9f6f47f2fb
https://github.com/llvm/llvm-project/commit/f1685cb3d97ca73e88e9435a5700bc9f6f47f2fb
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
workflows/issue-release-workflow: Allow multiple URLs in /cherry-pick commands. (#211050)
f0ae26c9 allowed specifying multiple commits to /cherry-pick, but that
only works for plain commit hashes; it doesn't work for the URL form.
Adjust the regex to allow multiple URLs.
Commit: 8dc94a5d51bff16c61dd6596a6f25dbf93bc545f
https://github.com/llvm/llvm-project/commit/8dc94a5d51bff16c61dd6596a6f25dbf93bc545f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbw-builtins.c
Log Message:
-----------
[CIR] Fix avx512vlbw builtin test run lines (#211063)
The avx512vlbw-builtins.c test was using the now-nonexistant avx10.1-512
target feature in several of its run lines. Because the feature no
longer exists with that spelling it was being silently ignored.
Apparently it isn't needed for the test upstream because the test has
been passing, but I received reports from a downstream user that the
test was failing for them.
There was a recent change to more strictly enforce always-inlining if
target features didn't match. I suspect that this downstream project has
a different version of some intrinsic header files so that it requires
"avx10.1" (the correct spelling of the feature).
This change updates the test run lines to use the correct feature
spelling.
Commit: ded4902fe10242e4581860f92056719fa4591b2c
https://github.com/llvm/llvm-project/commit/ded4902fe10242e4581860f92056719fa4591b2c
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
R llvm/test/tools/dsymutil/AArch64/pseudo-probe.test
M llvm/tools/dsymutil/MachOUtils.cpp
Log Message:
-----------
Revert "[dsymutil] Add support for pseudo probes (#186877)" (#206789)
This reverts commit bc3386c1b9a5bff82ce4baaf4254fc4268f69ff4.
Let's back this out in favor of emitting pseudoprobe data in favor of
emitting in the `__LLVM` segment, and let `dsymutil` collect the debug
map objects and merge them into the final sections.
Commit: 009e841dbde021aa59bd7357269aeabfcc4f6128
https://github.com/llvm/llvm-project/commit/009e841dbde021aa59bd7357269aeabfcc4f6128
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor.f90
Log Message:
-----------
[flang][cuda] Add option for allocator registration function to CUFAddConstructor (#211098)
This allows to register different allocators when needed.
Commit: db816fe2ed4e0be51192d3030d90a176d5fec9d5
https://github.com/llvm/llvm-project/commit/db816fe2ed4e0be51192d3030d90a176d5fec9d5
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/dxc_debug.hlsl
M clang/test/Driver/dxc_section_emission.hlsl
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXContainerPDB.cpp
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate-no-fd.test
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate-no-flag.test
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate-no-pdbname.ll
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate.ll
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate.test
M llvm/unittests/MC/CMakeLists.txt
A llvm/unittests/MC/DXContainerWriterTest.cpp
Log Message:
-----------
[DirectX][Driver] Add /Qpdb_in_private flag support (#204903)
In DXC, when `/Qpdb_in_private` flag is specified, debug info PDB is
emitted into PRIV part of the output DXContainer (as well as into
separate PDB file, if its name is specified with `/Fd`).
This patch reimplements similar behavior in llc and Clang.
MC is modified to be able to emit PRIV part.
Depends on https://github.com/llvm/llvm-project/pull/204166.
Commit: 9a729e7fbbb6e1327e6af2148f0c941401b44cbf
https://github.com/llvm/llvm-project/commit/9a729e7fbbb6e1327e6af2148f0c941401b44cbf
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes db816fe (#211109)
This fixes db816fe2ed4e0be51192d3030d90a176d5fec9d5.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=db816fe2ed4e0be51192d3030d90a176d5fec9d5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 3421dc247e4d6e87c6ab9b5db44c11873c28814f
https://github.com/llvm/llvm-project/commit/3421dc247e4d6e87c6ab9b5db44c11873c28814f
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.h
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFUnwindTable.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/test/CodeGen/MIR/AArch64/cfi.mir
M llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir
A llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
A llvm/test/MC/AArch64/cfi_set_ra_state.s
M llvm/test/MC/AArch64/directives-case_insensitive.s
M llvm/unittests/DebugInfo/DWARF/DWARFDebugFrameTest.cpp
Log Message:
-----------
[MC][AArch64] Add .cfi_set_ra_state for PAuth_LR (#209949)
The new CFI directive directly assigns an RA signing state to the RA_SIGN_STATE DWARF pseudo-register for use when unwinding, to indicate whether the value of PC has been used as a diversifier for return address signing. The new directive subsumes and replaces .cfi_negate_ra_state_with_pc, which was found to be unsuitable for descibing some block layouts [1], particularly in hot-cold-split functions.
1: https://github.com/ARM-software/abi-aa/pull/346
Commit: 866832a59612e569c8d18bc8e846cc32e9a5730b
https://github.com/llvm/llvm-project/commit/866832a59612e569c8d18bc8e846cc32e9a5730b
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
Log Message:
-----------
[SPIRV] Fix legalization of widened cbuffer vector loads (#209912)
fixes #191070
In the SPIR-V backend an optimization has widened a narrow cbuffer load
into a wider vector load that reads trailing padding (e.g. a <1 x float>
float1x4 column loaded as <4 x float>). loadVectorFromVector only
handled down-casts and asserts when the target has more elements than
the source.
We need to handle the widening case by loading the available lanes and
inserting them into a poison target vector, leaving the padding lanes as
poison.
Assisted by Claude Opus 4.8
Commit: e55d3bca36ff8a23ef598f6f452ec1e3f399dc31
https://github.com/llvm/llvm-project/commit/e55d3bca36ff8a23ef598f6f452ec1e3f399dc31
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/test/Transforms/SampleProfile/pseudo-probe-emit-macho.ll
Log Message:
-----------
[MC] Emit Mach-O pseudo-probe sections in the __LLVM segment (#206793)
Let's back this out in favor of emitting pseudoprobe data in favor of
emitting in the __LLVM segment, and let dsymutil collect the debug map
objects and merge them into the final sections.
This is to prevent older ld toolchains that don't ignore the new
`__PSEUDO_PROBE` segments from accidentally leaking the probe metadata
into the final image.
Commit: c3373183d2fbb2184c249f93549c300104c994e0
https://github.com/llvm/llvm-project/commit/c3373183d2fbb2184c249f93549c300104c994e0
Author: Alex Strelnikov <strel at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libc/fuzzing/stdio/CMakeLists.txt
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/src/__support/CMakeLists.txt
A libc/src/__support/printf_core/CMakeLists.txt
A libc/src/__support/printf_core/char_converter.h
A libc/src/__support/printf_core/converter.h
A libc/src/__support/printf_core/converter_atlas.h
A libc/src/__support/printf_core/converter_utils.h
A libc/src/__support/printf_core/core_structs.h
A libc/src/__support/printf_core/error_mapper.h
A libc/src/__support/printf_core/fixed_converter.h
A libc/src/__support/printf_core/float_dec_converter.h
A libc/src/__support/printf_core/float_dec_converter_limited.h
A libc/src/__support/printf_core/float_hex_converter.h
A libc/src/__support/printf_core/float_impl.cpp
A libc/src/__support/printf_core/float_inf_nan_converter.h
A libc/src/__support/printf_core/generic/CMakeLists.txt
A libc/src/__support/printf_core/generic/error_mapper.h
A libc/src/__support/printf_core/int_converter.h
A libc/src/__support/printf_core/linux/CMakeLists.txt
A libc/src/__support/printf_core/linux/error_mapper.h
A libc/src/__support/printf_core/parser.h
A libc/src/__support/printf_core/printf_config.h
A libc/src/__support/printf_core/printf_main.h
A libc/src/__support/printf_core/ptr_converter.h
A libc/src/__support/printf_core/strerror_converter.h
A libc/src/__support/printf_core/string_converter.h
A libc/src/__support/printf_core/vasprintf_internal.h
A libc/src/__support/printf_core/vfprintf_internal.h
A libc/src/__support/printf_core/write_int_converter.h
A libc/src/__support/printf_core/write_modes.def
A libc/src/__support/printf_core/writer.h
M libc/src/err/CMakeLists.txt
M libc/src/err/report.cpp
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/asprintf.cpp
M libc/src/stdio/asprintf_modular.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/vfprintf_internal.h
M libc/src/stdio/generic/CMakeLists.txt
M libc/src/stdio/generic/fprintf.cpp
M libc/src/stdio/generic/printf.cpp
M libc/src/stdio/generic/vfprintf.cpp
M libc/src/stdio/generic/vprintf.cpp
R libc/src/stdio/printf_core/CMakeLists.txt
R libc/src/stdio/printf_core/char_converter.h
R libc/src/stdio/printf_core/converter.h
R libc/src/stdio/printf_core/converter_atlas.h
R libc/src/stdio/printf_core/converter_utils.h
R libc/src/stdio/printf_core/core_structs.h
R libc/src/stdio/printf_core/error_mapper.h
R libc/src/stdio/printf_core/fixed_converter.h
R libc/src/stdio/printf_core/float_dec_converter.h
R libc/src/stdio/printf_core/float_dec_converter_limited.h
R libc/src/stdio/printf_core/float_hex_converter.h
R libc/src/stdio/printf_core/float_impl.cpp
R libc/src/stdio/printf_core/float_inf_nan_converter.h
R libc/src/stdio/printf_core/generic/CMakeLists.txt
R libc/src/stdio/printf_core/generic/error_mapper.h
R libc/src/stdio/printf_core/int_converter.h
R libc/src/stdio/printf_core/linux/CMakeLists.txt
R libc/src/stdio/printf_core/linux/error_mapper.h
R libc/src/stdio/printf_core/parser.h
R libc/src/stdio/printf_core/printf_config.h
R libc/src/stdio/printf_core/printf_main.h
R libc/src/stdio/printf_core/ptr_converter.h
R libc/src/stdio/printf_core/strerror_converter.h
R libc/src/stdio/printf_core/string_converter.h
R libc/src/stdio/printf_core/vasprintf_internal.h
R libc/src/stdio/printf_core/vfprintf_internal.h
R libc/src/stdio/printf_core/write_int_converter.h
R libc/src/stdio/printf_core/write_modes.def
R libc/src/stdio/printf_core/writer.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/snprintf_modular.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/sprintf_modular.cpp
M libc/src/stdio/vasprintf.cpp
M libc/src/stdio/vasprintf_modular.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsnprintf_modular.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdio/vsprintf_modular.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/time/CMakeLists.txt
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/composite_converter.h
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
M libc/src/time/strftime_core/strftime_main.h
M libc/src/time/strftime_l.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/shared/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/printf_core/CMakeLists.txt
A libc/test/src/__support/printf_core/converter_test.cpp
A libc/test/src/__support/printf_core/parser_test.cpp
A libc/test/src/__support/printf_core/writer_test.cpp
M libc/test/src/stdio/CMakeLists.txt
R libc/test/src/stdio/printf_core/CMakeLists.txt
R libc/test/src/stdio/printf_core/converter_test.cpp
R libc/test/src/stdio/printf_core/parser_test.cpp
R libc/test/src/stdio/printf_core/writer_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
Log Message:
-----------
[libc] Migrate printf_core from stdio/ to __support/. (#208303)
The code will be updated and used for wide character printf functions
implemented in wchar/, so __support/ is a more consistent shared
location.
Assisted-by: Automated tooling, human reviewed.
Commit: 96b100337b5b61e84ee07f6ae9168d3b502e574e
https://github.com/llvm/llvm-project/commit/96b100337b5b61e84ee07f6ae9168d3b502e574e
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Reland "[Fuchsia] Stack analysis flags for runtimes" (#211072)
Reverts llvm/llvm-project#192515
We have addressed the CFI related workflow by introducing a new
MD_callgraph and by disambiguating it from MD_type used for CFI.
Commit: 5503126b61dc0524da8cf4f20ba05f82685a960c
https://github.com/llvm/llvm-project/commit/5503126b61dc0524da8cf4f20ba05f82685a960c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.h
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.td
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/Transforms/flatten-loop-cleanup.cir
Log Message:
-----------
[CIR] Flatten loop ops with a cleanup region (#210472)
This change adds support for CFG flattening of loop operations with
cleanup regions.
Rather than re-invent the entire branch through cleanup mechanism, I am
first rewriting the loop by sinking the condition into the body (as a
test + break-if-false) and hoisting the step into the body, and
surrounding the entire body with a cir.cleanup.scope op. Then the greedy
flattening algorithm runs the newly formed loop through the existing
flattening mechanisms so that the loop cleanup handling ends up being
done by the same code that flattens other cleanup scopes.
Assisted-by: Cursor / various models
Commit: 8bbaac66535c6b925dab34fb05f00505feac11d7
https://github.com/llvm/llvm-project/commit/8bbaac66535c6b925dab34fb05f00505feac11d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
TargetParser: Add Triple::getDefaultFloatABI (#210899)
In order to eliminate TargetOptions ABI fields the front and
middle end need to know what value the backend is going to choose
for the ABI properties. This is similar to how we have
getDefaultExceptionHandling and getDefaultWCharSize.
The clang driver seems to have a different notion of which targets
are default soft. This followed ARMTargetMachine as the authority.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8775feb5da4de07689b125702265321048ee13d7
https://github.com/llvm/llvm-project/commit/8775feb5da4de07689b125702265321048ee13d7
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[clang] Drop stale `*-buildattr` module flag emission (#211021)
Module flags `sign-return-address-buildattr` and
`tag-stack-memory-buildattr` are never exercised elsewhere by existing
tests or code across the whole LLVM source tree, and there are no known
cases of them being used.
Moreover, the `sign-return-address-buildattr` flag emission was gated by
`ptrauth` target feature which does not actually exist: see
`AArch64TargetInfo::computeFeatureLookup()` and
`ARMTargetInfo::hasFeature(StringRef Feature)`. So, it was never
emitted.
This patch removes code responsible for these stale module flags
emission.
Note: the flags was previously introduced in
https://reviews.llvm.org/D112421
Commit: db4d75e13ddc64cfb3a2f3620b622b8c4376812d
https://github.com/llvm/llvm-project/commit/db4d75e13ddc64cfb3a2f3620b622b8c4376812d
Author: Alexey Gerenkov <alexey at espressif.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
A llvm/test/CodeGen/Xtensa/fp16.ll
Log Message:
-----------
[Xtensa] Add fp16 conversion support (#208206)
Close https://github.com/llvm/llvm-project/issues/207505
Commit: aace063fda01504608e4c818a3694f8108da36cf
https://github.com/llvm/llvm-project/commit/aace063fda01504608e4c818a3694f8108da36cf
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
A llvm/lib/Target/SPIRV/SPIRVFinalizeShaderLinkage.cpp
A llvm/lib/Target/SPIRV/SPIRVFinalizeShaderLinkage.h
M llvm/lib/Target/SPIRV/SPIRVPassRegistry.def
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/test/CodeGen/SPIRV/finalize-shader-linkage.ll
Log Message:
-----------
[SPIR-V] Erase dead functions in shader modules (#209672)
The LLVM offload test suite is current failing layout keyword
orientation tests. While initially appearing to be a layout problem in
the SPIR-V legalizer caused by matrix vector sizes exceeding 4, the root
cause is actually persistent dead function definitions in the SPIR-V
backend.
This behavior is standard for OpenCL, which relies on a linker to clean
up unused definitions; however, since shaders lack a linker and require
full inlining, we must handle this in a special shader only pass.
This change adds SPIRVFinalizeShaderLinkage (a shader-only analogue of
DXILFinalizeLinkage): internalize non-entry, non-exported helpers and
erase the dead ones. Globals are left alone since unreferenced externals
become interface OpVariables.
Fixes #201712
Assisted with Claude Opus 4.8
Commit: 9cfbe4a4efb0cebf7c8f9d4fca3e864fc0ac86ed
https://github.com/llvm/llvm-project/commit/9cfbe4a4efb0cebf7c8f9d4fca3e864fc0ac86ed
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
Log Message:
-----------
[llvm-reduce] Run AssignGUIDPass when loading BC
Otherwise we run into crashes when loading BC that has a module summary. This is a no-op if we load existing GUIDs, so probably makes sense to run regardless.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/208965
Commit: 24586dad1e0b035ced84ef934a310b620fd5fd7f
https://github.com/llvm/llvm-project/commit/24586dad1e0b035ced84ef934a310b620fd5fd7f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/llvm-reduce/llvm-reduce.cpp
Log Message:
-----------
[llvm-reduce] Unconditionally initialize targets
It is not expensive to do, and doing it unconditionally avoids edge
cases like the one in the added test case.
Reviewers: arsenm, mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/208966
Commit: fcbf28ffc812cfba9db0899256aa8757815dfcf9
https://github.com/llvm/llvm-project/commit/fcbf28ffc812cfba9db0899256aa8757815dfcf9
Author: adams381 <adams at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
A clang/test/CIR/CodeGen/trivial-union-assign-nyi.cpp
Log Message:
-----------
[CIR] Report NYI for defaulted union copy/move assignment
A defaulted union copy or move assignment operator has an empty synthesized
body because Sema skips union fields, leaving no AST expression for the
implied whole-object copy. CIRGen emitted that empty body and silently
dropped the assignment.
Report NYI for defaulted union assignment instead. Struct and array
assignments are unaffected because their synthesized bodies contain the
memberwise copies needed by the existing body-emission path.
Commit: 4fff13bfb9648a2e1c34cded0065b493de9cec1b
https://github.com/llvm/llvm-project/commit/4fff13bfb9648a2e1c34cded0065b493de9cec1b
Author: adams381 <adams at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-empty-record.cir
Log Message:
-----------
[CIR] Classify empty records as Ignore in x86_64 callconv (#211078)
The x86_64 aggregate calling-convention bridge rejects a zero-field
record as NYI, even though the SysV classifier already treats an empty
record as NoClass/NoClass (so it returns Ignore) and the rewriter
already drops arguments and returns classified Ignore.
Dropping the zero-field reject in `isSupportedType` lets a C empty
struct classify as Ignore: the argument slot is removed, the remaining
arguments shift down, and an empty-record return lowers to void.
The C++ empty class stays NYI. CIRGen lays it out as a single padded
byte, which the padded reject still catches. Unions, packed, and
all-float aggregates remain NYI as before.
---------
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: 3782c00acdde18c0fb1a0946a26898dc2e7b3141
https://github.com/llvm/llvm-project/commit/3782c00acdde18c0fb1a0946a26898dc2e7b3141
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[clang-sycl-linker] Forward all --ocloc-options occurrences to ocloc (#211075)
getLastArgValue() only returned the final --ocloc-options= occurrence,
silently dropping earlier ones when the option is passed multiple
times (one token per occurrence). Use getAllArgValues() so every
occurrence is forwarded to ocloc.
Commit: aef1e4f249856ce1b9e8362fee75619f3fa8efcf
https://github.com/llvm/llvm-project/commit/aef1e4f249856ce1b9e8362fee75619f3fa8efcf
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/test/CodeGen/target-data.c
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[NVPTX] Support short entry param pointers (#206512)
Commit: b11881e5daa280d322127d4c51dcf472dbcc1dd5
https://github.com/llvm/llvm-project/commit/b11881e5daa280d322127d4c51dcf472dbcc1dd5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/test/CodeGen/AArch64/pr166870.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/PowerPC/bdzlr.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/PowerPC/pr45448.ll
M llvm/test/CodeGen/PowerPC/subreg-postra.ll
M llvm/test/CodeGen/Thumb2/thumb2-cbnz.ll
M llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
M llvm/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
M llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll
Log Message:
-----------
[BranchFolding] Fold away subsequent identical branches
If we have a BB that has a single conditional branch instruction it that
is identical to the previous block's branch instruction, we can delete
the BB as it is redundant.
This doesn't directly impact performance as such instructions are never
executed, but this can help decrease code size which can help with
overall icache pressure (though likely only slightly). The biggest
impact would probably be fitting more instructions into a single cache
line. This is probably almost a no-op with PLO but definitely doesn't
hurt.
Fixes #202763.
Reviewers: RKSimon, arsenm, krzysz00, topperc, lei137
Pull Request: https://github.com/llvm/llvm-project/pull/203110
Commit: 8b9cce358bef26ae4cb9275dd6a43f903bafbaa0
https://github.com/llvm/llvm-project/commit/8b9cce358bef26ae4cb9275dd6a43f903bafbaa0
Author: jimingham <jingham at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/include/lldb/Expression/ExpressionVariable.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Expression/ExpressionVariable.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionVariable.cpp
M lldb/source/Target/ABI.cpp
A lldb/test/API/functionalities/expr-result-var/Makefile
A lldb/test/API/functionalities/expr-result-var/TestCPPExprResult.py
A lldb/test/API/functionalities/expr-result-var/two-bases.cpp
Log Message:
-----------
Make result variables obey their dynamic values in subsequent expressions
This is a resubmit of the original patch: 6344e3aa8106dfdfb30cac36c8ca02bc4c52ce24:
Make result variables obey their dynamic values in subsequent
expressions (#168611)
When I originally submitted this, it caused intermittent flakey failures
on systems I didn't have access to, and I didn't have time to sort them
out, so I reverted the patch. I'm resubmitting this so I can run the
bots on it a few rounds to see if I can reproduce and diagnose those
intermittent failures.
Here's the commit log from the original submission describing the
change:
When you run an expression and the result has a dynamic type that is
different from the expression's static result type, we print the result
variable using the dynamic type, but at present when you use the result
variable in an expression later on, we only give you access to the
static type. For instance:
```
(lldb) expr MakeADerivedReportABase()
(Derived *) $0 = 0x00000001007e93e0
(lldb) expr $0->method_from_derived()
^
error: no member named 'method_from_derived' in 'Base'
(lldb)
```
The static return type of that function is `Base *`, but we printed that
the result was a `Derived *` and then only used the `Base *` part of it
in subsequent expressions. That's not very helpful, and forces you to
guess and then cast the result types to their dynamic type in order to
be able to access the full type you were returned, which is
inconvenient.
This patch makes lldb retain the dynamic type of the result variable
(and ditto for persistent result variables).
It also adds more testing of expression result variables with various
types of dynamic values, to ensure we can access both the ivars and
methods of the type we print the result as.
Commit: 3a2ea7f45682105d26334948d233d10e47675745
https://github.com/llvm/llvm-project/commit/3a2ea7f45682105d26334948d233d10e47675745
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
Log Message:
-----------
[lldb] Change DynamicLoaderDarwin::Segment::name type (#210797)
No need to be a ConstString, Mach-O segment names are always 16 bytes
long. Because this struct is shared for both segment_command and
segment_command_64, I opted to keep the definition instead of replacing
it with one of llvm's MachO structs.
I chose a 17-byte character array so that whatever goes into it can
always be treated as a null-terminated C string.
Commit: acb8fbe83ff12711317118b8c9831905d301b56a
https://github.com/llvm/llvm-project/commit/acb8fbe83ff12711317118b8c9831905d301b56a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
M llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
M llvm/unittests/DWARFLinkerParallel/CMakeLists.txt
A llvm/unittests/DWARFLinkerParallel/DIEInfoPlacementTest.cpp
Log Message:
-----------
[DWARFLinker] Fix placement lost-update crash in parallel marking (#211009)
Commit: 3f0919e8d986b829494fec58d8a8fc0ae043aae0
https://github.com/llvm/llvm-project/commit/3f0919e8d986b829494fec58d8a8fc0ae043aae0
Author: Thrrreeee <1379998393 at qq.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M bolt/lib/Core/Relocation.cpp
M bolt/test/RISCV/reloc-tls.s
Log Message:
-----------
[BOLT][RISCV] Support the TLS global-dynamic relocation (#209995)
This patch adds BOLT support for the RISC-V TLS global-dynamic
relocation `R_RISCV_TLS_GD_HI20`. Classifying it as both a **TLS
relocation** and a **GOT-style relocation** allows BOLT to preserve the
relocation, recover the actual GOT entry address from the linked
instructions, and symbolize the instruction pair.
The RISC-V TLS relocation test is extended to cover a global-dynamic
sequence and verify that BOLT reconstructs the `AUIPC`/`PCREL_LO12` pair
correctly.
Commit: afb68446b493597aec089746957dc36060925679
https://github.com/llvm/llvm-project/commit/afb68446b493597aec089746957dc36060925679
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/CIR/LowerToLLVM.h
M clang/include/clang/CIR/Passes.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
A clang/test/CIR/CodeGenOpenMP/target-host-op-filtering.c
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
R mlir/include/mlir/Dialect/OpenMP/OpenMPOffloadUtils.h
A mlir/include/mlir/Dialect/OpenMP/OpenMPUtils.h
Log Message:
-----------
[CIR][OpenMP] Add host op filtering pass to CIR pipeline (#209592)
This patch adds the host op filtering pass which prevents host code
being lowered when compiling for the target device.
Commit: 14bfc424ae77976e05582ff38896caec399f2837
https://github.com/llvm/llvm-project/commit/14bfc424ae77976e05582ff38896caec399f2837
Author: Prasoon Kumar <prasoonkumar054 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/lit/lit/main.py
M llvm/utils/lit/lit/run.py
Log Message:
-----------
Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (#209076)
We want lit's test-execution engine on concurrent.futures.ProcessPoolExecutor
instead of multiprocessing.Pool as it fixes two latent bugs in the old wait
loop and is groundwork for a planned ThreadPoolExecutor/asyncio backend. It
landed as #202681 but was reverted in #206138. The reverted code deadlocks
due to two independent CPython bugs.
submit() blocks holding _shutdown_lock once the executor's wakeup pipe
fills past 16,384 undrained writes, since its own manager thread needs
that same lock to drain it (cpython gh-105829). Separately, shutdown(wait=True)
deadlocks on macOS because join_executor_internals() joins the call queue
before the workers, the reverse of the order macOS needs.
Fix: bound outstanding futures to SUBMISSION_WINDOW_PER_WORKER * workers
and submit one new test per completion instead of all up front, so the
pipe can never fill (LIT_SUBMISSION_WINDOW=0 restores the old behavior for
debugging). cancel_join_thread() before shutdown(wait=True) fixes the
macOS ordering. Also reap SIGKILL'd workers after abort instead of
leaving zombies.
---------
Signed-off-by: Prasoon Kumar <prasoonkumar054 at gmail.com>
Commit: 373df745fbffc01b1f3469a12fcef03343f843f5
https://github.com/llvm/llvm-project/commit/373df745fbffc01b1f3469a12fcef03343f843f5
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (#210891)
Add a legalizer rule that marks these legal at `sXLen` under `+a`
(selecting `amomax.w/d`, and `amomax.b/h` for sub-word under `+zabha`
via the existing widen-scalar-while-preserving-the-memoperand path), and
handle the `llvm.riscv.masked.atomicrmw.{max,min,umax,umin}` intrinsics
the same way as `add/sub/xchg` so sub-word values without `+zabha` use
the LR/SC masking pseudos. There is no `__atomic_fetch_max/min` libcall,
so unlike `add/and/or/xor` the rule does not libcall the no-A case; that
case is already lowered by an IR-level compare-exchange loop and never
reaches GlobalISel, so the rule marks it unsupported to keep the rule
set well-defined.
Updates `legalizer-info-validation.mir` for the newly defined rules and
adds `atomicrmw-max-min-umax-umin.ll`.
Commit: 0cf295574bbef856646e8321e4e798128b84b73b
https://github.com/llvm/llvm-project/commit/0cf295574bbef856646e8321e4e798128b84b73b
Author: Chris Apple <cja-private at pm.me>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M compiler-rt/test/rtsan/halt_on_error.cpp
Log Message:
-----------
[compiler-rt][rtsan] Loosen requirements of halt_on_error test (#210734)
Some systems may call other intercepted functions during the course of a
`malloc`. This would result in some error stack such as:
```
ERROR malloc
ERROR pthread_mutex_lock
ERROR pthread_mutex_unlock
ERROR free
ERROR pthread_mutex_lock
ERROR pthread_mutex_unlock
```
We support this as RTSan, but this test would be overly specific on
those platforms. As written, this requires "only malloc, then free
immediately after". The change makes this "at least malloc is called,
and then later at least free is called". This still keeps the spirit of
the check the same but allows for more (valid) interpretation in
between.
NOTE:
In the future, we may want to consider doing something similar here:
https://github.com/llvm/llvm-project/blob/40c4fea67f49b841bd064624219efceab91b65e0/compiler-rt/test/rtsan/stack_suppressions.cpp#L65
This specifies ONLY 7 suppressions should happen here which is extremely
specific. However I did not change this because it's a little trickier.
We don't really have a test for this stack suppressions method anywhere
else. We could do something like "at least 7 things should be
suppressed", but it's messier so I left that for a future exercise.
Commit: 494a8482a0663cfb8eec515995666fea10aa175a
https://github.com/llvm/llvm-project/commit/494a8482a0663cfb8eec515995666fea10aa175a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
Log Message:
-----------
[gn build] Port acb8fbe83ff1 (#211156)
Commit: 3c8a9094811a2291d65473b290478c14d1e193ab
https://github.com/llvm/llvm-project/commit/3c8a9094811a2291d65473b290478c14d1e193ab
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/MC/BUILD.gn
Log Message:
-----------
[gn build] Port db816fe2ed4e (#211157)
Commit: 564b027db16dc14c2027cd5a2fbb8bf1d3877b85
https://github.com/llvm/llvm-project/commit/564b027db16dc14c2027cd5a2fbb8bf1d3877b85
Author: David Brittain <combinatorial at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOverload.cpp
A clang/test/Modules/gmf-internal-linkage-in-template.cppm
Log Message:
-----------
[clang][Modules] Keep current-TU global-module-fragment internal-linkage functions viable in overload resolution (#210825)
Fixes #210822
A `static` (or anonymous-namespace) function declared in the global
module fragment of the current TU is usable within the module unit
([module.global.frag]/p1), but `Sema::AddOverloadCandidate` dropped it
from the overload set when `Function->isInAnotherModuleUnit()` misfired
— which it does when the enclosing template is instantiated after the
GMF closes (pending instantiations run in
`ActOnEndOfTranslationUnitFragment`, before the named module is in
scope). The candidate was removed with the hidden
`ovl_fail_module_mismatched` kind, so the error had no candidate notes.
The existing carve-out (#104701) only exempted inline /
implicitly-instantiated GMF functions. This also exempts
internal-linkage functions from the current TU's GMF
(`isFromGlobalModule() && !isFromASTFile()`); genuinely imported
internal-linkage functions stay subject to the rule.
`clang/test/Modules` and `clang/test/CXX/module` show no new failures;
the `expose-static-inline-from-gmf-*` tests still pass. Adds a
regression test.
This change was developed with substantial assistance from an AI tool
(Claude Code). The AI carried out the investigation and root-cause
analysis, wrote the code change and the regression test, and drafted
this description.
Commit: 98fe06cb6487cf23d5a56bd5ff0c6b4e378d1be3
https://github.com/llvm/llvm-project/commit/98fe06cb6487cf23d5a56bd5ff0c6b4e378d1be3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Rename CallVia* utils to reflect destination. NFC. (#211150)
Rename Session::CallViaSession to Session::ControllerCaller, and test
utility CallViaMockControllerAccess to CallFromController.
The old names described who was routing the calls, but this is implicit
at the call-site anyway (CallViaSession was a method on Session, and
CallViaMockControllerAccess took a MockControllerAccess argument). The
new names reflect the call destination, which is the thing clients care
about.
Commit: 46858d55e80abb88037c57fd1134a526500f6732
https://github.com/llvm/llvm-project/commit/46858d55e80abb88037c57fd1134a526500f6732
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/test/X86/register-fragments-bolt-symbols.s
Log Message:
-----------
[BOLT] Implement platform independent distribution and shuffle algorithm (#206554)
std::uniform_int_distribution and std::shuffle are
implementation-defined, so binary built with libc++ and libstdc++ can
produce different fragment layouts when using SplitStrategy. In this
case, the FreeBSD build emits only one fragment instead of three.
The output geenrate by --bolt-seed should be deterministic for the same
binary regardless of the standard library implementation. Implement a
portable shuffle and uniform distribution to guarantee identical results
for a given seed.
After this change, we generate 1 fragment, which decrease the strength
of the testcase. As a result, we change the seed to different value to
allow it generate different number of fragments.
Also, replace in-place file modifcation with a write-and-replace
approach for better portability in sed.
Commit: e6190fab2e05e4ba8646af9cf32314fd75e6cccd
https://github.com/llvm/llvm-project/commit/e6190fab2e05e4ba8646af9cf32314fd75e6cccd
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/test/Driver/freebsd.c
A clang/test/Driver/hip-fpie-option-freebsd.hip
M flang/test/Driver/linker-options.f90
Log Message:
-----------
[clang] Switch to Default PIE on FreeBSD (#206139)
We have started to compile the binary in our base as PIE by defualt. It
makes sense to compile the binary to PIE by default in toolchain as
Linux now. Also, extended testcases to support default PIE and no-pie
parameter in freebsd.c and hip-fpie-option.hip.
Commit: 9bcb851e86941117ec9e82db8986ed301f929647
https://github.com/llvm/llvm-project/commit/9bcb851e86941117ec9e82db8986ed301f929647
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_uge.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ult.ll
Log Message:
-----------
[RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (#210955)
`expandCCOpToCMov` was only accepting signed 5-bit immediates before
forming `Xqcicm` conditional-move pseudos. Valid `uimm5` operands for
unsigned compare forms such as `QC_MVGEUI` and `QC_MVLTUI` were not
being handled leading to a crash.
Track whether the selected conditional-move opcode expects a signed or
unsigned immediate, and validate the RHS against the matching range.
Commit: d4e853f37031ff0eee47d323cbc8bc703b5a0ec7
https://github.com/llvm/llvm-project/commit/d4e853f37031ff0eee47d323cbc8bc703b5a0ec7
Author: Tejas Joshi <tejasjoshi9673 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/bf16-neg-noftz.ll
A llvm/test/CodeGen/NVPTX/bf16-setp-noftz.ll
Log Message:
-----------
[NVPTX] Fix illegal .ftz modifier for setp and neg PTX instructions for bf16 (#211128)
This patch disables emitting .ftz modifier for bf16 and bf16x2 type setp
and neg instructions, the PTX ISA does not specify this modifier for the
same. FNEG_H already correctly handles fneg for bf16, so remove the
redundant bf16 FNEG16 pattern.
Commit: 5602b981932fedc686b874ffe6ed3164b34a49e7
https://github.com/llvm/llvm-project/commit/5602b981932fedc686b874ffe6ed3164b34a49e7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Run controller-call continuations from Session (#211166)
A controller call's on-complete handler may run managed code, so it must
be dispatched by the Session under a ManagedCodeTaskGroup token, not
invoked directly by the ControllerAccess (which previously held it as a
plain callable and called it itself -- untokened and undispatched).
Wrap it in an opaque ControllerAccess::OnControllerCallReturn that
implementations can hold but not call. They complete it via exactly one
of three Session-provided paths:
- handleControllerCallResult -- the controller returned a result;
dispatches the handler under a fresh token. Asserts the managed-code
group is still open (i.e. before notifyDisconnected).
- failPendingControllerCall -- an already-enqueued call is failed
because the connection dropped before a result arrived (the disconnect
drain); dispatches the handler under a token with a disconnect error.
- failControllerCallInline -- a call made from within callController
while already disconnecting, which can never be enqueued; runs the
handler inline with a disconnect error, where the caller (and its token)
is still on the stack.
Together these guarantee a controller call's handler always runs exactly
once, with a result or a disconnect error, and never runs managed code
without a token. Only the success path takes a result value; the two
failure paths produce the canonical disconnect error internally, so it
can't be gotten wrong. InProcessControllerAccess and the Session unit
tests are updated.
Commit: 6b408bf0da2901a5264a39b7571f5e68b846d94a
https://github.com/llvm/llvm-project/commit/6b408bf0da2901a5264a39b7571f5e68b846d94a
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
M llvm/test/CodeGen/RISCV/zilsd-ldst-opt-prera.mir
Log Message:
-----------
[RISCV] Avoid forming Zilsd pairs with x0 for non-x0 register classes (#211019)
The pre-RA Zilsd optimizer allowed a pair when both stored values came
from the same virtual register if that virtual register was defined by a
copy from X0. This is only valid when the virtual register class can
actually contain X0.
Check the virtual register class before treating the value as `x0_pair`.
This prevents forming an invalid paired store for register classes such
as `GPRNoX0`.
Without this change we were hitting the following assertion in
`RISCVLoadStoreOptimizer`:
```
assert(
FirstReg != SecondReg &&
"First register and second register is impossible to be same register");
```
Commit: 6793bb48ac7517ea1e965de540c75359e465c355
https://github.com/llvm/llvm-project/commit/6793bb48ac7517ea1e965de540c75359e465c355
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_sincos_helpers.cl
M libclc/clc/lib/generic/math/clc_sincos_helpers.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp16.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp64.inc
M libclc/clc/lib/generic/math/clc_trigpi_helpers.cl
M libclc/clc/lib/generic/math/clc_trigpi_helpers.inc
M libclc/test/math/cos.cl
Log Message:
-----------
libclc: Fix UB in trig functions with nan inputs (#211047)
Commit: a67429f21b882e546555a3d1d9d45363ae1be51b
https://github.com/llvm/llvm-project/commit/a67429f21b882e546555a3d1d9d45363ae1be51b
Author: Keno Fischer <keno at juliahub.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Analysis/LoopInfo.cpp
Log Message:
-----------
[LoopInfo] Factor use-scan of isBlockInLCSSAForm [NFC] (#211087)
[Factored out of llvm/llvm-project#151062 by review request; AI
Disclosure: Done by Claude]
Split the per-use logic of isBlockInLCSSAForm into a separate helper
that answers whether a single use of a value defined in a loop is
contained within the loop for LCSSA purposes.
Commit: 06bbd269cb8863279c235f07c8e08d6ed2744db8
https://github.com/llvm/llvm-project/commit/06bbd269cb8863279c235f07c8e08d6ed2744db8
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Refill ready list during topdown scheduling (#211046)
Visit nodes which are ready according to the direction of scheduling.
Commit: e8b66ff170f99c6cf275444f22a3aded65ef0bc1
https://github.com/llvm/llvm-project/commit/e8b66ff170f99c6cf275444f22a3aded65ef0bc1
Author: Moazin K. <mkhatti at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/test/Dialect/OpenACC/offload-target-verifier.mlir
Log Message:
-----------
[OpenACC] Accept funcs with `acc.specialized_routine` in `acc::isValidSymbolUse` (#211111)
`ACCRoutineLowering` generates device side specialized version of
routines that have the `acc.specialized_routine` attribute. Those are
expected to be offloaded and therefore are valid symbol uses.
Assisted-by: Claude Code
Commit: e265437156dead1018ce826f2773face65d85810
https://github.com/llvm/llvm-project/commit/e265437156dead1018ce826f2773face65d85810
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/test/CodeGen/NVPTX/sm-version.ll
Log Message:
-----------
[NVPTX][Rubin] Add Rubin baseline support (#210646)
This change adds Rubin (sm_107) baseline support in NVPTX backend.
Commit: 15363db58bba0186573fee8afc9226dd38b8f507
https://github.com/llvm/llvm-project/commit/15363db58bba0186573fee8afc9226dd38b8f507
Author: firmiana <firmiana402 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/unittests/BinaryFormat/DwarfTest.cpp
Log Message:
-----------
[DebugInfo] Update assigned DWARF language codes (#210884)
Update LLVM's DWARF language tables to match the current
[`DW_LANG_*`](https://dwarfstd.org/languages.html) and
[`DW_LNAME_*`](https://dwarfstd.org/languages-v6.html) registries.
Add the missing `DW_LANG_*` and `DW_LNAME_*` constants, update the
corresponding language-version mappings, and expose the new `DW_LANG_*`
codes through the LLVM C API.
Commit: c2a39ea72dc1853e3fc2dfe71d2959fbcfcc56d2
https://github.com/llvm/llvm-project/commit/c2a39ea72dc1853e3fc2dfe71d2959fbcfcc56d2
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A llvm/test/tools/dsymutil/AArch64/pseudo-probe-universal.test
A llvm/test/tools/dsymutil/AArch64/pseudo-probe.test
M llvm/tools/dsymutil/CMakeLists.txt
M llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
M llvm/tools/dsymutil/DwarfLinkerForBinary.h
A llvm/tools/dsymutil/PseudoProbeLinker.cpp
A llvm/tools/dsymutil/PseudoProbeLinker.h
Log Message:
-----------
[dsymutil] collect pseudoprobe sections from debug map into __LLVM segment (#206817)
Introduce a new `PseudoProbeLinker` in `dsymutil` that collects
`__probes/__probe_descs` sections from the debug map objects and merges
the sections and places the probes metadata under
`Contents/Resources/Profiling/{pseudo_probes[-<arch>],pseudo_probe_descs[-<arch>]}`
respectively.
Commit: 49f5065973b8ec8496d5a1d9c58b2100ba48b01c
https://github.com/llvm/llvm-project/commit/49f5065973b8ec8496d5a1d9c58b2100ba48b01c
Author: firmiana <firmiana402 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.def
Log Message:
-----------
[DebugInfo] Fix Fortran 2018 default array lower bound (#210885)
The [DWARF language registry](https://dwarfstd.org/languages.html)
defines the default array lower bound for `DW_LANG_Fortran18` as one,
but LLVM records it as zero. Update the language table to match the
registry.
Commit: e20242130eeaa668e5c782643d4afed0b0ab2a6b
https://github.com/llvm/llvm-project/commit/e20242130eeaa668e5c782643d4afed0b0ab2a6b
Author: Jerry Zhang Jian <jerry.zhangjian at sifive.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
A llvm/test/CodeGen/RISCV/lpad-setjmp-regmask.ll
Log Message:
-----------
[RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (#210868)
RISCVISelDAGToDAG's lowering of RISCVISD::LPAD_CALL / LPAD_CALL_INDIRECT
to PseudoCALLLpadAlign / PseudoCALLIndirectLpadAlign (introduced in
#177515) only copied the callee, lpad label, chain, and glue operands,
dropping the argument-register and register-mask operands in between.
Without the register-mask operand, the register allocator treats these
calls as clobbering nothing but ra, so values live across the call are
not spilled/reloaded even though the callee is free to clobber
caller-saved registers. This caused a miscompile where a pointer held
live across a call to getcontext() (a returns_twice function) was
corrupted after the call returned, leading to a SIGSEGV in
llvm-test-suite's siod test.
Fix the operand copy to include the argument-register and register-mask
operands, matching the pseudo-instruction operands of a regular
PseudoCALL/PseudoCALLIndirect.
Signed-off-by: Jerry Zhang Jian <jerry.zhangjian at sifive.com>
Commit: 91406e8dff2b1578ff4dd22593ea1a8039b074a4
https://github.com/llvm/llvm-project/commit/91406e8dff2b1578ff4dd22593ea1a8039b074a4
Author: Haowei <haowei at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
Remove debug leftovers (#211068)
a04f87fdd9b59c6089bf731c669c6f149208363c merged with some debug print
leftovers. This patch removes them.
Commit: 33928f632158afe0f4b23e2b9f9cd70e4b5520fa
https://github.com/llvm/llvm-project/commit/33928f632158afe0f4b23e2b9f9cd70e4b5520fa
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
Log Message:
-----------
[LoopInfo] Make getSmallestCommonLoop O(depth). NFC (#211175)
getLoopDepth is itself an O(depth) parent walk.
Commit: 860cb62914d3fb2d37b561dc5eee7bd1b65dfc9e
https://github.com/llvm/llvm-project/commit/860cb62914d3fb2d37b561dc5eee7bd1b65dfc9e
Author: Kamlesh Kumar <kamleshbhalui at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/ThinLTO/X86/type_test_noindircall.ll
Log Message:
-----------
[X86] narrow the check scope to function NFC (#210917)
Commit: b77f99775e0a8e5d9b0aa2960fcee851fcb23d7d
https://github.com/llvm/llvm-project/commit/b77f99775e0a8e5d9b0aa2960fcee851fcb23d7d
Author: David Green <david.green at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/ctpop.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ctpop.ll
Log Message:
-----------
[AArch64] Update ctpop cost tests. NFC (#211184)
Commit: db369a6a6aa336806debcf2e110a41fe3e78b0cf
https://github.com/llvm/llvm-project/commit/db369a6a6aa336806debcf2e110a41fe3e78b0cf
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[AMDGPU][NewPM] Run UniformityInfoAnalysis inside AMDGPUISelDAGToDAGPass (#211174)
Just move it from pipeline to isel pass, NFC.
Commit: 7c72a115065720e2b6ad38bdee91ea3c5e580cfb
https://github.com/llvm/llvm-project/commit/7c72a115065720e2b6ad38bdee91ea3c5e580cfb
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/Parallel.h
M llvm/include/llvm/Support/PerThreadBumpPtrAllocator.h
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
M llvm/lib/Support/Allocator.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/unittests/Support/PerThreadBumpPtrAllocatorTest.cpp
Log Message:
-----------
PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (#209687)
PerThreadAllocator, only used by DWARFLinker, indexes a fixed
getThreadCount()-sized array by `getThreadIndex()`, so it only works on
ThreadPoolExecutor threads (and asserts elsewhere). It false-shares
adjacent threads' bump pointers.
Instead, create each thread's sub-allocator lazily on first use, keyed
by a process-unique instance id in a thread-local cache, with the
instance owning the heap-allocated sub-allocators. This drops the
getThreadIndex()/getThreadCount() dependence, unblocking the caller
participation change for `parallelFor`.
mlir::ThreadLocalCache solves the same problem by keying a per-thread
map on the instance pointer and reclaiming a thread's slot when an instance
dies, but costs a map lookup and shared_ptr bookkeeping per allocation; instances
here are few and short-lived, so an id-indexed vector is cheaper. The counter
behind claimPerThreadAllocatorId is defined out of line in Allocator.cpp
so Windows DLLs cannot duplicate it and alias two instances' sub-allocators.
Aided by Claude Fable 5
Commit: 06e24fa50e58068c6c9dabde2d38a1cdfd34b50d
https://github.com/llvm/llvm-project/commit/06e24fa50e58068c6c9dabde2d38a1cdfd34b50d
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEAttributes.cpp
Log Message:
-----------
[AArch64][SME] Scan function attributes once in SMEAttrs (NFC) (#210924)
Profiling sqlite on aarch64-O3 shows ~0.5% of compile-time is spent in
the SMEAttrs constructor, mostly from the inliner's areInlineCompatible
and getInlineCallPenalty hooks.
SMEAttrs does 14 string attribute lookups. Invert this to instead walk
the function attributes once and build the mask with a StringSwitch.
Improves CTMark geomean -0.20%, sqlite -0.40%.
https://llvm-compile-time-tracker.com/compare.php?from=4aa1590ad66a1bff9b3c74b4a2c7366473015b4c&to=37796f0f92101225e2fb5b6924acfdb5cba1b672&stat=instructions%3Au
Assisted-by: codex
Commit: 9925bcf8d945b16546d9e0748d3828fa3cc6d7e7
https://github.com/llvm/llvm-project/commit/9925bcf8d945b16546d9e0748d3828fa3cc6d7e7
Author: Tyler Chen <tlchen at pllab.cs.nthu.edu.tw>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][NFC] Fix WADD comment typo. (#211177)
Commit: c75267c8ef60e2f61e2c0d9e029fca9221554baf
https://github.com/llvm/llvm-project/commit/c75267c8ef60e2f61e2c0d9e029fca9221554baf
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx13.ll
Log Message:
-----------
[AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (#210713)
- builtins with documentation
- instructions
- new subtarget feature only for gfx13
- GlobalISel RegBankLegalize rules
- tests
Commit: ff90624360a1a55289a1de147a2ec8c504de7aaa
https://github.com/llvm/llvm-project/commit/ff90624360a1a55289a1de147a2ec8c504de7aaa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/interleavevectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/addsub.ll
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
Log Message:
-----------
[InstCombine] foldVectorBinop - don't fold length changing shuffles across binops (#211115)
As discussed on #210948 - the "Op(shuffle(V1, Mask), shuffle(V2, Mask))
-> shuffle(Op(V1, V2), Mask)" fold should only occur in InstCombine if
the shuffle is "like for like" and not length changing.
Leave the more general fold to an upcoming VectorCombine patch which can
handle the cost:benefit analysis, including multiuse shuffles.
Commit: e878b123ee0db40a16d62c421f6ea59a7ec59581
https://github.com/llvm/llvm-project/commit/e878b123ee0db40a16d62c421f6ea59a7ec59581
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
M llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
Log Message:
-----------
[AMDGPU] Do not copy noundef onto a widened kernarg load (#211181)
Sub-dword args are widened to an i32 load whose extra bits belong to a
sibling kernarg or padding, so noundef on the original arg does not
cover the full loaded value
Only copy it when the load type matches the argument type, mirroring the
existing range/nofpclass guards
Commit: b0c2dc0cf8f8de2fd2f0306deea0c5fcd07282da
https://github.com/llvm/llvm-project/commit/b0c2dc0cf8f8de2fd2f0306deea0c5fcd07282da
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/include/flang/Lower/DirectivesCommon.h
A flang/test/Lower/OpenMP/wsloop-computed-goto.f90
A flang/test/Lower/OpenMP/wsloop-select-case.f90
Log Message:
-----------
[flang][PFT-to-MLIR] allocate missing body blocks in `createEmptyRegionBlocks` (#210950)
Problem
-------
Under -mmlir --wrap-unstructured-constructs-in-execute-region, branch
lowering hit a null Evaluation::block for body statements inside an
OpenMP loop. genMultiwayBranch tripped
Bridge.cpp: Assertion `block && "missing multiway branch block"' failed
and genFIR(SelectCaseStmt) tripped
Bridge.cpp: Assertion `e->block && "missing CaseStmt block"' failed
The wrap machinery decides an unstructured DO/IF is wrappable and stops
propagating its isUnstructured flag to the enclosing OpenMPConstruct.
The OMP construct's isUnstructured stays false, so the top-level
createEmptyBlocks treats it as a structured directive with nested
evaluations — it allocates only the OMP construct's first-nested block
and does not recurse into the DO body. Then OMP loop lowering takes
over the body via createEmptyRegionBlocks, which was written to
*re-parent* pre-existing blocks into its region and silently skipped
evals whose .block was still null. Body targets (e.g. label 17's
ContinueStmt, or a SelectCase's CaseStmts) therefore had no block when
the consumer read evalOfLabel(...).block, tripping the asserts.
Solution
--------
Restore the invariant that consumers of eval.block can trust it at
lowering time. In createEmptyRegionBlocks (DirectivesCommon.h), when an
eval has isNewBlock but no .block, create one in the current region
alongside the existing re-parenting path. The OMP lowering path then
finds pre-allocated blocks for the whole body — matching the state that
existed before the wrap feature changed isUnstructured propagation —
without any lazy-allocation logic at consumer sites.
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: cfc921621a05b94be5742796fdb2ba5a58979e95
https://github.com/llvm/llvm-project/commit/cfc921621a05b94be5742796fdb2ba5a58979e95
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Optimize GEP comparisons with constant offsets (#208547)
https://alive2.llvm.org/ce/z/dCmoVn
In a GEP comparison with the same base like
%1 = gep i8, @base, i64 a
%2 = gep i8, @base, i64 b
%cmp = icmp ... %1, %2
When we know that the offsets cross the base's alignment boundary the
same
number of times, it means that either both of them will overflow, or
none of
them will. In these cases we can turn the comparison into offset
comparison:
%cmp = icmp ... a, b
Commit: ca52c1b3abbadf829598872b7dded2bca2fd50c0
https://github.com/llvm/llvm-project/commit/ca52c1b3abbadf829598872b7dded2bca2fd50c0
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/guarded-inner-loop.ll
M llvm/test/Transforms/LoopInterchange/interchanged-loop-nest-3.ll
M llvm/test/Transforms/LoopInterchange/lcssa-incoming-value-is-not-instr.ll
M llvm/test/Transforms/LoopInterchange/pr43326-ideal-access-pattern.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
M llvm/test/Transforms/LoopInterchange/reduction-extra-use-in-inner-loop.ll
M llvm/test/Transforms/LoopInterchange/reduction-not-involve-innermost.ll
M llvm/test/Transforms/LoopInterchange/transform-stop-partway.ll
Log Message:
-----------
[LoopInterchange] Prevent the transformation stage from stopping partway (#205564)
As mentioned in #205562, there are cases where the transformation stage
in LoopInterchange stops partway through, and the output IR ends up
partially modified rather than interchanged. Notably, the interchange is
recognized as having succeeded internally even in such cases. Apparently
this happens not to cause any miscompiles at the moment, but it is
clearly dangerous.
This patch removes the early exit in the transformation phase. We cannot
simply remove it, which checks for the presence of a unique successor of
the inner loop header, because there is a case where the header actually
has multiple successors. To avoid that situation, this patch changes the
code to call SplitBlock on the inner loop header unconditionally.
The test changes fall into two categories: some are simply due to newly
added redundant BBs. In the others, the expected interchanges are now
applied as intended, whereas previously the transformation failed and
the interchanges were not applied before this patch.
Commit: 948c4a2fc3df17eeb44337d590d669d0150aecbb
https://github.com/llvm/llvm-project/commit/948c4a2fc3df17eeb44337d590d669d0150aecbb
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt.mir
Log Message:
-----------
[AArch64][GlobalISel] Select vector element extract into GPR (#210030)
Prototyping a new minimal type-based approach to RegBankSelect (#199040)
for compile-time purposes exposed various gaps in instruction selection
when not using the existing RegBankSelect pass. These manifested as new
fallbacks when compiling the IR dataset from [1].
This patch teaches instruction selection to handle extracts of scalar
i8/i16/i32 into GPR directly. This will prevent new fallbacks being
introduced when a new type-based RBS pass is added.
The test cases are extracted from [1].
Assisted-by: codex
[1] https://davemgreen.github.io/gisel.html
Commit: c23ad1b869cdcec16275304e1f0b1d419fe35ae9
https://github.com/llvm/llvm-project/commit/c23ad1b869cdcec16275304e1f0b1d419fe35ae9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
Log Message:
-----------
[libc++] Remove {Pause,Resume}Timing from fast push_back benchmarks (#209130)
These benchmarks are expected to run for a very short time, and
`{Pause,Resume}Timing` should only be used when operations are expected
to take a long time. Removing them reduces the amount of noise in these
benchmarks.
Fixes #208719
Commit: 3e009b9276206769da69b3a3730a19ddc6abefa6
https://github.com/llvm/llvm-project/commit/3e009b9276206769da69b3a3730a19ddc6abefa6
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
Log Message:
-----------
[VPlan] Simplify EVL strided load match in optimizeMaskToEVL. nfc (#211193)
Commit: cf7a6122a1247353ba29f5384885de9e42bd1e14
https://github.com/llvm/llvm-project/commit/cf7a6122a1247353ba29f5384885de9e42bd1e14
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/completions/TestDAP_completions.py
Log Message:
-----------
[lldb-dap] Migrate the Completions tests (#210829)
Drop the Scenario dataclass as it is now clear what we are testing for.
Commit: 8beb627f6c59900cc080c9dba221dd197d6416c4
https://github.com/llvm/llvm-project/commit/8beb627f6c59900cc080c9dba221dd197d6416c4
Author: Georgiy Samoylov <Ignitor21838 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/OptionArgParser.cpp
M lldb/test/API/commands/memory/read/TestMemoryRead.py
Log Message:
-----------
[lldb] Add array decaying (#210918)
In C, an array name in an expression "decays" into a pointer to its
first element. LLDB did not honor this: commands like `memory read
my_array` did not work correctly, because an aggregate type has no
scalar value, so trying to obtain one (ResolveValue/GetValueAsUnsigned)
failed.
This MR adds explicit array decay: for array-typed expressions, the
address of the array object itself is used instead of its (non-existent)
scalar value.
Commit: b9ba0be057eb0f1989635376a267f5cb6ca3060c
https://github.com/llvm/llvm-project/commit/b9ba0be057eb0f1989635376a267f5cb6ca3060c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/alias_mask.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
Log Message:
-----------
[SDAG] Specify unsigned compares for loop.dependence.{war|raw} masks (#197437)
Previously, the LangRef was ambiguous about the sign of comparisons used
to create the loop dependence masks. This resulted in the expansion not
following the intended semantics for extreme inputs.
For example, %ptrA = 0, %ptrB = UINT_MAX, should result in a (RAW) mask
with all lanes active. However, previously we'd do ``(%elementSize *
lane) < abs(%ptrB - %ptrA)``, which due to incorrectly using signed
arithmetic would result in a mask with a single lane active as
``abs(%ptrB - %ptrA)`` resulted in 1, not `UINT_MAX`. In other words,
``abs(%ptrB - %ptrA)`` should be ``unsigned-absolute-difference(%ptrA,
%ptrB)``.
Follow up to #188248.
Commit: 5205cd7e9e71321804ccc4f5eb805d42ce986216
https://github.com/llvm/llvm-project/commit/5205cd7e9e71321804ccc4f5eb805d42ce986216
Author: Kamlesh Kumar <kamleshbhalui at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-reduce/Inputs/sleep-and-check-stores.py
Log Message:
-----------
[llvm-reduce] Tighten the check to count actual store NFC (#210933)
Commit: f07e2f1aabd1f62efd467ed397cb7b26ca60fb6d
https://github.com/llvm/llvm-project/commit/f07e2f1aabd1f62efd467ed397cb7b26ca60fb6d
Author: Timothy Day <timday at thelustrecollective.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Don't warn at joins that re-branch on a try-lock result (#209796)
Previously, when the result of a try-lock call is branched on more than
once, the paths between the branches would disagree on whether the
capability is held while remaining consistent at each branch. The analysis
then gave a false positive warning at the intermediate join:
mutex 'lock' is not held on every path through here
Create getTerminatorTrylockCall() helper from getEdgeLockset(); if the terminator
of a block branches on the result of a call to a try_acquire_capability-function
(perhaps negated or stored in a local variable), this helper returns that call and
its callee.
Use this new helper in getTerminatorTrylockCaps(), which will return the
capabilities acquired by a trylock; feed these capabilites to intersectAndWarn()
during a branch join, in order to avoid false positives.
Soundness is preserved because intersectAndWarn() still removes the
capabilities from the join block's entry lockset, ensuring any guarded access
inside the join block before the terminator is diagnosed. getEdgeLockset()
then re-adds the capability on the success edge.
This change resolves the false positive warning reported in [1].
Reported-by: https://lore.kernel.org/linux-fsdevel/20260714181057.667977-1-timday@thelustrecollective.com/ [1]
Assisted-by: AI was used a bit to understand the code and to help with testing and validation
Commit: 9bb81c2ffc5b349b54605cecb3e3a5e4a611f642
https://github.com/llvm/llvm-project/commit/9bb81c2ffc5b349b54605cecb3e3a5e4a611f642
Author: Takayuki Todokoro <47556487+takatodo at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/unroll-jam.mlir
Log Message:
-----------
[MLIR][Affine] Preserve discardable attrs when adding loop yields (#210571)
`replaceWithAdditionalYields` only appends loop-carried values, so
preserve the loop's discardable attributes, matching `scf.for`.
Assisted-by: OpenAI Codex gpt-5.6-sol max
Commit: dabf57f31715144eb75f2ce82efc5b0db6b9228d
https://github.com/llvm/llvm-project/commit/dabf57f31715144eb75f2ce82efc5b0db6b9228d
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/bsl.ll
M llvm/test/CodeGen/AArch64/combine-storetomstore.ll
M llvm/test/CodeGen/AArch64/imm-splat-ops.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to cover 64-bit vectors. (#209833)
This extends https://github.com/llvm/llvm-project/issues/165559 to
include 64-bit vectors.
Commit: 6c560cddfb1e206678866c6822baabcdcee2343f
https://github.com/llvm/llvm-project/commit/6c560cddfb1e206678866c6822baabcdcee2343f
Author: jay0x <90309873+blazie2004 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Lower/Support/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/reduction-array-section.f90
Log Message:
-----------
[flang][Lower][OpenMP] Fix reduction on array sections aborting in lowering (#209701)
**Summary**
This regression was introduced by #196094, which added a special
lowering path for reductions on a single array element, such as `a(2)`.
The problem is that Flang also treated an array section like `a(2:96)`
as if it were a single element. Because of this, the section was sent to
a code path that only supports scalar elements.
That path produced an array type that the reduction initialization code
could not handle, so Flang reached a `TODO` and aborted with a “not yet
implemented” error.
**Fix**
The fix is to use the special element path only when the expression has
rank 0, which means it represents one single value. Array sections have
rank greater than 0, so they should continue through the existing
boxed-array path.
Fixes : [209462](https://github.com/llvm/llvm-project/issues/209462)
---------
Co-authored-by: Jay Satish Kumar Patel <kumarpat at pe31.hpc.amslabs.hpecorp.net>
Commit: 28972b1fbc72c61eeb0e21272123eafcf0cdfea5
https://github.com/llvm/llvm-project/commit/28972b1fbc72c61eeb0e21272123eafcf0cdfea5
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Analysis/PHITransAddr.cpp
A llvm/test/Transforms/GVN/phi-translate-cross-function-cast.ll
Log Message:
-----------
[GVN] Fix PHITransAddr crash scanning cross-function cast users (#211169)
When PHI-translating a load address through a select of module-level
constant expressions, the folded side becomes a global constant whose
use-list spans multiple functions. Scanning that use-list for an
available cast could return a cast from another function, which then
made DominatorTree::dominates() query a block from a different function
and trip an assertion.
This patch restricts the search to casts in the current function,
matching the existing guards on the GEP and add paths.
Fixes #211034
Commit: 4bb9022f545ceb2b01789bd86d29da495449351b
https://github.com/llvm/llvm-project/commit/4bb9022f545ceb2b01789bd86d29da495449351b
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
Log Message:
-----------
[lldb-dap] Migrate breakpointAssembly and instructionBreakpoint test (#211054)
Commit: 16042c9480b4c9147d35f4e56b609c4189eb4f6f
https://github.com/llvm/llvm-project/commit/16042c9480b4c9147d35f4e56b609c4189eb4f6f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
Log Message:
-----------
[mlir][SPIR-V] Add MathToSPIRV conversion for copysign on OpenCL targets (#205994)
Commit: b9f8a9b43c2e6bb010ea8e457ab318077f013e25
https://github.com/llvm/llvm-project/commit/b9f8a9b43c2e6bb010ea8e457ab318077f013e25
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
Log Message:
-----------
[lldb] Fix SymbolFilePDBTests after FileSpec change f9b5264523b1 (#208425)
GetDirectory() returns a StringRef now which doesn't convert to bool
implicitly
Commit: 6d0e88210cd02ef517e42bc095c1bfd1fd5d1d3c
https://github.com/llvm/llvm-project/commit/6d0e88210cd02ef517e42bc095c1bfd1fd5d1d3c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/langinfo.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/langinfo-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/nl_item.h
Log Message:
-----------
[libc] Add langinfo.h header generation, macros, and types (#210941)
Add header generation support for langinfo.h, including nl_item type
definition, langinfo macros, and YAML header specification.
* libc/include/llvm-libc-types/nl_item.h: Define nl_item type
* libc/include/llvm-libc-macros/langinfo-macros.h: Define POSIX macros
* libc/include/langinfo.yaml: Define langinfo.h interface
* libc/include/langinfo.h.def: Header template
* libc/config/linux/*/headers.txt: Enable langinfo header for Linux
Assisted-by: Automated tooling, human reviewed.
Commit: 30a0a51a82ea1a73c52d302f53c4d5a0e5fd04ee
https://github.com/llvm/llvm-project/commit/30a0a51a82ea1a73c52d302f53c4d5a0e5fd04ee
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Fix FPCR abbreviations and an incorrect association in a comment (NFC) (#211188)
Commit: 0fbf86a79c9ddc61bee0126f61d81dc6d4b522fd
https://github.com/llvm/llvm-project/commit/0fbf86a79c9ddc61bee0126f61d81dc6d4b522fd
Author: Jacob Crawley <jacob.crawley at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-multivector-load-stores.ll
R llvm/test/CodeGen/AArch64/sve-multivector-loads.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Lower to multivector stores (#207397)
Lowers unpredicated stores of scalable vectors that are two or four
times the width of a legal SVE type to multi-vector operations when
subregister liveness is enabled instead of splitting them.
This matches the existing approach for multi-vector load lowering.
Commit: fbc5841e95f2183e48d7bffc850c2ec40b384e72
https://github.com/llvm/llvm-project/commit/fbc5841e95f2183e48d7bffc850c2ec40b384e72
Author: Weibo He <NewSigma at 163.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/Coroutines.md
M llvm/lib/Transforms/Coroutines/CoroElide.cpp
M llvm/test/Transforms/Coroutines/coro-elide.ll
Log Message:
-----------
[CoroElide] Remove restriction that the ramp function be inlined (#211163)
This restriction dates back to the initial implementation of CoroElide
support
(https://github.com/llvm/llvm-project/commit/dce9b026773160769625a4809bf2dfbf4e636ef1),
but the rationale for treating ramp functions specially seems unclear
and lacks test coverage.
This patch proposes that we drop the restriction and enable more
optimization opportunities. This also fixed the repro in #148380, but
the root cause remains unresolved.
Commit: b9ecf4590babac78a761efd1704ceefd4a1a26e1
https://github.com/llvm/llvm-project/commit/b9ecf4590babac78a761efd1704ceefd4a1a26e1
Author: David Green <david.green at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/smul_fix.ll
M llvm/test/CodeGen/AArch64/smul_fix_sat.ll
M llvm/test/CodeGen/AArch64/umul_fix.ll
M llvm/test/CodeGen/AArch64/umul_fix_sat.ll
Log Message:
-----------
[AArch64][GlobalISel] Update and cleanup s/umul.fix tests. NFC (#211232)
Commit: f61499bff6880928ed0a3f11f79086943be16b8f
https://github.com/llvm/llvm-project/commit/f61499bff6880928ed0a3f11f79086943be16b8f
Author: Ferdinand Lemaire <flscminecraft at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
A mlir/test/Conversion/RaiseWasm/wasm-blocks-to-cf.mlir
A mlir/test/Conversion/RaiseWasm/wasm-comparisons-to-arith-cmp.mlir
A mlir/test/Conversion/RaiseWasm/wasm-eqz-to-arith-cmp.mlir
A mlir/test/Conversion/RaiseWasm/wasm-extend-to-arith-ext.mlir
A mlir/test/Conversion/RaiseWasm/wasm-loop-to-cf.mlir
A mlir/test/Conversion/RaiseWasm/wasm-memory-to-memref.mlir
A mlir/test/Conversion/RaiseWasm/wasm-rotl-to-arith.mlir
A mlir/test/Conversion/RaiseWasm/wasm-rotr-to-arith.mlir
Log Message:
-----------
[MLIR][WASM] Introduce full support for raising WASM MLIR to other dialects (#205990)
Following https://github.com/llvm/llvm-project/pull/164562 where
RaiseWasm was introduced.
This PR completes the support for rewriting the currently supported Wasm
MLIR operators to arith, math, cf and memref.
---------
Co-authored-by: Ferdinand Lemaire <ferdinand.lemaire at woven-planet.global>
Commit: 1c7c783ba262a9ce9d6e5c070f0d7fb85125cedd
https://github.com/llvm/llvm-project/commit/1c7c783ba262a9ce9d6e5c070f0d7fb85125cedd
Author: Mayank <mayank.solanki at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/DeveloperPolicy.md
Log Message:
-----------
[Docs] Remove dead Phabricator link from DeveloperPolicy (#210934)
The Phabricator committing-a-change anchor no longer resolves since
Phabricator has been discontinued, so drop the reference and keep the
GitHub Issues guidance for linking reviewed/closed bugs.
Commit: 88840f264de6e0e6548219429ff62b3354db5210
https://github.com/llvm/llvm-project/commit/88840f264de6e0e6548219429ff62b3354db5210
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenCUDA/builtins-nvvm-atomic.cu
Log Message:
-----------
[CIR][CUDA] Add support for scoped NVVM atomic builtins (#210863)
Adds codegen support for the block and system-scoped NVVM atomic
builtins: add, and, or, xor, min, max, inc and dec.
These are lowered to the corresponding CIR `cir.atomic.fetch` operations
and subsequently lowered to LLVM `atomicrmw` instructions.
Commit: 31810a1d28e966fe757e5221c41c0610dc9c1203
https://github.com/llvm/llvm-project/commit/31810a1d28e966fe757e5221c41c0610dc9c1203
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
Log Message:
-----------
AMDGPU: Refactor checkVOPDRegConstraints (#196514)
Commit: 05daf2a85768d51dbe96953c5704dea1e45fe0b3
https://github.com/llvm/llvm-project/commit/05daf2a85768d51dbe96953c5704dea1e45fe0b3
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[LLVM][AArch64TargetTransformInfo] Fix typos in SVEIntrinsicInfo. (#211230)
Correct Propery->Property and sprinkle a couple of extra comments.
Commit: 3ac7573589eaa2d3ea107285ca10e0f52cbfbcfd
https://github.com/llvm/llvm-project/commit/3ac7573589eaa2d3ea107285ca10e0f52cbfbcfd
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Remove CompletionChunk.isKind methods (#210678)
This completes the third step of
https://github.com/llvm/llvm-project/issues/156680
This change is a follow-up to
https://github.com/llvm/llvm-project/pull/177854, following the release
branching, to ensure a one release-cycle deprecation period.
Commit: 3407cd1892b8a64b6f267e78b351b1415d2bafa5
https://github.com/llvm/llvm-project/commit/3407cd1892b8a64b6f267e78b351b1415d2bafa5
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
Log Message:
-----------
AMDGPU: Validate VOPD/VOPD3 physical source registers against operand RC (#196515)
Replace isVGPR checks with isValidVOPDSrc that validates physical source
registers against the actual combined VOPD/VOPD3 instruction's operand
register classes. Now we also validate operands for VOPD instructions.
Commit: 3369ddd384780f2ae60c3b20264735c2823d261c
https://github.com/llvm/llvm-project/commit/3369ddd384780f2ae60c3b20264735c2823d261c
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
Log Message:
-----------
AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (#196516)
For V_DOT2_F32_F16 and V_DOT2_F32_BF16 add their VOPDName and mark
them with usesCustomInserter which will be used to add pre-RA register
allocation hints to preferably assign dst and src2 to the same physical
register. When the hint is satisfied, canMapVOP3PToVOPD recognises the
instruction as eligible for VOPD pairing by checking if it is VOP2 like:
dst==src2, no source modifiers, no clamp, and src1 is a register.
Mark both instructions as commutable to allow a literal in src1 to be
moved to src0, since VOPD only permits a literal in src0.
Original patch had a bug where it did not check if physical src
registers match register class of appropriate operand in fullVOPD
instructions, check is now done via isValidVOPDSrc.
Commit: bad9ad339743d262793c15fddfab90bd976e531b
https://github.com/llvm/llvm-project/commit/bad9ad339743d262793c15fddfab90bd976e531b
Author: Matthew Blewitt <blewitt.matt at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-partial-reduce.ll
Log Message:
-----------
[AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (#204938)
A fixed-length `llvm.vector.partial.reduce.add` reducing `<16 x i8>`
into `<2 x i64>` is lowered on `+sve` by converting the reduction to a
scalable one and finishing with `convertFromScalableVector`. The i8 ->
i64 fold splits the `(nx)v4i32` dot before converting it back to fixed
length, but splitting a scalable container is not equivalent to
splitting the fixed vector it holds: at vscale=2 an `nxv4i32` container
splits into two `nxv2i32`, each holding four i32s, not the two-lane
halves of the underlying `v4i32`. The high partial sums land in lanes
that `convertFromScalableVector` then discards, so any runtime VL > 128
silently drops them — on a 256-bit machine (e.g. Neoverse V1) exactly
half the result is lost (#204939; downstream miscompile
rust-lang/rust#158144).
Convert the dot back to a fixed-length i32 vector before splitting, so
the split, widen and accumulate all happen in fixed length and no lanes
are dropped. The fixed dot width is derived from the result (two i32
lanes per i64 result lane) so the wider, VL-pinned `<4 x i64> <- <32 x
i8>` reduction — which also reaches this fold on plain SVE — lowers
correctly. This is the i64 sibling of the `v16i8 -> v2i32` case fixed in
#177119 (issue #176954); the fixed-length support was introduced in
#142032.
Commit: f5430c58d13c2e763b62d52e35e0e2859e57ff66
https://github.com/llvm/llvm-project/commit/f5430c58d13c2e763b62d52e35e0e2859e57ff66
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/Rematerializer.cpp
Log Message:
-----------
[NFC] Reword comment per post-merge feedback on #211031 (#211234)
As discussed with krzysz00
Commit: 29575a3460b43132c7d973b502830897b02874a9
https://github.com/llvm/llvm-project/commit/29575a3460b43132c7d973b502830897b02874a9
Author: syhhyl <syhhyl926 at 126.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MachObjectWriter.cpp
A llvm/test/CodeGen/AArch64/macho-weak-alias.ll
Log Message:
-----------
[MachO] Preserve weak linkage for aliases (#198148)
Mach-O aliases with weak or linkonce linkage were emitted as weak
references, which is appropriate for undefined references but not for
alias definitions. Emit Mach-O aliases through the same linkage path as
other global definitions so weak aliases get .weak_definition.
When writing aliased symbols, keep the aliasee flags and include the
alias symbol's own flags so N_WEAK_DEF is preserved in the Mach-O n_desc
field.
Fixes #111321
#196047 was closed as a duplicate of #111321.
Commit: 6f47123da4209cad8e043279d8572760a3e59af6
https://github.com/llvm/llvm-project/commit/6f47123da4209cad8e043279d8572760a3e59af6
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
Log Message:
-----------
[AMDGPU] Remove some unneeded waits for VA_VDST (#210741)
Add some internal consistency checks on WaitcntBrackets before and after
processing each instruction. In particular, check that VA_VDST_RD and
VA_VDST_WR agree on the range of values of the underlying hardware
counter. Fix some cases where this was not true, which has the effect of
removing some unneeded waits for VA_VDST where it was already known to
be zero.
Commit: 04327b1e595ac915a196340a37f48c16e6f489bc
https://github.com/llvm/llvm-project/commit/04327b1e595ac915a196340a37f48c16e6f489bc
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/test/libcxx/text/text_encoding/environment.pass.cpp
Log Message:
-----------
Revert "[libc++][test] XFAIL `text/text_encoding/environment.pass.cpp` test on Armv7/Linux Ubuntu targets." (#211112)
Reverts #206188
XFAIL'ed wrong test
Commit: ef13d4687b5fb29d8e162f4c4cce5b3c7cd58570
https://github.com/llvm/llvm-project/commit/ef13d4687b5fb29d8e162f4c4cce5b3c7cd58570
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp
A llvm/test/DebugInfo/COFF/enum-limits.ll
M llvm/test/DebugInfo/COFF/integer-128.ll
Log Message:
-----------
[CodeView] Encode signed enumerators as signed integers (#210352)
In #210338 I noticed that enumerator constants were always encoded as
unsigned integers. MSVC (usually) uses the correct signedness
(comparison: https://godbolt.org/z/rbrchhjTT). It only uses signed
values for 64 bit unsigned values (probably a bug).
We know the signedness in `DIEnumerator` and we should use it.
The change in `llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp` was
needed, because the max/min values need all the bits to encode their
value - otherwise we hit an assertion.
This also encodes the saturated value (`INT64_MIN = 0x8000000000000000`)
in the int128 test correctly (initially added in
https://reviews.llvm.org/D105320).
Commit: 08f3f01c43819979601ebf7618b657567ed9871f
https://github.com/llvm/llvm-project/commit/08f3f01c43819979601ebf7618b657567ed9871f
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/unittests/MC/DXContainerWriterTest.cpp
Log Message:
-----------
[DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (#211227)
Building Parts from SmallString elements invalidated StringRefs on
vector reallocation, so the test was dying under MSan before the
expected fatal error.
Fixes buildbot failures
https://github.com/llvm/llvm-project/pull/204903#issuecomment-5039669504.
Commit: 12e6cd9ea166b0ed09c83aae42cb83231461f6f2
https://github.com/llvm/llvm-project/commit/12e6cd9ea166b0ed09c83aae42cb83231461f6f2
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/test/CodeGen/PowerPC/splat-after-xxsldwi.ll
Log Message:
-----------
[PPC] Constrain register in VSPLT of XXSLDWI transform (#208005)
XXSLDWI takes a vsrc register, but the VSPLT opcodes only take vrrc.
vrrc is a subset of vsrc, so fix this by constraining the register
class.
Commit: 6ac80addbe9c12dd0a110a76fa2c09eb53764e64
https://github.com/llvm/llvm-project/commit/6ac80addbe9c12dd0a110a76fa2c09eb53764e64
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/tools/lldb-dap/extension/src/debug-configuration-provider.ts
Log Message:
-----------
[lldb-dap][VSCode][Windows] check that --check-python is available before using it (#211048)
`--check-python` is only available as of lldb-dap 23. Running that check
regardless of it's availability causes the extension to fail to start if
it's not available.
Check that the flag is available first by searching for it in the
`--help`. Checking for a version number would be a cleaner approach but
I reckon it would fail for local builds.
Fixes https://github.com/llvm/llvm-project/issues/210879
Commit: 6abffd7c22f7e1c0cf07ad6763495e098f580d10
https://github.com/llvm/llvm-project/commit/6abffd7c22f7e1c0cf07ad6763495e098f580d10
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/AMDGPU/fshl-illegal-types.ll
A llvm/test/CodeGen/AMDGPU/urem-constant-i128.ll
Log Message:
-----------
[SelectionDAG] Allow constant UREM decomposition without high multiply (#210232)
`SelectionDAG` may introduce a wide constant UREM when promoting funnel
shifts on irregular integer types. On AMDGPU, an i65 `fshl` becomes an
i128 remainder by 65; the existing decomposition is rejected because i64
`MULHU` and `UMUL_LOHI` are unavailable, after which legalization
attempts the unsupported `__umodti3` libcall.
Allow the existing decomposition when the wide UREM libcall is
unavailable and half-width `UDIVREM` is legal or custom. This lets
AMDGPU finish through its custom i64 `UDIVREM` lowering while preserving
the existing libcall preference for targets with a usable wide libcall.
Fixes #197949
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Co-authored-by: Codex <noreply at openai.com>
Commit: 9d3fe6cf06f1c20a337ce546115523bf1db925de
https://github.com/llvm/llvm-project/commit/9d3fe6cf06f1c20a337ce546115523bf1db925de
Author: Stephen Long <63318318+steplong at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir
Log Message:
-----------
[mlir][sme] Add e2e test for lowering mmt4d to sme (#208226)
Lowers mmt4d to arm sme with hoisting the load/store of the accumulator
out of the K-loop. Similar to ArmSVE/pack-unpack-mmt4d.mlir with some
additional changes.
Appreciate @banach-space for helping me out with this (#201562)
Assisted-by: Claude
---------
Co-authored-by: Stephen Long <steplong at quicinc.com>
Co-authored-by: Ege Beysel <beyselege at gmail.com>
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: e757e814e30741d6eae6044cea22dca78baa4edf
https://github.com/llvm/llvm-project/commit/e757e814e30741d6eae6044cea22dca78baa4edf
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/insertelement.ll
M llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
Log Message:
-----------
[AMDGPU] Cost i1 insertelements as free (#211246)
>From the discussion in
https://github.com/llvm/llvm-project/pull/206697#discussion_r3503977327
Booleans are free to scalarize in AMDGPU, so mark insertelements into i1
vectors as free. This removes some of the AMDGPU diffs from #206697
This doesn't mark extractelements as free since that ends up flattening
the costs for `vector.reduce.or/and`.
Commit: d9cf5980b7788a8840d69c6e4abb9092a35997bc
https://github.com/llvm/llvm-project/commit/d9cf5980b7788a8840d69c6e4abb9092a35997bc
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/test/CodeGen/linking-bitcode-postopt.cpp
Log Message:
-----------
[Clang][LTO] Assign GUIDs after post-opt bitcode linking (#211155)
Run AssignGUIDPass after LinkInModulesPass so newly linked globals have
GUIDs before LTO summary emission.
Fixes LCOMPILER-2475.
Commit: 150aa53d48aa6fdde26e00ea118582eb949f0dca
https://github.com/llvm/llvm-project/commit/150aa53d48aa6fdde26e00ea118582eb949f0dca
Author: Alexander Kornienko <alexfh at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
R clang/test/CodeGenCXX/gh196469-default-member-init-lambda-cleanup.cpp
R clang/test/SemaCXX/gh196469-default-member-init-lambda-capture.cpp
M clang/test/SemaCXX/source_location.cpp
Log Message:
-----------
Revert "[Clang] Rebuild lambda captures in default member initializers while skipping body (#196597)" (#211001)
This reverts commit 50f30bedaa81919915049474f4350ef19c36b7ca. The commit
causes a crash in clang:
https://github.com/llvm/llvm-project/pull/196597#issuecomment-4997866573
Commit: 6b52427b6864cc553d9506c39b7f1bfde5f1e170
https://github.com/llvm/llvm-project/commit/6b52427b6864cc553d9506c39b7f1bfde5f1e170
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/WritingAnLLVMPass.md
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
R llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
R llvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[LLVM] Remove SVEIntrinsicOpts pass. (#210368)
Commit: fdae383abe622856b2178b1eb2d6f1c454acf176
https://github.com/llvm/llvm-project/commit/fdae383abe622856b2178b1eb2d6f1c454acf176
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
Log Message:
-----------
[SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (#210923)
Move the SLP same-opcode compatibility primitives out of
SLPVectorizer.cpp into a new private module
SLPVectorizer/SLPCompatibilityAnalysis.{h,cpp}:
* isValidForAlternation
* BinOpSameOpcodeHelper
Part of the effort to modularize SLPVectorizer.cpp. See the RFC:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 84301dd17f4261b4b8c293cd21b6641b3fdc0add
https://github.com/llvm/llvm-project/commit/84301dd17f4261b4b8c293cd21b6641b3fdc0add
Author: Thibault Monnier <thibaultmonni at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Lex/Lexer.cpp
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
[Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (#180631)
This PR reopens #175452 after it was merged then reverted by #177322
because of compilation failures and compatibility issues.
This change attempts to maximize usage of the SSE fast path in
`fastParseASCIIIdentifier`.
If the binary is compiled with SSE4.2 enabled, or if we are not
compiling for x86, then the behavior is the exact same, ensuring we have
no regressions.
Otherwise, we compile both the SSE fast path and the scalar loop. At
runtime, we check if SSE4.2 is available and dispatch to the right
function by using `__builtin_cpu_supports`. If it _is_ available, this
allows a net performance improvement. Otherwise, there's a very slight
but negligible regression... I believe that's perfectly reasonable for a
non-SSE4.2-supporting processor.
The benchmark results are available here:
https://llvm-compile-time-tracker.com/compare.php?from=3192fe2c7b08912cc72c86471a593165b615dc28&to=8960c57a2e5880616d2dd549f8422ca91c864e86&stat=instructions%3Au.
Commit: 75e637791bff7b6c0c11754fb29991b6b140ee2c
https://github.com/llvm/llvm-project/commit/75e637791bff7b6c0c11754fb29991b6b140ee2c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
Log Message:
-----------
[mlir][SPIR-V] Lower memref.copy to spirv.CopyMemory (#206016)
Commit: 3a1f2e1da409a473b4b357810c4a37fd178aa3ca
https://github.com/llvm/llvm-project/commit/3a1f2e1da409a473b4b357810c4a37fd178aa3ca
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/builtin-debugtrap/TestBuiltinDebugTrap.py
M lldb/test/API/functionalities/thread/state/TestThreadStates.py
Log Message:
-----------
[lldb][test] Skip stop-reason tests unsupported on WebAssembly (#211266)
TestThreadStates::test_process_state expects a signal stop reason after
"process interrupt", but the trap from the single step used to step off
the breakpoint is reported as a trace stop. It is already skipped on
Linux and Darwin for the same reason.
TestBuiltinDebugTrap expects to continue past __builtin_debugtrap, but
on WebAssembly that lowers to the unreachable instruction, a fatal trap
that cannot be resumed.
Commit: 8ad500f6f7d7347ca097d9c442fbf4a0f604dc26
https://github.com/llvm/llvm-project/commit/8ad500f6f7d7347ca097d9c442fbf4a0f604dc26
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Add missing checkout (#211082)
We need to checkout the upload-release-artifact composite action before
using it.
Commit: 02c51adb8ff2b2b4c1041ac9f9d260c20ef77cc4
https://github.com/llvm/llvm-project/commit/02c51adb8ff2b2b4c1041ac9f9d260c20ef77cc4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/algorithms/lexicographical_compare_three_way.bench.cpp
Log Message:
-----------
[libc++] Remove redundant benchmarks for lexicographical_compare_three_way (#210268)
We already test the `_slow_path` and `_fast_path` functions through the
generic `BM_lexicographical_compare_three_way`. We don't need to
benchmark them again.
Commit: 155689a48e43878d2252cd39037909e87b018103
https://github.com/llvm/llvm-project/commit/155689a48e43878d2252cd39037909e87b018103
Author: Vito Secona <secona00 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/control-flow-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIRV] Add SPIRVToLLVM conversion for selection with yielding values (#210600)
The current SPIRVToLLVM conversion for SelectionOp does not handle merge
blocks with yielding values. This change implements that by adding
arguments to the continue block in the SelectionPattern.
Closes #204714
Commit: c53e2a89a48b312901eb70141d5a4e99ed1c532d
https://github.com/llvm/llvm-project/commit/c53e2a89a48b312901eb70141d5a4e99ed1c532d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
[AMDGPU] Flush denormal results when constant folding amdgcn.rcp (#203566)
v_rcp_f32/f64 flush denormal results to zero per the function
denormal-output mode, but the constant fold emitted the exact
reciprocal, giving a denormal the instruction would never produce
Commit: 1654b66a6d797371564381ad4e109c994f4f764f
https://github.com/llvm/llvm-project/commit/1654b66a6d797371564381ad4e109c994f4f764f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
Log Message:
-----------
[NFC][SPIR-V] Reuse PartialOrderingVisitor across sortSelectionMerge calls (#211200)
Commit: b9e3e6546dcb4b33d023b7a336163d5650cda9d4
https://github.com/llvm/llvm-project/commit/b9e3e6546dcb4b33d023b7a336163d5650cda9d4
Author: Yuxuan Chen <ych at meta.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A clang/test/CodeGenCoroutines/gh188230-coro-await-elidable-suspend-never-final.cpp
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/test/Transforms/Coroutines/coro-split-00.ll
M llvm/test/Transforms/Coroutines/coro-split-addrspace.ll
A llvm/test/Transforms/Coroutines/coro-split-resume-fallthrough-destroy-slot.ll
Log Message:
-----------
[Clang][coro] Fix `coro.free` in `.resume` clones with `[[clang::coro_await_elidable]]` (#207799)
Fixes https://github.com/llvm/llvm-project/issues/188230
CoroAnnotationElide rewrites annotated safe calls to the `.noalloc`
variant. The noalloc frame is caller-owned, but its `.resume` clone is
shared with ordinary heap-allocated instances.
With a `suspend_never` final suspend, normal resumption falls through to
the `coro.free` deallocation path. Regular frontend cleanup has already
run before this point. `coro.free` must therefore produce the frame
pointer for a heap instance and null for a `.noalloc` instance.
Use the frame destroy slot as a per-instance allocation tag. Cache its
value at resume entry, before user code can resume and release the
enclosing caller frame, then compare it with the cleanup clone. Replace
each `coro.free` result with the frame pointer for a heap instance and
null for an elided instance.
Update the CoroSplit and Clang CodeGen checks to cover the conditional
deallocation and the original suspend_never final-suspend shape.
Assisted-By: Codex GPT 5.5
Commit: fed8a6f2e38bd82835ddb651305782db6b62f326
https://github.com/llvm/llvm-project/commit/fed8a6f2e38bd82835ddb651305782db6b62f326
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
Log Message:
-----------
[lldb-dap] Migrate DAP cancel and commands tests (#211044)
Commit: 34436db53d3e4ad36e86019109fb5ceee9bb4d8c
https://github.com/llvm/llvm-project/commit/34436db53d3e4ad36e86019109fb5ceee9bb4d8c
Author: Rahul <quic_rahulana at quicinc.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Sema/DeclSpec.cpp
M clang/test/SemaCXX/auto-cxx98.cpp
Log Message:
-----------
[clang] Emit diagnostic for typedef+auto missed case in C++98/C23 (#210141)
CheckTypeSpec() converted 'auto' to a storage-class specifier without
checking whether 'typedef' was already set. [dcl.stc]p1 unconditionally
forbids typedef alongside any storage-class specifier regardless of C++
version.
This change add the check for tydef in the code handling auto.
Commit: 2f5771c8ecc5a9edd4469e08255402436dc7dd31
https://github.com/llvm/llvm-project/commit/2f5771c8ecc5a9edd4469e08255402436dc7dd31
Author: Spencer Bryngelson <shb at gatech.edu>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M openmp/CMakeLists.txt
M openmp/module/CMakeLists.txt
Log Message:
-----------
[openmp][cmake] Match GPU triples consistently in openmp/module (#211138)
Fixes #211135.
`openmp/module/CMakeLists.txt:29` gates the GPU-only Fortran compile
options on `"^amdgcn|^nvptx"`, while `openmp/CMakeLists.txt:176-177`
selects host-vs-device layout for the same build using
`"^amdgpu|^amdgcn|^nvptx|^spirv64"` against both
`LLVM_DEFAULT_TARGET_TRIPLE` and `CMAKE_CXX_COMPILER_TARGET`.
All four offload cache files use the triple `amdgpu-amd-amdhsa`, which
`^amdgcn` does not match, so `-nogpulib -flto` are silently not applied
to `libomp-mod` in the recommended AMDGPU offload configurations.
Compute the test once as `LIBOMP_TARGET_IS_GPU` in
`openmp/CMakeLists.txt` and use it at both sites, rather than
duplicating a widened regex. The conditions differ, not just the
patterns: copying the regex alone would leave a build that sets
`CMAKE_CXX_COMPILER_TARGET` without `LLVM_DEFAULT_TARGET_TRIPLE` still
taking the device path in `openmp/` while `libomp-mod` misses the flags.
`libomp-mod` compiles Fortran, so `CMAKE_Fortran_COMPILER_TARGET` is
also consulted; neither site did before.
Evaluated with CMake's regex engine:
| triple | before | after |
|---|---|---|
| `amdgpu-amd-amdhsa` | 0 | 1 |
| `amdgcn-amd-amdhsa` | 1 | 1 |
| `nvptx64-nvidia-cuda` | 1 | 1 |
| `spirv64-amd-amdhsa` | 0 | 1 |
| `x86_64-unknown-linux-gnu` | 0 | 0 |
`^spirv64` only brings `module/` in line with
`openmp/CMakeLists.txt:176`, which already routes spirv64 to `device/`.
Host builds are unaffected.
Roughly five other sites carry the same `amdgcn`-only pattern
(`offload/CMakeLists.txt:30`, `flang-rt/CMakeLists.txt:126`,
`flang-rt/lib/runtime/CMakeLists.txt:317`,
`flang-rt/cmake/modules/AddFlangRT.cmake:298`,
`cmake/Modules/GetToolchainDirs.cmake:118`) and are left for a
follow-up.
No test: configure-time logic, no test mechanism exists in `openmp/`.
This affects performance-critical applications on large AMD GPU
supercomputers, including [MFC](https://github.com/MFlowCode/MFC).
All numbers above come from the validated reproducers included with this
report and are independently reproducible; they stand on their own.
This was found and root-caused with the assistance of AI tools.
Commit: 958f9ff83ea9aa071df1c84c6a467b17d6b8dadf
https://github.com/llvm/llvm-project/commit/958f9ff83ea9aa071df1c84c6a467b17d6b8dadf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/fma-fmuladd-mix.ll
Log Message:
-----------
[SLP][NFC]Add a test for mixed fma/fmuladd scalars, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211280
Commit: 77981e39b5fa26ab43a3a3611fbb247321e33d78
https://github.com/llvm/llvm-project/commit/77981e39b5fa26ab43a3a3611fbb247321e33d78
Author: Trung Nguyen <git at trungnt2910.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrInfo.td
A llvm/test/CodeGen/ARM/Windows/chkstk-cpsr-clobber.ll
Log Message:
-----------
[ARM] Fix chkstk definition (#210940)
Commit: 15e5b04009155408b559cda5272dc95ac979ea85
https://github.com/llvm/llvm-project/commit/15e5b04009155408b559cda5272dc95ac979ea85
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/RDFGraph.h
M llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
M llvm/test/CodeGen/Hexagon/autohvx/xqf-postra-subreg2.ll
M llvm/test/CodeGen/Hexagon/autohvx/xqf-postra-subreg3.ll
Log Message:
-----------
[Hexagon] Drop NodeAddr::operator<, fix bad asserts directives (#210192)
Removed NodeAddr::operator< that was added by mistake in #207082.
Nothing needed it once HexagonPostRAHandleQFP.cpp's containers went back
to keying on NodeId.
Also removed the contradictory UNSUPPORTED+REQUIRES asserts in two
tests; subreg2 still crashes so it's XFAIL'd for now.
Commit: 930cd75aa341776565af08cc098c9270e9a16623
https://github.com/llvm/llvm-project/commit/930cd75aa341776565af08cc098c9270e9a16623
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][OpenACC] Support static multi-rank OpenACC array reduction accumulators (#210853)
Example:
```fortran
!$acc parallel loop reduction(+:a)
do i = 1, n
a(i,:) = a(i,:) + input(i,:)
end do
```
In this code, the reduction accumulator can have rank greater than one,
but GPU lowering assumes rank one.
Fix: initialize rank-N accumulators with nested loops and delinearize
flattened indices before loading, reducing, and storing each element.
Commit: da26ba882abda45fa8e4799470730ceb0cbfd5a8
https://github.com/llvm/llvm-project/commit/da26ba882abda45fa8e4799470730ceb0cbfd5a8
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSBundle.py
Log Message:
-----------
[LLDB] Disable Foundation test on newer versions of macOS (#211127)
On macOS >= 27 Foundation caches the path of a URL-initialized
NSBundle as a native Swift String. We cannot format that without the
Swift language plugin.
Add a requiresSwiftPlugin() decorator in decorators.py and use it for
the NSBundle formatter test. It expects failure only when LLDB lacks the
Swift plugin, and only on Apple targets at or after a given OS version
(checked against the target platform, so it is correct for
iOS/tvOS/watchOS/visionOS as well as macOS). Builds with the plugin are
expected to pass.
Assisted-by: claude
Commit: 9ca28bddf624eefd9ebd29a5296b4c6d979d88bb
https://github.com/llvm/llvm-project/commit/9ca28bddf624eefd9ebd29a5296b4c6d979d88bb
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h
A llvm/test/ExecutionEngine/RuntimeDyld/X86/COFF_x86_64_SECREL.s
Log Message:
-----------
[RuntimeDyld][COFF] Apply addend for IMAGE_REL_AMD64_SECREL (#211015)
`IMAGE_REL_AMD64_SECREL` currently falls through the default case. Its
`Addend` is built using the target symbol's section offset. This is
incorrect: for a SECREL against a section symbol (offset 0), the real
value is stored as the addend in the relocated field. This results in
the SECREL writer always writing 0, which is wrong.
This patch reads the 4-byte field addend for SECREL, as `REL32` and
`ADDR64` already do. It also adds a test which fails without this.
Source: https://learn.microsoft.com/en-us/windows/win32/debug/pe-format
Commit: 0769e6d05a0fa7bc8e9b1a453ec4dc62ce5bd8f4
https://github.com/llvm/llvm-project/commit/0769e6d05a0fa7bc8e9b1a453ec4dc62ce5bd8f4
Author: Scott Todd <scott.todd0 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/tools/offload-arch/AMDGPUArchByHIP.cpp
Log Message:
-----------
[offload-arch] Fix amdgpu HIP DLL search path on Windows (#209898)
## Motivation
This follows up on https://github.com/llvm/llvm-project/pull/194063 to
fix https://github.com/ROCm/TheRock/issues/6571, where `offload-arch`
distributed as part of ROCm has been failing with:
```diff
D:\projects\TheRock (main -> upstream)
λ .\build\dist\rocm\lib\llvm\bin\offload-arch.exe --verbose
Found HIP runtime: D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll
-note: priming LoadLibraryExW failed for D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll (error 126)
Failed to load D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll: D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll: Can't open: The specified module could not be found. (0x7E)
Failed to 'dlopen' libcuda.so.1
Unable to load library 'libze_loader.so': libze_loader.so: Can't open: The specified module could not be found. (0x7E)
```
## Fix details
The relevant code path in offload-arch is this:
```c++
int printGPUsByHIP() {
auto [DynamicHIPPath, IsFallback] = findNewestHIPDLL();
// Prime DLL load so transitive deps resolve from its directory.
primeLibraryLoad(DynamicHIPPath);
// ... then load the library and use it
```
Here's where the relevant files are located on disk in both build and
package directories:
```
rocm/
bin/
amdhip64_7.dll
rocm_kpack.dll (amdhip64_7.dll newly depends on this!)
lib/
llvm/
bin/
offload-arch.exe
```
The documentation for the
[`LoadLibraryExW`](https://learn.microsoft.com/en-us/windows/win32/api/libloaderapi/nf-libloaderapi-loadlibraryexw)
API that this code was calling says:
> If the string specifies a fully qualified path, the function searches
only that path for the module. When specifying a path, be sure to use
backslashes (`\`), not forward slashes (`/`). For more information about
paths, see [Naming Files, Paths, and
Namespaces](https://learn.microsoft.com/en-us/windows/desktop/FileIO/naming-a-file).
the `primeLibraryLoad()` function has been receiving a path with forward
slashes in it though, leading to the `error 126`.
## Testing performed
* Built `offload-arch` with and without this fix and ran it locally on
Windows
* Added new unit tests asserting that `LoadLibraryExW` is called with
backslashes and not forward slashes (we could add more "real" tests that
actually exercise library loading but I'm not sure if LLVM unit tests
are the right spot for that)
* Ran a "real" test that uses `offload-arch` to list GPUs, compile some
code, and run a printf function over in TheRock:
https://github.com/ROCm/TheRock/blob/a20ab791d74c94354704b791a85343babb83409b/tests/test_rocm_sanity.py#L85-L154
(this test was disabled back in
https://github.com/ROCm/TheRock/pull/5346 due to suspected machine
issues, now we'll be able to re-enable it)
Commit: 8aa808457c6aeba25ec0e17139c3fcab59923c3c
https://github.com/llvm/llvm-project/commit/8aa808457c6aeba25ec0e17139c3fcab59923c3c
Author: Xing Xue <xingxue at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind][AIX] Handle VAPI-based return addresses in stack unwinding for LLU (#209280)
In AIX's implementation of LLU (Live Library Update), the caller of a
Virtual API (VAPI) interface instead calls VAPI glue and the
implementation for a VAPI function is entered from the VAPI glue. If a
VAPI is not already active on the thread, the VAPI calls the
implementation of the VAPI function with the link register (LR) value
set to a return address in the VAPI glue. In this case, the LR (return
address) value on entry to the VAPI glue is saved in the VAPI control
block. This PR checks whether the return address in a stack frame falls
within the VAPI address range. If it does, the unwinder retrieves the LR
value from the VAPI control block and uses it as the return address
during stack unwinding. In addition, before transferring control to a
landing pad, this PR executes the VAPI return glue to clear the VAPI
control block if the VAPI glue was used.
---------
Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
Commit: eec8ff8aee140d9098480ec98c421f43557e1623
https://github.com/llvm/llvm-project/commit/eec8ff8aee140d9098480ec98c421f43557e1623
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
Log Message:
-----------
[gn build] Port c2a39ea72dc1 (#211292)
Commit: aee6075b75f6d26684215f7353270a3e701d5288
https://github.com/llvm/llvm-project/commit/aee6075b75f6d26684215f7353270a3e701d5288
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port fdae383abe62 (#211293)
Commit: 06a6c5eed88dd449576ad001a7d7cd6536b20b10
https://github.com/llvm/llvm-project/commit/06a6c5eed88dd449576ad001a7d7cd6536b20b10
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
Log Message:
-----------
[gn] port acb8fbe83ff12 more (#211295)
Commit: 6f3328e869b4d3f11d1b37808fbffab6d822d9aa
https://github.com/llvm/llvm-project/commit/6f3328e869b4d3f11d1b37808fbffab6d822d9aa
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/include/__configuration/namespace.h
Log Message:
-----------
[libc++] Don't add #pragma clang attribute with GCC (#206989)
GCC doesn't support `#pragma clang attribute`, which causes a bunch of
diagnostics. Since we have it behind a macro anyways we can simply
define the macro as empty with GCC.
Commit: 0590a36b312b950cb16dadfe349d07e73be1809a
https://github.com/llvm/llvm-project/commit/0590a36b312b950cb16dadfe349d07e73be1809a
Author: adams381 <adams at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
Log Message:
-----------
[CIR] Convert byval/sret/byref arg-attr types when lowering to LLVM (#210764)
The CallConvLowering pass lowers an indirectly-passed aggregate to a pointer argument and records the pointee record type on the `llvm.byval`, `llvm.sret`, or `llvm.byref` argument attribute. That type payload is still a CIR record after the pass runs, so once the module reaches the LLVM dialect and is translated to LLVM IR, the translation hits a CIR type inside the attribute and fails.
LowerToLLVM already routes every operand and result type through the type converter. It now does the same for the type carried by those three argument attributes, in the attribute lowering shared by the function definition and by the call and invoke sites. With the conversion in place, a byval or sret parameter translates to `byval(%struct.X)` / `sret(%struct.X)` carrying the lowered LLVM struct type, and byref does the same. CallConvLowering does not classify `cir.try_call` yet, so no invoke carries these attributes today, but the shared path already covers the invoke once it is classified.
The test injects the three attributes directly, lowers to the LLVM dialect, and translates to LLVM IR, checking the emitted attributes carry the LLVM struct type. It uses no aggregate classifier, so it stands alone from the x86_64 classifier stack.
Commit: 3486c5d48a78f5e132d05245f775fc6e27bdcaee
https://github.com/llvm/llvm-project/commit/3486c5d48a78f5e132d05245f775fc6e27bdcaee
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/HLFIR/HLFIRDialect.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIRDialect.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
A flang/test/HLFIR/bufferize-conditional.fir
M flang/test/HLFIR/invalid.fir
M flang/test/Lower/HLFIR/conditional-expr.f90
Log Message:
-----------
[flang] Region-based HLFIR operation for conditional expressions lowering (#194411)
Implements `hlfir.conditional`, a region-based HLFIR operation that
represents Fortran 2023 conditional expressions (10.1.2.3) with lazy
branch evaluation.
Issue #176999
Assisted-by: Claude Sonnet 4.5
Commit: e2052579d43e2813d2e3429a9aa092023cbf0c5f
https://github.com/llvm/llvm-project/commit/e2052579d43e2813d2e3429a9aa092023cbf0c5f
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
Log Message:
-----------
[MLIR][Python] Remove stale Python module naming status message (#211243)
`PYTHON_MODULE_PREFIX`, `PYTHON_MODULE_SUFFIX`, and
`PYTHON_MODULE_EXTENSION` are remnants of the previous pybind11-based
Python discovery path and are no longer populated or used by the
nanobind build.
The relevant Python SOABI is already reported through `Python3_SOABI`,
so we can remove the redundant status message, which currently prints
only empty values.
Commit: 5e860ee7025db82c1921c9e149cc8a6a68cb9909
https://github.com/llvm/llvm-project/commit/5e860ee7025db82c1921c9e149cc8a6a68cb9909
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog.ll
Log Message:
-----------
[AArch64] Set NoPHIs for outlined functions (#209852)
Commit: e0ec5391088426b55a5fe61137e1b76dd92e8c5e
https://github.com/llvm/llvm-project/commit/e0ec5391088426b55a5fe61137e1b76dd92e8c5e
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
Log Message:
-----------
[MLIR][Python] Remove stale NumPy detection message (#211235)
NumPy stopped being requested as a CMake Python component when its
unused build-time dependency was removed in #108465 . Remove the
remaining status message, which now prints empty version and include
directory values.
Commit: 22351c74e21ff19633cc101c6d92c7c179e5a4a3
https://github.com/llvm/llvm-project/commit/22351c74e21ff19633cc101c6d92c7c179e5a4a3
Author: Sunil Shrestha <sunil.shrestha at hpe.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
R flang/test/Lower/OpenMP/Todo/interop-construct.f90
A flang/test/Lower/OpenMP/Todo/interop-prefer-type-selector-list.f90
A flang/test/Lower/OpenMP/Todo/interop-prefer-type-unknown-fr.f90
A flang/test/Lower/OpenMP/interop.f90
A flang/test/Semantics/OpenMP/interop-construct-v60.f90
A flang/test/Semantics/OpenMP/interop-prefer-type.f90
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPAttrDefs.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-interop-depend.mlir
A mlir/test/Target/LLVMIR/openmp-interop.mlir
M openmp/module/omp_lib.F90.var
M openmp/module/omp_lib.h.var
Log Message:
-----------
[Flang][OpenMP] Add support for interop construct (#203959)
This adds support for the OpenMP interop construct, which enables
interoperability with foreign runtime environments (e.g., CUDA, HIP).
The init, use, and destroy action clauses are lowered from the Fortran
parse tree to MLIR interop ops and translated to the appropriate runtime
calls. The omp_lib module is extended with interop query API interfaces,
property constants, and return code constants. A semantics fix relaxes
the depend/targetsync constraint for use/destroy directives where the
interop type was established at a separate init site. Unsupported depend
clauses and prefer_type selector-list forms emit explicit diagnostics
instead of being silently dropped.
Assisted-by: Claude Opus 4.6
Commit: 65c377bfc5c297cc9477369407790282abb5db51
https://github.com/llvm/llvm-project/commit/65c377bfc5c297cc9477369407790282abb5db51
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/SourceMgr.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Support/SourceMgr.cpp
A llvm/test/MC/AsmParser/macro-like-diagnostic.s
A llvm/test/tools/llvm-ml/macro_diagnostic.asm
Log Message:
-----------
[MC][NFC] Share some code between MasmParser and AsmParser
Factor out printIncludeStackForDiagnostic() to SourceMgr in preparation
for a follow-up commit that changes the output here. This avoids needing
to update both of them. Also add two more tests for the current output.
Pull Request: https://github.com/llvm/llvm-project/pull/210731
Commit: 4e0a25590ef9770f6dcee407a92980b3489b414e
https://github.com/llvm/llvm-project/commit/4e0a25590ef9770f6dcee407a92980b3489b414e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/modules/CrossCompile.cmake
M llvm/runtimes/CMakeLists.txt
M offload/CMakeLists.txt
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
Log Message:
-----------
[LLVM] Remove 'LLVM_LIBC_GPU_BUILD' logic (#211265)
Summary:
This is a holdover from how we used to handle this stuff. We should just
dirctly check the triple for setting the cross-compiling emulator and we
can directly introspect into the build tree for the lit config like we
already do for flang-rt.
Commit: f38a23b66886cdcc79d986339687a9fb84003314
https://github.com/llvm/llvm-project/commit/f38a23b66886cdcc79d986339687a9fb84003314
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Exclude another coro test from profcheck (#211296)
Coro aren't yet fixed for profcheck.
(related: #207799)
Commit: 2a874aa79690f4dda574d06aa31c16602eec422d
https://github.com/llvm/llvm-project/commit/2a874aa79690f4dda574d06aa31c16602eec422d
Author: theSK2005 <73001618+theSK2005 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Move SGPR Count Queries into TargetParser (#209848)
Relocated SGPR queries from AMDGPU backend into the public TargetParser.
Part of resolving a comgr issue
(https://github.com/ROCm/llvm-project/issues/3298) to reduce
comgr-isa-metadata.def duplication.
Assisted by: Claude Code
Commit: 9d2000c24d7b5b1072e15bb083d2b76328b54763
https://github.com/llvm/llvm-project/commit/9d2000c24d7b5b1072e15bb083d2b76328b54763
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/TestWasHit.py
M lldb/test/API/functionalities/memory/find/TestMemoryFind.py
M lldb/test/API/lang/cpp/global_operators/TestCppGlobalOperators.py
M lldb/test/API/lang/cpp/static_members/TestCPPStaticMembers.py
M lldb/test/API/python_api/exprpath_register/TestExprPathRegisters.py
M lldb/test/API/python_api/process/address-masks/TestAddressMasks.py
M lldb/test/API/python_api/process/read-mem-cstring/TestReadMemCString.py
Log Message:
-----------
[lldb][test] Skip more WebAssembly-unsupported API tests (#211305)
Skip tests that exercise features WebAssembly does not provide:
expression evaluation, registers, an ABI plugin, and unmapped memory
pages.
Commit: 9286c58841cb1dbebe92873afafe745d4c58868b
https://github.com/llvm/llvm-project/commit/9286c58841cb1dbebe92873afafe745d4c58868b
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/ArraySectionAnalyzer.cpp
M flang/lib/Optimizer/Builder/Character.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
Log Message:
-----------
[Flang] Return APInt from getIntIfConstant (#211233)
Preserve the full bit width of integer attributes when extracting
constants from FIR values. Return llvm::APInt directly and update
fixed-width consumers to use checked signed extraction.
This avoids truncating or asserting on constants wider than 64 bits
while retaining existing fallback behavior at int64_t boundaries.
This should be NFC everywhere we didn't have a latent overflow bug. I
didn't go so far as updating the interfaces of every function built on
top of getIntIfConstant: this is mostly to make an APInt version
available because it looks useful for another PR. Fixing the builder API
to use APInt would be a larger change - let me know if anyone wants to
see that.
Assisted-by: Codex
Commit: c416cc1b3af401ebb9cc2abfc502ef84edc2297c
https://github.com/llvm/llvm-project/commit/c416cc1b3af401ebb9cc2abfc502ef84edc2297c
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocDelay.cpp
M flang/test/Transforms/CUF/cuf-alloc-delay.fir
Log Message:
-----------
[flang][cuda] Fix cuf-alloc-delay for host-associated allocatables (#211103)
`cuf-alloc-delay` sinks a managed descriptor's `cuf.alloc` group
(`{cuf.alloc, fir.store, fir.declare}`) to just before its first use, to
defer the managed allocation. It special-cased the store of the descriptor
into a host-association tuple slot (`fir.store` to a `fir.llvm_ptr`): it did
not count that store (nor the call that consumes the tuple) as a use, and moved
the store along with the group. As a result, when a managed allocatable descriptor
is stored into a host-association tuple and passed to an internal procedure, the group
could be sunk **past** the internal-procedure call that reads the tuple, so the
callee observed an uninitialized descriptor. On more complex tuples, moving the
host-association store also broke SSA dominance, producing
`operand #1 does not dominate this use`.
With this PR, `findDelayTarget` now treats **every** use of the
descriptor as a real use, including the host-association store. The group is only ever sunk to
*before* the first use, and the host-association store is never moved (it reads
its own `fir.coordinate_of` slot). This keeps the descriptor initialized before
the tuple is consumed and is dominance-safe by construction.
Commit: 743f03189fa76a5daf8211f00f98e81f18e6ecfb
https://github.com/llvm/llvm-project/commit/743f03189fa76a5daf8211f00f98e81f18e6ecfb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/docs/conf.py
M libcxxabi/include/cxxabi.h
M libunwind/include/__libunwind_config.h
Log Message:
-----------
[runtimes] LLVM 24 version bumps (#211262)
This patch bumps the version of libc++abi and libunwind, and libc++ in
the documentation.
Commit: 0cd942fa1b6de94fd6d7fa7ba73f0233293115f8
https://github.com/llvm/llvm-project/commit/0cd942fa1b6de94fd6d7fa7ba73f0233293115f8
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/test/API/functionalities/data-formatter/builtin-formats/TestBuiltinFormats.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
M lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
M lldb/unittests/Core/DumpDataExtractorTest.cpp
Log Message:
-----------
[lldb] Fix Unicode code point formatting to use proper notation (#211131)
- use uppercase hex digits
- only emit "U+" notation for valid code points (<= U+10FFFF),
zero-padded to a minimum of four digits.
rdar://173817553
Assisted-by: claude
Commit: badd93d5dfac6eb92e9e99220be09dfdca65c9e9
https://github.com/llvm/llvm-project/commit/badd93d5dfac6eb92e9e99220be09dfdca65c9e9
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
Log Message:
-----------
[CIR][NFC] Remove unreachable code and add missing NYIs (#211084)
Remove unreachable code and add missing NYIs for Matrix row and elt
Commit: 85fa1af9c39e3af2d53093ba441d3a1ebb99a9d5
https://github.com/llvm/llvm-project/commit/85fa1af9c39e3af2d53093ba441d3a1ebb99a9d5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
Log Message:
-----------
[SLP] Vectorize select-addressed loads as masked-load blends
Recognize loads whose address is chosen per lane via
select(cond, A, B) and vectorize them as two masked loads blended
by a select, instead of gathering.
Fixes case 6 from #206367
Reviewers: hiraditya, RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/210455
Commit: 861efe03d96d93cd7e475d15bbc676f6d521f4fd
https://github.com/llvm/llvm-project/commit/861efe03d96d93cd7e475d15bbc676f6d521f4fd
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libunwind/test/CMakeLists.txt
A libunwind/test/aix_vapi_unw_resume.pass.cpp
M libunwind/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
[libunwind][test][AIX] Add C API test for unwinding from AIX VAPI (non-signal-handler case) (#209306)
Test detection, during stepping, of the backchain mutation introduced by
a VAPI call (see https://github.com/llvm/llvm-project/pull/209280).
Further, test resumption of contexts using cursors obtained while a VAPI
is active on the thread.
Testing is done via FileCheck inspection of trace output enabled by
`LIBUNWIND_PRINT_UNWINDING=1`. When Live Library Update is not enabled,
synthetic trace output is generated by the test program itself.
---------
Assisted-by: IBM Bob
Commit: 95ffe166e19a5aaffa583fe5944fa0e9103d5dda
https://github.com/llvm/llvm-project/commit/95ffe166e19a5aaffa583fe5944fa0e9103d5dda
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
Log Message:
-----------
[AMDGPU] Support i16 element types for tbuffer D16 load/store (#201420)
Detect D16 by element bit width rather than matching f16 specifically,
so integer i16 elements take the same packed/unpacked path
Commit: f266ca172cf30187791f541b56af441c2bb26777
https://github.com/llvm/llvm-project/commit/f266ca172cf30187791f541b56af441c2bb26777
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A llvm/docs/DirectX/SemanticSignatures.md
M llvm/docs/DirectXUsage.rst
Log Message:
-----------
[HLSL][Docs] Add metadata description of semantic signatures (#206804)
Adds docs of semantic signatures from the proposal.
Resolves https://github.com/llvm/llvm-project/issues/204877
Commit: dbaabbc920fcd60aeed5109c3c6353830e7605c5
https://github.com/llvm/llvm-project/commit/dbaabbc920fcd60aeed5109c3c6353830e7605c5
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A libunwind/test/aix_vapi_signal_unwind.pass.cpp
Log Message:
-----------
[libunwind][test][AIX] Add C API test for unwinding from AIX VAPI (as signal handler) (#209662)
Further to https://github.com/llvm/llvm-project/pull/209306, test a case
where a signal handler is a Virtual API function triggered synchronously
while the VAPI is not active. Resuming an ancestor context of the signal
frame should call the VAPI return glue.
---------
Assisted-by: IBM Bob
Commit: 045c8987eceb67c80a0423fc62dce9acc75f6cb0
https://github.com/llvm/llvm-project/commit/045c8987eceb67c80a0423fc62dce9acc75f6cb0
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
R libcxx/test/std/ranges/range.adaptors/range.transform/iterator/sentinel.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.transform/sentinel/sentinel.pass.cpp
Log Message:
-----------
[libc++][NFC] Format and move `transform_view`'s `sentinel.pass.cpp` (#211252)
As a pre-requisite to: https://github.com/llvm/llvm-project/pull/193891
Commit: 58d2ec68ca7752c10035bc3394bc18e8d678efd8
https://github.com/llvm/llvm-project/commit/58d2ec68ca7752c10035bc3394bc18e8d678efd8
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/include/mlir-c/Rewrite.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/test/CAPI/rewrite.c
Log Message:
-----------
[mlir-c] Add TypeConverter materialization; use a status enum for the type conversion callback (#208934)
Continues the buildout of the dialect-conversion C bindings (follows
#206146 and #206161).
- Exposes `TypeConverter::addSourceMaterialization` and
`addTargetMaterialization` through the MLIR C API.
- Introduces `MlirTypeConverterConversionStatus`
(`Success`/`Failure`/`Declined`) and switches
`MlirTypeConverterConversionCallback` to return it, replacing the old
`MlirLogicalResult` + `MlirType{NULL}` dual sentinel. The old convention
could not distinguish the C++ decline (`std::nullopt`, try the next
conversion) and hard-failure (`failure()`, stop) states; the enum maps
cleanly to all three. The Python binding and C API test are updated
accordingly.
Assisted by: Claude
Commit: e19eb38d6f9eb78113c44783ed69e1ae6639783e
https://github.com/llvm/llvm-project/commit/e19eb38d6f9eb78113c44783ed69e1ae6639783e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
Log Message:
-----------
RuntimeLibcalls: Drop artificial __aeabi_?cmpeq suffixes (#211251)
Avoid defining synthetic LibcallImpls just to match the use
case of the legalizer. __aeabi_?cmpeq returns a boolean for
ordered-equal and was defined twice with __oeq/__une enum
suffixes so the one symbol could serve both OEQ and UNE.
Replace each pair with a single unsuffixed impl providing only
OEQ. The legalizer can directly invert it without the dummy entry.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 7f1aca578c26409aa831049611ef66ff344515cd
https://github.com/llvm/llvm-project/commit/7f1aca578c26409aa831049611ef66ff344515cd
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/test/Bitcode/DIGlobalVariableExpression.ll
M llvm/test/Bitcode/DIGlobalVariableExpression2.ll
Log Message:
-----------
[DebugInfo] Avoid duplicate DIGlobalVariableExpression during upgrade (#190616)
During bitcode upgrades, if an old DIGlobalVariable is encountered that
contained a DIExpression, a DIGlobalVariableExpression is created for
it. This could happen multiple times. As described in
https://reviews.llvm.org/D26769, it is valid for a DIGlobalVariable to
have multiple DIGlobalVariableExpressions, but the use case for this is
a location that cannot be represented in a single DIExpression, not a
redundant restatement of the same DIExpression.
Commit: 9659d3a8aef9b610eaf496201a5fb9c904d701fa
https://github.com/llvm/llvm-project/commit/9659d3a8aef9b610eaf496201a5fb9c904d701fa
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir
Log Message:
-----------
[mlir][OpenACC] Forward dynamic boxed reduction extents (#211318)
Example:
```fortran
subroutine reduce(a, x, n)
integer :: n, i
real :: a(:), x(:)
!$acc parallel loop reduction(+:a)
do i = 1, n
a(:) = a(:) + x(i)
end do
end subroutine
```
`ACCCGToGPU` represents each gang/thread-private array as a dynamically
offset `memref.subview`. Converting this subview directly to a FIR
pointer-like type loses the memref offset, causing different private
copies to alias the same storage.
Fix: extract the selected subview’s element offset, convert it to bytes,
and create a zero-offset view at that address before converting to the
FIR pointer-like type. This preserves the selected gang/thread-private
slice.
Before:
```mlir
%subview = memref.subview %view[%block_id, 0] [1, %extent] [1, 1]
: memref<?x?xf64> to memref<?xf64, strided<[1], offset: ?>>
%result = fir.convert %subview
: (memref<?xf64, strided<[1], offset: ?>>) ->
!fir.heap<!fir.array<?xf64>>
```
After:
```mlir
%subview = memref.subview %view[%block_id, 0] [1, %extent] [1, 1]
: memref<?x?xf64> to memref<?xf64, strided<[1], offset: ?>>
%base, %offset, %sizes, %strides =
memref.extract_strided_metadata %subview
: memref<?xf64, strided<[1], offset: ?>> ->
memref<f64>, index, index, index
%c8 = arith.constant 8 : index
%byte_offset = arith.muli %offset, %c8 : index
%private_view = memref.view %buffer[%byte_offset][%extent]
: memref<?xi8> to memref<?xf64>
%result = fir.convert %private_view
: (memref<?xf64>) -> !fir.heap<!fir.array<?xf64>>
```
Commit: 30878c15a6116712db726bf4906620fd8ee571d4
https://github.com/llvm/llvm-project/commit/30878c15a6116712db726bf4906620fd8ee571d4
Author: David Young <davidayoung at meta.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Add os select for plugin process on Initialization target to add windows (#211276)
Another small piece of windows build support for LLDB in bazel.
Internally at Meta, our buck2 rule for this has a split for mac/linux
with PluginProcessPOSIX and windows with PluginProcessWindowsCommon. So
this should be a no-op for existing linux & mac builds while setting up
a bit more for windows.
I have no bazel build set up locally, so will wait on CI to confirm no
regression.
bazel rule creation assisted with claude
Commit: 9b0e63af7c1026d7f4a1550753b7e1294af46d29
https://github.com/llvm/llvm-project/commit/9b0e63af7c1026d7f4a1550753b7e1294af46d29
Author: adams381 <adams at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
Log Message:
-----------
[CIR] Rewire byref args to the incoming pointer (#210836)
The CallConvLowering body rewrite for Indirect arguments treats byval
and
byref the same way: it inserts a cir.load at function entry and reroutes
body
uses to the loaded value. For byref — a non-trivially-copyable type
passed by
pointer — that entry load is a byte-copy, so the callee works on a local
copy
instead of the caller's storage. That breaks types whose representation
embeds
self-referential pointers: libstdc++'s SSO std::string keeps _M_p
pointing at
its own _M_local_buf, and a byte-copy leaves the copy's _M_p aliasing
the
source's buffer.
This mirrors the sret return fix in insertSRetStores. For byref only,
rewire
the CIRGen param-slot alloca to the incoming pointer and drop the spill
store,
so the body operates on the caller's storage in place. byval keeps the
load-at-entry copy, which is correct there.
The rewrite is exercised through the classification-injection driver in
clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir, covering a
byref
field access on the incoming pointer and a byval control case that
retains the
copy. The call site still copies a value operand into a fresh alloca
before
passing it by reference; forwarding existing storage in place is left
for a
follow-up.
Commit: 54a0f730d9f8df4e7f5e4bfd4c03acbc182eb3cf
https://github.com/llvm/llvm-project/commit/54a0f730d9f8df4e7f5e4bfd4c03acbc182eb3cf
Author: David Green <david.green at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Processors.td
A llvm/test/tools/llvm-mca/AArch64/Cortex/A76-basic-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/A78-basic-instructions.s
Log Message:
-----------
[AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (#211209)
We do not have native scheduling models for some of the Cortex-A
generations of CPUs, so they were still using the old Cortex-A57 model.
Whilst not perfectly accurate, the NeoverseN1 and NoeverseN2 scheduling
models should be a better fit for these CPUs. I mostly just tried to
make sure the number of pipelines matches between the neoverse core and
the cortex core. If we need something more accurate then we can start
adding new models for the CPUs.
Commit: 7d39826fbe9e1b248fcdb0bdd68626b3deb88d1e
https://github.com/llvm/llvm-project/commit/7d39826fbe9e1b248fcdb0bdd68626b3deb88d1e
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Fix indentation (#211319)
Introduced by 8ad500f6f7d7347ca097d9c442fbf4a0f604dc26.
Commit: e00944c8d800c3ebc78d22a04ed7c3ce0bf162a1
https://github.com/llvm/llvm-project/commit/e00944c8d800c3ebc78d22a04ed7c3ce0bf162a1
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/EHScopeStack.h
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGen/loop-cond-var-cleanup.cpp
Log Message:
-----------
[CIR] Generate cleanup region for loops when needed (#211158)
This adds support for generating a cleanup region in loops that declare
destructed variables in the loop condition. These variables need to be
destructed on a per-iteration basis, so it's not possible to have a
cleanup scope that properly encloses the variable without losing the
loop structure elements in the initial CIR representation.
The CFG flatteneing of these loops was added in a previous PR, and the
lowering to LLVM IR follows directly from the flattened form.
Assisted-by: Cursor / various models
Commit: 0e9b8c3dfa73fc3d5d0a87241b4d979f9115cf38
https://github.com/llvm/llvm-project/commit/0e9b8c3dfa73fc3d5d0a87241b4d979f9115cf38
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/Attr.td
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/ParserHLSL/hlsl_is_ms_attr.hlsl
A clang/test/ParserHLSL/hlsl_is_ms_attr_error.hlsl
Log Message:
-----------
[HLSL] Add IsMultiSampled HLSL resource attribute (#211125)
This PR completes the frontend work for adding the IsMultiSampled HLSL
resource attribute (addressing
https://github.com/llvm/llvm-project/issues/194933)
The DirectX and SPIR-V backend work will be completed alongside the
implementation Texture2DMS
(https://github.com/llvm/llvm-project/issues/194955) so that the
functionality can be exercised.
Assisted by: Claude Opus 4.8
Commit: e1af868257eb4a49db9149cc239ca9b9338d6419
https://github.com/llvm/llvm-project/commit/e1af868257eb4a49db9149cc239ca9b9338d6419
Author: jimingham <jingham at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/include/lldb/Expression/ExpressionVariable.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Expression/ExpressionVariable.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionVariable.cpp
M lldb/source/Target/ABI.cpp
R lldb/test/API/functionalities/expr-result-var/Makefile
R lldb/test/API/functionalities/expr-result-var/TestCPPExprResult.py
R lldb/test/API/functionalities/expr-result-var/two-bases.cpp
Log Message:
-----------
Revert "Make result variables obey their dynamic values in subsequent expressions" (#211321)
This reverts commit 8b9cce358bef26ae4cb9275dd6a43f903bafbaa0.
This causes failures running expressions that return ObjC types on
x86-64 macOS but not on arm64 macOS.
Reverting till I can figure out why that's happening.
Commit: 50563d22356cd68f5d134027ff594308d273f4be
https://github.com/llvm/llvm-project/commit/50563d22356cd68f5d134027ff594308d273f4be
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-07-15.md
Log Message:
-----------
[flang] Add Flang Call Notes for 7/15/26 meeting (#211284)
Commit: 4e833e21cce5966ff9617f048ad40226ed60ca70
https://github.com/llvm/llvm-project/commit/4e833e21cce5966ff9617f048ad40226ed60ca70
Author: lntue <lntue at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/FPExceptMatcher.cpp
M libc/test/UnitTest/FPMatcher.h
M libc/test/UnitTest/RoundingModeUtils.cpp
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/smoke/CanonicalizeTest.h
M libc/test/src/math/smoke/FModTest.h
M libc/test/src/math/smoke/NearbyIntTest.h
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
Log Message:
-----------
[libc] Add missing functions in FEnvImpl.h under LIBC_MATH_USE_SYSTEM_FENV config. (#211303)
Commit: 8c556564a2199e13f59dc43bfa5ef4345a89ae3b
https://github.com/llvm/llvm-project/commit/8c556564a2199e13f59dc43bfa5ef4345a89ae3b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/test/Transforms/LowerMatrixIntrinsics/phi.ll
Log Message:
-----------
[Matrix] Use incoming terminator as insert point in visitPHI. (#211211)
For some instructions, like invoke, getInsertionPointAfterDef may return
an std::nullopt. Using the insert point after the phi is then incorrect.
Use the incoming terminator as default insert point to fix a crash in
the added test cases.
PR: https://github.com/llvm/llvm-project/pull/211211
Commit: 8ae7803bede98cca73e6fd6a8fabbf95da9d0b46
https://github.com/llvm/llvm-project/commit/8ae7803bede98cca73e6fd6a8fabbf95da9d0b46
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Target/Cpp/common-cpp.mlir
Log Message:
-----------
[mlir][emitc] Add compound assignment ops (#210233)
Commit: b47174d1d1adca974494d12ba54bd793075c930a
https://github.com/llvm/llvm-project/commit/b47174d1d1adca974494d12ba54bd793075c930a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (#210543)
Add member functions to create wide load/store and migrate various sites
to use them.
It also updates makeMemOpWideningDecisions to use it. For consistency,
ReplaceWith has been updated to always require inserted recipes.
PR: https://github.com/llvm/llvm-project/pull/210543
Commit: 6f2ba122cbd047c77ec6ab26598523c7aa4ef853
https://github.com/llvm/llvm-project/commit/6f2ba122cbd047c77ec6ab26598523c7aa4ef853
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
A lldb/test/Shell/SymbolFile/DWARF/wasm-data-symbol.yaml
Log Message:
-----------
[lldb] Synthesize data symbols for plain C globals on WebAssembly (#211301)
The Wasm name section names functions but not data, so LLDB recovers
data symbols from the DWARF. It only did so for variables with a linkage
name, such as a C++ vtable, so a plain C global, which has only a
DW_AT_name, got no symbol and its address did not resolve back to a
name. Use the source name when there is no linkage name.
Commit: 543160345be41f399c142f51355408362988f44e
https://github.com/llvm/llvm-project/commit/543160345be41f399c142f51355408362988f44e
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
R llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll
Log Message:
-----------
Revert "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (#211341)
Reverts llvm/llvm-project#206597
Causes verifier issues:
https://github.com/llvm/llvm-project/pull/206597#issuecomment-5049789740
Commit: 255d0013789d75187179264e8b026b04fd109bc3
https://github.com/llvm/llvm-project/commit/255d0013789d75187179264e8b026b04fd109bc3
Author: Spencer Bryngelson <shb at gatech.edu>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
A flang/test/Lower/OpenMP/implicit-map-flat-allocatable-no-mapper.f90
M flang/test/Lower/OpenMP/implicit-map-pointer-no-default-mapper.f90
Log Message:
-----------
[flang][OpenMP] Don't emit implicit default mapper for flat allocatable derived types (#209645)
An allocatable or pointer capture of a derived type in a `target` region
triggers
synthesis of an implicit default declare mapper for the type. The gate
keyed only on
whether the captured *variable* was allocatable, not on whether the
*type* needs a
mapper:
```cpp
if (!isPointer && (hasDefaultMapper || isAllocatable)) {
```
For a flat type -- all components trivially mappable, no
allocatable/pointer/nested
record members -- the mapper is unnecessary. The object maps as a plain
bulk copy.
Emitting a mapper anyway lowers to a per-element, per-component mapper
walk in the
offload runtime (`targetDataBegin` -> `targetDataMapper` ->
`targetDataBegin`, and the
mirror walk in `targetDataEnd`), which is `O(num_elements *
num_components)` per kernel
invocation. On a large device-resident allocatable array this busy-loops
the host for
minutes with the GPU idle.
`Fortran::lower::omp::requiresImplicitDefaultDeclareMapper()` already
answers whether a
type requires a mapper (allocatable/pointer/nested-record components, or
ISO-C interop),
but the allocatable-capture path never consulted it. This gates on it:
```cpp
if (!isPointer &&
(hasDefaultMapper ||
(isAllocatable && requiresImplicitDefaultDeclareMapper(*typeSpec)))) {
```
Pointer captures and user/pre-existing declare mappers are unaffected. A
flat allocatable
now maps as descriptor + base-address + attach entries with no
`mapper()` attribute --
identical to the pointer path.
### Reproducing the runtime cost
Reported against the AMD ROCm flang runtime as ROCm/llvm-project#3385. A
flat derived type
(`ghost_point`-like) in a device-resident allocatable array, mapped
implicitly across many
kernel invocations, hangs for minutes. `perf` on the hang shows all time
in per-component
work: `DenseMap` insert into the mapping-state tables, `targetDataEnd`'s
mirror walk, and
`SourceInfo` construction -- each `O(1)`/`O(log M)` per entry, so the
total is linear in
`M = num_elements * num_components * kernel_invocations` with a large
constant. Suppressing
the mapper collapses `M` to one bulk entry.
### Tests
- `implicit-map-flat-allocatable-no-mapper.f90`: new; a flat allocatable
capture emits no
mapper.
- `implicit-map-pointer-no-default-mapper.f90`: the type now has an
allocatable component
so it still requires a mapper (keeps the pointer-vs-allocatable
distinction meaningful).
- `derived-type-map.f90`, `defaultmap.f90`: updated; these asserted a
mapper for a flat
allocatable capture, which is the behavior being removed.
### AI tool usage
Per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html): this change was
developed with substantial assistance from Claude (Opus 4.8) and
reviewed by the author. The
root-cause analysis, the patch, the tests, and this description were
AI-assisted; the reproducer
and the offload-runtime `gdb`/`perf` profiling on an AMD Instinct MI250X
(HPC Fund) that confirmed
the runtime cost is linear (not a runtime bug) were part of that
workflow. Also noted as an
`Assisted-by:` trailer in the commit.
Commit: a9a25dfa49e1c8c1e16d36872fa55e0f1a37718b
https://github.com/llvm/llvm-project/commit/a9a25dfa49e1c8c1e16d36872fa55e0f1a37718b
Author: Nikhil Kotikalapudi <Nikhil.Kotikalapudi at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/RegisterClassInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/CodeGen/FEntryInserter.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/IfConversion.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/KCFI.cpp
M llvm/lib/CodeGen/LiveRangeShrink.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PatchableFunction.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PostRASchedulerList.cpp
M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TailDuplication.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp
M llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
M llvm/lib/Target/AArch64/AArch64SRLTDefineSuperRegs.cpp
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/ARM/A15SDOptimizer.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/MLxExpansionPass.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86CallFrameOptimization.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86DynAllocaExpander.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/Target/X86/X86SuppressAPXForReloc.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
A llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-invalidate-rci.mir
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
Log Message:
-----------
[CodeGen] Add MachineRegisterClassInfo analysis pass (#210826)
Which is a wrapper of RegisterClassInfo.
This can cache the result of RegisterClassInfo and hence
we can reduce compile time.
Supercedes https://github.com/llvm/llvm-project/pull/120690,
https://github.com/llvm/llvm-project/pull/164877
---------
Co-authored-by: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Co-authored-by: Patrick Simmons <patrick.simmons at amd.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: be34b478bf3b82ac3b447b17e2b7e73447c9c8dd
https://github.com/llvm/llvm-project/commit/be34b478bf3b82ac3b447b17e2b7e73447c9c8dd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Dialect/Math/canonicalize.mlir
Log Message:
-----------
[mlir][math] Fold FPowIOp with square-and-multiply to match powi expansion (#210982)
Fold math.fpowi using the base's own floating-point semantics via
iterative
square-and-multiply, matching the multiply sequence ExpandPowI builds in
SelectionDAGBuilder. The prior pow/powf-based fold computed in
float/double
and rounded differently from the runtime expansion, disagreeing with
x**n by ~1 ULP.
Commit: 3e6d5937389ff34243b58b70af0282c6c9174021
https://github.com/llvm/llvm-project/commit/3e6d5937389ff34243b58b70af0282c6c9174021
Author: Tshaka Lekholoane <mail+git at tshaka.dev>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
Log Message:
-----------
[Clang] Add C++11/C23-style spellings for Swift import attributes (#183484)
Swift interop attributes such as `swift_name`, `swift_attr`, and
`swift_private` previously only supported GNU-style spelling. Add the
missing `[[]]` attribute spellings for C++11 and C23 compatibility,
bringing them in line with other Clang attributes.
Commit: 7e9782bad19c1995d350415f5e68c6d68330f69f
https://github.com/llvm/llvm-project/commit/7e9782bad19c1995d350415f5e68c6d68330f69f
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
R clang/test/ParserHLSL/hlsl_contained_type_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_is_array_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_is_ms_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_resource_dimension_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_contained_type_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_array_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_ms_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_rov_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_raw_buffer_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_resource_class_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_resource_dimension_attr_error.hlsl
Log Message:
-----------
[HLSL] Move sema tests out of ParserHLSL into SemaHLSL/Attributes (#211353)
This PR moves sema tests that were misplaced in `clang/test/ParserHLSL`
into a more appropriate location: `clang/test/SemaHLSL/Attributes`
These tests exercise `[[hlsl::...]]` attribute (resource_class,
contained_type, is_array, is_ms, is_rov, raw_buffer, dimension)
diagnostics from `DiagnosticSemaKinds.td`, relating to:
- 'hlsl::X' attribute cannot be applied to a declaration
- attribute takes one argument / takes no arguments
- can be used only on HLSL intangible type '__hlsl_resource_t'
- attribute is already applied / applied with different arguments
- ResourceClass attribute argument not supported
Which are appropriately related to semantics rather than parsing.
Commit: 3140a6478c782dcf9e26dbaedb7dd684be571bdf
https://github.com/llvm/llvm-project/commit/3140a6478c782dcf9e26dbaedb7dd684be571bdf
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/atomic.ll
R llvm/test/Assembler/invalid-atomicrmw-xchg-fp-vector.ll
A llvm/test/Assembler/invalid-atomicrmw-xchg.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/Transforms/AtomicExpand/Mips/atomicrmw-vector.ll
M llvm/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[IR] Allow vector atomicrmw xchg (#208510)
Previously, we only allowed vector `atomicrmw xchg` for `elementwise`
`atomicrmw`. Relax this restriction. By default, expand these by casting
to integer.
This is a follow-up on: https://github.com/llvm/llvm-project/pull/190716
Assisted by AI.
Commit: c8b363e4cdc31be8fd842f60430d66827af6ab15
https://github.com/llvm/llvm-project/commit/c8b363e4cdc31be8fd842f60430d66827af6ab15
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenACC/acc-routine-generic.f90
Log Message:
-----------
[flang][acc] Reject generic interface name in acc routine (#211269)
OpenACC ties the named argument of a ROUTINE directive to a subroutine
or function. A generic interface name is therefore not a valid target.
Thus adding an explicit check for this plus informational error message.
Commit: 5b614d16bff2d78854f9f2683a84eec51ce2dcb4
https://github.com/llvm/llvm-project/commit/5b614d16bff2d78854f9f2683a84eec51ce2dcb4
Author: PiJoules <leonardchan at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
A llvm/test/Instrumentation/AddressSanitizer/instrument-initializer-dbgloc.ll
Log Message:
-----------
[asan] Add !dbg metadata to __asan_after/before_dynamic_init calls (#211086)
We get this error when linking the kernel with a custom asan runtime
```
= note: inlinable function call in a function with debug info must have a !dbg location
call void @__asan_after_dynamic_init()
```
The verifier throws this because __asan_after_dynamic_init doesn't have
!dbg but it is inlinable into the module ctor that invokes it which does
have !dbg. Normally, these functions aren't inlinable because they're
provided by some prebuilt library, but for Fuchsia's kernel, we provide
a custom runtime defining these and it's built with LTO which does make
it inlinable.
The fix in this patch is just adding the !dbg metadata to these calls
which I think should be non-intrusive.
NOTE: Gemini was used to make the test.
Commit: c85d1c54c5fba6344b117e369328a4b9b5a1386b
https://github.com/llvm/llvm-project/commit/c85d1c54c5fba6344b117e369328a4b9b5a1386b
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/ARM/coalesce-copy-undef.ll
A llvm/test/CodeGen/ARM/coalesce-copy-undef.mir
Log Message:
-----------
[CodeGen] Ensure `undef` propagation when an undef copy is eliminated if used as a subregister def (#204039)
If we eliminate an `undef` copy and there is a use of the copy that
`isDef` on just a sub-register, mark it as `undef`.
Fixes #204036.
Commit: dc698fa68ce1bd513cefa69cc21b113e754b8173
https://github.com/llvm/llvm-project/commit/dc698fa68ce1bd513cefa69cc21b113e754b8173
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-device-global-cycle.fir
Log Message:
-----------
[flang][cuda] Break circular global init when copying them to the GPU module (#211100)
PTX does not support cycle in globals.
```
error: Circular dependency found in global variable set
```
To avoid cycle in type descriptor, check if there is a cycle and break
it.
The algorithm uses Tarjan’s strongly connected components algorithm for
finding strongly connected components in a directed graph.
- Each fir.global is a graph node.
- Each fir.address_of in a global initializer is an edge to another
global.
- An SCC containing multiple globals—or a self-edge—represents a
circular initializer dependency.
Commit: fd5af7efad7ff39a14d49702de4377117e741f51
https://github.com/llvm/llvm-project/commit/fd5af7efad7ff39a14d49702de4377117e741f51
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
Log Message:
-----------
[MLIR][Python] Avoid printing an unset nanobind include directory (#211240)
`nanobind_INCLUDE_DIR` is only populated when MLIR discovers nanobind
through the Python package. When `nanobind_DIR` is supplied explicitly,
the variable remains unset and the configuration output contains an
empty path:
```
Found nanobind v2.13.0:
```
The nanobind CMake package location is already reported by both
discovery paths.
We can only print the detected nanobind version in the final status
message. Or maybe if we want we can find the include dir for the
explicit path too and merge them to `nanobind_INCLUDE_DIR` but I think
this is better.
Commit: 410dad05ab02a246112d5cb03d27ed87a5e9e607
https://github.com/llvm/llvm-project/commit/410dad05ab02a246112d5cb03d27ed87a5e9e607
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
Log Message:
-----------
[BranchFolding] Refactor AreConditionalsEqual to Helper (#211270)
As suggested in
https://github.com/llvm/llvm-project/pull/203110#discussion_r3628548201.
Commit: d33e8d81ac5ccb5164fe11cd38885ca5cfbaed91
https://github.com/llvm/llvm-project/commit/d33e8d81ac5ccb5164fe11cd38885ca5cfbaed91
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/wide-store.ll
Log Message:
-----------
[SLP][NFC]Add a test with non-profitable wide vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211367
Commit: 3093d8c577d71a98ec4d9a2bdf26b196cc7a0f8d
https://github.com/llvm/llvm-project/commit/3093d8c577d71a98ec4d9a2bdf26b196cc7a0f8d
Author: Paulius Velesko <pvelesko at pglc.io>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/test/Driver/hipspv-toolchain.hip
Log Message:
-----------
[HIPSPV] Preserve device debug info requested via -g
HIPSPVToolChain::adjustDebugInfoKind() unconditionally forced NoDebugInfo,
so compiling HIP device code with -g produced SPIR-V with no debug metadata.
Debuggers such as Intel's gdb-oneapi could therefore not resolve source
lines or local variables in offloaded kernels. The stated reason for
disabling it (the SPIRV-LLVM-Translator aborting on DW_OP_LLVM_convert) no
longer applies, as the translator now lowers that operation.
Stop clobbering the requested debug level, and when -g is given emit debug
info in the NonSemantic.Shader.DebugInfo form
(--spirv-debug-info-version=nonsemantic-shader-200), enabling the required
SPV_KHR_non_semantic_info extension. The default (no -g) output is
unchanged.
Also enable SPV_INTEL_optnone when -g is requested. At -O0 Clang marks
functions optnone; preserving that attribute lets gdb-oneapi inspect kernel
arguments and locals instead of reporting them as <optimized out>. The
extension is a no-op at -O1 and above.
Reported downstream: CHIP-SPV/chipStar#1004
Commit: 252f31a6893b6a3dcb8b2a404e13933e376bf36b
https://github.com/llvm/llvm-project/commit/252f31a6893b6a3dcb8b2a404e13933e376bf36b
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/test/Analysis/dangling-ptr-deref.cpp
Log Message:
-----------
[analyzer] Detect dangling pointers passed to function calls (#211045)
In order to detect if a dangling pointer is passed to a function the
analyzer has to inspect each call argument. For that reason I have
implemented the `checkPostCall` for the `DanglingPtrDeref` checker to
check if an argument passed to a function is dangling. Since
`checkLocation` only catches dereferences and cannot reason about
whether an argument passed to a function is dangling it cannot detect
these type of bugs alone.
Commit: f1483ea484bafdf5e7ec6f17e94f7200256aa0e5
https://github.com/llvm/llvm-project/commit/f1483ea484bafdf5e7ec6f17e94f7200256aa0e5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/ptrtoint.ll
R llvm/test/Transforms/IndVarSimplify/AArch64/expand-ptrtoaddr-reuse-ptrtoint.ll
A llvm/test/Transforms/IndVarSimplify/AArch64/ptrtoaddr-ptrtoint.ll
A llvm/test/Transforms/IndVarSimplify/X86/ptrtoaddr-narrow-pointer.ll
A llvm/test/Transforms/LoopStrengthReduce/AArch64/expand-ptrtoaddr-reuse-ptrtoint.ll
A llvm/test/Transforms/PhaseOrdering/X86/ptrtoaddr-ptrtoint.ll
Log Message:
-----------
[PhaseOrdering] Add more tests for expanding ptr SCEVs (NFC) (#211360)
Add more test cases requiring pointer-based SCEVs for
https://github.com/llvm/llvm-project/pull/180244.
Commit: b4a12eb394f195d9f98a20727638a1cb52ce6727
https://github.com/llvm/llvm-project/commit/b4a12eb394f195d9f98a20727638a1cb52ce6727
Author: adams381 <adams at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/CIR/CIRToCIRPasses.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64.c
Log Message:
-----------
[CIR] Add opt-in flag to run x86_64 call-conv lowering (#211335)
The x86_64 System V classifier and the CallConvLowering pass that drives
it are already in the tree, but nothing runs them: the -fclangir
pipeline never adds the pass, so CIR still emits uncoerced aggregate
signatures on x86_64 and its LLVM output diverges from classic CodeGen
for anything passed or returned in registers.
This adds the cc1 flag -clangir-enable-call-conv-lowering, off by
default like -clangir-enable-idiom-recognizer, and runs the pass in
runCIRToCIRPasses right after CXXABILowering, which has already reduced
C++ ABI types to plain records the classifier can handle. The flag is
gated on x86_64. On other targets it is a silent no-op, so a driver can
set it unconditionally without breaking non-x86_64 builds. The AVX level
is fixed at None because the classifier's current supported subset has
no >128-bit vector aggregate where the level would change the result.
With the flag on, supported scalars and small aggregates are coerced to
match classic CodeGen: sign/zero-extended narrow integers, SSE scalars,
one- and two-eightbyte INTEGER/SSE struct coercion, ignored empty
structs, sret returns, and byval arguments. Types the classifier does
not yet handle — unions, long double, and float aggregates that classify
to an SSE vector — still errorNYI when the flag is on. CIR does emit
noalias on byval parameters where classic CodeGen does not, which the
test documents with split prefixes.
Commit: 8eb0419275536508701246b7e7c47efb5a4fbe1f
https://github.com/llvm/llvm-project/commit/8eb0419275536508701246b7e7c47efb5a4fbe1f
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
A llvm/test/CodeGen/SPIRV/structurizer/merge-exit-switch.ll
Log Message:
-----------
[SPIRV] Support switch terminators when merging region exits (#209859)
fixes #209310
This change fixes the `llvm_unreachable("Unhandled terminator type.")`
crash in `createExitVariable` when a convergence region's exit block
ends in a switch instruction.
To handle the SwitchInst properly we needed to:
1. Build a select chain keyed on the switch condition, using the default
destination as the fallback value and skipping successors that are
internal to the region. This is an almost exact copy of what already
exists for `CondBrInst`.
2. Modify the SPIRVStructurizer.cpp `splitSwitchCases`to removes a case
whose target is the default destination instead of splitting it into a
new successor block.
Assisted by Claude Opus 4.8
Commit: 2bc3ca68d169e7c67db6ad5f364e1488f0c2abeb
https://github.com/llvm/llvm-project/commit/2bc3ca68d169e7c67db6ad5f364e1488f0c2abeb
Author: David Young <davidayoung at meta.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Set up windows specific cmake defines for lldb bazel build and config for LZMA (#205823)
Adds an @platforms//os:windows branch to the ConfigHeader
expand_template OS select(), alongside the
existing macos/linux branches. On Windows the POSIX-oriented features
are disabled (HAVE_PTSNAME_R,
LLDB_ENABLE_POSIX, LLDB_ENABLE_TERMIOS → 0) and the platform-detection
macros (HAVE_LIBCOMPRESSION,
HAVE_*_PROCESS_VM_READV, HAVE_PPOLL, HAVE_SYS_EVENT_H,
LLDB_ENABLE_LIBXML2, LLDB_HAVE_EL_RFUNC_T) are
set to their Windows values. This complements the recently added Windows
process plugin (#203146) so a
Windows-configured lldb gets a correct Config.h. Python stays disabled
on Windows (base default
LLDB_ENABLE_PYTHON 0).
Continuing to work backwards from Meta's internally working buck2 build
that is translated from this bazel. This lacked windows select entirely,
so porting back what we ended up needing. There are still some changes
needed on the build targets, but leave those to a follow up diff as I
would hope build signals should be clean with this?
https://github.com/llvm/llvm-project/pull/201173 originally started full
windows support and there were more changes to get it working on a
remote build in
https://github.com/hermeticbuild/hermetic-llvm/pull/582/changes#diff-da3f010352329507a9e1e3f1dc911ae4ba69ba9747ce15e5eb76fbefe5f829b3.
If we look at
3rd_party/llvm-project/22.x/patches/lldb-windows-config-header.patch in
the previous patch, it lines up with what we have here.
Meta does package LZMA support into our windows build, so switching to a
config to control that.
Commit: 9b4b8773a15c90ffdcb5826f886495c106a12211
https://github.com/llvm/llvm-project/commit/9b4b8773a15c90ffdcb5826f886495c106a12211
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2.ll
Log Message:
-----------
[SLP][AArch64]Support masked div/rem on non-pow-2 vectors
For fixed-width integer div/rem on AArch64 SVE, a non-power-of-2 vector
cannot execute as a single whole-register operation. When profitable,
pad the vector to the next full register and use the masked div/rem
intrinsics.
Fixes #207880
Reviewers: RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/210623
Commit: f2a284b4732b2b568315d5b8f2e36a96eed23f8a
https://github.com/llvm/llvm-project/commit/f2a284b4732b2b568315d5b8f2e36a96eed23f8a
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M .github/workflows/release-sources.yml
Log Message:
-----------
workflows/release-sources: Add missing checkout for composite action (#211079)
We need to explicitly checkout
.github/workflows/validate-release-version if we are going to use it.
Commit: 2662e2e3ff1d7912bdcd02c3733b6c7c8e2b6a97
https://github.com/llvm/llvm-project/commit/2662e2e3ff1d7912bdcd02c3733b6c7c8e2b6a97
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
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Log Message:
-----------
[clang-tidy][docs] Rename short check docs to Markdown (#210466)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 30d892e8159b4103f0f171439c05479cbc50d917
https://github.com/llvm/llvm-project/commit/30d892e8159b4103f0f171439c05479cbc50d917
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/abseil/cleanup-ctad.md
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M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-float.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/no-internal-dependencies.md
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M clang-tools-extra/docs/clang-tidy/checks/abseil/redundant-strcat-calls.md
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M clang-tools-extra/docs/clang-tidy/checks/llvm/prefer-register-over-unsigned.md
M clang-tools-extra/docs/clang-tidy/checks/llvm/qualified-auto.md
M clang-tools-extra/docs/clang-tidy/checks/llvm/use-new-mlir-op-builder.md
M clang-tools-extra/docs/clang-tidy/checks/llvmlibc/callee-namespace.md
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M clang-tools-extra/docs/clang-tidy/checks/performance/implicit-conversion-in-loop.md
M clang-tools-extra/docs/clang-tidy/checks/performance/inefficient-algorithm.md
M clang-tools-extra/docs/clang-tidy/checks/performance/move-constructor-init.md
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M clang-tools-extra/docs/clang-tidy/checks/performance/use-std-move.md
M clang-tools-extra/docs/clang-tidy/checks/portability/no-assembler.md
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-const-params-in-decls.md
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-nested-conditional-operator.md
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.md
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.md
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.md
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-cast.md
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.md
M clang-tools-extra/docs/clang-tidy/checks/readability/misplaced-array-index.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-function-ptr-dereference.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-smartptr-get.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.md
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-subscript-expr.md
M clang-tools-extra/docs/clang-tidy/checks/readability/static-definition-in-anonymous-namespace.md
M clang-tools-extra/docs/clang-tidy/checks/readability/use-std-min-max.md
M clang-tools-extra/docs/clang-tidy/checks/zircon/temporary-objects.md
Log Message:
-----------
[clang-tidy][docs] Rewrite short check docs to Markdown (#210467)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #210466 , which will be a standalone
commit that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
I chose to do 211 files at once in this large batch because they were
all short, i.e. less than 30 lines, so they all have very uncomplicated
reST, which doesn't require much review, or fancy rewriting.
This was prepared with rst2myst plus LLM-assisted cleanup, and the
changes are broken into two commits, mechanical, and LLM cleanup.
Commit: d7544537bce1e3247b563b75206733752f10338b
https://github.com/llvm/llvm-project/commit/d7544537bce1e3247b563b75206733752f10338b
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/docs/UsersManual.md
Log Message:
-----------
[clang][docs] Fix markdown migration defects in the user manual (#210785)
First, replace all the `{eval-rst}` blocks for option documentation with
`:::{option}` fences. This means authors won't have to bounce between
markup languages within one file, and removes more semantic indentation,
which has been a recurring problem.
Second, remove blockquotes that seem unintentional. None of these are
real quotes, and they seem like artifacts of unintended indentation
before the Markdown migration (#208310).
---------
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: a8228369cae4a84150d19f4193206249b76187a0
https://github.com/llvm/llvm-project/commit/a8228369cae4a84150d19f4193206249b76187a0
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A bolt/docs/NewBackend.md
M bolt/docs/index.md
Log Message:
-----------
[BOLT][docs] New backend guide (#211382)
Add a brief doc with BOLT-specific guidance for adding a new backend.
Commit: 5f88e49e8c24c5b799872b4331d35b5406d3c213
https://github.com/llvm/llvm-project/commit/5f88e49e8c24c5b799872b4331d35b5406d3c213
Author: Usama Hameed <u_hameed at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
A llvm/test/Transforms/GVN/pre-no-hoist-across-lifetime.ll
Log Message:
-----------
[MemDep] Treat partial-overlap lifetime.start as a clobber (#211167)
When getSimplePointerDependencyFrom scans backward and reaches a
@llvm.lifetime.start, it only treated the marker as a barrier when the
query location MustAliased the lifetime's argument, and otherwise fell
through to `continue`. For a load through a GEP into part of an alloca
the alias result is PartialAlias, so the scan walked past lifetime.start
as if it weren't there, and GVN Load PRE would hoist the load above it.
Inspect the full alias result instead of just isMustAlias: MustAlias
still returns Def and NoAlias still continues, but any partial/may
overlap now returns a Clobber so lifetime.start acts as a barrier and
the access cannot be moved above it.
Fixes #194940
Commit: 11542f5bf4aedcc15bf37a02a3cb44f187ce588c
https://github.com/llvm/llvm-project/commit/11542f5bf4aedcc15bf37a02a3cb44f187ce588c
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb][test] Reinforce formatter bytecode unit tests (#211042)
rdar://176903081
Assisted-by: claude
Commit: 1ba2d936971c52b5fd8741fc980c7c11c7522597
https://github.com/llvm/llvm-project/commit/1ba2d936971c52b5fd8741fc980c7c11c7522597
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/test/CAPI/rewrite.c
Log Message:
-----------
[mlir-c] Fix pattern-set leak in rewrite.c materialization tests (#211358)
The `TypeConverter` materialization tests added in #208934 (`testTypeConverterSourceMaterialization` / `testTypeConverterTargetMaterialization`) freeze their `MlirRewritePatternSet` but never destroy it.
This was caught by LeakSanitizer on the aarch64 HWASan bootstrap bot ([builder 55, build
30763](https://lab.llvm.org/buildbot/#/builders/55/builds/30763)):
Fix: call `mlirRewritePatternSetDestroy(patterns)` after freezing in both tests, matching existing usage.
Assisted by: Claude
Commit: 46a493beaafa82219d796b4150662257af232a5b
https://github.com/llvm/llvm-project/commit/46a493beaafa82219d796b4150662257af232a5b
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/IR/Instruction.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
A llvm/test/Transforms/ArgumentPromotion/call_memprof.ll
A llvm/test/Transforms/Attributor/call_memprof.ll
A llvm/test/Transforms/DeadArgElim/call_memprof.ll
A llvm/test/Transforms/ExpandVariadics/call_memprof.ll
Log Message:
-----------
[MemProf] Fix memprof metadata propagation issue (#211373)
Fixes a few places where optimizations were dropping memprof related
metadata when creating new calls. Adds a new facility that can be used
to propagate profile and debug metadata, and employs that in the passes
that were manually specifying just MD_prof and MD_dbg.
Commit: 37879dc3049378443c156db0f5e01e97c859b5bf
https://github.com/llvm/llvm-project/commit/37879dc3049378443c156db0f5e01e97c859b5bf
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine-mixed-scope.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine.mlir
Log Message:
-----------
[mlir][OpenACC] Preserve worker rows when combining reductions (#210804)
Example:
```fortran
!$acc parallel loop gang worker reduction(+:sum)
do j = 1, n
!$acc loop vector reduction(+:sum)
do i = 1, n
sum = sum + a(i, j)
end do
end do
```
In this code, each worker has a private partial result, but combine
predication previously allowed only ThreadY row zero to contribute.
Fix: keep ThreadY active only for proven atomic worker combines, while
preserving legacy predication or reporting NYI for unsafe combinations.
Commit: c1cd7d16fa689dfcb08df24652c0de3fa5b68c43
https://github.com/llvm/llvm-project/commit/c1cd7d16fa689dfcb08df24652c0de3fa5b68c43
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenACC/acc-routine-generic.f90
Log Message:
-----------
[flang][acc] Permit acc routine for specific name (#211386)
After https://github.com/llvm/llvm-project/pull/211269 a generic
interface name is rejected in acc routine. This PR relaxes this by
allowing it when the interface name and the specific are the same - and
attaches the information to the specific itself.
Commit: d1c59832255332b3442c24b5cc1cb51664a23382
https://github.com/llvm/llvm-project/commit/d1c59832255332b3442c24b5cc1cb51664a23382
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][OpenACC] Support dynamic multi-rank array reductions (#211336)
Example:
```fortran
integer :: r(:,:)
!$acc parallel loop reduction(+:r)
```
In this code, the reduction accumulator has dynamic dimensions and rank
greater than one.
Fix: use runtime dimension sizes to delinearize flattened
array-reduction indices.
Commit: c832c386ad09091f926f5a6c7e087ca127cde1b2
https://github.com/llvm/llvm-project/commit/c832c386ad09091f926f5a6c7e087ca127cde1b2
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
M llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
Log Message:
-----------
[NVPTX] Move addrspacecast Isel to TableGen (#211306)
Commit: 9bdf7b60cfc6d02a943004729210b429630e3d26
https://github.com/llvm/llvm-project/commit/9bdf7b60cfc6d02a943004729210b429630e3d26
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
Log Message:
-----------
[AMDGPU] Fix legalization of V_PK_*64 SGPR to VGPR change (#211357)
Special case for V_PK_*64 instructions: these do not have OPSEL but SGPR
sources behave like OPSEL is set replicating low 64-bits into high. VGPR
sources in turn read actual 4 registers. To move operand from an SGPR to
a VGPR we need to replicate low half.
Commit: 9521d0c03324fb5950727522cdf71d94fd3f68b1
https://github.com/llvm/llvm-project/commit/9521d0c03324fb5950727522cdf71d94fd3f68b1
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Unify CompletionChunkKind.__str__ representation (#210676)
This completes the first step of
https://github.com/llvm/llvm-project/issues/156680
This change is a follow-up to
https://github.com/llvm/llvm-project/pull/176631, following the release
branching, to ensure a one release-cycle deprecation period.
Commit: b66aac64ed3fdb50ce47dd7bbb0ded13c326a132
https://github.com/llvm/llvm-project/commit/b66aac64ed3fdb50ce47dd7bbb0ded13c326a132
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR][NFC] Remove unused LLVM lowering for cir.await (#211143)
`cir.await` is always eliminated by the FlattenCFG pass before the
DirectToLLVM conversion. Since the operation never reaches LLVM
lowering, remove the unused lowering implementation.
Commit: f5f64f81f686b3af7a9ec103e995dffecb10b1bf
https://github.com/llvm/llvm-project/commit/f5f64f81f686b3af7a9ec103e995dffecb10b1bf
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A llvm/test/tools/llvm-profgen/X86/Inputs/invalid-short-lbr.perfscript
A llvm/test/tools/llvm-profgen/X86/invalid-short-lbr.test
M llvm/tools/llvm-profgen/PerfReader.cpp
Log Message:
-----------
[llvm-profgen] Fix isLBRSample check for 1-deep brstack (#211182)
`isLBRSample` in `checkPerfScriptType` currently don't differentiate the
LBR records in hybrid sample (LBR+Stack) or an LBR sample. It checks
"0x" and "/" for the second pair as a unified way to tell whether the
record is an LBR pair. However, this requires a minimal of 2 pairs of
hybrid LBR samples, otherwise, even a valid LBR record will fail the
`isLBRSample` check. This fix adds an initial check for "0x" and "/" for
the first LBR record so we can handle the case where only 1 pair of LBR
record exists in the hybrid sample.
Commit: 04f124f6151e8c8410e28aba28dc38e590e34c58
https://github.com/llvm/llvm-project/commit/04f124f6151e8c8410e28aba28dc38e590e34c58
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[github] Move BOLT reviewers to team (#211422)
Use https://github.com/orgs/llvm/teams/reviewers-bolt in place of
reviewers list, similar to runtimes.
Commit: f90fca77facb3af3069216d9def535bdb3a08c83
https://github.com/llvm/llvm-project/commit/f90fca77facb3af3069216d9def535bdb3a08c83
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-07-01.md
Log Message:
-----------
[flang] Add Flang Community Call Notes for July 1 (#207055)
Commit: 8eca60b49ada8d62e53a3c20dfd157adbe4e4e04
https://github.com/llvm/llvm-project/commit/8eca60b49ada8d62e53a3c20dfd157adbe4e4e04
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/add_new_check.py
Log Message:
-----------
[clang-tidy] Generate Markdown documentation for new checks (#210574)
Update `add_new_check.py` to generate MyST Markdown documentation for
new checks.
Part of https://github.com/llvm/llvm-project/issues/201242
Commit: d0ec2ec1f2f7f265d07026cefa73956ddce5e87f
https://github.com/llvm/llvm-project/commit/d0ec2ec1f2f7f265d07026cefa73956ddce5e87f
Author: hehuan <111408804+xxxxbc at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/NamedParameterCheck.cpp
M clang-tools-extra/clang-tidy/readability/NamedParameterCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/named-parameter-ignored-types.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/named-parameter.cpp
Log Message:
-----------
[clang-tidy] Ignore standard tag dispatch types in readability-named-parameter (#208730)
Parameters whose type is a standard tag type (e.g. std::in_place_t,
std::nothrow_t,
iterator tags, lock tags) are used purely for overload resolution and
don't need
a name. This patch skips them.
Added an IgnoredTypes option so users can customize the list. Default
covers 24
standard tag types.
Fixes #208448.
AI Usage: This commit is AI-assisted, reviewed and verified by me.
Commit: 3b057c340fd148fed95df1cb56dc4c2ab45ab0e2
https://github.com/llvm/llvm-project/commit/3b057c340fd148fed95df1cb56dc4c2ab45ab0e2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/include/mlir-c/Rewrite.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/test/CAPI/rewrite.c
Log Message:
-----------
[mlir-c] Add 1:N TypeConverter conversion and materialization bindings (#208935)
Builds on the source/target materialization C bindings (#208934) to
expose the 1:N dialect-conversion functionality through the MLIR C API.
Continues the buildout of the dialect-conversion C bindings (follows
#206146 and #206161).
Assisted by: Claude
Commit: 21a38909729b5c117b3936eeed640f4054906443
https://github.com/llvm/llvm-project/commit/21a38909729b5c117b3936eeed640f4054906443
Author: Sophia Herrmann <herrmann15 at llnl.gov>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M offload/liboffload/API/Device.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
Log Message:
-----------
[Offload] Add numLanes device info to liboffload (#211380)
This adds `OL_DEVICE_INFO_NUM_LANES` to the Offload API device-info enum
and wires it through `olGetDeviceInfo`.
Commit: 8bd1cdad89d8cf70928cf4b043177f484c40c469
https://github.com/llvm/llvm-project/commit/8bd1cdad89d8cf70928cf4b043177f484c40c469
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyOptimizeLiveIntervalsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/209958
Commit: 70235228b16b9e4ed5d38ab0b733ec43c2c3ba71
https://github.com/llvm/llvm-project/commit/70235228b16b9e4ed5d38ab0b733ec43c2c3ba71
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
A .github/workflows/compiler-rt-libc-builtins-tests.yml
Log Message:
-----------
[CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (#200196)
Add Pre-commit CI to test compiler-rt builtins with libc to check it
works without issues
Split from #197950
Part of #197824
---------
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 5efe31fae4264659bd4ff5c071a68637e1ac1704
https://github.com/llvm/llvm-project/commit/5efe31fae4264659bd4ff5c071a68637e1ac1704
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
Log Message:
-----------
[Analysis][NFC] Remove redundant include SCCIterator.h from BranchProbabilityInfo (#211259)
It becomes redundant after 35d69e3fe344.
Commit: 580604f1f3cbdd643a53e086265140a0b2805c5c
https://github.com/llvm/llvm-project/commit/580604f1f3cbdd643a53e086265140a0b2805c5c
Author: Nikita Taranov <nikita.taranov at clickhouse.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/test/CodeGen/X86/lea-opt-cse1.ll
M llvm/test/CodeGen/X86/lea-opt-cse2.ll
M llvm/test/CodeGen/X86/lea-opt-cse4.ll
M llvm/test/CodeGen/X86/lea-recursion.ll
A llvm/test/CodeGen/X86/pr51707.ll
Log Message:
-----------
[X86] Reuse already-materialized values when forming LEAs (#210739)
For code like
``` cpp
int f(int &a, const int &b) {
a += b + 17;
return a + b;
}
```
the x86 backend emitted three LEAs, rematerializing `a+b` instead of
reusing the value it had just computed and stored:
``` asm
leal (%rdi,%rsi), %eax # a+b (recomputed)
leal 17(%rdi,%rsi), %ecx # a+b+17 (stored)
movl %ecx, (%rdx)
leal 17(%rsi,%rax), %eax # (a+b)+b+17
```
Reason being that when selecting a LEA address for `add2 = add1 + b`
where `add1 = (a+b)+17` is multi-use (it feeds a store), `matchAdd`
looks through `add1` to sink its `+17` into the displacement,
decomposing an already-materialized value and forcing `a+b` to be
recomputed.
The proposed fix: when forming a LEA, if an operand is a value that the
matcher would decompose into several address components **and is already
materialized in a register** (so reusing it is free), use it directly as
a base/index register instead of splitting it.
``` asm
leal 17(%rdi,%rsi), %eax # a+b+17
movl %eax, (%rdx)
addl %esi, %eax # + b — reuses the stored value
```
A value is treated as materialized when it has a use that puts it in a
register **as a value** — a stored value operand, or a `CopyToReg` (a
return value, call argument, or a value live out of the block) — as
opposed to address-only uses (a GEP index, or a load/store pointer)
which fold it for free. This reuses existing idioms: the
`CopyToReg`-means-liveout reasoning mirrors `hasOnlyLiveOutUses`, and
the stored value of a machine store is the operand at
`X86::AddrNumOperands` (as in `X86AvoidStoreForwardingBlocks`).
Identifying whether a value is already materialized is inherently a
heuristic; this PR uses the lightweight use-based check above. The
backend already does this differently for different Ops with varying
levels of sophistication (e.g. the `SUB` case carries a full cost
model). If expert opinion is that this warrants a proper cost model
rather than the boolean check — or a more thorough analysis step — I
will be happy to discuss it and implement if my help is wanted.
No regressions were found on the existing tests.
---
Test changes & MCA
Changed tests: new pr51707.ll; regenerated lea-recursion.ll,
lea-opt-cse1.ll, lea-opt-cse2.ll, lea-opt-cse4.ll. Whole test/CodeGen +
test/DebugInfo sweep: 0 net-new failures (32,757 tests).
`llvm-mca` `Block RThroughput` (cycles/iteration, lower = better),
master → patched, per -mcpu:
```
┌───────────────┬─────────┬─────────┬─────────┬─────────┬─────────┬─────────┬───────────┬───────────┐
│ fn \ μarch │ core2 │ nehalem │ sandyb │ haswell │ skylake │ icelake │ alderlake │ sprrapids │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ reduced │ 1.5→1.0 │ 1.5→1.0 │ 1.5→1.0 │ 1.5→1.0 │ 1.0→1.0 │ 1.5→0.5 │ 2.0→1.0 │ 3.0→1.0 │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ f │ 1.5→1.5 │ 1.5→1.5 │ 2.0→1.5 │ 2.0→1.5 │ 1.3→1.0 │ 1.5→1.0 │ 1.5→1.2 │ 3.0→1.0 │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ shl_reuse │ 1.0→1.0 │ 1.0→1.0 │ 1.0→1.0 │ 1.0→1.0 │ 1.0→1.0 │ 1.0→0.7 │ 2.0→1.0 │ 2.0→1.0 │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ lea-opt-cse1 │ 2.0→2.0 │ 2.0→2.0 │ 2.3→2.0 │ 2.3→2.0 │ 2.0→2.0 │ 1.5→1.0 │ 2.0→1.5 │ 3.0→1.3 │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ lea-recursion │ 7.5→7.5 │ 7.5→7.5 │ 7.5→7.5 │ 7.5→7.0 │ 7.0→7.0 │ 6.5→4.0 │ 12.0→5.2 │ 12.0→7.0 │
└───────────────┴─────────┴─────────┴─────────┴─────────┴─────────┴─────────┴───────────┴───────────┘
```
Improvement or neutral on every μarch, growing on newer cores (which
have fewer LEA ports and penalize the 3-source LEAs the patch removes).
Closes #51707.
Commit: 647a5fcae7aa7c953495675fd40b94043888228e
https://github.com/llvm/llvm-project/commit/647a5fcae7aa7c953495675fd40b94043888228e
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/MachineInstr.cpp
A llvm/test/CodeGen/RISCV/lifetime-licm.mir
Log Message:
-----------
[CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (#211179)
PR #210028 added a run of EarlyMachineLICM before StackColoring removed
LIFETIME_START/LIFETIME_END markers, and it ended up hoisting them which
led to miscompiles. This marks them as not safe to move in
`MachineInstr::isSafeToMove`.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: eb05d2657b0130a1db130b0cb0d7cfe1d354300e
https://github.com/llvm/llvm-project/commit/eb05d2657b0130a1db130b0cb0d7cfe1d354300e
Author: Wijkqwe <WZYqwe2004 at outlook.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M offload/libomptarget/interface.cpp
Log Message:
-----------
[Offload][OpenMP] Skip RPC callback registration when plugin has no devices (#211447)
`__tgt_register_rpc_callback` unconditionally called
`Plugin::getRPCServer()` which asserts if the RPC server pointer is
null. When a plugin is initialized but its RPC server has not been
created (e.g., `NumDevices == 0` in `GenericPluginTy::init()`), this
triggers a crash.
Rather than introducing a nullable accessor, guard the call by also
checking that the plugin has at least one device. A zero-device plugin
has no RPC server to register callbacks with, so the extra check is both
correct and sufficient.
Suggested by @jhuber6 in the review of the previous attempt (#210215).
Commit: 48f1a20589b9b1da2ab211f8bf95e89ed5c10576
https://github.com/llvm/llvm-project/commit/48f1a20589b9b1da2ab211f8bf95e89ed5c10576
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/Frontend/PerformanceTips.md
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (#207613)
Each Loop stored its blocks twice: the Blocks vector and a DenseBlockSet
used only for O(1) contains(BlockT *). Block lists are inclusive, so building
LoopInfo inserted every block into that set once per enclosing loop --
an O(blocks * depth) cost.
Drop DenseBlockSet and answer contains(BlockT *) from the innermost loop
in LoopInfoBase's block-number-indexed map. This removes the per-build
set maintenance and shrinks sizeof(Loop) from 160 to 72 bytes. Each Loop
keeps a back-pointer to its LoopInfo for the lookup; contains() stays
total for a block from another function (e.g. a global's use).
Note: A pass restructuring the loop nest must not rely on
`contains(BlockT *)` while the block lists and the map are transiently
out of sync, and should scan getBlocks() instead (as FixIrreducible and
LoopSimplifyCFG do). LoopInfoBase::verify() checks the block lists
rather than contains() for the same reason.
Aided by Claude Opus 4.8
Commit: a812f33a20922c85f26f99bc7e46d0eb214d9277
https://github.com/llvm/llvm-project/commit/a812f33a20922c85f26f99bc7e46d0eb214d9277
Author: chandan singh <36783761+chandankds at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
A llvm/test/Transforms/LoopVersioningLICM/pseudoprobe.ll
Log Message:
-----------
[LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (#209684)
`LoopVersioningLICM::instructionSafeForVersioning()` rejects any call
that is
not proven to not access memory. `llvm.pseudoprobe` is declared
`IntrInaccessibleMemOnly` (so the optimizer will not delete or sink it),
so
`AA->doesNotAccessMemory()` returns false and the probe is treated as an
unsafe
call site. This disables loop-versioning LICM for essentially every hot
loop
in a sample-based / CSSPGO profile-guided build (in the presence of
`-fpseudo-probe-for-profiling`), since a pseudo probe is inserted on
every basic block.
Pseudo probes are pure profiling placeholders with no observable effect
on the
loop's memory accesses, so skip them in the call-safety check.
RFC:
https://discourse.llvm.org/t/csspgo-unblocking-pseudo-probe-safe-optimizations/90946
Commit: 07456880699368e1f90ce5b5900a6fb6e96e14ae
https://github.com/llvm/llvm-project/commit/07456880699368e1f90ce5b5900a6fb6e96e14ae
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[SampleProfile] Support Eytzinger layout in SecNameTable (#211027)
This patch supports writing SecNameTable in Eytzinger layout for
ExtBinary MD5 sample profiles via a hidden command-line option,
-sample-profile-write-eytzinger-name-tables.
Specifically, this patch partitions function GUIDs in SecNameTable into
three mutually exclusive sets:
- CSKeys: Those GUIDs used as keys in context-sensitive SecLBRProfile.
- FlatKeys: Those GUIDs used as keys in flat SecLBRProfile.
- Inlinees: Those GUIDs mentioned in SecLBRProfile but not as keys.
Each set is constructed as an independent Eytzinger array using
llvm::EytzingerTable. The section starts out with the three element
counts followed by the three successive spans.
A subsequent patch will add FuncOffsetTable as arrays parallel to
CSKeys and FlatKeys. It will introduce binary search into the
Eytzinger name table, taking advantage of the cache-friendly layout.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: 2c8d11e8d46ce90e09d5e9b0deec210f03199bba
https://github.com/llvm/llvm-project/commit/2c8d11e8d46ce90e09d5e9b0deec210f03199bba
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/docs/ParameterizedDerivedTypes.md
M flang/docs/ProcedurePointer.md
M flang/docs/fstack-arrays.md
R flang/include/flang/Lower/ComponentPath.h
R flang/include/flang/Lower/ConvertExpr.h
M flang/include/flang/Lower/DirectivesCommon.h
R flang/include/flang/Lower/IterationSpace.h
M flang/include/flang/Lower/Support/Utils.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Factory.h
M flang/include/flang/Optimizer/Builder/LowLevelIntrinsics.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/CMakeLists.txt
R flang/lib/Lower/ComponentPath.cpp
R flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/IO.cpp
R flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Optimizer/Builder/BoxValue.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/LowLevelIntrinsics.cpp
Log Message:
-----------
[flang][NFC] Delete the legacy expression lowering (ConvertExpr.cpp) and its support files (#210873)
The legacy (non-HLFIR) lowering was removed in cc4922b27694 (#196205),
but ConvertExpr.cpp and its ComponentPath/IterationSpace support files
were left behind. Their last callers have since been migrated or removed
(#210385: OpenMP iterator subscripts via genExprValue; #210621: initial
values via ConvertConstant; #210639: unreachable FORALL/WHERE machinery
deleted from Bridge.cpp), so nothing outside these files references them
anymore.
- Delete ConvertExpr.{cpp,h}, ComponentPath.{cpp,h},
IterationSpace.{cpp,h}. (createArrayLoads/createArrayMergeStores are
declared in IterationSpace.h but were defined in ConvertExpr.cpp - they
die together; no external callers.)
- CMakeLists.txt: drop the three sources and the ConvertExpr.h /
IterationSpace.h PRECOMPILE_HEADERS entries.
- Remove stale includes (verified symbol-free): IO.cpp,
OpenMP/OpenMP.cpp, DirectivesCommon.h (ConvertExpr.h); Allocatable.cpp,
Support/Utils.cpp (IterationSpace.h).
- Support/Utils.{h,cpp}: remove the ExplicitSpaceArrayBases alias and
its getHashValue/isEqual overloads; the SomeExpr* and Component*
variants stay (live via ExprToValueMap and HLFIR lowering).
This also deletes six small Optimizer/Builder helpers whose last callers
were in ConvertExpr.cpp — fir::factory::genLenOfCharacter,
getNonDeferredLenParams, getExtentFromTriplet (FIRBuilder),
getExtentAtDimension (BoxValue), fir::factory::getRealloc
(LowLevelIntrinsics), and the genCharacterCopy template (Factory.h).
Their removal orphans nothing further; Factory.h and LowLevelIntrinsics
retain their live content.
- Docs: drop the ConvertExpr.cpp section from fstack-arrays.md and the
stale ConvertExpr.cpp TODO inventories from ParameterizedDerivedTypes.md
and ProcedurePointer.md.
No functional change: everything removed is unreachable. Downstream
forks using the deleted entry points will break at compile time; this is
intended (precedent: cc4922b27694).
Assisted-by: AI
Commit: 192d8800e186ce0f4f80fb685e27b5327bb8c4ee
https://github.com/llvm/llvm-project/commit/192d8800e186ce0f4f80fb685e27b5327bb8c4ee
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M orc-rt/lib/executor/Session.cpp
Log Message:
-----------
[orc-rt] Add comment to clarify intended control flow. NFC. (#211454)
Commit: 116dd2b7c81fc04685842cd1dbe65ae57d9bc861
https://github.com/llvm/llvm-project/commit/116dd2b7c81fc04685842cd1dbe65ae57d9bc861
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyMemIntrinsicResultsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/209959
Commit: 244d48473501cb00124d3315bd938dc1ed734cdf
https://github.com/llvm/llvm-project/commit/244d48473501cb00124d3315bd938dc1ed734cdf
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyRegStackifyPass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210224
Commit: 0f2b9a12943dfde66c1bc5720bba95a07a27c027
https://github.com/llvm/llvm-project/commit/0f2b9a12943dfde66c1bc5720bba95a07a27c027
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyRegColoringPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210225
Commit: 45ea33c65ed3c01a3f08584ffc36c53720a1bc68
https://github.com/llvm/llvm-project/commit/45ea33c65ed3c01a3f08584ffc36c53720a1bc68
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Refactor WebAssemblyExceptionInfo into Wrapper Pass
This is to match the standard style adopted by generic CodeGen analyses
like MachineBlockFrequencyInfo. This makes WebAssemblyExceptionInfo its
own class that we then get through the wrapper pass.
The primary aim of this patch is to add enough modularity such that we
can also provide this analysis through the NewPM in a follow up patch.
Reviewers: dschuff, sbc100, aheejin
Reviewed By: dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210245
Commit: 8a7cedc6b30d8adb1928f5306660ed9f412f04b6
https://github.com/llvm/llvm-project/commit/8a7cedc6b30d8adb1928f5306660ed9f412f04b6
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
A llvm/test/CodeGen/RISCV/rvv/vl-opt-licm.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
Log Message:
-----------
Reapply "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (#210937) (#211452)
This reverts commit acfaabebcfd10d4dbabeb54cf0c60509648fb82f.
The miscompile with LIFETIME_START/END markers should be fixed now
after #211179
Commit: c974ee99b34b034c8b7d233f50b07f2b77324224
https://github.com/llvm/llvm-project/commit/c974ee99b34b034c8b7d233f50b07f2b77324224
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
Log Message:
-----------
[WebAssembly] Port WebAssemblyExceptionAnalysis
Similar to the LegacyPM version, but we need to add a move constructor
to WebAssemblyExceptionInfo and set up some invalidation for the NewPM
given we don't need to invalidate if the CFG doesn't change.
Reviewers: sbc100, aheejin, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210246
Commit: 45b30651cf94ddb32676550cca7ddd3f6a5e66e0
https://github.com/llvm/llvm-project/commit/45b30651cf94ddb32676550cca7ddd3f6a5e66e0
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/ccmp.ll
Log Message:
-----------
[X86][CCMP] Fix invalid CCMP emission (#211161)
This patch ports AArch64's negation-aware conjunction algorithm to fix
invalid CCMP emission when OR nested inside an AND.
Example: https://godbolt.org/z/ave7f61hK
Before the change, the above case returns 5 rather the 9 when CCMP
enabled.
Assisted-by: Claude Opus 4.8
Commit: 389762329d50abc2d4997460ed2b4d7e7fc8ecfb
https://github.com/llvm/llvm-project/commit/389762329d50abc2d4997460ed2b4d7e7fc8ecfb
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyCFGSortPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210247
Commit: e14b11b74dcafea1e2a71b9788b85b34ab4cf1e6
https://github.com/llvm/llvm-project/commit/e14b11b74dcafea1e2a71b9788b85b34ab4cf1e6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyCFGStackifyPass
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210255
Commit: bdddd134c1af6b0c5196ea944edf4c5c76019306
https://github.com/llvm/llvm-project/commit/bdddd134c1af6b0c5196ea944edf4c5c76019306
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
A llvm/test/tools/llvm-dwarfdump/X86/verify_simplified_template_names.yaml
Log Message:
-----------
[DebugInfo] Don't assert on missing template parameter names (#211412)
The DWARF verifier reconstructs simplified template names through
DWARFTypePrinter to compare them against the original DW_AT_name. On
malformed input, a template parameter can have no recoverable name,
which tripped assert(RawName) and aborted instead of letting the
verifier report the problem.
Assisted-by: Claude
rdar://182715403
Commit: 90bed5073e12836f8511c6d8dd7c553345b87f7a
https://github.com/llvm/llvm-project/commit/90bed5073e12836f8511c6d8dd7c553345b87f7a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyExplicitLocalsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210256
Commit: 8bae4dc36e063dadb13dc883eaad4270430b1f9c
https://github.com/llvm/llvm-project/commit/8bae4dc36e063dadb13dc883eaad4270430b1f9c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyLowerBrUnlessPass
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210257
Commit: 131a742a3a4325866ed8ab1aa0088e665cfe463b
https://github.com/llvm/llvm-project/commit/131a742a3a4325866ed8ab1aa0088e665cfe463b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyPeepholePass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210436
Commit: d7cec4a623fbe018c04e7d821ad24d972ad14979
https://github.com/llvm/llvm-project/commit/d7cec4a623fbe018c04e7d821ad24d972ad14979
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyRegNumberingPass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210437
Commit: 27acde03e1b1de444e9fb24065fef4c70f91811f
https://github.com/llvm/llvm-project/commit/27acde03e1b1de444e9fb24065fef4c70f91811f
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Support/Parallel.cpp
Log Message:
-----------
[Support] parallelFor: enable caller participation (#209690)
`parallelFor` dispatches its work to the thread pool and blocks the
calling thread in the `TaskGroup` destructor until the workers finish.
The caller thus stays idle instead of joining the work as modern parallel
libraries do, and `numactl -C 0-7 ld.lld --threads=8` ends up slower than
`numactl -C 0-8 ld.lld --threads=8`.
Run one worker on the calling thread instead. This requires that no
`parallelFor` body reads `getThreadIndex()`, which is unset on the
caller; the last such user is removed by #209687.
In the jobserver mode: only pool workers acquire job slots, so a
jobserver-limited process may briefly exceed its granted concurrency by
one thread. This is acceptable, better than pessimizing the common
non-jobserver case, and parallelFor is unused by jobserver users.
Commit: 5b6ad135a0236c8fd2b8b723d17fd0e55819d623
https://github.com/llvm/llvm-project/commit/5b6ad135a0236c8fd2b8b723d17fd0e55819d623
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
Log Message:
-----------
[WebAssembly][NFC] Remove unused createWebAssemblyVecReduce
Not implemented or called anywhere. Seems left over accidentally from
b2edc0a3f8a5c711ff894dda9541a46874633511.
Reviewers: sbc100, dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210438
Commit: 9c52b735ea04f58c04ac36c162ed8e45412287b3
https://github.com/llvm/llvm-project/commit/9c52b735ea04f58c04ac36c162ed8e45412287b3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyDebugFixupPass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210439
Commit: 90d75e9dde191dd23381c48e7ed5959bb6162dc5
https://github.com/llvm/llvm-project/commit/90d75e9dde191dd23381c48e7ed5959bb6162dc5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
Log Message:
-----------
[NFC][SPIR-V] Merge duplicate prefix/suffix switches in lookupBuiltin (#211194)
Commit: 55df5985398653fcff135c6e93345d2b1af98f55
https://github.com/llvm/llvm-project/commit/55df5985398653fcff135c6e93345d2b1af98f55
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_sincospi.cl
M libclc/clc/lib/generic/math/clc_sincospi.inc
Log Message:
-----------
libclc: Fix signed 0 handling in sincospi (#211260)
Commit: 73a7638c0d832182dd7df912115d80be87567cb4
https://github.com/llvm/llvm-project/commit/73a7638c0d832182dd7df912115d80be87567cb4
Author: Patrik Dokoupil <61749375+pdokoupil at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
A compiler-rt/test/msan/Linux/syscalls_post_output_size.cpp
Log Message:
-----------
[compiler-rt][sanitizer_common] Size readlink/getsockopt post-hook unpoison by bytes written (#209209)
# About
`readlink`/`readlinkat` return the number of bytes placed in the buffer
in res and do not NUL-terminate it, and getsockopt writes *optlen bytes
of binary option data. The post-hooks instead sized their POST_WRITE
(MSan unpoison) with internal_strlen(buf) + 1, which reads past what the
kernel wrote -- over- unpoisoning the uninitialized tail (masking real
bugs) and, on a buffer with no NUL, reading out of bounds inside the
runtime. For binary option data an early zero byte instead
under-unpoisons.
Size the unpoison by the actual written length, matching the
corresponding libc interceptors (readlink unpoisons res bytes, and
getsockopt unpoisons *optlen bytes).
Seems to be present since the file's 2013 import.
Commit: 585c900260e0e0b7a381ac0ba7792a5d4c95eed3
https://github.com/llvm/llvm-project/commit/585c900260e0e0b7a381ac0ba7792a5d4c95eed3
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/LibcTest.h
R libc/test/UnitTest/PlatformDefs.h
M libc/test/src/libgen/CMakeLists.txt
M libc/test/src/libgen/basename_death_test.cpp
M libc/test/src/libgen/dirname_death_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (#211238)
This replaces the ENABLE_SUBPROCESS_TESTS preprocessor flag with a cmake
variable. By lifting the logic into cmake, we select which test
framework files to build, and also exclude whole tests, if they do not
make sense without subprocess support.
This enables us to fix failures from (now reverted) #209999 and
#210889, as it will let us skip the *exit family of tests. The problem
there was that GPU targets support the *exit entry points (so the
auto-skipping logic does not kick in), but they do not have (and maybe
cannot have?) the functionality necessary to test them.
I convert two libgen tests (the only users of ENABLE_SUBPROCESS_TESTS)
to the new framework.
Commit: 233657433df760b004dd0daab40870c808ad5110
https://github.com/llvm/llvm-project/commit/233657433df760b004dd0daab40870c808ad5110
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M .github/workflows/test-suite/configure-and-build.sh
M .github/workflows/test-suite/llvm.cmake
Log Message:
-----------
[GitHub] Collect statistics in test-suite workflow (#210316)
This allows comparing the statistic counters in the results.json
artifacts
Commit: e04cf35fc64cfadc921582c7e8d962dfcb2c4e3b
https://github.com/llvm/llvm-project/commit/e04cf35fc64cfadc921582c7e8d962dfcb2c4e3b
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
A llvm/lib/Transforms/Vectorize/VPlanDominatorTree.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/predicator.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
Log Message:
-----------
[VPlan] Compute blend masks from minimum set of edge masks (#201783)
#201784 aims to preserve SSA in early exit loops, and in doing so insert
phi nodes. More phi nodes results in more VPBlendRecipes, so this PR
optimizes the edge masks generated for those blend recipes to prevent
regressions.
The idea is to compute a minimal set of edges that lead to each unique
incoming value in a phi. It does this by iterating up the edges in the
post dominance frontier till the outgoing edges no longer lead to the
same value.
This is a simpler, less general version of #184838 since this can't
optimize away edges that aren't postdominated by the phi. This is fine
the early exit use case though, since we only need to optimize phi nodes
inserted in the latch.
The big advantage over #184838 is that it doesn't require several
depth-first searches to compute the set of reachable nodes, and can be
done entirely by iterating the post-dominator frontier.
Commit: 21fb4bdd1e761021920790699efbfa56aaf081e2
https://github.com/llvm/llvm-project/commit/21fb4bdd1e761021920790699efbfa56aaf081e2
Author: Nikhil Kotikalapudi <Nikhil.Kotikalapudi at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/CodeGen/M68k/pipeline.ll
Log Message:
-----------
[M68k][CodeGen] pipeline failure fix (#211458)
Fixing pipeline mismatch on M68k (experimental target, failure shouldnt
have been reported).
Triggered upon merge of this PR:
https://github.com/llvm/llvm-project/pull/210826
Failure here:
https://lab.llvm.org/buildbot/#/builders/27/builds/2162/steps/5/logs/FAIL__LLVM__pipeline_ll
Commit: 6aa4d5ef9b4eca1dc6b10a5ef4c17fec2676b9f4
https://github.com/llvm/llvm-project/commit/6aa4d5ef9b4eca1dc6b10a5ef4c17fec2676b9f4
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
[AMDGPU] Add FeatureSubtarget for global async load/store lds (#211247)
Commit: 450cf0aafeab9fed6666b112b018d3913a36527c
https://github.com/llvm/llvm-project/commit/450cf0aafeab9fed6666b112b018d3913a36527c
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/tools/llvm-profgen/PerfReader.cpp
Log Message:
-----------
[llvm-profgen] Formatting StringRef iteration in isLBRSample (#211462)
Follow up on https://github.com/llvm/llvm-project/pull/211182 Cleanup
the StringRef iteration.
Commit: 22cb41c9ad9658319fb211b04f92806c504a8388
https://github.com/llvm/llvm-project/commit/22cb41c9ad9658319fb211b04f92806c504a8388
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/AArch64/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/RISCV/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/X86/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (#210139)
The original implementation of `optimizeCRCLoopUsingClmul` (#203405)
uses a single conservative bit width for most operations, but this width
is not always necessary. Use more restrictive bit widths for each clmul
according to their inputs, and narrow the bit width for the initial
CRC/data setup.
Commit: 87304516a10cfbd148d0ad23fd03e7f838aed267
https://github.com/llvm/llvm-project/commit/87304516a10cfbd148d0ad23fd03e7f838aed267
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/Reassociate.h
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
[Reassociate] Use UniformityInfo to group uniform operands together (#198507)
On targets with branch divergence (TTI.hasBranchDivergence()), boost the
rank of divergent operands in ReassociateExpression() so they sort
towards the root of the expression tree. This clusters uniform operands
at the leaves, letting the backend lower the inner sub-expression to a
scalar ALU instruction (s_mul/s_or/s_and) instead of a vector.
Ref:
https://github.com/llvm/llvm-project/pull/175167#issuecomment-4476483692
Commit: da27aac10e157e5659ba6dfa0e362b570a236978
https://github.com/llvm/llvm-project/commit/da27aac10e157e5659ba6dfa0e362b570a236978
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
A llvm/test/CodeGen/RISCV/rvp-simd-intrinsic-invalid.ll
Log Message:
-----------
[RISCV][P-ext] Add packed sign and zero extend intrinsics (#208685)
Add SelectionDAG and intrinsic support for the RISC-V P packed sign- and
zero-extend operations.
Sign-extend is matched through `sext_inreg` (folded from the `shl`/`ashr`
idiom by the generic combiner) and selects to `psext.*`. Zero-extend reuses
the existing `PPAIRE` node with a zero operand instead of a new target node,
since `pzext.* rd, rs` is an alias of `ppaire.* rd, rs, x0`: implementing
`isVectorClearMaskLegal` lets the generic `DAGCombiner::XformToShuffleWithZero`
rewrite the `(and vXi16, 0xff)` / `(and vXi32, 0xffff)` idiom into a shuffle
with a zero operand, which `lowerVECTOR_SHUFFLEAsPPair` folds to `PPAIRE`.
Also adds the LLVM IR intrinsics `llvm.riscv.psext.b`/`.h` and
`llvm.riscv.pzext.b`/`.h`. For RV64 32-bit packed results, the lowering widens
to the legal 64-bit type and extracts the low subvector.
Commit: f7ae0ec1b5821ff219e70218b6877bb977be06b7
https://github.com/llvm/llvm-project/commit/f7ae0ec1b5821ff219e70218b6877bb977be06b7
Author: Damian Höster <damian.hoester at posteo.de>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang-tools-extra/unittests/clang-change-namespace/ChangeNamespaceTests.cpp
M clang/test/Format/dump-config-objc-stdin.m
Log Message:
-----------
[clang-format][clang-tools-extra] Fix leaking of host-level config into test environment (#206358)
These leaks were causing false test failures due to my global
.clang-format being in an ancestor directory of the build directory.
These changes prevent those issues when running the tests on my system.
I used MiMo v2.5 Pro agentically in Zed to find and fix the issue. But I
understand the changes and judge them to be safe and a clear improvement
over the status quo.
Commit: 72b764559fd2d5f564f2c6f42edd782c8e20616d
https://github.com/llvm/llvm-project/commit/72b764559fd2d5f564f2c6f42edd782c8e20616d
Author: Ritanya-B-Bharadwaj <ritanya.b.bharadwaj at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/Todo/assume.f90
M flang/test/Lower/OpenMP/Todo/assumes.f90
A flang/test/Lower/OpenMP/assumption.f90
Log Message:
-----------
[flang][OpenMP] Add lowering for assume and assumes directives (#205615)
Adds lowering for the assume and assumes directives. holds clauses are lowered to llvm.assume, the other assumption clauses are ignored, and assumes is a no-op. Hints are skipped under -fopenmp-simd.
Commit: 0a79ab0b7a7fe38f20d0f5df11b2530ff1c0c0cc
https://github.com/llvm/llvm-project/commit/0a79ab0b7a7fe38f20d0f5df11b2530ff1c0c0cc
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M flang/include/flang/Lower/DirectivesCommon.h
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
M flang/test/HLFIR/optional_dummy.f90
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/MIF/change_team2.f90
M flang/test/Lower/OpenACC/acc-terminator.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
M flang/test/Lower/OpenMP/loop-compound.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/unstructured.f90
R flang/test/Lower/OpenMP/wsloop-computed-goto.f90
R flang/test/Lower/OpenMP/wsloop-select-case.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/branching-directive.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/fail_image.f90
M flang/test/Lower/ifconvert.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/while_loop.f90
Log Message:
-----------
[flang][PFT-to-MLIR] Default wrap-unstructured-constructs-in-execute-region to off (#211290)
Commit: 23de8d650e3d1a6f0e40121c87be3030c3005a32
https://github.com/llvm/llvm-project/commit/23de8d650e3d1a6f0e40121c87be3030c3005a32
Author: Santanu Das <santdas at qti.qualcomm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
A llvm/test/CodeGen/Hexagon/amode-opt-vS32Ub-pred.mir
Log Message:
-----------
Add missing opcode for offset validity check (#211186)
During offset validity check, the common API in HexagonInstrInfo does
not handle the opcode. Adding it fixes wherever offset calculation is
made for the instruction.
Co-authored-by: quic-santdas <quic_santdas at quicinc.com>
Commit: ec08887025038ab7e50f46bb2f9ea3b3c1fafce4
https://github.com/llvm/llvm-project/commit/ec08887025038ab7e50f46bb2f9ea3b3c1fafce4
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/test/TableGen/inhibit-pset.td
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[CodeGen] Precompute pressure-set register classes (#210751)
Profiling sqlite on aarch64-O3 shows ~1.26% of compile-time is spent in
RegisterClassInfo::computePSetLimit. This is called from
ScheduleDAGMILive::initRegPressure via
RegClassInfo->getRegPressureSetLimit.
computePSetLimit scans every register class and its pressure-set list to
find the class with the largest RegClassWeight::WeightLimit. This is
cached, but must be recomputed on every cache invalidation.
AArch64 has 530 register classes and 190 pressure sets. Populating all
pressure-set limits visits 530 x 190 = 100,700 register classes. This
can be precomputed in TableGen, while retaining the MF-dependent
reserved-register adjustment in computePSetLimit.
CTMark results [1]:
- stage1-aarch64-O3: -1.85% geomean; Bullet -4.01%.
- stage1-O3 (x86): -0.04%; Bullet -0.13%.
AMDGPU already suppresses pressure-set generation for most register
classes for compile-time reasons [2], so impact there should be minimal.
Assisted-by: codex
[1] https://llvm-compile-time-tracker.com/compare.php?from=4aa1590ad66a1bff9b3c74b4a2c7366473015b4c&to=d78521eab6e7aa17561d2decc0c4dff55127c955&stat=instructions%3Au
[2] https://reviews.llvm.org/D74744
Commit: 5152c51477aad031eeac540a6f02ed1f6539c710
https://github.com/llvm/llvm-project/commit/5152c51477aad031eeac540a6f02ed1f6539c710
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
Log Message:
-----------
[libc] Add err.h to Linux public header target lists (#210995)
Add libc.include.err to TARGET_PUBLIC_HEADERS for Linux targets
(aarch64, arm, riscv, x86_64) so that err.h gets generated and
installed.
Assisted-by: Automated tooling, human reviewed.
Commit: e407c4b6778909a90582aa6b59735866554cab5c
https://github.com/llvm/llvm-project/commit/e407c4b6778909a90582aa6b59735866554cab5c
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-async-load-lds.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/MC/AMDGPU/gfx13_asm_vflat.s
Log Message:
-----------
[AMDGPU] Add gfx13 support for global_load_async_to_lds (#211248)
Commit: bc3d3c9e3af37fab009d3fa10349f56b150e69d4
https://github.com/llvm/llvm-project/commit/bc3d3c9e3af37fab009d3fa10349f56b150e69d4
Author: Marco Elver <elver at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/AST/InferAlloc.cpp
M clang/test/CodeGenCXX/alloc-token-pointer.cpp
A clang/test/CodeGenObjCXX/alloc-token-pointer.mm
Log Message:
-----------
[AllocToken] Fix typeContainsPointer for references, PMFs, blocks, ObjC pointers (#211349)
When evaluating whether an allocated type contains a pointer to generate
the alloc_token metadata, typeContainsPointer() previously only checked
for PointerType.
Expand typeContainsPointer() to check isAnyPointerType(),
isReferenceType(), isMemberFunctionPointerType(), and
isBlockPointerType().
Commit: 44dd2956162b4727b4e5675a8160a0a5f80aa791
https://github.com/llvm/llvm-project/commit/44dd2956162b4727b4e5675a8160a0a5f80aa791
Author: Shoreshen <372660931 at qq.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
A llvm/test/Transforms/LoopDataPrefetch/AMDGPU/lit.local.cfg
A llvm/test/Transforms/LoopDataPrefetch/AMDGPU/vmem-cache-line-size.ll
Log Message:
-----------
[AMDGPU] Using feature to define vmem cacheline size (#207884)
Co-authored-by: shore <shorshen at amd.com>
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: 520a930da26c01505fe012a71d24f6ad9443c9c9
https://github.com/llvm/llvm-project/commit/520a930da26c01505fe012a71d24f6ad9443c9c9
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/tools/llvm-objdump/MachODump.cpp
Log Message:
-----------
[llvm-objdump] Factor the load command prologue into a shared function (#210881)
Move the repeated code to print cmd and cmdsize into a shared function.
Commit: c151d33acea677cee0c29ec15f9d5f6c7d31d0fd
https://github.com/llvm/llvm-project/commit/c151d33acea677cee0c29ec15f9d5f6c7d31d0fd
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/python/CMakeLists.txt
Log Message:
-----------
[MLIR][Python] Do not install ExecutionEngine wrapper when disabled (#211250)
The `_mlirExecutionEngine` extension is declared only when
`MLIR_ENABLE_EXECUTION_ENGINE` is enabled. However,
`execution_engine.py` and its type stub are currently added to the
Python package unconditionally.
This leaves an installed `mlir.execution_engine` module that fails
immediately when imported because its native extension is absent. It
also exposes a type stub for an unavailable API.
Making sure they're added only if `MLIR_ENABLE_EXECUTION_ENGINE` is
enabled.
Commit: b605aa6ac3fcd85a608e7ca4ab5b69109ae1272e
https://github.com/llvm/llvm-project/commit/b605aa6ac3fcd85a608e7ca4ab5b69109ae1272e
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopDistribute/bounds-expansion-bug.ll
M llvm/test/Transforms/LoopDistribute/crash-in-memcheck-generation.ll
M llvm/test/Transforms/LoopDistribute/metadata.ll
M llvm/test/Transforms/LoopDistribute/uncomputable-backedge-taken-count.ll
Log Message:
-----------
[LoopDistribute][NFC] Autogenerate checks for some tests (#211471)
Commit: 3b7447e00baff23660b49fdcb67ce83a3bf94605
https://github.com/llvm/llvm-project/commit/3b7447e00baff23660b49fdcb67ce83a3bf94605
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libcxx/include/fstream
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/i686-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/ios.cpp
M libcxx/src/iostream.cpp
A libcxx/test/libcxx/input.output/iostream.objects/sync_with_stdio.buffer_type.pass.cpp
A libcxx/test/std/input.output/iostream.objects/many-ints.dat
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cerr.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.readmany.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/clog.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cout.interleave_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cout.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/sync_with_stdio.state.pass.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcerr.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcin.readmany.sh.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcin.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wclog.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcout.sync_with_stdio.sh.cpp
M libcxx/test/std/input.output/iostreams.base/ios.base/ios.members.static/sync_with_stdio.pass.cpp
M libcxx/utils/libcxx/test/features/availability.py
Log Message:
-----------
[libc++] Optimize standard streams with sync_with_stdio(false) (#209161)
This updates the standard streams so that the buffers are replaced with
`basic_filebuf`s.
Fixes #21566
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 355dac7c4997c891d0a917935dcccc80334f5392
https://github.com/llvm/llvm-project/commit/355dac7c4997c891d0a917935dcccc80334f5392
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
M llvm/lib/Target/AMDGPU/GCNIterativeScheduler.h
A llvm/test/CodeGen/AMDGPU/iterative-ilp-restore-undef.mir
Log Message:
-----------
[AMDGPU] Preserve liveness flags in ILP scheduler (#211190)
During DAG construction, liveness flags such as `undef` are removed from
the instructions. When the scheduler succeeds, the flags are recomputed
and restored.
However, so far, if the scheduler failed to meet the occupancy target,
it would not restore the liveness flags, leading to verification
failure/assertions later in the pipeline.
This change restores the liveness flags in cases where no schedule
meeting the occupancy target could be found.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 14371a71392de5c1426a5dd98a98deb2a5d26fbe
https://github.com/llvm/llvm-project/commit/14371a71392de5c1426a5dd98a98deb2a5d26fbe
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Simplify check for packed fp32/64 opsel bits. NFCI (#211374)
Call isLegalGFX12PlusPackedMathFP32or64BitOperand directly instead
of the whole isLegalOperand.
Commit: beca2e90e6bc75f517fa4b78ac76de6141fc558f
https://github.com/llvm/llvm-project/commit/beca2e90e6bc75f517fa4b78ac76de6141fc558f
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/add-to-sub-imm.ll
Log Message:
-----------
[AArch64] Prefer (sub x, -c) over (add x, c) if -c is cheaper. (#211020)
The negation of an immediate can be cheaper to materialise than the
original immediate, in which case a subtraction is preferable.
Commit: 64b593c2371b7f7225b0ec190a37cd8b672e4c5d
https://github.com/llvm/llvm-project/commit/64b593c2371b7f7225b0ec190a37cd8b672e4c5d
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Core/WholeProgramAnalysis/AnalysisDriver.cpp
M clang/test/Analysis/Scalable/ssaf-analyzer/analyzer.test
M clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/AnalysisDriverTest.cpp
Log Message:
-----------
[clang][SSAF] Allow no Data for summary analysis (#211342)
Extractors might not always add summaries for all the TUs. If they don't
add any summaries to the TU result, then loading this summary for a
summary analysis would cause a failure.
This patch handles the situation gracefully by accepting such cases.
Split from: #209354
---------
Co-authored-by: Ziqing Luo <ziqing_luo at apple.com>
Commit: d3fead5912f73a84bd33bf1034175f6fa8de4e76
https://github.com/llvm/llvm-project/commit/d3fead5912f73a84bd33bf1034175f6fa8de4e76
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/adjacent_view_begin.bench.cpp
Log Message:
-----------
[libc++] Remove some adjacent_view::begin() benchmarks (#210265)
Benchmarking a bunch of very similar values has rather little benefit,
since they behave essentially the same.
Commit: 0e780450034e4bf0c6aa6dd4b312e1e0b9a20689
https://github.com/llvm/llvm-project/commit/0e780450034e4bf0c6aa6dd4b312e1e0b9a20689
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/test/Transforms/LowerMatrixIntrinsics/phi.ll
Log Message:
-----------
[Matrix] De-duplicate reshaped matrixes used as incoming values for phi. (#211210)
Phis can have multiple incoming entries for the same block. In that
case, all incoming values for the block must be the same.
Update visitPHI to avoid expanding the incoming matrix multiple times
for the some incoming block.
Fixes a verifier error for the newly added test case.
PR: https://github.com/llvm/llvm-project/pull/211210
Commit: 27ec80f230b86f22bd7329d67965b48d41b18f92
https://github.com/llvm/llvm-project/commit/27ec80f230b86f22bd7329d67965b48d41b18f92
Author: L-roro <115032777+L-roro at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
A llvm/test/CodeGen/Hexagon/autohvx/hvx-half-store-no-spurious-vmem.ll
Log Message:
-----------
[Hexagon] Avoid spurious high vmem for contained sub-HVX stores (#204661)
When a sub-HVX store is widened into a masked HVX store, the unaligned
masked store lowering can split it into two vector stores: one at Base
and one at Base+HwLen. For stores whose original memory size fits within
the guaranteed alignment, the high half predicate is known to be all
false, so the Base+HwLen store is unnecessary.
Even an all-false predicated vmem can still probe the TLB. Emitting the
high store can therefore fault when Base+HwLen is on an unmapped page,
even though no bytes should be written there.
Preserve the original memory VT when widening sub-HVX stores, and use
that size during masked-store lowering to elide the empty high vmem.
Relevant links:
https://docs.qualcomm.com/doc/80-N2040-60/topic/conditional-execution.html#consuming-scalar-predicates
and
https://docs.qualcomm.com/doc/80-N2040-61/topic/memory.html#permissions
Co-authored-by: L-roro <rodriguez at roofline.ai>
Commit: 1ee1c0edd6e11d13843b42846e9e5445232abc07
https://github.com/llvm/llvm-project/commit/1ee1c0edd6e11d13843b42846e9e5445232abc07
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/apx/ccmp-cse.ll
Log Message:
-----------
[X86][CCMP] Reorder Comparison Trees to Facilitate CSE (#211476)
This patch ports AArch64's CMP CSE optimization #168064
Assisted-by: Claude Opus 4.8
Commit: 5bf9d6127d3b46f4213882ac9454e932543f14be
https://github.com/llvm/llvm-project/commit/5bf9d6127d3b46f4213882ac9454e932543f14be
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
A llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int-sat.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
M llvm/test/CodeGen/AArch64/sve-fptosi-sat.ll
M llvm/test/CodeGen/AArch64/sve-fptoui-sat.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
Log Message:
-----------
[AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (#207201)
Commit: 9c5858eb699390c2cac5f7f032279be275fa6aef
https://github.com/llvm/llvm-project/commit/9c5858eb699390c2cac5f7f032279be275fa6aef
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/RISCV/vector.ll
Log Message:
-----------
[RISCV] Add TuneNoDefaultUnroll to generic CPUs (#135318)
Almost all CPUs have added this and experiments have shown
considerable gains.
And, we set a lower runtime unrolling count 4 for in-order models
to avoid potential regressions.
Fixes #134272.
Commit: 4138dc431ad849bd8c0e76f907345c6d0507890b
https://github.com/llvm/llvm-project/commit/4138dc431ad849bd8c0e76f907345c6d0507890b
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR][OpenMP] Preserve debug location in OpenMPIRBuilder calls. (#211254)
Many `OpenMPIRBuilder` entry points take an
`OpenMPIRBuilder::LocationDescription`. It has two relevant
constructors:
`LocationDescription(const IRBuilderBase &IRB)` // captures IP and debug
loc
`LocationDescription(const InsertPointTy &IP)` // captures IP only; DL
is empty
The OpenMP MLIR-to-LLVM-IR translation constructs the location from
`builder` in almost all places (~45 call sites), which selects the first
constructor and propagates both the insertion point and the current
debug location. A few call sites instead passed `builder.saveIP()`,
which selects the second constructor and silently drops the debug
location.
Change the 9 offending call sites to pass `builder` instead of
`builder.saveIP()`, so the debug location is preserved.
Commit: a2b42b10a17f93392f13a67a35309e57bc87be0f
https://github.com/llvm/llvm-project/commit/a2b42b10a17f93392f13a67a35309e57bc87be0f
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/Attributes.h
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/IR/Attributes.cpp
A llvm/test/Transforms/Inline/always-inline-strictfp.ll
Log Message:
-----------
[IR] Reject inlining strictfp alwaysinline callee into non-strictfp caller (#210701)
Commit af0c933eda31 added a verifier check requiring every strictfp call
site to reside in a strictfp function.
It caused verify error `call site marked strictfp without caller
function marked strictfp` since AlwaysInliner force-inlines strictfp
callees into non-strictfp callers, bypassing checkStrictFP.
47b3b76825dc explictly not implemented inlining strictfp function into
non-strictfp function. But the restriction was lost in 8eb6757564cc.
8eb6757564cc was only NFC for the normal inliner pass. It regressed
AlwaysInliner path which bypasses checkStrictFP.
This PR restores the restriction.
---------
Co-authored-by: Jinsong Ji <jinsong.ji at intel.com>
Co-authored-by: Claude Sonnet 5 <noreply at anthropic.com>
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 09ab7a31cff482b5b0ce40a940e01ee068a89117
https://github.com/llvm/llvm-project/commit/09ab7a31cff482b5b0ce40a940e01ee068a89117
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/split-sum-expression-tree-lowering.f90
Log Message:
-----------
[flang][Lower] Admit opaque terms to real sum reassociation (#211316)
First part of generalisations requested in #207377.
The split-sum eligibility check rejected any RHS containing explicit
parentheses or subtraction, even though the Add flattener already
preserves every non-Add subtree as one opaque term.
Remove those blanket guards and their unused predicates. Document the
opaque-term invariant and extend the test to cover parenthesized
additions and subtractions, whole-RHS parentheses, and subtraction
terms.
I did not observe any benchmark result changes as a result of this
patch.
Assisted-by: Codex
Commit: 58cebee609e42ba70c0b8642ba920d3fef7f9e78
https://github.com/llvm/llvm-project/commit/58cebee609e42ba70c0b8642ba920d3fef7f9e78
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Support Packed "Q-format" Multiplication (#211236)
Commit: 83530ce356dd55fdc981b5325ca1f5117b4a58f8
https://github.com/llvm/llvm-project/commit/83530ce356dd55fdc981b5325ca1f5117b4a58f8
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
A lldb/test/API/attach/Makefile
A lldb/test/API/attach/TestWindowsAttachBreakpoint.py
A lldb/test/API/attach/main.c
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
Log Message:
-----------
[lldb][Windows] ignore loader breakpoints in system modules (#208233)
Currently, when debugging a program with `lldb-dap` on Windows and using
the `integratedTerminal` option, lldb-dap immediatly stops with an
`0x80000003` Exception. This is because `ntdll` executes an `int3`
breakpoint during process initialization when a debugger is attached.
This patch makes `lldb` and `lldb-server` skip the first `int3` after
launch when it originates from a system module (the loader's debugger
notification). Only that first loader breakpoint is skipped. Any later
int3, including `__debugbreak()`, `__builtin_debugtrap()` in the
debuggee's own code, still stops the debugger.
Fixes https://github.com/llvm/llvm-project/issues/198763
Commit: 797ead5fc79645a09a22d72e13912bf7e7c8d884
https://github.com/llvm/llvm-project/commit/797ead5fc79645a09a22d72e13912bf7e7c8d884
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/code-size-estimate-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/literals.txt
Log Message:
-----------
[AMDGPU] Add gfx13 support for v_cvt_pk_{fp8,bf8}_f16 (#211263)
GFX13 supports VOP1 and VOP3 forms of these instructions; GFX1250 keeps
its VOP3-only encoding.
Co-authored-by: Guo Chen <guochen2 at amd.com>
Commit: 20d8cb474fc78892119e42099ccbad54a648b000
https://github.com/llvm/llvm-project/commit/20d8cb474fc78892119e42099ccbad54a648b000
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-pdbutil.rst
M llvm/docs/DirectX/DXContainer.rst
Log Message:
-----------
[docs][tools][DirectX] Document DXContainer debug info parts (#204021)
This patch adds ILDB, ILDN, VERS, SRCI parts format documentation. It
describes how to use LLVM tools to inspect them. Additionally,
llvm-pdbutil documentation has been expanded with information on how to
inspect PDB files generated by the DirectX compiler.
Commit: 21f36e37286479a619d7010d938a97f50240e4c7
https://github.com/llvm/llvm-project/commit/21f36e37286479a619d7010d938a97f50240e4c7
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/clmul.ll
Log Message:
-----------
[CostModel][X86] Add PCLMUL cost table (#211113)
The current cost modeling for X86 does not have `ISD::CLMUL` listed in
any cost table, so the cost for `llvm.clmul` falls back to the default
for `Custom`, which is twice the type legalization cost. Since `CLMUL`
uses the `xmm` registers with `pclmulqdq`, this operation is typically
much more expensive. Add a new table for PCLMUL to reflect this.
Note that AVX, AVX512, and VPCLMULQDQ are still not modeled correctly.
This is left as a FIXME for now.
Assisted-by: Claude Opus 4.8
Commit: 280099e581ef165e3d2dafabcb856ec735321c81
https://github.com/llvm/llvm-project/commit/280099e581ef165e3d2dafabcb856ec735321c81
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
Log Message:
-----------
[VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (#208807)
Update widenConsecutiveMemOps to also widen reversed consecutive
accesses (stride == -1), by creating a VPVectorEndPointerRecipe via
VPBuilder, load and reverse.
PR: https://github.com/llvm/llvm-project/pull/208807
Commit: c66c625d66c5dd6609e41b54bbe19dd85be02528
https://github.com/llvm/llvm-project/commit/c66c625d66c5dd6609e41b54bbe19dd85be02528
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add TuneNoDefaultUnroll to spacemit-x60 (#211502)
This feature has been added to generic CPUs in #135318 and we don't
see any significant regression on `spacemit-x60`.
Commit: 492d726bcc169233d5e2c2077759977851c770ed
https://github.com/llvm/llvm-project/commit/492d726bcc169233d5e2c2077759977851c770ed
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/Headers/avx10_2satcvtdsintrin.h
M clang/test/CodeGen/X86/avx10_2satcvtds-builtins-x64.c
M clang/test/CodeGen/X86/avx10_2satcvtds-builtins.c
Log Message:
-----------
[X86][AVX10.2] Add missing _mm_cvtts_ss/sd* intrinsics (#211185)
Fixes part of #210947
Assisted-by: Claude Opus 4.8
Commit: f953ed4ec657bef2b92b798faa2872b75f1f4e81
https://github.com/llvm/llvm-project/commit/f953ed4ec657bef2b92b798faa2872b75f1f4e81
Author: guillem-bartrina-sonarsource <guillem.bartrina at sonarsource.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/test/Analysis/z3/z3-crosscheck.c
Log Message:
-----------
[analyzer][z3] Fix crash in Z3 SMTConv when casting atomic int (#211489)
CPP-7675
Commit: 0037f09f094b0843368df63069b351ec3b952cf8
https://github.com/llvm/llvm-project/commit/0037f09f094b0843368df63069b351ec3b952cf8
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
Log Message:
-----------
[NFC][analyzer] Eliminate the NodeBuilder in VisitUnaryOperator (#211304)
This is part of the commit series to gradually remove the class
`NodeBuilder` from the analyzer codebase.
This was a relatively complex situation because there were many
different `generateNode` calls and two situations where the the node
from `CheckedSet` was left in `EvalSet` without changes (which is
implicit with the `NodeBuilder` but now requires explicit
`EvalSet.insert(N)` calls).
Commit: cc1dd6bb25d00b3aa5420f43884bea3f4584cabf
https://github.com/llvm/llvm-project/commit/cc1dd6bb25d00b3aa5420f43884bea3f4584cabf
Author: David Green <david.green at arm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/test/Transforms/LoopUnroll/partial-unroll-reductions.ll
Log Message:
-----------
[LoopUnroll] Make the list of supported recurrence kinds inclusive. (#210957)
This excludes Sub, AddChainWithSubs, FSub and FAddChainWithSubs
recurrence kinds by making the list of supported types opt-in as opposed
to opt-out. This will hopefully mean that as more recurrence kinds are
added in the future, the list supported by the unrolling remains valid.
Fixes #201065
Commit: a6be8420d07734d80a695fb45b3531c7c7d832b7
https://github.com/llvm/llvm-project/commit/a6be8420d07734d80a695fb45b3531c7c7d832b7
Author: s1dd <sid9.karanam at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
Log Message:
-----------
[InstCombine] Fix typo in assert message for Fp state (#211244)
Commit: 1c825be24005af24237748ae98dae9cd4711bcdc
https://github.com/llvm/llvm-project/commit/1c825be24005af24237748ae98dae9cd4711bcdc
Author: hanbeom <kese111 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll
Log Message:
-----------
[VectorCombine] Check load offsets in APInt before narrowing shuffle indices (#210904)
vectorizeLoadInsert narrowed the APInt element offset to unsigned before
checking its range. Large offsets could wrap and select the wrong vector
element.
Check the offset range as an APInt before converting it to the shuffle
index. This prevents invalid load widening and is covered by
a regression test.
Fixes #210903
Commit: d814be1bb794baf0650158a6bd1dda23f4f86e99
https://github.com/llvm/llvm-project/commit/d814be1bb794baf0650158a6bd1dda23f4f86e99
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/test/Driver/flang/multiple-inputs-mixed.f90
A clang/test/Driver/flang/runtimes.f90
Log Message:
-----------
[NFC][clang][Driver] Add tests for --driver-mode=flang (#207658)
This patch intends to clarify the current behaviors, not to state the
expected/desirable behaviors.
---------
Co-authored-by: Tarun Prabhu <tarunprabhu at gmail.com>
Commit: de7cd6542afd53d66f730dfca5f4e47e5c35e16b
https://github.com/llvm/llvm-project/commit/de7cd6542afd53d66f730dfca5f4e47e5c35e16b
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/test/Analysis/z3/z3-bitint-arithmetic.c
Log Message:
-----------
[analyzer][Z3] Fix z3-bitint-arithmetic.c test RUN line (#211515)
I used to get these errors on M4 with `LLVM_ENABLE_Z3_SOLVER`:
```
error: 'expected-error' diagnostics seen but not expected:
File clang/test/Analysis/z3/z3-bitint-arithmetic.c Line 26: unsigned _BitInt of bit sizes greater than 128 not supported
File clang/test/Analysis/z3/z3-bitint-arithmetic.c Line 29: unsigned _BitInt of bit sizes greater than 128 not supported
```
Fixes up #210525
Another nail in the coffin of #184695
Commit: ecf4c970ddbcda2c2c65e7e5f208ffc86ed7c654
https://github.com/llvm/llvm-project/commit/ecf4c970ddbcda2c2c65e7e5f208ffc86ed7c654
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
Log Message:
-----------
[analyzer][NFC] Remove leftover PreElideState stash in copy elision (#211518)
computeObjectUnderConstruction stashed the program state into
PreElideState "before trying to elide, as it'll get overwritten", but
never used it. That comment and stash are fossils of the old
prepareForObjectConstruction, which returned and threaded the state
(`std::tie(State, V) = ...`); the failure path then reverted it with
`State = PreElideState;`.
The refactor to the SVal-returning computeObjectUnderConstruction (State
is now passed by value and the state updates moved to
updateObjectsUnderConstruction) dropped that revert but left the stash
and comment behind. State is never overwritten here anymore, so remove
the dead PreElideState and reword the comment to describe only the
CallOpts stash, which is still needed (CallOpts is passed by reference
and genuinely overwritten by the elision attempt).
Found with a clang-query matcher over clang/lib/StaticAnalyzer.
Assisted-by: claude
Commit: ad1b24345203b059226d6a43a5bb4ae79ad22184
https://github.com/llvm/llvm-project/commit/ad1b24345203b059226d6a43a5bb4ae79ad22184
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity-concat.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
Log Message:
-----------
[VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (#211508)
generateNewInstTree is recursive - ensure all new instructions are
pushed to the WorkList (and in the correct order).
I also renamed the local Worklist variable -> Candidates to stop
shadowing VectorCombine::WorkList - there's more "WorkLists" in
VectorCombine that need fixing but this was causing a particular
annoyance to this patch.
Commit: 48d5c3edb02a950c58a25711f729f3e6a7f3b624
https://github.com/llvm/llvm-project/commit/48d5c3edb02a950c58a25711f729f3e6a7f3b624
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerArithChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VAListChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[analyzer][NFC] Remove unused ProgramStateRef local variables (#211517)
Several checkers and ExprEngine declare a ProgramStateRef local that is
never read (typically `State = C.getState();` immediately followed by
code that re-fetches the state directly). These are not flagged by
-Wunused-variable because ProgramStateRef has a non-trivial destructor.
Found with a clang-query matcher over clang/lib/StaticAnalyzer.
Assisted-by: claude
Commit: 38b7237069f2e51ee8562cbce2014ae29e6459b5
https://github.com/llvm/llvm-project/commit/38b7237069f2e51ee8562cbce2014ae29e6459b5
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
Log Message:
-----------
[OFFLOAD][L0] Add NUM_LANES info (#211526)
Commit: fd67f99275f586c48ae6432bca2623a29c82bf8c
https://github.com/llvm/llvm-project/commit/fd67f99275f586c48ae6432bca2623a29c82bf8c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
A clang/test/CodeGenOpenCL/amdgpu-wavefront-size-from-subarch.cl
A clang/test/Preprocessor/amdgpu-subarch-cc1-target-cpu.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
clang/AMDGPU: Fix handling of subarch triples with no -mcpu (#211467)
Commit: 7d566aa440eece854c4103cbada67a215e416ec8
https://github.com/llvm/llvm-project/commit/7d566aa440eece854c4103cbada67a215e416ec8
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[OFFLOAD][L0] Restore function pointer lookup. (#211520)
PR #201352 incorrectly removed the calls to zeModuleGetGlobalPointer
when looking up a symbol.
Commit: 5f31853af85c36ac16bc92972fd877e04b93831a
https://github.com/llvm/llvm-project/commit/5f31853af85c36ac16bc92972fd877e04b93831a
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
Log Message:
-----------
[AArch64] Fix volatile flags in mops tests (NFC) (#211511)
Commit: 144595f400eaa08691c8fda82b80e83329c779ed
https://github.com/llvm/llvm-project/commit/144595f400eaa08691c8fda82b80e83329c779ed
Author: guyfischman <138163913+guyfischman at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/smul_fix_sat.ll
M llvm/test/CodeGen/AArch64/umul_fix_sat.ll
M llvm/test/CodeGen/X86/smul_fix_sat.ll
M llvm/test/CodeGen/X86/umul_fix_sat.ll
M llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
Log Message:
-----------
[SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (#209351)
Vector SMULFIXSAT/UMULFIXSAT were not handled by expandFixedPointMul in
the vector legalizer (a FIXME) and were unrolled to per-lane scalar
code: a single <8 x i16> smul.fix.sat was ~100 instructions on both
AArch64 and x86.
Expand the saturating variants like the non-saturating ones, and build
the saturation clamp with SETCC + VSELECT for vector types so it stays
vectorized instead of being scalarized by SELECT_CC legalization. Scalar
lowering is unchanged: the clamp change is guarded on isVector(), so
scalar fixed-point codegen on every target is bit-identical.
Additionally custom-lower SMULFIXSAT on AArch64 for scale == eltbits-1,
which is exactly sqdmulh, to a single instruction.
To the FIXME note - results in a ~12x speedup over the unroll fallback.
AI was used in the making of this PR, and if its feedback is to be
believed, this PR is a masterpiece of engineering.
Fixes #209334
Commit: b0b0a53e670bf15075c34514d82ce2a2c32c167a
https://github.com/llvm/llvm-project/commit/b0b0a53e670bf15075c34514d82ce2a2c32c167a
Author: Ariel-Burton <arielburton at yahoo.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/CodeGen/SystemZ/zos-check-lanuage.c
Log Message:
-----------
Write original source language when writing and reading AST (#209353)
FAIL: Clang :: Frontend/ast-main.c
FAIL: Clang :: Frontend/ast-main.cpp
were failing on z/OS; this change fixes these lit failures.
The issue here is that on z/OS the original source code language needs
to be passed through to the IR so that the backend can encode this
information in the PPA2 in the object file. That means that it needs to
be exported to the AST so that going from saved AST -> IR will carry the
language through.
Commit: a7d2602abf4f211e8027288f23629f8cc93ec30c
https://github.com/llvm/llvm-project/commit/a7d2602abf4f211e8027288f23629f8cc93ec30c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseProcedure.rst
Log Message:
-----------
[libc++] Update release procedure for libc++ & friends (#210383)
The release procedure implied that some tasks were done by the release
manager, but in practice they are done by the libc++ developers.
Also, mention using the `llvm-premerge-libcxx-release-runners` runner
set on the release branch, which was overlooked in the previous notes.
Other than that, minor reformulations.
Commit: 8fb7dfe629b94f57eead9b8fa3423606492fac31
https://github.com/llvm/llvm-project/commit/8fb7dfe629b94f57eead9b8fa3423606492fac31
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
Log Message:
-----------
[SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (#211198)
Commit: a65df8a1d42a34217bba1354c064b3fa40529507
https://github.com/llvm/llvm-project/commit/a65df8a1d42a34217bba1354c064b3fa40529507
Author: Karthika Devi C <kartc at qti.qualcomm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M polly/lib/Analysis/DependenceInfo.cpp
Log Message:
-----------
[Polly] Fix memory leak in DependenceAnalysis::Result::abandonDepende… (#211514)
abandonDependences() uses unique_ptr::release() which releases
ownership without freeing the Dependences object, causing a memory
leak. Use unique_ptr::reset() instead to properly delete the object
before nullifying the pointer.
The issue was found when AddressSanitizer is enabled in the build.
Commit: eb992b762c2e94d4671340f15f05e7fb8fb4215f
https://github.com/llvm/llvm-project/commit/eb992b762c2e94d4671340f15f05e7fb8fb4215f
Author: Paulius Velesko <pvelesko at pglc.io>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/ldexp-glsl.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/ldexp.ll
Log Message:
-----------
[SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (#195402)
## Summary
The SPIR-V backend handled only `G_STRICT_FLDEXP` (from
`llvm.experimental.constrained.ldexp`). Plain `Intrinsic::ldexp` lowers
to `G_FLDEXP` in `IRTranslator.cpp`, so device code that calls `ldexp()`
(or any libcall lowered to `llvm.ldexp.*`, including `scalbn`,
`scalbln`, integer-exponent `exp2`) failed legalization with `unable to
legalize instruction: G_FLDEXP`.
## Change
- `SPIRVLegalizerInfo.cpp`: extend the existing legalizer rule from
`{G_STRICT_FLDEXP}` to `{G_FLDEXP, G_STRICT_FLDEXP}`, sharing the same
`(allFloatScalarsAndVectors, allIntScalars)` cartesian product.
- `SPIRVInstructionSelector.cpp`: add a `case TargetOpcode::G_FLDEXP:`
next to the strict case, both selecting `selectExtInst(..., CL::ldexp,
GL::Ldexp)`. The `GL::Ldexp` opcode (53) was already declared in
`SPIRVBuiltins.td:447` but never referenced from a selector case -- this
also enables the GLSL.std.450 path for shader-mode targets.
- New lit test `test/CodeGen/SPIRV/llvm-intrinsics/ldexp.ll` covering
`f16`, `f32`, `f64` scalar and `<4 x f32>` vector forms under both
`spirv32` and `spirv64` triples. The pre-existing `transcoding/ldexp.ll`
only exercised the OpenCL-mangled-builtin path, which never reaches
`Intrinsic::ldexp`.
Originally observed compiling Kokkos device code through chipStar -- the
same gap exists in SPIRV-LLVM-Translator and is being fixed there in
parallel.
Commit: cb383a37440d27238f8a01eee05228910d65d63e
https://github.com/llvm/llvm-project/commit/cb383a37440d27238f8a01eee05228910d65d63e
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/Basic/ABIVersions.def
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/test/CodeGen/align-x68_64.c
M clang/test/CodeGenCXX/ms-constexpr-static-data-member.cpp
Log Message:
-----------
[Clang][X86] Introduce Clang ABI Gate for MSVC alignment (#210305)
On x86_64-windows-msvc after 8ecec455183f, clang applies the MSVC
size-based global-alignment scheme (Microsoft64BitMinGlobalAlign) and
does not apply the Sys V "large array" alignment increase. Users may
want to preserve the earlier ABI for compatibility with objects produced
by older clang releases.
Gate this behavior on the Clang ABI compatibility level. When
`-fclang-abi-compat=22` (or lower) is in effect,
MicrosoftX86_64TargetInfo restores LargeArrayMinWidth/LargeArrayAlign to
128 and getMinGlobalAlign skips the Microsoft64BitMinGlobalAlign step,
matching the older alignment choices.
Assisted by Claude (Anthropic).
Commit: d4427f75155f90238d997b3d4046bcc89f2de78c
https://github.com/llvm/llvm-project/commit/d4427f75155f90238d997b3d4046bcc89f2de78c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/tools/llubi/lib/ExecutorBase.h
M llvm/tools/llubi/lib/Value.cpp
M llvm/tools/llubi/lib/Value.h
M llvm/tools/llubi/llubi.cpp
Log Message:
-----------
[llubi][NFC] Use context-aware value printer (#211275)
As discussed in
https://github.com/llvm/llvm-project/pull/200672#discussion_r3624927046,
we need information from the global state to provide a better debugging
representation of byte SSA values.
This patch adds a wrapper to pass `Context&` into the actual printer.
Commit: e635f27b622a6c1256ea8c1bed21bec3b836c15a
https://github.com/llvm/llvm-project/commit/e635f27b622a6c1256ea8c1bed21bec3b836c15a
Author: Tõnu Samuel <tonuonu at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
Log Message:
-----------
[TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (#206274)
## Summary
glibc 2.35 extended x86_64 libmvec with vector implementations of `erf`,
`erfc`,
`cbrt`, `expm1`, `log1p`, `asinh`, `acosh` and `atanh` (among others),
but LLVM's
`LIBMVEC_X86` table in `VecFuncs.def` was never updated past the
original glibc-2.22
set. As a result `clang -fveclib=libmvec` cannot vectorize loops over
these functions
on x86_64, even though the vector symbols are present in the linked
`libmvec.so`. The
AArch64 libmvec table already maps several of them.
This patch adds the x86 mappings for the 8 GLIBC-2.35 functions that
have **no
corresponding LLVM intrinsic** (pure named/TLI mappings). The
intrinsic-backed
additions (`sinh`, `cosh`, `tanh`, `asin`, `acos`, `atan`, `exp2`,
`exp10`, `log2`,
`log10`) are left for a follow-up. The mappings mirror the existing
`exp`/`log`
entries — only the SSE (`_ZGVbN…`) and AVX2 (`_ZGVdN…`) widths; the
**AVX-512
(`_ZGVeN…`) variants are intentionally omitted** until the
512-bit-call-on-narrower-
target miscompilation (#204930) is resolved. The symbols are verified
present in
glibc ≥ 2.35.
Tracks #206273.
## Test
Extends `llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll`
with a
vectorization check per added function. `add-TLI-mappings.ll` is
unaffected
(verified locally for both the x86 and AArch64 run lines).
## Motivation
These functions are currently unreachable via `-fveclib=libmvec` on x86,
so loops
over them stay scalar. best-of-20 timing of a 16M-element scalar libm
loop vs the
libmvec-vectorized loop (AVX2 / `ZGVdN` path — i.e. exactly what this
patch enables):
| function | Zen (AVX2) | Xeon W-2235 (AVX2) |
|---|---|---|
| erf | 13.4× | 15.7× |
| erfc | 8.8× | 12.4× |
| cbrt | 6.8× | 9.1× |
| expm1 | 7.5× | 12.0× |
| log1p | 6.7× | 10.8× |
| asinh | 1.9× | 3.9× |
| acosh | 1.6× | 4.1× |
| atanh | 4.2× | 8.5× |
gcc already emits these via libmvec; this brings clang
`-fveclib=libmvec` to parity.
---
Human, assisted by robot. The human reviews all the posts.
Commit: 728522b6644457367b7ce9056bb3d0577bf128a8
https://github.com/llvm/llvm-project/commit/728522b6644457367b7ce9056bb3d0577bf128a8
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/step/TestDAP_step.py
M lldb/test/API/tools/lldb-dap/stepInTargets/TestDAP_stepInTargets.py
M lldb/test/API/tools/lldb-dap/stop-hooks/TestDAP_stop_hooks.py
Log Message:
-----------
[lldb-dap] Miragte the DAP step and stop hooks tests (#209936)
Migrated Tests:
- TestDAP_step.py
- TestDAP_stepInTargets.py
- TestDAP_stop_hooks.py
Commit: bd3546eaedaa0bc89f6706c619074d59ba00bafe
https://github.com/llvm/llvm-project/commit/bd3546eaedaa0bc89f6706c619074d59ba00bafe
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
M lldb/test/API/tools/lldb-dap/attach-commands/TestDAP_attachCommands.py
M lldb/test/API/tools/lldb-dap/attach-commands/main.c
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attachByPortNum.py
M lldb/test/API/tools/lldb-dap/attach/main.c
Log Message:
-----------
[lldb-dap] Migrate DAP attach tests. (#210814)
Address some issues with the previous tests.
- Always wait for the continued event after sending a continue request.
since the continue response is just an acknowlegement that we send a
continue packet.
- Retry reading stdin if it has an error when the debugger attaches.
- Update and enable the attachByPortNum test, this may now run on NetBSD
and Windows. will try to enable in a different PR.
Commit: 94404723f0dff00d07bd13d2f420b953d57a6db4
https://github.com/llvm/llvm-project/commit/94404723f0dff00d07bd13d2f420b953d57a6db4
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/test/Driver/flang/multiple-inputs-mixed.f90
R clang/test/Driver/flang/runtimes.f90
Log Message:
-----------
Revert "[NFC][clang][Driver] Add tests for --driver-mode=flang"
Reverts llvm/llvm-project#207658 due to buildbot failure
Commit: 70b67433644e3b9cb206a7d2c3dbb062dc854e9a
https://github.com/llvm/llvm-project/commit/70b67433644e3b9cb206a7d2c3dbb062dc854e9a
Author: David Green <david.green at arm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/ctpop.ll
Log Message:
-----------
[AArch64] Add a ctpop cost with CSSC (#211189)
FEAT_CSSC adds a CNT instruction that can perform ctpop. This adds a
specific cost for it to prevent us from using the neon cost.
Commit: 882a1381942c3bb4208136743ca7d743947a00a2
https://github.com/llvm/llvm-project/commit/882a1381942c3bb4208136743ca7d743947a00a2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/robust_against_operator_ampersand.cpp
Log Message:
-----------
[libc++] Remove workaround for Clang < 20 in clang-tidy plugin (#211314)
The clang-tidy plugin is now always built with Clang >= 20, so the
workaround can be removed.
Commit: d1d3891077f6f803a8d2dc000f7a4cd11a66ac3c
https://github.com/llvm/llvm-project/commit/d1d3891077f6f803a8d2dc000f7a4cd11a66ac3c
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libunwind/test/aarch64_za_unwind.pass.cpp
Log Message:
-----------
[libunwind] XFAIL the za unwind test on Apple targets older than OS 27.0 (#211379)
When linking against the system unwinder on macOS < 27, the test
fails on platforms that support SME.
Commit: 624569002f06a27543ac964b2b338d677deb4e37
https://github.com/llvm/llvm-project/commit/624569002f06a27543ac964b2b338d677deb4e37
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
A llvm/test/CodeGen/PowerPC/fp-classify-nan.ll
Log Message:
-----------
[PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (#204170)
For the IR representation:
isnan(x) → %0 = tail call noundef i1 @llvm.is.fpclass.f64(double %x, i32
3)
!isnan(x) → %0 = tail call noundef i1 @llvm.is.fpclass.f64(double %x,
i32 1020)
Under `-ffp-model=strict`, the generic
TargetLowering::expandIS_FPCLASS() is used to lower these when
Subtarget.hasP9Vector() && Subtarget.useCRBits() is false. However,
PowerPC has more optimal assembly sequences for isnan(x) and !isnan(x)
on POWER7/8 and generic PPC targets.
We implement a custom lowering for isnan(x) and !isnan(x) under
`-ffp-model=strict`, using `fcmpu `for POWER7/8 and generic PPC targets,
and` xscmpudp` for targets where VSX is available.
Commit: b142e77672d2992640e4f31c54d771191a0b8610
https://github.com/llvm/llvm-project/commit/b142e77672d2992640e4f31c54d771191a0b8610
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-minmax-const.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Don't combine uniform fmin/max into clamp/fmed3 (#211456)
Uniform fmin/fmax/fmed3 makes the reg-bank combiner produce a
clamp/fmed3 with an sgpr-banked destination. As these clamp/fmed3 only
have VALU selection patterns, the sgpr bank cannot be selected. Only
combine when the destination is vgpr-banked.
Commit: be86221af36d62be2e25a8b6e89ae8199d9dce0a
https://github.com/llvm/llvm-project/commit/be86221af36d62be2e25a8b6e89ae8199d9dce0a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/any_of.h
Log Message:
-----------
[libc++] Implement any_of in terms of find_if (#207274)
This way, any optimizations in find_if will be picked up by any_of.
Closes #129310
Commit: aab7e0b08d30ddca5858069a4c14c1ea3da042e6
https://github.com/llvm/llvm-project/commit/aab7e0b08d30ddca5858069a4c14c1ea3da042e6
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Combine unranked/ranked tensor types into single type (#209737)
This commit refactors the defined TOSA types to combine unranked and
ranked tensor types into a single type `TosaTensorOf`. This helps
simplify the type definitions and allows all tensor types to support
both unranked and ranked tensors.
Commit: ea99db7e4a0277eb0c327a72ac2f3cd9017315f1
https://github.com/llvm/llvm-project/commit/ea99db7e4a0277eb0c327a72ac2f3cd9017315f1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Transforms/SLPVectorizer/X86/fma-fmuladd-mix.ll
Log Message:
-----------
[SLP]Combine fma and fmuladd into a single vector fma node
fmuladd permits the fused form and fma requires it, so a mixed bundle is
vectorized as one vector fma, with fma as the representative to avoid
weakening the fma lanes; an all-fmuladd bundle still stays fmuladd.
Reviewers: bababuck, RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/211291
Commit: c2811362b9dd240583ffaa59fabd16d29c644931
https://github.com/llvm/llvm-project/commit/c2811362b9dd240583ffaa59fabd16d29c644931
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyMCLowerPrePass
Standard NewPM pass porting.
Reviewers: sbc100, dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210440
Commit: b9f17dd9d7604129f35eb30124f713b819197972
https://github.com/llvm/llvm-project/commit/b9f17dd9d7604129f35eb30124f713b819197972
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
Log Message:
-----------
[WebAssembly] Port AsmPrinter
Lots of boilerplate, but this is standard and there's probably not much
we can do to improve the situation until we have deleted the LegacyPM.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210448
Commit: 3cbb24bd5412a5ecea5a0e4d1603e0a38676432d
https://github.com/llvm/llvm-project/commit/3cbb24bd5412a5ecea5a0e4d1603e0a38676432d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
Log Message:
-----------
[mlir][vector] Update CastAway{Extract|Insert}StridedSliceLeadingOneDim (#210902)
Update both:
* CastAwayExtractStridedSliceLeadingOneDim
* CastAwayInsertStridedSliceLeadingOneDim
to use vector.shape_cast, rather than vector.extract and
vector.broadcast, as the canonical form for stripping unit dimensions.
This change was originally implemented by @krzysz00 in #196206, but was
subsequently reverted in #199546. This PR intentionally restores only a
subset of #196206, making it easier to identify and triage any potential
regressions.
Co-authored-by: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Commit: dcbf87542b26480c365b6388b5accf05d0507626
https://github.com/llvm/llvm-project/commit/dcbf87542b26480c365b6388b5accf05d0507626
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
A mlir/test/Dialect/SparseTensor/sparse_vector_coo.mlir
Log Message:
-----------
[mlir][sparse] Avoid vectorizing non-contiguous COO coordinate loads (#211004)
`SparseVectorization` assumes direct loop accesses (`a[lo:hi]`) are
contiguous and vectorizes them with `vector.maskedload/maskedstore`.
This is false for `sparse_tensor.coordinates` of a level inside a
trailing AoS COO region, whose buffer is interleaved with other levels:
a silent miscompile.
The true stride is already known from the tensor's encoding, even though
the memref type is still dynamic at this point. Use it to fall back to a
scalar loop when the stride is provably non-unit.
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: bb22aa8127450930eb27215eb9f2c70acdee69fc
https://github.com/llvm/llvm-project/commit/bb22aa8127450930eb27215eb9f2c70acdee69fc
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/IR/Constants.cpp
Log Message:
-----------
[IR] Slightly optimize getElementAsInteger() (#211550)
This regressed with the introduction of the byte type, because
getElementPointer() calls getElementByteSize() calls
getPrimitiveSizeInBits(), but the switch used getScalarTypeInBits(),
which means we need to do two separate calls for the element size. Use
getElementByteSize() in both places so these can be CSEd.
Commit: 8b690a085406337f7a02ab466df494bce5f75f41
https://github.com/llvm/llvm-project/commit/8b690a085406337f7a02ab466df494bce5f75f41
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
M mlir/test/Dialect/Vector/vector-mem-transforms.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/compress.mlir
Log Message:
-----------
[mlir][vector] Make CompressstoreOp + ExpandloadOp support scalable vectors (#210288)
Extends `vector.compressstore` + `vector.expandload` to support scalable
vectors and updates relevant tests.
An e2e test for `vector.compressstore` is added. For
`vector.expandload`, we need to wait for QEMU support:
https://github.com/llvm/llvm-project/issues/210942.
Commit: 97a5889383220967c7ed4eb8d23470d875f8cbcc
https://github.com/llvm/llvm-project/commit/97a5889383220967c7ed4eb8d23470d875f8cbcc
Author: Akash Agrawal <akashag at qti.qualcomm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaAccess.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
Log Message:
-----------
[Clang][Sema] Don't delay the access check when computing implicit deletion (#210254)
Sema::isMemberAccessibleForDeletion treats AR_delayed as unreachable,
but CheckAccess returns AR_delayed whenever it runs inside an enclosing
delayed-diagnostics scope. That happens when deletion checking runs
synchronously while parsing a later declaration -- e.g. while explaining
why a defaulted operator<=> is deleted for an expression in that
declaration's initializer. The caller cannot consume a delayed
diagnostic, so letting CheckAccess delay always hits
llvm_unreachable("cannot delay =delete computation") and crashes.
Force an immediate answer by wrapping the CheckAccess call in
DelayedDiagnostics.pushUndelayed()/popUndelayed() via llvm::scope_exit,
mirroring the existing Sema::CheckEnableIf pattern in SemaOverload.cpp.
Fixes https://github.com/llvm/llvm-project/issues/210692
Co-authored-by: Claude-Sonnet
Commit: 2697ad154734e49f15f787c180fde969433f2968
https://github.com/llvm/llvm-project/commit/2697ad154734e49f15f787c180fde969433f2968
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port e04cf35fc64c (#211576)
Commit: 9b3cc3c1d466f698abb3f59353f9dc638b20ea38
https://github.com/llvm/llvm-project/commit/9b3cc3c1d466f698abb3f59353f9dc638b20ea38
Author: Ken Matsui <26405363+ken-matsui at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/ConstantRange.h
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/ConstantRange.cpp
A llvm/test/Transforms/CorrelatedValuePropagation/mul-nuw-square.ll
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[LVI] Infer ranges from mul nuw square conditions (#173127)
A non-poison comparison involving `mul nuw X, X` implies that the
multiplication does not overflow. This bounds X by:
X <= floor(sqrt(2^bitwidth(X) - 1)) (e.g., i16: X <= 255)
An unsigned constant comparison can tighten the bound, e.g.,
`X * X <= 120` implies `X <= 10`.
Fixes https://github.com/llvm/llvm-project/issues/122412
Commit: 6690cd6f9f5f0c1ee5157f013b50dfcfcb665f2b
https://github.com/llvm/llvm-project/commit/6690cd6f9f5f0c1ee5157f013b50dfcfcb665f2b
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/docs/HIPSupport.md
Log Message:
-----------
[DOC] Update SPIR-V Support on HIPAMD ToolChain (#211542)
SPIR-V backend now is the default path.
Commit: 4d777c139fc23303e8fc5cc9a78069aef94ab0ab
https://github.com/llvm/llvm-project/commit/4d777c139fc23303e8fc5cc9a78069aef94ab0ab
Author: Prem C <premccloudacc at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/include/mlir/IR/Region.h
M mlir/include/mlir/Interfaces/LoopLikeInterface.td
M mlir/test/Conversion/FuncToLLVM/func-to-llvm.mlir
Log Message:
-----------
[mlir] Handle null region in LoopLikeOpInterface::isDefinedOutsideOfLoop (#204521)
Fixes #203860
In LoopLikeOpInterface::isDefinedOutsideOfLoop default implementation,
value.getParentRegion() can return null during signature conversion
rollbacks when blocks/ops are unlinked. Check for null region to avoid a
segmentation fault.
Also, add a regression test for convert-func-to-llvm with
index-bitwidth=32 on functions with affine.for loops.
Commit: d2f164231c6cf5ed24ae67ea6bd9c7ea89257076
https://github.com/llvm/llvm-project/commit/d2f164231c6cf5ed24ae67ea6bd9c7ea89257076
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
A llvm/test/CodeGen/AMDGPU/anyext-s16-to-s64.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize G_ANYEXT s16 to s64 (#205470)
Add rules for G_ANYEXT s16->s64 matching SEXT and ZEXT s16->s64.
Commit: e2a39f504fee836e4def9581bed817ecc327b9dc
https://github.com/llvm/llvm-project/commit/e2a39f504fee836e4def9581bed817ecc327b9dc
Author: Siu Chi Chan <siuchi.chan at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.offset-split.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/clmul.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
M llvm/test/CodeGen/AMDGPU/flat-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-attr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.flat.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk16.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.pk.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.async.barrier.arrive.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.barrier.arrive.rtn.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.tr.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.async.tensor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.index.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-barriers.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/packed_shl64_combine.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/s-cluster-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/CodeGen/AMDGPU/spillv16Kernel.ll
M llvm/test/CodeGen/AMDGPU/strict_fptrunc_bf16.ll
M llvm/test/CodeGen/AMDGPU/sub_u64.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-drain.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-store-barrier.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-opt.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/MC/AMDGPU/amdhsa-kernel-prologue.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
Log Message:
-----------
[AMDGPU] Use global_prefetch_b8 for GFX1250 unclaused VMEM workaround (#210874)
Replace GLOBAL_WB with GLOBAL_PREFETCH_B8
Commit: 8543a5b116c03289b7659cd1d2cbd85fa51a7175
https://github.com/llvm/llvm-project/commit/8543a5b116c03289b7659cd1d2cbd85fa51a7175
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/MC/AMDGPU/alignto_mcexpr.s
M llvm/test/MC/AMDGPU/amd-amdgpu-isa-malformed-target-id.s
M llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn-target-directive-subarch-cpu-field.s
M llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
M llvm/test/MC/AMDGPU/amdgcn-target-malformed-target-id.s
M llvm/test/MC/AMDGPU/amdgpu-info-err.s
M llvm/test/MC/AMDGPU/amdhsa-kd-kernarg-preload.s
M llvm/test/MC/AMDGPU/cfi_reloc.s
M llvm/test/MC/AMDGPU/elf-header-cov.s
M llvm/test/MC/AMDGPU/elf-lds-error.s
M llvm/test/MC/AMDGPU/elf-lds.s
M llvm/test/MC/AMDGPU/extrasgprs_mcexpr.s
M llvm/test/MC/AMDGPU/hsa-amdgpu-exprs.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4-user-sgpr-err.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx125x-v4-user-sgpr-err.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4-user-sgpr-err.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-sgpr-init-bug-v3.s
M llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx10.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx11.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx12.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx7.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx8.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx90a.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/invalid-instructions-spellcheck.s
M llvm/test/MC/AMDGPU/isa-version-hsa.s
M llvm/test/MC/AMDGPU/isa-version-pal.s
M llvm/test/MC/AMDGPU/isa-version-unk.s
M llvm/test/MC/AMDGPU/mcexpr_amd.s
M llvm/test/MC/AMDGPU/mcexpr_amd_err.s
M llvm/test/MC/AMDGPU/occupancy_mcexpr.s
M llvm/test/MC/AMDGPU/pal-msgpack.s
M llvm/test/MC/AMDGPU/pal-registers.s
M llvm/test/MC/AMDGPU/pal.s
M llvm/test/MC/AMDGPU/reloc.s
M llvm/test/MC/AMDGPU/round-trip.s
M llvm/test/MC/AMDGPU/totalnumvgpr_mcexpr.s
M llvm/test/MC/AMDGPU/user-sgpr-count-diag.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
Log Message:
-----------
AMDGPU: Use llvm-mc -triple= arguments instead of space separator (#211510)
-triple=amdgcn... is the dominant form over -triple amdgcn. Convert
the outliers for easier subarch triple conversion.
Commit: 8e473468609ada1c03770343ce81299db68c07c4
https://github.com/llvm/llvm-project/commit/8e473468609ada1c03770343ce81299db68c07c4
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
Log Message:
-----------
[AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in non-IEEE mode (#207896)
v32f16 was marked Custom but omitted from the handler split-list, so it
fell through to selection and failed with "Cannot select"
The dead v16bf16 branch (never marked Custom) is dropped in the same
change
Commit: 3beb48b6bfeffe70d0e794171901f6d6f391fcda
https://github.com/llvm/llvm-project/commit/3beb48b6bfeffe70d0e794171901f6d6f391fcda
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs.mir
Log Message:
-----------
[AMDGPU] Fix SIPreAllocateWWMRegs to reserve AV-class WWM defs (#211560)
isVGPR() rejects the unified VGPR+AGPR register class used on gfx90A+,
so strict-WWM defs allocated to an AV-class register were left out of
WWMReservedRegs and could be clobbered by the post-WWM allocator
Commit: 66d6316c9f00ff67b763ce30583c34b1a92fa438
https://github.com/llvm/llvm-project/commit/66d6316c9f00ff67b763ce30583c34b1a92fa438
Author: Michael Jones <michaelrj at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libc/test/integration/src/stdlib/CMakeLists.txt
M libc/test/integration/src/sys/sem/CMakeLists.txt
Log Message:
-----------
[libc] Fix missed errno deps for integration tests (#211415)
Fullbuild testing pulls in LLVM-libc's errno, which needs to be linked
explicitly.
Commit: 45250b2db177add3433035ce09069b1c219499d4
https://github.com/llvm/llvm-project/commit/45250b2db177add3433035ce09069b1c219499d4
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[SPIRV][NFCI] Refactor selection of atomic operations with pointer operands (#208294)
We do similar things for the three different cases (load, store,
exchange), so share some logic.
Suggested
[here](https://github.com/llvm/llvm-project/pull/207830#issuecomment-4912670227).
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: a8bb2e0ce207f903b05fb101bc6909594e008552
https://github.com/llvm/llvm-project/commit/a8bb2e0ce207f903b05fb101bc6909594e008552
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/FunctionComparator.cpp
A llvm/test/Transforms/MergeFunc/atomic-elementwise.ll
Log Message:
-----------
[MergeFuncs] Account for elementwise loads and atomicrmw in FunctionComparator (#211478)
Distinguish elementwise atomic loads and atomicrmw instructions from
their
whole-vector counterparts when comparing functions, preventing
MergeFunctions
from merging functions with different atomic semantics.
Commit: c050c487e9edb97ef44f53cb29fe1d8bcddb8f76
https://github.com/llvm/llvm-project/commit/c050c487e9edb97ef44f53cb29fe1d8bcddb8f76
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/test/CodeGen/AArch64/arm64e-tail-call-autib.ll
M llvm/test/CodeGen/AArch64/pauth-lr-tail-call-fpdiff.ll
M llvm/test/CodeGen/AArch64/swifttail-ptrauth.ll
Log Message:
-----------
[llvm][AArch64] Eliminate redundant mov's sandwiching aut's in tail calls (#211105)
When the target has +pauth, we don't have to use the hint space compatible encodings (auti[ab]1716), and instead can directly authenticate lr with auti[ab].
Commit: 10600d0f4825a1896f571abc154eb9ddf47eee9d
https://github.com/llvm/llvm-project/commit/10600d0f4825a1896f571abc154eb9ddf47eee9d
Author: Lucas Ly Ba <hi at lucaslyba.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
A clang/test/Analysis/issue-206798.cpp
Log Message:
-----------
[analyzer] Make pointer/null comparison commutative for addresses of fields of symbolic regions (#209875)
Fixes #206798
A reversed ("Yoda") null check `nullptr == p` produced a false
`core.NullDereference` when `p` is the address of a field of a symbolic
region (e.g. `&r->s`). The natural form (`p == nullptr`) worked fine.
Commit: 557e5c12f88e607628048b7768a30d19e9c95670
https://github.com/llvm/llvm-project/commit/557e5c12f88e607628048b7768a30d19e9c95670
Author: Rithik Sharma <rithiksh02 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRStdOps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/IdiomRecognizer.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/IR/std-ops-invalid.cir
A clang/test/CIR/IR/std-ops.cir
A clang/test/CIR/Transforms/idiom-recognizer-strlen-guards.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
Log Message:
-----------
[CIR] Recognize strlen in the IdiomRecognizer pass (#210400)
This patch adds the operation cir.std.strlen and teaches the recognizer
to raise strlen calls, following the ClangIR incubator. A C library
function carries no identity tag, so strlen is matched by its callee
symbol, which works since C names have no mangling.
The symbol alone is not enough when builtins are disabled, so the
recognizer honors the no builtin state CIRGen records, the mark on the
call and the list on the calling function. A call is raised only when it
is a direct call named strlen with one pointer to an 8 bit character of
either signedness, since the signedness of plain char follows the
target, and a fundamental unsigned integer result. A _BitInt is excluded
even at width 8.
The raised operation lowers back through the same generic function as
the other raised operations, and every call attribute is carried across,
so a no builtin mark or list survives the round trip. Tests cover the
raise, the symbol match, the no builtin cases, and the type guard.
Aided by Claude Opus 4.8
Commit: 3bf4e7382579b9c91590a6ead7007e612de40245
https://github.com/llvm/llvm-project/commit/3bf4e7382579b9c91590a6ead7007e612de40245
Author: Ian Li <ian.li at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
Log Message:
-----------
[analyzer] Add some speculative hardening (#210823)
Coverity uncovered some potential hardening opportunities -
mainly to prevent nullptr derefs.
Commit: 9a378643f160dfc5a1cf8a596651b46e9b36e378
https://github.com/llvm/llvm-project/commit/9a378643f160dfc5a1cf8a596651b46e9b36e378
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
Log Message:
-----------
[GlobalISel] Fix volatile flag handling in memmove legalizer (#206025)
Also refactors memmove and memcpy legalization for consistency, and adds
some assertions.
Commit: 8b37951e1180c88619e1276c3df65f303735cd02
https://github.com/llvm/llvm-project/commit/8b37951e1180c88619e1276c3df65f303735cd02
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/MachineVerifier/AMDGPU/av_mov_b64_imm_pseudo.mir
M llvm/test/MachineVerifier/AMDGPU/dpp-imm-src1.mir
M llvm/test/MachineVerifier/AMDGPU/dpp-sgpr-src1.mir
M llvm/test/MachineVerifier/AMDGPU/fix-illegal-vector-copies.mir
M llvm/test/MachineVerifier/AMDGPU/hazard-gfx1250-flat-src-hi.mir
M llvm/test/MachineVerifier/AMDGPU/invalid-vop3-source-modifiers.mir
M llvm/test/MachineVerifier/AMDGPU/issue98474-missing-def-liveout-physical-subregister.mir
M llvm/test/MachineVerifier/AMDGPU/lit64.mir
M llvm/test/MachineVerifier/AMDGPU/register-killed-inside-loop.mir
M llvm/test/MachineVerifier/AMDGPU/test_copy_physregs_llt_virtreg.mir
M llvm/test/MachineVerifier/AMDGPU/test_g_bitcast.mir
M llvm/test/MachineVerifier/AMDGPU/test_g_incompatible_range.mir
M llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic.mir
M llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic_w_side_effects.mir
M llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir
M llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-nonentry-block.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-subreg-index-aligned-vgpr-check.mir
M llvm/test/MachineVerifier/AMDGPU/unsupported-unaligned-vgpr-check-vsrc-operand.mir
M llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-invalid-lanemask.mir
M llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-missing-lanemask.mir
M llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir
M llvm/test/MachineVerifier/AMDGPU/verifier-pseudo-terminators.mir
M llvm/test/MachineVerifier/AMDGPU/verifier-sdwa-selection.mir
M llvm/test/MachineVerifier/AMDGPU/verify-av-mov-imm-pseudo.mir
M llvm/test/MachineVerifier/AMDGPU/verify-ds-vdata-vdst-both-agpr-or-vgpr.mir
M llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir
Log Message:
-----------
AMDGPU: Migrate more machine verifier tests to subarch triples (#211509)
Commit: e40b94bde99b0e990c51d821a54bafec82964cb2
https://github.com/llvm/llvm-project/commit/e40b94bde99b0e990c51d821a54bafec82964cb2
Author: Twice <twice at apache.org>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/include/mlir-c/Interfaces.h
M mlir/include/mlir/Bindings/Python/IRInterfaces.h
M mlir/include/mlir/CAPI/Interfaces.h
M mlir/lib/Bindings/Python/DialectTransform.cpp
M mlir/lib/Bindings/Python/IRInterfaces.cpp
M mlir/lib/CAPI/Interfaces/Interfaces.cpp
M mlir/test/CAPI/ir.c
A mlir/test/python/dialects/memory_effects_op_interface.py
Log Message:
-----------
[MLIR][CAPI][Python] Add support for constructing memory effect instances (#210586)
Python implementations of `MemoryEffectsOpInterface` receive a
`MemoryEffectInstancesList` (added in #176920), but currently have no
generic way to populate it.
This adds the C API for constructing and appending memory effect
instances and exposes it in Python through `MemoryEffect`,
`SideEffectResource`, and `MemoryEffectInstancesList.append`. The tests
use CSE and DCE to verify that the declared effects are observed by MLIR
passes.
Assisted-by: GPT 5.6 Sol
Commit: 7f7618b66a2cba7497ace5d4513be6d95e7bb4d5
https://github.com/llvm/llvm-project/commit/7f7618b66a2cba7497ace5d4513be6d95e7bb4d5
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/anyext-s16-to-s64.ll
Log Message:
-----------
[AMDGPU] Regenerate failing test (#211598)
Regenerate test due to another in-flight patch that made a slight change
to global prefetch instruction.
Commit: fcff12829ecee44d715d9f901c0195fb1f30a881
https://github.com/llvm/llvm-project/commit/fcff12829ecee44d715d9f901c0195fb1f30a881
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Analysis/LoopInfo.cpp
A llvm/test/Transforms/LoopSimplify/drop-ub-attributes.ll
Log Message:
-----------
[LoopInfo] Fix makeLoopInvariant to strip UB-implying attributes. (#211413)
isSafeToSpeculativelyExecute gained an argument to check for UB-implying
attributes in 830cf36bd4c49, but the default is to ignore them. Update
this code to account for that.
Fixes #210137
Commit: c1f5a36babad4ae87cef6f2cd18e7865ea28402a
https://github.com/llvm/llvm-project/commit/c1f5a36babad4ae87cef6f2cd18e7865ea28402a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[CI] Drop replacement comment in monolithic-* workflows (#211580)
These workflows have been around for a while and I don't think we have
any plans to migrate to per project specific testing given how the LLVM
build is currently wired up. I believe these comments were from an era
where it was believed that testing would look a lot more like libc++
across the board with projects contributing all of their own individual
configurations.
Commit: d77e1617b7e6d857dc9cb42d449126e4cb2b3783
https://github.com/llvm/llvm-project/commit/d77e1617b7e6d857dc9cb42d449126e4cb2b3783
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[NFC][AMDGPU] Fix redundant target feature datacachelinesize128 (#211586)
Commit: 1e7c2ac9789b166cdb96a6712a694ae08b6f7a91
https://github.com/llvm/llvm-project/commit/1e7c2ac9789b166cdb96a6712a694ae08b6f7a91
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M offload/CMakeLists.txt
Log Message:
-----------
[OFFLOAD] Add level_zero to list of default plugins (#210070)
Adds level_zero to the list of LIBOMPTARGET_ALL_PLUGIN_TARGETS which are
build by default.
Commit: 10e0a2ee03b02a456b8d6adca4c44f01464f3d39
https://github.com/llvm/llvm-project/commit/10e0a2ee03b02a456b8d6adca4c44f01464f3d39
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.h
Log Message:
-----------
[WebKit Checkers] Share the safety model of WebKit smart pointers (#210195)
This PR introduces PtrRefSafetyModel to abstract away type checks for
various smart pointer types in WebKit to share more code between
different checkers.
Commit: 8d4f2368a090ca3caed692034422f27498a8d7be
https://github.com/llvm/llvm-project/commit/8d4f2368a090ca3caed692034422f27498a8d7be
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/pthread_t.h
M libc/include/pthread.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/sched_getparam.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/sched_getscheduler.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/sched_setscheduler.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_getschedparam.cpp
A libc/src/pthread/pthread_getschedparam.h
A libc/src/pthread/pthread_setschedparam.cpp
A libc/src/pthread/pthread_setschedparam.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_setschedparam_test.cpp
Log Message:
-----------
[libc] Implement pthread_setschedparam and getschedparam (#205770)
Implemented the pthread_setschedparam and pthread_getschedparam
functions.
Added Linux syscall wrappers:
* sched_setscheduler
* sched_getscheduler
* sched_getparam
Updated the Thread class to support getting and setting scheduling
parameters.
Added integration tests to verify the implementation.
Assisted-by: Automated tooling, human reviewed.
Commit: 1e7817c938ef58c015eab4d18538a5509559cd8a
https://github.com/llvm/llvm-project/commit/1e7817c938ef58c015eab4d18538a5509559cd8a
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
Log Message:
-----------
[NFC][analyzer] Apply any_of to detect destructors stack frame (#211582)
Since #210938 is merged I have also applied the same parent-chain helper
to detect if a destructor's stack frame is on the current stack.
Commit: 98e71359dd152335797c274b6dd735eedb70f7b8
https://github.com/llvm/llvm-project/commit/98e71359dd152335797c274b6dd735eedb70f7b8
Author: Karim Alweheshy <karim.alweheshy at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LCSSA.cpp
A llvm/test/Transforms/LCSSA/lifetime-markers.ll
Log Message:
-----------
[LCSSA] Avoid rewriting lifetime markers through PHIs (#210811)
Lifetime intrinsics have been required to reference an alloca directly
since #149310. LCSSA can currently violate that invariant when a
loop-local alloca has a lifetime marker outside the loop: SSA
reconstruction rewrites the marker operand through an exit PHI, and the
verifier rejects the result.
Collect lifetime markers while scanning uses. If one crosses the loop
boundary, conservatively erase the complete marker set for that alloca
instead of rewriting any marker. Removing the markers extends the
modeled lifetime and preserves program semantics. This follows the same
strategy adopted for JumpThreading in #188147.
The regression test covers both sides of the behavior:
- a lifetime end outside the loop drops both the start and end markers;
- markers that remain inside the loop are preserved while another alloca
use receives an LCSSA PHI.
Validation:
- opt -passes=function(lcssa),verify followed by FileCheck passes with
the patched LLVM 23 build;
- the reduced input was derived from Swift 6.3 bitcode that failed
during an upstream LLVM full-LTO link;
- the affected full-LTO link completes with this fix applied.
Commit: ca204851eb3177d69159a8f8a755e1b622089a19
https://github.com/llvm/llvm-project/commit/ca204851eb3177d69159a8f8a755e1b622089a19
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lldb/include/lldb/Symbol/Function.h
M lldb/source/Symbol/Function.cpp
M lldb/source/Symbol/SymbolContext.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/source-list-function-entry-not-covered.s
Log Message:
-----------
[lldb] Create a GetStartLineEntry helper (#211264)
A WebAssembly function's entry address points at the locals-declaration
header, which carries no line information, so the first line table row
begins past the entry point.
We already handled this in GetPrologueByteSize (dd069b691dd3), but there
are other places that need the same support (GetStartLineSourceInfo,
GetFunctionStartLineEntry). Rather than duplicating the logic, create a
shared helper.
Commit: 6425cf4ce732d660a1cdd08ea830d7734a325eb8
https://github.com/llvm/llvm-project/commit/6425cf4ce732d660a1cdd08ea830d7734a325eb8
Author: Ian Li <ian.li at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/Lex/Preprocessor.cpp
Log Message:
-----------
[NFC][Clang][Lex] Add assert to prevent null pointer dereference in Preprocessor::HandleModuleContextualKeyword (#211117)
Coverity static analysis scans on clang are unhappy with
[this](https://github.com/llvm/llvm-project/blob/e55d3bca36ff8a23ef598f6f452ec1e3f399dc31/clang/lib/Lex/Preprocessor.cpp#L920)
invocation of `HandleModuleContextualKeyword` due to the fact that
_technically_ nothing is stopping `CurPPLexer` reference in
`Preprocessor` from being `nullptr`, although AFAICT the current code
ensures this doesn't happen when `Preprocessor` is in file-lexing mode.
However, an assertion could be added to `HandleModuleContextualKeyword`
for future debugging's sake.
---------
Co-authored-by: Yihan Wang <yronglin777 at gmail.com>
Commit: 8d933f7478435d35b6f3b6123318f1e353adea88
https://github.com/llvm/llvm-project/commit/8d933f7478435d35b6f3b6123318f1e353adea88
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/builtins/InterlockedAdd.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAdd.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedAdd.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedAdd-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedAdd-sm65-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/Support/DXILABI.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/DirectX/InterlockedAdd.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-i64-sm65.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicBinOp.ll
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedAdd.ll
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedAdd_spv_i64.ll
Log Message:
-----------
Add InterlockedAdd resource methods (#208128)
This PR builds upon the work merged in
https://github.com/llvm/llvm-project/pull/195742, and completes the
implementation of the InterlockedAdd functions in HLSL, by adding these
methods to the existing resource types.
Fixes: https://github.com/llvm/llvm-project/issues/99122
Assisted by: Github Copilot
Commit: 710cca19f0d1d95174cc52bc41df56c26b9f19d2
https://github.com/llvm/llvm-project/commit/710cca19f0d1d95174cc52bc41df56c26b9f19d2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Use planner's TTI in executePlan instead of CM.TTI (NFC) (#211588)
LoopVectorizationPlanner already holds TTI, no need to go through CM.
Commit: 89e637a8dca75d4a71e4a1ce669397d59ce77ab7
https://github.com/llvm/llvm-project/commit/89e637a8dca75d4a71e4a1ce669397d59ce77ab7
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
Log Message:
-----------
[NFC][AMDGPU] Remove reundant run lines from two test cases (#211575)
Commit: 7f140055b724bfd0759807b79ee1b8544f023340
https://github.com/llvm/llvm-project/commit/7f140055b724bfd0759807b79ee1b8544f023340
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-pr-benchmark.yml
M libcxx/utils/benchmark-historical
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/test-at-commit
Log Message:
-----------
[libc++] Pin down the compiler in the various benchmark scripts and jobs (#211563)
We have various scripts that build and test the library at pinpointed
commits: benchmark-historical, run-benchmarks, build-at-commit and
test-at-commit. They were handling the compiler in different ways: some
scripts would just run the libc++ build (or test suite configuration)
without specifying the compiler, which means the $CXX environment
variable was used if present. Other scripts (e.g. run-benchmarks) would
accept the compiler as an argument, but would fail to pass it down when
configuring the test suite, which led to issues.
This patch passes the compiler explicitly in all scripts: this removes
any potential confusion around how the compiler should be specified (env
var or argument). The only exception is build-at-commit, where the
compiler is still specified by passing the appropriate CMake arguments.
The reason for this exception is that passing arguments to CMake is
actually the way we want to configure aspects of the build (and the test
suite) in the long term, it's just that the test suite doesn't support
this cleanly due to the CMake/Lit split at the moment.
In the longer term, `test-at-commit` should also lose its `--compiler`
argument in favour of being able to pass CMake parameters to the test
suite configuration, but we are not there yet.
Commit: 36916031c97477f8d865488185cfb7da89aa5d21
https://github.com/llvm/llvm-project/commit/36916031c97477f8d865488185cfb7da89aa5d21
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
A llvm/test/CodeGen/SPIRV/legalization/matrix-wide-vector-shader.ll
M llvm/test/CodeGen/SPIRV/legalization/vector-legalization-shader.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-multiply.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-transpose-bool.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-transpose.ll
Log Message:
-----------
[SPIRV][Matrix] Change Matrix Shader legalization to largest common divisor (#207768)
fixes #186864
New process for matrix legalization documented here:
https://github.com/llvm/wg-hlsl/pull/446
The current Matrix legalization strategy is to take a vector of and
expanded to a larger power of 2 vector and then split it into vectors of
size 4. For example a vector of size 6 is expanded to 8, and then split.
This creates uniform 4-lane chunks but requires padding. For example
`<12>`-->`<16>`, `<6>`-->`<8>`, `<9>`-->`<16>`. These forces an illegal
wide `G_BUILD_VECTOR` with undef lanes. This padding wastes lanes and
adds undef bookkeeping the backend must then clean up.
Instead This PR splits both operands into `W`-lane chunks, where `W` is
the largest divisor of the element count in `[2, MaxVectorSize]` shared
by source and destination (`<12>`-->3×`<4>`, `<6>`-->2×`<3>`,
`<9>`-->3×`<3>`), and emit chained per-chunk `OpVectorShuffle`s. This
keeps every chunk a legal SPIR-V vector with no undef padding and
preserves vectorized `OpDot`/`OpSelect` downstream.
Assisted with Claude Opus 4.8 via Co-pilot
Commit: c98ace924d8bd6ce357a993832c9dffde0806823
https://github.com/llvm/llvm-project/commit/c98ace924d8bd6ce357a993832c9dffde0806823
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Log Message:
-----------
[NFC][AMDGPU] Use SIInstrFlags predicates in AMDGPUAsmParser (#210998)
Commit: 04b71a38393a85db49047d547fd9d94aafa1857b
https://github.com/llvm/llvm-project/commit/04b71a38393a85db49047d547fd9d94aafa1857b
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
Log Message:
-----------
[AMDGPU] Regenerate failing packed-fp64.ll test (#211616)
Missed this one in https://github.com/llvm/llvm-project/pull/211598.
Commit: 8f64a4806ffbf577a91390750c2701de2c6496af
https://github.com/llvm/llvm-project/commit/8f64a4806ffbf577a91390750c2701de2c6496af
Author: Ian.han <jackinwhat at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
A compiler-rt/test/sanitizer_common/TestCases/Linux/fopen64_nullptr.c
Log Message:
-----------
[sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (#211468)
`fopen` was fixed to tolerate a NULL `path` in 2015 (1d1be3dd8822), and
`freopen`/`freopen64` carry the same `if (path)` guard. `fopen64` was
missed, so `fopen64(NULL, mode)` dereferences NULL inside the
interceptor and crashes under sanitizers, even though real `fopen64`
would just return NULL/EFAULT.
Add the missing `if (path)` guard, plus a regression test mirroring
`fopen_nullptr.c`. Since `fopen64` is only intercepted on glibc
(`SANITIZER_INTERCEPT_FOPEN64`), the test is placed under `Linux/` and
gated with `// REQUIRES: glibc`.
Commit: 88d17fa88fb58d8b2d64e923dc4dc7b043201b87
https://github.com/llvm/llvm-project/commit/88d17fa88fb58d8b2d64e923dc4dc7b043201b87
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lld/test/ELF/aarch64-ifunc-bti.s
Log Message:
-----------
[NFC][test][ELF] Check DSO's ifunc2 is in .iplt in aarch64-ifunc-bti.s (#210618)
This mirror's the PIE's CHECK lines, which were already stricter.
---
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Commit: 50ce5f724db70b9b520002fda1098dc19a87ff07
https://github.com/llvm/llvm-project/commit/50ce5f724db70b9b520002fda1098dc19a87ff07
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lld/test/ELF/ppc32-ifunc-nonpreemptible-nopic.s
M lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
Log Message:
-----------
[NFC][test][ELF] Improve ppc32-ifunc-nonpreemptible-(no)pic.s (#210611)
Firstly, the nopic test had an unused HEX check line when it should have
been checking .got.plt, and the pic test was only checking .got2, also
ignoring .got.plt.
Secondly, the indentation for instructions was inconsistent within a
single file.
Thirdly, neither test was actually checking the code for func's IPLT
entry in .glink, only that the symbol existed as a normal function that
wasn't the same as the resolver, and the nopic test wasn't even testing
the full contents of the PLT call stub, which was inconsistent with the
pic test.
Fourthly, the pic test used the same output file for two different
links, which can be confusing when debugging.
Finally, the comment at the start of the pic test's PLT call stub had no
bearing on the immediate in use, instead being the same as the nopic's
one with the 4 subtracted from both sides (presumably trying to account
for the nopic test not having the extra .got2 entry, but neglecting the
fact that it's not using absolute addressing, and even if it were, the
addresses are entirely different).
---
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Commit: 81820b5112017197045418813457dd6eb35aac08
https://github.com/llvm/llvm-project/commit/81820b5112017197045418813457dd6eb35aac08
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Architecture.h
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Plugins/Architecture/CMakeLists.txt
A lldb/source/Plugins/Architecture/Wasm/ArchitectureWasm.cpp
A lldb/source/Plugins/Architecture/Wasm/ArchitectureWasm.h
A lldb/source/Plugins/Architecture/Wasm/CMakeLists.txt
A lldb/test/Shell/Breakpoint/wasm-skip-function-header.test
Log Message:
-----------
[lldb] Skip the WebAssembly function header when setting a breakpoint (#211289)
A WebAssembly function begins with a local variable declaration header
that is part of the function but is not an executable instruction. A
breakpoint at a raw function start, such as one added by a scripted
resolver, landed on the header and could never be hit. Name and
file-and-line breakpoints already move past it, because that is handled
at the line-table level.
The disassembler already skipped this header inline. Move that logic
behind a new Architecture:: SkipFunctionHeader hook, implemented
by a new WebAssembly architecture plugin, and call it from both the
disassembler and Breakpoint::AddLocation so any breakpoint resolves to
the first instruction.
Commit: df68991c067e505233856f7399772d424f89478f
https://github.com/llvm/llvm-project/commit/df68991c067e505233856f7399772d424f89478f
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/test/Fir/CUDA/predefined-variables.mlir
Log Message:
-----------
[flang][cuda] Fix CUFPredefinedVarToGPU for a shared builtin address_of (#211628)
`CUFPredefinedVarToGPU` rewrites references to the predefined CUDA
builtins (`threadidx`/`blockidx`/`blockdim`/`griddim`) into GPU special-register
reads. For each predefined-var `fir.declare` it also erased the declare's
backing `fir.address_of`. That assumed every declare owns a
private `address_of`, which is only true before CSE. Once a single
`fir.address_of` of a builtin is shared by several `fir.declare`s — e.g.
after a `device` routine is inlined into a `global` kernel and CSE coalesces the
duplicated `address_of` ops — the pass queued that one op for deletion
once per declare and erased it while another declare still used it, thus aborting
compilation with `'fir.address_of' op operation destroyed but still has uses` error.
With this PR, the backing ops are collected into a de-duplicated set and
erased after all predefined declares are gone, and only when `use_empty()`.
This makes the deletion safe regardless of how many declares share an
`address_of`, and leaves it untouched if any other user remains.
Commit: 2f730a82cc6cb71d2b1a86dbb67927a72a54aec6
https://github.com/llvm/llvm-project/commit/2f730a82cc6cb71d2b1a86dbb67927a72a54aec6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
A llvm/test/tools/llvm-mca/AMDGPU/subarch-triple-no-mcpu.s
M llvm/tools/llvm-mca/llvm-mca.cpp
Log Message:
-----------
llvm-mca: Stop defaulting to "native" for the CPU (#211612)
This would warn whenever using a triple that isn't for the host
architecture. Other tools don't do this. Copy what llc does and
default to no cpu.
Commit: ac61623826d858333039ff56ef60e91afd295c5f
https://github.com/llvm/llvm-project/commit/ac61623826d858333039ff56ef60e91afd295c5f
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Implement convert to atomic intptr through temp alloca (#210794)
Implement the conversion to atomic int pointer through temp alloca
Commit: aa00eae9f05129c05a39446a85746502b0f7bd9b
https://github.com/llvm/llvm-project/commit/aa00eae9f05129c05a39446a85746502b0f7bd9b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/reassociated-fma-reduction.ll
Log Message:
-----------
[SLP][NFC]Add a test with the reassociative fma, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211635
Commit: d8f7777f4030ba7b4d0643399c87a0fcc17f648a
https://github.com/llvm/llvm-project/commit/d8f7777f4030ba7b4d0643399c87a0fcc17f648a
Author: syhhyl <syhhyl926 at 126.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
A clang/test/CodeGen/pragma-weak-darwin.c
Log Message:
-----------
[clang][test] Add Darwin pragma weak alias IR coverage (#211499)
Add Clang IR coverage for `#pragma weak alias = target` on Darwin.
The test verifies that Clang:
- emits the alias with weak linkage;
- keeps calls referencing the alias instead of replacing them with the
aliasee.
This is a test-only follow-up to #198148 and covers the Clang lowering
path used by #111321.
Commit: 777bc94e1020c760466f074c1cc6837a2dc64f98
https://github.com/llvm/llvm-project/commit/777bc94e1020c760466f074c1cc6837a2dc64f98
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/dynamic-stackalloc-regression.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-alloca.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
A llvm/test/CodeGen/NVPTX/memcpy-alloca-align.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
Log Message:
-----------
[NVPTX] Lower allocas to the local address space (#204346)
Alternative to #201772.
When SelectionDAG expands a small memcpy/memmove/memset it can raise the
alignment of the
destination stack object, but only when the destination is a bare
FrameIndex. Since #121710,
NVPTX treats allocas as assumed-local, and InferAddressSpaces rewrites
the intrinsic
operands to addrspacecasts. ISel no longer sees the frame index, the
alignment isn't raised,
and small unaligned copies are expanded byte-by-byte. We observed up to
1.9x slower kernels
in JuliaGPU/CUDA.jl#3162.
#201772 fixed this in SelectionDAG by looking through addrspacecasts to
recover the stack
object. Per review feedback there, this PR takes a different approach:
NVPTXLowerAlloca now
turns each generic alloca into an equivalent addrspace(5) alloca plus
one cast back to the
generic address space for existing users. The normal InferAddressSpaces
pass then propagates
the local address space into loads/stores and folds the cast away where
possible. At -O0,
the cast remains, but the underlying frame object is still local, so
stack lowering
addresses it correctly.
Making allocas actually local requires NVPTX stack lowering changes:
- eliminateFrameIndex resolves addrspace(5) frame indices against the
local frame pointer
%SPL. Previously every frame index used the generic %SP, which
mis-addresses local stores
and double-converts escapes.
- LowerDYNAMIC_STACKALLOC returns the local pointer instead of always
casting to generic
when the requested result type is already local.
NVPTX still declares the alloca address space as 0, so allocas are
generic by default and
the pass must enforce locality, including at -O0. This PR is compatible
with making the DL
actually put allocas in AS5: the stack-lowering changes (%SPL frame
indices, local
LowerDYNAMIC_STACKALLOC) are needed regardless of how an alloca became
local and stay
correct under A5, while the scaffolding that only enforces the invariant
becomes unnecessary
and can be dropped.
cc @arsenm
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 6a230696441d7b2fa51e2887ef7664d2a73ae04d
https://github.com/llvm/llvm-project/commit/6a230696441d7b2fa51e2887ef7664d2a73ae04d
Author: Greg Clayton <gclayton at fb.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lldb/include/lldb/API/SBProcessInfo.h
M lldb/source/API/SBProcessInfo.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
Log Message:
-----------
Fix ProcessELFCore::GetProcessInfo() to return expected results. (#210807)
Getting the process info from ProcessELFCore would always return the
information from the prpsinfo.pr_psargs from the NT_PRPSINFO. This meant
if the process was launched with a symlink, the process info would
always claim the main executable was the symlink. We want the process
info's executable to always be the resolved executable when possible.
The DynamicLoaderPOSIXDYLD was using the process info to load the main
executable if it wasn't set, or it was comparing if the main
executable's module spec matched the process info, and if it didn't
match it would end up trying to load the main executable using the
process info. We also ask for the UUID from the process before trying to
use the process info to replace the executable in
DynamicLoaderPOSIXDYLD::ResolveExecutableModule().
Commit: f7f9cc95db8d6447312bc45fc83ae81621a07213
https://github.com/llvm/llvm-project/commit/f7f9cc95db8d6447312bc45fc83ae81621a07213
Author: nvptm <pmathew at nvidia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant-seq-gang-private.mlir
Log Message:
-----------
[acc] Refine launch-dim handling for sequential block-redundant ancestors (#211153)
Sequential `gpu_block_redundant` ancestors need selective launch-dim
handling in `getAncestorParDims`: including them always widens
gang-private to per-thread; omitting them always can predicate
block-redundant bodies on `blockIdx` after partition.
Include launch dims when the block-redundant loop is worksharing or is
the innermost parallel parent; skip them for an outer sequential
block-redundant wrapper around nested worksharing.
Commit: ee96eb78c540a0dbb5a5e03777ab69492c0350c7
https://github.com/llvm/llvm-project/commit/ee96eb78c540a0dbb5a5e03777ab69492c0350c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ctlz-cttz-zero-poison-disable-rule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ctlz-cttz-zero-poison.ll
M llvm/test/CodeGen/AMDGPU/fptoi-nan-guard-fold.ll
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma-fake16.mir
M llvm/test/CodeGen/AMDGPU/module-flag-xnack-sramecc-combined.ll
M llvm/test/CodeGen/AMDGPU/module-flag-xnack.ll
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
M llvm/test/CodeGen/AMDGPU/si-fold-operands-constant-fold-imm-operand.mir
M llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-invalidate-rci.mir
M llvm/test/CodeGen/AMDGPU/v_swap_b16.mir
M llvm/test/Transforms/Inline/AMDGPU/inline-max-bb-debug.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/ordered-reduction-fma-fusion.ll
Log Message:
-----------
AMDGPU: Convert new tests to subarch triples (#211584)
These are tests added after the recent batch migration to new
triples.
Commit: 52bc4102acb630610c495107f5704c8321bd6548
https://github.com/llvm/llvm-project/commit/52bc4102acb630610c495107f5704c8321bd6548
Author: Mohammed Ashraf <125150223+Holo-xy at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/TypeNodes.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/tools/libclang/CIndex.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[BoundsSafety] Introduce LateParsedAttrType AST placeholder type (#204125)
Split out from #179612 to make review easier. No functional change.
This introduces `LateParsedAttrType`, a new AST placeholder type used
during late parsing of type attributes. The actual late parsing
mechanism that uses this type is in #179612 and will be split into a
follow-up PR.
Commit: 1f93f282d476076fd8ce963d8b26b07f8587266b
https://github.com/llvm/llvm-project/commit/1f93f282d476076fd8ce963d8b26b07f8587266b
Author: Soham Karandikar <43989259+skadewdl3 at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaTemplate/friend.cpp
Log Message:
-----------
[Clang] [Sema] Added a check for `NameInfo` not being empty after template instantiation (#210610)
Fixes #210234
As per my investigation (mostly following stack traces and dumping
variable values), a default empty `DeclarationNameInfo` was being
returned after template substitution [over
here](https://github.com/llvm/llvm-project/blob/c45b4e4d00bed488d6ece5608560561732ae5b9e/clang/lib/Sema/SemaTemplateInstantiateDecl.cpp#L3270).
```cpp
// D-.>getNameInfo() has actual data here
DeclarationNameInfo NameInfo
= SemaRef.SubstDeclarationNameInfo(D->getNameInfo(), TemplateArgs);
// NameInfo has default values
```
This was being passed on directly to `CXXDestructorDecl::Create` leading
to the assertion being hit. This PR adds a check that ensures `NameInfo`
actually contains a valid destructor name before constructing a
`CXXDestructorDecl`. This fixes the assertion being hit in the
reproducer from the linked issue.
Commit: 77e879f967294d76376bf7a022092a1d6f3ed583
https://github.com/llvm/llvm-project/commit/77e879f967294d76376bf7a022092a1d6f3ed583
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libunwind/src/DwarfParser.hpp
M libunwind/src/dwarf2.h
M libunwind/test/CMakeLists.txt
M libunwind/test/configs/apple-libunwind-system.cfg.in
M libunwind/test/configs/llvm-libunwind-merged.cfg.in
M libunwind/test/configs/llvm-libunwind-shared.cfg.in
M libunwind/test/configs/llvm-libunwind-static.cfg.in
M libunwind/test/ra_sign_state.pass.cpp
Log Message:
-----------
[libunwind][AArch64] Support .cfi_set_ra_state (#209950)
This new CFI directive directly assigns an RA signing state to the RA_SIGN_STATE DWARF pseudo-register for use when unwinding, to indicate whether the value of PC has been used as a diversifier for return address signing. The new directive subsumes and replaces .cfi_negate_ra_state_with_pc, which was found to be unsuitable for descibing some block layouts [1], particularly in hot-cold-split functions.
1: https://github.com/ARM-software/abi-aa/pull/346
Commit: 943972575711ceb999b3ee8ba98ce7b8df5a9581
https://github.com/llvm/llvm-project/commit/943972575711ceb999b3ee8ba98ce7b8df5a9581
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/MC/Disassembler/AMDGPU/bf16_imm.txt
M llvm/test/MC/Disassembler/AMDGPU/buf_fmt_packed_d16.txt
M llvm/test/MC/Disassembler/AMDGPU/buf_fmt_unpacked_d16.txt
M llvm/test/MC/Disassembler/AMDGPU/comments.txt
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10-sgpr-max.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10-vop2be-literal.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1011-xdl-insts.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_sopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_sopk.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx_warn.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_salu_float.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3_from_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3p_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3p_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3p_err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_wmma_w32.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_wmma_w64.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_exp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_flat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_ldsdir.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mtbuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopk.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vinterp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16-fake16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8-fake16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc-fake16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopd_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_wmma.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_vop3cx_warn.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_load_tr.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_operands.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_salu_lit64.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_valu_lit64.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vbuffer_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vimage.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd3_unused_operands.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_wmma_w32.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_wave64_feature.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3_from_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_wmma_w32.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_buffer_err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_exp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_global_load_tr.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopk.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vbuffer_mtbuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vbuffer_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vdsdir.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16-fake.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3cx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc-fake16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopd.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopd_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopd_unused_operands.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vsample.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_wmma_w32.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_wmma_w64.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_vop3cx_warn.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx13_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx13_dasm_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx13_dasm_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx13_dasm_vop3_from_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx13_dasm_vop3_from_vop2_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx13_dasm_vop3_from_vop2_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8-literal.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8-literal16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8-trap.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_exp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_flat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_mimg_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_mtbuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_sop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_sopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_sopk.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vintrp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_dpp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop1_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_dpp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop2_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3cx_nowarn.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vopc_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx8_vopcx_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9-aperture-regs.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9-bool-regs.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9-lds_direct.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9-trap.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx908-atomic-fadd-insts.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx908-dl-insts.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx908-xdl-insts.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx908_mai.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx90a-dpp64.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx90a_mai.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx90a_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx942_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx942_flat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx942_mai.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_ds_read_tr.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_xdlops.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_mai.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx950_vop3px2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_exp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_flat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_mimg_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_sdwa_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_smem_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_sop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_sopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_sopk.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vintrp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_dpp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop1_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_dpp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_features.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop2_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3c_nowarn.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3cx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p_opsel.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vopc_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vopcx_sdwa.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_wave32_feature.txt
M llvm/test/MC/Disassembler/AMDGPU/literals.txt
M llvm/test/MC/Disassembler/AMDGPU/mad_mix.txt
M llvm/test/MC/Disassembler/AMDGPU/si-support.txt
M llvm/test/MC/Disassembler/AMDGPU/vinterp.txt
Log Message:
-----------
AMDGPU: Migrate disassembler tests to use subarch triples (#211596)
Commit: b63032380268e9a9f32755d9ed146ed5ad3c591a
https://github.com/llvm/llvm-project/commit/b63032380268e9a9f32755d9ed146ed5ad3c591a
Author: Hardik Kumar <hardikxk at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGenOpenCL/amdgpu-ieee.cl
M clang/test/CodeGenOpenCL/relaxed-fpmath.cl
M clang/test/Driver/opencl.cl
Log Message:
-----------
[clang][Driver]Fix opencl -cl-fast-relaxed-math flag to have similar behaviour as ffast-math (#208709)
Previously when using `-cl-fast-relaxed-math` flag along with
`fhonor-nans` or `fhonor-infinities` the honor flags did not override
the relaxed math flag. This behaviour is something that is not seen in
case of ffast-math for general targets.
This patch makes adjustments to how the driver and cc1 handles the
relaxed math flag for opencl. The flag was in the path of `fast-math` so
when someone used the `-cl-fast-relaxed-math` flag they were ultimately
overriding everything with fast-math. This was the main reason why honor
flags were not overriding relaxed math (atleast that's what I have
understood from my time working on this).
I have added tests for this as well and modified CodeGen cc1 tests
according to the changes in the patch.
I have personally not tested this on any AMD targets myself yet. So I am
unsure about this breaking anything (hopefully it should rather fix).
closes #178514
Commit: ea233a005b3a828affa482c1684f6f76d650a9c1
https://github.com/llvm/llvm-project/commit/ea233a005b3a828affa482c1684f6f76d650a9c1
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libc/src/__support/CPP/simd.h
Log Message:
-----------
[libc] Silence sanitizer OOB reports in SIMD read/write helpers. (#211148)
Use `LIBC_NO_SANITIZE_OOB_ACCESS` for small SIMD helper functions
(load/store/gather/scatter/expand/compress). Even though the actual
functions which have logical OOB reads (such as
`clang_vector::string_length`) already have
`LIBC_NO_SANITIZE_OOB_ACCESS` attribute to ignore OOB reads, it's not
enough - as we see downstream reports from ASan builds of llvm-libc
(using tip-of-trunk Clang), both with `-O1` and `-O2`. We simply can't
rely on the SIMD helpers being inlined into the caller function, with
their memory reads/writes ignored.
Thus, apply the `no_sanitize` attribute to the helpers themselves. This
is clearly suboptimal, as we're effectively disabling sanitizer checks
for *all* the code using SIMD to read/write from memory, but it seems to
be the easiest reasonable fix. After all, code using SIMD (like code
using explicit intrinsics or inline assembly) should be written only in
special cases, with author knowing what they're doing.
Commit: 52ab62e4d073e01e81a8b62811f345ac52375198
https://github.com/llvm/llvm-project/commit/52ab62e4d073e01e81a8b62811f345ac52375198
Author: Jun Wang <jwang_2024 at outlook.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
R llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX1011.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX1013.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX1030.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX11.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX7.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX900.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX904.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX906.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX908.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX90a.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX940.rst
R llvm/docs/AMDGPU/AMDGPUAsmGFX950.rst
R llvm/docs/AMDGPU/gfx1011_src.rst
R llvm/docs/AMDGPU/gfx1011_src_1.rst
R llvm/docs/AMDGPU/gfx1011_src_2.rst
R llvm/docs/AMDGPU/gfx1011_src_3.rst
R llvm/docs/AMDGPU/gfx1011_type_deviation.rst
R llvm/docs/AMDGPU/gfx1011_vdst.rst
R llvm/docs/AMDGPU/gfx1011_vsrc.rst
R llvm/docs/AMDGPU/gfx1013_srsrc_5dafbc.rst
R llvm/docs/AMDGPU/gfx1013_srsrc_cf7132.rst
R llvm/docs/AMDGPU/gfx1013_vaddr_a5639c.rst
R llvm/docs/AMDGPU/gfx1013_vaddr_c5ab43.rst
R llvm/docs/AMDGPU/gfx1013_vdst_9041ac.rst
R llvm/docs/AMDGPU/gfx1013_vdst_eae4c8.rst
R llvm/docs/AMDGPU/gfx1030_attr.rst
R llvm/docs/AMDGPU/gfx1030_dst.rst
R llvm/docs/AMDGPU/gfx1030_fx_operand.rst
R llvm/docs/AMDGPU/gfx1030_hwreg.rst
R llvm/docs/AMDGPU/gfx1030_imm16_0533c2.rst
R llvm/docs/AMDGPU/gfx1030_imm16_169952.rst
R llvm/docs/AMDGPU/gfx1030_label.rst
R llvm/docs/AMDGPU/gfx1030_m_28b494.rst
R llvm/docs/AMDGPU/gfx1030_m_c141fc.rst
R llvm/docs/AMDGPU/gfx1030_msg.rst
R llvm/docs/AMDGPU/gfx1030_opt_0d447d.rst
R llvm/docs/AMDGPU/gfx1030_opt_847aed.rst
R llvm/docs/AMDGPU/gfx1030_param.rst
R llvm/docs/AMDGPU/gfx1030_saddr_9cd3cf.rst
R llvm/docs/AMDGPU/gfx1030_saddr_beaa25.rst
R llvm/docs/AMDGPU/gfx1030_saddr_d75725.rst
R llvm/docs/AMDGPU/gfx1030_sbase_020892.rst
R llvm/docs/AMDGPU/gfx1030_sbase_b0aa25.rst
R llvm/docs/AMDGPU/gfx1030_sdst_0804b1.rst
R llvm/docs/AMDGPU/gfx1030_sdst_362c37.rst
R llvm/docs/AMDGPU/gfx1030_sdst_386c33.rst
R llvm/docs/AMDGPU/gfx1030_sdst_3bc700.rst
R llvm/docs/AMDGPU/gfx1030_sdst_3cd7ad.rst
R llvm/docs/AMDGPU/gfx1030_sdst_54e16e.rst
R llvm/docs/AMDGPU/gfx1030_sdst_8078f5.rst
R llvm/docs/AMDGPU/gfx1030_sdst_ea3f10.rst
R llvm/docs/AMDGPU/gfx1030_simm32_6f0844.rst
R llvm/docs/AMDGPU/gfx1030_simm32_a3e80c.rst
R llvm/docs/AMDGPU/gfx1030_simm32_be0c1c.rst
R llvm/docs/AMDGPU/gfx1030_soffset_0f304c.rst
R llvm/docs/AMDGPU/gfx1030_soffset_73dae7.rst
R llvm/docs/AMDGPU/gfx1030_soffset_fef808.rst
R llvm/docs/AMDGPU/gfx1030_src_1facfe.rst
R llvm/docs/AMDGPU/gfx1030_src_207976.rst
R llvm/docs/AMDGPU/gfx1030_src_364d7c.rst
R llvm/docs/AMDGPU/gfx1030_src_516946.rst
R llvm/docs/AMDGPU/gfx1030_src_5bb6f2.rst
R llvm/docs/AMDGPU/gfx1030_src_ae1543.rst
R llvm/docs/AMDGPU/gfx1030_src_b9c62f.rst
R llvm/docs/AMDGPU/gfx1030_src_edf2a5.rst
R llvm/docs/AMDGPU/gfx1030_srsrc_5dafbc.rst
R llvm/docs/AMDGPU/gfx1030_srsrc_80eef6.rst
R llvm/docs/AMDGPU/gfx1030_srsrc_cf7132.rst
R llvm/docs/AMDGPU/gfx1030_ssamp.rst
R llvm/docs/AMDGPU/gfx1030_ssrc_2a042f.rst
R llvm/docs/AMDGPU/gfx1030_ssrc_361664.rst
R llvm/docs/AMDGPU/gfx1030_ssrc_460c63.rst
R llvm/docs/AMDGPU/gfx1030_ssrc_6fbc49.rst
R llvm/docs/AMDGPU/gfx1030_ssrc_7da351.rst
R llvm/docs/AMDGPU/gfx1030_ssrc_81ba27.rst
R llvm/docs/AMDGPU/gfx1030_ssrc_8dd4e0.rst
R llvm/docs/AMDGPU/gfx1030_ssrc_8e54e0.rst
R llvm/docs/AMDGPU/gfx1030_tgt.rst
R llvm/docs/AMDGPU/gfx1030_type_deviation.rst
R llvm/docs/AMDGPU/gfx1030_vaddr_373b95.rst
R llvm/docs/AMDGPU/gfx1030_vaddr_9aeece.rst
R llvm/docs/AMDGPU/gfx1030_vaddr_9f7133.rst
R llvm/docs/AMDGPU/gfx1030_vaddr_a5639c.rst
R llvm/docs/AMDGPU/gfx1030_vaddr_b73dc0.rst
R llvm/docs/AMDGPU/gfx1030_vaddr_c5ab43.rst
R llvm/docs/AMDGPU/gfx1030_vaddr_f20ee4.rst
R llvm/docs/AMDGPU/gfx1030_vcc.rst
R llvm/docs/AMDGPU/gfx1030_vdata0_6802ce.rst
R llvm/docs/AMDGPU/gfx1030_vdata0_fd235e.rst
R llvm/docs/AMDGPU/gfx1030_vdata1_6802ce.rst
R llvm/docs/AMDGPU/gfx1030_vdata1_fd235e.rst
R llvm/docs/AMDGPU/gfx1030_vdata_21b58d.rst
R llvm/docs/AMDGPU/gfx1030_vdata_2d6239.rst
R llvm/docs/AMDGPU/gfx1030_vdata_4b260e.rst
R llvm/docs/AMDGPU/gfx1030_vdata_56f215.rst
R llvm/docs/AMDGPU/gfx1030_vdata_6802ce.rst
R llvm/docs/AMDGPU/gfx1030_vdata_84fab6.rst
R llvm/docs/AMDGPU/gfx1030_vdata_aa5a53.rst
R llvm/docs/AMDGPU/gfx1030_vdata_ad559c.rst
R llvm/docs/AMDGPU/gfx1030_vdata_c08393.rst
R llvm/docs/AMDGPU/gfx1030_vdata_e016a1.rst
R llvm/docs/AMDGPU/gfx1030_vdata_fd235e.rst
R llvm/docs/AMDGPU/gfx1030_vdst_463513.rst
R llvm/docs/AMDGPU/gfx1030_vdst_48e42f.rst
R llvm/docs/AMDGPU/gfx1030_vdst_4d2300.rst
R llvm/docs/AMDGPU/gfx1030_vdst_5d50a1.rst
R llvm/docs/AMDGPU/gfx1030_vdst_5ec176.rst
R llvm/docs/AMDGPU/gfx1030_vdst_69a144.rst
R llvm/docs/AMDGPU/gfx1030_vdst_709347.rst
R llvm/docs/AMDGPU/gfx1030_vdst_81a6ed.rst
R llvm/docs/AMDGPU/gfx1030_vdst_875645.rst
R llvm/docs/AMDGPU/gfx1030_vdst_89680f.rst
R llvm/docs/AMDGPU/gfx1030_vdst_9041ac.rst
R llvm/docs/AMDGPU/gfx1030_vdst_a49b76.rst
R llvm/docs/AMDGPU/gfx1030_vdst_bdb32f.rst
R llvm/docs/AMDGPU/gfx1030_vdst_d0dc43.rst
R llvm/docs/AMDGPU/gfx1030_vdst_d71f1c.rst
R llvm/docs/AMDGPU/gfx1030_vdst_d7c57e.rst
R llvm/docs/AMDGPU/gfx1030_vdst_dd8a32.rst
R llvm/docs/AMDGPU/gfx1030_vdst_dfa6da.rst
R llvm/docs/AMDGPU/gfx1030_vdst_eae4c8.rst
R llvm/docs/AMDGPU/gfx1030_vdst_f47754.rst
R llvm/docs/AMDGPU/gfx1030_vsrc_6802ce.rst
R llvm/docs/AMDGPU/gfx1030_vsrc_ba3116.rst
R llvm/docs/AMDGPU/gfx1030_vsrc_e016a1.rst
R llvm/docs/AMDGPU/gfx1030_vsrc_fd235e.rst
R llvm/docs/AMDGPU/gfx1030_waitcnt.rst
R llvm/docs/AMDGPU/gfx1030_waitcnt_depctr.rst
R llvm/docs/AMDGPU/gfx10_attr.rst
R llvm/docs/AMDGPU/gfx10_dst.rst
R llvm/docs/AMDGPU/gfx10_fx_operand.rst
R llvm/docs/AMDGPU/gfx10_hwreg.rst
R llvm/docs/AMDGPU/gfx10_imm16_0533c2.rst
R llvm/docs/AMDGPU/gfx10_imm16_169952.rst
R llvm/docs/AMDGPU/gfx10_label.rst
R llvm/docs/AMDGPU/gfx10_m_28b494.rst
R llvm/docs/AMDGPU/gfx10_m_c141fc.rst
R llvm/docs/AMDGPU/gfx10_msg.rst
R llvm/docs/AMDGPU/gfx10_opt_0d447d.rst
R llvm/docs/AMDGPU/gfx10_opt_847aed.rst
R llvm/docs/AMDGPU/gfx10_param.rst
R llvm/docs/AMDGPU/gfx10_probe.rst
R llvm/docs/AMDGPU/gfx10_saddr_beaa25.rst
R llvm/docs/AMDGPU/gfx10_saddr_da2a8a.rst
R llvm/docs/AMDGPU/gfx10_sbase_020892.rst
R llvm/docs/AMDGPU/gfx10_sbase_b0aa25.rst
R llvm/docs/AMDGPU/gfx10_sbase_b2d796.rst
R llvm/docs/AMDGPU/gfx10_sdata_5e9fb5.rst
R llvm/docs/AMDGPU/gfx10_sdata_6fbc49.rst
R llvm/docs/AMDGPU/gfx10_sdata_7cbd60.rst
R llvm/docs/AMDGPU/gfx10_sdata_81ba27.rst
R llvm/docs/AMDGPU/gfx10_sdata_90678d.rst
R llvm/docs/AMDGPU/gfx10_sdata_c1aec6.rst
R llvm/docs/AMDGPU/gfx10_sdst_0804b1.rst
R llvm/docs/AMDGPU/gfx10_sdst_2e4c2a.rst
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R llvm/docs/AMDGPU/gfx9_m_c141fc.rst
R llvm/docs/AMDGPU/gfx9_msg.rst
R llvm/docs/AMDGPU/gfx9_opt_0d447d.rst
R llvm/docs/AMDGPU/gfx9_opt_847aed.rst
R llvm/docs/AMDGPU/gfx9_param.rst
R llvm/docs/AMDGPU/gfx9_probe.rst
R llvm/docs/AMDGPU/gfx9_saddr_6060e5.rst
R llvm/docs/AMDGPU/gfx9_saddr_a37373.rst
R llvm/docs/AMDGPU/gfx9_sbase_044055.rst
R llvm/docs/AMDGPU/gfx9_sbase_0cd545.rst
R llvm/docs/AMDGPU/gfx9_sbase_b0aa25.rst
R llvm/docs/AMDGPU/gfx9_sdata_45d924.rst
R llvm/docs/AMDGPU/gfx9_sdata_595c25.rst
R llvm/docs/AMDGPU/gfx9_sdata_7cbd60.rst
R llvm/docs/AMDGPU/gfx9_sdata_ba98a3.rst
R llvm/docs/AMDGPU/gfx9_sdata_c1aec6.rst
R llvm/docs/AMDGPU/gfx9_sdata_e9f591.rst
R llvm/docs/AMDGPU/gfx9_sdst_06b266.rst
R llvm/docs/AMDGPU/gfx9_sdst_0804b1.rst
R llvm/docs/AMDGPU/gfx9_sdst_362c37.rst
R llvm/docs/AMDGPU/gfx9_sdst_3bc700.rst
R llvm/docs/AMDGPU/gfx9_sdst_59204c.rst
R llvm/docs/AMDGPU/gfx9_sdst_718cc4.rst
R llvm/docs/AMDGPU/gfx9_sdst_94342d.rst
R llvm/docs/AMDGPU/gfx9_sdst_a319e6.rst
R llvm/docs/AMDGPU/gfx9_simm32_6f0844.rst
R llvm/docs/AMDGPU/gfx9_simm32_a3e80c.rst
R llvm/docs/AMDGPU/gfx9_simm32_be0c1c.rst
R llvm/docs/AMDGPU/gfx9_soffset_02ec85.rst
R llvm/docs/AMDGPU/gfx9_soffset_4318ca.rst
R llvm/docs/AMDGPU/gfx9_soffset_8a17c8.rst
R llvm/docs/AMDGPU/gfx9_src_089570.rst
R llvm/docs/AMDGPU/gfx9_src_4de5c6.rst
R llvm/docs/AMDGPU/gfx9_src_4e78e6.rst
R llvm/docs/AMDGPU/gfx9_src_516946.rst
R llvm/docs/AMDGPU/gfx9_src_56ed80.rst
R llvm/docs/AMDGPU/gfx9_src_73ab34.rst
R llvm/docs/AMDGPU/gfx9_src_955b45.rst
R llvm/docs/AMDGPU/gfx9_src_d578c4.rst
R llvm/docs/AMDGPU/gfx9_src_d95796.rst
R llvm/docs/AMDGPU/gfx9_src_e1561c.rst
R llvm/docs/AMDGPU/gfx9_src_f73668.rst
R llvm/docs/AMDGPU/gfx9_srsrc_79ffcd.rst
R llvm/docs/AMDGPU/gfx9_srsrc_80eef6.rst
R llvm/docs/AMDGPU/gfx9_ssamp.rst
R llvm/docs/AMDGPU/gfx9_ssrc_4db4a9.rst
R llvm/docs/AMDGPU/gfx9_ssrc_57838b.rst
R llvm/docs/AMDGPU/gfx9_ssrc_595c25.rst
R llvm/docs/AMDGPU/gfx9_ssrc_65f041.rst
R llvm/docs/AMDGPU/gfx9_ssrc_aee59c.rst
R llvm/docs/AMDGPU/gfx9_ssrc_c31902.rst
R llvm/docs/AMDGPU/gfx9_ssrc_c5d631.rst
R llvm/docs/AMDGPU/gfx9_ssrc_c8a322.rst
R llvm/docs/AMDGPU/gfx9_ssrc_e9f591.rst
R llvm/docs/AMDGPU/gfx9_tgt.rst
R llvm/docs/AMDGPU/gfx9_type_deviation.rst
R llvm/docs/AMDGPU/gfx9_vaddr_0212e3.rst
R llvm/docs/AMDGPU/gfx9_vaddr_76b997.rst
R llvm/docs/AMDGPU/gfx9_vaddr_9f7133.rst
R llvm/docs/AMDGPU/gfx9_vaddr_b73dc0.rst
R llvm/docs/AMDGPU/gfx9_vaddr_cc213c.rst
R llvm/docs/AMDGPU/gfx9_vaddr_f20ee4.rst
R llvm/docs/AMDGPU/gfx9_vcc.rst
R llvm/docs/AMDGPU/gfx9_vdata0_6802ce.rst
R llvm/docs/AMDGPU/gfx9_vdata0_fd235e.rst
R llvm/docs/AMDGPU/gfx9_vdata1_6802ce.rst
R llvm/docs/AMDGPU/gfx9_vdata1_fd235e.rst
R llvm/docs/AMDGPU/gfx9_vdata_21b58d.rst
R llvm/docs/AMDGPU/gfx9_vdata_2d6239.rst
R llvm/docs/AMDGPU/gfx9_vdata_4b260e.rst
R llvm/docs/AMDGPU/gfx9_vdata_56f215.rst
R llvm/docs/AMDGPU/gfx9_vdata_6802ce.rst
R llvm/docs/AMDGPU/gfx9_vdata_84fab6.rst
R llvm/docs/AMDGPU/gfx9_vdata_aa5a53.rst
R llvm/docs/AMDGPU/gfx9_vdata_ad559c.rst
R llvm/docs/AMDGPU/gfx9_vdata_c08393.rst
R llvm/docs/AMDGPU/gfx9_vdata_e016a1.rst
R llvm/docs/AMDGPU/gfx9_vdata_fd235e.rst
R llvm/docs/AMDGPU/gfx9_vdst_463513.rst
R llvm/docs/AMDGPU/gfx9_vdst_48e42f.rst
R llvm/docs/AMDGPU/gfx9_vdst_4d2300.rst
R llvm/docs/AMDGPU/gfx9_vdst_5d50a1.rst
R llvm/docs/AMDGPU/gfx9_vdst_5ec176.rst
R llvm/docs/AMDGPU/gfx9_vdst_69a144.rst
R llvm/docs/AMDGPU/gfx9_vdst_709347.rst
R llvm/docs/AMDGPU/gfx9_vdst_81a6ed.rst
R llvm/docs/AMDGPU/gfx9_vdst_875645.rst
R llvm/docs/AMDGPU/gfx9_vdst_89680f.rst
R llvm/docs/AMDGPU/gfx9_vdst_a49b76.rst
R llvm/docs/AMDGPU/gfx9_vdst_bdb32f.rst
R llvm/docs/AMDGPU/gfx9_vdst_d0dc43.rst
R llvm/docs/AMDGPU/gfx9_vdst_d71f1c.rst
R llvm/docs/AMDGPU/gfx9_vdst_d7c57e.rst
R llvm/docs/AMDGPU/gfx9_vdst_dd8a32.rst
R llvm/docs/AMDGPU/gfx9_vdst_dfa6da.rst
R llvm/docs/AMDGPU/gfx9_vdst_eae4c8.rst
R llvm/docs/AMDGPU/gfx9_vdst_f47754.rst
R llvm/docs/AMDGPU/gfx9_vsrc_6802ce.rst
R llvm/docs/AMDGPU/gfx9_vsrc_ba3116.rst
R llvm/docs/AMDGPU/gfx9_vsrc_e016a1.rst
R llvm/docs/AMDGPU/gfx9_vsrc_fd235e.rst
R llvm/docs/AMDGPU/gfx9_waitcnt.rst
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU][Docs] Remove docs for AMDGPU instruction syntax (#211421)
Docs for AMDGPU instruction syntax under llvm/docs/AMDGPU are being
moved out of LLVM.
They can be found at the [ROCm LLVM Compiler Infrastructure
website](https://rocm.docs.amd.com/projects/llvm-project/en/latest/index.html)
Commit: 8b0eab156025a55819868daf76ff32e28829d06a
https://github.com/llvm/llvm-project/commit/8b0eab156025a55819868daf76ff32e28829d06a
Author: Nikita Kornev <nikita.kornev at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.cpp
Log Message:
-----------
[SSAF] Fix Expected return type in TypeConstrainedPointers deserialization (gcc 7.5.0) (#211331)
GCC 7.5.0 fails to compile this code. Use explicit upcasts from
std::unique_ptr<Derived> to std::unique_ptr<Base> in deserializeSummary
and deserializeAnalysisResult. This resolves a compilation error where
llvm::Expected<std::unique_ptr<Base>> could not be constructed from
unique_ptr of derived summary/result types.
Commit: 535fa5789c87e240ca718e5311fd4420110e012c
https://github.com/llvm/llvm-project/commit/535fa5789c87e240ca718e5311fd4420110e012c
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/lib/Dialect/GPU/Pipelines/CMakeLists.txt
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
Log Message:
-----------
[mlir][gpu] Add VectorToXeGPU and adjust VectorToSCF placement in XeVM pipeline (#210539)
Add convert-vector-to-xegpu (nested under gpu.module) to lower
kernel-side vector ops to XeGPU.
Move convert-vector-to-scf from the pre-GPU common pipeline into the
post-GPU pipeline, so host transfer ops (and any SCF the pass emits) are
lowered to loops before the vector-to-LLVM conversion.
---------
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: 1a7ece827ab3543387ee1adf1eb4c8878905b577
https://github.com/llvm/llvm-project/commit/1a7ece827ab3543387ee1adf1eb4c8878905b577
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/MC/AMDGPU/accvgpr-altnames.s
M llvm/test/MC/AMDGPU/add-sub-no-carry.s
M llvm/test/MC/AMDGPU/amd-amdgpu-isa-malformed-target-id.s
M llvm/test/MC/AMDGPU/amd_kernel_code_t.s
M llvm/test/MC/AMDGPU/amdgcn-target-malformed-target-id.s
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
M llvm/test/MC/AMDGPU/amdgpu-info-err.s
M llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s
M llvm/test/MC/AMDGPU/amdhsa-kd-kernarg-preload.s
M llvm/test/MC/AMDGPU/amdhsa-kernel-prologue.s
M llvm/test/MC/AMDGPU/atomic-fadd-insts.s
M llvm/test/MC/AMDGPU/bf16_imm-fake16.s
M llvm/test/MC/AMDGPU/bf16_imm.s
M llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
M llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
M llvm/test/MC/AMDGPU/buffer-op-swz-operand.s
M llvm/test/MC/AMDGPU/buffer_wbinv1l_vol_vi.s
M llvm/test/MC/AMDGPU/cfi_reloc.s
M llvm/test/MC/AMDGPU/cpol-err.s
M llvm/test/MC/AMDGPU/dl-insts-err.s
M llvm/test/MC/AMDGPU/dl-insts.s
M llvm/test/MC/AMDGPU/dpp-err.s
M llvm/test/MC/AMDGPU/dpp64.s
M llvm/test/MC/AMDGPU/ds-err.s
M llvm/test/MC/AMDGPU/ds-gfx9.s
M llvm/test/MC/AMDGPU/ds.s
M llvm/test/MC/AMDGPU/ds_gws_sgpr_err.s
M llvm/test/MC/AMDGPU/ds_swizzle.s
M llvm/test/MC/AMDGPU/elf-header-cov.s
M llvm/test/MC/AMDGPU/exp-err.s
M llvm/test/MC/AMDGPU/exp-gfx10.s
M llvm/test/MC/AMDGPU/exp-gfx11.s
M llvm/test/MC/AMDGPU/exp-pregfx11.s
M llvm/test/MC/AMDGPU/exp.s
M llvm/test/MC/AMDGPU/expressions-gfx10.s
M llvm/test/MC/AMDGPU/expressions-gfx9.s
M llvm/test/MC/AMDGPU/expressions.s
M llvm/test/MC/AMDGPU/extrasgprs_mcexpr.s
M llvm/test/MC/AMDGPU/fixup64.s
M llvm/test/MC/AMDGPU/flat-gfx10.s
M llvm/test/MC/AMDGPU/flat-gfx9.s
M llvm/test/MC/AMDGPU/flat-global.s
M llvm/test/MC/AMDGPU/flat-scratch-gfx942.s
M llvm/test/MC/AMDGPU/flat-scratch-instructions.s
M llvm/test/MC/AMDGPU/flat-scratch-st-mode.s
M llvm/test/MC/AMDGPU/flat-scratch.s
M llvm/test/MC/AMDGPU/flat.s
M llvm/test/MC/AMDGPU/fma-mix.s
M llvm/test/MC/AMDGPU/gfx10-constant-bus.s
M llvm/test/MC/AMDGPU/gfx10-vop2be-literal.s
M llvm/test/MC/AMDGPU/gfx1011_dlops.s
M llvm/test/MC/AMDGPU/gfx1011_err.s
M llvm/test/MC/AMDGPU/gfx1013.s
M llvm/test/MC/AMDGPU/gfx1030_err.s
M llvm/test/MC/AMDGPU/gfx1030_new.s
M llvm/test/MC/AMDGPU/gfx1030_unsupported.s
M llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s
M llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s
M llvm/test/MC/AMDGPU/gfx10_asm_ds.s
M llvm/test/MC/AMDGPU/gfx10_asm_ds_err.s
M llvm/test/MC/AMDGPU/gfx10_asm_err.s
M llvm/test/MC/AMDGPU/gfx10_asm_exp.s
M llvm/test/MC/AMDGPU/gfx10_asm_flat.s
M llvm/test/MC/AMDGPU/gfx10_asm_mimg.s
M llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx10_asm_mtbuf_err.s
M llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx10_asm_mubuf_err.s
M llvm/test/MC/AMDGPU/gfx10_asm_smem.s
M llvm/test/MC/AMDGPU/gfx10_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx10_asm_sop.s
M llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx10_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx10_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s
M llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s
M llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx10_err_pos.s
M llvm/test/MC/AMDGPU/gfx10_flat_instructions_err.s
M llvm/test/MC/AMDGPU/gfx10_unsupported.s
M llvm/test/MC/AMDGPU/gfx10_unsupported_dpp.s
M llvm/test/MC/AMDGPU/gfx10_unsupported_e32.s
M llvm/test/MC/AMDGPU/gfx10_unsupported_e64.s
M llvm/test/MC/AMDGPU/gfx10_unsupported_e64_dpp.s
M llvm/test/MC/AMDGPU/gfx10_unsupported_sdwa.s
M llvm/test/MC/AMDGPU/gfx11-promotions-fake16.s
M llvm/test/MC/AMDGPU/gfx11-promotions.s
M llvm/test/MC/AMDGPU/gfx1150_asm_features-fake16.s
M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
M llvm/test/MC/AMDGPU/gfx1150_asm_salu_float.s
M llvm/test/MC/AMDGPU/gfx1150_unsupported.s
M llvm/test/MC/AMDGPU/gfx1170_asm_features.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2_aliases-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2_aliases.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_aliases-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_err.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop2-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop2_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop2_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_aliases.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_dpp16.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_dpp16_err.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_dpp8.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_dpp8_err.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_err.s
M llvm/test/MC/AMDGPU/gfx1170_asm_vopd.s
M llvm/test/MC/AMDGPU/gfx1170_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx1170_asm_wmma_w64.s
M llvm/test/MC/AMDGPU/gfx1170_unsupported.s
M llvm/test/MC/AMDGPU/gfx11_asm_ds.s
M llvm/test/MC/AMDGPU/gfx11_asm_ds_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_exp.s
M llvm/test/MC/AMDGPU/gfx11_asm_flat.s
M llvm/test/MC/AMDGPU/gfx11_asm_flat_errs.s
M llvm/test/MC/AMDGPU/gfx11_asm_ldsdir.s
M llvm/test/MC/AMDGPU/gfx11_asm_ldsdir_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_mimg.s
M llvm/test/MC/AMDGPU/gfx11_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_mimg_features.s
M llvm/test/MC/AMDGPU/gfx11_asm_mtbuf.s
M llvm/test/MC/AMDGPU/gfx11_asm_mtbuf_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_mtbuf_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_mubuf_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_operands.s
M llvm/test/MC/AMDGPU/gfx11_asm_opsel_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_smem.s
M llvm/test/MC/AMDGPU/gfx11_asm_smem_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_sop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx11_asm_sopk_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx11_asm_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_fake16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_fake16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_fake16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_fake16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_features.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3p_features.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_fake16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_fake16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_alias.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_fake16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_fake16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopd.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopd_features.s
M llvm/test/MC/AMDGPU/gfx11_asm_wmma.s
M llvm/test/MC/AMDGPU/gfx11_flat_instructions_err.s
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_dpp.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_e32.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_e64.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa-fake16.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
M llvm/test/MC/AMDGPU/gfx1250_asm_ds.s
M llvm/test/MC/AMDGPU/gfx1250_asm_features.s
M llvm/test/MC/AMDGPU/gfx1250_asm_load_tr.s
M llvm/test/MC/AMDGPU/gfx1250_asm_operands.s
M llvm/test/MC/AMDGPU/gfx1250_asm_salu_lit64.s
M llvm/test/MC/AMDGPU/gfx1250_asm_smem.s
M llvm/test/MC/AMDGPU/gfx1250_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_unsupported.s
M llvm/test/MC/AMDGPU/gfx1250_asm_valu_lit64.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vds_alias.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_alias.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vimage_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop2_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_alias.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vopd.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vopd3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vopd_errs.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vopd_features.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vsample_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32_err.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop2_err.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3_from_vop2_err.s
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32_err.s
M llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/AMDGPU/gfx12_5_generic_asm_vop3_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_exp.s
M llvm/test/MC/AMDGPU/gfx12_asm_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_global_load_tr.s
M llvm/test/MC/AMDGPU/gfx12_asm_mimg_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_smem.s
M llvm/test/MC/AMDGPU/gfx12_asm_smem_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop2_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopk_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mtbuf.s
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mtbuf_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mtbuf_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vdsdir.s
M llvm/test/MC/AMDGPU/gfx12_asm_vdsdir_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_fake16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_fake16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_aliases-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_fake16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_fake16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3cx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_aliases.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp8_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_fake16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_fake16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_fake16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_fake16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopd.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopd_errs.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopd_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_vsample.s
M llvm/test/MC/AMDGPU/gfx12_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx12_asm_wmma_w64.s
M llvm/test/MC/AMDGPU/gfx12_err.s
M llvm/test/MC/AMDGPU/gfx12_flat_instructions_err.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
M llvm/test/MC/AMDGPU/gfx13_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_sop1_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_sop2.s
M llvm/test/MC/AMDGPU/gfx13_asm_sop2_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx13_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx13_asm_sopk_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx13_asm_sopp_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_valu_lit64.s
M llvm/test/MC/AMDGPU/gfx13_asm_vbuffer_mtbuf.s
M llvm/test/MC/AMDGPU/gfx13_asm_vbuffer_mtbuf_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx13_asm_vbuffer_mubuf_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_vbuffer_mubuf_format.s
M llvm/test/MC/AMDGPU/gfx13_asm_vds.s
M llvm/test/MC/AMDGPU/gfx13_asm_vds_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_vdsdir.s
M llvm/test/MC/AMDGPU/gfx13_asm_vdsdir_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_vexport.s
M llvm/test/MC/AMDGPU/gfx13_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx13_asm_vflat_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx13_asm_vimage_alias.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop2_aliases.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop2_err.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop2_t16_err.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop2_t16_promote.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_aliases.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop2.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop2_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop2_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3p_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3p_dpp8.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3p_features.s
M llvm/test/MC/AMDGPU/gfx13_asm_vopd3.s
M llvm/test/MC/AMDGPU/gfx13_asm_vopd_errs.s
M llvm/test/MC/AMDGPU/gfx13_asm_vsample.s
M llvm/test/MC/AMDGPU/gfx13_smem.s
M llvm/test/MC/AMDGPU/gfx7_asm_ds.s
M llvm/test/MC/AMDGPU/gfx7_asm_ds_err.s
M llvm/test/MC/AMDGPU/gfx7_asm_exp.s
M llvm/test/MC/AMDGPU/gfx7_asm_flat.s
M llvm/test/MC/AMDGPU/gfx7_asm_mimg.s
M llvm/test/MC/AMDGPU/gfx7_asm_mtbuf.s
M llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx7_asm_smrd.s
M llvm/test/MC/AMDGPU/gfx7_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx7_asm_sop2.s
M llvm/test/MC/AMDGPU/gfx7_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx7_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx7_asm_vintrp.s
M llvm/test/MC/AMDGPU/gfx7_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx7_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx7_asm_vop3_e64.s
M llvm/test/MC/AMDGPU/gfx7_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx7_err_pos.s
M llvm/test/MC/AMDGPU/gfx7_unsupported.s
M llvm/test/MC/AMDGPU/gfx8_asm_ds.s
M llvm/test/MC/AMDGPU/gfx8_asm_ds_err.s
M llvm/test/MC/AMDGPU/gfx8_asm_exp.s
M llvm/test/MC/AMDGPU/gfx8_asm_flat.s
M llvm/test/MC/AMDGPU/gfx8_asm_mimg.s
M llvm/test/MC/AMDGPU/gfx8_asm_mtbuf.s
M llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx8_asm_smem.s
M llvm/test/MC/AMDGPU/gfx8_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx8_asm_sop2.s
M llvm/test/MC/AMDGPU/gfx8_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx8_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s
M llvm/test/MC/AMDGPU/gfx8_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx8_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx8_asm_vop3_e64.s
M llvm/test/MC/AMDGPU/gfx8_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx8_err_pos.s
M llvm/test/MC/AMDGPU/gfx8_unsupported.s
M llvm/test/MC/AMDGPU/gfx9-asm-err.s
M llvm/test/MC/AMDGPU/gfx9-vop2be-literal.s
M llvm/test/MC/AMDGPU/gfx908_err.s
M llvm/test/MC/AMDGPU/gfx908_err_pos.s
M llvm/test/MC/AMDGPU/gfx90a_asm_features.s
M llvm/test/MC/AMDGPU/gfx90a_err.s
M llvm/test/MC/AMDGPU/gfx90a_err_pos.s
M llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
M llvm/test/MC/AMDGPU/gfx942_asm_features.s
M llvm/test/MC/AMDGPU/gfx942_err.s
M llvm/test/MC/AMDGPU/gfx942_err_pos.s
M llvm/test/MC/AMDGPU/gfx942_unsupported.s
M llvm/test/MC/AMDGPU/gfx950-unsupported.s
M llvm/test/MC/AMDGPU/gfx950_asm_features.s
M llvm/test/MC/AMDGPU/gfx950_asm_read_tr.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx950_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx950_dlops.s
M llvm/test/MC/AMDGPU/gfx950_err.s
M llvm/test/MC/AMDGPU/gfx950_invalid_encoding.txt
M llvm/test/MC/AMDGPU/gfx950_xdlops.s
M llvm/test/MC/AMDGPU/gfx9_4_generic_unsupported.s
M llvm/test/MC/AMDGPU/gfx9_asm_ds.s
M llvm/test/MC/AMDGPU/gfx9_asm_ds_err.s
M llvm/test/MC/AMDGPU/gfx9_asm_exp.s
M llvm/test/MC/AMDGPU/gfx9_asm_flat.s
M llvm/test/MC/AMDGPU/gfx9_asm_mimg.s
M llvm/test/MC/AMDGPU/gfx9_asm_mtbuf.s
M llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s
M llvm/test/MC/AMDGPU/gfx9_asm_smem.s
M llvm/test/MC/AMDGPU/gfx9_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx9_asm_sop2.s
M llvm/test/MC/AMDGPU/gfx9_asm_sopc.s
M llvm/test/MC/AMDGPU/gfx9_asm_sopk.s
M llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx9_asm_vintrp.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop2_features.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
M llvm/test/MC/AMDGPU/gfx9_err_pos.s
M llvm/test/MC/AMDGPU/gfx9_unsupported.s
M llvm/test/MC/AMDGPU/hsa-amdgpu-exprs.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4-user-sgpr-err.s
M llvm/test/MC/AMDGPU/hsa-gfx125x-v4-user-sgpr-err.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4-user-sgpr-err.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v6.s
M llvm/test/MC/AMDGPU/hsa-metadata-kernel-code-props-v3.s
M llvm/test/MC/AMDGPU/hsa-sgpr-init-bug-v3.s
M llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx10.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx11.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx12.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx7.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx8.s
M llvm/test/MC/AMDGPU/hsa-sym-exprs-gfx90a.s
M llvm/test/MC/AMDGPU/inline-imm-inv2pi.s
M llvm/test/MC/AMDGPU/invalid-instructions-spellcheck.s
M llvm/test/MC/AMDGPU/labels-branch-gfx9.s
M llvm/test/MC/AMDGPU/labels-branch.s
M llvm/test/MC/AMDGPU/lds_direct-ci.s
M llvm/test/MC/AMDGPU/lds_direct-err.s
M llvm/test/MC/AMDGPU/lds_direct-gfx10.s
M llvm/test/MC/AMDGPU/lds_direct.s
M llvm/test/MC/AMDGPU/literal16-err.s
M llvm/test/MC/AMDGPU/literal16.s
M llvm/test/MC/AMDGPU/literals.s
M llvm/test/MC/AMDGPU/literalv216-err.s
M llvm/test/MC/AMDGPU/literalv216.s
M llvm/test/MC/AMDGPU/macro-examples.s
M llvm/test/MC/AMDGPU/mad-mix.s
M llvm/test/MC/AMDGPU/mai-err-gfx942.s
M llvm/test/MC/AMDGPU/mai-err.s
M llvm/test/MC/AMDGPU/mai-gfx90a.s
M llvm/test/MC/AMDGPU/mai-gfx942.s
M llvm/test/MC/AMDGPU/mai-gfx950-err.s
M llvm/test/MC/AMDGPU/mai-gfx950.s
M llvm/test/MC/AMDGPU/mai.s
M llvm/test/MC/AMDGPU/mimg-err-gfx942.s
M llvm/test/MC/AMDGPU/mimg-err.s
M llvm/test/MC/AMDGPU/mimg-gfx90a.s
M llvm/test/MC/AMDGPU/mimg.s
M llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
M llvm/test/MC/AMDGPU/mtbuf-gfx10.s
M llvm/test/MC/AMDGPU/mtbuf.s
M llvm/test/MC/AMDGPU/mubuf-gfx10.s
M llvm/test/MC/AMDGPU/mubuf-gfx9.s
M llvm/test/MC/AMDGPU/mubuf-gfx950.s
M llvm/test/MC/AMDGPU/mubuf.s
M llvm/test/MC/AMDGPU/offsetbug_once.s
M llvm/test/MC/AMDGPU/offsetbug_one_and_one.s
M llvm/test/MC/AMDGPU/offsetbug_twice.s
M llvm/test/MC/AMDGPU/out-of-range-registers.s
M llvm/test/MC/AMDGPU/pal-msgpack.s
M llvm/test/MC/AMDGPU/pal.s
M llvm/test/MC/AMDGPU/reg-syntax-err.s
M llvm/test/MC/AMDGPU/reg-syntax-extra.s
M llvm/test/MC/AMDGPU/regression/bug28165.s
M llvm/test/MC/AMDGPU/regression/bug28168.s
M llvm/test/MC/AMDGPU/regression/bug28413.s
M llvm/test/MC/AMDGPU/regression/bug28538.s
M llvm/test/MC/AMDGPU/reloc-operands-gfx10.s
M llvm/test/MC/AMDGPU/reloc.s
M llvm/test/MC/AMDGPU/smem-err.s
M llvm/test/MC/AMDGPU/smem.s
M llvm/test/MC/AMDGPU/smrd-err.s
M llvm/test/MC/AMDGPU/smrd.s
M llvm/test/MC/AMDGPU/sop1-err.s
M llvm/test/MC/AMDGPU/sop1.s
M llvm/test/MC/AMDGPU/sop2.s
M llvm/test/MC/AMDGPU/sopc-err.s
M llvm/test/MC/AMDGPU/sopc.s
M llvm/test/MC/AMDGPU/sopk-err.s
M llvm/test/MC/AMDGPU/sopk.s
M llvm/test/MC/AMDGPU/sopp-err.s
M llvm/test/MC/AMDGPU/sopp-gfx10.s
M llvm/test/MC/AMDGPU/sopp-gfx9.s
M llvm/test/MC/AMDGPU/sopp.s
M llvm/test/MC/AMDGPU/spurious-pal-metadata.s
M llvm/test/MC/AMDGPU/sym_kernel_scope_agpr.s
M llvm/test/MC/AMDGPU/sym_option.s
M llvm/test/MC/AMDGPU/totalnumvgpr_mcexpr.s
M llvm/test/MC/AMDGPU/trap.s
M llvm/test/MC/AMDGPU/unknown-target-cpu.s
M llvm/test/MC/AMDGPU/user-sgpr-count-diag.s
M llvm/test/MC/AMDGPU/user-sgpr-count-gfx1250.s
M llvm/test/MC/AMDGPU/v_illegal-atomics.s
M llvm/test/MC/AMDGPU/vcc_tuples.s
M llvm/test/MC/AMDGPU/vcmpx-gfx10.s
M llvm/test/MC/AMDGPU/vinterp-fake16.s
M llvm/test/MC/AMDGPU/vinterp.s
M llvm/test/MC/AMDGPU/vintrp-e64-err.s
M llvm/test/MC/AMDGPU/vintrp-err.s
M llvm/test/MC/AMDGPU/vintrp.s
M llvm/test/MC/AMDGPU/vop-err.s
M llvm/test/MC/AMDGPU/vop1-gfx9-err.s
M llvm/test/MC/AMDGPU/vop1-gfx9.s
M llvm/test/MC/AMDGPU/vop1.s
M llvm/test/MC/AMDGPU/vop2-err.s
M llvm/test/MC/AMDGPU/vop2.s
M llvm/test/MC/AMDGPU/vop3-convert.s
M llvm/test/MC/AMDGPU/vop3-errs.s
M llvm/test/MC/AMDGPU/vop3-gfx10.s
M llvm/test/MC/AMDGPU/vop3-gfx9.s
M llvm/test/MC/AMDGPU/vop3-literal-gfx1250.s
M llvm/test/MC/AMDGPU/vop3-literal.s
M llvm/test/MC/AMDGPU/vop3-modifiers-err.s
M llvm/test/MC/AMDGPU/vop3-modifiers.s
M llvm/test/MC/AMDGPU/vop3-vop1-nosrc.s
M llvm/test/MC/AMDGPU/vop3.s
M llvm/test/MC/AMDGPU/vop3p-err.s
M llvm/test/MC/AMDGPU/vop3p.s
M llvm/test/MC/AMDGPU/vop_dpp.s
M llvm/test/MC/AMDGPU/vop_dpp_expr.s
M llvm/test/MC/AMDGPU/vop_sdwa.s
M llvm/test/MC/AMDGPU/vopc-errs.s
M llvm/test/MC/AMDGPU/vopc-vi.s
M llvm/test/MC/AMDGPU/vopc.s
M llvm/test/MC/AMDGPU/warnings.s
M llvm/test/MC/AMDGPU/wave32.s
M llvm/test/MC/AMDGPU/wave_any.s
M llvm/test/MC/AMDGPU/wavesize-feature-unsupported-target.s
M llvm/test/MC/AMDGPU/writelane_m0.s
M llvm/test/MC/AMDGPU/xdl-insts-err.s
M llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s
M llvm/test/MC/AMDGPU/xdl-insts-gfx908.s
Log Message:
-----------
AMDGPU: Mostly migrate mc tests to subarch triples (#211590)
Migrate cases by script that don't fail
Commit: 43bbb5b696cd2d91ce8d54c0e85362c5fa9a4603
https://github.com/llvm/llvm-project/commit/43bbb5b696cd2d91ce8d54c0e85362c5fa9a4603
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove unused cost model from InnerLoopVectorizer (NFC) (#211594)
InnerLoopVectorizer stored a LoopVectorizationCostModel pointer (Cost)
but all users have been removed.
Commit: 2ace5adba8656a6306d6550939d06fed42f068db
https://github.com/llvm/llvm-project/commit/2ace5adba8656a6306d6550939d06fed42f068db
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-mca/AMDGPU/buffer-op-swz-operand.s
M llvm/test/tools/llvm-mca/AMDGPU/carried-over.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx10-add-sequence.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx10-trans.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx11-double.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx12-permlane16-cycles.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx12-pseudo-scalar-trans.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx9-retireooo.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx90a-mfma.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx942-mfma.s
M llvm/test/tools/llvm-mca/AMDGPU/gfx950.s
Log Message:
-----------
AMDGPU: Migrate llvm-mca tests to subarch triples (#211477)
Commit: 581235be99da65cefadc12f584b3234718b79e8b
https://github.com/llvm/llvm-project/commit/581235be99da65cefadc12f584b3234718b79e8b
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
A llvm/test/Transforms/LICM/vector-insert.ll
Log Message:
-----------
[LICM] Allow hoisting of InsertElementInst's past non-hoistable InsertElementInsts (#211414)
When building vectors from multiple scalars in a loop, allow the
insertions using invariant data to be hoisted, even if blocked by the
variant insertions.
In the SLP vectorizer, c1b37eacbf makes the assumption that these build
vectors will properly be hoisted, when they are not leads to regressions
such as #195497.
Reland of #200532.
Assisted By: Codex
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: fde8e81d98e48b90092bdd8a88b76939f6f12060
https://github.com/llvm/llvm-project/commit/fde8e81d98e48b90092bdd8a88b76939f6f12060
Author: nvptm <pmathew at nvidia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M flang/test/Fir/OpenACC/acc-declare-gpu-module-insertion.fir
M mlir/lib/Dialect/OpenACC/Transforms/ACCDeclareGPUModuleInsertion.cpp
Log Message:
-----------
[mlir][acc] Allow for existing declare globals in GPU module under unified memory. (#211650)
OpenACC declare globals may already exist in the GPU module from earlier
GPU lowering. Under unified memory, this pass expects those device
copies as declarations, but a pre-existing global may still have an
initializer and therefore not match.
This change adapts an otherwise equivalent existing GPU global to
declaration form and reuses it; A lit test covers a host/GPU declare
global that should be reused as a declaration in the GPU module.
Commit: b1ff288ecd340f19a43cfd330f215c0a4cef49c8
https://github.com/llvm/llvm-project/commit/b1ff288ecd340f19a43cfd330f215c0a4cef49c8
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsTiling.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsTiling.cpp
M mlir/test/Dialect/OpenACC/acc-loop-tiling-invalid.mlir
M mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTilingTest.cpp
Log Message:
-----------
[mlir][OpenACC] Emit multi-IV tile and element loops from ACCLoopTiling (#211651)
`ACCLoopTiling` used to lower an N-dimensional `tile()` clause by
*uncollapsing* the fused loop into a deep nest of single-IV `acc.loop`s
(`tile_1 → … → tile_N → elem_1 → … → elem_N`). This discards the natural
grouping of the tile clause: the 2N single-IV loops no longer express
"these are the tile iterations" and "these are the in-tile iterations"
as collapsible units, and gang/vector end up spread across a deep nest
where only the outermost loop of each group carries the attribute. This
could potentially lead to poor parallelism assignment.
With this MR:
`tileACCLoops` now rewrites the single fused `acc.loop` in-place into
exactly two multi-IV loops, each carrying all the tiled induction
variables:
- a **tile-group** loop whose steps are the original steps scaled by the
tile sizes, and
- a nested **element-group** loop that walks the iterations within one
tile, with upper bounds clamped to `min(origUB, tileStart +
tileExtent)`.
Keeping each group as a single multi-IV `acc.loop` preserves the
tile/element structure as two collapsible units instead of a 2N-deep
single-IV nest, which is a simpler canonical form. The
gang/worker/vector distribution across the two groups is unchanged from
before.
This change also diagnoses `tile` + `collapse` on the same loop because
these clauses give conflicting loop-association counts. The pass now
emits a NYI diagnostic instead of silently dropping the `collapse`
clause. Added a new invalid-input test to verify this.
With the pass no longer uncollapsing, `uncollapseLoops` and the
vector-of-loops `tileACCLoops(SmallVector<LoopOp>&, …)` overload (and
the now-orphaned `createInnerLoop` helper) are deleted, along with their
unit tests. New unit tests are added to cover the surviving fused-loop
overload.
Commit: 4a6858aecce9a6a570ea12f655aa513f73ab20f6
https://github.com/llvm/llvm-project/commit/4a6858aecce9a6a570ea12f655aa513f73ab20f6
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[mlir][xegpu] Support N-D block transfers in VectorToXeGPU (#210527)
Extend the vector.transfer_read/transfer_write lowerings so they can
produce N-D xegpu.load_nd/store_nd, not just 1D/2D, and relax the
out-of-bounds handling to match load_nd's implicit-zero padding.
Restructure both patterns as "block first, then scatter as fallback.
---------
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: afe3fe0448cd65ddd57d4d0d2a1f353a9a0b89cb
https://github.com/llvm/llvm-project/commit/afe3fe0448cd65ddd57d4d0d2a1f353a9a0b89cb
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Use planner's Legal in executePlan instead of CM.Legal (NFC) (#211600)
Remove an unnecessary level of indirection.
Commit: 2422128af28694ab576171e9ba5c58fe33f0ee5b
https://github.com/llvm/llvm-project/commit/2422128af28694ab576171e9ba5c58fe33f0ee5b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
Log Message:
-----------
[NFC][AMDGPU] Remove unused -SDAG test suffixes from minimumnum/maximumnum (#211634)
Test checks diff is automatically generated using
`update_llc_test_checks.py`
Discussed in https://github.com/llvm/llvm-project/pull/207896
Commit: c2a3cbedb5434a25de2f6b80fd24e05a1481a61b
https://github.com/llvm/llvm-project/commit/c2a3cbedb5434a25de2f6b80fd24e05a1481a61b
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
Log Message:
-----------
[SSAF] Fix a stage2 test failure with ASan-instrumented clang (#211432)
ASan emits a symbol for a static global in `TestTransformation.cpp` that
causes link issues in green dragon.
Added `__attribute__((no_sanitize("address")))` to that static global to
fix the test.
rdar://182623740
Commit: 88d625d5487f95adade70d5c301272b619a1e300
https://github.com/llvm/llvm-project/commit/88d625d5487f95adade70d5c301272b619a1e300
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 4a6858a (#211661)
This fixes 4a6858aecce9a6a570ea12f655aa513f73ab20f6 (#210527).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=4a6858aecce9a6a570ea12f655aa513f73ab20f6
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: bdb0fd5ced0e83bbc5c2b1f962ac4179e874e95a
https://github.com/llvm/llvm-project/commit/bdb0fd5ced0e83bbc5c2b1f962ac4179e874e95a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reductions.ll
Log Message:
-----------
[SLP]Remove accidental commenting out the code
Removed the accindentally commented out code, causing regressions with
ordered reductions
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211662
Commit: 79c5cb730ce996fa059a50f264f31a2deef3d71d
https://github.com/llvm/llvm-project/commit/79c5cb730ce996fa059a50f264f31a2deef3d71d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] isFMAddSubOrFMSubAdd - remove unused SelectionDAG argument. NFC. (#211613)
Commit: 59b3a0ce7829aeda7f40efdfb3fa004a48fc2ba9
https://github.com/llvm/llvm-project/commit/59b3a0ce7829aeda7f40efdfb3fa004a48fc2ba9
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/GlobalVariable.h
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/TargetMachine.cpp
A llvm/test/CodeGen/X86/global-variable-declaration-explicit-section.ll
A llvm/test/CodeGen/X86/large-implicit-section.ll
Log Message:
-----------
[x86] Handle implicit sections when determining if a global is large (#206210)
Just like explicit sections.
We were seeing globals with implicit sections marked large under the
medium code model.
Reland of #204247, with a fix to not crash on declarations with an
explicit section. Implicit sections are not applied to declarations, so
don't check isDeclarationForLinker() globals for implicit sections.
Assisted-by: Gemini
Commit: bb17e718bc419b46bb2596c2f25c9cc0f76a2d5a
https://github.com/llvm/llvm-project/commit/bb17e718bc419b46bb2596c2f25c9cc0f76a2d5a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
A llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/alloc-type.s
Log Message:
-----------
[DWARFLinker] Treat DW_AT_LLVM_alloc_type as a type reference (#211655)
The parallel linker's getODRAttributes() did not list
`DW_AT_LLVM_alloc_type`, so the dependency tracker treated it as a live
reference rather than a type reference. A type reachable only through
DW_AT_LLVM_alloc_type was therefore never kept: the enclosing subprogram
is marked live, and its type-table-candidate children are skipped during
live marking on the assumption they are retained through the type path.
The attribute then resolved to offset 0, landing on the compile unit
header, which got correctly caught by the DWARF verifier.
The classic linker already lists `DW_AT_LLVM_alloc_type` in
isODRAttribute(), so this PR restores parity between the two.
Assisted-by: Claude
rdar://182715403
Commit: 2b84fdeeeb67d4be308be5e6a7aa103a1797a7a9
https://github.com/llvm/llvm-project/commit/2b84fdeeeb67d4be308be5e6a7aa103a1797a7a9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/bounded-load.ll
M llvm/test/Transforms/LoopVectorize/bounded-load-predicated.ll
M llvm/test/Transforms/LoopVectorize/bounded-load-user-ic.ll
M llvm/test/Transforms/LoopVectorize/bounded-load.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-bounded-ranges.ll
Log Message:
-----------
[LV] Regenerate check lines for bounded load tests (NFC). (#211664)
Re-generate test checks to reduce diff for upcoming PR.
Commit: f4b5fb1569eb944ebe18e52c83e6ad9b0239f53c
https://github.com/llvm/llvm-project/commit/f4b5fb1569eb944ebe18e52c83e6ad9b0239f53c
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][OpenACC] Support partial ThreadX reduction launches (#211665)
Example:
```fortran
!$acc parallel loop collapse(2) num_gangs(10) reduction(+:a)
do i = 1, n
do j = 1, n
do k = 1, m
a(k) = a(k) + x(k,i) * y(k,j)
end do
end do
end do
```
In this code, ACCCG pads ThreadX to the subgroup size because
`gpu.all_reduce` uses subgroup shuffles. This unnecessarily increases
private reduction storage when only one Y/Z row is active.
Fix: preserve partial ThreadX launches for a single row, while retaining
alignment when Y/Z rows could share a subgroup.
Commit: cdfa687cd2eb6b412b36cf5a71ba5303c59a4ac8
https://github.com/llvm/llvm-project/commit/cdfa687cd2eb6b412b36cf5a71ba5303c59a4ac8
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
A clang/test/Driver/print-cxx-stdlib.cpp
Log Message:
-----------
[Driver] Print C++ standard library info (#207798)
Users and tools sometimes need to know which C++ standard library Clang
selected, and which include directories the driver added for it. Today
they have to inspect verbose or `-###` output.
Add options to print this information directly:
`--print-cxx-stdlib`
`--print-cxx-stdlib-include-dirs`
For MSVC targets, the default printed library is `msvcstl`. Explicit
`-stdlib=` values are still reported as requested. The include-dir query
reuses toolchain logic, including the MSVC STL include path for the
default MSVC case.
Commit: 1ca413a2703fb09e9e57686b64373fa2c97588c5
https://github.com/llvm/llvm-project/commit/1ca413a2703fb09e9e57686b64373fa2c97588c5
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/test/CodeGenHLSL/builtins/InterlockedOr.hlsl
A clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedOr.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedOr.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
R llvm/test/CodeGen/DirectX/InterlockedOr.ll
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedOr.ll
R llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedOr_spv_i64.ll
Log Message:
-----------
Add InterlockedOr resource methods (#211639)
This PR builds upon the work merged in
https://github.com/llvm/llvm-project/pull/180804, and completes the
implementation of the InterlockedOr functions in HLSL, by adding these
methods to the existing resource types.
This PR also reflects the same implementation strategy used in
https://github.com/llvm/llvm-project/pull/208128
Fixes: https://github.com/llvm/llvm-project/issues/99126
Assisted by: Github Copilot
Commit: 0cd2bd1c19725a00e403ee9d773687d0f54382f0
https://github.com/llvm/llvm-project/commit/0cd2bd1c19725a00e403ee9d773687d0f54382f0
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
R llvm/test/CodeGen/SPIRV/legalization/matrix-wide-vector-shader.ll
M llvm/test/CodeGen/SPIRV/legalization/vector-legalization-shader.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-multiply.ll
R llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-transpose-bool.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-transpose.ll
Log Message:
-----------
Revert "[SPIRV][Matrix] Change Matrix Shader legalization to largest common divisor" (#211660)
Reverts llvm/llvm-project#207768
Commit: c231e00b290669e51dab0c69477aef36455cbfba
https://github.com/llvm/llvm-project/commit/c231e00b290669e51dab0c69477aef36455cbfba
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
M mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
Log Message:
-----------
[OpenACC] set CollapseCountAttr for scf.parallel (#211676)
During compute lowering, also set the collapse count attribute when
creating scf.parallel ops from acc.loop ops. While this collapse count
is implied by the number of IVs, later canonicalizations may use this
information to decide whether or not to collapse the loop nest further
Commit: 68d7f7b9574c273ac97e211f28a678eb2b1cf307
https://github.com/llvm/llvm-project/commit/68d7f7b9574c273ac97e211f28a678eb2b1cf307
Author: Bhavesh M <85327930+beamandala at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/Transforms/Passes.td
M mlir/include/mlir/Dialect/EmitC/Transforms/Transforms.h
M mlir/lib/Dialect/EmitC/Transforms/WrapFuncInClass.cpp
M mlir/test/Dialect/EmitC/wrap-func-in-class.mlir
Log Message:
-----------
[mlir][EmitC] Add `class-name-format` option to `wrap-emitc-func-in-class` pass (#211147)
Added the `class-name-format` option that takes a format string used to
generate the wrapper class name.
This provides greater control over the generated `ClassOp` name. When
multiple identically structured IR files need to be programmatically
lowered with this pass and linked, there will be naming conflicts which
this patch provides a method of resolution for.
Commit: 2e32c6c19ceedebcccd090286a404c36c744173b
https://github.com/llvm/llvm-project/commit/2e32c6c19ceedebcccd090286a404c36c744173b
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/performance/CMakeLists.txt
A clang-tools-extra/clang-tidy/performance/ExpensiveValueOrCheck.cpp
A clang-tools-extra/clang-tidy/performance/ExpensiveValueOrCheck.h
M clang-tools-extra/clang-tidy/performance/PerformanceTidyModule.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/performance/expensive-value-or.md
A clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/std/optional
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/std/string
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/std/type_traits
A clang-tools-extra/test/clang-tidy/checkers/performance/expensive-value-or-size-threshold.cpp
A clang-tools-extra/test/clang-tidy/checkers/performance/expensive-value-or.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/performance/BUILD.gn
Log Message:
-----------
[clang-tidy] Add performance-expensive-value-or check (#200166)
Finds calls to `value_or` (and alternative spellings `valueOr`,
`ValueOr`) on optional types where the return type is expensive to copy.
Objects not trivially copyable, or larger than a configurable size threshold
are treated as expensive.
Rationale: While `value` and `operator*` return references, `value_or` for
these types always returns by value.
Commit: 516a328b737cf4795036d0c661f0916736ff9c33
https://github.com/llvm/llvm-project/commit/516a328b737cf4795036d0c661f0916736ff9c33
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
A llvm/test/CodeGen/NVPTX/peephole-cvta-local-short-ptr.mir
M llvm/test/CodeGen/NVPTX/short-ptr.ll
Log Message:
-----------
[NVPTX] Respect local pointer width for %SPL (#211656)
Commit: 89b84291ffc0b7d35f86bfc687f0528e44998a42
https://github.com/llvm/llvm-project/commit/89b84291ffc0b7d35f86bfc687f0528e44998a42
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Remove global SPELLING_CACHE alias (#210677)
This completes the second step of
https://github.com/llvm/llvm-project/issues/156680
This change is a follow-up to
https://github.com/llvm/llvm-project/pull/177586, following the release
branching, to ensure a one release-cycle deprecation period.
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Commit: bee0671fa8fa2f0f49e0a6c549240ac2da7e8067
https://github.com/llvm/llvm-project/commit/bee0671fa8fa2f0f49e0a6c549240ac2da7e8067
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Lower Vector saturating shift and narrow intrinsics (#209389)
### summary
part of : https://github.com/llvm/llvm-project/issues/185382
lower all intrinsics in :
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-saturating-shift-right-and-narrow
Commit: 490b49fa2bf09948de3967fa6b89d46cf82afe01
https://github.com/llvm/llvm-project/commit/490b49fa2bf09948de3967fa6b89d46cf82afe01
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Log Message:
-----------
[lldb] Fix qSpeedTest radix mistake, make number parsings explicit (#211495)
The documentation for qSpeedTest says
```
send packet: qSpeedTest:response_size:response-size;
read packet: data:<response data>
response-size is a hex encoded unsigned number up to 64 bits in size.
```
debugserver implements qSpeedTest as per this documentation, but lldb
sends the number in decimal (base 10), and lldb-server parses it as base
10. I changed lldb and lldb-server to base 16. This is a maintenance
command used by lldb developers exclusivley, so IMO I'm not handling a
migration for old/new servers or defining a new packet or key. I was
running some packet transmission tests with debugserver and noticed
debugserver was sending much larger packets than requested; that's the
kind of failure you see when there is a mismatch.
I audited all uses of `getAsInteger()` that pass a 0 for the radix,
meaning auto-detect the radix, in the gdb-remote dir and changed nearly
all of them to specify either base 10 or base 16. There were two places
where we were using auto-sensing on a base 16 number (and no "0x"
prefix), which would parse incorrectly if an [a-f] letter did not occur.
There is one use of `getAsInteger(0,...)` that is still in place, for
pasing the `qRegisterInfo` eh-frame/dwarf register numbers. Our
documentation for these keys specifies that they may be base 10 or base
16 if prefixed with 0x. This is unlike anywhere else in gdb remote
serial protocol, and smells like something I probably stuck in there 15+
years ago because I've never liked the ambiguity about number bases in
the protocol and I made this half-hearted stab at encouraging use of
"0x".
It is always fun to see the inconsistencies as you review multiple
packets. qProcessInfo returns keys like pid/gid/ppid in base 16.
qfProcessInfo returns the same keys in base 10. qHostInfo returns
cputype/cpusubtype (a Mach-O way of specifying a target cpu) in base 10,
qProcessInfo returns the same keys in base 16. There's so many of these
kinds of little inconsistencies :/
Commit: 1ec7a13fb238f17afd89886071a13f7210ef3583
https://github.com/llvm/llvm-project/commit/1ec7a13fb238f17afd89886071a13f7210ef3583
Author: arrowten <69420825+arrowten at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/include/clang/AST/ExprCXX.h
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaTemplate/instantiate-member-initializers.cpp
Log Message:
-----------
[Sema] Fix assertion in TreeTransform when rebuilding CXXParenListInitExpr (#203715)
Commit: 31b6ee93ed0db072a62b4365aeb7c32705c52596
https://github.com/llvm/llvm-project/commit/31b6ee93ed0db072a62b4365aeb7c32705c52596
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/test/CodeGen/AArch64/pauth-lr-tail-call-fpdiff.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr-mir.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauthlr-slh.ll
M llvm/test/CodeGen/AArch64/swifttail-ptrauth.ll
Log Message:
-----------
[llvm][AArch64] Enable .cfi_set_ra_state by default for PAuth_LR (#211698)
Commit: 257e81f2e9a67cb857bd6f801e1708c96bee99e4
https://github.com/llvm/llvm-project/commit/257e81f2e9a67cb857bd6f801e1708c96bee99e4
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
Revert "[mlir][tosa] Combine unranked/ranked tensor types into single type" (#211701)
Reverts llvm/llvm-project#209737
Breaks bots, see
https://github.com/llvm/llvm-project/pull/209737#issuecomment-5064857765
Commit: 725737bf88b8219d32e1723ceb653a0e706cc204
https://github.com/llvm/llvm-project/commit/725737bf88b8219d32e1723ceb653a0e706cc204
Author: Karim Alweheshy <karim.alweheshy at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
A llvm/test/Assembler/auto_upgrade_coro_end_result.ll
Log Message:
-----------
[LLVM] Auto-upgrade legacy coro.end results (#211081)
When `llvm.coro.end` and `llvm.coro.end.async` changed from returning
`i1`
to returning `void` in #159278, the bitcode auto-upgrader continued to
handle
only the older two-argument `llvm.coro.end` form.
As a result, valid bitcode produced before that transition fails
verification
when a current LLVM ThinLTO backend materializes a module containing
either:
* the three-argument, `i1`-returning `llvm.coro.end`; or
* the `i1`-returning `llvm.coro.end.async`.
Teach `AutoUpgrade` to recognize both legacy declarations and rebuild
their
calls with the current `void`-returning intrinsics. If the legacy result
is
used, replace it with `!llvm.coro.is_in_ramp()`, which preserves the old
`true in a resume function, false in the ramp function` behavior. Unused
results require no replacement.
The new assembler test covers used and unused results for both
synchronous
and async coroutine ends.
Tested with:
```console
$ cmake --build build --target opt FileCheck -j8
$ build/bin/opt -S llvm/test/Assembler/auto_upgrade_coro_end_result.ll | \
build/bin/FileCheck llvm/test/Assembler/auto_upgrade_coro_end_result.ll
```
Commit: 31f6ba3bedba40939a33b350f50237aa1a0b19f0
https://github.com/llvm/llvm-project/commit/31f6ba3bedba40939a33b350f50237aa1a0b19f0
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
Log Message:
-----------
Fix error reported by -Wrange-loop-construct (#211657)
One system I'm building on adds -Wrange-loop-construct to the list of
-W<group> options. This results in the compile error:
```
/home/perry/llvm/Woz/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp:37:19: error: loop variable '[ID, N]' creates a copy from type 'std::pair<unsigned int, llvm::MDNode *> const' [-Werror,-Wrange-loop-construct]
for (const auto [ID, N] : MD) {
^
/home/perry/llvm/Woz/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp:37:8: note: use reference type 'std::pair<unsigned int, llvm::MDNode *> const &' to prevent copying
for (const auto [ID, N] : MD) {
^~~~~~~~~~~~~~~~~~~~
&
1 error generated.
```
Commit: 99992e579e072331e336c1690a33c983347f595a
https://github.com/llvm/llvm-project/commit/99992e579e072331e336c1690a33c983347f595a
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/Todo/acc-reduction-component.f90
M flang/test/Lower/OpenACC/acc-reduction-remapping.f90
Log Message:
-----------
[flang][acc] fix array-section reductions on boxed arrays (#211648)
Reduction lowering (genReductions in flang/lib/Lower/OpenACC.cpp) only
remapped the reduced symbol to the acc.reduction result when the object
was a whole array (`isWholeSymbol` guard). For sections, the remap was
skipped, so hlfir.designate for element accesses inside the compute
region kept resolving through the original host declare's box instead of
the private reduction copy — the reduction ran on a private buffer that
never got read back.
Checked and confirmed dropping the boolean is safe for: non-1-starting
sections (recipe already compensates via a deliberate base-pointer
shift), SIZE/UBOUND/LBOUND inside privatized sections (intended
semantics), OPTIONAL dummies (pre-existing TODO, now fails loudly
instead of silently), combined constructs.
Commit: c45be996b8a853294349804bfe14cef3c5f4af10
https://github.com/llvm/llvm-project/commit/c45be996b8a853294349804bfe14cef3c5f4af10
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions-tail-folded.ll
M llvm/test/Transforms/LoopVectorize/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/debugloc.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-blend-chain.ll
Log Message:
-----------
[LV] Simplify Blend/Select chain for tail folding outer loop reductions (#209659)
Predicated tail-folding outer loop reductions will generate a `Blend`
recipe for the predicate in-loop op and a `select` for tail-folding.
E.g.
```llvm
%blend = select %pred.mask, %inloop.op, %red.phi
%sel = select %header.mask, %blend, %red.phi
```
This patch simplifies this Blend/Select chain to
```llvm
%logical.and = select %header.mask, %pred.mask, false
%sel = select %logical.and, %inloop.op, %red.phi
```
This enables further optimization opportunities from CSE and further
simplification since the `%header.mask` will become an all-true-mask in
some scenarios (EVL tail-folding).
Alive2 proof: https://alive2.llvm.org/ce/z/NYydvE
PR: https://github.com/llvm/llvm-project/pull/209659
Commit: 0ee40c546c51b53ec42d94552b346e644e22f020
https://github.com/llvm/llvm-project/commit/0ee40c546c51b53ec42d94552b346e644e22f020
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
A llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always-bf16.ll
Log Message:
-----------
[AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (#210986)
During lowering of masked load/store for bf16 fixed-length vectors,
prefer emitting SVE instructions instead of scalarized branching code
whenever "+sve" is enabled in "target-features", regardless of whether
"+bf16" is present. The resulting changes can be seen in the following
test cases.
- llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
- llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll
The direct cause of generating scalarized branching code is that the
"scalarize-masked-mem-intrin" optimization uses isLegalMaskedLoadStore
to determine whether the target natively supports masked load/store
operations. In AArch64TTIImpl::isLegalMaskedLoadStore,
isElementTypeLegalForScalableVector only treats bf16 vector operations
as legalizable when "+bf16" is enabled in "target-features". This
introduces an unnecessary restriction.
Therefore, this patch removes this restriction from
AArch64TTIImpl::isElementTypeLegalForScalableVector and adds or updates
the corresponding tests for all users of this function.
Fixes: #209758
Commit: fac6cddcb6a0ca10aa0a947c0bf96dace80fb39e
https://github.com/llvm/llvm-project/commit/fac6cddcb6a0ca10aa0a947c0bf96dace80fb39e
Author: jxz_hw <jiangxuezhi2 at huawei.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMConstantPoolValue.cpp
M llvm/lib/Target/ARM/ARMConstantPoolValue.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/subtarget-features-long-calls.ll
Log Message:
-----------
[ARM] support -mlong-calls -fPIC on arm32 (#147313)
support -mlong-calls -fPIC on arm32
try fixing issuse https://github.com/llvm/llvm-project/issues/39970 and
maybe helpful for soving the problem encourted in
https://github.com/llvm/llvm-project/pull/142982
Commit: 755f3e41de69bcf901f531b086bba6a0a58e5adc
https://github.com/llvm/llvm-project/commit/755f3e41de69bcf901f531b086bba6a0a58e5adc
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/test/CodeGen/ARM/elf-preemption.ll
M llvm/test/CodeGen/ARM/weak-hidden-pic.ll
Log Message:
-----------
[ARM] Use .reloc for dso_local weak symbols in PIC mode instead of GOT indirection (#209660)
In ARM ELF PIC mode, weak symbols referenced via the constant pool use a
PC-relative expression like `.long sym-(.LPC+8)`. The assembler eagerly
resolves this when the symbol and reference are in the same section,
which prevents the linker from overriding a weak definition with a
non-weak one from another object file.
The previous approach forced *all* weak symbols through GOT indirection.
That works, but `dso_local` weak symbols with hidden/protected
visibility are non-preemptible — they don't need GOT indirection, and
the extra load is wasteful. This patch emits a `.reloc` directive for
such symbols instead, forcing the assembler to produce an `R_ARM_REL32`
relocation while keeping a direct PC-relative reference from the
constant pool.
Default-visibility weak symbols (even `dso_local`) remain routed through
the GOT because they stay exported and preemptible in shared objects,
and `R_ARM_REL32` against an external symbol cannot be used when making
a shared object.
Fix #209244
Commit: 050c2ef1113becfd9a8464e7474da00a745599b5
https://github.com/llvm/llvm-project/commit/050c2ef1113becfd9a8464e7474da00a745599b5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
Reland "[mlir][tosa] Combine unranked/ranked tensor types into single type" (#211708)
Reverts llvm/llvm-project#211701
Relands llvm/llvm-project#209737
The buildbot failure was misattributed to this change.
Real cause is https://github.com/llvm/llvm-project/pull/207274
Commit: cad3c95a89c48d714a71f6e8b4af6f3e3ab100ea
https://github.com/llvm/llvm-project/commit/cad3c95a89c48d714a71f6e8b4af6f3e3ab100ea
Author: hev <wangrui at loongson.cn>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
A clang/test/CodeGen/LoongArch/lsx/inline-asm-operand-types.c
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/lsx/inline-asm-operand-types.ll
Log Message:
-----------
[LoongArch] Support i128 operands for LSX inline assembly (#211464)
Allow `i128` values to be used with the `f` inline assembly constraint
when targeting LSX.
Although `i128` is not a legal LSX value type, it naturally maps to a
single 128-bit LSX vector register for inline assembly. This enables
instructions such as `vadd.q` to operate directly on `__int128` operands
without requiring explicit vector types.
Commit: 30fb6a7b7624024db9edcb88219b65289e72e571
https://github.com/llvm/llvm-project/commit/30fb6a7b7624024db9edcb88219b65289e72e571
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86RegisterInfo.cpp
A llvm/test/CodeGen/X86/zero-call-used-regs-soft-float.ll
Log Message:
-----------
[X86] Don't emit x87 register scrub when x87 is unavailable (#211146)
### Summary
`-fzero-call-used-regs=all` always emits the x87 `fldz`/`fstp` scrub
sequence, without checking whether x87 is enabled. In a function built
with `-mno-x87` or `-msoft-float`, this injects 16 `x87` instructions
into a translation unit that must not touch the FPU:
```asm
// test.c
int f(int x) { return x + 1; }
$ clang -O2 -S -mno-x87 -msoft-float -mno-sse \
-fzero-call-used-regs=all --target=x86_64-linux-gnu test.c -o -
f:
leal 1(%rdi), %eax
fldz
... # 8x fldz
fstp %st(0)
... # 8x fstp %st(0)
xorl %ecx, %ecx
...
retq
```
Reproducer: https://godbolt.org/z/xqjzj9rx7
Without -fzero-call-used-regs, no x87 instructions are emitted:
https://godbolt.org/z/qoenEb33j
This is problematic for kernels, firmware, and EFI environments, which
commonly compile with the FPU disabled or not context-switched. Emitting
x87 instructions in these configurations can cause the FPU state to
fault or become corrupted.
### Fix
Skip the x87 scrub in `emitZeroCallUsedRegs` when x87 is unavailable
(`useSoftFloat()` or `!hasX87()`). In those configurations, the x87
register stack cannot contain program values, so there is nothing to
clear.
Add `zero-call-used-regs-soft-float.ll` to verify that a `-msoft-float`
function still zeroes the requested general-purpose registers while
emitting no x87 instructions. The full X86 CodeGen test suite passes,
and code generation for x87-enabled targets is unchanged.
This issue was discovered while investigating #211064, in which x87
return values were clobbered by the same scrubbing logic. Both issues
originate in the x87 handling within emitZeroCallUsedRegs, but they are
independent and are addressed in separate changes.
Commit: fec36790e2a09168aa85493d029d5fbfde3e11c0
https://github.com/llvm/llvm-project/commit/fec36790e2a09168aa85493d029d5fbfde3e11c0
Author: Bryth <matteo.rizza at protonmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
Log Message:
-----------
[mlir][VectorToLLVM] Fix comment still referring to undef instead of poison (NFC) (#211196)
When updating operators from undef (deprecated) to poison, the
associated comment wasn't updated accordingly. This PR fixes it.
Commit: 4f8de7694a0aab7a55c21970855dd8659f3700c6
https://github.com/llvm/llvm-project/commit/4f8de7694a0aab7a55c21970855dd8659f3700c6
Author: Jin Huang <jinhuang1102 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/test/CodeGenCoroutines/coro-destructor-of-final_suspend.cpp
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch-cleanuppad.ll
M llvm/test/Transforms/Coroutines/coro-noop-pacbti.ll
M llvm/test/Transforms/Coroutines/coro-noop.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels.ll
A llvm/test/Transforms/Coroutines/coro-split-resume-entry-count-no-suspend.ll
A llvm/test/Transforms/Coroutines/coro-split-resume-entry-count.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck][coro] Adding Branch weights PGO in Coroutines Passes (#184466)
The CoroSplit and CoroFrame generate several control flow instructions
(`br`, `select`, `switch`) that previously lacked `!prof` branch weight
metadata.
When a coroutine is split, most basic blocks are simply cloned into the
generated functions (`.resume`, `.destroy`, and `.cleanup`) and don't
actually change their internal structure or layout. This PR changes:
1. Dispatch Branch Weights:
Since the original coroutine already ran through PGO, we already have
the `SuspendFreqs` records telling us exactly how many times each
suspension point was executed in the real world.
In the new clone `.resume` functions, the compiler generates new routing
`switch` instruction to direct the traffic. Instead of guessing the
probabilities for these new routes, we simply look back at the
`SuspendFreqs` records, calculate the exact execution frequency and
directly onto the new routing `switch` instructions as `!prof` data.
2. Function Entry Count:
We compute the entry count for the generated `.resume` function by
summing up the frequencies of all suspension target blocks, ensuring the
`.resume` function's entry metadata accurately reflects its true
invocation frequency rather than inheriting original counts. Two new
test cases is added see:
```
llvm/test/Transforms/Coroutines/coro-split-resume-entry-count-no-suspend.ll
llvm/test/Transforms/Coroutines/coro-split-resume-entry-count.ll
```
3. Others updates add branch weight metadata in several locations within
these passes:
* **CoroSplit.cpp**:
* `handleFinalSuspend`: Added an equal (50/50) weight to conditional
branches handling final-suspend conditions via
`setExplicitlyUnknownBranchWeightsIfProfiled`.
* `updateCoroFrame`: Adds an equal (50/50) weight to the select
instruction that chooses either the `destroy` or `cleanup` function by
using `setExplicitlyUnknownBranchWeightsIfProfiled`.
* **CoroFrame.cpp**:
* `rewritePHIsForCleanupPad`: Adds a branch weight of {0, 1, 1} to
two-way switch instructions driven by PHI nodes generated in the EH
dispatch block (.corodispatch). This provides accurate probabilistic
information for `SimplifyCFG`, which typically translates such `switch`
```
cleanup2.corodispatch: ; preds = %catch.dispatch.2, %handler2
%1 = phi i8 [ 0, %handler2 ], [ 1, %catch.dispatch.2 ]
%2 = cleanuppad within %h1 []
switch i8 %1, label %unreachable [
i8 0, label %cleanup2.from.handler2
i8 1, label %cleanup2.from.catch.dispatch.2
]
```
into `icmp` + `br`.
```
cleanup2.corodispatch: ; preds = %catch.dispatch.2, %handler2
%1 = phi i8 [ 0, %handler2 ], [ 1, %catch.dispatch.2 ]
%2 = cleanuppad within %h1 []
%3 = icmp eq i8 %1, 0
br i1 %3, label %cleanup2.from.handler2, label
%cleanup2.from.catch.dispatch.2
```
* **CoroCleanup.cc**
* Setting the `unknown` profile to `NoopFn`/`__NoopCoro_ResumeDestroy`
to avoid the false warnings. because this function is generated by this
the pass, PGO has no profile count for it.
Co-authored-by: Jin Huang <jingold at google.com>
Commit: 8e075ecfc01b0ab6e87b3cfa1aea5acf58edd6e9
https://github.com/llvm/llvm-project/commit/8e075ecfc01b0ab6e87b3cfa1aea5acf58edd6e9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] XFail 3 coro tests (#211719)
These are still failing after 4f8de7694a0aab7a55c21970855dd8659f3700c6.
Commit: 1be72f061f674c2d1a2243d04f8bb092ce0d1fd4
https://github.com/llvm/llvm-project/commit/1be72f061f674c2d1a2243d04f8bb092ce0d1fd4
Author: Austin Kerbow <Austin.Kerbow at amd.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
A llvm/test/tools/llvm-mca/AMDGPU/gfx1250-wmma-cycles.s
Log Message:
-----------
[AMDGPU] Fix gfx1250 WMMA latencies (#202522)
- 16x16x64 FP8/BF8 WMMA run in 4 cycles, not 8. Add a 4-cycle
WriteXDL1PassWMMA write and split the FP8/BF8 InstRW by shape so that
16x16x128 FP8/BF8 (and F16/BF16) keep the 8-cycle latency.
- f8f6f4 WMMA run in 4 cycles when both matrix inputs are f4 and 8
cycles when any input is f6 or f8, instead of the previous 8/16. Update
the scheduling predicate accordingly.
Commit: 7d13e22df93ba9905851d6ea8d1536e67894998d
https://github.com/llvm/llvm-project/commit/7d13e22df93ba9905851d6ea8d1536e67894998d
Author: jinge90 <ge.jin at intel.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
Create symlink for llvm-link in libc docker image (#210929)
Commit: bac13e7ea2cfcb250de462537b0e84d4403f5029
https://github.com/llvm/llvm-project/commit/bac13e7ea2cfcb250de462537b0e84d4403f5029
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
Log Message:
-----------
[libc] Fix compilation when AVX is not available (#211726)
Commit: 906f520af01a4c788935f24caea00237b42624e2
https://github.com/llvm/llvm-project/commit/906f520af01a4c788935f24caea00237b42624e2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/lib/IR/BuiltinAttributes.cpp
Log Message:
-----------
[mlir] Fix alignment assertion for empty DenseArrayAttr (#211730)
After #207274, libc++ fails __assume_aligned assertion in
__assume_valid_range.
https://lab.llvm.org/buildbot/#/builders/25/builds/18994
`DenseArrayAttrImpl<T>::operator ArrayRef<T>()` is just a cast of
`raw.data()`. `raw` is aligned copy of range from
from BytecodeReader done by
Builtin_DenseArrayRawDataParameter allocator.
However, if range is empty, aligned copying was
omitted, leaving unaligned `ArrayRef<char>`.
The fix is to replace unaligned `ArrayRef<>` with
aligned default constructed.
Commit: 9edfdc231c9811124bbb7e3943c578c538d46aba
https://github.com/llvm/llvm-project/commit/9edfdc231c9811124bbb7e3943c578c538d46aba
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/lower-table-based-cttz-basics.ll
M llvm/test/Transforms/AggressiveInstCombine/lower-table-based-cttz-dereferencing-pointer.ll
M llvm/test/Transforms/AggressiveInstCombine/lower-table-based-cttz-non-argument-value.ll
M llvm/test/Transforms/AggressiveInstCombine/lower-table-based-cttz-zero-element.ll
Log Message:
-----------
[AggressiveInstCombine] Avoid converting first table element when folding table-based cttz (#211202)
Do not attempt to zext (or truncate) the table's first element into the
cttz input type, as the element type may be wider than the input type.
Instead, convert the cttz result and emit the select directly in the
table's access type, which is the final expected type as well. Minor
opportunity to favor using APInt when the first element has more than 64
active bits to avoid crashing.
Fixes: https://github.com/llvm/llvm-project/issues/210890.
Commit: 3cba2943a9d391e2ba301dd37948ef8b248bb031
https://github.com/llvm/llvm-project/commit/3cba2943a9d391e2ba301dd37948ef8b248bb031
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
A llvm/test/TableGen/aarch64-register-info-stats.td
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[TableGen] Add register-info statistics (#211528)
Add statistics for the numbers of explicit and synthesized register
classes, along with the number of register pressure sets. This makes
growth in the generated register model easier to spot since it can be
surprising.
Assisted-by: codex
Commit: ee407f7e7069cccfdc1815de07e17cebf83d19f9
https://github.com/llvm/llvm-project/commit/ee407f7e7069cccfdc1815de07e17cebf83d19f9
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcDeathTestExecutors.cpp
M libc/test/src/stdlib/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
Reapply "[libc] Port process utilities to hermetic mode and enable some tests" (#211484)
This reverts https://github.com/llvm/llvm-project/pull/210889
(https://github.com/labath/llvm-project/commit/b7f642fdb262e2ed3c2209b9a10017084e1595ad,
"Revert
recent changes to the hermetic tests"), re-applying
https://github.com/llvm/llvm-project/pull/209999
(https://github.com/labath/llvm-project/commit/9e2e9b33e14808541c0470b92ade34bee6608bf6,
"[libc] Port process
utilities to hermetic mode and enable some tests") and
https://github.com/llvm/llvm-project/pull/210715
(https://github.com/labath/llvm-project/commit/4bd1a447e136e60ea441370ac5d7b898aa4efab0,
"[libc] Make hermetic test
syscall deps linux-only"), which was reverted due to failures on the GPU
bots.
There are a couple of small changes w.r.t the original patches:
- This version disables the exit tests on builds that do not
support subprocess tests (via the newly introduced
LIBC_TEST_SUBPROCESS_TESTS). This is necessary because the GPU builds
contain the relevant entry points, which means their tests are not
skipped automatically.
- fix a typo in a variable name
- make the dependencies conditional on LIBC_TEST_SUBPROCESS_TESTS
instead of listing the target OSs directly. This is a no-op, as that's
exactly how the variable is defined, but it makes the code cleaner.
Commit: aa590d15f2c9f035ad70cd532bba859e7d127160
https://github.com/llvm/llvm-project/commit/aa590d15f2c9f035ad70cd532bba859e7d127160
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/tools/spirv-tools/CMakeLists.txt
Log Message:
-----------
[SPIR-V] Fix SPIRVTools download step failing on rerun (#211561)
Customized DOWNLOAD_COMMAND ran a raw `git clone`, which fails with
"destination path already exists" whenever ninja reruns the download
step against an already cloned checkout. Use the native
GIT_REPOSITORY/GIT_TAG (with default DOWNLOAD_COMMAND) step instead,
which handles this case correctly
Commit: 6e68094d4bdd3d0cc7ea08f97992cc0436456637
https://github.com/llvm/llvm-project/commit/6e68094d4bdd3d0cc7ea08f97992cc0436456637
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
Log Message:
-----------
[UniformityAnalysis] Make BlockLabels transient and switch to SmallVector. NFC (#211734)
Drop the field from the descriptor and keep the labels in a
propagator-local SmallVector indexed by block number.
Commit: 9e1be60f660c8cd78653ac6ddd6b73d7735079f9
https://github.com/llvm/llvm-project/commit/9e1be60f660c8cd78653ac6ddd6b73d7735079f9
Author: Thrrreeee <1379998393 at qq.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/DIEBuilder.h
M bolt/include/bolt/Core/DebugData.h
M bolt/include/bolt/Core/DebugNames.h
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Core/DebugNames.cpp
M bolt/lib/Core/GDBIndex.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
A bolt/test/X86/dwarf4-dwarf64-ranges.test
A bolt/test/X86/dwarf64-debug-info-aranges.test
A bolt/test/X86/dwarf64-debug-names.test
A bolt/test/X86/dwarf64-loclists.test
A bolt/test/X86/dwarf64-lowpc-highpc-convert.test
A bolt/test/X86/dwarf64-ref-addr.test
A bolt/test/X86/dwarf64-split-dwarf.test
A bolt/test/X86/dwarf64-str-offsets.test
A bolt/test/X86/dwarf64-types.test
A bolt/test/X86/mixed-dwarf32-dwarf64-debug-names.test
A bolt/test/X86/mixed-dwarf32-dwarf64-rnglists.test
A bolt/test/X86/mixed-dwarf32-dwarf64-str-offsets.test
Log Message:
-----------
[BOLT][DebugInfo] Add DWARF64 support for BOLT (#206437)
BOLT currently assumes the DWARF32 format when it rewrites debug
sections. As a result, rewriting a binary that was compiled with
`-gdwarf64` either produces a corrupted output or fails `llvm-dwarfdump
--verify`. This patch adds DWARF64 support to the BOLT DWARF rewriter,
honoring each unit's DwarfFormat and emitting correct encodings DWARF64
for binaries, including mix DWARF32 and DWARF64.
Commit: 7623cd8c6eec1741cb5ecd803d591fd38d3fc04b
https://github.com/llvm/llvm-project/commit/7623cd8c6eec1741cb5ecd803d591fd38d3fc04b
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/sys/auxv/linux/CMakeLists.txt
Log Message:
-----------
[libc] Make getauxval test hermetic (#210706)
To make this work, I needed to remove the getauxval definition from
HermeticTestUtils.cpp. Even though it was weak, it still prevented the
real one from being used because the linker will not extract an archive
member if the dependency has already been satisfied by a weak
definition.
I *think* I've removed the need for it by changing how the getauxval
dependency is declared in cmake (it fixes the errors on the presubmit
aarch64 bot), but I don't know if that was the only issue.
Commit: 1102d3f04027faf2aa1b9e9d68a4b9026ba6126d
https://github.com/llvm/llvm-project/commit/1102d3f04027faf2aa1b9e9d68a4b9026ba6126d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fmaddsub-combine.ll
M llvm/test/CodeGen/X86/fmsubadd-combine.ll
R llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
Log Message:
-----------
[X86] Remove lowerToAddSubOrFMAddSub vectorization lowering code (#211666)
Similar to #207406 - the middleend (SLP/VectorCombine/InstCombine)
should no longer generate any mixed "addsub" scalar buildvector patterns
for the backend.
We can remove the lowerToAddSubOrFMAddSub build vector code path and
rely on the combineShuffleToAddSubOrFMAddSub path.
The vector code created by SLP/VectorCombine isn't yet perfect (and I'm
still working on improving it), but lowerToAddSubOrFMAddSub is unrelated
and of no more use to us.
The CodeGen buildvector tests can be removed - equivalent test coverage
is present in Transforms/PhaseOrdering/X86 that generate shuffle
patterns that we test for in fmaddsub-combine.ll, fmsubadd-combine.ll
and sse3-avx-addsub.ll (and sse3-avx-addsub-2.ll can be deleted).
Fixes #144489
Commit: 6a8775b6f7e5a7e1bf3055819595b2612605c6f4
https://github.com/llvm/llvm-project/commit/6a8775b6f7e5a7e1bf3055819595b2612605c6f4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Get function from loop, TTI from LVP to call getMaxVScale (NFC) (#211670)
Remove unnecessary uses for CM from LVP::executePlan.
Commit: 1302d7b1c8f19575cb1a279bd776628fcf5c9dbc
https://github.com/llvm/llvm-project/commit/1302d7b1c8f19575cb1a279bd776628fcf5c9dbc
Author: chandan singh <36783761+chandankds at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
A llvm/test/Transforms/SampleProfile/pseudo-probe-musttail-deopt.ll
Log Message:
-----------
[PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (#211226)
PseudoProbe insertion can generate invalid IR by inserting a probe
between a musttail/llvm.experimental.deoptimize call and its following
ret. Insert the probe before these calls to preserve the required
instruction ordering.
Commit: 746ab9809c203c10884668deac22384388b47e90
https://github.com/llvm/llvm-project/commit/746ab9809c203c10884668deac22384388b47e90
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
[docs] Update BOLT Office Hours Zoom link (#211491)
Commit: c3a9625ef1437388fd92ebdddda58d980ec87229
https://github.com/llvm/llvm-project/commit/c3a9625ef1437388fd92ebdddda58d980ec87229
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[LangRef] Clarify interaction of noalias and synchronization (#211507)
Noalias applies to accesses on other threads, but this was not very
clear in existing wording, because "during the execution of the
function" is somewhat ambiguous.
Explicitly mention that it applies to accesses from other threads. This
means that conflicting accesses (i.e. not read-read) need to either
happen-before function entry, or function exit needs to happen-before
them, otherwise behavior is undefined. For accesses not based on the
noalias pointer, this requires synchronization *outside* the function.
Commit: 9f426801ba6781b5245440e24397ac1fe610523d
https://github.com/llvm/llvm-project/commit/9f426801ba6781b5245440e24397ac1fe610523d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/CodeGen/AArch64/arm64-fmax.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/masked-load-3xhalf.ll
M llvm/test/Transforms/InstCombine/fcmp-select.ll
M llvm/test/Transforms/InstCombine/minmax-fp.ll
M llvm/test/Transforms/InstCombine/unordered-fcmp-select.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks_cmp_sel_min_max.ll
Log Message:
-----------
[ValueTracking] Fix signed zero handling in minnum/maxnum matching (#210077)
The SPF float min/max matching skipped the check that either the select
is nsz or one of the ops non-zero in the case where the zero used in the
fcmp and select is the same one. This does not make any sense, because
which zero is used in the fcmp is just completely irrelevant.
This leads to miscompiles where the SPF pattern is lowered to hardware
minnum/maxnum operations. These have ordered zero, rather than picking
whichever zero is specified in the select. It can still be accidentally
correct if the zero happens to be the right one for min/max.
I believe the current assumption is that SPF only matches in cases where
signed zero behavior does not matter. An alternative way to fix this
would be to match the specific zero that's required to match ordered
zero semantics. Though I'd rather we match that in DAGCombine, not the
SPF based SDAGBuilder code.
Fixes https://github.com/llvm/llvm-project/issues/93414.
Commit: 35368cb5dd371b823a2ccc0f9598d753cb2529f4
https://github.com/llvm/llvm-project/commit/35368cb5dd371b823a2ccc0f9598d753cb2529f4
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/test/src/sys/uio/CMakeLists.txt
M libc/test/src/sys/uio/readv_test.cpp
M libc/test/src/sys/uio/writev_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/read_write_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[libc] Convert readv, writev, and read_write tests to use pipes (#210725)
Using a pipe avoids races between "hermetic" and "unit" versions of the
same test and avoids leaving filesystem artifacts around if the test
fails. If I'm successful, we won't have the worry about the first
problem anymore, but I think it's still a nice cleanup.
Assisted by Gemini.
Commit: f392fe53464bbd5fabda5654c482d55b9b4342a9
https://github.com/llvm/llvm-project/commit/f392fe53464bbd5fabda5654c482d55b9b4342a9
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/optimized/TestDAP_optimized.py
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/test/API/tools/lldb-dap/repl-mode/TestDAP_repl_mode_detection.py
Log Message:
-----------
[lldb-dap] Migrate optimized, output and repl_mode_detection tests (#211597)
Commit: 100b6155c6fd6722a29deab55db1893b727c178e
https://github.com/llvm/llvm-project/commit/100b6155c6fd6722a29deab55db1893b727c178e
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/disassemble/TestDAP_disassemble.py
M lldb/test/API/tools/lldb-dap/threads/TestDAP_threads.py
Log Message:
-----------
[lldb-dap] Migrate threads and disassemble DAP test (#211277)
Commit: debd8a7f889b29551dff7897f807e17f90eeee1d
https://github.com/llvm/llvm-project/commit/debd8a7f889b29551dff7897f807e17f90eeee1d
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Subtarget.h
R llvm/test/CodeGen/AArch64/aarch64-no-mov-spill-chain.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
Log Message:
-----------
Revert "[AArch64] Enable Spillage Copy Elimination by default" (#211572)
Reverts llvm/llvm-project#186093
Issue https://github.com/llvm/llvm-project/issues/206839 shows that
EliminateSpillageCopies is not currently ready to be enabled by default
on AArch64. https://github.com/llvm/llvm-project/pull/207169 was raised
to fix the issue, but concerns were raised around complexity of the
function and change. Until a suitable solution can be found,
EliminateSpillageCopy will be disabled on AArch64 by default.
For those who wish to still use the pass, `-enable-spill-copy-elim=true`
will ensure the pass is run.
Commit: a00f27dfe3b66d10d23eaef401635fd392d1d0bc
https://github.com/llvm/llvm-project/commit/a00f27dfe3b66d10d23eaef401635fd392d1d0bc
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
Log Message:
-----------
[MachineSink] Use RegisterClassInfo::getRegPressureSetLimit (#211746)
I think this part was missed in #210826.
Commit: 2ae7310be6112c213adbc4321fd1fff5098e2fa1
https://github.com/llvm/llvm-project/commit/2ae7310be6112c213adbc4321fd1fff5098e2fa1
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
M llvm/test/MC/AMDGPU/gfx13_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx13_asm_vimage_alias.s
Log Message:
-----------
[AMDGPU] Add image_atomic_{min,max}_num_flt support to gfx13 (#211564)
GFX13 uses the num_flt suffix as the default assembler name for the
32-bit FP image atomic min/max instructions. Keep flt as a
backward-compatible alias. GFX12 is unchanged (flt default, num_flt
alias).
---------
Co-authored-by: Petar Avramovic <Petar.Avramovic at amd.com>
Commit: fd14ad5ade18ed6ad810fe75b9e91272fbf07923
https://github.com/llvm/llvm-project/commit/fd14ad5ade18ed6ad810fe75b9e91272fbf07923
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIR-V] Reuse PartialOrderingVisitor DominatorTree in structurizer splitter (#211544)
Based on the discussion in
https://github.com/llvm/llvm-project/pull/211198
Commit: 905ec411bd1e8ebf3ea527b79c208d58dbaa6f16
https://github.com/llvm/llvm-project/commit/905ec411bd1e8ebf3ea527b79c208d58dbaa6f16
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
Log Message:
-----------
[NFC][SPIR-V] Remove unused LoopInfo member from structurizer splitter (#211538)
Splitter never used its LoopInfo reference
Based on the discussion in
https://github.com/llvm/llvm-project/pull/211198
Commit: 4e19543b1a85e635a8c663081bfdf42488795623
https://github.com/llvm/llvm-project/commit/4e19543b1a85e635a8c663081bfdf42488795623
Author: julianmorillo <julianmorillo at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
FIX some OMPT tests that fail on RISC-V (#156914)
There is a known issue with these tests (see
https://github.com/llvm/llvm-project/issues/35661).
It looks that the behaviour is very architecture specific and it was
somehow solved for aarch64 but no mention to riscv64.
Commit: 0e0418f2fd8f3144b0dd036bcd85cacab5b6b262
https://github.com/llvm/llvm-project/commit/0e0418f2fd8f3144b0dd036bcd85cacab5b6b262
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
Log Message:
-----------
[AArch64] Mark SP-only register classes as non-allocatable (#211549)
Reserved registers are not allocatable and since these are singleton
classes, they should be marked as such.
Assisted-by: codex
Commit: a1341c9cf78771b5a031fd295e091d3dd34fab0b
https://github.com/llvm/llvm-project/commit/a1341c9cf78771b5a031fd295e091d3dd34fab0b
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
Log Message:
-----------
[CIR][RISCV] Add new builtins (#211555)
Leave them NYI now.
Commit: 383e2662157dfea354edf140bc25477776bc5de9
https://github.com/llvm/llvm-project/commit/383e2662157dfea354edf140bc25477776bc5de9
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions.ll
Log Message:
-----------
[LV] Use SCEV to compute final value of complex induction variables (#195059)
Extend optimizeInductionLiveOutUsers to handle complex induction
variable by using SCEV analysis. When an induction variable forms an
affine AddRec {Start,+,Step}, compute the final value as Start +
(ResumeTripCount - 1) * Step using VPDerivedIVRecipe.
This patch eliminates unnecessary vector widening for induction
variables only used outside the loop.
Pre-commit test #195055
Commit: ca6f2702c5e412aa816eb57391c7639031d5a0d6
https://github.com/llvm/llvm-project/commit/ca6f2702c5e412aa816eb57391c7639031d5a0d6
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/imm-splat-ops.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to include min/max operations. (#211228)
Commit: 91da2c85d6aa9d1f3006f49c24a9f08100fd9972
https://github.com/llvm/llvm-project/commit/91da2c85d6aa9d1f3006f49c24a9f08100fd9972
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-to-svbool-binops.ll
Log Message:
-----------
[LLVM][InstCombine] Enable simplification of SVE predicate binops. (#211016)
Enable existing SVE binop simplification code paths for predicate
vectors. I've extended tryCombineFromSVBoolBinOp to maintain an existing
tranformation for the case where AND operations are replaced by their
SELECT equivalent.
Commit: bda064c37aed427412ac6de7500a688d37cdf546
https://github.com/llvm/llvm-project/commit/bda064c37aed427412ac6de7500a688d37cdf546
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (#211554)
We were forcing fast-math compares by dropping the ordered requirement.
Commit: 9e4d9f23d0301905224b0f6da828fa7f0f68c255
https://github.com/llvm/llvm-project/commit/9e4d9f23d0301905224b0f6da828fa7f0f68c255
Author: ilia-cher <30845429+ilia-cher at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
Log Message:
-----------
[AMDGPU] Fix register pressure estimates for use-and-redefs (#211139)
Current register pressure estimate (bumpDownwardPressure) has a bug
triggered by an instruction that reads and writes the same register:
1) first we go over the uses and determine that this is the last use
(before redef), pressure decrease is reported;
2) then we go over the (re)defs and compare the previous mask (before
the use) with a new mask, see no difference and report nothing; instead
we should compare the new mask with the mask we get after processing the
uses.
Test plan:
```
ninja AMDGPUTests llc
./unittests/Target/AMDGPU/AMDGPUTests --gtest_filter='*AMDGPU*:*BumpDownward*'
```
Commit: 2127dbba7cb7768b5cef0c44291a1789251060e1
https://github.com/llvm/llvm-project/commit/2127dbba7cb7768b5cef0c44291a1789251060e1
Author: Iurii Khosoi <aadaa_fgtaa at pm.me>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
M llvm/test/CodeGen/X86/compress-false-deps.mir
M llvm/test/CodeGen/X86/expand-false-deps.mir
Log Message:
-----------
[X86] Break false dependencies of compress/expand on Zen 6 (#211671)
Benchmark results provided by @ganeshgit in #207079 show that Zen 6
microarchitecture retains the false dependency on the output register of
zero-masked compress/expand which is already present on Zen 4 and 5.
This patch applies corresponding tunings to Zen 6.
Commit: 19857baa713d1f6c3bb7489f49e73e77f93ba81c
https://github.com/llvm/llvm-project/commit/19857baa713d1f6c3bb7489f49e73e77f93ba81c
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/unittests/Frontend/CMakeLists.txt
A llvm/unittests/Frontend/EnumSetTest.cpp
Log Message:
-----------
[OpenMP] Implement EnumSet container (#211323)
This is close to flang's common::EnumSet with the difference being that
it provides forward iterators.
The reason for having an implementation that is separate from
common::EnumSet is that this is intended to be shared for all consumers
of llvm/lib/Frontend/OpenMP. This class is also planned to be one of the
core containers for representing auto-generated OpenMP data in the
future.
Commit: 6c7fc0c2388481d2217494d440281bb39e9a8013
https://github.com/llvm/llvm-project/commit/6c7fc0c2388481d2217494d440281bb39e9a8013
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/symbol.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Use llvm::omp::ClauseSet instead of common::EnumSet (#211324)
Replace uses of OmpClauseSet (defined in terms of common::EnumSet)
with the common llvm::omp::ClauseSet (defined via llvm::EnumSet).
Commit: c9ef522734713eeb6be3815b1dc5ed91ef49fbde
https://github.com/llvm/llvm-project/commit/c9ef522734713eeb6be3815b1dc5ed91ef49fbde
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
Log Message:
-----------
[flang][OpenMP] Use llvm::omp::DirectiveSet instead of common::EnumSet (#211325)
Replace uses of OmpDirectiveSet (defined in terms of common::EnumSet)
with the common llvm::omp::DirectiveSet (defined via llvm::EnumSet).
The llvm::omp::DirectiveSet class will also be used in openmp-parsers,
where OmpDirectiveSet was an instance of llvm::Bitset.
Commit: 49c39708a6a6349a4798c6894f9125ecd47f6173
https://github.com/llvm/llvm-project/commit/49c39708a6a6349a4798c6894f9125ecd47f6173
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang] Provide "clause set" type as parameter to DirectiveStructureChecker (#211326)
This will remove the hardcoded dependence of DirectiveStructureChecker
on
the common::EnumSet class. Both consumers of it will be able to use
their
own type for the clause set.
The only complication was the ClauseSetToString member function, whose
implementation depended on the specifics of common::EnumSet, namely the
IterateOverMembers member function. It was moved out of the class, and
turned into a function template to make it possible to provide different
specializations for common::EnumSet and llvm::EnumSet.
Commit: 862a390f54f0ecde773d2daaf1d6c0f582ce290a
https://github.com/llvm/llvm-project/commit/862a390f54f0ecde773d2daaf1d6c0f582ce290a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Switch TableGen generation to use llvm::EnumSet (#211327)
Replace the remaining uses of the common::EnumSet-based OmpClauseSet to
llvm::omp::ClauseSet.
Commit: 3d69ace09ec4e053e36fbdbeaf66d6caa0c6e60f
https://github.com/llvm/llvm-project/commit/3d69ace09ec4e053e36fbdbeaf66d6caa0c6e60f
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/omptarget-debug-reduc-fn-loc.mlir
Log Message:
-----------
Reland [OMPIRBuilder] Don't use invalid debug loc in reduction fn. (#211566)
This fixes https://github.com/llvm/llvm-project/issues/211385. This was
initially landed in https://github.com/llvm/llvm-project/pull/148284.
We have this pattern of code in OMPIRBuilder for many functions that are
used in reduction operations.
```
Function *LtGRFunc = Function::Create
BasicBlock *EntryBlock = BasicBlock::Create(Ctx, "entry", LtGRFunc);
Builder.SetInsertPoint(EntryBlock);
```
The insertion point is moved to the new function but the debug location
is not updated. This means that reduction function will use the debug
location that points to another function. This problem gets hidden
because these functions gets inlined but the potential for failure
exists.
This patch resets the debug location when insertion point is moved to new
function. Some `InsertPointGuard` have been added to make sure we restore
the debug location correctly when we are done with the reduction function.
It also clears the debug location for the helper-internal barriers in
emitInterWarpCopyFunction.
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 2e272fbc6e6dc75555dbd53863c223fdd3105dec
https://github.com/llvm/llvm-project/commit/2e272fbc6e6dc75555dbd53863c223fdd3105dec
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fmaddsub-combine.ll
M llvm/test/CodeGen/X86/fmsubadd-combine.ll
Log Message:
-----------
[X86] Match (FM)ADDSUB patterns from target shuffles as well as ISD::VECTOR_SHUFFLE (#211764)
Allows us to match X86ISD::ADDSUB/FMSUBADD/FMADDSUB after shuffle lowering
Commit: f8ad1cd85e70da44154cad2c929eeab310314b5c
https://github.com/llvm/llvm-project/commit/f8ad1cd85e70da44154cad2c929eeab310314b5c
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64Subtarget.h
A llvm/test/CodeGen/AArch64/misched-fusion-apple-sme-compute.mir
M llvm/test/TableGen/aarch64-apple-tuning-features.td
Log Message:
-----------
[AArch64] Add Apple SME compute clustering macro-fusion (#211483)
This patch adds a subtarget feature that controls scheduling SME compute
instructions back to back. Enabled on Apple CPU.
Commit: 5ae98c105f85a8002aef072919c192ae73765163
https://github.com/llvm/llvm-project/commit/5ae98c105f85a8002aef072919c192ae73765163
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
A llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-misaligned-access.ll
Log Message:
-----------
[ExpandMemCmp] Check misaligned access per overlapping/tail load (#210707)
Overlapping loads place a power-of-two load at an offset that need not be
a multiple of its size, so the access can be misaligned even when the base
pointers are aligned. Rather than have each target gate
`AllowOverlappingLoads` on unaligned support, give `MemCmpExpansion`
the target info and check the overlapping load against its actual alignment
`(commonAlignment(baseAlign, offset))` via
`TargetTransformInfo::allowsMisalignedMemoryAccesses`. It is only formed when
the target can access it; otherwise the expansion falls back to the greedy
(naturally aligned) sequence.
Tail expansions are different: they merge already-legal adjacent loads
covering the same bytes, and the backend always legalizes the merged
(possibly non-power-of-two) load into aligned power-of-two pieces, so
they need no alignment gate. The one real constraint is size: a merged load
wider than `MaxLoadSize` can only be emitted when it is the sole load
(`getMemCmpOneBlock`). In a multi-block expansion, `emitLoadCompareBlock`
and the result-block phis are sized to `MaxLoadSize` and assume every
load fits. Because the per-call-site alignment filter can shrink `MaxLoadSize`,
skip a tail merge only when the result would stay multi-block and exceed it.
RISCV therefore offers overlapping loads and tail expansions
unconditionally and relies on the pass to enforce access legality.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
Commit: 9c756612c7a0231ba40982ab2c7f8b6cf8fb895b
https://github.com/llvm/llvm-project/commit/9c756612c7a0231ba40982ab2c7f8b6cf8fb895b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[LV] Simplify VPCostContext ctor by using VFSelectionContext (NFC). (#211765)
VFSelectionContext provides most fields needed. Pass it directly and
access its fields.
Commit: 98195e0458dd5ec037785a6f861c6402bec778b3
https://github.com/llvm/llvm-project/commit/98195e0458dd5ec037785a6f861c6402bec778b3
Author: Twice <twice at apache.org>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/python/mlir/dialects/ext.py
M mlir/test/python/dialects/ext.py
M mlir/test/python/dialects/transform_op_interface.py
M mlir/test/python/dialects/transform_pattern_descriptor_op_interface.py
Log Message:
-----------
[MLIR][Python] Make Python-defined dialect loading context-aware (#210501)
Python-defined dialect loading currently relies on
`Dialect._mlir_module` to infer whether a dialect has already been
loaded. This state belongs to the Python dialect class rather than an
MLIR context.
Consequently, loading the same dialect after switching contexts requires
`reload=True`, while reloading it in a context where it is already
present can hit the operation registration assertion reported in
#210053.
This patch adds `mlirContextGetLoadedDialect` (following
https://github.com/llvm/lighthouse/pull/228#discussion_r3589792891) to
the C API and exposes it as `Context.is_dialect_loaded`.
`Dialect.load()` now queries the active context:
- loading a dialect more than once in the same context raises a
`RuntimeError`;
- loading the same Python-defined dialect in another context succeeds
without a `reload` flag.
The `reload` parameter is semantically wrong (mentioned in
https://github.com/llvm/lighthouse/pull/228#discussion_r3586672116) thus
removed from the API as a small breaking change. Usually, users who are
using `reload` can just remove it and everything will work fine.
Fixes #210053.
Assisted by GPT 5.6 Sol (for writing test cases).
Commit: b82563ac9ace38a1f4217c573fd63fa2d94eccd0
https://github.com/llvm/llvm-project/commit/b82563ac9ace38a1f4217c573fd63fa2d94eccd0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMP.h
Log Message:
-----------
[OpenMP] Fix build error after 19857baa71 (#211771)
Some builders using older versions of gcc encounter this issue:
```
llvm/include/llvm/Frontend/OpenMP/OMP.h:138:14: error: ‘Base’ has not been declared
138 | assert(Set.Base::test(At));
| ^~~~
```
E.g. https://lab.llvm.org/buildbot/#/builders/10/builds/32524
Commit: 81cedf1e2060dbc2c5be43a6be0c86d6ba76df8d
https://github.com/llvm/llvm-project/commit/81cedf1e2060dbc2c5be43a6be0c86d6ba76df8d
Author: Krisitan Erik Olsen <kristian.erik at outlook.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
A llvm/test/Transforms/LoopVectorize/X86/invoke-in-preheader.ll
Log Message:
-----------
[VPlan] Fix sentinel assertion when broadcasting invoke results (#210464)
VPTransformState::get broadcasts a scalar value by inserting after the
last scalarized instruction using
std::next(BasicBlock::iterator(LastInst)). When LastInst is a terminator
like invoke, std::next advances past the end of the block, hitting the
!isKnownSentinel() assertion.
Use Instruction::getInsertionPointAfterDef which correctly handles PHIs,
invokes, and regular instructions, matching the pattern already used in
VectorCombine.cpp.
Fixes #210342
Commit: 82488f0e7119dd05cd63329458733e8c295f0338
https://github.com/llvm/llvm-project/commit/82488f0e7119dd05cd63329458733e8c295f0338
Author: Jinjie Huang <huangjinjie at bytedance.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Rewrite/MachORewriteInstance.h
M bolt/include/bolt/Utils/Utils.h
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Rewrite/MachORewriteInstance.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Utils/Utils.cpp
A bolt/test/X86/dynsym-pwrite.test
M bolt/unittests/Core/BinaryContext.cpp
Log Message:
-----------
[BOLT] Fix pwrite assertion failure via a new safePWrite wrapper (#198569)
Background: Currently, BOLT seems to implicitly assume that the .dynsym
section is located at a low offset within the binary, calling pwrite()
directly to update it.
Issue: In scenarios where the binary has been modified by tools like
patchelf, sections like .dynsym may be moved to a high offset area. This
can lead to a violation of the Offset + Size <= Pos assertion in
pwrite(). A typical scenario is when the previous eh_frame_header update
moves the stream cursor (pos) back to a low
offset([code](https://github.com/llvm/llvm-project/blob/llvmorg-23-init/bolt/lib/Rewrite/RewriteInstance.cpp#L6387)).
Fix: This patch resolves the pwrite assertion failure via a new
safePWrite wrapper, which introduces a defensive check that verifies and
conditionally adjusts the stream position. A corresponding test case has
also been added.
Commit: 62b809a37aac6cf2f64e99e9efba89dd8731920d
https://github.com/llvm/llvm-project/commit/62b809a37aac6cf2f64e99e9efba89dd8731920d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-pr-benchmark.yml
Log Message:
-----------
[libc++] Consistently install Python and dependencies across macOS CI jobs (#211659)
On the macOS self-hosted runners, we need to install dependencies via
Homebrew and pinning the Xcode version is good for reproducibility. This
applies the guidelines documented in #211622 to libc++'s CI jobs.
Commit: 697f0f3b20d371d9e417891d9cdfb6a3613d7828
https://github.com/llvm/llvm-project/commit/697f0f3b20d371d9e417891d9cdfb6a3613d7828
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
Log Message:
-----------
[NFC] Regenerate CHECK lines in scalable-strict-fadd.ll (#211573)
Commit: dd1f97501758ccf5952f862f46f0ba15cbd23dcf
https://github.com/llvm/llvm-project/commit/dd1f97501758ccf5952f862f46f0ba15cbd23dcf
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/X86/shuffletoidentity-infinite-loop.ll
Log Message:
-----------
[VectorCombine] Fix infinite loop in foldShuffleToIdentity (#211717)
PR #211508 ("foldShuffleToIdentity - ensure we push any created
instructions to the WorkList") started re-queueing every instruction
created by generateNewInstTree onto the VectorCombine worklist. When the
regenerated tree contains a bitcast, re-queueing the bitcast's operand
lets foldBitcastShuffle sink the bitcast back into a shuffle(bitcast),
which foldShuffleToIdentity then re-matches as the same superfluous
identity. On a widen/concat shuffle chain feeding a bitcast the two
folds
ping-pong and the pass never reaches a fixed point (observed as an opt
-O3 hang/timeout).
Keep the WorkList threading from PR #211508 (it enables further folds,
e.g. the improved intrinsics_minmax and two_concats cases) but don't
re-queue the operand of a regenerated bitcast, which is the only push
that feeds the foldBitcastShuffle <-> foldShuffleToIdentity loop.
Add an X86 regression test that previously looped and now terminates.
Co-Authored-By: Claude Opus 4.8 <noreply at anthropic.com>
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: fdbbcba77d625a5c403aea78b5b7fc64547fa558
https://github.com/llvm/llvm-project/commit/fdbbcba77d625a5c403aea78b5b7fc64547fa558
Author: Hocky Yudhiono <hocky.yudhiono at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/invalid.mlir
Log Message:
-----------
[mlir][affine] Add affine.for verifier and move arguments check earlier (#206685)
Fixes #206628 crash by adding an earlier body argument verifier for
`affine.for`. This crash is caused because `LoopLikeOpInterface`
verifier would call `getRegionIterArgs()` and assumed induction var of
`affine.for` exists.
Commit: 42176da77a4653a2fb55a0bbead0296fe6873c7d
https://github.com/llvm/llvm-project/commit/42176da77a4653a2fb55a0bbead0296fe6873c7d
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/test/CodeGen/AArch64/pauth-lr-tail-call-fpdiff.ll
M llvm/test/CodeGen/AArch64/swifttail-ptrauth.ll
Log Message:
-----------
[llvm][AArch64] Fix the location of PAuth_LR AUT CFI (#211702)
Unlike PAC CFI, we do not have the same unwinder constraint on PAuth_LR
CFI occurring before the PAC instruction. For AUT CFI, like other CFI
opcodes, these should always occur after the instruciton that they
reference.
Commit: 1ada3044291aa3215b9deb2aeec3e952c13c2813
https://github.com/llvm/llvm-project/commit/1ada3044291aa3215b9deb2aeec3e952c13c2813
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
Log Message:
-----------
[mlir][OpenACC] Keep ThreadY active for inner-combine-fed worker reductions (#211696)
Example:
```fortran
res = 0
!$cuf kernel do(2) <<< *, (32,8) >>> reduce(+:res)
do j2 = 1, n2
do j1 = 1, n1
res = res + a(j1, j2)
end do
end do
```
In this code the reduction accumulator is per-(block_y, thread_y): each
worker row's shared slot is filled by an inner block-scoped combine, so
the rows hold distinct partials. The final combine into the result was
classified as not "worker-private" (block_y+thread_y into a global
dest), so it fell back to the ThreadY row-zero path and dropped every
worker but row 0 — a 2D SUM returned -1 instead of -4.
Fix: keep ThreadY active for a block_y+thread_y accumulator that is fed
by an inner block-scoped combine (distinct per-worker partials). A plain
worker accumulate still lowers to a worker-wide all_reduce that
broadcasts the total, so it correctly stays row-zero and is not
multiplied by the worker count.
Commit: ba42905dfdb184fe054591bb81384efbb8a6fd46
https://github.com/llvm/llvm-project/commit/ba42905dfdb184fe054591bb81384efbb8a6fd46
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
Log Message:
-----------
[llvm][AArch64] Add a test for -aarch64-cfi-llvm-set-ra-sign-state='s default (#211791)
Commit: af795ffee92313af4a439919264737d4d9d7886c
https://github.com/llvm/llvm-project/commit/af795ffee92313af4a439919264737d4d9d7886c
Author: Dragan Mladjenovic <Dragan.Mladjenovic at syrmia.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
Log Message:
-----------
[AMDGPU] Fix pre-GFX11 llvm.fptosi.sat.i16.f32 lowering (#211703)
Commit: 3cf44478fcf54c8996c88c1214d2170c69d4a01f
https://github.com/llvm/llvm-project/commit/3cf44478fcf54c8996c88c1214d2170c69d4a01f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/fold-intrinsics.ll
Log Message:
-----------
[ConstantFolding]Fold llvm.powi via square-and-multiply (#210771)
Compute constant-folded powi using APFloat multiplies in the operand's
own semantics (square-and-multiply), matching the expansion
ExpandPowI generates in SelectionDAGBuilder, instead of routing
through std::pow via double/float conversion.
Commit: eeeaad979cc68b19bdd3ed27db579d2f8974f3a8
https://github.com/llvm/llvm-project/commit/eeeaad979cc68b19bdd3ed27db579d2f8974f3a8
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/lib/Target/TargetLoweringObjectFile.cpp
A llvm/test/CodeGen/X86/metadata_section_kind.ll
Log Message:
-----------
Add !metadata_section_kind global variable metadata (#211524)
Similar to !exclude in that this attempts to guide section + flag
choices in a generic/abstract way.
`!exclude` tells LLVM to use the generic `SectionKind::Exclude` for the
globals. Likewise, `!metadata_section_kind` tells LLVM to use
`SectionKind::Metadata`.
The added docs go into a little more detail.
This is needed for the dynamic debugging feature, otherwise there's no
way to avoid `SHF_EXCLUDE` or `SHF_ALLOC` flags being added to the
section without special handling based on its name. We've moved to using
a new section type for dynamic debugging and we don't want to rely on
the name, which may be omitted.
Commit: ee7ea10c141cbf69ff10a25bfde05bd8e67b295f
https://github.com/llvm/llvm-project/commit/ee7ea10c141cbf69ff10a25bfde05bd8e67b295f
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/PHIElimination.cpp
A llvm/test/DebugInfo/MIR/InstrRef/undef-phi-through-regalloc.mir
Log Message:
-----------
[CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (#209013)
IncomingReg is only set to a register when allPhiOperandsUndefined does
not hold. Changes PHIEliminationImpl::LowerPHINode to check IncomingReg
before using it for debug phi.
Fixes #206324
Assisted-by: Codex
Commit: d1f2fc598109ecd511b526b1021f1474eb1b33f0
https://github.com/llvm/llvm-project/commit/d1f2fc598109ecd511b526b1021f1474eb1b33f0
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/AsmParser/Parser.cpp
M llvm/tools/verify-uselistorder/verify-uselistorder.cpp
Log Message:
-----------
[SystemZ][z/OS] Add the OF_Text flag to read .ll files and parse assembly files (#211782)
This patch allows us to parse .ll files in verify-uselistorder correctly
and fixes failures in any testcase that uses this tool.
Commit: d610744c92b1edcf9330b2690cdb2e2053721a5f
https://github.com/llvm/llvm-project/commit/d610744c92b1edcf9330b2690cdb2e2053721a5f
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
Log Message:
-----------
[lldb] Speedup AppleObjCRuntimeV2 UpdateIfNeeded (#211774)
This converts a loop calling Process::ReadMemory into a single call to
Process::ReadMemoryRanges.
Commit: 6636eb9689ffbd0c9dd80a153b6c10ca3cea9f88
https://github.com/llvm/llvm-project/commit/6636eb9689ffbd0c9dd80a153b6c10ca3cea9f88
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/dpbusd.ll
M llvm/test/CodeGen/X86/vec_extract-avx.ll
Log Message:
-----------
[X86] Truncate (v4i32 (vzext_movl (v2i64 bitcast (scalar_to_vector (i64 X))))) (#211798)
Noticed while triaging #211619 - truncate the i64 to i32 directly to avoid extra shuffles
Commit: a2d74bfe386695ee1a17ba3b60367fb79c3bfdfe
https://github.com/llvm/llvm-project/commit/a2d74bfe386695ee1a17ba3b60367fb79c3bfdfe
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
R flang/test/Lower/OpenMP/Todo/error.f90
A flang/test/Lower/OpenMP/error.f90
M flang/test/Parser/OpenMP/error-unparse.f90
M flang/test/Semantics/OpenMP/error.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[flang][OpenMP] Implement the error directive (#206175)
## [flang][OpenMP] Implement the `error` directive
### Summary
Implements the OpenMP `error` directive (OpenMP 5.1, 2.5.4) in Flang.
The directive prints a message and, with `severity(fatal)`, stops.
Handling depends on the `at` clause:
- **`at(compilation)`** (the default): handled in semantics. Emits a
compile-time warning or error and produces no IR.
- **`at(execution)`**: lowered to a new `omp.error` op, which becomes a
call to `__kmpc_error`.
Before this patch the directive was unimplemented and hit a `not yet
implemented: OmpErrorDirective` error during lowering.
Fixes #204240.
### Details
Changes go through the compiler pipeline.
**Flang semantics**
- `Enter(OmpErrorDirective)` emits the compile-time diagnostic for the
`at(compilation)` form, using the directive's severity and the `MESSAGE`
text when present.
- `Enter(OmpClause::Message)` checks that the `MESSAGE` expression is a
scalar, default-kind `CHARACTER`, which is required to pass it to the
runtime as a `const char*`.
**Flang lowering**
- `genErrorDirective` lowers the `at(execution)` form only.
- A constant message is stored in the `message` attribute. A
non-constant message is copied to a null-terminated buffer
(`genNullTerminatedString`) and passed as the `message_expr` operand,
because `__kmpc_error` expects a NUL-terminated string.
**New `omp.error` op (MLIR OpenMP dialect)**
- Adds a `ClauseSeverity` enum (`warning = 1`, `fatal = 2`, matching the
`__kmpc_error` argument) and `ClauseSeverityAttr`.
- `omp.error` takes a required `severity` attribute and an optional
message, given either as:
- `message` — a constant string attribute, or
- `message_expr` — a pointer to a null-terminated string.
- A verifier rejects providing both `message` and `message_expr`.
**MLIR → LLVM IR translation**
- Translates `omp.error` to `__kmpc_error(ident_t *, i32 severity, ptr
message)`.
**OMPIRBuilder**
- Adds `OpenMPIRBuilder::createError(...)`, which builds the call, maps
`fatal`→`2` and `warning`→`1`, and passes a null pointer when there is
no message.
### Tests
- **Parser** (`error-unparse.f90`): unparse and parse-tree output.
`at(compilation) severity(fatal)` cases that would stop compilation were
moved to `at(execution)`.
- **Semantics** (`Semantics/OpenMP/error.f90`): compilation
warning/error/default-severity cases, plus the new `MESSAGE` type, rank,
and kind errors.
- **Lowering** (`Lower/OpenMP/error.f90`): constant message, no message,
empty message, runtime `message_expr`, and `at(compilation)` cases that
must not produce `omp.error`. The old `Lower/OpenMP/Todo/error.f90` test
is removed.
- **MLIR** (`ops.mlir`, `invalid.mlir`): round-trip of each `omp.error`
form and the both-messages verifier error.
- **LLVM IR** (`openmp-llvm.mlir`): `__kmpc_error` calls for warning and
fatal, constant and runtime messages, and the null-message cases.
Assisted-by: Github Copilot
Commit: 8c9c62d0899ce115dcf469c1bcbf694f2b6db774
https://github.com/llvm/llvm-project/commit/8c9c62d0899ce115dcf469c1bcbf694f2b6db774
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/source/Target/StackFrameRecognizer.cpp
Log Message:
-----------
[lldb] Skip the WebAssembly function header for frame recognizers (#211806)
A frame recognizer restricted to the first instruction matches when the
frame's PC equals the function's start address. On WebAssembly a
function begins with a non-executable local variable header, so the
symbol's start address is never a value the PC can take and such
recognizers never matched.
Route the start address through Architecture::SkipFunctionHeader, which
already maps a function start past this header for breakpoints and
disassembly, so the comparison uses the first executable instruction.
Commit: b2307cd9a05cb61bc9af74777de744a92479088f
https://github.com/llvm/llvm-project/commit/b2307cd9a05cb61bc9af74777de744a92479088f
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
Log Message:
-----------
[lldb][test] Skip frame-recognizer argument tests on WebAssembly (#211807)
The recognizer reads arguments through $arg1/$arg2, which resolve via
argument registers. WebAssembly has no argument registers and no ABI
plugin, and these tests build without debug info, so there is no
location to read the arguments from and they come back as zero.
Commit: 1597ca6a839f188334bad6cd7f93a4b61159d122
https://github.com/llvm/llvm-project/commit/1597ca6a839f188334bad6cd7f93a4b61159d122
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-pr-benchmark.yml
Log Message:
-----------
[libc++] Fix Python selection in the macOS benchmark jobs (#211812)
The macOS benchmark jobs install python 3.14 via Homebrew but added the
wrong prefix (<prefix>/libexec/bin) instead of <prefix>/bin to the PATH.
Commit: dc21971950a10be027adad6b4d347a1ef7f9bd3d
https://github.com/llvm/llvm-project/commit/dc21971950a10be027adad6b4d347a1ef7f9bd3d
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[OFFLOAD][L0] Properly consume errors in program validation (#211799)
Some of the program unittests were failing because errors weren't
consumed properly.
Commit: 9ee615b7ab84bd3e3091f7185ac09c8e01f7c495
https://github.com/llvm/llvm-project/commit/9ee615b7ab84bd3e3091f7185ac09c8e01f7c495
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
M llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
Log Message:
-----------
[AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (#211285)
reqd_work_group_size(X, Y, 1) does not guarantee the dispatch runs with
work_dim == 2, since the spec still allows enqueuing with work_dim == 3
and a unit-size Z dimension. Only fold hidden_grid_dims to a constant
when Z != 1 (work_dim must be 3)
Otherwise tighten the range instead of assuming an exact value
Alterative approach to https://github.com/llvm/llvm-project/pull/205866
without killing constant folding
Commit: 1f896524c95a9ed02fc8da970811fe6310475093
https://github.com/llvm/llvm-project/commit/1f896524c95a9ed02fc8da970811fe6310475093
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-latch-counted.ll
A llvm/test/Transforms/ConstraintElimination/retry-without-decomposition.ll
A llvm/test/Transforms/ConstraintElimination/sadd-with-overflow.ll
M llvm/test/Transforms/ConstraintElimination/shl.ll
Log Message:
-----------
[ConstraintElim] Precommit additional tests (NFC). (#211802)
Tests include
* shl nuw tests with known bounds.
* sadd.with.overflow.
* decompose failures due to precondiitons
* using info from latch condition
Commit: 5018aebcde6bcb3a29e3e10bd332865289e01e29
https://github.com/llvm/llvm-project/commit/5018aebcde6bcb3a29e3e10bd332865289e01e29
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Drop redundant member LLVM_ABI annotations (#205767)
Classes that are annotated with `LLVM_ABI[_FOR_TEST]` should not have
individual member annotations. This PR drops the redundant member
annotations.
The effort to build LLVM as a dylib is tracked in #109483.
Commit: f9b12955f891bb086d12309d89656821d776e858
https://github.com/llvm/llvm-project/commit/f9b12955f891bb086d12309d89656821d776e858
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
Log Message:
-----------
[AMDGPU] Use erase_if for Kills transfer in SIOptimizeVGPRLiveRange (#211800)
Commit: a443ddb9b096aff4a0c9dea18df4e2ce6bc7bc85
https://github.com/llvm/llvm-project/commit/a443ddb9b096aff4a0c9dea18df4e2ce6bc7bc85
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/call-decisions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
A llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
Log Message:
-----------
[NFC][VPlan][Tests] Some CHECKs cleanup (#211425)
* Fix RUN-line in `VPlan/AArch64/call-decisions.ll` to work with UTC
"; -RUN" was resulting in
```
Error: Failed to update test <...>/call-decisions.ll
Traceback (most recent call last):
File "<...>/update_analyze_test_checks.py", line 228, in main
update_test(opt_basename, ti)
File "<...>/update_analyze_test_checks.py", line 131, in update_test
check_label_prefix = "VPlan for loop in " if regex == common.VPLAN_RE else ""
UnboundLocalError: local variable 'regex' referenced before assignment
```
* Regenerate CHECKs in VPlan/X86/vplan-vp-intrinsics.ll with UTC
* Split VPlan/interleave-and-scalarize-only.ll in two (VPlan/LLVM dumps)
to be able to use UTC plus use `-vplan-print-metadata=false` for VPlan
version
* Remove stale `CHECK-NOT`
Probably missed in `-debug` -> `-vplan-print-after` transition.
Commit: 26f5da13928ee6bd6bc2f325d13185c83a5d70eb
https://github.com/llvm/llvm-project/commit/26f5da13928ee6bd6bc2f325d13185c83a5d70eb
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
Log Message:
-----------
[SystemZ][z/OS] Add text flag when parsing json (#211805)
This patch adds the text flag when we are opening json files to parse.
This fixes two lit failures on z/OS
Commit: 044d3462c6e9c545ba426ce2574e13a44ad69cf3
https://github.com/llvm/llvm-project/commit/044d3462c6e9c545ba426ce2574e13a44ad69cf3
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/test/Fir/FirToSCF/do-extra.fir
M flang/test/Fir/FirToSCF/do-loop.fir
M flang/test/Fir/FirToSCF/iter-while.fir
M flang/test/Fir/FirToSCF/iterate-while-extra.fir
Log Message:
-----------
[flang] Set nsw on FIRToSCF loop induction increments (#211796)
Example:
```fortran
subroutine sum_loop(a, n)
integer :: a(n), i
do i = 1, n
a(i) = i
end do
end
```
In this code, the DO induction variable `i` is stepped each iteration.
`FIRToSCF` lowered that increment to a plain `arith.addi` with no
overflow flag — unlike the CFG-conversion path (`ControlFlowConverter`),
which marks it `overflow<nsw>` — so LLVM must assume the IV may wrap and
cannot form an affine recurrence, blocking analysis/vectorization of
loops lowered via `fir-to-scf`.
Fix: add a `set-nsw` pass option (default `true`, disabled under
`-fwrapv`) and mark the typed-IV, reconstructed final-value, and
`iterate_while` increments `nsw`, matching `ControlFlowConverter`;
`FirToSCF` lit tests updated accordingly.
Commit: 570a19d1a9eff263e815c794ea015bd65c62ab66
https://github.com/llvm/llvm-project/commit/570a19d1a9eff263e815c794ea015bd65c62ab66
Author: earnol <earnol at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/test/Analysis/string-search-modeling.c
Log Message:
-----------
[analyzer] Fix false positive in strchr/strrchr with constant args (#210154)
When both the source string and the search target are compile-time
constants, determine the outcome precisely and only emit the feasible
branch (found or not-found).
Handles strchr, strrchr, strchrnul, memchr, strstr, and strpbrk.
Fixes #209905
Assisted by: Kiro-cli
---------
Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
Commit: 1ad3b9eff99a5f9e0fe9075aa936d4dc439500e9
https://github.com/llvm/llvm-project/commit/1ad3b9eff99a5f9e0fe9075aa936d4dc439500e9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w32.cl
M cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w64.cl
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w64.cl
M cross-project-tests/amdgpu/builtins-amdgcn-wmma-w32.cl
M cross-project-tests/amdgpu/builtins-amdgcn-wmma-w64.cl
Log Message:
-----------
cross-project-tests: Migrate amdgpu tests to use subarch triples (#210115)
Commit: 7a3208c8550564489037111f1d85a01f18a196a2
https://github.com/llvm/llvm-project/commit/7a3208c8550564489037111f1d85a01f18a196a2
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
A flang/test/Lower/CUDA/cuda-managed-assign.cuf
Log Message:
-----------
[flang][cuda] Emit data transfers for whole-array and function-result managed assignments (#211640)
Assignments that read or write device/managed/unified data are
synchronous data transfers on stream 0 that wait for previously launched
kernels. Previously, whole-array managed = managed / host = managed
assignments, and assignments consuming a managed/unified/device function
result, were lowered as host copies (hlfir.assign), which can race an
asynchronous kernel that produced the data.
Emit cuf.data_transfer for these cases. Element-wise (scalar) accesses
and right-hand-side expressions involving managed data remain host
operations (the latter avoids materializing a temporary), and a
whole-allocatable left-hand side keeps reallocation semantics.
Commit: 227ef987a7d0e9c88bf8e06d038565bda09958b5
https://github.com/llvm/llvm-project/commit/227ef987a7d0e9c88bf8e06d038565bda09958b5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/test/AST/ast-print-amdgcn-predicate.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/AMDGPU/full-bf16.c
M clang/test/CodeGen/AMDGPU/nullptr-in-different-address-spaces.cpp
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/builtins-extended-image.c
M clang/test/CodeGen/builtins-image-load.c
M clang/test/CodeGen/builtins-image-store.c
M clang/test/CodeGen/half-float16-vector-compatibility.cl
M clang/test/CodeGen/target-data.c
M clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
M clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c
M clang/test/Layout/ms-x86-declspec-empty_bases.cpp
M clang/test/Preprocessor/hash_builtin.cpp
M clang/test/SemaCXX/amdgpu-feature-builtins-invalid-use.cpp
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (1) (#211822)
Mechanically rewrite cc1 test RUN lines from the old
`-triple amdgcn... -target-cpu gfxNNN` form to the new subarch triple
form (e.g. `-triple amdgpu9.00-amd-amdhsa`), dropping the now-redundant
-target-cpu. The subarch encodes the exact target, so the emitted IR no
longer carries a "target-cpu" function attribute; autogenerated CHECK
lines are regenerated accordingly.
This batch covers the small CodeGen, Frontend, Layout, and Preprocessor
test directories.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: fb420255a43d5eeb19cf8fa7905e94561c33f442
https://github.com/llvm/llvm-project/commit/fb420255a43d5eeb19cf8fa7905e94561c33f442
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
[IR][NFC] Remove vtables from AnalysisResultConcept (#211810)
Similar to #209414 but for AnalysisResultConcept. This avoids vtables
for every analysis result type.
As a side effect, this improves the build times of PassBuilder.cpp by
~8% due to substantially fewer unique_ptr instantiations (instantiating
unique_ptr is expensive, at least with libstdc++).
Commit: f1bf19b05493d54b1c5c5d938e8ea2c2d92e8130
https://github.com/llvm/llvm-project/commit/f1bf19b05493d54b1c5c5d938e8ea2c2d92e8130
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
Log Message:
-----------
[AMDGPU] Avoid quadratic MapVector::erase in SIFixSGPRCopies (#211740)
Commit: e6c604edc609ed9dfa7c701f6bc96001f28ac94d
https://github.com/llvm/llvm-project/commit/e6c604edc609ed9dfa7c701f6bc96001f28ac94d
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port 19857baa713d (#211835)
Commit: 13040fb13addf9aa4631762640fe79b5e0c306c3
https://github.com/llvm/llvm-project/commit/13040fb13addf9aa4631762640fe79b5e0c306c3
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port 10e0a2ee03b0 (#211834)
Commit: 165121e8b1d6dba116a8103c08597f585f2e8d60
https://github.com/llvm/llvm-project/commit/165121e8b1d6dba116a8103c08597f585f2e8d60
Author: Sayan Sivakumaran <sivakusayan at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll
Log Message:
-----------
Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (#211427)
Original PR: https://github.com/llvm/llvm-project/pull/206597
Revert PR: https://github.com/llvm/llvm-project/pull/211341
Relands abe757b. It was reverted due to my PR failing to update PHINode
entries in the default block, causing invalid IR in certain
circumstances. Original reproducer can be found
[here](https://github.com/llvm/llvm-project/pull/206597#issuecomment-5049789740).
We will now properly remove a PHINode entry if we remove a path from the
switch's block to the default block.
-------------------------------------------------------
If the default branch of a switch proves that there is only one value
that can be sent to the default branch, we can transform the default
branch into an explicit case of the switch. This can assist in further
simplification of the CFG during the simplification loop.
For example, we should be able to create an explicit case for the
default block in cases like the following:
```llvm-ir
switch_bb:
switch i8 %x, label %default_bb [...]
default_bb:
%cmp = icmp eq i8 %x, 1
call void llvm.assume(i1 %cmp) ; Implies %x must be 1
```
Related to #50665.
Commit: 22116c946aa8078cee8d0c5efa49874c6264e92e
https://github.com/llvm/llvm-project/commit/22116c946aa8078cee8d0c5efa49874c6264e92e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/atomics-remarks-gfx90a.cu
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
M clang/test/CodeGenCUDA/cluster_dims.cu
M clang/test/CodeGenCUDA/correctly-rounded-div.cu
M clang/test/CodeGenCUDA/flush-denormals.cu
M clang/test/CodeGenCUDA/fp-contract.cu
M clang/test/CodeGenCUDA/host-used-extern-determinism.cu
M clang/test/CodeGenCUDA/host-used-extern.cu
M clang/test/CodeGenCUDA/implicit-host-device-fun.cu
M clang/test/CodeGenCUDA/increment-index-for-thunks.cu
M clang/test/CodeGenCUDA/long-double.cu
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCUDA/struct-mangling-number.cu
M clang/test/CodeGenCUDA/unused-global-var.cu
M clang/test/CodeGenCUDA/vtbl.cu
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (2) (#211823)
Rewrite CodeGenCUDA cc1 test RUN lines from `-triple amdgcn...
-target-cpu gfxNNN` to the new subarch triple form, dropping the redundant
-target-cpu.
Autogenerated CHECK lines are regenerated. Tests that intentionally
assert the "target-cpu" function attribute are left unchanged.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: b7fa8b21227c7c6a1c625db9ceab4acb485c2e6b
https://github.com/llvm/llvm-project/commit/b7fa8b21227c7c6a1c625db9ceab4acb485c2e6b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/X86/permute-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffletoidentity-bitcast.ll
M llvm/test/Transforms/VectorCombine/pr197910.ll
Log Message:
-----------
[VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (#211530)
This is a general, cost driven version of the InstCombine fold (which
was limited to non-length changing cases in #211115), and also permits
folds with multiuse shuffles.
Fixes #210948
Commit: 57af943dfefaceb40b0f4deac2895cd4d5e6fd39
https://github.com/llvm/llvm-project/commit/57af943dfefaceb40b0f4deac2895cd4d5e6fd39
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/test/CodeGenHIP/amdgcnspirv-uses-amdgpu-abi.cpp
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenHIP/amdgpu-flat-atomic-fadd.hip
M clang/test/CodeGenHIP/amdgpu-global-atomic-fadd.hip
M clang/test/CodeGenHIP/amdgpu-load-to-lds.hip
M clang/test/CodeGenHIP/ballot.cpp
M clang/test/CodeGenHIP/builtins-amdgcn-buffer-format.hip
M clang/test/CodeGenHIP/builtins-amdgcn-dl-insts.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx11-dl-insts.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx12-wmma-w32.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx12-wmma-w64.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cvt-f16.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-wmma-f16.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx950-cvt.hip
M clang/test/CodeGenHIP/builtins-amdgcn-mfma-gfx908.hip
M clang/test/CodeGenHIP/builtins-amdgcn-mfma-gfx942.hip
M clang/test/CodeGenHIP/builtins-amdgcn-mfma-gfx950.hip
M clang/test/CodeGenHIP/builtins-amdgcn-raytracing.hip
M clang/test/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CodeGenHIP/builtins-amdgcn-wmma-w32.hip
M clang/test/CodeGenHIP/builtins-amdgcn-wmma-w64.hip
M clang/test/CodeGenHIP/builtins-make-buffer-rsrc.hip
M clang/test/CodeGenHIP/dpp-const-fold.hip
M clang/test/CodeGenHIP/maybe_undef-attr-verify.hip
M clang/test/CodeGenHIP/profile-coverage-mapping.hip
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (3) (#211825)
Rewrite CodeGenHIP cc1 test RUN lines to the new subarch triple form,
dropping the redundant -target-cpu, and regenerate autogenerated CHECK
lines. Tests whose behavior depends on the implicit wave32 default
(which is not enabled by a bare subarch triple) are left for a later change.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 0dd2c577357ab253eab6712e74a2a5c39b58482c
https://github.com/llvm/llvm-project/commit/0dd2c577357ab253eab6712e74a2a5c39b58482c
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add lowering for bf16 fpext (#210887)
Add lowering for bf16 fpext based on SDAG's ISD::BF16_TO_FP lowering.
Commit: f7c908b048fe8637fea7346cae808df38075b018
https://github.com/llvm/llvm-project/commit/f7c908b048fe8637fea7346cae808df38075b018
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
A flang/test/Semantics/OpenMP/metadirective-default-none.f90
Log Message:
-----------
[flang][OpenMP] Check DEFAULT(NONE) on metadirective loop variants (#210172)
Flang does not enforce `DEFAULT(NONE)` for variables referenced in a
loop
associated with a standalone METADIRECTIVE. Consequently, it accepts
invalid
programs when a potentially selectable loop variant specifies
DEFAULT(NONE) but
omits a referenced variable from its data-sharing clauses. This change
checks the
associated loop for each potentially selectable `DEFAULT(NONE)` variant
and
diagnoses missing data-sharing attributes as it does for ordinary OpenMP
loop
constructs.
Standalone metadirectives and their associated loops are separate
parse-tree
nodes. For example:
```fortran
!$omp metadirective &
!$omp& when(implementation={vendor(llvm)}: &
!$omp& parallel do default(none) shared(n, a)) default(nothing)
do i = 1, n
a(i) = x
end do
```
Unlike an ordinary `PARALLEL DO`, the loop is not nested under the
directive:
```text
METADIRECTIVE
`-- WHEN
`-- PARALLEL DO DEFAULT(NONE) SHARED(n, a)
DO
`-- a(i) = x
```
Name resolution therefore leaves the variant context before visiting the
loop and
does not diagnose the missing data-sharing attribute for `x`.
After associating a metadirective with its loop, validate DEFAULT(NONE)
for each
potentially selectable loop variant. Preserve the existing rules for
predetermined and explicit data-sharing attributes, static locals,
nested
constructs, specification expressions, and statically inapplicable
variants.
Assisted with codex.
Commit: 1dbb1b1361c852d3369ebb00e760d0182aa81e17
https://github.com/llvm/llvm-project/commit/1dbb1b1361c852d3369ebb00e760d0182aa81e17
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Log Message:
-----------
[lldb] Restore autosense for expedited memory-cache address parsing (#211846)
PR #211495 changed the expedited "memory:<addr>=<bytes>" address parse
in SetThreadStopInfo from autosense (radix 0) to explicit base 16.
debugserver sends this address with a "0x" prefix, and
StringRef::getAsInteger only strips that prefix in autosense mode. With
an explicit base 16 the parse stops at the 'x' and fails, so the
expedited stack bytes are never seeded into the L1 memory cache.
Restore BASE_AUTOSENSE here, matching the documented format for this key
(0x hex, 0 octal, otherwise decimal). Fixes TestExpeditedStackMemory.py.
Commit: 0220c07a94012b9dce9250addac6a8ee1f674b21
https://github.com/llvm/llvm-project/commit/0220c07a94012b9dce9250addac6a8ee1f674b21
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP]Fix crash on duplicate switch successors in alias-check versioning
A terminator with two edges to the same block produced duplicate
dominator-tree insert/delete updates for that edge, tripping the
unbalanced-operations assertion. Deduplicate successors before
building the update list.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211852
Commit: fd9416b1cead200af535021c561a573971408f1e
https://github.com/llvm/llvm-project/commit/fd9416b1cead200af535021c561a573971408f1e
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/test/CodeGen/Hexagon/autohvx/vector-compare-128b.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-compare-float.ll
A llvm/test/CodeGen/Hexagon/hvx-float-setoeq-v68.ll
A llvm/test/CodeGen/Hexagon/hvx-float-setoeq.ll
M llvm/test/CodeGen/Hexagon/inst_setcc_uno_uo.ll
Log Message:
-----------
[Hexagon] Lower fcmp oeq to vcmp_(s|h)f_eq. (#211570)
Before this commit, the following error persisted in the hexagon
backend.
Consider the `file.ll` with the following contents.
```
define <32 x float> @setoeq_v32f32(<32 x float> %a, <32 x float> %b,
<32 x float> %c, <32 x float> %d) {
%cmp = fcmp oeq <32 x float> %a, %b
%r = select <32 x i1> %cmp, <32 x float> %c, <32 x float> %d
ret <32 x float> %r
}
```
Compiling it as `hexagon-llc -march=hexagon
-mattr=+hvxv81,+hvx-length128b file.ll`, we get
```
setoeq_v32f32:
.cfi_startproc
{
q0 = vcmp.eq(v0.w,v1.w)
}
{
v0 = vmux(q0,v2,v3)
jumpr r31
}
.Lfunc_end0:
.size setoeq_v32f32, .Lfunc_end0-setoeq_v32f32
.cfi_endproc
```
It must be noted that the resulting code is using a bitwise comparison
leading to incorrect quiet-NaN behavior. In this patch, we use
vcmp_sf_eq function for the equality check to correctly handle the NaN
comparison behavior.
For Pre-v81, we synthesize oeq(a,b) as NOT(ogt(a,b) OR ogt(b,a) OR
isNaN(a) OR isNaN(b)) using the available float-GT instructions.
Co-authored-by: Kaushik Kulkarni <kauskulk at qti.qualcomm.com>
Co-authored-by: Sergei Larin <slarin at qti.qualcomm.com>
Commit: ca78391cea0b15a1cbb141dd8830a51fb7bee47a
https://github.com/llvm/llvm-project/commit/ca78391cea0b15a1cbb141dd8830a51fb7bee47a
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/test/Analysis/string-search-modeling.c
Log Message:
-----------
Revert "[analyzer] Fix false positive in strchr/strrchr with constant args" (#211857)
Reverts llvm/llvm-project#210154
Broke some build bots.
https://github.com/llvm/llvm-project/pull/210154#issuecomment-5071830822
https://lab.llvm.org/buildbot/#/builders/144/builds/60200
```
# | error: 'expected-error' diagnostics seen but not expected:
# | File /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/Analysis/string-search-modeling.c Line 515: use of undeclared identifier 'u'
# | File /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/Analysis/string-search-modeling.c Line 527: use of undeclared identifier 'u'
# | File /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/Analysis/string-search-modeling.c Line 538: use of undeclared identifier 'U'
# | File /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/Analysis/string-search-modeling.c Line 550: use of undeclared identifier 'u'
# | File /home/buildbot/buildbot-root/llvm-clang-x86_64-sie-ubuntu-fast/llvm-project/clang/test/Analysis/string-search-modeling.c Line 578: use of undeclared identifier 'u'
```
Commit: 03d3c7b0493d45d1a45768f88da9812cdf0ed758
https://github.com/llvm/llvm-project/commit/03d3c7b0493d45d1a45768f88da9812cdf0ed758
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/StringTable.h
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/MC/MCSubtargetInfo.cpp
M llvm/lib/Passes/PassBuilder.cpp
Log Message:
-----------
[ADT] Skip initial empty string in StringTable iterator (#211808)
StringTable requires the first string to be empty, but this is never
useful for users that iterate over all strings in the table. Skip it by
default before drop_begin() on StringTable iteration scatters further
throughout the code base.
Commit: a98d10f58baf3270f1cc611885eaef02214b7ffe
https://github.com/llvm/llvm-project/commit/a98d10f58baf3270f1cc611885eaef02214b7ffe
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
Log Message:
-----------
[LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (#211820)
evaluatePtrAddRecAtMaxBTCWillNotWrap currently bails out when
getPointerDereferenceableBytes reports a size that requires the pointer
to be non-null (as with the dereferenceable_or_null attribute), even
when a stronger dereferenceable assumption is available for the same
pointer.
Reset DerefBytes to 0 in that case so we fall through to
getKnowledgeForValue and pick up any dereferenceable assumption. This
lets early-exit loops guarded by such an assumption vectorize.
Commit: 5337a2abb0b476d219cade1185b22890639ef9b8
https://github.com/llvm/llvm-project/commit/5337a2abb0b476d219cade1185b22890639ef9b8
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/src/string/memory_utils/op_generic.h
M libc/src/string/memory_utils/utils.h
Log Message:
-----------
[libc][memory_utils] Rename shadowed load/store to avoid ADL ambiguity (#211714)
When compiling `inline_memmove` with MSVC for non-x86 architectures, `op_generic.h` picks
a non-builtin type for generic_v128 and friends:
https://github.com/llvm/llvm-project/blob/cad3c95a89c48d714a71f6e8b4af6f3e3ab100ea/libc/src/string/memory_utils/op_generic.h#L54-L57
This causes calls to `load` and `store` to trigger ADL, which is
ambiguous with `load` definition in `memory_utils/utils.h`.
```
C:\Users\jtstogel\Github\llvm-project\libc\src/string/memory_utils/op_generic.h(348): error C2668: '__llvm_libc_24_0_0_git::generic::store': ambiguous call to overloaded function
C:\Users\jtstogel\Github\llvm-project\libc\src/string/memory_utils/op_generic.h(138): note: could be 'void __llvm_libc_24_0_0_git::generic::store<T>(__llvm_libc_24_0_0_git::Ptr,T)'
with
[
T=__llvm_libc_24_0_0_git::inline_memmove_aarch64::uint512_t
]
C:\Users\jtstogel\Github\llvm-project\libc\src/string/memory_utils/utils.h(221): note: or 'void __llvm_libc_24_0_0_git::store<T>(__llvm_libc_24_0_0_git::Ptr,T)' [found using argument-dependent lookup]
with
[
T=__llvm_libc_24_0_0_git::inline_memmove_aarch64::uint512_t
]
C:\Users\jtstogel\Github\llvm-project\libc\src/string/memory_utils/op_generic.h(348): note: while trying to match the argument list '(__llvm_libc_24_0_0_git::Ptr, const T)'
with
[
T=__llvm_libc_24_0_0_git::inline_memmove_aarch64::uint512_t
]
```
Commit: 0e0e0c388ec7894ff22d84e4f1c1c0d2833509a2
https://github.com/llvm/llvm-project/commit/0e0e0c388ec7894ff22d84e4f1c1c0d2833509a2
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/SYCL.cpp
A clang/test/Driver/sycl-rtlib-sysroot-mismatch.cpp
Log Message:
-----------
[clang][Driver][SYCL] Fix SYCLInstallationDetector for compiler installs outside sysroot (#211351)
Currently if the compiler install is not under SYSROOT, we don't try to
compute the relative path to `libLLVMSYCL.so` based on the compiler
binary installation directory, resulting us never setting
`SYCLRTLibPath` so when we try to geenerate a linker call we get a raw
`libLLVMSYCL.so` which fails unless the user happens to be running the
compiler from a directory with `libLLVMSYCL.so` inside it.
It seems we never use the result from SYCLInstallationDetector on
Windows, so I can't add a test, however change the code to be consistent
in case we start to use it in the future.
---------
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: c50d1635fe651c7bcad08405555cf0673dfaa3d0
https://github.com/llvm/llvm-project/commit/c50d1635fe651c7bcad08405555cf0673dfaa3d0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/test/Headers/__clang_hip_cmath-return_types.hip
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/__clang_hip_math_ocml_rounded_ops.hip
M clang/test/Headers/__cpuidex_conflict.c
M clang/test/Headers/gpu-device-functions.cpp
M clang/test/Headers/gpu_disabled_math.cpp
M clang/test/Headers/hip-constexpr-cmath.hip
M clang/test/Headers/hip-header.hip
M clang/test/Headers/opencl-c-header.cl
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (4) (#211839)
Rewrite Headers cc1 test RUN lines to the new subarch triple form,
dropping the redundant -target-cpu, and regenerate autogenerated CHECK
lines.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: aafd116191c66625e75ca8efac0281e7c52e39c5
https://github.com/llvm/llvm-project/commit/aafd116191c66625e75ca8efac0281e7c52e39c5
Author: Justin Cady <desk at justincady.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M compiler-rt/lib/profile/InstrProfiling.c
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/profile/InstrProfilingWriter.c
Log Message:
-----------
[compiler-rt] FreeBSD kernel headers in baremetal libprofile (#211278)
Add conditional FreeBSD kernel headers when building baremetal profile
library. This is unconnected to a CMake target; it requires building
libprofile out of band with `-DCOMPILER_RT_PROFILE_BAREMETAL=1`
and `-I/usr/src/sys/sys`.
The headers replaced in this diff are not available when building for
FreeBSD kernel space. This is the first issue I hit when experimenting
with using the baremetal libprofile like this, so there may be other
changes required as I make progress.
Commit: 11996d6729d34881841dd0dcb3a27c46c26bb05c
https://github.com/llvm/llvm-project/commit/11996d6729d34881841dd0dcb3a27c46c26bb05c
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
A llvm/test/Analysis/HashRecognize/dig-recurrence.ll
Log Message:
-----------
[HashRecognize] Fix compiler hang on dense use-def chain (#211711)
When `digRecurrence` checks the use-def chain for a binary operator, it
simply uses a worklist to check the operands of each instruction. If
there are many instructions, and most instructions have multiple uses,
this takes exponentially long to compute, and can hang the compiler. Use
a visited set to skip instructions that have already been visited in the
use-def chain.
Credit to @freaknbigpanda for discovering this bug.
Commit: 995e2af5351507d2fc627398fc4d03b9a060b105
https://github.com/llvm/llvm-project/commit/995e2af5351507d2fc627398fc4d03b9a060b105
Author: lntue <lntue at google.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/hdr/CMakeLists.txt
A libc/hdr/termios_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/cc_t.h
A libc/hdr/types/speed_t.h
A libc/hdr/types/struct_termios.h
A libc/hdr/types/tcflag_t.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/struct_termios.h
M libc/src/termios/cfgetispeed.h
M libc/src/termios/cfgetospeed.h
M libc/src/termios/cfsetispeed.h
M libc/src/termios/cfsetospeed.h
M libc/src/termios/linux/CMakeLists.txt
M libc/src/termios/linux/cfgetispeed.cpp
M libc/src/termios/linux/cfgetospeed.cpp
M libc/src/termios/linux/cfsetispeed.cpp
M libc/src/termios/linux/cfsetospeed.cpp
M libc/src/termios/linux/kernel_termios.h
A libc/src/termios/linux/speed_utils.h
M libc/src/termios/linux/tcdrain.cpp
M libc/src/termios/linux/tcflow.cpp
M libc/src/termios/linux/tcflush.cpp
M libc/src/termios/linux/tcgetattr.cpp
M libc/src/termios/linux/tcgetsid.cpp
M libc/src/termios/linux/tcsendbreak.cpp
M libc/src/termios/linux/tcsetattr.cpp
M libc/src/termios/tcdrain.h
M libc/src/termios/tcflow.h
M libc/src/termios/tcflush.h
M libc/src/termios/tcgetattr.h
M libc/src/termios/tcgetsid.h
M libc/src/termios/tcsendbreak.h
M libc/src/termios/tcsetattr.h
M libc/test/src/termios/CMakeLists.txt
M libc/test/src/termios/termios_test.cpp
Log Message:
-----------
[libc][termios] Make termios hermetic and fix its compatibility with glibc 2.42 or after. (#211039)
Make termios hermetic and address its compatibility with glibc 2.42
breaking change
with baud rate definitions:
https://inbox.sourceware.org/libc-announce/5906001.DvuYhMxLoT@pinacolada/T/
Fixes include:
- Baud rate translation utilities.
- Add proxy headers for termios.h macros and types.
- Update tests.
Assisted-by: Gemini 3.5 Flash.
Commit: 0db9f599c087cf4d6344223d1a62a81d6308c82a
https://github.com/llvm/llvm-project/commit/0db9f599c087cf4d6344223d1a62a81d6308c82a
Author: Ron Green [NVIDIA] <rogreen at nvidia.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/OpenACC/acc-loop.f90
A flang/test/Semantics/OpenACC/acc-construct-entity-shadow.f90
Log Message:
-----------
[flang][OpenACC] Don't rebind construct entities to enclosing variables (#210775)
`AccAttributeVisitor::Post(Name)` "adjusts" every name referenced inside
an OpenACC region to the symbol found in the current scope. A construct
entity -- a `DO CONCURRENT`/`FORALL` index-name, or a variable declared
in a `BLOCK` construct -- lives in its own scope nested within the
region, but the visitor's current scope does not descend into that
construct scope. `FindSymbol` therefore resolves the name to a
like-named variable in an enclosing scope and rebinds the reference to
it.
When such an entity shadows an enclosing DO variable and the loop is
associated with an OpenACC construct, this makes the entity alias that
active DO variable, so referencing or defining it wrongly triggers
"Cannot redefine DO variable" -- even though the code is legal and
compiles without error when OpenACC is disabled. This affected a `DO
CONCURRENT` index-name as well as a variable declared in a `BLOCK`
construct nested in the loop, e.g.:
```fortran
do i = 1, m
!$acc parallel loop gang vector collapse(2) independent
do concurrent (j = 1:n, ii = 1:m)
block
integer :: i ! shadows the enclosing `do i`
i = ii
a(i,j) = b(i,j)
end block
end do
end do
```
Skip the adjustment when the resolved symbol is owned by a scope
contained in the current scope, i.e. it was declared within the region;
name resolution already bound it correctly. The `DO CONCURRENT`
induction variables are then privatized as their own construct-local
entities rather than the shadowed enclosing variable, as reflected in
the updated `acc-loop.f90` lowering test.
Add a Semantics regression test covering the `DO CONCURRENT` and `BLOCK`
cases.
Commit: 20bf56436bbf50323a3f639cc6261f45a9b48ba0
https://github.com/llvm/llvm-project/commit/20bf56436bbf50323a3f639cc6261f45a9b48ba0
Author: mleair <leairmark at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/submodule-async-volatile.f90
M flang/test/Semantics/misc-declarations.f90
M flang/test/Semantics/symbol05.f90
Log Message:
-----------
[flang] Fix host association for ASYNCHRONOUS/VOLATILE in submodules (#211669)
In `HandleAttributeStmt`, when an `ASYNCHRONOUS` or `VOLATILE` statement
names a variable not already in the current scope, flang creates a
host-association symbol — but only for `Subprogram` and `BlockConstruct`
scopes. Submodule scopes have kind `Module`, so the check excluded them.
This caused a fresh `EntityDetails` symbol (zero-initialized) to be
created instead of a `HostAssocDetails` symbol pointing at the ancestor
module variable, producing value 0 instead of the initialized value.
Fix: extend the condition to also fire when `currScope().IsSubmodule()`.
`Scope::FindSymbol` already traverses into the parent module for
submodules, so the host variable is found correctly.
Note: the `volatile`/`asynchronous` `fortran_attrs` are not propagated
to `hlfir.declare` for host-associated variables in general
(subprograms,
BLOCK constructs, and submodules); that is a separate lowering issue
tracked in #208588.
Fixes #208362
Assisted-By: AI
Commit: b669674e0d05ba4b6a8cc1e7a56771a0dfa16628
https://github.com/llvm/llvm-project/commit/b669674e0d05ba4b6a8cc1e7a56771a0dfa16628
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang] Add missing std includes (#211830)
Addressing post-commit review comments for
https://github.com/llvm/llvm-project/pull/211326.
Commit: b71410f77075783badb0b4546bda6e769e32f979
https://github.com/llvm/llvm-project/commit/b71410f77075783badb0b4546bda6e769e32f979
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
A clang/test/CIR/CodeGenCUDA/builtins-nvvm-ldu.cu
Log Message:
-----------
[CIR][CUDA] Add support for NVVM ldu builtins (#211843)
Adds CIR codegen support for the NVVM global uniform load builtins
`nvvm_ldu_*` ,including the integer, floating-point, and vector
variants.
These are lowered to the corresponding `llvm.nvvm.ldu.global.*`
intrinsics based on the pointee type.
Commit: befa7e23a53f76dfd791b18175b744115affe627
https://github.com/llvm/llvm-project/commit/befa7e23a53f76dfd791b18175b744115affe627
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Handle ISD::POISON in fp16SrcZerosHighBits and isCanonicalized (#211831)
Commit: 91953462055632b16218cb13e463b0a24f2abf94
https://github.com/llvm/llvm-project/commit/91953462055632b16218cb13e463b0a24f2abf94
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/MC/AMDGPU/amdgcn-target-directive-subarch-cpu-field.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
AMDGPU: Validate processor is consistent with subarch in TargetID parsing (#211828)
TargetID::parse checked that a named processor was a recognized GPU, but
not that it was consistent with the triple's subarch. A target id like
"amdgpu9.00-amd-amdhsa--gfx803" was accepted even though gfx803 does not
belong to the amdgpu9.00 subarch, silently taking the processor and
ignoring the mismatched subarch.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: ea1728a13303f76c4a26d60bc9451f440bcdbd0d
https://github.com/llvm/llvm-project/commit/ea1728a13303f76c4a26d60bc9451f440bcdbd0d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
A lldb/test/Shell/ObjectFile/wasm/wasm-formatter-sections.yaml
Log Message:
-----------
[lldb] Classify embedded formatter sections in WebAssembly objects (#211704)
A `section` attribute on a data variable is placed in a named data
segment on WebAssembly rather than a top-level custom section, so the
.lldbformatters and .lldbsummaries segments that carry embedded data
formatters were classified as plain data. The data-formatter loader
looks these up by section type, so embedded summaries and synthetic
child providers were never registered for a Wasm module.
Map the two formatter segment names to their section types when creating
sections, and place the segments in linear memory like other data so
their contents resolve. This mirrors the ELF and Mach-O object file
plugins.
Assisted-by: Claude
Commit: 6edec6dcbbba32f76c1fe32b4ec2994983551cbd
https://github.com/llvm/llvm-project/commit/6edec6dcbbba32f76c1fe32b4ec2994983551cbd
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-live-outs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-trunc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
A llvm/test/Transforms/LoopVectorize/VPlan/derivediv-wrapflags.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-hoist-load-across-store.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-sink-store-across-load.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/create-induction-resume.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-interleave.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/induction-unroll-novec.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/multiple-argmin-argmax.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-small-bounded-ranges.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/select-reduction-start-value-may-be-undef-or-poison.ll
M llvm/test/Transforms/LoopVectorize/select-smin-first-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/interleave_vec.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/interleavevectorization.ll
Log Message:
-----------
[VPlan] Endow DerivedIV with IRFlags (#205908)
Endow DerivedIV with no-wrap flags that are used in all adds and muls:
the FP induction can still get the FastMathFlags from the FPBinOp. The
patch changes vputils::createScalarIVSteps where no-wrap flags are
applicable. GEP no-wrap flags are missing nearly everywhere, and is left
to an exercise for a follow-up.
Proof: https://alive2.llvm.org/ce/z/rHtwEH +
https://alive2.llvm.org/ce/z/h297HG for a larger UF on one test
Commit: 15bb4a97a798ed43b3966c99d37585651b965e5e
https://github.com/llvm/llvm-project/commit/15bb4a97a798ed43b3966c99d37585651b965e5e
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/CodeGen/TargetInfo.cpp
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Function.h
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/is_fpclass.ll
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-fmuladd.ll
M llvm/test/Transforms/EarlyCSE/replace-calls-def-attrs.ll
M llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fdim.ll
M llvm/test/Transforms/InstSimplify/disable_folding.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad.ll
M llvm/unittests/IR/VerifierTest.cpp
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[IR] Make semantics of strictfp consistent v2 (#211769)
Changes: The patch was originally landed as af0c933e (#209465), but
there was an issue with strictfp functions being inlined into
non-strictfp functions. The issue has since been resolved by a2b42b10a
([IR] Reject inlining strictfp alwaysinline callee into non-strictfp
caller, #210701) and the re-land is identical.
Although the section on constrainedfp in the LangRef clearly states "All
function definitions that use constrained floating point intrinsics must
have the strictfp attribute", indicating that a function with strictfp
calls must be marked with strictfp, the general description of strictfp
does not specify this. Refine its semantics and make it so, eliminating
the inconsistency.
Commit: e200ea609b9292ab7bfe5c0eb67a6e4cea5677cc
https://github.com/llvm/llvm-project/commit/e200ea609b9292ab7bfe5c0eb67a6e4cea5677cc
Author: ivanrodriguez3753 <48269053+ivanrodriguez3753 at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
A flang/test/Semantics/declaration-assumed-array-bounds.f90
Log Message:
-----------
[flang][semantic] parser node types and rewrite for assumed-shape-bounds-spec (#211690)
Commit: de4b1f5572f8ff5a38a17655584ae200774551c6
https://github.com/llvm/llvm-project/commit/de4b1f5572f8ff5a38a17655584ae200774551c6
Author: Osama Abdelkader <osama.abdelkader at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/test/SemaCXX/auto-cxx0x.cpp
Log Message:
-----------
[Clang] Avoid querying tag definitions for invalid DeclSpecs (#210085)
Guard hasTagDefinition() against invalid type-specifier state so
recovery from invalid auto/tag combinations does not assert.
Fixes #210014
---------
Signed-off-by: Osama Abdelkader <osama.abdelkader at gmail.com>
Commit: 8231fda982ba419bc8ac05a45ec752e00218db8b
https://github.com/llvm/llvm-project/commit/8231fda982ba419bc8ac05a45ec752e00218db8b
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/include/lldb/Utility/FileSpec.h
M lldb/source/API/SBBroadcaster.cpp
M lldb/source/API/SBCommunication.cpp
M lldb/source/API/SBData.cpp
M lldb/source/API/SBFileSpec.cpp
M lldb/source/API/SBLaunchInfo.cpp
M lldb/source/API/SBProcessInfo.cpp
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/API/SBStream.cpp
M lldb/source/API/SBStringList.cpp
M lldb/source/Plugins/ObjectContainer/Big-Archive/ObjectContainerBigArchive.h
M lldb/source/Target/Statistics.cpp
M lldb/source/Utility/FileSpec.cpp
M lldb/unittests/tools/lldb-server/tests/MessageObjects.cpp
Log Message:
-----------
[lldb] Remove ConstString from FileSpec (#211394)
This commit completely removes ConstString from FileSpec, replacing it
with llvm::SmallString instead.
I considered combining the directory and the filename together into one
field, but then it became impossible to distinguish between a
partially-constructed FileSpec's last directory and a fully-constructed
FileSpec's filename.
The sizes of the SmallStrings are somewhat arbitrary. I tested out a few
other configurations on my machine locally and this yielded the best
memory/runtime tradeoffs.
I measured the impact of this change in two ways:
(1) Runtime performance
I measured the runtime impact by using LLDB's statistics with `stat
enable` and `stat dump -f` (forcing the parsing of symbols) for a debug
build of Clang. The debug clang was compiling a small C++ file.
Before: totalSymbolTableParseTime=1.4979959999999999
After: totalSymbolTableParseTime=1.1327570000000002
(2) Memory footprint/allocations
I used Instruments on macOS to measure this the same workload as above.
Footprint
Before: Total/Persistent: 3.78GiB / 1.14 GiB
After: Total/Persistent: 3.67GiB / 1.08 GiB
Num. Allocations
Before: Total/Persistent: 5,706,146 / 1,283,623
After: Total/Persistent: 5,710,023 / 1,284,083
Commit: eedb658af3cc1598e1a6e3a41ceb7100f84c6797
https://github.com/llvm/llvm-project/commit/eedb658af3cc1598e1a6e3a41ceb7100f84c6797
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-latch-counted.ll
M llvm/test/Transforms/ConstraintElimination/loops-bottom-tested-pointer-cmps.ll
Log Message:
-----------
[ConstraintElim] use condition from latch in addInfoForInductions. (#210984)
Also use condition in latch to inject %iv <= %B and co into the header,
if the latch condition compares a post-inc IV like %iv + %step != %B.
This allows reasoning about loops that have been rotated before
ConstraintElimination, e.g. during the LTO phase or Swift where the
frontend already rotates loops before generating LLVM IR.
Alive2 Proof for injecting %iv <= B from %iv + %step != %B in latch:
https://alive2.llvm.org/ce/z/pH8Czb
This enables a number of additional simplifications in practice
(https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/736).
It comes with a compile-time impact when doing LTO, as all loops will be
rotated
and will hit the new code path.
* stage1-ReleaseThinLTO: +0.08%
* stage1-ReleaseLTO-g: +0.06%
https://llvm-compile-time-tracker.com/compare.php?from=697e904cbd93033d61dd95c4868a137a87e7d0f9&to=396e9eb79147231dd615edc65bd6bdac115325c1&stat=instructions:u
But together with the recent improvement to the solver
(https://github.com/llvm/llvm-project/pull/210432), we are still
0.09%/0.12% faster than previously.
PR: https://github.com/llvm/llvm-project/pull/210984
Commit: 044a1d9743a1484ef8b8282454a4fa61dfbc2b44
https://github.com/llvm/llvm-project/commit/044a1d9743a1484ef8b8282454a4fa61dfbc2b44
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
A lldb/test/Shell/SymbolFile/DWARF/wasm-declaration-mangled-name.yaml
Log Message:
-----------
[lldb] Recover a WebAssembly function's mangled name from its declaration (#211707)
The Wasm "name" section stores only demangled names, so SymbolFileWasm
recovers each function's mangled name from the DWARF and attaches it to
the code symbol.
Currently, it only does so from a defining DIE, matched by address. When
we only have a declaration DIE (e.g. TU compiled without debug info), it
still carries the linkage name, but wouldn't get associated without the
address.
Match a declaration-only DIE to its code symbol by the demangled name
that the name section already carries, and attach the linkage name that
way.
Assisted-by: Claude
Commit: 75a1d31c69c98eeb236d8bf954d709b271fcb55a
https://github.com/llvm/llvm-project/commit/75a1d31c69c98eeb236d8bf954d709b271fcb55a
Author: Guo Chen <guochen2 at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/build_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-vector-shuffle.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fpext.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/vector_rebroadcast.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
Log Message:
-----------
[AMDGPU] revert srl pattern for true16 mode (#208136)
revert https://github.com/llvm/llvm-project/pull/132987.
Revert this patch since it create side effects when register coalescer
join large number of imm `copy`. This patch is on top of
https://github.com/llvm/llvm-project/pull/208045 and share the root
cause
Commit: 3b87272648f483c6b0763b44e8cb4b470283b7d5
https://github.com/llvm/llvm-project/commit/3b87272648f483c6b0763b44e8cb4b470283b7d5
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCAsmInfoXCOFF.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
Log Message:
-----------
[MC][NFC] Remove some virtual function from MCAsmInfo (#211858)
The MCAsmInfo vtable is currently 144B (no anchor)/152B (anchor) large
-- and there are 49 of these in an all-target libLLVM.so. Some of these
are not needed or can be easily removed. This removes 5 vtable entries.
Some notes on the remaining functions -- I think this vtable can be
removed entirely without too much effort:
- getStackSection can also be removed, this is ELF-only; unfortunately
this will require code duplication between AsmPrinter and
MCELFStreamer.
- getExprForPersonalitySymbol is single-use and two-overrides (Darwin on
x86-64, AArch64), likely removable.
- shouldOmitSectionDirective has three override modes -- COFF (disallow
for COMDAT/unique section), AMDGPU (4 .hsa sections), and always-omit
(NVPTX, SPIRV). This is only called from printSwitchToSection, so COFF
is no problem, always-omit needs a flag, leaving AMDGPU.
- useCodeAlign can probably be replaced by Sec.isText(), although not
NFC (e.g. Darwin non-pure instructions).
- getMaxInstLength is AMDGPU-only and only used in the disassembler and
for estimating inline assembly size. The code can likely be moved to
the disassembler, but doing so is not NFC w.r.t. inlineasm.
- setUseIntegratedAssembler is ARM-only and only used to workaround a
binutils bug that was fixed in 2014. Likely removable, but not NFC.
- printSwitchToSection is inherently file-format specific. Maybe replace
with a raw function pointer taking MCAsmInfo as parameter?
- printSpecifierExpr likewise.
- evaluateAsRelocatableImpl likewise.
- ~MCAsmInfo -- I don't think any subclass has additional members, but I
haven't checked in detail.
Commit: b6c6666b215a35eed4aff58066f6cc462bd26c49
https://github.com/llvm/llvm-project/commit/b6c6666b215a35eed4aff58066f6cc462bd26c49
Author: aryanmagoon <70676027+aryanmagoon at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
A llvm/test/CodeGen/NVPTX/global-cycle-alias.ll
A llvm/test/CodeGen/NVPTX/global-cycle-internal-subcycle.ll
A llvm/test/CodeGen/NVPTX/global-cycle-internal.ll
A llvm/test/CodeGen/NVPTX/global-cycle.ll
M llvm/test/CodeGen/NVPTX/global-ordering.ll
M llvm/test/CodeGen/NVPTX/managed.ll
A llvm/test/CodeGen/NVPTX/packed-aggr-self-ptx70.ll
M llvm/test/CodeGen/NVPTX/packed-aggr.ll
Log Message:
-----------
[NVPTXAsmPrinter] Allow self-referential device global initializers (#197838)
This change adds support for cyclic device global initializers in NVPTX,
including self-references and references between distinct globals. The
backend’s global-emission ordering walk previously treated every cycle
as an error and aborted with “Circular dependency found in global
variable set.” As a result, valid patterns such as __device__ void
*arr[] = {(void *)"foo", &arr[0]}; were rejected. The NVPTX asm printer
now models initializer dependencies as a graph and emits its strongly
connected components in dependency-first order. Acyclic components are
emitted normally. For cyclic components, it first emits compatible PTX
.extern declarations and then emits the definitions in a valid order.
Cycles that cannot be represented this way, such as cycles containing
only static globals, are still rejected. The forward declarations reuse
the normal definition emitter so their address spaces, alignments,
types, and aggregate layouts match the definitions. Added new tests to
cover self-references, cycles between distinct globals, mixed linkage,
packed aggregates, dependency ordering, and unrepresentable static-only
cycles.
Commit: 43dbc636d12c3f135059ba555023e6881455df5d
https://github.com/llvm/llvm-project/commit/43dbc636d12c3f135059ba555023e6881455df5d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
AMDGPU: Reject unrecognized amdgpu subarch in TargetID parsing (#211866)
A bare "amdgpu" or an unrecognized "amdgpu<x>" both parse to the
amdgpu arch with no subarch; TargetID::parse previously accepted them,
taking a named processor and ignoring the missing subarch.
Reject triples with no subarch, unless it uses the legacy spelling.
This is another workaround for Triple not having a proper unknown value
for subarches.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 982688d57f285a5f26ace856375571d8f5c77bab
https://github.com/llvm/llvm-project/commit/982688d57f285a5f26ace856375571d8f5c77bab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/test/OpenMP/amdgcn_ldbl_check.cpp
M clang/test/OpenMP/amdgpu_threadprivate.cpp
M clang/test/OpenMP/dims_modifier_messages.cpp
M clang/test/OpenMP/metadirective_device_arch_codegen.cpp
M clang/test/OpenMP/metadirective_device_isa_codegen_amdgcn.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/openmp-read-only-feature.c
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (5) (#211840)
Rewrite OpenMP cc1 test RUN lines to the new subarch triple form,
dropping the redundant -target-cpu, and regenerate autogenerated CHECK
lines. Tests that intentionally assert the "target-cpu" attribute are
left unchanged.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 86769296941811360d7126e41e3b13cbabab55ae
https://github.com/llvm/llvm-project/commit/86769296941811360d7126e41e3b13cbabab55ae
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
A .github/workflows/libcxx-pr-test-tools.yml
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++][CI] Add a Github workflow to test libc++ tools (#211067)
We have a few scripts under libcxx/utils, and they wouldn't be tested on
a regular basis. As a result, changes to e.g. the build system could
break these scripts, which in turn could break some Github workflows
like the libc++ PR benchmarking workflow.
This patch adds a new `test-tools` configuration to `run-buildbot` which
allows testing these tools locally, and a new dedicated Github workflow
to run it.
Commit: ba61615b653c4f59b3cd3d721291f0b6009b0b51
https://github.com/llvm/llvm-project/commit/ba61615b653c4f59b3cd3d721291f0b6009b0b51
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M .ci/metrics/metrics.py
M .ci/metrics/metrics_test.py
M .github/workflows/libcxx-benchmark-commit.yml
R .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
R .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-pr-benchmark.yml
A .github/workflows/libcxx-pr-check-generated-files.yml
A .github/workflows/libcxx-pr-conformance-tests.yaml
M README.md
M libcxx/docs/Contributing.rst
M libcxx/docs/index.rst
Log Message:
-----------
[libc++] Rename pre-commit CI workflows (#211844)
Since we're expanding libc++'s pre-commit CI to add other types of
tests, (e.g. tools tests, performance tests, etc), it makes sense to be
a bit more precise about what each workflow does, and to use a
consistent pattern across workflow names.
Also, update stale references to old names in the documentation and in
some infrastructure scripts.
Commit: e949b654424beda81ab4db154a72b904c8b32245
https://github.com/llvm/llvm-project/commit/e949b654424beda81ab4db154a72b904c8b32245
Author: Pranav Bhandarkar <pranav.bhandarkar at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-copy-region.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-pointer.mlir
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
Log Message:
-----------
[flang][OpenMP] Fix alias analysis for omp.private copy region block arguments to help inline hlfir.assign to improve time taken in LTO. (#209539)
## Summary
This PR fixes https://github.com/llvm/llvm-project/issues/200922 - a
compile-time regression affecting firstprivate clauses on simple arrays
in OpenMP target regions.
When `InlineHLFIRAssign` checks whether to inline `hlfir.assign`
operations in `omp.private` copy regions, the alias analysis
conservatively returns `MayAlias` for the copy region block arguments
(`%arg0` mold vs `%arg1` private). This prevents inlining and forces a
fallback to `fir.call @_FortranAAssign`, which:
- Pulls in 89 runtime functions via LTO
- Creates 550K+ abstract attributes in OpenMPOpt
- Causes severe compile-time degradation (60%+ increase in some cases)
**Example:**
```fortran
!$omp target firstprivate(array)
! ... use array ...
!$omp end target
```
The firstprivate copy generates an `omp.private` copy region where the
assignment from the original array to the private copy cannot be inlined
due to conservative aliasing assumptions.
## Root Cause and Solution
The FIR alias analysis did not recognize that `omp.private` copy region
block arguments are guaranteed by the OpenMP specification to reference
different memory locations:
- `%arg0` (mold) - the original variable
- `%arg1` (private) - freshly allocated private storage created in the
init region
Since the private copy is allocated fresh, these arguments **cannot
alias**.
So, this PR adds special-case handling in
`flang/lib/Optimizer/Analysis/AliasAnalysis.cpp` to recognize
`omp.private` copy region block arguments and correctly return
`NoAlias`. This allows `InlineHLFIRAssign` to inline the assignment into
an element-wise loop, avoiding the expensive runtime call entirely.
Assisted by: Claude Sonnet
---------
Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
Commit: 8a6a039eb31f33749cfe251a5985b335e9a09681
https://github.com/llvm/llvm-project/commit/8a6a039eb31f33749cfe251a5985b335e9a09681
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[mlir][xegpu] Allow create_mem_desc from ND memref (#211836)
Relax the create_mem_desc source operand constraint to accept a
statically shaped shared-memory memref of any rank, replacing the
1D/2D-only StaticShared{1,2}DMemRefOf classes with a rank-agnostic
StaticSharedMemRefOf.
Add a verifier requiring the source memref to be contiguous row-major,
update the op documentation, and add valid/invalid lit tests.
assisted-by-claude
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: 0f7854f4a3f2000ab11d5c5f153eaef05442e263
https://github.com/llvm/llvm-project/commit/0f7854f4a3f2000ab11d5c5f153eaef05442e263
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/test/Preprocessor/init-fuchsia.c
Log Message:
-----------
[clang][Fuchsia] Add __Fuchsia_Compiler_ABI__ predefine (#211744)
This establishes a new canonical predefine for *-fuchsia targets:
`__Fuchsia_Compiler_ABI__` is set to an integer for the version
number of the Fuchsia Compiler ABI the compiler supports. The
value will change as appropriate with changes to *-fuchsia target
ABI expectations. It is not anticipated that the compiler will
support selecting target ABI versions, only the latest as the
canonical target-specific behavior. Fuchsia Compiler ABI
versions are unrelated to the Fuchsia API levels supported by
Fuchsia systems; newly-built programs may target older API levels
with `-ffuchsia-api-level`, but everything relying on the Fuchsia
Compiler ABI is built and deployed together as an isolated unit.
Commit: 45ccbd4eb6c0411b5edaf8df425c71816e76aa70
https://github.com/llvm/llvm-project/commit/45ccbd4eb6c0411b5edaf8df425c71816e76aa70
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
Log Message:
-----------
AMDGPU: Don't pack a build_vector with an undef/poison lane (#211871)
Once ISD::POISON is legal it reaches isel and is treated as canonical, so
is_canonicalized_2<build_vector> matched build_vector<x, poison> and
selected a v_pack for a don't-care high lane. Avoids regressions in future
patches.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 5b741ef515c010bebefb648fb030cbcc5d5ae744
https://github.com/llvm/llvm-project/commit/5b741ef515c010bebefb648fb030cbcc5d5ae744
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
Log Message:
-----------
AMDGPU: Avoid dropping poison when extracting a high element (#211872)
Haven't found a case where this matters, but I want to stop finding
this instance of the is-undef-get-undef pattern.
Commit: fca20bc99b4107cc5e766fcdbe01f5dd02e6db57
https://github.com/llvm/llvm-project/commit/fca20bc99b4107cc5e766fcdbe01f5dd02e6db57
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 8a6a039 (#211892)
This fixes 8a6a039eb31f33749cfe251a5985b335e9a09681 (#211836).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=8a6a039eb31f33749cfe251a5985b335e9a09681
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 8e76c3f0d29a713c41f1b3d0f19d965a504481cf
https://github.com/llvm/llvm-project/commit/8e76c3f0d29a713c41f1b3d0f19d965a504481cf
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Analysis/LoopAccessAnalysis/runtime-check-known-true.ll
M llvm/test/Analysis/ScalarEvolution/add-expr-pointer-operand-sorting.ll
M llvm/test/Analysis/ScalarEvolution/alloca.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
M llvm/test/Analysis/ScalarEvolution/flags-from-poison.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/ne-guard-multiple-trip-count.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll
M llvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
M llvm/test/Analysis/ScalarEvolution/nsw.ll
M llvm/test/Analysis/ScalarEvolution/pointer-rounding.ll
M llvm/test/Analysis/ScalarEvolution/pr46786.ll
M llvm/test/Analysis/ScalarEvolution/predicated-max-backedge-taken-count-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/ptrtoint-constantexpr-loop.ll
M llvm/test/Analysis/ScalarEvolution/ptrtoint-global.ll
M llvm/test/Analysis/ScalarEvolution/ptrtoint-special-pointers.ll
M llvm/test/Analysis/ScalarEvolution/ptrtoint.ll
M llvm/test/Analysis/ScalarEvolution/trip-multiple-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/two-loop-latches.ll
M llvm/test/CodeGen/AArch64/ragreedy-csr.ll
M llvm/test/CodeGen/Thumb2/mve-tailpred-loopinvariant.ll
M llvm/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll
M llvm/test/Transforms/IndVarSimplify/AArch64/ptrtoaddr-ptrtoint.ll
M llvm/test/Transforms/IndVarSimplify/X86/ptrtoaddr-narrow-pointer.ll
M llvm/test/Transforms/IndVarSimplify/callbr.ll
M llvm/test/Transforms/IndVarSimplify/pointer-loop-guards.ll
M llvm/test/Transforms/IndVarSimplify/pr59633.ll
M llvm/test/Transforms/LoopIdiom/memset-debugify-remarks.ll
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/expand-ptrtoaddr-reuse-ptrtoint.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution-dbg-msg.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/expander-crashes.ll
M llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling-multi-exit.ll
M llvm/test/Transforms/LoopUnroll/AArch64/unrolling-multi-exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aggressive-interleaving.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-incomplete-chains.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr41179.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions-tail-folded.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/induction-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-opaque-pointers.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-any-of-reductions.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/hoist-and-sink-mem-ops-with-invariant-pointers.ll
M llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-known-true.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-needed-but-empty.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/loop-rotate-to-enable-unrolling-and-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/ptrtoaddr-ptrtoint.ll
M llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
M llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M polly/test/ScopInfo/int2ptr_ptr2int.ll
M polly/test/ScopInfo/int2ptr_ptr2int_2.ll
Log Message:
-----------
[SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (#180244)
Use SCEVPtrToAddr instead of SCEVPtrToInt for pointer -> int
conversion in SCEV, like when computing trip count expressions.
getPtrToIntExpr now also creates SCEVPtrToAddrExpr.
Removal of SCEVPtrToIntExpr out of this PR, to limit the scope and
will be done as NFC follow-up.
PR: https://github.com/llvm/llvm-project/pull/180244
Commit: f0be938ce6df68f2fec85edb6aa74438b0d3f25c
https://github.com/llvm/llvm-project/commit/f0be938ce6df68f2fec85edb6aa74438b0d3f25c
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/unittests/Target/AMDGPU/CMakeLists.txt
A llvm/unittests/Target/AMDGPU/InstSizes.cpp
Log Message:
-----------
[AMDGPU] Fix instruction size of LDS-DMA buffer loads (#211302)
Mark i1imm_0 as OPERAND_IMMEDIATE type, so its packed 1-bit value is not
mistaken for a trailing literal (same for InstFlag).
Applies to the swz/IsAsync fields of buffer (MUBUF) and FLAT LDS-DMA
instructions.
Changes estimated size for the corresponding instructions; codegen stays
untouched.
Add unit test, checking encoded size is 8 bytes (was: 12).
AI-assisted.
Commit: f61e1fac80cfda6af7ef615a0eb84d58d3c56105
https://github.com/llvm/llvm-project/commit/f61e1fac80cfda6af7ef615a0eb84d58d3c56105
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ModuloSchedule.h
M llvm/lib/CodeGen/ModuloSchedule.cpp
A llvm/test/CodeGen/Hexagon/swp-epilog-carry.ll
A llvm/test/CodeGen/Hexagon/swp-epilog-phi12.mir
Log Message:
-----------
[Pipeliner] Use VRMapPhi to generate phi in epilog (#211723)
When generating a phi in the epilog block corresponding to an existing
phi in the loop, the loop value should come from the new phi generated
in the kernel block (for a non-phi instruction in the loop) rather than
directly from the value map of the previous stage.
The new phis generated by generatePhis for non-phi instructions are
stored in VRMapPhi. Thread VRMapPhi through generateExistingPhis and add
a helper getMapPhiReg that returns the phi-generated register when
available, falling back to VRMap otherwise.
Without this fix, the epilog can pick up the initial prolog value of a
loop-carried register instead of the last kernel-iteration value,
producing incorrect results for pipelined loops with two or more stages
that carry values across iterations. This has been observed on Hexagon
with the modulo scheduled epilog of a right-shift-with-carry loop after
loop unrolling.
Fixes #208943
Commit: 9d7095fb7897abbc71e4a708b54a6381b07e7d2e
https://github.com/llvm/llvm-project/commit/9d7095fb7897abbc71e4a708b54a6381b07e7d2e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang-rt/lib/cuda/registration.cpp
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/CUDA/registration.h
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-unified-module-global.f90
Log Message:
-----------
[flang][cuda] Use cuf.register_variable_static instead of CUFRegisterExternalVariable (#211886)
This gives more flexibility to the backend to select a different
registration mechanism
Commit: 3e584cc4de0492dd1460b9734621d569efb6b9f7
https://github.com/llvm/llvm-project/commit/3e584cc4de0492dd1460b9734621d569efb6b9f7
Author: Pranav Bhandarkar <pranav.bhandarkar at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang-rt/lib/runtime/tools.cpp
Log Message:
-----------
[flang-rt] - Reduce ShallowCopy template instantiations to improve LTO time (#209915)
Limit `ShallowCopy` rank specializations from 1-15 to 1-4, using a
generic fallback for higher ranks. This significantly reduces code size
and LTO compile time when the Fortran runtime is linked into GPU
offloading code.
Before: 15 ranks × 7 types × 3 scenarios = 315 template instantiations
After: 4 ranks × 7 types × 3 scenarios = 84 template instantiations +
fallbacks
Trade-off: Arrays with rank > 4 use a generic runtime loop instead of
compile-time specialized iteration. This is acceptable because:
- Most real-world Fortran arrays are rank 1-3
- Rank 5-15 arrays are rare in practice
- The generic loop is still efficient (just not unrollable)
## Results
### Compilation Time (from `time` command)
| Metric | Baseline (main) | Improvement | Delta |
|--------|----------------|-------------|-------|
| Wall clock time | ~27.6s | ~22.1s | **-5.5s (-20%)** |
### LTO Pass Timing (from `-mllvm -time-passes`)
| Pass | Baseline (main) | Improvement | Delta |
|------|----------------|-------------|-------|
| **Total LTO** | 27.64s | 22.10s | **-5.54s (-20.0%)** |
| OpenMPOptPass | 8.77s (31.7%) | 6.65s (30.1%) | **-2.12s (-24.2%)** |
| OpenMPOptCGSCCPass | 2.32s (8.4%) | 1.99s (9.0%) | **-0.33s (-14.2%)**
|
| **Combined OpenMPOpt** | **11.09s** | **8.64s** | **-2.45s (-22.1%)**
|
### Attributor Statistics (from `-mllvm -stats`)
| Metric | Baseline (main) | Improvement | Delta |
|--------|----------------|-------------|-------|
| Abstract Attributes Created | 1,119,860 | 813,947 | **-305,913
(-27.3%)** |
| Abstract Attributes in Valid Fixpoint | 491,995 | 359,149 | **-132,846
(-27.0%)** |
| Dead Basic Blocks Deleted | 6,522 | 2,168 | -4,354 (-66.8%) |
This is the first part of a multi-part fix for
https://github.com/llvm/llvm-project/issues/203915
Assisted by Claude.
---------
Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
Commit: 0c98cadcc9a2f370fe2d074dfea556bf0b4a61ac
https://github.com/llvm/llvm-project/commit/0c98cadcc9a2f370fe2d074dfea556bf0b4a61ac
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/IPO/InstrumentorUtils.cpp
A llvm/test/Instrumentation/Instrumentor/test_filter_flags.ll
A llvm/test/Instrumentation/Instrumentor/test_filter_flags_config.json
A llvm/test/Instrumentation/Instrumentor/test_filter_not_error.ll
A llvm/test/Instrumentation/Instrumentor/test_filter_not_error_config.json
Log Message:
-----------
[Instrumentor] Improve filtering for flag values (#206667)
This pull request modifies the instrumentor's filter expression parser.
It introduces the logical not operator (`!`), flag property access (e.g.
`flags.nuw`), and binary literals.
Commit: 4669e217488dc5bcb2b68f30dd57f845ee6baa71
https://github.com/llvm/llvm-project/commit/4669e217488dc5bcb2b68f30dd57f845ee6baa71
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/atomic.ll
M llvm/test/Assembler/invalid-atomicrmw-elementwise.ll
M llvm/test/Assembler/invalid-load-store-atomic-elementwise.ll
M llvm/test/Bitcode/atomic-load-store-elementwise.ll
M llvm/test/Bitcode/atomicrmw-elementwise.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (#209931)
This is a follow-up on the discussion here:
https://github.com/llvm/llvm-project/pull/204329
The problem with specifying `seq_cst` on `elementwise `atomics is that
the LangRef states:
> there is a global total order on all sequentially-consistent
operations on all addresses.
But the individual accesses of `elementwise` `seq_cst` atomics are not
consistent, which contradicts this. I think we could refine this in the
future, but start off by saying `seq_cst` is not permitted.
I think my clarification of the LangRef makes the following example
clearer:
```
// thread 0
store non-atomic [x]
store elementwise atomic release [flag0, flag1] , <1, 1> // writes one to each flag
// thread1
load atomic acquire flag0 == 1
load non-atomic [flag1]
```
there is no execution in which loading from `flag1` in the end is NOT a
data race because there is no consistent ordering of the stores of
`flag0` and `flag1` and therefore acquiring `flag0` does not give us any
information on `flag1`.
My understanding is that in the formal spec working group (which I
should probably attend) people were unsure about allowing
`acquire`/`release`/`acq_rel` on `elementwise`.
This refinement makes the specification of these orderings more formalized.
Commit: 0bd97165f72d0a6a03c3c7cb87af602edab9eb5a
https://github.com/llvm/llvm-project/commit/0bd97165f72d0a6a03c3c7cb87af602edab9eb5a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-modifiers.h
Log Message:
-----------
[flang][OpenMP] Use llvm::omp::ClauseSet in modifier verification (#211900)
It's a trivial type substitution.
Commit: d3f58f9efd3e91824bc496e6fac80bad6d0db8f2
https://github.com/llvm/llvm-project/commit/d3f58f9efd3e91824bc496e6fac80bad6d0db8f2
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
A llvm/test/DebugInfo/WebAssembly/dbg-fbreg-global-frame-base.ll
Log Message:
-----------
[DebugInfo][WebAssembly] Anchor stack locals to the frame base (#211826)
WebAssembly's stack pointer is not a register that can be described in
DWARF. When a function has no virtual frame base, because its stack
pointer is never explicitly referenced (e.g. a function whose only local
is dead), the frame base falls back to the __stack_pointer global and
the frame register is the physical SP.
addMachineReg failed for that register, so addMachineRegExpression
dropped the base and the caller emitted the frame offset with nothing
under it: a bare DW_OP_plus_uconst that underflows the DWARF stack when
the location is evaluated.
```
DW_AT_frame_base (DW_OP_WASM_location 0x3 0x0, DW_OP_stack_value)
DW_AT_location (DW_OP_plus_uconst 0xc) ;; before
DW_AT_location (DW_OP_fbreg +12) ;; after
```
A frame-relative location does not need the frame register to be
describable on its own, since it is anchored through DW_AT_frame_base
and DW_OP_fbreg. Take the same path already used for a virtual frame
register so a physical one without a DWARF number is handled too.
Assisted-by: Claude
PS: I also updated the frame-base fallback comment in
WebAssemblyFrameLowering: reads now work at the innermost frame, and the
remaining limitation is that the __stack_pointer global does not
describe outer frames.
Commit: 5d341df8a377d6acab922b9e4525ccd58d50cc7a
https://github.com/llvm/llvm-project/commit/5d341df8a377d6acab922b9e4525ccd58d50cc7a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
A llvm/test/Transforms/CorrelatedValuePropagation/range-single-user.ll
Log Message:
-----------
[CVP] Add tests for single-user result refinement. (NFC) (#211901)
Extra tests for https://github.com/llvm/llvm-project/pull/211668.
Commit: 2ac96dbb3a08baf4d72584e04e6ad299c176fcce
https://github.com/llvm/llvm-project/commit/2ac96dbb3a08baf4d72584e04e6ad299c176fcce
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/ptrtoaddr-at-scope.ll
Log Message:
-----------
[SCEV] Add missing scPtrToAddr to getCastExpr. (#211899)
https://github.com/llvm/llvm-project/pull/180244 (8e76c3f0d29) missed
adding scPtrToAddr to getCastExpr, causing `Not a SCEV cast expression!`
on some of the AMDGPU bots, including
https://lab.llvm.org/buildbot/#/builders/10/builds/32555.
Add missing case to handle PtrToAddr.
Commit: 39df67d0edef62294b177c97124d0ffc3eec3118
https://github.com/llvm/llvm-project/commit/39df67d0edef62294b177c97124d0ffc3eec3118
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/config/linux/arm/headers.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__off64_t.h
A libc/include/llvm-libc-types/__off_t.h
A libc/include/llvm-libc-types/__uint64_t.h
A libc/include/llvm-libc-types/caddr_t.h
A libc/include/llvm-libc-types/id_t.h
A libc/include/llvm-libc-types/ino64_t.h
A libc/include/llvm-libc-types/u_int.h
A libc/include/llvm-libc-types/u_int16_t.h
A libc/include/llvm-libc-types/u_int8_t.h
A libc/include/llvm-libc-types/u_long.h
A libc/include/llvm-libc-types/u_short.h
A libc/include/llvm-libc-types/ulong.h
A libc/include/llvm-libc-types/useconds_t.h
A libc/include/llvm-libc-types/ushort.h
M libc/include/sys/types.yaml
Log Message:
-----------
[libc] Add missing sys/types.h integer and BSD/System V type definitions (#211861)
Add missing type definitions to llvm-libc-types and sys/types.yaml:
* POSIX standard types: id_t, useconds_t
* BSD and System V compatibility typedefs: caddr_t, u_int, u_int8_t,
u_int16_t, u_long, u_short, ulong, ushort
* Large File Support (LFS) and Linux kernel internal types: ino64_t,
off64_t, __off_t, __off64_t, __uint64_t
POSIX.1-2017 defines id_t and useconds_t in sys/types.h. The BSD and
System V standards specify the legacy unsigned integer shorthand types,
and Linux kernel/glibc interfaces use the double-underscore prefix
offset and integer types.
Assisted-by: Automated tooling, human reviewed.
Commit: b545f9ff454b185278046edb725cb5fe20b8a620
https://github.com/llvm/llvm-project/commit/b545f9ff454b185278046edb725cb5fe20b8a620
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/include/llvm-libc-macros/endian-macros.h
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/sys-stat-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
Log Message:
-----------
[libc] Add missing standard and Linux header macros (#211862)
Add missing header macro constants:
* endian-macros.h: __BYTE_ORDER, __LITTLE_ENDIAN, and __BIG_ENDIAN
* sys-stat-macros.h: S_IREAD, S_IWRITE, S_IEXEC, and ACCESSPERMS
* limits-macros.h: _POSIX_HOST_NAME_MAX and HOST_NAME_MAX
* unistd-macros.h: TEMP_FAILURE_RETRY
POSIX.1-2017 specifies _POSIX_HOST_NAME_MAX as 255. The Linux
gethostname(2) man page specifies HOST_NAME_MAX as 64. The
double-underscore byte order macros and TEMP_FAILURE_RETRY macro follow
the Linux and GNU C library conventions.
Assisted-by: Automated tooling, human reviewed.
Commit: c20b302c75024e9dcf5e1bffb6e1a57ef20520b1
https://github.com/llvm/llvm-project/commit/c20b302c75024e9dcf5e1bffb6e1a57ef20520b1
Author: David Green <david.green at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[AArch64] Add a OPERAND_IMM_UINT4p1 operand type (#211925)
Commit: 29210021a3e792527ea546895d23a6a0db218fab
https://github.com/llvm/llvm-project/commit/29210021a3e792527ea546895d23a6a0db218fab
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Small correctness tweaks to GPU allocator (#211610)
Summary:
Small bugs, like more strict C++ lifetime ordering for the header and
fixing a bug in alignment sizing.
Commit: 8ba8c16cde64c0c9c33e73fea8d75a19a748cede
https://github.com/llvm/llvm-project/commit/8ba8c16cde64c0c9c33e73fea8d75a19a748cede
Author: c4x64 <bloodmeridian.prabhas at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_rtl_ppc64.S
Log Message:
-----------
[tsan][ppc64] Fix copy-paste bug in __sigsetjmp OPD TOC loading (#210589)
In `__sigsetjmp`'s big-endian OPD path, the TOC was loaded from
`_setjmp`'s OPD entry instead of `__sigsetjmp`'s own entry, due to a
copy-paste error.
```diff
- addis r2,r2,_setjmp-1b at ha
- addi r2,r2,_setjmp-1b at l
+ addis r2,r2,__sigsetjmp-1b at ha
+ addi r2,r2,__sigsetjmp-1b at l
```
This caused an incorrect TOC pointer to be loaded on big-endian PPC64
when `__sigsetjmp`/sigsetjmp was intercepted by TSan. The corresponding
`_setjmp` path (which uses label `0b`) correctly references its own
symbol for the OPD lookup.
Co-authored-by: pmr <prabhas at pmrs-MacBook.local>
Commit: 8e34b2cbb06a14fd9b38625eccf7fdb482ea5ea3
https://github.com/llvm/llvm-project/commit/8e34b2cbb06a14fd9b38625eccf7fdb482ea5ea3
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libunwind/include/mach-o/compact_unwind_encoding.h
M libunwind/src/CompactUnwinder.hpp
M libunwind/src/DwarfInstructions.hpp
M libunwind/src/Registers.hpp
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind][arm64e] Mach-O Support unwinding PAuth_LR frames (#202772)
Under PAuth_LR, compact unwind entries marked UNWIND_ARM64_MODE_FRAME_PAUTH_LR are signed with the PC of the pacibsppc at the start of the range. The compiler may emit those entries with UNWIND_IS_NOT_FUNCTION_START when the pacibsppc is not the first instruction in the function; the unwinder must scan backwards past such entries to find the actual function start (and its LSDA pointer).
When unwinding a PAuth_LR frame, authenticate and re-sign using setIPPAuthLR(), which calls __builtin_ptrauth_auth_with_pc_and_resign when available, falling back to inline asm (autib171615 + pacib) for compilers that lack the builtin.
To reduce the size of Compact Unwind entries for shrinkwrapped frames, new offset bits encode the distance in multiples of 4 bytes from the range start to the pacibsppc. The compiler emits paired FRAMELESS/FRAMELESS+PAUTH_LR entries that the linker merges into a single FRAME_PAUTH_LR | (offset/4) << 12 encoding.
rdar://161907302&169746432&171118419
Commit: 84b931c00ff5987ed686fef6933c709902380337
https://github.com/llvm/llvm-project/commit/84b931c00ff5987ed686fef6933c709902380337
Author: Cyrus Ding <91178148+dingcyrus at users.noreply.github.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/JSONGenerator.cpp
A clang-tools-extra/test/clang-doc/Inputs/invalid-utf8-comment.cpp
A clang-tools-extra/test/clang-doc/json/invalid-utf8-comment.cpp
Log Message:
-----------
Fix clang-doc crash when comment contains invalid UTF-8 bytes (#210886)
When a source file comment contains non-UTF-8 bytes (e.g., byte 0x97),
clang-doc's JSONGenerator would crash with an assertion failure:
Assertion `false && "Invalid UTF-8 in value used as JSON"' failed.
This happens because json::Value(StringRef) asserts on invalid UTF-8
input in debug builds. While the release-build path calls fixUTF8()
automatically, the assertion crash affects developers and fuzzer runs.
Fix by following the same pattern used elsewhere in LLVM (lldb, clangd):
check isUTF8() before constructing a json::Value, and call fixUTF8() to
sanitize the string if invalid bytes are detected. This avoids an
unnecessary copy for the common case of valid UTF-8.
The fix covers all paths in serializeComment() where user-written text
from source comments enters JSON objects:
- CK_TextComment (I.Text)
- CK_InlineCommandComment (I.Args)
- CK_VerbatimBlockLineComment / CK_VerbatimLineComment (I.Text)
- CK_Unknown (I.Text)
Also add a regression test with an actual invalid UTF-8 byte in a
comment.
AI assistance was used for code review analysis and local build
verification.
Fixes: https://github.com/llvm/llvm-project/issues/210675
---------
Co-authored-by: Chenguang Ding <dingchenguang at kylinos.cn>
Co-authored-by: Claude <noreply at anthropic.com>
Commit: d3bddd715b4238e6305cbe5a22aa4cc268e9428a
https://github.com/llvm/llvm-project/commit/d3bddd715b4238e6305cbe5a22aa4cc268e9428a
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang-rt][cuda] Keep device-context cleanup probe from leaking a last-error (#211910)
The CUDA device runtime probes primary-context state during scope-exit
cleanup via a one-time
cudaGetDriverEntryPoint(`cuDevicePrimaryCtxGetState`) lookup. On some
runtime/driver combinations (e.g. a CUDA runtime newer than the
installed driver) that lookup fails and leaves a sticky error in the
thread's last-error slot. Since the probe runs between user kernel
launches, the user's next `cudaGetLastError()` misattributes the
leftover error to the launch, causing a spurious `invalid argument`
failure.
Fix: snapshot the last-error on entry and consume an error only if the
slot started clean, so the probe never leaks its own error and never
discards a pre-existing one.
Reproducer: a local device variable forces the guarded scope-exit device
cleanup on every call, so the probe's one-time lookup runs between the
two launches; the second `cudaGetLastError()` then observes the stale
error.
```
module m
contains
attributes(global) subroutine kern(a)
real*8 :: a(:)
if (threadIdx%x <= size(a)) a(threadIdx%x) = 1.0d0
end subroutine
end module
module h
real*8, device, allocatable :: d(:)
contains
subroutine step()
use cudafor
use m
integer :: ierr
real*8, device :: s ! local device var -> per-call guarded cleanup
if (.not. allocated(d)) allocate(d(32))
call kern<<<1,32>>>(d)
ierr = cudaGetLastError()
if (ierr /= 0) then
print *, "Kernel Launch Error ierr=", ierr, trim(cudaGetErrorString(ierr))
stop 1
endif
print *, "step ok"
end subroutine
end module
program main
use h
call step()
call step()
print *, "done"
end program
```
Before the fix (on an affected runtime): prints "step ok" then
`Kernel Launch Error ierr= 1 invalid argument`.
After the fix: prints "step ok" / "step ok" / "done".
Commit: 3af6879ba3d68d485e5e4e753223e4ed7a283df5
https://github.com/llvm/llvm-project/commit/3af6879ba3d68d485e5e4e753223e4ed7a283df5
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/include/lldb/Utility/FileSpec.h
M lldb/source/API/SBBroadcaster.cpp
M lldb/source/API/SBCommunication.cpp
M lldb/source/API/SBData.cpp
M lldb/source/API/SBFileSpec.cpp
M lldb/source/API/SBLaunchInfo.cpp
M lldb/source/API/SBProcessInfo.cpp
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/API/SBStream.cpp
M lldb/source/API/SBStringList.cpp
M lldb/source/Plugins/ObjectContainer/Big-Archive/ObjectContainerBigArchive.h
M lldb/source/Target/Statistics.cpp
M lldb/source/Utility/FileSpec.cpp
M lldb/unittests/tools/lldb-server/tests/MessageObjects.cpp
Log Message:
-----------
Revert "[lldb] Remove ConstString from FileSpec" (#211927)
Reverts llvm/llvm-project#211394 as this introduces use-after-frees in
LLDB because we expect the underlying filename and directory to outlive
the FileSpec.
Commit: 1e7e6b3c7e8853afb999971b1abe0d0e334ad8a0
https://github.com/llvm/llvm-project/commit/1e7e6b3c7e8853afb999971b1abe0d0e334ad8a0
Author: David Green <david.green at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
A llvm/test/Analysis/CostModel/AArch64/fminmax.ll
M llvm/test/Analysis/CostModel/AArch64/min-max.ll
Log Message:
-----------
[AArch64] Update min/max cost tests. NFC (#211931)
Commit: b9222a4a8287715fc26dce6f87662b815fc6825e
https://github.com/llvm/llvm-project/commit/b9222a4a8287715fc26dce6f87662b815fc6825e
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/MC/AMDGPU/gfx13_asm_vds.s
A llvm/test/MC/AMDGPU/gfx13_asm_vds_err.s
Log Message:
-----------
[AMDGPU][GFX13] Remove support for LDS atomic add f64 (#211922)
This are not supported by gfx13.
Fixes ROCM-28488.
Commit: da798c26ae2d191863910035e07a3e2affeb21b5
https://github.com/llvm/llvm-project/commit/da798c26ae2d191863910035e07a3e2affeb21b5
Author: Oliver Hunt <oliver at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/AST/Decl.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaCXX/expansion-statements-local-extern-decls.cpp
Log Message:
-----------
[Sema] Skip expansion statements when determing local extern context (#210512) (#211745)
This bug showed up as a failed assertion that was asserting that if
not in a function or method context we should be in the global/file
context.
The root cause is that when determining the linkage context for a
decl we were failing to account for the existence of expansion
contexts. Ignoring the assertion failure, the functional effect of
this is that we would fail to detect incorrect local extern
declarations inside expansion contexts. The fix here is to make
sure that we use `getEnclosingNonExpansionStatementContext()` to
find the true DeclContext for the current scope.
The initial report only identified local extern function declarations
but the same bug occurred with extern var decls, but the path did
not lead to an assertion firing, just incorrect behaviour.
Thanks to Sirraide for explaining why this was going wrong, and
confirming this was the correct fix.
Also fixes #211912
Commit: a65c7202d43ef32e93abef1b36150f07e5c91457
https://github.com/llvm/llvm-project/commit/a65c7202d43ef32e93abef1b36150f07e5c91457
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/lib/ProfileData/SampleProfReader.cpp
Log Message:
-----------
[ProfileData] Split EagerSampleProfileNameTable by key type (NFC) (#211126)
This patch splits EagerSampleProfileNameTable into two separate
classes, EagerStringSampleProfileNameTable and
EagerMD5SampleProfileNameTable. This patch is meant to be a
preparation patch for centralizing and speeding up symbol membership
queries like "is this symbol in the name table?".
Currently, we have two problems with these membership queries:
- Customers build their own data structures like DenseSet<uint64_t> of
MD5 values and StringSet<> to serve those queries. That is, the
sample profile loader does not directly serve those queries.
- There are two places, namely SampleProfileLoader::doInitialization
and SampleProfileNameSet, where we build identical StringSet<> of the
name table entries, costing compilation time at both construction and
destruction time.
Now, we could serve these membership queries from a central place using
DenseSet<uint64_t> of MD5 values, but that would be expensive if we
have a string-based name table because we need to compute MD5 values
for all name table entries. In that case, we should construct
DenseSet<StringRef> using a cheaper hash function like
llvm::xxh3_64bits instead.
This patch helps us by separating the two cases -- MD5-based and
string-based name table.
In a subsequent patch, I'm planning to implement the "contains" method
so that users can easily ask us whether a given symbol is in the name
table.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957
Assisted-by: Antigravity
Commit: 7354df8e742b2b3c58a4a918ace238c6042c4c07
https://github.com/llvm/llvm-project/commit/7354df8e742b2b3c58a4a918ace238c6042c4c07
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-device-global-cycle.fir
Log Message:
-----------
[flang][cuda] Keep cycle-broken device globals defined (#211897)
Breaking cyclic global initializers by removing an initializer produced
an
external declaration, which could leave references unresolved during
device
linking.
Replace selected cyclic initializers with zero initializers instead.
This
breaks the NVPTX dependency cycle while preserving device symbol
definitions.
Commit: bd47223f2009fc5d7b997cc3572cbe89b37a6d8c
https://github.com/llvm/llvm-project/commit/bd47223f2009fc5d7b997cc3572cbe89b37a6d8c
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
[ThreadSafety] Add two-state semantics for handleCall in beta mode (#210219)
Previous contributions added alias analysis and strengthened soundness
by invalidating out-parameters in beta mode. The latter feature
introduced a distinction between the contexts before and after a
function call, because the invalidation assumes that an argument passed
by pointer or reference may be changed by the function.
This requires two-state semantics for handling function attributes.
Specifically, AcquireCapability and AssertCapability, which both ensure
that some locks are held after the call, should be associated with the
post-state. Other function attributes, like RequireCapability or
ReleaseCapability, are associated with the pre-state.
This commit implements these semantics. This change only affects beta
mode.
A previous discussion about these semantics:
https://github.com/llvm/llvm-project/pull/190154
rdar://171209196
Commit: b6f5847d623e5625a9278e32e2cd42af31a92df6
https://github.com/llvm/llvm-project/commit/b6f5847d623e5625a9278e32e2cd42af31a92df6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
M clang/test/CIR/CodeGenHIP/attr-target-amdgpu.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-extended-image.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-image.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-logb-scalbn.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenHIP/target-features.hip
M clang/test/CIR/CodeGenOpenMP/target-map-llvm-device.c
M clang/test/CIR/CodeGenOpenMP/target-map-llvm-host.c
M clang/test/CIR/CodeGenOpenMP/target-map.c
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (6) (#211868)
Rewrite CIR/CodeGenHIP cc1 test RUN lines to the new subarch triple
form, dropping the redundant -target-cpu, and regenerate autogenerated
CHECK lines.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 3f69551f6bf06a8c4e44a9d86c3ed0153c20694e
https://github.com/llvm/llvm-project/commit/3f69551f6bf06a8c4e44a9d86c3ed0153c20694e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/CodeGenCXX/amdgpu-float16.cpp
M clang/test/CodeGenCXX/sret_cast_with_nonzero_alloca_as.cpp
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
M clang/test/Misc/amdgcn.unsupported_core_3.1.cl
M clang/test/Misc/backend-resource-limit-diagnostics.hip
M clang/test/Sema/sizeof-struct-non-zero-as-member.cl
M clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/lambda.cu
M clang/test/SemaCUDA/openmp-target.cu
M clang/test/SemaCXX/ms-layout_version.cpp
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (7) (#211869)
Rewrite the remaining small test directories (CodeGenCXX, Misc, Sema,
SemaCUDA, SemaCXX) cc1 RUN lines to the new subarch triple form,
dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: b63514c9b0d77ff01a0d9d85ce00044ba7fcd2ce
https://github.com/llvm/llvm-project/commit/b63514c9b0d77ff01a0d9d85ce00044ba7fcd2ce
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Add more support for data transfer with constant (#211944)
Extent support where rhs has some constant variables in an expression.
This match what is accepted in the legacy compiler.
Commit: 89ee858e94a4329f01e4e070731d307953896f2b
https://github.com/llvm/llvm-project/commit/89ee858e94a4329f01e4e070731d307953896f2b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port f0be938ce6df (#211951)
Commit: 921f7ca6be12efa9b4313e370352360ae9a8e415
https://github.com/llvm/llvm-project/commit/921f7ca6be12efa9b4313e370352360ae9a8e415
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/src/__support/CPP/string.h
M libc/test/src/__support/CPP/string_test.cpp
Log Message:
-----------
[libc][cpp::string] Do not count null terminator in capacity() (#211918)
Currently, `capacity()` includes the null terminator of the backing
buffer, which does not align with C++20's `std::string`. That is,
`s.reserve(s.capacity())` should be a no-op. While there's no
requirement these be in-sync, it is less surprising to align its
behavior.
Also, this fixes the case where `reserve()` is called on an empty
string, where previously the null terminator was not set.
Commit: a891a5c40c7d2ed62d97fc6563cf256e7bab3ffb
https://github.com/llvm/llvm-project/commit/a891a5c40c7d2ed62d97fc6563cf256e7bab3ffb
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
Log Message:
-----------
[Clang] [Sema] Use getCurFunctionDecl() to get the current function (#211938)
In `BuildReturnStmt()`, use `getCurFunctionDecl()` to get the current
function rather than attempting to cast `CurContext` to a
`FunctionDecl`, which breaks inside an expansion statement because the
current `DeclContext` will be that of the expansion statement, not the
function. `getCurFunctionDecl()` knows how to handle this case and we
already call it earlier in that function, so just reuse the result of
that call.
Fixes #211917.
Commit: 002deaabe67c2a586a36f9ac806ec83d1927a43d
https://github.com/llvm/llvm-project/commit/002deaabe67c2a586a36f9ac806ec83d1927a43d
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/test/Analysis/dangling-ptr-deref.cpp
Log Message:
-----------
[analyzer] Match dangling subobjects by their base region in DanglingPtrDeref (#211552)
Currently the `DanglingPtrDeref` checker only records the whole object's
region as deallocated. However, dangling pointers often refer to
subobjects (e.g., a struct field or an element of an array). With the
change in this PR, `isDeallocated` now checks whether a region's base
region is in the `DeallocatedSourceSet`.
Commit: 6d300116c0db7db964f2c0f8d24247a6609d815b
https://github.com/llvm/llvm-project/commit/6d300116c0db7db964f2c0f8d24247a6609d815b
Author: Rashmi Mudduluru <r_mudduluru at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/MemoryUnsafeCastChecker.cpp
A clang/test/Analysis/Checkers/WebKit/memory-unsafe-cast-cxxthis.cpp
M clang/test/Analysis/Checkers/WebKit/memory-unsafe-cast.cpp
Log Message:
-----------
[Webkit Checkers][SaferCpp] Fix MemoryUnsafeCastChecker to precisely exclude `*this` casts (#210180)
Exclude casts precisely matching `this` and `*this` (through
parens/implicit casts), without matching member accesses like
`this->m_field`.
rdar://173770064
Commit: 9a606af2f2dcd6f0c1321493623911428d000d94
https://github.com/llvm/llvm-project/commit/9a606af2f2dcd6f0c1321493623911428d000d94
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/test/CodeGen/X86/lea-opt-cse1.ll
M llvm/test/CodeGen/X86/lea-opt-cse2.ll
M llvm/test/CodeGen/X86/lea-opt-cse4.ll
M llvm/test/CodeGen/X86/lea-recursion.ll
R llvm/test/CodeGen/X86/pr51707.ll
Log Message:
-----------
Revert "[X86] Reuse already-materialized values when forming LEAs (#2… (#211958)
…10739)"
This reverts commit 580604f1f3cbdd643a53e086265140a0b2805c5c.
Commit: efc78d2029b9f716de4546ed88571616d91e826c
https://github.com/llvm/llvm-project/commit/efc78d2029b9f716de4546ed88571616d91e826c
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/signal-macros.h
Log Message:
-----------
[libc] Add symbolic constants for si_code values. (#211945)
Extend SIGCHLD-specific `si_code` values, already available in
`signal-macros.h` with Linux values for the rest of the signal-specific
codes specified in the POSIX.1-2024.
Commit: 5f2abdde629626031a9c95da5987ff56d88a4b51
https://github.com/llvm/llvm-project/commit/5f2abdde629626031a9c95da5987ff56d88a4b51
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Semantics/CUDA/cuf02.cuf
Log Message:
-----------
[flang][cuda] Accept statement function in device code (#211957)
Statement functions are inlined during lowering, so they should not be
treated as host procedure calls. Recursively validate their expressions
to reject any host procedure calls within the body.
Commit: 571a1deb31125780ffb86fbae027b03efd0dcdd8
https://github.com/llvm/llvm-project/commit/571a1deb31125780ffb86fbae027b03efd0dcdd8
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryLoop.h
M bolt/test/X86/loop-nest.test
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/include/llvm/CodeGen/MachineLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/test/Transforms/LoopVectorize/early_exit_with_outer_loop.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-freeze.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll
M mlir/include/mlir/Analysis/CFGLoopInfo.h
M mlir/lib/Analysis/CFGLoopInfo.cpp
Log Message:
-----------
[LoopInfo] Store blocks using Euler tour representation (#211485)
Block list construction appends each block to all enclosing loops
(O(depth) per block), and each loop owns a separately allocated vector.
Switch to an Euler tour representation: one BlockLayout array per
LoopInfo holding the in-loop blocks in a loop-contiguous reverse
postorder, each loop's list a [begin, end) slice of it, subloop slices
nested inside their parent's. Headers remain first;
`SubLoops`/`TopLevelLoops` orders are unchanged. A few tests observe the
order and are updated. (Previously a loop's list was the function's
reverse postorder restricted to its members, so a subloop's blocks were
interleaved with the parent's own blocks at their RPO positions.)
Mutations first copy a borrowed slice into private storage from
LoopInfo's allocator. `contains(BlockT *)` remains map-based: a
materialized loop's slice is not a membership test. This copy is rare:
across default<O2> over dagcombiner and sqlite3, only 12--14% of loops
built by analyze() are ever mutated; the rest keep the borrowed slice.
AllocateLoop() no longer forwards constructor arguments; analyze() uses
allocateLoop(Header), removing the header-taking loop constructors.
Aided by Claude Fable 5
Commit: 861adf6f34727fbcc66c64ddba916ac0bb0423c2
https://github.com/llvm/llvm-project/commit/861adf6f34727fbcc66c64ddba916ac0bb0423c2
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
Log Message:
-----------
[lldb] Fix heap-use-after-free in FileSpec usage (#211908)
After #211394, `FileSpec` stores m_filename as a `SmallString` instead
of `ConstString`. When the `FileSpec` goes out of scope / is destructed,
a `StringRef` pointing to m_filename is now invalid. Previously it would
have worked even after `FileSpec` goes out of scope since `ConstString`
stores the string in a global buffer which is never destructed.
This causes heap-use-after-free in `CommandInterpreter` when we use the
result of `GetFilename()` on a temporary `FileSpec`. Store the result of
`HostInfo::GetProgramFileSpec()` as a variable to prevent it from going
out of scope before we're able to call `GetHomeInitFile()`.
Although #211394 introduces this failure, technically speaking this is
an existing bug, it was just masked because of how `FileSpec` used to
use `ConstString` to force a long lifetime.
Commit: 5295852db2735e884c657b9109446157f7b84ea3
https://github.com/llvm/llvm-project/commit/5295852db2735e884c657b9109446157f7b84ea3
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-sink.mlir
Log Message:
-----------
[mlir] [vector] Allow element/broadcast re-order for FMA if the source is a vector (#211208)
The diagnostic says the transform is not performed as the source may be
a scalar. But we can make it if we can check the source is not a scalar.
AI assisted.
Commit: cf9545250838bcb35e18ef872a89b790e7e893c3
https://github.com/llvm/llvm-project/commit/cf9545250838bcb35e18ef872a89b790e7e893c3
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/peephole-optimize.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
M mlir/test/Dialect/XeGPU/sg-to-lane-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/sg-to-lane-distribute.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-elemwise.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[mlir][xegpu] Make convert_layout input_layout optional (#210833)
Make the `input_layout` attribute of `xegpu.convert_layout` optional.
When it is not set, the effective input layout defaults to
`target_layout`, i.e. the source is assumed to already be in the target
distribution.
assisted-by-Claude
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: c64a5b0c4cbf01df2a29cc2175b362c76e360373
https://github.com/llvm/llvm-project/commit/c64a5b0c4cbf01df2a29cc2175b362c76e360373
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Remove CompletionString.AvailabilityKindCompat (#210682)
This completes the fourth step of
https://github.com/llvm/llvm-project/pull/156680
This change is a follow-up to
https://github.com/llvm/llvm-project/pull/160296, following the release
branching, to ensure a one release-cycle deprecation period.
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Commit: 339792f456abaae623c22789df6d1e1c59288839
https://github.com/llvm/llvm-project/commit/339792f456abaae623c22789df6d1e1c59288839
Author: Twice <twice at apache.org>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M mlir/include/mlir-c/ExtensibleDialect.h
M mlir/include/mlir/Bindings/Python/IRCore.h
M mlir/include/mlir/IR/ExtensibleDialect.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/ExtensibleDialect.cpp
M mlir/test/python/dialects/ext.py
Log Message:
-----------
[MLIR][Python] Support IsIsolatedFromAbove trait for python-defined operations (#211849)
This PR adds dynamic `IsIsolatedFromAbove` trait support and exposes it
to Python as `IsIsolatedFromAboveTrait`.
The test verifies that a region with the trait cannot capture an SSA
value from above, while a region without the trait can.
Assisted by Codex/GPT 5.6 Sol (for writing test cases).
Commit: bf7b5a0fedb924e7f3db3423cbeb97c343c37b25
https://github.com/llvm/llvm-project/commit/bf7b5a0fedb924e7f3db3423cbeb97c343c37b25
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/IR/invalid-atomic.cir
Log Message:
-----------
[CIR] Add support for atomic fmaximum/fminimum/fmaximumnum/fminimumnum (#211845)
This patch adds CIR support for the following atomic builtin functions:
- `__atomic_fetch_fmaximum`
- `__atomic_fetch_fminimum`
- `__atomic_fetch_fmaximumnum`
- `__atomic_fetch_fminimumnum`
The scoped versions of these atomic builtin functions are supported as
well.
Specifically, this patch contains the following changes:
- It updates the `cir.atomic.fetch` operation and adds new fetch
operators including `maximum`, `minimum`, `maximumnum`, and
`minimumnum`. These operators accept floating-point inputs only.
- It updates the LLVM lowering of the `cir.atomic.fetch` operation. The
LLVM lowering now will lower `maximum`, `minimum`, `maximumnum`, and
`minimumnum` atomic fetch operators to the corresponding LLVM
`atomicrmw` operations, which are `fmaximum`, `fminimum`, `fmaximumnum`,
and `fminimumnum`, respectively, aligning with the OGCG behavior.
- It updates the CIRGen path for atomic operations and add supports for
these atomic builtin functions.
Assisted-by: GitHub Copilot / gpt-5.4 xhigh
Commit: 9881786a98fc94caaec35df342ca31321c880584
https://github.com/llvm/llvm-project/commit/9881786a98fc94caaec35df342ca31321c880584
Author: David Green <david.green at arm.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[AArch64] Add a OPERAND_IMM_UINT1 operand type (#211986)
Commit: bcd5798f6d5866fac01b101e6e3666ff61659515
https://github.com/llvm/llvm-project/commit/bcd5798f6d5866fac01b101e6e3666ff61659515
Author: Hardik Kumar <hardikxk at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
Log Message:
-----------
[clang][NFC]Remove unused variable (#211983)
The patch resolves the following warning.
```bash
clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp:504:16: warning: variable ‘i’ set but not used [-Wunused-but-set-variable=]
504 | unsigned i = 0;
| ^
```
A count variable was set and incremented inside of a for loop but never
actually used inside of the loop or anywhere else in its scope.
Commit: 02fa1be4f71225040054fd2dbd484e93fa3a55d4
https://github.com/llvm/llvm-project/commit/02fa1be4f71225040054fd2dbd484e93fa3a55d4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/CodeGen/BreakFalseDeps.h
M llvm/include/llvm/CodeGen/MachineCheckDebugify.h
M llvm/include/llvm/Transforms/Scalar/AlignmentFromAssumptions.h
M llvm/include/llvm/Transforms/Scalar/LogicalSROA.h
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/Lanai/Lanai.h
M llvm/lib/Target/MSP430/MSP430.h
M llvm/lib/Target/X86/X86.h
Log Message:
-----------
[Passes] Replace PassInfoMixin with {Optional,Required}PassInfoMixin
There were a couple passes that landed after the mass migration that
need to be updated to eventually make PassInfoMixin private. For backend
passes I looked at whether LegacyPM passes called skipFunction rather
than whether or not they should be enabled to try and preserve existing
behavior where possible.
We still need to wait a bit in order to avoid PassInfoMixin to a detail
namespace and fully remove isRequired from PassInfoMixin given there are
a lot of out-of-tree passes that have not yet been moved over. I'm
hoping to have patches out within a week.
Reviewers: arsenm, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/211874
Commit: 9184bb0b6564c3e7e41dc8bc1ab7281b5cf4da65
https://github.com/llvm/llvm-project/commit/9184bb0b6564c3e7e41dc8bc1ab7281b5cf4da65
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
[IR][NFC] Remove vtables from analysis passes (#211864)
Similar to #209414 but for AnalysisPassConcept. This avoids vtables for
every analysis pass.
Commit: 943d6498fabf0143d31a39a87a103146bfc9af69
https://github.com/llvm/llvm-project/commit/943d6498fabf0143d31a39a87a103146bfc9af69
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/SemaHIP/amdgpu-av-load-store.hip
M clang/test/SemaHIP/amdgpu-builtin-in-lambda-with-unsupported-attribute.hip
M clang/test/SemaHIP/amdgpu-builtin-in-lambda.hip
M clang/test/SemaHIP/amdgpu-ds-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-return-type-deduction.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-global-load-lds-template.hip
M clang/test/SemaHIP/builtins-amdgcn-buffer-format.hip
M clang/test/SemaHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
M clang/test/SemaHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
M clang/test/SemaHIP/hip-builtin-lvalue-to-rvalue.hip
M clang/test/SemaHIP/incorrect-atomic-scope.hip
M clang/test/SemaHIP/shared-variable-too-large.hip
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (8) (#211870)
Rewrite SemaHIP cc1 test RUN lines to the new subarch triple form,
dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 3055342ef9534f2ad4a047b222533dc676ce627b
https://github.com/llvm/llvm-project/commit/3055342ef9534f2ad4a047b222533dc676ce627b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/SemaOpenCL/amdgpu-ds-atomic-fadd-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cmp-deprecated.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-ci.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-flat-address-space.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx10-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx10.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-cooperative-atomics.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1251-wmma-w32-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx908-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx90a-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx942-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-lds-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-target-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-load-to-lds-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-add-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-add-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-format-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-load-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-store-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-ptr-buffer-load-lds-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-ptr-buffer-load-lds-target-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-s-buffer-load-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-s-wait-event.cl
M clang/test/SemaOpenCL/builtins-amdgcn-struct-buffer-format-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
M clang/test/SemaOpenCL/builtins-image-load-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-image-load-param-gfx942-err.cl
M clang/test/SemaOpenCL/builtins-image-store-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-image-store-param-gfx942-err.cl
M clang/test/SemaOpenCL/half-float16-vector-compatibility.cl
M clang/test/SemaOpenCL/incorrect-atomic-scope.cl
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (9) (#211954)
Commit: 43da8ef8d09261a89abd9dd36e9785993db2f991
https://github.com/llvm/llvm-project/commit/43da8ef8d09261a89abd9dd36e9785993db2f991
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/X86/permute-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffletoidentity-bitcast.ll
M llvm/test/Transforms/VectorCombine/pr197910.ll
Log Message:
-----------
Revert "[VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask)" (#211994)
Reverts llvm/llvm-project#211530 while I investigate some compilation timeouts
Commit: f539edf74b2c9c33b298b4d2c58201f91c22beb4
https://github.com/llvm/llvm-project/commit/f539edf74b2c9c33b298b4d2c58201f91c22beb4
Author: Xiaoyang Gong <xyg_aster at outlook.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
A llvm/test/tools/lto/legacy-thinlto-cache-key.ll
M llvm/tools/lto/lto.cpp
Log Message:
-----------
[LTO] Include debug options in legacy ThinLTO cache keys (#211474)
Legacy ThinLTO omits -mllvm options from cache keys, which can cause it
to reuse objects built with different code-generation settings.
Include these options in cache keys, matching modern ThinLTO behavior.
Commit: b9c05ca60ab11ecea4a58d864f62c65fce8cf912
https://github.com/llvm/llvm-project/commit/b9c05ca60ab11ecea4a58d864f62c65fce8cf912
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Fix MSan uninitialized value in createSCEV (#211996)
In #180244 (8e76c3f0d29a), handling of Instruction::Sub in
createSCEV declared PtrLHS and PtrRHS as uninitialized local variables.
When only one side matched m_PtrToInt, the other variable remained
uninitialized. Passing it by value to GetOp copied uninitialized shadow
bytes, causing MemorySanitizer to report use-of-uninitialized-value.
Initialize PtrLHS and PtrRHS to nullptr upon declaration.
Assisted-by: Gemini
Commit: 068ec1a282c1f4c22c5a1e71f7f6834846c5dca9
https://github.com/llvm/llvm-project/commit/068ec1a282c1f4c22c5a1e71f7f6834846c5dca9
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/builtin-clear-padding-codegen.c
M clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
Log Message:
-----------
[clang] fix __builtin_clear_padding not working with virtual base pointers on Windows (#211355)
Fixes https://github.com/llvm/llvm-project/issues/209787
It was an oversight that the builtin only takes care of the virtual
function table pointer but not the virtual base pointer. On Itanium
there is one pointer so it wasn't a problem but on windows msvc , this
is a problem. And the runtime test in libcxx CI was disabled in llvm 23
because we don't use trunk clang in our libcxx CI in general. and after
we flipped to llvm 24, the test started to fail on downstream (chromium)
where they use trunk clang with trunk libc++ on Windows.
We do have FileCheck test in clang test which covers this virtual case.
However, the target triple in the FileCheck under test were
`x86_64-linux-gnu` and `x86_64-windows-gnu` , which does not cover the
Windows msvc ABI. I updated the test to test `x86_64-pc-windows-msvc` in
this PR to cover that ABI.
Commit: 9b1218ce69e06a22699bc196888fc0396d989c81
https://github.com/llvm/llvm-project/commit/9b1218ce69e06a22699bc196888fc0396d989c81
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.h
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.h
Log Message:
-----------
[lldb] Move GetVTableInfo to C++ language runtime (#207010)
The original PR was reverted in
https://github.com/llvm/llvm-project/pull/206816 due to a test failure
on lldb-aarch64-ubuntu.
Since I couldn't reproduce the failure, I decided to split the PR into
smaller chunks.
This is part 1/4 (the final state is on
https://github.com/Nerixyz/llvm-project/tree/refactor/common-abi-runtime-take2-4-of-4).
It moves `GetVTableInfo` and `TypeHasVTable` from the Itanium ABI
runtime to the C++ language runtime. Eventually, this will be used to
select the ABI runtime that's able to handle a vtable. For now, we
always ask and use Itanium.
Commit: 2755ffcabdce740c65d773155c659f505ac6c74e
https://github.com/llvm/llvm-project/commit/2755ffcabdce740c65d773155c659f505ac6c74e
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/cast_ptr.ll
Log Message:
-----------
[InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (#211991)
Similar to the existing ptrtoint fold; this is valid, because icmp only
compares address bits. This addresses optimization regressions when
generating ptrtoaddr for pointer subtractions.
Commit: ec157b60d8345b67be16fde4b96f85c8512fbbb6
https://github.com/llvm/llvm-project/commit/ec157b60d8345b67be16fde4b96f85c8512fbbb6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
Log Message:
-----------
[VPlan] Widen masked unit-stride consecutive accesses in VPlan. (#211315)
Extend the widenConsecutiveMemOps sub-pass to widen masked/predicated
unit-stride consecutive accesses VPlan-natively.
This requires exposing an instruction-independent
isLegalMaskedLoadOrStore in VPSelectionContext, as well as adding it to
VPCostContext. Some of the members will probably be useful for other
changes as well.
PR: https://github.com/llvm/llvm-project/pull/211315
Commit: 291e0a4e522c31a693b1ee8749f2ae7ce2b9e329
https://github.com/llvm/llvm-project/commit/291e0a4e522c31a693b1ee8749f2ae7ce2b9e329
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/pr165301.ll
Log Message:
-----------
[SimplifyCFG] Fix DomTree update in `turnSwitchRangeIntoICmp` (#212006)
The original removal of `BB->Default` has been handled by
`createUnreachableSwitchDefault`.
When `OtherDest` is also unreachable, the edge should be removed.
This issue cannot be reproduced via
`-simplifycfg-require-and-preserve-domtree=1`. I just found it by
checking DT in `requestResimplify`.
Commit: 0bf3638ddfe6e8bb3b79ebe8c2a918384a5df612
https://github.com/llvm/llvm-project/commit/0bf3638ddfe6e8bb3b79ebe8c2a918384a5df612
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MachObjectWriter.cpp
R llvm/test/CodeGen/AArch64/macho-weak-alias.ll
Log Message:
-----------
Revert "[MachO] Preserve weak linkage for aliases" (#212009)
Commit: 7e08ed3dcc857ad631f5ad71e6158ae6232df691
https://github.com/llvm/llvm-project/commit/7e08ed3dcc857ad631f5ad71e6158ae6232df691
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64Subtarget.h
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-post-ra.mir
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-pre-ra.mir
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax.ll
M llvm/test/TableGen/aarch64-apple-tuning-features.td
Log Message:
-----------
[AArch64] Add FMIN/FMAX clustering (#210906)
This patch adds a subtarget feature that controls scheduling FMIN/FMAX
instructions back to back. Enabled on Apple CPU.
Commit: fedcc2ea69287f77fb7e2e639417e55eafa7d8f3
https://github.com/llvm/llvm-project/commit/fedcc2ea69287f77fb7e2e639417e55eafa7d8f3
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-comparison.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-comparison.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-conversion-cast.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-conversion-cast.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-division.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-division.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-scale.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-scale.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-subtraction.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-subtraction.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-unnecessary-conversion.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-unnecessary-conversion.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/faster-strsplit-delimiter.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/faster-strsplit-delimiter.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-startswith.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-startswith.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-str-contains.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-str-contains.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/time-subtraction.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/time-subtraction.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/upgrade-duration-conversions.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/upgrade-duration-conversions.rst
Log Message:
-----------
[clang-tidy][docs] Rename remaining abseil check docs to Markdown (#212003)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 0252b421b1725c627ca00f3cee7663cb9882291a
https://github.com/llvm/llvm-project/commit/0252b421b1725c627ca00f3cee7663cb9882291a
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-comparison.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-conversion-cast.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-division.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-scale.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-subtraction.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-unnecessary-conversion.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/faster-strsplit-delimiter.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-startswith.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-str-contains.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/time-subtraction.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/upgrade-duration-conversions.md
Log Message:
-----------
[clang-tidy][docs] Rewrite remaining abseil check docs to Markdown (#212004)
This commit rewrites the reST documentation to Markdown.
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
AI Usage: This was prepared with rst2myst and GPT5.6-assisted cleanup, I
manually verified that all the documentations render as expected.
Preview site for reviewing:
https://broken.life/llvm-staging/abseil-markdown-port/
Commit: a273377a509a95fd757f0e1c6a81358aceefa460
https://github.com/llvm/llvm-project/commit/a273377a509a95fd757f0e1c6a81358aceefa460
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/unittests/Support/GenericDomTreeTest.cpp
Log Message:
-----------
[DomTreeConstr][NFC] Resize NodeInfos once on construction (#211998)
This avoids frequent size checks when accessing node infos. All numbered
graphs support getMaxNumber().
Also move away from BB->getParent() as preliminary work for numbering
VPlan blocks -- there, getParent() has a different meaning.
Commit: ae5e065a1128ce8e206da6dc39ae54036f85e7d2
https://github.com/llvm/llvm-project/commit/ae5e065a1128ce8e206da6dc39ae54036f85e7d2
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
A compiler-rt/test/profile/AMDGPU/device-module-load-file.hip
Log Message:
-----------
[PGO][HIP] Support hipModuleLoad in offload PGO (#211875)
Offload PGO finds profile sections by inspecting the image passed to
hipModuleLoadData. hipModuleLoad only provides a file name, so its
device
profile counters were not collected.
After a successful hipModuleLoad, read the code object with the existing
profile file-buffer helper and register it through the same path used by
in-memory module loads.
Commit: 5f787ac145c119dd34a7f6b5b90d883d477052b2
https://github.com/llvm/llvm-project/commit/5f787ac145c119dd34a7f6b5b90d883d477052b2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-dedup.ll
Log Message:
-----------
[SimplfiyCFG] Deduplicate edges in `hoistSuccIdenticalTerminatorToSwitchOrIf` (#212017)
Fix domtree update by deduplicating edges to be inserted. Tested by the
function `@dedup`.
Commit: cb175d2d50800a04873a4375b10c385744912c53
https://github.com/llvm/llvm-project/commit/cb175d2d50800a04873a4375b10c385744912c53
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
Log Message:
-----------
[MC][NFC] Use EnumStrings for AtSpecifiers (#211827)
Store at specifiers without relocations using EnumStrings, reducing
.data.rel.ro by 4-5kiB. This also saves the more compactly at now 6B per
entry instead of 24B.
Commit: 05bcb50ec0e982a8e9988ccebbd3124c1ab3f8a0
https://github.com/llvm/llvm-project/commit/05bcb50ec0e982a8e9988ccebbd3124c1ab3f8a0
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
Log Message:
-----------
[VPlan][NFC] Number blocks (#212023)
Assign numbers to blocks for more efficient dominator tree construction.
The number is identical to the index in CreatedBlocks of the VPlan.
This removes the last user of unnumbered graphs for dominator trees.
Note that the compile-time change here is practically unmeasurable. The
motivation really is to remove the non-number code path from the
dominator tree.
Commit: 5bc304c65494702d9d4928ff6cb369e6e6496e53
https://github.com/llvm/llvm-project/commit/5bc304c65494702d9d4928ff6cb369e6e6496e53
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan][NFC] Extend comments of VPlan block numbers (#212025)
Address during-commit review feedback.
Commit: a434fe87cce77591e3322a674c9c97f9ce900291
https://github.com/llvm/llvm-project/commit/a434fe87cce77591e3322a674c9c97f9ce900291
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__functional/function_ref.h
A libcxx/include/__functional/function_ref_common.h
A libcxx/include/__functional/function_ref_impl.h
A libcxx/include/__type_traits/register_passable.h
M libcxx/include/functional
M libcxx/include/module.modulemap.in
M libcxx/include/version
M libcxx/modules/std/functional.inc
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assert.constant_arg_ptr.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assert.function_ptr.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_arg.mandates.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/functional.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/ctad.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assign.delete.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper_ptr.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper_ref.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/copy.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/copy_assign.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/function_ptr.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/move.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/move_assign.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/ref.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.inv/invoke.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/trivially_copyable.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement `std::function_ref` (#186692)
Papers:
- P0792R14: function_ref: a type-erased callable reference
- P3948R1 constant_wrapper is the only tool needed for passing constant
expressions via function arguments
- P3961R1 Less double indirection in function_ref (RU-220)
LWG issues:
- LWG4256: Incorrect constraints for function_ref constructors from
nontype_t
- LWG4425: CTAD function_ref of data member pointer should produce
noexcept signature
Fixes #189606
Fixes #105376
Fixes #189604
Fixes #171321
Fixes #171387
---------
Co-authored-by: Xiaoyang Liu <siujoeng.lau at gmail.com>
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 4c3a4f1180ac1026a1d5292ee4c681d9e9fc4e0c
https://github.com/llvm/llvm-project/commit/4c3a4f1180ac1026a1d5292ee4c681d9e9fc4e0c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Use DenseMap for constant lookup, bypassing FoldingSet (NFC) (#212022)
Looking up/contructing SCEVConstants is a very frequent operation, with
a notable amount of compile-time spent in SCEV.
Add a new DenseMap, mapping IR constants to SCEVConstant. Constants are
already uniqued, so the pointer based lookup is notably faster than the
folding-set lookup.
The cache is used as fast early-exit, and the SCEVConstants are still
added to the folding set for completeness.
Compile-time impact
* stage1-O3: -0.23%
* stage1-ReleaseThinLTO: -0.21%
* stage1-ReleaseLTO-g: -0.19%
* stage1-aarch64-O3: -0.20%
* stage2-O3: -0.10%
https://llvm-compile-time-tracker.com/compare.php?from=8a6a039eb31f33749cfe251a5985b335e9a09681&to=4146ff3be6be4c9d9bb10399a83658690222252e&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/212022
Commit: 026a34b3ff5e6a53313ae81853278d55926785d1
https://github.com/llvm/llvm-project/commit/026a34b3ff5e6a53313ae81853278d55926785d1
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (#212030)
When there is no edge to the original default destination BB, also
remove the edge in DT.
This issue cannot be reproduced via
-simplifycfg-require-and-preserve-domtree=1. I just found it by checking
DT in requestResimplify (will be added after fixing all existing
issues). The following test covers this case:
https://github.com/llvm/llvm-project/blob/5bc304c65494702d9d4928ff6cb369e6e6496e53/llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll#L172-L214
Commit: b071e92ca3d3db20711daffce6cf5b813cc5da49
https://github.com/llvm/llvm-project/commit/b071e92ca3d3db20711daffce6cf5b813cc5da49
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
Log Message:
-----------
[DomTree] Remove support for unnumbered graphs (#212026)
After VPlan, all our in-tree users of the dominator tree have numbered
nodes. Remove the support for unnumbered graphs.
Also slightly simplify the numbering for pre-dominator trees to avoid an
extra +1 on every node number.
Commit: 191c60fe7cee5587ad7f7a6fd7b5bbf7b0042bec
https://github.com/llvm/llvm-project/commit/191c60fe7cee5587ad7f7a6fd7b5bbf7b0042bec
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
Log Message:
-----------
[ThreadSafety] Fix C++20 build (#212042)
In C++20 (P1008R1 https://wg21.link/p1008r1), aggregates are prohibited
from having any user-declared constructors, even if they are = delete or
= default.
Commit: 197cf54ac854f475b7ab2e1d23f02dff16ded5ca
https://github.com/llvm/llvm-project/commit/197cf54ac854f475b7ab2e1d23f02dff16ded5ca
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-attrs.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark-errs.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx7-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx908-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cluster-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-tr.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-tensor-load-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9-4-generic-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-read-tr.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gws-insts.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-load-to-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma-gfx908-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-atomic-add.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-struct-buffer-load-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-struct-buffer-store-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-gfx1250-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx942.cl
M clang/test/CodeGenOpenCL/numbered-address-space.cl
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (10) (#211955)
Rewrite the first half of CodeGenOpenCL cc1 test RUN lines to the new
subarch triple form, dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: d1af60ff088ba003ec0830cf8f4fd579646d736e
https://github.com/llvm/llvm-project/commit/d1af60ff088ba003ec0830cf8f4fd579646d736e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests.ll
M llvm/test/CodeGen/X86/vselect-avx.ll
M llvm/utils/TableGen/DAGISelMatcher.cpp
M llvm/utils/TableGen/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
Log Message:
-----------
DAG: Stop legalizing poison to undef (#211890)
Previously all targets would expand poison to undef, which was a
shortcut taken when poison was introduced.
Introduces a new dedicated poison matcher in tablegen; this avoids
multiple opcode changes, and avoids some problematic contexts that
couldn't deal with PatFrags.
This probably should be legal by default for all legal types.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 890d1331a35c6961191db07447df2623619afb7e
https://github.com/llvm/llvm-project/commit/890d1331a35c6961191db07447df2623619afb7e
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/CMakeLists.txt
Log Message:
-----------
[Clang] Don't build static analyzer if disabled (#212024)
Even if the static analyzer is disabled, it still gets built into the
dylib. Unit tests and tools already get disables, so also stop building
the library. This reduces the time needed to build a dylib clang by
8-9%.
Commit: 6b0a46958c56d91e3b2fd5ffecfe163dde1fac3a
https://github.com/llvm/llvm-project/commit/6b0a46958c56d91e3b2fd5ffecfe163dde1fac3a
Author: Piotr Kubaj <pkubaj at FreeBSD.org>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[libunwind][PPC64] Fix unw_getcontext corrupting callee-saved VSX registers on LE (#198371)
This is the first of two independent fixes for libunwind on ppc64le
(ELFv2 ABI, little-endian), where two separate bugs together cause
SIGSEGV during backtracing. This commit addresses the VSX register
corruption; the TOC-restore fault is handled in a follow-up. Both
were discovered while debugging lang/rust build failures with
RUST_BACKTRACE=1 on FreeBSD/powerpc64le (IBM POWER9).
On ppc64le, `unw_getcontext` saves each VS register with an in-place
`xxswapd n, n` followed by `stxvd2x`. The swap is needed because
`stxvd2x` stores doublewords in the wrong order on LE. However, the
macro never applies a second `xxswapd` to restore the register after
the store, so all 64 VS registers are permanently corrupted on return
from `unw_getcontext`.
This affects every callee-saved VSX register: f14-f31 (VSR14-VSR31)
and VR20-VR31 (VSR52-VSR63). After `_Unwind_Backtrace` returns, any
code that uses these registers sees wrong values. In practice this
manifests as SIGSEGV inside hashbrown's `reserve_rehash`: VR20-VR31
are corrupted before a SIMD comparison loop runs, producing an
out-of-bounds access.
Fix: add a second `xxswapd n, n` after the `stxvd2x` store. Since
`xxswapd` is its own inverse, the pair is a no-op on the architectural
register while still writing the correctly byte-swapped value to memory.
Commit: 56f4b9c4e875477c0fbc73160f96524d4915040c
https://github.com/llvm/llvm-project/commit/56f4b9c4e875477c0fbc73160f96524d4915040c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-features-default-delta.cl
M clang/test/CodeGenOpenCL/amdgpu-module-flag-xnack-sramecc.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M clang/test/CodeGenOpenCL/atomics-cas-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/atomics-unsafe-hw-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-ci.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-flat-address-space.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx90a-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-5-generic-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-monitor.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1251-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w32-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w64-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-interp.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-atomic-max.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-store-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raytracing.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-s-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx1030.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx8.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/check-atomic-alignment.cl
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (11) (#211956)
Rewrite the second half of CodeGenOpenCL cc1 test RUN lines to the new
subarch triple form, dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 353729bbe4c53086c9acf3a9d1a4a88a61eec997
https://github.com/llvm/llvm-project/commit/353729bbe4c53086c9acf3a9d1a4a88a61eec997
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU] Avoid quadratic erase in SIInstrWorklist (#211801)
Commit: 96a85478fbb2dd0b4fd5d11aeb9eae396499b8b5
https://github.com/llvm/llvm-project/commit/96a85478fbb2dd0b4fd5d11aeb9eae396499b8b5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Add VPRegionBlock::getEntryBranchOnMask helper (NFC) (#212060)
Add an accessor returning the VPBranchOnMaskRecipe guarding a replicate
region, i.e. the sole recipe of the region's entry block.
Commit: f704f396072bd0fffc13ce2aae5fb58dfe26bce6
https://github.com/llvm/llvm-project/commit/f704f396072bd0fffc13ce2aae5fb58dfe26bce6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/OpenMP/amdgcn_debug_nowait.c
M clang/test/OpenMP/amdgcn_device_function_call.cpp
M clang/test/OpenMP/amdgcn_ldbl_check.cpp
M clang/test/OpenMP/amdgcn_save_temps.c
M clang/test/OpenMP/amdgcn_sret_ctor.cpp
M clang/test/OpenMP/amdgcn_target_codegen.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/amdgcn_target_init_temp_alloca.cpp
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/amdgcn_weak_alias.cpp
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
M clang/test/OpenMP/amdgpu_exceptions.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/amdgpu_throw.cpp
M clang/test/OpenMP/amdgpu_throw_trap.cpp
M clang/test/OpenMP/amdgpu_try_catch.cpp
M clang/test/OpenMP/copy-gaps-1.cpp
M clang/test/OpenMP/copy-gaps-2.cpp
M clang/test/OpenMP/copy-gaps-3.cpp
M clang/test/OpenMP/copy-gaps-4.cpp
M clang/test/OpenMP/copy-gaps-5.cpp
M clang/test/OpenMP/copy-gaps-6.cpp
M clang/test/OpenMP/debug-info-kmpc.cpp
M clang/test/OpenMP/declare_target_local_codegen.cpp
M clang/test/OpenMP/declare_target_local_map_messages.cpp
M clang/test/OpenMP/declare_target_local_usm_codegen.cpp
M clang/test/OpenMP/declare_target_nohost_variant_messages.cpp
M clang/test/OpenMP/declare_variant_construct_codegen_1.c
M clang/test/OpenMP/force-usm.c
M clang/test/OpenMP/interop_codegen.cpp
M clang/test/OpenMP/metadirective_ast_print.c
M clang/test/OpenMP/metadirective_device_arch_codegen.cpp
M clang/test/OpenMP/metadirective_device_isa_codegen_amdgcn.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/strided_update_variable_stride_codegen.c
M clang/test/OpenMP/target_data_if_logical_codegen.cpp
M clang/test/OpenMP/target_exceptions_messages.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
M clang/test/OpenMP/target_parallel_no_exceptions.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_messages.cpp
M clang/test/OpenMP/target_team_variable_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/OpenMP/target_update_count_expression_codegen.c
M clang/test/OpenMP/target_visibility.cpp
M clang/test/OpenMP/thread_limit_gpu.c
M clang/test/SemaOpenMP/amdgpu-barrier.cpp
M clang/test/SemaOpenMP/amdgpu-buffer-rsrc.cpp
M clang/test/SemaOpenMP/amdgpu-image-rsrc.cpp
Log Message:
-----------
clang/AMDGPU: Migrate OpenMP cc1 tests to amdgpu triples (12) (#212051)
Migrate the OpenMP offload cc1 tests to the new amdgpu triple scheme:
* -fopenmp-targets=amdgcn-amd-amdhsa ->
-fopenmp-targets=amdgpu-amd-amdhsa
(the offload toolchain triple, the generic amdgpu arch).
* The device -triple amdgcn-amd-amdhsa -> amdgpu-amd-amdhsa, or to the
specific subarch triple (dropping -target-cpu) where a -target-cpu was
present.
Autogenerated CHECK lines are regenerated, and the few -Wopenmp-target-
exception diagnostics that embed the triple string are updated. Tests
that
intentionally assert the "target-cpu" function attribute are left
unchanged.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 2f3f97fb72606f51ece7d64d6a7a73c9eaad8978
https://github.com/llvm/llvm-project/commit/2f3f97fb72606f51ece7d64d6a7a73c9eaad8978
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/CodeGenCUDA/anon-ns.cu
M clang/test/CodeGenCUDA/builtin-mangled-name.cu
M clang/test/CodeGenCUDA/cluster_dims.cu
M clang/test/CodeGenCUDA/device-stub.cu
M clang/test/CodeGenCUDA/kernel-stub-name.cu
M clang/test/CodeGenCUDA/struct-mangling-number.cu
M clang/test/CodeGenCUDA/types.cu
M clang/test/CodeGenCUDA/unnamed-types.cu
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/Headers/hip-header.hip
M clang/test/Sema/builtin-amdgcn-atomic-inc-dec-failure.cpp
M clang/test/SemaCUDA/builtin-mangled-name.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/float16.cu
M clang/test/SemaCUDA/overloaded-builtin.cu
M clang/test/SemaHIP/amdgpu-av-load-store.hip
M clang/test/SemaHIP/amdgpu-barrier.hip
M clang/test/SemaHIP/amdgpu-buffer-rsrc.hip
M clang/test/SemaHIP/amdgpu-ds-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-cant-jump.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-return-type-deduction.hip
M clang/test/SemaHIP/amdgpu-feature-predicate.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-is-invocable.hip
M clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
Log Message:
-----------
clang/AMDGPU: Migrate -aux-triple amdgcn in cc1 tests to amdgpu (13) (#212052)
Update to the new architecture name.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 0a7d5c755e6280ca94f09b3fe2301133c0a9f9a2
https://github.com/llvm/llvm-project/commit/0a7d5c755e6280ca94f09b3fe2301133c0a9f9a2
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/test/CodeGen/Hexagon/swp-epilog-phi12.mir
Log Message:
-----------
[Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (#212062)
Commit: a8a36f1b759e69737bd132f46bba1d0ed5dd3d6c
https://github.com/llvm/llvm-project/commit/a8a36f1b759e69737bd132f46bba1d0ed5dd3d6c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[LV] Extract fixupHeaderPhiBackedges from VPlan::execute (NFC) (#212063)
Hoist the header-phi backedge fixup loop at the end of VPlan::execute
into a helper VPTransformState::fixupHeaderPhiBackedges.
Commit: 40f8720c5db91fdf753133af05ba14ce7c3e44d7
https://github.com/llvm/llvm-project/commit/40f8720c5db91fdf753133af05ba14ce7c3e44d7
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
Log Message:
-----------
[ELF] Replace getAArch64ThunkDestVA with Thunk::getDestVA. NFC (#212071)
Suggested by
https://github.com/llvm/llvm-project/pull/209962/changes#r3595552131
Commit: 7af5c42beb1d76a5335ef5095c6bd58331a882b8
https://github.com/llvm/llvm-project/commit/7af5c42beb1d76a5335ef5095c6bd58331a882b8
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix mul/intdiv folds crashing on dynamic-shaped results (#212073)
`tosa.mul` and `tosa.intdiv` fold constant splat operands by building a
`DenseElementsAttr` of the result type, which asserts when that type has
a dynamic shape. When the operands are constants but the result type is
dynamic, folding aborted. Guard `mulBinaryFolder` and the `IntDivOp`
splat path on a static result shape, matching the other fold paths in
these ops.
Signed-off-by: Víctor Pérez Carrasco <victor.pc.upm at gmail.com>
Commit: dc26bf5303b3ffe1e25a147a830f29befa533ba2
https://github.com/llvm/llvm-project/commit/dc26bf5303b3ffe1e25a147a830f29befa533ba2
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/test/ELF/x86-64-gotpc-relax-too-far.s
Log Message:
-----------
[ELF] Retain .got for revertible no-PIC GOTPCRELX optimization (#212077)
Commit 9d6ec280fc537b55ef8641ea85d3522426bc5766 (2023) sets
GotSection::hasGotOffRel when adjustGotPcExpr returns R_RELAX_GOT_PC,
keeping .got alive for an optimization that X86_64::relaxOnce may
revert.
R_RELAX_GOT_PC_NOPIC (e.g. `addq`) in -no-pie mode has the same issue.
Commit: abd6e745e22e83af7986cdca4c1ba2d798e00156
https://github.com/llvm/llvm-project/commit/abd6e745e22e83af7986cdca4c1ba2d798e00156
Author: Byeongjee Kang <byeongjee.kang at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSA.h
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAOps.td
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Dialect/WasmSSA/IR/WasmSSAOps.cpp
A mlir/test/Conversion/RaiseWasm/wasm-global-set-to-memref.mlir
A mlir/test/Conversion/RaiseWasm/wasm-select-to-arith-select.mlir
M mlir/test/Dialect/WasmSSA/custom_parser/global.mlir
A mlir/test/Dialect/WasmSSA/custom_parser/select.mlir
M mlir/test/Dialect/WasmSSA/global-invalid.mlir
Log Message:
-----------
[MLIR][WasmSSA] Add global_set and select ops (#196613)
Adds two missing ops to the WasmSSA dialect.
- `wasmssa.global_set`
- `wasmssa.select`
---------
Co-authored-by: Ferdinand Lemaire <flscminecraft at gmail.com>
Commit: 8def9629ca230f7005102d9905502c5b6a486897
https://github.com/llvm/llvm-project/commit/8def9629ca230f7005102d9905502c5b6a486897
Author: Ferdinand Lemaire <flscminecraft at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[Github] Add myself and lforg37 as mlir wasmssa codeowners (#212079)
Adding @flemairen6 and @lforg37 as codeowners of WasmSSA
Co-authored-by: Ferdinand Lemaire <flemairen6 at gmail.com>
Commit: ae0f00de4ce82fb933c326980464c8cefb4e0029
https://github.com/llvm/llvm-project/commit/ae0f00de4ce82fb933c326980464c8cefb4e0029
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Fix variable name typo (#211729)
Commit: bab258ae1eaa56cbdc86b19f8063be612e1e4795
https://github.com/llvm/llvm-project/commit/bab258ae1eaa56cbdc86b19f8063be612e1e4795
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M .github/workflows/release-tasks.yml
Log Message:
-----------
workflows/relase-tasks: Fix variable name typo (#211732)
Commit: 2ad69983d8b72d8a665a2552aac15517fe0cb351
https://github.com/llvm/llvm-project/commit/2ad69983d8b72d8a665a2552aac15517fe0cb351
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M .github/workflows/libclang-abi-tests.yml
Log Message:
-----------
workflows/libclang-abi-tests: Fix missing environment variable (#211959)
This was accidentally removed in
f6af6cedfd2fa731bf323608116d373379838b9a.
Commit: 6cdc7bd8c97b633f7095a5df32fb8003ee1b49b9
https://github.com/llvm/llvm-project/commit/6cdc7bd8c97b633f7095a5df32fb8003ee1b49b9
Author: Andrew Savonichev <andrew.savonichev at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
A llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-cas.s
Log Message:
-----------
[AArch64] Add CAS instructions to NeoverseN2 schedule model (#211195)
CAS instructions (B, H, W, X variants) are not described in the ARM
Neoverse N2 Software Optimization Guide. There used to be no schedule
model for them, so `llvm-mca` was unable to analyze code containing
these instructions:
llvm-mca -mtriple=aarch64 -mcpu=cortex-a78 -mattr=+lse casb.s
error: found an unsupported instruction in the input assembly
sequence, use -skip-unsupported-instructions=lack-sched to ignore
these on the input.
note: instruction: casb w0, w1, [sp]
The patch adds a basic schedule model of 14 cycles (as measured on
Cortex-A78 with llvm-exegesis) and L/S utilized pipelines (this is a
guess, the reality is likely more complicated).
Commit: 3fd07e32350c4f15a9377466ab4cffb042a1ecb7
https://github.com/llvm/llvm-project/commit/3fd07e32350c4f15a9377466ab4cffb042a1ecb7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Only override constant-context state if we have an EvalEmitter (#211475)
This does not make sense when emitting bytecode, as the bytecode would
just contain a `PushCC`/`PopCC` pair with nothing in between.
Commit: 4eeff3e309da3a5d827aadc6fb6915b968b23ad5
https://github.com/llvm/llvm-project/commit/4eeff3e309da3a5d827aadc6fb6915b968b23ad5
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxx/include/cmath
M libcxx/include/math.h
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
A libcxx/test/std/numerics/c.math/fpclassify.pass.cpp
Log Message:
-----------
[libc++][math] Add `constexpr` to `std::fpclassify` (#210993)
Adds `constexpr` to `std::fpclassify` as required by
[P0533R9](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf).
Towards https://github.com/llvm/llvm-project/issues/105174. Follows-up
8889a3d3b5154d7d5bd4e58ab10d3df503544742.
Commit: 545f9fab9ed84d55a97b3f08d306c0da70b625a6
https://github.com/llvm/llvm-project/commit/545f9fab9ed84d55a97b3f08d306c0da70b625a6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/AST/ByteCode/constexpr-steps.cpp
Log Message:
-----------
[clang][bytecode] Don't check global variable init size (#212092)
The current interpreter doesn't do this either. If we do, the clang
build fails because AMDGPUGenGlobalISel.inc: contains a global constexpr
array called MatchTable0 with 1'926'005 elements.
Commit: 5d582e4003b1cab59900d16fa3db9c3a9d16b462
https://github.com/llvm/llvm-project/commit/5d582e4003b1cab59900d16fa3db9c3a9d16b462
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
Log Message:
-----------
[LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (#212000)
analyze() numbers the dominator tree, scans it in reverse preorder for
header candidates, floods backward through the CFG from each header's
latches, then walks the CFG again to order the blocks.
Do all of it in one forward DFS, with the algorithm of Wei et al.,
"A New Algorithm for Identifying Loops in Decompilation", which
GenericCycleInfo already implements.
On an irreducible CFG that algorithm may return an irreducible superset
of the natural loop subset `discoverAndMapSubloop` would return.
(Depending on the successor visiting order, the algorithm may report a
reducible loop nested in an irreducible loop, where the reducible one
exactly matches `discoverAndMapSubloop`.)
To satisfy verifyLoop and LoopSimplify, reduce each such ireducible loop
to the natural loop of its header's backedges instead: the latches the
header dominates, and the blocks reaching them without passing the
header.
A function whose loops are all reducible needs no dominance query.
1000x require<loops> on sqlite3.bc: instructions -24%, cycles -14%.
Aided by Claude Opus 5
Commit: 5bafce4a37c7702f2ecb857eb18df6c211fc19bf
https://github.com/llvm/llvm-project/commit/5bafce4a37c7702f2ecb857eb18df6c211fc19bf
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes abd6e74 (#212081)
This fixes abd6e745e22e83af7986cdca4c1ba2d798e00156 (#196613).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=abd6e745e22e83af7986cdca4c1ba2d798e00156
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 653e7b05bbd7fbcaab3721ebfb2b3c2304f15ee4
https://github.com/llvm/llvm-project/commit/653e7b05bbd7fbcaab3721ebfb2b3c2304f15ee4
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_setschedparam_test.cpp
Log Message:
-----------
[libc][test][NFC] Fix pthread_setschedparam_test flakiness (#212067)
Synchronised child thread execution in pthread_setschedparam_test using
a mutex lock. This prevents race conditions where the child thread
exited before scheduling parameter assertions ran on multi-core
platforms such as aarch64.
Added missing pthread target dependencies to CMakeLists.txt.
Assisted-by: Automated tooling, human reviewed.
Commit: 75dff4f8527fe9a52d5f60b4c089162845f72080
https://github.com/llvm/llvm-project/commit/75dff4f8527fe9a52d5f60b4c089162845f72080
Author: David Green <david.green at arm.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Replace some used of SDValue.getNode()-> with direct accesses. NFC (#212099)
Commit: 2b660e0f1b6dce0484a2f83c02395a919a063ab2
https://github.com/llvm/llvm-project/commit/2b660e0f1b6dce0484a2f83c02395a919a063ab2
Author: Martin Storsjö <martin at martin.st>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/test/AST/ByteCode/virtual-bases.cpp
Log Message:
-----------
[clang] [test] Fix a new test on mingw (#212064)
This fixes running a new test that was added in
4b66bacd1fdf02803509b744034f3ab09945157c, in mingw environments.
The quirks that warranted adding the `!defined(_WIN32)` condition in the
test aren't actually specific to Windows in general, but specific to
MSVC environments - mingw environments behave just like other platforms.
Ideally we'd use `!defined(_MSC_VER)`, however in -cc1 mode, Clang
doesn't automatically define `_MSC_VER`; defining it requires setting a
command line option that the driver normally passes in MSVC mode.
Therefore, qualify the condition as `!defined(_MSC_VER) ||
defined(__MINGW32__)`.
Commit: 40daec88f9e2719c5c2caa05d6003c9effde18d3
https://github.com/llvm/llvm-project/commit/40daec88f9e2719c5c2caa05d6003c9effde18d3
Author: Martin Storsjö <martin at martin.st>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[docs] Remove release notes for backported changes (#212069)
Commit 68f703f3e58a52c41b39dfc654a675560b6c5614 added these release
notes, but this commit was backported to the 23.x release branch in
47e2df730a099583f16fc6fe64f0d2ffc5b7a16a (included in the 23.1.0 RC 1
tag).
Therefore, remove these release notes from the main branch (where they
would have been included in the 24.x release notes).
Commit: f5652b9800c997f3c76f84ea81de1175561ed59c
https://github.com/llvm/llvm-project/commit/f5652b9800c997f3c76f84ea81de1175561ed59c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Store type of expression inline, compute up front (NFC). (#211891)
Add SCEV::Type to store the expressions immutable type. This slightly
increases object size for most sub-types, but avoids more expensive
recomputing of the type repeatedly.
Improves compile time slightly overall, more in SCEV-heavy workloads.
* stage1-O3: -0.08%
* stage1-ReleaseThinLTO: -0.07%
* stage1-ReleaseLTO-g: -0.07%
* stage1-aarch64-O3: -0.07%
* stage2-O3: -0.08%
https://llvm-compile-time-tracker.com/compare.php?from=f9b12955f891bb086d12309d89656821d776e858&to=0e8df1e93422960640d0efd460212a463700a64a&stat=instructions:u
It looks like there's no notable increase in max-rss
https://llvm-compile-time-tracker.com/compare.php?from=f9b12955f891bb086d12309d89656821d776e858&to=0e8df1e93422960640d0efd460212a463700a64a&stat=max-rss
PR: https://github.com/llvm/llvm-project/pull/211891
Commit: f3b31871e9b8e0fe07c92c91854861365ea189a4
https://github.com/llvm/llvm-project/commit/f3b31871e9b8e0fe07c92c91854861365ea189a4
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/lib/Analysis/CFG.cpp
A clang/test/Analysis/lambda-capture-init-order.cpp
Log Message:
-----------
[clang][CFG] Fix lambda capture evaluation order (#211877)
Previously, the captures were emitted in their spelling order - but in
the CFG that gets translared in a reversed order.
Because of this, we need to emit them in reversed order to get them
appear in their natural order.
Fixes rdar://183140177
Commit: c4b89858f8f2d52d18007bc66a3a827c6bfa8151
https://github.com/llvm/llvm-project/commit/c4b89858f8f2d52d18007bc66a3a827c6bfa8151
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/redundant-expression.cpp
Log Message:
-----------
[clang-tidy] Fix nested macro false positives in misc-redundant-expression (#209385)
Apply the existing macro-origin filtering when comparing flattened
operands in nested expressions.
Closes https://github.com/llvm/llvm-project/issues/209373
Commit: 0acd2c54da07dceebb78e94d256ed211a82031b9
https://github.com/llvm/llvm-project/commit/0acd2c54da07dceebb78e94d256ed211a82031b9
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/rename_check.py
Log Message:
-----------
[clang-tidy] Support Markdown documentation in rename_check.py (#210577)
Part of https://github.com/llvm/llvm-project/issues/201242
Commit: 3678fa2b1ef60938ef61228145bb9c138367cf41
https://github.com/llvm/llvm-project/commit/3678fa2b1ef60938ef61228145bb9c138367cf41
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (#212035)
Previously we relied on `createUnreachableSwitchDefault` to remove
incoming edges in phi nodes and update DT. However, it also creates a
new unreachable BB and updates the default destination of the switch
instruction, which is about to be replaced by a branch instruction. This
patch inlines the function and removes logic about the new BB, to make
sure the DT is updated correctly.
This issue cannot be reproduced via
-simplifycfg-require-and-preserve-domtree=1. I just found it by checking
DT in requestResimplify (will be added after fixing all existing
issues). The following test covers this case:
https://github.com/llvm/llvm-project/blob/5bc304c65494702d9d4928ff6cb369e6e6496e53/llvm/test/Transforms/SimplifyCFG/switch-range-to-icmp.ll#L38-L73
Commit: 28c8e8931546057c01c517086b99a17230cd4d70
https://github.com/llvm/llvm-project/commit/28c8e8931546057c01c517086b99a17230cd4d70
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang-tools-extra/include-cleaner/unittests/TypesTest.cpp
M llvm/include/llvm/ADT/IntrusiveRefCntPtr.h
M llvm/include/llvm/Support/Compiler.h
M llvm/unittests/ADT/IntrusiveRefCntPtrTest.cpp
M llvm/unittests/Support/VirtualOutputBackendTest.cpp
Log Message:
-----------
[llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (#211795)
IntrusiveRefCntPtr has non-trivial ctor/dtor, thus unused variables
wouldn't trigger a warning by default. However, they should.
https://clang.llvm.org/docs/AttributeReference.html#warn-unused
Let's mark the class with this attribute get warned about them.
This would have helped catching #211518 and #211517.
Supersedes #211647.
Some tests had to be uplifted because some bots used `-Werror` for those tests.
Commit: c94c90b2efaa46520024b2bc8aa2caa30114cd55
https://github.com/llvm/llvm-project/commit/c94c90b2efaa46520024b2bc8aa2caa30114cd55
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
A clang/test/Analysis/z3/z3-atomic.c
Log Message:
-----------
[analyzer] Fix _Atomic crashes for Z3 symbolic execution (#212050)
This PR fixes _Atomic crashes for Z3 symbolic execution by passing the
types through getAtomicUnqualifiedType and getCanonicalType and skip
casting in fromCast if `FromTy == ToTy && FromBitWidth == ToBitWidth`.
Assisted-by: Codex
Commit: 9d601915fb9d3f4e6f7ee6e369ddff7fc20ad08d
https://github.com/llvm/llvm-project/commit/9d601915fb9d3f4e6f7ee6e369ddff7fc20ad08d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxxabi/test/cxa_vec_new_overflow_PR41395.pass.cpp
M libcxxabi/test/dynamic_cast.pass.cpp
M libcxxabi/test/test_aux_runtime_op_array_new.pass.cpp
M libcxxabi/test/uncaught_exceptions.pass.cpp
Log Message:
-----------
[libc++abi][NFC] Remove some XFAILs which never trigger (#211241)
The oldest library we support is from LLVM 12, so we can remove any
XFAILs for libraries built before that.
Commit: a81db64570f94c2ca8ac0f598c0b5bba1a7ae59e
https://github.com/llvm/llvm-project/commit/a81db64570f94c2ca8ac0f598c0b5bba1a7ae59e
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/string.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/src/__support/CPP/string_test.cpp
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][cpp::string] Allocate fewer temp strings in operator= and += (#210895)
This PR generally updates `cpp::string` to avoid incidental allocations.
Specifically, it:
- Updates `opreator=(string_view)` to avoid allocating a temporary
string:
https://github.com/llvm/llvm-project/blob/67ebc4b221c3e94028b33004cd5cd08deee95048/libc/src/__support/CPP/string.h#L106-L108
- Changes `operator+=(const string&)` to accept a `string_view` so that
strings may be appended without allocation.
- Makes the `string(string_view)` constructor explicit. Before, there
were non-obvious allocations because of the implicit conversion.
As a side effect, this PR has to more carefully handle self-assignment
and self-append. This PR updates append and assignment to avoid calling
`realloc` during append / assignment, as this may invalidate input
pointers held by `string_view` if they point to data held by the string.
This also fixes self-assignment, which previously didn't work, eg
`cpp::string s = "abc"; s = s;` would zero out `s`.
Commit: 150f33ce28956d80fc7617e477bb805ab062a28a
https://github.com/llvm/llvm-project/commit/150f33ce28956d80fc7617e477bb805ab062a28a
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/mismatch.h
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/mismatch/pstl.mismatch.pass.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/mismatch/pstl.mismatch_pred.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of a parallel std::mismatch() based on __pstl::__parallel_find() (#209291)
This PR adds a parallel version of `std::mismatch` as one of the backend
operations.
It also provides an implementation based on `__pstl::__parallel_find()`
which does the heavy lifting.
`libdispatch` and `std_thread` backends expose this implementation under
their backend tags, while the `serial` backend redirects the calls to
the serial `std::mismatch`.
4 flavours of the function are exposed: 3-legged, 3-legged with
predicate, 4-legged, 4-legged with predicate.
3-legged flavours are implemented in the `default` (`composition`)
backend by redirecting the call to the 4-legged flavours.
Included tests check that:
- Semantics of the iterator-only functions is correct.
- Semantics of the predicated functions is correct.
- Custom types are supported by the implementation.
- The functions correctly SFINAE out when the first argument is not an
execution policy.
- The `nodiscard` policy is followed.
- The `noexcept` policy is followed.
- `static_assert` verifies iterators' categories.
Part of #99938.
Commit: 5104dad7a15a6369aeb15658718144881c33642f
https://github.com/llvm/llvm-project/commit/5104dad7a15a6369aeb15658718144881c33642f
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/lib/Analysis/CFG.cpp
A clang/test/Analysis/cfg-compound-assignment-eval-order.cpp
M clang/test/Analysis/loopexit-cfg-output.cpp
M clang/test/Sema/warn-unreachable.c
Log Message:
-----------
[clang][CFG] Fix compound assignment evaluation order (#212115)
CompoundAssignOperator (e.g. `+=`, `-=`, `<<=`) is a distinct StmtClass
deriving from BinaryOperator, but it was not handled in the CFGBuilder
dispatch switches. As a result it fell through to the generic default
path (VisitChildren over reverse_children), which emits the LHS before
the RHS in the CFG.
Per C++17 [expr.ass]/1, all assignment operators - simple and compound -
sequence the right operand before the left operand. Route
CompoundAssignOperator through VisitBinaryOperator (and
VisitBinaryOperatorForTemporaries), whose existing isAssignmentOp()
branch already emits the RHS before the LHS, matching simple assignment.
This mirrors the class of evaluation-order defect fixed for lambda
captures in f3b31871e9b8.
rdar://183253943
Assisted-By: claude
Commit: 61517a81407d2a7353815dae7625caa1749b99ca
https://github.com/llvm/llvm-project/commit/61517a81407d2a7353815dae7625caa1749b99ca
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxx/include/fstream
Log Message:
-----------
[libc++][NFC] Inline fstream functions into the class body (#211738)
The `fstream` member functions are all really short, so inlining them
removes quite a bit of boiler plate code.
Commit: 286fcce7e75a4566a813c25f4ec5824533226265
https://github.com/llvm/llvm-project/commit/286fcce7e75a4566a813c25f4ec5824533226265
Author: Emmett <emmettzhang2020 at outlook.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/test/std/time/time.hms/time.hms.members/hours.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/is_negative.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/minutes.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/seconds.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/subseconds.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/to_duration.pass.cpp
Log Message:
-----------
[libc++][chrono] Implement LWG 4274: Allow chrono::hh_mm_ss to be constructed from unsigned durations (#209686)
**_Implementation details_**:
- Use `is_unsigned_v` instead of `numeric_limits<Rep>::is_signed`, which
is used by `chrono::abs`. `numeric_limits<Rep>::is_signed` may return
false when a custom `Rep` does not specialize `numeric_limits`. Relying
on it to detect the unsigned case could therefore be unreliable for such
a type. `is_unsigned_v` instead gives a compile-time path for built-in
unsigned types, while the sign check keeps signed types correct.
- The constructor calls `__abs_d` four times because each member is
initialized separately. This should not affect runtime performance
because the compiler should inline `__abs_d` and eliminate the repeated
calculations. We could use another helper function or helper class to
explicitly compute the absolute duration only once. However, this would
add extra glue code, and the added complexity is not worthwhile I think.
---------
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: bdd8c64a2ae89cc9d860bd3b37b1bb782ccde077
https://github.com/llvm/llvm-project/commit/bdd8c64a2ae89cc9d860bd3b37b1bb782ccde077
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv-unsupported.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fold trivial integer division and remainder (#212074)
Add value-preserving folds mirroring LLVM's InstructionSimplify for the
integer division and remainder ops:
```
divui/divsi/ceildivui/ceildivsi/floordivsi(0, x) -> 0
divui/divsi/ceildivui/ceildivsi/floordivsi(x, x) -> 1
remui/remsi(0, x) -> 0
remui/remsi(x, x) -> 0
```
The self and zero-dividend cases are valid refinements because division
or remainder by zero is undefined behaviour; no overflow flags are
required. The folds return a scalar or splat constant and bail out on
shaped types with a dynamic shape.
Folding `x / 0` and `x % 0` to poison is left as a TODO: it would make
the arith dialect depend on the ub dialect to materialize `ub.poison`.
LLVM performs the same simplifications: https://godbolt.org/z/dzTjYjs4e
Verified with Alive2:
| Fold | udiv | sdiv | urem | srem |
| :--- | :---: | :---: | :---: | :---: |
| `x / x -> 1`, `x % x -> 0` | [✓](https://alive2.llvm.org/ce/z/YjZCEA)
| [✓](https://alive2.llvm.org/ce/z/BSWQrm) |
[✓](https://alive2.llvm.org/ce/z/gx5sRH) |
[✓](https://alive2.llvm.org/ce/z/VUYkr4) |
| `0 / x -> 0`, `0 % x -> 0` | [✓](https://alive2.llvm.org/ce/z/keqeCZ)
| [✓](https://alive2.llvm.org/ce/z/jyf5wm) |
[✓](https://alive2.llvm.org/ce/z/fZa6ND) |
[✓](https://alive2.llvm.org/ce/z/fo6ss8) |
----
Code generated by Claude Code.
Signed-off-by: Víctor Pérez Carrasco <victor.pc.upm at gmail.com>
Commit: 14304efe26ea430029ab00fb345f041b62069097
https://github.com/llvm/llvm-project/commit/14304efe26ea430029ab00fb345f041b62069097
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/IR/Instructions.cpp
M llvm/unittests/IR/InstructionsTest.cpp
Log Message:
-----------
[IR] Remove deprecated BranchInst (#212095)
The migration to UncondBr/CondBr was finished in LLVM 23. BranchInst has
no remaining uses in-tree. Let's finish this by removing BranchInst.
https://discourse.llvm.org/t/rfc-split-branchinst-into-uncondbr-and-condbr/90022
Deprecated with: https://github.com/llvm/llvm-project/pull/187314
Commit: 06fb5203c6398df1ab72788eee91a6cea36b0a0b
https://github.com/llvm/llvm-project/commit/06fb5203c6398df1ab72788eee91a6cea36b0a0b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/utils/gn/README.rst
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/build/buildflags.gni
M llvm/utils/gn/build/symlink_or_copy.gni
M llvm/utils/gn/build/toolchain/BUILD.gn
M llvm/utils/gn/secondary/BUILD.gn
M llvm/utils/gn/secondary/bolt/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/tool/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/xpc/framework/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ar/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cxxfilt/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwp/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-libtool-darwin/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-lipo/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-nm/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-rc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readobj/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-size/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-strings/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
Log Message:
-----------
Revert "gn build: Support building debug binaries from a release build directory." (#211294)
This reverts commit 611d015f0030e0d4f1b3bd2270205f6f6b6e20eb.
Breaks building, see
https://github.com/llvm/llvm-project/pull/197843#issuecomment-5025645797
Commit: 07b5c31ae23afb13609a55af9b4050c94a71ae29
https://github.com/llvm/llvm-project/commit/07b5c31ae23afb13609a55af9b4050c94a71ae29
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
A llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
R llvm/test/Transforms/ConstraintElimination/retry-without-decomposition.ll
Log Message:
-----------
[ConstraintElim] Re-organize tests with decomposition failures (NFC). (#212130)
Add more tests for failed decomposition, consolidate them in
partial-decomposition.ll.
Commit: 1d349c710c33026655d9d6952785e1867f5af97e
https://github.com/llvm/llvm-project/commit/1d349c710c33026655d9d6952785e1867f5af97e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 150f33ce2895 (#212136)
Commit: 1f48ea0f6334d1085bd1b13cd303f04f7af64bd8
https://github.com/llvm/llvm-project/commit/1f48ea0f6334d1085bd1b13cd303f04f7af64bd8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
Log Message:
-----------
[libc++] Removing traiilng whitespace at line end in CMakeLists.txt (#212135)
Follow-up to #209291.
Commit: f3f2cd6844f606b804c76e06dca0b9c18af3ec04
https://github.com/llvm/llvm-project/commit/f3f2cd6844f606b804c76e06dca0b9c18af3ec04
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port a434fe87cce7 (#212137)
Commit: 7bbaa66b88b9c551d0b8f9835ebe5e253e351d5c
https://github.com/llvm/llvm-project/commit/7bbaa66b88b9c551d0b8f9835ebe5e253e351d5c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Reapply "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003) (#211763)
This reverts commit 4c7948d06c93e8d233cd4733fd4107f3b68bc7bc. The commit
always constructs slot on first use, to fix compile-time regressions in
release builds.
Original message:
VPRecipeBase::dump() constructs a fresh VPSlotTracker instance on each
call. VPSlotTracker construction requires iterating over all recipes in
the plan, to number all VPValues.
To avoid doing lots of unnecessary work when printing VPlan costs,
construct a shared VPSlotTracker in VPCostContext, re-used by all
prints.
This can speed up debug output for large loops.
PR: https://github.com/llvm/llvm-project/pull/203386
Commit: 39eb2a11a21927832091b54f25dc4a8bd1c61604
https://github.com/llvm/llvm-project/commit/39eb2a11a21927832091b54f25dc4a8bd1c61604
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
R clang/test/CIR/CodeGen/coro-exceptions.cpp
R clang/test/CIR/CodeGen/coro-task.cpp
A clang/test/CIR/CodeGenCoroutines/Inputs/coroutine.h
A clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
A clang/test/CIR/CodeGenCoroutines/coro-task.cpp
Log Message:
-----------
[CIR][NFC] Reorganize coroutine tests (#211152)
Move the coroutine tests into a dedicated CodeGenCoroutines directory.
This is a test only reorganization in preparation for upcoming
coroutine-related changes.
Commit: 814a883c3c814a98abbdd30c3320553624d59cc2
https://github.com/llvm/llvm-project/commit/814a883c3c814a98abbdd30c3320553624d59cc2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionDivision.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M polly/include/polly/Support/SCEVAffinator.h
M polly/lib/Support/SCEVAffinator.cpp
M polly/lib/Support/SCEVValidator.cpp
M polly/lib/Support/ScopHelper.cpp
Log Message:
-----------
[SCEV] Remove ptrtoint expression (NFC). (#212038)
Follow-up to https://github.com/llvm/llvm-project/pull/180244 to remove
the now unused SCEVPtrToIntExpr.
PR: https://github.com/llvm/llvm-project/pull/212038
Commit: 4068f4d2e0f30626e2f0fdf716e62624519bdd5e
https://github.com/llvm/llvm-project/commit/4068f4d2e0f30626e2f0fdf716e62624519bdd5e
Author: Kirill A. Korinsky <kirill at korins.ky>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
A lld/test/ELF/eh-frame-dynrel-offset.s
Log Message:
-----------
[ELF] Fix dynamic relocations in .eh_frame (#210967)
scanEhSection translates input offsets to merged .eh_frame offsets
before creating dynamic relocations. DynamicReloc::getOffset translated
them a second time through EhInputSection.
Use the synthetic parent for already merged offsets, and use the
finalized relocation offset when verifying applied addends.
---------
Co-authored-by: Fangrui Song <i at maskray.me>
Commit: 99a8141b11cd8175b3d2fd81a83786083b6e7501
https://github.com/llvm/llvm-project/commit/99a8141b11cd8175b3d2fd81a83786083b6e7501
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libc/test/integration/src/pthread/pthread_barrier_test.cpp
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/time/localtime_r_test.cpp
Log Message:
-----------
[libc][test][NFC] Fix compiler warnings in libc tests (#212100)
Resolved compiler warnings in several libc unit and integration tests:
- Fixed -Wmissing-designated-field-initializers in localtime_r_test.cpp
by using zero-initialisation instead of partial designated initialisers.
- Fixed -Wimplicit-int-conversion in sigaltstack_test.cpp by explicitly
casting the loop index to uint8_t.
- Fixed -Wunused-parameter in pthread_barrier_test.cpp by omitting
unused parameter names in function definitions.
Assisted-by: Automated tooling, human reviewed.
Commit: 6a2bdfeea8c3ada0f9ca2d4d7b2d391f75ab4541
https://github.com/llvm/llvm-project/commit/6a2bdfeea8c3ada0f9ca2d4d7b2d391f75ab4541
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Driver.cpp
A lld/test/ELF/sparcv9-abs-pic.s
A lld/test/ELF/sparcv9-reloc-got.s
Log Message:
-----------
[ELF,SPARC] Support ABS and RELATIVE dynamic relocations (#212155)
... and test some previously uncovered GOT relocation types.
Test convention follows ppc32-*, which I added in 2019.
The SPARC psABI only defines Elf64_Rela. Add EM_SPARCV9 to getIsRela so
that dynamic relocations use .rela.dyn/.rela.plt instead of the
unsupported SHT_REL form.
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Commit: 677f13efef9c48acdfba73703344c5234a04ae9e
https://github.com/llvm/llvm-project/commit/677f13efef9c48acdfba73703344c5234a04ae9e
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fix folds crashing on dynamic-shaped tensors (#212072)
`Builder::getZeroAttr` asserts when asked to build a constant of a
ranked tensor with a dynamic shape (`DenseElementsAttr` requires a
static shape). Three self-identity folds/patterns reached it without a
guard and aborted on dynamic-shaped operands:
```mlir
arith.xori %x, %x : tensor<?xi32>
arith.subui_extended %x, %x : tensor<?xi32>, tensor<?xi1>
arith.subi (arith.subi %a, %b), %a : tensor<?xi32> (SubISubILHSRHSLHS)
```
Guard each with a static-shape check (as `arith.subi(x,x)` already does)
so they leave the op unfolded instead of crashing. The TableGen pattern
gets a new `IsScalarOrHasStaticShape` constraint.
Signed-off-by: Víctor Pérez Carrasco <victor.pc.upm at gmail.com>
Commit: af1a3d2591f236613306a317018e855b6a388538
https://github.com/llvm/llvm-project/commit/af1a3d2591f236613306a317018e855b6a388538
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M lld/ELF/Arch/SPARCV9.cpp
M lld/test/ELF/sparcv9-reloc-got.s
A lld/test/ELF/sparcv9-reloc-pc.s
A lld/test/ELF/sparcv9-reloc-range.s
M lld/test/ELF/sparcv9-reloc.s
Log Message:
-----------
[ELF,SPARC] Handle more relocation types and fix simm13 field writes (#212157)
Add the absolute (R_SPARC_8/16/UA16, R_SPARC_13, R_SPARC_HIX22/LOX10),
PC-relative (R_SPARC_DISP8/16/64, R_SPARC_WDISP16/19/22) and GOT
(R_SPARC_GOT13) forms. The assembler emits these, but lld reports
"unknown relocation".
Since aff950e95d4a, R_SPARC_LO10, R_SPARC_HM10 and R_SPARC_L44 clear the
whole simm13 field while writing only its low 10, 10 and 12 bits,
dropping
bits that GNU ld preserves. Narrow each mask to the bits it writes.
Give R_SPARC_PC22 its own case, as a displacement needing a range check.
Express the R_SPARC_HI22 and R_SPARC_H44 checks in terms of the
unshifted
value to improve the diagnostic, and drop the R_SPARC_HH22 check, which
no 64-bit value can fail.
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Co-authored-by: LemonBoy <thatlemon at gmail.com>
Co-authored-by: Alex Rønne Petersen <alex at alexrp.com>
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Co-authored-by: LemonBoy <thatlemon at gmail.com>
Co-authored-by: Alex Rønne Petersen <alex at alexrp.com>
Commit: a54947f4061498fa5aadf2f8e832ae96a3405c4d
https://github.com/llvm/llvm-project/commit/a54947f4061498fa5aadf2f8e832ae96a3405c4d
Author: wanglei <wanglei at loongson.cn>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/LoongArch.h
A clang/test/Sema/inline-asm-validate-loongarch.c
Log Message:
-----------
[Clang][LoongArch] Implement getConstraintRegister for LoongArch (#210898)
Implement `getConstraintRegister` so Clang can diagnose inline asm
register clobber conflicts for LoongArch, matching GCC.
Commit: e4205abdad5081abbb393c0d2f6286695eb772eb
https://github.com/llvm/llvm-project/commit/e4205abdad5081abbb393c0d2f6286695eb772eb
Author: wanglei <wanglei at loongson.cn>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
Log Message:
-----------
[LoongArch] Simplify addReloc relocation handling. NFC (#211755)
Remove the unused return value of addReloc and simplify the control
flow for linker relaxation and PC-relative relocation handling.
Commit: e9240abc521a7dbc1ee15f0e705b95f0e71ff987
https://github.com/llvm/llvm-project/commit/e9240abc521a7dbc1ee15f0e705b95f0e71ff987
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang/lib/Index/IndexSymbol.cpp
M clang/test/Index/index-refs.cpp
M clang/test/Index/index-template-specialization.cpp
Log Message:
-----------
[clangd] Respect ArgumentLists for struct templates (#212094)
Also fix a bug in index::getSymbolKind where the returned symbol kind
would be Class for a struct template.
Fixes https://github.com/clangd/clangd/issues/2684
Commit: 43a704b657423a0eead02e64911b413c4afca73f
https://github.com/llvm/llvm-project/commit/43a704b657423a0eead02e64911b413c4afca73f
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.h
A lld/test/ELF/sparcv9-plt.s
M lld/test/ELF/sparcv9-reloc-got.s
Log Message:
-----------
[ELF,SPARC] Add the GOT header entry and place R_SPARC_JMP_SLOT in .plt (#212161)
SPARC dynamic linker finds _DYNAMIC by dereferencing the GOT pointer
register (glibc elf_machine_dynamic), so reserve .got[0] for it. It
resolves a PLT entry by rewriting the entry's instructions (glibc
sparc64_fixup_plt), so R_SPARC_JMP_SLOT applies to .plt and there is no
.got.plt.
Add TargetInfo::usesGotPlt, which SPARC sets to false, and use it to
place the relocation and derive the sh_info of .rela.plt. The four
reserved PLT entries stay zeroed, as with GNU ld; the dynamic linker
fills in .PLT0 and .PLT1 at startup.
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Co-authored-by: LemonBoy <thatlemon at gmail.com>
Commit: 27bf172508608a1a55ac74aeb9830b8340a77af5
https://github.com/llvm/llvm-project/commit/27bf172508608a1a55ac74aeb9830b8340a77af5
Author: Jin Huang <jinhuang1102 at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/coro-split-00.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (#211970)
The previous https://github.com/llvm/llvm-project/pull/184466 didn't fix
the PGO profile in select instruction in
[replaceSwitchResumeCoroFree](https://github.com/jinhuang1102/llvm-project/blob/98668ee1485aa47e97cbb900bc22e0d9e1c8d795/llvm/lib/Transforms/Coroutines/CoroSplit.cpp#L207)
function in `CoroSplit.cpp` so triggered a profile verification failure:
https://lab.llvm.org/buildbot/#/builders/223/builds/7899
This PR attach unknown branch weights to the created `select`
instruction see the comment for more information.
Cmake config:
```
cmake -GNinja -DCMAKE_BUILD_TYPE=Debug -DLLVM_ENABLE_ASSERTIONS=ON -DCMAKE_C_COMPILER_LAUNCHER=ccache -DCMAKE_CXX_COMPILER_LAUNCHER=ccache -DLLVM_LIT_ARGS=--exclude-xfail -DLLVM_ENABLE_PROFCHECK=ON ../llvm-project/llvm
```
Verified by
```
$ bin/llvm-lit -v /usr/local/google/home/jingold/llvm-project/llvm/test/Transforms/Coroutines
-- Testing: 170 tests, 128 workers --
PASS: LLVM :: Transforms/Coroutines/coro-spill-defs-before-corobegin.ll (1 of 170)
...
PASS: LLVM :: Transforms/Coroutines/coro-split-resume-entry-count.ll (121 of 170)
PASS: LLVM :: Transforms/Coroutines/coro-split-resume-entry-count-no-suspend.ll (149 of 170)
PASS: LLVM :: Transforms/Coroutines/coro-split-resume-fallthrough-destroy-slot.ll (155 of 170)
...
PASS: LLVM :: Transforms/Coroutines/coro-readnone-02.ll (170 of 170)
Testing Time: 0.70s
Total Discovered Tests: 170
Passed: 170 (100.00%)
```
Co-authored-by: Jin Huang <jingold at google.com>
Commit: 19cdc69bac7eff9f8e701aa8281c4f4cab528687
https://github.com/llvm/llvm-project/commit/19cdc69bac7eff9f8e701aa8281c4f4cab528687
Author: LukeZhuang <luke.zhuang at linux.alibaba.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/test/CodeGen/RISCV/tlsdesc-clobber-vector.ll
M llvm/test/CodeGen/RISCV/tlsdesc-clobber.ll
Log Message:
-----------
[RISCV] Declare TLSDESC clobbers for vector registers and CSRs per psABI (#205027)
RISC-V's ABI states that, aside from V extension state, only a0 and t0
are clobbered by TLSDESC resolvers. The original specification was to
also not clobber any V extension state, but due to implementation
concerns an ABI-breaking change has been made[1] to clobber all V
extension state.
This patch adds V-regs/csrs clobbering to the existing PseudoLA_TLSDESC
and PseudoTLSDESCCall in RISCVInstrInfo.td, as well as an additional
test covering the V-register clobber and V-CSRs clobber cases.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/496
Commit: 93496734598ab9ea7b15d7f5d992751741a54691
https://github.com/llvm/llvm-project/commit/93496734598ab9ea7b15d7f5d992751741a54691
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fold trivial shifts (`0<<x`, `x>>x`, `-1>>x`) (#212159)
Add value-preserving folds mirroring LLVM's InstructionSimplify for the
integer shift ops:
```
shli/shrui/shrsi(0, x) -> 0
shrui/shrsi(x, x) -> 0
shrsi(-1, x) -> -1
```
A shift amount greater than or equal to the bit width yields poison, so
refining these cases to a constant is valid. For `shr(x, x)` any
in-range amount `v` satisfies `v >> v == 0 (v < 2^v)`.
Folding an out-of-range shift amount (`c >= bit width`) to poison is
left as a TODO: it would make the arith dialect depend on the ub dialect
to materialize `ub.poison`.
LLVM performs the same simplifications: https://godbolt.org/z/7hsMz9E7Y
Verified with Alive2:
| Fold | shl | lshr | ashr |
| :--- | :---: | :---: | :---: |
| `0 << x`, `0 >> x -> 0` | [✓](https://alive2.llvm.org/ce/z/Sz2fT1) |
[✓](https://alive2.llvm.org/ce/z/mlq7k6) |
[✓](https://alive2.llvm.org/ce/z/jbeNH9) |
| `x >> x -> 0` | — | [✓](https://alive2.llvm.org/ce/z/JCPBCZ) |
[✓](https://alive2.llvm.org/ce/z/YLjo3M) |
| `-1 >> x -> -1` | — | — | [✓](https://alive2.llvm.org/ce/z/sT6pNC) |
---
Code partially generated by Claude Code.
Signed-off-by: Víctor Pérez Carrasco <victor.pc.upm at gmail.com>
Commit: 89c0b16768b4b83d86e0aeda47df813274e6d2db
https://github.com/llvm/llvm-project/commit/89c0b16768b4b83d86e0aeda47df813274e6d2db
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/Dominators.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/lib/IR/Dominators.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/unittests/Support/GenericDomTreeTest.cpp
Log Message:
-----------
[DomTree] Define the members calling the construction algorithms out of line. NFC (#212145)
DominatorTreeBase defines some functions that call into into
DomTreeBuilder, whose algorithms live in GenericDomTreeConstruction.h.
A translation unit including only GenericDomTree.h inlines the member
and calls the algorithm, which just Dominators.cpp provides, through ten
explicit instantiations. Elsewhere the algorithm survives only where the
inliner leaves a use of it.
A previous revision of #212098 gave LoopInfoBase a member calling
recalculate, so instantiating LoopInfoBase in CFGLoopInfo.cpp referenced
an algorithm that no translation unit defines:
```
ld.lld: error: undefined symbol: void llvm::DomTreeBuilder::Calculate<llvm::DominatorTreeBase<mlir::Block, false>>(llvm::DominatorTreeBase<mlir::Block, false>&)
>>> referenced by CFGLoopInfo.cpp
```
Define those members in GenericDomTreeConstruction.h. Such a caller then
calls the member out of line, and the explicit instantiation of the
class that each dominator tree owner already has emits it.
Negligible size decreases for all of opt/llc/mlir-opt/llvm-bolt
Aided by Claude Opus 5
Commit: 3f170b5b76177f270765673d528aee9b318106fe
https://github.com/llvm/llvm-project/commit/3f170b5b76177f270765673d528aee9b318106fe
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
Log Message:
-----------
[mlir] Fix warning, NFC (#211204)
Commit: 8c57bdb49de322cd910ed6a6e2a873d64770006f
https://github.com/llvm/llvm-project/commit/8c57bdb49de322cd910ed6a6e2a873d64770006f
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M llvm/include/llvm/BinaryFormat/DynamicTags.def
M llvm/lib/Object/ELF.cpp
M llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test
Log Message:
-----------
[X86] Add dynamic tags support for llvm-readobj and lldb per psABI (#207661)
Commit: 13706f1c73b91f74a8a555748b68362fbb5d698f
https://github.com/llvm/llvm-project/commit/13706f1c73b91f74a8a555748b68362fbb5d698f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
Log Message:
-----------
AMDGPU: Migrate misc. tests to subarch triples (#211585)
Commit: 5271fd9e65fb235fedd484cfc3710679744bdf46
https://github.com/llvm/llvm-project/commit/5271fd9e65fb235fedd484cfc3710679744bdf46
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/CoreTypes.h
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Session::HandlerTag -> orc_rt_ControllerHandlerTag (#212173)
Replace the `Session::HandlerTag = void*` type alias with
orc_rt_ControllerHandlerTag. The intent is both to make this type
accessible to the C API, and to rename it to clarify its role as a tag
for handlers in the controller that are callable by the executor.
Commit: 820b5cb6d9fe8feda01fbb8b86d68aea10c63130
https://github.com/llvm/llvm-project/commit/820b5cb6d9fe8feda01fbb8b86d68aea10c63130
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/TableGen/aarch64-register-info-stats.td
Log Message:
-----------
[AArch64] Mark ZT0 register class as non-allocatable (#211750)
ZT0 is not available for register allocation, define it with the other
non-allocatable SME register classes and avoid an unnecessary pressure
set.
Assisted-by: codex
Commit: ed3470ffd1222be4aa4d6f938e6ba0fae5a2fad7
https://github.com/llvm/llvm-project/commit/ed3470ffd1222be4aa4d6f938e6ba0fae5a2fad7
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Fix -Wc++11-narrowing error in addPltEntry (#212185)
PR #212161 passes the `uint8_t isPreemptible : 1` bit-field straight
into a braced-init-list slot whose parameter type is `bool`.
Older clang (<20 ?) incorrectly rejects it.
```
error: non-constant-expression cannot be narrowed from type 'uint8_t' (aka 'unsigned char') to 'bool' in initializer list [-Wc++11-narrowing]
```
Commit: 0cc7159125eacd3abdff94eb7e634c1a8f889d1e
https://github.com/llvm/llvm-project/commit/0cc7159125eacd3abdff94eb7e634c1a8f889d1e
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_test.cpp
Log Message:
-----------
[sanitizer_common][tests] Skip MemoryMapping::ParseUnixMemoryProfile … (#212114)
…etc. on NetBSD
The `Sanitizer-x86_64-Test` test doesn't link on NetBSD/amd64 10.1:
```
/usr/bin/ld: /usr/bin/ld: DWARF error: invalid or unhandled FORM value: 0x25
SANITIZER_TEST_OBJECTS.sanitizer_procmaps_test.cpp.x86_64.o: in function `__sanitizer::MemoryMapping_ParseUnixMemoryProfile_Test::TestBody()':
sanitizer_procmaps_test.cpp:(.text._ZN11__sanitizer41MemoryMapping_ParseUnixMemoryProfile_Test8TestBodyEv+0x52): undefined reference to `__sanitizer::ParseUnixMemoryProfile(void (*)(unsigned long, unsigned long, bool, unsigned long*), unsigned long*, char*, unsigned long)'
/usr/bin/ld: SANITIZER_TEST_OBJECTS.sanitizer_procmaps_test.cpp.x86_64.o: in function `__sanitizer::MemoryMapping_ParseUnixMemoryProfileTruncated_Test::TestBody()':
sanitizer_procmaps_test.cpp:(.text._ZN11__sanitizer50MemoryMapping_ParseUnixMemoryProfileTruncated_Test8TestBodyEv+0x17a): undefined reference to `__sanitizer::ParseUnixMemoryProfile(void (*)(unsigned long, unsigned long, bool, unsigned long*), unsigned long*, char*, unsigned long)'
```
Fixed by skipping the affected subtest.
Tested on `amd64-pc-netbsd10.1` and `x86_64-pc-linux-gnu`.
Commit: b66306c2419ecbb5e02e63728c54814647f0e06c
https://github.com/llvm/llvm-project/commit/b66306c2419ecbb5e02e63728c54814647f0e06c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AArch64/select_fmf.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/select-nsz-known-values-to-fmin-fmax.ll
Log Message:
-----------
[SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (#187738)
The right place to form these is DAGCombine, not SDAGBuilder. This
removes the SPNB_RETURNS_ANY case, the SPNB_RETURNS_OTHER is left to a
followup. We need to propagate FMF flags in a few more places to make
this work.
Commit: 102f572188c5dbf89d92bf533a4bdc4fed1d89bd
https://github.com/llvm/llvm-project/commit/102f572188c5dbf89d92bf533a4bdc4fed1d89bd
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/unittests/CAS/OnDiskCASLoggerTest.cpp
Log Message:
-----------
[llvm][cas] Fix OnDiskCASLoggerTest.cpp compilation on NetBSD (#212113)
`CAS/OnDiskCASLoggerTest.cpp` doesn't compile on NetBSD/amd64:
```
In member function `virtual void OnDiskCASLoggerTest_MultiProcess_Test::TestBody()':
llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:230:19: error: reference to `Wait' is ambiguous
230 | auto Result = Wait(PI, /*Timeout=*/15, &Error);
| ^~~~
In file included from llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:15:
llvm/include/llvm/Support/Program.h:212:22: note: candidates are: `llvm::sys::ProcessInfo llvm::sys::Wait(const llvm::sys::ProcessInfo&, std::optional<unsigned int>, std::string*, std::optional<llvm::sys::ProcessStatistics>*, bool)'
212 | LLVM_ABI ProcessInfo Wait(
| ^~~~
In file included from llvm/include/llvm/Support/RWMutex.h:17,
from llvm/include/llvm/Support/ThreadPool.h:21,
from llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:16:
llvm/include/llvm/Support/Threading.h:60:40: note: `llvm::InitStatus llvm::Wait'
60 | enum InitStatus { Uninitialized = 0, Wait = 1, Done = 2 };
| ^~~~
```
This patch removes the ambiguity, matching other uses.
Tested on `amd64-pc-netbsd10.1` and `x86_64-pc-linux-gnu`.
Commit: f91647a732298131e86fc4f465b20b80105f35d6
https://github.com/llvm/llvm-project/commit/f91647a732298131e86fc4f465b20b80105f35d6
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/utils/release/test-release.sh
Log Message:
-----------
[llvm][release] Build openmp as runtime in test-release.sh (#212111)
`test_release.sh` tries to build `openmp` as a project, which breaks the
build:
```
CMake Error at CMakeLists.txt:155 (message):
Support for the LLVM_ENABLE_PROJECTS=openmp build mode has been removed.
Please switch to the bootstrapping build
cmake -S <llvm-project>/llvm -B build -DLLVM_ENABLE_PROJECTS=clang -DLLVM_ENABLE_RUNTIMES=openmp
or to the runtimes default build
cmake -S <llvm-project>/runtimes -B build -DLLVM_ENABLE_RUNTIMES=openmp
```
This patch switches it to a runtime to match.
Tested on `x86_64-pc-linux-gnu`.
Commit: 30a1b346f5c84504e5e998cb45e6551d21645e21
https://github.com/llvm/llvm-project/commit/30a1b346f5c84504e5e998cb45e6551d21645e21
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A orc-rt/include/orc-rt/StringExtras.h
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/StringExtrasTest.cpp
Log Message:
-----------
[orc-rt] Add StringExtras::join from llvm/adt and tests (#212179)
Tests are appropriate to the use cases that will follow in a PR to
follow.
Commit: 5c0a7212c8c8c46969489ae1ee85df1141a76bbb
https://github.com/llvm/llvm-project/commit/5c0a7212c8c8c46969489ae1ee85df1141a76bbb
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/OperatingSystem.h
Log Message:
-----------
[lldb][NFC] Add documentation for OperatingSystem methods (#210968)
Commit: 3deca05e273382820a164e7acf3efe0c0e441a23
https://github.com/llvm/llvm-project/commit/3deca05e273382820a164e7acf3efe0c0e441a23
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/TableGen/aarch64-register-info-stats.td
Log Message:
-----------
[AArch64] Remove unused GPR32arg register class (NFC) (#211778)
GPR32arg was added alongside GPR64arg in fcbec02ea6fb, but has no users
outside the register info generated by TableGen.
Assisted-by: codex
Commit: bb75638cb7fa090bb6e4c4c3e6e15e693a69b1d1
https://github.com/llvm/llvm-project/commit/bb75638cb7fa090bb6e4c4c3e6e15e693a69b1d1
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
Log Message:
-----------
[LifetimeSafety][NFC] Refactor AccessPath and Loan representations
(#180369)
This patch refactors the internal representations of `AccessPath` and
`Loan` to support path elements, preparing for field-sensitive and
interior-sensitive lifetime tracking.
* Introduces `PathElement` representing a field or interior dereference.
* Refactors `AccessPath` to contain a base and a list of `PathElement`s.
* Updates `Loan` and `LoanManager` to use the new `AccessPath`
structure.
---
Old PR description:
Refactor loan representation to use structured access paths, enabling
more precise borrow tracking and detection of use-after-invalidation.
Previously, loans were associated only with top-level storage (e.g., a
variable `x`, temporary `t`). This was insufficient for reasoning about
borrows of sub-objects (interior memory regions), such as fields (`x.f`)
or container elements (`vec[0]`), or for modelling views like
`string_view` which borrow the interior of an object.
We modify `AccessPath`, which now consists of a `base` (a _variable_,
_temporary_, or _placeholder_ for _parameters/'this'_) and a sequence of
`PathElements`. A `PathElement` can be a field access (`.field`) or an
interior access (denoted as `.*`), representing an unnamed interior
memory region of an object, like the character buffer of a
`std::string`.
High-level changes:
* `PathLoan` and `PlaceholderLoan` are merged into a single Loan class,
containing an `AccessPath`.
* **Path-Based Expiry**: `ExpireFact` is changed from expiring a single
loan to expiring an `AccessPath`. If `x` goes out of scope, any loan
whose path starts with `x` (e.g., loans to `x`, `x.field`, `x.field.*`)
is now considered expired. The checker uses `isPrefixOf` to detect this.
* **Path Extension in Flows**: `OriginFlowFact` now supports extending
loan paths:
* Field access like for expression `obj.field` extends loans to `obj`
into loans to `obj.field`.
* Owner-to-view conversions like `std::string_view s(str)` extend loans
to `str` into loans to `str.*`.
* **Invalidation**: Container invalidation methods (e.g.,
`vec.push_back()`) invalidate loans whose path is a strict extension of
the container's path (e.g., loans to `vec.*` but not loans to `vec`).
The checker uses `isStrictPrefixOf`.
* **Move-Tracking**: Moves are now tracked based on path prefixes via
`isPrefixOf`.
This refactoring enables detection of use-after-invalidation bugs for
STL containers specially when the container appears as fields.
Commit: d211ecfc817f73e1395a0dc32e45b84de7b9bdb3
https://github.com/llvm/llvm-project/commit/d211ecfc817f73e1395a0dc32e45b84de7b9bdb3
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A mlir/test/Integration/Dialect/EmitC/inline-oz-test-model-tosa.mlir
A mlir/test/Integration/Dialect/EmitC/regalloc-eviction-test-model-tosa.mlir
Log Message:
-----------
Add TOSA -> EmitC tests for MLGO mock models (#211833)
These tests are the first step towards monitoring the recently enabled
TOSA -> EmitC path that ML optimization models will switch to, for a
fully in-tree, framework free serving alternative.
For simplicity, yet testing the core functionality, these tests don't
use production models, but rather in-tree mock models, generated by
these scripts:
[llvm/lib/Analysis/models/gen-regalloc-eviction-test-model.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/gen-regalloc-eviction-test-model.py)
/
[llvm/lib/Analysis/models/gen-inline-oz-test-model.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/gen-inline-oz-test-model.py)
\+
[llvm/lib/Analysis/models/saved-model-to-tflite.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/saved-model-to-tflite.py)
+
[tosa-converter-for-tflite](https://www.piwheels.org/project/tosa-converter-for-tflite/)
> Note: `saved-model-to-tflite.py` renames the TFLite converted
SavedModel function to `main()`, which causes `clang` errors. Changing
this behaviour requires interventions in Tensorflow, which are out of
scope. Therefore, the functions were manually renamed.
> Note: The includes passed by argument to `clang` should have been
handled by EmitC. This only becomes a problem when compiling these
models standalone. Embedding the models in LLVM does not cause issues.
Nonetheless, future work will ensure `ConvertToEmitC` includes required
libraries for these ops.
Commit: 3b6e754c0a048f034d7241a4eac6ccc8b3d0134c
https://github.com/llvm/llvm-project/commit/3b6e754c0a048f034d7241a4eac6ccc8b3d0134c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/test/AST/ByteCode/amdgpu-nullptr.cl
M clang/test/AST/ast-dump-amdgpu-types.c
M clang/test/Analysis/addrspace-null.c
M clang/test/Analysis/cast-value-notes.cpp
M clang/test/Analysis/element-region-address-space.c
M clang/test/Analysis/ptr-cmp-const-trunc.cl
M clang/test/Analysis/solver-sym-simplification-ptr-bool.cl
M clang/test/Analysis/z3/cstring-addrspace.c
M clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
M clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
M clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
M clang/test/CIR/CodeGenHIP/amdgpu-module-flags.hip
M clang/test/CIR/CodeGenHIP/hip-cuid.hip
M clang/test/CIR/CodeGenHIP/simple.cpp
M clang/test/CIR/CodeGenOpenMP/emit-device-functions.cpp
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CodeGen/AMDGPU/sanitizer.c
M clang/test/CodeGen/address-space.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/amdgpu-image-rsrc-type-debug-info.c
M clang/test/CodeGen/amdgpu-variadic-call.c
M clang/test/CodeGen/annotations-field.c
M clang/test/CodeGen/annotations-loc.c
M clang/test/CodeGen/bitfield-access-unit.c
M clang/test/CodeGen/default-address-space.c
M clang/test/CodeGen/dynamic-alloca-with-address-space.c
M clang/test/CodeGen/fp-atomic-ops.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/linking-bitcode-postopt.cpp
M clang/test/CodeGen/logb_scalbn.c
M clang/test/CodeGen/pragma-detect_mismatch.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/scoped-fence-ops.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCUDA/address-spaces.cu
M clang/test/CodeGenCUDA/alias.cu
M clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
M clang/test/CodeGenCUDA/amdgpu-visibility.cu
M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
M clang/test/CodeGenCUDA/anon-ns.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/const-var.cu
M clang/test/CodeGenCUDA/dependent-libs.cu
M clang/test/CodeGenCUDA/device-const-var-linkage.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/device-use-host-var.cu
M clang/test/CodeGenCUDA/device-var-init.cu
M clang/test/CodeGenCUDA/device-var-linkage.cu
M clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip
M clang/test/CodeGenCUDA/host-used-device-var.cu
M clang/test/CodeGenCUDA/implicit-hd-dtor-trap-stub-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-explicit-inst-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-overload-ambig-hip.hip
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCUDA/kernel-arg-name-metadata.cu
M clang/test/CodeGenCUDA/kernel-args.cu
M clang/test/CodeGenCUDA/kernel-dbg-info.cu
M clang/test/CodeGenCUDA/lambda-constexpr-capture.cu
M clang/test/CodeGenCUDA/lambda-noinline.cu
M clang/test/CodeGenCUDA/lambda-reference-var.cu
M clang/test/CodeGenCUDA/lambda.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-gpu-attrs-preserved.cu
M clang/test/CodeGenCUDA/managed-var.cu
M clang/test/CodeGenCUDA/ms-linker-options.cu
M clang/test/CodeGenCUDA/noinline.cu
M clang/test/CodeGenCUDA/norecurse.cu
M clang/test/CodeGenCUDA/nosanitize-cuid.hip
M clang/test/CodeGenCUDA/static-device-var-no-rdc.cu
M clang/test/CodeGenCUDA/static-device-var-rdc.cu
M clang/test/CodeGenCUDA/template-class-static-member.cu
M clang/test/CodeGenCUDA/types.cu
M clang/test/CodeGenCUDA/unnamed-types.cu
M clang/test/CodeGenCXX/address-space-cast-coerce.cpp
M clang/test/CodeGenCXX/address-space-cast.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/amdgcn-string-literal.cpp
M clang/test/CodeGenCXX/amdgcn_declspec_get.cpp
M clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-buffer-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-image-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-kernel-arg-pointer-type.cpp
M clang/test/CodeGenCXX/bitfield-access-empty.cpp
M clang/test/CodeGenCXX/bitfield-access-tail.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
M clang/test/CodeGenCXX/conditional-temporaries.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenCXX/cxx11-extern-constexpr.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/no-elide-constructors.cpp
M clang/test/CodeGenCXX/template-param-objects-address-space.cpp
M clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp
M clang/test/CodeGenCXX/try-catch-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-with-address-space.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-consteval-address-space.cpp
M clang/test/CodeGenCXX/vtable-constexpr-address-space.cpp
M clang/test/CodeGenCXX/vtable-key-function-address-space.cpp
M clang/test/CodeGenCXX/vtable-layout-extreme-address-space.cpp
M clang/test/CodeGenCXX/vtable-linkage-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtt-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
M clang/test/CodeGenHIP/debug-info-language-hip.hip
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/device-function-huge-arg-ret.hip
M clang/test/CodeGenHIP/half.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHIP/placement-new-addrspace.hip
M clang/test/CodeGenHIP/printf-aggregate.cpp
M clang/test/CodeGenHIP/printf-builtin.hip
M clang/test/CodeGenHIP/printf-kind-module-flag.hip
M clang/test/CodeGenHIP/printf.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenHIP/sret-lifetime-markers.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
M clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
M clang/test/CodeGenHipStdPar/unsupported-ASM.cpp
M clang/test/CodeGenHipStdPar/unsupported-builtins.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/address-space-constant-initializers.cl
M clang/test/CodeGenOpenCL/address-spaces.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgcn-flat-scratch-name.cl
M clang/test/CodeGenOpenCL/amdgcn-large-globals.cl
M clang/test/CodeGenOpenCL/amdgcn-non-temporal-store.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-alignment.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-calling-conv.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M clang/test/CodeGenOpenCL/amdgpu-ieee.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
M clang/test/CodeGenOpenCL/atomic-builtins-default-to-device-scope.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/backend-unsupported-warning.ll
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-cvt-off-f32-i4.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/CodeGenOpenCL/byval.cl
M clang/test/CodeGenOpenCL/cast_image.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/func-call-dbg-loc.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCL/lifetime.cl
M clang/test/CodeGenOpenCL/nullptr.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
M clang/test/CodeGenOpenCL/private-array-initialization.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/CodeGenOpenCL/sqrt-fpmath.cl
M clang/test/CodeGenOpenCL/visibility.cl
M clang/test/CodeGenOpenCL/vla.cl
M clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/DebugInfo/Generic/amdgpu-barrier-type-debug-info.c
M clang/test/DebugInfo/Generic/amdgpu-buffer-rsrc-type-debug-info.c
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
M clang/test/Frontend/opencl.cl
M clang/test/Headers/__clang_hip_libdevice_declares.cpp
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/amdgcn_openmp_device_math.c
M clang/test/Headers/amdgcn_openmp_device_math_c.c
M clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
M clang/test/Headers/amdhsa_abi.cl
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/openmp-device-functions-bool.c
M clang/test/Headers/openmp_device_math_isnan.cpp
M clang/test/Headers/openmp_new_nothrow.cpp
M clang/test/Index/pipe-size.cl
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
M clang/test/Misc/backend-resource-limit-diagnostics.cl
M clang/test/PCH/aarch64-sve-types.c
M clang/test/Preprocessor/builtin_aux_info.cpp
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-macros.c
M clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/amdgcn-va-list-type.c
M clang/test/Sema/attr-model.cpp
M clang/test/Sema/builtin-amdgcn-atomic-inc-dec-failure.cpp
M clang/test/Sema/builtin-amdgcn-fence-failure.cpp
M clang/test/Sema/callingconv-devicekernel.cpp
M clang/test/Sema/inline-asm-validate-amdgpu.cl
M clang/test/Sema/scoped-atomic-ops.c
M clang/test/Sema/wave-reduce-builtins-validate-amdgpu.cl
M clang/test/SemaCUDA/addr-of-overloaded-fn.cu
M clang/test/SemaCUDA/addr-of-overloaded-template-fn.cu
M clang/test/SemaCUDA/allow-int128.cu
M clang/test/SemaCUDA/amdgpu-builtins-pointer-args.cu
M clang/test/SemaCUDA/amdgpu-f128.cu
M clang/test/SemaCUDA/amdgpu-size_t.cu
M clang/test/SemaCUDA/amdgpu-windows-vectorcall.cu
M clang/test/SemaCUDA/atomic-ops.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/const-var.cu
M clang/test/SemaCUDA/constexpr-var.cu
M clang/test/SemaCUDA/deferred-diags-dedup.cu
M clang/test/SemaCUDA/fp16-arg-return.cu
M clang/test/SemaCUDA/implicit-hd-dtor-explicit-instantiation.cu
M clang/test/SemaCUDA/implicit-hd-explicit-inst-organic-caller.cu
M clang/test/SemaCUDA/implicit-hd-overload-ambig-organic-caller.cu
M clang/test/SemaCUDA/overloaded-builtin.cu
M clang/test/SemaCUDA/windows-calling-conv.cu
M clang/test/SemaCXX/amdgpu-barrier.cpp
M clang/test/SemaCXX/amdgpu-buffer-rsrc.cpp
M clang/test/SemaCXX/amdgpu-image-rsrc.cpp
M clang/test/SemaCXX/amdgpu-sizeof-alignof.cpp
M clang/test/SemaHIP/amdgpu-barrier.hip
M clang/test/SemaHIP/amdgpu-buffer-rsrc.hip
M clang/test/SemaHIP/amdgpu-feature-predicate.hip
M clang/test/SemaHIP/amdgpu-is-invocable.hip
M clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/test/SemaHIP/atomic-deprecated.hip
M clang/test/SemaHIP/zero-sized-device-array.hip
M clang/test/SemaHipStdPar/device-can-call-host.cpp
M clang/test/SemaOpenCL/amd-media-ops.cl
M clang/test/SemaOpenCL/amdgpu-attrs.cl
M clang/test/SemaOpenCL/amdgpu-barrier.cl
M clang/test/SemaOpenCL/amdgpu-buffer-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-image-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-num-sgpr-vgpr-deprecated.cl
M clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
M clang/test/SemaOpenCL/atomic-ops.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cvt-off-f32-i4-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-f16.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/numbered-address-space.cl
M clang/test/SemaOpenCL/sampler_t.cl
M clang/test/SemaOpenCLCXX/amdgpu-nullptr.clcpp
M clang/test/SemaSYCL/sycl-cconv-win.cpp
Log Message:
-----------
clang/AMDGPU: Rename amdgcn triples to amdgpu in cc1 tests (14) (#212053)
Replace the legacy amdgcn architecture name with amdgpu in various
test triples. This set of updates covers cases that did not have
a set -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 2d289b24a9f99c4357d8783c2d4f25fa46ef619a
https://github.com/llvm/llvm-project/commit/2d289b24a9f99c4357d8783c2d4f25fa46ef619a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-canonical-prefixes.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-amdgcnspirv.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/test/OffloadTools/clang-offload-bundler/standardize.c
M clang/test/OffloadTools/clang-offload-bundler/zlib.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
Log Message:
-----------
clang/AMDGPU: Migrate clang-linker-wrapper tests to amdgpu triples (15) (#212054)
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: ed326421d27ea8c38b11c84aa23bd655063cb4f9
https://github.com/llvm/llvm-project/commit/ed326421d27ea8c38b11c84aa23bd655063cb4f9
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
Log Message:
-----------
[LifetimeSafety][NFC] Update Checker to use prefix comparison interfaces (#207519)
This patch switches the Checker's expiry and invalidation checks to use
`AccessPath::isPrefixOf` instead of equality (`==`).
Since all generated access paths are currently empty, `isPrefixOf` is
behaviourally identical to `==` (NFC). This prepares the checker to
handle nested paths (fields and container interiors) in subsequent
commits.
Commit: b8de72900b1da9dc1ca1d6a9961a8da7498b2295
https://github.com/llvm/llvm-project/commit/b8de72900b1da9dc1ca1d6a9961a8da7498b2295
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
R llvm/test/CodeGen/AArch64/GlobalISel/irtranslater-samesign.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
Log Message:
-----------
[AArch64][GlobalISel] Rename irtranslater -> irtranslator test. NFC (#212205)
Commit: f901499b11c1fe4fec3075a4b2d01e330f3a00c6
https://github.com/llvm/llvm-project/commit/f901499b11c1fe4fec3075a4b2d01e330f3a00c6
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/entry-point-at-function-end.s
Log Message:
-----------
[BOLT] Split unmarked tail code after CFI-bounded functions into separate functions (#176173)
Detect trailing unmarked code after CFI-bounded predecessors
(__BOLT_FDE_FUNC* or symbols whose FDE address range equals their size)
and promote it into separate BinaryFunction objects named
__BOLT_UNMARKED_TAILat<addr>.
A predecessor is only considered when:
- the target is AArch64
- it is not a pseudo or fragment function
- it has slack beyond its recorded size (MaxSize > Size)
- it is CFI-bounded
- no function is already registered at the tail start address
The trailing region is measured conservatively and we bail out (leaving
the slack attached to the predecessor) when:
- the tail range is not fully contained in the predecessor's origin
section
- a data marker ($d) or a constant island overlaps the region
(data-in-code)
- disassembly fails or yields a zero-length instruction
- after trimming trailing padding, the tail is empty (i.e. it contained
only padding) or does not end in a return
- any bytes past the decoded code are non-zero, i.e. not pure zero
padding.
The bug was introduced in commit
[cd27741](https://github.com/llvm/llvm-project/commit/cd27741c1111f8a97af5fbca4153fa94f50ed9f3)
Commit: ecd8d61126426b5fd92a48aa02e93c2c4a869577
https://github.com/llvm/llvm-project/commit/ecd8d61126426b5fd92a48aa02e93c2c4a869577
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/liboffload/API/Common.td
A offload/liboffload/API/Context.td
M offload/liboffload/API/OffloadAPI.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/context/olCreateContext.cpp
A offload/unittests/OffloadAPI/context/olDestroyContext.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfo.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfoSize.cpp
Log Message:
-----------
[Offload] Add olCreateContext / olDestroyContext / olGetContextInfo API (#209144)
Add the initial Context handle API to liboffload:
- olCreateContext / olDestroyContext
- olGetContextInfo / olGetContextInfoSize
- OL_ERRC_INVALID_CONTEXT error code
- OL_CONTEXT_INFO_{NUM_DEVICES,DEVICES,PLATFORM} queries
This is the first patch in a series. I decided to split the original
change into multiple smaller PRs to make the review process faster and
more manageable.
This patch introduces context management functions, but the context
handle is not used anywhere yet. The following patches will extend the
API to use contexts in:
``` c
ol_result_t olMemAlloc(ol_context_handle_t, ol_device_handle_t, ol_alloc_type_t, size_t, void**);
ol_result_t olMemFree(ol_context_handle_t, void*);
ol_result_t olGetMemInfo(ol_context_handle_t, const void*, ol_mem_info_t, size_t, void*);
ol_result_t olGetMemInfoSize(ol_context_handle_t, const void*, ol_mem_info_t, size_t*);
ol_result_t olCreateQueue(ol_context_handle_t, ol_device_handle_t, ol_queue_handle_t*);
ol_result_t olCreateProgram(ol_context_handle_t, ol_device_handle_t, const void*, size_t, ol_program_handle_t*);
```
You can also take a look at #201398, which contains the first version of
the complete change. I'm cleaning it up as I go, so the patches in this
series are not a direct 1:1 split of that PR.
Commit: 8dfdcfb11624fe3eba614af21aa739fffd7ae94f
https://github.com/llvm/llvm-project/commit/8dfdcfb11624fe3eba614af21aa739fffd7ae94f
Author: Lucas Chollet <lucas.chollet at free.fr>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Driver/ToolChains/Clang.cpp
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
A llvm/test/CodeGen/RISCV/zero-call-used-regs-v.ll
Log Message:
-----------
[RISCV] Add support for vector registers with -fzero-call-used-regs (#206206)
The implementation is quite straightforward. Compared to the FP or GP
register implementations, the main difference is that we need to
configure the vector registers before clearing them.
Now that the backend supports clearing all standard registers, this
patch makes the clang driver accept all -fzero-call-used-regs options.
Commit: bc634a8c98dc0588bcde8f8d37c172841f579ef1
https://github.com/llvm/llvm-project/commit/bc634a8c98dc0588bcde8f8d37c172841f579ef1
Author: Karol Zwolak <karolzwolak7 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
Log Message:
-----------
[NFC] remove const_cast in DebugSSAUpdater (#212192)
#206059 added non-const `getInstruction()` overload so we can drop the
const_cast here.
Commit: cf08d4bc700245f85ce528f6c9f4d9a3fdd316a0
https://github.com/llvm/llvm-project/commit/cf08d4bc700245f85ce528f6c9f4d9a3fdd316a0
Author: blazej-smorawski <56126596+blazej-smorawski at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/include/L0Defs.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Event.h
M offload/plugins-nextgen/level_zero/include/L0Interop.h
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/include/L0Program.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Event.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Memory.cpp
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[offload] Align style of level zero plugin with llvm coding standard (#211762)
This patch does a small cleanup of level zero plugin. Mainly I changed
names of variables to use `CamelCase` whenever they relate to our
internal structures - not objects coming directly from level zero API
etc., so I left some variables and arguments like `zeDevice`, but only
if they are directly related to level zero APIs or structures.
Added a few `auto *` declarations, but again - only when they refer to
our internal objects and not to structures from level zero which might
be pointers underneath, but we use them as transparent objects.
Also did small cleanup of unused headers, making sure that we include
directly what we need rather than use transitive dependencies.
@adurang Please let me know if this patch is okay with you, if you think
this will cause more harm then it's worth I'll close it.
---------
Co-authored-by: Łukasz Plewa <lukasz.plewa at intel.com>
Commit: 1b3d208c77145b670207a646050bbe2cc8aea567
https://github.com/llvm/llvm-project/commit/1b3d208c77145b670207a646050bbe2cc8aea567
Author: Avi Patel <aviipatel06 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/memory
M libcxx/include/version
M libcxx/modules/std/memory.inc
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerequal/owner_equal.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerhash/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_hash.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P1901R2: owner_hash and owner_equal for shared_ptr/weak_ptr (#210551)
Fixes #105372.
## Acknowledgements
Claude assisted with test development.
Commit: a744ab39c43cf6ae483bbd72613cf589daaade56
https://github.com/llvm/llvm-project/commit/a744ab39c43cf6ae483bbd72613cf589daaade56
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/www/cxx_dr_status.html
M clang/www/make_cxx_dr_status
Log Message:
-----------
[clang] Update C++ DR status page (#212210)
On top of updating the status page, this PR updates the `latest_release`
constant to 22 and fixes a small `cwg_index.html` parsing issue that
arose during the update.
Commit: 47e51bdd4fc247008a5c9638f99cb073496e7d2e
https://github.com/llvm/llvm-project/commit/47e51bdd4fc247008a5c9638f99cb073496e7d2e
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/liboffload/API/Memory.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfo.cpp
M offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
M offload/unittests/OffloadAPI/memory/olMemAllocAligned.cpp
M offload/unittests/OffloadAPI/memory/olMemFree.cpp
Log Message:
-----------
[offload] Split olMemAlloc to separate functions (#209196)
At the previous community meeting, we agreed to introduce contexts into
the liboffload API. I also mentioned that, as part of this work, we
could split the allocation function into three separate functions, but
we did not discuss this idea in detail.
This patch only splits the allocation functions, allowing us to discuss
and agree on the proposed interface before introducing contexts into the
`olMemAlloc` API.
Once contexts are added, the device parameter will be removed from host
allocations, and the final interface would look like this:
```c
ol_result_t olMemAllocDevice(ol_context_handle_t, ol_device_handle_t, size_t, void **);
ol_result_t olMemAllocHost(ol_context_handle_t, size_t, void **);
ol_result_t olMemAllocManaged(ol_context_handle_t, ol_device_handle_t, size_t, void **);
```
Currently, for host allocations, the device parameter is required mainly
to determine which plugin should perform the allocation. Once contexts
are introduced, this information will be provided by the context, making
the device parameter redundant.
Requiring both a context and a device for host allocations could also be
misleading, since it is unclear what the device parameter actually
represents in this API.
Assisted by: Claude.
Commit: e07c6e6ac477058fd7f897879054e8b2f0e8868b
https://github.com/llvm/llvm-project/commit/e07c6e6ac477058fd7f897879054e8b2f0e8868b
Author: Varad Rahul Kamthe <133588066+varadk27 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/is_fpclass.ll
Log Message:
-----------
[InstCombine][NFC] Reorder isKnownAlways(Mask) check in foldIntrinsicIsFPClass (#212216)
Fixes #189949
The preceding mask-narrowing step already guarantees `Mask` is a subset
of `Known.KnownFPClasses` by the time the old equality check ran, so
`Mask == Known.KnownFPClasses` was already equivalent (see #190504).
This patch replaces that equality check with `Known.isKnownAlways(Mask)`
(matching the SelectionDAG equivalent's naming) and moves it before the
narrowing step, avoiding a redundant worklist re-visit.
Added a regression test in `is_fpclass.ll`.
Commit: b1a6c7d4cf9163b2cb347005e8743400b0d0e4fb
https://github.com/llvm/llvm-project/commit/b1a6c7d4cf9163b2cb347005e8743400b0d0e4fb
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero-unsupported.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-with-success.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop-no-implicit-float.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-dyn-alloca.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-hint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-indexed-load-stores.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-get-dynamic-area-offset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-range.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-xor.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rotr-rotl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-zext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-store-vector-bools.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-threeway-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadd-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usub-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-compress.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xtn.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-zextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner-zext-trunc-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
Log Message:
-----------
[AArch64][GlobalISel] Update legalize tests with concrete types. NFC (#212217)
Commit: 8e374dbdf2ef1cc74eac8880786e79b2b2dd0890
https://github.com/llvm/llvm-project/commit/8e374dbdf2ef1cc74eac8880786e79b2b2dd0890
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
Log Message:
-----------
[NFC][analyzer] Eliminate NodeBuilder in VisitBlockExpr (#211865)
This is part of the commit series that gradually eliminates the class
`NodeBuilder` from the analyzer engine.
This is a straightforward case where `makeNodeWithBinding` can be
clearly applied.
The node set `Tmp` was superfluous because we can directly pass the node
to `runCheckersForPostStmt` where it will be implicitly converted to a
one-element set. (There are many precedents for this.)
Also notice that we explicitly pass the `State` to `makeNodeWithBinding`
because it can be different from `Pred->getState()` (which would have
been used implicitly by the 4-argument form of `makeNodeWithBinding`.)
Commit: bd3551611ea19adae70a744be8d4f4ec096a114a
https://github.com/llvm/llvm-project/commit/bd3551611ea19adae70a744be8d4f4ec096a114a
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/Transforms/Utils/CloningTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
Log Message:
-----------
[IR][NFC] Rename insertDbgValueIntrinsic -> insertDbgValue (#212151)
Rename `insertDbgValueIntrinsic` to `insertDbgValue`, which is
consistent with the other insert helpers like `insertDbgAssign`,
`insertDeclare`, etc.
Also use debug record instead of intrinsic terminology in doc comments.
Commit: 9facc238463a8b10189534bb9da2e1e2f7503dd6
https://github.com/llvm/llvm-project/commit/9facc238463a8b10189534bb9da2e1e2f7503dd6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
Log Message:
-----------
[SCEV] Avoid building throwaway nodes in SCEVURem_match (NFC) (#212149)
URem matching currently constructs rather complex
`A - ((A udiv B) * B)` expressions just to check if the given expression
is an URem op.
Exit early without building the expression, if neither of the operands
is UDiv.
This gives significant compile-time improvements end-to-end:
* stage1-O3: -0.23%
* stage1-ReleaseThinLTO: -0.24%
* stage1-ReleaseLTO-g: -0.18%
* stage1-aarch64-O3: -0.21%
* stage2-O3: -0.23%
https://llvm-compile-time-tracker.com/compare.php?from=5771cd03344ba3a8df7ed364b6f98451b68fcb30&to=597567670167f7c60be659389bd22b773fbac4ac&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/212149
Commit: cd653d59160ee91fd33b949cc6989c7945d9cdf3
https://github.com/llvm/llvm-project/commit/cd653d59160ee91fd33b949cc6989c7945d9cdf3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A orc-rt/include/orc-rt-c/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add C API for Session::callController. (#212204)
Add orc-rt-c/Session.h with a C API, orc_rt_Session_callController,
wrapping the C++ Session::callController method.
Commit: 1333e0a05d822b96e76d9edf55f1af66e2cbb0b3
https://github.com/llvm/llvm-project/commit/1333e0a05d822b96e76d9edf55f1af66e2cbb0b3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/__locale
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Remove locale::id::__next_id from the ABI (#210360)
`__next_id` is only ever used inside the dylib, so we can avoid making it public.
Commit: e10674378de70647d666499c6fd7f11a7ee03f6e
https://github.com/llvm/llvm-project/commit/e10674378de70647d666499c6fd7f11a7ee03f6e
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/instructions/ret-single-element-array.ll
Log Message:
-----------
[SPIR-V] Fix direct return of aggregate extractvalue (#209762)
SPIRVPrepareFunctions rewrites aggregate function returns to i32 value
IDs, but an aggregate extractvalue used directly by ret kept its
original type, leaving invalid IR for the verifier. Mutate the lowered
spv_extractv result when it feeds a rewritten return so the LLVM type
matches while the registry preserves the aggregate SPIR-V type.
Closes https://github.com/llvm/llvm-project/issues/208899.
Replaces https://github.com/llvm/llvm-project/pull/209027 (that PR seems
spam? although the diagnosis was largely correct)
Co-authored-by: Claude Fable 5 <noreply at anthropic.com>
Commit: 187d096d44bfabc0a392d0abf1d87123e67f5efb
https://github.com/llvm/llvm-project/commit/187d096d44bfabc0a392d0abf1d87123e67f5efb
Author: Hardik Kumar <hardikxk at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constexpr.c
Log Message:
-----------
[clang] Fix the StringRef assertion failure for non-narrow strings. (#212108)
StringRef assertion fires up when passing wide literals to
`__builtin_nanf()`.
The patch updates the `TryEvaluateBuiltinNan` method to reject
non-narrow string literals preventing the downstream assertion failure
caused by `getString()` in cases where the user might pass a non-narrow
/ non 1 byte literal."
Fix #205306
Commit: c84136af3d15893fe3f2bc608280ccaa71e18db1
https://github.com/llvm/llvm-project/commit/c84136af3d15893fe3f2bc608280ccaa71e18db1
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/text_encoding
A libcxx/test/libcxx/text/text_encoding/aliases_count.pass.cpp
R libcxx/test/std/text/text_encoding/test_text_encoding.h
M libcxx/test/std/text/text_encoding/text_encoding.ctor/id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.ctor/string_view.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.eq/equal.id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/empty.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/operator-bool.pass.cpp
M libcxx/test/support/module.modulemap
A libcxx/test/support/test_text_encoding.h
Log Message:
-----------
[libc++] Inline `text_encoding` alias offset table std::count to 884 (#207471)
- Add count test to verify the exact number of aliases our table
contains
- Should reduce compile time cost of gathering that count
Commit: 42b4ee6383e340c4c3ab4cfddd17f864ab331e0d
https://github.com/llvm/llvm-project/commit/42b4ee6383e340c4c3ab4cfddd17f864ab331e0d
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/HowToReleaseLLVM.rst
Log Message:
-----------
docs: Adjust HowToReleaseLLVM to include man page signing (#210092)
This adds documentation on how to sign man pages.
Commit: f92e977a8e76a0e40e3af255f13c30b6710fd871
https://github.com/llvm/llvm-project/commit/f92e977a8e76a0e40e3af255f13c30b6710fd871
Author: Chibuoyim (Wilson) Ogbonna <ogbonnachibuoyim12 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/roundtrip.mlir
Log Message:
-----------
[MLIR][Linalg] Fix crash on duplicate dimensions in linalg.broadcast (#211203)
per
[#210738](https://github.com/llvm/llvm-project/pull/210738#discussion_r3622744153)
Currently, the following crashes on verification with a segfault:
```
func.func @broadcast_rank0_tensor(%arg0: tensor<i32>, %arg1: tensor<32x2xi32>) -> tensor<32x2xi32> {
%0 = linalg.broadcast ins(%arg0 : tensor<i32>) outs(%arg1 : tensor<32x2xi32>) dimensions = [0, 0]
return %0 : tensor<32x2xi32>
}
```
The verifier should reject cases like this where we have a duplicate
dimension. I've also added a couple of tests covering `linalg.broadcast`
on various input scenarios to confirm they are being handled properly.
Commit: 08c7b4203815b3502c04ecb9cd8b6dae21fc5661
https://github.com/llvm/llvm-project/commit/08c7b4203815b3502c04ecb9cd8b6dae21fc5661
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.h
Log Message:
-----------
[offload] update llvm-gpu-loader the new liboffload allocation API (#212225)
PR #209196 split host memory allocations into a dedicated API. Update
llvm-gpu-loader to use the new host allocation function introduced by
that change.
Commit: dcfadf69caf127b021c3f7de0c8abc0e45bb3b64
https://github.com/llvm/llvm-project/commit/dcfadf69caf127b021c3f7de0c8abc0e45bb3b64
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/ThreadPoolRunner.h
M orc-rt/lib/executor/ThreadPoolRunner.cpp
M orc-rt/test/unit/ThreadPoolRunnerTest.cpp
Log Message:
-----------
[orc-rt] Make ThreadPoolRunner a generic task runner. (#212229)
Commit 01683dbe7e207 generalized the Session's dispatch mechanism to
hand each runner an opaque Task (move_only_function<void()>), and
simplified QueueingRunner accordingly, but failed to update
ThreadPoolRunner.
Update ThreadPoolRunner to conform to Session's dispatch requirements
and update its unit test to dispatch plain tasks rather than
wrapper-function calls.
Commit: 2f60c93e01321a0434f8a3ad4f88afed9f35a583
https://github.com/llvm/llvm-project/commit/2f60c93e01321a0434f8a3ad4f88afed9f35a583
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libsycl/src/usm_functions.cpp
Log Message:
-----------
[SYCL] Update SYCL to use the new liboffload allocation API (#212223)
PR #209196 split host memory allocations into a dedicated API. Update
SYCL to use the new host allocation function introduced by that change.
Commit: a48aefd6ea9404916b0efa53942cbeae2d9781ff
https://github.com/llvm/llvm-project/commit/a48aefd6ea9404916b0efa53942cbeae2d9781ff
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/NonUniformIdx/RWBufferNonUniformIdxLoop.ll
Log Message:
-----------
[SPIR-V] Guard against infinite loop in decorateUsesAsNonUniform (#208224)
Add a visited set so an SSA cycle through a loop-carried phi does not
hang the worklist walk
Commit: d7acf8cb4c00560d7f31eabd869a0a8d8fc7e313
https://github.com/llvm/llvm-project/commit/d7acf8cb4c00560d7f31eabd869a0a8d8fc7e313
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
A llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-interference.mir
Log Message:
-----------
[InlineSpiller] Avoid spill hoisting interference (#211809)
When hoisting spills and the source is a PHI, the "hoisted" spill may be
inserted only after the basic block prologue. This may require extending
this segment of the source value's live interval.
Abort the hoisting if this extension of the segment would interfere with
another live interval assigned to the same physical register.
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 225e988b3d9e3bd05a0a79e071f07d22f1f1e0ad
https://github.com/llvm/llvm-project/commit/225e988b3d9e3bd05a0a79e071f07d22f1f1e0ad
Author: Romanov Vlad <Vladislav.Romanov at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-regalloc.mir
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-sched.mir
Log Message:
-----------
[AMDGPU] Add per-class register stress options (#210907)
Add options -amdgpu-stress-vgpr=N, -amdgpu-stress-agpr=N, and
-amdgpu-stress-sgpr=N to limit each register class independently by
reserving registers beyond N.
Commit: 3ca666f496681600f5528f4346c0303dd1171230
https://github.com/llvm/llvm-project/commit/3ca666f496681600f5528f4346c0303dd1171230
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/test/CodeGen/SystemZ/memmove-01.ll
Log Message:
-----------
[SystemZ] Improve handling of memmoves. (#196285)
Handle memmoves of constant lengths up to 256 bytes with target
instructions instead of libcall.
Commit: aa50eb69d6eba1bcdfe6d3a15f0b9b8e278e828b
https://github.com/llvm/llvm-project/commit/aa50eb69d6eba1bcdfe6d3a15f0b9b8e278e828b
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/DebugInfo/Generic/debug-info-qualifiers.ll
M llvm/test/DebugInfo/Generic/dwarf5-debug-info-static-member.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/incorrect-variable-debugloc.ll
M llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
M llvm/test/DebugInfo/Generic/namespace.ll
M llvm/test/DebugInfo/Generic/varargs.ll
M llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/X86/align_cpp11.ll
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/string-offsets-multiple-cus.ll
M llvm/test/DebugInfo/X86/string-offsets-table.ll
Log Message:
-----------
[DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (#211536)
RFC
https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544
This patch proposes to move the emission of types and type-like entities
from `DwarfDebug::beginModule()` to `DwarfDebug::endModule()`.
Effectively, this changes nothing but the order of debug entities in the
resulting DWARF.
This is needed to simplify DWARF emission in a context of proper support
of function-local types, making all the types handled in a single place,
together with other global and local entities.
This change has already been reviewed and approved in
https://reviews.llvm.org/D144008, but I’m opening a new PR for
visibility.
Co-authored-by: Kristina Bessonova <kbessonova at accesssoftek.com>
Commit: 0695ea8d442c3271634892a7bec78b3b3a4368b9
https://github.com/llvm/llvm-project/commit/0695ea8d442c3271634892a7bec78b3b3a4368b9
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/TableGen/TGLexer.cpp
A llvm/test/TableGen/eof-after-endif.td
Log Message:
-----------
[TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (#208961)
Part of #151476
prepSkipRegion currently scans a line until it finds a newline before
advancing to the next line. It crashes if it finds an EOF first. This
change checks for EOF to prevent a segmentation fault.
Commit: 6bb73fd3e418d1bade9050776ddb6a8f84a8bfb3
https://github.com/llvm/llvm-project/commit/6bb73fd3e418d1bade9050776ddb6a8f84a8bfb3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/StringExtras.h
Log Message:
-----------
[orc-rt] Fix maybe_unused attribute. (#212237)
Commit: 98d41d2f75395ab1f91198f2493cff62a33b80c1
https://github.com/llvm/llvm-project/commit/98d41d2f75395ab1f91198f2493cff62a33b80c1
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/include/lldb/Utility/Environment.h
M lldb/source/Plugins/Platform/Windows/CMakeLists.txt
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.h
A lldb/source/Plugins/Platform/Windows/PlatformWindowsProperties.td
A lldb/test/API/windows/debug-heap/Makefile
A lldb/test/API/windows/debug-heap/TestWindowsDebugHeap.py
A lldb/test/API/windows/debug-heap/main.c
Log Message:
-----------
[lldb][Windows] Disable debug heap by default (#212126)
This disables Windows' default debug heap when launching a process.
The motivation is similar to what Microsoft wrote on their [blog post
for Visual Studio
2015](https://devblogs.microsoft.com/cppblog/c-debugging-improvements-in-visual-studio-14/)
where they disabled it: The debug heap comes with a performance cost and
the [C runtime already does some heap
checking](https://learn.microsoft.com/en-us/cpp/c-runtime-library/crt-debug-heap-details?view=msvc-170).
Towards #201690. Notably, lldb-dap won't set this when launching in a
terminal. I think we'd want an option similar to `disableASLR` for
lldb-dap.
Commit: 456e73ff83e0ea352509d9fb687660bd3c2eb390
https://github.com/llvm/llvm-project/commit/456e73ff83e0ea352509d9fb687660bd3c2eb390
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-umin.ll
Log Message:
-----------
[SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (#212008)
In the test `switch_remove_dead_cases`, both case 4 and case 5 jump into
bb `%case_ret`. Thus, the edge will be removed twice, triggering an
assertion failure. This patch only removes the edge in DT when we remove
the last edge to `DeadCaseBB`.
Commit: e2b23dbda6551c81377ae712749c58c27eefb857
https://github.com/llvm/llvm-project/commit/e2b23dbda6551c81377ae712749c58c27eefb857
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/AArch64/clmul.ll
Log Message:
-----------
[AArch64] Test all cost kinds in clmul tests. NFC (#212246)
Commit: b10d4473a01e77ef0c973d29610ebc81c5a20c1a
https://github.com/llvm/llvm-project/commit/b10d4473a01e77ef0c973d29610ebc81c5a20c1a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/opencl/vload_halfn.ll
Log Message:
-----------
[SPIR-V] Fix vloada_halfn builtin number (#212218)
vloada_halfn was incorrectly mapped to vload_half builtin number (174)
instead of its own (179), causing it to demangle to the wrong OpenCL
builtin
Commit: c18296f5db60be977366a42f044a623b557f5dd2
https://github.com/llvm/llvm-project/commit/c18296f5db60be977366a42f044a623b557f5dd2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
Log Message:
-----------
DAG: Canonicalize undef shuffle operands and results to poison (#212102)
Commit: 8c835ee87def288eca2587293499008dce54c4e7
https://github.com/llvm/llvm-project/commit/8c835ee87def288eca2587293499008dce54c4e7
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
Log Message:
-----------
[VectorCombine] Align shrinkLoadForShuffles to register boundaries (#209775)
Round up the shrunk load element count to the next full vector register
boundary to avoid scalar remainders that prevent shuffle lowering.
For example, on X86 AVX-512 a <16 x double> load with shuffle indices
1-8 was shrunk to <9 x double>. This legalizes to v8f64 + scalar f64,
and the scalar operand in BUILD_VECTOR prevents DAGCombiner from folding
it into a VECTOR_SHUFFLE, producing ~15 instructions instead of 2
(VMOVDQA64 + VALIGNQ).
Commit: bd9e922d448ce6a492b1b323c359b7c8a4030ad9
https://github.com/llvm/llvm-project/commit/bd9e922d448ce6a492b1b323c359b7c8a4030ad9
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libc/src/string/memory_utils/aarch64/inline_memmove.h
Log Message:
-----------
[libc][AArch64] Avoid -Wshadow warnings about uint128_t etc (#212227)
`aarch64/inline_memset.h` defines type aliases `uint128_t`, `uint256_t`
and `uint512_t` at file scope. `aarch64/inline_memmove.h`, alongside it,
defines the same aliases at function scope. If both headers are included
by the same source file, this can lead to a warning about the
function-scope aliases shadowing the file-scope ones, which turns into a
compile error if you build with `clang -Werror -Wshadow`.
Commit a81db64570f94c2 (PR #210895) exposed this latent compile failure,
by making `CPP/string.h` include both files. But there's nothing wrong
with that, so the right fix is to make it _safe_ to include both files,
not to stop doing it.
This commit moves the function-scope aliases in memmove up to file
scope. That makes them duplicate definitions in the _same_ scope, which
doesn't cause the same error.
Other options would be to move the memset aliases down into function
scope (duplicating them in two functions), or to move them into a tiny
AArch64-specific header file with an include guard. Both of those are
more intrusive than this fix.
Commit: acf113c195682ec3eceafd9a0023f1e8401e71c9
https://github.com/llvm/llvm-project/commit/acf113c195682ec3eceafd9a0023f1e8401e71c9
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
Log Message:
-----------
[lldb][Windows] Preserve breakpoint locations across process exit (#212219)
`ProcessWindows::OnExitProcess` unloads the executable module with
`delete_locations=true`, which deletes the target's breakpoint locations
when the debuggee exits. Other platforms keep them, so inspecting a
breakpoint after the process died returns no location on Windows.
Pass `delete_locations=false` to match the other platforms.
Commit: 0a75f1f77fe54e9e366e48f78c9865aee8839809
https://github.com/llvm/llvm-project/commit/0a75f1f77fe54e9e366e48f78c9865aee8839809
Author: Serafean <martin at serafean.cz>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/test/Index/cxx14-lambdas.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[libclang]Visit lambda init-capture as VarDeclaration (#174116)
```
int foo(){
int i = 42;
int j = 43;
auto l1 = [x = i, &j ](){};
}
```
in the lambda capture:
- `x` is visited as VariableRef (referencing an unvisited VarDecl at the
same location)
- `i` is visited as DelcRefExpr (fair enough, same as in an assignment)
- `j` is visited as VariableRef
Visit `x` as a `VarDecl`, and stop visiting it as a `VariableRef`, as it
makes no sense (referencing itself at an unvisited cursor).
---------
Co-authored-by: Serafean <Serafean at users.noreply.github.com>
Commit: 26480c7d1678fbea8e7b1cd064775d0f48649f91
https://github.com/llvm/llvm-project/commit/26480c7d1678fbea8e7b1cd064775d0f48649f91
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
Log Message:
-----------
AMDGPU/GlobalISel: Test for cs_chain argument from G_EXTRACT_VECTOR_ELT (#212247)
This is a bug since G_EXTRACT_VECTOR_ELT will end up with a register
class on the dst operand. The combiner will crash because of it.
Commit: be2e6bc89a8a9f421bbc50c72425a2c7436c604d
https://github.com/llvm/llvm-project/commit/be2e6bc89a8a9f421bbc50c72425a2c7436c604d
Author: Romanov Vlad <Vladislav.Romanov at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
A llvm/test/CodeGen/AMDGPU/mfma-no-multiple-copies.mir
A llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
Log Message:
-----------
[AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (#209179)
When multiple VGPR-requiring uses of an MFMA dst are in the
same block as the MFMA, share a single AGPR->VGPR copy placed
before the earliest use, instead of creating one per use.
Commit: 4fbefd6025ca1a9e12683a766dbbbeadd2861136
https://github.com/llvm/llvm-project/commit/4fbefd6025ca1a9e12683a766dbbbeadd2861136
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/large-system-growth.ll
M llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
M llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll
Log Message:
-----------
[ConstraintElim] Skip decomposition if precondition does not hold. (#212140)
Currently we fully decompose expressions, collect all preconditions and
then bail out if any precondition is false. This means we miss out on
simplifications in cases where the precondition does not hold, but we could
still reason about the un-decomposed sub-expression.
This patch updates `decompose` to take the constraint system as argument
instead and eagerly check preconditions. If the precondition does not hold,
we don't decompose the sub-expression and don't further recurse, but simply
treat the sub-expression as variable.
This improves results in some cases
(https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/794)
and is also slightly cheaper (or neutral) in most cases compile-time
wise, as we cut off decomposition before recursing further. The number of queries
for preconditions overall should stay the same
PR: https://github.com/llvm/llvm-project/pull/212140
Commit: 8a3d15b952636489a14e1244fdfe871b730d67d7
https://github.com/llvm/llvm-project/commit/8a3d15b952636489a14e1244fdfe871b730d67d7
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 98d41d2 (#212244)
This fixes 98d41d2f75395ab1f91198f2493cff62a33b80c1 (#212126).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=98d41d2f75395ab1f91198f2493cff62a33b80c1
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 919919c80a834405a2908525372c754c03f47606
https://github.com/llvm/llvm-project/commit/919919c80a834405a2908525372c754c03f47606
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Platform/Windows/BUILD.gn
Log Message:
-----------
[gn] port 98d41d2f75395a (PlatformWindowsProperties.td) (#212257)
Commit: 6ca0e4a67193836fe696eb0273d523da1950cfda
https://github.com/llvm/llvm-project/commit/6ca0e4a67193836fe696eb0273d523da1950cfda
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm-invalid.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-simd-guided.mlir
M mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
Log Message:
-----------
[mlir][OpenMP] Fix update of linear iteration variables (#183800)
The final value of a linear iteration variable must be the loop
limit_value + step. Before this patch it was limit_value.
Fixes #170784.
Commit: 7e607a0931394460ab9f4994f6928553da13e472
https://github.com/llvm/llvm-project/commit/7e607a0931394460ab9f4994f6928553da13e472
Author: muhammadshayanasim1-web <muhammadshayanasim1 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-masked_load.ll
Log Message:
-----------
[InstCombine] Copy metadata in select-to-masked.load fold (#211965)
Preserve AA metadata when folding select of masked.load to masked.load.
We cannot preserve value metadata, as it may not be valid for the new
passthru.
Fixes #209022.
Assisted-by: Claude
Commit: f613ead38efdc327c78d4b00f9195e84092c2d57
https://github.com/llvm/llvm-project/commit/f613ead38efdc327c78d4b00f9195e84092c2d57
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix cs_chain use of constrainOperandRegClass (#212248)
Make a copy before constraining to avoid setting register class on
a register that can be defined by generic opcode.
Commit: 491f16472b0f08ed72481b671c1470c6de953fa0
https://github.com/llvm/llvm-project/commit/491f16472b0f08ed72481b671c1470c6de953fa0
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/lib/Lower/ConvertExprToHLFIR.cpp
A flang/test/Lower/HLFIR/elemental-array-constant-shape.f90
M flang/test/Lower/HLFIR/matmul.f90
Log Message:
-----------
[flang][hlfir] Prefer a constant-shape operand for elemental array results (#209791)
Elemental operands are conformable, so their extents are identical and
the result shape may be taken from either operand. This patch prefers an
operand whose shape is a compile-time constant, producing a statically
shaped result. The left operand is checked first to avoid churn in lit
test expectations.
Commit: d6b8c83138892bd64d33e44102e0aed6cfe3556f
https://github.com/llvm/llvm-project/commit/d6b8c83138892bd64d33e44102e0aed6cfe3556f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Change return type of ConstraintTy::empty to bool (NFC) (#212259)
empty() returns a bool, fix return type as pointed out in
https://github.com/llvm/llvm-project/pull/212140.
Commit: 750ed0a8239147a5ce81eb31d54591c2b01b8e8f
https://github.com/llvm/llvm-project/commit/750ed0a8239147a5ce81eb31d54591c2b01b8e8f
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
A flang/test/Driver/openmp-target-fast-flag.f90
Log Message:
-----------
[Flang][OpenMP] Add support for -fopenmp-target-fast (#212181)
The `-fopenmp-target-fast` is a meta flag that enables several
optimizations for device code.
Commit: 07dfc602db220f015fab975248d3376a5ffe03f7
https://github.com/llvm/llvm-project/commit/07dfc602db220f015fab975248d3376a5ffe03f7
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/metadirective-v50.f90
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[flang][OpenMP] Split DEFAULT into DEFAULT(dsa) and DEFAULT(variant) (#212128)
The 5.0 and 5.1 specs used DEFAULT clause for what is now OTHERWISE.
Separate these two claues to be able to specify their properties
independently.
Commit: a0710105925b8455f38fd861712279d04f656d4c
https://github.com/llvm/llvm-project/commit/a0710105925b8455f38fd861712279d04f656d4c
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
A llvm/test/Analysis/HashRecognize/def-use-chains-visited.ll
R llvm/test/Analysis/HashRecognize/dig-recurrence.ll
Log Message:
-----------
[HashRecognize] Fix two more compiler hangs on dense use-def chains (#211887)
The bug in `digRecurrence` fixed by #211711 applies to
`isConditionalOnXorOfPHIs` and `containsUnreachable` as well. Implement
a fix for both using the same approach.
- `isConditionalOnXorOfPHIs` hang: https://godbolt.org/z/jo8eMvoeY
- `containsUnreachable` hang: https://godbolt.org/z/Eeo89W6qW
Assisted-by: Claude Opus 5
Commit: 3d20ba7135d93de7a6cd7db5a196c41d25e391a7
https://github.com/llvm/llvm-project/commit/3d20ba7135d93de7a6cd7db5a196c41d25e391a7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++][NFC] Use [[deprecated]] for __grow_by (#209126)
`__grow_by` is an internal function, and we deprecated it to avoid
accidental use of it inside the library. `_LIBCPP_DEPRECATED_` is meant
for user-configuration, which doesn't apply here.
Fixes #124940
Commit: 92cdb9dc836e24705c46b77ebabf4f3596a56998
https://github.com/llvm/llvm-project/commit/92cdb9dc836e24705c46b77ebabf4f3596a56998
Author: Gang Chen <gangc at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenHIP/builtins-amdgcn-prefetch.hip
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
[AMDGPU] Add amdgcn builtin for s_prefetch_inst (#211642)
Commit: 39d3b9344f4796e963d8d73bfd1e7cd3014d1fe6
https://github.com/llvm/llvm-project/commit/39d3b9344f4796e963d8d73bfd1e7cd3014d1fe6
Author: Alex Strelnikov <strel at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/time.yaml
M libc/src/time/CMakeLists.txt
A libc/src/time/strptime.cpp
A libc/src/time/strptime.h
M libc/test/src/time/CMakeLists.txt
A libc/test/src/time/strptime_test.cpp
Log Message:
-----------
[libc] Add stub implementation for strptime. (#211088)
This PR adds a stub for `strptime` under
`LLVM_LIBC_ENABLE_EXPERIMENTAL_ENTRYPOINTS` for x86_64 and aarch64 as a
first step in implementing the function.
Commit: 6baa9c9ac22c60e00471c6412387b5a48aa12e3e
https://github.com/llvm/llvm-project/commit/6baa9c9ac22c60e00471c6412387b5a48aa12e3e
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
Log Message:
-----------
[lldb][Mach-O] Fix null __LINKEDIT deref in ParseSymtab for shared cache images (#207448)
`ObjectFileMachO::ParseSymtab`, when handling a local shared cache image
(`MH_DYLIB_IN_CACHE` set and not read from memory), unconditionally
called
`linkedit_section_sp->GetFileOffset()` to slide the load command
offsets.
If the Mach-O has no `__LINKEDIT` segment, `FindSectionByName` returns a
`null` SectionSP, and this is a member call on a null pointer (caught by
UBSan;
crashes in release builds).
```
* thread #1, queue = 'com.apple.main-thread', stop reason =
EXC_BAD_ACCESS (code=1, address=0x68)
* frame #0: 0x0000000100121ff0 ObjectFileMachOTests`lldb_private::Section::GetFileOffset(this=0x0000000000000000) const at Section.h:181:49 [opt] [inlined]
frame #1: 0x0000000100121ff0 ObjectFileMachOTests`ObjectFileMachO::ParseSymtab(this=0x00000001055616b0, symtab=
0x000000016fdfe988) at ObjectFileMachO.cpp:2353:59 [opt]
```
Guard the shared-cache slide branch with a null check on
`linkedit_section_sp`, matching the existing guard used on the in-memory
path.
Found by lldb-target-fuzzer.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: e4c07b9c57952cd099d72985044f70e0e6f02756
https://github.com/llvm/llvm-project/commit/e4c07b9c57952cd099d72985044f70e0e6f02756
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
Log Message:
-----------
[AArch64] Rename SVEShuffleOpts to AArch64SVEShuffleOpts
To be more consistent with other AArch64 passes and other CodeGen passes
in general which are almost always prefixed with the name of the target
(and ideally will be once we finish the NewPM transition).
Reviewers: davemgreen, huntergr-arm, paulwalker-arm
Pull Request: https://github.com/llvm/llvm-project/pull/211876
Commit: dd32eae8187d88b902a5a3b988f39d06d86cd797
https://github.com/llvm/llvm-project/commit/dd32eae8187d88b902a5a3b988f39d06d86cd797
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/AssignGUID.h
Log Message:
-----------
[ThinLTO] Mark AssignGUIDPass as RequiredPassInfoMixin
PassInfoMixin is going away, so switch to RequiredPassInfoMixin and
remove the explicit isRequired implementation.
Reviewers: mtrofin, orodley
Pull Request: https://github.com/llvm/llvm-project/pull/211987
Commit: c44443f22b6f4f345e20cf947d26e873036923bf
https://github.com/llvm/llvm-project/commit/c44443f22b6f4f345e20cf947d26e873036923bf
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/AArch64SME.md
M llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUAsyncOperations.md
M llvm/docs/AMDGPUDMAOperations.md
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUExecutionSynchronization.md
M llvm/docs/AMDGPUInstructionNotation.rst
M llvm/docs/AMDGPUInstructionSyntax.rst
M llvm/docs/AMDGPUMemoryModel.md
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUOperandSyntax.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AddingConstrainedIntrinsics.md
M llvm/docs/AdvancedBuilds.md
M llvm/docs/AliasAnalysis.md
M llvm/docs/Atomics.md
M llvm/docs/BigEndianNEON.md
M llvm/docs/BitCodeFormat.md
M llvm/docs/BlockFrequencyTerminology.rst
M llvm/docs/BranchWeightMetadata.rst
M llvm/docs/BugLifeCycle.rst
M llvm/docs/BuildingADistribution.md
M llvm/docs/CFIVerify.md
M llvm/docs/CMake.md
M llvm/docs/CMakePrimer.rst
M llvm/docs/CodeGenerator.md
M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/docs/CommandGuide/llvm-pdbutil.rst
M llvm/docs/CommandLine.md
M llvm/docs/CompileCudaWithLLVM.md
M llvm/docs/CompilerWriterInfo.md
M llvm/docs/Contributing.md
M llvm/docs/ConvergenceAndUniformity.rst
M llvm/docs/ConvergentOperations.rst
M llvm/docs/Coroutines.md
M llvm/docs/CoverageMappingFormat.md
M llvm/docs/CycleTerminology.md
M llvm/docs/DTLTO.md
M llvm/docs/DependenceGraphs/index.rst
M llvm/docs/DeveloperPolicy.md
M llvm/docs/DirectX/DXContainer.rst
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/docs/DirectX/DXILOpTableGenDesign.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/ExceptionHandling.md
M llvm/docs/Extensions.md
M llvm/docs/FAQ.md
M llvm/docs/FatLTO.rst
M llvm/docs/FaultMaps.rst
M llvm/docs/Frontend/PerformanceTips.md
M llvm/docs/FuzzingLLVM.rst
M llvm/docs/GarbageCollection.md
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingInvolved.md
M llvm/docs/GettingStarted.md
M llvm/docs/GettingStartedVS.md
M llvm/docs/GitHub.md
M llvm/docs/GlobalISel/GMIR.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/GlobalISel/IRTranslator.rst
M llvm/docs/GlobalISel/MIRPatterns.rst
M llvm/docs/GlobalISel/index.rst
M llvm/docs/GwpAsan.rst
M llvm/docs/HowToReleaseLLVM.rst
M llvm/docs/HowToSetUpLLVMStyleRTTI.rst
M llvm/docs/HowToUpdateDebugInfo.md
M llvm/docs/HowToUseAttributes.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/InstCombineContributorGuide.md
M llvm/docs/InstrProfileFormat.md
M llvm/docs/Instrumentor.md
M llvm/docs/JITLink.md
M llvm/docs/KernelInfo.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.md
M llvm/docs/LibFuzzer.md
M llvm/docs/LinkTimeOptimization.md
M llvm/docs/LoopTerminology.md
M llvm/docs/MIRLangRef.md
M llvm/docs/MLGO.rst
M llvm/docs/MarkedUpDisassembly.rst
M llvm/docs/MemProf.md
M llvm/docs/MemTagSanitizer.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/MemorySSA.md
M llvm/docs/MergeFunctions.md
M llvm/docs/MisExpect.rst
M llvm/docs/MyFirstTypoFix.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/NewPassManager.md
M llvm/docs/ORCv2.md
M llvm/docs/OptBisect.rst
M llvm/docs/PCSectionsMetadata.rst
M llvm/docs/PDB/CodeViewSymbols.rst
M llvm/docs/PDB/CodeViewTypes.rst
M llvm/docs/PDB/DbiStream.rst
M llvm/docs/PDB/HashTable.rst
M llvm/docs/PDB/ModiStream.rst
M llvm/docs/PDB/MsfFile.rst
M llvm/docs/PDB/PdbStream.rst
M llvm/docs/PDB/TpiStream.rst
M llvm/docs/PDB/index.rst
M llvm/docs/Passes.md
M llvm/docs/ProgrammersManual.md
M llvm/docs/ProjectGovernance.md
M llvm/docs/Projects.rst
M llvm/docs/Proposals/GitHubMove.rst
M llvm/docs/Proposals/TestSuite.rst
M llvm/docs/Proposals/VariableNames.rst
M llvm/docs/Proposals/VectorPredication.rst
M llvm/docs/RFCProcess.md
M llvm/docs/RISCV/RISCVVCIX.rst
M llvm/docs/RISCV/RISCVVectorExtension.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/Reference.md
M llvm/docs/ReleaseNotes.md
M llvm/docs/ReleaseProcess.rst
M llvm/docs/Remarks.md
M llvm/docs/SPIRVUsage.md
M llvm/docs/SandboxVectorizer.md
M llvm/docs/ScudoHardenedAllocator.rst
M llvm/docs/SegmentedStacks.rst
M llvm/docs/SourceLevelDebugging.md
M llvm/docs/SphinxQuickstartTemplate.md
M llvm/docs/StackMaps.rst
M llvm/docs/Statepoints.rst
M llvm/docs/SymbolizerMarkupFormat.rst
M llvm/docs/TableGen/BackEnds.rst
M llvm/docs/TableGen/BackGuide.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/docs/TableGen/index.md
M llvm/docs/Telemetry.rst
M llvm/docs/TestingGuide.md
M llvm/docs/TransformMetadata.rst
M llvm/docs/UndefinedBehavior.rst
M llvm/docs/UserGuides.md
M llvm/docs/VectorizationPlan.rst
M llvm/docs/Vectorizers.md
M llvm/docs/WritingAnLLVMBackend.md
M llvm/docs/WritingAnLLVMNewPMPass.md
M llvm/docs/WritingAnLLVMPass.md
M llvm/docs/XRay.rst
M llvm/docs/XRayExample.rst
M llvm/docs/XRayFDRFormat.rst
M llvm/docs/YamlIO.rst
A llvm/docs/_static/LLVMWyvernSmall.png
A llvm/docs/_static/copybutton.css
A llvm/docs/_static/copybutton.js
A llvm/docs/_static/custom.css
M llvm/docs/conf.py
M llvm/docs/tutorial/BuildingAJIT1.rst
M llvm/docs/tutorial/BuildingAJIT2.rst
M llvm/docs/tutorial/BuildingAJIT3.rst
M llvm/docs/tutorial/BuildingAJIT4.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl01.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl02.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl03.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl05.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl06.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl09.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl10.rst
Log Message:
-----------
[Docs] Reland Furo theme for LLVM docs (#211993)
Relands https://github.com/llvm/llvm-project/pull/184440 which was
reverted in https://github.com/llvm/llvm-project/pull/208619 because of
doc generation slowness.
The main root cause (https://github.com/llvm/llvm-project/issues/208786)
has been addressed, so attempting a reland at this point.
As before, Furo output at
https://nigham.github.io/llvm_docs_furo/LangRef.html
Comparing the generation times for "Build LLVM docs" step, this PR took
< 3m vs > 15m for the previous reverted PR.
Commit: 7f46263d2b6c01ee41ba7973b0c6c825f77cc8e2
https://github.com/llvm/llvm-project/commit/7f46263d2b6c01ee41ba7973b0c6c825f77cc8e2
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[NFC][ELF] Use hasPhdrsCommands() wrapper instead of direct access (#212273)
This is the only place outside of LinkerScript/ScriptParser that
directly accesses the phdrsCommands member, introduced in 5a58e98c2018
("[ELF] Align the end of PT_GNU_RELRO associated PT_LOAD to a
common-page-size boundary (#66042)").
Commit: cbf48349e3e1cc0fe7944090cc825532d75b6c3e
https://github.com/llvm/llvm-project/commit/cbf48349e3e1cc0fe7944090cc825532d75b6c3e
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
Log Message:
-----------
[NFC][ELF][PPC64] Pass address not offset to writePPC64LoadAndBranch (#212275)
Every caller currently subtracts the TOC base in its argument, so move
that into common code inside writePPC64LoadAndBranch. This will also
allow a different computation to be used in some cases in a future
commit.
Note that offset is now unsigned not signed; even previously, all
arguments were uint64_t, and all uses are unsigned, so making it signed
doesn't make much sense.
Commit: 0d70ca384090b709eb651fe4ea43398d591e4711
https://github.com/llvm/llvm-project/commit/0d70ca384090b709eb651fe4ea43398d591e4711
Author: Sadaf Ebrahimi <sadafebrahimi at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
Log Message:
-----------
[scudo] Add unmap and eviction stats to Secondary
Track and print stats on the number of memory unmaps and cache evictions
in the MapAllocator. These statistics track total unmaps, as well as
unmaps triggered by exceeding the maximum cache entry size or the
maximum number of entries in the cache.
Commit: 30603f527e689520ab6b3166c8c8168bcee6202c
https://github.com/llvm/llvm-project/commit/30603f527e689520ab6b3166c8c8168bcee6202c
Author: jinge90 <ge.jin at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
Update image sha256 for libc fullbuild tests (#212168)
Commit: 2af577aab9be88a2669f1b31a354c57e3509b45e
https://github.com/llvm/llvm-project/commit/2af577aab9be88a2669f1b31a354c57e3509b45e
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
Log Message:
-----------
[lldb][DIL] Fix size check when assigning a signed value with DIL (#207404)
The DIL assignment path (`frame variable 'lhs = rhs'`) routes through
`ValueObject::SetValueFromInteger`, which verifies that the new value
fits
in the destination type before writing it. That size check compared the
source `APInt`'s raw 64-bit word, treated as an unsigned value, against
the
destination type's unsigned maximum:
```
uint64_t u_max = (1 << (byte_size * CHAR_BIT)) - 1;
if (*(value.getRawData()) > u_max)
return llvm::createStringError("Illegal argument: new value is too big");
```
This is wrong in both directions:
* Small negative values that fit are rejected. A literal such as `-2`
has a
32-bit `APInt` of `0xFFFFFFFE`, whose raw word is `0xFFFFFFFFFFFFFFFE`.
Compared as unsigned against a short's `0xFFFF` it looks "too big", so
```
(lldb) frame variable 's = -2'
error: Illegal argument: new value is too big
```
even though -2 fits a `short`.
* Positive values that overflow the signed range are accepted and
silently
wrap and stored a value that displayed as `-32768`.
```
(lldb) frame variable 's = 32768'
(short) s = -32768
```
Check the number of significant bits with respect to the destination's
signedness instead: `getSignificantBits()` for a signed destination and
`getActiveBits()` for an unsigned one. This accepts the valid range
(`[-32768, 32767]` for a signed short) and rejects everything outside
it.
Also extend the value before building the `DataExtractor` used to write
it.
The extractor reads exactly `byte_size` bytes from the `APInt`'s raw
storage,
so a value narrower than the destination must be extended to cover the
full
read. Use a sign extension so negative values keep their value in the
wider
destination.
Extends the DIL assignment API test (`TestFrameVarDILAssign`) to cover
assigning negative and boundary values to the existing `short` variable:
`-2`, `-4` (from `int j`), and the `[-32768, 32767]` boundaries are
accepted,
while `32768` and `-32769` are rejected. Without the fix these
narrow-type
assignments either fail with "new value is too big" or silently wrap.
Commit: ce8a458b1bb954af613972ac5f914ac41b6710f1
https://github.com/llvm/llvm-project/commit/ce8a458b1bb954af613972ac5f914ac41b6710f1
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
Log Message:
-----------
[AMDGPU][True16] Apply v2s copies to non-def operand 0 (#212261)
`legalizeOperandsVALUt16` iterates over all operands except for the
zeroth one, as the zeroth one is typically a definition. However, if the
zeroth operand is an input (e.g., for a `V_CMP`), then this causes the
compiler to generate illegal machine code.
This patch extends `legalizeOperandsVALUt16` to apply also to the zeroth
operand, guarding for when this operand is a definition.
Commit: 3d822156e54ddff4ba60d7d338df910c12b90a8f
https://github.com/llvm/llvm-project/commit/3d822156e54ddff4ba60d7d338df910c12b90a8f
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Fix compiler crash on missing latch compare instruction (#211895)
It is never checked whether a candidate loop `L` is latched by a compare
instruction, yet `L.getLatchCmpInst()` is added to the `Roots` for
`containsUnreachable`. If a loop is predicated on anything other than a
compare instruction, `getLatchCmpInst()` returns `nullptr`, causing
`containsUnreachable` to crash when calling `isa<PHINode>`. To fix,
consider loops where `L.getLatchCmpInst()` is null to be not in
canonical form, and reject them.
- Crash: https://godbolt.org/z/Tboo4jo5Y
Assisted-by: Claude Opus 5
Commit: 3031d2d67f2c428013fe0f1885eca56038ff9853
https://github.com/llvm/llvm-project/commit/3031d2d67f2c428013fe0f1885eca56038ff9853
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/docs/resources/addingtargetsupport.md
Log Message:
-----------
[lldb][docs] Add hardware feature considerations to target doc (#211213)
As requested on #207166, this change adds information about hardware
features that can help or hinder porting LLDB.
I decided not to add an explicit "help" or "hinder" tag to them because
the descriptions are pretty general and I'd rather people took them as
starting points to think for themselves.
Debugging is a pile of things working together, so it's hard to say that
lack of one thing is "bad" without seeing it in context. Hopefully by
thinking about all these items for their target, developers will be able
to do that.
Commit: 3d2d8a9905f31f45721d3f15a0d0042675d74ec5
https://github.com/llvm/llvm-project/commit/3d2d8a9905f31f45721d3f15a0d0042675d74ec5
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/unittests/Tooling/HeaderIncludesTest.cpp
Log Message:
-----------
[clang][Tooling] Fix main header matching for headers with special characters. (#211934)
In Clang Tooling, escape HeaderStem before constructing MainIncludeRegex
to prevent special characters (such as '+') from being interpreted as
regex operators. Useful for Objective-C where "Foo+Bar.h" headers are
very common for categories.
Commit: bece576b2b682582e85c14bb1a9ea0ba7110ba80
https://github.com/llvm/llvm-project/commit/bece576b2b682582e85c14bb1a9ea0ba7110ba80
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerCommentStringPass.h
Log Message:
-----------
[PowerPC][AIX] Mark LowerCommentStringPass as RequiredPassInfoMixin
Directly using isRequired is deprecated and PassInfoMixin will soon be
moved to a detail namespace.
Reviewers: tonykuttai, w2yehia, hubert-reinterpretcast
Pull Request: https://github.com/llvm/llvm-project/pull/212018
Commit: ebd9c2c3b131f37d4cd12caf32d6b31b6852b148
https://github.com/llvm/llvm-project/commit/ebd9c2c3b131f37d4cd12caf32d6b31b6852b148
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
Log Message:
-----------
Add Objective-C support to include-cleaner's AST walker. (#211119)
Extend WalkAST to recognize and report references in Objective-C
constructs, including interfaces, protocols, message expressions,
properties, categories, compatible aliases, and instance variables. Also
update the test helper to support custom compiler arguments and add
corresponding unit tests.
Commit: d2e3e96dedbedca0bfc39fc94f64e04cfa4ec74e
https://github.com/llvm/llvm-project/commit/d2e3e96dedbedca0bfc39fc94f64e04cfa4ec74e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/sorting/permutation.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::next_permutation and std::prev_permutation (#210966)
Commit: c060161b318f5162556d22d801a6ae704841c983
https://github.com/llvm/llvm-project/commit/c060161b318f5162556d22d801a6ae704841c983
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
R libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/min_max_element.bench.cpp
R libcxx/test/benchmarks/algorithms/minmax.bench.cpp
A libcxx/test/benchmarks/algorithms/ranges_min_max.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::min_element, std::max_element and std::ranges::max (#209590)
Extend missing coverage and increase consistency across how the
benchmarks are written.
Commit: a3b6e0baca37a717b3c498c21514256df4c29ef2
https://github.com/llvm/llvm-project/commit/a3b6e0baca37a717b3c498c21514256df4c29ef2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/sorting/nth_element.bench.cpp
Log Message:
-----------
[libc++] Add benchmark for std::nth_element (#210112)
Commit: 20f06e490149867d2a261cbcca41fa176bdc87b1
https://github.com/llvm/llvm-project/commit/20f06e490149867d2a261cbcca41fa176bdc87b1
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
[IR][NFC] Remove DbgInstPtr PointerUnion (#212233)
DbgInstPtr was needed in the transitionary phase between intrinsics and
records, but can be removed now.
Commit: 26bf39cdba0bfcd0ea781f95cf44519922a8eb56
https://github.com/llvm/llvm-project/commit/26bf39cdba0bfcd0ea781f95cf44519922a8eb56
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
M lld/test/ELF/ppc64-ifunc.s
Log Message:
-----------
[ELF][PowerPC] Don't assume TOC pointer is valid in IPLT entries (#207555)
Unlike normal PLT entries, IPLT entries can be called indirectly even
when in PIEs/DSOs, and so there's no guarantee on what's in the TOC
pointer register at that time. Therefore we must emit variants of the
existing code that work without it, whether r12-relative (playing the
same role as MIPS's $25) in the same number of instructions, or first
retrieving PC in an i386-like manner, being careful not to clobber LR.
On 32-bit PowerPC even direct calls to IPLT entries face the same issue,
since we'd use the TOC base of the resolver, which may not be the same
as the caller, even within the same object.
Normal canonical PLTs still look broken on 64-bit PowerPC as they use
the TOC pointer register too, and similarly on 32-bit PowerPC for PIEs.
We should probably treat these cases the same as PIE on i386 (except
including PDEs for 64-bit PowerPC), where it's an error due to the use
of %ebx in PLT entries.
Commit: 0733641570c25e6323e39c4ee66693a4668429a8
https://github.com/llvm/llvm-project/commit/0733641570c25e6323e39c4ee66693a4668429a8
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
Log Message:
-----------
[libc++][test] re-enable clear padding runtime test (#211258)
Commit: de793e832cc5cddf9d8554ec07f42e1298908f72
https://github.com/llvm/llvm-project/commit/de793e832cc5cddf9d8554ec07f42e1298908f72
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/spillv16.ll
Log Message:
-----------
[AMDGPU][True16] Retain `hi16` subregisters through v2s copies (#211848)
The current legalisation for SGPR/VGPR copies with mismatched sizes does
not check which VGPR subregister is used, and defaults to using `lo16`.
If the `hi16` subregister is used instead, this information is lost, and
the subregister is incorrectly replaced with `lo16`.
This patch retains the subregister used when legalising the copy.
Commit: ec96f85d6d82c5e71b36f9c827f09bb3b4825390
https://github.com/llvm/llvm-project/commit/ec96f85d6d82c5e71b36f9c827f09bb3b4825390
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/Target/AArch64/AArch64Processors.td
A llvm/test/TableGen/ProcessorAlias.td
A llvm/test/TableGen/ProcessorAliasErrors.td
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
TableGen: Add first class support for processor aliases (#211775)
Previously isCPUStringValid was virtual so TableGen could emit an
AArch64 specific hack for recognizing cpu aliases. Teach tablegen
about aliases, and insert each alias into the CPU subtype table as its
own entry (sorted by name, carrying the canonical processor's features
and scheduling model).
There is further opportunity for code sharing improvements. AArch64's
aliases are consumed by ARMTargetDefEmitter to emit a custom inc file
in TargetParser which should be universalized.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 58a6567a166e0cb44227d162914778176a4faf62
https://github.com/llvm/llvm-project/commit/58a6567a166e0cb44227d162914778176a4faf62
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNProcessors.td
Log Message:
-----------
AMDGPU: Use ProcessorAlias for legacy arch names (#211776)
Older targets have aliasing names which were previously implemented
by defining a second copy of the processor, identical except for the
name Use the recently improved tablegen mechanism for defining name-only
aliases. This dedupliates some redundant table entries, like the sched model.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d53cb74cbbc24fc5deba87b94ec38a7636bb52a9
https://github.com/llvm/llvm-project/commit/d53cb74cbbc24fc5deba87b94ec38a7636bb52a9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
Log Message:
-----------
X86: Use ProcessorAlias for duplicated processor names (#211953)
Many X86 processors were defined multiple times under different names,
emitting an identical ProcessorModel for each spelling and duplicating
the feature masks, tune features, and scheduling model index in the
subtype table.
Define each processor once under its canonical name and express the
alternate spellings with ProcessorAlias, using the tablegen alias
mechanism. This deduplicates the redundant subtype table entries and
saves about 4.6k with the new alias table (#211952)
Co-Authored-By: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 7baccda8dde277b16cb87318536b3ca70d448db1
https://github.com/llvm/llvm-project/commit/7baccda8dde277b16cb87318536b3ca70d448db1
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
M llvm/test/CodeGen/AMDGPU/si-late-branch-lowering-preserve-loop-info.mir
M llvm/test/CodeGen/AMDGPU/si-pre-emit-peephole-preserve-loop-info.mir
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
M llvm/test/Transforms/SCCP/preserve-analysis.ll
Log Message:
-----------
[LoopInfo] Build dominator tree only for irreducible CFG (#212098)
analyze() requires a dominator tree, so LoopAnalysis and
MachineLoopAnalysis request one for every function, though only an
irreducible CFG queries it. Clients that build their own, from
InlineCost to XRayInstrumentation, need it for nothing else.
Take the function and a callback returning the tree instead, and call it
when an edge re-enters a loop. Add an analyze(F) overload for a client
that holds no tree.
The number of dominator tree builds does not change in an -O2 pipeline
building sqlite3.bc, where SROA and InstCombine cache one before
LoopAnalysis runs.
Tests that observed the tree through LoopAnalysis now require it
explicitly.
MachineLoopInfoWrapperPass keeps requiring one: the legacy pass manager
cannot provide it on demand.
Aided by Claude Opus 5
Commit: 3c6d9cdb08c9245bb4d80e3262f74ea372046bcb
https://github.com/llvm/llvm-project/commit/3c6d9cdb08c9245bb4d80e3262f74ea372046bcb
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Add missing action to checkout (#211720)
The upload-release-artifact action uses the require-team-membership
action so we need to make sure that latter is checkout out when calling
upload-release-artifact.
Commit: 07aa3b710f2622f662cab7a53ddf1288c725a9be
https://github.com/llvm/llvm-project/commit/07aa3b710f2622f662cab7a53ddf1288c725a9be
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/buildvector-used-by-insertvalue.ll
Log Message:
-----------
[SLP] Only consider BuildVector inserts into the same object. (#212269)
When following insertelement instruction for a BuildVector sequence, we
may discover a user that inserts into a different vector.
Bail out when that happens instead of crashing.
PR: https://github.com/llvm/llvm-project/pull/212269
Commit: e59df8e339bc5bc07991e0a67d3d0cb8c25a94c2
https://github.com/llvm/llvm-project/commit/e59df8e339bc5bc07991e0a67d3d0cb8c25a94c2
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array-skip-element-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugTypeArray. (#211537)
This PR adds `DebugTypeArray` to `SPIRVNonSemanticDebugHandler`:
1. `partitionTypes` buckets `DICompositeType` nodes tagged
`DW_TAG_array_type` without `DINode::FlagVector` (vectors are emitted
separately).
2. `emitNonSemanticGlobalDebugInfo` emits one `DebugTypeArray` per node
after the pointer types and records the id in `DebugTypeRegs`.
3. `emitDebugTypeArray` appends one `OpConstant` component count per
`DISubrange`, in subrange order. A subrange with no constant count emits
0, matching `OpTypeRuntimeArray`. An array whose element type is not in
`DebugTypeRegs` is skipped.
Clang lowers a matrix to a `DW_TAG_array_type` with two subranges in
`CGDebugInfo::CreateType(const ConstantMatrixType *)`, so an HLSL
`float4x4` emits as a `DebugTypeArray` with two counts.
`DebugTypeMatrix` needs a distinguishing flag from the frontend.
Added a couple of tests in `llvm/test/CodeGen/SPIRV/debug-info/`:
1. `debug-type-array.ll` covers a 1D array, a 2D array, a runtime-sized
array, and an array of vectors, and asserts that we are not emitting
`DebugTypeMatrix` (this will need to be changed when/if we start
emitting them).
2. `debug-type-array-skip-element-not-in-regs.ll` tests arrays of types
that cannot have debug info (I used array of pointers wit no DWARF
address space).
Commit: 2a323d5bb13890cc0667d5e21e43f41020f4f606
https://github.com/llvm/llvm-project/commit/2a323d5bb13890cc0667d5e21e43f41020f4f606
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/lib/ProfileData/SampleProf.cpp
Log Message:
-----------
[ProfileData] Make FunctionSamples profile-format flags atomic (#208964)
`lld/test/ELF/lto/sample-profile.ll` is failing in ThreadSanitizer
build.
In a parallel in-process ThinLTO link, each backend thread reads the
sample profile in SampleProfileLoader::doInitialization and writes these
globals.
Make the variables std::atomic<bool> so the same-value writes are
well-defined. An architectural ideal solution that holds these states in
a container seems very intrusive.
Commit: b8bd63c69c83bc13b31e808f9b7d84a562251396
https://github.com/llvm/llvm-project/commit/b8bd63c69c83bc13b31e808f9b7d84a562251396
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCEmitNYIFlang.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCInitializeFIRAnalyses.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCPipeline.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/test/Driver/openacc-nyi.f90
A flang/test/Transforms/OpenACC/acc-emit-nyi-flang.fir
Log Message:
-----------
[flang][acc] Emit NYI messages for unsupported directives (#211894)
Add an OpenACC MLIR pass that emits not-yet-implemented messages for
unsupported directives immediately after HLFIR generation. This allows
OpenACC dialect operations to be emitted with -emit-hlfir while making
full compilation fail early with clear diagnostics, instead of later
when unhandled OpenACC operations reach LLVM dialect conversion.
Commit: 41a5357e389b3c04d4c44631360dd3661488c629
https://github.com/llvm/llvm-project/commit/41a5357e389b3c04d4c44631360dd3661488c629
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaType.cpp
M clang/test/CXX/drs/cwg14xx.cpp
A clang/test/SemaCXX/qualified-function-typeof.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][Sema] Allow abstract declarators to specify cv-qualified function types as per CWG1417 (#209836)
Abstract declarator contexts (specifically `DeclaratorContext::TypeName`) now properly bypass this restricted rule, allowing cv-qualified function types in `__typeof__` while maintaining restrictions in other contexts like `typeid`, `sizeof`, C-style casts, and `new` expressions per CWG1417.
Commit: 5565740f2367093b89481ba7371adf820971977d
https://github.com/llvm/llvm-project/commit/5565740f2367093b89481ba7371adf820971977d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.h
A lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
Log Message:
-----------
[lld] Don't drop RELR relocations for late-added GOT entries (#211911)
In #208959 we started dropping RELR relocations for late-added GOT
entries when reverting x86-64 GOTPCRELX relaxations in
X86_64::relaxOnce.
There is a separate unrelaxation bug where if the object files didn't
have any relocations of a certain type, we'd prune .relr.dyn (or even
.rela.dyn). Will be addressed separately.
Assisted-by: Gemini
Commit: ad791f26ef495dbc2c3c6c283518872697210898
https://github.com/llvm/llvm-project/commit/ad791f26ef495dbc2c3c6c283518872697210898
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
Log Message:
-----------
[scudo] Test to verify fork and allocate does not deadlock. (#211975)
Commit: 751eb22c1b835b675166e4936a93f903b952f28f
https://github.com/llvm/llvm-project/commit/751eb22c1b835b675166e4936a93f903b952f28f
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
Log Message:
-----------
[AArch64][GlobalISel] Use integer type for truncating merged call args. (#212208)
Commit: 02da01251156c831a54417d4882aad7226cdbbe1
https://github.com/llvm/llvm-project/commit/02da01251156c831a54417d4882aad7226cdbbe1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/lib/CodeGen/TargetSubtargetInfo.cpp
M llvm/lib/MC/MCSubtargetInfo.cpp
M llvm/test/TableGen/ProcessorAlias.td
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
TableGen: Use a compact table for CPU aliases (#211952)
Commit: b9a7aad4a9d50b9ec60b59d197be43a973a0572c
https://github.com/llvm/llvm-project/commit/b9a7aad4a9d50b9ec60b59d197be43a973a0572c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/release-tasks.yml
Log Message:
-----------
workflows/release-tasks: Fix permissions for release-documentation (#212310)
Commit: 0600aeae3ba6c41da80bbb84c10f1cad4c9a58ba
https://github.com/llvm/llvm-project/commit/0600aeae3ba6c41da80bbb84c10f1cad4c9a58ba
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
Log Message:
-----------
[AArch64][GlobalISel] Use integer types for inline assembly lowering (#212214)
If we need to generate a trunc then we can use an integer type for the
lowering.
Commit: 7336a38e5c6dea03c243bb37b44a2207471e63d3
https://github.com/llvm/llvm-project/commit/7336a38e5c6dea03c243bb37b44a2207471e63d3
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/AST/TypeLoc.cpp
A clang/test/SemaCXX/atomic-auto.cpp
Log Message:
-----------
[clang] Add missing VisitAtomicTypeLoc to TypeLoc.cpp GetContainedAutoTypeLocVisitor (#211752)
Adds the missing `VisitAtomicTypeLoc` method to TypeLoc.cpp `GetContainedAutoTypeLocVisitor`.
Fixes: https://github.com/llvm/llvm-project/issues/211556 ICE.
Assisted-by: Codex
Commit: 68e94c904067b1b984c6b337819633aee9f0c7da
https://github.com/llvm/llvm-project/commit/68e94c904067b1b984c6b337819633aee9f0c7da
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/test/Analysis/dangling-ptr-deref.cpp
Log Message:
-----------
[analyzer] Improve dangling value tracking in DanglingPtrDeref (#211818)
Improve dangling value tracking in the `DanglingPtrDeref` checker by
adding `trackExpressionValue`. The report with this change now tracks
the dangling value and shows where the value originated from. Currently
the checker only points at the destruction and use sites which isn't
always useful for the user.
Commit: f83fcfbdc7fc1bee6ebf242b110a5c2b46703ae9
https://github.com/llvm/llvm-project/commit/f83fcfbdc7fc1bee6ebf242b110a5c2b46703ae9
Author: Florian Mayer <fmayer at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
A llvm/test/CodeGen/MIR/X86/machine-verifier-nophi.mir
Log Message:
-----------
[MachineVerifier] do not use !NoPHI to check if a MF has phi nodes (#211941)
We were violating the property expressed in MachineFunction.h:
```
The properties are stated in "positive" form; i.e. a pass could require
that the property hold, but not that it does not hold.
```
Resolves a false positive "MBB has allocatable live-in, [...]" error in
our downstream target.
Commit: 79ea87c8da20263fa54c9f60b4befb3a9bf962cf
https://github.com/llvm/llvm-project/commit/79ea87c8da20263fa54c9f60b4befb3a9bf962cf
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/tools/llubi/attribute_noundef_ub.ll
M llvm/test/tools/llubi/attributes.ll
M llvm/test/tools/llubi/bitcast_be.ll
M llvm/test/tools/llubi/bitcast_le.ll
A llvm/test/tools/llubi/bytes_poison.ll
A llvm/test/tools/llubi/bytes_undef.ll
M llvm/test/tools/llubi/freeze.ll
M llvm/test/tools/llubi/global.ll
M llvm/test/tools/llubi/load_noundef_ub_undef.ll
M llvm/test/tools/llubi/loadstore_be.ll
M llvm/test/tools/llubi/loadstore_le.ll
M llvm/tools/llubi/lib/Context.cpp
M llvm/tools/llubi/lib/Context.h
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llubi/lib/Value.cpp
M llvm/tools/llubi/lib/Value.h
Log Message:
-----------
[llubi] Add support for byte types (#200672)
This patch implements the support for byte types. The byte order depends
on the endianness for better performance in the fast path. For
non-byte-sized byte types, high bits are zeroed out.
Commit: a41a3359ec24f019a5a9576631228f0314be38a6
https://github.com/llvm/llvm-project/commit/a41a3359ec24f019a5a9576631228f0314be38a6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/CUDA/cuf02.cuf
Log Message:
-----------
[flang][cuda] Do not check dummy in stmt function in device code (#212037)
Commit: 289a2d901a480e3c0ba8aac80c40f2fcd768506f
https://github.com/llvm/llvm-project/commit/289a2d901a480e3c0ba8aac80c40f2fcd768506f
Author: Stephen Long <63318318+steplong at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
A mlir/test/Dialect/Linalg/block-pack-matmul-scalable.mlir
Log Message:
-----------
[mlir][LinalgBlockPackMatmul] Add support for scalable block factors (#211354)
Assisted by: Claude Sonnet 4.6
---------
Co-authored-by: Adam Siemieniuk <adam.siemieniuk at intel.com>
Commit: a950d4a527311fbfe202d563331f133400fd2c5e
https://github.com/llvm/llvm-project/commit/a950d4a527311fbfe202d563331f133400fd2c5e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
Log Message:
-----------
AMDGPU: Use uint8_t for IsaVersion fields (#212311)
Commit: 460dbfc7ec59a89cc80f7c03879f60278ec2a6c4
https://github.com/llvm/llvm-project/commit/460dbfc7ec59a89cc80f7c03879f60278ec2a6c4
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Use loop latch to determine step/start for conditional recurrence (#211916)
The function `matchConditionalRecurrence` iterates over both PHI inputs
and attempts to match each one to determine which is `Start` and which
is `Step`. However, some of the failure conditions in the loop `return
false`, which has the potential to classify some valid CRC loops as not
having a conditional recurrence. The loop here is not really needed at
all-- instead, use `L.getLoopLatch()` to determine `Start`/`Step`, since
the incoming value from the latch block will always be the `Step`. This
also avoids the aforementioned false negative classifications.
Assisted-by: Claude Opus 5
Commit: c2b22642d289413e136da29eaa1ce176ce438484
https://github.com/llvm/llvm-project/commit/c2b22642d289413e136da29eaa1ce176ce438484
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
Log Message:
-----------
[AArch64][MacroFusion] Add per cluster kind statistic (#212103)
So we can easily differentiate between different cluster kinds on
AArch64 backend.
Commit: bd7bb26108bd86eeeef0962577b52d0f435a7ac3
https://github.com/llvm/llvm-project/commit/bd7bb26108bd86eeeef0962577b52d0f435a7ac3
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/RecordLayout.h
M clang/lib/AST/RecordLayout.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
A clang/test/Layout/ms-arm64-aligned-base-tail-padding.cpp
Log Message:
-----------
[clang] Match MSVC ABI for over-aligned base tail padding on Arm64 (#210461)
When targeting aarch64-pc-windows-msvc, clang laid out a base following
an over-aligned, non-standard-layout base at the wrong offset. MSVC on
Arm64 reuses the over-aligned base's tail padding for the subsequent
base, but clang rounded the base up to a full slot, so the two disagreed
on member offsets, breaking interop between clang- and MSVC-built
binaries.
Fix: store each record's natural non-virtual alignment (excluding
`alignas`/`__declspec(align)` over-alignment) as
`getNonRequiredNVAlignment()`, and on Arm64 fold in a base's natural
alignment rather than its full alignment. This is gated to Arm64 only;
Arm64EC and x64 follow the x64 rule (no reuse) and are unchanged.
Validated against MSVC (Hostx64\arm64\cl.exe
/d1reportSingleClassLayout): clang now matches MSVC Arm64 exactly for
the reduced repro, the original polymorphic case (vftable + empty base +
template), and a range of probe cases covering natural vs.
over-alignment padding and field vs. base reuse. Arm64EC and x64 output
is byte-identical to before.
Fixes #210174
Commit: 4d14e9641ddf38d4b6cc2dbb5c882135d94c68c1
https://github.com/llvm/llvm-project/commit/4d14e9641ddf38d4b6cc2dbb5c882135d94c68c1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][MathToSPIRV] Allow math.cttz lowering for non-i32 integer widths (#206400)
Co-authored-by: Igor Wodiany <dev at wodiany.com>
Commit: c881d81f6b189f14c56c9bec8842ddba6255d0e5
https://github.com/llvm/llvm-project/commit/c881d81f6b189f14c56c9bec8842ddba6255d0e5
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/SDTRewriter.cpp
Log Message:
-----------
[BOLT] Release pseudo-probe decoder after emit (#211935)
PseudoProbeRewriter builds sizable data structures and then hold onto
them after they are needed.
PseudoProbeRewriter::postEmitFinalizer() parses the input .pseudo_probe
sections into an MCPseudoProbeDecoder whose address-to-probe and
GUID-to-function-desc maps can be very large (tens of GiB on big
binaries with many probes). This is not used again once probes have been
updated, yet they survive into the memory-heavy DWARF rewrite
(updateDebugInfo), directly inflating BOLT's peak RSS at the worst
possible time.
This frees them at the end of the postEmitFinalizer() calls, before
updateDebugInfo runs.
Stacked on top of the .dwo DIE diff, in large binaries you should
observe ~17% peak RSS wins if your
build uses pseudo probe maps.
Commit: 63e60a2853b1ff6fdac3cbaf668e2d2a63d51fae
https://github.com/llvm/llvm-project/commit/63e60a2853b1ff6fdac3cbaf668e2d2a63d51fae
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/lib/Passes/BinaryPasses.cpp
A bolt/test/X86/jump-table-empty-block-strict.s
Log Message:
-----------
[BOLT] Fix strict mode bug in removal of block referenced by JT (#211940)
Summary:
BOLT can create a jump table object from a PC-relative operand reference
(e.g. leaq JT(%rip)) whenever the referenced memory looks like a PIC
jump table -- see
BinaryContext::handleAddressRef. This is independent of whether BOLT
recognizes the indirect jump dispatch itself. The jump table annotation
is only attached to the jmp instruction later, in
BinaryFunction::analyzeIndirectBranch, and only when the target-specific
analyzeIndirectBranch matcher recognizes the dispatch pattern.
If the matcher does not recognize the pattern, the annotation is never
attached to the jmp, even though the jump table object and its entries
exist and reference basic blocks in the function.
In strict mode BOLT still fully processes such a function: it stays
simple, the block is marked as having unknown control flow, and the jump
table object is kept intact. Because the terminator carries no jump
table annotation, BinaryBasicBlock::hasJumpTable() returns false for it.
Later passes then transform the function normally: remove-nops can empty
a jump table target block that consists only of nops, and NormalizeCFG
then redirects the block's predecessor and deletes the empty block - it
does not recognize the block as a jump table target, since the
predecessor's hasJumpTable() is false. The jump table object still
references the deleted block by label, which produces an "Undefined
temporary symbol" error and fails emission.
Fix NormalizeCFG so it does not redirect/remove a block whose
predecessor ends in an indirect branch, not only one flagged by
hasJumpTable().
Commit: 767716657985094ce2e73eafe87d5fa8a24ac843
https://github.com/llvm/llvm-project/commit/767716657985094ce2e73eafe87d5fa8a24ac843
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[OFFLOAD][L0] Fix zero argurment kernel launch (#212296)
PR #205224 changed the path for kernels with no arguments to not use
appendLaunchKernelWithArgs, while at the same time it removed
zeKernelSetGroupSize which resulted in incorrect sizing of the kernel.
This PR removes the alternate path and makes sure all launches go
through appendLaunchKernelWithArgs.
Alternatively we can restore zeKernelSetGroupSize on the alternate path.
Commit: 6534ceefd231771466abc9c388b93bb8b0913316
https://github.com/llvm/llvm-project/commit/6534ceefd231771466abc9c388b93bb8b0913316
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Basic/OptionalUnsigned.h
Log Message:
-----------
[Clang] [NFC] Update OptionalUnsigned ctor to only reject signed integers (#212321)
Currently, the `OptionalUnsigned(int) = delete;` constructor means that
constructing e.g. an `OptionalOrUnsigned<uint64_t>` from an `unsigned`
fails because overload resolution is ambiguous (because `unsigned` ->
`int` and `unsigned` -> `uint64_t` are both valid conversions). This
patch adds a constraint to make sure the deleted constructor only
catches signed integer types.
This is needed for #212319.
Commit: 864f9a09887559491ef3f7ad39d57c703bc14f40
https://github.com/llvm/llvm-project/commit/864f9a09887559491ef3f7ad39d57c703bc14f40
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate C# UTF 8 string literals (#211919)
Fixes #210506
Commit: 34c7c5ccca260c695d6b212a06c0e620d494adb4
https://github.com/llvm/llvm-project/commit/34c7c5ccca260c695d6b212a06c0e620d494adb4
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
[AMDGPU][NFC] Rename packed instruction helper functions for clarity (#211933)
Renames packed instruction helper functions to better reflect their
purpose:
- isPackedFP32or64BitInst → isSingleSGPRReadInst
- isLegalGFX12PlusPackedMathFP32or64BitOperand → isLegalSingleSGPRReadInstOperand
Commit: cef8432f7d149ef4e5888e29ff4d39ea580a806c
https://github.com/llvm/llvm-project/commit/cef8432f7d149ef4e5888e29ff4d39ea580a806c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
Log Message:
-----------
[VPlan] Account for masked VPInstructions in getIntrinsicID. (#212234)
getIntrinsicID may be called with masked VPInstructions. Update to skip
the mask, which is always the last operand.
Fixes https://github.com/llvm/llvm-project/issues/212165.
PR: https://github.com/llvm/llvm-project/pull/212234
Commit: aa8942dbf406e9e4c0cae84a6567dac37fac57c6
https://github.com/llvm/llvm-project/commit/aa8942dbf406e9e4c0cae84a6567dac37fac57c6
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDMAOperations.md
Log Message:
-----------
[Docs][AMDGPU] Eliminate incorrect use of double backticks [NFC] (#212343)
Commit: 30bff76d3a294fe0882a05472234b25bb752b16a
https://github.com/llvm/llvm-project/commit/30bff76d3a294fe0882a05472234b25bb752b16a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Do not emit cuf.register_variable_static for device/constant under unified mode (#212344)
Commit: 295c3a461c7dd9d7f34306a89181ceb7139760ba
https://github.com/llvm/llvm-project/commit/295c3a461c7dd9d7f34306a89181ceb7139760ba
Author: Sophia Herrmann <herrmann15 at llnl.gov>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Headers/__clang_gpu_device_functions.h
Log Message:
-----------
[Offload] Decouple CUDA source from NVPTX syncthreads assumption (#212339)
With the introduction of offloading via LLVM, the frontend language will
not necessarily determine the backend target anymore. Thus it is
necessary to guard against NVPTX instead of CUDA, since we could have
CUDA-language device code targeting a non-NVPTX backend, where Clang
does not provide __syncthreads as an NVPTX builtin and the generic shim
is still needed.
This also avoids duplicate definitions on NVPTX. Clang already provides
`__syncthreads` as an NVPTX target builtin, so
`__clang_gpu_device_functions.h` should not also define an inline
`__syncthreads` shim for NVPTX targets.
Commit: 4ca573fb7947b3bebf5c1da512b5142679545905
https://github.com/llvm/llvm-project/commit/4ca573fb7947b3bebf5c1da512b5142679545905
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/schema.yaml
Log Message:
-----------
[libc++] Rename the test suite used on LNT (#212347)
The LNT instance on http://lnt.llvm.org was wiped since I created the
original schema, and we can now start over clean with a new test suite
named `libcxx`.
Commit: a22416ba1ec8894ef98a437275e91f0ade3e2ba1
https://github.com/llvm/llvm-project/commit/a22416ba1ec8894ef98a437275e91f0ade3e2ba1
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
A llvm/test/Analysis/DXILResource/has-atomic64-use.ll
A llvm/test/CodeGen/DirectX/ContainerData/PSVResources-UsedByAtomic64.ll
Log Message:
-----------
[HLSL] Add UsedByAtomic64 shader flag (#211691)
This PR adds the `UsedByAtomic64` shader flag.
It detects any usage of an atomic instruction with a 64 bit type, and if
detected, sets the shader flag to true.
This is needed to pass DXIL validation.
Fixes https://github.com/llvm/llvm-project/issues/104392
Assisted by: Github Copilot
Commit: 8a49f8839cdf743af250d3501262da0bb9876c98
https://github.com/llvm/llvm-project/commit/8a49f8839cdf743af250d3501262da0bb9876c98
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/LogicalView/BUILD.gn
Log Message:
-----------
[gn build] Add missing deps (#212352)
>From e7290b1f1815626c4461d38671d93093590bf405
Commit: 4f02e1e45c2711a94dae0eac2051ad7c2e5ca8c2
https://github.com/llvm/llvm-project/commit/4f02e1e45c2711a94dae0eac2051ad7c2e5ca8c2
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.h
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
A lldb/test/API/lang/objc/tagged-pointer-children/Makefile
A lldb/test/API/lang/objc/tagged-pointer-children/TestTaggedPointerChildren.py
A lldb/test/API/lang/objc/tagged-pointer-children/main.m
A lldb/test/API/lang/objc/tagged-pointer-children/tagged_synth_provider.py
Log Message:
-----------
[LLDB] Hide unresolvable children from ObjC tagged pointers (#211936)
Foundation's small value inline representations have valid summaries and
sometimed synthetic children, but LLDB cannot access any ivars from
their base classes (such as [NSObject isa]).
Use a synthetic child provider to hide them.
rdar://182434208
Assisted-by: claude
Commit: 61225df551b071f07dbf9fab98242a7477506b49
https://github.com/llvm/llvm-project/commit/61225df551b071f07dbf9fab98242a7477506b49
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/TableGen/RuntimeLibcallEmitter-bad-system-library-entry-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter-nested-predicates-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag-errors.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
Log Message:
-----------
RuntimeLibcalls: Migrate to dag libcall predicates (#210674)
Switch to using dag predicates instead of free-form code predicates.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d8d33abac0140c0554fd754b2646e142edcca484
https://github.com/llvm/llvm-project/commit/d8d33abac0140c0554fd754b2646e142edcca484
Author: William Moses <gh at wsmoses.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Analysis/FlatLinearValueConstraints.h
M mlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/unittests/Analysis/Presburger/Parser.h
Log Message:
-----------
[MLIR] Allow recovering from semi-affine sets in FlatLinearValueConst… (#212346)
…raints
The IntegerSet constructor of FlatLinearValueConstraints asserts when
flattening fails, which happens for semi-affine integer sets. Since the
failure is signalled from inside a constructor, callers have no way to
detect the unsupported case ahead of time and no way to work around it;
they simply crash.
Add an optional `bool *error` parameter to the constructor. When it is
non-null, hitting the unimplemented case sets `*error` to true and
returns instead of asserting, letting callers bail out gracefully.
`*error` is set to false on success. When the pointer is null the
previous assert behavior is retained, so existing callers are
unaffected.
Commit: 0fa9cfa567277a1fadd71e4c8cf41db5a7c84cff
https://github.com/llvm/llvm-project/commit/0fa9cfa567277a1fadd71e4c8cf41db5a7c84cff
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/CIBestPractices.rst
A llvm/docs/GitHubActionsRunners.rst
M llvm/docs/Reference.md
Log Message:
-----------
[CI] Add documentation for self-hosted runners (#211622)
This patch adds (work in progress) documentation for the various
self-hosted runner groups we have access to in the LLVM monorepo.
Commit: 05eba618a37839999d3eb6ca7328337cd4765dfd
https://github.com/llvm/llvm-project/commit/05eba618a37839999d3eb6ca7328337cd4765dfd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Add vputils::getEarlyExits helper (NFC) (#212348)
Both handleUncountableEarlyExits and the countable early-exit disconnect
in handleEarlyExits walk all exit blocks and skip predecessors coming
from the middle block to find the early exiting blocks.
Factor that walk out into vputils::getEarlyExits, returning the (early
exiting block, exit block) pairs.
Commit: bd5883c35f43b01ab96bbdba1bc14a81f78694ea
https://github.com/llvm/llvm-project/commit/bd5883c35f43b01ab96bbdba1bc14a81f78694ea
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/AST/RecordLayoutBuilder.cpp
A clang/test/CodeGenCXX/Inputs/override-layout-aligned-base.layout
A clang/test/CodeGenCXX/override-layout-aligned-base.cpp
Log Message:
-----------
[clang] Fix record alignment lost via external layout on Arm64 (#212362)
An external layout source (such as LLDB reading DWARF) supplies a
record's final alignment directly, since `alignas` / `__declspec(align)`
attributes are not recoverable from debug info. `finalizeLayout`
captured `NonRequiredAlignment` before applying the external alignment,
so an externally laid out record published a stale, too-small value.
On Arm64 this field is used to fold a base's alignment into the derived
record, so a derived class picked up the stale value instead of the
base's actual alignment. This regressed
`lldb/test/API/lang/cpp/alignas_base_class` when #210461 was merged,
where `alignof(Derived)` evaluated to 1 instead of 8. Other targets were
unaffected as they do not read this field.
Treat all of an externally supplied alignment as non-required, as there
is no way to tell how much of it was imposed by an alignment attribute.
Commit: 4053f2b96988b69d68c8cc12913f51c149f1ac46
https://github.com/llvm/llvm-project/commit/4053f2b96988b69d68c8cc12913f51c149f1ac46
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang-rt][cuda] Keep CUFDeviceIsActive working under runtime/driver skew (#212320)
Resolve cuDevicePrimaryCtxGetState via the installed driver version, and
prefer running scope-exit cleanup when the probe cannot prove teardown,
so local device allocations are not leaked when the unversioned lookup
fails.
Commit: 7d96bd2ac1532e9ec6adf8eada303b5fe646857f
https://github.com/llvm/llvm-project/commit/7d96bd2ac1532e9ec6adf8eada303b5fe646857f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
Log Message:
-----------
[AMDGPU] Allow scalar operands in V_PK_LSHL_ADD_U64 (#212334)
Patch creates dummy source modifiers for this instruction to use
with OPSEL. Even though these do not support modifiers we can reuse
the same mechanics as with packed fp64 and other u64 to allow scalar
operands.
Commit: 63fe0cfe25e6e438d64c81785b93e500855adb78
https://github.com/llvm/llvm-project/commit/63fe0cfe25e6e438d64c81785b93e500855adb78
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/test/Transforms/RelLookupTableConverter/AArch64/no_relative_lookup_table.ll
M llvm/test/Transforms/RelLookupTableConverter/unnamed_addr.ll
Log Message:
-----------
Reapply "Disable RelLookupTableConverter on AArch64" (#212358)
This reverts commit ce8cf3f0a427f7fcf178a9a64ea48a4167211f82 (#207046).
Reland of #204669.
https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst#code-models
says that under the small code model rodata + text must fit in 2GB, but
the RelLookupTableConverter pass introduces PREL32 relocations from
.rodata to .data.rel.ro:
```
$ cat /tmp/a.c
extern void ext_func0(void);
extern void ext_func1(void);
typedef void (*func_t)(void);
static const func_t table0[2] = { ext_func0, ext_func1 };
static const func_t table1[2] = { ext_func1, ext_func0 };
static const func_t table2[2] = { ext_func0, ext_func0 };
static const func_t table3[2] = { ext_func1, ext_func1 };
const func_t *get_table(unsigned int idx) {
switch (idx % 4) {
case 0: return table0;
case 1: return table1;
case 2: return table2;
case 3: return table3;
}
return table0;
}
$ clang -O2 --target=aarch64-linux-gnu -fPIC -c /tmp/repro.c -o /tmp/repro.o
$ llvm-readelf -r /tmp/repro.o
...
Relocation section '.rela.rodata' at offset 0x370 contains 4 entries:
Offset Info Type Symbol's Value Symbol's Name + Addend
0000000000000000 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 0
0000000000000004 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 14
0000000000000008 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 28
000000000000000c 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 3c
...
```
Commit: e364a21086c71a68cac28f25469a7b014d1c2abd
https://github.com/llvm/llvm-project/commit/e364a21086c71a68cac28f25469a7b014d1c2abd
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/Instrumentor.md
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/test/Instrumentation/Instrumentor/default_config.json
A llvm/test/Instrumentation/Instrumentor/inline_runtime.ll
A llvm/test/Instrumentation/Instrumentor/inline_runtime_config.json
M llvm/test/Instrumentation/Instrumentor/lit.local.cfg
A llvm/test/Instrumentation/Instrumentor/runtimes/bytes_computed_rt.ll
Log Message:
-----------
[Instrumentor] Reintroduce runtime inlining (#208072)
The ability to link in and eagerly inline a specified runtime was
present in older dev versions of the instrumentor. This patch ports that
functionality to the current instrumentor pass and adds a test.
Co-authored-by: Johannes Doerfert <johannes at jdoerfert.de>
Co-authored-by: Kevin Sala <salapenades1 at llnl.gov>
Co-authored-by: Ivan Radanov Ivanov <ivanov.i.aa at m.titech.ac.jp>
Commit: 912128312f026605bce4ff11ef8a37d56a1a03f8
https://github.com/llvm/llvm-project/commit/912128312f026605bce4ff11ef8a37d56a1a03f8
Author: Patryk Stefanski <patryk.stefanski at protonmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
A clang/test/Index/USR/class-type-tpl-arg.cpp
Log Message:
-----------
[clang][Index][USR] Generate USRs for class-type non-type template arguments (#212356)
A class-type non-type template parameter is represented in the AST by a
TemplateParamObjectDecl, which has an empty DeclarationName.
USRGenerator had no visitor for it, so it fell through to
VisitNamedDecl, where EmitDeclName fails on the empty name and sets
IgnoreResults. That discarded the USR of the enclosing declaration.
Add a visitor that encodes the parameter object's type and value, so
specializations on distinct values get distinct USRs and equal values
agree.
Fixes #212351
Commit: 5e91f5d57a19752fe245ab64c1265e26c44d0d76
https://github.com/llvm/llvm-project/commit/5e91f5d57a19752fe245ab64c1265e26c44d0d76
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle-missing-for-expanded-binop-parent.ll
Log Message:
-----------
[SLP]Fix dep accounting for expanded binops in non-scheduled entries
The extra dependency counted for the expanded form was never released
when the expanding entry had no schedule bundle and the block had no
copyable elements, leaving the operand's bundle unscheduled forever.
Take the pseudo-bundle path also when the instruction is an expanded
binop in some tree entry.
Fixes #212220
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/212380
Commit: 30b8cb2003f7490eef20d8f31a8daa1cdb95f45d
https://github.com/llvm/llvm-project/commit/30b8cb2003f7490eef20d8f31a8daa1cdb95f45d
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/Target/TargetMacroFusion.td
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[MacroFusion] Add RunPreRA/RunPostRA to select the scheduling stage (#212182)
MacroFusion runs in both the pre-RA and post-RA machine schedulers.
Add two `bit` fields to the `Fusion` base class, `RunPreRA` and
`RunPostRA`, both defaulting to `true`, so a fusion can opt out of a
scheduling stage. At least one of them must be `true`.
When a stage is disabled, `MacroFusionPredicatorEmitter` emits an early
`return false` guard for that stage (detected via the `NoVRegs` machine
function property) and only keeps the statistic counter for the stage
the fusion actually runs in. A pre-RA-only fusion is generated as:
```cpp
STATISTIC(NumNAMEPreRA, "Times NAME Triggered (pre-ra)");
bool isNAME(...) {
...
if (SecondMI.getMF()->getProperties().hasNoVRegs())
return false;
/* Predicates */
++NumNAMEPreRA;
return true;
}
```
Since the guard already establishes the stage, the trailing counter
`if/else` collapses to a single increment, dropping the redundant
`hasNoVRegs()` call and the counter that could never fire.
Assisted-by: TRAE CLI (GPT 5.5)
Commit: bba25a8d818e146c132f927cc13b651359da4f26
https://github.com/llvm/llvm-project/commit/bba25a8d818e146c132f927cc13b651359da4f26
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/NVPTX/alias.ll
M llvm/test/CodeGen/NVPTX/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/blocksareclusters-kernel-attr.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-sm90-ptx86.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
M llvm/test/CodeGen/NVPTX/fence-proxy.ll
M llvm/test/CodeGen/NVPTX/fence.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/global-cycle-alias.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/NVPTX/op-fence.ll
M llvm/test/CodeGen/NVPTX/prmt-const-folding.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/switch.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/thread-fence.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Emit some more PTX directives through target streamer (#212070)
Move `.branchtargets`, `.reg`, `.local`, `.alias`, `.pragma`, and the
empty `.debug_macinfo` section out of hand-built strings in
`NVPTXAsmPrinter` and into `NVPTXTargetStreamer` hooks.
Opportunistically pulled at a few other threads that could use cleanup
as well.
Three behavior changes:
1. Jump table labels now come from `MachineFunction::getJTISymbol`, so
`$L_brx_<idx>` becomes `JTI<func>_<idx>` and is no longer shared across
functions
2. `.alias` names its aliasee by mangled symbol rather than raw IR name,
fixing `.alias a, ;` for an unnamed aliasee.
3. The rest of the test diff is a duplicated blank line that functions
with no register declarations no longer emit.
Co-Authored by Opus 5
Commit: 1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d
https://github.com/llvm/llvm-project/commit/1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/CMakeLists.txt
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
A llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
A llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
A llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
Log Message:
-----------
AMDGPU: Add -gen-amdgpu-target-def TableGen backend (#212318)
Commit: 065179637e5331424ffdef8060593c57a53a6391
https://github.com/llvm/llvm-project/commit/065179637e5331424ffdef8060593c57a53a6391
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][OpenACC] Lower single-block thread-only array reductions (#212369)
Example:
```fortran
!$acc parallel loop vector reduction(+:b)
do i = 1, n
b(i) = i
end do
```
In this code the array reduction is thread(vector)-only with no
gang/block launch dim, so a within-block `all_reduce` is a complete
reduction. ACCCGToGPU still rejected it as NYI because the accumulate
had no block context.
Fix: keep the NYI only when the region actually launches block
dimensions; allow the existing per-element `all_reduce` path for
single-block thread-only array accumulates.
Commit: 6a55a52cabb5760902af7aa970dd37a323e255ad
https://github.com/llvm/llvm-project/commit/6a55a52cabb5760902af7aa970dd37a323e255ad
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-access-wide-stride.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-narrow-iv.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
[VPlan] zext canonical IV in convertToStridedAccesses (#212291)
Currently we sext it which isn't correct at TCs > UINT32_MAX. Makes
#209611 NFC
Commit: 776971a11fdce76b243bd94b1fe7d2b1957da969
https://github.com/llvm/llvm-project/commit/776971a11fdce76b243bd94b1fe7d2b1957da969
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/RISCV/vector.ll
Log Message:
-----------
Revert "[RISCV] Add TuneNoDefaultUnroll to generic CPUs (#135318)" (#212400)
This reverts commit 9c5858eb699390c2cac5f7f032279be275fa6aef which
causes some regressions.
Commit: 2f6ec89938aa12ba5190477032b974524c956b54
https://github.com/llvm/llvm-project/commit/2f6ec89938aa12ba5190477032b974524c956b54
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/UnicodeCharSets.h
M clang/test/Lexer/unicode.c
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Implement P3658R1 (#212131)
As a DR in all C++ language modes.
Because we already supported the feature this is only modifying the
extensions warnings.
Commit: 0a30b0c8909dca8764d994a748bd7d53c68d94f7
https://github.com/llvm/llvm-project/commit/0a30b0c8909dca8764d994a748bd7d53c68d94f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
AMDGPU: Declare FeatureDPP with AMDGPUSubtargetFeature (#212408)
All other features were defined using the AMDGPUSubtargetFeature
subclass of SubtargetFeature, so fix the odd one out.
Commit: de962dda125154abb64446c198b5349cf05311cb
https://github.com/llvm/llvm-project/commit/de962dda125154abb64446c198b5349cf05311cb
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__atomic/clear_padding.h
M libcxx/include/__atomic/support/c11.h
M libcxx/include/__atomic/support/gcc.h
M libcxx/include/module.modulemap.in
A libcxx/test/libcxx/atomics/atomics.types.generic/padding.pass.cpp
R libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
A libcxx/test/libcxx/atomics/clear_padding.pass.cpp
A libcxx/test/std/atomics/atomics.types.generic/padding.pass.cpp
M libcxx/utils/libcxx/test/features/misc.py
Log Message:
-----------
[libc++] Implement P0528R3 `std::atomic` CAS for types with padding (#76180)
Fixes #99984
Implement P0528R3 The Curious Case of Padding Bits, Featuring Atomic
Compare-and-Exchange
The unit test padding.pass.cpp is assisted by Cursor. However, all tests
have been modified to test what I wanted to test
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: ed4090047fb6c40d8d014559da16cee934f124c0
https://github.com/llvm/llvm-project/commit/ed4090047fb6c40d8d014559da16cee934f124c0
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/lib/ProfileData/SampleProfWriter.cpp
A llvm/test/tools/llvm-profdata/eytzinger-split-nametable-partition.test
Log Message:
-----------
[SampleProfile] Fix symbol partitioning in Eytzinger name table (#211906)
This patch fixes the symbol partitioning between context-sensitive
and flat profiles in writeEytzingerNameTableSection.
In split-layout profiles, top-level symbols in the Eytzinger name
table are partitioned into two bins -- context-sensitive and flat keys
-- so that they form parallel arrays with function offsets.
Without this patch, writeEytzingerNameTableSection uses:
if (Ctx.hasContext())
to decide which bin to use even though splitProfileMapToTwo uses:
if (!I.second.getCallsiteSamples().empty())
to partition the profile. This difference causes certain symbols to
be classified into FlatKeys in the name table but into
ContextProfileMap in the LBR profile.
The patch fixes the problem by using the same condition to partition
keys.
This misclassification happens to top-level symbols (like main or
un-inlined root callers) that lack context delimiters in their
function names (hasContext() == false) but still contain inlined
callees in their profile hierarchies.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: d1ce5f95fb661999bcc99a3a816cc72c1220a36d
https://github.com/llvm/llvm-project/commit/d1ce5f95fb661999bcc99a3a816cc72c1220a36d
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll
Log Message:
-----------
[ASan] Instrument ptrtoaddr as pointer difference (#211988)
We want to emit ptrtoaddr instead of ptrtoint for pointer differences to
not expose the provenance. Adjust ASan instrumentation to handle this
case as well.
Commit: f2c7e2bcd57ef2a9db23e5071618d3e02ee9c33d
https://github.com/llvm/llvm-project/commit/f2c7e2bcd57ef2a9db23e5071618d3e02ee9c33d
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/__support/threads/thread.cpp
M libc/test/src/stdlib/CMakeLists.txt
Log Message:
-----------
[libc] Fix atexit_test in hermetic mode (#210656)
We never unlocked the ThreadAtExit mutex, which meant the second call to
exit deadlocked. This was detected in the unit tests as they were
calling __cxa_thread_atexit from the system C library.
Commit: ee8bf569630bd45559227434f6cdf7aa67eb6a77
https://github.com/llvm/llvm-project/commit/ee8bf569630bd45559227434f6cdf7aa67eb6a77
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/wasm/Symbols.cpp
Log Message:
-----------
[lld][WebAssembly] Fix SharedTagKind in toString (#212385)
Commit: d81bb91dfe1a32bdb9621d483c7a059ddd56970b
https://github.com/llvm/llvm-project/commit/d81bb91dfe1a32bdb9621d483c7a059ddd56970b
Author: Yuyang Zhang <yuyzhang at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AMDGPU/insert-vector-elt-build-vector-poison.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
Log Message:
-----------
[DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR (#210905)
The `insert_vector_elt -> build_vector` fold requires the source
`BUILD_VECTOR` to have a single use, to avoid duplicating it. Allow it
for a multi-use base when the target sets
`aggressivelyPreferBuildVectorSources`: a `BUILD_VECTOR` is just glue
there (e.g. `REG_SEQUENCE` on AMDGPU), so rebuilding re-references the
base's existing scalar operands and adds no real work. This un-shares a
CSE-shared base produced by `insertelement` on a poison vector, so each
derived vector is built from scalars independently, as GlobalISel
already does.
The gate mirrors the sibling `extract_vector_elt` fold: `hasOneUse() ||
TLI.aggressivelyPreferBuildVectorSources(VT)`.
Split out from #199631 per review. Opted-in targets are AMDGPU, NVPTX,
and AArch64: AMDGPU and NVPTX improve, AArch64 is unchanged; non-opted
targets are unaffected. Affected AMDGPU and NVPTX tests are regenerated.
The undef-deprecator flag on `splitkit-getsubrangeformask.ll` is a false
positive — those are MIR subregister-def flags (`undef %reg.sub`), not
IR `undef` values.
Commit: 9a5434468bf5a5aa77f46de98d17ec2eccdce39d
https://github.com/llvm/llvm-project/commit/9a5434468bf5a5aa77f46de98d17ec2eccdce39d
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
A flang/lib/Optimizer/Transforms/StackArrays.h
Log Message:
-----------
[flang][NFC] Extract StackArrays analysis and rewrite into a header - memory passes unification [1/5] (#210721)
Move InsertionPoint, StackArraysAnalysisWrapper, and AllocMemConversion
out of the anonymous namespace in StackArrays.cpp into a new
StackArrays.h header (in namespace fir), so the "which fir.allocmem can
be safely moved to the stack, and where" analysis and the heap-to-stack
rewrite pattern can be reused by other passes.
The dataflow internals (AllocationState, LatticePoint,
AllocationAnalysis), the command-line options, and all method
definitions remain in the .cpp. No functional change intended.
RFC:
https://discourse.llvm.org/t/rfc-flang-improving-temporary-and-local-array-allocations-unify-stackarray-memoryallocation/91353
Assisted-by: AI
Commit: 4b60d133e3f80bac153bef496f56ee85936dfea1
https://github.com/llvm/llvm-project/commit/4b60d133e3f80bac153bef496f56ee85936dfea1
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmulh.ll
Log Message:
-----------
[RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (#210429)
`CLMUL` and `CLMULH` currently expand for fixed vector types on RISC-V,
even if `Zvbc` and/or `Zvbc32e` are available. Add custom lowering to
convert to scalable vector operations according to extension
availability.
Assisted-by: Claude Opus 4.8
Commit: b59d69d79e547a432485c18611efd2ec8d9540ca
https://github.com/llvm/llvm-project/commit/b59d69d79e547a432485c18611efd2ec8d9540ca
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[RISCV][P-Ext] Unify pncvt(h) intrinsics between RV32 and RV64. (#210996)
Use __builtin_convertvector for pncvt and __builtin_shufflevector for
pncvth.
Alternatively we could use shift+__builtin_convertvector for pncvth but
that requires combining psrl+unzip(8/16)p to unzip(8/16)hp. I'm not sure
which is better right now.
Commit: ce62aab97e58c52e6bb0972c49d6fd1aaa6a08a0
https://github.com/llvm/llvm-project/commit/ce62aab97e58c52e6bb0972c49d6fd1aaa6a08a0
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/search/CMakeLists.txt
Log Message:
-----------
[libc] Add aligned_alloc and delete[] to hermetic tests (#210693)
This lets us run (at least) <search.h> tests in hermetic mode.
Commit: f75eef2acb00eb8ff99cf9d7abb0d1649d0cbc90
https://github.com/llvm/llvm-project/commit/f75eef2acb00eb8ff99cf9d7abb0d1649d0cbc90
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/cast_ptr.ll
M llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll
Log Message:
-----------
[InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (#212101)
Followup of #211991. icmp ptrtoint, ptrtoint cannot be folded away for
non-integral pointers, this is only possible with ptrtoaddr.
For consistency, this also restricts the inttoptr direction, which
causes the change in the phase ordering test. (Note that in this
particular case, not doing the folding is actualle beneficial, as it
keeps the inttoptr-inttoptr comparison outside the loop avoiding one
comparison inside the loop. I wouldn't expect any practical impact,
though.)
Commit: 022bf7ba97fa1897bf52cf3db2e3fa42cd19b29f
https://github.com/llvm/llvm-project/commit/022bf7ba97fa1897bf52cf3db2e3fa42cd19b29f
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopPassManager.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
M llvm/unittests/Transforms/Utils/LoopUtilsTest.cpp
Log Message:
-----------
[LoopInfo] Take no dominator tree in verify(). NFC (#212414)
Similar to the recent change that makes analyze() lazy in building
DomTree.
Commit: 9ccf2a81a1b86c6b4d953259bbbdc678cc791493
https://github.com/llvm/llvm-project/commit/9ccf2a81a1b86c6b4d953259bbbdc678cc791493
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A clang/test/CIR/CodeGen/default-func-attrs-invoke.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVM] Preserve default function attributes on invokes (#212263)
Represent `default_func_attrs` on `LLVM::InvokeOp` and translate the
collection onto the generated LLVM invoke instruction. Preserve default
call-site attributes when throwing calls are lowered through the LLVM
dialect, including CIR `try_call` operations.
Commit: 4df68548fcfd82ddfdfe5ae52e691966065cf2e1
https://github.com/llvm/llvm-project/commit/4df68548fcfd82ddfdfe5ae52e691966065cf2e1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M orc-rt/docs/CodingConventions.md
M orc-rt/include/orc-rt-c/WrapperFunction.h
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/SPSWrapperFunction.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/include/orc-rt/WrapperFunction.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/DirectCaller.h
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/SPSWrapperFunctionTest.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Reorder wrapper-fn args to trailing-callback style. (#212243)
Bring the wrapper-function call and return prototypes into line with the
convention adopted for orc_rt_Session_callController: the session handle
comes first, then the payload buffer, then the completion callback
immediately followed by its threaded token, with the token last.
orc_rt_WrapperFunctionReturn: (S, CallId, ResultBytes)
-> (S, ResultBytes, CallId)
orc_rt_WrapperFunction: (S, CallId, Return, ArgBytes)
-> (S, ArgBytes, Return, CallId)
The C++ adapters that mirror these signatures are updated to match --
WrapperFunction::handle, SPSWrapperFunction::handle, the
ORC_RT_SPS_WRAPPER macro, and StructuredYield -- along with the Session
dispatch path and the affected unit tests. No functional change beyond
argument order.
Commit: 7bc2770064d3afbb4ce49c159d99c69a9e4b5c5b
https://github.com/llvm/llvm-project/commit/7bc2770064d3afbb4ce49c159d99c69a9e4b5c5b
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/src/assert/CMakeLists.txt
M libc/test/src/assert/assert_test.cpp
Log Message:
-----------
[libc] Make assert_test hermetic (#210700)
Call our own close() instead of the system one.
Commit: f5437c4d4f2e9920614d856158d9683d650acffa
https://github.com/llvm/llvm-project/commit/f5437c4d4f2e9920614d856158d9683d650acffa
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
Log Message:
-----------
[clang][NFC] Refactor flag enum caching (#210632)
Extracts cache insertion logic from `IsValueInFlagEnum`. This allows us
to drop `mutable` on `FlagBitsCache` while making it reusable as work
list for additional flag_enum diagnostics.
Commit: b53f2d57b086d93dc8421c74c17913951122e9d9
https://github.com/llvm/llvm-project/commit/b53f2d57b086d93dc8421c74c17913951122e9d9
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 1e1274b (#212405)
This fixes 1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d (#212318).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 39549cd7c62e9a2db44d186e0fe5d99e1473cb24
https://github.com/llvm/llvm-project/commit/39549cd7c62e9a2db44d186e0fe5d99e1473cb24
Author: StefanPaulet <tudor.stefan.paulet at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/ScopeInfo.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/source_location.cpp
Log Message:
-----------
[clang] Fixed predefined expressions after lambda parameters (#211811)
After the parameter declaration of a lambda expression, `Sema` enters
the declaration context of the lambda call operator (in
`ActOnLambdaClosureParameters`), so the lambda specifiers and the
trailing return type are analyzed within that context. Because of this,
predefined expressions such as `__func__` resolve to the lambda call
operator, and not to the possibly enclosing function. (issue #122657)
Added a member to `LambdaScopeInfo` to mark whether or not the compound
statement of the lambda expression has been entered, to be used when
resolving a `PredefinedExpr`
Commit: 0bcff14b1740cf32f9e0983726238dcf353c6ac8
https://github.com/llvm/llvm-project/commit/0bcff14b1740cf32f9e0983726238dcf353c6ac8
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/pkey_test.cpp
Log Message:
-----------
[libc] Make <sys/mman.h> tests hermetic (#210697)
The only issue was in pkey_test, which uses function-local static to do
lazy initialization. This requires the c++ runtime
(__cxa_guard_acquire/release).
There are no threads in this test, so we can just use the
(non-thread-safe) hand-rolled version of that. This is currently our
only test with such a pattern.
This would be something that in gtest would go into a SetUpTestSuite
method, but our test framework currently doesn't have an equivalent.
Commit: 7c58d4de4af550ba3d54bf217f27a1e6b3736dbc
https://github.com/llvm/llvm-project/commit/7c58d4de4af550ba3d54bf217f27a1e6b3736dbc
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/source/Host/linux/HostInfoLinux.cpp
M lldb/unittests/Host/HostInfoTest.cpp
Log Message:
-----------
[lldb][AArch64] Fix launching Arm32 applications on AArch64 Linux (#211692)
When LLDB runs on an AArch64 Linux, it adds both 64- and 32-bit
architectures as supported; see `PlatformLinux` ctor. The triple for the
32-bit variant is computed by replacing the architecture while keeping
all other fields; i.e., for the main host triple
`aarch64-unknown-linux-gnu`, the generated 32-bit triple is
`arm-unknown-linux-gnu`.
When a 32-bit target is created, its triple would be something like
`arm--linux-eabihf`. This triple is incompatible with the one added to
the supported architectures per condition in `ArchSpec::IsMatch()`,
which checks for compatibility between environments. As a result, LLDB
fails to launch this target:
```
> arm-linux-gnueabihf-g++ -g test.cpp -o test.out
> lldb
(lldb) file test.out
Current executable set to '/tmp/test.out' (arm).
(lldb) run
error: failed to launch or debug process
```
Clearing the environment of the computed triple for Arm32 allows the
compatibility check to pass.
---------
Co-authored-by: David Spickett <david.spickett at arm.com>
Commit: 162cdf496003e9bed7e7c7d0cbbd507365443b85
https://github.com/llvm/llvm-project/commit/162cdf496003e9bed7e7c7d0cbbd507365443b85
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/backedge-taken-count-guard-info-apply-to-adds.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-minmax.ll
M llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
M llvm/test/Transforms/LoopIdiom/add-nsw-zext-fold.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
Log Message:
-----------
[SCEV] Rewrite more SCEVAddExpr when applying guards. (#159942)
When re-writing SCEVAddExprs to apply information from guards, check if
we have information for the expression itself. If so, apply it.
When we have an expression of the form (Const + A), check if we have
have guard info for (Const + 1 + A) and use it. This is needed to avoid
regressions in a few cases, where we have BTCs with a subtracted
constant.
Rewriting expressions could cause regressions, e.g. when comparing 2
SCEV expressions where we are only able to rewrite one side, but I could
not find any cases where this happens more with this patch in practice.
Depends on https://github.com/llvm/llvm-project/pull/160012.
Proofs for some of the test changes: https://alive2.llvm.org/ce/z/RPX6t_
This comes with a slight compile-time increase, mostly due to changes in
downstream optimizations (like extra unrolling).
stage1-O3: +0.03%
stage1-ReleaseThinLTO: +0.02%
stage1-ReleaseLTO-g: +0.04%
stage1-aarch64-O3: +0.04%
stage2-O3: +0.03%
https://llvm-compile-time-tracker.com/compare.php?from=42b4ee6383e340c4c3ab4cfddd17f864ab331e0d&to=7b5221e21c2c18152dcb72a82122730690153aed&stat=instructions%3Au
Improves optimizations end-to-end in a number of cases on real-world workloads
(dtcxzyw/llvm-opt-benchmark-nightly#802).
PR: https://github.com/llvm/llvm-project/pull/159942
Commit: 8e9802b45829d473bce51197ce95f3ab40d94426
https://github.com/llvm/llvm-project/commit/8e9802b45829d473bce51197ce95f3ab40d94426
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/gdb_remote_client/TestGdbClientModuleLoad.py
Log Message:
-----------
[lldb][test] Do not return a PID in TestGdbClientModuleLoad (#212256)
This test has been flaky on x86 Github CI. It expects:
[ 0] {{.*}} 0x0000000000ee0000 {{.*}}module_load
[ 1] {{.*}} 0x0000000000ef0000 {{.*}}[vdso]
However in one run it got:
[ 0] 98FC07B8 0x0000000000ef0000 [vdso] (0xef0000)
[ 1] 75B11BBB-EF8B-5645-B9B1-A7261EC8ABCF-05413284 0x0000000000ed8ed0
/home/gha/actions-runner/bin/Runner.Worker
This happened because the responder says it's debugging PID 0x47, which
is usually some root process that we cannot read the /proc/pid/exe link
for. However when it is readable, we will assume that is the program
file and it replaces the "module_load" entry (this never happened on
AArch64 because an AArch64 program file is never compatible with an x86
triple).
In the failing case, 0x47 happened to be a github runner process that
lldb could get the exe for. I was able to reproduce this by putting a
long sleep in the background and replacing 0x47 with that sleep's PID.
To fix this I am returning the value of `PID_MAX_LIMIT` which is the
limit of what `pid_max` can be set to. This should be parsed by lldb
into an invalid PID and cause it to give up looking at the host.
I tried returning 0, this found a process somehow, returning no PID at
all, again it found a process. The only other way is to make this test
connect to a fake remote linux platform first, but this would take much
more code to set up.
Commit: 697f9892bef88f22f630e7e78541dd29d3cd716b
https://github.com/llvm/llvm-project/commit/697f9892bef88f22f630e7e78541dd29d3cd716b
Author: David Green <david.green at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/reg-bank-128bit.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-sext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-zext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-ceil.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-dup.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-extract.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fma.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fmaximum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fminimum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic-round.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-intrinsic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-llround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-lround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-maxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-minnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-nearbyint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-shift-imm-64.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-trunc-s128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-fp-loads.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-reductions.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-reg_sequence.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-unmerge-vec.mir
Log Message:
-----------
[AArch64][GlobalISel] Update regbank tests with concrete types. NFC (#212367)
Commit: 6aeeec83ec1d979ea2a2e3f4629ac361b5cdb70e
https://github.com/llvm/llvm-project/commit/6aeeec83ec1d979ea2a2e3f4629ac361b5cdb70e
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/test/API/commands/gui/spawn-threads/TestGuiSpawnThreads.py
Log Message:
-----------
[lldb][test] Skip TestGuiSpawnThreads.py on Linux (#212431)
See https://github.com/llvm/llvm-project/issues/209874.
We are still hitting the larger timeout.
Commit: c6603cce864078da43741e36fb9586a6c72782fe
https://github.com/llvm/llvm-project/commit/c6603cce864078da43741e36fb9586a6c72782fe
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/Basic/TokenKinds.h
M clang/utils/TableGen/ClangTraitsEmitter.cpp
Log Message:
-----------
[clang][NFC] generate TokenKey from tablegen (#210857)
Currently the enumerator constants of `TokenKey` are duplicated between
TokenKinds.h and Traits.td. This patch generates the `TokenKey` enum
from tablegen.
This is a followup patch for
https://github.com/llvm/llvm-project/pull/201491#discussion_r3567423553
Commit: 564be89eaee5227ec21980ca2054f00d595044c7
https://github.com/llvm/llvm-project/commit/564be89eaee5227ec21980ca2054f00d595044c7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
Log Message:
-----------
clang: Fix subarchless amdgpu triples in offload bundler tests (#212424)
Commit: 10d1b41f8cd9aa327fb15f698a0b564a3d5c4118
https://github.com/llvm/llvm-project/commit/10d1b41f8cd9aa327fb15f698a0b564a3d5c4118
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Core.cpp
Log Message:
-----------
[ORC] Fix buildSimpleReexportsAliasMap signature. (#212420)
The header declared a `const SymbolNameSet&` argument, but the
implementation took a `SymbolNameSet` by value. Update the
implementation to also take a `const SymbolNameSet&`.
No testcase. The corrected implementation will be used in an upcoming
commit.
Commit: 437b42f23250660f9a3f262ca6626324cd32a094
https://github.com/llvm/llvm-project/commit/437b42f23250660f9a3f262ca6626324cd32a094
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/TableGen/TGParser.cpp
M llvm/test/TableGen/eof-after-endif.td
Log Message:
-----------
[TableGen] don't print redundant diagnostic when parser sees Error token at end of file. (#212410)
Fixes #151476.
Currently TableGen parser emits `error: Unexpected token at top level`
when it sees `tgtok::Error` token after failing to parse the object
list, even though that token's corresponding diagnostics were already
emitted during lexing. This change makes `ParseFile` return true when it
sees `tgtok::Error` at end of file, thereby avoiding the redundant
diagnostic.
Commit: b349bef025f294ef100d02ac8c928836cd979f3f
https://github.com/llvm/llvm-project/commit/b349bef025f294ef100d02ac8c928836cd979f3f
Author: David Green <david.green at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Log Message:
-----------
[AArch64][GlobalISel] Use integer type for cttz icmp type. (#212327)
Commit: 6520ac73f22d53e93e5ae8da6351a1714723497c
https://github.com/llvm/llvm-project/commit/6520ac73f22d53e93e5ae8da6351a1714723497c
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A lldb/test/API/linux/aarch64/aarch32_compat/Makefile
A lldb/test/API/linux/aarch64/aarch32_compat/TestAArch64LinuxAArch32Compat.py
A lldb/test/API/linux/aarch64/aarch32_compat/main.s
Log Message:
-----------
[lldb][test][AArch64] Add test for AArch32 compatibility execution (#211793)
This should catch obvious problems like the one in #211692 in
future.
To run AArch32 programs on AArch64 you need a few things:
* Hardware that has AArch32 mode at EL0.
* A kernel built with CONFIG_COMPAT on.
* (usually) A bunch of 32-bit libraries installed.
We are dodging the 3rd one by compiling a standalone assembly
program that doesn't use any other libraries.
With clang being a cross-compiler and lld a cross-linker,
we should be able to do this without any 32-bit compatibility
libraries being installed.
To check for the first 2, we run that program normally.
If it fails to run, we don't have them. If it does run,
we have to double check that it's not being emulated. If
it is not being emulated, finally we can run it with lldb to
check that lldb works correctly.
Inside of lldb we place a breakpoint and read some
registers. GPRs are set to their own register number,
and FPR to their register number plus 1. So if we mixed
up the set order, we would know about it.
Tested on a Graviton 3 which allowed AArch32 execution and a Graviton 5
which did not. For the latter, the error without an emulator is:
```
$ ~/test.o
-bash: /home/davspi01/test.o: cannot execute binary file: Exec format error
```
This we detect when `Popen` fails. If you install qemu and setup
binfmt_misc, we detect that via. the exe path:
```
$ ~/test.o &
[2] 433187
$ ls -la /proc/433187/exe
lrwxrwxrwx 1 davspi01 davspi01 0 Jul 27 11:47 /proc/433187/exe -> /usr/bin/qemu-arm
```
Commit: 2d7aaf670d704bbb4bfb3ef023f18ba0b85b58c7
https://github.com/llvm/llvm-project/commit/2d7aaf670d704bbb4bfb3ef023f18ba0b85b58c7
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/chown_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/test/src/unistd/truncate_test.cpp
Log Message:
-----------
[libc] Fix path collisions between unit and hermetic tests (#212425)
Use the APPEND_LIBC_TEST macro to ensure each test gets a unique path to
operate on. Enable the affected tests in hermetic mode.
Commit: 636d8a253e71651ffa75f3bb515a14de0f20341d
https://github.com/llvm/llvm-project/commit/636d8a253e71651ffa75f3bb515a14de0f20341d
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
Log Message:
-----------
[lldb][AArch64][Linux] Track all register cache validity in one place (#197113)
In this change I've expanded the existing RegisterSetType enum
to be used as part of a singular cache tracking object which replaces
all the separate booleans. These booleans were hard to track and
set/reset in the right places.
This new validity object can be reset by default constructing,
and uses a member initialiser so everything starts out as invalid.
RegisterSetType is now a bitmask enum for easier storage.
It's 32-bit now which is enough for now. Just in case we expand it.
(and I previously updated all sizeof calls to use RegisterSetType
instead of the raw type)
The SME and SME 2 entries have been renamed to ZA and ZT
as this is what ptrace calls them. Note that SME's pseudo registers
are still managed in their own unique way, I hope to address that
later.
Over time, RegisterSetType will become the key for all the
operations in the register context. You can see a preview of
that "vision" in #193174.
For instance getting the buffer location and size, looking up
the ptrace set number, finding out what a set write invalidates,
and so on.
I did consider using optional for the register storage. I think this
could work if we had done it from the beginning but starting from
this point it has too many issues with it.
* We cannot assume that sizeof(buffer) == sizeof(buffer_type). Which
leads to some places where you have to write sizeof(some_generic_type).
Which is not ideal. Being able to use the member variable name is
clearer.
* We have to make the buffer "valid" before trying to read, then make it
invalid if it fails. Rather than read and if it succeeds mark it valid.
3 steps vs. 2.
* Some things like SVE resize the buffer when we get the new vector
length, then at some point later assume the buffer can hold the result
of a read. We'd have to track the expected size separately, and use that
to resize it just before read. Which is not difficult, but it's a
different strategy and I don't want to disturb all the SVE/SME handling
at this stage.
* Though our buffer + bool is in theory an optional, the way the class
is designed where one thing fills the buffer and another reads from it
later, the flexibility of when to set the bool does help us. Versus the
automatic handling optional does.
Once this whole class has been simplified and I can see the "unusual"
code paths more easily, I might revisit the optional idea.
Commit: a1194be1baefa99d20a09bd04b16056be0ab7225
https://github.com/llvm/llvm-project/commit/a1194be1baefa99d20a09bd04b16056be0ab7225
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/test/CodeGen/SPIRV/literals.ll
Log Message:
-----------
[SPIR-V] Fix hex float exponent for f64 Inf/NaN literals (#212295)
The asm printer hardcoded the f32 exponent (+128) when printing Inf/NaN
as hex floats, so f64 Inf/NaN literals were misencoded and silently
reassembled as finite values by consumers
Derive the exponent from the operand actual semantic instead
Commit: 7e1719546578ed523f5deb4ac499cdc833280d9c
https://github.com/llvm/llvm-project/commit/7e1719546578ed523f5deb4ac499cdc833280d9c
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions-min-max.ll
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[LoopUnroll] Allow vector types for minmax reductions (#207630)
Our downstream patched RecurrenceDescriptor in IVDescriptors.cpp to
recognize min/max reductions on vector-typed phis. After ffa02793,
vector min/max intrinsic reductions now flow into getReductionIdentity()
with vector type and then runtime-unroll-reductions-min-max.ll test
crashed.
This PR upstreams our RecurrenceDescriptor change to avoid further
downstream change to LoopUtils.cpp (in this PR) that fixes the crash.
LIT change in runtime-unroll-reductions-min-max.ll shows a long serial
reduction chain now breaks into two independent ones, which is the
purpose of unroll-add-parallel-reductions.
---------
Co-authored-by: skozhukh <sergey.s.kozhukhov at intel.com>
Commit: b626ec036e8551c4aa7d548e718bc5aa91562be0
https://github.com/llvm/llvm-project/commit/b626ec036e8551c4aa7d548e718bc5aa91562be0
Author: Peng Sun <peng.sun at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add FP8 and MXFP support to RESIZE (#212276)
- Added FP8 and all six MXFP extension/type combinations
- Updated RESIZE availability and enforced NEAREST_NEIGHBOR for MXFP
- Added positive, negative, version, extension, mixed-type, and verifier
tests.
Signed-off-by: Peng Sun <peng.sun at arm.com>
Commit: 74aae4e43edbf1843b886516893fd2b880d70dfa
https://github.com/llvm/llvm-project/commit/74aae4e43edbf1843b886516893fd2b880d70dfa
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Eta-reduce fn in pullOutPermutations (NFC) (#212439)
fun x => f x can be eta-reduced to just f.
Commit: b443896c13aded8b40d7bae4a5a9adbc96fd0d31
https://github.com/llvm/llvm-project/commit/b443896c13aded8b40d7bae4a5a9adbc96fd0d31
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Use pointee-range in blocksOnly (NFC) (#212441)
The map_range can be replaced by make_pointee_range.
Commit: 6bb30c03650c9ebc816d089ea78b36a246116f07
https://github.com/llvm/llvm-project/commit/6bb30c03650c9ebc816d089ea78b36a246116f07
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
A clang/include/clang/Basic/BuiltinTraits.h
R clang/include/clang/Basic/ExpressionTraits.h
R clang/include/clang/Basic/TypeTraits.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
A clang/lib/Basic/BuiltinTraits.cpp
M clang/lib/Basic/CMakeLists.txt
R clang/lib/Basic/ExpressionTraits.cpp
R clang/lib/Basic/TypeTraits.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringSyntaxChecker.cpp
M clang/utils/TableGen/ClangTraitsEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Log Message:
-----------
[clang][NFC] fold ExpressionTraits and TypeTraits helpers into BuiltinTraits (#210838)
ExpressionTraits.h defines utilities such as `getTraitName`,
`getTraitSpelling` and an enumeration for expression traits. All other
overloads of these utilities can be found in TypeTraits.h - this patch
combines them to BuiltinTraits.h/cpp.
This is a followup patch for
https://github.com/llvm/llvm-project/pull/201491#discussion_r3460883247
Commit: 840060f2f85c2d3f8ebe1c9304770d682e4141f6
https://github.com/llvm/llvm-project/commit/840060f2f85c2d3f8ebe1c9304770d682e4141f6
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
Log Message:
-----------
[RISCV] Don't move memory instructions across calls in isSafeToMove (#212236)
RISCVInstrInfo::isSafeToMove scans the instructions between From and To
to decide whether a memory instruction can be moved, but it only treated
mayStore() instructions as barriers. Calls on RISC-V are modeled with
isCall() and a register mask rather than mayStore(), so a load could be
moved across a call even though the callee may clobber the loaded
memory.
RISCVVectorPeephole::foldVMergeToMask uses this helper via ensureDominates()
to sink a load into a masked load when folding it into a vmerge, which
produced wrong code when the load was sunk past a call.
Instead of hand-rolling the barrier check, call MachineInstr::isSafeToMove
on each intervening instruction to populate SawStore. That is the same
helper used on From below, and it already treats calls (as well as PHIs
and ordered memory references) as stores.
This fixes #212226.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
Commit: ff46298372dc64d8fb56f1397c2914772b815605
https://github.com/llvm/llvm-project/commit/ff46298372dc64d8fb56f1397c2914772b815605
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/test/Conversion/GPUToSPIRV/reductions.mlir
Log Message:
-----------
[mlir][SPIR-V] Support bitwise and/or/xor in gpu reduction lowering (#202351)
Commit: bcdff65a953758e3a72cf99586c6ce809d4aaf9e
https://github.com/llvm/llvm-project/commit/bcdff65a953758e3a72cf99586c6ce809d4aaf9e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/include/tuple
Log Message:
-----------
[libc++] Simplify some meta-programming in tuple (#212436)
This does two things:
- replace `_Not<T>::value` with `!T::value` when we already evaluate
lazily
- remove `_And`s that aren't useful because they only have a single
argument
Commit: 321642826552ff4e4c7d67ea236f8669d4598c9f
https://github.com/llvm/llvm-project/commit/321642826552ff4e4c7d67ea236f8669d4598c9f
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/test/support/test_macros.h
Log Message:
-----------
[libc++][test] Disable test coverage for `_BitInt` for non-libc++ implementations (#212435)
Currently, library support for `_BitInt(N)` is an extension explicitly
supported by libc++. However, when using Clang with other standard
library implementations, `TEST_HAS_BITINT` is currently `1` as the
condition only detects compiler support of `_BitInt`.
This patch disables `_BitInt` coverage for other implementations for
now.
Commit: abd3b3a1445b5a8eeffae5c3912883faa9287fb7
https://github.com/llvm/llvm-project/commit/abd3b3a1445b5a8eeffae5c3912883faa9287fb7
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/test/support/test_macros.h
Log Message:
-----------
[libc++][test][NFC] Format `test_macros.h` (#212442)
Avoiding errors about untouched lines from clang-format when modifying
conditions in `test_macros.h`.
Commit: 391d298c2ae471c28e7db8538d867a017f9d08df
https://github.com/llvm/llvm-project/commit/391d298c2ae471c28e7db8538d867a017f9d08df
Author: Zichen Lu <mikaovo2000 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/test/Integration/GPU/CUDA/command-line-arg.mlir
Log Message:
-----------
[mlir][Target] Make nvptxcompiler passed options high priority to keep consistent with ptxas behavior (#121036)
When using `ptxas` to do ptx->cubin, the options passed (via `cmd`) have
higher priority than the gpuModule target (such as `opt-level`). When
using `nvptxcompiler`, it is the opposite and we need to be consistent.
Commit: f11d740e204f0551ac72ab1a2cacd72ae5c41b26
https://github.com/llvm/llvm-project/commit/f11d740e204f0551ac72ab1a2cacd72ae5c41b26
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/hash_test.cpp
Log Message:
-----------
[libc] Make hash_test hermetic (#212428)
Aligned allocation is now supported, but the test burns through our 1MB
never-freeing bump pointer allocation buffer. I tweak the test to reuse
the buffer between loop iterations, reducing its memory usage by about
300x :P.
Commit: 2a50c95322bc0ff3bbd976564914ce297b251a1a
https://github.com/llvm/llvm-project/commit/2a50c95322bc0ff3bbd976564914ce297b251a1a
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Honor try-lock branches of a void conditional (#211973)
Try-locks are not acquired on the arms of a `?:`, because the arms would
then disagree about whether the capability is held and warn where they
join. That reasoning assumes the `?:` produces a result that is branched
on later, which is where the acquisition is handled instead.
A void `?:` has no such result. Its branch is all there is to interpret,
and its arms might not join at all because one of them does not return
(this is how glibc before 2.32 spells `assert()`).
So asserting that a try-lock succeeded left the capability unheld on
every path, and a function documented to acquire it warned that it did
not, if written like so:
void lock(void) ACQUIRE(mu) {
int got = trylock();
assert(got); // warning: expecting mutex 'mu' to be held at the end of
function
}
Only bail out for a `?:` that has a result to be used, so that a void
`?:` acquires on its branch like any other terminator (for example,
including `&&` and `||`).
Assisted-by: Claude Opus 5
Commit: ac8b30c74b595dd8dfa612912663e57dafcf3355
https://github.com/llvm/llvm-project/commit/ac8b30c74b595dd8dfa612912663e57dafcf3355
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/test/std/language.support/support.types/byteops/lshift.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.pass.cpp
Log Message:
-----------
[libc++][test] Suppress warning on bitwise shift with `bool` operands in `std::byte` tests for MSVC (#212433)
It was intentional in https://llvm.org/PR204116 that tests for
`operator<<`, `operator<<=`, `operator>>`, `operator>>=` used `bool`
operands, because `bool` is an integral type and thus satisfies the
constraints of these operators.
However, MSVC considers `bool` is unsafe as an operand of bitwise shift
operators and emits warning C4804. So this patch suppresses the warning
for MSVC.
Commit: c273220275a7cbb8384812e1a4c84e773e1dd820
https://github.com/llvm/llvm-project/commit/c273220275a7cbb8384812e1a4c84e773e1dd820
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/test/Conversion/SCFToSPIRV/for.mlir
Log Message:
-----------
[mlir][SCFToSPIRV] Fix iter_args returning undef on zero trip scf.for (#206280)
Commit: 584734513c63b309b46a945cddbf0a516a9d133c
https://github.com/llvm/llvm-project/commit/584734513c63b309b46a945cddbf0a516a9d133c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ReOptimizeLayer.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
Log Message:
-----------
[ORC] Drop ExecutorProcessControl::JITDispatchInfo. (#212434)
The JIT-dispatch mechanism lets JIT'd code call handlers in an ORC
ExecutionSession, via the "__orc_rt_jit_dispatch" and
"__orc_rt_jit_dispatch_ctx" symbols. Until now ExecutorProcessControl
carried the addresses backing those symbols in a dedicated
JITDispatchInfo struct, which every EPC had to populate and each
Platform read back to define the symbols.
That detour couples ExecutorProcessControl to the shape of the dispatch
mechanism -- two symbols with fixed names -- and forces every EPC to
provide the addresses whether or not a given JIT setup uses dispatch.
Represent the two addresses as ordinary bootstrap symbols instead. EPCs
that support dispatch add __orc_rt_jit_dispatch(_ctx) to their bootstrap
symbols; Platforms reexport them from the bootstrap JITDylib rather than
reading JITDispatchInfo. EPCs that don't use dispatch provide nothing,
and ExecutorProcessControl no longer references the mechanism at all.
Commit: 8c8cc1cfb9f04fc57716b9ccc3ea74c9a5495bf7
https://github.com/llvm/llvm-project/commit/8c8cc1cfb9f04fc57716b9ccc3ea74c9a5495bf7
Author: Akash Agrawal <akashag at qti.qualcomm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Parse/ParseDecl.cpp
A clang/test/Parser/decltype-crash.cpp
Log Message:
-----------
[Clang][Parse] Fix assertion when annotating a failed decltype-specifier (#211221)
`ParseDeclaratorInternal's` member-pointer special case enters a
speculative scope-specifier parse whenever it sees `decltype`, without
checking that `( `follows:
```
if (getLangOpts().CPlusPlus &&
(Tok.is(tok::coloncolon) || Tok.is(tok::kw_decltype) || ...)) {
```
But `decltype-specifier` is always `decltype ( expression ) — decltype`
not followed by `(` can never be valid. When that happens,
`ParseOptionalCXXScopeSpecifier` still tries to parse it as one, fails,
and error recovery skips tokens. The EndLoc returned is then stale by
the time `AnnotateExistingDecltypeSpecifier` uses it to annotate, which
trips the invariant in `Preprocessor::AnnotatePreviousCachedTokens`:
```
int decltype; // crashed
int *decltype = 0; // crashed
```
Fix: only take this path when decltype is followed by (.
`(Tok.is(tok::kw_decltype) && NextToken().is(tok::l_paren)) ||`
`ParseDecltypeSpecifier` already requires `(` right after `decltype` or
bails with `TST_error`, so this check drops no valid parse —
`decltype(expr)` (including as a member-pointer scope, e.g.` int
decltype(obj)::*p = &S::m;) `is unaffected.
Fixes #211207
Co-authored - Claude-Sonnet
Commit: ad6cb6dedc9dc1d965d60e1a34289c2bb30e7cec
https://github.com/llvm/llvm-project/commit/ad6cb6dedc9dc1d965d60e1a34289c2bb30e7cec
Author: Nikita Taranov <nikita.taranov at clickhouse.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/test/CodeGen/X86/lea-opt-cse1.ll
M llvm/test/CodeGen/X86/lea-opt-cse2.ll
M llvm/test/CodeGen/X86/lea-opt-cse4.ll
M llvm/test/CodeGen/X86/lea-recursion.ll
A llvm/test/CodeGen/X86/lea-reuse-rip-relative.ll
A llvm/test/CodeGen/X86/pr51707.ll
Log Message:
-----------
[X86] Reapply #210739 with a fix (#212020)
This reapplies #210739, which was reverted in #211958 because it could
crash the backend with "Invalid rip-relative address" when an LEA added
a RIP-relative global and an already-materialized value.
Fixes #51707
Commit: 9572596c3951a5fef5eecc011c617c1b264357b7
https://github.com/llvm/llvm-project/commit/9572596c3951a5fef5eecc011c617c1b264357b7
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
A llvm/test/CodeGen/AArch64/sve-fixed-length-bf16-vselect.ll
Log Message:
-----------
[LLVM][CodeGen] Clean up uses of useSVEForFixedLengthVectorVT(). (#211605)
During lowering `useSVEForFixedLengthVectorVT` only serves to separate
NEON sized vectors from those made legal for SVE VLS. When no separation
is required there is no reason to call the function. That means
`useSVEForFixedLengthVectorVT(VT, /*OverrideNEON=*/true)` is largely
synonymous to `isSVEorStreamingSVEAvailable()`.
`useSVEForFixedLengthVectorVT` is not a per operation property. For this
reason I have removed the AllowBF16 parameter and replaced it by a
command line option that can be used during SVE VLS bfloat bringup. The
one existing use has been removed because it falls under the previous
issue in there being no need to call `useSVEForFixedLengthVectorVT`.
Commit: c154f4aa5483915702d8447d541d5d9a4dfaac46
https://github.com/llvm/llvm-project/commit/c154f4aa5483915702d8447d541d5d9a4dfaac46
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
Log Message:
-----------
AMDGPU: Remove dead FEATURE_FP64/FEATURE_LDEXP from ArchFeatureKind (#212479)
No GPU ever sets these bits, and clang's hasFP64()/hasLDEXPF()
short-circuit on isAMDGCN() before testing them, so the bits are
never observed.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: e432cb12962f1619bc73c50a2dc4d2ad5ac6b44c
https://github.com/llvm/llvm-project/commit/e432cb12962f1619bc73c50a2dc4d2ad5ac6b44c
Author: Natanael Cintean <natanael.cintean at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/test/IR/invalid-properties.mlir
M mlir/test/IR/properties.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[mlir]Add resultSegmentSizes/operandSegmentSizes to prop-dict. (#211222)
`setPropertiesFromParsedAttr` (generated by `OpFormatGen.cpp` for ops
using a custom `assemblyFormat`) rejects the trait-injected
`operandSegmentSizes` /. `resultSegmentSizes` properties when they
appear in a `prop-dict`, even though the printer emits them there for ops
whose format uses a bulk operand/result type directive
(`type(operands)`, `type(results)`, `functional-type(operands, results)`).
This breaks round-tripping: any op combining `AttrSizedOperandSegments`
/ `AttrSizedResultSegments` with such a bulk directive fails to re-parse
its own printed output, because printer-side elision of these keys
(introduced in #115930) is intentionally skipped in that case — the
sizes can't be reconstructed from individually-typed operand/result
groups, so they must survive in the text, but the custom parser was never
taught to read them back.
`setPropertiesFromAttr` (used by the generic-form parser, bytecode, and
C++ construction) already special-cases these two keys, so this change
makes `setPropertiesFromParsedAttr` mirror that behavior: keys are
accepted from the dictionary attr when the corresponding trait is present,
and required exactly when the format can't reconstruct the sizes itself
(i.e. when `fmt.allOperands` / `fmt.allResultTypes` is true). Otherwise the
key remains optional, since `genParserVariadicSegmentResolution`
overwrites it with the sizes inferred from the parsed operand/result
groups.
The contents of the PR as well as description has been made using
github-copilot. However I've reviewed the contents and tested locally
the change.
Fixes #211220
Commit: 89d39f69cb18f21d92b261cc0ca2a2314453b1fe
https://github.com/llvm/llvm-project/commit/89d39f69cb18f21d92b261cc0ca2a2314453b1fe
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/branch-nested.ll
Log Message:
-----------
[SimplifyCFG] Bail out on trivial cases in `mergeNestedCondBranch` (#212309)
Closes https://github.com/llvm/llvm-project/issues/212300.
When BB3 is identical to BB4, it is no longer profitable to perform this
fold, since it creates an unused xor instruction. The DomTree update
issue is also easy to fix. But I think this solution is better.
The following IR was dumped just before this function:
```
define void @func(i1 %cond1, i1 %cond2, i1 %cond3) {
entry:
br i1 %cond1, label %bb2, label %else
else: ; preds = %entry
br i1 %cond2, label %bb0, label %common.ret
bb0: ; preds = %else
br i1 %cond1, label %bb1, label %bb2
bb2: ; preds = %bb0, %entry
br i1 %cond3, label %common.ret, label %common.ret
bb1: ; preds = %bb0
br i1 %cond3, label %common.ret, label %common.ret
common.ret: ; preds = %bb2, %bb1, %bb2, %bb1, %else
ret void
}
```
The previous functions will simplify it. So the reproducer cannot be
further reduced.
Commit: 857746b37949a87faa42faff4fae12c35b34db51
https://github.com/llvm/llvm-project/commit/857746b37949a87faa42faff4fae12c35b34db51
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-extended-image.hip
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/builtins-extended-image.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
A clang/test/SemaOpenCL/builtins-extended-image-supported.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
AMDGPU: Fix missing extended-image-insts missing from feature map (#212418)
Unsurprisingly, this manually maintained table is buggy.
fillAMDGCNFeatureMap never set extended-image-insts, so clang's builtin
feature check rejected every case. The tests were working around this
with manually specified -target-features flags.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 34be3a62bf9a309fb00a4a2ec2150fa87750ad96
https://github.com/llvm/llvm-project/commit/34be3a62bf9a309fb00a4a2ec2150fa87750ad96
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M offload/unittests/OffloadAPI/queue/olLaunchHostFunction.cpp
Log Message:
-----------
[OFFLOAD][L0][NFC] Mark as skip unittest with driver issue (#212466)
Commit: 8d632c0a8eef06b7be509d10a6d87c9bd814a10e
https://github.com/llvm/llvm-project/commit/8d632c0a8eef06b7be509d10a6d87c9bd814a10e
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86FloatingPoint.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86InsertX87Wait.cpp
M llvm/test/CodeGen/X86/zero-call-used-regs.ll
Log Message:
-----------
[X86] Don't clobber x87 return values when zeroing call-used registers (#211129)
### Summary
`-fzero-call-used-regs=all` / `zero_call_used_regs("all")`
unconditionally push eight `fldz` onto the x87 stack before returning.
When a value is live in `ST0` (`long double`) or `ST0:ST1` (`_Complex
long double`), the pushes overflow the 8-slot x87 stack and the return
value becomes an indefinite NaN. Reproduces on x86-64 at every
optimization level, via both the flag and the attribute.
```c++
__attribute__((zero_call_used_regs("all")))
long double g(long double a) { return a + 1; }
// g(1.0L) returns nan, expected 2.0
```
### Root cause
The x87 return value lives in `ST0` (and `ST1` for `_Complex long
double`), but the FP stackifier's `handleReturn` deletes the `RET`'s FP
register operands after stackification (the `FP0`-`FP6` pseudos no
longer exist) without recording that the top of the x87 stack is live.
The scrub in `emitZeroCallUsedRegs` therefore has nothing telling it
`ST0` is occupied, so it pushes a zero over the return value.
### Fix
`handleReturn` now re-records the returned values as implicit
`ST0`/`ST1` uses on the return instruction — the same way every other
return register (`RAX`, `XMM0`, ...) is modeled — and
`emitZeroCallUsedRegs` pushes only `8 - live` zeros, filling the dead
slots and leaving the return value intact. This matches GCC.
Note: the implicit `ST0`/`ST1` operands are recorded on every
x87-returning `RET`, not only under `zero-call-used-regs`. One
consequence is that a `RET` now satisfies `isX87Instruction`, so
`X86InsertX87Wait` is adjusted so a return no longer suppresses the
strict-FP `wait` (a return performs no exception sync).
### Secondary fix (i386)
The old count was hardcoded `ST.is64Bit() ? 8 : 7`. On i386, a function
with no x87 value live at the return (e.g. an integer return) cleared
only seven of the eight physical x87 registers, so `"all"` silently left
one call-used register uncleared. The unified `8 - live` formula fixes
this too: i386 with no x87 return now pushes 8 (previously 7).
### Tests
`zero-call-used-regs.ll` adds `all_x87_return` (`x86_fp80`, 1 live -> 7
pushes), `all_x87_complex_return` (`_Complex long double`, 2 live -> 6
pushes), and `all_no_x87_live` (no x87 live -> 8 pushes, guarding the
i386 secondary fix). The full X86 CodeGen suite passes.
Fixes #211064
Assisted-by: Cursor
Commit: 2c01f3cb3caf2dfcdcd65ced4ec124a672465cb5
https://github.com/llvm/llvm-project/commit/2c01f3cb3caf2dfcdcd65ced4ec124a672465cb5
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Transforms/BUILD.bazel
Log Message:
-----------
[BUILD]Fixes 9a543446 (#212499)
[BUILD]Fixes 9a543446
Commit: 3d325269ece14bfb98af65443c8d345d6434bdee
https://github.com/llvm/llvm-project/commit/3d325269ece14bfb98af65443c8d345d6434bdee
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
[offload][lit] Run check-offload as part of check-all (#212500)
It's unclear why these were excluded from `check-all`, but we made all
tests pass on Level Zero and our local testing shows they pass on AMD
and NVIDIA too, so enable it by default.
Context: https://github.com/llvm/llvm-project/pull/211633
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 7d4160e52ba0e06d1450fa8e9c31518c0e58895c
https://github.com/llvm/llvm-project/commit/7d4160e52ba0e06d1450fa8e9c31518c0e58895c
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
Log Message:
-----------
[AMDGPU] Stop rounding up LDS block size for gfx950 (#208046)
The AMDGPUAsmPrinter::getSIProgramInfo function calculates the number of
LDS blocks in a somewhat indirect way: It obtains the LDS granularity
from another function, determines an "LDSAlignShift" based on this and
then uses shifts to determine the alignment and for division. The use of
shifts forces the alignment to be a power of two which works for all LDS
granularity values except for the value of 1280 bytes used for gfx950.
For this, the function uses LDSAlignShift = 11 which means that the
block size gets rounded up to 2048. This implies that the computed
number of LDS blocks is too small.
Remove the use of LDSAlignShift from getSIProgramInfo and use the LDS
granularity directly for alignment and division.
Commit: 298355525c28343fecdee28b0cf75c8d94e96952
https://github.com/llvm/llvm-project/commit/298355525c28343fecdee28b0cf75c8d94e96952
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/hip-link-offload-binary.c
Log Message:
-----------
[HIP] Support device-only linking of bitcode offload binaries (#212342)
The new offload driver packages multi-architecture bitcode in LLVM
offload binaries. A later `--hip-link --offload-device-only`
invocation treated these `.bc` inputs as host LLVM IR and dropped
them before linking.
Pass these inputs directly to clang-linker-wrapper when producing a
device fat binary. The wrapper can then extract and link each
requested GPU architecture.
Commit: b976ce0867d1f828863c61899c5d779f2bd4bfff
https://github.com/llvm/llvm-project/commit/b976ce0867d1f828863c61899c5d779f2bd4bfff
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
Revert "[offload][lit] Run check-offload as part of check-all" (#212506)
Reverts llvm/llvm-project#212500
Commit: 56fd82467c5b5a98411c02df1957528aaf57b487
https://github.com/llvm/llvm-project/commit/56fd82467c5b5a98411c02df1957528aaf57b487
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/Verifier/AMDGPU/alloca.ll
M llvm/test/Verifier/AMDGPU/reqd-work-group-size.ll
Log Message:
-----------
AMDGPU: Migrate verifier tests to subarch triples (#212494)
Commit: 55076d312e30e28c9440fc25b9e60bb7764c1540
https://github.com/llvm/llvm-project/commit/55076d312e30e28c9440fc25b9e60bb7764c1540
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_constant_global_redzones.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_global_redzones.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_lds.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_scratch.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_constant_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_global_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/global_metadata_addrspacecasts.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_lds_globals.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_scratch_globals.ll
Log Message:
-----------
AMDGPU: Migrate asan tests to subarch triples (#212496)
Commit: 455ef3684fae3273b3423bb0229e33584745c6cc
https://github.com/llvm/llvm-project/commit/455ef3684fae3273b3423bb0229e33584745c6cc
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/include/fstream
M libcxx/src/ios.instantiations.cpp
A libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/test.dat
A libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/xsgetn.buffer.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
Log Message:
-----------
[libc++] Fix ungetc failing after xsgetn (#210951)
After #206453 we don't correctly handle `unget()` anymore. This fixes
the issue by updating the internal buffer to contain the tail of the
read data.
Fixes #210203
Commit: 371b78a9638d4fcea397af5a318b1f3d562b20fa
https://github.com/llvm/llvm-project/commit/371b78a9638d4fcea397af5a318b1f3d562b20fa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
Log Message:
-----------
AMDGPU: Migrate assembler tests with content changes to subarch triples (#212495)
Convert tests which failed after converting the arguments due to content
changes from checking the emitted target id string.
Commit: 5a650306e4e1069d194d8fcfeee821d7e424f9b3
https://github.com/llvm/llvm-project/commit/5a650306e4e1069d194d8fcfeee821d7e424f9b3
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
A clang/test/Driver/Inputs/spirv64-sycl/lib/spirv64-unknown-unknown/libclang_rt.builtins.bc
A clang/test/Driver/sycl-device-lib-spirv64.cpp
M clang/test/Driver/sycl-offload-jit-unix.cpp
M clang/test/Driver/sycl-offload-jit-xarch.cpp
M clang/test/Driver/sycl-offload-jit.cpp
M clang/test/Driver/sycl-print-internal-defines.cpp
M clang/test/Driver/sycl-rtlib-sysroot-mismatch.cpp
M clang/test/Driver/sycl-std-default.cpp
M clang/test/Driver/sycl-windows.cpp
M clang/test/Driver/sycl.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[Driver][SYCL] Add compile-time device library linking for SPIR-V targets (#196656)
This PR implements compile-time device library linking for SYCL
offloading to SPIR-V targets, using `libclang_rt.builtins.bc` - an
in-tree compiler-rt artifact produced alongside the existing
`libclang_rt.builtins.a` for `SPIRV64`.
## Motivation
SYCL device compilations targeting SPIR-V need access to compiler
builtins (integer arithmetic, floating-point helpers, etc.) at compile
time so the compiler can optimize across user code and builtins, inline
aggressively, and eliminate dead code. This PR lays the foundation by
wiring up the first in-tree device library : `libclang_rt.builtins.bc` -
using the same `-mlink-builtin-bitcode` mechanism already used by
`libclc` and `HIP`.
## Changes
**compiler-rt (compiler-rt/lib/builtins/CMakeLists.txt)**
For the `spirv64` target, after building
`libclang_rt.builtins-spirv64.a`, runs `llvm-link` to merge all bitcode
objects into a single `libclang_rt.builtins.bc`. This file is installed
to `<ResourceDir>/lib/spirv64-unknown-unknown/` alongside the static
archive. The `-mlink-builtin-bitcode` flag requires raw LLVM IR and
cannot unpack a static archive directly, hence the extra step.
**Clang Driver (clang/lib/Driver/ToolChains/SYCL.cpp)**
`SYCLToolChain::getDeviceLibs()` now constructs the path to
`libclang_rt.builtins.bc` under the clang resource directory and returns
it for `-mlink-builtin-bitcode` injection during `spirv64` device
compilation. If the file is absent (e.g. compiler-rt was not built with
spirv64 support), a specific diagnostic is emitted. Linking is
suppressed when `--no-offloadlib` is passed.
**Diagnostics (clang/include/clang/Basic/DiagnosticDriverKinds.td)**
Added `err_drv_no_compiler_rt_builtins_bc`, following the
`err_drv_libclc_not_found` community pattern, with actionable guidance
on how to build compiler-rt with SPIR-V support.
### Test Infrastructure
1. `clang/test/Driver/sycl-device-lib-spirv64.cpp` - new test verifying
-mlink-builtin-bitcode is passed for spirv64, suppressed with
--no-offloadlib, and that a missing .bc produces the correct diagnostic.
2. `clang/test/Driver/Inputs/spirv64-sycl/` - dummy resource-dir fixture
used by driver tests.
3. All existing SYCL driver tests updated to pass -`resource-dir
%S/Inputs/spirv64-sycl `on -fsycl RUN lines, making them independent of
the installed clang resource directory on CI runners.
## Behavior
### Default
```bash
clang -fsycl myprogram.cpp
# Device compilation includes:
# "-mlink-builtin-bitcode" "<ResourceDir>/lib/spirv64-unknown-unknown/libclang_rt.builtins.bc"
```
Automatically links device libraries from `<clang-install>/lib/` during
device compilation.
### Without device libraries
```bash
clang -fsycl --no-offloadlib myprogram.cpp
# -mlink-builtin-bitcode is suppressed
```
Missing .bc (compiler-rt not built with spirv64 support)
```bash
error: no compiler-rt builtins bitcode library '...' found in the clang resource directory;
build compiler-rt with SPIR-V support or pass '--no-offloadlib' to compile without it ```
Commit: e362f3c8466dfb4021d409f50eae179b9b0b1957
https://github.com/llvm/llvm-project/commit/e362f3c8466dfb4021d409f50eae179b9b0b1957
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/environ_internal.cpp
M libc/src/stdlib/environ_internal.h
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/putenv.cpp
A libc/src/stdlib/putenv.h
M libc/test/integration/src/stdlib/CMakeLists.txt
A libc/test/integration/src/stdlib/putenv_test.cpp
Log Message:
-----------
[libc][stdlib] Add putenv (#208339)
Added the POSIX putenv() function and its internal support.
Implemented EnvironmentManager::put() to insert caller-provided
"name=value" strings directly into the environment array, managing
ownership correctly (caller retains ownership).
Registered for x86_64, aarch64, and riscv. Integration tests cover basic
operations, ownership semantics, validation, and edge cases.
Assisted-by: Automated tooling, human reviewed.
Commit: 7cf62f99cd707d09f4dab5f999cb1ce5d57d25a5
https://github.com/llvm/llvm-project/commit/7cf62f99cd707d09f4dab5f999cb1ce5d57d25a5
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/memory.yaml
A libc/include/sys/fcntl.yaml
A libc/include/sys/poll.yaml
A libc/include/sys/signal.yaml
A libc/include/sys/unistd.yaml
Log Message:
-----------
[libc] Add POSIX redirection header specifications in YAML (#211859)
Add header YAML specifications for memory.h, sys/poll.h, sys/unistd.h,
sys/fcntl.h, and sys/signal.h using public_includes.
POSIX.1-2017 and historical X/Open System Interfaces (XSI) standards
define these headers as alternate or legacy header locations that
forward to string.h, poll.h, unistd.h, fcntl.h, and signal.h
respectively. The YAML header specs allow hdrgen to generate the public
headers automatically with proper license headers and guards.
Updated Linux target headers.txt configuration files to register the new
public header targets for installation.
Assisted-by: Automated tooling, human reviewed.
Commit: 557dcec6258aac87f9c2bb6d651ec7e774f7d09d
https://github.com/llvm/llvm-project/commit/557dcec6258aac87f9c2bb6d651ec7e774f7d09d
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/VE/VEInstrPatternsVec.td
M llvm/test/CodeGen/VE/Packed/vp_mul.ll
Log Message:
-----------
[VE] Fix crash when splitting all-ones v512i1 mask (#212489)
The added test case crashes because we try to extract a subreg from vmp0
when selecting vec_unpack_*, but vmp0 has no subregisters, see
d46e49838e17800cb72d95db1b23c04bbca610e2
vmp0 is hardwired to all ones, so it gets selected for an all ones mask.
Fix it by adding an explicit pattern for an all ones mask that selects
vm0, the v256i1 version of vmp0, instead of creating an invalid subreg
extract.
Commit: b6b9603c7675fff5ec9befacf54391a516fc723c
https://github.com/llvm/llvm-project/commit/b6b9603c7675fff5ec9befacf54391a516fc723c
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/long-jmp-one-stub.s
Log Message:
-----------
[RFC][BOLT] Enable lite mode by default on AArch64 (#205545)
Commit: 760fc017332d4d5a5cdf1b6cf754f40774a97821
https://github.com/llvm/llvm-project/commit/760fc017332d4d5a5cdf1b6cf754f40774a97821
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
[offload][lit] Run check-offload-unit as part of check-all (#212513)
I tried to do `check-offload` instead but that
[caused](https://github.com/llvm/llvm-project/pull/212500) a bloodbath,
so just enable `check-offload-unit` as part of `check-all`.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 034f0f1ad4badc02d9d26b6f1ae3324a09276c4a
https://github.com/llvm/llvm-project/commit/034f0f1ad4badc02d9d26b6f1ae3324a09276c4a
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
R flang/test/Fir/arrexp.fir
M flang/test/Fir/basic-program.fir
Log Message:
-----------
[flang] Stop running array-value-copy in the default pipeline (#211816)
Since the removal of the legacy expression lowering (#210385, #210621,
#210639, #210873), nothing in flang produces the array-value operations
(fir.array_load and friends) that the array-value-copy pass legalizes,
so the pass runs as a guaranteed no-op on every function. Remove it from
the default pipeline (addAVC and the disable-avc mlir option); the pass
itself and its fir-opt tests remain and still run via fir-opt
--array-value-copy.
The array-value operations themselves and the pass are planned for
removal in follow-up patches.
flang/test/Fir/arrexp.fir is deleted rather than updated: it feeds
legacy array-value ops through tco's full pipeline, which no longer
legalizes them (the ops have no codegen patterns), and the file
exercises no live feature beyond that legalization.
Assisted-by: AI
Commit: 807de2dc44794205b336ed8b2ca4731bc3ab865b
https://github.com/llvm/llvm-project/commit/807de2dc44794205b336ed8b2ca4731bc3ab865b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/idot4-test.ll
M llvm/test/CodeGen/AMDGPU/no-corresponding-integer-type.ll
Log Message:
-----------
[AMDGPU] Stop iDot4 chain walker at non-ADD nodes (#198412)
The loop body in performAddCombine dot4 matcher unconditionally treats
TempNode operands as the next link's addends, so the chain only works
when TempNode is an `ISD::ADD`
The old getNumOperands() guard let AND/OR/XOR/etc. through, leaking
their non-addend operands (e.g. a constant mask) into the dot4
accumulator and miscompiling kernels
Commit: 1c31d28d1a1e746db9070c90ff40f8a6f53ff0db
https://github.com/llvm/llvm-project/commit/1c31d28d1a1e746db9070c90ff40f8a6f53ff0db
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/test/CIR/Transforms/mem2reg.cir
Log Message:
-----------
[CIR] Disallow mem2reg for volatile/atomic loads and stores (#212262)
Current mem2reg implementation for `cir.load` and `cir.store` does not
check whether the load/store is volatile or atomic. Fix this.
Commit: df89bcad92cd1a8539d85b200e89182f26743b6f
https://github.com/llvm/llvm-project/commit/df89bcad92cd1a8539d85b200e89182f26743b6f
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/TableGen/TGLexer.cpp
A llvm/test/TableGen/ifdef-cr-instead-of-newline.td
Log Message:
-----------
[TableGen] Treat carriage return as line end in prepSkipRegion (#212411)
`prepSkipRegion` currently only treats newline and EOF as end of line.
However, in the TableGen Programmer's Reference:
LineEnd ::= newline | return | EOF
So carriage return is a valid end-of-line, but `prepSkipRegion` ignores
it and skips code after the carriage return that it shouldn't. This
change fixes the end-of-line check in `prepSkipRegion` so that it also
treats carriage return as end of line.
Related issue: #151476.
Commit: 62f429ec6e85224a0f7fa6d4e51595b27e5ac9c1
https://github.com/llvm/llvm-project/commit/62f429ec6e85224a0f7fa6d4e51595b27e5ac9c1
Author: Emery Conrad <conrade.ctc at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/Interpreter/used-global-after-error.cpp
Log Message:
-----------
[clang][CodeGen] Skip deleted globals in emitUsed (#210959)
A global on the `llvm.used`/`llvm.compiler.used` list can be deleted
before the module is released: CodeGen erases an unreferenced
`GlobalValue` without RAUW when the same mangled name is redefined with
a different type (`GetOrCreateLLVMGlobal`), which nulls the
`WeakTrackingVH` on the used list — value handles are not uses, so the
`use_empty()` guard does not protect them.
In whole-TU compilation this is unobservable because the accompanying
`err_duplicate_mangled_name` suppresses `Release()`. The incremental
interpreter, however, clears the diagnostic state after the failed parse
and keeps building the same module, so the next successful parse runs
`Release()` and crashes in `emitUsed` dereferencing the dead handle:
```
clang-repl> __attribute__((used)) int a asm("sym") = 1; float b asm("sym") = 2.0f;
clang-repl> int ok = 0;
clang-repl: .../ValueHandle.h:95: llvm::Value& llvm::ValueHandleBase::operator*() const: Assertion `V && "Dereferencing deleted ValueHandle"' failed.
```
Out-of-tree incremental clients hit the same crash through other routes
that delete an emitted used global before module release (e.g.
CppInterOp's force-emission of reflection queries, see
compiler-research/CppInterOp#1068).
Fix: skip null handles when building the used array. The repro above is
included as a lit test; `clang/test/Interpreter`, `clang/test/CodeGen`,
and `clang/test/CodeGenCXX` pass locally.
🤖 Done with the help of [Claude Code](https://claude.com/claude-code)
(Fable 5, human in the loop)
Co-authored-by: Emery Conrad <emery.conrad at chicagotrading.com>
Commit: 0fc8ce3bb59ba1ebbb0aecf564158a0c145eeb50
https://github.com/llvm/llvm-project/commit/0fc8ce3bb59ba1ebbb0aecf564158a0c145eeb50
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/include/optional
Log Message:
-----------
[libc++][optional][NFC] Use variable templates instead of class templates (#212443)
Modernizing similar to: https://github.com/llvm/llvm-project/pull/199481
Commit: a69addf4fb640c34fa8249543003c375247c4933
https://github.com/llvm/llvm-project/commit/a69addf4fb640c34fa8249543003c375247c4933
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/include/__math/traits.h
M libcxx/include/cmath
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
A libcxx/test/std/numerics/c.math/isgreater.pass.cpp
A libcxx/test/std/numerics/c.math/isgreaterequal.pass.cpp
A libcxx/test/std/numerics/c.math/isless.pass.cpp
A libcxx/test/std/numerics/c.math/islessequal.pass.cpp
A libcxx/test/std/numerics/c.math/islessgreater.pass.cpp
A libcxx/test/std/numerics/c.math/isunordered.pass.cpp
Log Message:
-----------
[libc++][math] Add `constexpr` to comparison functions (#210075)
Implement `constexpr` to all comparison functions (`std::isgreater`,
`std::isgreaterequal`, `std::isless`, `std::islessequal`,
`std::islessgreater`, `std::isunordered`) as defined by
[P0533R9](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf).
Towards https://github.com/llvm/llvm-project/issues/105174. Follows-up
https://github.com/llvm/llvm-project/pull/94118.
Commit: 1cfc77fdd6368dd6527c620645ec6f351e1c658f
https://github.com/llvm/llvm-project/commit/1cfc77fdd6368dd6527c620645ec6f351e1c658f
Author: Petr Kurapov <petr.kurapov at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MIR2Vec.h
M llvm/lib/CodeGen/MIR2Vec.cpp
A llvm/test/CodeGen/MIR2Vec/Inputs/mir2vec_classless_vocab.json
A llvm/test/CodeGen/MIR2Vec/classless-physreg.mir
A llvm/test/CodeGen/MIR2Vec/classless-vreg.mir
Log Message:
-----------
[MIR2Vec] Handle registers without a register class (#212280)
getRegisterOperandIndex() hit an llvm_unreachable for registers in no
register class. That is a supported outcome, not an error: tablegen
emits InvalidRegClassID for such registers and getMinimalPhysRegClass()
returns nullptr. It hits classless physregs (X86 $mxcsr/$fpcw, AMDGPU
$mode), which crashed any function with FP math, and generic vregs
before ISel, where MRI.getRegClass() asserts -- so use
getRegClassOrNull().
Return std::nullopt instead. Both callers already handle the analogous
NoRegister and stack-slot cases, so the vocabulary layout is unchanged.
We could avoid the special casing by adding a special value for such
registers. It would actually hold some meaningful information for
models. I didn't include it in this patch since it would require seed
vocab re-generation.
Commit: 511502bfd869ebb74448bd3f67c6c0162507ef85
https://github.com/llvm/llvm-project/commit/511502bfd869ebb74448bd3f67c6c0162507ef85
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Strip dead code in optimizeEarlyExitIndUser (NFC) (#212463)
The check is already present in getOptimizableIVOf, and is an
impossiblity in the IVInc case.
Commit: 9876e0469e315b767c4ba114e7f51207d198e762
https://github.com/llvm/llvm-project/commit/9876e0469e315b767c4ba114e7f51207d198e762
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add SPIRVToLLVM conversion for VectorTimesScalar (#206949)
Commit: 88d26e71960579c5a7b40856664b1f57791597ce
https://github.com/llvm/llvm-project/commit/88d26e71960579c5a7b40856664b1f57791597ce
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
A llvm/test/Transforms/ConstraintElimination/ne-tightening.ll
A llvm/test/Transforms/ConstraintElimination/srem.ll
Log Message:
-----------
[ConstraintElim] Add tests with SRem and NE predicates. (NFC (#212511)
Precommit tests for improved reasoning about SRem and NE predicates.
Commit: 326d563cf70d7f43d8c15eb78f65dd22c1fbdf87
https://github.com/llvm/llvm-project/commit/326d563cf70d7f43d8c15eb78f65dd22c1fbdf87
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/include/clang/AST/ExprObjC.h
M clang/include/clang/Sema/SemaObjC.h
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/unittests/AST/SourceLocationTest.cpp
Log Message:
-----------
Tracks source location of the selector name within ObjCSelectorExpr (#211623)
Store selector name location alongside the existing @-sign and paren locations, exposed via getSelectorLoc(), so tools and diagnostics can reference the name rather than the @selector keyword. While here, rename things to disambiguate locations.
Commit: 98fb5dae73c3887e6659ee126b131b004d12592d
https://github.com/llvm/llvm-project/commit/98fb5dae73c3887e6659ee126b131b004d12592d
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/vfscanf_internal.h
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fscanf_test.cpp
Log Message:
-----------
[libc] Fix EOF handling in fscanf (#211982)
`fscanf` family of functions should return EOF if:
- end of input is reached before either the first successful conversion
or a matching failure occurs;
- a read error occurs.
This wasn't handled correctly before - in "system FILE" mode (in overlay
build) `EOF` return value from `getc` was passed through to parser,
violating `Reader` interface, which triggered infinite loops on
"while-not-EOF" `fscanf` loops. In llvm-libc-FILE mode `fscanf` simply
returned zero instead of EOF, because the code only checked error
indicator on a stream.
This PR removes _any_ lookups of eof/error indicators on an input stream
- instead we can simply rely on the `getc` (system or internal) function
behavior, which returns `EOF` on unsuccessful reads.
Extend the test cases for `fscanf` to cover various return values in
cases when `EOF` is reached (before or after conversions / matching
errors).
Commit: 687818b3fbab242132b91ed2a1815507a7b2a371
https://github.com/llvm/llvm-project/commit/687818b3fbab242132b91ed2a1815507a7b2a371
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
R llvm/docs/BugpointRedesign.md
M llvm/docs/GettingInvolved.md
Log Message:
-----------
[Docs] Delete BugpointRedesign (#212518)
Bugpoint was removed recently, so this does not make sense to keep
around.
Commit: 8efaaf1811f13ea3255ec352a812af949e216d99
https://github.com/llvm/llvm-project/commit/8efaaf1811f13ea3255ec352a812af949e216d99
Author: Mishal Shah <mishal_shah at apple.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[premerge] Build and check runtimes on macOS premerge (#210852)
Compute and pass through LLVM_ENABLE_RUNTIMES and the corresponding
check targets for the macOS premerge job, mirroring existing support for
projects.
Commit: 9ec13f1b2b8701167d428124048cb2cec2366bfa
https://github.com/llvm/llvm-project/commit/9ec13f1b2b8701167d428124048cb2cec2366bfa
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 98fb5da (#212522)
This fixes 98fb5dae73c3887e6659ee126b131b004d12592d (#211982).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=98fb5dae73c3887e6659ee126b131b004d12592d
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 8ea8a288d3a4a446c2229c9d8f682723dd33eee5
https://github.com/llvm/llvm-project/commit/8ea8a288d3a4a446c2229c9d8f682723dd33eee5
Author: Keno Fischer <keno at juliahub.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopConstrainer.h
M llvm/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/test/Transforms/IRCE/compound-loop-bound.ll
A llvm/test/Transforms/IRCE/expansion-cleanup-analysis-invalidation.ll
Log Message:
-----------
[IRCE] Discard speculative SCEV expansions when bailing out (#211089)
LoopStructure::parseLoopStructure materializes SCEVs in the preheader
while merely analyzing the loop, and LoopConstrainer::run expands its
exit limits before all of its bail-out points have been passed. When a
later check failed, those expansions were left behind: the pass mutated
the IR while reporting the function unchanged, which leaves stale
analyses behind (observable with -verify-analysis-invalidation) and
produces dead instructions that differ depending on how far the analysis
got.
Fix this by having callers own the SCEVExpander passed to
parseLoopStructure and wrapping both expanders (IRCE's and
LoopConstrainer::run's) in a SCEVExpanderCleaner whose result is only
marked used once the transformation is guaranteed to proceed. Value
names ("indvar.start", "exit.preloop.at") are now applied only at that
point, since the expander may have reused pre-existing values that must
not be renamed when the transformation is abandoned.
Also return the correct Changed value from
InductiveRangeCheckElimination::run when subrange computation fails,
since earlier steps may already have modified the function.
Co-authored-by: Claude Fable 5 <noreply at anthropic.com>
Commit: 9a7284cedd2c75a7d53e44a49bfa03bfc0c27cae
https://github.com/llvm/llvm-project/commit/9a7284cedd2c75a7d53e44a49bfa03bfc0c27cae
Author: satyanarayana reddy janga <satyajanga at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceDumpInstructions.py
M lldb/test/API/commands/trace/TestTraceExport.py
M lldb/test/API/commands/trace/TestTraceSave.py
M lldb/test/API/commands/trace/TestTraceStartStop.py
Log Message:
-----------
[lldb] Fix trace test assertions after error-message style change (#212372)
Commit 820f4402745d ([lldb] Correct style of error messages, #156774)
changed the "process is not being traced" error emitted by
CommandObject::CheckRequirements from "Process is not being traced." to
"process is not being traced" (lowercase, no trailing period), but did
not update the trace API tests that assert on that string.
These tests only run when the intel-pt plugin is enabled and the host
has Intel PT support (TraceIntelPTTestCaseBase.setUp skips otherwise),
so they are skipped on most buildbots and the stale assertions went
unnoticed. Update all five affected tests to match the new message.
Commit: 4b1cd29ffb39ea94590869657e9170230155a979
https://github.com/llvm/llvm-project/commit/4b1cd29ffb39ea94590869657e9170230155a979
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ThreadSafetyAnalysis.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/test/SemaCXX/warn-thread-safety-parsing.cpp
Log Message:
-----------
Thread Safety Analysis: Don't treat function pointer parameters as scoped capabilities (#211885)
Capability attributes on a parameter mean one of two unrelated things:
on a scoped-lockable parameter they describe the locks the passed scope
object holds, while on a function pointer parameter they describe the
requirements of the function called through the pointer. Since #191187
allowed the latter, both of the scoped-lockable code paths have been
misreading function pointer parameters as scope objects.
At a call site, the argument bound to the parameter was translated into
a capability and required to be held, so passing a callback that
requires a capability was reported as a missing lock named after the
callback:
```
void apply(fn_t fn EXCLUSIVE_LOCKS_REQUIRED(mu));
static int my_fn() EXCLUSIVE_LOCKS_REQUIRED(mu);
...
apply(my_fn); // warning: requires holding mutex 'fn'
```
In the callee, the same confusion seeded the parameter's capabilities
into the function's entry lockset, so they were considered held
throughout the body and the calls made through the pointer went
unchecked -- the opposite of what the annotation asks for.
Skip function pointer parameters in both places; their attributes are
already checked at the indirect call sites (by #191187), the same way as
for annotated function pointer variables and fields.
Assisted-by: Claude Opus 5
Commit: 54eb229d48a45b61cd93a795c7e95443c3a73c26
https://github.com/llvm/llvm-project/commit/54eb229d48a45b61cd93a795c7e95443c3a73c26
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
R llvm/test/CodeGen/PowerPC/fp-classify-nan.ll
Log Message:
-----------
Revert "[PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict" (#212509)
The PR https://github.com/llvm/llvm-project/pull/204170 cause a
regression on the test_suite fail as
Check '!__builtin_issignaling(X)' in file
'/home/buildbots/llvm-external-buildbots/workers/ppc64le-clang-test-suite/clang-ppc64le-test-suite/test/test-suite/SingleSource/UnitTests/Float/classify-f32.h'
at line 101 failed for the value '7fffffff'
This patch reverts the PR
https://github.com/llvm/llvm-project/pull/204170.
, we will reland a new version fix of "improve performance on the isNan
and !isNan function in case of -ffp-model=strict" later after the
regression is fixed.
Commit: 40d457bf353c9f5f3e9a187ee8f24327ab61fe1a
https://github.com/llvm/llvm-project/commit/40d457bf353c9f5f3e9a187ee8f24327ab61fe1a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
Log Message:
-----------
[gn] Port 1e1274b2ddfe (R600TargetParserDef.inc) (#212525)
Commit: ec1015a98216f83bb93b46935f4d096b80ba88e8
https://github.com/llvm/llvm-project/commit/ec1015a98216f83bb93b46935f4d096b80ba88e8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port de962dda1251 (#212526)
Commit: 2db6978f724bfb0f9ae6f37b8ea585c707e65ce8
https://github.com/llvm/llvm-project/commit/2db6978f724bfb0f9ae6f37b8ea585c707e65ce8
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session.py
A lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_win_debug_heap.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/API/tools/lldb-dap/runInTerminal/main.c
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap][Windows] Respect debug-heap setting when launching (#212290)
In #212126, a setting was added to control the heap used when debugging
on Windows. By default, we disable the debug-heap with
`_NO_DEBUG_HEAP=1`. When launching a program from lldb-dap with
`integratedTerminal` or `externalTerminal`, we need to tell the client
about that variable.
This adds the variable in the runInTerminal reverse request if needed.
Closes #201690.
Commit: 3a30af978df0b6f39505fd702f4bfd55b3adb96c
https://github.com/llvm/llvm-project/commit/3a30af978df0b6f39505fd702f4bfd55b3adb96c
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M openmp/device/include/DeviceTypes.h
Log Message:
-----------
[OpenMP][offload] Fix Global addrspace (#212529)
Commit: 65e373abbb7bd39b242ae3c0e9ce647c1aedf607
https://github.com/llvm/llvm-project/commit/65e373abbb7bd39b242ae3c0e9ce647c1aedf607
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/cmake/config-ix.cmake
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
Log Message:
-----------
[Darwin] Improve ld64 based configs (#212329)
Improve and fix the llvm configurations so that:
* Do not look for ld64 when building or testing. The new apple linker is
compatible with the classic ld64 and the ld64 is removed in Xcode 27.
Build and test should not fall back to ld64 or use `-ld-classic`.
* For LTO lit tests, they will fail if `CMAKE_OSX_SYSROOT` is not
specified. Fix the tests so that inferred SYSROOT also work with those
tests.
Commit: 73f41df97629e22c425394b844bdc1305fcaca21
https://github.com/llvm/llvm-project/commit/73f41df97629e22c425394b844bdc1305fcaca21
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/metrics/metrics.py
M .ci/metrics/metrics_test.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .github/CODEOWNERS
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
A .github/workflows/compiler-rt-libc-builtins-tests.yml
M .github/workflows/containers/libc/Dockerfile
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
R .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
R .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-pr-benchmark.yml
A .github/workflows/libcxx-pr-check-generated-files.yml
A .github/workflows/libcxx-pr-conformance-tests.yaml
A .github/workflows/libcxx-pr-test-tools.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/premerge.yaml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/require-team-membership/action.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/subscriber.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-suite/configure-and-build.sh
M .github/workflows/test-suite/llvm.cmake
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/validate-release-version/action.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
M .mailmap
M README.md
A bolt/docs/BOLTAArch64OptimizationStatus.md
R bolt/docs/BOLTAArch64OptimizationStatus.rst
A bolt/docs/GettingStarted.md
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A bolt/docs/NewBackend.md
A bolt/docs/index.md
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M bolt/docs/profiles.md
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryLoop.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/DIEBuilder.h
M bolt/include/bolt/Core/DebugData.h
M bolt/include/bolt/Core/DebugNames.h
M bolt/include/bolt/Profile/DataReader.h
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/include/bolt/Rewrite/MachORewriteInstance.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/include/bolt/Utils/Utils.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Core/DebugNames.cpp
M bolt/lib/Core/GDBIndex.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/lib/Profile/DataReader.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/MachORewriteInstance.cpp
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Rewrite/SDTRewriter.cpp
M bolt/lib/Utils/Utils.cpp
A bolt/test/AArch64/entry-point-at-function-end.s
M bolt/test/AArch64/long-jmp-one-stub.s
M bolt/test/RISCV/reloc-tls.s
A bolt/test/X86/dwarf4-dwarf64-ranges.test
A bolt/test/X86/dwarf64-debug-info-aranges.test
A bolt/test/X86/dwarf64-debug-names.test
A bolt/test/X86/dwarf64-loclists.test
A bolt/test/X86/dwarf64-lowpc-highpc-convert.test
A bolt/test/X86/dwarf64-ref-addr.test
A bolt/test/X86/dwarf64-split-dwarf.test
A bolt/test/X86/dwarf64-str-offsets.test
A bolt/test/X86/dwarf64-types.test
A bolt/test/X86/dynsym-pwrite.test
R bolt/test/X86/instrument-funcs-file.s
A bolt/test/X86/jump-table-empty-block-strict.s
M bolt/test/X86/loop-nest.test
A bolt/test/X86/mixed-dwarf32-dwarf64-debug-names.test
A bolt/test/X86/mixed-dwarf32-dwarf64-rnglists.test
A bolt/test/X86/mixed-dwarf32-dwarf64-str-offsets.test
A bolt/test/X86/profile-symbols-mode.s
M bolt/test/X86/register-fragments-bolt-symbols.s
M bolt/unittests/Core/BinaryContext.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-tidy/add_new_check.py
M clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp
M clang-tools-extra/clang-tidy/performance/CMakeLists.txt
A clang-tools-extra/clang-tidy/performance/ExpensiveValueOrCheck.cpp
A clang-tools-extra/clang-tidy/performance/ExpensiveValueOrCheck.h
M clang-tools-extra/clang-tidy/performance/PerformanceTidyModule.cpp
M clang-tools-extra/clang-tidy/readability/NamedParameterCheck.cpp
M clang-tools-extra/clang-tidy/readability/NamedParameterCheck.h
M clang-tools-extra/clang-tidy/rename_check.py
M clang-tools-extra/clangd/CMakeLists.txt
M clang-tools-extra/clangd/CodeComplete.cpp
A clang-tools-extra/clangd/LSPBinder.cpp
M clang-tools-extra/clangd/LSPBinder.h
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/cleanup-ctad.md
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M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/TypesTest.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
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A clang-tools-extra/test/clang-doc/json/invalid-utf8-comment.cpp
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M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/std/string
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/std/type_traits
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M clang-tools-extra/test/clang-tidy/checkers/readability/named-parameter.cpp
M clang-tools-extra/unittests/clang-change-namespace/ChangeNamespaceTests.cpp
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/hexagon-unknown-linux-musl-clang-dist.cmake
M clang/cmake/caches/hexagon-unknown-linux-musl-clang-dylib-dist.cmake
M clang/cmake/modules/ClangConfig.cmake.in
M clang/docs/HIPSupport.md
M clang/docs/InternalsManual.rst
M clang/docs/OpenMPSupport.md
M clang/docs/ReleaseNotes.md
A clang/docs/ScalableStaticAnalysis/user-docs/SourceEditGeneration.rst
M clang/docs/ThreadSafetyAnalysis.md
M clang/docs/UsersManual.md
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/ExprObjC.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/PrettyPrinter.h
M clang/include/clang/AST/RecordLayout.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/AddressSpaces.h
M clang/include/clang/Basic/Attr.td
A clang/include/clang/Basic/BuiltinTraits.h
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
R clang/include/clang/Basic/ExpressionTraits.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Basic/OptionalUnsigned.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TargetOptions.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/TokenKinds.h
A clang/include/clang/Basic/Traits.td
R clang/include/clang/Basic/TransformTypeTraits.def
M clang/include/clang/Basic/TypeNodes.td
R clang/include/clang/Basic/TypeTraits.h
M clang/include/clang/CIR/CIRToCIRPasses.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRStdOps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.h
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/LowerToLLVM.h
M clang/include/clang/CIR/LoweringHelpers.h
M clang/include/clang/CIR/Passes.h
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/ExtractAPI/DeclarationFragments.h
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/StaticLibrary.h
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/TUSummaryEncoding.h
A clang/include/clang/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/ScopeInfo.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaConcept.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/Sema/SemaOpenMP.h
R clang/include/clang/Sema/TemplateInstCallback.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExplodedGraph.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/include/module.modulemap
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/InferAlloc.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/RecordLayout.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
M clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
M clang/lib/Analysis/LiveVariables.cpp
M clang/lib/Analysis/ThreadSafety.cpp
A clang/lib/Basic/BuiltinTraits.cpp
M clang/lib/Basic/CMakeLists.txt
M clang/lib/Basic/Diagnostic.cpp
R clang/lib/Basic/ExpressionTraits.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/OSTargets.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
R clang/lib/Basic/TypeTraits.cpp
M clang/lib/CIR/CodeGen/CIRGenAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/EHScopeStack.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/IdiomRecognizer.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/PassDetail.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Interfaces/CIRLoopOpInterface.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/lib/CMakeLists.txt
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Clang.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
M clang/lib/Driver/ToolChains/Serenity.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/ASTConsumers.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/__clang_gpu_device_functions.h
M clang/lib/Headers/avx10_2satcvtdsintrin.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Index/IndexSymbol.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/UnicodeCharSets.h
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.cpp
M clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysis/Core/WholeProgramAnalysis/AnalysisDriver.cpp
M clang/lib/ScalableStaticAnalysis/Frontend/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprObjC.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/CStringSyntaxChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckObjCDealloc.cpp
A clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerArithChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/ReportDanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdVariantChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TraversalChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VAListChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/MemoryUnsafeCastChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.h
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
M clang/test/AST/ByteCode/amdgpu-nullptr.cl
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/constexpr-steps.cpp
M clang/test/AST/ByteCode/virtual-bases.cpp
M clang/test/AST/ast-dump-amdgpu-types.c
M clang/test/AST/ast-dump-decl.cpp
A clang/test/AST/ast-dump-deleted-defaulted-range.cpp
M clang/test/AST/ast-dump-funcs.cpp
M clang/test/AST/ast-dump-record-definition-data-json.cpp
M clang/test/AST/ast-print-amdgcn-predicate.c
M clang/test/AST/ast-print-enum-decl.c
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
A clang/test/Analysis/Checkers/WebKit/memory-unsafe-cast-cxxthis.cpp
M clang/test/Analysis/Checkers/WebKit/memory-unsafe-cast.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/empty-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/two-function-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/lit.local.cfg
A clang/test/Analysis/Scalable/source-edit-generation/cli-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
A clang/test/Analysis/Scalable/source-edit-generation/downgradable-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
A clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
M clang/test/Analysis/Scalable/ssaf-analyzer/analyzer.test
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-explicit-triple.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-namespace-override.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libempty.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libtwo.json
M clang/test/Analysis/Scalable/ssaf-linker/help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-create.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-time.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-verbose.test
M clang/test/Analysis/addrspace-null.c
M clang/test/Analysis/bstring.c
M clang/test/Analysis/cast-value-notes.cpp
A clang/test/Analysis/cfg-compound-assignment-eval-order.cpp
M clang/test/Analysis/dangling-ptr-deref.cpp
M clang/test/Analysis/element-region-address-space.c
M clang/test/Analysis/initializer.cpp
M clang/test/Analysis/inlining/Inputs/expected-plists/path-notes.cpp.plist
A clang/test/Analysis/issue-206798.cpp
A clang/test/Analysis/issue-210183.cpp
A clang/test/Analysis/lambda-capture-init-order.cpp
M clang/test/Analysis/lifetime-bound.cpp
M clang/test/Analysis/logical-ops.c
M clang/test/Analysis/loopexit-cfg-output.cpp
M clang/test/Analysis/malloc.c
M clang/test/Analysis/mig.mm
M clang/test/Analysis/pr22954.c
M clang/test/Analysis/ptr-cmp-const-trunc.cl
M clang/test/Analysis/solver-sym-simplification-ptr-bool.cl
A clang/test/Analysis/std-c-library-functions-non-integral-ssize_t.cpp
M clang/test/Analysis/std-variant-checker.cpp
M clang/test/Analysis/z3/cstring-addrspace.c
A clang/test/Analysis/z3/z3-atomic.c
A clang/test/Analysis/z3/z3-bitint-arithmetic.c
M clang/test/Analysis/z3/z3-crosscheck.c
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
M clang/test/C/C11/n1518.c
M clang/test/C/C23/n2836_n2939.c
M clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
M clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
M clang/test/CIR/CodeGen/anonymous-nested-init.c
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/bitfield-init-values.c
A clang/test/CIR/CodeGen/bitint-memory.c
A clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
M clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/CodeGen/builtins-x86.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64.c
R clang/test/CIR/CodeGen/coro-exceptions.cpp
R clang/test/CIR/CodeGen/coro-task.cpp
A clang/test/CIR/CodeGen/default-func-attrs-invoke.cpp
A clang/test/CIR/CodeGen/loop-cond-var-cleanup.cpp
M clang/test/CIR/CodeGen/pointer-to-empty-data-member.cpp
M clang/test/CIR/CodeGen/record-with-padded-union.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
A clang/test/CIR/CodeGen/trivial-union-assign-nyi.cpp
A clang/test/CIR/CodeGen/unions-with-zero-init.cpp
M clang/test/CIR/CodeGen/var_arg.c
M clang/test/CIR/CodeGenBuiltins/X86/avx-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx-shuffle-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
A clang/test/CIR/CodeGenCUDA/builtins-nvvm-atomic.cu
A clang/test/CIR/CodeGenCUDA/builtins-nvvm-ldu.cu
A clang/test/CIR/CodeGenCoroutines/Inputs/coroutine.h
A clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
A clang/test/CIR/CodeGenCoroutines/coro-task.cpp
A clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
M clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
M clang/test/CIR/CodeGenHIP/amdgpu-module-flags.hip
M clang/test/CIR/CodeGenHIP/attr-target-amdgpu.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-extended-image.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-image.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-logb-scalbn.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenHIP/hip-cuid.hip
M clang/test/CIR/CodeGenHIP/simple.cpp
M clang/test/CIR/CodeGenHIP/target-features.hip
M clang/test/CIR/CodeGenOpenMP/emit-device-functions.cpp
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
A clang/test/CIR/CodeGenOpenMP/target-host-op-filtering.c
M clang/test/CIR/CodeGenOpenMP/target-map-llvm-device.c
M clang/test/CIR/CodeGenOpenMP/target-map-llvm-host.c
M clang/test/CIR/CodeGenOpenMP/target-map.c
M clang/test/CIR/IR/invalid-atomic.cir
A clang/test/CIR/IR/invalid-loop-cleanup.cir
A clang/test/CIR/IR/loop-cleanup.cir
A clang/test/CIR/IR/std-ops-invalid.cir
A clang/test/CIR/IR/std-ops.cir
M clang/test/CIR/Lowering/global-var-simple.cpp
A clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-empty-record.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-lang-addrspace-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
A clang/test/CIR/Transforms/flatten-loop-cleanup.cir
A clang/test/CIR/Transforms/idiom-recognizer-strlen-guards.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/test/CIR/Transforms/mem2reg.cir
M clang/test/CMakeLists.txt
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct.default/p3.cpp
A clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general/p2.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/CodeGen/AArch64/branch-protection-attr.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-ldst-one.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
A clang/test/CodeGen/AArch64/neon/store.c
M clang/test/CodeGen/AArch64/poly64.c
M clang/test/CodeGen/AArch64/sign-return-address.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/AMDGPU/full-bf16.c
M clang/test/CodeGen/AMDGPU/nullptr-in-different-address-spaces.cpp
M clang/test/CodeGen/AMDGPU/sanitizer.c
A clang/test/CodeGen/LoongArch/lsx/inline-asm-operand-types.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/CodeGen/SystemZ/systemz-module.flags.c
A clang/test/CodeGen/SystemZ/zos-check-lanuage.c
M clang/test/CodeGen/X86/avx10_2satcvtds-builtins-x64.c
M clang/test/CodeGen/X86/avx10_2satcvtds-builtins.c
M clang/test/CodeGen/address-space.c
M clang/test/CodeGen/align-x68_64.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/amdgpu-image-rsrc-type-debug-info.c
M clang/test/CodeGen/amdgpu-variadic-call.c
M clang/test/CodeGen/annotations-field.c
M clang/test/CodeGen/annotations-loc.c
M clang/test/CodeGen/arm-neon-vst.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/CodeGen/bitfield-access-unit.c
M clang/test/CodeGen/builtin-clear-padding-codegen.c
M clang/test/CodeGen/builtins-extended-image.c
M clang/test/CodeGen/builtins-image-load.c
M clang/test/CodeGen/builtins-image-store.c
M clang/test/CodeGen/call-graph-section-callback.cpp
M clang/test/CodeGen/call-graph-section-internal.cpp
M clang/test/CodeGen/call-graph-section-templates.cpp
M clang/test/CodeGen/call-graph-section-virtual-methods.cpp
M clang/test/CodeGen/call-graph-section.c
M clang/test/CodeGen/call-graph-section.cpp
M clang/test/CodeGen/default-address-space.c
M clang/test/CodeGen/dynamic-alloca-with-address-space.c
M clang/test/CodeGen/fp-atomic-ops.c
M clang/test/CodeGen/half-float16-vector-compatibility.cl
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/linking-bitcode-postopt.cpp
M clang/test/CodeGen/logb_scalbn.c
M clang/test/CodeGen/pragma-detect_mismatch.c
A clang/test/CodeGen/pragma-weak-darwin.c
A clang/test/CodeGen/ptr-subtract-stable.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/scoped-fence-ops.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/sysv_abi.c
M clang/test/CodeGen/target-addrspace.cpp
A clang/test/CodeGen/target-avx-function-abi.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCUDA/address-spaces.cu
M clang/test/CodeGenCUDA/alias.cu
M clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
M clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
M clang/test/CodeGenCUDA/amdgpu-visibility.cu
M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
M clang/test/CodeGenCUDA/anon-ns.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/atomics-remarks-gfx90a.cu
M clang/test/CodeGenCUDA/builtin-mangled-name.cu
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-unsafe-atomics-gfx90a.cu
M clang/test/CodeGenCUDA/cluster_dims.cu
M clang/test/CodeGenCUDA/const-var.cu
M clang/test/CodeGenCUDA/correctly-rounded-div.cu
M clang/test/CodeGenCUDA/dependent-libs.cu
M clang/test/CodeGenCUDA/device-const-var-linkage.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/device-stub.cu
M clang/test/CodeGenCUDA/device-use-host-var.cu
M clang/test/CodeGenCUDA/device-var-init.cu
M clang/test/CodeGenCUDA/device-var-linkage.cu
M clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip
M clang/test/CodeGenCUDA/flush-denormals.cu
M clang/test/CodeGenCUDA/fp-contract.cu
M clang/test/CodeGenCUDA/host-used-device-var.cu
M clang/test/CodeGenCUDA/host-used-extern-determinism.cu
M clang/test/CodeGenCUDA/host-used-extern.cu
M clang/test/CodeGenCUDA/implicit-hd-dtor-trap-stub-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-explicit-inst-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-overload-ambig-hip.hip
M clang/test/CodeGenCUDA/implicit-host-device-fun.cu
M clang/test/CodeGenCUDA/increment-index-for-thunks.cu
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCUDA/kernel-arg-name-metadata.cu
M clang/test/CodeGenCUDA/kernel-args.cu
M clang/test/CodeGenCUDA/kernel-dbg-info.cu
M clang/test/CodeGenCUDA/kernel-stub-name.cu
M clang/test/CodeGenCUDA/lambda-constexpr-capture.cu
M clang/test/CodeGenCUDA/lambda-noinline.cu
M clang/test/CodeGenCUDA/lambda-reference-var.cu
M clang/test/CodeGenCUDA/lambda.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-gpu-attrs-preserved.cu
M clang/test/CodeGenCUDA/long-double.cu
M clang/test/CodeGenCUDA/managed-var.cu
M clang/test/CodeGenCUDA/ms-linker-options.cu
M clang/test/CodeGenCUDA/noinline.cu
M clang/test/CodeGenCUDA/norecurse.cu
M clang/test/CodeGenCUDA/nosanitize-cuid.hip
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCUDA/static-device-var-no-rdc.cu
M clang/test/CodeGenCUDA/static-device-var-rdc.cu
M clang/test/CodeGenCUDA/struct-mangling-number.cu
M clang/test/CodeGenCUDA/template-class-static-member.cu
M clang/test/CodeGenCUDA/types.cu
M clang/test/CodeGenCUDA/unnamed-types.cu
M clang/test/CodeGenCUDA/unused-global-var.cu
M clang/test/CodeGenCUDA/vtbl.cu
A clang/test/CodeGenCXX/Inputs/override-layout-aligned-base.layout
M clang/test/CodeGenCXX/address-space-cast-coerce.cpp
M clang/test/CodeGenCXX/address-space-cast.cpp
M clang/test/CodeGenCXX/alloc-token-pointer.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/amdgcn-string-literal.cpp
M clang/test/CodeGenCXX/amdgcn_declspec_get.cpp
M clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-buffer-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-float16.cpp
M clang/test/CodeGenCXX/amdgpu-image-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-kernel-arg-pointer-type.cpp
M clang/test/CodeGenCXX/bitfield-access-empty.cpp
M clang/test/CodeGenCXX/bitfield-access-tail.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
M clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
M clang/test/CodeGenCXX/conditional-temporaries.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenCXX/cxx11-extern-constexpr.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
R clang/test/CodeGenCXX/gh196469-default-member-init-lambda-cleanup.cpp
M clang/test/CodeGenCXX/ms-constexpr-static-data-member.cpp
M clang/test/CodeGenCXX/no-elide-constructors.cpp
A clang/test/CodeGenCXX/override-layout-aligned-base.cpp
M clang/test/CodeGenCXX/pragma-followup_inner.cpp
M clang/test/CodeGenCXX/pragma-followup_outer.cpp
M clang/test/CodeGenCXX/pragma-loop-distribute.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
M clang/test/CodeGenCXX/sret_cast_with_nonzero_alloca_as.cpp
A clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/test/CodeGenCXX/template-param-objects-address-space.cpp
M clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp
M clang/test/CodeGenCXX/try-catch-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-with-address-space.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-consteval-address-space.cpp
M clang/test/CodeGenCXX/vtable-constexpr-address-space.cpp
M clang/test/CodeGenCXX/vtable-key-function-address-space.cpp
M clang/test/CodeGenCXX/vtable-layout-extreme-address-space.cpp
M clang/test/CodeGenCXX/vtable-linkage-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtt-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenCoroutines/coro-destructor-of-final_suspend.cpp
A clang/test/CodeGenCoroutines/gh188230-coro-await-elidable-suspend-never-final.cpp
M clang/test/CodeGenHIP/amdgcnspirv-uses-amdgpu-abi.cpp
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenHIP/amdgpu-flat-atomic-fadd.hip
M clang/test/CodeGenHIP/amdgpu-global-atomic-fadd.hip
M clang/test/CodeGenHIP/amdgpu-load-to-lds.hip
M clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
M clang/test/CodeGenHIP/ballot.cpp
M clang/test/CodeGenHIP/builtins-amdgcn-buffer-format.hip
M clang/test/CodeGenHIP/builtins-amdgcn-dl-insts.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx11-dl-insts.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx12-wmma-w32.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx12-wmma-w64.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cvt-f16.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-wmma-f16.hip
M clang/test/CodeGenHIP/builtins-amdgcn-gfx950-cvt.hip
M clang/test/CodeGenHIP/builtins-amdgcn-mfma-gfx908.hip
M clang/test/CodeGenHIP/builtins-amdgcn-mfma-gfx942.hip
M clang/test/CodeGenHIP/builtins-amdgcn-mfma-gfx950.hip
A clang/test/CodeGenHIP/builtins-amdgcn-prefetch.hip
M clang/test/CodeGenHIP/builtins-amdgcn-raytracing.hip
M clang/test/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CodeGenHIP/builtins-amdgcn-wmma-w32.hip
M clang/test/CodeGenHIP/builtins-amdgcn-wmma-w64.hip
M clang/test/CodeGenHIP/builtins-make-buffer-rsrc.hip
M clang/test/CodeGenHIP/debug-info-language-hip.hip
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/device-function-huge-arg-ret.hip
M clang/test/CodeGenHIP/dpp-const-fold.hip
M clang/test/CodeGenHIP/half.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/maybe_undef-attr-verify.hip
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHIP/placement-new-addrspace.hip
M clang/test/CodeGenHIP/printf-aggregate.cpp
M clang/test/CodeGenHIP/printf-builtin.hip
M clang/test/CodeGenHIP/printf-kind-module-flag.hip
M clang/test/CodeGenHIP/printf.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHIP/profile-coverage-mapping.hip
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenHIP/sret-lifetime-markers.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
M clang/test/CodeGenHLSL/builtins/InterlockedAdd.hlsl
M clang/test/CodeGenHLSL/builtins/InterlockedOr.hlsl
A clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedAdd.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedOr.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedAdd.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedOr.hlsl
M clang/test/CodeGenHLSL/resources/RWBuffer-imageformat.hlsl
M clang/test/CodeGenHLSL/resources/TypedBuffers-constructor.hlsl
A clang/test/CodeGenHLSL/semantics/flat-decoration.ps.hlsl
M clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
M clang/test/CodeGenHipStdPar/unsupported-ASM.cpp
M clang/test/CodeGenHipStdPar/unsupported-builtins.cpp
A clang/test/CodeGenObjCXX/alloc-token-pointer.mm
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/address-space-constant-initializers.cl
M clang/test/CodeGenOpenCL/address-spaces.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/amdgcn-flat-scratch-name.cl
M clang/test/CodeGenOpenCL/amdgcn-large-globals.cl
M clang/test/CodeGenOpenCL/amdgcn-non-temporal-store.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-alignment.cl
M clang/test/CodeGenOpenCL/amdgpu-attrs.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-calling-conv.cl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/amdgpu-features-default-delta.cl
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/CodeGenOpenCL/amdgpu-ieee.cl
A clang/test/CodeGenOpenCL/amdgpu-module-flag-xnack-sramecc.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
A clang/test/CodeGenOpenCL/amdgpu-wavefront-size-from-subarch.cl
A clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M clang/test/CodeGenOpenCL/atomic-builtins-default-to-device-scope.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/atomics-cas-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/atomics-unsafe-hw-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/backend-unsupported-warning.ll
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark-errs.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-ci.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-cvt-off-f32-i4.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-flat-address-space.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx7-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx908-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx90a-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-5-generic-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cluster-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-monitor.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-tr.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-tensor-load-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1251-wmma-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9-4-generic-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-read-tr.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-async-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w32-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w64-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gws-insts.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-interp.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-load-to-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma-gfx908-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-atomic-add.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-atomic-max.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-store-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raytracing.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-s-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-struct-buffer-load-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-struct-buffer-store-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-gfx1250-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx1030.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx8.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx942.cl
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/CodeGenOpenCL/byval.cl
M clang/test/CodeGenOpenCL/cast_image.cl
M clang/test/CodeGenOpenCL/check-atomic-alignment.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/func-call-dbg-loc.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCL/lifetime.cl
M clang/test/CodeGenOpenCL/nullptr.cl
M clang/test/CodeGenOpenCL/numbered-address-space.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
M clang/test/CodeGenOpenCL/private-array-initialization.cl
M clang/test/CodeGenOpenCL/relaxed-fpmath.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/CodeGenOpenCL/sqrt-fpmath.cl
M clang/test/CodeGenOpenCL/visibility.cl
M clang/test/CodeGenOpenCL/vla.cl
M clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/CoverageMapping/default-method.cpp
M clang/test/DebugInfo/Generic/amdgpu-barrier-type-debug-info.c
M clang/test/DebugInfo/Generic/amdgpu-buffer-rsrc-type-debug-info.c
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
A clang/test/Driver/Inputs/resource_dir/lib/cygwin/libclang_rt.builtins-x86_64.a
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-pc-windows-cygnus/libclang_rt.builtins.a
A clang/test/Driver/Inputs/spirv64-sycl/lib/spirv64-unknown-unknown/libclang_rt.builtins.bc
M clang/test/Driver/aarch64-features.c
M clang/test/Driver/aarch64-fmv.c
M clang/test/Driver/aarch64-security-options.c
M clang/test/Driver/amdgpu-features.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/amdgpu-xnack-sramecc-flags.c
A clang/test/Driver/cygwin-print-file-name.c
A clang/test/Driver/darwin-hip-spirv-version.hip
M clang/test/Driver/darwin-target-variant-sdk-version.c
M clang/test/Driver/dxc_debug.hlsl
M clang/test/Driver/dxc_section_emission.hlsl
M clang/test/Driver/freebsd-mips-as.c
M clang/test/Driver/freebsd.c
M clang/test/Driver/hexagon-toolchain-linux.c
A clang/test/Driver/hip-fpie-option-freebsd.hip
A clang/test/Driver/hip-link-offload-binary.c
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-features.hip
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/Driver/linux-ld.c
M clang/test/Driver/mingw-sysroot.cpp
M clang/test/Driver/opencl.cl
A clang/test/Driver/print-cxx-stdlib.cpp
A clang/test/Driver/sycl-device-lib-spirv64.cpp
M clang/test/Driver/sycl-offload-jit-unix.cpp
M clang/test/Driver/sycl-offload-jit-xarch.cpp
M clang/test/Driver/sycl-offload-jit.cpp
M clang/test/Driver/sycl-print-internal-defines.cpp
A clang/test/Driver/sycl-rtlib-sysroot-mismatch.cpp
M clang/test/Driver/sycl-std-default.cpp
M clang/test/Driver/sycl-windows.cpp
M clang/test/Driver/sycl.cpp
M clang/test/Driver/target-id.cl
A clang/test/ExtractAPI/availability_typedef_anonymous_record.c
A clang/test/ExtractAPI/objc_nullability.m
M clang/test/FixIt/fixit-unicode.c
M clang/test/Format/dump-config-objc-stdin.m
M clang/test/Frontend/amdgcn-machine-analysis-remarks.cl
M clang/test/Frontend/opencl.cl
M clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c
M clang/test/Headers/__clang_hip_cmath-return_types.hip
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_libdevice_declares.cpp
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/__clang_hip_math_ocml_rounded_ops.hip
M clang/test/Headers/__cpuidex_conflict.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/amdgcn_openmp_device_math.c
M clang/test/Headers/amdgcn_openmp_device_math_c.c
M clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
M clang/test/Headers/amdhsa_abi.cl
M clang/test/Headers/gpu-device-functions.cpp
M clang/test/Headers/gpu_disabled_math.cpp
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/hip-constexpr-cmath.hip
M clang/test/Headers/hip-header.hip
M clang/test/Headers/opencl-c-header.cl
M clang/test/Headers/openmp-device-functions-bool.c
M clang/test/Headers/openmp_device_math_isnan.cpp
M clang/test/Headers/openmp_new_nothrow.cpp
A clang/test/Index/USR/class-type-tpl-arg.cpp
M clang/test/Index/cxx14-lambdas.cpp
M clang/test/Index/index-refs.cpp
M clang/test/Index/index-template-specialization.cpp
M clang/test/Index/pipe-size.cl
A clang/test/Interpreter/used-global-after-error.cpp
A clang/test/Layout/ms-arm64-aligned-base-tail-padding.cpp
M clang/test/Layout/ms-x86-declspec-empty_bases.cpp
M clang/test/Lexer/escape_newline_unicode.c
M clang/test/Lexer/unicode.c
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
M clang/test/Misc/amdgcn.unsupported_core_3.1.cl
M clang/test/Misc/backend-resource-limit-diagnostics.cl
M clang/test/Misc/backend-resource-limit-diagnostics.hip
M clang/test/Misc/diag-template-diffing-cxx11.cpp
A clang/test/Modules/gmf-internal-linkage-in-template.cppm
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-canonical-prefixes.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-amdgcnspirv.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/test/OffloadTools/clang-offload-bundler/standardize.c
M clang/test/OffloadTools/clang-offload-bundler/zlib.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/OpenMP/amdgcn_debug_nowait.c
M clang/test/OpenMP/amdgcn_device_function_call.cpp
M clang/test/OpenMP/amdgcn_ldbl_check.cpp
M clang/test/OpenMP/amdgcn_save_temps.c
M clang/test/OpenMP/amdgcn_sret_ctor.cpp
M clang/test/OpenMP/amdgcn_target_codegen.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/amdgcn_target_init_temp_alloca.cpp
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/amdgcn_weak_alias.cpp
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
M clang/test/OpenMP/amdgpu_exceptions.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/amdgpu_threadprivate.cpp
M clang/test/OpenMP/amdgpu_throw.cpp
M clang/test/OpenMP/amdgpu_throw_trap.cpp
M clang/test/OpenMP/amdgpu_try_catch.cpp
M clang/test/OpenMP/copy-gaps-1.cpp
M clang/test/OpenMP/copy-gaps-2.cpp
M clang/test/OpenMP/copy-gaps-3.cpp
M clang/test/OpenMP/copy-gaps-4.cpp
M clang/test/OpenMP/copy-gaps-5.cpp
M clang/test/OpenMP/copy-gaps-6.cpp
M clang/test/OpenMP/debug-info-kmpc.cpp
M clang/test/OpenMP/declare_reduction_ast_print.cpp
M clang/test/OpenMP/declare_target_local_codegen.cpp
M clang/test/OpenMP/declare_target_local_map_messages.cpp
M clang/test/OpenMP/declare_target_local_usm_codegen.cpp
M clang/test/OpenMP/declare_target_nohost_variant_messages.cpp
M clang/test/OpenMP/declare_variant_construct_codegen_1.c
A clang/test/OpenMP/dims_modifier_ast_print.cpp
A clang/test/OpenMP/dims_modifier_messages.cpp
M clang/test/OpenMP/for_ast_print.cpp
M clang/test/OpenMP/force-usm.c
M clang/test/OpenMP/interop_codegen.cpp
M clang/test/OpenMP/metadirective_ast_print.c
M clang/test/OpenMP/metadirective_device_arch_codegen.cpp
M clang/test/OpenMP/metadirective_device_isa_codegen_amdgcn.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/ompx_bare_messages.c
M clang/test/OpenMP/openmp-read-only-feature.c
A clang/test/OpenMP/openmp_offload_weak_vtables.cpp
M clang/test/OpenMP/parallel_ast_print.cpp
M clang/test/OpenMP/strided_update_variable_stride_codegen.c
M clang/test/OpenMP/target_data_if_logical_codegen.cpp
M clang/test/OpenMP/target_exceptions_messages.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
M clang/test/OpenMP/target_parallel_no_exceptions.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_messages.cpp
M clang/test/OpenMP/target_team_variable_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/OpenMP/target_update_count_expression_codegen.c
M clang/test/OpenMP/target_visibility.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/test/OpenMP/thread_limit_gpu.c
M clang/test/PCH/aarch64-sve-types.c
M clang/test/PCH/cxx-explicit-specifier.cpp
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
A clang/test/Parser/cxx2c-expansion-statements-non-compound-stmt-body.cpp
A clang/test/Parser/decltype-crash.cpp
R clang/test/ParserHLSL/hlsl_contained_type_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_is_array_attr_error.hlsl
A clang/test/ParserHLSL/hlsl_is_ms_attr.hlsl
R clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_resource_dimension_attr_error.hlsl
M clang/test/ParserHLSL/semantic_parsing.hlsl
M clang/test/Preprocessor/aarch64-target-features.c
A clang/test/Preprocessor/amdgpu-subarch-cc1-target-cpu.cl
M clang/test/Preprocessor/builtin_aux_info.cpp
M clang/test/Preprocessor/hash_builtin.cpp
M clang/test/Preprocessor/init-fuchsia.c
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-macros.c
M clang/test/Preprocessor/ucn-allowed-chars.c
M clang/test/Preprocessor/ucn-pp-identifier.c
M clang/test/Preprocessor/utf8-allowed-chars.c
M clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/amdgcn-va-list-type.c
M clang/test/Sema/attr-model.cpp
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target.c
M clang/test/Sema/builtin-amdgcn-atomic-inc-dec-failure.cpp
M clang/test/Sema/builtin-amdgcn-fence-failure.cpp
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/callingconv-devicekernel.cpp
M clang/test/Sema/constexpr.c
M clang/test/Sema/inline-asm-validate-amdgpu.cl
A clang/test/Sema/inline-asm-validate-loongarch.c
M clang/test/Sema/scoped-atomic-ops.c
M clang/test/Sema/sizeof-struct-non-zero-as-member.cl
M clang/test/Sema/warn-fortify-source.c
A clang/test/Sema/warn-stringop-overread-fortify.c
A clang/test/Sema/warn-stringop-overread.c
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/Sema/warn-unreachable.c
M clang/test/Sema/wave-reduce-builtins-validate-amdgpu.cl
M clang/test/SemaCUDA/addr-of-overloaded-fn.cu
M clang/test/SemaCUDA/addr-of-overloaded-template-fn.cu
M clang/test/SemaCUDA/allow-int128.cu
M clang/test/SemaCUDA/amdgpu-builtins-pointer-args.cu
M clang/test/SemaCUDA/amdgpu-f128.cu
M clang/test/SemaCUDA/amdgpu-size_t.cu
M clang/test/SemaCUDA/amdgpu-windows-vectorcall.cu
M clang/test/SemaCUDA/atomic-ops.cu
M clang/test/SemaCUDA/builtin-mangled-name.cu
M clang/test/SemaCUDA/builtins-unsafe-atomics-gfx90a.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/const-var.cu
M clang/test/SemaCUDA/constexpr-var.cu
M clang/test/SemaCUDA/deferred-diags-dedup.cu
M clang/test/SemaCUDA/float16.cu
M clang/test/SemaCUDA/fp16-arg-return.cu
M clang/test/SemaCUDA/implicit-hd-dtor-explicit-instantiation.cu
M clang/test/SemaCUDA/implicit-hd-explicit-inst-organic-caller.cu
M clang/test/SemaCUDA/implicit-hd-overload-ambig-organic-caller.cu
M clang/test/SemaCUDA/lambda.cu
M clang/test/SemaCUDA/openmp-target.cu
M clang/test/SemaCUDA/overloaded-builtin.cu
M clang/test/SemaCUDA/windows-calling-conv.cu
M clang/test/SemaCXX/amdgpu-barrier.cpp
M clang/test/SemaCXX/amdgpu-buffer-rsrc.cpp
M clang/test/SemaCXX/amdgpu-feature-builtins-invalid-use.cpp
M clang/test/SemaCXX/amdgpu-image-rsrc.cpp
M clang/test/SemaCXX/amdgpu-sizeof-alignof.cpp
A clang/test/SemaCXX/atomic-auto.cpp
M clang/test/SemaCXX/attr-no-specializations.cpp
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/auto-cxx98.cpp
A clang/test/SemaCXX/builtin-dependent-call.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
A clang/test/SemaCXX/expansion-statements-local-extern-decls.cpp
R clang/test/SemaCXX/gh196469-default-member-init-lambda-capture.cpp
M clang/test/SemaCXX/ms-layout_version.cpp
A clang/test/SemaCXX/qualified-function-typeof.cpp
M clang/test/SemaCXX/source_location.cpp
M clang/test/SemaCXX/static-assert.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/test/SemaCXX/warn-thread-safety-parsing.cpp
M clang/test/SemaHIP/amdgpu-av-load-store.hip
M clang/test/SemaHIP/amdgpu-barrier.hip
M clang/test/SemaHIP/amdgpu-buffer-rsrc.hip
M clang/test/SemaHIP/amdgpu-builtin-in-lambda-with-unsupported-attribute.hip
M clang/test/SemaHIP/amdgpu-builtin-in-lambda.hip
M clang/test/SemaHIP/amdgpu-ds-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-cant-jump.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-return-type-deduction.hip
M clang/test/SemaHIP/amdgpu-feature-predicate.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-global-load-lds-template.hip
M clang/test/SemaHIP/amdgpu-is-invocable.hip
M clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/test/SemaHIP/atomic-deprecated.hip
M clang/test/SemaHIP/builtins-amdgcn-buffer-format.hip
M clang/test/SemaHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
M clang/test/SemaHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
M clang/test/SemaHIP/hip-builtin-lvalue-to-rvalue.hip
M clang/test/SemaHIP/incorrect-atomic-scope.hip
M clang/test/SemaHIP/shared-variable-too-large.hip
M clang/test/SemaHIP/zero-sized-device-array.hip
A clang/test/SemaHLSL/Attributes/hlsl_contained_type_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_array_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_ms_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_rov_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_raw_buffer_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_resource_class_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_resource_dimension_attr_error.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedAdd-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedAdd-sm65-errors.hlsl
M clang/test/SemaHipStdPar/device-can-call-host.cpp
M clang/test/SemaOpenACC/compute-construct-reduction-clause.cpp
M clang/test/SemaOpenACC/loop-construct.cpp
M clang/test/SemaOpenCL/amd-media-ops.cl
M clang/test/SemaOpenCL/amdgpu-attrs.cl
M clang/test/SemaOpenCL/amdgpu-barrier.cl
M clang/test/SemaOpenCL/amdgpu-buffer-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-ds-atomic-fadd-err.cl
M clang/test/SemaOpenCL/amdgpu-image-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-num-sgpr-vgpr-deprecated.cl
M clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
M clang/test/SemaOpenCL/atomic-ops.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cmp-deprecated.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cvt-off-f32-i4-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-ci.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-f16.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-flat-address-space.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx10-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx10.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-cooperative-atomics.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1251-wmma-w32-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx908-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx90a-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx942-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-lds-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-target-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-load-to-lds-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-add-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-add-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-format-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-load-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-store-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-ptr-buffer-load-lds-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-ptr-buffer-load-lds-target-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-s-buffer-load-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-s-wait-event.cl
M clang/test/SemaOpenCL/builtins-amdgcn-struct-buffer-format-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
A clang/test/SemaOpenCL/builtins-extended-image-supported.cl
M clang/test/SemaOpenCL/builtins-image-load-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-image-load-param-gfx942-err.cl
M clang/test/SemaOpenCL/builtins-image-store-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-image-store-param-gfx942-err.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/half-float16-vector-compatibility.cl
M clang/test/SemaOpenCL/incorrect-atomic-scope.cl
M clang/test/SemaOpenCL/numbered-address-space.cl
M clang/test/SemaOpenCL/sampler_t.cl
M clang/test/SemaOpenCLCXX/amdgpu-nullptr.clcpp
M clang/test/SemaOpenMP/amdgpu-barrier.cpp
M clang/test/SemaOpenMP/amdgpu-buffer-rsrc.cpp
M clang/test/SemaOpenMP/amdgpu-image-rsrc.cpp
M clang/test/SemaSYCL/sycl-cconv-win.cpp
M clang/test/SemaTemplate/destructor-template.cpp
M clang/test/SemaTemplate/friend.cpp
M clang/test/SemaTemplate/instantiate-member-initializers.cpp
M clang/test/SemaTemplate/instantiate-requires-clause.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
R clang/test/Templight/templight-deduced-func.cpp
R clang/test/Templight/templight-default-arg-inst.cpp
R clang/test/Templight/templight-default-func-arg.cpp
R clang/test/Templight/templight-default-template-arg.cpp
R clang/test/Templight/templight-empty-entries-fix.cpp
R clang/test/Templight/templight-exception-spec-func.cpp
R clang/test/Templight/templight-explicit-template-arg.cpp
R clang/test/Templight/templight-memoization.cpp
R clang/test/Templight/templight-nested-memoization.cpp
R clang/test/Templight/templight-nested-template-instantiation.cpp
R clang/test/Templight/templight-one-instantiation.cpp
R clang/test/Templight/templight-prior-template-arg.cpp
M clang/test/lit.cfg.py
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
M clang/tools/clang-ssaf-linker/CMakeLists.txt
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.h
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/offload-arch/AMDGPUArchByHIP.cpp
M clang/unittests/AST/SourceLocationTest.cpp
M clang/unittests/AST/StmtPrinterTest.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/CIR/CMakeLists.txt
M clang/unittests/CIR/ControlFlowTest.cpp
A clang/unittests/CIR/GetFloatingPointTypeTest.cpp
A clang/unittests/CIR/IntTypeABIAlignTest.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
M clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/AnalysisDriverTest.cpp
M clang/unittests/Tooling/HeaderIncludesTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangTraitsEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M clang/www/make_cxx_dr_status
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
A compiler-rt/docs/ASanABI.md
R compiler-rt/docs/ASanABI.rst
A compiler-rt/docs/BuildingCompilerRT.md
R compiler-rt/docs/BuildingCompilerRT.rst
A compiler-rt/docs/TestingGuide.md
R compiler-rt/docs/TestingGuide.rst
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/asan/CMakeLists.txt
R compiler-rt/lib/asan/asan_ignorelist.txt
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/cfi/CMakeLists.txt
R compiler-rt/lib/cfi/cfi_ignorelist.txt
M compiler-rt/lib/hwasan/CMakeLists.txt
R compiler-rt/lib/hwasan/hwasan_ignorelist.txt
M compiler-rt/lib/msan/CMakeLists.txt
R compiler-rt/lib/msan/msan_ignorelist.txt
M compiler-rt/lib/profile/InstrProfiling.c
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
M compiler-rt/lib/profile/InstrProfilingWriter.c
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
M compiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_test.cpp
A compiler-rt/lib/sanitizer_ignorelists/CMakeLists.txt
A compiler-rt/lib/sanitizer_ignorelists/asan_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/cfi_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/hwasan_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/msan_ignorelist.txt
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/mem_map_linux.cpp
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/error_info_test.cpp
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mach_vm.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl_ppc64.S
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
M compiler-rt/test/lit.common.cfg.py
A compiler-rt/test/msan/Linux/syscalls_post_output_size.cpp
A compiler-rt/test/profile/AMDGPU/device-module-load-file.hip
M compiler-rt/test/profile/Linux/counter_promo_for.c
M compiler-rt/test/profile/Linux/counter_promo_while.c
M compiler-rt/test/rtsan/deduplicate_errors.cpp
M compiler-rt/test/rtsan/halt_on_error.cpp
M compiler-rt/test/rtsan/lit.cfg.py
M compiler-rt/test/rtsan/unrecognized_flags.cpp
A compiler-rt/test/sanitizer_common/TestCases/Linux/fopen64_nullptr.c
M compiler-rt/test/sanitizer_common/android_commands/android_common.py
A compiler-rt/test/tsan/Darwin/mach_vm_deallocate_race.c
M compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
M cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w32.cl
M cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w64.cl
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
M cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w64.cl
M cross-project-tests/amdgpu/builtins-amdgcn-wmma-w32.cl
M cross-project-tests/amdgpu/builtins-amdgcn-wmma-w64.cl
M cross-project-tests/dtlto/remote-options.test
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/lib/cuda/registration.cpp
M flang-rt/lib/runtime/tools.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/docs/CMakeLists.txt
A flang/docs/CommandGuide/index.md
R flang/docs/CommandGuide/index.rst
A flang/docs/MeetingNotes/2026/2026-07-01.md
A flang/docs/MeetingNotes/2026/2026-07-15.md
M flang/docs/ParameterizedDerivedTypes.md
M flang/docs/ProcedurePointer.md
M flang/docs/fstack-arrays.md
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Lower/CUDA.h
R flang/include/flang/Lower/ComponentPath.h
M flang/include/flang/Lower/ConvertConstant.h
R flang/include/flang/Lower/ConvertExpr.h
M flang/include/flang/Lower/DirectivesCommon.h
R flang/include/flang/Lower/IterationSpace.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Lower/Support/Utils.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Factory.h
M flang/include/flang/Optimizer/Builder/LowLevelIntrinsics.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/include/flang/Optimizer/HLFIR/HLFIRDialect.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/OpenACC/Passes.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Optimizer/Passes/CommandLineOpts.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/include/flang/Runtime/CUDA/registration.h
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
R flang/lib/Lower/ComponentPath.cpp
M flang/lib/Lower/ConvertConstant.cpp
R flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/IO.cpp
R flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Analysis/ArraySectionAnalyzer.cpp
M flang/lib/Optimizer/Builder/BoxValue.cpp
M flang/lib/Optimizer/Builder/Character.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/LowLevelIntrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIRDialect.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCEmitNYIFlang.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCInitializeFIRAnalyses.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCPipeline.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Passes/CommandLineOpts.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocDelay.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
A flang/lib/Optimizer/Transforms/StackArrays.h
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/symbol.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-copy-region.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-pointer.mlir
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
M flang/test/Driver/fakeflang.F
M flang/test/Driver/linker-options.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
A flang/test/Driver/openacc-nyi.f90
A flang/test/Driver/openmp-target-fast-flag.f90
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-constructor.f90
A flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
A flang/test/Fir/CUDA/cuda-device-global-cycle.fir
M flang/test/Fir/CUDA/cuda-unified-module-global.f90
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/FirToSCF/do-extra.fir
M flang/test/Fir/FirToSCF/do-loop.fir
M flang/test/Fir/FirToSCF/iter-while.fir
M flang/test/Fir/FirToSCF/iterate-while-extra.fir
A flang/test/Fir/OpenACC/acc-declare-gpu-module-insertion.fir
M flang/test/Fir/array-coor-canonicalization.fir
R flang/test/Fir/arrexp.fir
M flang/test/Fir/basic-program.fir
A flang/test/Fir/box-dims-folding.fir
M flang/test/Fir/boxaddr-folding.fir
A flang/test/Fir/create-box-codegen.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
M flang/test/Fir/loop01.fir
M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
A flang/test/HLFIR/bufferize-conditional.fir
M flang/test/HLFIR/invalid.fir
M flang/test/HLFIR/optional_dummy.f90
A flang/test/Integration/OpenMP/declare-target-funcs.f90
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M flang/test/Integration/ivdep.f90
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-derived.cuf
A flang/test/Lower/CUDA/cuda-gpu-unified.cuf
R flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
A flang/test/Lower/CUDA/cuda-managed-assign.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/HLFIR/conditional-expr.f90
A flang/test/Lower/HLFIR/elemental-array-constant-shape.f90
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/HLFIR/matmul.f90
M flang/test/Lower/MIF/change_team2.f90
A flang/test/Lower/OpenACC/Todo/acc-reduction-component.f90
M flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-reduction-remapping.f90
M flang/test/Lower/OpenACC/acc-terminator.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
M flang/test/Lower/OpenMP/Todo/assume.f90
M flang/test/Lower/OpenMP/Todo/assumes.f90
R flang/test/Lower/OpenMP/Todo/error.f90
R flang/test/Lower/OpenMP/Todo/interop-construct.f90
A flang/test/Lower/OpenMP/Todo/interop-prefer-type-selector-list.f90
A flang/test/Lower/OpenMP/Todo/interop-prefer-type-unknown-fr.f90
A flang/test/Lower/OpenMP/assumption.f90
A flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
A flang/test/Lower/OpenMP/collapse-labeled-do-host-eval.f90
A flang/test/Lower/OpenMP/collapse-loop-transform.f90
A flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/depend-iterator.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
A flang/test/Lower/OpenMP/error.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
A flang/test/Lower/OpenMP/implicit-map-flat-allocatable-no-mapper.f90
M flang/test/Lower/OpenMP/implicit-map-pointer-no-default-mapper.f90
A flang/test/Lower/OpenMP/interop.f90
M flang/test/Lower/OpenMP/loop-compound.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
A flang/test/Lower/OpenMP/reduction-array-section.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/task-affinity.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/branching-directive.f90
M flang/test/Lower/call-copy-in-out.f90
A flang/test/Lower/common-block-derived-initialization.f90
M flang/test/Lower/components.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_loop.f90
A flang/test/Lower/do_loop_execute_region_wrap.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/fail_image.f90
A flang/test/Lower/global-initialization-parens.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/identical-block-merge-disable.f90
A flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/ifconvert.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/ivdep.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Lower/pointer-assignments.f90
A flang/test/Lower/pre-fir-tree-assigned-goto.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
M flang/test/Lower/statement-function.f90
A flang/test/Lower/submodule-async-volatile.f90
M flang/test/Lower/variable-inquiries.f90
M flang/test/Lower/while_loop.f90
M flang/test/Parser/OpenMP/error-unparse.f90
M flang/test/Parser/OpenMP/metadirective-v50.f90
M flang/test/Parser/acc-unparse.f90
M flang/test/Semantics/CUDA/cuf02.cuf
A flang/test/Semantics/OpenACC/acc-construct-entity-shadow.f90
M flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
A flang/test/Semantics/OpenACC/acc-routine-generic.f90
A flang/test/Semantics/OpenMP/declare-variant-restriction.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
A flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
M flang/test/Semantics/OpenMP/error.f90
A flang/test/Semantics/OpenMP/interop-construct-v60.f90
A flang/test/Semantics/OpenMP/interop-prefer-type.f90
A flang/test/Semantics/OpenMP/metadirective-default-none.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
A flang/test/Semantics/OpenMP/teams_loop.f90
A flang/test/Semantics/declaration-assumed-array-bounds.f90
M flang/test/Semantics/misc-declarations.f90
M flang/test/Semantics/symbol05.f90
M flang/test/Transforms/CUF/cuf-alloc-delay.fir
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
A flang/test/Transforms/OpenACC/acc-emit-nyi-flang.fir
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-create-box.fir
M flang/tools/fakeflang/fakeflang.cpp
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/math/index.rst
R libc/docs/headers/time.rst
M libc/fuzzing/stdio/CMakeLists.txt
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/hdr/CMakeLists.txt
A libc/hdr/termios_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/cc_t.h
A libc/hdr/types/pthread_t.h
A libc/hdr/types/speed_t.h
A libc/hdr/types/struct_group_req.h
A libc/hdr/types/struct_group_source_req.h
A libc/hdr/types/struct_termios.h
A libc/hdr/types/tcflag_t.h
M libc/include/CMakeLists.txt
A libc/include/langinfo.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/endian-macros.h
A libc/include/llvm-libc-macros/langinfo-macros.h
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/signal-macros.h
M libc/include/llvm-libc-macros/linux/sys-stat-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__off64_t.h
A libc/include/llvm-libc-types/__off_t.h
A libc/include/llvm-libc-types/__uint64_t.h
A libc/include/llvm-libc-types/caddr_t.h
A libc/include/llvm-libc-types/id_t.h
A libc/include/llvm-libc-types/ino64_t.h
A libc/include/llvm-libc-types/nl_item.h
A libc/include/llvm-libc-types/struct_group_req.h
A libc/include/llvm-libc-types/struct_group_source_req.h
M libc/include/llvm-libc-types/struct_sockaddr_storage.h
M libc/include/llvm-libc-types/struct_termios.h
A libc/include/llvm-libc-types/u_int.h
A libc/include/llvm-libc-types/u_int16_t.h
A libc/include/llvm-libc-types/u_int8_t.h
A libc/include/llvm-libc-types/u_long.h
A libc/include/llvm-libc-types/u_short.h
A libc/include/llvm-libc-types/ulong.h
A libc/include/llvm-libc-types/useconds_t.h
A libc/include/llvm-libc-types/ushort.h
M libc/include/math.yaml
A libc/include/memory.yaml
M libc/include/netinet/in.yaml
M libc/include/pthread.yaml
M libc/include/stdlib.yaml
A libc/include/sys/fcntl.yaml
A libc/include/sys/poll.yaml
A libc/include/sys/signal.yaml
M libc/include/sys/time.yaml
M libc/include/sys/types.yaml
A libc/include/sys/unistd.yaml
M libc/include/time.yaml
M libc/shared/math.h
A libc/shared/math/lgammaf16.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/simd.h
M libc/src/__support/CPP/string.h
M libc/src/__support/CPP/type_traits/is_floating_point.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/FPUtil/cast.h
M libc/src/__support/FPUtil/dyadic_float.h
A libc/src/__support/FPUtil/float128.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/GPU/allocator.cpp
M libc/src/__support/OSUtil/linux/CMakeLists.txt
M libc/src/__support/OSUtil/linux/auxv.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/sched_getparam.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/sched_getscheduler.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/sched_setscheduler.h
M libc/src/__support/macros/properties/types.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/hypot.h
A libc/src/__support/math/lgammaf16.h
A libc/src/__support/printf_core/CMakeLists.txt
A libc/src/__support/printf_core/char_converter.h
A libc/src/__support/printf_core/converter.h
A libc/src/__support/printf_core/converter_atlas.h
A libc/src/__support/printf_core/converter_utils.h
A libc/src/__support/printf_core/core_structs.h
A libc/src/__support/printf_core/error_mapper.h
A libc/src/__support/printf_core/fixed_converter.h
A libc/src/__support/printf_core/float_dec_converter.h
A libc/src/__support/printf_core/float_dec_converter_limited.h
A libc/src/__support/printf_core/float_hex_converter.h
A libc/src/__support/printf_core/float_impl.cpp
A libc/src/__support/printf_core/float_inf_nan_converter.h
A libc/src/__support/printf_core/generic/CMakeLists.txt
A libc/src/__support/printf_core/generic/error_mapper.h
A libc/src/__support/printf_core/int_converter.h
A libc/src/__support/printf_core/linux/CMakeLists.txt
A libc/src/__support/printf_core/linux/error_mapper.h
A libc/src/__support/printf_core/parser.h
A libc/src/__support/printf_core/printf_config.h
A libc/src/__support/printf_core/printf_main.h
A libc/src/__support/printf_core/ptr_converter.h
A libc/src/__support/printf_core/strerror_converter.h
A libc/src/__support/printf_core/string_converter.h
A libc/src/__support/printf_core/vasprintf_internal.h
A libc/src/__support/printf_core/vfprintf_internal.h
A libc/src/__support/printf_core/write_int_converter.h
A libc/src/__support/printf_core/write_modes.def
A libc/src/__support/printf_core/writer.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/err/CMakeLists.txt
M libc/src/err/report.cpp
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/lgammaf16.cpp
A libc/src/math/lgammaf16.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_getschedparam.cpp
A libc/src/pthread/pthread_getschedparam.h
A libc/src/pthread/pthread_setschedparam.cpp
A libc/src/pthread/pthread_setschedparam.h
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/semaphore/linux/CMakeLists.txt
M libc/src/semaphore/linux/named_semaphore.cpp
M libc/src/semaphore/linux/semaphore.h
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/asprintf.cpp
M libc/src/stdio/asprintf_modular.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/vfprintf_internal.h
M libc/src/stdio/generic/CMakeLists.txt
M libc/src/stdio/generic/fprintf.cpp
M libc/src/stdio/generic/printf.cpp
M libc/src/stdio/generic/vfprintf.cpp
M libc/src/stdio/generic/vprintf.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/stdio/linux/stdin.cpp
M libc/src/stdio/linux/stdout.cpp
R libc/src/stdio/printf_core/CMakeLists.txt
R libc/src/stdio/printf_core/char_converter.h
R libc/src/stdio/printf_core/converter.h
R libc/src/stdio/printf_core/converter_atlas.h
R libc/src/stdio/printf_core/converter_utils.h
R libc/src/stdio/printf_core/core_structs.h
R libc/src/stdio/printf_core/error_mapper.h
R libc/src/stdio/printf_core/fixed_converter.h
R libc/src/stdio/printf_core/float_dec_converter.h
R libc/src/stdio/printf_core/float_dec_converter_limited.h
R libc/src/stdio/printf_core/float_hex_converter.h
R libc/src/stdio/printf_core/float_impl.cpp
R libc/src/stdio/printf_core/float_inf_nan_converter.h
R libc/src/stdio/printf_core/generic/CMakeLists.txt
R libc/src/stdio/printf_core/generic/error_mapper.h
R libc/src/stdio/printf_core/int_converter.h
R libc/src/stdio/printf_core/linux/CMakeLists.txt
R libc/src/stdio/printf_core/linux/error_mapper.h
R libc/src/stdio/printf_core/parser.h
R libc/src/stdio/printf_core/printf_config.h
R libc/src/stdio/printf_core/printf_main.h
R libc/src/stdio/printf_core/ptr_converter.h
R libc/src/stdio/printf_core/strerror_converter.h
R libc/src/stdio/printf_core/string_converter.h
R libc/src/stdio/printf_core/vasprintf_internal.h
R libc/src/stdio/printf_core/vfprintf_internal.h
R libc/src/stdio/printf_core/write_int_converter.h
R libc/src/stdio/printf_core/write_modes.def
R libc/src/stdio/printf_core/writer.h
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/stdio/scanf_core/vfscanf_internal.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/snprintf_modular.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/sprintf_modular.cpp
M libc/src/stdio/vasprintf.cpp
M libc/src/stdio/vasprintf_modular.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsnprintf_modular.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdio/vsprintf_modular.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/environ_internal.cpp
M libc/src/stdlib/environ_internal.h
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/putenv.cpp
M libc/src/stdlib/linux/realpath.cpp
A libc/src/stdlib/putenv.h
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/string/memory_utils/aarch64/inline_memmove.h
M libc/src/string/memory_utils/op_generic.h
M libc/src/string/memory_utils/op_x86.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
M libc/src/sys/ipc/linux/CMakeLists.txt
M libc/src/sys/ipc/linux/ftok.cpp
R libc/src/sys/ipc/linux/kernel_statx.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_unlink.cpp
M libc/src/sys/time/CMakeLists.txt
A libc/src/sys/time/gettimeofday.h
M libc/src/sys/time/linux/CMakeLists.txt
A libc/src/sys/time/linux/gettimeofday.cpp
M libc/src/sys/time/linux/utimes.cpp
M libc/src/termios/cfgetispeed.h
M libc/src/termios/cfgetospeed.h
M libc/src/termios/cfsetispeed.h
M libc/src/termios/cfsetospeed.h
M libc/src/termios/linux/CMakeLists.txt
M libc/src/termios/linux/cfgetispeed.cpp
M libc/src/termios/linux/cfgetospeed.cpp
M libc/src/termios/linux/cfsetispeed.cpp
M libc/src/termios/linux/cfsetospeed.cpp
M libc/src/termios/linux/kernel_termios.h
A libc/src/termios/linux/speed_utils.h
M libc/src/termios/linux/tcdrain.cpp
M libc/src/termios/linux/tcflow.cpp
M libc/src/termios/linux/tcflush.cpp
M libc/src/termios/linux/tcgetattr.cpp
M libc/src/termios/linux/tcgetsid.cpp
M libc/src/termios/linux/tcsendbreak.cpp
M libc/src/termios/linux/tcsetattr.cpp
M libc/src/termios/tcdrain.h
M libc/src/termios/tcflow.h
M libc/src/termios/tcflush.h
M libc/src/termios/tcgetattr.h
M libc/src/termios/tcgetsid.h
M libc/src/termios/tcsendbreak.h
M libc/src/termios/tcsetattr.h
M libc/src/time/CMakeLists.txt
R libc/src/time/gettimeofday.h
M libc/src/time/linux/CMakeLists.txt
R libc/src/time/linux/gettimeofday.cpp
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/composite_converter.h
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
M libc/src/time/strftime_core/strftime_main.h
M libc/src/time/strftime_l.cpp
A libc/src/time/strptime.cpp
A libc/src/time/strptime.h
M libc/startup/linux/x86_64/CMakeLists.txt
M libc/startup/linux/x86_64/tls.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/FPExceptMatcher.cpp
M libc/test/UnitTest/FPMatcher.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcDeathTestExecutors.cpp
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
R libc/test/UnitTest/PlatformDefs.h
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/UnitTest/RoundingModeUtils.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_barrier_test.cpp
A libc/test/integration/src/pthread/pthread_setschedparam_test.cpp
M libc/test/integration/src/stdlib/CMakeLists.txt
A libc/test/integration/src/stdlib/putenv_test.cpp
M libc/test/integration/src/sys/sem/CMakeLists.txt
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/CPP/string_test.cpp
M libc/test/src/__support/FPUtil/CMakeLists.txt
A libc/test/src/__support/FPUtil/float128_test.cpp
M libc/test/src/__support/hash_test.cpp
A libc/test/src/__support/printf_core/CMakeLists.txt
A libc/test/src/__support/printf_core/converter_test.cpp
A libc/test/src/__support/printf_core/parser_test.cpp
A libc/test/src/__support/printf_core/writer_test.cpp
M libc/test/src/assert/CMakeLists.txt
M libc/test/src/assert/assert_test.cpp
M libc/test/src/libgen/CMakeLists.txt
M libc/test/src/libgen/basename_death_test.cpp
M libc/test/src/libgen/dirname_death_test.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RoundToIntegerTest.h
A libc/test/src/math/lgammaf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/CanonicalizeTest.h
M libc/test/src/math/smoke/FModTest.h
M libc/test/src/math/smoke/NearbyIntTest.h
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/test/src/math/smoke/hypot_test.cpp
A libc/test/src/math/smoke/lgammaf16_test.cpp
M libc/test/src/netinet/CMakeLists.txt
M libc/test/src/netinet/in_test.cpp
M libc/test/src/search/CMakeLists.txt
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/stdfix/DiviFxTest.h
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fscanf_test.cpp
R libc/test/src/stdio/printf_core/CMakeLists.txt
R libc/test/src/stdio/printf_core/converter_test.cpp
R libc/test/src/stdio/printf_core/parser_test.cpp
R libc/test/src/stdio/printf_core/writer_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
M libc/test/src/sys/auxv/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/pkey_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/connect_accept_test.cpp
M libc/test/src/sys/socket/linux/listen_test.cpp
M libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
M libc/test/src/sys/socket/linux/sockatmark_test.cpp
M libc/test/src/sys/socket/linux/socket_test_support.h
M libc/test/src/sys/socket/linux/sockname_test.cpp
M libc/test/src/sys/time/CMakeLists.txt
A libc/test/src/sys/time/gettimeofday_test.cpp
M libc/test/src/sys/uio/CMakeLists.txt
M libc/test/src/sys/uio/readv_test.cpp
M libc/test/src/sys/uio/writev_test.cpp
M libc/test/src/termios/CMakeLists.txt
M libc/test/src/termios/termios_test.cpp
M libc/test/src/time/CMakeLists.txt
R libc/test/src/time/gettimeofday_test.cpp
M libc/test/src/time/localtime_r_test.cpp
A libc/test/src/time/strptime_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/chown_test.cpp
M libc/test/src/unistd/read_write_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/test/src/unistd/truncate_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
A libc/utils/docgen/time.yaml
M libclc/clc/lib/generic/math/clc_sincos_helpers.cl
M libclc/clc/lib/generic/math/clc_sincos_helpers.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp16.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp64.inc
M libclc/clc/lib/generic/math/clc_sincospi.cl
M libclc/clc/lib/generic/math/clc_sincospi.inc
M libclc/clc/lib/generic/math/clc_trigpi_helpers.cl
M libclc/clc/lib/generic/math/clc_trigpi_helpers.inc
M libclc/test/math/cos.cl
M libcxx/docs/Contributing.rst
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/ReleaseProcedure.rst
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/docs/conf.py
M libcxx/docs/index.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/any_of.h
M libcxx/include/__algorithm/comp.h
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
A libcxx/include/__atomic/clear_padding.h
M libcxx/include/__atomic/support.h
M libcxx/include/__atomic/support/c11.h
M libcxx/include/__atomic/support/gcc.h
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__configuration/namespace.h
M libcxx/include/__functional/function.h
A libcxx/include/__functional/function_ref.h
A libcxx/include/__functional/function_ref_common.h
A libcxx/include/__functional/function_ref_impl.h
M libcxx/include/__locale
M libcxx/include/__math/traits.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__numeric/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/mismatch.h
M libcxx/include/__ranges/lazy_split_view.h
A libcxx/include/__type_traits/register_passable.h
M libcxx/include/__utility/cmp.h
M libcxx/include/__vector/layout.h
M libcxx/include/__vector/vector.h
M libcxx/include/atomic
M libcxx/include/cmath
M libcxx/include/fstream
M libcxx/include/functional
M libcxx/include/math.h
M libcxx/include/memory
M libcxx/include/module.modulemap.in
M libcxx/include/optional
M libcxx/include/string
M libcxx/include/system_error
M libcxx/include/text_encoding
M libcxx/include/tuple
M libcxx/include/version
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/modules/std/atomic.inc
M libcxx/modules/std/functional.inc
M libcxx/modules/std/memory.inc
M libcxx/src/include/overridable_function.h
M libcxx/src/ios.cpp
M libcxx/src/ios.instantiations.cpp
M libcxx/src/iostream.cpp
M libcxx/src/locale.cpp
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
M libcxx/test/CMakeLists.txt
M libcxx/test/benchmarks/adjacent_view_begin.bench.cpp
M libcxx/test/benchmarks/algorithms/lexicographical_compare_three_way.bench.cpp
R libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/min_max_element.bench.cpp
R libcxx/test/benchmarks/algorithms/minmax.bench.cpp
A libcxx/test/benchmarks/algorithms/ranges_min_max.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/nth_element.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/permutation.bench.cpp
M libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
M libcxx/test/benchmarks/containers/string.bench.cpp
M libcxx/test/configs/amdgpu-libc++-shared.cfg.in
M libcxx/test/configs/apple-libc++-shared.cfg.in
M libcxx/test/configs/apple-libc++-system.cfg.in
M libcxx/test/configs/armv7m-picolibc-libc++.cfg.in
R libcxx/test/configs/cmake-bridge.cfg.in
A libcxx/test/configs/harness-configuration.cfg.in
M libcxx/test/configs/ibm-libc++-shared.cfg.in
A libcxx/test/configs/libcxx-substitutions.cfg.in
A libcxx/test/configs/lit.site.cfg.in
M libcxx/test/configs/llvm-libc++-android.cfg.in
M libcxx/test/configs/llvm-libc++-llvm-libc.cfg.in
M libcxx/test/configs/llvm-libc++-mingw.cfg.in
M libcxx/test/configs/llvm-libc++-shared-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-shared-gcc.cfg.in
M libcxx/test/configs/llvm-libc++-shared-no-vcruntime-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-shared.cfg.in
M libcxx/test/configs/llvm-libc++-static-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-static.cfg.in
M libcxx/test/configs/nvptx-libc++-shared.cfg.in
M libcxx/test/configs/stdlib-libstdc++.cfg.in
M libcxx/test/configs/stdlib-native.cfg.in
A libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/test.dat
A libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/xsgetn.buffer.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/allocation_size.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/libcxx/atomics/atomics.types.generic/padding.pass.cpp
R libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
A libcxx/test/libcxx/atomics/clear_padding.pass.cpp
A libcxx/test/libcxx/containers/sequences/vector/incomplete_type.compile.pass.cpp
A libcxx/test/libcxx/input.output/iostream.objects/sync_with_stdio.buffer_type.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.enumerate/nodiscard.verify.cpp
A libcxx/test/libcxx/text/text_encoding/aliases_count.pass.cpp
M libcxx/test/libcxx/text/text_encoding/environment.pass.cpp
M libcxx/test/libcxx/type_traits/desugars_to.compile.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assert.constant_arg_ptr.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assert.function_ptr.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_arg.mandates.verify.cpp
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
A libcxx/test/selftest/if-else.sh.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.all_of/all_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.any_of/any_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.none_of/none_of.pass.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/mismatch/pstl.mismatch.pass.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/mismatch/pstl.mismatch_pred.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
A libcxx/test/std/atomics/atomics.ref/fetch_max.pass.cpp
A libcxx/test/std/atomics/atomics.ref/fetch_min.pass.cpp
A libcxx/test/std/atomics/atomics.types.generic/padding.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_max.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_max_explicit.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_min.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_min_explicit.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
A libcxx/test/std/input.output/iostream.objects/many-ints.dat
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cerr.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.readmany.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/clog.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cout.interleave_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cout.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/sync_with_stdio.state.pass.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcerr.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcin.readmany.sh.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcin.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wclog.sync_with_stdio.sh.cpp
A libcxx/test/std/input.output/iostream.objects/wide.stream.objects/wcout.sync_with_stdio.sh.cpp
M libcxx/test/std/input.output/iostreams.base/ios.base/ios.members.static/sync_with_stdio.pass.cpp
M libcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.distance/iterator_sentinel.pass.cpp
R libcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.distance/lwg3664.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/atomic.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/functional.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.pass.cpp
A libcxx/test/std/numerics/c.math/fpclassify.pass.cpp
A libcxx/test/std/numerics/c.math/isgreater.pass.cpp
A libcxx/test/std/numerics/c.math/isgreaterequal.pass.cpp
A libcxx/test/std/numerics/c.math/isless.pass.cpp
A libcxx/test/std/numerics/c.math/islessequal.pass.cpp
A libcxx/test/std/numerics/c.math/islessgreater.pass.cpp
A libcxx/test/std/numerics/c.math/isunordered.pass.cpp
A libcxx/test/std/numerics/numeric.ops/adjacent.difference/pstl.adjacent_difference.pass.cpp
A libcxx/test/std/numerics/numeric.ops/adjacent.difference/pstl.adjacent_difference_op.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating.bitint.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/helpers.h
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/iterator/member_types.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.elements/iterator/base.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.elements/sentinel/ctor.convert.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.transform/iterator/sentinel.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.transform/sentinel/sentinel.pass.cpp
R libcxx/test/std/text/text_encoding/test_text_encoding.h
M libcxx/test/std/text/text_encoding/text_encoding.ctor/id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.ctor/string_view.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.eq/equal.id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/empty.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/operator-bool.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/hours.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/is_negative.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/minutes.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/seconds.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/subseconds.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/to_duration.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/ctad.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assign.delete.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper_ptr.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper_ref.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/copy.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/copy_assign.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/function_ptr.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/move.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/move_assign.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/ref.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.inv/invoke.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/trivially_copyable.compile.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerequal/owner_equal.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerhash/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_hash.pass.cpp
A libcxx/test/support/atomic_fetch_max_helper.h
A libcxx/test/support/atomic_fetch_min_helper.h
M libcxx/test/support/module.modulemap
A libcxx/test/support/runway_sample.h
A libcxx/test/support/test.support/runway_sample.pass.cpp
M libcxx/test/support/test_macros.h
A libcxx/test/support/test_text_encoding.h
M libcxx/test/tools/clang_tidy_checks/robust_against_operator_ampersand.cpp
M libcxx/utils/benchmark-historical
M libcxx/utils/ci/images/libcxx_release_runners.txt
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/lnt/schema.yaml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/features/availability.py
M libcxx/utils/libcxx/test/features/misc.py
M libcxx/utils/libcxx/test/format.py
M libcxx/utils/test-at-commit
M libcxxabi/include/cxxabi.h
M libcxxabi/test/cxa_vec_new_overflow_PR41395.pass.cpp
M libcxxabi/test/dynamic_cast.pass.cpp
M libcxxabi/test/test_aux_runtime_op_array_new.pass.cpp
M libcxxabi/test/uncaught_exceptions.pass.cpp
M libsycl/CMakeLists.txt
A libsycl/docs/CodingGuidelines.md
R libsycl/docs/CodingGuidelines.rst
A libsycl/docs/index.md
R libsycl/docs/index.rst
M libsycl/src/event.cpp
M libsycl/src/usm_functions.cpp
M libsycl/test/README.md
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/lit.cfg.py
M libsycl/test/usm/alloc_functions.cpp
M libsycl/unittests/event/event.cpp
A libunwind/docs/BuildingLibunwind.md
R libunwind/docs/BuildingLibunwind.rst
M libunwind/docs/conf.py
A libunwind/docs/index.md
R libunwind/docs/index.rst
M libunwind/include/__libunwind_config.h
M libunwind/include/mach-o/compact_unwind_encoding.h
M libunwind/src/CompactUnwinder.hpp
M libunwind/src/DwarfInstructions.hpp
M libunwind/src/DwarfParser.hpp
M libunwind/src/Registers.hpp
M libunwind/src/UnwindCursor.hpp
M libunwind/src/UnwindRegistersSave.S
M libunwind/src/dwarf2.h
M libunwind/test/CMakeLists.txt
M libunwind/test/aarch64_za_unwind.pass.cpp
A libunwind/test/aix_vapi_signal_unwind.pass.cpp
A libunwind/test/aix_vapi_unw_resume.pass.cpp
M libunwind/test/configs/apple-libunwind-system.cfg.in
M libunwind/test/configs/cmake-bridge.cfg.in
M libunwind/test/configs/llvm-libunwind-merged.cfg.in
M libunwind/test/configs/llvm-libunwind-shared.cfg.in
M libunwind/test/configs/llvm-libunwind-static.cfg.in
A libunwind/test/ra_sign_state.pass.cpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
A lld/test/COFF/link-dll-arm64x.s
M lld/test/ELF/aarch64-ifunc-bti.s
M lld/test/ELF/amdgpu-abi-version-err.s
M lld/test/ELF/amdgpu-abi-version.s
M lld/test/ELF/amdgpu-duplicate-sym.s
M lld/test/ELF/amdgpu-elf-flags-err.s
M lld/test/ELF/amdgpu-elf-flags.s
M lld/test/ELF/amdgpu-globals.s
M lld/test/ELF/amdgpu-relocs.s
M lld/test/ELF/amdgpu-relocs2.s
M lld/test/ELF/amdgpu-tid.s
A lld/test/ELF/eh-frame-dynrel-offset.s
M lld/test/ELF/emulation-amdgpu.s
M lld/test/ELF/lto/amdgcn-oses.ll
A lld/test/ELF/lto/amdgpu.ll
M lld/test/ELF/ppc32-ifunc-nonpreemptible-nopic.s
M lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
M lld/test/ELF/ppc64-ifunc.s
M lld/test/ELF/riscv-feature-zicfilp-unlabeled.s
A lld/test/ELF/sparcv9-abs-pic.s
A lld/test/ELF/sparcv9-plt.s
A lld/test/ELF/sparcv9-reloc-got.s
A lld/test/ELF/sparcv9-reloc-pc.s
A lld/test/ELF/sparcv9-reloc-range.s
M lld/test/ELF/sparcv9-reloc.s
M lld/test/ELF/version-script-symver-extern.s
M lld/test/ELF/version-script-symver.s
A lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
M lld/test/ELF/x86-64-gotpc-relax-too-far.s
A lld/test/wasm/relocatable-segment-flags.s
M lld/wasm/OutputSegment.cpp
M lld/wasm/Symbols.cpp
M lldb/bindings/interfaces.swig
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/CMakeLists.txt
M lldb/docs/index.md
A lldb/docs/resources/addingtargetsupport.md
M lldb/docs/resources/lldbgdbremote.md
M lldb/docs/resources/test.md
M lldb/docs/use/variable.md
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
A lldb/examples/python/templates/scripted_stackframe_recognizer.py
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
M lldb/include/lldb/API/SBProcessInfo.h
A lldb/include/lldb/API/SBProtocolServer.h
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/Core/Architecture.h
M lldb/include/lldb/Core/Diagnostics.h
M lldb/include/lldb/Core/ModuleSpec.h
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/Host/common/DomainSocket.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStackFrameRecognizerInterface.h
M lldb/include/lldb/Interpreter/OptionValue.h
M lldb/include/lldb/Interpreter/OptionValueArch.h
M lldb/include/lldb/Interpreter/OptionValueArray.h
M lldb/include/lldb/Interpreter/OptionValueBoolean.h
M lldb/include/lldb/Interpreter/OptionValueChar.h
M lldb/include/lldb/Interpreter/OptionValueDictionary.h
M lldb/include/lldb/Interpreter/OptionValueEnumeration.h
M lldb/include/lldb/Interpreter/OptionValueFileColonLine.h
M lldb/include/lldb/Interpreter/OptionValueFileSpec.h
M lldb/include/lldb/Interpreter/OptionValueFileSpecList.h
M lldb/include/lldb/Interpreter/OptionValueFormat.h
M lldb/include/lldb/Interpreter/OptionValueFormatEntity.h
M lldb/include/lldb/Interpreter/OptionValueLanguage.h
M lldb/include/lldb/Interpreter/OptionValuePathMappings.h
M lldb/include/lldb/Interpreter/OptionValueProperties.h
M lldb/include/lldb/Interpreter/OptionValueRegex.h
M lldb/include/lldb/Interpreter/OptionValueSInt64.h
M lldb/include/lldb/Interpreter/OptionValueString.h
M lldb/include/lldb/Interpreter/OptionValueUInt64.h
M lldb/include/lldb/Interpreter/OptionValueUUID.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Symbol/Function.h
M lldb/include/lldb/Target/OperatingSystem.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Utility/Environment.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectSynthetic.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
A lldb/packages/Python/lldbsuite/support/xcode.py
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
M lldb/source/API/CMakeLists.txt
Log Message:
-----------
Merge remote-tracking branch 'origin/main' into users/eas/vplan-based-stride-mv-tests
Commit: 5b3df5e62bd0876f98d768797d6fa1285b487c57
https://github.com/llvm/llvm-project/commit/5b3df5e62bd0876f98d768797d6fa1285b487c57
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
Log Message:
-----------
Add --filter-out-after "ir-bb<header>"
Compare: https://github.com/llvm/llvm-project/compare/662b2c6a8751...5b3df5e62bd0
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