[all-commits] [llvm/llvm-project] 126447: AMDGPU/GlobalISel: Fix Vcc reg bank apply method f...

[Petar Avramovic via All-commits]

  Branch: refs/heads/users/petar-avramovic/vcc-bool-in-reg-fix
  Home:   https://github.com/llvm/llvm-project
  Commit: 126447232820c207b88f4687fab34a68c0b03445
      https://github.com/llvm/llvm-project/commit/126447232820c207b88f4687fab34a68c0b03445
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2026-07-28 (Tue, 28 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
    M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix Vcc reg bank apply method for sgpr i1 input

Need to clean up high bits on sgpr bool use, simlar to Sgpr32AExtBoolInReg.
G_AMDGPU_COPY_VCC_SCC assumes clean (zero) high bits in sgpr i32 input.
This should be combined away in most cases, for example if input is result
of a compare. But should stay for example for truncated input from s_load.



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