[all-commits] [llvm/llvm-project] 988178: [AArch64] Add a OPERAND_IMM_UINT1 operand type (#2...
Alexis Engelke via All-commits
all-commits at lists.llvm.org
Mon Jul 27 23:36:30 PDT 2026
Branch: refs/heads/users/aengelke/spr/clangcodegen-use-ptrtoaddr-for-pointer-diff
Home: https://github.com/llvm/llvm-project
Commit: 9881786a98fc94caaec35df342ca31321c880584
https://github.com/llvm/llvm-project/commit/9881786a98fc94caaec35df342ca31321c880584
Author: David Green <david.green at arm.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[AArch64] Add a OPERAND_IMM_UINT1 operand type (#211986)
Commit: bcd5798f6d5866fac01b101e6e3666ff61659515
https://github.com/llvm/llvm-project/commit/bcd5798f6d5866fac01b101e6e3666ff61659515
Author: Hardik Kumar <hardikxk at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
Log Message:
-----------
[clang][NFC]Remove unused variable (#211983)
The patch resolves the following warning.
```bash
clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp:504:16: warning: variable āiā set but not used [-Wunused-but-set-variable=]
504 | unsigned i = 0;
| ^
```
A count variable was set and incremented inside of a for loop but never
actually used inside of the loop or anywhere else in its scope.
Commit: 02fa1be4f71225040054fd2dbd484e93fa3a55d4
https://github.com/llvm/llvm-project/commit/02fa1be4f71225040054fd2dbd484e93fa3a55d4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/CodeGen/BreakFalseDeps.h
M llvm/include/llvm/CodeGen/MachineCheckDebugify.h
M llvm/include/llvm/Transforms/Scalar/AlignmentFromAssumptions.h
M llvm/include/llvm/Transforms/Scalar/LogicalSROA.h
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/Lanai/Lanai.h
M llvm/lib/Target/MSP430/MSP430.h
M llvm/lib/Target/X86/X86.h
Log Message:
-----------
[Passes] Replace PassInfoMixin with {Optional,Required}PassInfoMixin
There were a couple passes that landed after the mass migration that
need to be updated to eventually make PassInfoMixin private. For backend
passes I looked at whether LegacyPM passes called skipFunction rather
than whether or not they should be enabled to try and preserve existing
behavior where possible.
We still need to wait a bit in order to avoid PassInfoMixin to a detail
namespace and fully remove isRequired from PassInfoMixin given there are
a lot of out-of-tree passes that have not yet been moved over. I'm
hoping to have patches out within a week.
Reviewers: arsenm, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/211874
Commit: 9184bb0b6564c3e7e41dc8bc1ab7281b5cf4da65
https://github.com/llvm/llvm-project/commit/9184bb0b6564c3e7e41dc8bc1ab7281b5cf4da65
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerImpl.h
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
[IR][NFC] Remove vtables from analysis passes (#211864)
Similar to #209414 but for AnalysisPassConcept. This avoids vtables for
every analysis pass.
Commit: 943d6498fabf0143d31a39a87a103146bfc9af69
https://github.com/llvm/llvm-project/commit/943d6498fabf0143d31a39a87a103146bfc9af69
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/SemaHIP/amdgpu-av-load-store.hip
M clang/test/SemaHIP/amdgpu-builtin-in-lambda-with-unsupported-attribute.hip
M clang/test/SemaHIP/amdgpu-builtin-in-lambda.hip
M clang/test/SemaHIP/amdgpu-ds-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-return-type-deduction.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-global-load-lds-template.hip
M clang/test/SemaHIP/builtins-amdgcn-buffer-format.hip
M clang/test/SemaHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
M clang/test/SemaHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
M clang/test/SemaHIP/hip-builtin-lvalue-to-rvalue.hip
M clang/test/SemaHIP/incorrect-atomic-scope.hip
M clang/test/SemaHIP/shared-variable-too-large.hip
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (8) (#211870)
Rewrite SemaHIP cc1 test RUN lines to the new subarch triple form,
dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 3055342ef9534f2ad4a047b222533dc676ce627b
https://github.com/llvm/llvm-project/commit/3055342ef9534f2ad4a047b222533dc676ce627b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/SemaOpenCL/amdgpu-ds-atomic-fadd-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cmp-deprecated.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-ci.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-flat-address-space.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx10-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx10.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-cooperative-atomics.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1251-wmma-w32-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx908-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx90a-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx942-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-lds-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-target-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-load-to-lds-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-add-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-add-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-format-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-load-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-store-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-ptr-buffer-load-lds-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-ptr-buffer-load-lds-target-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-s-buffer-load-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-s-wait-event.cl
M clang/test/SemaOpenCL/builtins-amdgcn-struct-buffer-format-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
M clang/test/SemaOpenCL/builtins-image-load-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-image-load-param-gfx942-err.cl
M clang/test/SemaOpenCL/builtins-image-store-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-image-store-param-gfx942-err.cl
M clang/test/SemaOpenCL/half-float16-vector-compatibility.cl
M clang/test/SemaOpenCL/incorrect-atomic-scope.cl
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (9) (#211954)
Commit: 43da8ef8d09261a89abd9dd36e9785993db2f991
https://github.com/llvm/llvm-project/commit/43da8ef8d09261a89abd9dd36e9785993db2f991
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/X86/permute-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffletoidentity-bitcast.ll
M llvm/test/Transforms/VectorCombine/pr197910.ll
Log Message:
-----------
Revert "[VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask)" (#211994)
Reverts llvm/llvm-project#211530 while I investigate some compilation timeouts
Commit: f539edf74b2c9c33b298b4d2c58201f91c22beb4
https://github.com/llvm/llvm-project/commit/f539edf74b2c9c33b298b4d2c58201f91c22beb4
Author: Xiaoyang Gong <xyg_aster at outlook.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
A llvm/test/tools/lto/legacy-thinlto-cache-key.ll
M llvm/tools/lto/lto.cpp
Log Message:
-----------
[LTO] Include debug options in legacy ThinLTO cache keys (#211474)
Legacy ThinLTO omits -mllvm options from cache keys, which can cause it
to reuse objects built with different code-generation settings.
Include these options in cache keys, matching modern ThinLTO behavior.
Commit: b9c05ca60ab11ecea4a58d864f62c65fce8cf912
https://github.com/llvm/llvm-project/commit/b9c05ca60ab11ecea4a58d864f62c65fce8cf912
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Fix MSan uninitialized value in createSCEV (#211996)
In #180244 (8e76c3f0d29a), handling of Instruction::Sub in
createSCEV declared PtrLHS and PtrRHS as uninitialized local variables.
When only one side matched m_PtrToInt, the other variable remained
uninitialized. Passing it by value to GetOp copied uninitialized shadow
bytes, causing MemorySanitizer to report use-of-uninitialized-value.
Initialize PtrLHS and PtrRHS to nullptr upon declaration.
Assisted-by: Gemini
Commit: 068ec1a282c1f4c22c5a1e71f7f6834846c5dca9
https://github.com/llvm/llvm-project/commit/068ec1a282c1f4c22c5a1e71f7f6834846c5dca9
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/builtin-clear-padding-codegen.c
M clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
Log Message:
-----------
[clang] fix __builtin_clear_padding not working with virtual base pointers on Windows (#211355)
Fixes https://github.com/llvm/llvm-project/issues/209787
It was an oversight that the builtin only takes care of the virtual
function table pointer but not the virtual base pointer. On Itanium
there is one pointer so it wasn't a problem but on windows msvc , this
is a problem. And the runtime test in libcxx CI was disabled in llvm 23
because we don't use trunk clang in our libcxx CI in general. and after
we flipped to llvm 24, the test started to fail on downstream (chromium)
where they use trunk clang with trunk libc++ on Windows.
We do have FileCheck test in clang test which covers this virtual case.
However, the target triple in the FileCheck under test were
`x86_64-linux-gnu` and `x86_64-windows-gnu` , which does not cover the
Windows msvc ABI. I updated the test to test `x86_64-pc-windows-msvc` in
this PR to cover that ABI.
Commit: 9b1218ce69e06a22699bc196888fc0396d989c81
https://github.com/llvm/llvm-project/commit/9b1218ce69e06a22699bc196888fc0396d989c81
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.h
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.h
Log Message:
-----------
[lldb] Move GetVTableInfo to C++ language runtime (#207010)
The original PR was reverted in
https://github.com/llvm/llvm-project/pull/206816 due to a test failure
on lldb-aarch64-ubuntu.
Since I couldn't reproduce the failure, I decided to split the PR into
smaller chunks.
This is part 1/4 (the final state is on
https://github.com/Nerixyz/llvm-project/tree/refactor/common-abi-runtime-take2-4-of-4).
It moves `GetVTableInfo` and `TypeHasVTable` from the Itanium ABI
runtime to the C++ language runtime. Eventually, this will be used to
select the ABI runtime that's able to handle a vtable. For now, we
always ask and use Itanium.
Commit: 2755ffcabdce740c65d773155c659f505ac6c74e
https://github.com/llvm/llvm-project/commit/2755ffcabdce740c65d773155c659f505ac6c74e
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/cast_ptr.ll
Log Message:
-----------
[InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (#211991)
Similar to the existing ptrtoint fold; this is valid, because icmp only
compares address bits. This addresses optimization regressions when
generating ptrtoaddr for pointer subtractions.
Commit: ec157b60d8345b67be16fde4b96f85c8512fbbb6
https://github.com/llvm/llvm-project/commit/ec157b60d8345b67be16fde4b96f85c8512fbbb6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
Log Message:
-----------
[VPlan] Widen masked unit-stride consecutive accesses in VPlan. (#211315)
Extend the widenConsecutiveMemOps sub-pass to widen masked/predicated
unit-stride consecutive accesses VPlan-natively.
This requires exposing an instruction-independent
isLegalMaskedLoadOrStore in VPSelectionContext, as well as adding it to
VPCostContext. Some of the members will probably be useful for other
changes as well.
PR: https://github.com/llvm/llvm-project/pull/211315
Commit: 291e0a4e522c31a693b1ee8749f2ae7ce2b9e329
https://github.com/llvm/llvm-project/commit/291e0a4e522c31a693b1ee8749f2ae7ce2b9e329
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/pr165301.ll
Log Message:
-----------
[SimplifyCFG] Fix DomTree update in `turnSwitchRangeIntoICmp` (#212006)
The original removal of `BB->Default` has been handled by
`createUnreachableSwitchDefault`.
When `OtherDest` is also unreachable, the edge should be removed.
This issue cannot be reproduced via
`-simplifycfg-require-and-preserve-domtree=1`. I just found it by
checking DT in `requestResimplify`.
Commit: 0bf3638ddfe6e8bb3b79ebe8c2a918384a5df612
https://github.com/llvm/llvm-project/commit/0bf3638ddfe6e8bb3b79ebe8c2a918384a5df612
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MachObjectWriter.cpp
R llvm/test/CodeGen/AArch64/macho-weak-alias.ll
Log Message:
-----------
Revert "[MachO] Preserve weak linkage for aliases" (#212009)
Commit: 7e08ed3dcc857ad631f5ad71e6158ae6232df691
https://github.com/llvm/llvm-project/commit/7e08ed3dcc857ad631f5ad71e6158ae6232df691
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64Subtarget.h
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-post-ra.mir
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-pre-ra.mir
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax.ll
M llvm/test/TableGen/aarch64-apple-tuning-features.td
Log Message:
-----------
[AArch64] Add FMIN/FMAX clustering (#210906)
This patch adds a subtarget feature that controls scheduling FMIN/FMAX
instructions back to back. Enabled on Apple CPU.
Commit: fedcc2ea69287f77fb7e2e639417e55eafa7d8f3
https://github.com/llvm/llvm-project/commit/fedcc2ea69287f77fb7e2e639417e55eafa7d8f3
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-comparison.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-comparison.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-conversion-cast.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-conversion-cast.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-division.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-division.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-scale.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-scale.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-subtraction.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-subtraction.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-unnecessary-conversion.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-unnecessary-conversion.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/faster-strsplit-delimiter.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/faster-strsplit-delimiter.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-startswith.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-startswith.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-str-contains.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-str-contains.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/time-subtraction.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/time-subtraction.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/upgrade-duration-conversions.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/upgrade-duration-conversions.rst
Log Message:
-----------
[clang-tidy][docs] Rename remaining abseil check docs to Markdown (#212003)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 0252b421b1725c627ca00f3cee7663cb9882291a
https://github.com/llvm/llvm-project/commit/0252b421b1725c627ca00f3cee7663cb9882291a
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-comparison.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-conversion-cast.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-division.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-scale.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-subtraction.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/duration-unnecessary-conversion.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/faster-strsplit-delimiter.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-startswith.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-str-contains.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/time-subtraction.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.md
M clang-tools-extra/docs/clang-tidy/checks/abseil/upgrade-duration-conversions.md
Log Message:
-----------
[clang-tidy][docs] Rewrite remaining abseil check docs to Markdown (#212004)
This commit rewrites the reST documentation to Markdown.
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
AI Usage: This was prepared with rst2myst and GPT5.6-assisted cleanup, I
manually verified that all the documentations render as expected.
Preview site for reviewing:
https://broken.life/llvm-staging/abseil-markdown-port/
Commit: a273377a509a95fd757f0e1c6a81358aceefa460
https://github.com/llvm/llvm-project/commit/a273377a509a95fd757f0e1c6a81358aceefa460
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/unittests/Support/GenericDomTreeTest.cpp
Log Message:
-----------
[DomTreeConstr][NFC] Resize NodeInfos once on construction (#211998)
This avoids frequent size checks when accessing node infos. All numbered
graphs support getMaxNumber().
Also move away from BB->getParent() as preliminary work for numbering
VPlan blocks -- there, getParent() has a different meaning.
Commit: ae5e065a1128ce8e206da6dc39ae54036f85e7d2
https://github.com/llvm/llvm-project/commit/ae5e065a1128ce8e206da6dc39ae54036f85e7d2
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
A compiler-rt/test/profile/AMDGPU/device-module-load-file.hip
Log Message:
-----------
[PGO][HIP] Support hipModuleLoad in offload PGO (#211875)
Offload PGO finds profile sections by inspecting the image passed to
hipModuleLoadData. hipModuleLoad only provides a file name, so its
device
profile counters were not collected.
After a successful hipModuleLoad, read the code object with the existing
profile file-buffer helper and register it through the same path used by
in-memory module loads.
Commit: 5f787ac145c119dd34a7f6b5b90d883d477052b2
https://github.com/llvm/llvm-project/commit/5f787ac145c119dd34a7f6b5b90d883d477052b2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-dedup.ll
Log Message:
-----------
[SimplfiyCFG] Deduplicate edges in `hoistSuccIdenticalTerminatorToSwitchOrIf` (#212017)
Fix domtree update by deduplicating edges to be inserted. Tested by the
function `@dedup`.
Commit: cb175d2d50800a04873a4375b10c385744912c53
https://github.com/llvm/llvm-project/commit/cb175d2d50800a04873a4375b10c385744912c53
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
Log Message:
-----------
[MC][NFC] Use EnumStrings for AtSpecifiers (#211827)
Store at specifiers without relocations using EnumStrings, reducing
.data.rel.ro by 4-5kiB. This also saves the more compactly at now 6B per
entry instead of 24B.
Commit: 05bcb50ec0e982a8e9988ccebbd3124c1ab3f8a0
https://github.com/llvm/llvm-project/commit/05bcb50ec0e982a8e9988ccebbd3124c1ab3f8a0
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
Log Message:
-----------
[VPlan][NFC] Number blocks (#212023)
Assign numbers to blocks for more efficient dominator tree construction.
The number is identical to the index in CreatedBlocks of the VPlan.
This removes the last user of unnumbered graphs for dominator trees.
Note that the compile-time change here is practically unmeasurable. The
motivation really is to remove the non-number code path from the
dominator tree.
Commit: 5bc304c65494702d9d4928ff6cb369e6e6496e53
https://github.com/llvm/llvm-project/commit/5bc304c65494702d9d4928ff6cb369e6e6496e53
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan][NFC] Extend comments of VPlan block numbers (#212025)
Address during-commit review feedback.
Commit: a434fe87cce77591e3322a674c9c97f9ce900291
https://github.com/llvm/llvm-project/commit/a434fe87cce77591e3322a674c9c97f9ce900291
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__functional/function_ref.h
A libcxx/include/__functional/function_ref_common.h
A libcxx/include/__functional/function_ref_impl.h
A libcxx/include/__type_traits/register_passable.h
M libcxx/include/functional
M libcxx/include/module.modulemap.in
M libcxx/include/version
M libcxx/modules/std/functional.inc
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assert.constant_arg_ptr.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assert.function_ptr.pass.cpp
A libcxx/test/libcxx/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_arg.mandates.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/functional.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/ctad.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/assign.delete.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper_ptr.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper_ref.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/copy.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/copy_assign.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/function_ptr.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/move.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/move_assign.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/ref.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.inv/invoke.pass.cpp
A libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/trivially_copyable.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement `std::function_ref` (#186692)
Papers:
- P0792R14: function_ref: a type-erased callable reference
- P3948R1 constant_wrapper is the only tool needed for passing constant
expressions via function arguments
- P3961R1 Less double indirection in function_ref (RU-220)
LWG issues:
- LWG4256: Incorrect constraints for function_ref constructors from
nontype_t
- LWG4425: CTAD function_ref of data member pointer should produce
noexcept signature
Fixes #189606
Fixes #105376
Fixes #189604
Fixes #171321
Fixes #171387
---------
Co-authored-by: Xiaoyang Liu <siujoeng.lau at gmail.com>
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 4c3a4f1180ac1026a1d5292ee4c681d9e9fc4e0c
https://github.com/llvm/llvm-project/commit/4c3a4f1180ac1026a1d5292ee4c681d9e9fc4e0c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Use DenseMap for constant lookup, bypassing FoldingSet (NFC) (#212022)
Looking up/contructing SCEVConstants is a very frequent operation, with
a notable amount of compile-time spent in SCEV.
Add a new DenseMap, mapping IR constants to SCEVConstant. Constants are
already uniqued, so the pointer based lookup is notably faster than the
folding-set lookup.
The cache is used as fast early-exit, and the SCEVConstants are still
added to the folding set for completeness.
Compile-time impact
* stage1-O3: -0.23%
* stage1-ReleaseThinLTO: -0.21%
* stage1-ReleaseLTO-g: -0.19%
* stage1-aarch64-O3: -0.20%
* stage2-O3: -0.10%
https://llvm-compile-time-tracker.com/compare.php?from=8a6a039eb31f33749cfe251a5985b335e9a09681&to=4146ff3be6be4c9d9bb10399a83658690222252e&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/212022
Commit: 026a34b3ff5e6a53313ae81853278d55926785d1
https://github.com/llvm/llvm-project/commit/026a34b3ff5e6a53313ae81853278d55926785d1
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (#212030)
When there is no edge to the original default destination BB, also
remove the edge in DT.
This issue cannot be reproduced via
-simplifycfg-require-and-preserve-domtree=1. I just found it by checking
DT in requestResimplify (will be added after fixing all existing
issues). The following test covers this case:
https://github.com/llvm/llvm-project/blob/5bc304c65494702d9d4928ff6cb369e6e6496e53/llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll#L172-L214
Commit: b071e92ca3d3db20711daffce6cf5b813cc5da49
https://github.com/llvm/llvm-project/commit/b071e92ca3d3db20711daffce6cf5b813cc5da49
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
Log Message:
-----------
[DomTree] Remove support for unnumbered graphs (#212026)
After VPlan, all our in-tree users of the dominator tree have numbered
nodes. Remove the support for unnumbered graphs.
Also slightly simplify the numbering for pre-dominator trees to avoid an
extra +1 on every node number.
Commit: 191c60fe7cee5587ad7f7a6fd7b5bbf7b0042bec
https://github.com/llvm/llvm-project/commit/191c60fe7cee5587ad7f7a6fd7b5bbf7b0042bec
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
Log Message:
-----------
[ThreadSafety] Fix C++20 build (#212042)
In C++20 (P1008R1 https://wg21.link/p1008r1), aggregates are prohibited
from having any user-declared constructors, even if they are = delete or
= default.
Commit: 197cf54ac854f475b7ab2e1d23f02dff16ded5ca
https://github.com/llvm/llvm-project/commit/197cf54ac854f475b7ab2e1d23f02dff16ded5ca
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-attrs.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark-errs.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx7-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx908-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cluster-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-tr.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-tensor-load-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9-4-generic-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-read-tr.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gws-insts.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-load-to-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma-gfx908-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-atomic-add.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-struct-buffer-load-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-struct-buffer-store-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-gfx1250-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx942.cl
M clang/test/CodeGenOpenCL/numbered-address-space.cl
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (10) (#211955)
Rewrite the first half of CodeGenOpenCL cc1 test RUN lines to the new
subarch triple form, dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: d1af60ff088ba003ec0830cf8f4fd579646d736e
https://github.com/llvm/llvm-project/commit/d1af60ff088ba003ec0830cf8f4fd579646d736e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests.ll
M llvm/test/CodeGen/X86/vselect-avx.ll
M llvm/utils/TableGen/DAGISelMatcher.cpp
M llvm/utils/TableGen/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
Log Message:
-----------
DAG: Stop legalizing poison to undef (#211890)
Previously all targets would expand poison to undef, which was a
shortcut taken when poison was introduced.
Introduces a new dedicated poison matcher in tablegen; this avoids
multiple opcode changes, and avoids some problematic contexts that
couldn't deal with PatFrags.
This probably should be legal by default for all legal types.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 890d1331a35c6961191db07447df2623619afb7e
https://github.com/llvm/llvm-project/commit/890d1331a35c6961191db07447df2623619afb7e
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/lib/CMakeLists.txt
Log Message:
-----------
[Clang] Don't build static analyzer if disabled (#212024)
Even if the static analyzer is disabled, it still gets built into the
dylib. Unit tests and tools already get disables, so also stop building
the library. This reduces the time needed to build a dylib clang by
8-9%.
Commit: 6b0a46958c56d91e3b2fd5ffecfe163dde1fac3a
https://github.com/llvm/llvm-project/commit/6b0a46958c56d91e3b2fd5ffecfe163dde1fac3a
Author: Piotr Kubaj <pkubaj at FreeBSD.org>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[libunwind][PPC64] Fix unw_getcontext corrupting callee-saved VSX registers on LE (#198371)
This is the first of two independent fixes for libunwind on ppc64le
(ELFv2 ABI, little-endian), where two separate bugs together cause
SIGSEGV during backtracing. This commit addresses the VSX register
corruption; the TOC-restore fault is handled in a follow-up. Both
were discovered while debugging lang/rust build failures with
RUST_BACKTRACE=1 on FreeBSD/powerpc64le (IBM POWER9).
On ppc64le, `unw_getcontext` saves each VS register with an in-place
`xxswapd n, n` followed by `stxvd2x`. The swap is needed because
`stxvd2x` stores doublewords in the wrong order on LE. However, the
macro never applies a second `xxswapd` to restore the register after
the store, so all 64 VS registers are permanently corrupted on return
from `unw_getcontext`.
This affects every callee-saved VSX register: f14-f31 (VSR14-VSR31)
and VR20-VR31 (VSR52-VSR63). After `_Unwind_Backtrace` returns, any
code that uses these registers sees wrong values. In practice this
manifests as SIGSEGV inside hashbrown's `reserve_rehash`: VR20-VR31
are corrupted before a SIMD comparison loop runs, producing an
out-of-bounds access.
Fix: add a second `xxswapd n, n` after the `stxvd2x` store. Since
`xxswapd` is its own inverse, the pair is a no-op on the architectural
register while still writing the correctly byte-swapped value to memory.
Commit: 56f4b9c4e875477c0fbc73160f96524d4915040c
https://github.com/llvm/llvm-project/commit/56f4b9c4e875477c0fbc73160f96524d4915040c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-features-default-delta.cl
M clang/test/CodeGenOpenCL/amdgpu-module-flag-xnack-sramecc.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M clang/test/CodeGenOpenCL/atomics-cas-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/atomics-unsafe-hw-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-ci.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-flat-address-space.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx90a-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-5-generic-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-monitor.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1251-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w32-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w64-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-interp.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-atomic-max.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-store-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raytracing.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-s-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx1030.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx8.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/check-atomic-alignment.cl
Log Message:
-----------
clang/AMDGPU: Migrate cc1 tests to subarch triples (11) (#211956)
Rewrite the second half of CodeGenOpenCL cc1 test RUN lines to the new
subarch triple form, dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 353729bbe4c53086c9acf3a9d1a4a88a61eec997
https://github.com/llvm/llvm-project/commit/353729bbe4c53086c9acf3a9d1a4a88a61eec997
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU] Avoid quadratic erase in SIInstrWorklist (#211801)
Commit: 96a85478fbb2dd0b4fd5d11aeb9eae396499b8b5
https://github.com/llvm/llvm-project/commit/96a85478fbb2dd0b4fd5d11aeb9eae396499b8b5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Add VPRegionBlock::getEntryBranchOnMask helper (NFC) (#212060)
Add an accessor returning the VPBranchOnMaskRecipe guarding a replicate
region, i.e. the sole recipe of the region's entry block.
Commit: f704f396072bd0fffc13ce2aae5fb58dfe26bce6
https://github.com/llvm/llvm-project/commit/f704f396072bd0fffc13ce2aae5fb58dfe26bce6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/OpenMP/amdgcn_debug_nowait.c
M clang/test/OpenMP/amdgcn_device_function_call.cpp
M clang/test/OpenMP/amdgcn_ldbl_check.cpp
M clang/test/OpenMP/amdgcn_save_temps.c
M clang/test/OpenMP/amdgcn_sret_ctor.cpp
M clang/test/OpenMP/amdgcn_target_codegen.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/amdgcn_target_init_temp_alloca.cpp
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/amdgcn_weak_alias.cpp
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
M clang/test/OpenMP/amdgpu_exceptions.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/amdgpu_throw.cpp
M clang/test/OpenMP/amdgpu_throw_trap.cpp
M clang/test/OpenMP/amdgpu_try_catch.cpp
M clang/test/OpenMP/copy-gaps-1.cpp
M clang/test/OpenMP/copy-gaps-2.cpp
M clang/test/OpenMP/copy-gaps-3.cpp
M clang/test/OpenMP/copy-gaps-4.cpp
M clang/test/OpenMP/copy-gaps-5.cpp
M clang/test/OpenMP/copy-gaps-6.cpp
M clang/test/OpenMP/debug-info-kmpc.cpp
M clang/test/OpenMP/declare_target_local_codegen.cpp
M clang/test/OpenMP/declare_target_local_map_messages.cpp
M clang/test/OpenMP/declare_target_local_usm_codegen.cpp
M clang/test/OpenMP/declare_target_nohost_variant_messages.cpp
M clang/test/OpenMP/declare_variant_construct_codegen_1.c
M clang/test/OpenMP/force-usm.c
M clang/test/OpenMP/interop_codegen.cpp
M clang/test/OpenMP/metadirective_ast_print.c
M clang/test/OpenMP/metadirective_device_arch_codegen.cpp
M clang/test/OpenMP/metadirective_device_isa_codegen_amdgcn.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/strided_update_variable_stride_codegen.c
M clang/test/OpenMP/target_data_if_logical_codegen.cpp
M clang/test/OpenMP/target_exceptions_messages.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
M clang/test/OpenMP/target_parallel_no_exceptions.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_messages.cpp
M clang/test/OpenMP/target_team_variable_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/OpenMP/target_update_count_expression_codegen.c
M clang/test/OpenMP/target_visibility.cpp
M clang/test/OpenMP/thread_limit_gpu.c
M clang/test/SemaOpenMP/amdgpu-barrier.cpp
M clang/test/SemaOpenMP/amdgpu-buffer-rsrc.cpp
M clang/test/SemaOpenMP/amdgpu-image-rsrc.cpp
Log Message:
-----------
clang/AMDGPU: Migrate OpenMP cc1 tests to amdgpu triples (12) (#212051)
Migrate the OpenMP offload cc1 tests to the new amdgpu triple scheme:
* -fopenmp-targets=amdgcn-amd-amdhsa ->
-fopenmp-targets=amdgpu-amd-amdhsa
(the offload toolchain triple, the generic amdgpu arch).
* The device -triple amdgcn-amd-amdhsa -> amdgpu-amd-amdhsa, or to the
specific subarch triple (dropping -target-cpu) where a -target-cpu was
present.
Autogenerated CHECK lines are regenerated, and the few -Wopenmp-target-
exception diagnostics that embed the triple string are updated. Tests
that
intentionally assert the "target-cpu" function attribute are left
unchanged.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 2f3f97fb72606f51ece7d64d6a7a73c9eaad8978
https://github.com/llvm/llvm-project/commit/2f3f97fb72606f51ece7d64d6a7a73c9eaad8978
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M clang/test/CodeGenCUDA/anon-ns.cu
M clang/test/CodeGenCUDA/builtin-mangled-name.cu
M clang/test/CodeGenCUDA/cluster_dims.cu
M clang/test/CodeGenCUDA/device-stub.cu
M clang/test/CodeGenCUDA/kernel-stub-name.cu
M clang/test/CodeGenCUDA/struct-mangling-number.cu
M clang/test/CodeGenCUDA/types.cu
M clang/test/CodeGenCUDA/unnamed-types.cu
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/Headers/hip-header.hip
M clang/test/Sema/builtin-amdgcn-atomic-inc-dec-failure.cpp
M clang/test/SemaCUDA/builtin-mangled-name.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/float16.cu
M clang/test/SemaCUDA/overloaded-builtin.cu
M clang/test/SemaHIP/amdgpu-av-load-store.hip
M clang/test/SemaHIP/amdgpu-barrier.hip
M clang/test/SemaHIP/amdgpu-buffer-rsrc.hip
M clang/test/SemaHIP/amdgpu-ds-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-cant-jump.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-return-type-deduction.hip
M clang/test/SemaHIP/amdgpu-feature-predicate.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-is-invocable.hip
M clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
Log Message:
-----------
clang/AMDGPU: Migrate -aux-triple amdgcn in cc1 tests to amdgpu (13) (#212052)
Update to the new architecture name.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 0a7d5c755e6280ca94f09b3fe2301133c0a9f9a2
https://github.com/llvm/llvm-project/commit/0a7d5c755e6280ca94f09b3fe2301133c0a9f9a2
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/test/CodeGen/Hexagon/swp-epilog-phi12.mir
Log Message:
-----------
[Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (#212062)
Commit: a8a36f1b759e69737bd132f46bba1d0ed5dd3d6c
https://github.com/llvm/llvm-project/commit/a8a36f1b759e69737bd132f46bba1d0ed5dd3d6c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[LV] Extract fixupHeaderPhiBackedges from VPlan::execute (NFC) (#212063)
Hoist the header-phi backedge fixup loop at the end of VPlan::execute
into a helper VPTransformState::fixupHeaderPhiBackedges.
Commit: 40f8720c5db91fdf753133af05ba14ce7c3e44d7
https://github.com/llvm/llvm-project/commit/40f8720c5db91fdf753133af05ba14ce7c3e44d7
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
Log Message:
-----------
[ELF] Replace getAArch64ThunkDestVA with Thunk::getDestVA. NFC (#212071)
Suggested by
https://github.com/llvm/llvm-project/pull/209962/changes#r3595552131
Commit: 7af5c42beb1d76a5335ef5095c6bd58331a882b8
https://github.com/llvm/llvm-project/commit/7af5c42beb1d76a5335ef5095c6bd58331a882b8
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix mul/intdiv folds crashing on dynamic-shaped results (#212073)
`tosa.mul` and `tosa.intdiv` fold constant splat operands by building a
`DenseElementsAttr` of the result type, which asserts when that type has
a dynamic shape. When the operands are constants but the result type is
dynamic, folding aborted. Guard `mulBinaryFolder` and the `IntDivOp`
splat path on a static result shape, matching the other fold paths in
these ops.
Signed-off-by: VĆctor PĆ©rez Carrasco <victor.pc.upm at gmail.com>
Commit: dc26bf5303b3ffe1e25a147a830f29befa533ba2
https://github.com/llvm/llvm-project/commit/dc26bf5303b3ffe1e25a147a830f29befa533ba2
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/test/ELF/x86-64-gotpc-relax-too-far.s
Log Message:
-----------
[ELF] Retain .got for revertible no-PIC GOTPCRELX optimization (#212077)
Commit 9d6ec280fc537b55ef8641ea85d3522426bc5766 (2023) sets
GotSection::hasGotOffRel when adjustGotPcExpr returns R_RELAX_GOT_PC,
keeping .got alive for an optimization that X86_64::relaxOnce may
revert.
R_RELAX_GOT_PC_NOPIC (e.g. `addq`) in -no-pie mode has the same issue.
Commit: abd6e745e22e83af7986cdca4c1ba2d798e00156
https://github.com/llvm/llvm-project/commit/abd6e745e22e83af7986cdca4c1ba2d798e00156
Author: Byeongjee Kang <byeongjee.kang at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSA.h
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAOps.td
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Dialect/WasmSSA/IR/WasmSSAOps.cpp
A mlir/test/Conversion/RaiseWasm/wasm-global-set-to-memref.mlir
A mlir/test/Conversion/RaiseWasm/wasm-select-to-arith-select.mlir
M mlir/test/Dialect/WasmSSA/custom_parser/global.mlir
A mlir/test/Dialect/WasmSSA/custom_parser/select.mlir
M mlir/test/Dialect/WasmSSA/global-invalid.mlir
Log Message:
-----------
[MLIR][WasmSSA] Add global_set and select ops (#196613)
Adds two missing ops to the WasmSSA dialect.
- `wasmssa.global_set`
- `wasmssa.select`
---------
Co-authored-by: Ferdinand Lemaire <flscminecraft at gmail.com>
Commit: 8def9629ca230f7005102d9905502c5b6a486897
https://github.com/llvm/llvm-project/commit/8def9629ca230f7005102d9905502c5b6a486897
Author: Ferdinand Lemaire <flscminecraft at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[Github] Add myself and lforg37 as mlir wasmssa codeowners (#212079)
Adding @flemairen6 and @lforg37 as codeowners of WasmSSA
Co-authored-by: Ferdinand Lemaire <flemairen6 at gmail.com>
Commit: ae0f00de4ce82fb933c326980464c8cefb4e0029
https://github.com/llvm/llvm-project/commit/ae0f00de4ce82fb933c326980464c8cefb4e0029
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Fix variable name typo (#211729)
Commit: bab258ae1eaa56cbdc86b19f8063be612e1e4795
https://github.com/llvm/llvm-project/commit/bab258ae1eaa56cbdc86b19f8063be612e1e4795
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M .github/workflows/release-tasks.yml
Log Message:
-----------
workflows/relase-tasks: Fix variable name typo (#211732)
Commit: 2ad69983d8b72d8a665a2552aac15517fe0cb351
https://github.com/llvm/llvm-project/commit/2ad69983d8b72d8a665a2552aac15517fe0cb351
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-25 (Sat, 25 Jul 2026)
Changed paths:
M .github/workflows/libclang-abi-tests.yml
Log Message:
-----------
workflows/libclang-abi-tests: Fix missing environment variable (#211959)
This was accidentally removed in
f6af6cedfd2fa731bf323608116d373379838b9a.
Commit: 6cdc7bd8c97b633f7095a5df32fb8003ee1b49b9
https://github.com/llvm/llvm-project/commit/6cdc7bd8c97b633f7095a5df32fb8003ee1b49b9
Author: Andrew Savonichev <andrew.savonichev at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
A llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-cas.s
Log Message:
-----------
[AArch64] Add CAS instructions to NeoverseN2 schedule model (#211195)
CAS instructions (B, H, W, X variants) are not described in the ARM
Neoverse N2 Software Optimization Guide. There used to be no schedule
model for them, so `llvm-mca` was unable to analyze code containing
these instructions:
llvm-mca -mtriple=aarch64 -mcpu=cortex-a78 -mattr=+lse casb.s
error: found an unsupported instruction in the input assembly
sequence, use -skip-unsupported-instructions=lack-sched to ignore
these on the input.
note: instruction: casb w0, w1, [sp]
The patch adds a basic schedule model of 14 cycles (as measured on
Cortex-A78 with llvm-exegesis) and L/S utilized pipelines (this is a
guess, the reality is likely more complicated).
Commit: 3fd07e32350c4f15a9377466ab4cffb042a1ecb7
https://github.com/llvm/llvm-project/commit/3fd07e32350c4f15a9377466ab4cffb042a1ecb7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Only override constant-context state if we have an EvalEmitter (#211475)
This does not make sense when emitting bytecode, as the bytecode would
just contain a `PushCC`/`PopCC` pair with nothing in between.
Commit: 4eeff3e309da3a5d827aadc6fb6915b968b23ad5
https://github.com/llvm/llvm-project/commit/4eeff3e309da3a5d827aadc6fb6915b968b23ad5
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxx/include/cmath
M libcxx/include/math.h
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
A libcxx/test/std/numerics/c.math/fpclassify.pass.cpp
Log Message:
-----------
[libc++][math] Add `constexpr` to `std::fpclassify` (#210993)
Adds `constexpr` to `std::fpclassify` as required by
[P0533R9](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf).
Towards https://github.com/llvm/llvm-project/issues/105174. Follows-up
8889a3d3b5154d7d5bd4e58ab10d3df503544742.
Commit: 545f9fab9ed84d55a97b3f08d306c0da70b625a6
https://github.com/llvm/llvm-project/commit/545f9fab9ed84d55a97b3f08d306c0da70b625a6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/AST/ByteCode/constexpr-steps.cpp
Log Message:
-----------
[clang][bytecode] Don't check global variable init size (#212092)
The current interpreter doesn't do this either. If we do, the clang
build fails because AMDGPUGenGlobalISel.inc: contains a global constexpr
array called MatchTable0 with 1'926'005 elements.
Commit: 5d582e4003b1cab59900d16fa3db9c3a9d16b462
https://github.com/llvm/llvm-project/commit/5d582e4003b1cab59900d16fa3db9c3a9d16b462
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
Log Message:
-----------
[LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (#212000)
analyze() numbers the dominator tree, scans it in reverse preorder for
header candidates, floods backward through the CFG from each header's
latches, then walks the CFG again to order the blocks.
Do all of it in one forward DFS, with the algorithm of Wei et al.,
"A New Algorithm for Identifying Loops in Decompilation", which
GenericCycleInfo already implements.
On an irreducible CFG that algorithm may return an irreducible superset
of the natural loop subset `discoverAndMapSubloop` would return.
(Depending on the successor visiting order, the algorithm may report a
reducible loop nested in an irreducible loop, where the reducible one
exactly matches `discoverAndMapSubloop`.)
To satisfy verifyLoop and LoopSimplify, reduce each such ireducible loop
to the natural loop of its header's backedges instead: the latches the
header dominates, and the blocks reaching them without passing the
header.
A function whose loops are all reducible needs no dominance query.
1000x require<loops> on sqlite3.bc: instructions -24%, cycles -14%.
Aided by Claude Opus 5
Commit: 5bafce4a37c7702f2ecb857eb18df6c211fc19bf
https://github.com/llvm/llvm-project/commit/5bafce4a37c7702f2ecb857eb18df6c211fc19bf
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes abd6e74 (#212081)
This fixes abd6e745e22e83af7986cdca4c1ba2d798e00156 (#196613).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=abd6e745e22e83af7986cdca4c1ba2d798e00156
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 653e7b05bbd7fbcaab3721ebfb2b3c2304f15ee4
https://github.com/llvm/llvm-project/commit/653e7b05bbd7fbcaab3721ebfb2b3c2304f15ee4
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_setschedparam_test.cpp
Log Message:
-----------
[libc][test][NFC] Fix pthread_setschedparam_test flakiness (#212067)
Synchronised child thread execution in pthread_setschedparam_test using
a mutex lock. This prevents race conditions where the child thread
exited before scheduling parameter assertions ran on multi-core
platforms such as aarch64.
Added missing pthread target dependencies to CMakeLists.txt.
Assisted-by: Automated tooling, human reviewed.
Commit: 75dff4f8527fe9a52d5f60b4c089162845f72080
https://github.com/llvm/llvm-project/commit/75dff4f8527fe9a52d5f60b4c089162845f72080
Author: David Green <david.green at arm.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Replace some used of SDValue.getNode()-> with direct accesses. NFC (#212099)
Commit: 2b660e0f1b6dce0484a2f83c02395a919a063ab2
https://github.com/llvm/llvm-project/commit/2b660e0f1b6dce0484a2f83c02395a919a063ab2
Author: Martin Storsjƶ <martin at martin.st>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/test/AST/ByteCode/virtual-bases.cpp
Log Message:
-----------
[clang] [test] Fix a new test on mingw (#212064)
This fixes running a new test that was added in
4b66bacd1fdf02803509b744034f3ab09945157c, in mingw environments.
The quirks that warranted adding the `!defined(_WIN32)` condition in the
test aren't actually specific to Windows in general, but specific to
MSVC environments - mingw environments behave just like other platforms.
Ideally we'd use `!defined(_MSC_VER)`, however in -cc1 mode, Clang
doesn't automatically define `_MSC_VER`; defining it requires setting a
command line option that the driver normally passes in MSVC mode.
Therefore, qualify the condition as `!defined(_MSC_VER) ||
defined(__MINGW32__)`.
Commit: 40daec88f9e2719c5c2caa05d6003c9effde18d3
https://github.com/llvm/llvm-project/commit/40daec88f9e2719c5c2caa05d6003c9effde18d3
Author: Martin Storsjƶ <martin at martin.st>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[docs] Remove release notes for backported changes (#212069)
Commit 68f703f3e58a52c41b39dfc654a675560b6c5614 added these release
notes, but this commit was backported to the 23.x release branch in
47e2df730a099583f16fc6fe64f0d2ffc5b7a16a (included in the 23.1.0 RC 1
tag).
Therefore, remove these release notes from the main branch (where they
would have been included in the 24.x release notes).
Commit: f5652b9800c997f3c76f84ea81de1175561ed59c
https://github.com/llvm/llvm-project/commit/f5652b9800c997f3c76f84ea81de1175561ed59c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Store type of expression inline, compute up front (NFC). (#211891)
Add SCEV::Type to store the expressions immutable type. This slightly
increases object size for most sub-types, but avoids more expensive
recomputing of the type repeatedly.
Improves compile time slightly overall, more in SCEV-heavy workloads.
* stage1-O3: -0.08%
* stage1-ReleaseThinLTO: -0.07%
* stage1-ReleaseLTO-g: -0.07%
* stage1-aarch64-O3: -0.07%
* stage2-O3: -0.08%
https://llvm-compile-time-tracker.com/compare.php?from=f9b12955f891bb086d12309d89656821d776e858&to=0e8df1e93422960640d0efd460212a463700a64a&stat=instructions:u
It looks like there's no notable increase in max-rss
https://llvm-compile-time-tracker.com/compare.php?from=f9b12955f891bb086d12309d89656821d776e858&to=0e8df1e93422960640d0efd460212a463700a64a&stat=max-rss
PR: https://github.com/llvm/llvm-project/pull/211891
Commit: f3b31871e9b8e0fe07c92c91854861365ea189a4
https://github.com/llvm/llvm-project/commit/f3b31871e9b8e0fe07c92c91854861365ea189a4
Author: BalƔzs Benics <benicsbalazs at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/lib/Analysis/CFG.cpp
A clang/test/Analysis/lambda-capture-init-order.cpp
Log Message:
-----------
[clang][CFG] Fix lambda capture evaluation order (#211877)
Previously, the captures were emitted in their spelling order - but in
the CFG that gets translared in a reversed order.
Because of this, we need to emit them in reversed order to get them
appear in their natural order.
Fixes rdar://183140177
Commit: c4b89858f8f2d52d18007bc66a3a827c6bfa8151
https://github.com/llvm/llvm-project/commit/c4b89858f8f2d52d18007bc66a3a827c6bfa8151
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/redundant-expression.cpp
Log Message:
-----------
[clang-tidy] Fix nested macro false positives in misc-redundant-expression (#209385)
Apply the existing macro-origin filtering when comparing flattened
operands in nested expressions.
Closes https://github.com/llvm/llvm-project/issues/209373
Commit: 0acd2c54da07dceebb78e94d256ed211a82031b9
https://github.com/llvm/llvm-project/commit/0acd2c54da07dceebb78e94d256ed211a82031b9
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/rename_check.py
Log Message:
-----------
[clang-tidy] Support Markdown documentation in rename_check.py (#210577)
Part of https://github.com/llvm/llvm-project/issues/201242
Commit: 3678fa2b1ef60938ef61228145bb9c138367cf41
https://github.com/llvm/llvm-project/commit/3678fa2b1ef60938ef61228145bb9c138367cf41
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (#212035)
Previously we relied on `createUnreachableSwitchDefault` to remove
incoming edges in phi nodes and update DT. However, it also creates a
new unreachable BB and updates the default destination of the switch
instruction, which is about to be replaced by a branch instruction. This
patch inlines the function and removes logic about the new BB, to make
sure the DT is updated correctly.
This issue cannot be reproduced via
-simplifycfg-require-and-preserve-domtree=1. I just found it by checking
DT in requestResimplify (will be added after fixing all existing
issues). The following test covers this case:
https://github.com/llvm/llvm-project/blob/5bc304c65494702d9d4928ff6cb369e6e6496e53/llvm/test/Transforms/SimplifyCFG/switch-range-to-icmp.ll#L38-L73
Commit: 28c8e8931546057c01c517086b99a17230cd4d70
https://github.com/llvm/llvm-project/commit/28c8e8931546057c01c517086b99a17230cd4d70
Author: BalƔzs Benics <benicsbalazs at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang-tools-extra/include-cleaner/unittests/TypesTest.cpp
M llvm/include/llvm/ADT/IntrusiveRefCntPtr.h
M llvm/include/llvm/Support/Compiler.h
M llvm/unittests/ADT/IntrusiveRefCntPtrTest.cpp
M llvm/unittests/Support/VirtualOutputBackendTest.cpp
Log Message:
-----------
[llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (#211795)
IntrusiveRefCntPtr has non-trivial ctor/dtor, thus unused variables
wouldn't trigger a warning by default. However, they should.
https://clang.llvm.org/docs/AttributeReference.html#warn-unused
Let's mark the class with this attribute get warned about them.
This would have helped catching #211518 and #211517.
Supersedes #211647.
Some tests had to be uplifted because some bots used `-Werror` for those tests.
Commit: c94c90b2efaa46520024b2bc8aa2caa30114cd55
https://github.com/llvm/llvm-project/commit/c94c90b2efaa46520024b2bc8aa2caa30114cd55
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
A clang/test/Analysis/z3/z3-atomic.c
Log Message:
-----------
[analyzer] Fix _Atomic crashes for Z3 symbolic execution (#212050)
This PR fixes _Atomic crashes for Z3 symbolic execution by passing the
types through getAtomicUnqualifiedType and getCanonicalType and skip
casting in fromCast if `FromTy == ToTy && FromBitWidth == ToBitWidth`.
Assisted-by: Codex
Commit: 9d601915fb9d3f4e6f7ee6e369ddff7fc20ad08d
https://github.com/llvm/llvm-project/commit/9d601915fb9d3f4e6f7ee6e369ddff7fc20ad08d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxxabi/test/cxa_vec_new_overflow_PR41395.pass.cpp
M libcxxabi/test/dynamic_cast.pass.cpp
M libcxxabi/test/test_aux_runtime_op_array_new.pass.cpp
M libcxxabi/test/uncaught_exceptions.pass.cpp
Log Message:
-----------
[libc++abi][NFC] Remove some XFAILs which never trigger (#211241)
The oldest library we support is from LLVM 12, so we can remove any
XFAILs for libraries built before that.
Commit: a81db64570f94c2ca8ac0f598c0b5bba1a7ae59e
https://github.com/llvm/llvm-project/commit/a81db64570f94c2ca8ac0f598c0b5bba1a7ae59e
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/string.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/src/__support/CPP/string_test.cpp
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][cpp::string] Allocate fewer temp strings in operator= and += (#210895)
This PR generally updates `cpp::string` to avoid incidental allocations.
Specifically, it:
- Updates `opreator=(string_view)` to avoid allocating a temporary
string:
https://github.com/llvm/llvm-project/blob/67ebc4b221c3e94028b33004cd5cd08deee95048/libc/src/__support/CPP/string.h#L106-L108
- Changes `operator+=(const string&)` to accept a `string_view` so that
strings may be appended without allocation.
- Makes the `string(string_view)` constructor explicit. Before, there
were non-obvious allocations because of the implicit conversion.
As a side effect, this PR has to more carefully handle self-assignment
and self-append. This PR updates append and assignment to avoid calling
`realloc` during append / assignment, as this may invalidate input
pointers held by `string_view` if they point to data held by the string.
This also fixes self-assignment, which previously didn't work, eg
`cpp::string s = "abc"; s = s;` would zero out `s`.
Commit: 150f33ce28956d80fc7617e477bb805ab062a28a
https://github.com/llvm/llvm-project/commit/150f33ce28956d80fc7617e477bb805ab062a28a
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/mismatch.h
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/mismatch/pstl.mismatch.pass.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/mismatch/pstl.mismatch_pred.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of a parallel std::mismatch() based on __pstl::__parallel_find() (#209291)
This PR adds a parallel version of `std::mismatch` as one of the backend
operations.
It also provides an implementation based on `__pstl::__parallel_find()`
which does the heavy lifting.
`libdispatch` and `std_thread` backends expose this implementation under
their backend tags, while the `serial` backend redirects the calls to
the serial `std::mismatch`.
4 flavours of the function are exposed: 3-legged, 3-legged with
predicate, 4-legged, 4-legged with predicate.
3-legged flavours are implemented in the `default` (`composition`)
backend by redirecting the call to the 4-legged flavours.
Included tests check that:
- Semantics of the iterator-only functions is correct.
- Semantics of the predicated functions is correct.
- Custom types are supported by the implementation.
- The functions correctly SFINAE out when the first argument is not an
execution policy.
- The `nodiscard` policy is followed.
- The `noexcept` policy is followed.
- `static_assert` verifies iterators' categories.
Part of #99938.
Commit: 5104dad7a15a6369aeb15658718144881c33642f
https://github.com/llvm/llvm-project/commit/5104dad7a15a6369aeb15658718144881c33642f
Author: BalƔzs Benics <benicsbalazs at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M clang/lib/Analysis/CFG.cpp
A clang/test/Analysis/cfg-compound-assignment-eval-order.cpp
M clang/test/Analysis/loopexit-cfg-output.cpp
M clang/test/Sema/warn-unreachable.c
Log Message:
-----------
[clang][CFG] Fix compound assignment evaluation order (#212115)
CompoundAssignOperator (e.g. `+=`, `-=`, `<<=`) is a distinct StmtClass
deriving from BinaryOperator, but it was not handled in the CFGBuilder
dispatch switches. As a result it fell through to the generic default
path (VisitChildren over reverse_children), which emits the LHS before
the RHS in the CFG.
Per C++17 [expr.ass]/1, all assignment operators - simple and compound -
sequence the right operand before the left operand. Route
CompoundAssignOperator through VisitBinaryOperator (and
VisitBinaryOperatorForTemporaries), whose existing isAssignmentOp()
branch already emits the RHS before the LHS, matching simple assignment.
This mirrors the class of evaluation-order defect fixed for lambda
captures in f3b31871e9b8.
rdar://183253943
Assisted-By: claude
Commit: 61517a81407d2a7353815dae7625caa1749b99ca
https://github.com/llvm/llvm-project/commit/61517a81407d2a7353815dae7625caa1749b99ca
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxx/include/fstream
Log Message:
-----------
[libc++][NFC] Inline fstream functions into the class body (#211738)
The `fstream` member functions are all really short, so inlining them
removes quite a bit of boiler plate code.
Commit: 286fcce7e75a4566a813c25f4ec5824533226265
https://github.com/llvm/llvm-project/commit/286fcce7e75a4566a813c25f4ec5824533226265
Author: Emmett <emmettzhang2020 at outlook.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__chrono/hh_mm_ss.h
M libcxx/test/std/time/time.hms/time.hms.members/hours.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/is_negative.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/minutes.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/seconds.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/subseconds.pass.cpp
M libcxx/test/std/time/time.hms/time.hms.members/to_duration.pass.cpp
Log Message:
-----------
[libc++][chrono] Implement LWG 4274: Allow chrono::hh_mm_ss to be constructed from unsigned durations (#209686)
**_Implementation details_**:
- Use `is_unsigned_v` instead of `numeric_limits<Rep>::is_signed`, which
is used by `chrono::abs`. `numeric_limits<Rep>::is_signed` may return
false when a custom `Rep` does not specialize `numeric_limits`. Relying
on it to detect the unsigned case could therefore be unreliable for such
a type. `is_unsigned_v` instead gives a compile-time path for built-in
unsigned types, while the sign check keeps signed types correct.
- The constructor calls `__abs_d` four times because each member is
initialized separately. This should not affect runtime performance
because the compiler should inline `__abs_d` and eliminate the repeated
calculations. We could use another helper function or helper class to
explicitly compute the absolute duration only once. However, this would
add extra glue code, and the added complexity is not worthwhile I think.
---------
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: bdd8c64a2ae89cc9d860bd3b37b1bb782ccde077
https://github.com/llvm/llvm-project/commit/bdd8c64a2ae89cc9d860bd3b37b1bb782ccde077
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv-unsupported.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fold trivial integer division and remainder (#212074)
Add value-preserving folds mirroring LLVM's InstructionSimplify for the
integer division and remainder ops:
```
divui/divsi/ceildivui/ceildivsi/floordivsi(0, x) -> 0
divui/divsi/ceildivui/ceildivsi/floordivsi(x, x) -> 1
remui/remsi(0, x) -> 0
remui/remsi(x, x) -> 0
```
The self and zero-dividend cases are valid refinements because division
or remainder by zero is undefined behaviour; no overflow flags are
required. The folds return a scalar or splat constant and bail out on
shaped types with a dynamic shape.
Folding `x / 0` and `x % 0` to poison is left as a TODO: it would make
the arith dialect depend on the ub dialect to materialize `ub.poison`.
LLVM performs the same simplifications: https://godbolt.org/z/dzTjYjs4e
Verified with Alive2:
| Fold | udiv | sdiv | urem | srem |
| :--- | :---: | :---: | :---: | :---: |
| `x / x -> 1`, `x % x -> 0` | [ā](https://alive2.llvm.org/ce/z/YjZCEA)
| [ā](https://alive2.llvm.org/ce/z/BSWQrm) |
[ā](https://alive2.llvm.org/ce/z/gx5sRH) |
[ā](https://alive2.llvm.org/ce/z/VUYkr4) |
| `0 / x -> 0`, `0 % x -> 0` | [ā](https://alive2.llvm.org/ce/z/keqeCZ)
| [ā](https://alive2.llvm.org/ce/z/jyf5wm) |
[ā](https://alive2.llvm.org/ce/z/fZa6ND) |
[ā](https://alive2.llvm.org/ce/z/fo6ss8) |
----
Code generated by Claude Code.
Signed-off-by: VĆctor PĆ©rez Carrasco <victor.pc.upm at gmail.com>
Commit: 14304efe26ea430029ab00fb345f041b62069097
https://github.com/llvm/llvm-project/commit/14304efe26ea430029ab00fb345f041b62069097
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/IR/Instructions.cpp
M llvm/unittests/IR/InstructionsTest.cpp
Log Message:
-----------
[IR] Remove deprecated BranchInst (#212095)
The migration to UncondBr/CondBr was finished in LLVM 23. BranchInst has
no remaining uses in-tree. Let's finish this by removing BranchInst.
https://discourse.llvm.org/t/rfc-split-branchinst-into-uncondbr-and-condbr/90022
Deprecated with: https://github.com/llvm/llvm-project/pull/187314
Commit: 06fb5203c6398df1ab72788eee91a6cea36b0a0b
https://github.com/llvm/llvm-project/commit/06fb5203c6398df1ab72788eee91a6cea36b0a0b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/utils/gn/README.rst
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/build/buildflags.gni
M llvm/utils/gn/build/symlink_or_copy.gni
M llvm/utils/gn/build/toolchain/BUILD.gn
M llvm/utils/gn/secondary/BUILD.gn
M llvm/utils/gn/secondary/bolt/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/tool/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/xpc/framework/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ar/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cxxfilt/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwp/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-libtool-darwin/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-lipo/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-nm/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-rc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readobj/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-size/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-strings/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
Log Message:
-----------
Revert "gn build: Support building debug binaries from a release build directory." (#211294)
This reverts commit 611d015f0030e0d4f1b3bd2270205f6f6b6e20eb.
Breaks building, see
https://github.com/llvm/llvm-project/pull/197843#issuecomment-5025645797
Commit: 07b5c31ae23afb13609a55af9b4050c94a71ae29
https://github.com/llvm/llvm-project/commit/07b5c31ae23afb13609a55af9b4050c94a71ae29
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
A llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
R llvm/test/Transforms/ConstraintElimination/retry-without-decomposition.ll
Log Message:
-----------
[ConstraintElim] Re-organize tests with decomposition failures (NFC). (#212130)
Add more tests for failed decomposition, consolidate them in
partial-decomposition.ll.
Commit: 1d349c710c33026655d9d6952785e1867f5af97e
https://github.com/llvm/llvm-project/commit/1d349c710c33026655d9d6952785e1867f5af97e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 150f33ce2895 (#212136)
Commit: 1f48ea0f6334d1085bd1b13cd303f04f7af64bd8
https://github.com/llvm/llvm-project/commit/1f48ea0f6334d1085bd1b13cd303f04f7af64bd8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
Log Message:
-----------
[libc++] Removing traiilng whitespace at line end in CMakeLists.txt (#212135)
Follow-up to #209291.
Commit: f3f2cd6844f606b804c76e06dca0b9c18af3ec04
https://github.com/llvm/llvm-project/commit/f3f2cd6844f606b804c76e06dca0b9c18af3ec04
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port a434fe87cce7 (#212137)
Commit: 7bbaa66b88b9c551d0b8f9835ebe5e253e351d5c
https://github.com/llvm/llvm-project/commit/7bbaa66b88b9c551d0b8f9835ebe5e253e351d5c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Reapply "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003) (#211763)
This reverts commit 4c7948d06c93e8d233cd4733fd4107f3b68bc7bc. The commit
always constructs slot on first use, to fix compile-time regressions in
release builds.
Original message:
VPRecipeBase::dump() constructs a fresh VPSlotTracker instance on each
call. VPSlotTracker construction requires iterating over all recipes in
the plan, to number all VPValues.
To avoid doing lots of unnecessary work when printing VPlan costs,
construct a shared VPSlotTracker in VPCostContext, re-used by all
prints.
This can speed up debug output for large loops.
PR: https://github.com/llvm/llvm-project/pull/203386
Commit: 39eb2a11a21927832091b54f25dc4a8bd1c61604
https://github.com/llvm/llvm-project/commit/39eb2a11a21927832091b54f25dc4a8bd1c61604
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
R clang/test/CIR/CodeGen/coro-exceptions.cpp
R clang/test/CIR/CodeGen/coro-task.cpp
A clang/test/CIR/CodeGenCoroutines/Inputs/coroutine.h
A clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
A clang/test/CIR/CodeGenCoroutines/coro-task.cpp
Log Message:
-----------
[CIR][NFC] Reorganize coroutine tests (#211152)
Move the coroutine tests into a dedicated CodeGenCoroutines directory.
This is a test only reorganization in preparation for upcoming
coroutine-related changes.
Commit: 814a883c3c814a98abbdd30c3320553624d59cc2
https://github.com/llvm/llvm-project/commit/814a883c3c814a98abbdd30c3320553624d59cc2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionDivision.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M polly/include/polly/Support/SCEVAffinator.h
M polly/lib/Support/SCEVAffinator.cpp
M polly/lib/Support/SCEVValidator.cpp
M polly/lib/Support/ScopHelper.cpp
Log Message:
-----------
[SCEV] Remove ptrtoint expression (NFC). (#212038)
Follow-up to https://github.com/llvm/llvm-project/pull/180244 to remove
the now unused SCEVPtrToIntExpr.
PR: https://github.com/llvm/llvm-project/pull/212038
Commit: 4068f4d2e0f30626e2f0fdf716e62624519bdd5e
https://github.com/llvm/llvm-project/commit/4068f4d2e0f30626e2f0fdf716e62624519bdd5e
Author: Kirill A. Korinsky <kirill at korins.ky>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
A lld/test/ELF/eh-frame-dynrel-offset.s
Log Message:
-----------
[ELF] Fix dynamic relocations in .eh_frame (#210967)
scanEhSection translates input offsets to merged .eh_frame offsets
before creating dynamic relocations. DynamicReloc::getOffset translated
them a second time through EhInputSection.
Use the synthetic parent for already merged offsets, and use the
finalized relocation offset when verifying applied addends.
---------
Co-authored-by: Fangrui Song <i at maskray.me>
Commit: 99a8141b11cd8175b3d2fd81a83786083b6e7501
https://github.com/llvm/llvm-project/commit/99a8141b11cd8175b3d2fd81a83786083b6e7501
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M libc/test/integration/src/pthread/pthread_barrier_test.cpp
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/time/localtime_r_test.cpp
Log Message:
-----------
[libc][test][NFC] Fix compiler warnings in libc tests (#212100)
Resolved compiler warnings in several libc unit and integration tests:
- Fixed -Wmissing-designated-field-initializers in localtime_r_test.cpp
by using zero-initialisation instead of partial designated initialisers.
- Fixed -Wimplicit-int-conversion in sigaltstack_test.cpp by explicitly
casting the loop index to uint8_t.
- Fixed -Wunused-parameter in pthread_barrier_test.cpp by omitting
unused parameter names in function definitions.
Assisted-by: Automated tooling, human reviewed.
Commit: 6a2bdfeea8c3ada0f9ca2d4d7b2d391f75ab4541
https://github.com/llvm/llvm-project/commit/6a2bdfeea8c3ada0f9ca2d4d7b2d391f75ab4541
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Driver.cpp
A lld/test/ELF/sparcv9-abs-pic.s
A lld/test/ELF/sparcv9-reloc-got.s
Log Message:
-----------
[ELF,SPARC] Support ABS and RELATIVE dynamic relocations (#212155)
... and test some previously uncovered GOT relocation types.
Test convention follows ppc32-*, which I added in 2019.
The SPARC psABI only defines Elf64_Rela. Add EM_SPARCV9 to getIsRela so
that dynamic relocations use .rela.dyn/.rela.plt instead of the
unsupported SHT_REL form.
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Commit: 677f13efef9c48acdfba73703344c5234a04ae9e
https://github.com/llvm/llvm-project/commit/677f13efef9c48acdfba73703344c5234a04ae9e
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fix folds crashing on dynamic-shaped tensors (#212072)
`Builder::getZeroAttr` asserts when asked to build a constant of a
ranked tensor with a dynamic shape (`DenseElementsAttr` requires a
static shape). Three self-identity folds/patterns reached it without a
guard and aborted on dynamic-shaped operands:
```mlir
arith.xori %x, %x : tensor<?xi32>
arith.subui_extended %x, %x : tensor<?xi32>, tensor<?xi1>
arith.subi (arith.subi %a, %b), %a : tensor<?xi32> (SubISubILHSRHSLHS)
```
Guard each with a static-shape check (as `arith.subi(x,x)` already does)
so they leave the op unfolded instead of crashing. The TableGen pattern
gets a new `IsScalarOrHasStaticShape` constraint.
Signed-off-by: VĆctor PĆ©rez Carrasco <victor.pc.upm at gmail.com>
Commit: af1a3d2591f236613306a317018e855b6a388538
https://github.com/llvm/llvm-project/commit/af1a3d2591f236613306a317018e855b6a388538
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M lld/ELF/Arch/SPARCV9.cpp
M lld/test/ELF/sparcv9-reloc-got.s
A lld/test/ELF/sparcv9-reloc-pc.s
A lld/test/ELF/sparcv9-reloc-range.s
M lld/test/ELF/sparcv9-reloc.s
Log Message:
-----------
[ELF,SPARC] Handle more relocation types and fix simm13 field writes (#212157)
Add the absolute (R_SPARC_8/16/UA16, R_SPARC_13, R_SPARC_HIX22/LOX10),
PC-relative (R_SPARC_DISP8/16/64, R_SPARC_WDISP16/19/22) and GOT
(R_SPARC_GOT13) forms. The assembler emits these, but lld reports
"unknown relocation".
Since aff950e95d4a, R_SPARC_LO10, R_SPARC_HM10 and R_SPARC_L44 clear the
whole simm13 field while writing only its low 10, 10 and 12 bits,
dropping
bits that GNU ld preserves. Narrow each mask to the bits it writes.
Give R_SPARC_PC22 its own case, as a displacement needing a range check.
Express the R_SPARC_HI22 and R_SPARC_H44 checks in terms of the
unshifted
value to improve the diagnostic, and drop the R_SPARC_HH22 check, which
no 64-bit value can fail.
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Co-authored-by: LemonBoy <thatlemon at gmail.com>
Co-authored-by: Alex RĆønne Petersen <alex at alexrp.com>
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Co-authored-by: LemonBoy <thatlemon at gmail.com>
Co-authored-by: Alex RĆønne Petersen <alex at alexrp.com>
Commit: a54947f4061498fa5aadf2f8e832ae96a3405c4d
https://github.com/llvm/llvm-project/commit/a54947f4061498fa5aadf2f8e832ae96a3405c4d
Author: wanglei <wanglei at loongson.cn>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/LoongArch.h
A clang/test/Sema/inline-asm-validate-loongarch.c
Log Message:
-----------
[Clang][LoongArch] Implement getConstraintRegister for LoongArch (#210898)
Implement `getConstraintRegister` so Clang can diagnose inline asm
register clobber conflicts for LoongArch, matching GCC.
Commit: e4205abdad5081abbb393c0d2f6286695eb772eb
https://github.com/llvm/llvm-project/commit/e4205abdad5081abbb393c0d2f6286695eb772eb
Author: wanglei <wanglei at loongson.cn>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
Log Message:
-----------
[LoongArch] Simplify addReloc relocation handling. NFC (#211755)
Remove the unused return value of addReloc and simplify the control
flow for linker relaxation and PC-relative relocation handling.
Commit: e9240abc521a7dbc1ee15f0e705b95f0e71ff987
https://github.com/llvm/llvm-project/commit/e9240abc521a7dbc1ee15f0e705b95f0e71ff987
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang/lib/Index/IndexSymbol.cpp
M clang/test/Index/index-refs.cpp
M clang/test/Index/index-template-specialization.cpp
Log Message:
-----------
[clangd] Respect ArgumentLists for struct templates (#212094)
Also fix a bug in index::getSymbolKind where the returned symbol kind
would be Class for a struct template.
Fixes https://github.com/clangd/clangd/issues/2684
Commit: 43a704b657423a0eead02e64911b413c4afca73f
https://github.com/llvm/llvm-project/commit/43a704b657423a0eead02e64911b413c4afca73f
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.h
A lld/test/ELF/sparcv9-plt.s
M lld/test/ELF/sparcv9-reloc-got.s
Log Message:
-----------
[ELF,SPARC] Add the GOT header entry and place R_SPARC_JMP_SLOT in .plt (#212161)
SPARC dynamic linker finds _DYNAMIC by dereferencing the GOT pointer
register (glibc elf_machine_dynamic), so reserve .got[0] for it. It
resolves a PLT entry by rewriting the entry's instructions (glibc
sparc64_fixup_plt), so R_SPARC_JMP_SLOT applies to .plt and there is no
.got.plt.
Add TargetInfo::usesGotPlt, which SPARC sets to false, and use it to
place the relocation and derive the sh_info of .rela.plt. The four
reserved PLT entries stay zeroed, as with GNU ld; the dynamic linker
fills in .PLT0 and .PLT1 at startup.
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
Co-authored-by: LemonBoy <thatlemon at gmail.com>
Commit: 27bf172508608a1a55ac74aeb9830b8340a77af5
https://github.com/llvm/llvm-project/commit/27bf172508608a1a55ac74aeb9830b8340a77af5
Author: Jin Huang <jinhuang1102 at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/coro-split-00.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (#211970)
The previous https://github.com/llvm/llvm-project/pull/184466 didn't fix
the PGO profile in select instruction in
[replaceSwitchResumeCoroFree](https://github.com/jinhuang1102/llvm-project/blob/98668ee1485aa47e97cbb900bc22e0d9e1c8d795/llvm/lib/Transforms/Coroutines/CoroSplit.cpp#L207)
function in `CoroSplit.cpp` so triggered a profile verification failure:
https://lab.llvm.org/buildbot/#/builders/223/builds/7899
This PR attach unknown branch weights to the created `select`
instruction see the comment for more information.
Cmake config:
```
cmake -GNinja -DCMAKE_BUILD_TYPE=Debug -DLLVM_ENABLE_ASSERTIONS=ON -DCMAKE_C_COMPILER_LAUNCHER=ccache -DCMAKE_CXX_COMPILER_LAUNCHER=ccache -DLLVM_LIT_ARGS=--exclude-xfail -DLLVM_ENABLE_PROFCHECK=ON ../llvm-project/llvm
```
Verified by
```
$ bin/llvm-lit -v /usr/local/google/home/jingold/llvm-project/llvm/test/Transforms/Coroutines
-- Testing: 170 tests, 128 workers --
PASS: LLVM :: Transforms/Coroutines/coro-spill-defs-before-corobegin.ll (1 of 170)
...
PASS: LLVM :: Transforms/Coroutines/coro-split-resume-entry-count.ll (121 of 170)
PASS: LLVM :: Transforms/Coroutines/coro-split-resume-entry-count-no-suspend.ll (149 of 170)
PASS: LLVM :: Transforms/Coroutines/coro-split-resume-fallthrough-destroy-slot.ll (155 of 170)
...
PASS: LLVM :: Transforms/Coroutines/coro-readnone-02.ll (170 of 170)
Testing Time: 0.70s
Total Discovered Tests: 170
Passed: 170 (100.00%)
```
Co-authored-by: Jin Huang <jingold at google.com>
Commit: 19cdc69bac7eff9f8e701aa8281c4f4cab528687
https://github.com/llvm/llvm-project/commit/19cdc69bac7eff9f8e701aa8281c4f4cab528687
Author: LukeZhuang <luke.zhuang at linux.alibaba.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/test/CodeGen/RISCV/tlsdesc-clobber-vector.ll
M llvm/test/CodeGen/RISCV/tlsdesc-clobber.ll
Log Message:
-----------
[RISCV] Declare TLSDESC clobbers for vector registers and CSRs per psABI (#205027)
RISC-V's ABI states that, aside from V extension state, only a0 and t0
are clobbered by TLSDESC resolvers. The original specification was to
also not clobber any V extension state, but due to implementation
concerns an ABI-breaking change has been made[1] to clobber all V
extension state.
This patch adds V-regs/csrs clobbering to the existing PseudoLA_TLSDESC
and PseudoTLSDESCCall in RISCVInstrInfo.td, as well as an additional
test covering the V-register clobber and V-CSRs clobber cases.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/496
Commit: 93496734598ab9ea7b15d7f5d992751741a54691
https://github.com/llvm/llvm-project/commit/93496734598ab9ea7b15d7f5d992751741a54691
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-26 (Sun, 26 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fold trivial shifts (`0<<x`, `x>>x`, `-1>>x`) (#212159)
Add value-preserving folds mirroring LLVM's InstructionSimplify for the
integer shift ops:
```
shli/shrui/shrsi(0, x) -> 0
shrui/shrsi(x, x) -> 0
shrsi(-1, x) -> -1
```
A shift amount greater than or equal to the bit width yields poison, so
refining these cases to a constant is valid. For `shr(x, x)` any
in-range amount `v` satisfies `v >> v == 0 (v < 2^v)`.
Folding an out-of-range shift amount (`c >= bit width`) to poison is
left as a TODO: it would make the arith dialect depend on the ub dialect
to materialize `ub.poison`.
LLVM performs the same simplifications: https://godbolt.org/z/7hsMz9E7Y
Verified with Alive2:
| Fold | shl | lshr | ashr |
| :--- | :---: | :---: | :---: |
| `0 << x`, `0 >> x -> 0` | [ā](https://alive2.llvm.org/ce/z/Sz2fT1) |
[ā](https://alive2.llvm.org/ce/z/mlq7k6) |
[ā](https://alive2.llvm.org/ce/z/jbeNH9) |
| `x >> x -> 0` | ā | [ā](https://alive2.llvm.org/ce/z/JCPBCZ) |
[ā](https://alive2.llvm.org/ce/z/YLjo3M) |
| `-1 >> x -> -1` | ā | ā | [ā](https://alive2.llvm.org/ce/z/sT6pNC) |
---
Code partially generated by Claude Code.
Signed-off-by: VĆctor PĆ©rez Carrasco <victor.pc.upm at gmail.com>
Commit: 89c0b16768b4b83d86e0aeda47df813274e6d2db
https://github.com/llvm/llvm-project/commit/89c0b16768b4b83d86e0aeda47df813274e6d2db
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/Dominators.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/lib/IR/Dominators.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/unittests/Support/GenericDomTreeTest.cpp
Log Message:
-----------
[DomTree] Define the members calling the construction algorithms out of line. NFC (#212145)
DominatorTreeBase defines some functions that call into into
DomTreeBuilder, whose algorithms live in GenericDomTreeConstruction.h.
A translation unit including only GenericDomTree.h inlines the member
and calls the algorithm, which just Dominators.cpp provides, through ten
explicit instantiations. Elsewhere the algorithm survives only where the
inliner leaves a use of it.
A previous revision of #212098 gave LoopInfoBase a member calling
recalculate, so instantiating LoopInfoBase in CFGLoopInfo.cpp referenced
an algorithm that no translation unit defines:
```
ld.lld: error: undefined symbol: void llvm::DomTreeBuilder::Calculate<llvm::DominatorTreeBase<mlir::Block, false>>(llvm::DominatorTreeBase<mlir::Block, false>&)
>>> referenced by CFGLoopInfo.cpp
```
Define those members in GenericDomTreeConstruction.h. Such a caller then
calls the member out of line, and the explicit instantiation of the
class that each dominator tree owner already has emits it.
Negligible size decreases for all of opt/llc/mlir-opt/llvm-bolt
Aided by Claude Opus 5
Commit: 3f170b5b76177f270765673d528aee9b318106fe
https://github.com/llvm/llvm-project/commit/3f170b5b76177f270765673d528aee9b318106fe
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
Log Message:
-----------
[mlir] Fix warning, NFC (#211204)
Commit: 8c57bdb49de322cd910ed6a6e2a873d64770006f
https://github.com/llvm/llvm-project/commit/8c57bdb49de322cd910ed6a6e2a873d64770006f
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M llvm/include/llvm/BinaryFormat/DynamicTags.def
M llvm/lib/Object/ELF.cpp
M llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test
Log Message:
-----------
[X86] Add dynamic tags support for llvm-readobj and lldb per psABI (#207661)
Commit: 13706f1c73b91f74a8a555748b68362fbb5d698f
https://github.com/llvm/llvm-project/commit/13706f1c73b91f74a8a555748b68362fbb5d698f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
Log Message:
-----------
AMDGPU: Migrate misc. tests to subarch triples (#211585)
Commit: 5271fd9e65fb235fedd484cfc3710679744bdf46
https://github.com/llvm/llvm-project/commit/5271fd9e65fb235fedd484cfc3710679744bdf46
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/CoreTypes.h
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Session::HandlerTag -> orc_rt_ControllerHandlerTag (#212173)
Replace the `Session::HandlerTag = void*` type alias with
orc_rt_ControllerHandlerTag. The intent is both to make this type
accessible to the C API, and to rename it to clarify its role as a tag
for handlers in the controller that are callable by the executor.
Commit: 820b5cb6d9fe8feda01fbb8b86d68aea10c63130
https://github.com/llvm/llvm-project/commit/820b5cb6d9fe8feda01fbb8b86d68aea10c63130
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/TableGen/aarch64-register-info-stats.td
Log Message:
-----------
[AArch64] Mark ZT0 register class as non-allocatable (#211750)
ZT0 is not available for register allocation, define it with the other
non-allocatable SME register classes and avoid an unnecessary pressure
set.
Assisted-by: codex
Commit: ed3470ffd1222be4aa4d6f938e6ba0fae5a2fad7
https://github.com/llvm/llvm-project/commit/ed3470ffd1222be4aa4d6f938e6ba0fae5a2fad7
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ELF] Fix -Wc++11-narrowing error in addPltEntry (#212185)
PR #212161 passes the `uint8_t isPreemptible : 1` bit-field straight
into a braced-init-list slot whose parameter type is `bool`.
Older clang (<20 ?) incorrectly rejects it.
```
error: non-constant-expression cannot be narrowed from type 'uint8_t' (aka 'unsigned char') to 'bool' in initializer list [-Wc++11-narrowing]
```
Commit: 0cc7159125eacd3abdff94eb7e634c1a8f889d1e
https://github.com/llvm/llvm-project/commit/0cc7159125eacd3abdff94eb7e634c1a8f889d1e
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_test.cpp
Log Message:
-----------
[sanitizer_common][tests] Skip MemoryMapping::ParseUnixMemoryProfile ā¦ (#212114)
ā¦etc. on NetBSD
The `Sanitizer-x86_64-Test` test doesn't link on NetBSD/amd64 10.1:
```
/usr/bin/ld: /usr/bin/ld: DWARF error: invalid or unhandled FORM value: 0x25
SANITIZER_TEST_OBJECTS.sanitizer_procmaps_test.cpp.x86_64.o: in function `__sanitizer::MemoryMapping_ParseUnixMemoryProfile_Test::TestBody()':
sanitizer_procmaps_test.cpp:(.text._ZN11__sanitizer41MemoryMapping_ParseUnixMemoryProfile_Test8TestBodyEv+0x52): undefined reference to `__sanitizer::ParseUnixMemoryProfile(void (*)(unsigned long, unsigned long, bool, unsigned long*), unsigned long*, char*, unsigned long)'
/usr/bin/ld: SANITIZER_TEST_OBJECTS.sanitizer_procmaps_test.cpp.x86_64.o: in function `__sanitizer::MemoryMapping_ParseUnixMemoryProfileTruncated_Test::TestBody()':
sanitizer_procmaps_test.cpp:(.text._ZN11__sanitizer50MemoryMapping_ParseUnixMemoryProfileTruncated_Test8TestBodyEv+0x17a): undefined reference to `__sanitizer::ParseUnixMemoryProfile(void (*)(unsigned long, unsigned long, bool, unsigned long*), unsigned long*, char*, unsigned long)'
```
Fixed by skipping the affected subtest.
Tested on `amd64-pc-netbsd10.1` and `x86_64-pc-linux-gnu`.
Commit: b66306c2419ecbb5e02e63728c54814647f0e06c
https://github.com/llvm/llvm-project/commit/b66306c2419ecbb5e02e63728c54814647f0e06c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AArch64/select_fmf.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/select-nsz-known-values-to-fmin-fmax.ll
Log Message:
-----------
[SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (#187738)
The right place to form these is DAGCombine, not SDAGBuilder. This
removes the SPNB_RETURNS_ANY case, the SPNB_RETURNS_OTHER is left to a
followup. We need to propagate FMF flags in a few more places to make
this work.
Commit: 102f572188c5dbf89d92bf533a4bdc4fed1d89bd
https://github.com/llvm/llvm-project/commit/102f572188c5dbf89d92bf533a4bdc4fed1d89bd
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/unittests/CAS/OnDiskCASLoggerTest.cpp
Log Message:
-----------
[llvm][cas] Fix OnDiskCASLoggerTest.cpp compilation on NetBSD (#212113)
`CAS/OnDiskCASLoggerTest.cpp` doesn't compile on NetBSD/amd64:
```
In member function `virtual void OnDiskCASLoggerTest_MultiProcess_Test::TestBody()':
llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:230:19: error: reference to `Wait' is ambiguous
230 | auto Result = Wait(PI, /*Timeout=*/15, &Error);
| ^~~~
In file included from llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:15:
llvm/include/llvm/Support/Program.h:212:22: note: candidates are: `llvm::sys::ProcessInfo llvm::sys::Wait(const llvm::sys::ProcessInfo&, std::optional<unsigned int>, std::string*, std::optional<llvm::sys::ProcessStatistics>*, bool)'
212 | LLVM_ABI ProcessInfo Wait(
| ^~~~
In file included from llvm/include/llvm/Support/RWMutex.h:17,
from llvm/include/llvm/Support/ThreadPool.h:21,
from llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:16:
llvm/include/llvm/Support/Threading.h:60:40: note: `llvm::InitStatus llvm::Wait'
60 | enum InitStatus { Uninitialized = 0, Wait = 1, Done = 2 };
| ^~~~
```
This patch removes the ambiguity, matching other uses.
Tested on `amd64-pc-netbsd10.1` and `x86_64-pc-linux-gnu`.
Commit: f91647a732298131e86fc4f465b20b80105f35d6
https://github.com/llvm/llvm-project/commit/f91647a732298131e86fc4f465b20b80105f35d6
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/utils/release/test-release.sh
Log Message:
-----------
[llvm][release] Build openmp as runtime in test-release.sh (#212111)
`test_release.sh` tries to build `openmp` as a project, which breaks the
build:
```
CMake Error at CMakeLists.txt:155 (message):
Support for the LLVM_ENABLE_PROJECTS=openmp build mode has been removed.
Please switch to the bootstrapping build
cmake -S <llvm-project>/llvm -B build -DLLVM_ENABLE_PROJECTS=clang -DLLVM_ENABLE_RUNTIMES=openmp
or to the runtimes default build
cmake -S <llvm-project>/runtimes -B build -DLLVM_ENABLE_RUNTIMES=openmp
```
This patch switches it to a runtime to match.
Tested on `x86_64-pc-linux-gnu`.
Commit: 30a1b346f5c84504e5e998cb45e6551d21645e21
https://github.com/llvm/llvm-project/commit/30a1b346f5c84504e5e998cb45e6551d21645e21
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A orc-rt/include/orc-rt/StringExtras.h
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/StringExtrasTest.cpp
Log Message:
-----------
[orc-rt] Add StringExtras::join from llvm/adt and tests (#212179)
Tests are appropriate to the use cases that will follow in a PR to
follow.
Commit: 5c0a7212c8c8c46969489ae1ee85df1141a76bbb
https://github.com/llvm/llvm-project/commit/5c0a7212c8c8c46969489ae1ee85df1141a76bbb
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/OperatingSystem.h
Log Message:
-----------
[lldb][NFC] Add documentation for OperatingSystem methods (#210968)
Commit: 3deca05e273382820a164e7acf3efe0c0e441a23
https://github.com/llvm/llvm-project/commit/3deca05e273382820a164e7acf3efe0c0e441a23
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/test/TableGen/aarch64-register-info-stats.td
Log Message:
-----------
[AArch64] Remove unused GPR32arg register class (NFC) (#211778)
GPR32arg was added alongside GPR64arg in fcbec02ea6fb, but has no users
outside the register info generated by TableGen.
Assisted-by: codex
Commit: bb75638cb7fa090bb6e4c4c3e6e15e693a69b1d1
https://github.com/llvm/llvm-project/commit/bb75638cb7fa090bb6e4c4c3e6e15e693a69b1d1
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
Log Message:
-----------
[LifetimeSafety][NFC] Refactor AccessPath and Loan representations
(#180369)
This patch refactors the internal representations of `AccessPath` and
`Loan` to support path elements, preparing for field-sensitive and
interior-sensitive lifetime tracking.
* Introduces `PathElement` representing a field or interior dereference.
* Refactors `AccessPath` to contain a base and a list of `PathElement`s.
* Updates `Loan` and `LoanManager` to use the new `AccessPath`
structure.
---
Old PR description:
Refactor loan representation to use structured access paths, enabling
more precise borrow tracking and detection of use-after-invalidation.
Previously, loans were associated only with top-level storage (e.g., a
variable `x`, temporary `t`). This was insufficient for reasoning about
borrows of sub-objects (interior memory regions), such as fields (`x.f`)
or container elements (`vec[0]`), or for modelling views like
`string_view` which borrow the interior of an object.
We modify `AccessPath`, which now consists of a `base` (a _variable_,
_temporary_, or _placeholder_ for _parameters/'this'_) and a sequence of
`PathElements`. A `PathElement` can be a field access (`.field`) or an
interior access (denoted as `.*`), representing an unnamed interior
memory region of an object, like the character buffer of a
`std::string`.
High-level changes:
* `PathLoan` and `PlaceholderLoan` are merged into a single Loan class,
containing an `AccessPath`.
* **Path-Based Expiry**: `ExpireFact` is changed from expiring a single
loan to expiring an `AccessPath`. If `x` goes out of scope, any loan
whose path starts with `x` (e.g., loans to `x`, `x.field`, `x.field.*`)
is now considered expired. The checker uses `isPrefixOf` to detect this.
* **Path Extension in Flows**: `OriginFlowFact` now supports extending
loan paths:
* Field access like for expression `obj.field` extends loans to `obj`
into loans to `obj.field`.
* Owner-to-view conversions like `std::string_view s(str)` extend loans
to `str` into loans to `str.*`.
* **Invalidation**: Container invalidation methods (e.g.,
`vec.push_back()`) invalidate loans whose path is a strict extension of
the container's path (e.g., loans to `vec.*` but not loans to `vec`).
The checker uses `isStrictPrefixOf`.
* **Move-Tracking**: Moves are now tracked based on path prefixes via
`isPrefixOf`.
This refactoring enables detection of use-after-invalidation bugs for
STL containers specially when the container appears as fields.
Commit: d211ecfc817f73e1395a0dc32e45b84de7b9bdb3
https://github.com/llvm/llvm-project/commit/d211ecfc817f73e1395a0dc32e45b84de7b9bdb3
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A mlir/test/Integration/Dialect/EmitC/inline-oz-test-model-tosa.mlir
A mlir/test/Integration/Dialect/EmitC/regalloc-eviction-test-model-tosa.mlir
Log Message:
-----------
Add TOSA -> EmitC tests for MLGO mock models (#211833)
These tests are the first step towards monitoring the recently enabled
TOSA -> EmitC path that ML optimization models will switch to, for a
fully in-tree, framework free serving alternative.
For simplicity, yet testing the core functionality, these tests don't
use production models, but rather in-tree mock models, generated by
these scripts:
[llvm/lib/Analysis/models/gen-regalloc-eviction-test-model.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/gen-regalloc-eviction-test-model.py)
/
[llvm/lib/Analysis/models/gen-inline-oz-test-model.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/gen-inline-oz-test-model.py)
\+
[llvm/lib/Analysis/models/saved-model-to-tflite.py](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Analysis/models/saved-model-to-tflite.py)
+
[tosa-converter-for-tflite](https://www.piwheels.org/project/tosa-converter-for-tflite/)
> Note: `saved-model-to-tflite.py` renames the TFLite converted
SavedModel function to `main()`, which causes `clang` errors. Changing
this behaviour requires interventions in Tensorflow, which are out of
scope. Therefore, the functions were manually renamed.
> Note: The includes passed by argument to `clang` should have been
handled by EmitC. This only becomes a problem when compiling these
models standalone. Embedding the models in LLVM does not cause issues.
Nonetheless, future work will ensure `ConvertToEmitC` includes required
libraries for these ops.
Commit: 3b6e754c0a048f034d7241a4eac6ccc8b3d0134c
https://github.com/llvm/llvm-project/commit/3b6e754c0a048f034d7241a4eac6ccc8b3d0134c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/test/AST/ByteCode/amdgpu-nullptr.cl
M clang/test/AST/ast-dump-amdgpu-types.c
M clang/test/Analysis/addrspace-null.c
M clang/test/Analysis/cast-value-notes.cpp
M clang/test/Analysis/element-region-address-space.c
M clang/test/Analysis/ptr-cmp-const-trunc.cl
M clang/test/Analysis/solver-sym-simplification-ptr-bool.cl
M clang/test/Analysis/z3/cstring-addrspace.c
M clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
M clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
M clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
M clang/test/CIR/CodeGenHIP/amdgpu-module-flags.hip
M clang/test/CIR/CodeGenHIP/hip-cuid.hip
M clang/test/CIR/CodeGenHIP/simple.cpp
M clang/test/CIR/CodeGenOpenMP/emit-device-functions.cpp
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CodeGen/AMDGPU/sanitizer.c
M clang/test/CodeGen/address-space.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/amdgpu-image-rsrc-type-debug-info.c
M clang/test/CodeGen/amdgpu-variadic-call.c
M clang/test/CodeGen/annotations-field.c
M clang/test/CodeGen/annotations-loc.c
M clang/test/CodeGen/bitfield-access-unit.c
M clang/test/CodeGen/default-address-space.c
M clang/test/CodeGen/dynamic-alloca-with-address-space.c
M clang/test/CodeGen/fp-atomic-ops.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/linking-bitcode-postopt.cpp
M clang/test/CodeGen/logb_scalbn.c
M clang/test/CodeGen/pragma-detect_mismatch.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/scoped-fence-ops.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCUDA/address-spaces.cu
M clang/test/CodeGenCUDA/alias.cu
M clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
M clang/test/CodeGenCUDA/amdgpu-visibility.cu
M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
M clang/test/CodeGenCUDA/anon-ns.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/const-var.cu
M clang/test/CodeGenCUDA/dependent-libs.cu
M clang/test/CodeGenCUDA/device-const-var-linkage.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/device-use-host-var.cu
M clang/test/CodeGenCUDA/device-var-init.cu
M clang/test/CodeGenCUDA/device-var-linkage.cu
M clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip
M clang/test/CodeGenCUDA/host-used-device-var.cu
M clang/test/CodeGenCUDA/implicit-hd-dtor-trap-stub-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-explicit-inst-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-overload-ambig-hip.hip
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCUDA/kernel-arg-name-metadata.cu
M clang/test/CodeGenCUDA/kernel-args.cu
M clang/test/CodeGenCUDA/kernel-dbg-info.cu
M clang/test/CodeGenCUDA/lambda-constexpr-capture.cu
M clang/test/CodeGenCUDA/lambda-noinline.cu
M clang/test/CodeGenCUDA/lambda-reference-var.cu
M clang/test/CodeGenCUDA/lambda.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-gpu-attrs-preserved.cu
M clang/test/CodeGenCUDA/managed-var.cu
M clang/test/CodeGenCUDA/ms-linker-options.cu
M clang/test/CodeGenCUDA/noinline.cu
M clang/test/CodeGenCUDA/norecurse.cu
M clang/test/CodeGenCUDA/nosanitize-cuid.hip
M clang/test/CodeGenCUDA/static-device-var-no-rdc.cu
M clang/test/CodeGenCUDA/static-device-var-rdc.cu
M clang/test/CodeGenCUDA/template-class-static-member.cu
M clang/test/CodeGenCUDA/types.cu
M clang/test/CodeGenCUDA/unnamed-types.cu
M clang/test/CodeGenCXX/address-space-cast-coerce.cpp
M clang/test/CodeGenCXX/address-space-cast.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/amdgcn-string-literal.cpp
M clang/test/CodeGenCXX/amdgcn_declspec_get.cpp
M clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-buffer-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-image-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-kernel-arg-pointer-type.cpp
M clang/test/CodeGenCXX/bitfield-access-empty.cpp
M clang/test/CodeGenCXX/bitfield-access-tail.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
M clang/test/CodeGenCXX/conditional-temporaries.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenCXX/cxx11-extern-constexpr.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/no-elide-constructors.cpp
M clang/test/CodeGenCXX/template-param-objects-address-space.cpp
M clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp
M clang/test/CodeGenCXX/try-catch-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-with-address-space.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-consteval-address-space.cpp
M clang/test/CodeGenCXX/vtable-constexpr-address-space.cpp
M clang/test/CodeGenCXX/vtable-key-function-address-space.cpp
M clang/test/CodeGenCXX/vtable-layout-extreme-address-space.cpp
M clang/test/CodeGenCXX/vtable-linkage-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtt-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
M clang/test/CodeGenHIP/debug-info-language-hip.hip
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/device-function-huge-arg-ret.hip
M clang/test/CodeGenHIP/half.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHIP/placement-new-addrspace.hip
M clang/test/CodeGenHIP/printf-aggregate.cpp
M clang/test/CodeGenHIP/printf-builtin.hip
M clang/test/CodeGenHIP/printf-kind-module-flag.hip
M clang/test/CodeGenHIP/printf.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenHIP/sret-lifetime-markers.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
M clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
M clang/test/CodeGenHipStdPar/unsupported-ASM.cpp
M clang/test/CodeGenHipStdPar/unsupported-builtins.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/address-space-constant-initializers.cl
M clang/test/CodeGenOpenCL/address-spaces.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgcn-flat-scratch-name.cl
M clang/test/CodeGenOpenCL/amdgcn-large-globals.cl
M clang/test/CodeGenOpenCL/amdgcn-non-temporal-store.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-alignment.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-calling-conv.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M clang/test/CodeGenOpenCL/amdgpu-ieee.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
M clang/test/CodeGenOpenCL/atomic-builtins-default-to-device-scope.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/backend-unsupported-warning.ll
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-cvt-off-f32-i4.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/CodeGenOpenCL/byval.cl
M clang/test/CodeGenOpenCL/cast_image.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/func-call-dbg-loc.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCL/lifetime.cl
M clang/test/CodeGenOpenCL/nullptr.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
M clang/test/CodeGenOpenCL/private-array-initialization.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/CodeGenOpenCL/sqrt-fpmath.cl
M clang/test/CodeGenOpenCL/visibility.cl
M clang/test/CodeGenOpenCL/vla.cl
M clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/DebugInfo/Generic/amdgpu-barrier-type-debug-info.c
M clang/test/DebugInfo/Generic/amdgpu-buffer-rsrc-type-debug-info.c
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
M clang/test/Frontend/opencl.cl
M clang/test/Headers/__clang_hip_libdevice_declares.cpp
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/amdgcn_openmp_device_math.c
M clang/test/Headers/amdgcn_openmp_device_math_c.c
M clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
M clang/test/Headers/amdhsa_abi.cl
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/openmp-device-functions-bool.c
M clang/test/Headers/openmp_device_math_isnan.cpp
M clang/test/Headers/openmp_new_nothrow.cpp
M clang/test/Index/pipe-size.cl
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
M clang/test/Misc/backend-resource-limit-diagnostics.cl
M clang/test/PCH/aarch64-sve-types.c
M clang/test/Preprocessor/builtin_aux_info.cpp
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-macros.c
M clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/amdgcn-va-list-type.c
M clang/test/Sema/attr-model.cpp
M clang/test/Sema/builtin-amdgcn-atomic-inc-dec-failure.cpp
M clang/test/Sema/builtin-amdgcn-fence-failure.cpp
M clang/test/Sema/callingconv-devicekernel.cpp
M clang/test/Sema/inline-asm-validate-amdgpu.cl
M clang/test/Sema/scoped-atomic-ops.c
M clang/test/Sema/wave-reduce-builtins-validate-amdgpu.cl
M clang/test/SemaCUDA/addr-of-overloaded-fn.cu
M clang/test/SemaCUDA/addr-of-overloaded-template-fn.cu
M clang/test/SemaCUDA/allow-int128.cu
M clang/test/SemaCUDA/amdgpu-builtins-pointer-args.cu
M clang/test/SemaCUDA/amdgpu-f128.cu
M clang/test/SemaCUDA/amdgpu-size_t.cu
M clang/test/SemaCUDA/amdgpu-windows-vectorcall.cu
M clang/test/SemaCUDA/atomic-ops.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/const-var.cu
M clang/test/SemaCUDA/constexpr-var.cu
M clang/test/SemaCUDA/deferred-diags-dedup.cu
M clang/test/SemaCUDA/fp16-arg-return.cu
M clang/test/SemaCUDA/implicit-hd-dtor-explicit-instantiation.cu
M clang/test/SemaCUDA/implicit-hd-explicit-inst-organic-caller.cu
M clang/test/SemaCUDA/implicit-hd-overload-ambig-organic-caller.cu
M clang/test/SemaCUDA/overloaded-builtin.cu
M clang/test/SemaCUDA/windows-calling-conv.cu
M clang/test/SemaCXX/amdgpu-barrier.cpp
M clang/test/SemaCXX/amdgpu-buffer-rsrc.cpp
M clang/test/SemaCXX/amdgpu-image-rsrc.cpp
M clang/test/SemaCXX/amdgpu-sizeof-alignof.cpp
M clang/test/SemaHIP/amdgpu-barrier.hip
M clang/test/SemaHIP/amdgpu-buffer-rsrc.hip
M clang/test/SemaHIP/amdgpu-feature-predicate.hip
M clang/test/SemaHIP/amdgpu-is-invocable.hip
M clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/test/SemaHIP/atomic-deprecated.hip
M clang/test/SemaHIP/zero-sized-device-array.hip
M clang/test/SemaHipStdPar/device-can-call-host.cpp
M clang/test/SemaOpenCL/amd-media-ops.cl
M clang/test/SemaOpenCL/amdgpu-attrs.cl
M clang/test/SemaOpenCL/amdgpu-barrier.cl
M clang/test/SemaOpenCL/amdgpu-buffer-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-image-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-num-sgpr-vgpr-deprecated.cl
M clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
M clang/test/SemaOpenCL/atomic-ops.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cvt-off-f32-i4-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-f16.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/numbered-address-space.cl
M clang/test/SemaOpenCL/sampler_t.cl
M clang/test/SemaOpenCLCXX/amdgpu-nullptr.clcpp
M clang/test/SemaSYCL/sycl-cconv-win.cpp
Log Message:
-----------
clang/AMDGPU: Rename amdgcn triples to amdgpu in cc1 tests (14) (#212053)
Replace the legacy amdgcn architecture name with amdgpu in various
test triples. This set of updates covers cases that did not have
a set -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 2d289b24a9f99c4357d8783c2d4f25fa46ef619a
https://github.com/llvm/llvm-project/commit/2d289b24a9f99c4357d8783c2d4f25fa46ef619a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-canonical-prefixes.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-amdgcnspirv.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/test/OffloadTools/clang-offload-bundler/standardize.c
M clang/test/OffloadTools/clang-offload-bundler/zlib.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
Log Message:
-----------
clang/AMDGPU: Migrate clang-linker-wrapper tests to amdgpu triples (15) (#212054)
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: ed326421d27ea8c38b11c84aa23bd655063cb4f9
https://github.com/llvm/llvm-project/commit/ed326421d27ea8c38b11c84aa23bd655063cb4f9
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
Log Message:
-----------
[LifetimeSafety][NFC] Update Checker to use prefix comparison interfaces (#207519)
This patch switches the Checker's expiry and invalidation checks to use
`AccessPath::isPrefixOf` instead of equality (`==`).
Since all generated access paths are currently empty, `isPrefixOf` is
behaviourally identical to `==` (NFC). This prepares the checker to
handle nested paths (fields and container interiors) in subsequent
commits.
Commit: b8de72900b1da9dc1ca1d6a9961a8da7498b2295
https://github.com/llvm/llvm-project/commit/b8de72900b1da9dc1ca1d6a9961a8da7498b2295
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
R llvm/test/CodeGen/AArch64/GlobalISel/irtranslater-samesign.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
Log Message:
-----------
[AArch64][GlobalISel] Rename irtranslater -> irtranslator test. NFC (#212205)
Commit: f901499b11c1fe4fec3075a4b2d01e330f3a00c6
https://github.com/llvm/llvm-project/commit/f901499b11c1fe4fec3075a4b2d01e330f3a00c6
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/entry-point-at-function-end.s
Log Message:
-----------
[BOLT] Split unmarked tail code after CFI-bounded functions into separate functions (#176173)
Detect trailing unmarked code after CFI-bounded predecessors
(__BOLT_FDE_FUNC* or symbols whose FDE address range equals their size)
and promote it into separate BinaryFunction objects named
__BOLT_UNMARKED_TAILat<addr>.
A predecessor is only considered when:
- the target is AArch64
- it is not a pseudo or fragment function
- it has slack beyond its recorded size (MaxSize > Size)
- it is CFI-bounded
- no function is already registered at the tail start address
The trailing region is measured conservatively and we bail out (leaving
the slack attached to the predecessor) when:
- the tail range is not fully contained in the predecessor's origin
section
- a data marker ($d) or a constant island overlaps the region
(data-in-code)
- disassembly fails or yields a zero-length instruction
- after trimming trailing padding, the tail is empty (i.e. it contained
only padding) or does not end in a return
- any bytes past the decoded code are non-zero, i.e. not pure zero
padding.
The bug was introduced in commit
[cd27741](https://github.com/llvm/llvm-project/commit/cd27741c1111f8a97af5fbca4153fa94f50ed9f3)
Commit: ecd8d61126426b5fd92a48aa02e93c2c4a869577
https://github.com/llvm/llvm-project/commit/ecd8d61126426b5fd92a48aa02e93c2c4a869577
Author: Åukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/liboffload/API/Common.td
A offload/liboffload/API/Context.td
M offload/liboffload/API/OffloadAPI.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/context/olCreateContext.cpp
A offload/unittests/OffloadAPI/context/olDestroyContext.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfo.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfoSize.cpp
Log Message:
-----------
[Offload] Add olCreateContext / olDestroyContext / olGetContextInfo API (#209144)
Add the initial Context handle API to liboffload:
- olCreateContext / olDestroyContext
- olGetContextInfo / olGetContextInfoSize
- OL_ERRC_INVALID_CONTEXT error code
- OL_CONTEXT_INFO_{NUM_DEVICES,DEVICES,PLATFORM} queries
This is the first patch in a series. I decided to split the original
change into multiple smaller PRs to make the review process faster and
more manageable.
This patch introduces context management functions, but the context
handle is not used anywhere yet. The following patches will extend the
API to use contexts in:
``` c
ol_result_t olMemAlloc(ol_context_handle_t, ol_device_handle_t, ol_alloc_type_t, size_t, void**);
ol_result_t olMemFree(ol_context_handle_t, void*); ā
ol_result_t olGetMemInfo(ol_context_handle_t, const void*, ol_mem_info_t, size_t, void*);ā
ol_result_t olGetMemInfoSize(ol_context_handle_t, const void*, ol_mem_info_t, size_t*);ā
ol_result_t olCreateQueue(ol_context_handle_t, ol_device_handle_t, ol_queue_handle_t*);
ol_result_t olCreateProgram(ol_context_handle_t, ol_device_handle_t, const void*, size_t, ol_program_handle_t*);
```
You can also take a look at #201398, which contains the first version of
the complete change. I'm cleaning it up as I go, so the patches in this
series are not a direct 1:1 split of that PR.
Commit: 8dfdcfb11624fe3eba614af21aa739fffd7ae94f
https://github.com/llvm/llvm-project/commit/8dfdcfb11624fe3eba614af21aa739fffd7ae94f
Author: Lucas Chollet <lucas.chollet at free.fr>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Driver/ToolChains/Clang.cpp
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
A llvm/test/CodeGen/RISCV/zero-call-used-regs-v.ll
Log Message:
-----------
[RISCV] Add support for vector registers with -fzero-call-used-regs (#206206)
The implementation is quite straightforward. Compared to the FP or GP
register implementations, the main difference is that we need to
configure the vector registers before clearing them.
Now that the backend supports clearing all standard registers, this
patch makes the clang driver accept all -fzero-call-used-regs options.
Commit: bc634a8c98dc0588bcde8f8d37c172841f579ef1
https://github.com/llvm/llvm-project/commit/bc634a8c98dc0588bcde8f8d37c172841f579ef1
Author: Karol Zwolak <karolzwolak7 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
Log Message:
-----------
[NFC] remove const_cast in DebugSSAUpdater (#212192)
#206059 added non-const `getInstruction()` overload so we can drop the
const_cast here.
Commit: cf08d4bc700245f85ce528f6c9f4d9a3fdd316a0
https://github.com/llvm/llvm-project/commit/cf08d4bc700245f85ce528f6c9f4d9a3fdd316a0
Author: blazej-smorawski <56126596+blazej-smorawski at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/include/L0Defs.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Event.h
M offload/plugins-nextgen/level_zero/include/L0Interop.h
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/include/L0Program.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Event.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Memory.cpp
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[offload] Align style of level zero plugin with llvm coding standard (#211762)
This patch does a small cleanup of level zero plugin. Mainly I changed
names of variables to use `CamelCase` whenever they relate to our
internal structures - not objects coming directly from level zero API
etc., so I left some variables and arguments like `zeDevice`, but only
if they are directly related to level zero APIs or structures.
Added a few `auto *` declarations, but again - only when they refer to
our internal objects and not to structures from level zero which might
be pointers underneath, but we use them as transparent objects.
Also did small cleanup of unused headers, making sure that we include
directly what we need rather than use transitive dependencies.
@adurang Please let me know if this patch is okay with you, if you think
this will cause more harm then it's worth I'll close it.
---------
Co-authored-by: Åukasz Plewa <lukasz.plewa at intel.com>
Commit: 1b3d208c77145b670207a646050bbe2cc8aea567
https://github.com/llvm/llvm-project/commit/1b3d208c77145b670207a646050bbe2cc8aea567
Author: Avi Patel <aviipatel06 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/memory
M libcxx/include/version
M libcxx/modules/std/memory.inc
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerequal/owner_equal.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerhash/owner_hash.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_shared_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_equal_weak_ptr.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.weak.obs/owner_hash.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P1901R2: owner_hash and owner_equal for shared_ptr/weak_ptr (#210551)
Fixes #105372.
## Acknowledgements
Claude assisted with test development.
Commit: a744ab39c43cf6ae483bbd72613cf589daaade56
https://github.com/llvm/llvm-project/commit/a744ab39c43cf6ae483bbd72613cf589daaade56
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/www/cxx_dr_status.html
M clang/www/make_cxx_dr_status
Log Message:
-----------
[clang] Update C++ DR status page (#212210)
On top of updating the status page, this PR updates the `latest_release`
constant to 22 and fixes a small `cwg_index.html` parsing issue that
arose during the update.
Commit: 47e51bdd4fc247008a5c9638f99cb073496e7d2e
https://github.com/llvm/llvm-project/commit/47e51bdd4fc247008a5c9638f99cb073496e7d2e
Author: Åukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/liboffload/API/Memory.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfo.cpp
M offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
M offload/unittests/OffloadAPI/memory/olMemAllocAligned.cpp
M offload/unittests/OffloadAPI/memory/olMemFree.cpp
Log Message:
-----------
[offload] Split olMemAlloc to separate functions (#209196)
At the previous community meeting, we agreed to introduce contexts into
the liboffload API. I also mentioned that, as part of this work, we
could split the allocation function into three separate functions, but
we did not discuss this idea in detail.
This patch only splits the allocation functions, allowing us to discuss
and agree on the proposed interface before introducing contexts into the
`olMemAlloc` API.
Once contexts are added, the device parameter will be removed from host
allocations, and the final interface would look like this:
```c
ol_result_t olMemAllocDevice(ol_context_handle_t, ol_device_handle_t, size_t, void **);
ol_result_t olMemAllocHost(ol_context_handle_t, size_t, void **);
ol_result_t olMemAllocManaged(ol_context_handle_t, ol_device_handle_t, size_t, void **);
```
Currently, for host allocations, the device parameter is required mainly
to determine which plugin should perform the allocation. Once contexts
are introduced, this information will be provided by the context, making
the device parameter redundant.
Requiring both a context and a device for host allocations could also be
misleading, since it is unclear what the device parameter actually
represents in this API.
Assisted by: Claude.
Commit: e07c6e6ac477058fd7f897879054e8b2f0e8868b
https://github.com/llvm/llvm-project/commit/e07c6e6ac477058fd7f897879054e8b2f0e8868b
Author: Varad Rahul Kamthe <133588066+varadk27 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/is_fpclass.ll
Log Message:
-----------
[InstCombine][NFC] Reorder isKnownAlways(Mask) check in foldIntrinsicIsFPClass (#212216)
Fixes #189949
The preceding mask-narrowing step already guarantees `Mask` is a subset
of `Known.KnownFPClasses` by the time the old equality check ran, so
`Mask == Known.KnownFPClasses` was already equivalent (see #190504).
This patch replaces that equality check with `Known.isKnownAlways(Mask)`
(matching the SelectionDAG equivalent's naming) and moves it before the
narrowing step, avoiding a redundant worklist re-visit.
Added a regression test in `is_fpclass.ll`.
Commit: b1a6c7d4cf9163b2cb347005e8743400b0d0e4fb
https://github.com/llvm/llvm-project/commit/b1a6c7d4cf9163b2cb347005e8743400b0d0e4fb
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero-unsupported.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-with-success.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop-no-implicit-float.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-dyn-alloca.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-hint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-indexed-load-stores.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-get-dynamic-area-offset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-range.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-xor.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rotr-rotl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-zext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-store-vector-bools.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-threeway-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadd-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usub-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-compress.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xtn.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-zextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner-zext-trunc-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
Log Message:
-----------
[AArch64][GlobalISel] Update legalize tests with concrete types. NFC (#212217)
Commit: 8e374dbdf2ef1cc74eac8880786e79b2b2dd0890
https://github.com/llvm/llvm-project/commit/8e374dbdf2ef1cc74eac8880786e79b2b2dd0890
Author: DonƔt Nagy <donat.nagy at ericsson.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
Log Message:
-----------
[NFC][analyzer] Eliminate NodeBuilder in VisitBlockExpr (#211865)
This is part of the commit series that gradually eliminates the class
`NodeBuilder` from the analyzer engine.
This is a straightforward case where `makeNodeWithBinding` can be
clearly applied.
The node set `Tmp` was superfluous because we can directly pass the node
to `runCheckersForPostStmt` where it will be implicitly converted to a
one-element set. (There are many precedents for this.)
Also notice that we explicitly pass the `State` to `makeNodeWithBinding`
because it can be different from `Pred->getState()` (which would have
been used implicitly by the 4-argument form of `makeNodeWithBinding`.)
Commit: bd3551611ea19adae70a744be8d4f4ec096a114a
https://github.com/llvm/llvm-project/commit/bd3551611ea19adae70a744be8d4f4ec096a114a
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/Transforms/Utils/CloningTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
Log Message:
-----------
[IR][NFC] Rename insertDbgValueIntrinsic -> insertDbgValue (#212151)
Rename `insertDbgValueIntrinsic` to `insertDbgValue`, which is
consistent with the other insert helpers like `insertDbgAssign`,
`insertDeclare`, etc.
Also use debug record instead of intrinsic terminology in doc comments.
Commit: 9facc238463a8b10189534bb9da2e1e2f7503dd6
https://github.com/llvm/llvm-project/commit/9facc238463a8b10189534bb9da2e1e2f7503dd6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
Log Message:
-----------
[SCEV] Avoid building throwaway nodes in SCEVURem_match (NFC) (#212149)
URem matching currently constructs rather complex
`A - ((A udiv B) * B)` expressions just to check if the given expression
is an URem op.
Exit early without building the expression, if neither of the operands
is UDiv.
This gives significant compile-time improvements end-to-end:
* stage1-O3: -0.23%
* stage1-ReleaseThinLTO: -0.24%
* stage1-ReleaseLTO-g: -0.18%
* stage1-aarch64-O3: -0.21%
* stage2-O3: -0.23%
https://llvm-compile-time-tracker.com/compare.php?from=5771cd03344ba3a8df7ed364b6f98451b68fcb30&to=597567670167f7c60be659389bd22b773fbac4ac&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/212149
Commit: cd653d59160ee91fd33b949cc6989c7945d9cdf3
https://github.com/llvm/llvm-project/commit/cd653d59160ee91fd33b949cc6989c7945d9cdf3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A orc-rt/include/orc-rt-c/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add C API for Session::callController. (#212204)
Add orc-rt-c/Session.h with a C API, orc_rt_Session_callController,
wrapping the C++ Session::callController method.
Commit: 1333e0a05d822b96e76d9edf55f1af66e2cbb0b3
https://github.com/llvm/llvm-project/commit/1333e0a05d822b96e76d9edf55f1af66e2cbb0b3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/__locale
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android23.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Remove locale::id::__next_id from the ABI (#210360)
`__next_id` is only ever used inside the dylib, so we can avoid making it public.
Commit: e10674378de70647d666499c6fd7f11a7ee03f6e
https://github.com/llvm/llvm-project/commit/e10674378de70647d666499c6fd7f11a7ee03f6e
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/instructions/ret-single-element-array.ll
Log Message:
-----------
[SPIR-V] Fix direct return of aggregate extractvalue (#209762)
SPIRVPrepareFunctions rewrites aggregate function returns to i32 value
IDs, but an aggregate extractvalue used directly by ret kept its
original type, leaving invalid IR for the verifier. Mutate the lowered
spv_extractv result when it feeds a rewritten return so the LLVM type
matches while the registry preserves the aggregate SPIR-V type.
Closes https://github.com/llvm/llvm-project/issues/208899.
Replaces https://github.com/llvm/llvm-project/pull/209027 (that PR seems
spam? although the diagnosis was largely correct)
Co-authored-by: Claude Fable 5 <noreply at anthropic.com>
Commit: 187d096d44bfabc0a392d0abf1d87123e67f5efb
https://github.com/llvm/llvm-project/commit/187d096d44bfabc0a392d0abf1d87123e67f5efb
Author: Hardik Kumar <hardikxk at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/constexpr.c
Log Message:
-----------
[clang] Fix the StringRef assertion failure for non-narrow strings. (#212108)
StringRef assertion fires up when passing wide literals to
`__builtin_nanf()`.
The patch updates the `TryEvaluateBuiltinNan` method to reject
non-narrow string literals preventing the downstream assertion failure
caused by `getString()` in cases where the user might pass a non-narrow
/ non 1 byte literal."
Fix #205306
Commit: c84136af3d15893fe3f2bc608280ccaa71e18db1
https://github.com/llvm/llvm-project/commit/c84136af3d15893fe3f2bc608280ccaa71e18db1
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/text_encoding
A libcxx/test/libcxx/text/text_encoding/aliases_count.pass.cpp
R libcxx/test/std/text/text_encoding/test_text_encoding.h
M libcxx/test/std/text/text_encoding/text_encoding.ctor/id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.ctor/string_view.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.eq/equal.id.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/empty.pass.cpp
M libcxx/test/std/text/text_encoding/text_encoding.members/text_encoding.aliases_view/operator-bool.pass.cpp
M libcxx/test/support/module.modulemap
A libcxx/test/support/test_text_encoding.h
Log Message:
-----------
[libc++] Inline `text_encoding` alias offset table std::count to 884 (#207471)
- Add count test to verify the exact number of aliases our table
contains
- Should reduce compile time cost of gathering that count
Commit: 42b4ee6383e340c4c3ab4cfddd17f864ab331e0d
https://github.com/llvm/llvm-project/commit/42b4ee6383e340c4c3ab4cfddd17f864ab331e0d
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/HowToReleaseLLVM.rst
Log Message:
-----------
docs: Adjust HowToReleaseLLVM to include man page signing (#210092)
This adds documentation on how to sign man pages.
Commit: f92e977a8e76a0e40e3af255f13c30b6710fd871
https://github.com/llvm/llvm-project/commit/f92e977a8e76a0e40e3af255f13c30b6710fd871
Author: Chibuoyim (Wilson) Ogbonna <ogbonnachibuoyim12 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/roundtrip.mlir
Log Message:
-----------
[MLIR][Linalg] Fix crash on duplicate dimensions in linalg.broadcast (#211203)
per
[#210738](https://github.com/llvm/llvm-project/pull/210738#discussion_r3622744153)
Currently, the following crashes on verification with a segfault:
```
func.func @broadcast_rank0_tensor(%arg0: tensor<i32>, %arg1: tensor<32x2xi32>) -> tensor<32x2xi32> {
%0 = linalg.broadcast ins(%arg0 : tensor<i32>) outs(%arg1 : tensor<32x2xi32>) dimensions = [0, 0]
return %0 : tensor<32x2xi32>
}
```
The verifier should reject cases like this where we have a duplicate
dimension. I've also added a couple of tests covering `linalg.broadcast`
on various input scenarios to confirm they are being handled properly.
Commit: 08c7b4203815b3502c04ecb9cd8b6dae21fc5661
https://github.com/llvm/llvm-project/commit/08c7b4203815b3502c04ecb9cd8b6dae21fc5661
Author: Åukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.h
Log Message:
-----------
[offload] update llvm-gpu-loader the new liboffload allocation API (#212225)
PR #209196 split host memory allocations into a dedicated API. Update
llvm-gpu-loader to use the new host allocation function introduced by
that change.
Commit: dcfadf69caf127b021c3f7de0c8abc0e45bb3b64
https://github.com/llvm/llvm-project/commit/dcfadf69caf127b021c3f7de0c8abc0e45bb3b64
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/ThreadPoolRunner.h
M orc-rt/lib/executor/ThreadPoolRunner.cpp
M orc-rt/test/unit/ThreadPoolRunnerTest.cpp
Log Message:
-----------
[orc-rt] Make ThreadPoolRunner a generic task runner. (#212229)
Commit 01683dbe7e207 generalized the Session's dispatch mechanism to
hand each runner an opaque Task (move_only_function<void()>), and
simplified QueueingRunner accordingly, but failed to update
ThreadPoolRunner.
Update ThreadPoolRunner to conform to Session's dispatch requirements
and update its unit test to dispatch plain tasks rather than
wrapper-function calls.
Commit: 2f60c93e01321a0434f8a3ad4f88afed9f35a583
https://github.com/llvm/llvm-project/commit/2f60c93e01321a0434f8a3ad4f88afed9f35a583
Author: Åukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libsycl/src/usm_functions.cpp
Log Message:
-----------
[SYCL] Update SYCL to use the new liboffload allocation API (#212223)
PR #209196 split host memory allocations into a dedicated API. Update
SYCL to use the new host allocation function introduced by that change.
Commit: a48aefd6ea9404916b0efa53942cbeae2d9781ff
https://github.com/llvm/llvm-project/commit/a48aefd6ea9404916b0efa53942cbeae2d9781ff
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/NonUniformIdx/RWBufferNonUniformIdxLoop.ll
Log Message:
-----------
[SPIR-V] Guard against infinite loop in decorateUsesAsNonUniform (#208224)
Add a visited set so an SSA cycle through a loop-carried phi does not
hang the worklist walk
Commit: d7acf8cb4c00560d7f31eabd869a0a8d8fc7e313
https://github.com/llvm/llvm-project/commit/d7acf8cb4c00560d7f31eabd869a0a8d8fc7e313
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
A llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-interference.mir
Log Message:
-----------
[InlineSpiller] Avoid spill hoisting interference (#211809)
When hoisting spills and the source is a PHI, the "hoisted" spill may be
inserted only after the basic block prologue. This may require extending
this segment of the source value's live interval.
Abort the hoisting if this extension of the segment would interfere with
another live interval assigned to the same physical register.
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 225e988b3d9e3bd05a0a79e071f07d22f1f1e0ad
https://github.com/llvm/llvm-project/commit/225e988b3d9e3bd05a0a79e071f07d22f1f1e0ad
Author: Romanov Vlad <Vladislav.Romanov at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-regalloc.mir
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-sched.mir
Log Message:
-----------
[AMDGPU] Add per-class register stress options (#210907)
Add options -amdgpu-stress-vgpr=N, -amdgpu-stress-agpr=N, and
-amdgpu-stress-sgpr=N to limit each register class independently by
reserving registers beyond N.
Commit: 3ca666f496681600f5528f4346c0303dd1171230
https://github.com/llvm/llvm-project/commit/3ca666f496681600f5528f4346c0303dd1171230
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/test/CodeGen/SystemZ/memmove-01.ll
Log Message:
-----------
[SystemZ] Improve handling of memmoves. (#196285)
Handle memmoves of constant lengths up to 256 bytes with target
instructions instead of libcall.
Commit: aa50eb69d6eba1bcdfe6d3a15f0b9b8e278e828b
https://github.com/llvm/llvm-project/commit/aa50eb69d6eba1bcdfe6d3a15f0b9b8e278e828b
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/DebugInfo/Generic/debug-info-qualifiers.ll
M llvm/test/DebugInfo/Generic/dwarf5-debug-info-static-member.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/incorrect-variable-debugloc.ll
M llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
M llvm/test/DebugInfo/Generic/namespace.ll
M llvm/test/DebugInfo/Generic/varargs.ll
M llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/X86/align_cpp11.ll
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/string-offsets-multiple-cus.ll
M llvm/test/DebugInfo/X86/string-offsets-table.ll
Log Message:
-----------
[DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (#211536)
RFC
https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544
This patch proposes to move the emission of types and type-like entities
from `DwarfDebug::beginModule()` to `DwarfDebug::endModule()`.
Effectively, this changes nothing but the order of debug entities in the
resulting DWARF.
This is needed to simplify DWARF emission in a context of proper support
of function-local types, making all the types handled in a single place,
together with other global and local entities.
This change has already been reviewed and approved in
https://reviews.llvm.org/D144008, but Iām opening a new PR for
visibility.
Co-authored-by: Kristina Bessonova <kbessonova at accesssoftek.com>
Commit: 0695ea8d442c3271634892a7bec78b3b3a4368b9
https://github.com/llvm/llvm-project/commit/0695ea8d442c3271634892a7bec78b3b3a4368b9
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/TableGen/TGLexer.cpp
A llvm/test/TableGen/eof-after-endif.td
Log Message:
-----------
[TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (#208961)
Part of #151476
prepSkipRegion currently scans a line until it finds a newline before
advancing to the next line. It crashes if it finds an EOF first. This
change checks for EOF to prevent a segmentation fault.
Commit: 6bb73fd3e418d1bade9050776ddb6a8f84a8bfb3
https://github.com/llvm/llvm-project/commit/6bb73fd3e418d1bade9050776ddb6a8f84a8bfb3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/StringExtras.h
Log Message:
-----------
[orc-rt] Fix maybe_unused attribute. (#212237)
Commit: 98d41d2f75395ab1f91198f2493cff62a33b80c1
https://github.com/llvm/llvm-project/commit/98d41d2f75395ab1f91198f2493cff62a33b80c1
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/include/lldb/Utility/Environment.h
M lldb/source/Plugins/Platform/Windows/CMakeLists.txt
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.h
A lldb/source/Plugins/Platform/Windows/PlatformWindowsProperties.td
A lldb/test/API/windows/debug-heap/Makefile
A lldb/test/API/windows/debug-heap/TestWindowsDebugHeap.py
A lldb/test/API/windows/debug-heap/main.c
Log Message:
-----------
[lldb][Windows] Disable debug heap by default (#212126)
This disables Windows' default debug heap when launching a process.
The motivation is similar to what Microsoft wrote on their [blog post
for Visual Studio
2015](https://devblogs.microsoft.com/cppblog/c-debugging-improvements-in-visual-studio-14/)
where they disabled it: The debug heap comes with a performance cost and
the [C runtime already does some heap
checking](https://learn.microsoft.com/en-us/cpp/c-runtime-library/crt-debug-heap-details?view=msvc-170).
Towards #201690. Notably, lldb-dap won't set this when launching in a
terminal. I think we'd want an option similar to `disableASLR` for
lldb-dap.
Commit: 456e73ff83e0ea352509d9fb687660bd3c2eb390
https://github.com/llvm/llvm-project/commit/456e73ff83e0ea352509d9fb687660bd3c2eb390
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-umin.ll
Log Message:
-----------
[SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (#212008)
In the test `switch_remove_dead_cases`, both case 4 and case 5 jump into
bb `%case_ret`. Thus, the edge will be removed twice, triggering an
assertion failure. This patch only removes the edge in DT when we remove
the last edge to `DeadCaseBB`.
Commit: e2b23dbda6551c81377ae712749c58c27eefb857
https://github.com/llvm/llvm-project/commit/e2b23dbda6551c81377ae712749c58c27eefb857
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/AArch64/clmul.ll
Log Message:
-----------
[AArch64] Test all cost kinds in clmul tests. NFC (#212246)
Commit: b10d4473a01e77ef0c973d29610ebc81c5a20c1a
https://github.com/llvm/llvm-project/commit/b10d4473a01e77ef0c973d29610ebc81c5a20c1a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/opencl/vload_halfn.ll
Log Message:
-----------
[SPIR-V] Fix vloada_halfn builtin number (#212218)
vloada_halfn was incorrectly mapped to vload_half builtin number (174)
instead of its own (179), causing it to demangle to the wrong OpenCL
builtin
Commit: c18296f5db60be977366a42f044a623b557f5dd2
https://github.com/llvm/llvm-project/commit/c18296f5db60be977366a42f044a623b557f5dd2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
Log Message:
-----------
DAG: Canonicalize undef shuffle operands and results to poison (#212102)
Commit: 8c835ee87def288eca2587293499008dce54c4e7
https://github.com/llvm/llvm-project/commit/8c835ee87def288eca2587293499008dce54c4e7
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
Log Message:
-----------
[VectorCombine] Align shrinkLoadForShuffles to register boundaries (#209775)
Round up the shrunk load element count to the next full vector register
boundary to avoid scalar remainders that prevent shuffle lowering.
For example, on X86 AVX-512 a <16 x double> load with shuffle indices
1-8 was shrunk to <9 x double>. This legalizes to v8f64 + scalar f64,
and the scalar operand in BUILD_VECTOR prevents DAGCombiner from folding
it into a VECTOR_SHUFFLE, producing ~15 instructions instead of 2
(VMOVDQA64 + VALIGNQ).
Commit: bd9e922d448ce6a492b1b323c359b7c8a4030ad9
https://github.com/llvm/llvm-project/commit/bd9e922d448ce6a492b1b323c359b7c8a4030ad9
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libc/src/string/memory_utils/aarch64/inline_memmove.h
Log Message:
-----------
[libc][AArch64] Avoid -Wshadow warnings about uint128_t etc (#212227)
`aarch64/inline_memset.h` defines type aliases `uint128_t`, `uint256_t`
and `uint512_t` at file scope. `aarch64/inline_memmove.h`, alongside it,
defines the same aliases at function scope. If both headers are included
by the same source file, this can lead to a warning about the
function-scope aliases shadowing the file-scope ones, which turns into a
compile error if you build with `clang -Werror -Wshadow`.
Commit a81db64570f94c2 (PR #210895) exposed this latent compile failure,
by making `CPP/string.h` include both files. But there's nothing wrong
with that, so the right fix is to make it _safe_ to include both files,
not to stop doing it.
This commit moves the function-scope aliases in memmove up to file
scope. That makes them duplicate definitions in the _same_ scope, which
doesn't cause the same error.
Other options would be to move the memset aliases down into function
scope (duplicating them in two functions), or to move them into a tiny
AArch64-specific header file with an include guard. Both of those are
more intrusive than this fix.
Commit: acf113c195682ec3eceafd9a0023f1e8401e71c9
https://github.com/llvm/llvm-project/commit/acf113c195682ec3eceafd9a0023f1e8401e71c9
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
Log Message:
-----------
[lldb][Windows] Preserve breakpoint locations across process exit (#212219)
`ProcessWindows::OnExitProcess` unloads the executable module with
`delete_locations=true`, which deletes the target's breakpoint locations
when the debuggee exits. Other platforms keep them, so inspecting a
breakpoint after the process died returns no location on Windows.
Pass `delete_locations=false` to match the other platforms.
Commit: 0a75f1f77fe54e9e366e48f78c9865aee8839809
https://github.com/llvm/llvm-project/commit/0a75f1f77fe54e9e366e48f78c9865aee8839809
Author: Serafean <martin at serafean.cz>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/test/Index/cxx14-lambdas.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[libclang]Visit lambda init-capture as VarDeclaration (#174116)
```
int foo(){
int i = 42;
int j = 43;
auto l1 = [x = i, &j ](){};
}
```
in the lambda capture:
- `x` is visited as VariableRef (referencing an unvisited VarDecl at the
same location)
- `i` is visited as DelcRefExpr (fair enough, same as in an assignment)
- `j` is visited as VariableRef
Visit `x` as a `VarDecl`, and stop visiting it as a `VariableRef`, as it
makes no sense (referencing itself at an unvisited cursor).
---------
Co-authored-by: Serafean <Serafean at users.noreply.github.com>
Commit: 26480c7d1678fbea8e7b1cd064775d0f48649f91
https://github.com/llvm/llvm-project/commit/26480c7d1678fbea8e7b1cd064775d0f48649f91
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
Log Message:
-----------
AMDGPU/GlobalISel: Test for cs_chain argument from G_EXTRACT_VECTOR_ELT (#212247)
This is a bug since G_EXTRACT_VECTOR_ELT will end up with a register
class on the dst operand. The combiner will crash because of it.
Commit: be2e6bc89a8a9f421bbc50c72425a2c7436c604d
https://github.com/llvm/llvm-project/commit/be2e6bc89a8a9f421bbc50c72425a2c7436c604d
Author: Romanov Vlad <Vladislav.Romanov at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
A llvm/test/CodeGen/AMDGPU/mfma-no-multiple-copies.mir
A llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
Log Message:
-----------
[AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (#209179)
When multiple VGPR-requiring uses of an MFMA dst are in the
same block as the MFMA, share a single AGPR->VGPR copy placed
before the earliest use, instead of creating one per use.
Commit: 4fbefd6025ca1a9e12683a766dbbbeadd2861136
https://github.com/llvm/llvm-project/commit/4fbefd6025ca1a9e12683a766dbbbeadd2861136
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/large-system-growth.ll
M llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
M llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll
Log Message:
-----------
[ConstraintElim] Skip decomposition if precondition does not hold. (#212140)
Currently we fully decompose expressions, collect all preconditions and
then bail out if any precondition is false. This means we miss out on
simplifications in cases where the precondition does not hold, but we could
still reason about the un-decomposed sub-expression.
This patch updates `decompose` to take the constraint system as argument
instead and eagerly check preconditions. If the precondition does not hold,
we don't decompose the sub-expression and don't further recurse, but simply
treat the sub-expression as variable.
This improves results in some cases
(https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/794)
and is also slightly cheaper (or neutral) in most cases compile-time
wise, as we cut off decomposition before recursing further. The number of queries
for preconditions overall should stay the same
PR: https://github.com/llvm/llvm-project/pull/212140
Commit: 8a3d15b952636489a14e1244fdfe871b730d67d7
https://github.com/llvm/llvm-project/commit/8a3d15b952636489a14e1244fdfe871b730d67d7
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 98d41d2 (#212244)
This fixes 98d41d2f75395ab1f91198f2493cff62a33b80c1 (#212126).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=98d41d2f75395ab1f91198f2493cff62a33b80c1
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 919919c80a834405a2908525372c754c03f47606
https://github.com/llvm/llvm-project/commit/919919c80a834405a2908525372c754c03f47606
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Platform/Windows/BUILD.gn
Log Message:
-----------
[gn] port 98d41d2f75395a (PlatformWindowsProperties.td) (#212257)
Commit: 6ca0e4a67193836fe696eb0273d523da1950cfda
https://github.com/llvm/llvm-project/commit/6ca0e4a67193836fe696eb0273d523da1950cfda
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-llvm-invalid.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-simd-guided.mlir
M mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
Log Message:
-----------
[mlir][OpenMP] Fix update of linear iteration variables (#183800)
The final value of a linear iteration variable must be the loop
limit_value + step. Before this patch it was limit_value.
Fixes #170784.
Commit: 7e607a0931394460ab9f4994f6928553da13e472
https://github.com/llvm/llvm-project/commit/7e607a0931394460ab9f4994f6928553da13e472
Author: muhammadshayanasim1-web <muhammadshayanasim1 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-masked_load.ll
Log Message:
-----------
[InstCombine] Copy metadata in select-to-masked.load fold (#211965)
Preserve AA metadata when folding select of masked.load to masked.load.
We cannot preserve value metadata, as it may not be valid for the new
passthru.
Fixes #209022.
Assisted-by: Claude
Commit: f613ead38efdc327c78d4b00f9195e84092c2d57
https://github.com/llvm/llvm-project/commit/f613ead38efdc327c78d4b00f9195e84092c2d57
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix cs_chain use of constrainOperandRegClass (#212248)
Make a copy before constraining to avoid setting register class on
a register that can be defined by generic opcode.
Commit: 491f16472b0f08ed72481b671c1470c6de953fa0
https://github.com/llvm/llvm-project/commit/491f16472b0f08ed72481b671c1470c6de953fa0
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/lib/Lower/ConvertExprToHLFIR.cpp
A flang/test/Lower/HLFIR/elemental-array-constant-shape.f90
M flang/test/Lower/HLFIR/matmul.f90
Log Message:
-----------
[flang][hlfir] Prefer a constant-shape operand for elemental array results (#209791)
Elemental operands are conformable, so their extents are identical and
the result shape may be taken from either operand. This patch prefers an
operand whose shape is a compile-time constant, producing a statically
shaped result. The left operand is checked first to avoid churn in lit
test expectations.
Commit: d6b8c83138892bd64d33e44102e0aed6cfe3556f
https://github.com/llvm/llvm-project/commit/d6b8c83138892bd64d33e44102e0aed6cfe3556f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Change return type of ConstraintTy::empty to bool (NFC) (#212259)
empty() returns a bool, fix return type as pointed out in
https://github.com/llvm/llvm-project/pull/212140.
Commit: 750ed0a8239147a5ce81eb31d54591c2b01b8e8f
https://github.com/llvm/llvm-project/commit/750ed0a8239147a5ce81eb31d54591c2b01b8e8f
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
A flang/test/Driver/openmp-target-fast-flag.f90
Log Message:
-----------
[Flang][OpenMP] Add support for -fopenmp-target-fast (#212181)
The `-fopenmp-target-fast` is a meta flag that enables several
optimizations for device code.
Commit: 07dfc602db220f015fab975248d3376a5ffe03f7
https://github.com/llvm/llvm-project/commit/07dfc602db220f015fab975248d3376a5ffe03f7
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Parser/OpenMP/metadirective-v50.f90
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[flang][OpenMP] Split DEFAULT into DEFAULT(dsa) and DEFAULT(variant) (#212128)
The 5.0 and 5.1 specs used DEFAULT clause for what is now OTHERWISE.
Separate these two claues to be able to specify their properties
independently.
Commit: a0710105925b8455f38fd861712279d04f656d4c
https://github.com/llvm/llvm-project/commit/a0710105925b8455f38fd861712279d04f656d4c
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
A llvm/test/Analysis/HashRecognize/def-use-chains-visited.ll
R llvm/test/Analysis/HashRecognize/dig-recurrence.ll
Log Message:
-----------
[HashRecognize] Fix two more compiler hangs on dense use-def chains (#211887)
The bug in `digRecurrence` fixed by #211711 applies to
`isConditionalOnXorOfPHIs` and `containsUnreachable` as well. Implement
a fix for both using the same approach.
- `isConditionalOnXorOfPHIs` hang: https://godbolt.org/z/jo8eMvoeY
- `containsUnreachable` hang: https://godbolt.org/z/Eeo89W6qW
Assisted-by: Claude Opus 5
Commit: 3d20ba7135d93de7a6cd7db5a196c41d25e391a7
https://github.com/llvm/llvm-project/commit/3d20ba7135d93de7a6cd7db5a196c41d25e391a7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++][NFC] Use [[deprecated]] for __grow_by (#209126)
`__grow_by` is an internal function, and we deprecated it to avoid
accidental use of it inside the library. `_LIBCPP_DEPRECATED_` is meant
for user-configuration, which doesn't apply here.
Fixes #124940
Commit: 92cdb9dc836e24705c46b77ebabf4f3596a56998
https://github.com/llvm/llvm-project/commit/92cdb9dc836e24705c46b77ebabf4f3596a56998
Author: Gang Chen <gangc at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenHIP/builtins-amdgcn-prefetch.hip
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
[AMDGPU] Add amdgcn builtin for s_prefetch_inst (#211642)
Commit: 39d3b9344f4796e963d8d73bfd1e7cd3014d1fe6
https://github.com/llvm/llvm-project/commit/39d3b9344f4796e963d8d73bfd1e7cd3014d1fe6
Author: Alex Strelnikov <strel at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/time.yaml
M libc/src/time/CMakeLists.txt
A libc/src/time/strptime.cpp
A libc/src/time/strptime.h
M libc/test/src/time/CMakeLists.txt
A libc/test/src/time/strptime_test.cpp
Log Message:
-----------
[libc] Add stub implementation for strptime. (#211088)
This PR adds a stub for `strptime` under
`LLVM_LIBC_ENABLE_EXPERIMENTAL_ENTRYPOINTS` for x86_64 and aarch64 as a
first step in implementing the function.
Commit: 6baa9c9ac22c60e00471c6412387b5a48aa12e3e
https://github.com/llvm/llvm-project/commit/6baa9c9ac22c60e00471c6412387b5a48aa12e3e
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
Log Message:
-----------
[lldb][Mach-O] Fix null __LINKEDIT deref in ParseSymtab for shared cache images (#207448)
`ObjectFileMachO::ParseSymtab`, when handling a local shared cache image
(`MH_DYLIB_IN_CACHE` set and not read from memory), unconditionally
called
`linkedit_section_sp->GetFileOffset()` to slide the load command
offsets.
If the Mach-O has no `__LINKEDIT` segment, `FindSectionByName` returns a
`null` SectionSP, and this is a member call on a null pointer (caught by
UBSan;
crashes in release builds).
```
* thread #1, queue = 'com.apple.main-thread', stop reason =
EXC_BAD_ACCESS (code=1, address=0x68)
* frame #0: 0x0000000100121ff0 ObjectFileMachOTests`lldb_private::Section::GetFileOffset(this=0x0000000000000000) const at Section.h:181:49 [opt] [inlined]
frame #1: 0x0000000100121ff0 ObjectFileMachOTests`ObjectFileMachO::ParseSymtab(this=0x00000001055616b0, symtab=
0x000000016fdfe988) at ObjectFileMachO.cpp:2353:59 [opt]
```
Guard the shared-cache slide branch with a null check on
`linkedit_section_sp`, matching the existing guard used on the in-memory
path.
Found by lldb-target-fuzzer.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: e4c07b9c57952cd099d72985044f70e0e6f02756
https://github.com/llvm/llvm-project/commit/e4c07b9c57952cd099d72985044f70e0e6f02756
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
Log Message:
-----------
[AArch64] Rename SVEShuffleOpts to AArch64SVEShuffleOpts
To be more consistent with other AArch64 passes and other CodeGen passes
in general which are almost always prefixed with the name of the target
(and ideally will be once we finish the NewPM transition).
Reviewers: davemgreen, huntergr-arm, paulwalker-arm
Pull Request: https://github.com/llvm/llvm-project/pull/211876
Commit: dd32eae8187d88b902a5a3b988f39d06d86cd797
https://github.com/llvm/llvm-project/commit/dd32eae8187d88b902a5a3b988f39d06d86cd797
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/AssignGUID.h
Log Message:
-----------
[ThinLTO] Mark AssignGUIDPass as RequiredPassInfoMixin
PassInfoMixin is going away, so switch to RequiredPassInfoMixin and
remove the explicit isRequired implementation.
Reviewers: mtrofin, orodley
Pull Request: https://github.com/llvm/llvm-project/pull/211987
Commit: c44443f22b6f4f345e20cf947d26e873036923bf
https://github.com/llvm/llvm-project/commit/c44443f22b6f4f345e20cf947d26e873036923bf
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/AArch64SME.md
M llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUAsyncOperations.md
M llvm/docs/AMDGPUDMAOperations.md
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUExecutionSynchronization.md
M llvm/docs/AMDGPUInstructionNotation.rst
M llvm/docs/AMDGPUInstructionSyntax.rst
M llvm/docs/AMDGPUMemoryModel.md
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUOperandSyntax.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AddingConstrainedIntrinsics.md
M llvm/docs/AdvancedBuilds.md
M llvm/docs/AliasAnalysis.md
M llvm/docs/Atomics.md
M llvm/docs/BigEndianNEON.md
M llvm/docs/BitCodeFormat.md
M llvm/docs/BlockFrequencyTerminology.rst
M llvm/docs/BranchWeightMetadata.rst
M llvm/docs/BugLifeCycle.rst
M llvm/docs/BuildingADistribution.md
M llvm/docs/CFIVerify.md
M llvm/docs/CMake.md
M llvm/docs/CMakePrimer.rst
M llvm/docs/CodeGenerator.md
M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/docs/CommandGuide/llvm-pdbutil.rst
M llvm/docs/CommandLine.md
M llvm/docs/CompileCudaWithLLVM.md
M llvm/docs/CompilerWriterInfo.md
M llvm/docs/Contributing.md
M llvm/docs/ConvergenceAndUniformity.rst
M llvm/docs/ConvergentOperations.rst
M llvm/docs/Coroutines.md
M llvm/docs/CoverageMappingFormat.md
M llvm/docs/CycleTerminology.md
M llvm/docs/DTLTO.md
M llvm/docs/DependenceGraphs/index.rst
M llvm/docs/DeveloperPolicy.md
M llvm/docs/DirectX/DXContainer.rst
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/docs/DirectX/DXILOpTableGenDesign.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/ExceptionHandling.md
M llvm/docs/Extensions.md
M llvm/docs/FAQ.md
M llvm/docs/FatLTO.rst
M llvm/docs/FaultMaps.rst
M llvm/docs/Frontend/PerformanceTips.md
M llvm/docs/FuzzingLLVM.rst
M llvm/docs/GarbageCollection.md
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingInvolved.md
M llvm/docs/GettingStarted.md
M llvm/docs/GettingStartedVS.md
M llvm/docs/GitHub.md
M llvm/docs/GlobalISel/GMIR.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/GlobalISel/IRTranslator.rst
M llvm/docs/GlobalISel/MIRPatterns.rst
M llvm/docs/GlobalISel/index.rst
M llvm/docs/GwpAsan.rst
M llvm/docs/HowToReleaseLLVM.rst
M llvm/docs/HowToSetUpLLVMStyleRTTI.rst
M llvm/docs/HowToUpdateDebugInfo.md
M llvm/docs/HowToUseAttributes.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/InstCombineContributorGuide.md
M llvm/docs/InstrProfileFormat.md
M llvm/docs/Instrumentor.md
M llvm/docs/JITLink.md
M llvm/docs/KernelInfo.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.md
M llvm/docs/LibFuzzer.md
M llvm/docs/LinkTimeOptimization.md
M llvm/docs/LoopTerminology.md
M llvm/docs/MIRLangRef.md
M llvm/docs/MLGO.rst
M llvm/docs/MarkedUpDisassembly.rst
M llvm/docs/MemProf.md
M llvm/docs/MemTagSanitizer.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/MemorySSA.md
M llvm/docs/MergeFunctions.md
M llvm/docs/MisExpect.rst
M llvm/docs/MyFirstTypoFix.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/NewPassManager.md
M llvm/docs/ORCv2.md
M llvm/docs/OptBisect.rst
M llvm/docs/PCSectionsMetadata.rst
M llvm/docs/PDB/CodeViewSymbols.rst
M llvm/docs/PDB/CodeViewTypes.rst
M llvm/docs/PDB/DbiStream.rst
M llvm/docs/PDB/HashTable.rst
M llvm/docs/PDB/ModiStream.rst
M llvm/docs/PDB/MsfFile.rst
M llvm/docs/PDB/PdbStream.rst
M llvm/docs/PDB/TpiStream.rst
M llvm/docs/PDB/index.rst
M llvm/docs/Passes.md
M llvm/docs/ProgrammersManual.md
M llvm/docs/ProjectGovernance.md
M llvm/docs/Projects.rst
M llvm/docs/Proposals/GitHubMove.rst
M llvm/docs/Proposals/TestSuite.rst
M llvm/docs/Proposals/VariableNames.rst
M llvm/docs/Proposals/VectorPredication.rst
M llvm/docs/RFCProcess.md
M llvm/docs/RISCV/RISCVVCIX.rst
M llvm/docs/RISCV/RISCVVectorExtension.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/Reference.md
M llvm/docs/ReleaseNotes.md
M llvm/docs/ReleaseProcess.rst
M llvm/docs/Remarks.md
M llvm/docs/SPIRVUsage.md
M llvm/docs/SandboxVectorizer.md
M llvm/docs/ScudoHardenedAllocator.rst
M llvm/docs/SegmentedStacks.rst
M llvm/docs/SourceLevelDebugging.md
M llvm/docs/SphinxQuickstartTemplate.md
M llvm/docs/StackMaps.rst
M llvm/docs/Statepoints.rst
M llvm/docs/SymbolizerMarkupFormat.rst
M llvm/docs/TableGen/BackEnds.rst
M llvm/docs/TableGen/BackGuide.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/docs/TableGen/index.md
M llvm/docs/Telemetry.rst
M llvm/docs/TestingGuide.md
M llvm/docs/TransformMetadata.rst
M llvm/docs/UndefinedBehavior.rst
M llvm/docs/UserGuides.md
M llvm/docs/VectorizationPlan.rst
M llvm/docs/Vectorizers.md
M llvm/docs/WritingAnLLVMBackend.md
M llvm/docs/WritingAnLLVMNewPMPass.md
M llvm/docs/WritingAnLLVMPass.md
M llvm/docs/XRay.rst
M llvm/docs/XRayExample.rst
M llvm/docs/XRayFDRFormat.rst
M llvm/docs/YamlIO.rst
A llvm/docs/_static/LLVMWyvernSmall.png
A llvm/docs/_static/copybutton.css
A llvm/docs/_static/copybutton.js
A llvm/docs/_static/custom.css
M llvm/docs/conf.py
M llvm/docs/tutorial/BuildingAJIT1.rst
M llvm/docs/tutorial/BuildingAJIT2.rst
M llvm/docs/tutorial/BuildingAJIT3.rst
M llvm/docs/tutorial/BuildingAJIT4.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl01.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl02.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl03.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl05.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl06.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl09.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl10.rst
Log Message:
-----------
[Docs] Reland Furo theme for LLVM docs (#211993)
Relands https://github.com/llvm/llvm-project/pull/184440 which was
reverted in https://github.com/llvm/llvm-project/pull/208619 because of
doc generation slowness.
The main root cause (https://github.com/llvm/llvm-project/issues/208786)
has been addressed, so attempting a reland at this point.
As before, Furo output at
https://nigham.github.io/llvm_docs_furo/LangRef.html
Comparing the generation times for "Build LLVM docs" step, this PR took
< 3m vs > 15m for the previous reverted PR.
Commit: 7f46263d2b6c01ee41ba7973b0c6c825f77cc8e2
https://github.com/llvm/llvm-project/commit/7f46263d2b6c01ee41ba7973b0c6c825f77cc8e2
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/SyntheticSections.cpp
Log Message:
-----------
[NFC][ELF] Use hasPhdrsCommands() wrapper instead of direct access (#212273)
This is the only place outside of LinkerScript/ScriptParser that
directly accesses the phdrsCommands member, introduced in 5a58e98c2018
("[ELF] Align the end of PT_GNU_RELRO associated PT_LOAD to a
common-page-size boundary (#66042)").
Commit: cbf48349e3e1cc0fe7944090cc825532d75b6c3e
https://github.com/llvm/llvm-project/commit/cbf48349e3e1cc0fe7944090cc825532d75b6c3e
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
Log Message:
-----------
[NFC][ELF][PPC64] Pass address not offset to writePPC64LoadAndBranch (#212275)
Every caller currently subtracts the TOC base in its argument, so move
that into common code inside writePPC64LoadAndBranch. This will also
allow a different computation to be used in some cases in a future
commit.
Note that offset is now unsigned not signed; even previously, all
arguments were uint64_t, and all uses are unsigned, so making it signed
doesn't make much sense.
Commit: 0d70ca384090b709eb651fe4ea43398d591e4711
https://github.com/llvm/llvm-project/commit/0d70ca384090b709eb651fe4ea43398d591e4711
Author: Sadaf Ebrahimi <sadafebrahimi at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
Log Message:
-----------
[scudo] Add unmap and eviction stats to Secondary
Track and print stats on the number of memory unmaps and cache evictions
in the MapAllocator. These statistics track total unmaps, as well as
unmaps triggered by exceeding the maximum cache entry size or the
maximum number of entries in the cache.
Commit: 30603f527e689520ab6b3166c8c8168bcee6202c
https://github.com/llvm/llvm-project/commit/30603f527e689520ab6b3166c8c8168bcee6202c
Author: jinge90 <ge.jin at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
Update image sha256 for libc fullbuild tests (#212168)
Commit: 2af577aab9be88a2669f1b31a354c57e3509b45e
https://github.com/llvm/llvm-project/commit/2af577aab9be88a2669f1b31a354c57e3509b45e
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
Log Message:
-----------
[lldb][DIL] Fix size check when assigning a signed value with DIL (#207404)
The DIL assignment path (`frame variable 'lhs = rhs'`) routes through
`ValueObject::SetValueFromInteger`, which verifies that the new value
fits
in the destination type before writing it. That size check compared the
source `APInt`'s raw 64-bit word, treated as an unsigned value, against
the
destination type's unsigned maximum:
```
uint64_t u_max = (1 << (byte_size * CHAR_BIT)) - 1;
if (*(value.getRawData()) > u_max)
return llvm::createStringError("Illegal argument: new value is too big");
```
This is wrong in both directions:
* Small negative values that fit are rejected. A literal such as `-2`
has a
32-bit `APInt` of `0xFFFFFFFE`, whose raw word is `0xFFFFFFFFFFFFFFFE`.
Compared as unsigned against a short's `0xFFFF` it looks "too big", so
```
(lldb) frame variable 's = -2'
error: Illegal argument: new value is too big
```
even though -2 fits a `short`.
* Positive values that overflow the signed range are accepted and
silently
wrap and stored a value that displayed as `-32768`.
```
(lldb) frame variable 's = 32768'
(short) s = -32768
```
Check the number of significant bits with respect to the destination's
signedness instead: `getSignificantBits()` for a signed destination and
`getActiveBits()` for an unsigned one. This accepts the valid range
(`[-32768, 32767]` for a signed short) and rejects everything outside
it.
Also extend the value before building the `DataExtractor` used to write
it.
The extractor reads exactly `byte_size` bytes from the `APInt`'s raw
storage,
so a value narrower than the destination must be extended to cover the
full
read. Use a sign extension so negative values keep their value in the
wider
destination.
Extends the DIL assignment API test (`TestFrameVarDILAssign`) to cover
assigning negative and boundary values to the existing `short` variable:
`-2`, `-4` (from `int j`), and the `[-32768, 32767]` boundaries are
accepted,
while `32768` and `-32769` are rejected. Without the fix these
narrow-type
assignments either fail with "new value is too big" or silently wrap.
Commit: ce8a458b1bb954af613972ac5f914ac41b6710f1
https://github.com/llvm/llvm-project/commit/ce8a458b1bb954af613972ac5f914ac41b6710f1
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
Log Message:
-----------
[AMDGPU][True16] Apply v2s copies to non-def operand 0 (#212261)
`legalizeOperandsVALUt16` iterates over all operands except for the
zeroth one, as the zeroth one is typically a definition. However, if the
zeroth operand is an input (e.g., for a `V_CMP`), then this causes the
compiler to generate illegal machine code.
This patch extends `legalizeOperandsVALUt16` to apply also to the zeroth
operand, guarding for when this operand is a definition.
Commit: 3d822156e54ddff4ba60d7d338df910c12b90a8f
https://github.com/llvm/llvm-project/commit/3d822156e54ddff4ba60d7d338df910c12b90a8f
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Fix compiler crash on missing latch compare instruction (#211895)
It is never checked whether a candidate loop `L` is latched by a compare
instruction, yet `L.getLatchCmpInst()` is added to the `Roots` for
`containsUnreachable`. If a loop is predicated on anything other than a
compare instruction, `getLatchCmpInst()` returns `nullptr`, causing
`containsUnreachable` to crash when calling `isa<PHINode>`. To fix,
consider loops where `L.getLatchCmpInst()` is null to be not in
canonical form, and reject them.
- Crash: https://godbolt.org/z/Tboo4jo5Y
Assisted-by: Claude Opus 5
Commit: 3031d2d67f2c428013fe0f1885eca56038ff9853
https://github.com/llvm/llvm-project/commit/3031d2d67f2c428013fe0f1885eca56038ff9853
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/docs/resources/addingtargetsupport.md
Log Message:
-----------
[lldb][docs] Add hardware feature considerations to target doc (#211213)
As requested on #207166, this change adds information about hardware
features that can help or hinder porting LLDB.
I decided not to add an explicit "help" or "hinder" tag to them because
the descriptions are pretty general and I'd rather people took them as
starting points to think for themselves.
Debugging is a pile of things working together, so it's hard to say that
lack of one thing is "bad" without seeing it in context. Hopefully by
thinking about all these items for their target, developers will be able
to do that.
Commit: 3d2d8a9905f31f45721d3f15a0d0042675d74ec5
https://github.com/llvm/llvm-project/commit/3d2d8a9905f31f45721d3f15a0d0042675d74ec5
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/unittests/Tooling/HeaderIncludesTest.cpp
Log Message:
-----------
[clang][Tooling] Fix main header matching for headers with special characters. (#211934)
In Clang Tooling, escape HeaderStem before constructing MainIncludeRegex
to prevent special characters (such as '+') from being interpreted as
regex operators. Useful for Objective-C where "Foo+Bar.h" headers are
very common for categories.
Commit: bece576b2b682582e85c14bb1a9ea0ba7110ba80
https://github.com/llvm/llvm-project/commit/bece576b2b682582e85c14bb1a9ea0ba7110ba80
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerCommentStringPass.h
Log Message:
-----------
[PowerPC][AIX] Mark LowerCommentStringPass as RequiredPassInfoMixin
Directly using isRequired is deprecated and PassInfoMixin will soon be
moved to a detail namespace.
Reviewers: tonykuttai, w2yehia, hubert-reinterpretcast
Pull Request: https://github.com/llvm/llvm-project/pull/212018
Commit: ebd9c2c3b131f37d4cd12caf32d6b31b6852b148
https://github.com/llvm/llvm-project/commit/ebd9c2c3b131f37d4cd12caf32d6b31b6852b148
Author: dmaclach <dmaclach at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
Log Message:
-----------
Add Objective-C support to include-cleaner's AST walker. (#211119)
Extend WalkAST to recognize and report references in Objective-C
constructs, including interfaces, protocols, message expressions,
properties, categories, compatible aliases, and instance variables. Also
update the test helper to support custom compiler arguments and add
corresponding unit tests.
Commit: d2e3e96dedbedca0bfc39fc94f64e04cfa4ec74e
https://github.com/llvm/llvm-project/commit/d2e3e96dedbedca0bfc39fc94f64e04cfa4ec74e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/sorting/permutation.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::next_permutation and std::prev_permutation (#210966)
Commit: c060161b318f5162556d22d801a6ae704841c983
https://github.com/llvm/llvm-project/commit/c060161b318f5162556d22d801a6ae704841c983
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
R libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/min_max_element.bench.cpp
R libcxx/test/benchmarks/algorithms/minmax.bench.cpp
A libcxx/test/benchmarks/algorithms/ranges_min_max.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::min_element, std::max_element and std::ranges::max (#209590)
Extend missing coverage and increase consistency across how the
benchmarks are written.
Commit: a3b6e0baca37a717b3c498c21514256df4c29ef2
https://github.com/llvm/llvm-project/commit/a3b6e0baca37a717b3c498c21514256df4c29ef2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/sorting/nth_element.bench.cpp
Log Message:
-----------
[libc++] Add benchmark for std::nth_element (#210112)
Commit: 20f06e490149867d2a261cbcca41fa176bdc87b1
https://github.com/llvm/llvm-project/commit/20f06e490149867d2a261cbcca41fa176bdc87b1
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/DIBuilder.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
[IR][NFC] Remove DbgInstPtr PointerUnion (#212233)
DbgInstPtr was needed in the transitionary phase between intrinsics and
records, but can be removed now.
Commit: 26bf39cdba0bfcd0ea781f95cf44519922a8eb56
https://github.com/llvm/llvm-project/commit/26bf39cdba0bfcd0ea781f95cf44519922a8eb56
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Thunks.h
M lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
M lld/test/ELF/ppc64-ifunc.s
Log Message:
-----------
[ELF][PowerPC] Don't assume TOC pointer is valid in IPLT entries (#207555)
Unlike normal PLT entries, IPLT entries can be called indirectly even
when in PIEs/DSOs, and so there's no guarantee on what's in the TOC
pointer register at that time. Therefore we must emit variants of the
existing code that work without it, whether r12-relative (playing the
same role as MIPS's $25) in the same number of instructions, or first
retrieving PC in an i386-like manner, being careful not to clobber LR.
On 32-bit PowerPC even direct calls to IPLT entries face the same issue,
since we'd use the TOC base of the resolver, which may not be the same
as the caller, even within the same object.
Normal canonical PLTs still look broken on 64-bit PowerPC as they use
the TOC pointer register too, and similarly on 32-bit PowerPC for PIEs.
We should probably treat these cases the same as PIE on i386 (except
including PDEs for 64-bit PowerPC), where it's an error due to the use
of %ebx in PLT entries.
Commit: 0733641570c25e6323e39c4ee66693a4668429a8
https://github.com/llvm/llvm-project/commit/0733641570c25e6323e39c4ee66693a4668429a8
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
Log Message:
-----------
[libc++][test] re-enable clear padding runtime test (#211258)
Commit: de793e832cc5cddf9d8554ec07f42e1298908f72
https://github.com/llvm/llvm-project/commit/de793e832cc5cddf9d8554ec07f42e1298908f72
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/spillv16.ll
Log Message:
-----------
[AMDGPU][True16] Retain `hi16` subregisters through v2s copies (#211848)
The current legalisation for SGPR/VGPR copies with mismatched sizes does
not check which VGPR subregister is used, and defaults to using `lo16`.
If the `hi16` subregister is used instead, this information is lost, and
the subregister is incorrectly replaced with `lo16`.
This patch retains the subregister used when legalising the copy.
Commit: ec96f85d6d82c5e71b36f9c827f09bb3b4825390
https://github.com/llvm/llvm-project/commit/ec96f85d6d82c5e71b36f9c827f09bb3b4825390
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/Target/AArch64/AArch64Processors.td
A llvm/test/TableGen/ProcessorAlias.td
A llvm/test/TableGen/ProcessorAliasErrors.td
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
TableGen: Add first class support for processor aliases (#211775)
Previously isCPUStringValid was virtual so TableGen could emit an
AArch64 specific hack for recognizing cpu aliases. Teach tablegen
about aliases, and insert each alias into the CPU subtype table as its
own entry (sorted by name, carrying the canonical processor's features
and scheduling model).
There is further opportunity for code sharing improvements. AArch64's
aliases are consumed by ARMTargetDefEmitter to emit a custom inc file
in TargetParser which should be universalized.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 58a6567a166e0cb44227d162914778176a4faf62
https://github.com/llvm/llvm-project/commit/58a6567a166e0cb44227d162914778176a4faf62
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNProcessors.td
Log Message:
-----------
AMDGPU: Use ProcessorAlias for legacy arch names (#211776)
Older targets have aliasing names which were previously implemented
by defining a second copy of the processor, identical except for the
name Use the recently improved tablegen mechanism for defining name-only
aliases. This dedupliates some redundant table entries, like the sched model.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d53cb74cbbc24fc5deba87b94ec38a7636bb52a9
https://github.com/llvm/llvm-project/commit/d53cb74cbbc24fc5deba87b94ec38a7636bb52a9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
Log Message:
-----------
X86: Use ProcessorAlias for duplicated processor names (#211953)
Many X86 processors were defined multiple times under different names,
emitting an identical ProcessorModel for each spelling and duplicating
the feature masks, tune features, and scheduling model index in the
subtype table.
Define each processor once under its canonical name and express the
alternate spellings with ProcessorAlias, using the tablegen alias
mechanism. This deduplicates the redundant subtype table entries and
saves about 4.6k with the new alias table (#211952)
Co-Authored-By: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 7baccda8dde277b16cb87318536b3ca70d448db1
https://github.com/llvm/llvm-project/commit/7baccda8dde277b16cb87318536b3ca70d448db1
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
M llvm/test/CodeGen/AMDGPU/si-late-branch-lowering-preserve-loop-info.mir
M llvm/test/CodeGen/AMDGPU/si-pre-emit-peephole-preserve-loop-info.mir
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
M llvm/test/Transforms/SCCP/preserve-analysis.ll
Log Message:
-----------
[LoopInfo] Build dominator tree only for irreducible CFG (#212098)
analyze() requires a dominator tree, so LoopAnalysis and
MachineLoopAnalysis request one for every function, though only an
irreducible CFG queries it. Clients that build their own, from
InlineCost to XRayInstrumentation, need it for nothing else.
Take the function and a callback returning the tree instead, and call it
when an edge re-enters a loop. Add an analyze(F) overload for a client
that holds no tree.
The number of dominator tree builds does not change in an -O2 pipeline
building sqlite3.bc, where SROA and InstCombine cache one before
LoopAnalysis runs.
Tests that observed the tree through LoopAnalysis now require it
explicitly.
MachineLoopInfoWrapperPass keeps requiring one: the legacy pass manager
cannot provide it on demand.
Aided by Claude Opus 5
Commit: 3c6d9cdb08c9245bb4d80e3262f74ea372046bcb
https://github.com/llvm/llvm-project/commit/3c6d9cdb08c9245bb4d80e3262f74ea372046bcb
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Add missing action to checkout (#211720)
The upload-release-artifact action uses the require-team-membership
action so we need to make sure that latter is checkout out when calling
upload-release-artifact.
Commit: 07aa3b710f2622f662cab7a53ddf1288c725a9be
https://github.com/llvm/llvm-project/commit/07aa3b710f2622f662cab7a53ddf1288c725a9be
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/buildvector-used-by-insertvalue.ll
Log Message:
-----------
[SLP] Only consider BuildVector inserts into the same object. (#212269)
When following insertelement instruction for a BuildVector sequence, we
may discover a user that inserts into a different vector.
Bail out when that happens instead of crashing.
PR: https://github.com/llvm/llvm-project/pull/212269
Commit: e59df8e339bc5bc07991e0a67d3d0cb8c25a94c2
https://github.com/llvm/llvm-project/commit/e59df8e339bc5bc07991e0a67d3d0cb8c25a94c2
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array-skip-element-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugTypeArray. (#211537)
This PR adds `DebugTypeArray` to `SPIRVNonSemanticDebugHandler`:
1. `partitionTypes` buckets `DICompositeType` nodes tagged
`DW_TAG_array_type` without `DINode::FlagVector` (vectors are emitted
separately).
2. `emitNonSemanticGlobalDebugInfo` emits one `DebugTypeArray` per node
after the pointer types and records the id in `DebugTypeRegs`.
3. `emitDebugTypeArray` appends one `OpConstant` component count per
`DISubrange`, in subrange order. A subrange with no constant count emits
0, matching `OpTypeRuntimeArray`. An array whose element type is not in
`DebugTypeRegs` is skipped.
Clang lowers a matrix to a `DW_TAG_array_type` with two subranges in
`CGDebugInfo::CreateType(const ConstantMatrixType *)`, so an HLSL
`float4x4` emits as a `DebugTypeArray` with two counts.
`DebugTypeMatrix` needs a distinguishing flag from the frontend.
Added a couple of tests in `llvm/test/CodeGen/SPIRV/debug-info/`:
1. `debug-type-array.ll` covers a 1D array, a 2D array, a runtime-sized
array, and an array of vectors, and asserts that we are not emitting
`DebugTypeMatrix` (this will need to be changed when/if we start
emitting them).
2. `debug-type-array-skip-element-not-in-regs.ll` tests arrays of types
that cannot have debug info (I used array of pointers wit no DWARF
address space).
Commit: 2a323d5bb13890cc0667d5e21e43f41020f4f606
https://github.com/llvm/llvm-project/commit/2a323d5bb13890cc0667d5e21e43f41020f4f606
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/lib/ProfileData/SampleProf.cpp
Log Message:
-----------
[ProfileData] Make FunctionSamples profile-format flags atomic (#208964)
`lld/test/ELF/lto/sample-profile.ll` is failing in ThreadSanitizer
build.
In a parallel in-process ThinLTO link, each backend thread reads the
sample profile in SampleProfileLoader::doInitialization and writes these
globals.
Make the variables std::atomic<bool> so the same-value writes are
well-defined. An architectural ideal solution that holds these states in
a container seems very intrusive.
Commit: b8bd63c69c83bc13b31e808f9b7d84a562251396
https://github.com/llvm/llvm-project/commit/b8bd63c69c83bc13b31e808f9b7d84a562251396
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCEmitNYIFlang.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCInitializeFIRAnalyses.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCPipeline.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/test/Driver/openacc-nyi.f90
A flang/test/Transforms/OpenACC/acc-emit-nyi-flang.fir
Log Message:
-----------
[flang][acc] Emit NYI messages for unsupported directives (#211894)
Add an OpenACC MLIR pass that emits not-yet-implemented messages for
unsupported directives immediately after HLFIR generation. This allows
OpenACC dialect operations to be emitted with -emit-hlfir while making
full compilation fail early with clear diagnostics, instead of later
when unhandled OpenACC operations reach LLVM dialect conversion.
Commit: 41a5357e389b3c04d4c44631360dd3661488c629
https://github.com/llvm/llvm-project/commit/41a5357e389b3c04d4c44631360dd3661488c629
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaType.cpp
M clang/test/CXX/drs/cwg14xx.cpp
A clang/test/SemaCXX/qualified-function-typeof.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][Sema] Allow abstract declarators to specify cv-qualified function types as per CWG1417 (#209836)
Abstract declarator contexts (specifically `DeclaratorContext::TypeName`) now properly bypass this restricted rule, allowing cv-qualified function types in `__typeof__` while maintaining restrictions in other contexts like `typeid`, `sizeof`, C-style casts, and `new` expressions per CWG1417.
Commit: 5565740f2367093b89481ba7371adf820971977d
https://github.com/llvm/llvm-project/commit/5565740f2367093b89481ba7371adf820971977d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.h
A lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
Log Message:
-----------
[lld] Don't drop RELR relocations for late-added GOT entries (#211911)
In #208959 we started dropping RELR relocations for late-added GOT
entries when reverting x86-64 GOTPCRELX relaxations in
X86_64::relaxOnce.
There is a separate unrelaxation bug where if the object files didn't
have any relocations of a certain type, we'd prune .relr.dyn (or even
.rela.dyn). Will be addressed separately.
Assisted-by: Gemini
Commit: ad791f26ef495dbc2c3c6c283518872697210898
https://github.com/llvm/llvm-project/commit/ad791f26ef495dbc2c3c6c283518872697210898
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
Log Message:
-----------
[scudo] Test to verify fork and allocate does not deadlock. (#211975)
Commit: 751eb22c1b835b675166e4936a93f903b952f28f
https://github.com/llvm/llvm-project/commit/751eb22c1b835b675166e4936a93f903b952f28f
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
Log Message:
-----------
[AArch64][GlobalISel] Use integer type for truncating merged call args. (#212208)
Commit: 02da01251156c831a54417d4882aad7226cdbbe1
https://github.com/llvm/llvm-project/commit/02da01251156c831a54417d4882aad7226cdbbe1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/lib/CodeGen/TargetSubtargetInfo.cpp
M llvm/lib/MC/MCSubtargetInfo.cpp
M llvm/test/TableGen/ProcessorAlias.td
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
TableGen: Use a compact table for CPU aliases (#211952)
Commit: b9a7aad4a9d50b9ec60b59d197be43a973a0572c
https://github.com/llvm/llvm-project/commit/b9a7aad4a9d50b9ec60b59d197be43a973a0572c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/release-tasks.yml
Log Message:
-----------
workflows/release-tasks: Fix permissions for release-documentation (#212310)
Commit: 0600aeae3ba6c41da80bbb84c10f1cad4c9a58ba
https://github.com/llvm/llvm-project/commit/0600aeae3ba6c41da80bbb84c10f1cad4c9a58ba
Author: David Green <david.green at arm.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
Log Message:
-----------
[AArch64][GlobalISel] Use integer types for inline assembly lowering (#212214)
If we need to generate a trunc then we can use an integer type for the
lowering.
Commit: 7336a38e5c6dea03c243bb37b44a2207471e63d3
https://github.com/llvm/llvm-project/commit/7336a38e5c6dea03c243bb37b44a2207471e63d3
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/AST/TypeLoc.cpp
A clang/test/SemaCXX/atomic-auto.cpp
Log Message:
-----------
[clang] Add missing VisitAtomicTypeLoc to TypeLoc.cpp GetContainedAutoTypeLocVisitor (#211752)
Adds the missing `VisitAtomicTypeLoc` method to TypeLoc.cpp `GetContainedAutoTypeLocVisitor`.
Fixes: https://github.com/llvm/llvm-project/issues/211556 ICE.
Assisted-by: Codex
Commit: 68e94c904067b1b984c6b337819633aee9f0c7da
https://github.com/llvm/llvm-project/commit/68e94c904067b1b984c6b337819633aee9f0c7da
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/test/Analysis/dangling-ptr-deref.cpp
Log Message:
-----------
[analyzer] Improve dangling value tracking in DanglingPtrDeref (#211818)
Improve dangling value tracking in the `DanglingPtrDeref` checker by
adding `trackExpressionValue`. The report with this change now tracks
the dangling value and shows where the value originated from. Currently
the checker only points at the destruction and use sites which isn't
always useful for the user.
Commit: f83fcfbdc7fc1bee6ebf242b110a5c2b46703ae9
https://github.com/llvm/llvm-project/commit/f83fcfbdc7fc1bee6ebf242b110a5c2b46703ae9
Author: Florian Mayer <fmayer at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
A llvm/test/CodeGen/MIR/X86/machine-verifier-nophi.mir
Log Message:
-----------
[MachineVerifier] do not use !NoPHI to check if a MF has phi nodes (#211941)
We were violating the property expressed in MachineFunction.h:
```
The properties are stated in "positive" form; i.e. a pass could require
that the property hold, but not that it does not hold.
```
Resolves a false positive "MBB has allocatable live-in, [...]" error in
our downstream target.
Commit: 79ea87c8da20263fa54c9f60b4befb3a9bf962cf
https://github.com/llvm/llvm-project/commit/79ea87c8da20263fa54c9f60b4befb3a9bf962cf
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/test/tools/llubi/attribute_noundef_ub.ll
M llvm/test/tools/llubi/attributes.ll
M llvm/test/tools/llubi/bitcast_be.ll
M llvm/test/tools/llubi/bitcast_le.ll
A llvm/test/tools/llubi/bytes_poison.ll
A llvm/test/tools/llubi/bytes_undef.ll
M llvm/test/tools/llubi/freeze.ll
M llvm/test/tools/llubi/global.ll
M llvm/test/tools/llubi/load_noundef_ub_undef.ll
M llvm/test/tools/llubi/loadstore_be.ll
M llvm/test/tools/llubi/loadstore_le.ll
M llvm/tools/llubi/lib/Context.cpp
M llvm/tools/llubi/lib/Context.h
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llubi/lib/Value.cpp
M llvm/tools/llubi/lib/Value.h
Log Message:
-----------
[llubi] Add support for byte types (#200672)
This patch implements the support for byte types. The byte order depends
on the endianness for better performance in the fast path. For
non-byte-sized byte types, high bits are zeroed out.
Commit: a41a3359ec24f019a5a9576631228f0314be38a6
https://github.com/llvm/llvm-project/commit/a41a3359ec24f019a5a9576631228f0314be38a6
Author: Valentin Clement (ćć¬ć³ćæć¤ć³ ćÆć¬ć”ć³) <clementval at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/CUDA/cuf02.cuf
Log Message:
-----------
[flang][cuda] Do not check dummy in stmt function in device code (#212037)
Commit: 289a2d901a480e3c0ba8aac80c40f2fcd768506f
https://github.com/llvm/llvm-project/commit/289a2d901a480e3c0ba8aac80c40f2fcd768506f
Author: Stephen Long <63318318+steplong at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
A mlir/test/Dialect/Linalg/block-pack-matmul-scalable.mlir
Log Message:
-----------
[mlir][LinalgBlockPackMatmul] Add support for scalable block factors (#211354)
Assisted by: Claude Sonnet 4.6
---------
Co-authored-by: Adam Siemieniuk <adam.siemieniuk at intel.com>
Commit: a950d4a527311fbfe202d563331f133400fd2c5e
https://github.com/llvm/llvm-project/commit/a950d4a527311fbfe202d563331f133400fd2c5e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
Log Message:
-----------
AMDGPU: Use uint8_t for IsaVersion fields (#212311)
Commit: 460dbfc7ec59a89cc80f7c03879f60278ec2a6c4
https://github.com/llvm/llvm-project/commit/460dbfc7ec59a89cc80f7c03879f60278ec2a6c4
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Use loop latch to determine step/start for conditional recurrence (#211916)
The function `matchConditionalRecurrence` iterates over both PHI inputs
and attempts to match each one to determine which is `Start` and which
is `Step`. However, some of the failure conditions in the loop `return
false`, which has the potential to classify some valid CRC loops as not
having a conditional recurrence. The loop here is not really needed at
all-- instead, use `L.getLoopLatch()` to determine `Start`/`Step`, since
the incoming value from the latch block will always be the `Step`. This
also avoids the aforementioned false negative classifications.
Assisted-by: Claude Opus 5
Commit: c2b22642d289413e136da29eaa1ce176ce438484
https://github.com/llvm/llvm-project/commit/c2b22642d289413e136da29eaa1ce176ce438484
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
Log Message:
-----------
[AArch64][MacroFusion] Add per cluster kind statistic (#212103)
So we can easily differentiate between different cluster kinds on
AArch64 backend.
Commit: bd7bb26108bd86eeeef0962577b52d0f435a7ac3
https://github.com/llvm/llvm-project/commit/bd7bb26108bd86eeeef0962577b52d0f435a7ac3
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/RecordLayout.h
M clang/lib/AST/RecordLayout.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
A clang/test/Layout/ms-arm64-aligned-base-tail-padding.cpp
Log Message:
-----------
[clang] Match MSVC ABI for over-aligned base tail padding on Arm64 (#210461)
When targeting aarch64-pc-windows-msvc, clang laid out a base following
an over-aligned, non-standard-layout base at the wrong offset. MSVC on
Arm64 reuses the over-aligned base's tail padding for the subsequent
base, but clang rounded the base up to a full slot, so the two disagreed
on member offsets, breaking interop between clang- and MSVC-built
binaries.
Fix: store each record's natural non-virtual alignment (excluding
`alignas`/`__declspec(align)` over-alignment) as
`getNonRequiredNVAlignment()`, and on Arm64 fold in a base's natural
alignment rather than its full alignment. This is gated to Arm64 only;
Arm64EC and x64 follow the x64 rule (no reuse) and are unchanged.
Validated against MSVC (Hostx64\arm64\cl.exe
/d1reportSingleClassLayout): clang now matches MSVC Arm64 exactly for
the reduced repro, the original polymorphic case (vftable + empty base +
template), and a range of probe cases covering natural vs.
over-alignment padding and field vs. base reuse. Arm64EC and x64 output
is byte-identical to before.
Fixes #210174
Commit: 4d14e9641ddf38d4b6cc2dbb5c882135d94c68c1
https://github.com/llvm/llvm-project/commit/4d14e9641ddf38d4b6cc2dbb5c882135d94c68c1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][MathToSPIRV] Allow math.cttz lowering for non-i32 integer widths (#206400)
Co-authored-by: Igor Wodiany <dev at wodiany.com>
Commit: c881d81f6b189f14c56c9bec8842ddba6255d0e5
https://github.com/llvm/llvm-project/commit/c881d81f6b189f14c56c9bec8842ddba6255d0e5
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/SDTRewriter.cpp
Log Message:
-----------
[BOLT] Release pseudo-probe decoder after emit (#211935)
PseudoProbeRewriter builds sizable data structures and then hold onto
them after they are needed.
PseudoProbeRewriter::postEmitFinalizer() parses the input .pseudo_probe
sections into an MCPseudoProbeDecoder whose address-to-probe and
GUID-to-function-desc maps can be very large (tens of GiB on big
binaries with many probes). This is not used again once probes have been
updated, yet they survive into the memory-heavy DWARF rewrite
(updateDebugInfo), directly inflating BOLT's peak RSS at the worst
possible time.
This frees them at the end of the postEmitFinalizer() calls, before
updateDebugInfo runs.
Stacked on top of the .dwo DIE diff, in large binaries you should
observe ~17% peak RSS wins if your
build uses pseudo probe maps.
Commit: 63e60a2853b1ff6fdac3cbaf668e2d2a63d51fae
https://github.com/llvm/llvm-project/commit/63e60a2853b1ff6fdac3cbaf668e2d2a63d51fae
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M bolt/lib/Passes/BinaryPasses.cpp
A bolt/test/X86/jump-table-empty-block-strict.s
Log Message:
-----------
[BOLT] Fix strict mode bug in removal of block referenced by JT (#211940)
Summary:
BOLT can create a jump table object from a PC-relative operand reference
(e.g. leaq JT(%rip)) whenever the referenced memory looks like a PIC
jump table -- see
BinaryContext::handleAddressRef. This is independent of whether BOLT
recognizes the indirect jump dispatch itself. The jump table annotation
is only attached to the jmp instruction later, in
BinaryFunction::analyzeIndirectBranch, and only when the target-specific
analyzeIndirectBranch matcher recognizes the dispatch pattern.
If the matcher does not recognize the pattern, the annotation is never
attached to the jmp, even though the jump table object and its entries
exist and reference basic blocks in the function.
In strict mode BOLT still fully processes such a function: it stays
simple, the block is marked as having unknown control flow, and the jump
table object is kept intact. Because the terminator carries no jump
table annotation, BinaryBasicBlock::hasJumpTable() returns false for it.
Later passes then transform the function normally: remove-nops can empty
a jump table target block that consists only of nops, and NormalizeCFG
then redirects the block's predecessor and deletes the empty block - it
does not recognize the block as a jump table target, since the
predecessor's hasJumpTable() is false. The jump table object still
references the deleted block by label, which produces an "Undefined
temporary symbol" error and fails emission.
Fix NormalizeCFG so it does not redirect/remove a block whose
predecessor ends in an indirect branch, not only one flagged by
hasJumpTable().
Commit: 767716657985094ce2e73eafe87d5fa8a24ac843
https://github.com/llvm/llvm-project/commit/767716657985094ce2e73eafe87d5fa8a24ac843
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[OFFLOAD][L0] Fix zero argurment kernel launch (#212296)
PR #205224 changed the path for kernels with no arguments to not use
appendLaunchKernelWithArgs, while at the same time it removed
zeKernelSetGroupSize which resulted in incorrect sizing of the kernel.
This PR removes the alternate path and makes sure all launches go
through appendLaunchKernelWithArgs.
Alternatively we can restore zeKernelSetGroupSize on the alternate path.
Commit: 6534ceefd231771466abc9c388b93bb8b0913316
https://github.com/llvm/llvm-project/commit/6534ceefd231771466abc9c388b93bb8b0913316
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/include/clang/Basic/OptionalUnsigned.h
Log Message:
-----------
[Clang] [NFC] Update OptionalUnsigned ctor to only reject signed integers (#212321)
Currently, the `OptionalUnsigned(int) = delete;` constructor means that
constructing e.g. an `OptionalOrUnsigned<uint64_t>` from an `unsigned`
fails because overload resolution is ambiguous (because `unsigned` ->
`int` and `unsigned` -> `uint64_t` are both valid conversions). This
patch adds a constraint to make sure the deleted constructor only
catches signed integer types.
This is needed for #212319.
Commit: 864f9a09887559491ef3f7ad39d57c703bc14f40
https://github.com/llvm/llvm-project/commit/864f9a09887559491ef3f7ad39d57c703bc14f40
Author: Bjƶrn SchƤpers <bjoern at hazardy.de>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate C# UTF 8 string literals (#211919)
Fixes #210506
Commit: 34c7c5ccca260c695d6b212a06c0e620d494adb4
https://github.com/llvm/llvm-project/commit/34c7c5ccca260c695d6b212a06c0e620d494adb4
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
[AMDGPU][NFC] Rename packed instruction helper functions for clarity (#211933)
Renames packed instruction helper functions to better reflect their
purpose:
- isPackedFP32or64BitInst ā isSingleSGPRReadInst
- isLegalGFX12PlusPackedMathFP32or64BitOperand ā isLegalSingleSGPRReadInstOperand
Commit: cef8432f7d149ef4e5888e29ff4d39ea580a806c
https://github.com/llvm/llvm-project/commit/cef8432f7d149ef4e5888e29ff4d39ea580a806c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
Log Message:
-----------
[VPlan] Account for masked VPInstructions in getIntrinsicID. (#212234)
getIntrinsicID may be called with masked VPInstructions. Update to skip
the mask, which is always the last operand.
Fixes https://github.com/llvm/llvm-project/issues/212165.
PR: https://github.com/llvm/llvm-project/pull/212234
Commit: aa8942dbf406e9e4c0cae84a6567dac37fac57c6
https://github.com/llvm/llvm-project/commit/aa8942dbf406e9e4c0cae84a6567dac37fac57c6
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDMAOperations.md
Log Message:
-----------
[Docs][AMDGPU] Eliminate incorrect use of double backticks [NFC] (#212343)
Commit: 30bff76d3a294fe0882a05472234b25bb752b16a
https://github.com/llvm/llvm-project/commit/30bff76d3a294fe0882a05472234b25bb752b16a
Author: Valentin Clement (ćć¬ć³ćæć¤ć³ ćÆć¬ć”ć³) <clementval at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Do not emit cuf.register_variable_static for device/constant under unified mode (#212344)
Commit: 295c3a461c7dd9d7f34306a89181ceb7139760ba
https://github.com/llvm/llvm-project/commit/295c3a461c7dd9d7f34306a89181ceb7139760ba
Author: Sophia Herrmann <herrmann15 at llnl.gov>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/Headers/__clang_gpu_device_functions.h
Log Message:
-----------
[Offload] Decouple CUDA source from NVPTX syncthreads assumption (#212339)
With the introduction of offloading via LLVM, the frontend language will
not necessarily determine the backend target anymore. Thus it is
necessary to guard against NVPTX instead of CUDA, since we could have
CUDA-language device code targeting a non-NVPTX backend, where Clang
does not provide __syncthreads as an NVPTX builtin and the generic shim
is still needed.
This also avoids duplicate definitions on NVPTX. Clang already provides
`__syncthreads` as an NVPTX target builtin, so
`__clang_gpu_device_functions.h` should not also define an inline
`__syncthreads` shim for NVPTX targets.
Commit: 4ca573fb7947b3bebf5c1da512b5142679545905
https://github.com/llvm/llvm-project/commit/4ca573fb7947b3bebf5c1da512b5142679545905
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/schema.yaml
Log Message:
-----------
[libc++] Rename the test suite used on LNT (#212347)
The LNT instance on http://lnt.llvm.org was wiped since I created the
original schema, and we can now start over clean with a new test suite
named `libcxx`.
Commit: a22416ba1ec8894ef98a437275e91f0ade3e2ba1
https://github.com/llvm/llvm-project/commit/a22416ba1ec8894ef98a437275e91f0ade3e2ba1
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
A llvm/test/Analysis/DXILResource/has-atomic64-use.ll
A llvm/test/CodeGen/DirectX/ContainerData/PSVResources-UsedByAtomic64.ll
Log Message:
-----------
[HLSL] Add UsedByAtomic64 shader flag (#211691)
This PR adds the `UsedByAtomic64` shader flag.
It detects any usage of an atomic instruction with a 64 bit type, and if
detected, sets the shader flag to true.
This is needed to pass DXIL validation.
Fixes https://github.com/llvm/llvm-project/issues/104392
Assisted by: Github Copilot
Commit: 8a49f8839cdf743af250d3501262da0bb9876c98
https://github.com/llvm/llvm-project/commit/8a49f8839cdf743af250d3501262da0bb9876c98
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/LogicalView/BUILD.gn
Log Message:
-----------
[gn build] Add missing deps (#212352)
>From e7290b1f1815626c4461d38671d93093590bf405
Commit: 4f02e1e45c2711a94dae0eac2051ad7c2e5ca8c2
https://github.com/llvm/llvm-project/commit/4f02e1e45c2711a94dae0eac2051ad7c2e5ca8c2
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
M lldb/source/Plugins/Language/ObjC/ObjCLanguage.h
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
A lldb/test/API/lang/objc/tagged-pointer-children/Makefile
A lldb/test/API/lang/objc/tagged-pointer-children/TestTaggedPointerChildren.py
A lldb/test/API/lang/objc/tagged-pointer-children/main.m
A lldb/test/API/lang/objc/tagged-pointer-children/tagged_synth_provider.py
Log Message:
-----------
[LLDB] Hide unresolvable children from ObjC tagged pointers (#211936)
Foundation's small value inline representations have valid summaries and
sometimed synthetic children, but LLDB cannot access any ivars from
their base classes (such as [NSObject isa]).
Use a synthetic child provider to hide them.
rdar://182434208
Assisted-by: claude
Commit: 61225df551b071f07dbf9fab98242a7477506b49
https://github.com/llvm/llvm-project/commit/61225df551b071f07dbf9fab98242a7477506b49
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/TableGen/RuntimeLibcallEmitter-bad-system-library-entry-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter-nested-predicates-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag-errors.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
Log Message:
-----------
RuntimeLibcalls: Migrate to dag libcall predicates (#210674)
Switch to using dag predicates instead of free-form code predicates.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d8d33abac0140c0554fd754b2646e142edcca484
https://github.com/llvm/llvm-project/commit/d8d33abac0140c0554fd754b2646e142edcca484
Author: William Moses <gh at wsmoses.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/include/mlir/Analysis/FlatLinearValueConstraints.h
M mlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/unittests/Analysis/Presburger/Parser.h
Log Message:
-----------
[MLIR] Allow recovering from semi-affine sets in FlatLinearValueConstā¦ (#212346)
ā¦raints
The IntegerSet constructor of FlatLinearValueConstraints asserts when
flattening fails, which happens for semi-affine integer sets. Since the
failure is signalled from inside a constructor, callers have no way to
detect the unsupported case ahead of time and no way to work around it;
they simply crash.
Add an optional `bool *error` parameter to the constructor. When it is
non-null, hitting the unimplemented case sets `*error` to true and
returns instead of asserting, letting callers bail out gracefully.
`*error` is set to false on success. When the pointer is null the
previous assert behavior is retained, so existing callers are
unaffected.
Commit: 0fa9cfa567277a1fadd71e4c8cf41db5a7c84cff
https://github.com/llvm/llvm-project/commit/0fa9cfa567277a1fadd71e4c8cf41db5a7c84cff
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/CIBestPractices.rst
A llvm/docs/GitHubActionsRunners.rst
M llvm/docs/Reference.md
Log Message:
-----------
[CI] Add documentation for self-hosted runners (#211622)
This patch adds (work in progress) documentation for the various
self-hosted runner groups we have access to in the LLVM monorepo.
Commit: 05eba618a37839999d3eb6ca7328337cd4765dfd
https://github.com/llvm/llvm-project/commit/05eba618a37839999d3eb6ca7328337cd4765dfd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Add vputils::getEarlyExits helper (NFC) (#212348)
Both handleUncountableEarlyExits and the countable early-exit disconnect
in handleEarlyExits walk all exit blocks and skip predecessors coming
from the middle block to find the early exiting blocks.
Factor that walk out into vputils::getEarlyExits, returning the (early
exiting block, exit block) pairs.
Commit: bd5883c35f43b01ab96bbdba1bc14a81f78694ea
https://github.com/llvm/llvm-project/commit/bd5883c35f43b01ab96bbdba1bc14a81f78694ea
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/lib/AST/RecordLayoutBuilder.cpp
A clang/test/CodeGenCXX/Inputs/override-layout-aligned-base.layout
A clang/test/CodeGenCXX/override-layout-aligned-base.cpp
Log Message:
-----------
[clang] Fix record alignment lost via external layout on Arm64 (#212362)
An external layout source (such as LLDB reading DWARF) supplies a
record's final alignment directly, since `alignas` / `__declspec(align)`
attributes are not recoverable from debug info. `finalizeLayout`
captured `NonRequiredAlignment` before applying the external alignment,
so an externally laid out record published a stale, too-small value.
On Arm64 this field is used to fold a base's alignment into the derived
record, so a derived class picked up the stale value instead of the
base's actual alignment. This regressed
`lldb/test/API/lang/cpp/alignas_base_class` when #210461 was merged,
where `alignof(Derived)` evaluated to 1 instead of 8. Other targets were
unaffected as they do not read this field.
Treat all of an externally supplied alignment as non-required, as there
is no way to tell how much of it was imposed by an alignment attribute.
Commit: 4053f2b96988b69d68c8cc12913f51c149f1ac46
https://github.com/llvm/llvm-project/commit/4053f2b96988b69d68c8cc12913f51c149f1ac46
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang-rt][cuda] Keep CUFDeviceIsActive working under runtime/driver skew (#212320)
Resolve cuDevicePrimaryCtxGetState via the installed driver version, and
prefer running scope-exit cleanup when the probe cannot prove teardown,
so local device allocations are not leaked when the unversioned lookup
fails.
Commit: 7d96bd2ac1532e9ec6adf8eada303b5fe646857f
https://github.com/llvm/llvm-project/commit/7d96bd2ac1532e9ec6adf8eada303b5fe646857f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
Log Message:
-----------
[AMDGPU] Allow scalar operands in V_PK_LSHL_ADD_U64 (#212334)
Patch creates dummy source modifiers for this instruction to use
with OPSEL. Even though these do not support modifiers we can reuse
the same mechanics as with packed fp64 and other u64 to allow scalar
operands.
Commit: 63fe0cfe25e6e438d64c81785b93e500855adb78
https://github.com/llvm/llvm-project/commit/63fe0cfe25e6e438d64c81785b93e500855adb78
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/test/Transforms/RelLookupTableConverter/AArch64/no_relative_lookup_table.ll
M llvm/test/Transforms/RelLookupTableConverter/unnamed_addr.ll
Log Message:
-----------
Reapply "Disable RelLookupTableConverter on AArch64" (#212358)
This reverts commit ce8cf3f0a427f7fcf178a9a64ea48a4167211f82 (#207046).
Reland of #204669.
https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst#code-models
says that under the small code model rodata + text must fit in 2GB, but
the RelLookupTableConverter pass introduces PREL32 relocations from
.rodata to .data.rel.ro:
```
$ cat /tmp/a.c
extern void ext_func0(void);
extern void ext_func1(void);
typedef void (*func_t)(void);
static const func_t table0[2] = { ext_func0, ext_func1 };
static const func_t table1[2] = { ext_func1, ext_func0 };
static const func_t table2[2] = { ext_func0, ext_func0 };
static const func_t table3[2] = { ext_func1, ext_func1 };
const func_t *get_table(unsigned int idx) {
switch (idx % 4) {
case 0: return table0;
case 1: return table1;
case 2: return table2;
case 3: return table3;
}
return table0;
}
$ clang -O2 --target=aarch64-linux-gnu -fPIC -c /tmp/repro.c -o /tmp/repro.o
$ llvm-readelf -r /tmp/repro.o
...
Relocation section '.rela.rodata' at offset 0x370 contains 4 entries:
Offset Info Type Symbol's Value Symbol's Name + Addend
0000000000000000 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 0
0000000000000004 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 14
0000000000000008 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 28
000000000000000c 0000000500000105 R_AARCH64_PREL32 0000000000000000 .data.rel.ro + 3c
...
```
Commit: e364a21086c71a68cac28f25469a7b014d1c2abd
https://github.com/llvm/llvm-project/commit/e364a21086c71a68cac28f25469a7b014d1c2abd
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/docs/Instrumentor.md
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/test/Instrumentation/Instrumentor/default_config.json
A llvm/test/Instrumentation/Instrumentor/inline_runtime.ll
A llvm/test/Instrumentation/Instrumentor/inline_runtime_config.json
M llvm/test/Instrumentation/Instrumentor/lit.local.cfg
A llvm/test/Instrumentation/Instrumentor/runtimes/bytes_computed_rt.ll
Log Message:
-----------
[Instrumentor] Reintroduce runtime inlining (#208072)
The ability to link in and eagerly inline a specified runtime was
present in older dev versions of the instrumentor. This patch ports that
functionality to the current instrumentor pass and adds a test.
Co-authored-by: Johannes Doerfert <johannes at jdoerfert.de>
Co-authored-by: Kevin Sala <salapenades1 at llnl.gov>
Co-authored-by: Ivan Radanov Ivanov <ivanov.i.aa at m.titech.ac.jp>
Commit: 912128312f026605bce4ff11ef8a37d56a1a03f8
https://github.com/llvm/llvm-project/commit/912128312f026605bce4ff11ef8a37d56a1a03f8
Author: Patryk Stefanski <patryk.stefanski at protonmail.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
A clang/test/Index/USR/class-type-tpl-arg.cpp
Log Message:
-----------
[clang][Index][USR] Generate USRs for class-type non-type template arguments (#212356)
A class-type non-type template parameter is represented in the AST by a
TemplateParamObjectDecl, which has an empty DeclarationName.
USRGenerator had no visitor for it, so it fell through to
VisitNamedDecl, where EmitDeclName fails on the empty name and sets
IgnoreResults. That discarded the USR of the enclosing declaration.
Add a visitor that encodes the parameter object's type and value, so
specializations on distinct values get distinct USRs and equal values
agree.
Fixes #212351
Commit: 5e91f5d57a19752fe245ab64c1265e26c44d0d76
https://github.com/llvm/llvm-project/commit/5e91f5d57a19752fe245ab64c1265e26c44d0d76
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle-missing-for-expanded-binop-parent.ll
Log Message:
-----------
[SLP]Fix dep accounting for expanded binops in non-scheduled entries
The extra dependency counted for the expanded form was never released
when the expanding entry had no schedule bundle and the block had no
copyable elements, leaving the operand's bundle unscheduled forever.
Take the pseudo-bundle path also when the instruction is an expanded
binop in some tree entry.
Fixes #212220
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/212380
Commit: 30b8cb2003f7490eef20d8f31a8daa1cdb95f45d
https://github.com/llvm/llvm-project/commit/30b8cb2003f7490eef20d8f31a8daa1cdb95f45d
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/Target/TargetMacroFusion.td
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[MacroFusion] Add RunPreRA/RunPostRA to select the scheduling stage (#212182)
MacroFusion runs in both the pre-RA and post-RA machine schedulers.
Add two `bit` fields to the `Fusion` base class, `RunPreRA` and
`RunPostRA`, both defaulting to `true`, so a fusion can opt out of a
scheduling stage. At least one of them must be `true`.
When a stage is disabled, `MacroFusionPredicatorEmitter` emits an early
`return false` guard for that stage (detected via the `NoVRegs` machine
function property) and only keeps the statistic counter for the stage
the fusion actually runs in. A pre-RA-only fusion is generated as:
```cpp
STATISTIC(NumNAMEPreRA, "Times NAME Triggered (pre-ra)");
bool isNAME(...) {
...
if (SecondMI.getMF()->getProperties().hasNoVRegs())
return false;
/* Predicates */
++NumNAMEPreRA;
return true;
}
```
Since the guard already establishes the stage, the trailing counter
`if/else` collapses to a single increment, dropping the redundant
`hasNoVRegs()` call and the counter that could never fire.
Assisted-by: TRAE CLI (GPT 5.5)
Commit: bba25a8d818e146c132f927cc13b651359da4f26
https://github.com/llvm/llvm-project/commit/bba25a8d818e146c132f927cc13b651359da4f26
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/NVPTX/alias.ll
M llvm/test/CodeGen/NVPTX/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/blocksareclusters-kernel-attr.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-sm90-ptx86.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
M llvm/test/CodeGen/NVPTX/fence-proxy.ll
M llvm/test/CodeGen/NVPTX/fence.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/global-cycle-alias.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/NVPTX/op-fence.ll
M llvm/test/CodeGen/NVPTX/prmt-const-folding.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/switch.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/thread-fence.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Emit some more PTX directives through target streamer (#212070)
Move `.branchtargets`, `.reg`, `.local`, `.alias`, `.pragma`, and the
empty `.debug_macinfo` section out of hand-built strings in
`NVPTXAsmPrinter` and into `NVPTXTargetStreamer` hooks.
Opportunistically pulled at a few other threads that could use cleanup
as well.
Three behavior changes:
1. Jump table labels now come from `MachineFunction::getJTISymbol`, so
`$L_brx_<idx>` becomes `JTI<func>_<idx>` and is no longer shared across
functions
2. `.alias` names its aliasee by mangled symbol rather than raw IR name,
fixing `.alias a, ;` for an unnamed aliasee.
3. The rest of the test diff is a duplicated blank line that functions
with no register declarations no longer emit.
Co-Authored by Opus 5
Commit: 1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d
https://github.com/llvm/llvm-project/commit/1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/CMakeLists.txt
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
A llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
A llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
A llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
Log Message:
-----------
AMDGPU: Add -gen-amdgpu-target-def TableGen backend (#212318)
Commit: 065179637e5331424ffdef8060593c57a53a6391
https://github.com/llvm/llvm-project/commit/065179637e5331424ffdef8060593c57a53a6391
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][OpenACC] Lower single-block thread-only array reductions (#212369)
Example:
```fortran
!$acc parallel loop vector reduction(+:b)
do i = 1, n
b(i) = i
end do
```
In this code the array reduction is thread(vector)-only with no
gang/block launch dim, so a within-block `all_reduce` is a complete
reduction. ACCCGToGPU still rejected it as NYI because the accumulate
had no block context.
Fix: keep the NYI only when the region actually launches block
dimensions; allow the existing per-element `all_reduce` path for
single-block thread-only array accumulates.
Commit: 6a55a52cabb5760902af7aa970dd37a323e255ad
https://github.com/llvm/llvm-project/commit/6a55a52cabb5760902af7aa970dd37a323e255ad
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-access-wide-stride.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-narrow-iv.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
[VPlan] zext canonical IV in convertToStridedAccesses (#212291)
Currently we sext it which isn't correct at TCs > UINT32_MAX. Makes
#209611 NFC
Commit: 776971a11fdce76b243bd94b1fe7d2b1957da969
https://github.com/llvm/llvm-project/commit/776971a11fdce76b243bd94b1fe7d2b1957da969
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/LoopUnroll/RISCV/vector.ll
Log Message:
-----------
Revert "[RISCV] Add TuneNoDefaultUnroll to generic CPUs (#135318)" (#212400)
This reverts commit 9c5858eb699390c2cac5f7f032279be275fa6aef which
causes some regressions.
Commit: 2f6ec89938aa12ba5190477032b974524c956b54
https://github.com/llvm/llvm-project/commit/2f6ec89938aa12ba5190477032b974524c956b54
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/UnicodeCharSets.h
M clang/test/Lexer/unicode.c
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] Implement P3658R1 (#212131)
As a DR in all C++ language modes.
Because we already supported the feature this is only modifying the
extensions warnings.
Commit: 0a30b0c8909dca8764d994a748bd7d53c68d94f7
https://github.com/llvm/llvm-project/commit/0a30b0c8909dca8764d994a748bd7d53c68d94f7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
AMDGPU: Declare FeatureDPP with AMDGPUSubtargetFeature (#212408)
All other features were defined using the AMDGPUSubtargetFeature
subclass of SubtargetFeature, so fix the odd one out.
Commit: de962dda125154abb64446c198b5349cf05311cb
https://github.com/llvm/llvm-project/commit/de962dda125154abb64446c198b5349cf05311cb
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__atomic/clear_padding.h
M libcxx/include/__atomic/support/c11.h
M libcxx/include/__atomic/support/gcc.h
M libcxx/include/module.modulemap.in
A libcxx/test/libcxx/atomics/atomics.types.generic/padding.pass.cpp
R libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
A libcxx/test/libcxx/atomics/clear_padding.pass.cpp
A libcxx/test/std/atomics/atomics.types.generic/padding.pass.cpp
M libcxx/utils/libcxx/test/features/misc.py
Log Message:
-----------
[libc++] Implement P0528R3 `std::atomic` CAS for types with padding (#76180)
Fixes #99984
Implement P0528R3 The Curious Case of Padding Bits, Featuring Atomic
Compare-and-Exchange
The unit test padding.pass.cpp is assisted by Cursor. However, all tests
have been modified to test what I wanted to test
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: ed4090047fb6c40d8d014559da16cee934f124c0
https://github.com/llvm/llvm-project/commit/ed4090047fb6c40d8d014559da16cee934f124c0
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-27 (Mon, 27 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/lib/ProfileData/SampleProfWriter.cpp
A llvm/test/tools/llvm-profdata/eytzinger-split-nametable-partition.test
Log Message:
-----------
[SampleProfile] Fix symbol partitioning in Eytzinger name table (#211906)
This patch fixes the symbol partitioning between context-sensitive
and flat profiles in writeEytzingerNameTableSection.
In split-layout profiles, top-level symbols in the Eytzinger name
table are partitioned into two bins -- context-sensitive and flat keys
-- so that they form parallel arrays with function offsets.
Without this patch, writeEytzingerNameTableSection uses:
if (Ctx.hasContext())
to decide which bin to use even though splitProfileMapToTwo uses:
if (!I.second.getCallsiteSamples().empty())
to partition the profile. This difference causes certain symbols to
be classified into FlatKeys in the name table but into
ContextProfileMap in the LBR profile.
The patch fixes the problem by using the same condition to partition
keys.
This misclassification happens to top-level symbols (like main or
un-inlined root callers) that lack context delimiters in their
function names (hasContext() == false) but still contain inlined
callees in their profile hierarchies.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: d1ce5f95fb661999bcc99a3a816cc72c1220a36d
https://github.com/llvm/llvm-project/commit/d1ce5f95fb661999bcc99a3a816cc72c1220a36d
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll
Log Message:
-----------
[ASan] Instrument ptrtoaddr as pointer difference (#211988)
We want to emit ptrtoaddr instead of ptrtoint for pointer differences to
not expose the provenance. Adjust ASan instrumentation to handle this
case as well.
Commit: f2c7e2bcd57ef2a9db23e5071618d3e02ee9c33d
https://github.com/llvm/llvm-project/commit/f2c7e2bcd57ef2a9db23e5071618d3e02ee9c33d
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M libc/src/__support/threads/thread.cpp
M libc/test/src/stdlib/CMakeLists.txt
Log Message:
-----------
[libc] Fix atexit_test in hermetic mode (#210656)
We never unlocked the ThreadAtExit mutex, which meant the second call to
exit deadlocked. This was detected in the unit tests as they were
calling __cxa_thread_atexit from the system C library.
Commit: aca7cdab9e9857966654624a74368b31a99130d1
https://github.com/llvm/llvm-project/commit/aca7cdab9e9857966654624a74368b31a99130d1
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-28 (Tue, 28 Jul 2026)
Changed paths:
M .github/CODEOWNERS
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-tasks.yml
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/PseudoProbeRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Rewrite/SDTRewriter.cpp
A bolt/test/AArch64/entry-point-at-function-end.s
A bolt/test/X86/jump-table-empty-block-strict.s
M clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp
M clang-tools-extra/clang-tidy/rename_check.py
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-comparison.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-comparison.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-conversion-cast.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-conversion-cast.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-division.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-division.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-scale.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-scale.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-subtraction.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-subtraction.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-unnecessary-conversion.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-unnecessary-conversion.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/faster-strsplit-delimiter.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/faster-strsplit-delimiter.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-startswith.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-startswith.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-str-contains.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/string-find-str-contains.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/time-subtraction.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/time-subtraction.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/upgrade-duration-conversions.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/upgrade-duration-conversions.rst
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/TypesTest.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/redundant-expression.cpp
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/RecordLayout.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/OptionalUnsigned.h
M clang/include/clang/Options/Options.td
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/RecordLayout.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Loans.cpp
M clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CMakeLists.txt
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Headers/__clang_gpu_device_functions.h
M clang/lib/Index/IndexSymbol.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/UnicodeCharSets.h
M clang/lib/Sema/SemaType.cpp
M clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
M clang/test/AST/ByteCode/amdgpu-nullptr.cl
M clang/test/AST/ByteCode/constexpr-steps.cpp
M clang/test/AST/ByteCode/virtual-bases.cpp
M clang/test/AST/ast-dump-amdgpu-types.c
M clang/test/Analysis/addrspace-null.c
M clang/test/Analysis/cast-value-notes.cpp
A clang/test/Analysis/cfg-compound-assignment-eval-order.cpp
M clang/test/Analysis/dangling-ptr-deref.cpp
M clang/test/Analysis/element-region-address-space.c
A clang/test/Analysis/lambda-capture-init-order.cpp
M clang/test/Analysis/loopexit-cfg-output.cpp
M clang/test/Analysis/ptr-cmp-const-trunc.cl
M clang/test/Analysis/solver-sym-simplification-ptr-bool.cl
M clang/test/Analysis/z3/cstring-addrspace.c
A clang/test/Analysis/z3/z3-atomic.c
M clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
M clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
R clang/test/CIR/CodeGen/coro-exceptions.cpp
R clang/test/CIR/CodeGen/coro-task.cpp
A clang/test/CIR/CodeGenCoroutines/Inputs/coroutine.h
A clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
A clang/test/CIR/CodeGenCoroutines/coro-task.cpp
M clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
M clang/test/CIR/CodeGenHIP/amdgpu-module-flags.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
M clang/test/CIR/CodeGenHIP/hip-cuid.hip
M clang/test/CIR/CodeGenHIP/simple.cpp
M clang/test/CIR/CodeGenOpenMP/emit-device-functions.cpp
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CodeGen/AMDGPU/sanitizer.c
M clang/test/CodeGen/address-space.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/amdgpu-image-rsrc-type-debug-info.c
M clang/test/CodeGen/amdgpu-variadic-call.c
M clang/test/CodeGen/annotations-field.c
M clang/test/CodeGen/annotations-loc.c
M clang/test/CodeGen/bitfield-access-unit.c
M clang/test/CodeGen/builtin-clear-padding-codegen.c
M clang/test/CodeGen/default-address-space.c
M clang/test/CodeGen/dynamic-alloca-with-address-space.c
M clang/test/CodeGen/fp-atomic-ops.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/linking-bitcode-postopt.cpp
M clang/test/CodeGen/logb_scalbn.c
M clang/test/CodeGen/pragma-detect_mismatch.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/scoped-fence-ops.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCUDA/address-spaces.cu
M clang/test/CodeGenCUDA/alias.cu
M clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
M clang/test/CodeGenCUDA/amdgpu-visibility.cu
M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
M clang/test/CodeGenCUDA/anon-ns.cu
M clang/test/CodeGenCUDA/atomic-ops.cu
M clang/test/CodeGenCUDA/atomic-options.hip
M clang/test/CodeGenCUDA/builtin-mangled-name.cu
M clang/test/CodeGenCUDA/cluster_dims.cu
M clang/test/CodeGenCUDA/const-var.cu
M clang/test/CodeGenCUDA/dependent-libs.cu
M clang/test/CodeGenCUDA/device-const-var-linkage.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/device-stub.cu
M clang/test/CodeGenCUDA/device-use-host-var.cu
M clang/test/CodeGenCUDA/device-var-init.cu
M clang/test/CodeGenCUDA/device-var-linkage.cu
M clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip
M clang/test/CodeGenCUDA/host-used-device-var.cu
M clang/test/CodeGenCUDA/implicit-hd-dtor-trap-stub-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-explicit-inst-hip.hip
M clang/test/CodeGenCUDA/implicit-hd-overload-ambig-hip.hip
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCUDA/kernel-arg-name-metadata.cu
M clang/test/CodeGenCUDA/kernel-args.cu
M clang/test/CodeGenCUDA/kernel-dbg-info.cu
M clang/test/CodeGenCUDA/kernel-stub-name.cu
M clang/test/CodeGenCUDA/lambda-constexpr-capture.cu
M clang/test/CodeGenCUDA/lambda-noinline.cu
M clang/test/CodeGenCUDA/lambda-reference-var.cu
M clang/test/CodeGenCUDA/lambda.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-gpu-attrs-preserved.cu
M clang/test/CodeGenCUDA/managed-var.cu
M clang/test/CodeGenCUDA/ms-linker-options.cu
M clang/test/CodeGenCUDA/noinline.cu
M clang/test/CodeGenCUDA/norecurse.cu
M clang/test/CodeGenCUDA/nosanitize-cuid.hip
M clang/test/CodeGenCUDA/static-device-var-no-rdc.cu
M clang/test/CodeGenCUDA/static-device-var-rdc.cu
M clang/test/CodeGenCUDA/struct-mangling-number.cu
M clang/test/CodeGenCUDA/template-class-static-member.cu
M clang/test/CodeGenCUDA/types.cu
M clang/test/CodeGenCUDA/unnamed-types.cu
A clang/test/CodeGenCXX/Inputs/override-layout-aligned-base.layout
M clang/test/CodeGenCXX/address-space-cast-coerce.cpp
M clang/test/CodeGenCXX/address-space-cast.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/amdgcn-string-literal.cpp
M clang/test/CodeGenCXX/amdgcn_declspec_get.cpp
M clang/test/CodeGenCXX/amdgpu-barrier-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-buffer-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-image-rsrc-typeinfo.cpp
M clang/test/CodeGenCXX/amdgpu-kernel-arg-pointer-type.cpp
M clang/test/CodeGenCXX/bitfield-access-empty.cpp
M clang/test/CodeGenCXX/bitfield-access-tail.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-atomic-inc-dec.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
M clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
M clang/test/CodeGenCXX/conditional-temporaries.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
M clang/test/CodeGenCXX/cxx11-extern-constexpr.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/no-elide-constructors.cpp
A clang/test/CodeGenCXX/override-layout-aligned-base.cpp
M clang/test/CodeGenCXX/template-param-objects-address-space.cpp
M clang/test/CodeGenCXX/throw-expression-typeinfo-in-address-space.cpp
M clang/test/CodeGenCXX/try-catch-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-cxx11-with-address-space.cpp
M clang/test/CodeGenCXX/typeid-with-address-space.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-consteval-address-space.cpp
M clang/test/CodeGenCXX/vtable-constexpr-address-space.cpp
M clang/test/CodeGenCXX/vtable-key-function-address-space.cpp
M clang/test/CodeGenCXX/vtable-layout-extreme-address-space.cpp
M clang/test/CodeGenCXX/vtable-linkage-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtt-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
A clang/test/CodeGenHIP/builtins-amdgcn-prefetch.hip
M clang/test/CodeGenHIP/debug-info-language-hip.hip
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/device-function-huge-arg-ret.hip
M clang/test/CodeGenHIP/half.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHIP/placement-new-addrspace.hip
M clang/test/CodeGenHIP/printf-aggregate.cpp
M clang/test/CodeGenHIP/printf-builtin.hip
M clang/test/CodeGenHIP/printf-kind-module-flag.hip
M clang/test/CodeGenHIP/printf.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenHIP/sret-lifetime-markers.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHIP/store-addr-space.hip
M clang/test/CodeGenHipStdPar/select-accelerator-code-pass-ordering.cpp
M clang/test/CodeGenHipStdPar/unsupported-ASM.cpp
M clang/test/CodeGenHipStdPar/unsupported-builtins.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/address-space-constant-initializers.cl
M clang/test/CodeGenOpenCL/address-spaces.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgcn-buffer-rsrc-type.cl
M clang/test/CodeGenOpenCL/amdgcn-flat-scratch-name.cl
M clang/test/CodeGenOpenCL/amdgcn-large-globals.cl
M clang/test/CodeGenOpenCL/amdgcn-non-temporal-store.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCL/amdgpu-alignment.cl
M clang/test/CodeGenOpenCL/amdgpu-attrs.cl
M clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-calling-conv.cl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel-linking.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
M clang/test/CodeGenOpenCL/amdgpu-features-default-delta.cl
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/CodeGenOpenCL/amdgpu-ieee.cl
M clang/test/CodeGenOpenCL/amdgpu-module-flag-xnack-sramecc.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
M clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M clang/test/CodeGenOpenCL/atomic-builtins-default-to-device-scope.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/atomics-cas-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/atomics-unsafe-hw-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/backend-unsupported-warning.ll
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark-errs.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-ci.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-cvt-off-f32-i4.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err-clamp.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fiji.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-flat-address-space.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx7-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx908-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx90a-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-5-generic-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cluster-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-cooperative-atomics.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-monitor.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-tr.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-tensor-load-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1251-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9-4-generic-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950-read-tr.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx950.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx11-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w32-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w64-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gws-insts.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-interp.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-load-to-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma-gfx908-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-mfma.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-atomic-add.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-atomic-max.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-store-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-store.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-raytracing.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-s-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-smfmac-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-struct-buffer-load-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-struct-buffer-store-format.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-gfx1250-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx1030.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx8.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx942.cl
M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
M clang/test/CodeGenOpenCL/byval.cl
M clang/test/CodeGenOpenCL/cast_image.cl
M clang/test/CodeGenOpenCL/check-atomic-alignment.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/func-call-dbg-loc.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/inline-asm-amdgcn.cl
M clang/test/CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
M clang/test/CodeGenOpenCL/lifetime.cl
M clang/test/CodeGenOpenCL/nullptr.cl
M clang/test/CodeGenOpenCL/numbered-address-space.cl
M clang/test/CodeGenOpenCL/opencl-kernel-call.cl
M clang/test/CodeGenOpenCL/private-array-initialization.cl
M clang/test/CodeGenOpenCL/size_t.cl
M clang/test/CodeGenOpenCL/sqrt-fpmath.cl
M clang/test/CodeGenOpenCL/visibility.cl
M clang/test/CodeGenOpenCL/vla.cl
M clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/DebugInfo/Generic/amdgpu-barrier-type-debug-info.c
M clang/test/DebugInfo/Generic/amdgpu-buffer-rsrc-type-debug-info.c
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
M clang/test/Frontend/opencl.cl
M clang/test/Headers/__clang_hip_libdevice_declares.cpp
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/amdgcn_openmp_device_math.c
M clang/test/Headers/amdgcn_openmp_device_math_c.c
M clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
M clang/test/Headers/amdhsa_abi.cl
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/hip-header.hip
M clang/test/Headers/openmp-device-functions-bool.c
M clang/test/Headers/openmp_device_math_isnan.cpp
M clang/test/Headers/openmp_new_nothrow.cpp
A clang/test/Index/USR/class-type-tpl-arg.cpp
M clang/test/Index/cxx14-lambdas.cpp
M clang/test/Index/index-refs.cpp
M clang/test/Index/index-template-specialization.cpp
M clang/test/Index/pipe-size.cl
A clang/test/Layout/ms-arm64-aligned-base-tail-padding.cpp
M clang/test/Lexer/unicode.c
M clang/test/Misc/amdgcn.languageOptsOpenCL.cl
M clang/test/Misc/backend-resource-limit-diagnostics.cl
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-canonical-prefixes.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-amdgcnspirv.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/test/OffloadTools/clang-offload-bundler/standardize.c
M clang/test/OffloadTools/clang-offload-bundler/zlib.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
M clang/test/OpenMP/amdgcn-attributes.cpp
M clang/test/OpenMP/amdgcn_debug_nowait.c
M clang/test/OpenMP/amdgcn_device_function_call.cpp
M clang/test/OpenMP/amdgcn_ldbl_check.cpp
M clang/test/OpenMP/amdgcn_save_temps.c
M clang/test/OpenMP/amdgcn_sret_ctor.cpp
M clang/test/OpenMP/amdgcn_target_codegen.cpp
M clang/test/OpenMP/amdgcn_target_device_vla.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/amdgcn_target_init_temp_alloca.cpp
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/amdgcn_weak_alias.cpp
M clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
M clang/test/OpenMP/amdgpu_exceptions.cpp
M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
M clang/test/OpenMP/amdgpu_throw.cpp
M clang/test/OpenMP/amdgpu_throw_trap.cpp
M clang/test/OpenMP/amdgpu_try_catch.cpp
M clang/test/OpenMP/copy-gaps-1.cpp
M clang/test/OpenMP/copy-gaps-2.cpp
M clang/test/OpenMP/copy-gaps-3.cpp
M clang/test/OpenMP/copy-gaps-4.cpp
M clang/test/OpenMP/copy-gaps-5.cpp
M clang/test/OpenMP/copy-gaps-6.cpp
M clang/test/OpenMP/debug-info-kmpc.cpp
M clang/test/OpenMP/declare_target_local_codegen.cpp
M clang/test/OpenMP/declare_target_local_map_messages.cpp
M clang/test/OpenMP/declare_target_local_usm_codegen.cpp
M clang/test/OpenMP/declare_target_nohost_variant_messages.cpp
M clang/test/OpenMP/declare_variant_construct_codegen_1.c
M clang/test/OpenMP/force-usm.c
M clang/test/OpenMP/interop_codegen.cpp
M clang/test/OpenMP/metadirective_ast_print.c
M clang/test/OpenMP/metadirective_device_arch_codegen.cpp
M clang/test/OpenMP/metadirective_device_isa_codegen_amdgcn.cpp
M clang/test/OpenMP/ompx_attributes_codegen.cpp
M clang/test/OpenMP/strided_update_variable_stride_codegen.c
M clang/test/OpenMP/target_data_if_logical_codegen.cpp
M clang/test/OpenMP/target_exceptions_messages.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
M clang/test/OpenMP/target_num_teams_num_threads_attributes.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
M clang/test/OpenMP/target_parallel_no_exceptions.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_messages.cpp
M clang/test/OpenMP/target_team_variable_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_distribute.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
M clang/test/OpenMP/target_update_count_expression_codegen.c
M clang/test/OpenMP/target_visibility.cpp
M clang/test/OpenMP/thread_limit_gpu.c
M clang/test/PCH/aarch64-sve-types.c
M clang/test/Preprocessor/builtin_aux_info.cpp
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/predefined-macros.c
M clang/test/Sema/amdgcn-address-spaces.c
M clang/test/Sema/amdgcn-va-list-type.c
M clang/test/Sema/attr-model.cpp
M clang/test/Sema/builtin-amdgcn-atomic-inc-dec-failure.cpp
M clang/test/Sema/builtin-amdgcn-fence-failure.cpp
M clang/test/Sema/callingconv-devicekernel.cpp
M clang/test/Sema/constexpr.c
M clang/test/Sema/inline-asm-validate-amdgpu.cl
A clang/test/Sema/inline-asm-validate-loongarch.c
M clang/test/Sema/scoped-atomic-ops.c
M clang/test/Sema/warn-unreachable.c
M clang/test/Sema/wave-reduce-builtins-validate-amdgpu.cl
M clang/test/SemaCUDA/addr-of-overloaded-fn.cu
M clang/test/SemaCUDA/addr-of-overloaded-template-fn.cu
M clang/test/SemaCUDA/allow-int128.cu
M clang/test/SemaCUDA/amdgpu-builtins-pointer-args.cu
M clang/test/SemaCUDA/amdgpu-f128.cu
M clang/test/SemaCUDA/amdgpu-size_t.cu
M clang/test/SemaCUDA/amdgpu-windows-vectorcall.cu
M clang/test/SemaCUDA/atomic-ops.cu
M clang/test/SemaCUDA/builtin-mangled-name.cu
M clang/test/SemaCUDA/cluster_dims.cu
M clang/test/SemaCUDA/const-var.cu
M clang/test/SemaCUDA/constexpr-var.cu
M clang/test/SemaCUDA/deferred-diags-dedup.cu
M clang/test/SemaCUDA/float16.cu
M clang/test/SemaCUDA/fp16-arg-return.cu
M clang/test/SemaCUDA/implicit-hd-dtor-explicit-instantiation.cu
M clang/test/SemaCUDA/implicit-hd-explicit-inst-organic-caller.cu
M clang/test/SemaCUDA/implicit-hd-overload-ambig-organic-caller.cu
M clang/test/SemaCUDA/overloaded-builtin.cu
M clang/test/SemaCUDA/windows-calling-conv.cu
M clang/test/SemaCXX/amdgpu-barrier.cpp
M clang/test/SemaCXX/amdgpu-buffer-rsrc.cpp
M clang/test/SemaCXX/amdgpu-image-rsrc.cpp
M clang/test/SemaCXX/amdgpu-sizeof-alignof.cpp
A clang/test/SemaCXX/atomic-auto.cpp
A clang/test/SemaCXX/qualified-function-typeof.cpp
M clang/test/SemaHIP/amdgpu-av-load-store.hip
M clang/test/SemaHIP/amdgpu-barrier.hip
M clang/test/SemaHIP/amdgpu-buffer-rsrc.hip
M clang/test/SemaHIP/amdgpu-builtin-in-lambda-with-unsupported-attribute.hip
M clang/test/SemaHIP/amdgpu-builtin-in-lambda.hip
M clang/test/SemaHIP/amdgpu-ds-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-cant-jump.hip
M clang/test/SemaHIP/amdgpu-feature-builtins-return-type-deduction.hip
M clang/test/SemaHIP/amdgpu-feature-predicate.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-flat-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fadd-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmax-err.hip
M clang/test/SemaHIP/amdgpu-global-atomic-fmin-err.hip
M clang/test/SemaHIP/amdgpu-global-load-lds-template.hip
M clang/test/SemaHIP/amdgpu-is-invocable.hip
M clang/test/SemaHIP/amdgpu-processor-is.hip
M clang/test/SemaHIP/atomic-deprecated.hip
M clang/test/SemaHIP/builtins-amdgcn-buffer-format.hip
M clang/test/SemaHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
M clang/test/SemaHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-add.hip
M clang/test/SemaHIP/builtins-amdgcn-raw-buffer-atomic-fmin-max.hip
M clang/test/SemaHIP/hip-builtin-lvalue-to-rvalue.hip
M clang/test/SemaHIP/incorrect-atomic-scope.hip
M clang/test/SemaHIP/shared-variable-too-large.hip
M clang/test/SemaHIP/zero-sized-device-array.hip
M clang/test/SemaHipStdPar/device-can-call-host.cpp
M clang/test/SemaOpenCL/amd-media-ops.cl
M clang/test/SemaOpenCL/amdgpu-attrs.cl
M clang/test/SemaOpenCL/amdgpu-barrier.cl
M clang/test/SemaOpenCL/amdgpu-buffer-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-ds-atomic-fadd-err.cl
M clang/test/SemaOpenCL/amdgpu-image-rsrc.cl
M clang/test/SemaOpenCL/amdgpu-num-sgpr-vgpr-deprecated.cl
M clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
M clang/test/SemaOpenCL/atomic-ops.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cmp-deprecated.cl
M clang/test/SemaOpenCL/builtins-amdgcn-cvt-off-f32-i4-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-ci.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-f16.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-flat-address-space.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx10-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx10.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx12.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-cooperative-atomics.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1251-wmma-w32-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx908-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx90a-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx942-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx950.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-lds-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-target-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-load-to-lds-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-add-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-add-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-atomic-fmin-fmax-target-err.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-format-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-load-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-buffer-store-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-ptr-buffer-load-lds-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-raw-ptr-buffer-load-lds-target-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-s-buffer-load-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-s-wait-event.cl
M clang/test/SemaOpenCL/builtins-amdgcn-struct-buffer-format-error.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
M clang/test/SemaOpenCL/builtins-image-load-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-image-load-param-gfx942-err.cl
M clang/test/SemaOpenCL/builtins-image-store-param-gfx1100-err.cl
M clang/test/SemaOpenCL/builtins-image-store-param-gfx942-err.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/half-float16-vector-compatibility.cl
M clang/test/SemaOpenCL/incorrect-atomic-scope.cl
M clang/test/SemaOpenCL/numbered-address-space.cl
M clang/test/SemaOpenCL/sampler_t.cl
M clang/test/SemaOpenCLCXX/amdgpu-nullptr.clcpp
M clang/test/SemaOpenMP/amdgpu-barrier.cpp
M clang/test/SemaOpenMP/amdgpu-buffer-rsrc.cpp
M clang/test/SemaOpenMP/amdgpu-image-rsrc.cpp
M clang/test/SemaSYCL/sycl-cconv-win.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Tooling/HeaderIncludesTest.cpp
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M clang/www/make_cxx_dr_status
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_test.cpp
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
A compiler-rt/test/profile/AMDGPU/device-module-load-file.hip
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Optimizer/OpenACC/Passes.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
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M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/GenericDomTree.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Target/TargetMacroFusion.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/CMakeLists.txt
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/include/llvm/Transforms/Scalar/AlignmentFromAssumptions.h
M llvm/include/llvm/Transforms/Scalar/LogicalSROA.h
M llvm/include/llvm/Transforms/Utils/AssignGUID.h
M llvm/include/llvm/Transforms/Utils/LowerCommentStringPass.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/TargetSubtargetInfo.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCSubtargetInfo.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/ProfileData/SampleProf.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
A llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCAsmInfo.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCAsmInfo.cpp
M llvm/lib/Target/Lanai/Lanai.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
M llvm/lib/Target/MSP430/MSP430.h
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/DebugSSAUpdater.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/AArch64/clmul.ll
A llvm/test/Analysis/DXILResource/has-atomic64-use.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
A llvm/test/Analysis/HashRecognize/def-use-chains-visited.ll
R llvm/test/Analysis/HashRecognize/dig-recurrence.ll
R llvm/test/CodeGen/AArch64/GlobalISel/irtranslater-samesign.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero-unsupported.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-with-success.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop-no-implicit-float.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-dyn-alloca.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-hint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-indexed-load-stores.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-get-dynamic-area-offset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-intrinsic-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-range.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lrint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-lround.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-with-debug-info.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-xor.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rotr-rotl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sbfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-zext-128.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift-imm-promote-dloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-store-vector-bools.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-threeway-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadd-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ubfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usub-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-compress.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xtn.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-zextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner-zext-trunc-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-combiner.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
R llvm/test/CodeGen/AArch64/macho-weak-alias.ll
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-post-ra.mir
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-pre-ra.mir
A llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax.ll
M llvm/test/CodeGen/AArch64/select_fmf.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests.ll
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
A llvm/test/CodeGen/AMDGPU/mfma-no-multiple-copies.mir
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
A llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-interference.mir
A llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
M llvm/test/CodeGen/AMDGPU/select-nsz-known-values-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/si-late-branch-lowering-preserve-loop-info.mir
M llvm/test/CodeGen/AMDGPU/si-pre-emit-peephole-preserve-loop-info.mir
M llvm/test/CodeGen/AMDGPU/spillv16.ll
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-regalloc.mir
A llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-sched.mir
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
A llvm/test/CodeGen/DirectX/ContainerData/PSVResources-UsedByAtomic64.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi12.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
A llvm/test/CodeGen/MIR/X86/machine-verifier-nophi.mir
M llvm/test/CodeGen/NVPTX/alias.ll
M llvm/test/CodeGen/NVPTX/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/blocksareclusters-kernel-attr.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-sm90-ptx86.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-sm90.ll
M llvm/test/CodeGen/NVPTX/fence-proxy.ll
M llvm/test/CodeGen/NVPTX/fence.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/global-cycle-alias.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/NVPTX/op-fence.ll
M llvm/test/CodeGen/NVPTX/prmt-const-folding.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/switch.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/thread-fence.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
A llvm/test/CodeGen/RISCV/tlsdesc-clobber-vector.ll
M llvm/test/CodeGen/RISCV/tlsdesc-clobber.ll
A llvm/test/CodeGen/RISCV/zero-call-used-regs-v.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array-skip-element-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-array.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/NonUniformIdx/RWBufferNonUniformIdxLoop.ll
A llvm/test/CodeGen/SPIRV/instructions/ret-single-element-array.ll
M llvm/test/CodeGen/SPIRV/opencl/vload_halfn.ll
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
M llvm/test/CodeGen/SystemZ/memmove-01.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vselect-avx.ll
M llvm/test/DebugInfo/Generic/debug-info-qualifiers.ll
M llvm/test/DebugInfo/Generic/dwarf5-debug-info-static-member.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/incorrect-variable-debugloc.ll
M llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
M llvm/test/DebugInfo/Generic/namespace.ll
M llvm/test/DebugInfo/Generic/varargs.ll
M llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/X86/align_cpp11.ll
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/string-offsets-multiple-cus.ll
M llvm/test/DebugInfo/X86/string-offsets-table.ll
M llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll
M llvm/test/Instrumentation/Instrumentor/default_config.json
A llvm/test/Instrumentation/Instrumentor/inline_runtime.ll
A llvm/test/Instrumentation/Instrumentor/inline_runtime_config.json
M llvm/test/Instrumentation/Instrumentor/lit.local.cfg
A llvm/test/Instrumentation/Instrumentor/runtimes/bytes_computed_rt.ll
A llvm/test/TableGen/AMDGPUTargetDefErrors.td
M llvm/test/TableGen/MacroFusion.td
A llvm/test/TableGen/ProcessorAlias.td
A llvm/test/TableGen/ProcessorAliasErrors.td
M llvm/test/TableGen/RuntimeLibcallEmitter-bad-system-library-entry-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter-nested-predicates-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag-errors.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/test/TableGen/aarch64-apple-tuning-features.td
M llvm/test/TableGen/aarch64-register-info-stats.td
A llvm/test/TableGen/eof-after-endif.td
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/large-system-growth.ll
A llvm/test/Transforms/ConstraintElimination/partial-decomposition.ll
R llvm/test/Transforms/ConstraintElimination/retry-without-decomposition.ll
M llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll
M llvm/test/Transforms/Coroutines/coro-split-00.ll
M llvm/test/Transforms/InstCombine/cast_ptr.ll
M llvm/test/Transforms/InstCombine/is_fpclass.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
M llvm/test/Transforms/LoopUnroll/RISCV/vector.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-access-wide-stride.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-narrow-iv.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
M llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
A llvm/test/Transforms/RelLookupTableConverter/AArch64/no_relative_lookup_table.ll
M llvm/test/Transforms/RelLookupTableConverter/unnamed_addr.ll
M llvm/test/Transforms/SCCP/preserve-analysis.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/buildvector-used-by-insertvalue.ll
A llvm/test/Transforms/SLPVectorizer/X86/schedule-bundle-missing-for-expanded-binop-parent.ll
M llvm/test/Transforms/SimplifyCFG/pr165301.ll
M llvm/test/Transforms/SimplifyCFG/switch-dedup.ll
M llvm/test/Transforms/SimplifyCFG/switch-umin.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
M llvm/test/Transforms/VectorCombine/X86/permute-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffletoidentity-bitcast.ll
M llvm/test/Transforms/VectorCombine/pr197910.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
M llvm/test/tools/llubi/attribute_noundef_ub.ll
M llvm/test/tools/llubi/attributes.ll
M llvm/test/tools/llubi/bitcast_be.ll
M llvm/test/tools/llubi/bitcast_le.ll
A llvm/test/tools/llubi/bytes_poison.ll
A llvm/test/tools/llubi/bytes_undef.ll
M llvm/test/tools/llubi/freeze.ll
M llvm/test/tools/llubi/global.ll
M llvm/test/tools/llubi/load_noundef_ub_undef.ll
M llvm/test/tools/llubi/loadstore_be.ll
M llvm/test/tools/llubi/loadstore_le.ll
A llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-cas.s
A llvm/test/tools/llvm-profdata/eytzinger-split-nametable-partition.test
M llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test
A llvm/test/tools/lto/legacy-thinlto-cache-key.ll
M llvm/tools/llubi/lib/Context.cpp
M llvm/tools/llubi/lib/Context.h
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llubi/lib/Value.cpp
M llvm/tools/llubi/lib/Value.h
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.h
M llvm/tools/lto/lto.cpp
M llvm/unittests/ADT/IntrusiveRefCntPtrTest.cpp
M llvm/unittests/CAS/OnDiskCASLoggerTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/CodeGen/MachineOperandTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/Support/GenericDomTreeTest.cpp
M llvm/unittests/Support/VirtualOutputBackendTest.cpp
M llvm/unittests/Target/AArch64/AArch64InstPrinterTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/Transforms/Utils/CloningTest.cpp
A llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
M llvm/utils/TableGen/Basic/CMakeLists.txt
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
M llvm/utils/TableGen/DAGISelMatcher.cpp
M llvm/utils/TableGen/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/gn/README.rst
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/build/buildflags.gni
M llvm/utils/gn/build/symlink_or_copy.gni
M llvm/utils/gn/build/toolchain/BUILD.gn
M llvm/utils/gn/secondary/BUILD.gn
M llvm/utils/gn/secondary/bolt/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/tool/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/xpc/framework/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Platform/Windows/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/LogicalView/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ar/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cxxfilt/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwp/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-libtool-darwin/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-lipo/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-nm/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-rc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readobj/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-size/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-strings/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M llvm/utils/release/test-release.sh
M mlir/include/mlir/Analysis/FlatLinearValueConstraints.h
M mlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSA.h
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAOps.td
M mlir/lib/Analysis/FlatLinearValueConstraints.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/WasmSSA/IR/WasmSSAOps.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv-unsupported.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
A mlir/test/Conversion/RaiseWasm/wasm-global-set-to-memref.mlir
A mlir/test/Conversion/RaiseWasm/wasm-select-to-arith-select.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
A mlir/test/Dialect/Linalg/block-pack-matmul-scalable.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/roundtrip.mlir
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/WasmSSA/custom_parser/global.mlir
A mlir/test/Dialect/WasmSSA/custom_parser/select.mlir
M mlir/test/Dialect/WasmSSA/global-invalid.mlir
A mlir/test/Integration/Dialect/EmitC/inline-oz-test-model-tosa.mlir
A mlir/test/Integration/Dialect/EmitC/regalloc-eviction-test-model-tosa.mlir
M mlir/test/Target/LLVMIR/openmp-llvm-invalid.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-simd-guided.mlir
M mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/unittests/Analysis/Presburger/Parser.h
M offload/liboffload/API/Common.td
A offload/liboffload/API/Context.td
M offload/liboffload/API/Memory.td
M offload/liboffload/API/OffloadAPI.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/level_zero/dynamic_l0/L0DynWrapper.cpp
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/include/L0Defs.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Event.h
M offload/plugins-nextgen/level_zero/include/L0Interop.h
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/include/L0Program.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Event.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/plugins-nextgen/level_zero/src/L0Memory.cpp
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/context/olCreateContext.cpp
A offload/unittests/OffloadAPI/context/olDestroyContext.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfo.cpp
A offload/unittests/OffloadAPI/context/olGetContextInfoSize.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olGetMemInfo.cpp
M offload/unittests/OffloadAPI/memory/olMemAlloc.cpp
M offload/unittests/OffloadAPI/memory/olMemAllocAligned.cpp
M offload/unittests/OffloadAPI/memory/olMemFree.cpp
M orc-rt/include/orc-rt-c/CoreTypes.h
A orc-rt/include/orc-rt-c/Session.h
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
A orc-rt/include/orc-rt/StringExtras.h
M orc-rt/include/orc-rt/ThreadPoolRunner.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/lib/executor/Session.cpp
M orc-rt/lib/executor/ThreadPoolRunner.cpp
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/SessionTest.cpp
A orc-rt/test/unit/StringExtrasTest.cpp
M orc-rt/test/unit/ThreadPoolRunnerTest.cpp
M polly/include/polly/Support/SCEVAffinator.h
M polly/lib/Support/SCEVAffinator.cpp
M polly/lib/Support/SCEVValidator.cpp
M polly/lib/Support/ScopHelper.cpp
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
rebase
Created using spr 1.3.8-wip
Compare: https://github.com/llvm/llvm-project/compare/ac0fbaac2f3c...aca7cdab9e98
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