[all-commits] [llvm/llvm-project] ee407f: Reapply "[libc] Port process utilities to hermetic...
Pengcheng Wang via All-commits
all-commits at lists.llvm.org
Fri Jul 24 03:28:23 PDT 2026
Branch: refs/heads/users/wangpc-pp/spr/main.tri-remove-reserved-registers-in-getregpressuresetlimit-1
Home: https://github.com/llvm/llvm-project
Commit: ee407f7e7069cccfdc1815de07e17cebf83d19f9
https://github.com/llvm/llvm-project/commit/ee407f7e7069cccfdc1815de07e17cebf83d19f9
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcDeathTestExecutors.cpp
M libc/test/src/stdlib/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
Reapply "[libc] Port process utilities to hermetic mode and enable some tests" (#211484)
This reverts https://github.com/llvm/llvm-project/pull/210889
(https://github.com/labath/llvm-project/commit/b7f642fdb262e2ed3c2209b9a10017084e1595ad,
"Revert
recent changes to the hermetic tests"), re-applying
https://github.com/llvm/llvm-project/pull/209999
(https://github.com/labath/llvm-project/commit/9e2e9b33e14808541c0470b92ade34bee6608bf6,
"[libc] Port process
utilities to hermetic mode and enable some tests") and
https://github.com/llvm/llvm-project/pull/210715
(https://github.com/labath/llvm-project/commit/4bd1a447e136e60ea441370ac5d7b898aa4efab0,
"[libc] Make hermetic test
syscall deps linux-only"), which was reverted due to failures on the GPU
bots.
There are a couple of small changes w.r.t the original patches:
- This version disables the exit tests on builds that do not
support subprocess tests (via the newly introduced
LIBC_TEST_SUBPROCESS_TESTS). This is necessary because the GPU builds
contain the relevant entry points, which means their tests are not
skipped automatically.
- fix a typo in a variable name
- make the dependencies conditional on LIBC_TEST_SUBPROCESS_TESTS
instead of listing the target OSs directly. This is a no-op, as that's
exactly how the variable is defined, but it makes the code cleaner.
Commit: aa590d15f2c9f035ad70cd532bba859e7d127160
https://github.com/llvm/llvm-project/commit/aa590d15f2c9f035ad70cd532bba859e7d127160
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/tools/spirv-tools/CMakeLists.txt
Log Message:
-----------
[SPIR-V] Fix SPIRVTools download step failing on rerun (#211561)
Customized DOWNLOAD_COMMAND ran a raw `git clone`, which fails with
"destination path already exists" whenever ninja reruns the download
step against an already cloned checkout. Use the native
GIT_REPOSITORY/GIT_TAG (with default DOWNLOAD_COMMAND) step instead,
which handles this case correctly
Commit: 6e68094d4bdd3d0cc7ea08f97992cc0436456637
https://github.com/llvm/llvm-project/commit/6e68094d4bdd3d0cc7ea08f97992cc0436456637
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
Log Message:
-----------
[UniformityAnalysis] Make BlockLabels transient and switch to SmallVector. NFC (#211734)
Drop the field from the descriptor and keep the labels in a
propagator-local SmallVector indexed by block number.
Commit: 9e1be60f660c8cd78653ac6ddd6b73d7735079f9
https://github.com/llvm/llvm-project/commit/9e1be60f660c8cd78653ac6ddd6b73d7735079f9
Author: Thrrreeee <1379998393 at qq.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/DIEBuilder.h
M bolt/include/bolt/Core/DebugData.h
M bolt/include/bolt/Core/DebugNames.h
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Core/DebugNames.cpp
M bolt/lib/Core/GDBIndex.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
A bolt/test/X86/dwarf4-dwarf64-ranges.test
A bolt/test/X86/dwarf64-debug-info-aranges.test
A bolt/test/X86/dwarf64-debug-names.test
A bolt/test/X86/dwarf64-loclists.test
A bolt/test/X86/dwarf64-lowpc-highpc-convert.test
A bolt/test/X86/dwarf64-ref-addr.test
A bolt/test/X86/dwarf64-split-dwarf.test
A bolt/test/X86/dwarf64-str-offsets.test
A bolt/test/X86/dwarf64-types.test
A bolt/test/X86/mixed-dwarf32-dwarf64-debug-names.test
A bolt/test/X86/mixed-dwarf32-dwarf64-rnglists.test
A bolt/test/X86/mixed-dwarf32-dwarf64-str-offsets.test
Log Message:
-----------
[BOLT][DebugInfo] Add DWARF64 support for BOLT (#206437)
BOLT currently assumes the DWARF32 format when it rewrites debug
sections. As a result, rewriting a binary that was compiled with
`-gdwarf64` either produces a corrupted output or fails `llvm-dwarfdump
--verify`. This patch adds DWARF64 support to the BOLT DWARF rewriter,
honoring each unit's DwarfFormat and emitting correct encodings DWARF64
for binaries, including mix DWARF32 and DWARF64.
Commit: 7623cd8c6eec1741cb5ecd803d591fd38d3fc04b
https://github.com/llvm/llvm-project/commit/7623cd8c6eec1741cb5ecd803d591fd38d3fc04b
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/sys/auxv/linux/CMakeLists.txt
Log Message:
-----------
[libc] Make getauxval test hermetic (#210706)
To make this work, I needed to remove the getauxval definition from
HermeticTestUtils.cpp. Even though it was weak, it still prevented the
real one from being used because the linker will not extract an archive
member if the dependency has already been satisfied by a weak
definition.
I *think* I've removed the need for it by changing how the getauxval
dependency is declared in cmake (it fixes the errors on the presubmit
aarch64 bot), but I don't know if that was the only issue.
Commit: 1102d3f04027faf2aa1b9e9d68a4b9026ba6126d
https://github.com/llvm/llvm-project/commit/1102d3f04027faf2aa1b9e9d68a4b9026ba6126d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fmaddsub-combine.ll
M llvm/test/CodeGen/X86/fmsubadd-combine.ll
R llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
Log Message:
-----------
[X86] Remove lowerToAddSubOrFMAddSub vectorization lowering code (#211666)
Similar to #207406 - the middleend (SLP/VectorCombine/InstCombine)
should no longer generate any mixed "addsub" scalar buildvector patterns
for the backend.
We can remove the lowerToAddSubOrFMAddSub build vector code path and
rely on the combineShuffleToAddSubOrFMAddSub path.
The vector code created by SLP/VectorCombine isn't yet perfect (and I'm
still working on improving it), but lowerToAddSubOrFMAddSub is unrelated
and of no more use to us.
The CodeGen buildvector tests can be removed - equivalent test coverage
is present in Transforms/PhaseOrdering/X86 that generate shuffle
patterns that we test for in fmaddsub-combine.ll, fmsubadd-combine.ll
and sse3-avx-addsub.ll (and sse3-avx-addsub-2.ll can be deleted).
Fixes #144489
Commit: 6a8775b6f7e5a7e1bf3055819595b2612605c6f4
https://github.com/llvm/llvm-project/commit/6a8775b6f7e5a7e1bf3055819595b2612605c6f4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Get function from loop, TTI from LVP to call getMaxVScale (NFC) (#211670)
Remove unnecessary uses for CM from LVP::executePlan.
Commit: 1302d7b1c8f19575cb1a279bd776628fcf5c9dbc
https://github.com/llvm/llvm-project/commit/1302d7b1c8f19575cb1a279bd776628fcf5c9dbc
Author: chandan singh <36783761+chandankds at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
A llvm/test/Transforms/SampleProfile/pseudo-probe-musttail-deopt.ll
Log Message:
-----------
[PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (#211226)
PseudoProbe insertion can generate invalid IR by inserting a probe
between a musttail/llvm.experimental.deoptimize call and its following
ret. Insert the probe before these calls to preserve the required
instruction ordering.
Commit: 746ab9809c203c10884668deac22384388b47e90
https://github.com/llvm/llvm-project/commit/746ab9809c203c10884668deac22384388b47e90
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
[docs] Update BOLT Office Hours Zoom link (#211491)
Commit: c3a9625ef1437388fd92ebdddda58d980ec87229
https://github.com/llvm/llvm-project/commit/c3a9625ef1437388fd92ebdddda58d980ec87229
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[LangRef] Clarify interaction of noalias and synchronization (#211507)
Noalias applies to accesses on other threads, but this was not very
clear in existing wording, because "during the execution of the
function" is somewhat ambiguous.
Explicitly mention that it applies to accesses from other threads. This
means that conflicting accesses (i.e. not read-read) need to either
happen-before function entry, or function exit needs to happen-before
them, otherwise behavior is undefined. For accesses not based on the
noalias pointer, this requires synchronization *outside* the function.
Commit: 9f426801ba6781b5245440e24397ac1fe610523d
https://github.com/llvm/llvm-project/commit/9f426801ba6781b5245440e24397ac1fe610523d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/CodeGen/AArch64/arm64-fmax.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/masked-load-3xhalf.ll
M llvm/test/Transforms/InstCombine/fcmp-select.ll
M llvm/test/Transforms/InstCombine/minmax-fp.ll
M llvm/test/Transforms/InstCombine/unordered-fcmp-select.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks_cmp_sel_min_max.ll
Log Message:
-----------
[ValueTracking] Fix signed zero handling in minnum/maxnum matching (#210077)
The SPF float min/max matching skipped the check that either the select
is nsz or one of the ops non-zero in the case where the zero used in the
fcmp and select is the same one. This does not make any sense, because
which zero is used in the fcmp is just completely irrelevant.
This leads to miscompiles where the SPF pattern is lowered to hardware
minnum/maxnum operations. These have ordered zero, rather than picking
whichever zero is specified in the select. It can still be accidentally
correct if the zero happens to be the right one for min/max.
I believe the current assumption is that SPF only matches in cases where
signed zero behavior does not matter. An alternative way to fix this
would be to match the specific zero that's required to match ordered
zero semantics. Though I'd rather we match that in DAGCombine, not the
SPF based SDAGBuilder code.
Fixes https://github.com/llvm/llvm-project/issues/93414.
Commit: 35368cb5dd371b823a2ccc0f9598d753cb2529f4
https://github.com/llvm/llvm-project/commit/35368cb5dd371b823a2ccc0f9598d753cb2529f4
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M libc/test/src/sys/uio/CMakeLists.txt
M libc/test/src/sys/uio/readv_test.cpp
M libc/test/src/sys/uio/writev_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/read_write_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[libc] Convert readv, writev, and read_write tests to use pipes (#210725)
Using a pipe avoids races between "hermetic" and "unit" versions of the
same test and avoids leaving filesystem artifacts around if the test
fails. If I'm successful, we won't have the worry about the first
problem anymore, but I think it's still a nice cleanup.
Assisted by Gemini.
Commit: f392fe53464bbd5fabda5654c482d55b9b4342a9
https://github.com/llvm/llvm-project/commit/f392fe53464bbd5fabda5654c482d55b9b4342a9
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/optimized/TestDAP_optimized.py
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/test/API/tools/lldb-dap/repl-mode/TestDAP_repl_mode_detection.py
Log Message:
-----------
[lldb-dap] Migrate optimized, output and repl_mode_detection tests (#211597)
Commit: 100b6155c6fd6722a29deab55db1893b727c178e
https://github.com/llvm/llvm-project/commit/100b6155c6fd6722a29deab55db1893b727c178e
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/disassemble/TestDAP_disassemble.py
M lldb/test/API/tools/lldb-dap/threads/TestDAP_threads.py
Log Message:
-----------
[lldb-dap] Migrate threads and disassemble DAP test (#211277)
Commit: debd8a7f889b29551dff7897f807e17f90eeee1d
https://github.com/llvm/llvm-project/commit/debd8a7f889b29551dff7897f807e17f90eeee1d
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Subtarget.h
R llvm/test/CodeGen/AArch64/aarch64-no-mov-spill-chain.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
Log Message:
-----------
Revert "[AArch64] Enable Spillage Copy Elimination by default" (#211572)
Reverts llvm/llvm-project#186093
Issue https://github.com/llvm/llvm-project/issues/206839 shows that
EliminateSpillageCopies is not currently ready to be enabled by default
on AArch64. https://github.com/llvm/llvm-project/pull/207169 was raised
to fix the issue, but concerns were raised around complexity of the
function and change. Until a suitable solution can be found,
EliminateSpillageCopy will be disabled on AArch64 by default.
For those who wish to still use the pass, `-enable-spill-copy-elim=true`
will ensure the pass is run.
Commit: a00f27dfe3b66d10d23eaef401635fd392d1d0bc
https://github.com/llvm/llvm-project/commit/a00f27dfe3b66d10d23eaef401635fd392d1d0bc
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
Log Message:
-----------
[MachineSink] Use RegisterClassInfo::getRegPressureSetLimit (#211746)
I think this part was missed in #210826.
Commit: 2ae7310be6112c213adbc4321fd1fff5098e2fa1
https://github.com/llvm/llvm-project/commit/2ae7310be6112c213adbc4321fd1fff5098e2fa1
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
M llvm/test/MC/AMDGPU/gfx13_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx13_asm_vimage_alias.s
Log Message:
-----------
[AMDGPU] Add image_atomic_{min,max}_num_flt support to gfx13 (#211564)
GFX13 uses the num_flt suffix as the default assembler name for the
32-bit FP image atomic min/max instructions. Keep flt as a
backward-compatible alias. GFX12 is unchanged (flt default, num_flt
alias).
---------
Co-authored-by: Petar Avramovic <Petar.Avramovic at amd.com>
Commit: fd14ad5ade18ed6ad810fe75b9e91272fbf07923
https://github.com/llvm/llvm-project/commit/fd14ad5ade18ed6ad810fe75b9e91272fbf07923
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIR-V] Reuse PartialOrderingVisitor DominatorTree in structurizer splitter (#211544)
Based on the discussion in
https://github.com/llvm/llvm-project/pull/211198
Commit: 905ec411bd1e8ebf3ea527b79c208d58dbaa6f16
https://github.com/llvm/llvm-project/commit/905ec411bd1e8ebf3ea527b79c208d58dbaa6f16
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
Log Message:
-----------
[NFC][SPIR-V] Remove unused LoopInfo member from structurizer splitter (#211538)
Splitter never used its LoopInfo reference
Based on the discussion in
https://github.com/llvm/llvm-project/pull/211198
Commit: 4e19543b1a85e635a8c663081bfdf42488795623
https://github.com/llvm/llvm-project/commit/4e19543b1a85e635a8c663081bfdf42488795623
Author: julianmorillo <julianmorillo at users.noreply.github.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M openmp/runtime/test/ompt/callback.h
Log Message:
-----------
FIX some OMPT tests that fail on RISC-V (#156914)
There is a known issue with these tests (see
https://github.com/llvm/llvm-project/issues/35661).
It looks that the behaviour is very architecture specific and it was
somehow solved for aarch64 but no mention to riscv64.
Commit: 0e0418f2fd8f3144b0dd036bcd85cacab5b6b262
https://github.com/llvm/llvm-project/commit/0e0418f2fd8f3144b0dd036bcd85cacab5b6b262
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
Log Message:
-----------
[AArch64] Mark SP-only register classes as non-allocatable (#211549)
Reserved registers are not allocatable and since these are singleton
classes, they should be marked as such.
Assisted-by: codex
Commit: a1341c9cf78771b5a031fd295e091d3dd34fab0b
https://github.com/llvm/llvm-project/commit/a1341c9cf78771b5a031fd295e091d3dd34fab0b
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
Log Message:
-----------
[CIR][RISCV] Add new builtins (#211555)
Leave them NYI now.
Commit: 383e2662157dfea354edf140bc25477776bc5de9
https://github.com/llvm/llvm-project/commit/383e2662157dfea354edf140bc25477776bc5de9
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions.ll
Log Message:
-----------
[LV] Use SCEV to compute final value of complex induction variables (#195059)
Extend optimizeInductionLiveOutUsers to handle complex induction
variable by using SCEV analysis. When an induction variable forms an
affine AddRec {Start,+,Step}, compute the final value as Start +
(ResumeTripCount - 1) * Step using VPDerivedIVRecipe.
This patch eliminates unnecessary vector widening for induction
variables only used outside the loop.
Pre-commit test #195055
Commit: 4ce57c1dbce497925aae6263648753abf7aedc6f
https://github.com/llvm/llvm-project/commit/4ce57c1dbce497925aae6263648753abf7aedc6f
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-24 (Fri, 24 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/DIEBuilder.h
M bolt/include/bolt/Core/DebugData.h
M bolt/include/bolt/Core/DebugNames.h
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Core/DebugNames.cpp
M bolt/lib/Core/GDBIndex.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
A bolt/test/X86/dwarf4-dwarf64-ranges.test
A bolt/test/X86/dwarf64-debug-info-aranges.test
A bolt/test/X86/dwarf64-debug-names.test
A bolt/test/X86/dwarf64-loclists.test
A bolt/test/X86/dwarf64-lowpc-highpc-convert.test
A bolt/test/X86/dwarf64-ref-addr.test
A bolt/test/X86/dwarf64-split-dwarf.test
A bolt/test/X86/dwarf64-str-offsets.test
A bolt/test/X86/dwarf64-types.test
A bolt/test/X86/mixed-dwarf32-dwarf64-debug-names.test
A bolt/test/X86/mixed-dwarf32-dwarf64-rnglists.test
A bolt/test/X86/mixed-dwarf32-dwarf64-str-offsets.test
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcDeathTestExecutors.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/sys/auxv/linux/CMakeLists.txt
M libc/test/src/sys/uio/CMakeLists.txt
M libc/test/src/sys/uio/readv_test.cpp
M libc/test/src/sys/uio/writev_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/read_write_test.cpp
M lldb/test/API/tools/lldb-dap/disassemble/TestDAP_disassemble.py
M lldb/test/API/tools/lldb-dap/optimized/TestDAP_optimized.py
M lldb/test/API/tools/lldb-dap/output/TestDAP_output.py
M lldb/test/API/tools/lldb-dap/repl-mode/TestDAP_repl_mode_detection.py
M lldb/test/API/tools/lldb-dap/threads/TestDAP_threads.py
M llvm/docs/GettingInvolved.md
M llvm/docs/LangRef.md
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
R llvm/test/CodeGen/AArch64/aarch64-no-mov-spill-chain.ll
M llvm/test/CodeGen/AArch64/arm64-fmax.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/masked-load-3xhalf.ll
M llvm/test/CodeGen/X86/fmaddsub-combine.ll
M llvm/test/CodeGen/X86/fmsubadd-combine.ll
R llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
M llvm/test/MC/AMDGPU/gfx13_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx13_asm_vimage_alias.s
M llvm/test/Transforms/InstCombine/fcmp-select.ll
M llvm/test/Transforms/InstCombine/minmax-fp.ll
M llvm/test/Transforms/InstCombine/unordered-fcmp-select.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/X86/gep-use-outside-loop.ll
M llvm/test/Transforms/LoopVectorize/X86/pr51366-sunk-instruction-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/instruction-only-used-outside-of-loop.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/no_outside_user.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks_cmp_sel_min_max.ll
A llvm/test/Transforms/SampleProfile/pseudo-probe-musttail-deopt.ll
M llvm/tools/spirv-tools/CMakeLists.txt
M openmp/runtime/test/ompt/callback.h
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/a281eeed880f...4ce57c1dbce4
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