[all-commits] [llvm/llvm-project] 03ab16: [docs] Finish MyST migration for BOLT docs (#210199)
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Wed Jul 22 20:48:21 PDT 2026
Branch: refs/heads/users/boomanaiden154/main.webassembly-port-webassemblycfgsortpass
Home: https://github.com/llvm/llvm-project
Commit: 03ab16cb415ff8dc2cb06332a628b79a718c74d8
https://github.com/llvm/llvm-project/commit/03ab16cb415ff8dc2cb06332a628b79a718c74d8
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M bolt/docs/BOLTAArch64OptimizationStatus.md
M bolt/docs/GettingStarted.md
M bolt/docs/index.md
Log Message:
-----------
[docs] Finish MyST migration for BOLT docs (#210199)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #210198, which will be a standalone commit
that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections. Please spot check my work and approve if it looks good. You
can use the HTML links below to confirm it renders properly.
-----
Before/after validation links:
| Source file | Before HTML | After HTML |
| --- | --- | --- |
| `bolt/docs/BOLTAArch64OptimizationStatus.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/BOLTAArch64OptimizationStatus.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/BOLTAArch64OptimizationStatus.html)
|
| `bolt/docs/GettingStarted.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/GettingStarted.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/GettingStarted.html)
|
| `bolt/docs/index.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/index.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/index.html)
|
Commit: 611d015f0030e0d4f1b3bd2270205f6f6b6e20eb
https://github.com/llvm/llvm-project/commit/611d015f0030e0d4f1b3bd2270205f6f6b6e20eb
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/utils/gn/README.rst
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/build/buildflags.gni
M llvm/utils/gn/build/symlink_or_copy.gni
M llvm/utils/gn/build/toolchain/BUILD.gn
M llvm/utils/gn/secondary/BUILD.gn
M llvm/utils/gn/secondary/bolt/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/tool/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/xpc/framework/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ar/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cxxfilt/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwp/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-libtool-darwin/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-lipo/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-nm/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-rc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readobj/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-size/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-strings/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
Log Message:
-----------
gn build: Support building debug binaries from a release build directory.
This change makes it so that all binaries in `bin` have a corresponding
debug binary target `$TARGET.dbg` that will build a debug binary in
`bin.dbg/$TARGET`. This is implemented using a separate toolchain for
the debug builds. This has the following advantages over a separate
debug build directory:
1. Can use release mode tblgen to generate code for the debug build
binaries, which speeds up the build because it can run tblgen faster as
well as being able to reuse the tblgen binary from the release build.
2. Can reuse runtimes built in the release mode clang's resource
directory, avoiding the need to build them again with a slow debug
build of clang.
Assisted-by: gemini
Reviewers: aeubanks, nico
Reviewed By: aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/197843
Commit: a45ae4cf77776bdae8ab79c3b5b4d4ef7cbd7d99
https://github.com/llvm/llvm-project/commit/a45ae4cf77776bdae8ab79c3b5b4d4ef7cbd7d99
Author: lntue <lntue at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/math/hypot.h
M libc/test/src/math/smoke/hypot_test.cpp
Log Message:
-----------
[libc][math] Fix double-rounding errors with denormal inputs for hypot function. (#208247)
The issue was reported by Paul Zimmermann.
Solution: for denormal inputs, we use 1.0 + x trick after proper scaling
to mimick rounding at denormal scale.
Commit: eafc387c1da0620642f469fde70455c554ba3470
https://github.com/llvm/llvm-project/commit/eafc387c1da0620642f469fde70455c554ba3470
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/CCallback.h
A orc-rt/test/unit/CCallbackTest.cpp
M orc-rt/test/unit/CMakeLists.txt
Log Message:
-----------
[orc-rt] Add asCCallback utility -- C callbacks for methods. (#210048)
Adds orc_rt::asCCallback<&Class::method>, which produces a C-ABI
function pointer that forwards to the given member function. The first
parameter of the generated trampoline is an opaque context pointer (
void * for non-const methods, const void * for const methods) that is
cast back to the class type and used as the receiver:
struct Counter {
void inc(int N) { Count += N; }
int Count = 0;
};
Counter C;
void (*CB)(void *, int) = asCCallback<&Counter::inc>;
CB(asCCallbackContext<&Counter::inc>(C), 2); // C.Count == 2
asCCallbackContext produces the matching context pointer via
static_cast, so any base-class offset is applied and const-ness is
preserved; pairing it with asCCallback by the same method keeps things
correct under inheritance and const-qualification. (A raw cast of &C
would give the trampoline the wrong `this` when method's class is a base
at a non-zero offset.)
Specializations cover the const x noexcept combinations. The trampoline
is always noexcept -- a C caller cannot unwind a C++ exception, so an
escaping one terminates -- and return/argument types are restricted to
C-compatible (non-reference, trivially copyable) types via
static_assert.
Commit: 5658411aed0f610380323918ce4b02016f2df6f2
https://github.com/llvm/llvm-project/commit/5658411aed0f610380323918ce4b02016f2df6f2
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/resources/RWBuffer-imageformat.hlsl
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
Log Message:
-----------
[SPIRV] Pack 64-bit vec2 typed buffers into 4x32-bit images (#208626)
Commit: 6b9929001d0b46d087e871934e50e4783147fa7d
https://github.com/llvm/llvm-project/commit/6b9929001d0b46d087e871934e50e4783147fa7d
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M bolt/docs/profiles.md
M bolt/include/bolt/Profile/DataReader.h
M bolt/lib/Profile/DataReader.cpp
A bolt/test/X86/profile-symbols-mode.s
Log Message:
-----------
[BOLT] Add fdata symbols mode (#209932)
Add a new fdata profile mode accepting symbol names as-is.
It addresses the UX gap surfaced by #208313 that all methods of selecting
functions to process (symbolized profile types, `-funcs*` options) expect
disambiguated local symbols.
Introduce fdata mode activated by a `symbols` header line, where each subsequent
line is a (mangled) symbol name. The names are matched against restored function
names (with disambiguation suffix stripped), and every matching function gets an
execution count of 1.
This can be used to drive selective instrumentation (`--instrument-hot-only`) or
basic linker-script style optimizations.
Symbols are stored as branch entry data so matching reuses the existing default
branch profile path.
Test Plan:
Update docs/profiles.md and add profile-symbols-mode.s
Commit: 398f2117379f42764e433d19ea0d0cd65009a4aa
https://github.com/llvm/llvm-project/commit/398f2117379f42764e433d19ea0d0cd65009a4aa
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/StaticLibrary.h
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/TUSummaryEncoding.h
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-explicit-triple.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-namespace-override.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libempty.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libtwo.json
M clang/test/Analysis/Scalable/ssaf-linker/help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-create.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-time.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-verbose.test
M clang/tools/clang-ssaf-linker/CMakeLists.txt
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.h
Log Message:
-----------
[clang][ssaf] Add static-library create subcommand (#208799)
This change adds `clang-ssaf-linker static-library create` for bundling
TU summaries into a StaticLibrary archive. The linker has been
refactored to dispatch on `cl::SubCommand`; invocations without a
subcommand still run the existing linker pipeline unchanged for backward
compatibility.
rdar://181930526
Commit: 9f839a4396916283cc28e45d18d7f4742ad5094a
https://github.com/llvm/llvm-project/commit/9f839a4396916283cc28e45d18d7f4742ad5094a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Fix non-determinism in pointers comparison, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210216
Commit: a07b91d8243b8a8051dbbe5739eacc7942269c61
https://github.com/llvm/llvm-project/commit/a07b91d8243b8a8051dbbe5739eacc7942269c61
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/CMakeLists.txt
A lldb/examples/python/templates/scripted_stackframe_recognizer.py
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStackFrameRecognizerInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/recognizer.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
[lldb/script] Migrate frame recognizers onto ScriptedPythonInterface (#209805)
Give `frame recognizer add -l` a formal
ScriptedStackFrameRecognizerInterface, matching the architecture already
used by ScriptedProcess, ScriptedBreakpoint, etc.: a C++ interface
header, a Python-backed implementation built on
ScriptedPythonInterface's CreatePluginObject/Dispatch machinery,
PluginManager registration, and a generatable Python ABC template
(scripted_stackframe_recognizer.py).
get_recognized_arguments' documented contract returns a plain list of
lldb.SBValue (not an lldb.SBValueList), so it bypasses the generic
Dispatch<ValueObjectListSP>() extractor and calls the SWIG bridge
directly, matching the legacy behavior exactly.
ScriptedStackFrameRecognizer now holds a single interface object created
once in its constructor and reused across every RecognizeFrame() call,
same lifecycle as before.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 3e1948e9a528d1bc82f2a671a00c02fa8717f26f
https://github.com/llvm/llvm-project/commit/3e1948e9a528d1bc82f2a671a00c02fa8717f26f
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Add expression validation tests for DW_OP_swap (#210184)
Add DIExpression validation tests for DW_OP_swap that we noticed were
missing. The tests are based on the existing expression tests for
DW_OP_stack_value.
Tested via make check.
Assisted by AI.
Commit: b9869c8c920a7dfa983e215bc30729b13d8b353b
https://github.com/llvm/llvm-project/commit/b9869c8c920a7dfa983e215bc30729b13d8b353b
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll
Log Message:
-----------
[AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (#208744)
Add support for lowering masked loads/stores of <4 x bf16> and <8 x
bf16> when target features contain "+sve" and "+bf16".
Fixes: #201149
Commit: 464b46a73b7592c95222cf2e64b34ffe6f2cf251
https://github.com/llvm/llvm-project/commit/464b46a73b7592c95222cf2e64b34ffe6f2cf251
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/sysv_abi.c
A clang/test/CodeGen/target-avx-function-abi.c
A clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
Log Message:
-----------
[clang][CodeGen][X86_64] Honor per-function AVX ABI in C/C++ call paths, maintain old psABI for PlayStation. (#193298)
Fixes https://github.com/llvm/llvm-project/issues/64706
Wire per function x86 AVX ABI level into CodeGen arrangement methods so
__attribute(__target("avx"))) / __attribute(__target("avx512f"))) on
methods, ctors, and free-functions affects ABI lowering consistently.
Specifically:
- Added X86AVXABILevel member to CGFunctionInfo.
- Populated X86AVXABILevel member in CGFunctionInfo objects via
arrangement methods declared in CodeGenTypes.h.
- Respect CGFunctionInfo AVX Level in X86_64ABIInfo::computeInfo.
- Add/extend regression tests for:
- free-function target-attribute AVX ABI lowering
- C++ method/ctor target-attribute AVX ABI lowering
- PS4/PS5 legacy ABI behavior (no per-function AVX ABI change)
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 7fec267c9a44c76604e1135ee0ef694c4eaae784
https://github.com/llvm/llvm-project/commit/7fec267c9a44c76604e1135ee0ef694c4eaae784
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/src/stdfix/DiviFxTest.h
Log Message:
-----------
[libc][stdfix] Guard DiviFxTest shift edge cases against narrow IntType (#209970)
Fixes riscv32 buildbot failure from #206115.
Commit: 9d2181c78f4e248069e39ec0e5b899dfbfcf3d6a
https://github.com/llvm/llvm-project/commit/9d2181c78f4e248069e39ec0e5b899dfbfcf3d6a
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
Log Message:
-----------
[NFC] Reuse DwarfExpression fragment (#210181)
Reuse DwarfExpression fragment information since nothing changes it
between the outside of the loop and the inside of the loop.
Tested via make check.
Assisted by AI.
Commit: 1a3347f608394b12c5a18cb5b3457af4e85449a1
https://github.com/llvm/llvm-project/commit/1a3347f608394b12c5a18cb5b3457af4e85449a1
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel][clang][ssaf] Fix 398f2117379f42764e433d19ea0d0cd65009a4aa (#210222)
Commit: 27d7b61322f1528cc582a62d1b74683d24cc987b
https://github.com/llvm/llvm-project/commit/27d7b61322f1528cc582a62d1b74683d24cc987b
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFC] Use LoadInst::getProperties() when creating PRE load (#208605)
Use load's properties via getProperties() instead of individually
forwarding isVolatile(), getAlign(), getOrdering() and getSyncScopeID().
Reference: https://github.com/llvm/llvm-project/pull/206470
Commit: 4a75259134c72d8be7fa3ea36c9dc7bfc02640ac
https://github.com/llvm/llvm-project/commit/4a75259134c72d8be7fa3ea36c9dc7bfc02640ac
Author: hev <wangrui at loongson.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/lasx/issue207316.ll
M llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
M llvm/test/CodeGen/LoongArch/lsx/vexth.ll
Log Message:
-----------
[LoongArch] Fix invalid VEXTH combines for unsupported type extensions (#209725)
`performEXTENDCombine` could form `VEXTH`/`VEXTH_U` nodes for
unsupported type combinations, such as extending `v8i8` to `v8i32` or
`v2i64` to `v2i128`. These illegal nodes would later reach instruction
selection and trigger backend failures:
* `Cannot select: LoongArchISD::VEXTH`
* `Don't know how to legalize this operation`
Prevent these combines from firing by verifying that the destination
type is legal and has exactly twice the total bit width of the source
before forming a `VEXTH`/`VEXTH_U` node.
Apply the same checks to `performSHLCombine` for consistency.
Fixes
https://github.com/llvm/llvm-project/pull/207316#issuecomment-4978234865
Fixes
https://github.com/llvm/llvm-project/pull/207316#issuecomment-4979233899
Commit: 8aaa15e82688177db7c0c3fa06103d10f6799598
https://github.com/llvm/llvm-project/commit/8aaa15e82688177db7c0c3fa06103d10f6799598
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/BBAddrMapYAML.h
M llvm/lib/ObjectYAML/BBAddrMapYAML.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
Log Message:
-----------
[ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (#205991)
Preparatory NFC refactor to let the upcoming COFF emitter reuse the
BBAddrMap YAML encoder.
Commit: ddd21a5500bc65354211c0088520d0b331e862d7
https://github.com/llvm/llvm-project/commit/ddd21a5500bc65354211c0088520d0b331e862d7
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/include/flang/Lower/CUDA.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/CUDA/cuda-gpu-unified.cuf
R flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
Log Message:
-----------
[flang][cuda] Managed backing for -gpu=unified allocatables/pointers (#210149)
Under `-gpu=unified`, allocatables and pointers with no explicit CUDA data
attribute must be reachable from the device. Back them with CUDA managed
memory by selecting the unified allocator index at the ALLOCATE site (in
lowering), instead of stamping an implicit `Unified`/`Managed` CUDA data attribute
on the symbol in the frontend — the approach introduced in PR #209292.
This is necessary because attributing the symbol in the frontend routed every
plain allocatable/pointer through the CUDA Fortran managed descriptor
pipeline (constructor registration, `cuf.allocate`/`cuf.free`), which added
per-`ALLOCATE` overhead, forced special-casing for objects that may not legally carry a
CUDA attribute (COMMON members, derived-type components, module globals), and
changed symbol semantics used well beyond allocation. Choosing the allocator
index at the `ALLOCATE` site keeps the object a plain host allocatable/pointer while
the storage still comes from the managed allocator.
Commit: 963e226d9a6b923b10c8e328438838bd42e03d18
https://github.com/llvm/llvm-project/commit/963e226d9a6b923b10c8e328438838bd42e03d18
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M .github/workflows/release-binaries.yml
M .github/workflows/validate-release-version/action.yml
Log Message:
-----------
workflows: Fixes for release-binaries and upload-release-artifact (#209246)
There were some bugs in upload-release-artifact workflow and
release-binaries was not including this action in its checkout.
Commit: fe64fbbafc19e46ef461fac3ec0b4144a1ffc847
https://github.com/llvm/llvm-project/commit/fe64fbbafc19e46ef461fac3ec0b4144a1ffc847
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Extract mask, shuffle and AA helpers into SLUtils 3/3 (#209973)
Move the mask/shuffle construction and alias-analysis free helpers out
of SLPVectorizer.cpp into SLPVectorizer/SLPUtils.{h,cpp} (namespace
llvm::slpvectorizer).
Moved:
transformScalarShuffleIndiciesToVector
getShufflevectorNumGroups
calculateShufflevectorMask
UseMask (enum)
buildUseMask
isUndefVector
doesInTreeUserNeedToExtract
getLocation
isSimple
addMask
fixupOrderingIndices
getAltInstrMask
replicateMask
RFC: https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 3c6b4870425e7b62a966ff04f51f78920adbedb8
https://github.com/llvm/llvm-project/commit/3c6b4870425e7b62a966ff04f51f78920adbedb8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/include/orc-rt/TaskGroup.h
M orc-rt/test/unit/SessionTest.cpp
M orc-rt/test/unit/TaskGroupTest.cpp
Log Message:
-----------
[orc-rt] Add TaskGroup::TokenSource; drop raw group accessor (#210240)
Session::managedCodeTaskGroup() returned the raw
std::shared_ptr<TaskGroup> for the managed-code group, exposing the
group's full interface -- including close() and addOnComplete() -- to
callers, even though those operations are reserved for the Session.
Add TaskGroup::TokenSource, a strong handle whose sole role is to serve
as an argument to the TaskGroup::Token constructor. Session now exposes
managedCodeTokenSource() in its place, so clients can acquire tokens (to
keep managed code alive across shutdown) without gaining the ability to
close the group or register completion callbacks.
Commit: f2ef5670cf70371153caeb0ebbeae2323a61f8e0
https://github.com/llvm/llvm-project/commit/f2ef5670cf70371153caeb0ebbeae2323a61f8e0
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_dpp_lds_expected_active_lanes.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
Log Message:
-----------
[AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (#169213)
Move GFX11 SGPR VALU mask hazard waitcnt merging to the a forward scan
within the AMDGPUWaitSGPRHazard pass.
This simplifies the hazard recognizer code and allows merging of waitcnt
instructions in cases where SGPRs unaffected by pending writes are used.
In turn this greatly decreasing numbers of waits inserted in sequences
of V_CMP instructions writing SGPRs improving VALU pipeline performance.
Commit: 78ed03f555ea75d2337f618930c062f4d881a08b
https://github.com/llvm/llvm-project/commit/78ed03f555ea75d2337f618930c062f4d881a08b
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A flang/test/Lower/global-initialization-parens.f90
Log Message:
-----------
[flang] Add lowering tests for parenthesized initial values (#209664)
Add a LIT test that baselines the current lowering of parenthesized
initial values in fir.global initializer regions. Today a parenthesized
scalar or derived constant survives constant folding as a Parentheses
node and is lowered to a fir.no_reassoc operation inside the global init
region, while parentheses around characters, array named-constants, and
structure-constructor components are stripped before lowering.
This test pins that behavior so that an upcoming change to the
initializer-lowering path shows its behavior delta explicitly and has a
regression guard.
Assisted-by: AI
Commit: 15ae01dd24261bd70947aab884098e5dcd4096dd
https://github.com/llvm/llvm-project/commit/15ae01dd24261bd70947aab884098e5dcd4096dd
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/CMakeLists.txt
A clang-tools-extra/clangd/LSPBinder.cpp
M clang-tools-extra/clangd/LSPBinder.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/lib/Support/LSP/Transport.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
M utils/bazel/llvm-project-overlay/clang-tools-extra/clangd/BUILD.bazel
Log Message:
-----------
[clangd][Support] Outline LSP payload decode errors (#203121)
Move failed payload handling from `clangd::LSPBinder::parse<T>` and
`llvm::lsp::MessageHandler::parse<T>` into their non-inline
`handleParseError` functions, while keeping successful payload
conversion specialized in each `parse<T>` instantiation.
For a Darwin arm64 build, stripped clangd decreased by 32,848 bytes and
`__TEXT,__text` decreased by 25,180 bytes.
`ClangdTests --gtest_filter=LSPBinderTest.*` passes, and
`llvm/lib/Support/LSP/Transport.cpp` passes a standalone syntax compile.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Co-authored-by: OpenAI Codex <noreply at openai.com>
Commit: c488b2c2407bf29bb20f67bb8f3cf39c637d231e
https://github.com/llvm/llvm-project/commit/c488b2c2407bf29bb20f67bb8f3cf39c637d231e
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDMAOperations.md
Log Message:
-----------
[Docs][AMDGPU] Consistent use of "wave-uniform", "per-lane" and "immediate" (#209974)
When documenting DMA operations, use consistent qualifiers
(wave-uniform, per-lane, immediate) instead of referring to SGPRs and
VGPRs.
Assisted-By: Claude Opus 4.6
Commit: a376783e2ed3a44f63991c97513711faad09525b
https://github.com/llvm/llvm-project/commit/a376783e2ed3a44f63991c97513711faad09525b
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
Log Message:
-----------
[compiler-rt][ubsan] Fix suppressions for inlined functions (#206735)
Align suppression PC handling with getCallerLocation(), so function
suppressions identify the inlined function that caused a report.
Intentionally match only the innermost inline frame.
Extend suppressions-nested-calls.c coverage to -O1.
Fixes https://github.com/llvm/llvm-project/issues/209501
---------
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: 30bc042395a6cf0aa1e5de4fcc625d5b8c611767
https://github.com/llvm/llvm-project/commit/30bc042395a6cf0aa1e5de4fcc625d5b8c611767
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[compiler-rt][test] Use configured Python for lit page-size probe (#209175)
Use the same Python executable configured for the test suite, rather
than relying on python3 being on PATH.
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75
https://github.com/llvm/llvm-project/commit/c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/connect_accept_test.cpp
M libc/test/src/sys/socket/linux/listen_test.cpp
M libc/test/src/sys/socket/linux/socket_test_support.h
M libc/test/src/sys/socket/linux/sockname_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add remaining sys/socket functions and tests (#209798)
This patch adds the following sys/socket functions and syscall wrapper
libraries to BUILD.bazel:
- accept
- accept4
- bind
- connect
- getpeername
- getsockname
- listen
- sockatmark
I'm also enabling the unit tests for these functions. Running AF_UNIX
socket tests under Bazel ran into a problem where the absolute path to
the test sandbox directory exceeds the 108-byte limit of
sockaddr_un::sun_path. To work around that, I added a TestDirectoryScope
helper that temporarily chdirs into the test directory so the tests can
use short relative filenames, and restores the original working
directory on exit.
Assisted by Gemini.
Commit: 9445ad3f91d4331eead867f8b3c9c8a3818edac0
https://github.com/llvm/llvm-project/commit/9445ad3f91d4331eead867f8b3c9c8a3818edac0
Author: Rana Pratap Reddy <RanaPratapReddy.Nimmakayala at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
Log Message:
-----------
[CIR][AMDGPU] Adds `__amdgpu_buffer_rsrc_t` in the buffer-resource address space (#204782)
CIR previously lowering every AMDGPU opaque pointer to
`!cir.ptr<!void>`. Now `__amdgpu_buffer_rsrc_t` lower to
`!cir.ptr<!void, target_address_space(8)>` similar to (`ptr
addrspace(8)` in LLVM IR) matching CodeGen.
This change requires for upcoming raw buffer load/store/atomic builtins.
Those builtins `__builtin_amdgcn_raw_buffer_load/store_b*,
__builtin_amdgcn_raw_ptr_buffer_atomic_*` take a
`__amdgpu_buffer_rsrc_t` as operand, and the corresponding LLVM
intrinsics expect a `ptr addrspace(8)` resource argument.
Commit: 513ac13e7e5037af4b39c8c582dd7927f4c807fc
https://github.com/llvm/llvm-project/commit/513ac13e7e5037af4b39c8c582dd7927f4c807fc
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[Clang][RISCV] Add P extension reinterpret cast intrinsics (#210241)
Implement the "Reinterpret casts" section of the RISC-V P extension intrinsic
spec in `riscv_packed_simd.h`.
The 82 `__riscv_preinterpret_<from>_<to>` intrinsics provide
bit-pattern-preserving conversions between packed types and equal-width
scalars, and between equal-width packed types. They generate no instructions;
each is a `__builtin_bit_cast`.
Commit: 61fa8d3db491c4a864242f22ce31b730fb78ecb5
https://github.com/llvm/llvm-project/commit/61fa8d3db491c4a864242f22ce31b730fb78ecb5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/LibcallLoweringInfo.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
Log Message:
-----------
CodeGen: Rename LibcallLoweringModuleAnalysisResult to ModuleLibcallLoweringInfo (#210176)
Commit: 6f2bd9fd1a5e7c61893abf2f1e9246610e6a32f8
https://github.com/llvm/llvm-project/commit/6f2bd9fd1a5e7c61893abf2f1e9246610e6a32f8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
A flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
Log Message:
-----------
[flang][cuda] Add option to flag descriptor I/O as error (#210170)
Descriptor I/O is too expensive in some compilation mode (nordc). Add
ability to emit an error if they are found in device code.
Commit: 02f55a9e5e4775bc17cc23f9d1e7f5ee23cf63cd
https://github.com/llvm/llvm-project/commit/02f55a9e5e4775bc17cc23f9d1e7f5ee23cf63cd
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
Log Message:
-----------
[libc] add net/if.h to the list of installed headers (#210021)
on aarch64, riscv and x86_64.
Commit: c571b0bd7330a4b737ad7dec31e7f2b52edd3953
https://github.com/llvm/llvm-project/commit/c571b0bd7330a4b737ad7dec31e7f2b52edd3953
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/include/llvm-libc-types/struct_sockaddr_storage.h
M libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
Log Message:
-----------
[libc] Fix size of struct sockaddr_storage (#210037)
My cleverness with the union backfired as it introduced an
(architecture-specific) padding between before it. Drop the union to
avoid that.
This probably wouldn't break much as the structure exists just to
allocate space (and this made it larger), but we should fix it
nonetheless.
Commit: c4903855b64ee801d1b9caeb970921a63475c98b
https://github.com/llvm/llvm-project/commit/c4903855b64ee801d1b9caeb970921a63475c98b
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang/test/Driver/fakeflang.F
M flang/tools/fakeflang/fakeflang.cpp
M runtimes/cmake/config-Fortran.cmake
Log Message:
-----------
[fakeflang] Also detect CMakeTestGNU.c (#210175)
Two fixes when using CMake < 3.28 after #209482:
* In addition to `flang`, also recognize `fakeflang` to determine
whether any workaround for CMake not completely supporting Flang is
needed. `fakeflang` is used as a shim in #209482.
* For CMake < 3.24, CMake does not reognize Flang at all and tries other
methods to detect to the compiler, including the file `CMakeTestGNU.c`.
Make `fakeflang` recognize it as a probe attempt.
This should fix the
[openmp-offload-amdgpu-clang-flang](https://lab.llvm.org/buildbot/#/builders/67)
buildbot. The buildbot is currently upgrade to a newer CMake version,
and the minimum required version of CMake will become 3.31 soon.
Commit: 250f791e7002afb308e4a59dc5ef3e1f2e1c10af
https://github.com/llvm/llvm-project/commit/250f791e7002afb308e4a59dc5ef3e1f2e1c10af
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
Log Message:
-----------
[lldb] Fix tsan error in SymbolLocatorDebugSymbols (#209698)
g_dlsym_DBGCopyFullDSYMURLForUUID and g_dlsym_DBGCopyDSYMPropertyLists
are two globals that are lazily initialized when first used. TSan
complains that this lazy init code is not thread-safe as there is no
synchronization mechanism. In practice, the only race that can happen
here is that we initialize the same values concurrently, which should be
'safe' on any platform.
This patch moves the initialization code into a static local that
returns a const object. This makes this code thread-safe by construction
and fixes the TSan error.
It also fixes that we keep calling dlopen if the initialization fails.
That is, the `g_dlsym_DBGCopyFullDSYMURLForUUID == nullptr` will always
be true on systems where the framework doesn't exist, so this code will
try loading it on every function call and fail.
Commit: 89f5334990c5aa853fcbaa361aefe5b999e63dc5
https://github.com/llvm/llvm-project/commit/89f5334990c5aa853fcbaa361aefe5b999e63dc5
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/docs/CMakeLists.txt
R libc/docs/headers/time.rst
A libc/utils/docgen/time.yaml
Log Message:
-----------
[libc][docs] Dynamically generate time.h documentation (#210197)
Removed the static time.rst file.
Added time to docgen_list in libc/docs/CMakeLists.txt. Created
libc/utils/docgen/time.yaml to define the functions.
Assisted-by: Automated tooling, human reviewed.
Commit: d68dc184b1cec0a01876b3f635bce6c25a64edf6
https://github.com/llvm/llvm-project/commit/d68dc184b1cec0a01876b3f635bce6c25a64edf6
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/pre-fir-tree-assigned-goto.f90
Log Message:
-----------
[flang][PFT] record every target of an assigned GO TO (#210065)
Assigned GO TO (`go to v [, (l1, l2, ...)]`) is the third multiway
branch in the language, alongside the computed GO TO and arithmetic IF
that were addressed in PR #210012. Its PFTBuilder handler previously
did:
[&](const parser::AssignedGotoStmt &) {
eval.isUnstructured = true;
markSuccessorAsNewBlock(eval);
},
i.e. it recorded no branch targets at all -- neither `controlSuccessor`
nor `extraControlSuccessors` was populated.
Handle the assigned GO TO the same way PR #210012 handles the computed
GO TO and arithmetic IF: iterate every possible target and call
`markBranchTarget(eval, label)` for each, so that `controlSuccessor`
receives the first and `extraControlSuccessors` receives the rest.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: d134db0b2b989a2b15f91f24acca43497dfe0919
https://github.com/llvm/llvm-project/commit/d134db0b2b989a2b15f91f24acca43497dfe0919
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Remove byte-multiple trip count requirement (#210086)
The newly added carryless-multiply CRC loop optimization (#203405) does
not require a byte-multiple trip count unlike the Sarwate method which
was previously implemented. Loosen this requirement in HashRecognize and
reapply it in `optimizeCRCLoop`.
Commit: cc98c1eb84c690c65fba77b72c269a869978c898
https://github.com/llvm/llvm-project/commit/cc98c1eb84c690c65fba77b72c269a869978c898
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/IR/CycleInfo.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/IR/CycleInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[CycleInfo] Represent cycles by an opaque handle. NFC (#210117)
Consumers refer to a cycle by a GenericCycle pointer into
GenericCycleInfo's storage. Introduce GenericCycleRef, a value handle
wrapping the cycle's preorder index, and route every GenericCycleInfo
query and mutation through it. GenericCycle becomes an internal
implementation detail, so its storage representation can change without
touching callers.
Aided by Claude Opus 4.8, reviewed by Fable 5
Suggested by
https://github.com/llvm/llvm-project/pull/208614#pullrequestreview-4683378136
Commit: 90e31c46d005ae0a7f5968c38a9310bee499923c
https://github.com/llvm/llvm-project/commit/90e31c46d005ae0a7f5968c38a9310bee499923c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/LTO/LTO.cpp
A llvm/test/ThinLTO/X86/Inputs/cache-defined-globals-order.ll
A llvm/test/ThinLTO/X86/cache-defined-globals-order.ll
Log Message:
-----------
[LTO] Sort DefinedGlobals in LTO cache key (#210025)
Sort the DefindeGlobals by GUID when computing the LTO cache key, to
avoid making the cache key dependent on the insertion order. This fixes
large compile-time regressions in rust incremental builds.
Alternatively one could make collectDefinedGVSummariesPerModule() work
on the sortedRange(), but as that is also used in other places, it
probably makes sense to sort locally.
The issue was introduced in 760bb06cb3cd98832f1e4e7a4eaebd98b66d2bdd.
Commit: b69dd3366863acff56b0b2efdc4c4938097bb43e
https://github.com/llvm/llvm-project/commit/b69dd3366863acff56b0b2efdc4c4938097bb43e
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
Log Message:
-----------
[mlir][vector][nfc] Update integration tests (#210090)
Add comments, unify naming, remove redundant printing hooks.
Commit: 8b269587981fdc3b487cda5559ef75eeb475e613
https://github.com/llvm/llvm-project/commit/8b269587981fdc3b487cda5559ef75eeb475e613
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
Log Message:
-----------
[VectorCombine][X86] Add test coverage for #209714 (#210063)
Commit: 981c0f9037fc2e1e5c70ba2cfe61128557b5eeff
https://github.com/llvm/llvm-project/commit/981c0f9037fc2e1e5c70ba2cfe61128557b5eeff
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/thread/finish-from-empty-func/TestEmptyFuncThreadStepOut.py
M lldb/test/API/functionalities/thread/finish-from-empty-func/main.c
Log Message:
-----------
[lldb][test] Handle potential compiler differences in TestEmptyFuncThreadStepOut.py (#210050)
Fixes #195958
It was reported that this test sometimes failed in CI because lldb would
step out to line 6 instead of line 7.
Jim Ingham expained on the issue that both could be valid locations
(https://github.com/llvm/llvm-project/issues/195958#issuecomment-4384269846).
There's no garauntee that "step out" would go to the source line after
the call you step out of. All it does is go to the first location
outside of the call. If the compiler so chose, that could be on the same
line as the call.
I was not able to reproduce this failure mode, but I think it was
happening in CI before, and is possible. So I've made the test accept
line 6 or 7. Anything further than that we've gone too far and the test
will fail.
Commit: 9ee8b18b6c0758e57cedfa57e99ba85dfd247d35
https://github.com/llvm/llvm-project/commit/9ee8b18b6c0758e57cedfa57e99ba85dfd247d35
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
Log Message:
-----------
[mlir][vector] Fix e2e test post #210090 (#210270)
Failing bots:
* https://lab.llvm.org/buildbot/#/builders/177/builds/37626
* https://lab.llvm.org/buildbot/#/builders/116/builds/30570
Commit: 4894d4e87c332af24809b20573d880a4073b738b
https://github.com/llvm/llvm-project/commit/4894d4e87c332af24809b20573d880a4073b738b
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/Driver/darwin-target-variant-sdk-version.c
Log Message:
-----------
[clang][driver] Add a -target-variant alias for -darwin-target-variant (#208388)
Swift Build uses the `-target-variant` argument which is an alias for
-darwin-target-variant that's only present in the Xcode version of
clang. Upstream it for general support and parity with swiftc.
Co-authored-by: Alex Lorenz <arphaman at gmail.com>
Commit: 12c4c0bf0269218c6ffdddae1c895f892a3e4e75
https://github.com/llvm/llvm-project/commit/12c4c0bf0269218c6ffdddae1c895f892a3e4e75
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
Log Message:
-----------
[AMDGPU] Handle expert scheduling VA_VDST WAR hazards (#201619)
Handle WAR hazards where a VALU reading a VGPR is followed by a VMEM
writing the same VGPR. It is possible, though not very common, that the
VMEM will complete first. To guard against this the compiler must insert
a wait on VA_VDST.
Commit: 2580624091e36b85c162439513eef8e752217a1d
https://github.com/llvm/llvm-project/commit/2580624091e36b85c162439513eef8e752217a1d
Author: cqwrteur <oyzawqgcfc at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
Log Message:
-----------
[libcxx] avoid include Uppercase windows headers (#208903)
We should use unknwn.h and windows.h instead of Unknwn.h and Windows.h
because Linux and other non‑Windows systems treat filenames as
case‑sensitive. Windows does not, so mixed‑case includes work there but
break elsewhere. Both mingw‑w64‑crt and windows‑msvc‑sysroot provide all
Windows headers in fully lowercase, so using the lowercase forms ensures
consistent cross‑platform builds.
Fixes #208901
Commit: a3bcc010c7b7d5fa43ab7928a88312841c4322dd
https://github.com/llvm/llvm-project/commit/a3bcc010c7b7d5fa43ab7928a88312841c4322dd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
A lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)
In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When importing ARM64X
image, add both native and EC views to the symbol table on EC targets.
Also getMachine() on such images returns ARM64X, treat it as ARM64
instead.
Commit: f520e7083a12f0642eff8fc19fc4c90ccccc7da5
https://github.com/llvm/llvm-project/commit/f520e7083a12f0642eff8fc19fc4c90ccccc7da5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
Log Message:
-----------
[SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (#209966)
Commit: 0e1b0935ff6f326ba1b9c2d23ba9fa7b41e6941d
https://github.com/llvm/llvm-project/commit/0e1b0935ff6f326ba1b9c2d23ba9fa7b41e6941d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
Log Message:
-----------
[SPIR-V] Preserve signed i1 semantics in sitofp (#209232)
selectIToF hardcoded IsSigned=false when materializing the bool-to-int
conversion, so sitofp i1 true was miscompiled as 1.0 instead of -1.0
Commit: 5fcab35be3b450256e3b02a735900071c0b74a54
https://github.com/llvm/llvm-project/commit/5fcab35be3b450256e3b02a735900071c0b74a54
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/amdhsa-kernel-prologue.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
Log Message:
-----------
[AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (#209517)
Warn if an entrypoint does not start with the standard workaround
sequence.
Commit: 6cafa889cd398ca70992e0df518b2414a2607327
https://github.com/llvm/llvm-project/commit/6cafa889cd398ca70992e0df518b2414a2607327
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit
M lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
A lldb/test/Shell/SymbolFile/NativePDB/static-class-constants.cpp
Log Message:
-----------
[lldb][NativePDB] Use active bits for constant width (#196104)
Static constants with bit widths less than 16 (e.g. char/unsigned char)
in classes were not available. These constants are still encoded with 16
bits
([here](https://github.com/llvm/llvm-project/blob/dd145eb8997878143f648a7601741f6409330963/llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp#L341-L343))
even though they only need less bits. When we tried to create an
initializer for them, we'd check if the bit width (=16) was small enough
to fit into the target (<16). This would fail.
This was a problem in the following code:
```cpp
struct Foo {
// width(unsigned char) = 8, but 255 was encoded and read as 16 bit
static constexpr unsigned char u8_max = 255;
};
```
This PR fixes the issue by using `APSInt::getActiveBits` for unsigned
types and `APSInt::getSignificantBits` for signed types. They get the
number of bits required to encode the value. For example a constant 64
would need 7 bits in unsigned and 8 bits in signed types.
Commit: e8f9589942ecd93d94de2af2e875964693e55129
https://github.com/llvm/llvm-project/commit/e8f9589942ecd93d94de2af2e875964693e55129
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/dxc_debug.hlsl
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/test/CodeGen/DirectX/ContainerData/ContainerFlags.ll
Log Message:
-----------
[Driver][DirectX] Add `/Qstrip_debug` flag (#204832)
Add the flag that removes ILDB part from the main DXContainer.
Commit: d444e3ebb8ae69cdb628be3b3b0c632f13df9a08
https://github.com/llvm/llvm-project/commit/d444e3ebb8ae69cdb628be3b3b0c632f13df9a08
Author: Chibuoyim (Wilson) Ogbonna <ogbonnachibuoyim12 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprCXX.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
Log Message:
-----------
[Clang][Sema] Fix crash in UnresolvedMemberExpr check (#209792)
This closes https://github.com/llvm/llvm-project/issues/209427
The test currently crashes because while iterating over the candidate
members of an unresolved member expression, `decl` is a `UsingShadowDecl`
with underlying decl as `UnresolvedUsingValueDecl`.
The current `isa<UnresolvedUsingValueDecl>(decl)` guard only checks the
outer `UsingShadowDecl` and misses the unresolved-using decl hidden
inside it, so `getAsFunction()` returns nullptr and
`cast<CXXMethodDecl>(nullptr)` asserts.
This patch checks the `UnresolvedUsingValueDecl` inside by calling
`getUnderlyingDecl()` before the guard.
This used to happen before a2794f9f363361f87a3538b90b78ff13381d5ce1.
Commit: 06effa5b965f68a24dcea8550efc86225b186f54
https://github.com/llvm/llvm-project/commit/06effa5b965f68a24dcea8550efc86225b186f54
Author: mayanksolanki393 <mayanksolanki393 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/Verifier/matrix-intrinsics.ll
Log Message:
-----------
[LLVM][Verifier] Remove constant-only matrix stride check (#207665)
Remove the verifier check requiring constant column-major matrix
load/store strides to be greater than or equal to the row count.
The stride operand is not an immarg, so the verifier must not enforce
constraints that only apply when the argument happens to be constant.
Commit: afa73e4ff6db57b0416eb44127105b8092bd01f8
https://github.com/llvm/llvm-project/commit/afa73e4ff6db57b0416eb44127105b8092bd01f8
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
Log Message:
-----------
[ConstraintElimination] Handle equality predicates with signed system (#205331)
Equality predicate solving has been supported for quite a while, eq/ne
facts were extended to the signed constraint system more recently
(7fb97bee9269f0d4239908ac8def70be696991c6). When solving
eq/ne conditions, query the signed system as well on inconclusive
answers from the unsigned one.
Fixes: https://github.com/llvm/llvm-project/issues/205282.
Fixes: https://github.com/llvm/llvm-project/issues/63505.
Commit: 2b2df2677619cb0377d27d8b766b8fc265749345
https://github.com/llvm/llvm-project/commit/2b2df2677619cb0377d27d8b766b8fc265749345
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
R lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
Revert "[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)" (#210299)
This reverts commit a3bcc010c7b7d5fa43ab7928a88312841c4322dd, which
breaks in asan build.
Commit: 2a006dff821342c1726fd3137f804186851a26bb
https://github.com/llvm/llvm-project/commit/2a006dff821342c1726fd3137f804186851a26bb
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vashr.mir
Log Message:
-----------
[AArch64][GlobalISel] Add sign bits for G_VASHR (#210269)
Ports the `AArch64ISD::VASHR` case from
`ComputeNumSignBitsForTargetNode` to the GlobalISel hook: an arithmetic
right shift by K adds K copies of the sign bit, so the result has
`min(SignBits(Src) + K, ScalarSizeInBits)` sign bits. `G_VASHR`'s shift
amount is always an immediate in `[1, ElementBits]`.
Follow-up to #198314, which added the `G_FCM*` cases.
Assisted by Claude (Anthropic).
Commit: a4cad33430cf5d2d03eb91ce5e41ed1b9ef7cc4d
https://github.com/llvm/llvm-project/commit/a4cad33430cf5d2d03eb91ce5e41ed1b9ef7cc4d
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Support/KnownBits.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[KnownBits] Use X < Y identity and umin(MaxX, MaxY - 1) bound in urem (#210262)
Tightens `KnownBits::urem` with the two facts `ConstantRange::urem`
already uses:
- `L % R == L` when `MaxL < MinR`: return the LHS bits unchanged. This
can propagate known one bits, which the current leading-zeros-only
reasoning never produces.
- `L % R <= umin(MaxL, MaxR - 1)`, since a zero divisor is UB: keep that
bound's leading zeros. This is one bit stronger than the per-operand
leading-zero count when `MaxR` is a power of two, and together with
`remGetLowBits` it subsumes the power-of-two-constant special case,
which is removed.
Soundness is covered by the existing exhaustive unit test (widths 1 and
4; additionally brute-forced at width 5). Across all 6480 valid width-4
KnownBits pairs, non-optimal results drop from 3332 to 2090. The
residual is number-theoretic (e.g. the exact value of `10 % 3`), out of
reach of leading-bit/range reasoning, so `CheckOptimality` stays off for
urem, as for udiv (#209360).
Assisted by Claude (Anthropic).
Commit: 671c0a275a1f304f22855fabb299090233fdbd54
https://github.com/llvm/llvm-project/commit/671c0a275a1f304f22855fabb299090233fdbd54
Author: tyan0 <takashi.yano at nifty.ne.jp>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
A clang/test/Driver/Inputs/resource_dir/lib/cygwin/libclang_rt.builtins-x86_64.a
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-pc-windows-cygnus/libclang_rt.builtins.a
A clang/test/Driver/cygwin-print-file-name.c
Log Message:
-----------
[Clang][Driver] Fix compiler-rt library directory for cygwin (#208925)
If compiler-rt is built with `LLVM_ENABLE_PER_TARGET_RUNTIME_DIR=OFF`,
its search directory is incorrect.
Specifically, `ToolChain::getOSLibName()` returns `windows` instead of
`cygwin` in a Cygwin environment, due to falling back to getOS(). This
results in a link error against compiler-rt.
This patch makes `getOSLibName()` return `cygwin`, ensuring that
compiler-rt is linked correctly.
---------
Signed-off-by: Takashi Yano <takashi.yano at nifty.ne.jp>
Commit: 8377d59dfade3f1a4bf5779ddd90359bd4ddc249
https://github.com/llvm/llvm-project/commit/8377d59dfade3f1a4bf5779ddd90359bd4ddc249
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libsycl/src/event.cpp
M libsycl/unittests/event/event.cpp
Log Message:
-----------
[libsycl] add explicit instantiations for event::get_profiling_info (#210118)
Assisted by GH Copilot.
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 4d37b5bf3099d099302cce447168b3ece4efef5e
https://github.com/llvm/llvm-project/commit/4d37b5bf3099d099302cce447168b3ece4efef5e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
Log Message:
-----------
[LV] Add additional SCEV expansion tests with AddRecs. (NFC) (#210159)
Add additional test coverage for SCEV expansion of AddRecs, including
cases where extends are needed, different start and steps, as well as
cases where the outer header is not the plan's entry block.
Commit: a9e5bb572703780e3eea4a2759104a141ea73466
https://github.com/llvm/llvm-project/commit/a9e5bb572703780e3eea4a2759104a141ea73466
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/tools/clang-ssaf-linker/BUILD.gn
Log Message:
-----------
[gn build] Port 398f2117379f (#210308)
Commit: 9a2d9c7fef47c0af321150f75d8f21db06cccb43
https://github.com/llvm/llvm-project/commit/9a2d9c7fef47c0af321150f75d8f21db06cccb43
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/ARM/select-imm.ll
A llvm/test/Transforms/IndVarSimplify/iv-widen-addrec-flag-inferred-late.ll
Log Message:
-----------
[SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (#208805)
Move AddRec fold for ZExt & SExt before existing SCEV lookup. This can
improve results, when we constructed SCEV for a ZExt/SExt during earlier
analysis and flags on the operand AddRec have not been
refined/strengthend yet.
This improves results in some cases and fixes a regression here:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/654#discussion_r3554885279.
On a large C/C++ corpus with 32k bitcode files, ~2% more IVs get
widened, removing a large number of ZExt instructions.
Compile-time impact in the noise
https://llvm-compile-time-tracker.com/compare.php?from=167d65906cc3c636221158abe8289ab4a03dfc7d&to=381abca0d5ead4443d86287d754f47c21396a9be&stat=instructions:u
Commit: 62a932ac3e2702a5493934c6362f9e058a204557
https://github.com/llvm/llvm-project/commit/62a932ac3e2702a5493934c6362f9e058a204557
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/SystemZ/systemz-module.flags.c
M llvm/include/llvm/IR/Module.h
M llvm/lib/IR/Module.cpp
Log Message:
-----------
[SystemZ][z/OS] Fix zos_translation_time module flag (#210058)
The zos_translation_time flag needs to be 64-bit to handle the year 2038
problem.
Commit: 23b0281d75a4320a4e6e3d837edf94911d98d252
https://github.com/llvm/llvm-project/commit/23b0281d75a4320a4e6e3d837edf94911d98d252
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/tailcall-i686-pic.ll
Log Message:
-----------
[X86] Fix assertion failure for tail call on i686+pic (#210302)
The pattern for TCRETURNmi has a IsNotPIC predicate, but the
checkTCRetEnoughRegs() predicate that's part of the X86tcret_enough_regs
PatFrag is evaluated first, so we can't assert that PIC is disabled
here. We should just return false in that case.
Fixes https://github.com/llvm/llvm-project/issues/210300.
Commit: 38104cf836c3903647c917a5b251e938f4eadbb9
https://github.com/llvm/llvm-project/commit/38104cf836c3903647c917a5b251e938f4eadbb9
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
A llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
A llvm/test/CodeGen/AArch64/sve-ptrue-coalesce.mir
Log Message:
-----------
[LLVM][SVE] Add MachineInst pass to coalesce PTRUE instructions. (#204820)
SVE predicate registers contain a bit for each byte of a data register.
When operating on bigger element types the overlaping predicate bits are
grouped together but typically only the least-significant-bit is read as
part of the operation. This means the value of the other bits does not
affect the operation, making it possible to use the result of PTRUE for
a larger element typed operation, assuming the predicate patterns are
equivalent. For example:
ADD_S (PTRUE_H 31), Z0, Z1 == ADD_S (PTRUE_S 31), Z0, Z1
AArch64PTrueCoalescingPass uses this fact to reduce the number of PTRUE
instructions in a function, with the general trend towards needing a
single PTRUE based on the smallest element type in use.
NOTE: The pass will be enabled by default using a dedicated PR to make
it easier to revert if something goes wrong.
Commit: de4f929700f8d87041e0b050ec6028f0ac5276ad
https://github.com/llvm/llvm-project/commit/de4f929700f8d87041e0b050ec6028f0ac5276ad
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_x86.h
Log Message:
-----------
[lldb][x86] Remove GCC 6 workaround (#210317)
Added by 3bea7306e8669f94bacafae68748a9139cfc0b98.
We now require GCC >= 7.4 so it can be removed.
I tested a standalone reproducer with GCC 7.3 and
clang 5. Neither have the problem.
https://godbolt.org/z/3zKrT9c8s
Standalone reproducer:
```
struct Base {
Base(int) {}
};
struct Derived : virtual Base {
#ifdef WORKAROUND
Derived(int a): Base(a) {}
#endif
virtual void g() = 0;
};
struct Final : Derived {
Final(int n) : Base(n)
#ifdef WORKAROUND
, Derived(n)
#endif
{}
void g() override {}
};
```
Commit: b9f5bcbcfbe6aa4943c808afd3bb82243ecb3193
https://github.com/llvm/llvm-project/commit/b9f5bcbcfbe6aa4943c808afd3bb82243ecb3193
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/sysv_abi.c
R clang/test/CodeGen/target-avx-function-abi.c
R clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
Log Message:
-----------
Revert "[clang][CodeGen][X86_64] Honor per-function AVX ABI in C/C++ call paths, maintain old psABI for PlayStation." (#210303)
Reverts llvm/llvm-project#193298
Causes a major compile-time regression.
Commit: 75ec1a4e80a9377f8f1e2ff063b094e016787926
https://github.com/llvm/llvm-project/commit/75ec1a4e80a9377f8f1e2ff063b094e016787926
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-default-address-space.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-init-expr.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-multi-gve.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-no-backing-var.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-no-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-path-null.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-type-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugGlobalVariable (#207230)
Add emitDebugGlobalVariable to the NSDI handler, translating each
DIGlobalVariable to a
[DebugGlobalVariable](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugGlobalVariable)
ext inst.
Commit: 4f76a4c5a3f8711fe13b05c0f93ac78349396292
https://github.com/llvm/llvm-project/commit/4f76a4c5a3f8711fe13b05c0f93ac78349396292
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[NFC] RelNotes Formatting fix I screwed up in 209893 (#210325)
Commit: 40ae05d4773f5c1b2a84ea7dc908d92671b8daa9
https://github.com/llvm/llvm-project/commit/40ae05d4773f5c1b2a84ea7dc908d92671b8daa9
Author: adams381 <adams at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/IntTypeABIAlignTest.cpp
Log Message:
-----------
[CIR] Return power-of-two ABI alignment for non-fundamental int widths (#210187)
`cir::IntType::getABIAlignment` returns `width / 8` for non-`_BitInt`
integers. For a non-fundamental width such as `i24` it returns 3, which
is
not a power of two, so a consumer that builds an `llvm::Align` from it
would
hit the power-of-two assertion unless it rounds the value up itself.
This rounds the alignment up to a power of two inside `getABIAlignment`,
matching how LLVM's default DataLayout aligns these (an `i24` aligns
like
`i32`). The fundamental widths are unchanged (`i8` -> 1, `i16` -> 2,
`i32` -> 4, `i64` -> 8), `__int128` stays at 16, and a sub-byte width
like
`i1` now reports 1 instead of 0. A unit test pins these cases.
Commit: 1f2772f8e26beb909c2a559f1fb08697e3e06909
https://github.com/llvm/llvm-project/commit/1f2772f8e26beb909c2a559f1fb08697e3e06909
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP conv2d (#210054)
- Adds profile compliance support for MXFP conv2d
- Relax conv2d accumulator constraits. They are checked as part of
validation pass
and this would allow experimentation with different types.
Signed-off-by: Iliyan Georgiev <iliyan.georgiev at arm.com>
Commit: 6f64e7cf0ad7699a5f1e6b2418d4c2cdcdb26470
https://github.com/llvm/llvm-project/commit/6f64e7cf0ad7699a5f1e6b2418d4c2cdcdb26470
Author: Shreyansh Lodha <lodhashreyansh1603 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/Parser.cpp
M clang/test/AST/ast-dump-decl.cpp
A clang/test/AST/ast-dump-deleted-defaulted-range.cpp
M clang/test/AST/ast-dump-funcs.cpp
M clang/test/AST/ast-dump-record-definition-data-json.cpp
M clang/test/Analysis/inlining/Inputs/expected-plists/path-notes.cpp.plist
M clang/test/CoverageMapping/default-method.cpp
M clang/unittests/AST/SourceLocationTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
Log Message:
-----------
[Clang][AST] Add source range for deleted and defaulted functions (#205408)
Earlier wrong ranges for default and deleted functions were reported.
Post this fix all ranges for functions are reported.
Fix: Extended the declarator's source range to include the delete /
default tokens by calling
D.SetRangeEnd(PP.getLocForEndOfToken(KilLoc).getLocWithOffset(-1)) after
consuming each keyword in ParseFunctionDefinition. Previously, the range
ended at the function name, onitting the delete/default specifier
entirely.
Regression tested and no regressions found.
Assisted-by: Claude Code (Anthropic) — used in developing this patch.
Closes #64805
Commit: 7c1b00b38d7fb9eecfd345c51f9e9509e6b039ad
https://github.com/llvm/llvm-project/commit/7c1b00b38d7fb9eecfd345c51f9e9509e6b039ad
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
Log Message:
-----------
[AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (#210340)
iPTR means i64 here, but this node operates on 32-bit LDS addresses.
Commit: 499b69cf07e03a23a420ee773261fcfcfc1c3df9
https://github.com/llvm/llvm-project/commit/499b69cf07e03a23a420ee773261fcfcfc1c3df9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
Log Message:
-----------
[DWARFLinker] Fix data race on the per-unit file-name cache (#208967)
CompileUnit::getDirAndFilenameFromLineTable reads and mutates the unit's
FileNames DenseMap without synchronization. During the parallel
type-name assignment phase a unit's cache is touched both by its own
worker and, through cross-unit type-name references
(addReferencedODRDies calling addDieNameFromDeclFileAndDeclLine) by
other units' workers.
The concurrent find/insert/grow corrupts the map and trips the
assertion:
```
Assertion failed: (TheBucket), function findBucketForInsertion, DenseMap.h
```
Guard the cache with a mutex. Store each entry in a heap-allocated pair
so the StringRefs handed back to callers stay valid across a concurrent
rehash. Otherwise a short (small-string-optimized) file name would move
when another insertion grows the map, dangling a StringRef already
returned.
Commit: 2a00d50e6012e1ee31904d394c088be907b6aa8b
https://github.com/llvm/llvm-project/commit/2a00d50e6012e1ee31904d394c088be907b6aa8b
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
Log Message:
-----------
[Flang][OpenACC] Check routine level for function references in loops (#209529)
Extend the loop/routine-level compatibility check to `FunctionReference`
calls. Resolve `!$acc routine` information from procedure pointers and
interface symbols, not only `SubprogramDetails`.
Commit: f1b5b061832610e78d5be7313f0ab3e5e55d790f
https://github.com/llvm/llvm-project/commit/f1b5b061832610e78d5be7313f0ab3e5e55d790f
Author: David Young <davidayoung at meta.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/main.py
A llvm/utils/lit/tests/Inputs/pass-env/lit.cfg
A llvm/utils/lit/tests/Inputs/pass-env/test.txt
A llvm/utils/lit/tests/pass-env.py
Log Message:
-----------
Modify lit config to allow specify extra env vars to pass through to lit invocation (#208239)
lit's pass-through environment allow-list is hard-coded in
TestingConfig.py. There are cases where a particular test environment
needs an extra variable passed through (e.g. credentials or tooling
paths required to fetch dependencies during a test), but today the only
way to add one is to fork this list downstream.
This adds a --pass-env NAME option (repeatable, and also honored via
LIT_OPTS) that copies the named variable from lit's environment into the
test environment, in addition to the built-in allow-list. Since the
caller chooses exactly which variables to forward, passing through a
wrong or sensitive variable is user error rather than a default. The
default is empty, so existing behavior — only the hard-coded list is
passed through — is unchanged.
test creation help via Claude
Commit: d7aacfc940c3f1553973f1ebf7d11a6513fda1ed
https://github.com/llvm/llvm-project/commit/d7aacfc940c3f1553973f1ebf7d11a6513fda1ed
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/common/DomainSocket.h
M lldb/source/Host/common/DomainSocket.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
M lldb/unittests/Utility/UriParserTest.cpp
Log Message:
-----------
[lldb] Support Windows paths in AF_UNIX domain-socket URIs (#206985)
On Windows an `AF_UNIX` socket path is a native filesystem path. Placed
directly in a unix-connect:// URI it isn't a valid `host:port`
authority, so `URI::Parse` confuses the drive letter colon as a port
separator and connection setup fails.
This patch converts the path in the [RFC
8089](https://datatracker.ietf.org/doc/html/rfc8089) file-URI form
instead which parses as an ordinary URI with an empty host. DomainSocket
converts between the native path and this URI form at its boundaries.
Both are no-ops on POSIX: behavior is unchanged, and `URI::Parse` and
the GDB-remote consumers are left untouched.
rdar://180736036
Commit: 0b1652db8a18b336f39855fcf9b5137fa0b4b3c9
https://github.com/llvm/llvm-project/commit/0b1652db8a18b336f39855fcf9b5137fa0b4b3c9
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-xchg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv64.mir
Log Message:
-----------
[RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (#209983)
This commit makes `xchg` consistent with `add/and/or/xor` across all
type/extension combinations. Updates `legalizer-info-validation.mir` for
the newly defined rules and adds `atomicrmw-xchg.ll` and
`legalize-atomicrmw-xchg-rv{32,64}.mir` tests.
Commit: d05f7b28b6f7de6e9ca89e1b9e3aca8c8380e322
https://github.com/llvm/llvm-project/commit/d05f7b28b6f7de6e9ca89e1b9e3aca8c8380e322
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port 38104cf836c3 (#210356)
Commit: 45f76eac198fdee52d61c57e667f48a7f5e9581f
https://github.com/llvm/llvm-project/commit/45f76eac198fdee52d61c57e667f48a7f5e9581f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port 40ae05d4773f (#210357)
Commit: 30f270edb42c5d37e4c4a413ebfc7a6513565b30
https://github.com/llvm/llvm-project/commit/30f270edb42c5d37e4c4a413ebfc7a6513565b30
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
A lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210311)
In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When linking against
an ARM64X image, add both native and EC views to the symbol table on EC
targets. Also getMachine() on such images returns ARM64X, treat it as
ARM64 instead.
Commit: 4671287932028a32caa4bce6aea35f9de3f1daa8
https://github.com/llvm/llvm-project/commit/4671287932028a32caa4bce6aea35f9de3f1daa8
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Reuse preloaded exe module on launch (#210010)
# Brief
Recreating the module everytime causes the path to be canonicalized.
This does not work well with subst drives, because the newly created
module will not have the correct drive path, causing breakpoints to be
unresolved.
# Description
`ProcessWindows::OnDebuggerConnected` derives the executable module from
`GetModuleFileNameExW` on every connect. This returns the process
image's *real* path, so when the target is created via a subst'd or
mapped drive (e.g. `S:\...\a.out`, where `S:` is subst for `C:\S`) it
comes back as `C:\S\...\a.out`. `GetOrCreateModule` then fails to match
the module LLDB had already preloaded and creates a duplicate instead.
The duplicate leaves the original module's breakpoint location orphaned
unresolved while the new module's location is resolved, so a source line
breakpoint reports two locations with only one resolved. Generic tests
that assert exactly one resolved location fail with `"2 != 1"` and
`"Expecting 1 locations, got 2"`.
# Fix
This patch fixes this by first attempting to reuse the existing module
if it exists. In practice, LLDB only looks for the executable during
attach.
This is a problem in Swiftlang where we run our tests with a subst
drive. The impacted tests are:
-
`lang/c/{array_types,function_types,set_values,enum_types,anonymous,forward,local_variables}`
- `lang/cpp/{class_types,inlines}`
- `commands/{apropos/with-process,command/nested_alias,memory/write}`
- `functionalities/{memory/find,dead-strip,memory/holes}`
- `commands/expression/entry-bp`
Commit: e57b9c0761706905e42da3cfa485cebc3629d72a
https://github.com/llvm/llvm-project/commit/e57b9c0761706905e42da3cfa485cebc3629d72a
Author: Prajwal Nadig <pnadig at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
A clang/test/ExtractAPI/availability_typedef_anonymous_record.c
Log Message:
-----------
[ExtractAPI] Include availability attributes for anonymous typedefs (#209187)
When an anonymous type is defined and has availability attributes, the
attributes are attached to the typedef rather than the type being
defined. This patch updates the anonymous type handling logic to merge
the availability from the typedef in order to correctly include it in
the symbol graph.
rdar://125497949
Commit: 06340b81573a6824c0ddd54fcba5ae8ffacacd6f
https://github.com/llvm/llvm-project/commit/06340b81573a6824c0ddd54fcba5ae8ffacacd6f
Author: Prajwal Nadig <pnadig at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ExtractAPI/DeclarationFragments.h
M clang/lib/ExtractAPI/DeclarationFragments.cpp
A clang/test/ExtractAPI/objc_nullability.m
Log Message:
-----------
[ExtractAPI] Include nullability attributes (#209221)
Nullability attributes (nullable, nonnull, null_unspecified,
null_resettable) add valuable context about the type, and would be
useful when viewing declarations. This patch updates ExtractAPI to
include these attributes in the symbol graph.
rdar://139097216
Commit: 709b7d1bd4a71e484702d610f81b5cf84303386f
https://github.com/llvm/llvm-project/commit/709b7d1bd4a71e484702d610f81b5cf84303386f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Pull out isFoldableAsShuffle lamdba as helper function. NFC. (#210354)
For future reuse.
Commit: de5cef3127047836fceb416f8083942783834489
https://github.com/llvm/llvm-project/commit/de5cef3127047836fceb416f8083942783834489
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-reduce-to-contract.mlir
Log Message:
-----------
[mlir][vector] Extend `combineContractAndBroadcast` to accept `vector.shape_cast` (#208752)
`combineContractAndBroadcast` is a pattern that matches
`vector.contract` operations whose inputs are defined by
`vector.broadcast`, e.g.:
```mlir
%0 = vector.broadcast %lhs : vector<8x4xi32> to vector<1x8x4xi32>
%1 = vector.broadcast %rhs : vector<8x4xi32> to vector<1x8x4xi32>
%result = vector.contract {
indexing_maps = [#map0, #map1, #map2],
iterator_types = ["reduction", "parallel", "parallel", "reduction"],
kind = #vector.kind<add>
} %0, %1, %acc : vector<1x8x4xi32>, vector<1x8x4xi32> into vector<8x8xi32>
```
The pattern folds away the reduction over a unit dimension introduced by
the defining operations, producing a simplified `vector.contract`:
```mlir
vector.contract {
indexing_maps = [#[[$MAP0]], #[[$MAP1]], #[[$MAP2]]]
iterator_types = ["parallel", "parallel", "reduction"]
} %0, %1, %acc : vector<8x4xi32>, vector<8x4xi32> into vector<8x8xi32>
```
This change extends the pattern to also accept broadcast-like
`vector.shape_cast` operations:
```mlir
%0 = vector.shape_cast %lhs : vector<8x4xi32> to vector<1x8x4xi32>
%1 = vector.shape_cast %rhs : vector<8x4xi32> to vector<1x8x4xi32>
%result = vector.contract {
indexing_maps = [#map0, #map1, #map2],
iterator_types = ["reduction", "parallel", "parallel", "reduction"],
kind = #vector.kind<add>
} %0, %1, %acc : vector<1x8x4xi32>, vector<1x8x4xi32> into vector<8x8xi32>
```
Note that `mlir::vector::isBroadcastableTo` was only moved to make it
available to the newly introduced `ShapeCastOp` helper,
`ShapeCastOp::isBroadcastLike()`.
Commit: bcb459015e12fb03e4ae3d56393883b2974f96fb
https://github.com/llvm/llvm-project/commit/bcb459015e12fb03e4ae3d56393883b2974f96fb
Author: Zachary Henkel <zachary.henkel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/android_commands/android_common.py
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
Log Message:
-----------
Replace Python's deprecated tempfile.mktemp() with secure temp APIs (#210123)
Python's tempfile.mktemp() is deprecated and insecure: it returns a path
without creating the file, leaving a TOCTOU/symlink window before the
file is opened. Replace every use, choosing the temp API by lifetime:
- compiler-rt android_common.py adb(): tempfile.TemporaryFile
(anonymous, auto-deleted), read back via seek(0); drops manual
close()/unlink().
- compiler-rt android_common.py pull_from_device():
tempfile.TemporaryDirectory so "adb pull" writes into a private,
auto-cleaned directory.
- lldb examples delta.py / gdbremote.py start_gdb_log():
tempfile.NamedTemporaryFile(delete=False); the log must outlive the call
for a later stop_gdb_log, so it is intentionally not auto-deleted.
Reported by internal static analysis and contributed upstream for the
benefit of the wider community.
Assisted-by: GitHub Copilot CLI (Claude Opus 4.8)
I do not have commit access and will need someone to submit on my
behalf.
Commit: 5f7060ce4559c1079e850c96b106f1a43955b828
https://github.com/llvm/llvm-project/commit/5f7060ce4559c1079e850c96b106f1a43955b828
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/Sema.h
R clang/include/clang/Sema/TemplateInstCallback.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
R clang/test/Templight/templight-deduced-func.cpp
R clang/test/Templight/templight-default-arg-inst.cpp
R clang/test/Templight/templight-default-func-arg.cpp
R clang/test/Templight/templight-default-template-arg.cpp
R clang/test/Templight/templight-empty-entries-fix.cpp
R clang/test/Templight/templight-exception-spec-func.cpp
R clang/test/Templight/templight-explicit-template-arg.cpp
R clang/test/Templight/templight-memoization.cpp
R clang/test/Templight/templight-nested-memoization.cpp
R clang/test/Templight/templight-nested-template-instantiation.cpp
R clang/test/Templight/templight-one-instantiation.cpp
R clang/test/Templight/templight-prior-template-arg.cpp
Log Message:
-----------
[clang] remove templight support (#210166)
Removed as unmaintained, per discussion in
https://discourse.llvm.org/t/rfc-removing-templight-support/90777
Commit: 60846c8b0c1c47c03c25fe28ecaea00e698a3450
https://github.com/llvm/llvm-project/commit/60846c8b0c1c47c03c25fe28ecaea00e698a3450
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext][NFC] Add cross-project tests for packed zip/unzip intrinsics (#209575)
Commit: a55b011dabf8e5761d9955f98aa1138a10bd1a8a
https://github.com/llvm/llvm-project/commit/a55b011dabf8e5761d9955f98aa1138a10bd1a8a
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/test/CodeGen/SystemZ/systemz-module.flags.c
Log Message:
-----------
[SystemZ/[z/OS] Guard source-epoch related testcase to 64-bit clang targets (#210341)
This patch guards the following testcase for 64-bit clang targets Clang :: CodeGen/SystemZ/systemz-module.flags.c
Commit: d63bd842939f22fad4e29660d66b99a9bf94e4b4
https://github.com/llvm/llvm-project/commit/d63bd842939f22fad4e29660d66b99a9bf94e4b4
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/create-box-codegen.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
Log Message:
-----------
[flang] Added fir.create_box operation. (#210220)
This patch adds `fir.create_box` operation that allows
creating `!fir.box<>` values with arbitrary byte strides.
It can be used to recreate boxes describing non-contiguous
arrays from descriptor components (base_addr/lbs/extents/strides)
across offload regions.
This is just initial definition and code generation code.
The folders and passes producing this operation will be added
later.
Commit: fd55bbd6022ccb8d854f580b56c39177e80c256e
https://github.com/llvm/llvm-project/commit/fd55bbd6022ccb8d854f580b56c39177e80c256e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/profile/Linux/counter_promo_for.c
M compiler-rt/test/profile/Linux/counter_promo_while.c
Log Message:
-----------
[compiler-rt] Fix tests after #205331 (#210370)
New optimizations changed some compiler-rt tests. Update the test
expectations based on this.
Fixes #210355.
Commit: 0b666f74f94fffc2bc3380365704bcb61f2767d2
https://github.com/llvm/llvm-project/commit/0b666f74f94fffc2bc3380365704bcb61f2767d2
Author: David Young <davidayoung at meta.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
Log Message:
-----------
Add missing BigArchive container plugin to lldb's bazel build (#210304)
Another missing plugin and its libraries in the LLDB bazel build. Based
this one on source/Plugins/ObjectContainer/Big-Archive/CMakeLists.txt
and its dependecies ( {}.cpp & {}.h)
waiting on CI to confirm bazel is correct as cannot build locally.
Can confirm this library will convert to BUCK internally at Meta and
build with buck2 where we do have in the default plugin list.
bazel rule assisted with: claude
Commit: 53c048b3732610c8d2d65c1d41603de26eb6ac4e
https://github.com/llvm/llvm-project/commit/53c048b3732610c8d2d65c1d41603de26eb6ac4e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/ci/images/libcxx_release_runners.txt
Log Message:
-----------
[libc++] Update release runners to the image that was used on main at the branch point (#210378)
This will allow retaining a stable image for CI throughout the whole
LLVM 23 release.
Commit: a67eac3e141e1044dd98524a010e719b42f51f5e
https://github.com/llvm/llvm-project/commit/a67eac3e141e1044dd98524a010e719b42f51f5e
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[NFC][AMDGPU] Cleanup in SOPInstructions.td (#210367)
- Eliminate code which was accidentally merged during a merge-conflict
(https://github.com/llvm/llvm-project/pull/203155/changes#r3560059941)
- Remove comments as they are specific to usubsat.
Commit: db1f902cd6a95c9b80136dfcbe8beb7a58290641
https://github.com/llvm/llvm-project/commit/db1f902cd6a95c9b80136dfcbe8beb7a58290641
Author: Mishal Shah <mishal_shah at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .github/workflows/premerge.yaml
Log Message:
-----------
Add macOS premerge check workflow (#207435)
Added a premerge check workflow for macOS self-hosted runners to build
and test projects.
Commit: f04bf4791ae6d56b822f9bca6eb82ce4adccb989
https://github.com/llvm/llvm-project/commit/f04bf4791ae6d56b822f9bca6eb82ce4adccb989
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/OSUtil/linux/CMakeLists.txt
M libc/src/__support/OSUtil/linux/auxv.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/sys/ipc/linux/CMakeLists.txt
M libc/src/sys/ipc/linux/ftok.cpp
R libc/src/sys/ipc/linux/kernel_statx.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_unlink.cpp
M libc/src/sys/time/linux/CMakeLists.txt
M libc/src/sys/time/linux/utimes.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
M libc/startup/linux/x86_64/tls.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][NFC] Port raw syscall users to existing syscall_wrappers (#208039)
Several call sites still invoked syscall_impl directly (or carried
their own SYS_* fallback ladders) for syscalls that already have a
wrapper in src/__support/OSUtil/linux/syscall_wrappers.
This PR removes these syscalls in favor of the syscall_wrappers.
Commit: 246c752ef1b6098a7aa222f02ca09db76e17cabe
https://github.com/llvm/llvm-project/commit/246c752ef1b6098a7aa222f02ca09db76e17cabe
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add layering deps (#210380)
Not sure why CI didn't catch it, but
c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75 adds some targets that are
broken when layering checks are enabled.
Commit: c42ce32264f94a8800f4250d7b716cca55f77df6
https://github.com/llvm/llvm-project/commit/c42ce32264f94a8800f4250d7b716cca55f77df6
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A compiler-rt/docs/ASanABI.md
R compiler-rt/docs/ASanABI.rst
A compiler-rt/docs/BuildingCompilerRT.md
R compiler-rt/docs/BuildingCompilerRT.rst
A compiler-rt/docs/TestingGuide.md
R compiler-rt/docs/TestingGuide.rst
M flang/docs/CMakeLists.txt
A flang/docs/CommandGuide/index.md
R flang/docs/CommandGuide/index.rst
A libsycl/docs/CodingGuidelines.md
R libsycl/docs/CodingGuidelines.rst
A libsycl/docs/index.md
R libsycl/docs/index.rst
M libsycl/test/README.md
A libunwind/docs/BuildingLibunwind.md
R libunwind/docs/BuildingLibunwind.rst
M libunwind/docs/conf.py
A libunwind/docs/index.md
R libunwind/docs/index.rst
M lldb/source/Plugins/TraceExporter/common/TraceHTR.h
A lldb/source/Plugins/TraceExporter/docs/htr.md
R lldb/source/Plugins/TraceExporter/docs/htr.rst
A llvm-libgcc/docs/LLVMLibgcc.md
R llvm-libgcc/docs/LLVMLibgcc.rst
M llvm-libgcc/generate_version_script.py
M offload/docs/conf.py
A offload/docs/index.md
R offload/docs/index.rst
Log Message:
-----------
[docs] Rename misc rst docs to md (#210208)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit.
Many of these miscellaneous .rst files are not actually part of a real
docs build, since docs/conf.py does not exist for many of them.
Commit: 9b096bb7abf7b57182ae8556451aa34dacd535ec
https://github.com/llvm/llvm-project/commit/9b096bb7abf7b57182ae8556451aa34dacd535ec
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/bindings/interfaces.swig
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBProtocolServer.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBProtocolServer.cpp
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBProtocolServerTest.cpp
Log Message:
-----------
[lldb] Add SBProtocolServer to start protocol servers programmatically (#209923)
Starting a protocol server (such as MCP, and in the future potentially
DAP) is only possible from the command line today, via `protocol-server
start`. Add an SB API so an embedder can start one in its own process
and learn where to connect.
SBProtocolServer wraps ProtocolServer::GetOrCreate/Start/Stop and
exposes the listening connection URI. This lets a tool host the engine's
protocol server in-process and talk to it as a normal client, reusing
the server's tools rather than reimplementing them.
Assisted-by: Claude
Commit: 2b6e9d261433f5ec8c49502f91d63dd7d07346c3
https://github.com/llvm/llvm-project/commit/2b6e9d261433f5ec8c49502f91d63dd7d07346c3
Author: Artem Belevich <tra at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/atomicrmw-allow-ftz-atomics.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/CodeGen/NVPTX/atomicrmw.py
M llvm/test/CodeGen/NVPTX/atomics.ll
Log Message:
-----------
[NVPTX] Set default value of nvptx-allow-ftz-atomics to true (#206154)
This is a follow-up to https://github.com/llvm/llvm-project/pull/200732.
Setting the default value of nvptx-allow-ftz-atomics to true preserves
the status quo. It allows the NVPTX backend to emit native
floating-point atomic add instructions by default, rather than falling
back to the CAS loop required for strict FTZ compliance.
Correct FTZ handling forces a lot of existing code to emit CAS loops.
This introduces thread divergence, breaking code that relies on atomic
operations being non-divergent (for example, warp-wide atomic additions
followed by a load of the reduced value without explicit
synchronization).
While FTZ-correct atomic behavior is desirable as a long-term default,
introducing thread divergence into a common operation that previously
"happened to work" without synchronization is highly disruptive.
Defaulting to true makes the FTZ-correct behavior opt-in for now,
allowing users time to audit and adapt their code.
Test cases are updated to verify both enabled and disabled states of the
option, alongside the new default behavior.
Commit: 50c8f07e3eebf1ff5a1d9378d77aef5df9583293
https://github.com/llvm/llvm-project/commit/50c8f07e3eebf1ff5a1d9378d77aef5df9583293
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
A clang/test/Analysis/std-c-library-functions-non-integral-ssize_t.cpp
Log Message:
-----------
[clang][analyzer] Fix assertion failure in StdLibraryFunctionsChecker with non-integral ssize_t (#209655)
In StdLibraryFunctionsCheckers' `RangeConstraint::checkSpecificValidity`
asserted that the constrained argument type is integral. When user code
typedefs `ssize_t` to a non-integral type (e.g. `float`) even though
this violates POSIX.1-2017, which requires `ssize_t` to be a signed
integer type, the signature still matches (same canonical type) and the
assertion fires during constraint validation. Remove it and let
`validateByConstraints` gracefully reject the summary by returning
false.
Fixes #209436
Commit: 40c4fea67f49b841bd064624219efceab91b65e0
https://github.com/llvm/llvm-project/commit/40c4fea67f49b841bd064624219efceab91b65e0
Author: Krisitan Erik Olsen <kristian.erik at outlook.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
A llvm/test/Transforms/SROA/sroa-self-referential-load.ll
Log Message:
-----------
[SROA] Fix assertion failure when promoting self-referential load/store (#208826)
When LoadAndStorePromoter::run processes a block where a store's value
operand is defined by the load being promoted (a self-referential cycle
in unreachable code), it sets StoredValue to the load instruction. When
it then calls replaceAllUsesWith, the doRAUW assertion fires because the
replacement value contains the value being replaced.
The single-block promotion paths in promoteSingleBlockAlloca already
guard against this with a check for ReplVal == LI, replacing with poison
instead. This patch adds the same guard to the in-block load path in
LoadAndStorePromoter::run, which was missing it. Substituting poison is
correct here since this situation only arises in unreachable code.
The regression was introduced in #135609, which added the
propagateStoredValuesToLoads path in SROA that routes through
LoadAndStorePromoter::run. LoadStoreRewriter handles aggregates and is
unrelated to this path.
Fixes #204799
Commit: 714d124d0aaf3effa3e83d01783fe0ed2cd3eea9
https://github.com/llvm/llvm-project/commit/714d124d0aaf3effa3e83d01783fe0ed2cd3eea9
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
Revert "[RISCV][P-ext][NFC] Add cross-project tests for packed zip/unzip intrinsics" (#210401)
Reverts llvm/llvm-project#209575
Commit: 93b1240309309d5c2f8f94527ff7c7bd5df359af
https://github.com/llvm/llvm-project/commit/93b1240309309d5c2f8f94527ff7c7bd5df359af
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/docs/ASanABI.md
M compiler-rt/docs/BuildingCompilerRT.md
M compiler-rt/docs/TestingGuide.md
M flang/docs/CommandGuide/index.md
M libsycl/docs/CodingGuidelines.md
M libsycl/docs/index.md
M libunwind/docs/BuildingLibunwind.md
M libunwind/docs/index.md
M lldb/source/Plugins/TraceExporter/docs/htr.md
M llvm-libgcc/docs/LLVMLibgcc.md
M offload/docs/conf.py
M offload/docs/index.md
Log Message:
-----------
[docs] Finish misc MyST migration (#210209)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #210208, which is the standalone rename
commit for this miscellaneous Markdown migration batch.
This was prepared with rst2myst plus LLM-assisted cleanup. LLDB man
pages are intentionally left as reStructuredText because LLDB man-page
building should not take on Markdown parser dependencies.
Unfortunately, many of these miscellaneous docs do not have working
standalone doc build targets, so I was not able to render HTML for all
of them. I think the scope is small enough that this is reviewable by
hand.
Commit: 91bb8f4ee8452d3e2bda7544556fa66dba462414
https://github.com/llvm/llvm-project/commit/91bb8f4ee8452d3e2bda7544556fa66dba462414
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
Log Message:
-----------
[VPlan] Introduce vputils::doesGeneratePerAllLanes (#199047)
Introduce a query for recipes that produce scalar values for all VF
lanes, returning true for non-single-scalar replicates, non-first-lane
SIVSteps, and a couple of VPInstructions.
Commit: 93bce300db95e4fbb82b1a6ef69fe125c71b77f3
https://github.com/llvm/llvm-project/commit/93bce300db95e4fbb82b1a6ef69fe125c71b77f3
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN log builtins (#198032)
Adds codegen support for the following AMDGCN log builtins:
- __builtin_amdgcn_logf (float)
- __builtin_amdgcn_log_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.log` intrinsic.
Commit: 3e55f3c56e8706fa12792b5a4de05f636bf798d0
https://github.com/llvm/llvm-project/commit/3e55f3c56e8706fa12792b5a4de05f636bf798d0
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][realpath][test] Create test files/directories (#209369)
Follow-up PRs will add path validation etc to `realpath`, which will
require paths to exist in the filesystem.
This PR bumps the memory limit in `HermeticTestUtils.cpp`. The realpath
unit tests allocate quite a few strings, and since memory in hermetic
tests is never freed, the unit test quickly reaches the limit.
Commit: 4070621c866fb4156f7c7d15039d12a4295f46c2
https://github.com/llvm/llvm-project/commit/4070621c866fb4156f7c7d15039d12a4295f46c2
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-create-box.fir
Log Message:
-----------
[flang][OpenACC] Discover type descriptors referenced by fir.create_box (#210393)
Register the IndirectGlobalAccess interface for fir.create_box so
acc-implicit-declare finds the derived-type type-descriptor global a
create_box of a record array needs on the device, as it already does
for fir.embox and fir.rebox.
Assisted-by: Cursor
Commit: 5c719eeb715632b1afef6508bd6c5ac09369fc91
https://github.com/llvm/llvm-project/commit/5c719eeb715632b1afef6508bd6c5ac09369fc91
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGen/builtins-x86.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
Log Message:
-----------
[CIR] Implement support for builtin FMA (#210365)
Implement support for the _builtin_fma
Commit: 95cc83d45b1b8e4a560efb729bd7e1e16f0b8703
https://github.com/llvm/llvm-project/commit/95cc83d45b1b8e4a560efb729bd7e1e16f0b8703
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/docs/AdminTasks.md
R llvm/docs/AdminTasks.rst
Log Message:
-----------
[docs] Rename AdminTasks to markdown to preserve history (#210415)
Tracking issue: #201242
Migrating this before I make changes to it. A follow-up PR will do the
migration.
Commit: fb0547315ecf3f09fb6fc9122e40ff096a643eaa
https://github.com/llvm/llvm-project/commit/fb0547315ecf3f09fb6fc9122e40ff096a643eaa
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/AdminTasks.md
Log Message:
-----------
[docs] Rewrite AdminTasks.md as markdown (#210416)
Tracking issue: #201242
This is a stacked PR based on #210415 , which does a rename for history
preservation purposes. See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This was prepared with rst2myst.
Commit: d982e0499b7f780279c435403b8249d7c3812cae
https://github.com/llvm/llvm-project/commit/d982e0499b7f780279c435403b8249d7c3812cae
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/test/CodeGenHLSL/resources/TypedBuffers-constructor.hlsl
Log Message:
-----------
[HLSL] Enable frontend IR generation for SPIR-V in TypedBuffers-constructor.hlsl (#207421)
I found a stale `FIXME` marker while poking at SPIR-V resource lowering.
The test stated that SPIR-V codegen of
`llvm.spv.resource.handlefrombinding` and resource types was not
implemented. That codegen now exists in
`CommonSPIRTargetCodeGenInfo::getHLSLType`.
This change enables the test on SPIR-V and splits the tests to
distinguish DXIL and SPIRV expected IR patterns.
Commit: 9bae0aab8098f99dff47578546eb5bd382f919d0
https://github.com/llvm/llvm-project/commit/9bae0aab8098f99dff47578546eb5bd382f919d0
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
Log Message:
-----------
[AMDGPU] Remove unnecessary and broken sign/zero extension in fastdiv (#210348)
Remove unnecessary and broken sign/zero-extension when using float-point
reciprocal to implement division/remainder. This change is analogous to
the change done in https://github.com/llvm/llvm-project/pull/203436 but
in AMDGPUISelLowering.cpp.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: dc3b1ed3ccd10995b26fa5278cb80c45419f9457
https://github.com/llvm/llvm-project/commit/dc3b1ed3ccd10995b26fa5278cb80c45419f9457
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
TableGen: Deterministically order predicate groups by calling convention (#210409)
Commit: 6ff0ebea015e3ed984dfff941e7d8a48e4810784
https://github.com/llvm/llvm-project/commit/6ff0ebea015e3ed984dfff941e7d8a48e4810784
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Diagnostics.h
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Diagnostics.cpp
A lldb/test/Shell/Diagnostics/TestDiagnosticsCollectBinaries.test
Log Message:
-----------
[lldb] Collect the executable, symbol file, and core in diagnostics (#210391)
The diagnostics bundle already gathers logs, statistics, and a snapshot
of the first triage commands, but sometimes the binaries are required to
reproduce an issue. Collect the main executable, its symbol file, and
the core file into the bundle.
Gate this on a new global setting, diagnostics.collect-binaries, which
defaults to false: these files can be large and privacy sensitive, so
including them is opt-in.
Assisted-by: Claude
Commit: 977eced054d9de031423dee9493addd4e1fd5eaf
https://github.com/llvm/llvm-project/commit/977eced054d9de031423dee9493addd4e1fd5eaf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Expression/IRInterpreter.cpp
Log Message:
-----------
[lldb] Truncate an over-wide symbol address in the IR interpreter (#210372)
IRInterpreter::ResolveConstantValue built a pointer-width APInt directly
from the address returned by FindSymbol. That address can be wider than
a target pointer, because lldb records extra information in the high
bits on some targets, such as the code/memory address-space tag on
WebAssembly.
A 32-bit pointer then cannot hold the tagged address and the APInt
constructor asserts, aborting the debugger when a function-valued
expression is evaluated (for example `expr main`).
Truncate to the pointer width instead of asserting, matching the idiom
already used in DWARFExpression. On targets whose addresses fit in a
pointer this is a no-op.
Commit: 4e0dbfe489dcc0b057303047608cd2a909602a14
https://github.com/llvm/llvm-project/commit/4e0dbfe489dcc0b057303047608cd2a909602a14
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
Log Message:
-----------
[SCEV][NFC] Precommit test for MatchRangeCheckIdiom tightening (#210386)
Commit: 0e3852f73ab75639b76bad2c8a735d46241768f3
https://github.com/llvm/llvm-project/commit/0e3852f73ab75639b76bad2c8a735d46241768f3
Author: Patryk Stefanski <patryk.stefanski at protonmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
Log Message:
-----------
[clang][sema] Fix crash on decomposition decl missing initializer (#210151)
ActOnUninitializedDecl dereferenced the std::optional<Token> from
Lexer::findNextToken() unconditionally when diagnosing a structured
binding with no initializer. Guard the optional and fall back to the
declaration's location.
Commit: 82134c708f7ec224d86e2096d9b53c76640a490f
https://github.com/llvm/llvm-project/commit/82134c708f7ec224d86e2096d9b53c76640a490f
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
Log Message:
-----------
[CIR] Terminate conditional regions after creation; fix glvalue conditional with a throw arm (#210384)
Follow-up to #208850: @andykaylor's comments about
`CIRGenFunction::emitConditionalBlocks` also have a similar
insertion-point problem.
The PR addresses the two related problems found while looking into the
conditional branch emission path:
**1. Terminate conditional regions after creation instead of patching
yields**
`CIRGenFunction::emitConditionalBlocks` still had the save-and-patch
insertion-point machinery removed from the scalar path in #208850. The
path is unreachable, and its guard is saved only after
`cir.unreachable`, where a patched yield would generate the dead code.
The machinery is removed; regions are closed with
`terminateStructuredRegionBody` after creation.
The aggregate emitter had the reverse problem: an unconditional
cir.yield after each arm lands in the dead block a throw leaves behind
and keeps it in the final CIR:
```
struct test_s { int x; int y; };
void test_throw(bool flag) {
test_s a = flag ? throw 0 : test_s{1, 2};
}
mlir
cir.if %2 {
...
cir.throw %3 : !cir.ptr<!s32i>, @_ZTIi
cir.unreachable
^bb1: // no predecessors <-- dead block kept alive by the yield
cir.yield
} else {
...
}
```
The explicit yields are removed; `emitIfOnBoolExpr` already terminates
each region, adding a yield only where one is missing. Tests pin the
dead block's absence with CIR-NEXT after `cir.unreachable`.
**2. Fix glvalue conditionals with a throw arm using a region-local
pointer**
```
int &ref_cond(bool c, int &x) { return c ? x : throw 0; }
// error: operand #0 does not dominate this use
// fatal error: CIR module verification error
```
With one arm throwing, `emitConditionalOperatorLValue` returned the
surviving arm's LValue directly, valid in OG CodeGen's flat CFG, invalid
in CIR where the pointer is materialized inside the ternary's region:
```
%4 = cir.ternary(%3, true {
%8 = cir.load %1 ... // pointer loaded inside the region
cir.yield %8 : !cir.ptr<!s32i>
}, false { ... cir.unreachable })
cir.store %8, %2 ... // region-local %8 used outside the region
```
Existing tests missed it because a local's pointer is a function-entry
`alloca`, so dominance held by accident. The fix addresses the result
through the ternary's result value, which the yield carries out. New
tests cover a reference parameter, assignment via the conditional, and
member access, all of which previously failed verification.
Assisted-by: Cursor/Codex
Commit: ea863cb2dec8e0f040dfe22a52d3b537e4a25c29
https://github.com/llvm/llvm-project/commit/ea863cb2dec8e0f040dfe22a52d3b537e4a25c29
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/X86/dagcombine-sub-globaladdress.ll
Log Message:
-----------
[DAGCombiner] Fix APInt truncation assertion (#209914)
getConstant() would create an APInt with ImplicitTrunc = false, but the
constant here can really be anything.
Fixes #209884.
Commit: 1e37b629fbd06d922ac1216cf20114ea4ce1c88d
https://github.com/llvm/llvm-project/commit/1e37b629fbd06d922ac1216cf20114ea4ce1c88d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/libcxx/test/format.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/formats/shtest.py
Log Message:
-----------
[lit] Delete the external shell (#209571)
This was deprecated in LLVM 23 and slated for removal in LLVM 24. Now
that we have branched and everything has been updated to not set
execute_external, we can remove it.
Commit: 466503dcf2ae2e43126c1a6d8a5b204883d5b0c1
https://github.com/llvm/llvm-project/commit/466503dcf2ae2e43126c1a6d8a5b204883d5b0c1
Author: Logan <143111092+Logans-olo at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrTBM.td
M llvm/test/CodeGen/X86/tbm_patterns.ll
Log Message:
-----------
X86: Add pattern for optimized BLSIC IR form (#209814)
Add DAG pattern to recognize the optimized IR form of BLSIC: (xor (and
x, -x), -1)
Fixes #209718 - matches the IR form produced after InstCombine
optimizations
Added tests for both 32-bit and 64-bit BLSIC patterns
Assisted by: Claude Code, helped me understand
pattern-matching/intrinsics, and some file structure. As well as how
testing for LLVM works.
Commit: f97dcd05eb4be690dcfd39de9f6de937d5acfa46
https://github.com/llvm/llvm-project/commit/f97dcd05eb4be690dcfd39de9f6de937d5acfa46
Author: stephenduong1004 <stephenduong at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp
Log Message:
-----------
[llvm-libtool-darwin] Ensure filelist buffer is null-terminated (#205115)
[llvm-libtool-darwin] Ensure filelist buffer is null-terminated
In llvm-libtool-darwin.cpp, `MemoryBuffer::getFileOrSTDIN` was
previously called to load the filelist with `RequiresNullTerminator` set
to `false`. However, the retrieved buffer is subsequently passed to
`llvm::line_iterator`.
Since `llvm::line_iterator` explicitly requires its underlying buffer to
be null-terminated, omitting this requirement can result in an
out-of-bounds read/buffer overrun when parsing the file list.
This change fixes the issue by requesting a null-terminated buffer
(`RequiresNullTerminator=true`).
Co-authored-by: Alexander Shaposhnikov <ashaposhnikov at google.com>
Commit: 986cdd8618e3e105bde1d52e7d8888325a7c87b1
https://github.com/llvm/llvm-project/commit/986cdd8618e3e105bde1d52e7d8888325a7c87b1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
A llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move EVL-based transforms to VPlanEVLTransforms.cpp (NFC) (#209883)
VPlanTransforms.cpp has become quite big and is one of the top 20 most
expensive files in terms of compile-time.
https://llvm-compile-time-tracker.com/compare_clang.php?from=b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831&to=96a722a0ace661626d071166635728def97f6820&stat=instructions%3Au
Split off the mostly self-contained EVL related transforms and move them
to a new VPlanEVLTransforms.cpp.
This moves simplifyKnownEVL, optimizeEVLMasks, addExplicitVectorLength,
convertToVariableLengthStep and convertEVLExitCond together with their
EVL-specific static helpers.
Shared helpers used by the moved code (isDeadRecipe,
collectUsersRecursively, recursivelyDeleteDeadRecipes,
getOpcodeOrIntrinsicID and tryToFoldLiveIns, pullOutPermutations) are
promoted to vputils.
PR: https://github.com/llvm/llvm-project/pull/209883
Commit: a12cbbcc94a80f54714aaa253f8838fcc9ab4aae
https://github.com/llvm/llvm-project/commit/a12cbbcc94a80f54714aaa253f8838fcc9ab4aae
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractor.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
Log Message:
-----------
[SSAF] Add EntitySourceLocationExtractor (#210201)
Walks every entity-producing decl in the TU and emits
SourceLocationRecord(s) per entity-kind anchor:
* Identifier-bearing decls (FunctionDecl/VarDecl/FieldDecl/ RecordDecl):
Decl::getLocation().
* Synthetic function return-slot entity:
FD->getReturnTypeSourceRange().getBegin().
* ParmVarDecl (named or unnamed): P->getTypeSpecStartLoc().
Skips compiler-synthesized implicits and builtins via the getEntityName
gate, system-header decls via SourceManager, and silently drops records
whose location is invalid or whose file path cannot be canonicalized via
real_path.
Assisted-By: Claude Opus 4.7
Commit: 284c1a166af4c7deab55c7de2ee1bd480d44e9ff
https://github.com/llvm/llvm-project/commit/284c1a166af4c7deab55c7de2ee1bd480d44e9ff
Author: David Mentler <mentlerd at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/docs/use/variable.md
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectSynthetic.h
M lldb/source/API/SBValue.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic/TestSBValueSetTypeSynthetic.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/library_support.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/main.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/foo_bar_synths.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/main.cpp
Log Message:
-----------
[LLDB] Enable SBTypeSynthetic manipulation for SBValue instances (#209056)
Allow manipulating the scripted synthetic children frontend selection
process for individual `SBValue` instances.
The motivating use-case is supporting custom data structures, type
erasure systems, and facilitating debugging handle based C APIs. Below
is an example of such a use-case of an anonymized 3rd party C library:
```C
using ErrorCode = int;
using Handle = void*;
using FooHandle = Handle;
using BarHandle = Handle;
struct ArrayOfHandles {
int size;
Handle* data;
};
struct AllHandles {
ArrayOfHandles foos;
ArrayOfHandles bars;
};
ErrorCode GetAllHandles(AllHandles* into);
```
The current LLDB feature-set allows attaching a synthetic children
provider to `AllHandles`, but the scripted frontend has no chance to
select an appropriate alternative frontend implementation class for
`foos` and `bars` based on type information it is aware of.
Commit: 9eb2dc0930ac75494e71b16739c859fe338a3f0f
https://github.com/llvm/llvm-project/commit/9eb2dc0930ac75494e71b16739c859fe338a3f0f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/libcxx/test/format.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/formats/shtest.py
Log Message:
-----------
Revert "[lit] Delete the external shell" (#210433)
Reverts llvm/llvm-project#209571
Breaks some buildbots:
1.
https://lab.llvm.org/buildbot/#/builders/232/builds/3690/steps/11/logs/stdio
2. https://lab.llvm.org/buildbot/#/builders/222/builds/11180
Commit: 965fa410dad7294cc1c1a9632ff94558de6dfa40
https://github.com/llvm/llvm-project/commit/965fa410dad7294cc1c1a9632ff94558de6dfa40
Author: Sharjeel Khan <sharjeelkhan at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
A llvm/test/MC/AArch64/LFI/debug-info.s
Log Message:
-----------
[LFI][AArch64] Fix Segfault due to infinite recursion in LFI rewriter (#210267)
When emitting a deferred LR guard, if debug info is enabled, the
emission of the guard instruction can trigger temporary labels (e.g. for
DWARF line entries), which recursively calls onLabel. Since
DeferredLRGuard was only set to false after emission, the nested call
would re-emit the guard, causing infinite recursion which leads to a
SegFault due to stack overflow. This was detected compiling
ubsan_minimal_handlers.cpp in compiler-rt. I fixed it by using the
existing recursion guard (Guard).
Commit: 2120490a54645f9a4390605adec5509243641d29
https://github.com/llvm/llvm-project/commit/2120490a54645f9a4390605adec5509243641d29
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Diagnostics.h
M lldb/source/Core/Diagnostics.cpp
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/DiagnosticsTest.cpp
Log Message:
-----------
[lldb] Add an artifact provider mechanism to Diagnostics (#210417)
Add a hook that lets a subsystem contribute a file to the diagnostics
bundle, without breaking layering and making Core depend on it. A plugin
registers an ArtifactProvider callback and a file name via AddArtifactProvider.
Providers run when a bundle is collected, and each one that yields
content is written into the bundle and recorded in the report's
attachments.
This restores, in a simpler form, the collection point that the removed
Diagnostics callback mechanism offered. The motivating consumer is the
downstream Swift health check, which registers a provider to write its
"swift-healthcheck.log" into the bundle. Unlike the old callback, a
provider does not open or write its own file: it just returns the
contents as a string and Diagnostics handles the rest.
Commit: d592aa5a10f44164cd403257270802eb2a4b123a
https://github.com/llvm/llvm-project/commit/d592aa5a10f44164cd403257270802eb2a4b123a
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseDecl.cpp
A clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general/p2.cpp
Log Message:
-----------
[Clang] Fixed auto parsing regression with brace initialization (#210347)
The PR #208552 has introduced a regression where brace initialization
was not taken into account `auto foo{12}`. It was also breaking
`dcl.type.general` p2 rules, which is also now tested.
Commit: 32221d9ff8f4772972193ebf7b8ba4974cd8458f
https://github.com/llvm/llvm-project/commit/32221d9ff8f4772972193ebf7b8ba4974cd8458f
Author: David Green <david.green at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
Log Message:
-----------
[AArch64] Add lowering for fixed-vector bf16 masked gather/scatter. (#210273)
Similar to #208744, this makes sure that bf16 masked gather and scatter
work with fixed-length sve enabled. Without +bf16 the operations are
currently expanded pre-isel, but that will not be fixed in this patch as
it is a larger change and this patch is intended to be ported to the
branch.
Commit: b4a444ad635af70fe32f58d46fe0c08221fbcf5a
https://github.com/llvm/llvm-project/commit/b4a444ad635af70fe32f58d46fe0c08221fbcf5a
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/stdlib/linux/CMakeLists.txt
M libc/src/stdlib/linux/realpath.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][realpath] Support relative paths (#209374)
Updates realpath to call the `getcwd` linux syscall wrapper to resolve
cwd-relative queries.
Commit: 35bf12351740521f86fd406d01165e1c90b32ed8
https://github.com/llvm/llvm-project/commit/35bf12351740521f86fd406d01165e1c90b32ed8
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/test/Dialect/OpenACC/ops-cg.mlir
Log Message:
-----------
[mlir][acc] Preserve section bounds on acc.reduction_init (#210443)
When `acc.reduction_init` is created from `acc.reduction`, its bounds
are lost because they only live as values folded into the init region's
body. Those bounds describe the legal indexing of the section: the
produced view of a (possibly base-adjusted, compact) reduction temporary
must be indexed with the same bounds as the original array.
Carry the acc.bounds as optional operands on acc.reduction_init so this
indexing information is directly available. The operands are optional,
so scalar/whole-array reductions and existing IR are unaffected.
Commit: 2b68eb4d70072d4e0084c0b4113bbd209c600088
https://github.com/llvm/llvm-project/commit/2b68eb4d70072d4e0084c0b4113bbd209c600088
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV][NFCI] Refactor LoopGuards range check matching (#210362)
Parameterize MatchRangeCheckIdiom over (Predicate, LHS, RHS) so it can
be reused for other predicates discovered during guard collection.
Hoist AddRewrite / GetMaybeRewritten above it and use them in place of
the inline try_emplace, so range-check rewrites chain onto existing ones
the same way other rewrites do.
Commit: 2dbcd7d10f9462bdc30a169730919fc7da321905
https://github.com/llvm/llvm-project/commit/2dbcd7d10f9462bdc30a169730919fc7da321905
Author: adams381 <adams at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/PassDetail.h
A clang/test/CIR/Transforms/abi-lowering/x86_64-lang-addrspace-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/GetFloatingPointTypeTest.cpp
Log Message:
-----------
[CIR] Add x86_64 scalar calling-convention lowering (#209636)
CallConvLowering can already classify a function through the MLIR test
target or through a classification injected as an attribute, but it has
no
path to a real target ABI. This adds a `target=x86_64` mode that runs
the
LLVM ABI Lowering Library's System V x86_64 classifier: it maps CIR
types to
`llvm::abi` types, calls the classifier, and converts the result back
into
the `mlir::abi::FunctionClassification` that `CIRABIRewriteContext`
already
consumes.
To keep the first step small this handles scalar signatures only --
integer
up to 64 bits, pointer, bool, `f32`, and `f64`. Anything else (records,
arrays, vectors, `_Complex`, wide or uncommon floats, `_BitInt`,
`__int128`,
member pointers) is reported as not-yet-implemented through
`emitOpError`, so
an unsupported signature fails the pass instead of being silently
misclassified. Those types come in stacked follow-ups. The pass is still
only reachable from `cir-opt`; wiring it into the `-fclangir` pipeline
is a
later change.
Assisted-by: Cursor / claude-opus-4.8
Commit: 12e3d9db0088d95675a0081495122483faa7b60d
https://github.com/llvm/llvm-project/commit/12e3d9db0088d95675a0081495122483faa7b60d
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGen/var_arg.c
Log Message:
-----------
[CIR] Add support for lowering __builtin_c23_va_start in ClangIR (#208741)
C23 `va_start `expands to `__builtin_c23_va_start`, which was previously
routed to the unimplemented-builtin NYI path in ClangIR. As a result,
variadic code failed to compile with -fclangir in -std=c23 mode.
This change lowers `__builtin_c23_va_start` the same way as
`__builtin_va_start`. For both builtins, the va_list operand is always
argument 0, so the existing lowering logic can be reused directly.
Commit: fefdf74c073b0361fb9a5100f6b1f38a13d72e55
https://github.com/llvm/llvm-project/commit/fefdf74c073b0361fb9a5100f6b1f38a13d72e55
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/RISCV/rvv/vecreduce-minmax-constant-fold.ll
Log Message:
-----------
[SelectionDAG] Fold constant min/max vector reductions (#209190)
I extended constant folding to handle signed and unsigned min/max vector
reductions. Constant vectors now become scalar constants before target
lowering, while non-constant, poison, and undef behavior stays
unchanged.
Fixes #209109
Commit: 2926d18a0620a768857dce1c827d0a3da0d0b565
https://github.com/llvm/llvm-project/commit/2926d18a0620a768857dce1c827d0a3da0d0b565
Author: Pengxiang Huang <71998072+Pengxiang-Huang at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/semaphore/linux/CMakeLists.txt
M libc/src/semaphore/linux/named_semaphore.cpp
M libc/src/semaphore/linux/semaphore.h
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
Log Message:
-----------
[libc][semaphore] Add post and wait operations for internal semaphore (#198959)
This pr implements https://github.com/llvm/llvm-project/issues/190847,
adding the post and wait operations in posix semaphore for linux using
futex.
Particularly,
`sem_post`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_post.html
`sem_trywait`, `sem_wait`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_wait.html
`sem_timedwait`, `sem_clockwait`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_clockwait.html#
The implementation is assisted by Claude Code Opus 4.7, specifically for
the unit tests generations.
Commit: c1c278e7484038f1d14314f38736532975fafd20
https://github.com/llvm/llvm-project/commit/c1c278e7484038f1d14314f38736532975fafd20
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A clang/docs/ScalableStaticAnalysis/user-docs/SourceEditGeneration.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
A clang/include/clang/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/ScalableStaticAnalysis/Frontend/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/empty-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/two-function-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/lit.local.cfg
A clang/test/Analysis/Scalable/source-edit-generation/cli-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
A clang/test/Analysis/Scalable/source-edit-generation/downgradable-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
A clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
M clang/test/CMakeLists.txt
Log Message:
-----------
[clang][ssaf] Integrate source-edit-generation (#208590)
Adds the four `--ssaf-*` driver flags
(`--ssaf-source-transformation=`,
`--ssaf-global-scope-analysis-result=`, `--ssaf-src-edit-file=`,
`--ssaf-transformation-report-file=`) under `SSAF_Group`, marshalled
into `FrontendOptions`. The compilation-unit identifier flag introduced
earlier is reused. The driver forwards all four flags to `cc1`.
Adds twelve `warn_ssaf_*` diagnostics under
`-Wscalable-static-analysis-framework` (`DefaultError`) covering the
orphan-flag matrix, unknown transformation names, unknown output
formats, WPA-suite read failures, and edit/report write failures.
Adds `clang::ssaf::SourceTransformationFrontendAction` — a
`WrapperFrontendAction` that, when any source-edit flag is set,
validates the CLI as a group, loads the WPASuite from the configured
path, instantiates the named transformation, and serializes the
accumulated edits and findings through the configured formats. The
action is wrapped in `ExecuteCompilerInvocation` after the existing
TU-summary wrap so both pipelines stack as independent `ASTConsumer`s on
the same translation unit; they exchange no data.
Assisted-By: Claude Opus 4.7
Commit: 372cd15f03e49bb826a63a6c59cc7f74962ab278
https://github.com/llvm/llvm-project/commit/372cd15f03e49bb826a63a6c59cc7f74962ab278
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir
Log Message:
-----------
[openacc] Implicitly map external constant globals (#210408)
Hoist initializer-less constant globals out of OpenACC compute regions
so implicit data mapping handles them. This avoids unresolved device
symbols for PARAMETER arrays defined in separately compiled modules,
while retaining implicit declare for initialized constants. Add
regression coverage and a global initializer query to the OpenACC
interface.
Commit: 3fbb037d03e7ff1ef1cd9156363e895af7caaf98
https://github.com/llvm/llvm-project/commit/3fbb037d03e7ff1ef1cd9156363e895af7caaf98
Author: Haowei <haowei at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Adding an option to Skip LLVM and Clang exports (#209922)
Under CMake 4+, calling add_library(... SHARED IMPORTED) on a
target platform that lacks dynamic linking support triggers a fatal
error. This becomes an issue when building LLVM and runtimes for
baremetal targets like armv6m-none-eabi. This patch
adds the option "LLVM_OMIT_EXPORTS_FROM_CONFIG" in LLVM.
When used in sub builds like LLVM runtimes, it makes CMake to skip
including the LLVM and Clang exports. This mitigates the CMake 4
errors on baremetal runtimes.
Commit: dbab04510ee89e5e9ed03cb6aff63fd218fb3042
https://github.com/llvm/llvm-project/commit/dbab04510ee89e5e9ed03cb6aff63fd218fb3042
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
A llvm/test/Transforms/TailCallElim/disable-tail-call-elim-for-cold-calls.ll
Log Message:
-----------
[TailCallElim] Optionally suppress tail call elim for cold calls (#209642)
Since eliminated tail calls result in missing frames when collecting
various types of profiles, provide an option for disabling the
elimination for cold non-musttail calls. By default the new handling is
disabled.
Since the new checks require BFI to be built in more cases, I have moved
UpdateFunctionEntryCount and ForceDisableBFI (renamed to
DisableEntryCountRecompute to match the flag and description), to
actually guard the function entry count update.
Commit: c4962f5721a36e198234019b846d3788738f766a
https://github.com/llvm/llvm-project/commit/c4962f5721a36e198234019b846d3788738f766a
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/PluginManager.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Interpreter/embedded_interpreter.py
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h
A lldb/test/API/functionalities/scripting_extension_generate/Makefile
A lldb/test/API/functionalities/scripting_extension_generate/TestScriptingExtensionGenerate.py
A lldb/test/API/functionalities/scripting_extension_generate/main.c
Log Message:
-----------
[lldb/script] Add scripting extension template generator (#209647)
This patch adds a `scripting extension generate <ExtensionType>...`
command that introspects a Python extension base class and emits a
skeleton subclass with `# TODO: Implement` stubs for its abstract
methods (or, with `-a`, every method), then opens the result in an
editor.
Generated imports use `from <module> import <class>`, and the generated
`__init__` forwards its arguments to `super().__init__(...)` since every
base class relies on its constructor to set up attributes
(`self.target`, `self.process`, ...) that inherited, non-overridden
methods depend on. When the host can't open an external editor (e.g.
non-macOS), the command reports that as a message rather than an error,
since the file is already written.
To catch regressions in the generator itself instead of just checking
that a file was produced, this patch adds
`TestScriptingExtensionGenerate.py`, which generates a template for
every extension kind on the fly and drives it through a live lldb
session (`process launch -C`, `breakpoint set -P`, `target stop-hook add
-P`, etc.).
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: ccd75bb4b9c6d9c2e149d355c35193ca554c99a0
https://github.com/llvm/llvm-project/commit/ccd75bb4b9c6d9c2e149d355c35193ca554c99a0
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Interfaces/CIRLoopOpInterface.cpp
A clang/test/CIR/IR/invalid-loop-cleanup.cir
A clang/test/CIR/IR/loop-cleanup.cir
M clang/unittests/CIR/ControlFlowTest.cpp
Log Message:
-----------
[CIR] Introduce loop cleanup regions (#210212)
For loops and while loops can create variables in their condition
regions that require per-iteration cleanup. The CIR dialect previously
had no clean way to represent these cleanups while maintaining a
separate condition region for the loop operation.
This change introduces an optional cleanup region to these loop ops and
updates the relevant region successor handling to reflect the insertion
of the cleanup region in the control flow when a non-empty cleanup
region is present.
The CFG flattening pass will handle routing the control flow through the
cleanup region in both the normal and EH unwind cases, but this is not
yet implemented. That will be added in a follow-up change, as will
creation of the cleanup region when it is needed during IR generation.
Assisted-by: Cursor / various models
Commit: ab6ef5680eb79e102414740198f5aa1015c5c254
https://github.com/llvm/llvm-project/commit/ab6ef5680eb79e102414740198f5aa1015c5c254
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/unittests/Process/gdb-remote/CMakeLists.txt
A lldb/unittests/Process/gdb-remote/ProcessGDBRemoteTest.cpp
Log Message:
-----------
[lldb] Contribute the GDB-remote packet history to diagnostics bundles (#210418)
Register a Diagnostics artifact provider from ProcessGDBRemote so a
diagnostics bundle captures the GDB-remote packet history, the same data
"process plugin packet history" prints.
Commit: 03b9039147cca65e2b4fa3adcbbbf40f73e3a3c9
https://github.com/llvm/llvm-project/commit/03b9039147cca65e2b4fa3adcbbbf40f73e3a3c9
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/docs/AdminTasks.md
Log Message:
-----------
[docs] Update the commit review admin task with process details (#210420)
As discussed in the infra area team meeting. Mostly this serves as a
place to stash helpful links.
I picked an arbitrary two week timeout for requests. We can re-evaluate at any time.
It seems less than ideal that one needs issue tracker labelling
privileges to reopen the issue, but I think that's accurate.
Commit: 42eb7db188f23625872b6f1d722979a3100d170e
https://github.com/llvm/llvm-project/commit/42eb7db188f23625872b6f1d722979a3100d170e
Author: Haowei <haowei at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Revert "Skipping host target exports during cross-compilation" (#210468)
Reverts llvm/llvm-project#209922
It broke runtimes build on amdgpu-amd-amdhsa
Commit: d00710093a3d2795200dbf065836220345aa9e9d
https://github.com/llvm/llvm-project/commit/d00710093a3d2795200dbf065836220345aa9e9d
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
Log Message:
-----------
[lldb-dap][test] Avoid a hang on a test failure (#209988)
Tests in `TestDAP_server.py` create `DebugAdapterServer`, passing a
connection string. `DebugAdapterServer.__init__()` creates a socket and
passes the associated input and output streams to its parent class,
`DebugCommunication`. `DAPTestCaseBase.launch()`, which is called from
`TestDAP_server.run_debug_session()`, adds a teardown hook that
eventually calls `DebugCommunication.terminate()`. If the socket is not
closed when this hook executes, it waits indefinitely for the receiving
thread to join.
In the normal case, when a test passes, the connection is closed by
calling `self.dap_server.request_disconnect()` at the end of
`TestDAP_server.run_debug_session()`. If a test fails, the cleanup hook
is called while the connection is still active, which results in a hang.
This can be reproduced by removing the call to `request_disconnect()` or
by changing the condition in the `assertEqual()` on the previous line.
The fix passes the opened socket to 'DebugCommunication' and closes the
socket explicitly in 'DebugCommunication.terminate()'.
Commit: fb2fa0b0f0a8b061401f6cfa3c2fadd3fbfb3b35
https://github.com/llvm/llvm-project/commit/fb2fa0b0f0a8b061401f6cfa3c2fadd3fbfb3b35
Author: Lucas Ribeiro Lima <lucasribeirolima974 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
Log Message:
-----------
[clang][clangIR]: X86 upstream avx psrldqi/pslldqi (#208025)
This PR upstreams the implementation and corresponding test suites for
X86 byte-shift intrinsics (pslldqi / psrldqi) spanning 128, 256, and
512-bit vector variants from the incubator.
I consolidated both left and right shifts into a single code path since
the underlying lane topology is identical, extracting the
direction-specific index arithmetic into clean variables at the top. Let
me know if you prefer this unified data-driven approach or if explicit
split functions for left/right shifts would be preferred for local
readability.
All integrated tests from the incubator have been upstreamed and are
currently passing.
Minimal compile case
```cpp
#include <emmintrin.h>
#include <iostream>
struct DataLayout {
alignas(16) int values[4];
};
#define INDEX 1
int main(int argc, char **argv) {
DataLayout data{8, 4, 2, 1};
std::cout << "Value before: " << data.values[INDEX] << '\n';
__m128i reg128i =
_mm_load_si128(reinterpret_cast<__m128i const *>(data.values));
__m128i reg_right_shift = _mm_bsrli_si128(reg128i, 4);
__m128i reg_left_shift = _mm_bslli_si128(reg128i, 4);
DataLayout result_right;
_mm_store_si128(reinterpret_cast<__m128i *>(result_right.values),
reg_right_shift);
DataLayout result_left;
_mm_store_si128(reinterpret_cast<__m128i *>(result_left.values),
reg_left_shift);
std::cout << "Value after left: " << result_left.values[INDEX] << '\n';
std::cout << "Value after right: " << result_right.values[INDEX] << '\n';
return 0;
}
```
Addresses #167752.
Commit: b0440cb55a22e979e81934e0c031c9d46e71f9da
https://github.com/llvm/llvm-project/commit/b0440cb55a22e979e81934e0c031c9d46e71f9da
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
Log Message:
-----------
[CycleInfo] Reference cycles by preorder index, not pointer. NFC (#210271)
The block-to-innermost-cycle map (BlockMap) and each cycle's parent link
hold a GenericCycle pointer. Store the cycle's preorder index instead,
so no raw cycle pointer remains in the stored representation: BlockMap
becomes a SmallVector<unsigned>, four bytes per block rather than eight,
and the parent link becomes ParentIndex.
The flat Cycles array does not exist during construction, so both hold
creation-order indices into the temporary forest until flatten()
resolves them to preorder indices.
Aided by Claude Opus 4.8
Commit: ee5d6f537da4bc81b956b4813afbc0877f82b59d
https://github.com/llvm/llvm-project/commit/ee5d6f537da4bc81b956b4813afbc0877f82b59d
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes c1c278e (#210451)
This fixes c1c278e7484038f1d14314f38736532975fafd20.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=c1c278e7484038f1d14314f38736532975fafd20
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 1ef8ba9a00e16423d711ddbf16c7a45fb7fd570b
https://github.com/llvm/llvm-project/commit/1ef8ba9a00e16423d711ddbf16c7a45fb7fd570b
Author: Luc Forget <github at alias.lforget.fr>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Target/Wasm/TranslateFromWasm.cpp
Log Message:
-----------
[MLIR][WasmSSA] Instruction parser refactoring of WasmSSA importer (#195500)
Refactored WasmSSA importer mechanism to dispatch control flow to
relevant parser based on op code.
This is to prepare for instructions with multi-bytes opcodes (e.g.
vector instruction and some scalar instructions extensions) which will
be able to reuse the same mechanism.
It also replaces the bit tree to find the address by a jump table.
---------
Co-authored-by: Luc Forget <lforg37 at users.noreply.github.com>
Co-authored-by: Ferdinand Lemaire <ferdinand.lemaire at woven-planet.global>
Co-authored-by: Ferdinand Lemaire <flscminecraft at gmail.com>
Commit: cf11eef1c9476c8778055d7963fdac34b6628582
https://github.com/llvm/llvm-project/commit/cf11eef1c9476c8778055d7963fdac34b6628582
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/docs/AArch64SME.md
R llvm/docs/AArch64SME.rst
A llvm/docs/AMDGPUAsyncOperations.md
R llvm/docs/AMDGPUAsyncOperations.rst
A llvm/docs/AMDGPUExecutionSynchronization.md
R llvm/docs/AMDGPUExecutionSynchronization.rst
A llvm/docs/AMDGPUMemoryModel.md
R llvm/docs/AMDGPUMemoryModel.rst
A llvm/docs/AddingConstrainedIntrinsics.md
R llvm/docs/AddingConstrainedIntrinsics.rst
A llvm/docs/BigEndianNEON.md
R llvm/docs/BigEndianNEON.rst
A llvm/docs/CompileCudaWithLLVM.md
R llvm/docs/CompileCudaWithLLVM.rst
A llvm/docs/DebuggingJITedCode.md
R llvm/docs/DebuggingJITedCode.rst
A llvm/docs/ExtendingLLVM.md
R llvm/docs/ExtendingLLVM.rst
A llvm/docs/HowToBuildWindowsItaniumPrograms.md
R llvm/docs/HowToBuildWindowsItaniumPrograms.rst
A llvm/docs/HowToCrossCompileBuiltinsOnArm.md
R llvm/docs/HowToCrossCompileBuiltinsOnArm.rst
A llvm/docs/HowToUpdateDebugInfo.md
R llvm/docs/HowToUpdateDebugInfo.rst
A llvm/docs/Instrumentor.md
R llvm/docs/Instrumentor.rst
A llvm/docs/JITLink.md
R llvm/docs/JITLink.rst
A llvm/docs/MCJITDesignAndImplementation.md
R llvm/docs/MCJITDesignAndImplementation.rst
A llvm/docs/NVPTXUsage.md
R llvm/docs/NVPTXUsage.rst
A llvm/docs/ORCv2.md
R llvm/docs/ORCv2.rst
A llvm/docs/Remarks.md
R llvm/docs/Remarks.rst
A llvm/docs/SPIRVUsage.md
R llvm/docs/SPIRVUsage.rst
Log Message:
-----------
[docs] Rename selected LLVM docs to Markdown (#208800)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: cddf2069ded94cb47048ad2a5f340d12c35f1651
https://github.com/llvm/llvm-project/commit/cddf2069ded94cb47048ad2a5f340d12c35f1651
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/docs/AArch64SME.md
M llvm/docs/AMDGPUAsyncOperations.md
M llvm/docs/AMDGPUExecutionSynchronization.md
M llvm/docs/AMDGPUMemoryModel.md
M llvm/docs/AddingConstrainedIntrinsics.md
M llvm/docs/BigEndianNEON.md
M llvm/docs/CompileCudaWithLLVM.md
M llvm/docs/DebuggingJITedCode.md
M llvm/docs/ExtendingLLVM.md
M llvm/docs/HowToBuildWindowsItaniumPrograms.md
M llvm/docs/HowToCrossCompileBuiltinsOnArm.md
M llvm/docs/HowToUpdateDebugInfo.md
M llvm/docs/Instrumentor.md
M llvm/docs/JITLink.md
M llvm/docs/MCJITDesignAndImplementation.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/ORCv2.md
M llvm/docs/Remarks.md
M llvm/docs/SPIRVUsage.md
Log Message:
-----------
[docs] Rewrite 19 LLVM docs from reST to markdown (#208798)
Tracking issue: #201242
[Migration
guide](https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines)
This is a stacked PR based on #208800, which does the file rename to
preserve history.
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections.
Commit: a623e8d4381e26eceff29209e6db411617d95f83
https://github.com/llvm/llvm-project/commit/a623e8d4381e26eceff29209e6db411617d95f83
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port 2dbcd7d10f94 (#210484)
Commit: 605b6d73214cf253fc5fb9d5befe99857bd480cf
https://github.com/llvm/llvm-project/commit/605b6d73214cf253fc5fb9d5befe99857bd480cf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 986cdd8618e3 (#210485)
Commit: 56fc7bf0c364ab210c49c3b95e7130d337490b78
https://github.com/llvm/llvm-project/commit/56fc7bf0c364ab210c49c3b95e7130d337490b78
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port c1c278e74840 (#210488)
Commit: 2e1c934fea272654ab2b00f60b6d3dba93123190
https://github.com/llvm/llvm-project/commit/2e1c934fea272654ab2b00f60b6d3dba93123190
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port a12cbbcc94a8 (#210487)
Commit: 3be5663001465e74c7b879ad4d4cbfc3c94caeba
https://github.com/llvm/llvm-project/commit/3be5663001465e74c7b879ad4d4cbfc3c94caeba
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
Log Message:
-----------
[gn build] Port 9b096bb7abf7 (#210486)
Commit: 6a33b69d8bae737e5e1d60c7b7776a0b1f885bfa
https://github.com/llvm/llvm-project/commit/6a33b69d8bae737e5e1d60c7b7776a0b1f885bfa
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/test/tools/llvm-profdata/profile-symbol-list.test
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[SampleProfile] Support MD5-based ProfileSymbolList (#210235)
This patch speeds up sample profile loading by introducing an
MD5-based ProfileSymbolList (cold symbol list) in extensible binary
profiles.
The sample profile loader spends about a third of its time on loading
and decoding the symbol names in the Profile Symbol List section, yet
we use them only for membership checking purposes via
ProfileSymbolList::contains.
This patch teaches the writer to emit the section as an array of
64-bit GUIDs in the Eytzinger layout. The reader checks the
SecFlagMD5 section flag and sets up an EytzingerTableSpan
pointing into the mmap memory. This achieves both space efficiency
and runtime efficiency.
The new flag, md5-prof-sym-list, is off by default for now.
Profile merging is supported only from strings to an MD5-based
Eytzinger array.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/7
Assisted-by: Antitygravity
Commit: ea50c8cc99778825fc647cf190d8f7a8f49cdcdd
https://github.com/llvm/llvm-project/commit/ea50c8cc99778825fc647cf190d8f7a8f49cdcdd
Author: Mishal Shah <mishal_shah at apple.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
Fix macOS casing in premerge workflow (#210477)
Commit: 3fc4fcade6164fc6b9dcf0d6d0d6fa9cf6e47dfc
https://github.com/llvm/llvm-project/commit/3fc4fcade6164fc6b9dcf0d6d0d6fa9cf6e47dfc
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Crash in printArgument (#210411)
The crash was caused by missing nullptr check for Decl used to get
printing policy. Fixed the bug by replacing the use of Decl with
BugManager to get the policy.
Commit: 2730fc8a1a46ea92bbe91e3fc31897498617e076
https://github.com/llvm/llvm-project/commit/2730fc8a1a46ea92bbe91e3fc31897498617e076
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bfloat16/bfloat16.ll
Log Message:
-----------
[SPIR-V] Handle bfloat in getZeroFP/getOneFP (#202859)
Related spirv-val change:
https://github.com/KhronosGroup/SPIRV-Tools/pull/6734
---------
Co-authored-by: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Commit: ccd0e982a02fa3be39a98dd98ea6cc1ccaf24d13
https://github.com/llvm/llvm-project/commit/ccd0e982a02fa3be39a98dd98ea6cc1ccaf24d13
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
A lldb/test/API/lang/cpp/enum-limits/Makefile
A lldb/test/API/lang/cpp/enum-limits/TestCPPEnumLimits.py
A lldb/test/API/lang/cpp/enum-limits/main.cpp
Log Message:
-----------
[lldb][NativePDB] Fix width and signedness of enum constants (#210338)
Enumerator values aren't always encoded in the correct bit width and
signedness. This happens with both MSVC and Clang.
On MSVC, unsigned 64bit enumerators can be encoded as signed. For
example `ULONGLONG_MAX` will be encoded as `-1`.
Clang/LLVM will always encode the values as unsigned.
Example: https://godbolt.org/z/96YjGW48W.
I fixed this by setting the expected width and signedness when creating
the enumerator constant. We can't use a shell test like for the other
PDB tests, because no output shows the enum values.
Commit: 8c2d7cc3a9983459628c028d8537eaf79551f396
https://github.com/llvm/llvm-project/commit/8c2d7cc3a9983459628c028d8537eaf79551f396
Author: Jared Hoberock <jaredhoberock at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/include/mlir/IR/CMakeLists.txt
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/include/mlir/IR/SymbolTable.h
M mlir/lib/IR/SymbolTable.cpp
A mlir/test/IR/test-verifiers-symbol-user-type.mlir
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lib/Dialect/Test/TestTypes.cpp
M mlir/test/lib/Dialect/Test/TestTypes.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][IR] Add SymbolUserTypeInterface (#198435)
This change adds SymbolUserTypeInterface, analogous to
SymbolUserAttrInterface, and extends SymbolTable verification to check
participating types.
Verification visits the types owned by an operation, (operand/result
types, block argument types, attribute-contained types, nested type
parameters) and checks each distinct type at most once, interrupting on
the first failure. Deduplication spans the whole symbol-table walk, so a
type used by multiple operations is checked only once.
Attribute (SymbolUserAttrInterface) verification also gets deduped the
same way.
Assisted-by: Codex (OpenAI)
Assisted-by: Claude (Anthropic)
Commit: 1faa9f73119f007583ca829e07d78e82a40f1bae
https://github.com/llvm/llvm-project/commit/1faa9f73119f007583ca829e07d78e82a40f1bae
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Infer SrcTy in createScalarExtOrTrunc (NFC) (#210423)
The argument is redundant and can be inferred from Op.
Commit: d46a352ecf9708255a938e6d5e972b5221de4c2c
https://github.com/llvm/llvm-project/commit/d46a352ecf9708255a938e6d5e972b5221de4c2c
Author: David Mentler <mentlerd at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
Log Message:
-----------
[lldb] Fix TestSBValueSetTypeSyntheticOverride with libstdc++ (#210495)
My test added in #209056 assumed that a `CXXSyntheticChildren`
implementation for `std::vector` is readily available on all platforms,
that is not the case.
Do the simplest thing and remove this part of the test for now.
Fixes: https://lab.llvm.org/buildbot/#/builders/59/builds/35839
```
FAIL: test (TestSBValueSetTypeSyntheticOverride.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/llvm-project/lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py", line 22, in test
self.checkOverride(vec, before=None)
File "/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/llvm-project/lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py", line 43, in checkOverride
self.assertIsNone(impl_before)
AssertionError: <lldb.formatters.cpp.gnu_libstdcpp.StdVectorSynthProvider object at 0xfb088f787bb0> is not None
```
Commit: e96755f08bab48f1578bd70a1f55d336b5e44a69
https://github.com/llvm/llvm-project/commit/e96755f08bab48f1578bd70a1f55d336b5e44a69
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Factor vputils::getOpcodeOrIntrinsicID (NFC) (#208993)
The check for recipes in vputils::isElementWise is necessary to prevent
regressions.
Commit: 1f4d6acc935f93eca55cfef67348c8abcc1415db
https://github.com/llvm/llvm-project/commit/1f4d6acc935f93eca55cfef67348c8abcc1415db
Author: pzoln <pashka.zolnikov at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/test/Dialect/Bufferization/canonicalize.mlir
Log Message:
-----------
[mlir][bufferization] Avoid invalid memref.cast in to_buffer folding (#208973)
Fixes #202782
When folding bufferization.to_buffer(bufferization.to_tensor(...)), only
create a memref.cast if the source and destination memref types are
cast-compatible.
This avoids asserting on unranked memrefs with different memory spaces
and leaves the original bufferization ops in place instead.
Assisted-by: OpenAI Codex
Commit: c69896aa8733ceed6e8cc982eec64b97f277f926
https://github.com/llvm/llvm-project/commit/c69896aa8733ceed6e8cc982eec64b97f277f926
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
Log Message:
-----------
[mlir][interface] Use populateAndCompare cleanup compare (NFC) (#200156)
Commit: af0aa9440f1121bd5041a3dd7abef0d78b0f91cd
https://github.com/llvm/llvm-project/commit/af0aa9440f1121bd5041a3dd7abef0d78b0f91cd
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
Log Message:
-----------
[AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos (#169699)
Refactor `AArch64AsmPrinter::emitPtrauthAuthResign` to improve
readability and tune the conditions when `emitPtrauthDiscriminator` is
allowed to clobber address discriminator operands.
When resigning, do not clobber address discriminator register used for
authentication if it is also used for signing. Such clobbering would
prevent passing raw, 64-bit value as the new discriminator. Clarify
other corner cases of clobbering address discriminator operands.
Reuse `enum PtrauthCheckMode` instead of separate `ShouldCheck` and
`ShouldTrap` flags and drop its `Default` enumerator.
Commit: 0c5b2258f0b517c0822e5b2f8e6a8de311d6db9d
https://github.com/llvm/llvm-project/commit/0c5b2258f0b517c0822e5b2f8e6a8de311d6db9d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/IndVarSimplify/drop-exact.ll
M llvm/test/Transforms/IndVarSimplify/pr66066.ll
M llvm/test/Transforms/IndVarSimplify/strengthen-overflow.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
Log Message:
-----------
[SCEV] Infer no-wrap flags for shl by a constant. (#208434)
Treat `shl %a, C` as `mul %a, 1 << C` in
getStrengthenedNoWrapFlagsFromBinOp
if possible.
Only transfer NSW from shl to mul, if the shift amount is < Bitwidth -
1, otherwise the result would be more poisonous.
Alive2 proofs: https://alive2.llvm.org/ce/z/iBPpkv
Compile-time impact in noise:
https://llvm-compile-time-tracker.com/compare.php?from=a037729976f91dc11b41a76834dfca9d8812c4fe&to=2050d622aed5606774f0902b352bbb2142e654e1&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/208434
Commit: d199b284c7d3f98bb7afbbca9e79e078a1da55fe
https://github.com/llvm/llvm-project/commit/d199b284c7d3f98bb7afbbca9e79e078a1da55fe
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M orc-rt/docs/Design.md
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Drop callManagedCodeAsync; tokens guard execution (#210508)
callManagedCodeSync is renamed to callManagedCode, and
callManagedCodeAsync is removed.
callManagedCodeAsync held a ManagedCodeTaskGroup token from the initial
call until the async continuation ran -- across the gap in which the
call is suspended and no managed code is executing. A token is meant to
guard managed code that is executing on a stack, so holding one across
that gap guards nothing while blocking shutdown.
callManagedCode holds a token only for the synchronous call to the
wrapped function, including anything the function runs inline on the
same thread before returning. An async function is called the same way,
with its continuation passed as an ordinary argument. Work deferred past
the function's return -- stashed, or handed to another thread -- runs on
a stack the token no longer guards; whoever later runs it is responsible
for ensuring a token covers it, acquiring one and aborting if the
acquire is denied.
See the new "Managed code execution and shutdown" section in
docs/Design.md for the full model (what a token guards, nested entries,
context-free acquire, and the abortability obligation).
Commit: 7b446294e098c7c02bbc998da1b4a438f7270879
https://github.com/llvm/llvm-project/commit/7b446294e098c7c02bbc998da1b4a438f7270879
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
M llvm/unittests/Support/MathExtrasTest.cpp
Log Message:
-----------
[Support] Add constexpr versions of Add/Sub/MulOverflow (#210404)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 36c812f77142aa77b99b4e4d059ccba591a944c0
https://github.com/llvm/llvm-project/commit/36c812f77142aa77b99b4e4d059ccba591a944c0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Sequence.h
M llvm/unittests/ADT/SequenceTest.cpp
Log Message:
-----------
[ADT] Make enum iterators constexpr (#210405)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: fdf1adc8910ce4083d4c18205f665ef3c30cc851
https://github.com/llvm/llvm-project/commit/fdf1adc8910ce4083d4c18205f665ef3c30cc851
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
Log Message:
-----------
[orc-rt] Add comment for Session::HandlerTag type. NFC. (#210510)
Commit: af0c933eda31b6beb436026a22121ec637f3cb53
https://github.com/llvm/llvm-project/commit/af0c933eda31b6beb436026a22121ec637f3cb53
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CodeGen/TargetInfo.cpp
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Function.h
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/is_fpclass.ll
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-fmuladd.ll
M llvm/test/Transforms/EarlyCSE/replace-calls-def-attrs.ll
M llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fdim.ll
M llvm/test/Transforms/InstSimplify/disable_folding.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad.ll
M llvm/unittests/IR/VerifierTest.cpp
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[IR] Make semantics of strictfp consistent (#209465)
Although the section on constrainedfp in the LangRef clearly states "All
function definitions that use constrained floating point intrinsics must
have the strictfp attribute", indicating that a function with strictfp
calls must be marked with strictfp, the general description of strictfp
does not specify this. Refine its semantics and make it so, eliminating
the inconsistency.
Commit: 94b08b5de90dc21453a1dcde10cc1cd44ba93f7c
https://github.com/llvm/llvm-project/commit/94b08b5de90dc21453a1dcde10cc1cd44ba93f7c
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Support] Improve the logic for re-raising signals (#177864)
On most systems, checking `si_pid` is not actually valid unless
`si_code` equals one of the relevant signal codes (`SI_USER`,
`SI_QUEUE`, and on some OSs, `SI_LWP`), or the signal is `SIGCHLD`. So
on e.g. NetBSD, we would misinterpret the `SIGSEGV` fault address as the
sending PID and incorrectly conclude that the signal came from a
different process.
But as far as I can tell, there's not even a valid reason for us to be
checking `si_pid != getpid()`, because the signal could very well have
been explicitly sent by another thread in the current process. So we
really just need to check `si_code` for the aforementioned signal codes.
Darwin is the exception because it just doesn't set `si_code` at all in
the case of the `SI_*` signal codes. So keep the old logic there, even
though it misses the corner case of signals sent by a thread in the
current process.
While here, I also changed the error check for Linux
`rt_tgsigqueueinfo()` as it was not at all clear to me how we would ever
see `EPERM` from sending a signal to the current thread. Besides, it's
sensible to go to the `raise()` path as a last resort regardless of how
`rt_tgsigqueueinfo()` failed (e.g. `ENOSYS` on an old kernel).
Commit: f6d9ec41d30b453c939bbaa1c73b876ce1389ee9
https://github.com/llvm/llvm-project/commit/f6d9ec41d30b453c939bbaa1c73b876ce1389ee9
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV] Add packed narrowing convert intrinsics (#210389)
Add RISC-V P-extension packed narrowing convert header APIs for `pncvt`
and `pncvth`.
The new APIs lower through generic IR: RV32 uses truncate / logical
shift plus truncate forms, while RV64 uses existing packed unzip shuffle
forms. This reuses the existing backend lowering and TableGen aliases
rather than adding intrinsic-specific lowering.
Tests cover Clang IR generation and cross-project header assembly checks
for RV32/RV64 spec-listed mnemonics.
Commit: be68a8829d6d6a2186f962b37d83984961cedeb1
https://github.com/llvm/llvm-project/commit/be68a8829d6d6a2186f962b37d83984961cedeb1
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Sequence.h
Log Message:
-----------
[ADT] Fix non-assertion build after 36c812f771 (#210511)
E.g. https://lab.llvm.org/buildbot/#/builders/228/builds/5253
Commit: 53096b7a2d268ab92617436915bc6f9f3cf8d82e
https://github.com/llvm/llvm-project/commit/53096b7a2d268ab92617436915bc6f9f3cf8d82e
Author: AntonyCJ30 <cj6186609 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/sub.ll
Log Message:
-----------
[X86][APX] Optimize usub.sat(X,1) to cmp+adc with NDD (#208475)
When NDD is available, usub.sat(X, 1) is lowered from xor+sub+cmov (3
insns) to cmp+adc (2 insns).
All X86 tests pass.
Fixes #207888
Co-authored-by: AntonyCJ30 <cj6186609 at gmail@gmail.com>
Commit: c739ce632b1489dcdbaad72df64a9cec9a8ed359
https://github.com/llvm/llvm-project/commit/c739ce632b1489dcdbaad72df64a9cec9a8ed359
Author: Taimuraz Kaitmazov <atassikay38 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
A llvm/test/TableGen/subreg-index-overflow-allowed.td
A llvm/test/TableGen/subreg-index-overflow.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
Log Message:
-----------
[TableGen] Diagnose sub-register indices that overflow their register (#206346)
Commit: 0b5073a3cd15b942860eeb2ce18a7958bbcf9169
https://github.com/llvm/llvm-project/commit/0b5073a3cd15b942860eeb2ce18a7958bbcf9169
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_RELAX_TLS_* RelExprs (#210517)
As of 46d29d43ba8e ("[ELF] Remove unused handleTlsRelocation (#184951)")
these are never generated.
Commit: 2144ee4e19c4cf4501daed8d71aec68af1b9a8a6
https://github.com/llvm/llvm-project/commit/2144ee4e19c4cf4501daed8d71aec68af1b9a8a6
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_TLSDESC_CALL RelExpr (#210518)
As of 4ea72c1e8cbd ("[ELF] Add target-specific relocation scanning for
RISC-V (#181332)") this is never generated, and as of 46d29d43ba8e
("[ELF] Remove unused handleTlsRelocation (#184951)") this is not even
handled anywhere.
Commit: f9b7acbe7d5b6dbd1769a8d8c9cfb6de23abe48c
https://github.com/llvm/llvm-project/commit/f9b7acbe7d5b6dbd1769a8d8c9cfb6de23abe48c
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_TLS*_HINT RelExprs (#210519)
As of 5e87f8147d68 ("[ELF] Add target-specific relocation scanning for
PPC32 (#181517)") these are never generated, and as of 46d29d43ba8e
("[ELF] Remove unused handleTlsRelocation (#184951)") these are not even
handled anywhere.
Commit: acd3fcfdd6d065f914eadbe2036e703c056b4ccc
https://github.com/llvm/llvm-project/commit/acd3fcfdd6d065f914eadbe2036e703c056b4ccc
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGen/call-graph-section-callback.cpp
M clang/test/CodeGen/call-graph-section-internal.cpp
M clang/test/CodeGen/call-graph-section-templates.cpp
M clang/test/CodeGen/call-graph-section-virtual-methods.cpp
M clang/test/CodeGen/call-graph-section.c
M clang/test/CodeGen/call-graph-section.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/ARM/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/ARM/call-graph-section-assembly.ll
M llvm/test/CodeGen/ARM/call-graph-section-tailcall.ll
M llvm/test/CodeGen/ARM/call-graph-section.ll
M llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/X86/call-graph-section-assembly.ll
M llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
M llvm/test/CodeGen/X86/call-graph-section.ll
M llvm/test/Verifier/callee-type-metadata.ll
Log Message:
-----------
[clang] Emit call graph type metadata for internal linkage symbols (#210194)
Commit: 4812a67a45710531f9ac3bf2a84a1e2b278971a4
https://github.com/llvm/llvm-project/commit/4812a67a45710531f9ac3bf2a84a1e2b278971a4
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN frexp_mant builtins (#198121)
Adds codegen for the following AMDGCN frexp mantissa builtins:
- __builtin_amdgcn_frexp_mant (double)
- __builtin_amdgcn_frexp_mantf (float)
- __builtin_amdgcn_frexp_manth (half)
These are lowered to the corresponding `llvm.amdgcn.frexp.mant`
intrinsic.
Commit: 6d70017b17f967756825107c91f24769046826b9
https://github.com/llvm/llvm-project/commit/6d70017b17f967756825107c91f24769046826b9
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .mailmap
Log Message:
-----------
mailmap: Add entries for Peter Collingbourne. (#210526)
I am no longer at Google.
Commit: d89537dd93f6fba07864e3583e11996c91a794b8
https://github.com/llvm/llvm-project/commit/d89537dd93f6fba07864e3583e11996c91a794b8
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
Log Message:
-----------
[DirectX] Fix `--dx-embed-debug` flag dependency (#210513)
This patch moves the definition of `cl::opt<std::string> PdbDebugPath`
from `DXContainerGlobals.cpp` to `DXILWriter/DXILWriterPass.cpp`,
reversing the dependency.
Fixes the layering violation in #204166.
Commit: 220e8277d3ad300c094447d214f0a5a122435196
https://github.com/llvm/llvm-project/commit/220e8277d3ad300c094447d214f0a5a122435196
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/unittests/IR/PassManagerTest.cpp
Log Message:
-----------
[IR][NFC] Avoid unneccessary move of analysis results (#210540)
While benchmarking CycleAnalysis, I noticed that each analysis result is
constructed on the stack first and then moved to its final place on the
heap. This is unnecessary -- directly construct the analysis result in
its final place. Consequently, analysis results can be immovable.
Commit: bcb4e7d061ac22bce4ac65f5158a4746fb0edc0f
https://github.com/llvm/llvm-project/commit/bcb4e7d061ac22bce4ac65f5158a4746fb0edc0f
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
Log Message:
-----------
[InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (#202482)
SimplifyDemandedUseFPClass folded 0/x to a signed zero, guarded only on
the divisor being non-NaN. But when x==0, the result is is NaN, not 0!
Require the divisor to be never (logical) zero, unless a NaN result
isn't demanded.
Commit: f5c4f390a04abf63f9f4c98980df67e22544ddb7
https://github.com/llvm/llvm-project/commit/f5c4f390a04abf63f9f4c98980df67e22544ddb7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyLateEHPreparePass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/209956
Commit: 0e3d17a080646825df5cdff6997c633b6292b6ff
https://github.com/llvm/llvm-project/commit/0e3d17a080646825df5cdff6997c633b6292b6ff
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyReplacePhysRegsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/209957
Commit: 84b9da663e9c505304eac37621a56fd8e1ef7c12
https://github.com/llvm/llvm-project/commit/84b9da663e9c505304eac37621a56fd8e1ef7c12
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] Install `llvm-tools` in libc container (#210414)
Currently, the libc container doesn't contain `llvm-tools`. we need to
use them in #200196 because we are not able to use `llvm-lit` without
building clang from source
Commit: 14bf60dacab081559bedca01ab426f52793b38cb
https://github.com/llvm/llvm-project/commit/14bf60dacab081559bedca01ab426f52793b38cb
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
Log Message:
-----------
[CycleInfo] Deduplicate getExitBlocks with a set. NFC (#210557)
Fix the O(exit_blocks^2) hazard.
Commit: 617e4f54e503b54b08445a086d95a80aa72a58d0
https://github.com/llvm/llvm-project/commit/617e4f54e503b54b08445a086d95a80aa72a58d0
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
[Clang][Interpreter] Don't pass -fPIC on MSVC (#210507)
Commit: f05a649741f248e3809a6d0e7b5a8daf7bed74a8
https://github.com/llvm/llvm-project/commit/f05a649741f248e3809a6d0e7b5a8daf7bed74a8
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/lgammaf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/lgammaf16.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/lgammaf16.cpp
A libc/src/math/lgammaf16.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/lgammaf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/lgammaf16_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Implement half precision lgamma function (#192834)
The implementation uses three distinct paths based on $|x|$:
- Small ($|x| < 0.66$): Fits a degree-12 Chebyshev for $h(t) =
\frac{\text{lgamma}(t) + \log(t)}{t}$, recovering $\text{lgamma}(t) = t
\cdot h - \log(t)$.
- Medium ($|x| \in [0.66, 3.37]$): Fits a degree-20 Chebyshev for $g(t)
= \frac{\text{lgamma}(t)}{(t-1)(t-2)}$
- Stirling ($|x| > 3.37$): Uses $(x-0.5) \cdot \log(x) - x +
\frac{\log(2\pi)}{2}$ plus 1/2/4/8-term Bernoulli corrections by
sub-range.
Special cases: NaN, +/-Inf -> +Inf, +/-0 pole, negative integer pole,
lgamma(1) = lgamma(2) = 0 exactly, overflow for large positive x.
Exhaustive tests pass in all 4 rounding modes.
-- CORE-MATH reciprocal throughput --
Ntrial = 20 ; Min = 391.348 + 77.447 clc/call; Median-Min = 68.093
clc/call; Max = 540.055 clc/call;
-- System LIBC reciprocal throughput --
Ntrial = 20 ; Min = 377.829 + 81.686 clc/call; Median-Min = 64.851
clc/call; Max = 532.888 clc/call;
Commit: 81ed4d01aa5858ab3f3ffe4e5cc4f9111a8afc46
https://github.com/llvm/llvm-project/commit/81ed4d01aa5858ab3f3ffe4e5cc4f9111a8afc46
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
Log Message:
-----------
[UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (#210564)
Commit: 8043ceb7591cc1e55e699cbf8f23fffe1e90381f
https://github.com/llvm/llvm-project/commit/8043ceb7591cc1e55e699cbf8f23fffe1e90381f
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
Log Message:
-----------
[libc] Omit -fpie from the full build (#208343)
We shouldn't unconditionally set -fpie, users should be able to control
this with CMAKE_POSITION_INDEPENDENT_CODE.
Commit: 446a84a7c66eda9b945a000ccab04948f240eaaa
https://github.com/llvm/llvm-project/commit/446a84a7c66eda9b945a000ccab04948f240eaaa
Author: Brad Smith <brad at comstyle.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M openmp/runtime/src/kmp_i18n.cpp
Log Message:
-----------
[OpenMP] Simplify GNU strerror_r check for Android (#148990)
Android 6 is the baseline so simplify the Android check.
Commit: 790882669323c7255cb761755bb2d37d3b344452
https://github.com/llvm/llvm-project/commit/790882669323c7255cb761755bb2d37d3b344452
Author: Shikhar Jain <shikharj at qti.qualcomm.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M polly/include/polly/DependenceInfo.h
M polly/lib/Analysis/DependenceInfo.cpp
M polly/lib/CodeGen/IslAst.cpp
A polly/test/IstAstInfo/AstGenComputeOut.ll
Log Message:
-----------
[Polly] Guard ISL ast gen compute out (#201859)
Bounds the maximum ISL operations allowed for ISL AST Generation.
Fixes: https://github.com/llvm/llvm-project/issues/201801
Commit: f988efbef5854243f9f518e9334dfee08ff2e1de
https://github.com/llvm/llvm-project/commit/f988efbef5854243f9f518e9334dfee08ff2e1de
Author: michaelselehov <michael.selehov at amd.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
M llvm/test/Transforms/PhaseOrdering/AMDGPU/infer-address-space.ll
Log Message:
-----------
[AMDGPU] Run early-cse<memssa> at the end of the full-LTO pipeline (#208461)
The regular (non-LTO) and ThinLTO function simplification pipelines run
an
EarlyCSE-with-MemorySSA pass near the start of the function pass
sequence, but
the full-LTO postlink pipeline does not. Without it, a redundant
load/store
round-trip can survive all the way to codegen; the later GVN/DSE in the
LTO
pipeline do not catch this particular pattern.
Rather than touch the target-independent LTO pipeline, register
early-cse<memssa> through the AMDGPU FullLinkTimeOptimizationLast
extension
point, so it runs at the end of the full-LTO middle-end (before codegen)
only
for AMDGPU.
Assisted-by: Claude Opus
Commit: 4a1c00420f7e1660d509ac32ca3d02a4aef20ab2
https://github.com/llvm/llvm-project/commit/4a1c00420f7e1660d509ac32ca3d02a4aef20ab2
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCSchedule.h
M llvm/test/TableGen/CompressWriteLatencyEntry.td
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[MC] Pack scheduling class entry counts (#202649)
Generated scheduling classes currently use at most 20 write-resource
entries and 35 write-latency entries, while read-advance counts reach
504. Narrow the two write counts to `uint8_t`, order the three table
indices before the three counts, and emit target-specific compile-time
bounds assertions in generated subtarget source.
This reduces `sizeof(MCSchedClassDesc)` from 14 to 12 bytes in release
builds and from 20 to 16 bytes with debug fields. Fully stripped arm64
`llvm-mca` decreases by 544,896 bytes (1.49%), and the stripped
all-tools multicall binary decreases by 528,376 bytes (0.368%).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: ee62806354aabac85ef8c6605bdc7829d997682a
https://github.com/llvm/llvm-project/commit/ee62806354aabac85ef8c6605bdc7829d997682a
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/docs/OpenMPSupport.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/dims_modifier_ast_print.cpp
A clang/test/OpenMP/dims_modifier_messages.cpp
M clang/test/OpenMP/ompx_bare_messages.c
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[Clang][OpenMP] Add parsing/sema for dims modifier in num_teams and thread_limit (#206412)
Add parsing and sema support for `dims` modifier (OpenMP 6.1) in `num_teams` and
`thread_limit` clauses. Example:
```cpp
constexpr int N = 2;
#pragma omp teams num_teams(dims(3): x, y, z) thread_limit(dims(N): a, b)
{ ... }
```
Commit: 8042e61d6ae99347e8cab040b324b33cabfb1d4a
https://github.com/llvm/llvm-project/commit/8042e61d6ae99347e8cab040b324b33cabfb1d4a
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Fold trunc nuw/nsw (shr exact %x, %y) to i1 -> icmp ne %x, 0 (#210499)
Proof: https://alive2.llvm.org/ce/z/de6gru
Commit: 5cae63bd0d31118a15481fc7e5b063a73492d77d
https://github.com/llvm/llvm-project/commit/5cae63bd0d31118a15481fc7e5b063a73492d77d
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M polly/test/IstAstInfo/AstGenComputeOut.ll
Log Message:
-----------
[Polly][test] Add missing REQUIRES line (#210578)
The test was added by #201859. It's test uses --debug-only which
requires an LLVM_ENABLE_ASSERTIONS-build
Commit: 1d55a816c6dddfaacfd39f3235519a2389b56423
https://github.com/llvm/llvm-project/commit/1d55a816c6dddfaacfd39f3235519a2389b56423
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
Log Message:
-----------
[X86] Support apxf in attribute target (#184078)
As in title. This adds support for using apxf in attribute target.
Individual features are not supported for FMV but are supported for
enabling a feature for the function
Patch done with usage of Claude Code.
Commit: 5e1873abad44f622c7a18304b1552c233d47bd16
https://github.com/llvm/llvm-project/commit/5e1873abad44f622c7a18304b1552c233d47bd16
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/unittests/Frontend/OpenMPDirectiveNameParserTest.cpp
Log Message:
-----------
[OpenMP] Add constexpr enum ranges for all clauses and all directives (#210406)
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Commit: f25b3f62cee27d11d1491bdb10dfa955213b2064
https://github.com/llvm/llvm-project/commit/f25b3f62cee27d11d1491bdb10dfa955213b2064
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
A llvm/test/Transforms/LoopVectorize/AArch64/non-affine-monotonic-bounds.ll
A llvm/test/Transforms/LoopVectorize/non-affine-monotonic-bounds.ll
Log Message:
-----------
[LAA,LV] Add tests for non-affine monotonic pointer bounds (NFC). (#210544)
Add test cases with non-affine monotonic pointer bounds, like for
example when using std::bitset.
Initial sets of tests for
https://github.com/llvm/llvm-project/issues/207882.
Commit: cd99637821097c239b665793243d8e6a332fc719
https://github.com/llvm/llvm-project/commit/cd99637821097c239b665793243d8e6a332fc719
Author: Vito Secona <77039267+secona at users.noreply.github.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation-simplification.mlir
Log Message:
-----------
[mlir][bufferization] Fix stale BufferOriginAnalysis in BufferDeallocationSimplification (#210105)
Fixes #205228
This change fixes a use-after-free bug in the
BufferDeallocationSimplification pipeline caused by the greedy pattern
rewriter deleting operation tracked by the BufferOriginAnalysis.
BufferViewFlowAnalysis (internally used by BufferOriginAnalysis) creates
the dependencies map once during initialization. In this specific case,
the folder removed the `memref.cast` ops making later uses a
use-after-free bug.
Below is the snippet of running the pass using
`-debug-only=greedy-rewriter`. It erases a `memref.cast` and crashes in
RemoveDeallocMemrefsContainedInRetained.
```
...
[greedy-rewriter:1] //===-------------------------------------------===//
[greedy-rewriter:1] Processing operation : 'memref.cast'(0x654d43d18670) {
[greedy-rewriter:1] %4 = "memref.cast"(%3) : (memref<?x?xf32, 1>) -> memref<4x4xf32, 1>
[greedy-rewriter:1]
[greedy-rewriter:1] } -> success : operation was folded
[greedy-rewriter:1] //===-------------------------------------------===//
[greedy-rewriter:1] ** Replace : 'memref.cast'(0x654d43d18670)
[greedy-rewriter:1] ** Modified: 'scf.yield'(0x654d43c97bb0)
[greedy-rewriter:1] ** Erase : 'memref.cast'(0x654d43d18670)
...
[greedy-rewriter:1] Processing operation : 'bufferization.dealloc'(0x654d43cbd7d0) {
[greedy-rewriter:1] %5 = "bufferization.dealloc"(%4#0, %1, %3) <{operandSegmentSizes = array<i32: 1, 1, 1>}> : (memref<f32, 1>, i1, memref<4x4xf32, 1>) -> i1
[greedy-rewriter:1]
[greedy-rewriter:1]
[greedy-rewriter:1] * Pattern (anonymous namespace)::RemoveDeallocMemrefsContainedInRetained : 'bufferization.dealloc -> ()' {
```
The fix is to disable folding and split the canonicalization patterns to
run separately. This way, the patterns that rely on BufferOriginAnalysis
still work because folding was disabled and BufferOriginAnalysis never
invalidated. Then, the canonicalization patterns still benefit from
folding.
Commit: 4b4d4a61202bd960a7a72730d596e5ebe6ab71b1
https://github.com/llvm/llvm-project/commit/4b4d4a61202bd960a7a72730d596e5ebe6ab71b1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2.ll
Log Message:
-----------
[SLP][NFC]Add a test for potential masked div/rem ops, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210593
Commit: 5c7dc8e7d72e8f833e5fa4d4790e93ff76b51304
https://github.com/llvm/llvm-project/commit/5c7dc8e7d72e8f833e5fa4d4790e93ff76b51304
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M libcxx/test/libcxx/ranges/range.adaptors/range.enumerate/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Add missing test cases for `[[nodiscard]]` tests in `enumerate_view` (#209289)
Addresses missing `[[nodiscard]]` test cases for
`std::views::enumerate`.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: ab39c491430e1f327849708ababffa3458b8ff6f
https://github.com/llvm/llvm-project/commit/ab39c491430e1f327849708ababffa3458b8ff6f
Author: Feng Zou <feng.zou at intel.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-multipred.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-multipred.mir
Log Message:
-----------
[X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (#208184)
Extend optimizeCompareInstr to reuse EFLAGS produced in predecessor
blocks (including via NF variants) when a compare is redundant, covering
multi-predecessor, dominating, and cyclic CFGs. Share the NF-clobber
removal helper with FlagsCopyLowering, correctly handle swapped and
immediate-adjusted flag reuse, and simplify EFLAGS live-in marking.
Adds MIR tests exercising multi-predecessor reuse over cyclic and
dominating CFGs, including a multi-level idom walk.
Assisted-By: Claude Opus 4.8
Commit: 637506427c2062fdbbd52fe1ef6c701f799a4228
https://github.com/llvm/llvm-project/commit/637506427c2062fdbbd52fe1ef6c701f799a4228
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll
Log Message:
-----------
[SLP][NFC]Add a test with potential masked revec udiv, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210596
Commit: 9f6c84b8361133ecea5a43e34ab020384085a931
https://github.com/llvm/llvm-project/commit/9f6c84b8361133ecea5a43e34ab020384085a931
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] symlink `llvm-tools` in libc container (#210561)
Missed thing in #210414. We need to symlink the LLVM tools that are
under `/usr/lib/llvm-23/bin/` to avoid errors like this because the LLVM
tools have a `-23` suffix when they're installed inside the container
```
# RUN: at line 2
/usr/bin/clang-23 -gline-tables-only -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -DCOMPILER_RT_HAS_FLOAT16 -nobuiltininc -I/__w/llvm-project/llvm-project/compiler-rt/include -idirafter /usr/lib/llvm-23/lib/clang/23/include -resource-dir=/__w/llvm-project/llvm-project/build/compiler-rt -Wl,-rpath,/__w/llvm-project/llvm-project/build/compiler-rt/lib/linux -fno-builtin -I /__w/llvm-project/llvm-project/compiler-rt/lib/builtins -nodefaultlibs /__w/llvm-project/llvm-project/compiler-rt/test/builtins/Unit/aarch64/emupac.c -lm -Wl,--start-group /__w/llvm-project/llvm-project/build/compiler-rt/lib/linux/libclang_rt.builtins-aarch64.a -lc -Wl,--end-group -o /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp
# executed command: /usr/bin/clang-23 -gline-tables-only -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -DCOMPILER_RT_HAS_FLOAT16 -nobuiltininc -I/__w/llvm-project/llvm-project/compiler-rt/include -idirafter /usr/lib/llvm-23/lib/clang/23/include -resource-dir=/__w/llvm-project/llvm-project/build/compiler-rt -Wl,-rpath,/__w/llvm-project/llvm-project/build/compiler-rt/lib/linux -fno-builtin -I /__w/llvm-project/llvm-project/compiler-rt/lib/builtins -nodefaultlibs /__w/llvm-project/llvm-project/compiler-rt/test/builtins/Unit/aarch64/emupac.c -lm -Wl,--start-group /__w/llvm-project/llvm-project/build/compiler-rt/lib/linux/libclang_rt.builtins-aarch64.a -lc -Wl,--end-group -o /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp
# RUN: at line 3
/__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 1
# executed command: /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 1
# RUN: at line 4
/__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 2
# executed command: /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 2
# RUN: at line 5
not --crash /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 3
# executed command: not --crash /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 3
# .---command stderr------------
# | 'not': command not found
# `-----------------------------
```
Commit: dcf03fefd46ea1426475c948925c9501af2f5495
https://github.com/llvm/llvm-project/commit/dcf03fefd46ea1426475c948925c9501af2f5495
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Eytzinger.h
M llvm/unittests/ADT/EytzingerTest.cpp
Log Message:
-----------
[ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (#210478)
This patch adds iterator and const_iterator type aliases as well as
begin() and end() methods to EytzingerTableSpan and EytzingerTable.
I'm going to be using these as part of the SecNameTable in the
Eytzinger layout.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: 24942433bc8a71b8aa459f802a0962089bb4dd22
https://github.com/llvm/llvm-project/commit/24942433bc8a71b8aa459f802a0962089bb4dd22
Author: Mend Renovate <bot at renovateapp.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/premerge.yaml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/require-team-membership/action.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/subscriber.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
Log Message:
-----------
Update [Github] Update GHA Dependencies (#194274)
This PR contains the following updates:
| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
|
[EnricoMi/publish-unit-test-result-action](https://redirect.github.com/EnricoMi/publish-unit-test-result-action)
| action | minor | `v2.23.0` → `v2.24.0` | |
|
[actions/attest-build-provenance](https://redirect.github.com/actions/attest-build-provenance)
| action | patch | `v4.1.0` → `v4.1.1` | |
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | patch | `v6.0.2` → `v6.0.3` | |
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | patch | `v6.0.1` → `v6.0.3` | |
|
[actions/create-github-app-token](https://redirect.github.com/actions/create-github-app-token)
| action | minor | `v3.1.1` → `v3.2.0` | |
| [actions/labeler](https://redirect.github.com/actions/labeler) |
action | minor | `v6.0.1` → `v6.2.0` | |
| [actions/setup-node](https://redirect.github.com/actions/setup-node) |
action | minor | `v6.3.0` → `v6.5.0` | |
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | minor | `v6.2.0` → `v6.3.0` | |
|
[actions/upload-artifact](https://redirect.github.com/actions/upload-artifact)
| action | patch | `v7.0.0` → `v7.0.1` | |
| [aminya/setup-cpp](https://redirect.github.com/aminya/setup-cpp) |
action | patch | `v1.8.0` → `v1.8.1` | |
| [docker/login-action](https://redirect.github.com/docker/login-action)
| action | minor | `v4.1.0` → `v4.4.0` | |
| ghcr.io/llvm/amd64/ci-ubuntu-24.04-github-automation | container |
digest | `82b5304` → `f419363` | |
| ghcr.io/llvm/ci-ubuntu-24.04 | container | digest | `cc4fd65` →
`26c16c2` | |
| ghcr.io/llvm/ci-ubuntu-24.04-abi-tests | container | digest |
`cb3aea3` → `a948062` | |
| ghcr.io/llvm/ci-ubuntu-24.04-lint | container | digest | `91665a4` →
`416874e` | |
| ghcr.io/llvm/libc-ubuntu-24.04 | container | digest | `a902fb5` →
`b9c8ea7` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | minor | `v4.35.2` → `v4.37.0` | `v4.37.1` |
|
[hendrikmuhs/ccache-action](https://redirect.github.com/hendrikmuhs/ccache-action)
| action | patch | `v1.2.22` → `v1.2.23` | |
|
[zizmorcore/zizmor-action](https://redirect.github.com/zizmorcore/zizmor-action)
| action | minor | `v0.5.3` → `v0.6.0` | |
Commit: c45b4e4d00bed488d6ece5608560561732ae5b9e
https://github.com/llvm/llvm-project/commit/c45b4e4d00bed488d6ece5608560561732ae5b9e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Link static PIE executables against rcrt1.o (#210125)
We always selected crt1.o as the CRT start file, regardless of link
mode.
Select rcrt1.o - the self-relocating static-PIE start file when -static
and PIE are active
Commit: 32819927e0c02662a5c8aae252997748cdc94962
https://github.com/llvm/llvm-project/commit/32819927e0c02662a5c8aae252997748cdc94962
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Retire LVP::hasTailFolded (NFC). (#210598)
LVP::hasTailFolded incldued an assert that hasTailFOlded matches the
VPlan version. No divergences surfaced, so remove the assert as planned.
Commit: dae991a55eacb4f3c3382f3cba2897ceb43e1725
https://github.com/llvm/llvm-project/commit/dae991a55eacb4f3c3382f3cba2897ceb43e1725
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/test/Analysis/BasicAA/atomics.ll
Log Message:
-----------
[AA] Use the cmpxchg merged ordering in getModRefInfo (#210545)
When a cmpxchg's address is NoAlias with the queried location,
getModRefInfo still reports sync effects if the cmpxchg is stronger than
monotonic, since an ordered operation constrains code motion around
locations it never accesses.
But a cmpxchg op has two atomic orderings, and getModRefInfo looked
only at one of them.
Change it so we check the merged ordering, i.e. the stronger of the two.
Commit: ae023494fba615bb1c75292f93e4521cfe7068b5
https://github.com/llvm/llvm-project/commit/ae023494fba615bb1c75292f93e4521cfe7068b5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/splat-buildvector.ll
Log Message:
-----------
[SLP]Add umax/umin/smax/smin as main opcodes for copyables
Added umax/umin/smax/smin intrinsics in for copyables support.
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/209326
Commit: 6bcdcb39c57ea926d3082ec3ecae74bf59b4658e
https://github.com/llvm/llvm-project/commit/6bcdcb39c57ea926d3082ec3ecae74bf59b4658e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
Log Message:
-----------
[DWARFLinker] Make synthetic type names deterministic under threading (#209553)
Commit: 598f15297528855682dcf381575a9c14a7faabc3
https://github.com/llvm/llvm-project/commit/598f15297528855682dcf381575a9c14a7faabc3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
Log Message:
-----------
[ConstraintElim] Fix integer overflow when negating constraint (#210627)
Negating a coefficient (e.g. INT64_MIN) can overflow; skip adding the
inverted constraint if it wraps.
Fixes an UBSan failure for the added test.
Commit: 01683dbe7e2071e8cc3aa2874e623259079aa1ae
https://github.com/llvm/llvm-project/commit/01683dbe7e2071e8cc3aa2874e623259079aa1ae
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/QueueingRunner.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/QueueingRunnerTest.cpp
Log Message:
-----------
[orc-rt] Replace RunWrapperCall with generalized Dispatch (#210591)
RunWrapperCall dispatched wrapper-function calls, but the Session also
needs to dispatch continuations for results returned by the controller.
Replace it with a generalized Dispatch mechanism (DispatchFn) that is
handed an opaque Task for each unit of work, covering both.
QueueingRunner is correspondingly simplified: it no longer knows
anything about wrapper functions and just enqueues the Task it is given.
Tests and the noDispatch helper are updated to the new interface.
Commit: 16ffd27e3737c01cbabad6eed77b919dc977ad6c
https://github.com/llvm/llvm-project/commit/16ffd27e3737c01cbabad6eed77b919dc977ad6c
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
Log Message:
-----------
[libcxx][NFC] Address -Wmicrosoft-cast in MSVC's exception_ptr (#210570)
This was introduced as part of #94977. Rather than suppressing the
warning with `#pragma clang diagnostic ignored`, we use
`reinterpret_cast` to avoid the implicit conversion.
Commit: c6672a6fdf1469d818d0ac8aaa2c31a0f18e729a
https://github.com/llvm/llvm-project/commit/c6672a6fdf1469d818d0ac8aaa2c31a0f18e729a
Author: Benji Smith <6193112+Benjins at users.noreply.github.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/fsh.ll
Log Message:
-----------
[InstCombine] Fix invalid fshl -> lshr fold when shift is vector with constant zero lane (#210606)
For vectors, this is not valid if a subset of the lanes are constant
zero. Doing this fold introduces poison in those lanes. A similar fix
was done for fshr in 46957a138dea339799059ea5bf032e40042ff185 however
the same issue seems to apply to fshl
Fixes https://github.com/llvm/llvm-project/issues/210605
Commit: 5497f466e4fc634f91de043fc80a9cd8cc0f32a1
https://github.com/llvm/llvm-project/commit/5497f466e4fc634f91de043fc80a9cd8cc0f32a1
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-narrowing-zip.ll
Log Message:
-----------
[RISCV][P-ext] Support Packed Narrowing Zip (#210040)
Commit: 53c6ce165aef58e1885d574c1ec597d091c3c8fc
https://github.com/llvm/llvm-project/commit/53c6ce165aef58e1885d574c1ec597d091c3c8fc
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/include/__utility/cmp.h
Log Message:
-----------
[libc++][cmp][NFC] Fix: Empty namespaces should be avoided (#210624)
Context: Including `<__utility/cmp.h>` causes:
> cmp.h:25:1: error: Empty namespaces should be avoided. Move any checks
around the namespace instead.
[libcpp-avoid-empty-namespaces,-warnings-as-errors]
Commit: 8a119310dae2fd67497c8611fc3208d16a36a2c3
https://github.com/llvm/llvm-project/commit/8a119310dae2fd67497c8611fc3208d16a36a2c3
Author: Tony Varghese <tonypalampalliyil at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticIDs.h
Log Message:
-----------
[clang][NFC] Bump the maximum number of Frontend diagnostics (#210345)
The number of Frontend diagnostics in DiagnosticFrontendKinds.td is
close to the DIAG_SIZE_FRONTEND limit of 200 (195 in use), and in-flight
PRs adding frontend diagnostics (e.g. #187986) run into the static
assert in DiagnosticIDs.cpp. Increase the limit to 300, following the
precedent of #200948 which did the same for Sema diagnostics.
Co-authored-by: Tony Varghese <tony.varghese at ibm.com>
Commit: a64f7412551ae63a49dd8617f93ab89878288879
https://github.com/llvm/llvm-project/commit/a64f7412551ae63a49dd8617f93ab89878288879
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
Log Message:
-----------
[SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (#209965)
Commit: 9d2e7e6836beadbe63380f64c716df2c086ff2ea
https://github.com/llvm/llvm-project/commit/9d2e7e6836beadbe63380f64c716df2c086ff2ea
Author: Lukas <43409484+hertelukas at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/multiedge.ll
M llvm/test/Transforms/FixIrreducible/nested.ll
M llvm/test/Transforms/FixIrreducible/switch.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/FixIrreducible/unsupported-terminator.ll
M llvm/test/Transforms/UnifyLoopExits/basic.ll
M llvm/test/Transforms/UnifyLoopExits/integer_guards.ll
M llvm/test/Transforms/UnifyLoopExits/multiedge.ll
M llvm/test/Transforms/UnifyLoopExits/nested.ll
M llvm/test/Transforms/UnifyLoopExits/restore-ssa.ll
M llvm/test/Transforms/UnifyLoopExits/switch.ll
M llvm/test/Transforms/UnifyLoopExits/undef-phis.ll
Log Message:
-----------
[FixIrreducible][UnifyLoopExits] Support switch statements (#206567)
This builds on #149308, which implemented `callbr` support.
The same approach of splitting multi-branch edges entering irreducible
loops can be used for switches. It does not introduce any new switch
statements, but alleviates the requirement of having to run the
`LowerSwitch` pass first. This makes the pass usable for users other
than AMDGPU, which can handle switch statements (e.g., WebAssembly, see
[here](https://github.com/llvm/llvm-project/pull/181755#issuecomment-3936316307)).
I'm also implementing a flag into the `ControlFlowHub` to support
switches as well, for which I will open a separate PR. Currently the
`ControlFlowHub` creates a branch-sled, mimicking a `switch` (a series
of blocks consisting only of conditional branches, selectively entering
an irreducible loop at a certain point or continuing to the next
potential entry point). If the target can support switches, that should
be the clear goal here, as shown in the image below. This PR implements
the step from (a) to (b), whereas extending the `ControlFlowHub`
represents the step from (b) to (c). ((c) to (d) already exists through
`SwitchToLookup` and `SwitchToArithmetic`).
<img width="1055" height="432" alt="image"
src="https://github.com/user-attachments/assets/780b7894-1895-4137-8148-b2bbc7f73a8f"
/>
The test cases in `switch.ll` were adapted from the `callbr.ll` tests
using an LLM to ensure equivalent coverage. I've manually reviewed the
control flow and conditions for every case, and the final assertions
were generated using `update_test_checks.py`.
Commit: c34d2c30e86358bfe308558b5e0719e9f5305153
https://github.com/llvm/llvm-project/commit/c34d2c30e86358bfe308558b5e0719e9f5305153
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
Log Message:
-----------
[mlir] Fix mem2reg crash on scalable vector store/load with matching type (#209426)
Fixes #209065
`createInsertAndCast/createExtractAndCast` in `LLVMMemorySlot.cpp`
queried the bit size of the source/target types before checking whether
they were already identical. For scalable vector types (e.g.
`vector<[4]xi1>`), this size query implicitly converts a scalable
TypeSize to a scalar, which aborts. `mem2reg` hits this path for any
store or load whose value type exactly matches the slot's element type,
since `getStored/removeBlockingUses` run even when no cast is needed.
This fix adds an early return when the types are already equal, skipping
the size query, consistent with the existing short-circuit in
`areConversionCompatible/castSameSizedTypes`.
Commit: e2572b883f0b2bc7a7a3808e484039f9382aa898
https://github.com/llvm/llvm-project/commit/e2572b883f0b2bc7a7a3808e484039f9382aa898
Author: Ming-Yi Lai <ming-yi.lai at mediatek.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/test/ELF/riscv-feature-zicfilp-unlabeled.s
Log Message:
-----------
[LLD][RISCV][Zicfilp] Generate unlabeled landing pad-style PLT (#145461)
To support dynamic linking when Zicfilp is enabled, lpad insns are
inserted into PLTs. This patch generates the unlabeled landing pad-style
PLT, in which all the lpads have label `0`, when ZICFILP-unlabeled is
enabled:
--- PLT Header:
```
1: auipc t3, %pcrel_hi(.got.plt)
sub t1, t1, t2
l[w|d] t2, %pcrel_lo(1b)(t3)
addi t1, t1, -(hdr size + 16)
addi t0, t3, %pcrel_lo(1b)
srli t1, t1, log2(16/PTRSIZE)
l[w|d] t0, PTRSIZE(t0)
jr t2
```
--- PLT Entry:
```
lpad 0
1: auipc t2, %pcrel_hi(function at .got.plt)
l[w|d] t2, %pcrel_lo(1b)(t2)
jalr t1, t2
```
(The PLT format is specified in the psABI draft at
<https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/417>)
---------
Co-authored-by: Piyou Chen <piyou.chen at sifive.com>
Co-authored-by: Kito Cheng <npickito at gmail.com>
Commit: 21d537e48677c6c9f3fe679694bba7bcaece90ce
https://github.com/llvm/llvm-project/commit/21d537e48677c6c9f3fe679694bba7bcaece90ce
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
Log Message:
-----------
[LV][Test] Rename conflicting IR values to avoid FileCheck conflicts. nfc (#210293)
Commit: 99789ca18a7982a0b8d63e681d957590f67455c4
https://github.com/llvm/llvm-project/commit/99789ca18a7982a0b8d63e681d957590f67455c4
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/helpers.h
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/iterator/member_types.compile.pass.cpp
Log Message:
-----------
[libc++] Add tests for LWG3798 and mark it as Complete (#210640)
Commit: 9e2e9b33e14808541c0470b92ade34bee6608bf6
https://github.com/llvm/llvm-project/commit/9e2e9b33e14808541c0470b92ade34bee6608bf6
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcDeathTestExecutors.cpp
M libc/test/src/stdlib/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[libc] Port process utilities to hermetic mode and enable some tests (#209999)
This is achieved by calling internal libc functions in hermetic mode. In
the overlay mode I keep calling the system functions so that the tests
work even on systems which don't have these implemented.
I also needed to implement the delete operators as both the libc proper
and the test framework uses them nowadays.
This is sufficient to enable all stdlib tests in hermetic mode, except
for one, which actually exposes a bug in the implementation. I'll deal
with that in a separate patch.
Commit: ba9a115e3ba30699cafe7815d851f89f02f821ea
https://github.com/llvm/llvm-project/commit/ba9a115e3ba30699cafe7815d851f89f02f821ea
Author: Adam Scott <adamscott200322 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/vselect-masked-shift.ll
Log Message:
-----------
[AArch64] Fold vector shifts guarded against oversized amounts into USHL (#207628)
`select(icmp ult(amt, EltSize), shl(x, amt), 0)`, where EltSize is the
{8, 16, 32, 64} lane size, is the usual way to guard a variable vector
shift against shl poison. On AArch64 the guard is unnecessary because
USHL already returns zero once the shift amount reaches the lane size.
For v4i32:
Before:
```
movi v2.4s, #63
movi v3.4s, #32
and v1.16b, v1.16b, v2.16b
ushl v0.4s, v0.4s, v1.4s
cmhi v1.4s, v3.4s, v1.4s
and v0.16b, v1.16b, v0.16b
```
After:
```
movi v2.4s, #63
and v1.16b, v1.16b, v2.16b
ushl v0.4s, v0.4s, v1.4s
```
USHL reads each lane's shift amount as a signed value from its low byte
so amounts above 127 would be misread. The fold applies directly when
known bits can prove the amounts are at most 127 and otherwise the
amounts are clamped to EltSize with umin first, which is still one
instruction cheaper than the select.
NEON has no umin for 64-bit lanes so unbounded v2i64 amounts use the SVE
umin when available and otherwise keep the select.
lshr gets the same fold since it already lowers to ushl with a negated
amount.
This is the AArch64 counterpart of #86922, which added the same folds
for AVX2's variable shifts. This does the select(shift) half; the
shift(select) form will be a follow-up.
Closes #200698.
Commit: 92aded9ac802ed85971627bfa651697f960eefbf
https://github.com/llvm/llvm-project/commit/92aded9ac802ed85971627bfa651697f960eefbf
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
M flang/test/HLFIR/optional_dummy.f90
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/MIF/change_team2.f90
M flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-terminator.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
M flang/test/Lower/OpenMP/loop-compound.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/branching-directive.f90
A flang/test/Lower/do_loop_execute_region_wrap.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/fail_image.f90
A flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/ifconvert.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/while_loop.f90
Log Message:
-----------
[flang][PFT-to-MLIR] Wrap unstructured Fortran constructs in scf.execute_region (#208635)
Extend the PFT-to-MLIR (HLFIR/FIR) lowering so unstructured DO and IF
constructs are emitted inside scf.execute_region, hiding their
multi-block CFG behind a single op. OpenACC lowerings that reject
multi-block content (e.g. the "unstructured do loop in combined acc
construct" TODO in OpenACC.cpp) now see a structured op instead.
The main goal is to prevent propagating the "unstructured" property up
the evaluation tree just because one nested evaluation is unstructured;
which is the current behavior.
Flag: -mmlir --wrap-unstructured-constructs-in-execute-region (default
on).
An evaluation is wrappable iff all of the following hold:
* wrap flag on
* eval is parser::DoConstruct or parser::IfConstruct
* eval.isUnstructured
* branchesAreInternal(eval) -- every controlSuccessor in the subtree
targets a nested eval or the constructExit
* !hasIncomingBranch(eval) -- no outside eval branches into the body
(PFT's synthetic IfConstruct around `if(c) goto X` absorbs label targets
between the IF and X; the incoming-branch check excludes such wrappers
when an outer GOTO names one of those labels)
* does not contain a ReturnStmt -- its lowering creates the function's
final block in the current region, which would mis-parent func.return
* not an infinite DO and does not contain one (no LoopControl in any
nested DO): the wrap's yield is unreachable and the body has no
write-shaped side effects, so RegionDCE treats the wrap as trivially
dead and drops it. Excluding the whole enclosing construct keeps such
infinite loops visible in the parent CFG.
* not the body DO of an enclosing OpenACCLoopConstruct or
OpenACCCombinedConstruct -- nor one of the N collapsed iterator DOs
reached by walking down through `collapse(N)`. Such DOs are driven
directly into acc.loop by the OpenACC lowering, so wrapping them would
hide the iteration from the acc.loop op.
Diagnostics
-----------
Emit per-wrap and per-function diagnostics on stderr so the wrapping is
observable from a single compile invocation:
[wrap-unstructured] wrapped DO at <loc>
[wrap-unstructured] wrapped IF at <loc>
[wrap-unstructured] summary: N execute_region(s) wrapping unstructured
constructs at <loc>
The counter is reset per function and the summary is suppressed when no
wraps fire.
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
---------
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 751fca6c06e4d29b8d2a62c307afce8ba6a0a101
https://github.com/llvm/llvm-project/commit/751fca6c06e4d29b8d2a62c307afce8ba6a0a101
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/test/Driver/freebsd-mips-as.c
M clang/test/Driver/freebsd.c
Log Message:
-----------
[Driver][test] Unwrap freebsd-mips-as.c RUN lines (#210658)
Collapse 3-line RUN blocks to 2 lines and move -### immediately after
%clang, matching the prevailing style for new tests.
Commit: a4ca7f3a670c84196cad4c739114b316fed6d8f1
https://github.com/llvm/llvm-project/commit/a4ca7f3a670c84196cad4c739114b316fed6d8f1
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libc/hdr/CMakeLists.txt
Log Message:
-----------
[libc][cmake] Remove proxy header XXX_macros -> XXX.h deps (#210008)
In the full build mode, these headers do not include the main XXX.h
header, which makes sense, because they exist to allow us only to expose
a part of it. They do include it in the overlay mode, but in this case,
they are referring to the header from the libc being overlaid, which
exists outside of the build system.
Also fix float_macros by moving
libc.include.llvm-libc-macros.float_macros from DEPENDS to
FULL_BUILD_DEPENDS, as llvm-libc-macros/float-macros.h is only included
under LIBC_FULL_BUILD.
Commit: f214ce6b0a9a6af9b1d899895e29cbba68ee2726
https://github.com/llvm/llvm-project/commit/f214ce6b0a9a6af9b1d899895e29cbba68ee2726
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/arpa/inet/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add missing arpa/inet functions and tests (#210310)
Add bazel build targets for the remaining arpa/inet functions
(inet_addr, inet_aton, inet_ntoa, and inet_ntop) along with their unit
tests and supporting targets (__support_net_address, headers, and proxy
types).
Assisted by Gemini.
Commit: 72e0b55f9b1fd69030d7e9853a708bfd2fba36ec
https://github.com/llvm/llvm-project/commit/72e0b55f9b1fd69030d7e9853a708bfd2fba36ec
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ConstraintSystem.h
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/gep-arithmetic-signed-predicates.ll
Log Message:
-----------
[ConstraintSys] Solve sub-system with variables needed for query (#210432)
Update ConstraintSystem to only solve the sub-system containing all
variables relevant to a given query.
The sub-system contains the transitive closure of all variables in rows
involving the variables in the constraint to prove.
The iterative collection loop only needs very few iterations to
complete. The pruned system can significantly speed up Fourier–Motzkin
elimination and reduce the cost of copying the system.
This helps to notably decrease compile-time in cases when there are
larger numbers of variables & rows (especially during (Thin)LTO).
Highlights include
* stage1-ReleaseThinLTO: -0.16%
* stage1-ReleaseLTO-g: -0.19%
* stage1-aarch64-O3: -0.04%
https://llvm-compile-time-tracker.com/compare.php?from=1f2772f8e26beb909c2a559f1fb08697e3e06909&to=77fbe7926609da96a193254e44efd1d6f8a097de&stat=instructions%3Au
Note that we will now stop to simplify conditions in code we proved
dead/unreachable earlier; previously, unrelated constraints in the
system that form contradictions would allow proving any unrelated fact.
After pruning, unrelated facts will no longer contribute.
Commit: 4234ff65326237102157875f6ddf098355864178
https://github.com/llvm/llvm-project/commit/4234ff65326237102157875f6ddf098355864178
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/include/__functional/function.h
Log Message:
-----------
Reapply "[libc++][NFC] Inline std::function members into the class body" (#209555) (#210260)
This caused LLDB to fail, which has been fixed now.
This reverts commit 7618426138aae95561da676a1d1e10ee0392bf78.
Commit: 1ad0e6989597f550e1a5b53abd889366b65aa6c7
https://github.com/llvm/llvm-project/commit/1ad0e6989597f550e1a5b53abd889366b65aa6c7
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Serenity.cpp
M clang/test/Driver/freebsd.c
Log Message:
-----------
[Driver,FreeBSD] Fix -pie for -r and -no-pie links (#210663)
Port Gnu.cpp changes ae623d16d50c and cac82e26c642 to FreeBSD and
Serenity: -r should suppress -pie. -nopie, OpenBSD specific, should not
be used by other OSes.
Group the options selecting the link mode and place them after -m, as
gnutools::Linker does, so that -r suppresses -export-dynamic and
--hash-style as well, and -no-pie overrides the -fsanitize PIE default.
Drop --enable-new-dtags: default in modern linkers.
Change -Bstatic to -static to follow Gnu.cpp (identical in lld and older
GNU ld).
Commit: 37a2803740cc9df3d605431b2410c9d9c0bc5731
https://github.com/llvm/llvm-project/commit/37a2803740cc9df3d605431b2410c9d9c0bc5731
Author: Kamlesh Kumar <kamleshbhalui at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/scalable_masked_interleaved_stores.ll
M llvm/test/CodeGen/AArch64/sve-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-ldst-zext.ll
A llvm/test/CodeGen/AArch64/vector-deinterleave-load.ll
A llvm/test/CodeGen/AArch64/vector-interleave-store.ll
Log Message:
-----------
[AArch64] Add combine for interleave deinterleave (#208414)
These combines now can emit ldN/stN without interleaved access pass.
Commit: 6fb8d5fd507d976cb8072a7aa245c225c25ee08a
https://github.com/llvm/llvm-project/commit/6fb8d5fd507d976cb8072a7aa245c225c25ee08a
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/source/Plugins/TraceExporter/docs/htr.md
Log Message:
-----------
[lldb][docs] Remove image links from trace doc (#210664)
The document was first added in https://reviews.llvm.org/D105741 but
that did not include the images (they were not in the RFC or discussions
either).
Commit: 03b5c5285eaf0acdc1dc30c5be6e0a7cefeab16f
https://github.com/llvm/llvm-project/commit/03b5c5285eaf0acdc1dc30c5be6e0a7cefeab16f
Author: Nathan Gauër <brioche at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/InitializePasses.h
A llvm/include/llvm/Transforms/Scalar/LogicalSROA.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/CMakeLists.txt
A llvm/lib/Transforms/Scalar/LogicalSROA.cpp
A llvm/test/Transforms/LSROA/array.ll
A llvm/test/Transforms/LSROA/basictest.ll
A llvm/test/Transforms/LSROA/escaping.ll
A llvm/test/Transforms/LSROA/nesting.ll
A llvm/test/Transforms/LSROA/normal-gep.ll
A llvm/test/Transforms/LSROA/phi.ll
A llvm/test/Transforms/LSROA/select.ll
Log Message:
-----------
[LSROA] Add logical SROA pass (#192058)
This commit adds a logical-pointer compatible SROA pass. As-is, the pass
does not optimizes nested structs, arrays, or usages of structured
alloca with non-structured GEP instructions.
Adding support for both is not complex, but increase the size of the PR,
hence we can start with this.
Next step will be to allow mem2reg to apply on logical alloca/ptr, and
to add support for nesting/arrays.
---------
Co-authored-by: Nikita Popov <npopov at redhat.com>
Commit: b8300a76659d65fd9738de1c1e4bf5b71e9ef72b
https://github.com/llvm/llvm-project/commit/b8300a76659d65fd9738de1c1e4bf5b71e9ef72b
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN] Remove the "private" `llvm::gvn` namespace (NFC) (#210323)
Move `AvailableValue` and `AvailableValueInBlock` into GVNPass, similar
to other helper types.
Retain `llvm::gvn::GVNLegacyPass` as just `llvm::GVNLegacyPass` -
"legacy" is already a sufficent hint and it is not going to become more
"private" by stacking "gvn" prefixes to the name.
Ideally, `GVNLegacyPass` should be defined in an anonymous namespace,
but that is not possible because it is declared as a friend of GVNPass.
Commit: b9b454166eaa92d2e6e129f6c21ad59639d8364e
https://github.com/llvm/llvm-project/commit/b9b454166eaa92d2e6e129f6c21ad59639d8364e
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (#210522)
The previous implementation only matches
`shuffle(extract_subvector(src), extract_subvector(src), mask)`.
This patch generalizes it to `shuffle(a, b, mask)`, so we can now lower
it to `PNSRL(concat(a,b), element_bits)` if it is a deinterleave
shuffle. And we use `foldConcatVector` to handle the original pattern
with `extract_subvector`.
Commit: 023361f8ef6aa47d10cd839515c58322890367c3
https://github.com/llvm/llvm-project/commit/023361f8ef6aa47d10cd839515c58322890367c3
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
Log Message:
-----------
[lldb][AArch64][Linux][NFC] Move RegisterSetType enum into header (#207145)
I will be using this later to replace all the register specific
functions this class has (WriteSVE/ReadSVE and so on) with single
functions that use RegisterSetType to decide what to do.
While I'm here, I've made some sizeof and casts use RegisterSetType in
case the underlying type changes later.
Commit: 975c8f5a7b25f84a257ddfaf9605c62147a0913d
https://github.com/llvm/llvm-project/commit/975c8f5a7b25f84a257ddfaf9605c62147a0913d
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/ModuleSpec.h
M lldb/source/API/SBAddressRangeList.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointLocationList.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Breakpoint/Watchpoint.cpp
M lldb/source/Breakpoint/WatchpointList.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandler.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/SearchFilter.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormattersHelpers.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/DataFormatters/TypeCategory.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Utility/Event.cpp
M lldb/source/Utility/ProcessInfo.cpp
M lldb/source/Utility/StructuredData.cpp
M lldb/source/ValueObject/ValueObject.cpp
Log Message:
-----------
[lldb][NFC] Remove various Stream::Printf calls with constants (#210294)
`Stream::Printf` needs to call various other (variadic) functions, needs
to parse the input string and potentially handle too-long format
outputs. Calling in with a constant string is wasting a lot of
instruction on doing nothing.
assisted-by: claude
Commit: 1c1c0657f990b92d23067cb7367772f4c91ea32b
https://github.com/llvm/llvm-project/commit/1c1c0657f990b92d23067cb7367772f4c91ea32b
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/lshr.ll
Log Message:
-----------
[ConstraintElim] LSHR x, n <= x when n< bitwidth (#209583)
A logical right shift never increases an unsigned value:
for %r = lshr %x, %n, add the fact %r u<= %x when LSHR is not poison.
This extends the existing udiv/urem fact modeling to lshr.
https://alive2.llvm.org/ce/z/RUTMwe proof shown with constant value <
bit size
Commit: ead8fd8e29fbf3774b7a08bf7b991c2ada30112b
https://github.com/llvm/llvm-project/commit/ead8fd8e29fbf3774b7a08bf7b991c2ada30112b
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/include/__ranges/lazy_split_view.h
Log Message:
-----------
[libc++][ranges][NFC] Format `lazy_split_view` (#210644)
Pre-requisite for: https://github.com/llvm/llvm-project/pull/193891
Commit: eec2f0916d44c33beac52f4396c7a9c98b0c9cf6
https://github.com/llvm/llvm-project/commit/eec2f0916d44c33beac52f4396c7a9c98b0c9cf6
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/include/__configuration/availability.h
Log Message:
-----------
[libc++][NFC] Removed duplicated `_LIBCPP_INTRODUCED_IN_LLVM_23` macros (#210602)
Removed the redundant macros, which apparently were added by two
different patches.
Commit: 39a2c6a695f9d045b05fd5798a7cb99f3c7425a7
https://github.com/llvm/llvm-project/commit/39a2c6a695f9d045b05fd5798a7cb99f3c7425a7
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating.bitint.pass.cpp
Log Message:
-----------
[libc++][test][NFC] Removed unsupported compilers from tests (#210413)
Commit: 9cb6db4e3814fba503389aa0af16960847295fd2
https://github.com/llvm/llvm-project/commit/9cb6db4e3814fba503389aa0af16960847295fd2
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
Revert "[GVN] Remove the "private" `llvm::gvn` namespace (NFC)" (#210666)
Reverts llvm/llvm-project#210323
FAILED: lib/Transforms/Scalar/CMakeFiles/LLVMScalarOpts.dir/GVN.cpp.o
/var/llvm-compile-time-tracker/llvm-project/llvm/lib/Transforms/Scalar/GVN.cpp:4001:27:
error: qualified name does not name a class before ‘:’ token
4001 | class llvm::GVNLegacyPass : public FunctionPass {
Commit: ded79d9ddea47eb3a42da740353c16d21e890354
https://github.com/llvm/llvm-project/commit/ded79d9ddea47eb3a42da740353c16d21e890354
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
A llvm/test/CodeGen/SPIRV/constant/fp128-unsupported.ll
Log Message:
-----------
[SPIR-V] Reject fp128 and ppc_fp128 types with a diagnostic (#208397)
Introduced as a part of discussion in
https://github.com/llvm/llvm-project/pull/208219
Commit: 4caba63c698121203eea9280a392159dc6328e68
https://github.com/llvm/llvm-project/commit/4caba63c698121203eea9280a392159dc6328e68
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/test/API/commands/gui/spawn-threads/TestGuiSpawnThreads.py
Log Message:
-----------
[lldb][test] Double the timeout for TestGuiSpawnThreads.py (#210043)
If the host machine is overloaded, spawning threads may be delayed due
to lack of resources. I'm pretty sure this is the cause of failures in
GitHub CI reported in
https://github.com/llvm/llvm-project/issues/209874.
For what the test is doing, we unfortunately cannot get around needing
to wait on the test program.
We could perhaps come up with a lit mode that runs some tests in serial,
but this is a larger project than I want to get into now.
For now, let's try doubling the timeout. This test is unlikely to fail
for real, so if it's taking a long time, it'll be due to system
resources. In 99% of cases, it'll pass in a few seconds still.
Commit: 35c8e920cdd5b53dccfd669ebd92f3e06f534aae
https://github.com/llvm/llvm-project/commit/35c8e920cdd5b53dccfd669ebd92f3e06f534aae
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Use SIInstrFlags predicates in SIMemoryLegalizer and AMDGPUBaseInfo. (#209821)
Part of a series following the introduction of SIInstrFlags predicates.
Commit: 195df3d4654b43ecf35927e574a8061bfaecbb78
https://github.com/llvm/llvm-project/commit/195df3d4654b43ecf35927e574a8061bfaecbb78
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-private.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
Log Message:
-----------
[mlir][OpenACC] Privatize worker reduction accumulators per worker (#210456)
Example:
```fortran
!$acc parallel
!$acc loop gang reduction(+:sum)
do k = 1, p
!$acc loop worker reduction(+:sum)
do j = 1, n
!$acc loop vector reduction(+:sum)
do i = 1, m
sum = sum + a(i,j,k)
end do
end do
end do
```
In this code, the worker accumulator is both gang- and worker-scoped.
Shared
memory allocated only one copy, so workers raced while updating the same
value.
Fix: allocate one shared-memory accumulator per worker whenever worker
parallelism is present.
Commit: 91ad9f0ce9655eb3715c937f7d64d329bac63817
https://github.com/llvm/llvm-project/commit/91ad9f0ce9655eb3715c937f7d64d329bac63817
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-binop-s64-with-s32-mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin3-fmax3-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-sin-cos-f16-f32.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (#208750)
Handle bitcast between i16 and f16/bf16.
For true16 this was already legal, make it legal in regbanklegalize as well.
For non-true16 widen it using G_ANYEXT to i32 and G_TRUNC to dst.
The "i32 G_ANYEXT f16/bf16" and "f16/bf16 G_TRUNC i32" are already legal,
for example these are generated by common CallLowering argument lowering.
Commit: 5ec4a236305f18f2d2d8646902ab166655f1b7f1
https://github.com/llvm/llvm-project/commit/5ec4a236305f18f2d2d8646902ab166655f1b7f1
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-derived.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Fix device-variable leaks and reset-safe cleanup (#209865)
Example:
```fortran
program main
use cudafor
integer, allocatable, device :: b(:)
integer :: istat
allocate(b(1024))
b = 2
istat = cudaDeviceReset()
end program
```
Managed descriptors and main-program allocatable data could leak. After
`cudaDeviceReset()`, compiler-generated scope-exit cleanup could also
access
stale descriptors or recreate a CUDA context.
Fix: free device data and descriptors in the correct order, and avoid
unnecessary
managed temporary descriptors. Each routine’s CUDA scope-exit cleanup is
grouped
under one `CUFDeviceIsActive()` check using
`cuDevicePrimaryCtxGetState`.
Routines without CUDA cleanup—and individual runtime frees—incur no
query.
Commit: f6b1a575b4076281cd67cf3f3a626d70363f1b9b
https://github.com/llvm/llvm-project/commit/f6b1a575b4076281cd67cf3f3a626d70363f1b9b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-legalize-range-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc-brc.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.prefetch.data.ll
Log Message:
-----------
AMDGPU/GlobalISel: Switch legalizer intrinsic lowering to extended LLTs (#209200)
Affects various buffer intrinsics.
Commit: 9428725fa09113905847decc48e8b5a731ad0ae6
https://github.com/llvm/llvm-project/commit/9428725fa09113905847decc48e8b5a731ad0ae6
Author: Ryan Thomas Lynch <me at ryanlyn.ch>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir-tblgen] Emit named result indices (#210542)
similar to https://github.com/llvm/llvm-project/pull/146839
useful for cases such as being able to programmatically update the
result segment sizes or clone an operation via `OperationState` while
editing just a few results, programmatically
Commit: 085ecff1ecc69ad022b614cfa4dc020540b6296b
https://github.com/llvm/llvm-project/commit/085ecff1ecc69ad022b614cfa4dc020540b6296b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Assert VPRegionValues are not used in VPTransformState::get(NFC) (#199420)
VPRegionValues must be replaced with concrete VPValues before execute
and never passed to VPTransformState::get. Add assert to guard against
violations.
Commit: 79e05f4aff2e5b9f0513c0539d146e44cc80193c
https://github.com/llvm/llvm-project/commit/79e05f4aff2e5b9f0513c0539d146e44cc80193c
Author: Jacob Crawley <jacob.crawley at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleave-low-vf-cost.ll
Log Message:
-----------
[AArch64][LV] Adjust costs for low-VF interleaved access (#209441)
Addressing regression introduced by #205844 in which a significantly
slower SVE tail loop is generated.
The cost model for the case where the interleave factor is larger than
the VF has been adjusted to more accurately reflect the cost of the uzp
instructions generated by the deinterleave tree, and the cost of
legalizing the type of each subvector.
Commit: d9fff42ccd58cb3d95cff60641011d72d38dc300
https://github.com/llvm/llvm-project/commit/d9fff42ccd58cb3d95cff60641011d72d38dc300
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/test/Fir/FirToSCF/do-loop.fir
M flang/test/Fir/loop01.fir
M flang/test/Integration/ivdep.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_execute_region_wrap.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/ivdep.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
Log Message:
-----------
[flang] Lower plain DO loops without a secondary-induction iter_arg (#207816)
Example:
```fortran
do i = lb, ub, step
...
end do
```
Flang lowers this with the DO variable as a redundant `iter_arg`, which
hides memory recurrences from later analyses. Simply removing it would
require converting the `index` IV to the source integer type each
iteration, potentially blocking vectorization.
Fix: allow `fir.do_loop` to use the DO variable’s integer type directly.
Trip-count and post-loop calculations remain in `index`. This removes
the redundant `iter_arg` without introducing per-iteration conversions.
`do concurrent` and unstructured loops are unaffected.
Commit: 334708eb100204edc677a546bfa77ef10df71ec9
https://github.com/llvm/llvm-project/commit/334708eb100204edc677a546bfa77ef10df71ec9
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
Log Message:
-----------
[gn build] Port 03b5c5285eaf (#210688)
Commit: 41d76f2763a53517f273c87a1a703f00cb965f09
https://github.com/llvm/llvm-project/commit/41d76f2763a53517f273c87a1a703f00cb965f09
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctls.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaximum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx7.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx8-plus.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix G_UNMERGE_VALUES lowering for extended LLTs (#209201)
Use integer type for bit twiddling instead of scalar.
Commit: b21fb937f165898c727030760f0a8ab685ef08eb
https://github.com/llvm/llvm-project/commit/b21fb937f165898c727030760f0a8ab685ef08eb
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
A clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
R clang/lib/StaticAnalyzer/Checkers/ReportDanglingPtrDeref.cpp
Log Message:
-----------
[analyzer][NFC] Correct the DanglingPtrDeref checker's filename (#209862)
The alpha `DanglingPtrDeref` checker got implemented in #209278. Since
it is under heavy development and subject to change significantly in the
near future it is in alpha stage. During the development of the
`DanglingPtrDeref` checker its name got changed from
`ReportDanglingPtrDeref` to `DanglingPtrDeref` based on the conversation
here:
https://github.com/llvm/llvm-project/pull/209278#discussion_r3578604913
While the checker's registration got updated in `Checkers.td` the same
change did not get applied to the `
clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt` and the checker's
filename. This PR addresses this issue.
Commit: 2ec66d76fde71265be83c216d0be3d16bb131fc7
https://github.com/llvm/llvm-project/commit/2ec66d76fde71265be83c216d0be3d16bb131fc7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Fix wrapper-call managed-code token lifetime (#210686)
d199b284c7d established that ManagedCodeTaskGroup tokens must bracket a
single span of execution on a stack, not a chain of asynchronous
operations (see orc-rt/docs/Design.md's "Managed code execution and
shutdown" section). Session::handleWrapperCall and sendWrapperResult
predated that policy and didn't conform to it: the token was acquired in
handleWrapperCall but only released in sendWrapperResult, holding it for
the whole call/response chain. If Fn deferred sending its result
asynchronously, Session shutdown would incorrectly wait on that deferred
completion instead of proceeding as soon as Fn's stack unwound.
Acquire the token as a TaskGroup::Token scoped to the dispatched call,
and let it release when Fn returns rather than when its result is sent.
Commit: d90634dc185da79a8eb6a993c28614f4788e368e
https://github.com/llvm/llvm-project/commit/d90634dc185da79a8eb6a993c28614f4788e368e
Author: 311Volt <41923095+311Volt at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M offload/liboffload/API/Memory.td
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
M offload/unittests/OffloadAPI/memory/olMemFill.cpp
Log Message:
-----------
[offload] support arbitrary memoryFill pattern sizes in L0 plugin (#209724)
Even though L0, CUDA and HSA do not directly support filling memory
regions with non-power-of-two-sized patterns, plugins explicitly allow
for such fills by falling back to a slow path whenever a direct API call
is not possible.
The Level Zero plugin is the odd one out, forwarding directly to
`zeCommandListAppendMemoryFill`. This fails for non-power-of-two
patterns, causing unit tests for `olMemFill` to fail when run on L0.
This PR adds fallbacks in L0 plugin's `memoryFill` implementation to
support arbitrary pattern sizes:
- if all pattern bytes are the same, substitute `1` for `patternSize`
and proceed with the native fill
- if memory is host-accessible (host or shared alloc), then simply
`std::copy_n` the pattern
- if memory is device-only, upload a seed to the device, and
`memoryCopy` O(log n) times, doubling the pattern each time, until the
entire region is filled. The seed is the input pattern, but extended on
the host to 1-2KiB to potentially eliminate several small `memoryCopy`
calls that would otherwise be almost pure overhead.
Conceptually, this approach has better worst-case overhead than the one
found in the CUDA plugin (decompose the pattern to then run multiple
strided memsets) and the AMDGPU one (call `pushMemoryCopyH2DAsync` with
the pattern, setting `NumTimes`). Aligning the fallback fill approaches
is outside the scope of this PR, however - the main intent is to fix the
unit test failures.
Commit: a8ffce42477c909908d6f45511a48fd01a24837d
https://github.com/llvm/llvm-project/commit/a8ffce42477c909908d6f45511a48fd01a24837d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
Log Message:
-----------
[Clang] Fix evaluation of fold expanded constraints for NTTP (#210005)
This is a rework of #200185 and also reflects what we did for TTP in
C++26 fold expression constraints (adc64c6e1745)
Fixes https://github.com/llvm/llvm-project/issues/199569
Commit: 14f6b9f0a3976f85d3ef509c8361991ae3702002
https://github.com/llvm/llvm-project/commit/14f6b9f0a3976f85d3ef509c8361991ae3702002
Author: Deepak Shirke <deepakshirke509 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/AArch64/bitreverse-v8i8-to-gpr.ll
Log Message:
-----------
[VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (#209037)
Add reverse direction to `foldBitOrderReverseAndSwap`:
`bitcast(bitreverse(<N x i8>)(bitcast(IntTy X)))` -->
`bitreverse(bswap(X))`
This avoids GPR<=>vector register crossings when integer ops are
cheaper. On AArch64 for example:
Before:
```asm
fmov d0, x0 ; GPR → vector crossing
rbit v0.8b, v0.8b
fmov x0, d0 ; vector → GPR crossing
```
After:
```asm
rev x8, x0 ; stays in integer registers
rbit x0, x8
```
The fold is cost-model driven and only fires when the integer version is
cheaper, so targets like X86+GFNI that prefer the vector form (single
`vgf2p8affineqb` instruction) are unaffected.
A new call site for `BitCast` instructions is added alongside the
existing `Call` instruction call site in the dispatch loop.
Fixes #201760
Commit: 06e3180cd141d9a8efdb9e9867b4a32300679038
https://github.com/llvm/llvm-project/commit/06e3180cd141d9a8efdb9e9867b4a32300679038
Author: Barbara Mitic <Barbara.Mitic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
[AMDGPU] Accept extractelement of a widening cast when folding image ops to a16 (#208207)
canSafelyConvertTo16Bit() recognizes a scalar coordinate that is a
direct sext/zext/fpext from a 16-bit value (sext gated on AllowI16SExt).
Per-dimension coordinates can instead arrive as an extractelement of a
widening vector cast (extractelement((s|z|fp)ext <N x i16/half> Vec),
Idx). When the cast has more than one use, the extractelement(cast) ->
cast(extractelement) canonicalization does not fire, so the cast is left
in place and the coordinate is not recognized.
Strip a leading extractelement before the cast check so the same logic
handles scalar and per-lane coordinates, and mirror this in
convertTo16Bit() by re-extracting from the narrow vector, allowing the
widening cast to be removed once it has no other uses.
Commit: bd38dd0ace19c3b9512da2b37bb9690ee6c9e97f
https://github.com/llvm/llvm-project/commit/bd38dd0ace19c3b9512da2b37bb9690ee6c9e97f
Author: AntonyCJ30 <cj6186609 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/CodeGen/X86/avx512-vpternlog-commute.ll
Log Message:
-----------
[X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (#209782)
Fixes #157929
VPTERNLOG231_imm8 and VPTERNLOG312_imm8 had their bodies swapped,
causing ISel to emit the wrong truth-table immediate whenever operand
reordering was needed (-O1+, not -O0).
Test changes:
- **avx512-vpternlog-commute.ll: regenerated with
update_llc_test_checks.py**
(accounts for the large diff)
- Added 4 new cases: vpternlog231_rmik, vpternlog312_rmik,
vpternlog231_rmbik, vpternlog312_rmbik
Tested: llvm-lit on llvm/test/CodeGen/X86 (no regressions), original
repro verified correct at -O0 through -O3, -Os, -Oz.
Commit: 60f8b4624badab6bec5e2600d82cf98b6a4e303b
https://github.com/llvm/llvm-project/commit/60f8b4624badab6bec5e2600d82cf98b6a4e303b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-cse-leaves-dead-cast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx8-plus.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix G_MERGE_VALUES lowering for extended LLTs (#209202)
Use integer type for bit twiddling instead of scalar.
Commit: 648aec12e5e5242c93aa73a21714553c6341ddc3
https://github.com/llvm/llvm-project/commit/648aec12e5e5242c93aa73a21714553c6341ddc3
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
Log Message:
-----------
[AArch64] NFC: Factor out code from FP_TO_INT (SVE). (#207200)
This just moves out some of the SVE lowering code from
LowerVectorFP_TO_INT into a separate function, so that we can reuse that
in LowerVectorFP_TO_INT_SAT.
Commit: 25b75a1e41c5fe71ed1f832c36c8bfb1bca1ab35
https://github.com/llvm/llvm-project/commit/25b75a1e41c5fe71ed1f832c36c8bfb1bca1ab35
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
Log Message:
-----------
AMDGPU/GlobalISel: Stop using changeTo in legalizer actions (#209203)
Use changeElementSizeTo or changeElementCountTo to preserve extended LLT.
Commit: 8abc26930cf9ee0f059228acdbd1d22cd1c325e3
https://github.com/llvm/llvm-project/commit/8abc26930cf9ee0f059228acdbd1d22cd1c325e3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr209714.ll
Log Message:
-----------
[X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (#210281)
VectorCombine may have folded:
icmp_eq(vecreduce_or(splatsign(x)),0) --> icmp_sgt(vecreduce_umax(x),-1)
which DAG folds to:
srl(vecreduce_umax(x),bw-1).
This match attempts to lower:
srl(vecreduce_umax(x),bw-1) --> icmp_ne(movmsk(x),0) "any_of negative"
srl(not(vecreduce_umax(x)),bw-1) --> icmp_eq(movmsk(x),0) "none_of negative"
The correct fix would be to improve vecreduce_or costs to prevent
VectorCombine doing this, but that change is far too big to be merged
into 23.x - so I've created the narrow backend fix.
Fixes #209714
Commit: d9c88062ecf9dc8ece4bb1482b0f1789979e3da5
https://github.com/llvm/llvm-project/commit/d9c88062ecf9dc8ece4bb1482b0f1789979e3da5
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/test/Analysis/logical-ops.c
A clang/test/Analysis/z3/z3-bitint-arithmetic.c
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
M llvm/lib/Support/Z3Solver.cpp
Log Message:
-----------
[analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (#210525)
Forces symbolic cast to be enabled for z3 symbolic execution, and
switches away from Ctx.getTypeSize for getting the bit width of integral
types.
The current patch might be a bit problematic for z3 cross-check, as this
relies on symbolic integer cast to be always on. I am not sure if
turning on ShouldSupportSymbolicIntegerCasts would cause issues for the
supported range-based solver, so I only kept it turned on when
AnalysisConstraintsOpt == Z3ConstraintsModel.
Assisted-by: Codex
Commit: 27fe16dcf920c92bcb7050e5abf4164ed3b496d1
https://github.com/llvm/llvm-project/commit/27fe16dcf920c92bcb7050e5abf4164ed3b496d1
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
A llvm/test/Instrumentation/AddressSanitizer/darwin-mte-tag-stripping.ll
Log Message:
-----------
[Darwin][ASan] Strip MTE-tags for inlined shadow translations (#204827)
https://github.com/llvm/llvm-project/pull/166453 stripped these tags
when the runtime performed the mem-to-shadow translation, but did not
account for ASan's inline translations. When an MTE-tagged address gets
translated, the tag bits are right-shifted too, resulting in a very high
address that faults when accessed.
This patch strips the MTE-tag bits before applying the translation on
Apple platforms.
rdar://180032780
Commit: 1caf9e1ef68ef85f1976e82bfc33befe1edc6eff
https://github.com/llvm/llvm-project/commit/1caf9e1ef68ef85f1976e82bfc33befe1edc6eff
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-mmt4d.mlir
Log Message:
-----------
[mlir][ArmSVE] Fix comment inconsistency for `pack_lhs` in `ArmSVE/pack-unpack-mmt4d.mlir` (NFC) (#210502)
This PR simply fix a comment inconsistency for `pack_lhs` in
[ArmSVE/pack-unpack-mmt4d.mlir](https://github.com/llvm/llvm-project/compare/main...FedericoBruzzone:nfc-armsve?expand=1#diff-7be071860c440806b8dad954ed61946e7e9f27e032ed6044a704f0c0f70e4407)
as identified in #208226.
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: c30b1fa7a08e36346f80b1798ae587bc1d5e032b
https://github.com/llvm/llvm-project/commit/c30b1fa7a08e36346f80b1798ae587bc1d5e032b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port b21fb937f165 (#210698)
Commit: 2cdd343022d4c5848281f4bb3670213f535884a2
https://github.com/llvm/llvm-project/commit/2cdd343022d4c5848281f4bb3670213f535884a2
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix legalizer lowering for G_EXTRACT/INSERT_VECTOR_ELT (#210094)
Use LLT::integer in bit twiddling lowering for extract/insert vector element.
Commit: ca276b4822b1c748aaf9ef631d887143cb03a217
https://github.com/llvm/llvm-project/commit/ca276b4822b1c748aaf9ef631d887143cb03a217
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
A llvm/test/Transforms/ExpandMemCmp/RISCV/lit.local.cfg
A llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
Log Message:
-----------
[ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (#209738)
`RISCVTTIImpl::enableMemCmpExpansion` previously disabled `memcmp`/`bcmp`
expansion whenever the target lacks unaligned scalar memory access. This is
too conservative: when both pointers are statically known to be
sufficiently aligned (e.g. `bcmp(ptr align 8, ptr align 8, 32)`), only
naturally aligned loads are needed, which are fine on strict-align
targets.
`ExpandMemCmp` now keeps a candidate load size only if, given the known
common alignment of the two pointers, the access is naturally aligned or
the target reports it via `allowsMisalignedMemoryAccesses`; otherwise it
falls back to the libcall. The query tests whether the access is
*allowed* (not *fast*), so it is a no-op for targets that already allow
unaligned access (X86, AArch64, ...).
The known alignment now also folds in the `align` attributes on the call
arguments (`CallBase::getParamAlign`), not just the pointer value.
RISCV drops the early return and only offers overlapping loads / tail
expansions when unaligned scalar access is supported.
Fixes #209511.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
Commit: 0000fd1fc63dcc7f0fe87091fe2e5a0daf5ec727
https://github.com/llvm/llvm-project/commit/0000fd1fc63dcc7f0fe87091fe2e5a0daf5ec727
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A llvm/test/Transforms/VectorCombine/AArch64/load-widening.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
Log Message:
-----------
[VectorCombine] load-widening.ll - add test coverage for all 4 x86-64 cpu levels and aarch64 endian test coverage (#210690)
Removed x86 endianess tests which makes no sense (and are likely to misbehave) and add equivalent test coverage to aarch64
Noticed while reviewing #209775
Commit: ac41c58f7b3b26a4bd4260d05afd7c3b2ccc3c72
https://github.com/llvm/llvm-project/commit/ac41c58f7b3b26a4bd4260d05afd7c3b2ccc3c72
Author: BohdanYehorov <yehorovbohdan.work at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/docs/InternalsManual.rst
Log Message:
-----------
[clang][docs] Fix include path in InternalsManual (#209458)
The paths `include/Basic/StmtNodes.td` and `include/AST/Expr*.h` in the
Clang Internals Manual are incorrect.
Commit: a35bcaef8c1a0867af4c3b547422b4783c88fc96
https://github.com/llvm/llvm-project/commit/a35bcaef8c1a0867af4c3b547422b4783c88fc96
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-store-s16-true16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
Log Message:
-----------
AMDGPU/GlobalISel: Explicitly widen scalar to i32 for load and store (#210095)
Affects f16 and bf16. Earlier, they were widened to f32 and s32 respectively.
The actual error was the artifact combiner creating a copy between f32/i32
which fails in the machine verifier. Maybe we could create a bitcast there.
However i32 is more efficient for us and matches well with how argument
lowering keeps f16 and bf16 in i32 copies to/from physical registers.
Also starting from f16 store, G_STORE %0(f16), %1(p1) :: (store (f16),
and doing widen scalar to 32 bit type, i32 makes more sense since store
will store 16 least significant bits G_STORE %0(i32), %1(p1) :: (store (f16)
compared to G_STORE %0(f32), %1(p1) :: (store (f16), which looks incorrect if
we assume input was really in f32 format.
Commit: 16e213f7dd3b8a2ec93b3015268efb8f59c9b52d
https://github.com/llvm/llvm-project/commit/16e213f7dd3b8a2ec93b3015268efb8f59c9b52d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.shuffle.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Fix wrong half selection in wave.shuffle lowering (#210661)
selectWaveShuffleIntrin XORed ThreadID with the shifted index instead of
the original index, picking the wrong lane half on wave64 targets
without wave wide bpermute (GFX10/GFX11)
Commit: 75ee393652ca86f5d9b3670be5fa04d2bd8bb95a
https://github.com/llvm/llvm-project/commit/75ee393652ca86f5d9b3670be5fa04d2bd8bb95a
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering (#210096)
We could get away with just the type from MMO in most cases, but MMO splitting
creates MMO with LLT::scalar and we prefer integer.
Commit: 112aac39131f7fdc8b4a50cb3fb13ef293e1c620
https://github.com/llvm/llvm-project/commit/112aac39131f7fdc8b4a50cb3fb13ef293e1c620
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix extending load narrow scalar (#210097)
isAnyScalar is explicit LLT::scalar check but we want to narrow scalar
integer types as well.
Commit: 88a19bdee051ef4ce15fc4e29f50a328b80b0166
https://github.com/llvm/llvm-project/commit/88a19bdee051ef4ce15fc4e29f50a328b80b0166
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use integers for read-any-lane split type (#210098)
Commit: 92873559f90a35f89ebc5ac94a6d7e4c3a419ecb
https://github.com/llvm/llvm-project/commit/92873559f90a35f89ebc5ac94a6d7e4c3a419ecb
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/simulator/hello.cpp
M lldb/test/API/tools/lldb-server/apple-simulator/TestAppleSimulatorOSType.py
Log Message:
-----------
[lldb][test] Bump safety timeout in simulator tests to fix flakyness (#209180)
On really slow machines, the current 10 second timeout can expire and
cause the test to randomly fail. Bump the timeout to 10 minutes which 60
times the current value and should be unreachable even on the slowest of
machines.
To avoid making the tests run for 10 minutes, we now consistently kill
the test process on shutdown using the subprocess list in lldbtest which
gets killed on tearDown.
Commit: 1e18a0f4d758ff796acbb3987c2d01c02bb223a1
https://github.com/llvm/llvm-project/commit/1e18a0f4d758ff796acbb3987c2d01c02bb223a1
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/callslot.ll
Log Message:
-----------
[MemCpyOpt] Precommit tests for PR210667 (NFC) (#210708)
Commit: 92539cf3a83e22dd589fa97d223da06339dc304a
https://github.com/llvm/llvm-project/commit/92539cf3a83e22dd589fa97d223da06339dc304a
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/callslot.ll
Log Message:
-----------
[MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (#210667)
A destination alloca's alignment could have been unconditionally
overwritten, letting a lower-aligned source incorrectly undo a
previous alignment increase. This issue has been addressed by
considering the maximum alignment between the new source target
and current destination, adhering to what the existing comment
already promises.
Fixes: https://github.com/llvm/llvm-project/issues/208092.
Commit: 4f939577de61ffdf85087499b99aa3686ed362cd
https://github.com/llvm/llvm-project/commit/4f939577de61ffdf85087499b99aa3686ed362cd
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
Log Message:
-----------
GlobalISel: Use extended LLTs in f64 to f16 fptrunc lowering (#210099)
Commit: e3016ce1a9a14c690c90a343849d45837d9d95d7
https://github.com/llvm/llvm-project/commit/e3016ce1a9a14c690c90a343849d45837d9d95d7
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
Log Message:
-----------
GlobalISel: Use extended LLTs in extract lowering (#210100)
Commit: e8969304fe0ca32088120702267772a622f5f746
https://github.com/llvm/llvm-project/commit/e8969304fe0ca32088120702267772a622f5f746
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use integers for clamp i64 to i16 prelegalizer combine (#210101)
Commit: 066fba24b425211e80deb4486ba56ddf70472c37
https://github.com/llvm/llvm-project/commit/066fba24b425211e80deb4486ba56ddf70472c37
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use extended LLTs in AMDGPUCombinerHelper (#210102)
Here we also had to change comparisons to extended LLTs to avoid
matching bfloats. In the old scalar version, before the switch to extended
LLTs, s16 was treated as f16 and bf16 was combined as if it were f16.
Commit: 499fd10534993eec4aefc8f06026fc4876bbd371
https://github.com/llvm/llvm-project/commit/499fd10534993eec4aefc8f06026fc4876bbd371
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Run macOS CI on self-hosted runners instead of Github ones (#210124)
This should increase our capacity and allow better turn around times,
and potentially unblock additional test coverage.
Note that this change implies that the self-hosted runners provide a
version of Xcode that is supported by libc++ (the latest released one),
which is currently the case.
Commit: 03b780679bdb5152aef0182dfc8b2f1d182a94e0
https://github.com/llvm/llvm-project/commit/03b780679bdb5152aef0182dfc8b2f1d182a94e0
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/allocation_size.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/max_size.pass.cpp
Log Message:
-----------
[libc++][test] Fix build failure from typo in #171785 (#210552)
If `__STDCPP_DEFAULT_NEW_ALIGNMENT__` is not defined, these tests will
fail to build due to a typo that was added in #171785.
Commit: 8888665966f14abfac4f2c352846abfc1212d8e5
https://github.com/llvm/llvm-project/commit/8888665966f14abfac4f2c352846abfc1212d8e5
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix type mismatch in regbank combiner for applyD16Load (#210103)
Commit: 743813d10023a0616833062f5d448284022b8063
https://github.com/llvm/llvm-project/commit/743813d10023a0616833062f5d448284022b8063
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
Log Message:
-----------
GlobalISel: Use extended LLTs in lshr narrow combine (#210298)
Commit: a8617034c4a7cc733676a31b736d3118fec34259
https://github.com/llvm/llvm-project/commit/a8617034c4a7cc733676a31b736d3118fec34259
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A libcxx/test/selftest/if-else.sh.cpp
M libcxx/utils/libcxx/test/format.py
Log Message:
-----------
[libc++][utils] Fix LIT `%if` substitution support (#209358)
Update the applySubstitutions call in `libcxx/utils/libcxx/test/format.py` to match the
change to `llvm/utils/lit/lit/TestRunner.py` done in 1041a9642ba0.
Commit: 3fc6711ccaf60c15371402c3ee7776fde5f01b4f
https://github.com/llvm/llvm-project/commit/3fc6711ccaf60c15371402c3ee7776fde5f01b4f
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
M llvm/test/CodeGen/PowerPC/aix-crspill.ll
M llvm/test/CodeGen/PowerPC/aix32-crsave.mir
M llvm/test/CodeGen/PowerPC/cc.ll
M llvm/test/CodeGen/PowerPC/crsave.ll
M llvm/test/CodeGen/PowerPC/p10-spill-creq.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/PowerPC/ppc64-crsave.mir
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
Log Message:
-----------
[PowerPC]optimize the epilogue for restore non volatile cr fields (#202339)
For AIX and ELFv2 ABI,
1. When we only spill one non-volatile CR field , using one
mfocrf/mtocrf instruction.
2. when spill two or more non-volatile CR fields, using one mfcr/mtcr
instead of multi mfocrf/mtocrf instructions
Commit: faf7261308da236627ae8f813d17d6e1ef1e9d68
https://github.com/llvm/llvm-project/commit/faf7261308da236627ae8f813d17d6e1ef1e9d68
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/test/std/algorithms/alg.nonmodifying/alg.all_of/all_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.any_of/any_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.none_of/none_of.pass.cpp
Log Message:
-----------
[libc++] Bring std::{any,all,none}_of tests up to current standards (#209266)
The tests for these algorithms were minimal, didn't test all iterator
categories, and the constexpr coverage didn't follow our current
practice. This patch brings all three tests (which are very similar) up
to our current standards.
Assisted by Claude
Commit: 44e37579d19c7d0965166808c77f9e7ebf407df9
https://github.com/llvm/llvm-project/commit/44e37579d19c7d0965166808c77f9e7ebf407df9
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/if_construct_execute_region_wrap.f90
Log Message:
-----------
[flang][PFT-to-MLIR] reset Evaluation blocks between entry-point passes (#210681)
A subprogram with an alternate ENTRY is lowered by walking the shared
PFT once per entry. Evaluation::block is populated during each walk
(top-level createEmptyBlocks and inside wrapUnstructuredConstruct's own
createEmptyBlocks), but the second pass previously inherited stale
pointers into the first entry's function/wrap regions. For a wrappable
IfConstruct nested inside a structured container, the entry block that
genFIR(IfConstruct) starts before creating its scf.execute_region then
sent the builder into the previous entry's region, and the wrap plus its
inner load ended up in the wrong func:
subroutine foo(a)
integer a
entry bar(a)
if (a .eq. 1) then
if (a .ne. 3) stop
end if
end subroutine
produced both scf.execute_region ops in _QPfoo, with an inner fir.load
referencing bar's %arg0 — 'fir.load' op using value defined outside the
region.
Fix: null every Evaluation::block in the shared PFT at the start of each
entry-point pass, so createEmptyBlocks fills a clean tree and later
reads (in particular the landing-pad reposition in genFIR(IfConstruct))
never see a pointer from a prior pass.
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 2a33792a2ec1a980259bd9388834e3c1fa53af3d
https://github.com/llvm/llvm-project/commit/2a33792a2ec1a980259bd9388834e3c1fa53af3d
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/ExpressionTraits.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/TokenKinds.def
A clang/include/clang/Basic/Traits.td
R clang/include/clang/Basic/TransformTypeTraits.def
M clang/include/clang/Basic/TypeTraits.h
M clang/include/clang/Sema/DeclSpec.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/Basic/ExpressionTraits.cpp
M clang/lib/Basic/TypeTraits.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangTraitsEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[clang][NFC] move traits to tablegen (#201491)
This patch moves all traits to a tablegen file.
The motivation for this change is a review comment in
https://github.com/llvm/llvm-project/pull/142341 - since then about a
year has passed and we've accumulated 9 standard names that are
maintained separately from their corresponding trait definitions. For
transform type traits we keep the standard names around as well. While
this is still a reasonably low number, it is definitely going to keep
increasing.
Commit: 0549fbe55ba4f9fc172591a61b04700d4ff5045e
https://github.com/llvm/llvm-project/commit/0549fbe55ba4f9fc172591a61b04700d4ff5045e
Author: Daemon <daemonpilot at hotmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-maxdepth.mir
Log Message:
-----------
[GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (#207013)
This patch aligns the New Pass Manager (NPM) implementation of
`GISelValueTrackingAnalysis::run()` with the Legacy pass manager by
dynamically adjusting the maximum search depth based on the optimization
level. This eliminates behavioral discrepancies between the two code
paths, reducing migration risks and ensuring consistent compilation
performance and code generation quality across both code paths.
Commit: 97a105f8e681e8e9e5778b6f8bf95a8c365a05f6
https://github.com/llvm/llvm-project/commit/97a105f8e681e8e9e5778b6f8bf95a8c365a05f6
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
A flang/test/Semantics/OpenMP/teams_loop.f90
Log Message:
-----------
[Flang][OpenMP] Allow `parallel loop` inside of `teams` (#210679)
A missing `parallel_loop` directive in the `nestedTeamsAllowedSet`
currently causes code like the following to report a semantics issue:
```f90
!$omp teams
!$omp parallel loop
do i=1, 10
end do
!$omp end teams
```
This patch makes sure to accept it, since `parallel` is an allowed
construct to be immediately nested inside of `teams`, even when combined
with another construct.
Commit: e16e6077cbc2b0ab6335dd4dc67e3a6318b1ad3a
https://github.com/llvm/llvm-project/commit/e16e6077cbc2b0ab6335dd4dc67e3a6318b1ad3a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Use m_scev_AffineAddRec in get{Zero,Sign}ExtendExprImpl (NFC) (#210082)
It's a small win in number of lines, and reduces the nesting level a
bit.
Suggested in https://github.com/llvm/llvm-project/pull/208805
PR: https://github.com/llvm/llvm-project/pull/210082
Commit: 35aa7b529ebeafc9767a4c5398047a92b86bd4a8
https://github.com/llvm/llvm-project/commit/35aa7b529ebeafc9767a4c5398047a92b86bd4a8
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaCXX/attr-no-specializations.cpp
Log Message:
-----------
Ensure that we properly propagate template decl attributes to redecls (#209873)
Variable and class templates weren't forwarding their declaration
attributes that were attached directly to them (at the moment, the only
one I could find that had this issue is the no_specialization attr). The
result was that intermediate redeclarations would prevent the
diagnostics from happening.
This patch ensures we propagate them properly for variable and class
templates. It seems our function templates already do the right thing.
Fixes: #209812
Commit: b16c5f7cc88c9f41d904cc73d5618cc7453ac862
https://github.com/llvm/llvm-project/commit/b16c5f7cc88c9f41d904cc73d5618cc7453ac862
Author: yinghao <73093416+andreww0210 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
A llvm/test/CodeGen/NVPTX/proxy-reg-erasure-kill-flag.mir
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
Log Message:
-----------
[NVPTX] Clear unsafe kill flags in NVPTXProxyRegErasure (#198143)
Fixes #198142
After replacing regsiter, stale `killed` flags my leave on non-terminal
uses, breaking liveness and triggering MachineVerifier errors.
Fix this by conservatively dropping the `killed` flag on `ToReg`.
Commit: bb5c8d5bea4817a2447d9acfdb7ef11c4323ddac
https://github.com/llvm/llvm-project/commit/bb5c8d5bea4817a2447d9acfdb7ef11c4323ddac
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[LangRef] Add immarg attributes to memcpy, memset, memmove isvolatile args (#210669)
Commit: 1ed1ca59245bfa949919f31cef5fd5c87c20c6ec
https://github.com/llvm/llvm-project/commit/1ed1ca59245bfa949919f31cef5fd5c87c20c6ec
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
Re-commit: [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (#210712)
Re-commit of https://github.com/llvm/llvm-project/pull/210323 after
adding
a forward declaration for GVNLegacyPass class to work around GCC
compilation
failure.
Move `AvailableValue` and `AvailableValueInBlock` into GVNPass, similar
to other helper types.
Retain `llvm::gvn::GVNLegacyPass` as just `llvm::GVNLegacyPass` -
"legacy" is already a sufficent hint and it is not going to become more
"private" by stacking "gvn" prefixes to the name.
Ideally, `GVNLegacyPass` should be defined in an anonymous namespace,
but
that is not possible because it is declared as a friend of GVNPass.
Commit: 6998fd59e16026a00fee8e83243c0ec91047fee3
https://github.com/llvm/llvm-project/commit/6998fd59e16026a00fee8e83243c0ec91047fee3
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
A llvm/test/Transforms/Inline/AMDGPU/inline-max-bb-debug.ll
Log Message:
-----------
[AMDGPU] Print max-BB inline rejections
Commit: 6f744fb04cf1cf30b45ff73883566eeebb7eeb7d
https://github.com/llvm/llvm-project/commit/6f744fb04cf1cf30b45ff73883566eeebb7eeb7d
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 2a33792 (#210726)
This fixes 2a33792a2ec1a980259bd9388834e3c1fa53af3d.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=2a33792a2ec1a980259bd9388834e3c1fa53af3d
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4c5b4f40c4ac77f1b50a90451fd040356748ac6a
https://github.com/llvm/llvm-project/commit/4c5b4f40c4ac77f1b50a90451fd040356748ac6a
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/lit.cfg.py
M libsycl/test/usm/alloc_functions.cpp
Log Message:
-----------
[libsycl][E2E] Compile all E2E tests with -fsycl (#204115)
Commit: 2549a2c39b4b86b035df052948bd3f867728b075
https://github.com/llvm/llvm-project/commit/2549a2c39b4b86b035df052948bd3f867728b075
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libsycl/CMakeLists.txt
Log Message:
-----------
[libsycl][NFC] Move the cmake msvc DLL check (#193485)
Addresses a review comment from
https://github.com/llvm/llvm-project/pull/188770
Commit: 7bbed7999de1a60c790a3b0f01d965c18fd832e8
https://github.com/llvm/llvm-project/commit/7bbed7999de1a60c790a3b0f01d965c18fd832e8
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/array-coor-canonicalization.fir
A flang/test/Fir/box-dims-folding.fir
M flang/test/Fir/boxaddr-folding.fir
Log Message:
-----------
[flang] Fold reads of fir.create_box components (#210388)
Fold fir.box_addr and constant-dimension fir.box_dims of a descriptor
built by fir.create_box back to the operands that built it, so the
create_box can die when nothing consumes it as a real descriptor.
fir.array_coor is intentionally not folded through create_box, since
that would drop its explicit byte strides.
Assisted-by: Cursor
Commit: b2d3db9bfb01ceb821b38dfc57f7965b09f602cf
https://github.com/llvm/llvm-project/commit/b2d3db9bfb01ceb821b38dfc57f7965b09f602cf
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/Delinearization/multidim_pointer_addrspace.ll
Log Message:
-----------
[SCEV] Derive element size from the access's own pointer address space (#209824)
ScalarEvolution::getElementSize always derived the element-size SCEV
using a generic address-space-0 pointer index type. On targets whose
data layout uses different pointer index widths per address space (for
example, where some address spaces use 32-bit pointers and others
64-bit), a load/store through a narrow address space produced an access
function SCEV of one width but an element-size SCEV of another.
Delinearization then called SCEVDivision::divide with numerator and
denominator of mismatched types, tripping the assertion added in
a9d295d615a8 once the implicit sign-extension was removed in
23a32bcedb91.
Derive the index type from the memory access's actual pointer operand
address space so the element-size SCEV matches the width of the access
function's SCEV.
Commit: 9c024f3a83cf2469b27ae42c1a8d3ab635da3dc1
https://github.com/llvm/llvm-project/commit/9c024f3a83cf2469b27ae42c1a8d3ab635da3dc1
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M bolt/lib/Passes/Instrumentation.cpp
R bolt/test/X86/instrument-funcs-file.s
Log Message:
-----------
[BOLT] Drop option --instrument-funcs-file (#210217)
Commit: 34aefe9744fa83fa222d7f28e073c693c2c4ff5b
https://github.com/llvm/llvm-project/commit/34aefe9744fa83fa222d7f28e073c693c2c4ff5b
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/cmake/caches/hexagon-unknown-linux-musl-clang-dist.cmake
M clang/cmake/caches/hexagon-unknown-linux-musl-clang-dylib-dist.cmake
Log Message:
-----------
[Hexagon] Fix compiler-rt install dir type, scope sanitizers (#209375)
COMPILER_RT_INSTALL_LIBRARY_DIR must be CACHE STRING, not CACHE PATH: a
relative PATH-typed cache entry resolves against the runtimes sub-build
directory instead of CMAKE_INSTALL_PREFIX, misplacing sanitizer libs.
Replace the explicit COMPILER_RT_BUILD_* ON list with
COMPILER_RT_SANITIZERS_TO_BUILD=all, since those options already default
ON upstream and infeasible sanitizers self-exclude via their own
ALL_<X>_SUPPORTED_ARCH lists.
Add FORCE to the dylib overrides so they take effect after
hexagon-unknown-linux-musl-clang-dist.cmake has already cached them OFF.
Commit: c84d20b18026fc230a7957c8faf3cf3a40d9cb55
https://github.com/llvm/llvm-project/commit/c84d20b18026fc230a7957c8faf3cf3a40d9cb55
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/sockatmark_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[libc] Fix sockatmark test (#210655)
When writing the test, I assumed that (linux) domain sockets do not
support OOB data, and that sockatmark returns 0, because it can never
read it.
In fact, as of 2021, linux does support OOB on domain sockets, but this
feature can be turned off at build time (CONFIG_AF_UNIX_OOB). In this
case (or in the case of older kernels), the kernel returns an error (and
the test fails).
Armed with this knowledge, I modify the test to test both "1" (OOB
present) and "0" (no OOB data) cases by actually sending OOB data into
the socket. I use the send call to determine the presence of OOB
support, and have the test skip itself if it is absent. OOB data only
makes sense on stream sockets, so change the socketpair type to that.
---------
Co-authored-by: Jeff Bailey <jbailey at raspberryginger.com>
Commit: 5a19a3a4b9915d19fff1b8298e723ee2b24ebc6a
https://github.com/llvm/llvm-project/commit/5a19a3a4b9915d19fff1b8298e723ee2b24ebc6a
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/resources/build.md
Log Message:
-----------
[lldb][Windows] Only embed Python home in Debug config (#209464)
On Windows, we used to embed `PYTHONHOME` by default on Windows. In the
documentation, we say
> This is most useful for developers who simply want to run LLDB after
they build it.
Since we use the limited/stable API now, we're less restricted in the
Python version, so I think it's less of an issue that LLDB won't find
Python. The only configuration where it might cause issues is the debug
configuration, since, when installing Python, you usually don't include
the debug libraries. Thus, you might not have the debug version
(`python3_d.py`) of Python in your PATH.
Commit: 0c0d9ff3b01b5709bda34198a01da2f19b88650e
https://github.com/llvm/llvm-project/commit/0c0d9ff3b01b5709bda34198a01da2f19b88650e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-add-part.ll
Log Message:
-----------
[SLP][NFC]Add a test with fmuladd copyables candidates, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210744
Commit: b7810e97d6281f65e255b36af7b39af18d3d2006
https://github.com/llvm/llvm-project/commit/b7810e97d6281f65e255b36af7b39af18d3d2006
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Add missing secrets (#210421)
Commit: 9ba8a3c8ebf0dee73c7e3e1aa8ae0a81dd6439c7
https://github.com/llvm/llvm-project/commit/9ba8a3c8ebf0dee73c7e3e1aa8ae0a81dd6439c7
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Use simpler form of applyWaitcnt. NFC. (#210736)
Commit: 95f39100f1c1dab2aefbdc42d6e9ca26955535d1
https://github.com/llvm/llvm-project/commit/95f39100f1c1dab2aefbdc42d6e9ca26955535d1
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
A flang/test/Lower/OpenMP/collapse-labeled-do-host-eval.f90
A flang/test/Lower/OpenMP/collapse-loop-transform.f90
A flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
A flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
Log Message:
-----------
Redo [flang][OpenMP] Implement collapse for imperfectly nested loops (#208528)
Relands https://github.com/llvm/llvm-project/pull/202435, reverted in
https://github.com/llvm/llvm-project/pull/208456 because it broke
lowering of labeled DO loops under collapse with host-evaluated bounds.
Commit: bf2c381c6f9609428f1bfcc8e572cadefdf7e5c9
https://github.com/llvm/llvm-project/commit/bf2c381c6f9609428f1bfcc8e572cadefdf7e5c9
Author: parya03 <34556720+parya03 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/fp-intrinsics-vector.ll
M llvm/test/CodeGen/ARM/fp16-fullfp16.ll
M llvm/test/CodeGen/ARM/strict-fp-int-promote.ll
Log Message:
-----------
[ARM] Add strict uint to FP conversion handling during operation legalization (#208554)
Currently, strict uint to FP conversions for the ARM backend end up
falling through to software emulation.
This commit allows them to be correctly handled using the corresponding
vcvt instruction.
Commit: 65bd2df84bb9e6ee8513a313840d8e2096c82e4d
https://github.com/llvm/llvm-project/commit/65bd2df84bb9e6ee8513a313840d8e2096c82e4d
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
M llvm/test/Transforms/LoopUnroll/ARM/multi-blocks.ll
M llvm/test/Transforms/LoopUnroll/WebAssembly/basic-unrolling.ll
M llvm/test/Transforms/LoopUnroll/runtime-loop5.ll
M llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll
Log Message:
-----------
[SCEV] Tighten loop guards range check idiom (#210387)
Previously, the idiom matcher derived the clamp range only from the raw
`(LHS + C1) u< C2` form and rejected wrapped or full ranges.
Intersect the derived range with the known unsigned range of `LHSUnknown`.
This can reduce wrapped or full ranges to a usable interval and allows the
matcher to extract clamps in more cases.
Related to https://github.com/llvm/llvm-project/issues/208778
Commit: 53136bd4b70071169edbae1fd9149a9f4fca6c8c
https://github.com/llvm/llvm-project/commit/53136bd4b70071169edbae1fd9149a9f4fca6c8c
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
Log Message:
-----------
[flang][NFC] Remove unreachable legacy FORALL/WHERE lowering code from Bridge.cpp (#210639)
The HLFIR lowering migration left a cluster of legacy, now-unreachable
code in Bridge.cpp behind. None of it has a live caller (FORALL is
lowered by genForallNest; DO CONCURRENT by getConcurrentControl):
- forceControlVariableBinding and the old DoLoopOp-based genFIR(const
parser::ConcurrentHeader &) FORALL-nest lowering (the ConcurrentHeader
is not a PFT evaluation node and is never visited).
- The member genInitializerExprValue, implicitIterationSpace/
explicitIterationSpace, genArrayAssignment, and the NDEBUG-only
isFuncResultDesignator.
- The analyzeExplicitSpace overload set, analyzeExplicitSpacePop, and
addMaskVariable.
- The explicitIterSpace / implicitIterSpace members.
These were the only Bridge.cpp users of the legacy expression lowering
(createSome*Assignment / createSomeInitializerExpression) and of
IterationSpace, so their includes (ConvertExpr.h, IterationSpace.h, and
Runtime/Ragged.h, used only by addMaskVariable) are removed as well.
Assisted-by: AI
Commit: 4158229224381e8038617d9e25b8e152551f5e08
https://github.com/llvm/llvm-project/commit/4158229224381e8038617d9e25b8e152551f5e08
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/test/SemaTemplate/destructor-template.cpp
Log Message:
-----------
[clang] fix a crash for uses of a pseudo-destructor of enum without definition (#210424)
Lookup for the destuctor name in the object type only applies to record
types.
Since this will be backported, there are no release notes.
Fixes #209808
Commit: 272378ef3ce1cbddb37b5c2b1ffe595a123e04fd
https://github.com/llvm/llvm-project/commit/272378ef3ce1cbddb37b5c2b1ffe595a123e04fd
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang][NFC] Extract LookupOverloadedUnaryOp (#210567)
This patch extracts `LookupOverloadedUnaryOp` from
`CreateOverloadedUnaryOp` for consistency with
`LookupOverloadedBinOp`/`CreateOverloadedBinOp`.
Commit: bdfcef52762c746d82326b2e4ce9b2ba470551f4
https://github.com/llvm/llvm-project/commit/bdfcef52762c746d82326b2e4ce9b2ba470551f4
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/PrettyPrinter.h
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/Frontend/ASTConsumers.cpp
M clang/test/AST/ast-print-enum-decl.c
M clang/test/Misc/diag-template-diffing-cxx11.cpp
M clang/test/SemaCXX/static-assert.cpp
Log Message:
-----------
[clang] improve diagnostics for enums (#204682)
This patch makes clang attempt printing enumerator names rather than
C-style cast expressions in more diagnostics (notably static_assert) iff
the value matches an enumerator exactly.
For example, consider a static assertion `static_assert(E ==
TestEnum::B);` where `E` is a constant template argument. Assuming
`(TestEnum)1 == TestEnum::A`, this changes emitted diagnostics as
follows:
```
// old
static assertion failed due to requirement '(TestEnum)1 == TestEnum::B'
// new
static assertion failed due to requirement 'TestEnum::A == TestEnum::B'
```
Commit: b80af9cc2d856e211fa6ac58959e46b5707e9d71
https://github.com/llvm/llvm-project/commit/b80af9cc2d856e211fa6ac58959e46b5707e9d71
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
Log Message:
-----------
[MLIR][XeGPU] Enhance unrolling of convert layout (#209822)
This PR adds rewriteWithRegrouping to unroll ConvertLayoutOp by
extracting at the input inst_data granularity and inserting at the
target inst_data granularity for cancellation during canonicalization.
Assisted by Claude
Commit: 160f9c15b9f1627364d33d56cd7d30fdcb0225ed
https://github.com/llvm/llvm-project/commit/160f9c15b9f1627364d33d56cd7d30fdcb0225ed
Author: Ron Green [NVIDIA] <rogreen at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/lib/Parser/openacc-parsers.cpp
M flang/test/Parser/acc-unparse.f90
Log Message:
-----------
[flang][OpenACC] Allow blanks around ':' in more clause separators (#210446)
Several OpenACC clause parsers glue a keyword directly to its `:`
separator in the token string (`"DEVNUM:"`, `"QUEUES:"`, `"FORCE:"`,
`"ZERO:"`, `"READONLY:"`). A blank in a `TokenStringMatch` pattern is
the only place a blank is accepted between characters of the token, so
these spellings rejected an otherwise valid separating space, e.g.
```fortran
!$acc wait(devnum : 1 : 2, 3)
!$acc loop collapse(force : 2)
!$acc data copyin(readonly : a) create(zero : b)
```
This moves the blank in each token string to before the `:` so zero or
more blanks are accepted on either side of the separator, matching
free-form Fortran's treatment of blanks and the spec grammar (which
writes these with spaces around the `:`). It mirrors the earlier fix for
the gang `static`/`dim`/`num` arguments.
Parser/unparse coverage is added for the spaced spellings of the wait
`devnum`/`queues` argument, the collapse `force` modifier, and the
`zero` and `readonly` data modifiers.
Assisted-by: AI
Commit: cfddcac22dabf01901424b746c94d3b6c9bddc4a
https://github.com/llvm/llvm-project/commit/cfddcac22dabf01901424b746c94d3b6c9bddc4a
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
Log Message:
-----------
[flang][OpenMP] Fix new metadirective-loop-nest.f90 test expectation with collapse changes in #208528 (#210753)
Commit: 331e5641480d24de1951d30ef6b10362ab3b6acf
https://github.com/llvm/llvm-project/commit/331e5641480d24de1951d30ef6b10362ab3b6acf
Author: Bhavesh M <85327930+beamandala at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/EmitC/Transforms/Passes.h
M mlir/include/mlir/Dialect/EmitC/Transforms/Passes.td
M mlir/include/mlir/Dialect/EmitC/Transforms/Transforms.h
M mlir/lib/Dialect/EmitC/Transforms/CMakeLists.txt
A mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
A mlir/test/Dialect/EmitC/mlgo-add-reflection-map.mlir
A mlir/test/Target/Cpp/mlgo-add-reflection-map.mlir
Log Message:
-----------
[mlir][EmitC] Create a pass to add a reflection map to a class (#205464)
This creates the `add-reflection-map` pass to add a reflection map and a
helper method to EmitC classes for runtime field lookup.
Details:
- Add headers to import `map` and `string` if not already present.
- For every `ClassOp`:
- Collect all the `FieldOp`s that contain the attribute whose value we
want as the reflection map key. We ignore all `FieldOp`s that contain an
attribute present in `excludedFieldAttrs` and if there's a `FieldOp`
that neither has the attribute we're looking for and isn't excluded by
the presence of one of the `excludedFieldAttrs`, emit and error.
- Create the reflection map where the key is the value of the attribute
in each applicable `FieldOp`'s attribute dictionary and the value is a
pointer to the field's contents.
- Create a `getBufferForName` method which serves as a getter method for
the reflection map.
Based on PR #150572. Key differences:
- Adds a `excluded-field-attrs` option which is a list of attributes
that if present on a field exclude it from the reflection map.
- Adds a helper method called `getBufferForName` which given a string
key returns a pointer to the field's buffer.
Co-authored-by: Jaden Angella <jadenangela8 at gmail.com>
Commit: 83ba8addf60668a971453eed207f9bfdaa379f97
https://github.com/llvm/llvm-project/commit/83ba8addf60668a971453eed207f9bfdaa379f97
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/asan/CMakeLists.txt
R compiler-rt/lib/asan/asan_ignorelist.txt
M compiler-rt/lib/cfi/CMakeLists.txt
R compiler-rt/lib/cfi/cfi_ignorelist.txt
M compiler-rt/lib/hwasan/CMakeLists.txt
R compiler-rt/lib/hwasan/hwasan_ignorelist.txt
M compiler-rt/lib/msan/CMakeLists.txt
R compiler-rt/lib/msan/msan_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/CMakeLists.txt
A compiler-rt/lib/sanitizer_ignorelists/asan_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/cfi_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/hwasan_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/msan_ignorelist.txt
Log Message:
-----------
[compiler-rt] Move sanitizer ignorelists to sanitizer-ignorelists target (#200518)
This adds a `sanitizer-ignorelists` target to compiler-rt, allowing the
ignorelists to be built independently of the sanitizer runtimes. The
ignorelists are still built by default, but this change is not quite
NFC: when any of the sanitizers are built, all of the ignorelists will
be included (rather than the individual runtime ignorelists being built
with their respective runtimes).
For _why_ we want to be able to build these independently of the
runtimes, see
https://github.com/llvm/llvm-project/pull/195690#issuecomment-4384573223
I did not move the dfsan abilist to this new target because it is not as
straightforward as a copying a static file.
Assisted-by: Claude
rdar://175962064
Commit: d2e70aa7e546f7f2bbcf398b42151e464ce1098e
https://github.com/llvm/llvm-project/commit/d2e70aa7e546f7f2bbcf398b42151e464ce1098e
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
Log Message:
-----------
[lldb] Remove unused method DynamicLoaderDarwin::ImageInfo::FindSegment (#210155)
This method is unused.
Commit: b559a53427f926a603a1755f60d98e06e2b7e1d2
https://github.com/llvm/llvm-project/commit/b559a53427f926a603a1755f60d98e06e2b7e1d2
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/docs/Status/Cxx26Papers.csv
Log Message:
-----------
[libc++][docs] Avoid talking about other implementations on DR status (#210637)
Standard library implementations consistently treat (or will
consistently treat) some LWG papers as Defect Reports that are also
applied to old modes, despite that they are not officially listed as
Defect Reports in WG21 meeting minutes. We used to say "other
implementations (namely MSVC STL and libstdc++) will do the same" for
some of them.
However, such sentences will become outdated soon when other
implementations actually do so. It is possibly better to avoid saying
so, which potentially requires synchronizing our documentation with
other implementations.
Commit: eb7677457c1611c02a6362d9eae043987c02ea25
https://github.com/llvm/llvm-project/commit/eb7677457c1611c02a6362d9eae043987c02ea25
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-readobj/ELF/call-graph-info-warn-malformed.test
M llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-readobj] Print all callgraph sections (#198929)
Ensure that `llvm-readobj` / `llvm-readelf` processes and dumps all
SHT_LLVM_CALL_GRAPH sections present in an object file, rather
than just the first one.
**Motivation:**
Consider this `foo.s` file
```
.pushsection .text, "axG", %progbits, foo
.globl foo
foo:
ret
.pushsection .llvm.callgraph, "?", %llvm_call_graph
.byte 0, 0
.dc.a foo
.quad 0
.popsection
.popsection
.pushsection .text, "axG", %progbits, bar
.globl foo
bar:
ret
.pushsection .llvm.callgraph, "?", %llvm_call_graph
.byte 0, 0
.dc.a bar
.quad 0
.popsection
.popsection
```
`clang -c foo.s && llvm-readelf --elf-output-style=JSON --pretty-print
--call-graph-info foo.o` on that shows that there is only one record
reported because the current implementation just looked at the first
SHT_LLVM_CALL_GRAPH section and then ignored all others. This patch will
address this gap by iterating over all the SHT_LLVM_CALL_GRAPH sections.
Commit: c5204abb4ee22b720528b8c9263d9bf1a5b10d34
https://github.com/llvm/llvm-project/commit/c5204abb4ee22b720528b8c9263d9bf1a5b10d34
Author: Gang Chen <gangc at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/amdgpu-scattered-filter.mir
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/amdgpu-scattered-filter.mir.filter.expected
M llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-filter.mir.filter-out.expected
M llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-filter.mir.filter.expected
A llvm/test/tools/UpdateTestChecks/update_mir_test_checks/amdgpu-filter.test
M llvm/utils/UpdateTestChecks/mir.py
Log Message:
-----------
[llvm-utils][Tools] fix mir-check filter to handle scattered check-lines (#209226)
When filtered output was not consecutive, the auto-update script was not
able to generate working checklines.
Commit: 3ec4c1783b7dd490d68594e4e46fe309c5fbfbeb
https://github.com/llvm/llvm-project/commit/3ec4c1783b7dd490d68594e4e46fe309c5fbfbeb
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/test/tools/llvm-readobj/ELF/reloc-types-aarch64.test
Log Message:
-----------
[PAC][llvm-readobj][ELF][AArch64] Define R_AARCH64_AUTH_TLSDESC_CALL reloc (#199503)
See specification https://github.com/ARM-software/abi-aa/pull/395
Commit: c4026e4350fd4d70692f205aff8764055a8b4ce1
https://github.com/llvm/llvm-project/commit/c4026e4350fd4d70692f205aff8764055a8b4ce1
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libunwind/src/DwarfInstructions.hpp
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[LFI][libunwind] Omit unsuppported stg/za instructions for LFI target (#209392)
Under the LFI target the SVE `za` are not currently supported, and
neither is the `stg` instruction. When included in an LFI program they
cause verification failures due to being unsupported instructions. This
patch omits them from compilation when targeting LFI.
Commit: 33b9e91b76073bdce71951199c7ed0efcf41d14c
https://github.com/llvm/llvm-project/commit/33b9e91b76073bdce71951199c7ed0efcf41d14c
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/LoopUnrollPass.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/test/Other/new-pm-print-pipeline.ll
M llvm/test/Other/print-passes.ll
A llvm/test/Transforms/LoopUnroll/prepare-for-lto.ll
Log Message:
-----------
[LoopUnroll] Add `prepare-for-lto` pass option (#192153)
Expose `UnrollCostEstimator`'s `PrepareForLTO` flag as a pass option for
`LoopUnrollPass` and `LoopFullUnrollPass`. When enabled, loops
containing calls that may be inlined during the LTO post-link phase are
left rolled in the pre-link phase, deferring the decision until LTO
post-link inlining has completed.
Commit: a6b49df4454ae85b8fc500d549d4b614f4c6d535
https://github.com/llvm/llvm-project/commit/a6b49df4454ae85b8fc500d549d4b614f4c6d535
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
M lld/ELF/Symbols.cpp
M lld/test/ELF/version-script-symver-extern.s
M lld/test/ELF/version-script-symver.s
Log Message:
-----------
[ELF] Apply version script patterns to name-versioned definitions by node (#208882)
Like GNU ld, a definition whose name specifies a version (foo@@v1 or
foo at v1) should be governed solely by its own version node, with global
patterns checked before local ones and no exact-over-wildcard
precedence. Also fix #202259 (`local: foo*` does not localize defined
`foo@@v1`)
```
old new (= GNU ld)
symbol foo@@v1
v1 { local: foo; } (own node) localized localized
v2 { local: foo; } (other node) localized exported
v1 { local: foo*; } (own node) exported localized
v1 { local: *; } (own node) exported localized
v1 { global: foo*; local: foo; } localized exported
symbol foo3 at v1
v1 { global: foo3*; local: foo3; } localized exported
v1 { global: *; local: foo3*; } localized exported
```
assignExactVersion now skips name-versioned symbols, and the
synthesized "pat at v1" patterns and includeNonDefault parameters are
removed. Instead, parseSymbolVersion matches the version-less name
(demangled for extern "C++" patterns) against the symbol's own node,
localizing the symbol if a local: pattern matches and no global:
pattern does. An exact pattern still performs a "pat at v1" lookup so that
a pattern matching only foo at v1 is not reported as undefined. "attempt
to reassign" diagnostics no longer apply to name-versioned symbols.
Commit: a04f87fdd9b59c6089bf731c669c6f149208363c
https://github.com/llvm/llvm-project/commit/a04f87fdd9b59c6089bf731c669c6f149208363c
Author: Haowei <haowei at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Reapply "Skipping host target exports during cross-compilation" (#210… (#210496)
This reverts commit 42eb7db188f23625872b6f1d722979a3100d170e. This
reland 3fbb037d03e7ff1ef1cd9156363e895af7caaf98 (#209922).
Under CMake 4+, calling add_library(... SHARED IMPORTED) on a target
platform that lacks dynamic linking support triggers a fatal error. This
becomes an issue when building LLVM and runtimes for baremetal targets
like armv6m-none-eabi. This patch adds the option
"LLVM_OMIT_EXPORTS_FROM_CONFIG" in LLVM. When used in sub builds like
LLVM runtimes, it makes CMake to skip including the LLVM and Clang
exports. This mitigates the CMake 4 errors on baremetal runtimes.
42eb7db188f23625872b6f1d722979a3100d170e originally
apply this flag on all runtimes build and causing issues on runtimes
like intel-sycl-gpu, amdgpu-offload-ubuntu-22-cmake-build-only.
This PR only set this flag when the target platform lacks shared library
support.
Commit: 1020bbfc6e9e93f304ddb1329e2fa58ef26831c5
https://github.com/llvm/llvm-project/commit/1020bbfc6e9e93f304ddb1329e2fa58ef26831c5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lld/test/ELF/amdgpu-abi-version-err.s
M lld/test/ELF/amdgpu-abi-version.s
M lld/test/ELF/amdgpu-duplicate-sym.s
M lld/test/ELF/amdgpu-elf-flags-err.s
M lld/test/ELF/amdgpu-elf-flags.s
M lld/test/ELF/amdgpu-globals.s
M lld/test/ELF/amdgpu-relocs.s
M lld/test/ELF/amdgpu-relocs2.s
M lld/test/ELF/amdgpu-tid.s
M lld/test/ELF/emulation-amdgpu.s
M lld/test/ELF/lto/amdgcn-oses.ll
A lld/test/ELF/lto/amdgpu.ll
Log Message:
-----------
lld: Migrate amdgpu tests to use subarch triples (#210114)
Commit: 7b9ab3a48198aa6bb2130e4302b0dcb66e980f90
https://github.com/llvm/llvm-project/commit/7b9ab3a48198aa6bb2130e4302b0dcb66e980f90
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn build] Port 2a33792a2ec1 (#210772)
Commit: 55e5cc2ab21be2ef375e5235a961def0e27a2e1a
https://github.com/llvm/llvm-project/commit/55e5cc2ab21be2ef375e5235a961def0e27a2e1a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
M llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
M llvm/test/Analysis/DotMachineCFG/AMDGPU/functions.mir
M llvm/test/Analysis/DotMachineCFG/AMDGPU/irreducible.mir
M llvm/test/Analysis/Lint/const-store.ll
M llvm/test/Analysis/MemorySSA/ptr-const-mem.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-2.ll
M llvm/test/Assembler/amdgpu-image-atomic-attributes.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs-err.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.offset-split.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_dpp_lds_expected_active_lanes.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
M llvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
M llvm/test/CodeGen/AMDGPU/coexec-rewrite-mfma.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-flat-scratch-svs.mir
M llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr-hsa.ll
M llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr-rel32.mir
M llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr.ll
M llvm/test/CodeGen/AMDGPU/expand-variadic-call.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir
M llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
M llvm/test/CodeGen/AMDGPU/issue196582-late-codegenprepare-crash-non-po2.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load-exported.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-calls.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-constants.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-control-flow.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memops.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-p7-in-memory.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
M llvm/test/CodeGen/AMDGPU/mcinstlower-external-symbol-reloc.mir
M llvm/test/CodeGen/AMDGPU/noop-shader-O0.ll
M llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll
M llvm/test/CodeGen/AMDGPU/packed_shl64_combine.ll
M llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir
M llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
M llvm/test/CodeGen/AMDGPU/rewrite-out-arguments-2.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir
M llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwwmregs-dbg-noreg.mir
M llvm/test/CodeGen/AMDGPU/strict_fptrunc_bf16.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/v_mov_b64-isel.ll
M llvm/test/CodeGen/AMDGPU/vgpr-setreg-pred-block.mir
M llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll
M llvm/test/CodeGen/Generic/bfloat-op.ll
M llvm/test/CodeGen/Generic/bfloat.ll
M llvm/test/CodeGen/Generic/half-op.ll
M llvm/test/CodeGen/Generic/half.ll
M llvm/test/CodeGen/Generic/live-debug-label.ll
M llvm/test/CodeGen/MIR/AMDGPU/empty-custom-regmask.mir
M llvm/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
M llvm/test/CodeGen/MIR/AMDGPU/intrinsics.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-invalid-fixed-stack.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-invalid-stack.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index-no-stack.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-frame-index2.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
M llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/lr-split-flag.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-dynlds-align-invalid-case.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-register-parse-error1.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-register-parse-error2.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-frame-offset-reg-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-frame-offset-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-scratch-rsrc-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-stack-ptr-offset-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-scratch-rsrc-reg-reg-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-stack-ptr-offset-reg-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi-def.mir
M llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir
M llvm/test/CodeGen/MIR/AMDGPU/noconvergent-invalid.mir
M llvm/test/CodeGen/MIR/AMDGPU/noconvergent.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-empty-lanemask.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-invalid-lanemask.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-missing-lparen.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-missing-rparen.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu_missing_operand_crash.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_missing_operand_crash.mir
M llvm/test/CodeGen/MIR/AMDGPU/sgpr-for-exec-copy-invalid-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-invalid.mir
M llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs-not-a-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir
M llvm/test/CodeGen/MIR/AMDGPU/stack-id-assert.mir
M llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-flags.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/vgpr-for-agpr-copy-invalid-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/wwm-reserved-regs-invalid-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/wwm-reserved-regs-not-a-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/wwm-reserved-regs.mir
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_internalize.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_mem_intrinsics.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-3d-grid.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-contiguous-counters.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-instrumentation.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-uniform-counters.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-wave32.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-wave64.ll
M llvm/test/Instrumentation/InstrProfiling/platform.ll
M llvm/test/LTO/AMDGPU/closed-world-assumption.ll
M llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-entry-block.mir
M llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
M llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir
M llvm/test/MachineVerifier/AMDGPU/writelane_m0.mir
M llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir
M llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir
M llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir
M llvm/test/MachineVerifier/stack-protector-offset.mir
M llvm/test/ThinLTO/AMDGPU/force-import-all.ll
M llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll
M llvm/test/Transforms/Attributor/memory_locations_gpu.ll
M llvm/test/Transforms/Attributor/reduced/openmp_opt_constant_type_crash.ll
M llvm/test/Transforms/Attributor/value-simplify-gpu.ll
M llvm/test/Transforms/FunctionAttrs/make-buffer-rsrc.ll
M llvm/test/Transforms/IndVarSimplify/AMDGPU/addrspace-7-doesnt-crash.ll
M llvm/test/Transforms/InstCombine/AMDGPU/phi-with-incoming-from-load.ll
M llvm/test/Transforms/InstCombine/AMDGPU/select-from-load.ll
M llvm/test/Transforms/LICM/AMDGPU/buffer-rsrc-ptrs.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/adjust-alloca-alignment.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/dont-adjust-globalobj-alignment.ll
M llvm/test/Transforms/LoopLoadElim/pr46854-adress-spaces.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-icmpzero-mixed-ptr-width.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/scev-mul-expansion-cost.ll
M llvm/test/Transforms/OpenMP/add_attributes_amdgcn.ll
M llvm/test/Transforms/OpenMP/barrier_removal.ll
M llvm/test/Transforms/OpenMP/indirect_call_kernel_info_crash.ll
M llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll
M llvm/test/Transforms/OpenMP/spmdization_kernel_env_dep.ll
M llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
M llvm/test/Transforms/PGOProfile/amdgpu-disable-value-profiling.ll
M llvm/test/Transforms/PhaseOrdering/varargs.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/lower-gep.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/pr23975.ll
M llvm/test/Transforms/StructurizeCFG/hoist-zerocost-nested.ll
M llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop-inseltpoison.ll
M llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_no_merge_comments.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_no_merge_comments.ll.expected
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/source-lines.ll
M llvm/test/tools/llvm-objdump/Offloading/Inputs/binary.yaml
M llvm/test/tools/llvm-objdump/Offloading/coff.test
M llvm/test/tools/llvm-objdump/Offloading/elf.test
Log Message:
-----------
AMDGPU: Migrate more tests to amdgpu triples (#210113)
These were missed in previous conversions for whatever reason.
Some are new tests added after I did the bulk migration, some
are special cases.
Commit: 6665357608334ed956517d8aa3df472b0553e50d
https://github.com/llvm/llvm-project/commit/6665357608334ed956517d8aa3df472b0553e50d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
M llvm/test/TableGen/RuntimeLibcallEmitter-bad-system-library-entry-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter-nested-predicates-error.td
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (#210648)
Rename to avoid confusing partial name collisions in future changes.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: f010423d3dfac774c6157686b6f14fb8d357c715
https://github.com/llvm/llvm-project/commit/f010423d3dfac774c6157686b6f14fb8d357c715
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/mem_map_linux.cpp
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/error_info_test.cpp
Log Message:
-----------
[scudo] Remove dead code and other small cleanups. (#210454)
Some dead code from the error info refactor is still around, so delete
that. Also cleanup spelling and spacing.
Modified the tests to use TestOnly functions so it's clear what is
actually used.
Commit: dd0b48c7e7988fed5f08e93ea3c291ca8d5f99a1
https://github.com/llvm/llvm-project/commit/dd0b48c7e7988fed5f08e93ea3c291ca8d5f99a1
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-foldable-nw.mlir
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
Log Message:
-----------
[OpenACC] Support dynamic worker-private shared memory (#210770)
Use the maximum ThreadY width when the runtime worker count prevents
exact static sizing.
Commit: a01ff35d0375d8a2a558c44ef73583da58dfa505
https://github.com/llvm/llvm-project/commit/a01ff35d0375d8a2a558c44ef73583da58dfa505
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libunwind/src/DwarfInstructions.hpp
M libunwind/src/DwarfParser.hpp
A libunwind/test/ra_sign_state.pass.cpp
Log Message:
-----------
[libunwind] Fix exposure of UNW_AARCH64_RA_SIGN_STATE through _Unwind_GetGR (#209947)
The pseudo register was previously hacked in under kRegisterIsUndefined, leaving it in a state that was only accessible from within the unwinder itself.
To fix this, allowing external access to the state (and therefore tests!), we invent a new register location kRegisterIsPseudo to record the additional state that the register has been defined by a .cfi_negate_ra_state opcode having been executed.
Commit: 1df8a2c9aac26211fb931f59d2f0489ebd506ad1
https://github.com/llvm/llvm-project/commit/1df8a2c9aac26211fb931f59d2f0489ebd506ad1
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/asan/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/cfi/BUILD.gn
A llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_ignorelists/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/test/asan/BUILD.gn
Log Message:
-----------
[gn] port 83ba8addf6 (sanitizer_ignorelists) (#210776)
Commit: 094a7278f66691c8e0d910c803966f5c2e1f6ce5
https://github.com/llvm/llvm-project/commit/094a7278f66691c8e0d910c803966f5c2e1f6ce5
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
Log Message:
-----------
[AMDGPU] Calculate div/rem with frcp more efficiently (#210684)
Integer division q = a/b can be implemented by fp reciprocal with:
fq = fa * recip(fb)
fq is truncated to produce q. Due to fp rounding and reciprocal accuracy
issues fq can be too small and truncation can produce a value too small
by one.
If abs(a)<=0x400000, this underestimate can be guarded more efficiently
by calculating:
fq=fa+1ulp/b
If abs(a)<=0x400000, adding 1 ulp will increase a by at most 0.5, so the
calculated q will be the same. Adding 1ulp can be done with one integer
add.
This change is analogous to the change done in
https://github.com/llvm/llvm-project/pull/204950 but in
AMDGPUISelLowering.cpp.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: a8fd45114023f0cb332b2c0fcc5a14f4c4de8182
https://github.com/llvm/llvm-project/commit/a8fd45114023f0cb332b2c0fcc5a14f4c4de8182
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/merge-across-side-effects.ll
Log Message:
-----------
[LSV] Don't vectorize load chains across ordered atomics (#208631)
When the LoadStoreVectorizer finds a chain of loads to merge into a
single vectorized load, it hoists all of the constituent loads up to the
location of the first load in the chain.
This is obviously not safe if there are any may-alias stores in the
middle of the chain. But it's *also* not safe if there are `acquire`
*loads* in the middle of the chain.
There's a similar problem with stores. A chain of stores is vectorized
by merging them all into the final store in the chain. This is not safe
if there is an intervening `release` store.
Commit: 59e677629e4398428dbefecba8062fb89955f1f3
https://github.com/llvm/llvm-project/commit/59e677629e4398428dbefecba8062fb89955f1f3
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
Log Message:
-----------
[llvm][AArch64] Refactor emitPACCFI into decoratePACWithCFI/emitAUTCFI. NFC (#209948)
Commit: 365a64ac9353032b4de330ac6f6ce48bd1b53846
https://github.com/llvm/llvm-project/commit/365a64ac9353032b4de330ac6f6ce48bd1b53846
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-ldst-one.c
A clang/test/CodeGen/AArch64/neon/store.c
M clang/test/CodeGen/AArch64/poly64.c
M clang/test/CodeGen/arm-neon-vst.c
Log Message:
-----------
[CIR][AArch64] Upstream store (vst1_*/vst1q_*) NEON builtins (#209347)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for store intrinsics (`vst1_*`/`vst1q_*`)
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#store)
Port tests:
- `clang/test/CodeGen/AArch64/neon-intrinsics.c`
- `clang/test/CodeGen/AArch64/neon-ldst-one.c`
- `clang/test/CodeGen/AArch64/poly64.c`
- `clang/test/CodeGen/arm-neon-vst.c`
to `clang/test/CodeGen/AArch64/neon/store.c`
Commit: 95cabd6644eae6c1622750d78ebc90e68fe0e122
https://github.com/llvm/llvm-project/commit/95cabd6644eae6c1622750d78ebc90e68fe0e122
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/test/hwasan/BUILD.gn
Log Message:
-----------
[gn] hwasan follow-up to 1df8a2c9aac26211 (#210781)
Commit: d139c824e997f0b0be3a3578226f2a2e6352e251
https://github.com/llvm/llvm-project/commit/d139c824e997f0b0be3a3578226f2a2e6352e251
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
Log Message:
-----------
[MLIR][XeGPU] Add local forward layout propagation (#208932)
Backward layout propagation only assigns layouts to values that are
(transitively) consumed by an anchor op. A value whose only consumer is,
e.g., the next iteration of a loop is left without a layout.
Add a local forward-fill step, run after the backward materialization
walk in propagateLayouts(): it visits ops in producer-first order and,
for any un-laid-out vector result, infers the layout from the op's
already-known operand layouts via a new
inferResultLayoutFromSourceForNonAnchorOp dispatcher (covering
elementwise, transpose, and shape_cast; other ops are left as TODO),
then stamps it with setDistributeLayoutAttr.
---------
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: 9208fc3409e3afff53338b0fdaf22319752949db
https://github.com/llvm/llvm-project/commit/9208fc3409e3afff53338b0fdaf22319752949db
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/source/Protocol/MCP/Server.cpp
M lldb/tools/lldb-mcp/CMakeLists.txt
M lldb/tools/lldb-mcp/Multiplexer.cpp
M lldb/tools/lldb-mcp/Multiplexer.h
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/unittests/tools/lldb-mcp/MultiplexerTest.cpp
Log Message:
-----------
[lldb-mcp] Host managed debug sessions in-process (#210450)
Let a client create and own debug sessions with session_create and
session_close. Rather than spawn a separate lldb per session, lldb-mcp
hosts them in its own process, communicating over a loopback socket to
keep things uniform with external lldb instances.
The benefits of this approach are:
- There is no child-process machinery, so nothing needs to be spawned
and cleaned up.
- It works without the need for an external lldb binary.
- It avoids the deadlock by reading stdin through a raw fd instead of
the FILE* stdio path that previously hung the Debugger constructor
contending on the REPL's stdin lock.
- The architecture stays uniform between in-process and external
sessions.
The trade-off is no isolation, so an LLDB crash takes down lldb-mcp
along with its proxied connections.
Assisted-by: Claude
Commit: 30c0454414ec043dc50d2690f72a12719ab89d6c
https://github.com/llvm/llvm-project/commit/30c0454414ec043dc50d2690f72a12719ab89d6c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
A llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag-errors.td
A llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag.td
M llvm/utils/TableGen/Basic/CMakeLists.txt
A llvm/utils/TableGen/Basic/PredicateExpanderDag.cpp
A llvm/utils/TableGen/Basic/PredicateExpanderDag.h
M llvm/utils/TableGen/Basic/RuntimeLibcalls.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcalls.h
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.cpp
Log Message:
-----------
RuntimeLibcalls: Reuse AssemblerPredicate's operators for libcalls (#210651)
Allow specifying RuntimeLibcall's availability in terms of individual
triple properties composed with logical operators.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 6fcf3b331fc83b817bbbe6c255fb2a75fab381f1
https://github.com/llvm/llvm-project/commit/6fcf3b331fc83b817bbbe6c255fb2a75fab381f1
Author: Lucas Ly Ba <hi at lucaslyba.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/lower-table-based-log2-basics.ll
Log Message:
-----------
[AggressiveInstCombine] Emit branchless MSB index for de Bruijn ctlz tables (#210633)
When the de Bruijn table's zero element is the bit width minus one it
computes the most significant bit index. We can do that without a branch
using ~ctlz(X) & (InputBits - 1), so the select is no longer needed.
Alive: https://alive2.llvm.org/ce/z/9WsUXd
Fixes #208989
Commit: 3d638ea31e8efee04e307e74e29dc80d5585dd27
https://github.com/llvm/llvm-project/commit/3d638ea31e8efee04e307e74e29dc80d5585dd27
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
Log Message:
-----------
[mlir][xegpu] Change inst-data of load/load_matrix to fit lane layout (#209661)
The consumer layout may have multiple distribution of lane data, but
load_gather/load_matrix only allow one single distribution, change their
inst_data according to the single distribution of lane data.
Commit: afb54cc942d5fccf63f5594a6808f21eb179db6f
https://github.com/llvm/llvm-project/commit/afb54cc942d5fccf63f5594a6808f21eb179db6f
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Transforms/Scalar.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/test/Transforms/LoopUnroll/RISCV/runtime-unroll-max-trip-count.ll
Log Message:
-----------
[LoopUnroll] Remove `Count` from `UnrollingPreferences` (NFC) (#203413)
`UnrollingPreferences` is a way for targets to specify their preferences
to the unroller. The unroller uses `UnrollingPreferences` to guide what
kinds of unrolling to consider while also co-opting it to encode the
specific kind of unrolling it's chosen to attempt.
One preference targets can set is the `Count`, or the number of times
the loop in question will be unrolled:
```
/// A forced unrolling factor (the number of concatenated bodies of the
/// original loop in the unrolled loop body). When set to 0, the unrolling
/// transformation will select an unrolling factor based on the current cost
/// threshold and other factors.
unsigned Count;
```
However, there are no in-tree uses of this functionality, and it does
not work. [Loop
peeling](https://github.com/llvm/llvm-project/blob/112fb2f79d7983be203957cad6b148865182ed47/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1072)
([2](https://github.com/llvm/llvm-project/blob/112fb2f79d7983be203957cad6b148865182ed47/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1149)),
[pragma
unrolling](https://github.com/llvm/llvm-project/blob/112fb2f79d7983be203957cad6b148865182ed47/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1090),
[full
unrolling](https://github.com/llvm/llvm-project/blob/112fb2f79d7983be203957cad6b148865182ed47/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1115),
[upper-bound
unrolling](https://github.com/llvm/llvm-project/blob/112fb2f79d7983be203957cad6b148865182ed47/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1137),
[partial
unrolling](https://github.com/llvm/llvm-project/blob/112fb2f79d7983be203957cad6b148865182ed47/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1162),
and [runtime
unrolling](https://github.com/llvm/llvm-project/blob/112fb2f79d7983be203957cad6b148865182ed47/llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp#L1202)
all override the value of `UP.Count` that targets would've set. This
appears to have been broken since LLVM 3.9 days as a result of
ea2aef4a1d4beded20033fa4fc223936c7ffe5d8.
This PR removes `Count` from `UnrollingPreferences` and instead encodes
it as a return value of the `computeUnrollCount()` family of functions.
If [out-of-tree targets want to begin setting
`Count`](https://github.com/llvm/llvm-project/pull/185979#discussion_r3022857799),
their best bet is likely to use
[`llvm.loop.unroll.count`](https://llvm.org/docs/LangRef.html#llvm-loop-unroll-count-metadata).
Commit: 8632f54ae56373f52c02b9476bc34d71d0331502
https://github.com/llvm/llvm-project/commit/8632f54ae56373f52c02b9476bc34d71d0331502
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
Log Message:
-----------
[AMDGPU] Testing cleanup in prep for true16 test upstreaming (#209888)
Some small cleanup of a few tests in preparation for True16 test
upstreaming, synchronizes with cleanups that already happened downstream
Commit: 3f2e25a9e62a3e71aa70ae28e1d6218ef6d05318
https://github.com/llvm/llvm-project/commit/3f2e25a9e62a3e71aa70ae28e1d6218ef6d05318
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes dd0b48c (#210779)
This fixes dd0b48c7e7988fed5f08e93ea3c291ca8d5f99a1.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=dd0b48c7e7988fed5f08e93ea3c291ca8d5f99a1
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 47593d5d17f86e288e3a4f2ef8c6f874d7161925
https://github.com/llvm/llvm-project/commit/47593d5d17f86e288e3a4f2ef8c6f874d7161925
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/tools/spirv-tools/CMakeLists.txt
Log Message:
-----------
[SPIRV] SPIRVTools custom targets should not have executable suffix (#210773)
This looks like it was likely a copy paste mistake. When we invoke the
binary via the cmake command yes we need the executable suffix. but the
custom target name is the same across all OSes.
This bug manifests itself on Windows when you add
-DLLVM_INCLUDE_SPIRV_TOOLS_TESTS=ON to the cmake.
Commit: 33acb625bb0c262aaa886b4101994e81c14fbdfb
https://github.com/llvm/llvm-project/commit/33acb625bb0c262aaa886b4101994e81c14fbdfb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/amdgpu-toolchain.c
Log Message:
-----------
[Clang][AMDGPU] Search both amdgcn and amdgpu libraries again (#210767)
Summary:
Extension to https://github.com/llvm/llvm-project/pull/209770/, the
previous one did not cover all cases we search paths, it only did the
relative paths for a few cases. This adds it to the other case, should
be the same logic and motivation.
Commit: 0de567b62a5b33f861314f3faa6511ee2e43ddd6
https://github.com/llvm/llvm-project/commit/0de567b62a5b33f861314f3faa6511ee2e43ddd6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/Lanai/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Port LegacyPM regalloc Refactoring
This didn't seem to make it into the original CodeGen NewPM patches, so
add it now to keep things consistent. This also removes duplicate
StackSlotColoring passes.
Originally done for the LegacyPM in
c9122ddef5213fbdd2d82c473a74e1742010f62f.
Reviewers: arsenm, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/210760
Commit: c9a17d3e4690b50d68124f7207a1035237bb5c16
https://github.com/llvm/llvm-project/commit/c9a17d3e4690b50d68124f7207a1035237bb5c16
Author: Alex Strelnikov <strel at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libc/src/stdio/linux/stdin.cpp
M libc/src/stdio/linux/stdout.cpp
Log Message:
-----------
[libc] Fix standard streams variable name typos in overlay mode. (#210728)
These appear to be a couple of copy/paste misses from #187522.
Commit: 7c672b6eff42b4aa6d1e2f8ef2b24a344d57b14b
https://github.com/llvm/llvm-project/commit/7c672b6eff42b4aa6d1e2f8ef2b24a344d57b14b
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][RuntimeLibcalls] Fix 30c0454414ec043dc50d2690f72a12719ab89d6c (#210796)
Add PredicateExpanderDag.cpp to the glob. Avoid adding
PredicateExpanderDag.h and instead switch to a glob to include all
headers. We can't glob the .cpp files due to a circular dep when
including TargetFeaturesEmitter.cpp.
Commit: d903936a03eba0eb1f96b96ec0a956de0bfaaf47
https://github.com/llvm/llvm-project/commit/d903936a03eba0eb1f96b96ec0a956de0bfaaf47
Author: Chris Apple <cja-private at pm.me>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M compiler-rt/test/rtsan/deduplicate_errors.cpp
M compiler-rt/test/rtsan/lit.cfg.py
M compiler-rt/test/rtsan/unrecognized_flags.cpp
Log Message:
-----------
[NFC] [rtsan] Cleanup env for lit tests (#210395)
This matches the style of our other tests, and may make it easier for
others to maintain downstream if they override the `env_rtsan_opts`
variable with special platform specific options.
Commit: 5cf3b68e2f14e6b08ef09459b0613ddbb6b82054
https://github.com/llvm/llvm-project/commit/5cf3b68e2f14e6b08ef09459b0613ddbb6b82054
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/include/lldb/Interpreter/OptionValue.h
M lldb/include/lldb/Interpreter/OptionValueArch.h
M lldb/include/lldb/Interpreter/OptionValueArray.h
M lldb/include/lldb/Interpreter/OptionValueBoolean.h
M lldb/include/lldb/Interpreter/OptionValueChar.h
M lldb/include/lldb/Interpreter/OptionValueDictionary.h
M lldb/include/lldb/Interpreter/OptionValueEnumeration.h
M lldb/include/lldb/Interpreter/OptionValueFileColonLine.h
M lldb/include/lldb/Interpreter/OptionValueFileSpec.h
M lldb/include/lldb/Interpreter/OptionValueFileSpecList.h
M lldb/include/lldb/Interpreter/OptionValueFormat.h
M lldb/include/lldb/Interpreter/OptionValueFormatEntity.h
M lldb/include/lldb/Interpreter/OptionValueLanguage.h
M lldb/include/lldb/Interpreter/OptionValuePathMappings.h
M lldb/include/lldb/Interpreter/OptionValueProperties.h
M lldb/include/lldb/Interpreter/OptionValueRegex.h
M lldb/include/lldb/Interpreter/OptionValueSInt64.h
M lldb/include/lldb/Interpreter/OptionValueString.h
M lldb/include/lldb/Interpreter/OptionValueUInt64.h
M lldb/include/lldb/Interpreter/OptionValueUUID.h
M lldb/source/Interpreter/OptionValue.cpp
M lldb/source/Interpreter/OptionValueBoolean.cpp
M lldb/source/Interpreter/OptionValueFileSpecList.cpp
M lldb/source/Interpreter/OptionValueFormatEntity.cpp
M lldb/source/Interpreter/OptionValueProperties.cpp
Log Message:
-----------
[lldb] Avoid data race when clearing an OptionValue (#208471)
The clear function guarded by the internal mutex.
This happens when we have to threads one trying to set a value and the
other reseting the value.
The derived classes are forced to implement the `ClearImpl`. and base
`OptionValue` hold the mutex and calls `ClearImpl` on clear.
Commit: 01197ee9ad4c9625df1557c5756ba23e8b180d60
https://github.com/llvm/llvm-project/commit/01197ee9ad4c9625df1557c5756ba23e8b180d60
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][acc] Lower per-thread array reductions correctly (#210453)
Lowering an acc.reduction_accumulate_array to a per-element
gpu.all_reduce is only valid when each thread owns its own accumulator
copy. This was inferred from the memref's static size, which was wrong
for dynamically-shaped accumulators and for storage seen through
descriptor or strided views.
Per-thread accumulators that fit the local stack budget are materialized
in stack memory; anything larger, or gang-scoped, is materialized in
shared memory. Classify from that: a stack alloca (or a view over one)
within the budget is per-thread, a shared allocation is block-shared,
and a dynamically-shaped accumulator is classified from its par_dims.
Materialization and predication follow the same rule, and writes to a
privatization are recognized through views/casts so per-thread setup
runs on every owning thread.
Commit: ba03e56adffde7b3f6908a38d3d5ea34324b8ad4
https://github.com/llvm/llvm-project/commit/ba03e56adffde7b3f6908a38d3d5ea34324b8ad4
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
Log Message:
-----------
[SPIR-V] Simplify lookup of llvm.global.annotations using getNamedGlobal (#210722)
Commit: f34b933ff76cbc9d02d9b68b4b0c6ee7996d005c
https://github.com/llvm/llvm-project/commit/f34b933ff76cbc9d02d9b68b4b0c6ee7996d005c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Log Message:
-----------
[NewPM] Only add passes after optimized RegAlloc if a target enables it
The legacyPM allows for returning a boolean from
addRegAssignAndRewriteOptimized, and if set to false, some extra passes
at the end of addOptimizedRegAlloc are not added. Before this patch, the
NewPM would only omit adding these passes if an error was thrown, which
gets propagated all the way back up and prevents compilation.
This is necessary behavior for targets that do not perform register
allocation, like WebAssembly, that will otherwise crash in places like
MachineLICM.
Reviewers: arsenm, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/210792
Commit: f36452f40e849d8e4947689a3bd8252ad5bbbde5
https://github.com/llvm/llvm-project/commit/f36452f40e849d8e4947689a3bd8252ad5bbbde5
Author: Chris Apple <cja-private at pm.me>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M compiler-rt/test/rtsan/lit.cfg.py
Log Message:
-----------
[rtsan] Clean up rtsan_opts default variable (#210803)
Follow on from https://github.com/llvm/llvm-project/pull/210395.
Some systems didn't like this empty variable when they appended to it
later (and the original variable that we had as a dummy was unsupported
by rtsan)
https://github.com/llvm/llvm-project/pull/210395/changes#diff-5f39176422b87f314a683584d1cabe670b4c1e3942d65bb2b5ce4d0623c40560L7
Change this to another inconsequential value so we can append
`:other_options` to it easily later in the file
Commit: c770d924484d37c6a4ee7a35e90f053b0d391e2a
https://github.com/llvm/llvm-project/commit/c770d924484d37c6a4ee7a35e90f053b0d391e2a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/TableGen/RuntimeLibcallEmitter-predicate-dag.td
M llvm/utils/TableGen/Basic/PredicateExpanderDag.cpp
M llvm/utils/TableGen/Basic/PredicateExpanderDag.h
Log Message:
-----------
TableGen: Parenthesize negated predicate-dag leaves with operators (#210652)
Allows writing more general expressions in the predicate code.
Previously
not ("a == b") would be emitted as !a == b.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8d5788cae76da2b82d1330fb070f622cda870adb
https://github.com/llvm/llvm-project/commit/8d5788cae76da2b82d1330fb070f622cda870adb
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/test/std/ranges/range.adaptors/range.elements/iterator/base.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.elements/sentinel/ctor.convert.pass.cpp
Log Message:
-----------
[libc++][ranges][NFC] Format a couple of `elements_view` tests (#210687)
As a pre-requisite for https://github.com/llvm/llvm-project/pull/193891
Commit: be0586d81e39c051f12d6c231f6eff32a99ded60
https://github.com/llvm/llvm-project/commit/be0586d81e39c051f12d6c231f6eff32a99ded60
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/unittests/Symbol/JSONSymbolTest.cpp
M lldb/unittests/Symbol/SymbolTest.cpp
Log Message:
-----------
[lldb][NFC] Use make_shared when creating Sections (#210196)
Commit: 429c88d37f1f02e68ebc1fc7b0da4511ce6407e3
https://github.com/llvm/llvm-project/commit/429c88d37f1f02e68ebc1fc7b0da4511ce6407e3
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows: Add missing checkouts when using validate-release-version (#210471)
We need to make sure all composite workflows we use are checked out
manually from th egit repo.
Commit: 81112dd333caaedfb5eea1a2014e50e535a0125a
https://github.com/llvm/llvm-project/commit/81112dd333caaedfb5eea1a2014e50e535a0125a
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/fold-imm-pk64.mir
Log Message:
-----------
[AMDGPU] Fold immediate from REG_SEQUENCE (imm, IMPLICIT_DEF) (#210787)
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: 5f2d043abb6874e3c2be61b28131d9863c428b36
https://github.com/llvm/llvm-project/commit/5f2d043abb6874e3c2be61b28131d9863c428b36
Author: Ankit Kumar Tiwari <141545455+ankit-cybertron at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/AArch64/vecreduce-mul-constant-fold.ll
Log Message:
-----------
[SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (#210126)
Follows up on #207560 (VECREDUCE_ADD).
Adds constant folding for `ISD::VECREDUCE_MUL` in
`SelectionDAG::FoldConstantArithmetic` when the input is a
`BUILD_VECTOR` of integer constants.
Fixes #209110
Commit: f1073034a030a09bf0a29607aa0bee4430b31b97
https://github.com/llvm/llvm-project/commit/f1073034a030a09bf0a29607aa0bee4430b31b97
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Use SchedulingPoint for pointing to scheduling front (#208373)
The scheduling point is the last instruction scheduled. If this is the
first time scheduling and we are scheduling top-down then we may need to
point before the beginning of the basic block. This is why a
BasicBlock::iterator does not work well here.
Until now we were using the first top-most instruction for this, which
is inconsistent.
Commit: e92e1787bd87ab1fb631f1dc242308f7bede9b16
https://github.com/llvm/llvm-project/commit/e92e1787bd87ab1fb631f1dc242308f7bede9b16
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/CIR/LoweringHelpers.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/test/CIR/CodeGen/anonymous-nested-init.c
M clang/test/CIR/CodeGen/record-with-padded-union.cpp
Log Message:
-----------
[CIR] Fixup conversion of const unions/structs of unions (#210146)
Now that we represent a union as all of the fields, it is possible for
the non-storage type to be initialized, so the fact that we were
lowering the types as storage in 1 way for the constant type, but
filling it with our actual value was wrong.
This patch makes sure we create a literal struct type for LLVM for union
types where they don't match, which generally matches the OGCG
implementation/output.
I've also generalized the work for the FAM to do this conversion, and
moved it to LoweringHelpers, so that our ConstantRecord lowering can use
it too.
This patch fixes up a couple uses of std::string initializers where they
fit in the SSO.
Note: I was assisted in this by Claude Opus. I did plenty of self-review
on this as it was being generated, and a post-review, but hopefully I
didn't miss anything.
Commit: 66af87fd8b49cb44eabb9ccd08de77027ce3c90e
https://github.com/llvm/llvm-project/commit/66af87fd8b49cb44eabb9ccd08de77027ce3c90e
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libc/src/stdlib/linux/CMakeLists.txt
M libc/src/stdlib/linux/realpath.cpp
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][realpath] Validate path components (#209370)
This PR updates `realpath` to validate paths and return `ENOTDIR` or
`ENOENT` according to
https://pubs.opengroup.org/onlinepubs/9699919799/functions/realpath.html.
Commit: 4479f3397f827291c51698fbaa685b1a9493467a
https://github.com/llvm/llvm-project/commit/4479f3397f827291c51698fbaa685b1a9493467a
Author: Ken Matsui <26405363+ken-matsui at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/TCE.h
Log Message:
-----------
[clang][TCE] Fix ordering of OpenCL address space mappings (#210244)
opencl_global_device and opencl_global_host are defined after
opencl_generic in LangAS, but commit
8d27be8dbaffce0519ac41173d51923fc2524b1b inserted them before
opencl_generic in the TCE address space map.
Fix the order to restore the intended mappings.
Commit: 3d0f18b6210e8cbc9fa04bca91581e25371c5b14
https://github.com/llvm/llvm-project/commit/3d0f18b6210e8cbc9fa04bca91581e25371c5b14
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/source/Commands/CommandObjectScripting.cpp
Log Message:
-----------
[lldb/script] Only auto-open the generator template in an editor when interactive (#210808)
`scripting extension generate` always launched the external editor after
writing the template to disk, which is fine when a user types the
command at the prompt but is undesirable when the command runs from the
test suite, a headless driver, or a script -- each invocation spawns an
editor that nobody sees.
Extend `--open-editor` (`-e`) so that the default (`eLazyBoolCalculate`)
now dispatches on `CommandReturnObject::GetInteractive()`, which
`SBCommandInterpreter::HandleCommand` explicitly clears. That's the
accurate signal even when the process' stdin is a TTY inherited from the
parent (e.g. `lldb-dotest` invoked from a terminal). `--open-editor yes`
and `--open-editor no` still force the behavior explicitly.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 95649d680b1374716e68b34940ec11518ecc79d8
https://github.com/llvm/llvm-project/commit/95649d680b1374716e68b34940ec11518ecc79d8
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGenCUDA/builtins-nvvm-atomic.cu
Log Message:
-----------
[CIR][CUDA] Add support for NVVM binary atomic builtins (#210534)
Adds codegen support for the following NVVM binary atomic builtins: add,
sub, and, or, xor, min, umin, max and max.
These are lowered to the corresponding CIR `cir.atomic.fetch` operations
and subsequently lowered to LLVM `atomicrmw` instructions.
Commit: 4c88bd7840aa220ac8b19c0c73e951b7d6abf325
https://github.com/llvm/llvm-project/commit/4c88bd7840aa220ac8b19c0c73e951b7d6abf325
Author: Drew Kersnar <dkersnar at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
A llvm/test/Transforms/LoadStoreVectorizer/external-state-pointer.ll
Log Message:
-----------
[LoadStoreVectorizer] Avoid vectorizing pointers with external state (#209909)
LLVM pointers with external state must be loaded and stored using their
pointer type so that out-of-band state is transferred. I noticed that
the LangRef explicitly prohibits replacing such accesses with integer or
byte accesses:
https://llvm.org/docs/LangRef.html#pointers-with-external-state
> When a pointer type has external state, all roundtrips via memory must
be performed as loads and stores of the correct type since stores of
other types may not propagate the external data. Therefore it is not
legal to convert an existing load/store (or a llvm.memcpy / llvm.memmove
intrinsic) of pointer types with external state to a load/store of an
integer or byte type with the same bitwidth, as that may drop the
external state.
The LoadStoreVectorizer could combine an external-state pointer access
with an adjacent same-sized access, replacing them with an integer
vector load/store and `inttoptr`/`ptrtoint`.
Conservatively exclude loads and stores whose value type has external
state from LSV vectorization. Add regression coverage for both loads and
stores using a `pe2:` datalayout.
This issue exists for same-width mixed chains today and could affect
additional mixed-width chains once #177908 lands (I stumbled across this
while reviewing that change).
This PR was created with the assistance of AI.
Commit: cdc31cfa66f0b2da2483854db9c783ddba120c42
https://github.com/llvm/llvm-project/commit/cdc31cfa66f0b2da2483854db9c783ddba120c42
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
M llvm/lib/DWARFLinker/Parallel/DependencyTracker.h
A llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-deterministic-nested-type.test
Log Message:
-----------
[DWARFLinker] Fix RefTypeName crash and type-table non-determinism (#209033)
The parallel linker computes DIE placement (artificial type unit vs
plain DWARF) concurrently across compile units.
1. updateDependenciesCompleteness checked the placement of the enclosing
root type (getRootForSpecifiedEntry) instead of the actual referenced
DIE. A nested type can be demoted to plain DWARF while its root stays in
the type table, leaving a type-unit DIE that references a plain DIE and
tripping the RefTypeName assertion in
DIEAttributeCloner::cloneDieRefAttr. Carry the actual referenced DIE on
the worklist item and check its placement.
2. The completeness dependency set was recorded as a side effect of the
concurrent marking traversal, which short-circuits on already-marked
DIEs (isAlreadyMarked) before maybeAddReferencedRoots. When a shared
cross-CU DIE was already marked by a racing CU, the current referencing
root's outgoing dependencies were dropped, so the demotion fixpoint
missed demotions and whole type subtrees were left in the artificial
type unit non-deterministically. Add a RecordDepsOnly mode that, on the
short-circuit, re-walks the already-marked subtree and records the
dependencies directly without marking, scheduling, or following
references (so no cycles). This makes the recorded dependency set
complete and order-independent; the demoted-DIE set now matches the
single-threaded result on every run.
rdar://180584698
Commit: e41ac7425f54ec2f8ee0f318d38d1f823cfb72b2
https://github.com/llvm/llvm-project/commit/e41ac7425f54ec2f8ee0f318d38d1f823cfb72b2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/minmax-copyables-split-node.ll
Log Message:
-----------
[SLP]Fix crash in isExpandedBinOp on split-node scalars
A split node's Scalars mix two unrelated operations under one
synthetic main/alt op and never populate CopyableElements, so
querying isExpandedBinOp on one of its scalars can make
getMatchingMainOpOrAltOp return nullptr, causing the crash.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210828
Commit: b4000b69fac87a86dd62ddefe99cbab9d1e7b925
https://github.com/llvm/llvm-project/commit/b4000b69fac87a86dd62ddefe99cbab9d1e7b925
Author: Lucas Ribeiro Lima <lucasribeirolima974 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx-shuffle-builtins.c
Log Message:
-----------
[CIR] X86 vperm2f128 builtin implementation (#208851)
This PR implements X86 VPerm2f128 intrinsics and its tests.
Addresses #167765
Commit: 13d822c9351fdfa4287e30e0ace1e88e1901f431
https://github.com/llvm/llvm-project/commit/13d822c9351fdfa4287e30e0ace1e88e1901f431
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/bitfield-init-values.c
Log Message:
-----------
[CIR] Fix how we lower bitfield constants (#210791)
My patch to change the type of a const missed that there is a difference
between how we were representing a bitfield (always as an int) in the
constant, and in the struct(as a byte array).
This patch makes sure we correctly match the storage type, and just
requires packing/unpacking arrays when we store it.
Commit: e6cde20367a82aca112db73a3d1c76e77fe580f1
https://github.com/llvm/llvm-project/commit/e6cde20367a82aca112db73a3d1c76e77fe580f1
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/source/Commands/CommandObjectScripting.cpp
Log Message:
-----------
[lldb/script] Remove verbose comments following c4962f5721a3 (NFC) (#210827)
This removes verbose comments from c4962f5721a3 following a post-merge
comment.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: e8f7d45fa98822b9ea2828d53c8a66b70903db3c
https://github.com/llvm/llvm-project/commit/e8f7d45fa98822b9ea2828d53c8a66b70903db3c
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
A clang/test/CIR/CodeGen/unions-with-zero-init.cpp
Log Message:
-----------
[CIR] Refactor lowerUnion so unions get laid out consistently (#210709)
Perennial and a few other examples I came up with showed some situations
where we were bad at layout in CIR for unions. Sometimes we'd omit the
required fields, or miscalculate the storage type, or just not constant
init it correctly. This is mostly because we copy/pasted our
implementation from classic-codegen, but have different invariants.
This patch consistently adds ALL fields to the cir::UnionType, so we
always represent with all, which is an assumption we make elsewhere.
The lowerUnion function is significantly rewritten as the previous
version had a lot of interdepencies between loop runs. This patch
separates it out in a way that has less cyclic complexity which will
hopefully be more readable with minor/little compile-time impact.
This maintains the non-virtual-base functionality as well, though it
does it by collecting the fields like we do for the normal union case,
then just erases them. This greatly simplifies the calculation of
storageType, so it seems worth it.
Additionally, it fixes the constant layout of a null union, which got
the field count wrong in any non-trivial cases.
Commit: c2adde4f289b10048864b3357c09bc0f30154a5c
https://github.com/llvm/llvm-project/commit/c2adde4f289b10048864b3357c09bc0f30154a5c
Author: Keno Fischer <keno at juliahub.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
A llvm/test/Transforms/LCSSA/token-like-live-out.ll
Log Message:
-----------
[LoopInfo][LCSSA] Handle token-like values (#210816)
Token-like values have many (but not all) of the same restrictions as
regular token values.
They do however inherit the restriction on being placed in PHI and thus
they need to be
treated like regular tokens in LCSSA.
AI Disclosure: Written by GPT 5.6 - flagged during GPT 5.6 review of
#151062 rebase.
Commit: b74f72c22f9024914b9743c9aa22b2fbc2095f4c
https://github.com/llvm/llvm-project/commit/b74f72c22f9024914b9743c9aa22b2fbc2095f4c
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AMDGPU/ordered-reduction-fma-fusion.ll
A llvm/test/Transforms/SLPVectorizer/NVPTX/ordered-reduction-fma-fusion.ll
A llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss-ordered.ll
Log Message:
-----------
[NFC][SLP] Precommit tests for ordered fadd-reduction FMA-fusion cost (#210835)
Baseline coverage for an ordered fadd-of-fmul reduction that is
currently vectorized even on FMA-capable targets, breaking the scalar
fmul + fadd -> fma fusion. A follow-up teaches the reduction cost model
to account for the lost fusion and keep these reductions scalar, at
which point these CHECK lines update. Covers X86 avx2, AMDGPU gfx90a and
NVPTX sm_80.
It is a pre-requisite for
https://github.com/llvm/llvm-project/pull/210399
Assisted-By: Claude Opus 4.8
Commit: e8510cf81c4b56d4e0ce9b2c826dd7c5e725bee0
https://github.com/llvm/llvm-project/commit/e8510cf81c4b56d4e0ce9b2c826dd7c5e725bee0
Author: Taimuraz Kaitmazov <atassikay38 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/TableGen/subreg-index-overflow-allowed.td
Log Message:
-----------
[TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (#210529)
Follow-up to #206346. Adds two cases the overflow check's companion test
missed: an exact-fit tiling that must be accepted, and a register
without `CoveredBySubRegs` that must be left alone. Test only.
Commit: 1c97f0c2f1b2dc8acbf59653a5992d3f97373f68
https://github.com/llvm/llvm-project/commit/1c97f0c2f1b2dc8acbf59653a5992d3f97373f68
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-narrowing-shift-trunc.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Custom legalize v4i16->v4i8 and v2i32->v2i16 truncate. (#210670)
Convert to a bitcast and a shufflevector.
Assisted-by: Claude
Commit: 270842bb62573a99434e533fcacc4359e18e457d
https://github.com/llvm/llvm-project/commit/270842bb62573a99434e533fcacc4359e18e457d
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/lib/ProfileData/SampleProfReader.cpp
Log Message:
-----------
[ProfileData] Refactor SampleProfileNameTable into a polymorphic class hierarchy (NFC) (#210252)
This patch refactors SampleProfileNameTable into an abstract base
class with concrete derived classes like LazySampleProfileNameTable
and EagerSampleProfileNameTable.
The motivation is twofold:
- I want each derived class to focus on one data representation
instead of using complex if-then-else. Plus, I'm planning to
introduce one more data representation [1].
- I want each class to be populated and ready for use as soon as it is
constructed. That is, there is no intermediate state like
"constructed but waiting to be populated".
Now, you might notice that the iterator uses virtual operator[]. I
would argue that this is acceptable. We have three places where we
iterate over the entire range of the name table entries. Two of
these, namely SampleProfileNameSet and NamesInProfile, construct their
own sets for membership queries -- "Is this symbol in the name
table?". I'm planning to bring those sets right into our class
hierarchy in a follow-up patch.
[1]:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: 27ede4b415797b5df26d2e1f28d30b3e9c14f340
https://github.com/llvm/llvm-project/commit/27ede4b415797b5df26d2e1f28d30b3e9c14f340
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
Log Message:
-----------
[AMDGPU] Clean up check prefixes and regenerate checklines for some tests that were out of date (#209889)
Commit: bbbc24bc594959c4b268165c6d1a11d21cb02f52
https://github.com/llvm/llvm-project/commit/bbbc24bc594959c4b268165c6d1a11d21cb02f52
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma-fake16.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
A llvm/test/CodeGen/AMDGPU/shrink-fake16.mir
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
A llvm/test/CodeGen/AMDGPU/v_swap_b16.mir
A llvm/test/CodeGen/AMDGPU/waitcnt-vinterp-fake16.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir
Log Message:
-----------
[AMDGPU] Refactor some existing test files with true16/fake16 split, add some new test cases (#209890)
Commit: 7a470a90ffef437f86573faf5bee2f6ee8cfcebc
https://github.com/llvm/llvm-project/commit/7a470a90ffef437f86573faf5bee2f6ee8cfcebc
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/test/Lower/OpenACC/acc-unstructured.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/components.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/variable-inquiries.f90
Log Message:
-----------
[flang][NFC] Remove downstream issue references (#210858)
Commit: c9237cb62bedb5c55c6c8939cebdf8d51e567ac4
https://github.com/llvm/llvm-project/commit/c9237cb62bedb5c55c6c8939cebdf8d51e567ac4
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
Log Message:
-----------
Revert "[flang][OpenMP] Fix new metadirective-loop-nest.f90 test expectation with collapse changes in #208528" (#210860)
Reverts llvm/llvm-project#210753
Revert with #208528 pending llvm-test-suite fix.
Commit: 404d4daa70a158ee1b8443dfca5576e0ca375bb6
https://github.com/llvm/llvm-project/commit/404d4daa70a158ee1b8443dfca5576e0ca375bb6
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
R flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
R flang/test/Lower/OpenMP/collapse-labeled-do-host-eval.f90
R flang/test/Lower/OpenMP/collapse-loop-transform.f90
R flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
R flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
R flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
R flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
Log Message:
-----------
Revert "Redo [flang][OpenMP] Implement collapse for imperfectly nested loops" (#210861)
Reverts llvm/llvm-project#208528
Revert with #210753 pending llvm-test-suite fix.
Commit: e49aac8ff793d782e8b8a000077fb39b37629090
https://github.com/llvm/llvm-project/commit/e49aac8ff793d782e8b8a000077fb39b37629090
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/test/Analysis/CycleInfo/basic.ll
M llvm/test/CodeGen/X86/cycle-info.mir
Log Message:
-----------
[CycleInfo] Identify cycles with a single-pass DFS algorithm (#210491)
Replace the Havlak-Tarjan construction in GenericCycleInfoCompute, a DFS
followed by a reverse-preorder scan, with the single-pass algorithm of
Wei, Mao, Zou and Chen, "A New Algorithm for Identifying Loops in
Decompilation" (SAS 2007). One depth-first traversal tags every block
with its innermost loop header on the fly; tagLoopHeader weaves the
per-block header chains, replacing UNION-FIND.
The flat forest is reconstructed from the tags, dropping the temporary
cycle objects and the per-block worklist passes. An edge re-entering an
already-closed cycle records non-header entries, so entries need no
predecessor scan.
The cycle sets, headers, reducibility and nesting are identical for the
given DFS order, cross-checked against the old construction on random
reducible and irreducible CFGs. Two implementation-defined orders change
(with minor test churn): sibling cycles are laid out in decreasing
header preorder, and non-header entries in block preorder.
Construction cost (51x require+invalidate of <cycles> minus a 1x run,
median of interleaved rounds, x86-64): sqlite3.bc executes 27% fewer
instructions and 37% fewer cycles; a 1500-deep loop nest executes 50%
fewer instructions and 47% fewer cycles.
Aided by Claude Fable 5
Commit: d6790a7fa57ca5017d5e3ceff83d590b57bfa22c
https://github.com/llvm/llvm-project/commit/d6790a7fa57ca5017d5e3ceff83d590b57bfa22c
Author: Alan Li <me at alanli.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-ctlz-cttz-zero-poison.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ctlz-cttz-zero-poison.ll
M llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
Log Message:
-----------
[GlobalISel] Add `isKnownNeverZero` to `GISelValueTracking` (#198438)
## Summary of changes
* This patch adds `GISelValueTracking::isKnownNeverZero`, modeled after
the SelectionDAG query, and uses it in the GlobalISel count-zero
combiner.
* The root combines enabled by this patch are:
* `G_CTLZ x -> G_CTLZ_ZERO_POISON x`
* `G_CTTZ x -> G_CTTZ_ZERO_POISON x`
* The combine only fires when the source is known nonzero and the
zero-poison opcode is legal, or when the combiner is running before
legalization.
* For the initial proof set, this patch handles `G_OR`, `G_SELECT`, and
`G_SHL`. These are not new root combines; they are source-expression
cases used by `isKnownNeverZero` to prove that the input to `G_CTLZ` /
`G_CTTZ` is nonzero. Other structural cases can be added in follow-up
patches. For other opcodes, the query falls back to existing KnownBits
support.
* Tests cover the `isKnownNeverZero` query, the AArch64 MIR combine
cases, and the AMDGPU end-to-end lowering behavior.
## Example
Pattern `ctlz(or(x, 1))` on AMDGPU:
Before:
```
v_or_b32_e32 v0, 1, v0
v_ffbh_u32_e32 v0, v0
v_min_u32_e32 v0, 32, v0 ; bitwidth clamp
s_setpc_b64 s[30:31]
```
After:
```
v_or_b32_e32 v0, 1, v0
v_ffbh_u32_e32 v0, v0
s_setpc_b64 s[30:31]
```
Commit: de44ed3488693686dd1f65baad5d7bd3797eddca
https://github.com/llvm/llvm-project/commit/de44ed3488693686dd1f65baad5d7bd3797eddca
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
Log Message:
-----------
[clang-tidy][docs] Remove obsolete doc8 instructions. NFC. (#210576)
Remove the doc8 setup and invocation instructions from the contributing
guide as clang-tidy documentation transitions to Markdown.
Part of https://github.com/llvm/llvm-project/issues/201242
Commit: b290a41af4fbaea42bd3c7aa2f90b6592065dd15
https://github.com/llvm/llvm-project/commit/b290a41af4fbaea42bd3c7aa2f90b6592065dd15
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
Log Message:
-----------
[lldb][RISCV] Fix x8 register aliasing for gdb-remote targets (#209070)
GDB remote target descriptions can expose the RISC-V `x8` register as
`fp`. LLDB previously used `fp` as the primary name and `s0` as the
alternate name, leaving no register name for `x8`.
This commit changes `s0` as the primary name, `x8` as the alternate
name, and mark the register as the generic frame pointer. Allowing `fp`,
`s0`, and `x8` to resolve to the same register.
Fixes #127900
Commit: c26e99cf61a756338852a239f6c05cc21efb7c5c
https://github.com/llvm/llvm-project/commit/c26e99cf61a756338852a239f6c05cc21efb7c5c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
A flang/test/Fir/CUDA/cuda-device-global-cycle.fir
Log Message:
-----------
[flang][cuda] Avoid infinite loop while processing globals (#210805)
Commit: 35020b22871af5438f6563721d06620bc5819ca5
https://github.com/llvm/llvm-project/commit/35020b22871af5438f6563721d06620bc5819ca5
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/unittests/Support/ProgramTest.cpp
Log Message:
-----------
[Support][Unit] Fix ProgramTest.cpp build warning unused variable 'RetCode' (#210699)
RetCode is unused if __MINGW32__ is defined.
Commit: 890b11e09e45e9d8b29f2f94f22052be3934e757
https://github.com/llvm/llvm-project/commit/890b11e09e45e9d8b29f2f94f22052be3934e757
Author: Ken Matsui <26405363+ken-matsui at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/X86.h
Log Message:
-----------
[clang] Use 0 for wasm_funcref in non-Wasm address space maps (NFCI) (#210253)
The __funcref keyword is only supported by the WebAssembly target, so
the wasm_funcref entries in other targets' address space maps are
unused.
Use 0 for these entries, which is consistent with other unsupported
address spaces.
Commit: 5809c754e7316acf95cec5170e96041af9432869
https://github.com/llvm/llvm-project/commit/5809c754e7316acf95cec5170e96041af9432869
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/test/Lower/OpenMP/depend-iterator.f90
M flang/test/Lower/OpenMP/task-affinity.f90
Log Message:
-----------
[flang][OpenMP] Lower iterator indices with genExprValue instead of the legacy expression lowering (#210385)
`getIteratorElementIndices()` lowered the depend/affinity iterator
subscript expressions with `createSomeExtendedExpression` (the legacy,
non-HLFIR expression lowering). Switch it to
`AbstractConverter::genExprValue`, matching the idiom already used
elsewhere in OpenMP/Utils.cpp, so this code no longer depends on the
legacy expression lowering.
The iterator LIT tests are updated to reflect the induction values now
being materialized in memory (store + hlfir.declare + load) and the
subscript arithmetic lowering through HLFIR (hlfir.no_reassoc instead of
fir.no_reassoc).
Assisted-by: AI
Commit: e6103d785f415bfd8bc6e0b76c791ada38bf0654
https://github.com/llvm/llvm-project/commit/e6103d785f415bfd8bc6e0b76c791ada38bf0654
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
Log Message:
-----------
[AMDGPU] Relax SGPR splat selection for PK_*64 (#210790)
These instructions replicate SGPR operands into high 64-bit channel
w/o opsel.
Commit: 80b6554d227acc6cabc6691affbe8dcd94f20801
https://github.com/llvm/llvm-project/commit/80b6554d227acc6cabc6691affbe8dcd94f20801
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Lower/ConvertConstant.h
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Lower/common-block-derived-initialization.f90
M flang/test/Lower/global-initialization-parens.f90
Log Message:
-----------
[flang] Lower initial values via ConvertConstant instead of the legacy expression lowering (#210621)
Global and component initial values were lowered with
`createSomeInitializerExpression` (the legacy, non-HLFIR expression
lowering). Route them through ConvertConstant instead, which is
self-contained and safe inside a fir.global initializer region: it never
consults the symbol map, allocates temporaries, or outlines constants
into memory.
Observable IR change: fir.no_reassoc no longer appears in fir.global
initializer regions for parenthesized scalar/derived constants. Update
global-initialization-parens.f90 -- previously a pre-commit baseline
pinning the old fir.no_reassoc behavior -- to assert the new folded
form, and add common-block-derived-initialization.f90 (a
DATA-initialized common block with a derived-type member).
Assisted-by: AI
Commit: a1a5664cb1def61bfc5234ed2b1ebe4a339d387a
https://github.com/llvm/llvm-project/commit/a1a5664cb1def61bfc5234ed2b1ebe4a339d387a
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/CodeGen/ARM/call-graph-section-assembly.ll
M llvm/test/CodeGen/ARM/call-graph-section.ll
M llvm/test/CodeGen/X86/call-graph-section-assembly.ll
M llvm/test/CodeGen/X86/call-graph-section.ll
Log Message:
-----------
[NFC][llvm] Fix typo in tests (#210841)
Commit: ee98df545384f95feb72d39f88004075bd5329fc
https://github.com/llvm/llvm-project/commit/ee98df545384f95feb72d39f88004075bd5329fc
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
Log Message:
-----------
[AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (#178711)
Teach simplifyVmVsrc that a wait for a VMEM counter (LOAD_CNT, DS_CNT
etc) only implies a corresponding wait for VM_VSRC if there are no
outstanding VMEM operations that use a different VMEM counter.
Commit: 4bd1a447e136e60ea441370ac5d7b898aa4efab0
https://github.com/llvm/llvm-project/commit/4bd1a447e136e60ea441370ac5d7b898aa4efab0
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc] Make hermetic test syscall deps linux-only (#210715)
They are only used on linux, so this matches that.
They are also only used in full build mode, but hermetic tests only work
in full build mode, so we don't need to check that here. The darwin
check is a noop as (AAIU) we don't support full_build on darwin, but
I've kept it for symmetry.
Commit: 375231d8ea9b4f5a3a71f4afb3d76ba6e1dcefc5
https://github.com/llvm/llvm-project/commit/375231d8ea9b4f5a3a71f4afb3d76ba6e1dcefc5
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_group_req.h
A libc/hdr/types/struct_group_source_req.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_group_req.h
A libc/include/llvm-libc-types/struct_group_source_req.h
M libc/include/netinet/in.yaml
M libc/test/src/netinet/CMakeLists.txt
M libc/test/src/netinet/in_test.cpp
Log Message:
-----------
[libc] Add struct group_req, struct group_source_req, and related socket options (#210029)
Add definitions for struct group_req and struct group_source_req in
llvm-libc-types and wire them into <netinet/in.h>.
Also define the multicast socket options using these structs:
- MCAST_JOIN_GROUP
- MCAST_LEAVE_GROUP
- MCAST_BLOCK_SOURCE
- MCAST_UNBLOCK_SOURCE
- MCAST_JOIN_SOURCE_GROUP
- MCAST_LEAVE_SOURCE_GROUP
Add layout assertions for struct group_req and struct group_source_req
to the netinet/in.h unit test.
Assisted by Gemini.
Commit: ea52aa03750fd51857f47b6a901edc0b283a7aec
https://github.com/llvm/llvm-project/commit/ea52aa03750fd51857f47b6a901edc0b283a7aec
Author: Ken Matsui <26405363+ken-matsui at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Basic/AddressSpaces.h
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/TCE.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
Log Message:
-----------
[clang] Use key-value initialization for LangASMap (NFCI) (#210259)
The original implementation requires each target to list a value for
every LangAS in exact enum order. This forces targets to specify
mappings for unrelated address spaces and makes it easy to introduce
ordering bugs, such as the one fixed in
4479f3397f827291c51698fbaa685b1a9493467a.
Address this by introducing a class that supports order-independent
key-value initialization and defaults unspecified entries to 0.
Commit: 0b16957f41f96f14aa014f119e4180538bcb4f80
https://github.com/llvm/llvm-project/commit/0b16957f41f96f14aa014f119e4180538bcb4f80
Author: Jim Lin <jim at andestech.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/zicond-opts.ll
Log Message:
-----------
[RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (#163501)
The Zicond form of (select c, t, f), (or (czero_eqz t, c),
(czero_nez f, c)), has no compressed encodings and is always 12 bytes.
The branch form (branch + mv) is at most 8 bytes, and with the C
extension
4 bytes when the branch compresses (c.mv always does) or 6 bytes when it
does not; it shrinks further when a condition is shared across selects.
Since it is never larger by byte count, skip the Zicond transform under
optsize via !DAG.shouldOptForSize().
Fixes https://github.com/llvm/llvm-project/issues/158633.
Commit: 921f4da4a05f93391937ccc337aa448b3d8de539
https://github.com/llvm/llvm-project/commit/921f4da4a05f93391937ccc337aa448b3d8de539
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
Log Message:
-----------
[SLP][Modularisation][NFC] Extract free cost helpers into SLPCostAnalysis (#210278)
Move the BoUpSLP-independent cost helpers out of SLPVectorizer.cpp into
SLPVectorizer/SLPCostAnalysis.{h,cpp} (namespace llvm::slpvectorizer).
Moved:
* getShuffleCost
* getGEPCosts
RFC: https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 8f48e1980f9da4e4d859c1c2713561195d043454
https://github.com/llvm/llvm-project/commit/8f48e1980f9da4e4d859c1c2713561195d043454
Author: qyingwu <46992476+qyingwu at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[mlir][LLVMIR] Add export coverage for retained local variables (#209911)
Adds export coverage for a retained local variable case where MLIR may
contain separate `DILocalVariableAttr`s for the same source-level
variable.
A local variable can appear both in a `DISubprogram`'s `retainedNodes`
and in a debug intrinsic such as `dbg.value` or `dbg.declare`. During
import, the `retainedNodes` path may see the variable while the
containing subprogram is represented by a self-recursive placeholder,
while the debug intrinsic path later sees the finalized subprogram. This
can produce two MLIR local variable attrs with different subprogram
scopes.
The exported LLVM IR debug metadata is still canonical for this case:
both the debug intrinsic and the subprogram `retainedNodes` reference
the same `DILocalVariable` metadata node. This patch adds regression
coverage for that export behavior without extending the recursive
debug-info machinery.
Commit: 9aebd4b405d7299337d4561de8d35c579ab5d88b
https://github.com/llvm/llvm-project/commit/9aebd4b405d7299337d4561de8d35c579ab5d88b
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
A llvm/test/CodeGen/RISCV/rvv/vl-opt-licm.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
Log Message:
-----------
[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (#210028)
RISCVVLOptimizer runs before the machine SSA optimization passes. This
includes EarlyMachineLICM, which causes previously loop invariant
vmv.v.i/vmv.v.x/vfmv.v.f splats to use a loop variant VL defined by a
PseudoVSETVLI. This prevents splats from being hoisted out:
https://godbolt.org/z/Wf49roo7s
This fixes it by adding another pass of EarlyMachineLICM before
RISCVVLOptimizer.
As measured on llvm-test-suite w/ `-march=rva23u64 -O3` this increases
the number of vector splat instructions hoisted by MachineLICM by 4.4x,
from 2140 to 9327.
Compile time wise, the number of instructions executed increases geomean
+0.2% on CTMark for -O3. -O0 builds are unaffected.
Two other approaches were considered:
- Use MachineLoopInfo in RISCVVLOptimizer to avoid changing the VL of
any loop invariant pseudos. But that results in more vsetvli toggles,
and still involves running the same analysis that EarlyMachineLICM
depends on anyway
- Hoist loop invariant pseudos ourselves in RISCVVLOptimizer. But in
order to catch all cases that EarlyMachineLICM handles, we need to split
critical edges and modify the CFG (which would invalidate the CFG
analyses), and also hoist scalar non-pseudo instructions. In some cases
it also led to more spilling due to increased register pressure, which
EarlyMachineLICM has heuristics for avoiding.
Commit: e747c8b850d20add682ea25d0f8709129f158c09
https://github.com/llvm/llvm-project/commit/e747c8b850d20add682ea25d0f8709129f158c09
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/module.modulemap
Log Message:
-----------
[clang] Remove stale TransformTypeTraits.def entry from module map (#210878)
Commit 2a33792a2ec1 ("[clang][NFC] move traits to tablegen", #201491)
deleted clang/include/clang/Basic/TransformTypeTraits.def in favor of a
tablegen-generated clang/Basic/Traits.inc. The stale module map entry
broke module builds. Renaming it to "clang/Basic/Traits.inc" doesn't
seem to work, ('clang/Basic/Traits.inc' not found) but the build
succeeds with the entry dropped entirely.
Assisted-by: Claude Sonnet 5
rdar://182772346
Commit: 4c8e5c3e8b462ebd664ac1ccd621005d9b365644
https://github.com/llvm/llvm-project/commit/4c8e5c3e8b462ebd664ac1ccd621005d9b365644
Author: Mayank <mayank.solanki at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
Log Message:
-----------
[TTI] Fix haveFastClmul to access inherited DL via thisT() (#210647)
haveFastClmul() called DL.getIndexType()/DL.getAllocaAddrSpace()
directly, relying on the `using TargetTransformInfoImplBase::DL;`
declaration in BasicTTIImplBase to bring the inherited DataLayout
reference into scope. Because DL is reached through a two-level
dependent base chain (BasicTTIImplBase<T> ->
TargetTransformInfoImplCRTPBase<T>-> TargetTransformInfoImplBase), some
compilers (observed with GCC 8.5.0) mis-resolve the member access and
reject the code with a misleading diagnostic naming
TargetTransformInfoImplBase rather than DataLayout.
Access DL via thisT()->DL instead, matching the pattern already used
elsewhere in this file (e.g. getABITypeAlign() call sites), which forces
lookup to be deferred to instantiation time and avoids the
compiler-version-dependent behavior.
Commit: 9a49fc244be7400e550b2c014e6d370b586dc854
https://github.com/llvm/llvm-project/commit/9a49fc244be7400e550b2c014e6d370b586dc854
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.cpp
M llvm/lib/Transforms/Scalar/LoopDeletion.cpp
M llvm/lib/Transforms/Scalar/LoopPredication.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M polly/lib/Analysis/ScopDetection.cpp
Log Message:
-----------
[LoopInfo] Replace raw loop-container accessors with semantic operations (#210653)
getBlocksVector, mutable getBlocksSet, getSubLoopsVector, and
getTopLevelLoopsVector expose LoopInfo's internal containers, so every
caller open-codes loop-nest surgery, keeps the block vector and set in
sync by hand, and freezes the representation. Replace them with two
LoopInfoBase operations:
* removeBlocksIf(LoopT &, Pred): drop matching blocks from a loop.
* takeChildrenIf(LoopT *Parent, Pred): detach and return matching
children, clearing their parent; a null Parent means the top level.
Both preserve the relative order of what remains. Mutation inside
LoopInfoBase also lets the analysis repair derived state once per edit
and finish a multi-step edit before any query observes it, which an
accessor returning a container cannot.
For the same reason, move hasNoExitBlocks, getExitEdges, and
getUniqueLatchExitBlock onto LoopInfoBase.
Two behavior changes: SimpleLoopUnswitch's deleteDeadBlocksFromLoop runs
its per-child deletion callbacks while the forest is still consistent,
before detaching and destroying dead children; FixIrreducible's
reconnectChildLoops keeps children in their original order rather than
std::partition's.
Aided by Claude Fable 5
Commit: 13822d0b1808b759dd4f4d237ea347729f93b3ed
https://github.com/llvm/llvm-project/commit/13822d0b1808b759dd4f4d237ea347729f93b3ed
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (#204329)
So far, the LangRef hasn't been clear on the semantics of partially overlapping
concurrent atomics in LLVM IR (specifically: a set of accesses marked as
`atomic` that would be in a data race if they weren't `atomic` and not all of
them access the exact same set of bytes).
What loads read is defined in terms of individual bytes, but the memory
ordering constraints are formulated closely to the C/C++ (and Java for
`unordered`) memory model, where partially overlapping atomics are not
possible. It's not obvious how concepts like C/C++'s per-location total
modification order for `monotonic` accesses map to accesses that can partially
overlap. While C/C++ relies on the modification order to ensure that atomics
cannot tear (i.e., atomic reads return bytes from two or more atomic writes),
our IR semantics (as written) currently does not guarantee this in the presence
of partially overlapping accesses.
This PR proposes a solution to this problem: It specifies that concurrent
overlapping atomics must access the exact same set of bytes to act atomically.
If they don't, they form a data race (i.e., participating loads read `undef`
for affected bytes) and the atomic ordering constaints do not apply. This empowers the rest of the specification to imply that
`monotonic` (or stronger) accesses do not tear. The PR also adds a constraint
to ensure non-tearing for `unordered` atomic accesses.
This solution implies that transformations that merge adjacent atomic
loads/stores into wider atomic loads/stores are generally incorrect.
Related RFC: https://discourse.llvm.org/t/rfc-semantics-of-partially-overlapping-atomic-accesses/91092
Commit: 9b5c0571afd6b2c1918db5585a05b9756ea19c28
https://github.com/llvm/llvm-project/commit/9b5c0571afd6b2c1918db5585a05b9756ea19c28
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/test/CodeGenCXX/pragma-followup_inner.cpp
M clang/test/CodeGenCXX/pragma-followup_outer.cpp
M clang/test/CodeGenCXX/pragma-loop-distribute.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/AutoUpgrade.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/Analysis/LoopAccessAnalysis/pr64637.ll
A llvm/test/Bitcode/upgrade-loop-distribute-enable.ll
A llvm/test/Bitcode/upgrade-loop-distribute-enable.ll.bc
M llvm/test/Other/optimization-remarks-lazy-bfi.ll
M llvm/test/Transforms/IRCE/add-metadata-pre-post-loops.ll
M llvm/test/Transforms/IRCE/correct-loop-info.ll
M llvm/test/Transforms/IRCE/loop-guarded-bounds.ll
M llvm/test/Transforms/IRCE/pre_post_loops.ll
M llvm/test/Transforms/IRCE/range_intersect_miscompile.ll
M llvm/test/Transforms/IRCE/unsigned_comparisons_ugt.ll
M llvm/test/Transforms/IRCE/unsigned_comparisons_ult.ll
M llvm/test/Transforms/Inline/dilocation-loop-metadata-update.ll
M llvm/test/Transforms/LoopDistribute/basic-with-memchecks.ll
M llvm/test/Transforms/LoopDistribute/diagnostics-with-hotness.ll
M llvm/test/Transforms/LoopDistribute/diagnostics.ll
M llvm/test/Transforms/LoopDistribute/disable_nonforced_enable.ll
M llvm/test/Transforms/LoopDistribute/early-exit.ll
M llvm/test/Transforms/LoopDistribute/followup.ll
M llvm/test/Transforms/LoopDistribute/metadata.ll
M llvm/test/Transforms/LoopSimplify/preserve-llvm-loop-metadata.ll
M llvm/test/Transforms/SimplifyCFG/preserve-llvm-loop-metadata.ll
A llvm/test/Verifier/llvm.loop.distribute.ll
M llvm/unittests/Analysis/LoopInfoTest.cpp
M mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
M mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp
M mlir/test/Target/LLVMIR/Import/metadata-loop.ll
M mlir/test/Target/LLVMIR/loop-metadata.mlir
Log Message:
-----------
Enforce single-operand form for llvm.loop.distribute metadata (#201077)
This patch implements Phase 1 of the
[RFC](https://discourse.llvm.org/t/rfc-enforce-single-operand-format-for-all-enable-metadata-nodes/90571)
"Enforce Single-Operand Format for All .enable Metadata Nodes". The
two-operand boolean form !{!"llvm.loop.distribute.enable", i1 0/1} is
replaced by a single-operand enable/disable pair:
!{!"llvm.loop.distribute.enable"} ; force distribution
!{!"llvm.loop.distribute.disable"} ; suppress distribution
Commit: e3dfa82a46b6df7cdc92657b27e75470b74459cb
https://github.com/llvm/llvm-project/commit/e3dfa82a46b6df7cdc92657b27e75470b74459cb
Author: David Green <david.green at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/abs.ll
Log Message:
-----------
[AArch64] Update abs cost with scalar costs and CSSC. NFC (#210900)
Commit: b7f642fdb262e2ed3c2209b9a10017084e1595ad
https://github.com/llvm/llvm-project/commit/b7f642fdb262e2ed3c2209b9a10017084e1595ad
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcDeathTestExecutors.cpp
M libc/test/src/stdlib/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[ilbc] Revert recent changes to the hermetic tests (#210889)
PR #209999 (9e2e9b33e14808541c0470b92ade34bee6608bf6) "broke" the GPU
build by causing many/most tests to not run.
The follow-up in #210715 (4bd1a447e136e60ea441370ac5d7b898aa4efab0)
broke it for real
(https://lab.llvm.org/buildbot/#/builders/10/builds/32254) by causing
too many tests to run.
I think we just need to disable the extra tests, but I want to start out
by reverting both patches so that it's easier to compare the
before/after state in the next attempt.
Commit: d80b9a5e358de107da3a58730c89e512daffd9a7
https://github.com/llvm/llvm-project/commit/d80b9a5e358de107da3a58730c89e512daffd9a7
Author: Iurii Khosoi <aadaa_fgtaa at pm.me>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A llvm/test/CodeGen/X86/bitcnt-false-deps.mir
R llvm/test/CodeGen/X86/bls-false-dep.ll
A llvm/test/CodeGen/X86/bls-false-deps.mir
R llvm/test/CodeGen/X86/compress-false-deps.ll
A llvm/test/CodeGen/X86/compress-false-deps.mir
R llvm/test/CodeGen/X86/expand-false-deps.ll
A llvm/test/CodeGen/X86/expand-false-deps.mir
Log Message:
-----------
[X86] MIR-level tests for bitcnt/bls/compress/expand false dependencies (#209879)
Followup to #207079. This replaces IR-level tests introduced in
c311e7b3d that were using inline assembler hack with MIR-level tests, as
suggested by @ganeshgit. Older test for bit counting instruction with
more complex functions is kept alongside a new one that tests affected
instructions in isolation.
Commit: ca80eecf34d041e55b60e202bce1c606288ffa71
https://github.com/llvm/llvm-project/commit/ca80eecf34d041e55b60e202bce1c606288ffa71
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Log Message:
-----------
[lldb][AArch64][Linux] Use memcpy when serialising data (#210710)
In few places we are reinterpreting raw bytes as typed data. This works
but is undefined behaviour if the address being used isn't at the same
alignment as the target type.
It likely has always been because we've got 4 and 8 byte types and 4 or
8 byte registers. However I prefer to use memcpy anyway to be safe.
m_sve_state is a single byte but for consistency I'm using memcpy for it
also.
Commit: ba9d799b1bf2433bf960a08ff995497f5b6d2feb
https://github.com/llvm/llvm-project/commit/ba9d799b1bf2433bf960a08ff995497f5b6d2feb
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
A lldb/test/API/functionalities/gdb_remote_client/TestQSymbol.py
A lldb/test/API/functionalities/gdb_remote_client/test_qsymbol.yaml
Log Message:
-----------
[lldb][test] Add test for qSymbol handling when using an ELF (#200411)
qSymbol is sent to the debug server every time libraries are loaded. It
can respond to this with symbols it wants to know the value for. It's
rarely used so I expect that's why we had zero test coverage for it.
In this commit I'm adding a test case, derived from the bug being
reported in #200134. The mock debug server has a list of symbols to ask
for and records the results. After LLDB has connected we check with the
mock that it got all the answers it wanted. Right now, 2 of the symbols
don't have values, but should according to the author of the bug report.
One symbol is intentionally missing to check that LLDB handles that
situation properly, even when the others have been fixed.
While I was doing this I realised the documentaiton for an unknown
symbol response was wrong. You can cross check this with GDB's:
https://sourceware.org/gdb/current/onlinedocs/gdb.html/General-Query-Packets.html#General-Query-Packets
In theory we should test the MachO behaviour too. However I was not able
to create a MachO example that did not end up using a host AArch64 Linux
binary that it found via. PID, while also getting far enough to send
qSymbol. Every workaround broke one of those 2 things. ELF testing is
better than the nothing we currently have.
Assisted by: ChatGPT 5.5
Commit: 62e843ac959f2ad617f18bea20141d6c33913572
https://github.com/llvm/llvm-project/commit/62e843ac959f2ad617f18bea20141d6c33913572
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.illegal-data-type.err.ll
Log Message:
-----------
[AMDGPU] Reject illegal image atomic data widths in SelectionDAG (#210366)
Commit: d13b8625eef0941f48b5af74e9fab953b6430eb2
https://github.com/llvm/llvm-project/commit/d13b8625eef0941f48b5af74e9fab953b6430eb2
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseStmt.cpp
A clang/test/Parser/cxx2c-expansion-statements-non-compound-stmt-body.cpp
Log Message:
-----------
[clang][Parser] Warn when the body of expansion statement is not a compound statement (#209229)
<https://eel.is/c++draft/stmt.expand#nt:expansion-statement>:
_expansion-statement_:
template for ( _init-statement<sub>opt</sub>_ _for-range-declaration_ :
_expansion-initializer_ ) _compound-statement_
Commit: 285a3cb74ef4cdc080cb264d44d1e3c9aa3a33be
https://github.com/llvm/llvm-project/commit/285a3cb74ef4cdc080cb264d44d1e3c9aa3a33be
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
Log Message:
-----------
[CycleInfo] Store entries in the block layout. NFC (#210866)
A reducible loop has a single entry (header), which flatten() places at
BlockLayout[IdxBegin], as its minimum-preorder block. A reducible loop
then needs no storage at all.
For the uncommon irreducible loop case, we append its full entry list
(header first) after the Euler tour, referenced by [EntryBegin,
EntryBegin+EntrySize), making `GenericCycleInfo::Cycle` (named only
because "loop" is occupied by LoopInfo) trivially destructible.
Commit: 0228facbd558a55e7db6646572d857d1b0cf9596
https://github.com/llvm/llvm-project/commit/0228facbd558a55e7db6646572d857d1b0cf9596
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV][P-Ext] Add RISCVISD::WADD/WSUB. (#210862)
Commit: c096c8ddf1fee7777f9724c05f04fa3f5d2033d3
https://github.com/llvm/llvm-project/commit/c096c8ddf1fee7777f9724c05f04fa3f5d2033d3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
Log Message:
-----------
PPC: Remove manual run of machine verifier (#208032)
This is redundant with using the standard -verify-machineinstrs.
It's also confusing / worse, since the error is not produced to
stderr.
Commit: 9e2664e70c55bfd68b6c982a0087eadc5edc37f9
https://github.com/llvm/llvm-project/commit/9e2664e70c55bfd68b6c982a0087eadc5edc37f9
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN] Rename some functions to follow LLVM naming conventions (NFC) (#210332)
Commit: bd07f0c81cad3510d3a0288e6f6feb2b2b475970
https://github.com/llvm/llvm-project/commit/bd07f0c81cad3510d3a0288e6f6feb2b2b475970
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Drop redundant ArrayRef constructions (NFC) (#210680)
Commit: feabbb0f4611a9c26d6ae694232bfca7964e6233
https://github.com/llvm/llvm-project/commit/feabbb0f4611a9c26d6ae694232bfca7964e6233
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/test/Analysis/lifetime-bound.cpp
Log Message:
-----------
[analyzer] Fix false positive when a lifetimebound method is called during destruction (#210801)
When a `lifetimebound` method is called during destruction the checker
emits warnings which leads to false positives. To avoid this a dangling
stack source is not reported if any frame on the current stack belongs
to a destructor.
Commit: 46fb353e5d48097b0056ec3eddf77d6ce41bf226
https://github.com/llvm/llvm-project/commit/46fb353e5d48097b0056ec3eddf77d6ce41bf226
Author: Simi Pallipurath <simi.pallipurath at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[compiler-rt][test] Skip page-size feature detection under emulators. (#210683)
This avoids adding a page-size-* lit feature when compiler-rt tests are
configured to run through an emulator.
Perviously this used to work because failure to detect the page size
would fall back to 4096. Now after this change
https://github.com/llvm/llvm-project/pull/209175, the code tries to
execute config.python_executable through the emulator. For
emulator-based test configurations, this is inappropriate. The function
now returns None when an emulator is configured, and the lit feature is
only added when a concrete page size is available.
Commit: dce3dc80492263e263535627b80ce948db4b2fcc
https://github.com/llvm/llvm-project/commit/dce3dc80492263e263535627b80ce948db4b2fcc
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/Sema/SemaConcept.h
M clang/lib/AST/TemplateBase.cpp
M clang/lib/Sema/SemaConcept.cpp
Log Message:
-----------
[Clang] Add NormalizedConstraint::dump() (#210498)
This facilitates debugging with concepts, particularly when we need to
check complex parameter mappings.
Since this is mainly for debugging purpose, we don't promise any text
stability and hence no tests provided.
Commit: bcde1af59d0a3c9c6f596c9144b89e61f30ce40f
https://github.com/llvm/llvm-project/commit/bcde1af59d0a3c9c6f596c9144b89e61f30ce40f
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[OFFLOAD][L0] Fix PatternSize assert in L0QueueTy::memoryFill (#210867)
The message was the opposite of the assert condition.
In addition, when PatternSize == Size the caller wants to fill the
region with exactly one copy of the pattern, which is a valid operation.
The issue was found by AI.
Also check `Size % PatternSize == 0` per L0 spec.
Commit: d0cc9123eb14cae514e6f4e77cf5d1e3c32b6ebe
https://github.com/llvm/llvm-project/commit/d0cc9123eb14cae514e6f4e77cf5d1e3c32b6ebe
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Use equal_to in isUsedByLoadStoreAddr (NFC) (#210911)
Commit: fd9e690cdbeb02832cc36d455bffda9e7e813785
https://github.com/llvm/llvm-project/commit/fd9e690cdbeb02832cc36d455bffda9e7e813785
Author: Jolyon <yangjian.c at bytedance.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
Log Message:
-----------
[RegisterCoalescer] Avoid retrying high-cost joins for live intervals (#207976)
Recently we found a compile time problem in the case that contains much
high-cost live
interval. And normal interference failures still set `Again=true` and
can be retried
(it cost N^2 complexity). We tracks when a join failed only because of
the high-cost
guard, so that avoids putting such copies back into the retry worklist.
This reduce our huge function case from 14.6h to 12.8min in register
coalescer pass.
Commit: e2c012fa55eb16d74f890209dfdd97b0dfd96b15
https://github.com/llvm/llvm-project/commit/e2c012fa55eb16d74f890209dfdd97b0dfd96b15
Author: Akash Agrawal <akashag at qti.qualcomm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct.default/p3.cpp
Log Message:
-----------
[Clang][Sema] Fix crash on lambda parameter pack with illegal default argument (#210718)
`Sema::ActOnParamDefaultArgument` checked a default-argument expression
for unexpanded parameter packs before checking whether the parameter
itself is a pack. For a lambda parameter pack given a default argument
that is a pack expansion referencing an enclosing function's parameter
pack (e.g. `[](Types... = args...) {}`), the first check runs while
still inside the lambda's scope and sets
`LambdaScopeInfo::ContainsUnexpandedParameterPack` (a mechanism meant
for legitimate outer-pack references). The subsequent
`isParameterPack()` check then correctly diagnoses the real error and
discards the default argument, but the stale flag survives into the
built `LambdaExpr`'s dependence bits. A later unexpanded-pack check on
that `LambdaExpr` finds nothing to report and hits
`assert(!Unexpanded.empty() || LambdaReferencingOuterPacks)`, aborting
instead of just diagnosing the error.
Fix: check `Param->isParameterPack()` first and return immediately after
discarding the default argument, before ever calling
`DiagnoseUnexpandedParameterPack` on an expression that is about to be
thrown away. [dcl.fct.default]p3 forbids a default argument on a pack
parameter unconditionally, so this ordering is also semantically
correct, not just a crash workaround.
Fixes #210714
Commit: d8d1d444a2a69293292f10f19691da05207630f7
https://github.com/llvm/llvm-project/commit/d8d1d444a2a69293292f10f19691da05207630f7
Author: Kigyosi Alexandru <alexandru.kigyosi at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/include/mlir/Debug/ExecutionContext.h
M mlir/lib/Debug/ExecutionContext.cpp
M mlir/unittests/Debug/ExecutionContextTest.cpp
Log Message:
-----------
[MLIR] Rerun control for actions in execution context (#209197)
Adds a Rerun control value to ExecutionContext::Control that allows the
re-execution of the current action immediately after it completes,
without restarting the full compilation pipeline. This is analogous to
GDB's ability to restart execution from a breakpoint. When the callback
returns Rerun, the action is executed normally, then re-dispatched
through the full ExecutionContext::operator() pipeline, including
breakpoint matching, so the user gets a fresh opportunity to inspect or
control the re-execution. As a practical usage example, a breakpoint +
an observer can be added, to save and restore IR between runs to check
if each run produces the same IR or something different each time. A
depth-keyed structure is used, so rerun requests survive nested action
dispatch and are consumed by the correct stack frame.
Commit: 914d5a1841dedf2148e21bd6de3b92409fe79285
https://github.com/llvm/llvm-project/commit/914d5a1841dedf2148e21bd6de3b92409fe79285
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
Log Message:
-----------
[DTLTO] Overlap temporary file removal (#209423)
Deleting the temporary files produced by the DTLTO pipeline can be
expensive on Windows hosts. For a Clang link (Debug build with
sanitizers and instrumentation) using an optimized toolchain (PGO
non-LTO, llvmorg-22.1.0) on a Windows 11 Pro (Build 26200), AMD Family
25 @ ~4.5 GHz, 16 cores/32 threads, 64 GB RAM machine, the mean duration
of the "Remove DTLTO temporary files" time trace scope was 1267.789 ms
(measured over 10 runs).
This patch performs the deletions on a background thread, allowing them
to overlap with the tail of the link to hide this cost.
This is a re-implementation of the asynchronous cleanup idea from
https://github.com/llvm/llvm-project/pull/186988, which had to be
reverted in https://github.com/llvm/llvm-project/pull/189043 because
cleanup was not guaranteed to complete before LLD invoked
timeTraceProfilerCleanup(). In certain cases timeTraceProfilerCleanup()
was called before temporary file deletion had completed in LLD, which
caused memory leaks that were flagged by sanitizer builds.
Note that the DTLTO implementation has been refactored heavily since
https://github.com/llvm/llvm-project/pull/186988, so this is a
re-implementation along the same lines.
To solve the ordering issue, LLD now calls a hook that defaults to a
no-op, and DTLTO overrides it to drain the background deletion work.
LLD calls this hook before time-trace write/cleanup.
Commit: 818fd11b95108b1b2a879f474f3c3bf54630b01b
https://github.com/llvm/llvm-project/commit/818fd11b95108b1b2a879f474f3c3bf54630b01b
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/merge-loads-feeding-as-shuffleops.ll
M llvm/test/CodeGen/Thumb2/mve-vst2.ll
Log Message:
-----------
[SelectionDAG] Merge consecutive loads feeding as shuffle operands (#207303)
Perform the following fold given loadA and loadB can be proven
consecutive:
```
concat(shuffle(loadA, loadB, mask0), shuffle(loadA, loadB, mask1))
-> shuffle(loadAB, poison, concat(mask0, mask1))
```
Commit: b227ed7c9d42c43a8d3f4a0bbe55d80ac8101de5
https://github.com/llvm/llvm-project/commit/b227ed7c9d42c43a8d3f4a0bbe55d80ac8101de5
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/docs/index.md
A lldb/docs/resources/addingtargetsupport.md
Log Message:
-----------
[lldb][docs] Add platform/target support requirements doc (#207166)
This is a very delayed follow up to:
https://discourse.llvm.org/t/rfc-surveying-lldbs-supported-platforms-and-architectures/83978
Where I realised that even for upstream supported targets, the level of
testing and attention they get varies a lot. Which I think is not a bad
thing, because LLDB would be much more chaotic if it were a bad thing.
The problem I see is that no one really knows how to start writing
proposals for new targets, and no one really knows how to properly
assess one.
Me included, but what I can do is write out some starting points for
both parties. Hopefully this makes the process a bit more fair for those
not used to writing RFCs.
(and if we want to make the rules more strict, we will now have a place
to document that)
The document also includes some technical guidance, but I don't want to
get stuck in the
"How to Write an LLVM backend" type cycle. Where we write a thing and it
becomes outdated instantly.
So what's there is deliberately high level because Developers will have
to learn the codebase anyway
to have any chance of writing target support.
A bit like adding a new language, which has unknown scope. But unlike a
new language, there are plenty of targets to look at, so I think it's
more justifiable here.
In terms of the famous meme:
This document isn't going to tell you how to
"draw the rest of the owl", but it gives you the names of some key
techniques in owl drawing and advice for how to best present your owl to
the "drawings of owls" society when you're done.
Please note that this new requirement of an RFC does not apply to
targets that are in progress or in discussion right now.
Commit: 46e8d53390a0f2aeff3e738ac39623b0eafc03cd
https://github.com/llvm/llvm-project/commit/46e8d53390a0f2aeff3e738ac39623b0eafc03cd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
M llvm/test/CodeGen/X86/sse3-avx-addsub.ll
M llvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/addsub.ll
Log Message:
-----------
[X86] Synchronise middle and backend test coverage for ADDSUBPS/PD patterns (#210919)
Use the same test names wherever possible and ensure sse3-avx-addsub.ll
has test coverage for the IR emitted by the middle-end (no matter how
poor it is)
Prep work for #144489 (sse3-avx-addsub-2.ll will be deleted along with
lowerToAddSubOrFMAddSub)
Commit: c6bb072d9e40fcf66b26f4896ae0beb2d2f44646
https://github.com/llvm/llvm-project/commit/c6bb072d9e40fcf66b26f4896ae0beb2d2f44646
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/AST/StmtPrinter.cpp
M clang/test/OpenMP/declare_reduction_ast_print.cpp
M clang/test/OpenMP/for_ast_print.cpp
M clang/test/OpenMP/parallel_ast_print.cpp
M clang/test/PCH/cxx-explicit-specifier.cpp
M clang/test/SemaTemplate/instantiate-requires-clause.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
M clang/unittests/AST/StmtPrinterTest.cpp
Log Message:
-----------
[Clang] Don't print extra whitespace for comma expression in StmtPrinter (#210920)
For binary expression `1, 2`, StmtPrinter used to print it as `1 , 2`
which doesn't look very pretty.
Commit: be25717739a8b4f15fd4ccc2f8b28490ed67e922
https://github.com/llvm/llvm-project/commit/be25717739a8b4f15fd4ccc2f8b28490ed67e922
Author: Alexey Gerenkov <alexey at espressif.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
A llvm/test/CodeGen/Xtensa/inline-asm-constraints.ll
M llvm/test/CodeGen/Xtensa/inline-asm-invalid.ll
Log Message:
-----------
[Xtensa] Support 'f' Inline Assembly Constraint (#202345)
This adds the 'f' inline assembly constraint, as supported by GCC. An
'f'-constrained operand is passed in a floating point register.
Commit: b3ce81298eb4b3e6fdebc62a7430fd2c848d9fb7
https://github.com/llvm/llvm-project/commit/b3ce81298eb4b3e6fdebc62a7430fd2c848d9fb7
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/source/Interpreter/CommandAlias.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Interpreter/OptionValueFileSpecList.cpp
M lldb/source/Interpreter/OptionValueLanguage.cpp
M lldb/source/Interpreter/OptionValuePathMappings.cpp
M lldb/source/Interpreter/OptionValueRegex.cpp
M lldb/source/Interpreter/Options.cpp
Log Message:
-----------
[lldb][NFC] Remove Stream::Printf calls with constant strings in Interpreter/* (#210289)
`Stream::Printf` needs to call various other (variadic) functions, needs
to parse the input string and potentially handle too-long format
outputs. Calling in with a constant string is wasting a lot of
instruction on doing nothing.
assisted-by: claude
Commit: 45289c7113eee43b38f7feb798f4b4d4a6db1025
https://github.com/llvm/llvm-project/commit/45289c7113eee43b38f7feb798f4b4d4a6db1025
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Commands/CommandObjectHelp.cpp
M lldb/source/Commands/CommandObjectPlatform.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Commands/CommandOptionArgumentTable.cpp
Log Message:
-----------
[lldb][NFC] Remove Stream::Printf calls with constants in Commands/ (#210291)
`Stream::Printf` needs to call various other (variadic) functions, needs
to parse the input string and potentially handle too-long format
outputs. Calling in with a constant string is wasting a lot of
instruction on doing nothing.
assisted-by: claude
Commit: 7aa17579b6299c67996aa1eb0aeed963ae506c93
https://github.com/llvm/llvm-project/commit/7aa17579b6299c67996aa1eb0aeed963ae506c93
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetList.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanBase.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
M lldb/source/Target/ThreadPlanCallFunctionUsingABI.cpp
M lldb/source/Target/ThreadPlanCallUserExpression.cpp
M lldb/source/Target/ThreadPlanRunToAddress.cpp
M lldb/source/Target/ThreadPlanStack.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepInstruction.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Target/ThreadPlanStepThrough.cpp
M lldb/source/Target/ThreadPlanStepUntil.cpp
M lldb/source/Target/ThreadPlanTracer.cpp
Log Message:
-----------
[lldb][NFC] Remove Stream::Printf calls with constant strings in Target/* (#210287)
`Stream::Printf` needs to call various other (variadic) functions, needs
to parse the input string and potentially handle too-long format
outputs. Calling in with a constant string is wasting a lot of
instruction on doing nothing.
assisted-by: claude
Commit: 3ef7c5afbc977d238ab1d69473dbf3da3e3347b3
https://github.com/llvm/llvm-project/commit/3ef7c5afbc977d238ab1d69473dbf3da3e3347b3
Author: Alan Li <me at alanli.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ctlz-cttz-zero-poison-disable-rule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ctlz-cttz-zero-poison.ll
Log Message:
-----------
[GlobalISel][AMDGPU][test] fix cttz/cltz tests in no-assert builds (#210926)
A follow up PR of https://github.com/llvm/llvm-project/pull/198438
This is to address post commit test issues:
https://lab.llvm.org/buildbot/#/builders/202/builds/726
Keep the normal combine and unknown-input baseline coverage enabled in
all builds, and move the named rule-disable checks into an
assertion-only test.
Commit: 6d8d3f851820a61054000dbeaed3ab8e212685d3
https://github.com/llvm/llvm-project/commit/6d8d3f851820a61054000dbeaed3ab8e212685d3
Author: eleviant <eleviant at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/docs/UsersManual.md
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/ptr-subtract-stable.c
Log Message:
-----------
[clang] Add flag for making pointer subtraction defined (#196392)
The C and C++ standards require both operands of pointer subtraction to
refer to elements of the same array object. Clang/LLVM currently relies
on this rule in several optimizations:
- `inbounds` GEP introduces UB assumptions once the computed address
escapes the originating object bounds.
- `sdiv exact` assumes %op1 is divisable by %op2 otherwise it is a
poison value.
The first issue may be addressed with -fwrapv-pointer command line
option, however there is no option in clang to mitigate the second
issue. Patch adds a new -fdefined-pointer-subtraction to address this.
Commit: acfaabebcfd10d4dbabeb54cf0c60509648fb82f
https://github.com/llvm/llvm-project/commit/acfaabebcfd10d4dbabeb54cf0c60509648fb82f
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
R llvm/test/CodeGen/RISCV/rvv/vl-opt-licm.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
Log Message:
-----------
Revert "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (#210937)
Reverts llvm/llvm-project#210028
I've bisected the hangs on rva20 to this commit:
https://lab.llvm.org/buildbot/#/builders/210/builds/11806
Commit: 7f9f1ac7238fc582253f5529d134393003b5da12
https://github.com/llvm/llvm-project/commit/7f9f1ac7238fc582253f5529d134393003b5da12
Author: Nishant Sachdeva <nishant.sachdeva at research.iiit.ac.in>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/tools/llvm-ir2vec/Bindings/CMakeLists.txt
A llvm/tools/llvm-ir2vec/Bindings/python/LICENSE.TXT
A llvm/tools/llvm-ir2vec/Bindings/python/README.md
A llvm/tools/llvm-ir2vec/Bindings/python/ir2vec/__init__.py
A llvm/tools/llvm-ir2vec/Bindings/python/pyproject.toml
A llvm/tools/llvm-ir2vec/Bindings/python/setup.py
M llvm/tools/llvm-ir2vec/CMakeLists.txt
M llvm/utils/release/bump-version.py
Log Message:
-----------
[llvm-ir2vec] Adding metadata for llvm-ir2vec python binding wheel builds (#194222)
The next step is to setup the metadata for the wheel building process,
and subsequently follow it up with workflow jobs that can automate this.
Commit: ea205541b98722b4a2e0ea751b2172715b95fa67
https://github.com/llvm/llvm-project/commit/ea205541b98722b4a2e0ea751b2172715b95fa67
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
A llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (#209885)
Following up to https://github.com/llvm/llvm-project/pull/209883,
move transformations related to lowering/preparing for execution
to VPlanLowering.cpp
This moves materialize*, convertToConcreteRecipes,
dissolveLoopRegions, expandBranchOnTwoConds,
replaceWideCanonicalIVWithWideIV, expandSCEVsToVPInstructions,
addBranchWeightToMiddleTerminator and the alias-mask materialization helpers.
The createScalarIVSteps and scalarizeVPWidenPointerInduction are
promoted to vputils.
Depends on https://github.com/llvm/llvm-project/pull/209883
Commit: aeda9aee7d81c0cb877de15452434121c1b95115
https://github.com/llvm/llvm-project/commit/aeda9aee7d81c0cb877de15452434121c1b95115
Author: Ankit Kumar Tiwari <141545455+ankit-cybertron at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/RISCV/rvv/vecreduce-and-constant-fold.ll
A llvm/test/CodeGen/RISCV/rvv/vecreduce-or-constant-fold.ll
A llvm/test/CodeGen/RISCV/rvv/vecreduce-xor-constant-fold.ll
Log Message:
-----------
[SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (#210883)
Follows up on #207560 and #210126
Adds constant folding for `ISD::VECREDUCE_AND`, `ISD::VECREDUCE_OR`, and
`ISD::VECREDUCE_XOR` in SelectionDAG::FoldConstantArithmetic when the
input is a BUILD_VECTOR of integer constants. Does not fold undef/poison
elements.
Fixes #209108
Commit: 136547ce3f53d8835c20fbdbc602f899ac8a069d
https://github.com/llvm/llvm-project/commit/136547ce3f53d8835c20fbdbc602f899ac8a069d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/X86/outer_loop_test1_no_explicit_vect_width.ll
M llvm/test/Transforms/LoopVectorize/nested-outer-loop-vect.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-inner-latch-successors.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_contiguous.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_hcfg_construction.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test1.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-select-instruction.ll
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Log Message:
-----------
[VPlan] Detect contiguous accesses in outer loop VPlan path. (#203790)
Use SCEV analysis on VPValue pointer operands to detect stride-1 memory
accesses in the outer loop vectorization path. When a load or store
address is an affine AddRec w.r.t. the vectorized outer loop with stride
equal to the element size, mark it as consecutive so it generates a wide
load/store instead of a gather/scatter.
For example, in the column-scaling pattern:
```
for (i = 0; i < N; i++) // outer: vectorized
for (j = 0; j < M; j++) // inner: uniform
A[i*M+j] *= scale[i];
```
The access scale[i] is now correctly identified as contiguous and
generates a vector load instead of a masked gather.
PR: https://github.com/llvm/llvm-project/pull/203790
Commit: f8e258866980da486756e241016dd33ae68450be
https://github.com/llvm/llvm-project/commit/f8e258866980da486756e241016dd33ae68450be
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++] Include sizes in string benchmark names (#210795)
Otherwise we'd have duplicate benchmark names.
Commit: 7f49d95c09e8a22a6de737ae6006edbb3a0adfca
https://github.com/llvm/llvm-project/commit/7f49d95c09e8a22a6de737ae6006edbb3a0adfca
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/include/system_error
Log Message:
-----------
[libc++][NFC] Fix synopsis comment for error_condition::message() (#210724)
The method was marked as noexcept in the synopsis, but it's neither
marked noexcept in the spec nor in our implementation.
Commit: df4bb1f3106d39e5c6b767a28c0531efbbebc2d2
https://github.com/llvm/llvm-project/commit/df4bb1f3106d39e5c6b767a28c0531efbbebc2d2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/test/CMakeLists.txt
M libcxx/test/configs/amdgpu-libc++-shared.cfg.in
M libcxx/test/configs/apple-libc++-shared.cfg.in
M libcxx/test/configs/apple-libc++-system.cfg.in
M libcxx/test/configs/armv7m-picolibc-libc++.cfg.in
R libcxx/test/configs/cmake-bridge.cfg.in
A libcxx/test/configs/harness-configuration.cfg.in
M libcxx/test/configs/ibm-libc++-shared.cfg.in
A libcxx/test/configs/libcxx-substitutions.cfg.in
A libcxx/test/configs/lit.site.cfg.in
M libcxx/test/configs/llvm-libc++-android.cfg.in
M libcxx/test/configs/llvm-libc++-llvm-libc.cfg.in
M libcxx/test/configs/llvm-libc++-mingw.cfg.in
M libcxx/test/configs/llvm-libc++-shared-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-shared-gcc.cfg.in
M libcxx/test/configs/llvm-libc++-shared-no-vcruntime-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-shared.cfg.in
M libcxx/test/configs/llvm-libc++-static-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-static.cfg.in
M libcxx/test/configs/nvptx-libc++-shared.cfg.in
M libcxx/test/configs/stdlib-libstdc++.cfg.in
M libcxx/test/configs/stdlib-native.cfg.in
Log Message:
-----------
[libc++] Compose the test suite Lit site config from harness and installation substitutions (#209638)
This patch restructures how libc++'s Lit site config is generated.
Instead of relying on the user-selected configuration file to include
the CMake bridge, it composes a site configuration from multiple
independent bits.
Importantly, it splits substitutions that pertain to the harness setup
(e.g. where to find Python) and substitutions that pertain to libc++
itself (e.g. the path to libc++ headers). This split and the top-level
composition of a site config file are incremental steps towards
decoupling the test suite from libc++'s own build.
Commit: ad3f09c7de3da1f023bc1134eaa33be6d39cc9ca
https://github.com/llvm/llvm-project/commit/ad3f09c7de3da1f023bc1134eaa33be6d39cc9ca
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
M clang/lib/Analysis/LiveVariables.cpp
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/ImmutableMergeBM.cpp
M llvm/include/llvm/ADT/ImmutableMap.h
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/unittests/ADT/ImmutableMapTest.cpp
M llvm/unittests/ADT/ImmutableSetTest.cpp
Log Message:
-----------
[ADT] Add single-pass merge for ImmutableSet/ImmutableMap (#209807)
The immutable-set/map dataflow joins merged two containers by inserting
the
elements of one into the other one at a time, costing O(|B| * log|A|)
and
re-copying shared spine nodes on every insert.
Add a single-pass, structure-sharing tree merge on ImutAVLFactory
(mergeTrees), exposed as ImmutableSet::Factory::unionSets and
ImmutableMap::Factory::mergeWith. It recurses over the larger operand
and
splits the smaller at each key, returning non-overlapping subtrees
unchanged,
so each spine node is copied at most once: O(|B| * log(|A|/|B| + 1)).
Two flags tune it for the different joins:
* KeepUnmatched - keep keys unique to one side (set union / a lattice
join
with an identity) vs. pass them through the combiner (a symmetric join,
e.g. liveness Must->Maybe).
* SkipShared - return a pointer-identical subtree unchanged in O(1).
Valid
for an idempotent merge (Combine(a, a) == a), which holds for set union
and
every lattice join. Since dataflow states are path-copied from one
another,
a join's operands usually share most subtrees by pointer, so a join that
touches only a few keys becomes nearly O(diff).
Wire it into the Clang lifetime-safety analysis (set and map joins) and
the
LiveVariables merge, and add ImmutableMergeBM to track it.
Speedups on the lifetime-safety dataflow benchmark (LoanPropagation
phase):
pointer cycle in a loop ~2.6x (1.59 s -> 0.61 s)
CFG merges ~190x (1.83 s -> 9.5 ms)
switch fan-out ~1.9x (LiveOrigins; disjoint states, no skip)
LiveVariables is ~2-3x faster on liveness-heavy inputs and neutral on
typical
code (the join is a small fraction of real-code analysis time).
ImmutableMergeBM confirms the merge beats the add loop for small and
near-identical operands, except for independently-built sets differing
by
exactly one element; when one operand is derived from the other -- the
real
dataflow case -- the pointer-skip makes even that a large win. New
randomized
ADT stress tests check the merge against std::set/std::map oracles for
both
canonicalizing and non-canonicalizing factories.
Assisted by: Claude Opus 4.8
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: b8eebf2704f2ebb6894fd952e4f15fdb62270606
https://github.com/llvm/llvm-project/commit/b8eebf2704f2ebb6894fd952e4f15fdb62270606
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/include/__configuration/availability.h
Log Message:
-----------
[libc++][NFC] Re-order availability mapping to `_LIBCPP_INTRODUCED_IN_LLVM_{N}` (#210694)
Noticed that the new additions (from 16f692338cf and 8a531c3608c) were placed
rather randomly. Put the mapping back to reverse chronological order, see
783fd2f9d.
Commit: c40a68644c550dcfa3c3d0b560e3aeea1d159d79
https://github.com/llvm/llvm-project/commit/c40a68644c550dcfa3c3d0b560e3aeea1d159d79
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/comp.h
M libcxx/test/libcxx/type_traits/desugars_to.compile.pass.cpp
Log Message:
-----------
[libc++] Strip cv-refs in __desugars_to specialization for integral types (#208950)
This PR passes the argument type through `__remove_cvref_t` before
passing to `is_integral`.
Fixes #208236
Commit: faaeaf35a50acefd4e25e092e3f720067c40afe3
https://github.com/llvm/llvm-project/commit/faaeaf35a50acefd4e25e092e3f720067c40afe3
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__atomic/support.h
M libcxx/include/__atomic/support/c11.h
M libcxx/include/__atomic/support/gcc.h
M libcxx/include/atomic
M libcxx/include/version
M libcxx/modules/std/atomic.inc
A libcxx/test/std/atomics/atomics.ref/fetch_max.pass.cpp
A libcxx/test/std/atomics/atomics.ref/fetch_min.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_max.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_max_explicit.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_min.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_min_explicit.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/atomic.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/support/atomic_fetch_max_helper.h
A libcxx/test/support/atomic_fetch_min_helper.h
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P0493R5: Atomic minimum/maximum (#180333)
Closes #105418.
Since gcc does not currently support `__atomic_fetch_min/max`, we use a
CAS loop in `atomic_ref` and `support/gcc.h`.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 460778b9d64ed36fd7e80a4cc73ea552aebf016b
https://github.com/llvm/llvm-project/commit/460778b9d64ed36fd7e80a4cc73ea552aebf016b
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/include/__numeric/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
A libcxx/test/std/numerics/numeric.ops/adjacent.difference/pstl.adjacent_difference.pass.cpp
A libcxx/test/std/numerics/numeric.ops/adjacent.difference/pstl.adjacent_difference_op.pass.cpp
A libcxx/test/support/runway_sample.h
A libcxx/test/support/test.support/runway_sample.pass.cpp
Log Message:
-----------
[libc++][pstl] Default implementation of parallel std::adjacent_difference (#207585)
This PR adds a "one-liner" default implementation of parallel
`std::adjacent_difference` on top of parallel binary `std::transform`.
The implementation builds two iterator ranges out of the input one, so
that a zip of these ranges yields adjacent pairs. Then performs a binary
transform to calculate and output the adjacent differences.
Part of https://github.com/llvm/llvm-project/issues/99938
Commit: d7da964ee1eab426e0d1f617ae2947f4e30d304f
https://github.com/llvm/llvm-project/commit/d7da964ee1eab426e0d1f617ae2947f4e30d304f
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/AnalysisDeclContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExplodedGraph.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckObjCDealloc.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TraversalChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
Log Message:
-----------
[analyzer][NFC] Add StackFrame parent-chain range helpers (#210938)
Walking a StackFrame's parent chain was open-coded across the Analysis
library and Static Analyzer as hand-rolled loops of the form `for (const
StackFrame *SF = X; SF; SF = SF->getParent())`.
Add range-based traversal helpers and convert the applicable loops:
* StackFrame::parents() - strict ancestors (excludes *this)
* StackFrame::parentsIncludingSelf() - *this then all ancestors
Both are built on a small forward `parent_iterator` that dereferences to
`const StackFrame &` and advances via getParent(), with a null
past-the-end sentinel.
For the common case of obtaining the current frame from an ExplodedNode
or CheckerContext, add a self-inclusive `stackframes()` convenience on
each that delegates to `getStackFrame()->parentsIncludingSelf()`.
Converted call-sites additionally adopt llvm::any_of / llvm::enumerate /
make_pointer_range where it makes the traversal more declarative. Loops
that stop at a target frame or advance conditionally (i.e. not "walk
until null") are intentionally left as-is.
Commit: f72f994ad894bf82ab8d12f848f583c5d0cf0048
https://github.com/llvm/llvm-project/commit/f72f994ad894bf82ab8d12f848f583c5d0cf0048
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/TableGen/CodeGenHelpers.cpp
M mlir/test/mlir-tblgen/constraint-unique.td
Log Message:
-----------
[mlir][ods] Fix string interpolation at end of description (#209744)
Updates the error streaming string logic to handle the case where string
interpolation used at the end of the description. Previously this could
generate malformed code that would not compile e.g.:
```
"' failed to satisfy constraint: another attribute " << reformat(attr)";
```
With this change the above example would now generate:
```
"' failed to satisfy constraint: another attribute " << reformat(attr) << "";
```
Commit: 3fc3ef399d9972361209917bf26ae9cc7317d3a9
https://github.com/llvm/llvm-project/commit/3fc3ef399d9972361209917bf26ae9cc7317d3a9
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/Expr.cpp
A clang/test/SemaCXX/builtin-dependent-call.cpp
Log Message:
-----------
[Clang] Fix assertion failure when classifying a dependent call to a builtin (#210524)
## Summary
Fix an assertion failure when Clang classifies a built-in call with
type-dependent arguments before template instantiation, e.g., while
deducing an `auto` non-type template parameter:
For example:
```cpp
template <auto> struct S {};
template <typename T>
using Alias = S<__builtin_constant_p(T::x)>;
```
```
Assertion failed: (isa<T>(CanonicalType)), function castAs, file
TypeBase.h, line 9349.
#9 clang::Type::castAs<clang::FunctionType>() const
#10 clang::CallExpr::getCallReturnType(clang::ASTContext const&) const
#11 ClassifyInternal(clang::ASTContext&, clang::Expr const*)
#12 clang::Expr::ClassifyImpl(clang::ASTContext&,
clang::SourceLocation*) const
#13 clang::Sema::DeduceAutoType(...)
#14 clang::Sema::CheckTemplateArgument(...)
```
## Cause
Built-in references initially have the BuiltinFn placeholder type. For a non-dependent call, `BuildResolvedCallExpr()` applies `CK_BuiltinFnToFnPtr`, converting the callee to its function-pointer type.
When a call has type-dependent arguments, `BuildCallExpr()` postpones semantic analysis until instantiation. The callee, therefore, retains its BuiltinFn placeholder type. Deducing the auto non-type template parameter classifies the dependent call through `Expr::ClassifyImpl()`. This calls `CallExpr::getCallReturnType()`, which previously did not handle BuiltinFn and attempted to cast the placeholder to FunctionType, triggering an assertion.
The issue also affects ordinary builtins such as `__builtin_ffs` and is not specific to` __builtin_constant_p`.
## Fix
Handle `BuiltinFn` alongside the dependent and `Overload` callee cases in `CallExpr::getCallReturnType()` and return `DependentTy`. This matches the type `BuildCallExpr()` gives the `CallExpr` itself, so `getCallReturnType()` and `getType()` now agree on such calls.
Built-in resolution and built-in-specific type checking still occur as usual during template instantiation.
Added coverage for dependent calls and successful instantiation of `__builtin_constant_p` and `__builtin_ffs`, a non-dependent control case, and getCallReturnType() for a BuiltinFn callee.
Commit: fe0bc1136dc991486e6a84d6ed034dc3617faaa7
https://github.com/llvm/llvm-project/commit/fe0bc1136dc991486e6a84d6ed034dc3617faaa7
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.async.tensor.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx1250.ll
Log Message:
-----------
[NFC][AMDGPU] Add s_wait asynccnt/tensorcnt test for gfx13 (#210916)
Commit: f2153eec7aaddd227c303bf0b6e6a8ccb7863857
https://github.com/llvm/llvm-project/commit/f2153eec7aaddd227c303bf0b6e6a8ccb7863857
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/TargetParser/XtensaTargetParser.cpp
Log Message:
-----------
[Xtensa][NFC] Use compact enum for CPUNames/features (#206954)
Store strings without relocations using compact enums. This reduces the
size of libLLVM.so .data.rel.ro by ~1kiB.
Commit: 4d4bf128eb54cdd2ad347507208a202da1f9c172
https://github.com/llvm/llvm-project/commit/4d4bf128eb54cdd2ad347507208a202da1f9c172
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.illegal-data-type.err.ll
Log Message:
-----------
[AMDGPU] Reject illegal buffer atomic data widths in SelectionDAG (#210925)
Continuation of the fix introduced in #210366, but this time for
raw/struct buffer atomics instead of image atomics
Commit: a83cc57559428ebd51d51c83db27a9454fbbe114
https://github.com/llvm/llvm-project/commit/a83cc57559428ebd51d51c83db27a9454fbbe114
Author: eleviant <eleviant at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/test/CodeGen/ptr-subtract-stable.c
Log Message:
-----------
Attempt to fix buildbot failure (#210956)
Value names are discarded by default on build without asserts.
Commit: 981735b4df68cab22c5c8309f4fbc6b26aab7258
https://github.com/llvm/llvm-project/commit/981735b4df68cab22c5c8309f4fbc6b26aab7258
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/RISCV/gathered-loads-interleave-factor-remainder.ll
Log Message:
-----------
[SLP]Fix crash on short interleaved gathered-load remainder
A trailing, undersized chunk could keep an InterleaveFactor too
large for it, so RISCVTTIImpl::getInterleavedMemoryOpCost divided
by it and built a zero-element vector type.
Fixes #210849
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210965
Commit: 3ed183660093a3d6aa286b5d1339a19c0c834aa1
https://github.com/llvm/llvm-project/commit/3ed183660093a3d6aa286b5d1339a19c0c834aa1
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
Log Message:
-----------
[GlobalISel][AArch64] Add more memcpy and memmove tests (NFC) (#210263)
Test inlined memcpy and memmove operations with multiple loads/stores
with different sizes.
New IR tests added for size 7 to check which one of load/store sequences
we generate:
- 4 + 2 + 1 bytes
- 4 + 4 bytes (4 bytes at offset, 4 bytes at offset + 3)
We also didn't have the `memcpy_inline_...` tests for the
`memmove.inline` intrinsic. I've copied all `memcpy_inline_...` tests
for `memmove.inline`, with the exception of sizes 65, 64, and 63, as I'm
not sure whether they're useful. (the same edge cases are already
checked in tests with sizes 10 and 7)
List of all IR tests added:
- memcpy_7
- memcpy_7_volatile
- memcpy_inline_7
- memcpy_inline_7_volatile
- memmove_7
- memmove_7_volatile
- memmove_inline_0
- memmove_inline_0_volatile
- memmove_inline_7
- memmove_inline_7_volatile
- memmove_inline_10
- memmove_inline_10_volatile
- memmove_inline_300
- memmove_inline_300_volatile
Commit: 1a11f6ca17790ced1f3108c290e9c48d9bdb55e3
https://github.com/llvm/llvm-project/commit/1a11f6ca17790ced1f3108c290e9c48d9bdb55e3
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntime.cpp
R lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
R lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/CMakeLists.txt
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
Log Message:
-----------
[lldb] Delete AppleObjCRuntimeV1 (#203190)
This was used in older 32-bit ObjC programs, and it is not used anywhere
by the debugger.
Commit: 27eeb7370281e4fdefdddeaa4b3cbb8ca11ea71f
https://github.com/llvm/llvm-project/commit/27eeb7370281e4fdefdddeaa4b3cbb8ca11ea71f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Basic/TargetOptions.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/Options/Options.td
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenAMDGPU.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Clang.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/CIR/CodeGenHIP/target-features.hip
A clang/test/CodeGenOpenCL/amdgpu-module-flag-xnack-sramecc.cl
A clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
M clang/test/Driver/amdgpu-features.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/amdgpu-xnack-sramecc-flags.c
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-features.hip
M clang/test/Driver/target-id.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/break-smem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target-legacy-triples.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-xnack.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/gfx902-without-xnack.ll
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
M llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/limit-soft-clause-reg-pressure.mir
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
A llvm/test/CodeGen/AMDGPU/mattr-xnack-sramecc-legacy.ll
A llvm/test/CodeGen/AMDGPU/module-flag-sramecc.ll
A llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
A llvm/test/CodeGen/AMDGPU/module-flag-xnack-sramecc-combined.ll
A llvm/test/CodeGen/AMDGPU/module-flag-xnack.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/nsa-vmem-hazard.mir
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg-crash.ll
M llvm/test/CodeGen/AMDGPU/soft-clause-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
M llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
R llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-invalid-any-off-on.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
A llvm/test/Linker/Inputs/amdgpu-sramecc-module-flag-0.ll
A llvm/test/Linker/Inputs/amdgpu-sramecc-module-flag-1.ll
A llvm/test/Linker/Inputs/amdgpu-sramecc-module-flag-any.ll
A llvm/test/Linker/Inputs/amdgpu-xnack-module-flag-0.ll
A llvm/test/Linker/Inputs/amdgpu-xnack-module-flag-1.ll
A llvm/test/Linker/Inputs/amdgpu-xnack-module-flag-any.ll
A llvm/test/Linker/amdgpu-sramecc-module-flag-0.ll
A llvm/test/Linker/amdgpu-sramecc-module-flag-1.ll
A llvm/test/Linker/amdgpu-sramecc-module-flag-any.ll
A llvm/test/Linker/amdgpu-xnack-module-flag-0.ll
A llvm/test/Linker/amdgpu-xnack-module-flag-1.ll
A llvm/test/Linker/amdgpu-xnack-module-flag-any.ll
M llvm/test/MC/AMDGPU/xnack-mask.s
A llvm/test/Verifier/AMDGPU/module-flag-sramecc.ll
A llvm/test/Verifier/AMDGPU/module-flag-xnack.ll
Log Message:
-----------
AMDGPU: Use module flags to control xnack and sramecc (#204595)
This ensures these ABI details are encoded in the IR module
rather than depending on external state from command-line flags.
Previously, these were encoded as function-level subtarget features.
The code object output was a single target ID directive implied
by the global subtarget. The backend would previously check if a
function's subtarget feature mismatched the global subtarget. This
is avoided by making xnack and sramecc module-level properties from
the start. This also provides proper linker compatibility
enforcement, moving the error point earlier.
The old encoding was also an abuse of the subtarget feature system.
Subtarget features are a bitvector, and later features in the string
can override earlier ones. The old handling added a special case
where explicit settings were preserved: ordinarily +feature,-feature
should result in the feature being disabled, but +xnack,-xnack would
preserve the explicit "-xnack" state, which differs from the absence
of any xnack setting.
The new flags are encoded as 0/1, with the "any" case represented
as the absence of the flag. I considered an explicit tri-state unknown
value, but decided against it.
This also removes warnings when using these module flags on targets
that do not support the corresponding feature. Previously, messages
were written directly to stderr instead of using proper diagnostics.
Avoiding the warning reduces burden on frontends to check which targets
require the flags.
For migration purposes, the subtarget features still exist. Currently,
they are still respected in the various binary tools, pending
disassembler changes to determine target ID modifiers from e_flags.
CodeGen requires using the module flags. An error will be raised when
attempting to use the old global subtarget features. These should be
removed after a migration period for frontends to update. Functionality
wise, bitcode autoupgrade should work. Old bitcode will not have the
flags, resulting in a different target ID in the output binary than
expected, but it should run correctly.
New cl::opts exist only because it was inconvenient to update all
tests using multiple xnack modes. Users should never use these.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Commit: f90e121dde60bea7e2988cf277ca4a484bce33b9
https://github.com/llvm/llvm-project/commit/f90e121dde60bea7e2988cf277ca4a484bce33b9
Author: Paulius Velesko <pvelesko at pglc.io>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
A clang/test/Driver/darwin-hip-spirv-version.hip
Log Message:
-----------
[Darwin] Use macOS product version in ensureTargetInitialized (#206902)
`Darwin::ensureTargetInitialized()` recorded the raw triple OS version
from `getOSVersion()`, which on macOS is the Darwin *kernel* version
(e.g. `24.3.0`), not the macOS *product* version (`15.x`). The offload
host job later calls `setTarget()` again from `AddDeploymentTarget()`
with the product version; `setTarget()`'s reinit guard only
short-circuits when the versions match, so the mismatch trips
`assert(!TargetInitialized && "Target already initialized!")` and clang
aborts on every `-x hip --offload=spirv64* --target=arm64-apple-darwin`
compile.
Convert macOS kernel versions via `getMacOSXVersion()` so the lazy init
records the same version `AddDeploymentTarget()` uses later.
Commit: b1d21c6d3121898dc13c0df8cf9e4410bee75cfb
https://github.com/llvm/llvm-project/commit/b1d21c6d3121898dc13c0df8cf9e4410bee75cfb
Author: Paulius Velesko <pvelesko at pglc.io>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
A llvm/test/Transforms/ExpandVariadics/spirv-printf.ll
Log Message:
-----------
[ExpandVariadics] Don't lower unmangled C printf on SPIR-V (#206998)
An unmangled C `printf` declaration demangles to bare `printf` (no
argument list), so `SPIRV::ignoreFunction`'s `printf(` prefix check
missed it and ExpandVariadics packed its arguments into a vararg buffer;
the SPIR-V backend then passed the buffer pointer as printf's first
variadic operand, so device printf printed pointer values instead of the
actual arguments. Match the bare name too so OpenCL/HIP printf (emitted
unmangled) is left as a variadic call for the backend's OpenCL.std
printf lowering.
Commit: 4aa8d561bb06ecf89c723524fddbf0b58c5ec205
https://github.com/llvm/llvm-project/commit/4aa8d561bb06ecf89c723524fddbf0b58c5ec205
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAArch64.td
Log Message:
-----------
[LLVM][SVE] Convert FFR intrinsic definition to use IntrRead/IntrWrite. (#210084)
Follows on from https://github.com/llvm/llvm-project/issues/154144 to
better articulate the FFR intrinsics memory effects.
I've been deliberatly cautious with marking FFR as read/write for the
load intrinsics. There is an argument they could be write only but I'm
not looking to optimise FFR accesses at this stage.
Commit: 42972f5e5d950b6644a926f402dc54ea3ff06ec3
https://github.com/llvm/llvm-project/commit/42972f5e5d950b6644a926f402dc54ea3ff06ec3
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/pointer-to-empty-data-member.cpp
Log Message:
-----------
[CIR] Introduce data_member_offset attribute (#208777)
Some fields, like no_unique_address marked ones, aren't present in the
CIR struct type. This attribute represents an offset into a struct
instead, since get_member isn't possible without a member.
I also considered representing these types in the struct, but it ends up
causing a lot of awful looking structs, and forces the LLVMIR to contain
empty fields for each of these, but not in lexical order, which is
particularly awful looking.
I considered making this part of data-member, but it seems like not a
particularly good idea, since this isn't really getting a 'member' in
the traditional sense.
Commit: 0e678e9ef18b1b2d3261207e288ae3f2667bbd19
https://github.com/llvm/llvm-project/commit/0e678e9ef18b1b2d3261207e288ae3f2667bbd19
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port ea205541b987 (#210977)
Commit: 11a6145c5ed1f9676ad18189b7071e456c76bb79
https://github.com/llvm/llvm-project/commit/11a6145c5ed1f9676ad18189b7071e456c76bb79
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 921f4da4a05f (#210976)
Commit: 114372a86e7463cbdb52ced9f73cc7d70f49eda9
https://github.com/llvm/llvm-project/commit/114372a86e7463cbdb52ced9f73cc7d70f49eda9
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 30c0454414ec (#210975)
Commit: 14cb4614c65acc3c4f454220c2f2dae7b5ddaf34
https://github.com/llvm/llvm-project/commit/14cb4614c65acc3c4f454220c2f2dae7b5ddaf34
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/BUILD.gn
Log Message:
-----------
[gn build] Port 1a11f6ca1779 (#210974)
Commit: 2cd5deb2208683bc2d3545e125258a9714f3aef1
https://github.com/llvm/llvm-project/commit/2cd5deb2208683bc2d3545e125258a9714f3aef1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/utils/test-at-commit
Log Message:
-----------
[libc++] Fix test-at-commit after df4bb1f3106d (#210983)
Commit: 1d0b606198b502a307da0f688262a1044c38f316
https://github.com/llvm/llvm-project/commit/1d0b606198b502a307da0f688262a1044c38f316
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mach_vm.cpp
A compiler-rt/test/tsan/Darwin/mach_vm_deallocate_race.c
Log Message:
-----------
[Darwin][TSan] Fix race in mach_vm_deallocate interceptor (#210716)
I have seen an issue whereby the meta store in MetaMap::AllocBlock lands
in the unmapped gap left during the tsan::MetaMap::ResetRange call;
where the range is first unmapped, and then remapped with MAP_FIXED.
This occurred under the mach_vm_deallocate interceptor, because it first
does the deallocate call, and only then does it call UnmapShadow -
leaving a gap where a fresh slab for malloc can land, only to have the
meta region for that range mapped out from under it, resulting in a bad
access fault.
It is worth noting that there is a comment above the IsValidMmapRange
function (which gets called during UnmapShadow), that describes this
exact issue in the context of munmap.
rdar://179172055
Assisted by: Claude
Commit: 215b3e42d03e7e0cbd49ae0b15e726b3d1bdc360
https://github.com/llvm/llvm-project/commit/215b3e42d03e7e0cbd49ae0b15e726b3d1bdc360
Author: Michał Kurek <42780336+MKJM2 at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/load-combine-masked.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
A llvm/test/CodeGen/X86/load-combine-masked.ll
Log Message:
-----------
[DAGCombiner] Teach MatchLoadCombine to look through AND masks (#200247)
Fixes #191193
`MatchLoadCombine` can combine OR trees built from shifted/zexted
consecutive byte loads into a wider load, but it currently bails out
when one of the loaded bytes is masked before being shifted into place.
This will miss patterns such as the following
```
zext(load i8 p) | (zext(and(load i8 p+1, 3)) << 8)
```
which can be implemented as a 16-bit load followed by a mask.
This PR teaches `calculateByteProvider()` to look through constant AND
masks by tracking the mask applied to each byte. When the byte providers
cover a consecutive load range, we form the wider load and apply a final
mask to preserve the original value.
Added X86 and AArch64 tests covering the masked-byte combine, plus
negative cases (non-adjacent loads, volatile, variable mask, multi-use
AND).
Assisted-by: Claude Code
Commit: 81081c00e99e35394e4d09016e565443cbec254e
https://github.com/llvm/llvm-project/commit/81081c00e99e35394e4d09016e565443cbec254e
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN] Remove unused debug helper (NFC) (#210333)
The `GVNPass::dump` method is not used anywhere. Moreover, there's no
`GVNPass` state that corresponds to its parameter type. Even if a
`GVNPass::dump` method could be useful, this one wasn't it.
Commit: 7c445ab1d08597a89a829ff938b55264cc480150
https://github.com/llvm/llvm-project/commit/7c445ab1d08597a89a829ff938b55264cc480150
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libc/src/__support/CPP/type_traits/is_floating_point.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/cast.h
M libc/src/__support/FPUtil/dyadic_float.h
A libc/src/__support/FPUtil/float128.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/macros/properties/types.h
M libc/test/src/__support/FPUtil/CMakeLists.txt
A libc/test/src/__support/FPUtil/float128_test.cpp
Log Message:
-----------
[libc] Float128 Emulation in LLVM libc (#200565)
Introducing emulated float128 in LLVM libc
Commit: 7c40a1d796cec2207bc697d94355a71962ee33df
https://github.com/llvm/llvm-project/commit/7c40a1d796cec2207bc697d94355a71962ee33df
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
Log Message:
-----------
[CostModel][X86] getArithmeticReductionCost - convert to CostKindTblEntry entries. NFC. (#210969)
No actual cost changes yet, but makes it much easier to adjust costs as
we progress.
Commit: b679982e67d34e8afa925691715aa69e06ea7e80
https://github.com/llvm/llvm-project/commit/b679982e67d34e8afa925691715aa69e06ea7e80
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/struct-return-cost.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/call-decisions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/print-attributes.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-widen-struct-return.ll
Log Message:
-----------
[VPlan] Remove additional stray whitespace when printing calls. (#210979)
VPWidenCallRecipe::print had a stray whitespace between call and
fucntion name. Strip stray whitespace and add strict whitespace test to
guard against regressions.
Commit: c3e48dfd552de502f778f1b190933944a62cf75a
https://github.com/llvm/llvm-project/commit/c3e48dfd552de502f778f1b190933944a62cf75a
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck][NFC] Encapsulate more into InputAnnotationLabeler (#207484)
This patch migrates more label-making concerns from
buildInputAnnotations into the InputAnnotationLabeler. It also
eliminates the brittle approach of creating a new InputAnnotationLabeler
object with a separate label prefix upon each MatchResultDiag while
persisting an object to close the previous search range. Instead, this
patch creates just one InputAnnotationLabeler object to handle all
diags, and it maintains a table of label prefixes for check patterns.
That approach seems easier to understand and more amenable to code
evolution.
Commit: c49595f5ce2f59a21e0c929254af7f0d6ed0e5c6
https://github.com/llvm/llvm-project/commit/c49595f5ce2f59a21e0c929254af7f0d6ed0e5c6
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/resources/build.md
Log Message:
-----------
Revert "[lldb][Windows] Only embed Python home in Debug config (#209464)" (#210989)
This reverts commit 5a19a3a4b9915d19fff1b8298e723ee2b24ebc6a.
To fix a failure with MinGW
(https://github.com/llvm/llvm-project/pull/209464#issuecomment-5034222807).
Commit: ba836590ffed1305a770fc18f4a3f676f9829df1
https://github.com/llvm/llvm-project/commit/ba836590ffed1305a770fc18f4a3f676f9829df1
Author: David Green <david.green at arm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SDAG] Use DAG.getTokenFactor in more places (#210949)
This will cause the TokenFactor to be split into nodes of at most
SDNode::getMaxNumOperands() size.
This fixes #189161 but I have not added a test case as the output is
in excess of 160000 lines long.
Commit: 9eac681359c922aff608612eda0a0adc15106213
https://github.com/llvm/llvm-project/commit/9eac681359c922aff608612eda0a0adc15106213
Author: Soham Karandikar <43989259+skadewdl3 at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Fir/basic-program.fir
A flang/test/Integration/OpenMP/declare-target-funcs.f90
Log Message:
-----------
[Flang] [OpenMP] Run `MarkDeclareTarget` pass again before `HostOpFiltering` (#210049)
Fixes #209123.
The power operation `math.ipowi` is converted to a function by
`ConvertMathToFuncs`. When used in a target region, this pass runs well
after `MarkDeclareTarget` which causes the newly created power function
to not have the `omp.declare_target` attribute, which in turn trips up
the `HostOpLowering` pass. Detailed investigation
[here](https://github.com/llvm/llvm-project/issues/209123#issuecomment-4991765854).
Right now, I've just added a couple of lines to run `MarkDeclareTarget`
again, before `HostOpFiltering`. Since I'm quite new to this, I'd like
some help on whether this is acceptable, or should the
`MarkDeclareTarget` pass be moved to after `ConvertMathToFuncs` and
before `HostOpFiltering`.
Commit: 7cd9cee53617d526c3526d01426ba552f2a825bb
https://github.com/llvm/llvm-project/commit/7cd9cee53617d526c3526d01426ba552f2a825bb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/reduce-add.ll
M llvm/test/Analysis/CostModel/X86/reduce-fadd.ll
Log Message:
-----------
[CostModel][X86] getArithmeticReductionCost - add missing type split handling for AVX512 types (#210994)
Commit: e5a5c5dfdb4ac6b004ab31df25c30f4cc8772afe
https://github.com/llvm/llvm-project/commit/e5a5c5dfdb4ac6b004ab31df25c30f4cc8772afe
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
A flang/test/Semantics/OpenMP/declare-variant-restriction.f90
Log Message:
-----------
[flang][OpenMP] Add semantic checks for two DECLARE VARIANT restrictions (#209528)
Diagnose two DECLARE VARIANT restrictions from the OpenMP specification
(5.2 [7.5], 6.0 [9.6]) that were previously accepted without error:
- If a procedure is determined to be a function variant through more
than one DECLARE VARIANT directive, the construct selector set of their
context selectors must be the same.
- A procedure determined to be a function variant may not be specified
as a base function in another DECLARE VARIANT directive.
Assisted-by: Cursor
Commit: f82f9693fa3a9bee4e045a06417740586cfbf207
https://github.com/llvm/llvm-project/commit/f82f9693fa3a9bee4e045a06417740586cfbf207
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCDXContainerWriter.h
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/test/CodeGen/DirectX/ContainerData/ContainerFlags.ll
Log Message:
-----------
[DirectX] Add slim debug support (#204459)
When DXC is called with `/Zs` flag, it emits "slim" debug info. It means
that ILDB section is omitted from the main DXContainer output and from
the output PDB file.
This patch reimplements similar behavior in llc, introducing
`--dx-slim-debug` flag.
Commit: b02de9d35e7aad5b1dfb6dd8bc759bb8fa2d539f
https://github.com/llvm/llvm-project/commit/b02de9d35e7aad5b1dfb6dd8bc759bb8fa2d539f
Author: nvmitch <mbriles at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
Log Message:
-----------
[GlobalISel] Use correct fp semantics when building constants. (#210190)
This bug can materialize as a `bfloat 1.0` becoming `0x3C00` which is
the bit pattern for `half 1.0`. After this change, `0x3F80` is correctly
returned.
The fix is to use the destination type to convert the provided
constant's semantics in `buildFConstant`. Added a unit test.
Removed `getAPFloatFromSize`, no more users.
Commit: 17ac8fdd95283110a14f1de8c15a0fc661119296
https://github.com/llvm/llvm-project/commit/17ac8fdd95283110a14f1de8c15a0fc661119296
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/include/__vector/layout.h
M libcxx/include/__vector/vector.h
A libcxx/test/libcxx/containers/sequences/vector/incomplete_type.compile.pass.cpp
Log Message:
-----------
[libc++] Don't require complete types in vector<T>::empty() (#210754)
This was previously not required, but the patch to introduce a new
size-based vector layout unintentionally added this new requirement. We
almost certainly not want to promise this guarantee going forward, but
we should actually land this change explicitly and consider the
transition story, not do it as a fallout of another refactoring.
Fixes #210732
Commit: 754c2bc62d1db7af5e65fe707705606d5482c61e
https://github.com/llvm/llvm-project/commit/754c2bc62d1db7af5e65fe707705606d5482c61e
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
Log Message:
-----------
[SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (#210978)
'zext(X - 1) ult C' => 'X in [1, C+1)';
also ugt case (wrapping range)
Alive2 proof: https://alive2.llvm.org/ce/z/zcdv_2
Commit: 7b159b648bc3684da152a3f14b5ee53456736fe9
https://github.com/llvm/llvm-project/commit/7b159b648bc3684da152a3f14b5ee53456736fe9
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Lexer.cpp
M clang/test/Analysis/mig.mm
M clang/test/Lexer/unicode.c
Log Message:
-----------
[Clang] Defaults `-Wunicode-whitespace` to an error. (#210945)
Clang accepts some Unicode whitespaces in some context. There are a few
issues with this:
- The support is incomplete and inconsistent, as illustrated in #38934
- We are not consistent with the Unicode specs (tr1, tr55) in that we
treat U+0028/0+0029 as horizontal separators while Unicode consider them
vertical.
Ultimately, Unicode whitespaces are more likely than not unintended.
Neither GCC nor MSVC support this extension.
Fixes #38934.
Commit: 444ea3e6353a00c274fa19e2839cfcfc2cdfab36
https://github.com/llvm/llvm-project/commit/444ea3e6353a00c274fa19e2839cfcfc2cdfab36
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Log Message:
-----------
AMDGPU/GlobalISel: Clean up fp LLT usage in AMDGPULegalizerInfo (#210999)
Remove local variables in favor of global F16/BF16/F32/F64/V2F16/V2BF16.
These are now proper floating point LLTs instead of LLT::scalar.
A couple of legalizer actions now use fp extended LLT for type checks.
This is intended and is planned for all floating point opcodes.
In most cases the current S16/S32/S64 action on floating point opcodes was
intended for F16/F32/F64, and we will need to define an action for BF16.
Commit: 119b31fd30644157b9429d122f777c6ae2e34a09
https://github.com/llvm/llvm-project/commit/119b31fd30644157b9429d122f777c6ae2e34a09
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/fptoi-nan-guard-fold.ll
A llvm/test/CodeGen/AMDGPU/fptoi-nan-guard-fold.ll
Log Message:
-----------
[DAGCombiner] Fold NaN-guard fptosi/fptoui select to saturating variant (#201435)
Fold select (setcc X, 0, SETUO), 0, (fp_to_sint/fp_to_uint X) to
fp_to_sint_sat/fp_to_uint_sat in the generic DAG combiner, gated by
shouldConvertFpToSat. Also handles the SETO form with swapped arms, and
looks through an AND mask on the conversion result. Lit tests added for
AMDGPU and AArch64.
Assisted-by: Claude Code
Commit: 53199a1b9216a15d13da824c9140daf8863438aa
https://github.com/llvm/llvm-project/commit/53199a1b9216a15d13da824c9140daf8863438aa
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.distance/iterator_sentinel.pass.cpp
R libcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.distance/lwg3664.pass.cpp
Log Message:
-----------
[libc++][ranges] Mark LWG3664 as resolved (#210550)
Closes https://github.com/llvm/llvm-project/issues/105066.
When libc++ implemented `ranges::distance` in
c965d5448ecdf9a5513983862a78a2ba8f7fbab8, LWG3664 was implemented
together. The patch additionally changed cast result type from `const
decay_t<I>&` to `decay_t<I>`, which partially implemented LWG4242.
Currently, we are using `iter_difference_t<_Ip>` as the return type of
one `operator()` overload while LWG3664 modified that overload to return
`iter_difference_t<decay_t<_Ip>>`. The change is NFC because when
`iter_difference_t<decay_t<_Ip>>` is valid, `iter_difference_t<_Ip>` is
also valid and denotes the same type.
References:
- https://wg21.link/LWG3664
- https://eel.is/c++draft/range.iter.op.distance
---------
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 4f58fc26ad7652cdcfda3e6d50a372241265ee2b
https://github.com/llvm/llvm-project/commit/4f58fc26ad7652cdcfda3e6d50a372241265ee2b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Lex/Lexer.cpp
M clang/test/C/C11/n1518.c
M clang/test/C/C23/n2836_n2939.c
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/FixIt/fixit-unicode.c
M clang/test/Lexer/escape_newline_unicode.c
M clang/test/Lexer/unicode.c
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/ParserHLSL/semantic_parsing.hlsl
M clang/test/Preprocessor/ucn-allowed-chars.c
M clang/test/Preprocessor/ucn-pp-identifier.c
M clang/test/Preprocessor/utf8-allowed-chars.c
M clang/unittests/Basic/DiagnosticTest.cpp
Log Message:
-----------
[Clang] Yet more consistent Unicode diagnostics (#211002)
This PR
- Use the recently introduced `EscapeSingleCodepointForDiagnostic` in
more places
- Fix a bug where U+FEFF was incorrectly treated as a BOM and therefore
did not render at all in diagnostics
Commit: 2f721aef85accd57afdb3e6bdb6e6fa5d5629579
https://github.com/llvm/llvm-project/commit/2f721aef85accd57afdb3e6bdb6e6fa5d5629579
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
Log Message:
-----------
[AMDGPU] Upstream True16 runlines for various tests (#209891)
Commit: 2542743b1507ace8d05d894f5ec5135e9a9863ba
https://github.com/llvm/llvm-project/commit/2542743b1507ace8d05d894f5ec5135e9a9863ba
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[SystemZ] Enable clang-target-64-bits for s390x (#210361)
Enable clang-target-64-bits for s390x so we can enable tests like
https://github.com/llvm/llvm-project/pull/210341
Commit: 162d9f09299d3951d7c73e6aa00f2e2bac459e26
https://github.com/llvm/llvm-project/commit/162d9f09299d3951d7c73e6aa00f2e2bac459e26
Author: Max Desiatov <m_desiatov at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A lld/test/wasm/relocatable-segment-flags.s
M lld/wasm/OutputSegment.cpp
Log Message:
-----------
[lld][WebAssembly] Preserve segment linking flags in --relocatable output (#210747)
`OutputSegment::addInputSegment` copied each input chunk's alignment but
never its flags, so a relocatable link serialized `flags=0` for every
data segment and dropped `RETAIN` and `STRINGS`. Losing `RETAIN` let the
final default `--gc-sections` link discard runtime-registered sections
such as Swift's `swift5_*` metadata, corrupting the program. This unions
each input segment's flags into the output segment's `linkingFlags` and
adds a `lld/test/wasm` test covering `RETAIN`, `STRINGS`, and flag
accumulation across coalesced segments.
Resolves
https://github.com/swiftlang/swift-package-manager/issues/10314.
Commit: 853ab6e38bc7c796029596fcc8d314105dd823d2
https://github.com/llvm/llvm-project/commit/853ab6e38bc7c796029596fcc8d314105dd823d2
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/flatten-elementwise.mlir
M mlir/test/Dialect/Linalg/flatten-unsupported.mlir
Log Message:
-----------
[MLIR][Linalg] Fix FlattenElementwiseOp for linalg.broadcast (#210738)
Follow-up of https://github.com/llvm/llvm-project/pull/207005
The added test 'unsupported_dim_expanding_broadcast' passed with
broadcast-like 'linalg.generic' but failed with a 'linalg.broadcast'.
Generating an incorrect `linalg.collapse_shape` raising error `op number
of elements must be preserved` upon flattening. This patch prevents
broadcasting ops to be targeted by this op while allowing 0-D to N-D
broadcasting to take place as for linalg.fill.
I removed the negative test
`unsupported_rank_expanding_broadcasting_elementwise` as it had been
mentioned in the previous MR that it was repeating the above
`unsupported_broadcasting_elementwise` test.
Commit: b4ef17b8c77260f8ca9229f1b764dadbf0c1348c
https://github.com/llvm/llvm-project/commit/b4ef17b8c77260f8ca9229f1b764dadbf0c1348c
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/SemaOpenACC/loop-construct.cpp
Log Message:
-----------
[OpenACC] Better handle error overloaded ops in ForStmtChecker (#211005)
The OpenACC 'loop' constructs do a bunch of checking on the contents of
a ForStmt. However, in cases of overloaded operators, some of the
checking we assumed happened (like operators having a certain number of
args) doesn't hold in the case of errors. This patch adds some
guards to make sure we error-out if the number of args doesn't match
what we're expecting everywhere I could find it.
Fixes: #210958
Commit: 15ec65a698e10cf693c158c05cf49351c9b1618c
https://github.com/llvm/llvm-project/commit/15ec65a698e10cf693c158c05cf49351c9b1618c
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/SemaOpenACC/compute-construct-reduction-clause.cpp
Log Message:
-----------
[OpenACC] Make sure our 'init' recipe handles nullptr_t (#211008)
The bug report shows that we missed one scalar type in our
initialization code, nullptr_t! This patch adds the initializer to make
sure it works correctly, and adds the test (plus a non-template
version).
Fixes: #210877
Commit: d534912565bd46fe4c031c46c5204db3ec03dbed
https://github.com/llvm/llvm-project/commit/d534912565bd46fe4c031c46c5204db3ec03dbed
Author: adams381 <adams at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
A clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
Log Message:
-----------
[CIR] Add x86_64 aggregate calling-convention lowering (#210528)
The x86_64 SysV calling-convention bridge in CallConvLowering so far handles only scalar arguments and returns. A function with a struct or array parameter is reported NYI. This teaches the bridge to classify struct and array aggregates.
A struct is mapped to an `llvm::abi` record built from the DataLayout field offsets and the CanPassInRegisters flag on the module's `cir.record_layouts` metadata, and an array maps to an `llvm::abi` array. The library's classifier then produces the ArgInfo, either Direct with a coerced register type the existing rewriter flattens, or Indirect via sret, byval, or byref. CIRABIRewriteContext already applies all of these, so this only feeds it the aggregate classifications and leaves the scalar path untouched.
Aggregate shapes the bridge does not yet classify stay errorNYI, so an unsupported signature fails cleanly instead of being misclassified. Those are unions (whose register coercion needs a widen fixup), packed and over-aligned records, empty-for-ABI records, and `_BitInt`. All-float aggregates such as a two-`float` struct or `float[2]` are included too. Their SSE class coerces to a `<2 x float>` vector the bridge cannot yet represent, so instead of passing the aggregate through unchanged it reports the coercion as NYI.
The byval and sret argument attributes still carry the CIR record type. Converting that to the LLVM type in LowerToLLVM is a separate change, so the byval and sret tests check the CIR output only, while the direct and flatten tests also check the lowered LLVM IR.
Commit: 16b44e00cc3754ea14b6873c885754af56d316e5
https://github.com/llvm/llvm-project/commit/16b44e00cc3754ea14b6873c885754af56d316e5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
Log Message:
-----------
AMDGPU: Do not report inline immediates as legal for generic operands (#208216)
This has one test change in an SI_CS_CHAIN_TC* test. Either this is fine
or the instruction definition should be changed.
Commit: effb51959f01e4b70dac8f61fc740c550c101e23
https://github.com/llvm/llvm-project/commit/effb51959f01e4b70dac8f61fc740c550c101e23
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
A llvm/test/CodeGen/AMDGPU/si-fold-operands-constant-fold-imm-operand.mir
Log Message:
-----------
AMDGPU: Constant fold instructions with inline immediate operands (#208422)
Previously we would only try to perform constant folding and
simplifications when an immediate was folded into an instruction,
not if the input was already a folded constant.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 1301a69bc23e3dbf9e60e7ca2acc8171bb358bac
https://github.com/llvm/llvm-project/commit/1301a69bc23e3dbf9e60e7ca2acc8171bb358bac
Author: Patrick Simmons <patrick.simmons at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
A clang/test/OpenMP/openmp_offload_weak_vtables.cpp
Log Message:
-----------
Fix Strong VTables Accidentally Emitted by #159856 (#200942)
Users have reported link errors due to duplicate vtables after the merge
of #159856. Root cause analysis revealed that these errors were due to
the VTables emitted in `CGOpenMPRuntime::emitAndRegisterVTable`, which
was added by PR #159856. This PR fixes the issue by changing that
function to emit its VTables as weak symbols.
Commit: 315c8bba65673457cd118f167ce2fa62f1347e9e
https://github.com/llvm/llvm-project/commit/315c8bba65673457cd118f167ce2fa62f1347e9e
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/sysv_abi.c
A clang/test/CodeGen/target-avx-function-abi.c
A clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
Log Message:
-----------
Reland "[clang][CodeGen][X86_64] Honor per-function AVX ABI in C/C++ call paths, maintain old psABI for PlayStation." (#210349)
https://github.com/llvm/llvm-project/pull/193298 was reverted because of
a compile time regression (see results
[here](https://llvm-compile-time-tracker.com/compare.php?from=b9869c8c920a7dfa983e215bc30729b13d8b353b&to=464b46a73b7592c95222cf2e64b34ffe6f2cf251&stat=instructions:u))
I added a conditional statement so that getFunctionFeatureMap and the
subsequent string lookup is only called if FD->hasAttr<TargetAttr>()
evaluates to true which should be very rare.
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: ec8e379cac62ddbad5d0319be0cf2369fa5102c9
https://github.com/llvm/llvm-project/commit/ec8e379cac62ddbad5d0319be0cf2369fa5102c9
Author: Ian Li <ian.li at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
Log Message:
-----------
[NFC][Clang] Remove dead code from LifetimeSafety/FactsGenerator.cpp (#210830)
This PR removes dead code in
`clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp`. This was
discovered by a Coverity scan on clang.
Commit: b59caeffc273ddd057b7a5d0f1129afbfa3b3c7b
https://github.com/llvm/llvm-project/commit/b59caeffc273ddd057b7a5d0f1129afbfa3b3c7b
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
A lldb/test/API/tools/lldb-dap/eventStatistic/TestDAP_eventStatistic.py
R lldb/test/API/tools/lldb-dap/eventStatistic/TestVSCode_eventStatistic.py
M lldb/test/API/tools/lldb-dap/invalidated-event/TestDAP_invalidatedEvent.py
M lldb/test/API/tools/lldb-dap/send-event/TestDAP_sendEvent.py
M lldb/test/API/tools/lldb-dap/stopped-events/TestDAP_stopped_events.py
M lldb/test/API/tools/lldb-dap/terminated-event/TestDAP_terminatedEvent.py
Log Message:
-----------
[lldb-dap] Migrate lldb-dap events tests. (#209285)
Migrate
- TestDAP_breakpointEvent.py
- TestDAP_eventStatistic.py
- TestDAP_invalidatedEvent.py
- TestDAP_sendEvent.py
- TestDAP_stopped_events.py
- TestDAP_terminatedEvent.py
Some test's helper methods are no longer necessary as there is already
existing session function doing something similar.
Commit: 19822360d87121ac12d201997bf82af94926ef36
https://github.com/llvm/llvm-project/commit/19822360d87121ac12d201997bf82af94926ef36
Author: asraa <asraa at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/unittests/Analysis/Presburger/IntegerRelationTest.cpp
Log Message:
-----------
[mlir][Analysis][Presburger] Remove redundant local vars after composition (#211023)
Call `removeRedundantLocalVars()` at the end of
`IntegerRelation::compose` to simplify existential constraints generated
when projecting out intermediate dimensions.
Removing redundant local vars also happens in
`IntegerRelation::mergeAndCompose` and `FlatAffineRelation::compose`.
When composing A->B with B->C, intermediate vars B are converted to
local existential variables. When performing multiple compositions, this
causes bloat of existential variables that impact later performance,
bounds checks, and emptiness checks.
Signed-off-by: Asra Ali <asraa at google.com>
Commit: 5b1fa37be65be730784a675c40b15d5a702f38ab
https://github.com/llvm/llvm-project/commit/5b1fa37be65be730784a675c40b15d5a702f38ab
Author: Andy Ames <andy.ames at jobyaviation.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/test/Analysis/initializer.cpp
A clang/test/Analysis/issue-210183.cpp
Log Message:
-----------
[analyzer] Fix crash in RegionStoreManager::bindArray from constructor array-to-pointer decay (#210649)
ProcessInitializer() strips implicit casts from a CXXCtorInitializer's
init expression via IgnoreImplicit(), then decides whether to treat the
initializer as a direct array-to-array member copy by checking
Init->getType()->isArrayType(). For a pointer member initialized via
array-to-pointer decay of a reference-to-array constructor parameter
(e.g. `Foo(T (&arr)[N]) : ptr_(arr) {}`), IgnoreImplicit() strips the
ArrayToPointerDecay cast, exposing the underlying array-typed
expression, so this check misfires even though the field itself is a
pointer, not an array. That branch fetches the raw region address of the
whole array, bypassing the normal decay logic (which produces an
ElementRegion), so the pointer member ends up holding the address of the
whole array typed as the array itself, instead of an ElementRegion at
index 0.
Later, dereferencing and storing through that mistyped pointer routes
into RegionStoreManager::bindArray() (instead of bindScalar()), which
unconditionally casts its Init value to nonloc::CompoundVal, asserting
in a debug build and segfaulting in a release build when Init is
anything else, e.g. a nonloc::LocAsInteger produced by round-tripping a
pointer through an integer type.
Fix the actual bug by checking the field's type instead of the
initializer expression's type. Also generalize bindArray()'s existing
guard (added by #178923 for issue #178797) from an enumeration of
specific SVal kinds to the same exhaustive
`!isa<nonloc::CompoundVal>()` check already used by its siblings
bindStruct() and bindVector(), so it doesn't need to be extended again
every time a new SVal kind reaches this path -- this is what actually
catches our case (nonloc::LocAsInteger), which the prior enumeration
didn't cover.
This is the same underlying bug behind #147686 (fixed by #153177, which
its own author noted was "more of a workaround") and #178797 (fixed by
#178923); both those fixes patched symptoms at bindArray() without
addressing the ProcessInitializer() root cause. Fixing the root cause
also resolves two FIXME-annotated precision gaps in
clang/test/Analysis/initializer.cpp's gh147686 regression test.
Fixes #210183
AI tool use disclosure: Claude Code (Anthropic) assisted in reducing the
original crash to a minimal, dependency-free reproducer (via creduce
plus manual bisection, verifying each reduction step against the actual
crash), which informed root-causing this bug in
RegionStoreManager::bindArray and ExprEngine::ProcessInitializer. The
commits made here were drafted with Claude's assistance and reviewed by
me before being pushed. I've reviewed all AI-assisted contributions here
and take full responsibility for the correctness of this change.
---------
Co-authored-by: Andy Ames <andy.ames at joby.aero>
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 0f398c5f1a26ee67ed500e85c91759610cccc3fe
https://github.com/llvm/llvm-project/commit/0f398c5f1a26ee67ed500e85c91759610cccc3fe
Author: Vito Secona <77039267+secona at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
M mlir/test/Dialect/SparseTensor/constant_index_map.mlir
M mlir/test/Dialect/SparseTensor/conversion_invalid.mlir
M mlir/test/Dialect/SparseTensor/vectorize_reduction.mlir
Log Message:
-----------
[mlir][SparseTensor] Reject sparse encoding on non-primary types (#209591)
SparseTensorConversion rewrite patterns assume element types are valid
primary types, but the dialect does not actually enforce this
restriction. This change makes it so that sparse tensor encodings
gracefully reject invalid primary types by verifying the encoding.
Closes #202787
Supersedes and closes #208913
Commit: ac5aea3e462726d6ad44332b1de2e74638804947
https://github.com/llvm/llvm-project/commit/ac5aea3e462726d6ad44332b1de2e74638804947
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
AMDGPU: Validate processor and features in TargetID parsing (#209304)
TargetID::parseTargetIDString previously only checked that the string
was structurally a 4-component triple followed by a processor field. It
accepted unrecognized processors and silently ignored malformed or
unsupported feature modifiers. Work towards improving validation so in
the future clang's copy of TargetID can be replaced.
Co-authored-by: Claude (Opus 4.8)
Commit: c991dbda3184943378b115699f60f51cca0af1fa
https://github.com/llvm/llvm-project/commit/c991dbda3184943378b115699f60f51cca0af1fa
Author: ustachow <urszula.stachowiak at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/MemorySSAUpdater.h
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
Log Message:
-----------
[MemorySSA] Make getPreviousDef iterative to avoid stack overflow (#205159)
MemorySSAUpdater::getPreviousDefRecursive walked the CFG
predecessor-first
using native recursion (mutually recursive with getPreviousDefFromEnd).
On
functions with very deep control flow - e.g. long chains of blocks
produced
by large auto-generated kernels/shaders - the recursion depth scales
with the
number of blocks and can overflow the native stack.
Rewrite the walk as an explicit worklist of frames on the heap. Each
frame
tracks the block being processed and a resume stage so a child block's
result
can be folded back into its parent, exactly mirroring the previous
recursive
control flow. Behaviour is otherwise unchanged: cache lookups,
VisitedBlocks
cycle detection (including the single-predecessor insert-without-erase
asymmetry), predecessor operand order, and phi placement/simplification
are
all preserved. The helper is renamed getPreviousDefRecursive ->
getPreviousDefIterative since it no longer recurses.
Add a unit test that builds a long single-predecessor chain and
incrementally
updates MemorySSA; the previous recursive implementation overflowed the
stack
on such input.
Fixes: https://github.com/llvm/llvm-project/issues/121279
Commit: e959a280d5ac91d219abb802913c4e5cadb45f2a
https://github.com/llvm/llvm-project/commit/e959a280d5ac91d219abb802913c4e5cadb45f2a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCRoutineToGPUFunc.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-bound-routine-call.mlir
Log Message:
-----------
[mlir][openacc] Do not erase acc routine information early (#210813)
acc routine information is used in ACCCGToGPU to compute parallelism. If
the info is missing, predicated region might be wrong and lead to
deadlock.
Just keep them in ACCRountineToGPUFunc and they will be cleaned up later
in the pipeline.
Commit: 9b362c71c51a45871d5fe337c7da7ff1ed9fe0cb
https://github.com/llvm/llvm-project/commit/9b362c71c51a45871d5fe337c7da7ff1ed9fe0cb
Author: David Young <davidayoung at meta.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/llvm-config.h
Log Message:
-----------
[bazel] Only set LLVM_ENABLE_DIA_SDK in bazel build defs to zero if not set by build args (#210723)
Windows lldb build support via bazel is still a work in progress.
LLVM_ENABLE_DIA_SDK enables windows specific functionality. With it
hard-coded to 0 here, an override via build args via buck2 (internally
at Meta) of
'-DLLVM_ENABLE_DIA_SDK=1' had no effect. So modify this set of
configurations to allow that build arg to take precedence while avoiding
a larger amount of changes for windows/bazel lldb support (for now).
As cannot build with bazel locally, I will rely on CI to confirm lint
and building.
Commit: 350c2d86228f330d986f6c8cd63899cd147427c3
https://github.com/llvm/llvm-project/commit/350c2d86228f330d986f6c8cd63899cd147427c3
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
Log Message:
-----------
[AMDGPU] Fix `GCNRegPressureTest`'s super-class to ensure proper target initialization (#211030)
The typo made it so that all tests in the file would be skipped if no
other testsuite explicitly initialized the AMDGPU target (for example
when running `./unittests/Target/AMDGPU/AMDGPUTests
--gtest_filter=GCNRegPressureTest.*`). `AMDGPUCodeGenTestBase`
initializes the target so tests always run as long as LLVM is built with
the AMDGPU target.
Commit: d53ebd23aabd9286075650b663ff0bcbbef9ebd8
https://github.com/llvm/llvm-project/commit/d53ebd23aabd9286075650b663ff0bcbbef9ebd8
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Fix typo (#210815)
GITHUB_OUT -> GITHUB_OUTPUT
Commit: c6e184686cd7d0acfb88531738764f6134700382
https://github.com/llvm/llvm-project/commit/c6e184686cd7d0acfb88531738764f6134700382
Author: eleviant <eleviant at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/BranchRelaxation.cpp
M llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
A llvm/test/CodeGen/AArch64/branch-relax-tbz.mir
Log Message:
-----------
[AArch64][CodeGen] Fix trampoline basic block offset (#202716)
Trampoline basic blocks are initially created with an offset of zero. As
a result, `isBlockInRange()` may operate on incorrect block offset,
potentially causing unnecessary conditional branch inversions or the
insertion of redundant trampolines.
Commit: abe757bd5dfd91718858402375d99152592ab73a
https://github.com/llvm/llvm-project/commit/abe757bd5dfd91718858402375d99152592ab73a
Author: Sayan Sivakumaran <sivakusayan at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll
Log Message:
-----------
[SimplifyCFG] Simplify switch default branch when branch proves operand value (#206597)
If the default branch of a switch proves that there is only one value
that can be sent to the default branch, we can transform the default
branch into an explicit case of the switch. This can assist in further
simplification of the CFG during the simplification loop.
For example, we should be able to create an explicit case for the
default block in cases like the following:
```llvm-ir
switch_bb:
switch i8 %x, label %default_bb [...]
default_bb:
%cmp = icmp eq i8 %x, 1
call void llvm.assume(i1 %cmp) ; Implies %x must be 1
```
Related to #50665.
Commit: 03fc6d19191b64dfff4036a3829737b81ee34748
https://github.com/llvm/llvm-project/commit/03fc6d19191b64dfff4036a3829737b81ee34748
Author: John Otken <john.otken at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/docs/TestingGuide.md
Log Message:
-----------
[llvm][docs] Update TestingGuide with LLVM PR merge advice (#207754)
Add guidance on waiting for LLVM PR merges before test-suite merges to
prevent failures.
Co-authored-by: John Otken john.otken at hpe.com
Commit: ee1eab2a1d28651d0dc675f4f101c0bd78f31e44
https://github.com/llvm/llvm-project/commit/ee1eab2a1d28651d0dc675f4f101c0bd78f31e44
Author: Alex Sepkowski <alsepkow at microsoft.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/test/Sema/aarch64-sve-vector-exp-ops.c
M clang/test/Sema/aarch64-sve-vector-log-ops.c
M clang/test/Sema/aarch64-sve-vector-pow-ops.c
M clang/test/Sema/aarch64-sve-vector-trig-ops.c
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/Sema/riscv-rvv-vector-exp-ops.c
M clang/test/Sema/riscv-rvv-vector-log-ops.c
M clang/test/Sema/riscv-rvv-vector-trig-ops.c
M clang/test/Sema/riscv-sve-vector-pow-ops.c
M clang/test/SemaHLSL/BuiltIns/atan2-errors_mat.hlsl
M clang/test/SemaHLSL/BuiltIns/ddx-coarse-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddx-fine-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddy-coarse-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddy-fine-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/degrees-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/exp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/frac-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors2.hlsl
M clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/isnan-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/normalize-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/radians-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rcp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/round-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
M clang/test/SemaSPIRV/BuiltIns/ddx-errors.c
M clang/test/SemaSPIRV/BuiltIns/ddy-errors.c
M clang/test/SemaSPIRV/BuiltIns/faceforward-errors.c
M clang/test/SemaSPIRV/BuiltIns/fwidth-errors.c
M clang/test/SemaSPIRV/BuiltIns/smoothstep-errors.c
Log Message:
-----------
[clang] Update diagnostics to include matrices as accepted types (#201237)
Several `err_builtin_invalid_arg_type` call sites still emit "scalar or
vector of ..." even though the underlying checkers already unwrap matrix
types. This extends the diagnostic with a new "scalar, vector, or matrix
of" option (index 6) and migrates the call sites whose checkers do
accept matrices:
Call sites whose checkers only unwrap VectorType are left at index 5 so
their diagnostic text continues to accurately describe what is accepted.
Tests using the old wording are updated to match.
Fixes #189147
Assisted by copilot
---------
Co-authored-by: Copilot <223556219+Copilot at users.noreply.github.com>
Commit: accd1ed5226b4a8009c33f0a6d1bcfe58902f69e
https://github.com/llvm/llvm-project/commit/accd1ed5226b4a8009c33f0a6d1bcfe58902f69e
Author: John Paul Jepko <john.jepko at ericsson.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdVariantChecker.cpp
M clang/test/Analysis/std-variant-checker.cpp
Log Message:
-----------
[analyzer] Fix StdVariantChecker crash on std::get with a non-ptr arg (#210167)
When `std::get` is called on a dereferenced integer-to-pointer cast, the
checker `alpha.core.StdVariant` crashes. Minimal reproducer:
```
std::get<int>(*(std::variant<int, char> *)11);
```
Godbolt reproducer - https://godbolt.org/z/4EKe1PrKb
The root cause is that `StdVariantChecker::handleStdGetCall()` calls
`SVal::getType()` on any non-unknown argument, then calls
`getPointeeType()` on the result while assuming it is a pointer type. In
the case of a concrete integer cast to a pointer and then dereferenced,
it is modeled as `loc::ConcreteInt`, whose recovered type is an integer.
`getPointeeType()` on such an input returns a null QualType, on which
`getTypePtr()` crashes.
Fix the crash by using the argument's static type rather than recovering
its SVal, eliminating the need to guard and call `getPointeeType()`.
Commit: 4f5675a0500f9ccc60dcbabb57e1c4dc88c40a84
https://github.com/llvm/llvm-project/commit/4f5675a0500f9ccc60dcbabb57e1c4dc88c40a84
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/DTLTO/CMakeLists.txt
Log Message:
-----------
[CMake] Added missing LLVM_PTHREAD_LIB dependency. (#211041)
Required after #209423.
Commit: a896e12c5e7031a45eca3ca9392a3c56c304f157
https://github.com/llvm/llvm-project/commit/a896e12c5e7031a45eca3ca9392a3c56c304f157
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/Rematerializer.cpp
A llvm/test/CodeGen/AMDGPU/remat-subrange-full-and-partial-use.ll
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Rematerializer: Handle subranges for full-mask users (#211031)
- Create live-interval subranges for new users reading a full lane mask.
- Fixes a missing-subranges case that tripped the `SubRegIdx != 0 &&
LI.hasSubRanges()` assertion in VirtRegRewriter for subreg-tracked
registers.
- Add corresponding unit and lit regression tests.
Commit: 1510167f2cf3a9e89cdb69eee5b3984abd9c930a
https://github.com/llvm/llvm-project/commit/1510167f2cf3a9e89cdb69eee5b3984abd9c930a
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck][NFC] Introduce FileCheckDiagAnnotator (#207485)
This PR is stacked on PR #207484.
In the way that `SearchRangeAnnotator` encapsulates generating search
range annotations, this patch introduces `FileCheckDiagAnnotator` to
encapsulate generating the main annotation for a `FileCheckDiag`. This
change makes `buildInputAnnotations` easier to read, especially after a
third annotator class that will be introduced in a future patch.
Commit: 61b877a57de9fc37b8a94a71840ec66b4abfee2c
https://github.com/llvm/llvm-project/commit/61b877a57de9fc37b8a94a71840ec66b4abfee2c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/cmake/modules/LLVMProcessSources.cmake
Log Message:
-----------
cmake: Filter dangling symlinks from add_td_sources glob (#211051)
Editor lock files (e.g. Emacs' `.#foo.td`) are dangling symlinks that
`file(GLOB *.td)` picks up and passes to add_library(), which then fails
with "Cannot find source file". Filter them out with an EXISTS check, as
already done for header files in add_header_files_for_glob.
Co-authored-by: Claude (Claude Opus 4.8)
Commit: f63615b2fdbf153ceaf5e2444e89fdb1aa59ab6c
https://github.com/llvm/llvm-project/commit/f63615b2fdbf153ceaf5e2444e89fdb1aa59ab6c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/fmed3.ll
Log Message:
-----------
[AMDGPU] Fix wrong min/max for amdgcn.fmed3 NaN 3rd operand (#203822)
Commit: 879db2f9478f454f8dcf961b660a9078b73bf1b5
https://github.com/llvm/llvm-project/commit/879db2f9478f454f8dcf961b660a9078b73bf1b5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.err.ll
Log Message:
-----------
[AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (#210971)
Commit: 35d69e3fe344e063174f54a9785a08249ba18cd9
https://github.com/llvm/llvm-project/commit/35d69e3fe344e063174f54a9785a08249ba18cd9
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/LazyBranchProbabilityInfo.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/LazyBranchProbabilityInfo.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/OptimizationRemarkEmitter.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/test/Analysis/BranchProbabilityInfo/loop.ll
M llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/annotate-tablejump.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pr38795.ll
M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/Transforms/Inline/cgscc-incremental-invalidate.ll
M llvm/test/Transforms/PGOProfile/Inputs/irreducible.proftext
M llvm/test/Transforms/PGOProfile/Inputs/irreducible_entry.proftext
M llvm/unittests/Analysis/BlockFrequencyInfoTest.cpp
M llvm/unittests/Analysis/BranchProbabilityInfoTest.cpp
M llvm/unittests/Analysis/ProfileSummaryInfoTest.cpp
M llvm/unittests/Transforms/IPO/FunctionSpecializationTest.cpp
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
M llvm/unittests/Transforms/Utils/SizeOptsTest.cpp
Log Message:
-----------
[Analysis] Use CycleInfo for BranchProbabilityInfo (#210301)
Instead of computing a cycle info (SccInfo) internally in
BranchProbabilityInfo, use CycleInfo and remove the use of LoopInfo.
After recent improvements to CycleInfo, the extra analysis is cheaper
than computing the same information internally.
Replacing LoopInfo with CycleInfo has some impliciation that the
loop/cycle forest can differ if the header of an irreducible loop (which
is ignored by loop info) also happens to be the header of a different
natural loop. (Simple example: S -> A, B; A -> A, B; B -> A, B --
LoopInfo will find {{A}, {B}}; CycleInfo will find {A, {B}}].) In these
cases, the default weights will differ.
This change also makes the handling of entering/exiting edges
consistent between reducible and irreducible loops, therefore,
there are also minor changes for reducible CFGs.
Commit: c2fac16a870fd77772b05ca11f7aa1f4e5a4d595
https://github.com/llvm/llvm-project/commit/c2fac16a870fd77772b05ca11f7aa1f4e5a4d595
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/TargetInfo.cpp
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Function.h
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/is_fpclass.ll
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-fmuladd.ll
M llvm/test/Transforms/EarlyCSE/replace-calls-def-attrs.ll
M llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fdim.ll
M llvm/test/Transforms/InstSimplify/disable_folding.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad.ll
M llvm/unittests/IR/VerifierTest.cpp
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
Revert "[IR] Make semantics of strictfp consistent" (#211057)
Reverts llvm/llvm-project#209465
Causes verifier issues:
https://github.com/llvm/llvm-project/pull/209465#issuecomment-5025559698
Commit: 48883c5aa6428ea91cf22417a519e6302e88a529
https://github.com/llvm/llvm-project/commit/48883c5aa6428ea91cf22417a519e6302e88a529
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/test/MC/WebAssembly/atomics-orderings.s
Log Message:
-----------
[WebAssembly] Swap encoding bits for HAS_MEMORY_ORDER for relaxed atomics (#210854)
Following the decision in
https://github.com/WebAssembly/relaxed-atomics/issues/3
Commit: 15de5a2c4c14070d0c42ab0ca436ce4e192a9baf
https://github.com/llvm/llvm-project/commit/15de5a2c4c14070d0c42ab0ca436ce4e192a9baf
Author: Brad Smith <brad at comstyle.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
Log Message:
-----------
[Driver] Remove SUSE SLES special casing for hash-style (#210223)
Commit: d81e22df458858e0ab1fdd56710d1d12251674b0
https://github.com/llvm/llvm-project/commit/d81e22df458858e0ab1fdd56710d1d12251674b0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
Log Message:
-----------
[SLP][NFC]Add extra tests for blended loads vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211080
Commit: 0aa8e45b04e548e34d7e6b1262cf7fec53678061
https://github.com/llvm/llvm-project/commit/0aa8e45b04e548e34d7e6b1262cf7fec53678061
Author: adams381 <adams at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/test/CIR/CodeGen/array.cpp
A clang/test/CIR/CodeGen/bitint-memory.c
A clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
M clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/Lowering/global-var-simple.cpp
Log Message:
-----------
[CIR] Lower _BitInt to its in-memory storage integer (#206606)
ClangIR keeps a `_BitInt(N)` at its literal width, but in memory it has
to live in a wider padded integer, the same way `bool` is `i1` as a
value and `i8` in memory. Because CIRGen emitted the constant at its
exact width, the storage padding was left undefined: a `signed
_BitInt(6) = -1` wrote `0x3f` where classic CodeGen and GCC write
`0xff`. @andykaylor pointed this out on
[#205605](https://github.com/llvm/llvm-project/pull/205605).
The fix widens `_BitInt` to its storage integer `iM` and
sign/zero-extends by signedness during lowering to the LLVM dialect, the
same place `bool` becomes `i8` (`convertTypeForMemory` and the
to/from-memory helpers). CIRGen keeps the literal `!cir.int<N, bitint>`
unchanged.
The byte-array storage form for wide "split" widths, where the storage
integer's alloc size exceeds its store size (e.g. `_BitInt(129)` to
`i192`, 32 vs 24 bytes), is not implemented. The global, alloca, load,
and store lowerings report an NYI error and the aggregate type
converters fail the conversion, rather than emit a wrong-sized integer.
Atomic read-modify-write on a padded `_BitInt` and vector-of-`_BitInt`
are also unimplemented.
The storage width comes from `IntType::getABIAlignment`, which assumes a
fixed 64-bit maximum alignment (x86-64). It is verified byte-for-byte on
x86-64; on targets with a larger maximum (e.g. AArch64) any width that
would be mis-sized instead hits the split-storage NYI. On a target whose
`_BitInt` maximum alignment is below 64 bits (e.g. a 32-bit target) the
storage can be mis-sized. Making the computation target-aware needs the
target's `getBitIntAlign`, which is not in the data layout, and is left
as a follow-up.
The approach follows the RFC [Widen bool / _BitInt / ext-vector-bool to
their in-memory types in
lowering](https://discourse.llvm.org/t/rfc-clangir-widen-bool-bitint-ext-vector-bool-to-their-in-memory-types-in-lowering/91160).
It supersedes
[#205605](https://github.com/llvm/llvm-project/pull/205605), which
emitted the constant at its literal width.
Commit: 49d568a8d60d5912a5a7d8b2c3ac1caf58dab3e6
https://github.com/llvm/llvm-project/commit/49d568a8d60d5912a5a7d8b2c3ac1caf58dab3e6
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M cross-project-tests/dtlto/remote-options.test
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/test/ThinLTO/X86/dtlto/json.ll
Log Message:
-----------
[DTLTO] Forward loop interchange to DTLTO remote compilations (#208591)
Recent upstream LLVM changes enabled `LoopInterchangePass` by default
through `PipelineTuningOptions`. TLTO observes that state directly from
the LTO config, but DTLTO was not forwarding the equivalent Clang option
to the remote compiler. As a result, TLTO could run loop interchange
pass while DTLTO did not, producing codegen differences for
configurations that exposed profitable/legally interchangeable loops.
Note that this was a pre-existing issue, the change in default has
simply exposed it.
Forward `C.PTO.LoopInterchange` as `-floop-interchange` when
constructing the common DTLTO remote compiler options. Extend the
testing to check that the SN-DBS remote command line includes the
forwarded option.
The code for forwarding such options is only intended as a temporary
measure. A more comprehensive solution is in discussion here:
https://discourse.llvm.org/t/synchronizing-lto-code-generation-configuration-between-clang-and-lld-dtlto
Commit: b35c1aab487dd89537114612c5a1ed3dd0a3ce11
https://github.com/llvm/llvm-project/commit/b35c1aab487dd89537114612c5a1ed3dd0a3ce11
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaSPIRV.cpp
M clang/test/Sema/aarch64-sve-vector-exp-ops.c
M clang/test/Sema/aarch64-sve-vector-log-ops.c
M clang/test/Sema/aarch64-sve-vector-pow-ops.c
M clang/test/Sema/aarch64-sve-vector-trig-ops.c
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/Sema/riscv-rvv-vector-exp-ops.c
M clang/test/Sema/riscv-rvv-vector-log-ops.c
M clang/test/Sema/riscv-rvv-vector-trig-ops.c
M clang/test/Sema/riscv-sve-vector-pow-ops.c
M clang/test/SemaHLSL/BuiltIns/atan2-errors_mat.hlsl
M clang/test/SemaHLSL/BuiltIns/ddx-coarse-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddx-fine-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddy-coarse-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ddy-fine-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/degrees-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/exp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/f16tof32-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/frac-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/half-float-only-errors2.hlsl
M clang/test/SemaHLSL/BuiltIns/isinf-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/isnan-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/normalize-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/radians-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rcp-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/reversebits-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/round-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/rsqrt-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
M clang/test/SemaSPIRV/BuiltIns/ddx-errors.c
M clang/test/SemaSPIRV/BuiltIns/ddy-errors.c
M clang/test/SemaSPIRV/BuiltIns/faceforward-errors.c
M clang/test/SemaSPIRV/BuiltIns/fwidth-errors.c
M clang/test/SemaSPIRV/BuiltIns/smoothstep-errors.c
Log Message:
-----------
Revert "[clang] Update diagnostics to include matrices as accepted types" (#211070)
Reverts llvm/llvm-project#201237. The PR did not update the test
assertions for `Sema/builtins-elementwise-math.c`
https://github.com/llvm/llvm-project/pull/201237#issuecomment-5037239584
Commit: 18220e793fbda204b66c08989cde11ad4583f26c
https://github.com/llvm/llvm-project/commit/18220e793fbda204b66c08989cde11ad4583f26c
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/CSKY/CSKYInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/frameindex.td
Log Message:
-----------
[SelectionDAG][GlobalISel] Move `to_tframeindex` & `renderFrameIndex` from targets into common code. (#210896)
Consolidates the multiple copies across the targets of the
`to_tframeindex` `SDNodeXForm` (frame index => target frame index) and
its GISel counterpart/equiv `renderFrameIndex`, moving them into
appropriate common areas.
As suggested/requested in
https://github.com/llvm/llvm-project/pull/206885#discussion_r3504014131
Commit: 0ee0b9701bc1486d084014185f674321e714c079
https://github.com/llvm/llvm-project/commit/0ee0b9701bc1486d084014185f674321e714c079
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCDeclareGPUModuleInsertion.cpp
M mlir/test/Dialect/OpenACC/acc-declare-gpu-module-insertion.mlir
Log Message:
-----------
[mlir][openacc] Support already existing global in GPU module (#210806)
Commit: 3f928aec54e28dd470a3f0fbbe2ebafb73691dcc
https://github.com/llvm/llvm-project/commit/3f928aec54e28dd470a3f0fbbe2ebafb73691dcc
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/X86/rgb_phi.ll
Log Message:
-----------
[SLP]Make the instruction-count check loop-aware
Raw getNum{Scalar,Vector}Insts() counted one-time, LICM-hoisted
broadcasts/buildvectors against the loop body, rejecting profitable loop
trees (508.namd_r). Weight each entry by its loop-nest trip
count and drop nest-invariant ones; flat code is unchanged (scale 1).
Fixes #207572
Reviewers: bababuck, RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/210074
Commit: 1f1fcb9518cbe324d2af2aca51e32c93b324690f
https://github.com/llvm/llvm-project/commit/1f1fcb9518cbe324d2af2aca51e32c93b324690f
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
Log Message:
-----------
[Analysis][NFC] Remove LoopBlock in BranchProbabilityInfo (#211083)
After removing SccInfo, this data structure is largely pointless.
Commit: 4bf0d282b9afd8f1a46a5bb0403c8363eca3deb4
https://github.com/llvm/llvm-project/commit/4bf0d282b9afd8f1a46a5bb0403c8363eca3deb4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
Log Message:
-----------
[OpenACC/CIR] Remove std::transform_inclusive_scan use (#211076)
This seemingly is only added for GCC libstdcxx 11.1's C++17 support, but
our support matrix is 7.4. Replace it with a loop that implements the
same requirement.
Commit: 5009f54dd420f3c9df3f7e54022fc2234e2f0ebe
https://github.com/llvm/llvm-project/commit/5009f54dd420f3c9df3f7e54022fc2234e2f0ebe
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
A flang/test/Lower/OpenMP/collapse-labeled-do-host-eval.f90
A flang/test/Lower/OpenMP/collapse-loop-transform.f90
A flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
A flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
Log Message:
-----------
[flang][OpenMP] Reland implement collapse for imperfectly nested loops (#211000)
Reland of combined #208528 and #210753.
Fixes #199092 - Flang previously rejected intervening code between
associated loops in a collapsed nest (e.g. collapse(2) with statements
between the outer and inner DO). This patch removes that restriction and
implements correct lowering.
Commit: 12e1c7f70f34d59c023d05d0fe2c228a4e9aac11
https://github.com/llvm/llvm-project/commit/12e1c7f70f34d59c023d05d0fe2c228a4e9aac11
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
[PAC][libc++] Fix build with `ptrauth_calls` feature (#211033)
After partial revert of #208330 in #209928, the libcxx build started
failing because of missing `<cstdint>` include required for `uintptr_t`
declaration used only by code behind `ptrauth_calls` feature check. See
https://lab.llvm.org/buildbot/#/builders/227/builds/3358
This patch adds the missing include.
Commit: c7e1531885e787e909ee06e1b625ae04197350bf
https://github.com/llvm/llvm-project/commit/c7e1531885e787e909ee06e1b625ae04197350bf
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
A clang/test/CodeGenHLSL/semantics/flat-decoration.ps.hlsl
A llvm/test/CodeGen/SPIRV/semantics/flat.ps.ll
Log Message:
-----------
[HLSL][SPIRV] Support Flat and Location decorators in the frontend (#210116)
fixes #194293
fixes #194432
In HLSL we need both Location and and Flat must be emitted as a single
`spirv.Decorations` node.
Also we need to apply Flat decoration to pixe/fragment shades with
inputs of integer or double because only 32 bit floats can be
interpolated.
Assisted with Claude Opus 4.8 via Copilot
Commit: bf42992272b66002ffe2a814c916a6b74e477ada
https://github.com/llvm/llvm-project/commit/bf42992272b66002ffe2a814c916a6b74e477ada
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/X86/rgb_phi.ll
Log Message:
-----------
Revert "[SLP]Make the instruction-count check loop-aware"
This reverts commit 3f928aec54e28dd470a3f0fbbe2ebafb73691dcc to fix
buildbots https://lab.llvm.org/buildbot/#/builders/11/builds/44691
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211091
Commit: 16e009f63499bb3c8e62388521593dc11f17c8f9
https://github.com/llvm/llvm-project/commit/16e009f63499bb3c8e62388521593dc11f17c8f9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
Log Message:
-----------
[ConstraintElim] Derive signed facts for post-increment inductions. (#210079)
Extend logic added in https://github.com/llvm/llvm-project/pull/209199
to also derive signed facts.
To do so, we keep track of whether LowerBound = Start + Step overflows
signed/unsigned. Code that previously bailed out if we were handling a
post-increment induction has been updated to use the computed
LowerBound, if it does not signed-wrap.
Alive2 Proof: https://alive2.llvm.org/ce/z/frskVt
PR: https://github.com/llvm/llvm-project/pull/210079
Commit: e328d6e08979f163da46f2a12bf74d632b95f168
https://github.com/llvm/llvm-project/commit/e328d6e08979f163da46f2a12bf74d632b95f168
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
Log Message:
-----------
[libc++] Use github-script instead of pygithub for benchmark jobs, and report failure (#211074)
Switch GitHub API interactions to use actions/github-script instead of
pygithub, as is done in other Github workflows in the repository. This
is simpler and it also resolves the issue that if setting up the Python
virtual environment fails, there's no way to communicate the issue back
since doing so would require pygithub.
As a drive-by, also report the failure when a step in the libc++ PR
benchmark job fails, instead of leaving a "Running benchmarks in ..."
comment indefinitely.
Assisted by Claude
Fixes #210985
Commit: 5b6ebc25e08c35d30edbe6aa7b64d06c46686b18
https://github.com/llvm/llvm-project/commit/5b6ebc25e08c35d30edbe6aa7b64d06c46686b18
Author: nvptm <pmathew at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
Log Message:
-----------
[flang][cuda][openacc] Support CUDA calls to ACC routines (#210165)
Enable CUDA device procedures to call !$acc routine procedures.
- Treat ACC routines as device-callable during CUDA semantic checking.
- Apply implicit-device dummy argument handling to ACC routines called
from CUDA device code.
- Defer CUDA cloning of ACC routines until ACC lowering materializes and
moves the specialized routine into the GPU module.
- Add a CUF device-function transform regression test.
Commit: 5df4aa19aa1e6308509356db19b5e46884d47361
https://github.com/llvm/llvm-project/commit/5df4aa19aa1e6308509356db19b5e46884d47361
Author: nvptm <pmathew at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A flang/test/Fir/OpenACC/acc-declare-gpu-module-insertion.fir
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCDeclareGPUModuleInsertion.cpp
Log Message:
-----------
[flang][acc] Emit unified declare globals as extern. (#210757)
Emit external device symbols for OpenACC declare create and copyin
globals in -gpu=mem:unified; preserve device definitions for
device_resident globals.
Commit: 5697319382fb2ea2f5a15883304edc643ead8fcd
https://github.com/llvm/llvm-project/commit/5697319382fb2ea2f5a15883304edc643ead8fcd
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/switch-loop-header.mir
M llvm/test/CodeGen/NVPTX/switch.ll
Log Message:
-----------
[NVPTX] Simplify BRX emission avoiding pseduo-instruction chain (#209952)
This is much more idiomatic and simpler as well and avoids a series of
instructions which would cause syntax errors if somehow something were
scheduled between them.
Commit: e8b684a64aa5176a1da5ff18c712343af695e456
https://github.com/llvm/llvm-project/commit/e8b684a64aa5176a1da5ff18c712343af695e456
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
M llvm/test/Transforms/SLPVectorizer/X86/rgb_phi.ll
Log Message:
-----------
[SLP]Make the instruction-count check loop-aware
Raw getNum{Scalar,Vector}Insts() counted one-time, LICM-hoisted
broadcasts/buildvectors against the loop body, rejecting profitable loop
trees (508.namd_r). Weight each entry by its loop-nest trip
count and drop nest-invariant ones; flat code is unchanged (scale 1).
Fixes #207572
Original Pull Request: https://github.com/llvm/llvm-project/pull/210074
Recommit after revert in bf42992272b66002ffe2a814c916a6b74e477ada
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211096
Commit: f1685cb3d97ca73e88e9435a5700bc9f6f47f2fb
https://github.com/llvm/llvm-project/commit/f1685cb3d97ca73e88e9435a5700bc9f6f47f2fb
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
workflows/issue-release-workflow: Allow multiple URLs in /cherry-pick commands. (#211050)
f0ae26c9 allowed specifying multiple commits to /cherry-pick, but that
only works for plain commit hashes; it doesn't work for the URL form.
Adjust the regex to allow multiple URLs.
Commit: 8dc94a5d51bff16c61dd6596a6f25dbf93bc545f
https://github.com/llvm/llvm-project/commit/8dc94a5d51bff16c61dd6596a6f25dbf93bc545f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbw-builtins.c
Log Message:
-----------
[CIR] Fix avx512vlbw builtin test run lines (#211063)
The avx512vlbw-builtins.c test was using the now-nonexistant avx10.1-512
target feature in several of its run lines. Because the feature no
longer exists with that spelling it was being silently ignored.
Apparently it isn't needed for the test upstream because the test has
been passing, but I received reports from a downstream user that the
test was failing for them.
There was a recent change to more strictly enforce always-inlining if
target features didn't match. I suspect that this downstream project has
a different version of some intrinsic header files so that it requires
"avx10.1" (the correct spelling of the feature).
This change updates the test run lines to use the correct feature
spelling.
Commit: ded4902fe10242e4581860f92056719fa4591b2c
https://github.com/llvm/llvm-project/commit/ded4902fe10242e4581860f92056719fa4591b2c
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
R llvm/test/tools/dsymutil/AArch64/pseudo-probe.test
M llvm/tools/dsymutil/MachOUtils.cpp
Log Message:
-----------
Revert "[dsymutil] Add support for pseudo probes (#186877)" (#206789)
This reverts commit bc3386c1b9a5bff82ce4baaf4254fc4268f69ff4.
Let's back this out in favor of emitting pseudoprobe data in favor of
emitting in the `__LLVM` segment, and let `dsymutil` collect the debug
map objects and merge them into the final sections.
Commit: 009e841dbde021aa59bd7357269aeabfcc4f6128
https://github.com/llvm/llvm-project/commit/009e841dbde021aa59bd7357269aeabfcc4f6128
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor.f90
Log Message:
-----------
[flang][cuda] Add option for allocator registration function to CUFAddConstructor (#211098)
This allows to register different allocators when needed.
Commit: db816fe2ed4e0be51192d3030d90a176d5fec9d5
https://github.com/llvm/llvm-project/commit/db816fe2ed4e0be51192d3030d90a176d5fec9d5
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/dxc_debug.hlsl
M clang/test/Driver/dxc_section_emission.hlsl
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXContainerPDB.cpp
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate-no-fd.test
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate-no-flag.test
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate-no-pdbname.ll
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate.ll
A llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate.test
M llvm/unittests/MC/CMakeLists.txt
A llvm/unittests/MC/DXContainerWriterTest.cpp
Log Message:
-----------
[DirectX][Driver] Add /Qpdb_in_private flag support (#204903)
In DXC, when `/Qpdb_in_private` flag is specified, debug info PDB is
emitted into PRIV part of the output DXContainer (as well as into
separate PDB file, if its name is specified with `/Fd`).
This patch reimplements similar behavior in llc and Clang.
MC is modified to be able to emit PRIV part.
Depends on https://github.com/llvm/llvm-project/pull/204166.
Commit: 9a729e7fbbb6e1327e6af2148f0c941401b44cbf
https://github.com/llvm/llvm-project/commit/9a729e7fbbb6e1327e6af2148f0c941401b44cbf
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes db816fe (#211109)
This fixes db816fe2ed4e0be51192d3030d90a176d5fec9d5.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=db816fe2ed4e0be51192d3030d90a176d5fec9d5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 3421dc247e4d6e87c6ab9b5db44c11873c28814f
https://github.com/llvm/llvm-project/commit/3421dc247e4d6e87c6ab9b5db44c11873c28814f
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.h
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFUnwindTable.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/test/CodeGen/MIR/AArch64/cfi.mir
M llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir
A llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
A llvm/test/MC/AArch64/cfi_set_ra_state.s
M llvm/test/MC/AArch64/directives-case_insensitive.s
M llvm/unittests/DebugInfo/DWARF/DWARFDebugFrameTest.cpp
Log Message:
-----------
[MC][AArch64] Add .cfi_set_ra_state for PAuth_LR (#209949)
The new CFI directive directly assigns an RA signing state to the RA_SIGN_STATE DWARF pseudo-register for use when unwinding, to indicate whether the value of PC has been used as a diversifier for return address signing. The new directive subsumes and replaces .cfi_negate_ra_state_with_pc, which was found to be unsuitable for descibing some block layouts [1], particularly in hot-cold-split functions.
1: https://github.com/ARM-software/abi-aa/pull/346
Commit: 866832a59612e569c8d18bc8e846cc32e9a5730b
https://github.com/llvm/llvm-project/commit/866832a59612e569c8d18bc8e846cc32e9a5730b
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
Log Message:
-----------
[SPIRV] Fix legalization of widened cbuffer vector loads (#209912)
fixes #191070
In the SPIR-V backend an optimization has widened a narrow cbuffer load
into a wider vector load that reads trailing padding (e.g. a <1 x float>
float1x4 column loaded as <4 x float>). loadVectorFromVector only
handled down-casts and asserts when the target has more elements than
the source.
We need to handle the widening case by loading the available lanes and
inserting them into a poison target vector, leaving the padding lanes as
poison.
Assisted by Claude Opus 4.8
Commit: e55d3bca36ff8a23ef598f6f452ec1e3f399dc31
https://github.com/llvm/llvm-project/commit/e55d3bca36ff8a23ef598f6f452ec1e3f399dc31
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/test/Transforms/SampleProfile/pseudo-probe-emit-macho.ll
Log Message:
-----------
[MC] Emit Mach-O pseudo-probe sections in the __LLVM segment (#206793)
Let's back this out in favor of emitting pseudoprobe data in favor of
emitting in the __LLVM segment, and let dsymutil collect the debug map
objects and merge them into the final sections.
This is to prevent older ld toolchains that don't ignore the new
`__PSEUDO_PROBE` segments from accidentally leaking the probe metadata
into the final image.
Commit: c3373183d2fbb2184c249f93549c300104c994e0
https://github.com/llvm/llvm-project/commit/c3373183d2fbb2184c249f93549c300104c994e0
Author: Alex Strelnikov <strel at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M libc/fuzzing/stdio/CMakeLists.txt
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/src/__support/CMakeLists.txt
A libc/src/__support/printf_core/CMakeLists.txt
A libc/src/__support/printf_core/char_converter.h
A libc/src/__support/printf_core/converter.h
A libc/src/__support/printf_core/converter_atlas.h
A libc/src/__support/printf_core/converter_utils.h
A libc/src/__support/printf_core/core_structs.h
A libc/src/__support/printf_core/error_mapper.h
A libc/src/__support/printf_core/fixed_converter.h
A libc/src/__support/printf_core/float_dec_converter.h
A libc/src/__support/printf_core/float_dec_converter_limited.h
A libc/src/__support/printf_core/float_hex_converter.h
A libc/src/__support/printf_core/float_impl.cpp
A libc/src/__support/printf_core/float_inf_nan_converter.h
A libc/src/__support/printf_core/generic/CMakeLists.txt
A libc/src/__support/printf_core/generic/error_mapper.h
A libc/src/__support/printf_core/int_converter.h
A libc/src/__support/printf_core/linux/CMakeLists.txt
A libc/src/__support/printf_core/linux/error_mapper.h
A libc/src/__support/printf_core/parser.h
A libc/src/__support/printf_core/printf_config.h
A libc/src/__support/printf_core/printf_main.h
A libc/src/__support/printf_core/ptr_converter.h
A libc/src/__support/printf_core/strerror_converter.h
A libc/src/__support/printf_core/string_converter.h
A libc/src/__support/printf_core/vasprintf_internal.h
A libc/src/__support/printf_core/vfprintf_internal.h
A libc/src/__support/printf_core/write_int_converter.h
A libc/src/__support/printf_core/write_modes.def
A libc/src/__support/printf_core/writer.h
M libc/src/err/CMakeLists.txt
M libc/src/err/report.cpp
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/asprintf.cpp
M libc/src/stdio/asprintf_modular.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/vfprintf_internal.h
M libc/src/stdio/generic/CMakeLists.txt
M libc/src/stdio/generic/fprintf.cpp
M libc/src/stdio/generic/printf.cpp
M libc/src/stdio/generic/vfprintf.cpp
M libc/src/stdio/generic/vprintf.cpp
R libc/src/stdio/printf_core/CMakeLists.txt
R libc/src/stdio/printf_core/char_converter.h
R libc/src/stdio/printf_core/converter.h
R libc/src/stdio/printf_core/converter_atlas.h
R libc/src/stdio/printf_core/converter_utils.h
R libc/src/stdio/printf_core/core_structs.h
R libc/src/stdio/printf_core/error_mapper.h
R libc/src/stdio/printf_core/fixed_converter.h
R libc/src/stdio/printf_core/float_dec_converter.h
R libc/src/stdio/printf_core/float_dec_converter_limited.h
R libc/src/stdio/printf_core/float_hex_converter.h
R libc/src/stdio/printf_core/float_impl.cpp
R libc/src/stdio/printf_core/float_inf_nan_converter.h
R libc/src/stdio/printf_core/generic/CMakeLists.txt
R libc/src/stdio/printf_core/generic/error_mapper.h
R libc/src/stdio/printf_core/int_converter.h
R libc/src/stdio/printf_core/linux/CMakeLists.txt
R libc/src/stdio/printf_core/linux/error_mapper.h
R libc/src/stdio/printf_core/parser.h
R libc/src/stdio/printf_core/printf_config.h
R libc/src/stdio/printf_core/printf_main.h
R libc/src/stdio/printf_core/ptr_converter.h
R libc/src/stdio/printf_core/strerror_converter.h
R libc/src/stdio/printf_core/string_converter.h
R libc/src/stdio/printf_core/vasprintf_internal.h
R libc/src/stdio/printf_core/vfprintf_internal.h
R libc/src/stdio/printf_core/write_int_converter.h
R libc/src/stdio/printf_core/write_modes.def
R libc/src/stdio/printf_core/writer.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/snprintf_modular.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/sprintf_modular.cpp
M libc/src/stdio/vasprintf.cpp
M libc/src/stdio/vasprintf_modular.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsnprintf_modular.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdio/vsprintf_modular.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/time/CMakeLists.txt
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/composite_converter.h
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
M libc/src/time/strftime_core/strftime_main.h
M libc/src/time/strftime_l.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/shared/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/printf_core/CMakeLists.txt
A libc/test/src/__support/printf_core/converter_test.cpp
A libc/test/src/__support/printf_core/parser_test.cpp
A libc/test/src/__support/printf_core/writer_test.cpp
M libc/test/src/stdio/CMakeLists.txt
R libc/test/src/stdio/printf_core/CMakeLists.txt
R libc/test/src/stdio/printf_core/converter_test.cpp
R libc/test/src/stdio/printf_core/parser_test.cpp
R libc/test/src/stdio/printf_core/writer_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
Log Message:
-----------
[libc] Migrate printf_core from stdio/ to __support/. (#208303)
The code will be updated and used for wide character printf functions
implemented in wchar/, so __support/ is a more consistent shared
location.
Assisted-by: Automated tooling, human reviewed.
Commit: 96b100337b5b61e84ee07f6ae9168d3b502e574e
https://github.com/llvm/llvm-project/commit/96b100337b5b61e84ee07f6ae9168d3b502e574e
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Reland "[Fuchsia] Stack analysis flags for runtimes" (#211072)
Reverts llvm/llvm-project#192515
We have addressed the CFI related workflow by introducing a new
MD_callgraph and by disambiguating it from MD_type used for CFI.
Commit: 5503126b61dc0524da8cf4f20ba05f82685a960c
https://github.com/llvm/llvm-project/commit/5503126b61dc0524da8cf4f20ba05f82685a960c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.h
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.td
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/Transforms/flatten-loop-cleanup.cir
Log Message:
-----------
[CIR] Flatten loop ops with a cleanup region (#210472)
This change adds support for CFG flattening of loop operations with
cleanup regions.
Rather than re-invent the entire branch through cleanup mechanism, I am
first rewriting the loop by sinking the condition into the body (as a
test + break-if-false) and hoisting the step into the body, and
surrounding the entire body with a cir.cleanup.scope op. Then the greedy
flattening algorithm runs the newly formed loop through the existing
flattening mechanisms so that the loop cleanup handling ends up being
done by the same code that flattens other cleanup scopes.
Assisted-by: Cursor / various models
Commit: 8bbaac66535c6b925dab34fb05f00505feac11d7
https://github.com/llvm/llvm-project/commit/8bbaac66535c6b925dab34fb05f00505feac11d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
TargetParser: Add Triple::getDefaultFloatABI (#210899)
In order to eliminate TargetOptions ABI fields the front and
middle end need to know what value the backend is going to choose
for the ABI properties. This is similar to how we have
getDefaultExceptionHandling and getDefaultWCharSize.
The clang driver seems to have a different notion of which targets
are default soft. This followed ARMTargetMachine as the authority.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 8775feb5da4de07689b125702265321048ee13d7
https://github.com/llvm/llvm-project/commit/8775feb5da4de07689b125702265321048ee13d7
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[clang] Drop stale `*-buildattr` module flag emission (#211021)
Module flags `sign-return-address-buildattr` and
`tag-stack-memory-buildattr` are never exercised elsewhere by existing
tests or code across the whole LLVM source tree, and there are no known
cases of them being used.
Moreover, the `sign-return-address-buildattr` flag emission was gated by
`ptrauth` target feature which does not actually exist: see
`AArch64TargetInfo::computeFeatureLookup()` and
`ARMTargetInfo::hasFeature(StringRef Feature)`. So, it was never
emitted.
This patch removes code responsible for these stale module flags
emission.
Note: the flags was previously introduced in
https://reviews.llvm.org/D112421
Commit: db4d75e13ddc64cfb3a2f3620b622b8c4376812d
https://github.com/llvm/llvm-project/commit/db4d75e13ddc64cfb3a2f3620b622b8c4376812d
Author: Alexey Gerenkov <alexey at espressif.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
A llvm/test/CodeGen/Xtensa/fp16.ll
Log Message:
-----------
[Xtensa] Add fp16 conversion support (#208206)
Close https://github.com/llvm/llvm-project/issues/207505
Commit: aace063fda01504608e4c818a3694f8108da36cf
https://github.com/llvm/llvm-project/commit/aace063fda01504608e4c818a3694f8108da36cf
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
A llvm/lib/Target/SPIRV/SPIRVFinalizeShaderLinkage.cpp
A llvm/lib/Target/SPIRV/SPIRVFinalizeShaderLinkage.h
M llvm/lib/Target/SPIRV/SPIRVPassRegistry.def
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/test/CodeGen/SPIRV/finalize-shader-linkage.ll
Log Message:
-----------
[SPIR-V] Erase dead functions in shader modules (#209672)
The LLVM offload test suite is current failing layout keyword
orientation tests. While initially appearing to be a layout problem in
the SPIR-V legalizer caused by matrix vector sizes exceeding 4, the root
cause is actually persistent dead function definitions in the SPIR-V
backend.
This behavior is standard for OpenCL, which relies on a linker to clean
up unused definitions; however, since shaders lack a linker and require
full inlining, we must handle this in a special shader only pass.
This change adds SPIRVFinalizeShaderLinkage (a shader-only analogue of
DXILFinalizeLinkage): internalize non-entry, non-exported helpers and
erase the dead ones. Globals are left alone since unreferenced externals
become interface OpVariables.
Fixes #201712
Assisted with Claude Opus 4.8
Commit: 9cfbe4a4efb0cebf7c8f9d4fca3e864fc0ac86ed
https://github.com/llvm/llvm-project/commit/9cfbe4a4efb0cebf7c8f9d4fca3e864fc0ac86ed
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
Log Message:
-----------
[llvm-reduce] Run AssignGUIDPass when loading BC
Otherwise we run into crashes when loading BC that has a module summary. This is a no-op if we load existing GUIDs, so probably makes sense to run regardless.
Reviewers: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/208965
Commit: 24586dad1e0b035ced84ef934a310b620fd5fd7f
https://github.com/llvm/llvm-project/commit/24586dad1e0b035ced84ef934a310b620fd5fd7f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/llvm-reduce/llvm-reduce.cpp
Log Message:
-----------
[llvm-reduce] Unconditionally initialize targets
It is not expensive to do, and doing it unconditionally avoids edge
cases like the one in the added test case.
Reviewers: arsenm, mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/208966
Commit: fcbf28ffc812cfba9db0899256aa8757815dfcf9
https://github.com/llvm/llvm-project/commit/fcbf28ffc812cfba9db0899256aa8757815dfcf9
Author: adams381 <adams at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
A clang/test/CIR/CodeGen/trivial-union-assign-nyi.cpp
Log Message:
-----------
[CIR] Report NYI for defaulted union copy/move assignment
A defaulted union copy or move assignment operator has an empty synthesized
body because Sema skips union fields, leaving no AST expression for the
implied whole-object copy. CIRGen emitted that empty body and silently
dropped the assignment.
Report NYI for defaulted union assignment instead. Struct and array
assignments are unaffected because their synthesized bodies contain the
memberwise copies needed by the existing body-emission path.
Commit: 4fff13bfb9648a2e1c34cded0065b493de9cec1b
https://github.com/llvm/llvm-project/commit/4fff13bfb9648a2e1c34cded0065b493de9cec1b
Author: adams381 <adams at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-empty-record.cir
Log Message:
-----------
[CIR] Classify empty records as Ignore in x86_64 callconv (#211078)
The x86_64 aggregate calling-convention bridge rejects a zero-field
record as NYI, even though the SysV classifier already treats an empty
record as NoClass/NoClass (so it returns Ignore) and the rewriter
already drops arguments and returns classified Ignore.
Dropping the zero-field reject in `isSupportedType` lets a C empty
struct classify as Ignore: the argument slot is removed, the remaining
arguments shift down, and an empty-record return lowers to void.
The C++ empty class stays NYI. CIRGen lays it out as a single padded
byte, which the padded reject still catches. Unions, packed, and
all-float aggregates remain NYI as before.
---------
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: 3782c00acdde18c0fb1a0946a26898dc2e7b3141
https://github.com/llvm/llvm-project/commit/3782c00acdde18c0fb1a0946a26898dc2e7b3141
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[clang-sycl-linker] Forward all --ocloc-options occurrences to ocloc (#211075)
getLastArgValue() only returned the final --ocloc-options= occurrence,
silently dropping earlier ones when the option is passed multiple
times (one token per occurrence). Use getAllArgValues() so every
occurrence is forwarded to ocloc.
Commit: aef1e4f249856ce1b9e8362fee75619f3fa8efcf
https://github.com/llvm/llvm-project/commit/aef1e4f249856ce1b9e8362fee75619f3fa8efcf
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/test/CodeGen/target-data.c
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[NVPTX] Support short entry param pointers (#206512)
Commit: b11881e5daa280d322127d4c51dcf472dbcc1dd5
https://github.com/llvm/llvm-project/commit/b11881e5daa280d322127d4c51dcf472dbcc1dd5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/test/CodeGen/AArch64/pr166870.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/PowerPC/bdzlr.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/PowerPC/pr45448.ll
M llvm/test/CodeGen/PowerPC/subreg-postra.ll
M llvm/test/CodeGen/Thumb2/thumb2-cbnz.ll
M llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
M llvm/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
M llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll
Log Message:
-----------
[BranchFolding] Fold away subsequent identical branches
If we have a BB that has a single conditional branch instruction it that
is identical to the previous block's branch instruction, we can delete
the BB as it is redundant.
This doesn't directly impact performance as such instructions are never
executed, but this can help decrease code size which can help with
overall icache pressure (though likely only slightly). The biggest
impact would probably be fitting more instructions into a single cache
line. This is probably almost a no-op with PLO but definitely doesn't
hurt.
Fixes #202763.
Reviewers: RKSimon, arsenm, krzysz00, topperc, lei137
Pull Request: https://github.com/llvm/llvm-project/pull/203110
Commit: 8b9cce358bef26ae4cb9275dd6a43f903bafbaa0
https://github.com/llvm/llvm-project/commit/8b9cce358bef26ae4cb9275dd6a43f903bafbaa0
Author: jimingham <jingham at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/include/lldb/Expression/ExpressionVariable.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Expression/ExpressionVariable.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionVariable.cpp
M lldb/source/Target/ABI.cpp
A lldb/test/API/functionalities/expr-result-var/Makefile
A lldb/test/API/functionalities/expr-result-var/TestCPPExprResult.py
A lldb/test/API/functionalities/expr-result-var/two-bases.cpp
Log Message:
-----------
Make result variables obey their dynamic values in subsequent expressions
This is a resubmit of the original patch: 6344e3aa8106dfdfb30cac36c8ca02bc4c52ce24:
Make result variables obey their dynamic values in subsequent
expressions (#168611)
When I originally submitted this, it caused intermittent flakey failures
on systems I didn't have access to, and I didn't have time to sort them
out, so I reverted the patch. I'm resubmitting this so I can run the
bots on it a few rounds to see if I can reproduce and diagnose those
intermittent failures.
Here's the commit log from the original submission describing the
change:
When you run an expression and the result has a dynamic type that is
different from the expression's static result type, we print the result
variable using the dynamic type, but at present when you use the result
variable in an expression later on, we only give you access to the
static type. For instance:
```
(lldb) expr MakeADerivedReportABase()
(Derived *) $0 = 0x00000001007e93e0
(lldb) expr $0->method_from_derived()
^
error: no member named 'method_from_derived' in 'Base'
(lldb)
```
The static return type of that function is `Base *`, but we printed that
the result was a `Derived *` and then only used the `Base *` part of it
in subsequent expressions. That's not very helpful, and forces you to
guess and then cast the result types to their dynamic type in order to
be able to access the full type you were returned, which is
inconvenient.
This patch makes lldb retain the dynamic type of the result variable
(and ditto for persistent result variables).
It also adds more testing of expression result variables with various
types of dynamic values, to ensure we can access both the ivars and
methods of the type we print the result as.
Commit: 3a2ea7f45682105d26334948d233d10e47675745
https://github.com/llvm/llvm-project/commit/3a2ea7f45682105d26334948d233d10e47675745
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
Log Message:
-----------
[lldb] Change DynamicLoaderDarwin::Segment::name type (#210797)
No need to be a ConstString, Mach-O segment names are always 16 bytes
long. Because this struct is shared for both segment_command and
segment_command_64, I opted to keep the definition instead of replacing
it with one of llvm's MachO structs.
I chose a 17-byte character array so that whatever goes into it can
always be treated as a null-terminated C string.
Commit: acb8fbe83ff12711317118b8c9831905d301b56a
https://github.com/llvm/llvm-project/commit/acb8fbe83ff12711317118b8c9831905d301b56a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
M llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
M llvm/unittests/DWARFLinkerParallel/CMakeLists.txt
A llvm/unittests/DWARFLinkerParallel/DIEInfoPlacementTest.cpp
Log Message:
-----------
[DWARFLinker] Fix placement lost-update crash in parallel marking (#211009)
Commit: 3f0919e8d986b829494fec58d8a8fc0ae043aae0
https://github.com/llvm/llvm-project/commit/3f0919e8d986b829494fec58d8a8fc0ae043aae0
Author: Thrrreeee <1379998393 at qq.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M bolt/lib/Core/Relocation.cpp
M bolt/test/RISCV/reloc-tls.s
Log Message:
-----------
[BOLT][RISCV] Support the TLS global-dynamic relocation (#209995)
This patch adds BOLT support for the RISC-V TLS global-dynamic
relocation `R_RISCV_TLS_GD_HI20`. Classifying it as both a **TLS
relocation** and a **GOT-style relocation** allows BOLT to preserve the
relocation, recover the actual GOT entry address from the linked
instructions, and symbolize the instruction pair.
The RISC-V TLS relocation test is extended to cover a global-dynamic
sequence and verify that BOLT reconstructs the `AUIPC`/`PCREL_LO12` pair
correctly.
Commit: afb68446b493597aec089746957dc36060925679
https://github.com/llvm/llvm-project/commit/afb68446b493597aec089746957dc36060925679
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M clang/include/clang/CIR/LowerToLLVM.h
M clang/include/clang/CIR/Passes.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
A clang/test/CIR/CodeGenOpenMP/target-host-op-filtering.c
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
R mlir/include/mlir/Dialect/OpenMP/OpenMPOffloadUtils.h
A mlir/include/mlir/Dialect/OpenMP/OpenMPUtils.h
Log Message:
-----------
[CIR][OpenMP] Add host op filtering pass to CIR pipeline (#209592)
This patch adds the host op filtering pass which prevents host code
being lowered when compiling for the target device.
Commit: 14bfc424ae77976e05582ff38896caec399f2837
https://github.com/llvm/llvm-project/commit/14bfc424ae77976e05582ff38896caec399f2837
Author: Prasoon Kumar <prasoonkumar054 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/lit/lit/main.py
M llvm/utils/lit/lit/run.py
Log Message:
-----------
Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (#209076)
We want lit's test-execution engine on concurrent.futures.ProcessPoolExecutor
instead of multiprocessing.Pool as it fixes two latent bugs in the old wait
loop and is groundwork for a planned ThreadPoolExecutor/asyncio backend. It
landed as #202681 but was reverted in #206138. The reverted code deadlocks
due to two independent CPython bugs.
submit() blocks holding _shutdown_lock once the executor's wakeup pipe
fills past 16,384 undrained writes, since its own manager thread needs
that same lock to drain it (cpython gh-105829). Separately, shutdown(wait=True)
deadlocks on macOS because join_executor_internals() joins the call queue
before the workers, the reverse of the order macOS needs.
Fix: bound outstanding futures to SUBMISSION_WINDOW_PER_WORKER * workers
and submit one new test per completion instead of all up front, so the
pipe can never fill (LIT_SUBMISSION_WINDOW=0 restores the old behavior for
debugging). cancel_join_thread() before shutdown(wait=True) fixes the
macOS ordering. Also reap SIGKILL'd workers after abort instead of
leaving zombies.
---------
Signed-off-by: Prasoon Kumar <prasoonkumar054 at gmail.com>
Commit: 373df745fbffc01b1f3469a12fcef03343f843f5
https://github.com/llvm/llvm-project/commit/373df745fbffc01b1f3469a12fcef03343f843f5
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (#210891)
Add a legalizer rule that marks these legal at `sXLen` under `+a`
(selecting `amomax.w/d`, and `amomax.b/h` for sub-word under `+zabha`
via the existing widen-scalar-while-preserving-the-memoperand path), and
handle the `llvm.riscv.masked.atomicrmw.{max,min,umax,umin}` intrinsics
the same way as `add/sub/xchg` so sub-word values without `+zabha` use
the LR/SC masking pseudos. There is no `__atomic_fetch_max/min` libcall,
so unlike `add/and/or/xor` the rule does not libcall the no-A case; that
case is already lowered by an IR-level compare-exchange loop and never
reaches GlobalISel, so the rule marks it unsupported to keep the rule
set well-defined.
Updates `legalizer-info-validation.mir` for the newly defined rules and
adds `atomicrmw-max-min-umax-umin.ll`.
Commit: 0cf295574bbef856646e8321e4e798128b84b73b
https://github.com/llvm/llvm-project/commit/0cf295574bbef856646e8321e4e798128b84b73b
Author: Chris Apple <cja-private at pm.me>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M compiler-rt/test/rtsan/halt_on_error.cpp
Log Message:
-----------
[compiler-rt][rtsan] Loosen requirements of halt_on_error test (#210734)
Some systems may call other intercepted functions during the course of a
`malloc`. This would result in some error stack such as:
```
ERROR malloc
ERROR pthread_mutex_lock
ERROR pthread_mutex_unlock
ERROR free
ERROR pthread_mutex_lock
ERROR pthread_mutex_unlock
```
We support this as RTSan, but this test would be overly specific on
those platforms. As written, this requires "only malloc, then free
immediately after". The change makes this "at least malloc is called,
and then later at least free is called". This still keeps the spirit of
the check the same but allows for more (valid) interpretation in
between.
NOTE:
In the future, we may want to consider doing something similar here:
https://github.com/llvm/llvm-project/blob/40c4fea67f49b841bd064624219efceab91b65e0/compiler-rt/test/rtsan/stack_suppressions.cpp#L65
This specifies ONLY 7 suppressions should happen here which is extremely
specific. However I did not change this because it's a little trickier.
We don't really have a test for this stack suppressions method anywhere
else. We could do something like "at least 7 things should be
suppressed", but it's messier so I left that for a future exercise.
Commit: 494a8482a0663cfb8eec515995666fea10aa175a
https://github.com/llvm/llvm-project/commit/494a8482a0663cfb8eec515995666fea10aa175a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
Log Message:
-----------
[gn build] Port acb8fbe83ff1 (#211156)
Commit: 3c8a9094811a2291d65473b290478c14d1e193ab
https://github.com/llvm/llvm-project/commit/3c8a9094811a2291d65473b290478c14d1e193ab
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/MC/BUILD.gn
Log Message:
-----------
[gn build] Port db816fe2ed4e (#211157)
Commit: 564b027db16dc14c2027cd5a2fbb8bf1d3877b85
https://github.com/llvm/llvm-project/commit/564b027db16dc14c2027cd5a2fbb8bf1d3877b85
Author: David Brittain <combinatorial at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOverload.cpp
A clang/test/Modules/gmf-internal-linkage-in-template.cppm
Log Message:
-----------
[clang][Modules] Keep current-TU global-module-fragment internal-linkage functions viable in overload resolution (#210825)
Fixes #210822
A `static` (or anonymous-namespace) function declared in the global
module fragment of the current TU is usable within the module unit
([module.global.frag]/p1), but `Sema::AddOverloadCandidate` dropped it
from the overload set when `Function->isInAnotherModuleUnit()` misfired
— which it does when the enclosing template is instantiated after the
GMF closes (pending instantiations run in
`ActOnEndOfTranslationUnitFragment`, before the named module is in
scope). The candidate was removed with the hidden
`ovl_fail_module_mismatched` kind, so the error had no candidate notes.
The existing carve-out (#104701) only exempted inline /
implicitly-instantiated GMF functions. This also exempts
internal-linkage functions from the current TU's GMF
(`isFromGlobalModule() && !isFromASTFile()`); genuinely imported
internal-linkage functions stay subject to the rule.
`clang/test/Modules` and `clang/test/CXX/module` show no new failures;
the `expose-static-inline-from-gmf-*` tests still pass. Adds a
regression test.
This change was developed with substantial assistance from an AI tool
(Claude Code). The AI carried out the investigation and root-cause
analysis, wrote the code change and the regression test, and drafted
this description.
Commit: 98fe06cb6487cf23d5a56bd5ff0c6b4e378d1be3
https://github.com/llvm/llvm-project/commit/98fe06cb6487cf23d5a56bd5ff0c6b4e378d1be3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Rename CallVia* utils to reflect destination. NFC. (#211150)
Rename Session::CallViaSession to Session::ControllerCaller, and test
utility CallViaMockControllerAccess to CallFromController.
The old names described who was routing the calls, but this is implicit
at the call-site anyway (CallViaSession was a method on Session, and
CallViaMockControllerAccess took a MockControllerAccess argument). The
new names reflect the call destination, which is the thing clients care
about.
Commit: 46858d55e80abb88037c57fd1134a526500f6732
https://github.com/llvm/llvm-project/commit/46858d55e80abb88037c57fd1134a526500f6732
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/test/X86/register-fragments-bolt-symbols.s
Log Message:
-----------
[BOLT] Implement platform independent distribution and shuffle algorithm (#206554)
std::uniform_int_distribution and std::shuffle are
implementation-defined, so binary built with libc++ and libstdc++ can
produce different fragment layouts when using SplitStrategy. In this
case, the FreeBSD build emits only one fragment instead of three.
The output geenrate by --bolt-seed should be deterministic for the same
binary regardless of the standard library implementation. Implement a
portable shuffle and uniform distribution to guarantee identical results
for a given seed.
After this change, we generate 1 fragment, which decrease the strength
of the testcase. As a result, we change the seed to different value to
allow it generate different number of fragments.
Also, replace in-place file modifcation with a write-and-replace
approach for better portability in sed.
Commit: e6190fab2e05e4ba8646af9cf32314fd75e6cccd
https://github.com/llvm/llvm-project/commit/e6190fab2e05e4ba8646af9cf32314fd75e6cccd
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/test/Driver/freebsd.c
A clang/test/Driver/hip-fpie-option-freebsd.hip
M flang/test/Driver/linker-options.f90
Log Message:
-----------
[clang] Switch to Default PIE on FreeBSD (#206139)
We have started to compile the binary in our base as PIE by defualt. It
makes sense to compile the binary to PIE by default in toolchain as
Linux now. Also, extended testcases to support default PIE and no-pie
parameter in freebsd.c and hip-fpie-option.hip.
Commit: 9bcb851e86941117ec9e82db8986ed301f929647
https://github.com/llvm/llvm-project/commit/9bcb851e86941117ec9e82db8986ed301f929647
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_uge.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ult.ll
Log Message:
-----------
[RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (#210955)
`expandCCOpToCMov` was only accepting signed 5-bit immediates before
forming `Xqcicm` conditional-move pseudos. Valid `uimm5` operands for
unsigned compare forms such as `QC_MVGEUI` and `QC_MVLTUI` were not
being handled leading to a crash.
Track whether the selected conditional-move opcode expects a signed or
unsigned immediate, and validate the RHS against the matching range.
Commit: d4e853f37031ff0eee47d323cbc8bc703b5a0ec7
https://github.com/llvm/llvm-project/commit/d4e853f37031ff0eee47d323cbc8bc703b5a0ec7
Author: Tejas Joshi <tejasjoshi9673 at gmail.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/bf16-neg-noftz.ll
A llvm/test/CodeGen/NVPTX/bf16-setp-noftz.ll
Log Message:
-----------
[NVPTX] Fix illegal .ftz modifier for setp and neg PTX instructions for bf16 (#211128)
This patch disables emitting .ftz modifier for bf16 and bf16x2 type setp
and neg instructions, the PTX ISA does not specify this modifier for the
same. FNEG_H already correctly handles fneg for bf16, so remove the
redundant bf16 FNEG16 pattern.
Commit: 5602b981932fedc686b874ffe6ed3164b34a49e7
https://github.com/llvm/llvm-project/commit/5602b981932fedc686b874ffe6ed3164b34a49e7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Run controller-call continuations from Session (#211166)
A controller call's on-complete handler may run managed code, so it must
be dispatched by the Session under a ManagedCodeTaskGroup token, not
invoked directly by the ControllerAccess (which previously held it as a
plain callable and called it itself -- untokened and undispatched).
Wrap it in an opaque ControllerAccess::OnControllerCallReturn that
implementations can hold but not call. They complete it via exactly one
of three Session-provided paths:
- handleControllerCallResult -- the controller returned a result;
dispatches the handler under a fresh token. Asserts the managed-code
group is still open (i.e. before notifyDisconnected).
- failPendingControllerCall -- an already-enqueued call is failed
because the connection dropped before a result arrived (the disconnect
drain); dispatches the handler under a token with a disconnect error.
- failControllerCallInline -- a call made from within callController
while already disconnecting, which can never be enqueued; runs the
handler inline with a disconnect error, where the caller (and its token)
is still on the stack.
Together these guarantee a controller call's handler always runs exactly
once, with a result or a disconnect error, and never runs managed code
without a token. Only the success path takes a result value; the two
failure paths produce the canonical disconnect error internally, so it
can't be gotten wrong. InProcessControllerAccess and the Session unit
tests are updated.
Commit: 6b408bf0da2901a5264a39b7571f5e68b846d94a
https://github.com/llvm/llvm-project/commit/6b408bf0da2901a5264a39b7571f5e68b846d94a
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
M llvm/test/CodeGen/RISCV/zilsd-ldst-opt-prera.mir
Log Message:
-----------
[RISCV] Avoid forming Zilsd pairs with x0 for non-x0 register classes (#211019)
The pre-RA Zilsd optimizer allowed a pair when both stored values came
from the same virtual register if that virtual register was defined by a
copy from X0. This is only valid when the virtual register class can
actually contain X0.
Check the virtual register class before treating the value as `x0_pair`.
This prevents forming an invalid paired store for register classes such
as `GPRNoX0`.
Without this change we were hitting the following assertion in
`RISCVLoadStoreOptimizer`:
```
assert(
FirstReg != SecondReg &&
"First register and second register is impossible to be same register");
```
Commit: 6793bb48ac7517ea1e965de540c75359e465c355
https://github.com/llvm/llvm-project/commit/6793bb48ac7517ea1e965de540c75359e465c355
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libclc/clc/lib/generic/math/clc_sincos_helpers.cl
M libclc/clc/lib/generic/math/clc_sincos_helpers.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp16.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp64.inc
M libclc/clc/lib/generic/math/clc_trigpi_helpers.cl
M libclc/clc/lib/generic/math/clc_trigpi_helpers.inc
M libclc/test/math/cos.cl
Log Message:
-----------
libclc: Fix UB in trig functions with nan inputs (#211047)
Commit: a67429f21b882e546555a3d1d9d45363ae1be51b
https://github.com/llvm/llvm-project/commit/a67429f21b882e546555a3d1d9d45363ae1be51b
Author: Keno Fischer <keno at juliahub.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Analysis/LoopInfo.cpp
Log Message:
-----------
[LoopInfo] Factor use-scan of isBlockInLCSSAForm [NFC] (#211087)
[Factored out of llvm/llvm-project#151062 by review request; AI
Disclosure: Done by Claude]
Split the per-use logic of isBlockInLCSSAForm into a separate helper
that answers whether a single use of a value defined in a loop is
contained within the loop for LCSSA purposes.
Commit: 06bbd269cb8863279c235f07c8e08d6ed2744db8
https://github.com/llvm/llvm-project/commit/06bbd269cb8863279c235f07c8e08d6ed2744db8
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Refill ready list during topdown scheduling (#211046)
Visit nodes which are ready according to the direction of scheduling.
Commit: e8b66ff170f99c6cf275444f22a3aded65ef0bc1
https://github.com/llvm/llvm-project/commit/e8b66ff170f99c6cf275444f22a3aded65ef0bc1
Author: Moazin K. <mkhatti at nvidia.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/test/Dialect/OpenACC/offload-target-verifier.mlir
Log Message:
-----------
[OpenACC] Accept funcs with `acc.specialized_routine` in `acc::isValidSymbolUse` (#211111)
`ACCRoutineLowering` generates device side specialized version of
routines that have the `acc.specialized_routine` attribute. Those are
expected to be offloaded and therefore are valid symbol uses.
Assisted-by: Claude Code
Commit: e265437156dead1018ce826f2773face65d85810
https://github.com/llvm/llvm-project/commit/e265437156dead1018ce826f2773face65d85810
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/test/CodeGen/NVPTX/sm-version.ll
Log Message:
-----------
[NVPTX][Rubin] Add Rubin baseline support (#210646)
This change adds Rubin (sm_107) baseline support in NVPTX backend.
Commit: 15363db58bba0186573fee8afc9226dd38b8f507
https://github.com/llvm/llvm-project/commit/15363db58bba0186573fee8afc9226dd38b8f507
Author: firmiana <firmiana402 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/unittests/BinaryFormat/DwarfTest.cpp
Log Message:
-----------
[DebugInfo] Update assigned DWARF language codes (#210884)
Update LLVM's DWARF language tables to match the current
[`DW_LANG_*`](https://dwarfstd.org/languages.html) and
[`DW_LNAME_*`](https://dwarfstd.org/languages-v6.html) registries.
Add the missing `DW_LANG_*` and `DW_LNAME_*` constants, update the
corresponding language-version mappings, and expose the new `DW_LANG_*`
codes through the LLVM C API.
Commit: c2a39ea72dc1853e3fc2dfe71d2959fbcfcc56d2
https://github.com/llvm/llvm-project/commit/c2a39ea72dc1853e3fc2dfe71d2959fbcfcc56d2
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
A llvm/test/tools/dsymutil/AArch64/pseudo-probe-universal.test
A llvm/test/tools/dsymutil/AArch64/pseudo-probe.test
M llvm/tools/dsymutil/CMakeLists.txt
M llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
M llvm/tools/dsymutil/DwarfLinkerForBinary.h
A llvm/tools/dsymutil/PseudoProbeLinker.cpp
A llvm/tools/dsymutil/PseudoProbeLinker.h
Log Message:
-----------
[dsymutil] collect pseudoprobe sections from debug map into __LLVM segment (#206817)
Introduce a new `PseudoProbeLinker` in `dsymutil` that collects
`__probes/__probe_descs` sections from the debug map objects and merges
the sections and places the probes metadata under
`Contents/Resources/Profiling/{pseudo_probes[-<arch>],pseudo_probe_descs[-<arch>]}`
respectively.
Commit: 49f5065973b8ec8496d5a1d9c58b2100ba48b01c
https://github.com/llvm/llvm-project/commit/49f5065973b8ec8496d5a1d9c58b2100ba48b01c
Author: firmiana <firmiana402 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.def
Log Message:
-----------
[DebugInfo] Fix Fortran 2018 default array lower bound (#210885)
The [DWARF language registry](https://dwarfstd.org/languages.html)
defines the default array lower bound for `DW_LANG_Fortran18` as one,
but LLVM records it as zero. Update the language table to match the
registry.
Commit: e20242130eeaa668e5c782643d4afed0b0ab2a6b
https://github.com/llvm/llvm-project/commit/e20242130eeaa668e5c782643d4afed0b0ab2a6b
Author: Jerry Zhang Jian <jerry.zhangjian at sifive.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
A llvm/test/CodeGen/RISCV/lpad-setjmp-regmask.ll
Log Message:
-----------
[RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (#210868)
RISCVISelDAGToDAG's lowering of RISCVISD::LPAD_CALL / LPAD_CALL_INDIRECT
to PseudoCALLLpadAlign / PseudoCALLIndirectLpadAlign (introduced in
#177515) only copied the callee, lpad label, chain, and glue operands,
dropping the argument-register and register-mask operands in between.
Without the register-mask operand, the register allocator treats these
calls as clobbering nothing but ra, so values live across the call are
not spilled/reloaded even though the callee is free to clobber
caller-saved registers. This caused a miscompile where a pointer held
live across a call to getcontext() (a returns_twice function) was
corrupted after the call returned, leading to a SIGSEGV in
llvm-test-suite's siod test.
Fix the operand copy to include the argument-register and register-mask
operands, matching the pseudo-instruction operands of a regular
PseudoCALL/PseudoCALLIndirect.
Signed-off-by: Jerry Zhang Jian <jerry.zhangjian at sifive.com>
Commit: 91406e8dff2b1578ff4dd22593ea1a8039b074a4
https://github.com/llvm/llvm-project/commit/91406e8dff2b1578ff4dd22593ea1a8039b074a4
Author: Haowei <haowei at google.com>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
Remove debug leftovers (#211068)
a04f87fdd9b59c6089bf731c669c6f149208363c merged with some debug print
leftovers. This patch removes them.
Commit: 33928f632158afe0f4b23e2b9f9cd70e4b5520fa
https://github.com/llvm/llvm-project/commit/33928f632158afe0f4b23e2b9f9cd70e4b5520fa
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-21 (Tue, 21 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
Log Message:
-----------
[LoopInfo] Make getSmallestCommonLoop O(depth). NFC (#211175)
getLoopDepth is itself an O(depth) parent walk.
Commit: 860cb62914d3fb2d37b561dc5eee7bd1b65dfc9e
https://github.com/llvm/llvm-project/commit/860cb62914d3fb2d37b561dc5eee7bd1b65dfc9e
Author: Kamlesh Kumar <kamleshbhalui at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/ThinLTO/X86/type_test_noindircall.ll
Log Message:
-----------
[X86] narrow the check scope to function NFC (#210917)
Commit: b77f99775e0a8e5d9b0aa2960fcee851fcb23d7d
https://github.com/llvm/llvm-project/commit/b77f99775e0a8e5d9b0aa2960fcee851fcb23d7d
Author: David Green <david.green at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/ctpop.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ctpop.ll
Log Message:
-----------
[AArch64] Update ctpop cost tests. NFC (#211184)
Commit: db369a6a6aa336806debcf2e110a41fe3e78b0cf
https://github.com/llvm/llvm-project/commit/db369a6a6aa336806debcf2e110a41fe3e78b0cf
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[AMDGPU][NewPM] Run UniformityInfoAnalysis inside AMDGPUISelDAGToDAGPass (#211174)
Just move it from pipeline to isel pass, NFC.
Commit: 7c72a115065720e2b6ad38bdee91ea3c5e580cfb
https://github.com/llvm/llvm-project/commit/7c72a115065720e2b6ad38bdee91ea3c5e580cfb
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/Parallel.h
M llvm/include/llvm/Support/PerThreadBumpPtrAllocator.h
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
M llvm/lib/Support/Allocator.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/unittests/Support/PerThreadBumpPtrAllocatorTest.cpp
Log Message:
-----------
PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (#209687)
PerThreadAllocator, only used by DWARFLinker, indexes a fixed
getThreadCount()-sized array by `getThreadIndex()`, so it only works on
ThreadPoolExecutor threads (and asserts elsewhere). It false-shares
adjacent threads' bump pointers.
Instead, create each thread's sub-allocator lazily on first use, keyed
by a process-unique instance id in a thread-local cache, with the
instance owning the heap-allocated sub-allocators. This drops the
getThreadIndex()/getThreadCount() dependence, unblocking the caller
participation change for `parallelFor`.
mlir::ThreadLocalCache solves the same problem by keying a per-thread
map on the instance pointer and reclaiming a thread's slot when an instance
dies, but costs a map lookup and shared_ptr bookkeeping per allocation; instances
here are few and short-lived, so an id-indexed vector is cheaper. The counter
behind claimPerThreadAllocatorId is defined out of line in Allocator.cpp
so Windows DLLs cannot duplicate it and alias two instances' sub-allocators.
Aided by Claude Fable 5
Commit: 06e24fa50e58068c6c9dabde2d38a1cdfd34b50d
https://github.com/llvm/llvm-project/commit/06e24fa50e58068c6c9dabde2d38a1cdfd34b50d
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEAttributes.cpp
Log Message:
-----------
[AArch64][SME] Scan function attributes once in SMEAttrs (NFC) (#210924)
Profiling sqlite on aarch64-O3 shows ~0.5% of compile-time is spent in
the SMEAttrs constructor, mostly from the inliner's areInlineCompatible
and getInlineCallPenalty hooks.
SMEAttrs does 14 string attribute lookups. Invert this to instead walk
the function attributes once and build the mask with a StringSwitch.
Improves CTMark geomean -0.20%, sqlite -0.40%.
https://llvm-compile-time-tracker.com/compare.php?from=4aa1590ad66a1bff9b3c74b4a2c7366473015b4c&to=37796f0f92101225e2fb5b6924acfdb5cba1b672&stat=instructions%3Au
Assisted-by: codex
Commit: 9925bcf8d945b16546d9e0748d3828fa3cc6d7e7
https://github.com/llvm/llvm-project/commit/9925bcf8d945b16546d9e0748d3828fa3cc6d7e7
Author: Tyler Chen <tlchen at pllab.cs.nthu.edu.tw>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][NFC] Fix WADD comment typo. (#211177)
Commit: c75267c8ef60e2f61e2c0d9e029fca9221554baf
https://github.com/llvm/llvm-project/commit/c75267c8ef60e2f61e2c0d9e029fca9221554baf
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx13.ll
Log Message:
-----------
[AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (#210713)
- builtins with documentation
- instructions
- new subtarget feature only for gfx13
- GlobalISel RegBankLegalize rules
- tests
Commit: ff90624360a1a55289a1de147a2ec8c504de7aaa
https://github.com/llvm/llvm-project/commit/ff90624360a1a55289a1de147a2ec8c504de7aaa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/interleavevectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/addsub.ll
M llvm/test/Transforms/PhaseOrdering/X86/fmaddsub.ll
Log Message:
-----------
[InstCombine] foldVectorBinop - don't fold length changing shuffles across binops (#211115)
As discussed on #210948 - the "Op(shuffle(V1, Mask), shuffle(V2, Mask))
-> shuffle(Op(V1, V2), Mask)" fold should only occur in InstCombine if
the shuffle is "like for like" and not length changing.
Leave the more general fold to an upcoming VectorCombine patch which can
handle the cost:benefit analysis, including multiuse shuffles.
Commit: e878b123ee0db40a16d62c421f6ea59a7ec59581
https://github.com/llvm/llvm-project/commit/e878b123ee0db40a16d62c421f6ea59a7ec59581
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
M llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
Log Message:
-----------
[AMDGPU] Do not copy noundef onto a widened kernarg load (#211181)
Sub-dword args are widened to an i32 load whose extra bits belong to a
sibling kernarg or padding, so noundef on the original arg does not
cover the full loaded value
Only copy it when the load type matches the argument type, mirroring the
existing range/nofpclass guards
Commit: b0c2dc0cf8f8de2fd2f0306deea0c5fcd07282da
https://github.com/llvm/llvm-project/commit/b0c2dc0cf8f8de2fd2f0306deea0c5fcd07282da
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/include/flang/Lower/DirectivesCommon.h
A flang/test/Lower/OpenMP/wsloop-computed-goto.f90
A flang/test/Lower/OpenMP/wsloop-select-case.f90
Log Message:
-----------
[flang][PFT-to-MLIR] allocate missing body blocks in `createEmptyRegionBlocks` (#210950)
Problem
-------
Under -mmlir --wrap-unstructured-constructs-in-execute-region, branch
lowering hit a null Evaluation::block for body statements inside an
OpenMP loop. genMultiwayBranch tripped
Bridge.cpp: Assertion `block && "missing multiway branch block"' failed
and genFIR(SelectCaseStmt) tripped
Bridge.cpp: Assertion `e->block && "missing CaseStmt block"' failed
The wrap machinery decides an unstructured DO/IF is wrappable and stops
propagating its isUnstructured flag to the enclosing OpenMPConstruct.
The OMP construct's isUnstructured stays false, so the top-level
createEmptyBlocks treats it as a structured directive with nested
evaluations — it allocates only the OMP construct's first-nested block
and does not recurse into the DO body. Then OMP loop lowering takes
over the body via createEmptyRegionBlocks, which was written to
*re-parent* pre-existing blocks into its region and silently skipped
evals whose .block was still null. Body targets (e.g. label 17's
ContinueStmt, or a SelectCase's CaseStmts) therefore had no block when
the consumer read evalOfLabel(...).block, tripping the asserts.
Solution
--------
Restore the invariant that consumers of eval.block can trust it at
lowering time. In createEmptyRegionBlocks (DirectivesCommon.h), when an
eval has isNewBlock but no .block, create one in the current region
alongside the existing re-parenting path. The OMP lowering path then
finds pre-allocated blocks for the whole body — matching the state that
existed before the wrap feature changed isUnstructured propagation —
without any lazy-allocation logic at consumer sites.
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: cfc921621a05b94be5742796fdb2ba5a58979e95
https://github.com/llvm/llvm-project/commit/cfc921621a05b94be5742796fdb2ba5a58979e95
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Optimize GEP comparisons with constant offsets (#208547)
https://alive2.llvm.org/ce/z/dCmoVn
In a GEP comparison with the same base like
%1 = gep i8, @base, i64 a
%2 = gep i8, @base, i64 b
%cmp = icmp ... %1, %2
When we know that the offsets cross the base's alignment boundary the
same
number of times, it means that either both of them will overflow, or
none of
them will. In these cases we can turn the comparison into offset
comparison:
%cmp = icmp ... a, b
Commit: ca52c1b3abbadf829598872b7dded2bca2fd50c0
https://github.com/llvm/llvm-project/commit/ca52c1b3abbadf829598872b7dded2bca2fd50c0
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/guarded-inner-loop.ll
M llvm/test/Transforms/LoopInterchange/interchanged-loop-nest-3.ll
M llvm/test/Transforms/LoopInterchange/lcssa-incoming-value-is-not-instr.ll
M llvm/test/Transforms/LoopInterchange/pr43326-ideal-access-pattern.ll
M llvm/test/Transforms/LoopInterchange/pr57148.ll
M llvm/test/Transforms/LoopInterchange/reduction-extra-use-in-inner-loop.ll
M llvm/test/Transforms/LoopInterchange/reduction-not-involve-innermost.ll
M llvm/test/Transforms/LoopInterchange/transform-stop-partway.ll
Log Message:
-----------
[LoopInterchange] Prevent the transformation stage from stopping partway (#205564)
As mentioned in #205562, there are cases where the transformation stage
in LoopInterchange stops partway through, and the output IR ends up
partially modified rather than interchanged. Notably, the interchange is
recognized as having succeeded internally even in such cases. Apparently
this happens not to cause any miscompiles at the moment, but it is
clearly dangerous.
This patch removes the early exit in the transformation phase. We cannot
simply remove it, which checks for the presence of a unique successor of
the inner loop header, because there is a case where the header actually
has multiple successors. To avoid that situation, this patch changes the
code to call SplitBlock on the inner loop header unconditionally.
The test changes fall into two categories: some are simply due to newly
added redundant BBs. In the others, the expected interchanges are now
applied as intended, whereas previously the transformation failed and
the interchanges were not applied before this patch.
Commit: 948c4a2fc3df17eeb44337d590d669d0150aecbb
https://github.com/llvm/llvm-project/commit/948c4a2fc3df17eeb44337d590d669d0150aecbb
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt.mir
Log Message:
-----------
[AArch64][GlobalISel] Select vector element extract into GPR (#210030)
Prototyping a new minimal type-based approach to RegBankSelect (#199040)
for compile-time purposes exposed various gaps in instruction selection
when not using the existing RegBankSelect pass. These manifested as new
fallbacks when compiling the IR dataset from [1].
This patch teaches instruction selection to handle extracts of scalar
i8/i16/i32 into GPR directly. This will prevent new fallbacks being
introduced when a new type-based RBS pass is added.
The test cases are extracted from [1].
Assisted-by: codex
[1] https://davemgreen.github.io/gisel.html
Commit: c23ad1b869cdcec16275304e1f0b1d419fe35ae9
https://github.com/llvm/llvm-project/commit/c23ad1b869cdcec16275304e1f0b1d419fe35ae9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
Log Message:
-----------
[libc++] Remove {Pause,Resume}Timing from fast push_back benchmarks (#209130)
These benchmarks are expected to run for a very short time, and
`{Pause,Resume}Timing` should only be used when operations are expected
to take a long time. Removing them reduces the amount of noise in these
benchmarks.
Fixes #208719
Commit: 3e009b9276206769da69b3a3730a19ddc6abefa6
https://github.com/llvm/llvm-project/commit/3e009b9276206769da69b3a3730a19ddc6abefa6
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
Log Message:
-----------
[VPlan] Simplify EVL strided load match in optimizeMaskToEVL. nfc (#211193)
Commit: cf7a6122a1247353ba29f5384885de9e42bd1e14
https://github.com/llvm/llvm-project/commit/cf7a6122a1247353ba29f5384885de9e42bd1e14
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/completions/TestDAP_completions.py
Log Message:
-----------
[lldb-dap] Migrate the Completions tests (#210829)
Drop the Scenario dataclass as it is now clear what we are testing for.
Commit: 8beb627f6c59900cc080c9dba221dd197d6416c4
https://github.com/llvm/llvm-project/commit/8beb627f6c59900cc080c9dba221dd197d6416c4
Author: Georgiy Samoylov <Ignitor21838 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/OptionArgParser.cpp
M lldb/test/API/commands/memory/read/TestMemoryRead.py
Log Message:
-----------
[lldb] Add array decaying (#210918)
In C, an array name in an expression "decays" into a pointer to its
first element. LLDB did not honor this: commands like `memory read
my_array` did not work correctly, because an aggregate type has no
scalar value, so trying to obtain one (ResolveValue/GetValueAsUnsigned)
failed.
This MR adds explicit array decay: for array-typed expressions, the
address of the array object itself is used instead of its (non-existent)
scalar value.
Commit: b9ba0be057eb0f1989635376a267f5cb6ca3060c
https://github.com/llvm/llvm-project/commit/b9ba0be057eb0f1989635376a267f5cb6ca3060c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/alias_mask.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
Log Message:
-----------
[SDAG] Specify unsigned compares for loop.dependence.{war|raw} masks (#197437)
Previously, the LangRef was ambiguous about the sign of comparisons used
to create the loop dependence masks. This resulted in the expansion not
following the intended semantics for extreme inputs.
For example, %ptrA = 0, %ptrB = UINT_MAX, should result in a (RAW) mask
with all lanes active. However, previously we'd do ``(%elementSize *
lane) < abs(%ptrB - %ptrA)``, which due to incorrectly using signed
arithmetic would result in a mask with a single lane active as
``abs(%ptrB - %ptrA)`` resulted in 1, not `UINT_MAX`. In other words,
``abs(%ptrB - %ptrA)`` should be ``unsigned-absolute-difference(%ptrA,
%ptrB)``.
Follow up to #188248.
Commit: 5205cd7e9e71321804ccc4f5eb805d42ce986216
https://github.com/llvm/llvm-project/commit/5205cd7e9e71321804ccc4f5eb805d42ce986216
Author: Kamlesh Kumar <kamleshbhalui at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-reduce/Inputs/sleep-and-check-stores.py
Log Message:
-----------
[llvm-reduce] Tighten the check to count actual store NFC (#210933)
Commit: f07e2f1aabd1f62efd467ed397cb7b26ca60fb6d
https://github.com/llvm/llvm-project/commit/f07e2f1aabd1f62efd467ed397cb7b26ca60fb6d
Author: Timothy Day <timday at thelustrecollective.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Don't warn at joins that re-branch on a try-lock result (#209796)
Previously, when the result of a try-lock call is branched on more than
once, the paths between the branches would disagree on whether the
capability is held while remaining consistent at each branch. The analysis
then gave a false positive warning at the intermediate join:
mutex 'lock' is not held on every path through here
Create getTerminatorTrylockCall() helper from getEdgeLockset(); if the terminator
of a block branches on the result of a call to a try_acquire_capability-function
(perhaps negated or stored in a local variable), this helper returns that call and
its callee.
Use this new helper in getTerminatorTrylockCaps(), which will return the
capabilities acquired by a trylock; feed these capabilites to intersectAndWarn()
during a branch join, in order to avoid false positives.
Soundness is preserved because intersectAndWarn() still removes the
capabilities from the join block's entry lockset, ensuring any guarded access
inside the join block before the terminator is diagnosed. getEdgeLockset()
then re-adds the capability on the success edge.
This change resolves the false positive warning reported in [1].
Reported-by: https://lore.kernel.org/linux-fsdevel/20260714181057.667977-1-timday@thelustrecollective.com/ [1]
Assisted-by: AI was used a bit to understand the code and to help with testing and validation
Commit: 9bb81c2ffc5b349b54605cecb3e3a5e4a611f642
https://github.com/llvm/llvm-project/commit/9bb81c2ffc5b349b54605cecb3e3a5e4a611f642
Author: Takayuki Todokoro <47556487+takatodo at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/unroll-jam.mlir
Log Message:
-----------
[MLIR][Affine] Preserve discardable attrs when adding loop yields (#210571)
`replaceWithAdditionalYields` only appends loop-carried values, so
preserve the loop's discardable attributes, matching `scf.for`.
Assisted-by: OpenAI Codex gpt-5.6-sol max
Commit: dabf57f31715144eb75f2ce82efc5b0db6b9228d
https://github.com/llvm/llvm-project/commit/dabf57f31715144eb75f2ce82efc5b0db6b9228d
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/bsl.ll
M llvm/test/CodeGen/AArch64/combine-storetomstore.ll
M llvm/test/CodeGen/AArch64/imm-splat-ops.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to cover 64-bit vectors. (#209833)
This extends https://github.com/llvm/llvm-project/issues/165559 to
include 64-bit vectors.
Commit: 6c560cddfb1e206678866c6822baabcdcee2343f
https://github.com/llvm/llvm-project/commit/6c560cddfb1e206678866c6822baabcdcee2343f
Author: jay0x <90309873+blazie2004 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Lower/Support/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/reduction-array-section.f90
Log Message:
-----------
[flang][Lower][OpenMP] Fix reduction on array sections aborting in lowering (#209701)
**Summary**
This regression was introduced by #196094, which added a special
lowering path for reductions on a single array element, such as `a(2)`.
The problem is that Flang also treated an array section like `a(2:96)`
as if it were a single element. Because of this, the section was sent to
a code path that only supports scalar elements.
That path produced an array type that the reduction initialization code
could not handle, so Flang reached a `TODO` and aborted with a “not yet
implemented” error.
**Fix**
The fix is to use the special element path only when the expression has
rank 0, which means it represents one single value. Array sections have
rank greater than 0, so they should continue through the existing
boxed-array path.
Fixes : [209462](https://github.com/llvm/llvm-project/issues/209462)
---------
Co-authored-by: Jay Satish Kumar Patel <kumarpat at pe31.hpc.amslabs.hpecorp.net>
Commit: 28972b1fbc72c61eeb0e21272123eafcf0cdfea5
https://github.com/llvm/llvm-project/commit/28972b1fbc72c61eeb0e21272123eafcf0cdfea5
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Analysis/PHITransAddr.cpp
A llvm/test/Transforms/GVN/phi-translate-cross-function-cast.ll
Log Message:
-----------
[GVN] Fix PHITransAddr crash scanning cross-function cast users (#211169)
When PHI-translating a load address through a select of module-level
constant expressions, the folded side becomes a global constant whose
use-list spans multiple functions. Scanning that use-list for an
available cast could return a cast from another function, which then
made DominatorTree::dominates() query a block from a different function
and trip an assertion.
This patch restricts the search to casts in the current function,
matching the existing guards on the GEP and add paths.
Fixes #211034
Commit: 4bb9022f545ceb2b01789bd86d29da495449351b
https://github.com/llvm/llvm-project/commit/4bb9022f545ceb2b01789bd86d29da495449351b
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
Log Message:
-----------
[lldb-dap] Migrate breakpointAssembly and instructionBreakpoint test (#211054)
Commit: 16042c9480b4c9147d35f4e56b609c4189eb4f6f
https://github.com/llvm/llvm-project/commit/16042c9480b4c9147d35f4e56b609c4189eb4f6f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
Log Message:
-----------
[mlir][SPIR-V] Add MathToSPIRV conversion for copysign on OpenCL targets (#205994)
Commit: b9f8a9b43c2e6bb010ea8e457ab318077f013e25
https://github.com/llvm/llvm-project/commit/b9f8a9b43c2e6bb010ea8e457ab318077f013e25
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
Log Message:
-----------
[lldb] Fix SymbolFilePDBTests after FileSpec change f9b5264523b1 (#208425)
GetDirectory() returns a StringRef now which doesn't convert to bool
implicitly
Commit: 6d0e88210cd02ef517e42bc095c1bfd1fd5d1d3c
https://github.com/llvm/llvm-project/commit/6d0e88210cd02ef517e42bc095c1bfd1fd5d1d3c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/langinfo.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/langinfo-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/nl_item.h
Log Message:
-----------
[libc] Add langinfo.h header generation, macros, and types (#210941)
Add header generation support for langinfo.h, including nl_item type
definition, langinfo macros, and YAML header specification.
* libc/include/llvm-libc-types/nl_item.h: Define nl_item type
* libc/include/llvm-libc-macros/langinfo-macros.h: Define POSIX macros
* libc/include/langinfo.yaml: Define langinfo.h interface
* libc/include/langinfo.h.def: Header template
* libc/config/linux/*/headers.txt: Enable langinfo header for Linux
Assisted-by: Automated tooling, human reviewed.
Commit: 30a0a51a82ea1a73c52d302f53c4d5a0e5fd04ee
https://github.com/llvm/llvm-project/commit/30a0a51a82ea1a73c52d302f53c4d5a0e5fd04ee
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Fix FPCR abbreviations and an incorrect association in a comment (NFC) (#211188)
Commit: 0fbf86a79c9ddc61bee0126f61d81dc6d4b522fd
https://github.com/llvm/llvm-project/commit/0fbf86a79c9ddc61bee0126f61d81dc6d4b522fd
Author: Jacob Crawley <jacob.crawley at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-multivector-load-stores.ll
R llvm/test/CodeGen/AArch64/sve-multivector-loads.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Lower to multivector stores (#207397)
Lowers unpredicated stores of scalable vectors that are two or four
times the width of a legal SVE type to multi-vector operations when
subregister liveness is enabled instead of splitting them.
This matches the existing approach for multi-vector load lowering.
Commit: fbc5841e95f2183e48d7bffc850c2ec40b384e72
https://github.com/llvm/llvm-project/commit/fbc5841e95f2183e48d7bffc850c2ec40b384e72
Author: Weibo He <NewSigma at 163.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/Coroutines.md
M llvm/lib/Transforms/Coroutines/CoroElide.cpp
M llvm/test/Transforms/Coroutines/coro-elide.ll
Log Message:
-----------
[CoroElide] Remove restriction that the ramp function be inlined (#211163)
This restriction dates back to the initial implementation of CoroElide
support
(https://github.com/llvm/llvm-project/commit/dce9b026773160769625a4809bf2dfbf4e636ef1),
but the rationale for treating ramp functions specially seems unclear
and lacks test coverage.
This patch proposes that we drop the restriction and enable more
optimization opportunities. This also fixed the repro in #148380, but
the root cause remains unresolved.
Commit: b9ecf4590babac78a761efd1704ceefd4a1a26e1
https://github.com/llvm/llvm-project/commit/b9ecf4590babac78a761efd1704ceefd4a1a26e1
Author: David Green <david.green at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/smul_fix.ll
M llvm/test/CodeGen/AArch64/smul_fix_sat.ll
M llvm/test/CodeGen/AArch64/umul_fix.ll
M llvm/test/CodeGen/AArch64/umul_fix_sat.ll
Log Message:
-----------
[AArch64][GlobalISel] Update and cleanup s/umul.fix tests. NFC (#211232)
Commit: f61499bff6880928ed0a3f11f79086943be16b8f
https://github.com/llvm/llvm-project/commit/f61499bff6880928ed0a3f11f79086943be16b8f
Author: Ferdinand Lemaire <flscminecraft at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
A mlir/test/Conversion/RaiseWasm/wasm-blocks-to-cf.mlir
A mlir/test/Conversion/RaiseWasm/wasm-comparisons-to-arith-cmp.mlir
A mlir/test/Conversion/RaiseWasm/wasm-eqz-to-arith-cmp.mlir
A mlir/test/Conversion/RaiseWasm/wasm-extend-to-arith-ext.mlir
A mlir/test/Conversion/RaiseWasm/wasm-loop-to-cf.mlir
A mlir/test/Conversion/RaiseWasm/wasm-memory-to-memref.mlir
A mlir/test/Conversion/RaiseWasm/wasm-rotl-to-arith.mlir
A mlir/test/Conversion/RaiseWasm/wasm-rotr-to-arith.mlir
Log Message:
-----------
[MLIR][WASM] Introduce full support for raising WASM MLIR to other dialects (#205990)
Following https://github.com/llvm/llvm-project/pull/164562 where
RaiseWasm was introduced.
This PR completes the support for rewriting the currently supported Wasm
MLIR operators to arith, math, cf and memref.
---------
Co-authored-by: Ferdinand Lemaire <ferdinand.lemaire at woven-planet.global>
Commit: 1c7c783ba262a9ce9d6e5c070f0d7fb85125cedd
https://github.com/llvm/llvm-project/commit/1c7c783ba262a9ce9d6e5c070f0d7fb85125cedd
Author: Mayank <mayank.solanki at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/DeveloperPolicy.md
Log Message:
-----------
[Docs] Remove dead Phabricator link from DeveloperPolicy (#210934)
The Phabricator committing-a-change anchor no longer resolves since
Phabricator has been discontinued, so drop the reference and keep the
GitHub Issues guidance for linking reviewed/closed bugs.
Commit: 88840f264de6e0e6548219429ff62b3354db5210
https://github.com/llvm/llvm-project/commit/88840f264de6e0e6548219429ff62b3354db5210
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenCUDA/builtins-nvvm-atomic.cu
Log Message:
-----------
[CIR][CUDA] Add support for scoped NVVM atomic builtins (#210863)
Adds codegen support for the block and system-scoped NVVM atomic
builtins: add, and, or, xor, min, max, inc and dec.
These are lowered to the corresponding CIR `cir.atomic.fetch` operations
and subsequently lowered to LLVM `atomicrmw` instructions.
Commit: 31810a1d28e966fe757e5221c41c0610dc9c1203
https://github.com/llvm/llvm-project/commit/31810a1d28e966fe757e5221c41c0610dc9c1203
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
Log Message:
-----------
AMDGPU: Refactor checkVOPDRegConstraints (#196514)
Commit: 05daf2a85768d51dbe96953c5704dea1e45fe0b3
https://github.com/llvm/llvm-project/commit/05daf2a85768d51dbe96953c5704dea1e45fe0b3
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[LLVM][AArch64TargetTransformInfo] Fix typos in SVEIntrinsicInfo. (#211230)
Correct Propery->Property and sprinkle a couple of extra comments.
Commit: 3ac7573589eaa2d3ea107285ca10e0f52cbfbcfd
https://github.com/llvm/llvm-project/commit/3ac7573589eaa2d3ea107285ca10e0f52cbfbcfd
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Remove CompletionChunk.isKind methods (#210678)
This completes the third step of
https://github.com/llvm/llvm-project/issues/156680
This change is a follow-up to
https://github.com/llvm/llvm-project/pull/177854, following the release
branching, to ensure a one release-cycle deprecation period.
Commit: 3407cd1892b8a64b6f267e78b351b1415d2bafa5
https://github.com/llvm/llvm-project/commit/3407cd1892b8a64b6f267e78b351b1415d2bafa5
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
Log Message:
-----------
AMDGPU: Validate VOPD/VOPD3 physical source registers against operand RC (#196515)
Replace isVGPR checks with isValidVOPDSrc that validates physical source
registers against the actual combined VOPD/VOPD3 instruction's operand
register classes. Now we also validate operands for VOPD instructions.
Commit: 3369ddd384780f2ae60c3b20264735c2823d261c
https://github.com/llvm/llvm-project/commit/3369ddd384780f2ae60c3b20264735c2823d261c
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
Log Message:
-----------
AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (#196516)
For V_DOT2_F32_F16 and V_DOT2_F32_BF16 add their VOPDName and mark
them with usesCustomInserter which will be used to add pre-RA register
allocation hints to preferably assign dst and src2 to the same physical
register. When the hint is satisfied, canMapVOP3PToVOPD recognises the
instruction as eligible for VOPD pairing by checking if it is VOP2 like:
dst==src2, no source modifiers, no clamp, and src1 is a register.
Mark both instructions as commutable to allow a literal in src1 to be
moved to src0, since VOPD only permits a literal in src0.
Original patch had a bug where it did not check if physical src
registers match register class of appropriate operand in fullVOPD
instructions, check is now done via isValidVOPDSrc.
Commit: bad9ad339743d262793c15fddfab90bd976e531b
https://github.com/llvm/llvm-project/commit/bad9ad339743d262793c15fddfab90bd976e531b
Author: Matthew Blewitt <blewitt.matt at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-partial-reduce.ll
Log Message:
-----------
[AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (#204938)
A fixed-length `llvm.vector.partial.reduce.add` reducing `<16 x i8>`
into `<2 x i64>` is lowered on `+sve` by converting the reduction to a
scalable one and finishing with `convertFromScalableVector`. The i8 ->
i64 fold splits the `(nx)v4i32` dot before converting it back to fixed
length, but splitting a scalable container is not equivalent to
splitting the fixed vector it holds: at vscale=2 an `nxv4i32` container
splits into two `nxv2i32`, each holding four i32s, not the two-lane
halves of the underlying `v4i32`. The high partial sums land in lanes
that `convertFromScalableVector` then discards, so any runtime VL > 128
silently drops them — on a 256-bit machine (e.g. Neoverse V1) exactly
half the result is lost (#204939; downstream miscompile
rust-lang/rust#158144).
Convert the dot back to a fixed-length i32 vector before splitting, so
the split, widen and accumulate all happen in fixed length and no lanes
are dropped. The fixed dot width is derived from the result (two i32
lanes per i64 result lane) so the wider, VL-pinned `<4 x i64> <- <32 x
i8>` reduction — which also reaches this fold on plain SVE — lowers
correctly. This is the i64 sibling of the `v16i8 -> v2i32` case fixed in
#177119 (issue #176954); the fixed-length support was introduced in
#142032.
Commit: f5430c58d13c2e763b62d52e35e0e2859e57ff66
https://github.com/llvm/llvm-project/commit/f5430c58d13c2e763b62d52e35e0e2859e57ff66
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/Rematerializer.cpp
Log Message:
-----------
[NFC] Reword comment per post-merge feedback on #211031 (#211234)
As discussed with krzysz00
Commit: 29575a3460b43132c7d973b502830897b02874a9
https://github.com/llvm/llvm-project/commit/29575a3460b43132c7d973b502830897b02874a9
Author: syhhyl <syhhyl926 at 126.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MachObjectWriter.cpp
A llvm/test/CodeGen/AArch64/macho-weak-alias.ll
Log Message:
-----------
[MachO] Preserve weak linkage for aliases (#198148)
Mach-O aliases with weak or linkonce linkage were emitted as weak
references, which is appropriate for undefined references but not for
alias definitions. Emit Mach-O aliases through the same linkage path as
other global definitions so weak aliases get .weak_definition.
When writing aliased symbols, keep the aliasee flags and include the
alias symbol's own flags so N_WEAK_DEF is preserved in the Mach-O n_desc
field.
Fixes #111321
#196047 was closed as a duplicate of #111321.
Commit: 6f47123da4209cad8e043279d8572760a3e59af6
https://github.com/llvm/llvm-project/commit/6f47123da4209cad8e043279d8572760a3e59af6
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
Log Message:
-----------
[AMDGPU] Remove some unneeded waits for VA_VDST (#210741)
Add some internal consistency checks on WaitcntBrackets before and after
processing each instruction. In particular, check that VA_VDST_RD and
VA_VDST_WR agree on the range of values of the underlying hardware
counter. Fix some cases where this was not true, which has the effect of
removing some unneeded waits for VA_VDST where it was already known to
be zero.
Commit: 04327b1e595ac915a196340a37f48c16e6f489bc
https://github.com/llvm/llvm-project/commit/04327b1e595ac915a196340a37f48c16e6f489bc
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/test/libcxx/text/text_encoding/environment.pass.cpp
Log Message:
-----------
Revert "[libc++][test] XFAIL `text/text_encoding/environment.pass.cpp` test on Armv7/Linux Ubuntu targets." (#211112)
Reverts #206188
XFAIL'ed wrong test
Commit: ef13d4687b5fb29d8e162f4c4cce5b3c7cd58570
https://github.com/llvm/llvm-project/commit/ef13d4687b5fb29d8e162f4c4cce5b3c7cd58570
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp
A llvm/test/DebugInfo/COFF/enum-limits.ll
M llvm/test/DebugInfo/COFF/integer-128.ll
Log Message:
-----------
[CodeView] Encode signed enumerators as signed integers (#210352)
In #210338 I noticed that enumerator constants were always encoded as
unsigned integers. MSVC (usually) uses the correct signedness
(comparison: https://godbolt.org/z/rbrchhjTT). It only uses signed
values for 64 bit unsigned values (probably a bug).
We know the signedness in `DIEnumerator` and we should use it.
The change in `llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp` was
needed, because the max/min values need all the bits to encode their
value - otherwise we hit an assertion.
This also encodes the saturated value (`INT64_MIN = 0x8000000000000000`)
in the int128 test correctly (initially added in
https://reviews.llvm.org/D105320).
Commit: 08f3f01c43819979601ebf7618b657567ed9871f
https://github.com/llvm/llvm-project/commit/08f3f01c43819979601ebf7618b657567ed9871f
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/unittests/MC/DXContainerWriterTest.cpp
Log Message:
-----------
[DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (#211227)
Building Parts from SmallString elements invalidated StringRefs on
vector reallocation, so the test was dying under MSan before the
expected fatal error.
Fixes buildbot failures
https://github.com/llvm/llvm-project/pull/204903#issuecomment-5039669504.
Commit: 12e6cd9ea166b0ed09c83aae42cb83231461f6f2
https://github.com/llvm/llvm-project/commit/12e6cd9ea166b0ed09c83aae42cb83231461f6f2
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/test/CodeGen/PowerPC/splat-after-xxsldwi.ll
Log Message:
-----------
[PPC] Constrain register in VSPLT of XXSLDWI transform (#208005)
XXSLDWI takes a vsrc register, but the VSPLT opcodes only take vrrc.
vrrc is a subset of vsrc, so fix this by constraining the register
class.
Commit: 6ac80addbe9c12dd0a110a76fa2c09eb53764e64
https://github.com/llvm/llvm-project/commit/6ac80addbe9c12dd0a110a76fa2c09eb53764e64
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/tools/lldb-dap/extension/src/debug-configuration-provider.ts
Log Message:
-----------
[lldb-dap][VSCode][Windows] check that --check-python is available before using it (#211048)
`--check-python` is only available as of lldb-dap 23. Running that check
regardless of it's availability causes the extension to fail to start if
it's not available.
Check that the flag is available first by searching for it in the
`--help`. Checking for a version number would be a cleaner approach but
I reckon it would fail for local builds.
Fixes https://github.com/llvm/llvm-project/issues/210879
Commit: 6abffd7c22f7e1c0cf07ad6763495e098f580d10
https://github.com/llvm/llvm-project/commit/6abffd7c22f7e1c0cf07ad6763495e098f580d10
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/AMDGPU/fshl-illegal-types.ll
A llvm/test/CodeGen/AMDGPU/urem-constant-i128.ll
Log Message:
-----------
[SelectionDAG] Allow constant UREM decomposition without high multiply (#210232)
`SelectionDAG` may introduce a wide constant UREM when promoting funnel
shifts on irregular integer types. On AMDGPU, an i65 `fshl` becomes an
i128 remainder by 65; the existing decomposition is rejected because i64
`MULHU` and `UMUL_LOHI` are unavailable, after which legalization
attempts the unsupported `__umodti3` libcall.
Allow the existing decomposition when the wide UREM libcall is
unavailable and half-width `UDIVREM` is legal or custom. This lets
AMDGPU finish through its custom i64 `UDIVREM` lowering while preserving
the existing libcall preference for targets with a usable wide libcall.
Fixes #197949
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Co-authored-by: Codex <noreply at openai.com>
Commit: 9d3fe6cf06f1c20a337ce546115523bf1db925de
https://github.com/llvm/llvm-project/commit/9d3fe6cf06f1c20a337ce546115523bf1db925de
Author: Stephen Long <63318318+steplong at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir
Log Message:
-----------
[mlir][sme] Add e2e test for lowering mmt4d to sme (#208226)
Lowers mmt4d to arm sme with hoisting the load/store of the accumulator
out of the K-loop. Similar to ArmSVE/pack-unpack-mmt4d.mlir with some
additional changes.
Appreciate @banach-space for helping me out with this (#201562)
Assisted-by: Claude
---------
Co-authored-by: Stephen Long <steplong at quicinc.com>
Co-authored-by: Ege Beysel <beyselege at gmail.com>
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: e757e814e30741d6eae6044cea22dca78baa4edf
https://github.com/llvm/llvm-project/commit/e757e814e30741d6eae6044cea22dca78baa4edf
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/insertelement.ll
M llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
Log Message:
-----------
[AMDGPU] Cost i1 insertelements as free (#211246)
>From the discussion in
https://github.com/llvm/llvm-project/pull/206697#discussion_r3503977327
Booleans are free to scalarize in AMDGPU, so mark insertelements into i1
vectors as free. This removes some of the AMDGPU diffs from #206697
This doesn't mark extractelements as free since that ends up flattening
the costs for `vector.reduce.or/and`.
Commit: d9cf5980b7788a8840d69c6e4abb9092a35997bc
https://github.com/llvm/llvm-project/commit/d9cf5980b7788a8840d69c6e4abb9092a35997bc
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/test/CodeGen/linking-bitcode-postopt.cpp
Log Message:
-----------
[Clang][LTO] Assign GUIDs after post-opt bitcode linking (#211155)
Run AssignGUIDPass after LinkInModulesPass so newly linked globals have
GUIDs before LTO summary emission.
Fixes LCOMPILER-2475.
Commit: 150aa53d48aa6fdde26e00ea118582eb949f0dca
https://github.com/llvm/llvm-project/commit/150aa53d48aa6fdde26e00ea118582eb949f0dca
Author: Alexander Kornienko <alexfh at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
R clang/test/CodeGenCXX/gh196469-default-member-init-lambda-cleanup.cpp
R clang/test/SemaCXX/gh196469-default-member-init-lambda-capture.cpp
M clang/test/SemaCXX/source_location.cpp
Log Message:
-----------
Revert "[Clang] Rebuild lambda captures in default member initializers while skipping body (#196597)" (#211001)
This reverts commit 50f30bedaa81919915049474f4350ef19c36b7ca. The commit
causes a crash in clang:
https://github.com/llvm/llvm-project/pull/196597#issuecomment-4997866573
Commit: 6b52427b6864cc553d9506c39b7f1bfde5f1e170
https://github.com/llvm/llvm-project/commit/6b52427b6864cc553d9506c39b7f1bfde5f1e170
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/WritingAnLLVMPass.md
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
R llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
R llvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[LLVM] Remove SVEIntrinsicOpts pass. (#210368)
Commit: fdae383abe622856b2178b1eb2d6f1c454acf176
https://github.com/llvm/llvm-project/commit/fdae383abe622856b2178b1eb2d6f1c454acf176
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
Log Message:
-----------
[SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (#210923)
Move the SLP same-opcode compatibility primitives out of
SLPVectorizer.cpp into a new private module
SLPVectorizer/SLPCompatibilityAnalysis.{h,cpp}:
* isValidForAlternation
* BinOpSameOpcodeHelper
Part of the effort to modularize SLPVectorizer.cpp. See the RFC:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 84301dd17f4261b4b8c293cd21b6641b3fdc0add
https://github.com/llvm/llvm-project/commit/84301dd17f4261b4b8c293cd21b6641b3fdc0add
Author: Thibault Monnier <thibaultmonni at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Lex/Lexer.cpp
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
[Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (#180631)
This PR reopens #175452 after it was merged then reverted by #177322
because of compilation failures and compatibility issues.
This change attempts to maximize usage of the SSE fast path in
`fastParseASCIIIdentifier`.
If the binary is compiled with SSE4.2 enabled, or if we are not
compiling for x86, then the behavior is the exact same, ensuring we have
no regressions.
Otherwise, we compile both the SSE fast path and the scalar loop. At
runtime, we check if SSE4.2 is available and dispatch to the right
function by using `__builtin_cpu_supports`. If it _is_ available, this
allows a net performance improvement. Otherwise, there's a very slight
but negligible regression... I believe that's perfectly reasonable for a
non-SSE4.2-supporting processor.
The benchmark results are available here:
https://llvm-compile-time-tracker.com/compare.php?from=3192fe2c7b08912cc72c86471a593165b615dc28&to=8960c57a2e5880616d2dd549f8422ca91c864e86&stat=instructions%3Au.
Commit: 75e637791bff7b6c0c11754fb29991b6b140ee2c
https://github.com/llvm/llvm-project/commit/75e637791bff7b6c0c11754fb29991b6b140ee2c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
Log Message:
-----------
[mlir][SPIR-V] Lower memref.copy to spirv.CopyMemory (#206016)
Commit: 3a1f2e1da409a473b4b357810c4a37fd178aa3ca
https://github.com/llvm/llvm-project/commit/3a1f2e1da409a473b4b357810c4a37fd178aa3ca
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/builtin-debugtrap/TestBuiltinDebugTrap.py
M lldb/test/API/functionalities/thread/state/TestThreadStates.py
Log Message:
-----------
[lldb][test] Skip stop-reason tests unsupported on WebAssembly (#211266)
TestThreadStates::test_process_state expects a signal stop reason after
"process interrupt", but the trap from the single step used to step off
the breakpoint is reported as a trace stop. It is already skipped on
Linux and Darwin for the same reason.
TestBuiltinDebugTrap expects to continue past __builtin_debugtrap, but
on WebAssembly that lowers to the unreachable instruction, a fatal trap
that cannot be resumed.
Commit: 8ad500f6f7d7347ca097d9c442fbf4a0f604dc26
https://github.com/llvm/llvm-project/commit/8ad500f6f7d7347ca097d9c442fbf4a0f604dc26
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Add missing checkout (#211082)
We need to checkout the upload-release-artifact composite action before
using it.
Commit: 02c51adb8ff2b2b4c1041ac9f9d260c20ef77cc4
https://github.com/llvm/llvm-project/commit/02c51adb8ff2b2b4c1041ac9f9d260c20ef77cc4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/algorithms/lexicographical_compare_three_way.bench.cpp
Log Message:
-----------
[libc++] Remove redundant benchmarks for lexicographical_compare_three_way (#210268)
We already test the `_slow_path` and `_fast_path` functions through the
generic `BM_lexicographical_compare_three_way`. We don't need to
benchmark them again.
Commit: 155689a48e43878d2252cd39037909e87b018103
https://github.com/llvm/llvm-project/commit/155689a48e43878d2252cd39037909e87b018103
Author: Vito Secona <secona00 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/control-flow-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIRV] Add SPIRVToLLVM conversion for selection with yielding values (#210600)
The current SPIRVToLLVM conversion for SelectionOp does not handle merge
blocks with yielding values. This change implements that by adding
arguments to the continue block in the SelectionPattern.
Closes #204714
Commit: c53e2a89a48b312901eb70141d5a4e99ed1c532d
https://github.com/llvm/llvm-project/commit/c53e2a89a48b312901eb70141d5a4e99ed1c532d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
[AMDGPU] Flush denormal results when constant folding amdgcn.rcp (#203566)
v_rcp_f32/f64 flush denormal results to zero per the function
denormal-output mode, but the constant fold emitted the exact
reciprocal, giving a denormal the instruction would never produce
Commit: 1654b66a6d797371564381ad4e109c994f4f764f
https://github.com/llvm/llvm-project/commit/1654b66a6d797371564381ad4e109c994f4f764f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
Log Message:
-----------
[NFC][SPIR-V] Reuse PartialOrderingVisitor across sortSelectionMerge calls (#211200)
Commit: b9e3e6546dcb4b33d023b7a336163d5650cda9d4
https://github.com/llvm/llvm-project/commit/b9e3e6546dcb4b33d023b7a336163d5650cda9d4
Author: Yuxuan Chen <ych at meta.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A clang/test/CodeGenCoroutines/gh188230-coro-await-elidable-suspend-never-final.cpp
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/test/Transforms/Coroutines/coro-split-00.ll
M llvm/test/Transforms/Coroutines/coro-split-addrspace.ll
A llvm/test/Transforms/Coroutines/coro-split-resume-fallthrough-destroy-slot.ll
Log Message:
-----------
[Clang][coro] Fix `coro.free` in `.resume` clones with `[[clang::coro_await_elidable]]` (#207799)
Fixes https://github.com/llvm/llvm-project/issues/188230
CoroAnnotationElide rewrites annotated safe calls to the `.noalloc`
variant. The noalloc frame is caller-owned, but its `.resume` clone is
shared with ordinary heap-allocated instances.
With a `suspend_never` final suspend, normal resumption falls through to
the `coro.free` deallocation path. Regular frontend cleanup has already
run before this point. `coro.free` must therefore produce the frame
pointer for a heap instance and null for a `.noalloc` instance.
Use the frame destroy slot as a per-instance allocation tag. Cache its
value at resume entry, before user code can resume and release the
enclosing caller frame, then compare it with the cleanup clone. Replace
each `coro.free` result with the frame pointer for a heap instance and
null for an elided instance.
Update the CoroSplit and Clang CodeGen checks to cover the conditional
deallocation and the original suspend_never final-suspend shape.
Assisted-By: Codex GPT 5.5
Commit: fed8a6f2e38bd82835ddb651305782db6b62f326
https://github.com/llvm/llvm-project/commit/fed8a6f2e38bd82835ddb651305782db6b62f326
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
Log Message:
-----------
[lldb-dap] Migrate DAP cancel and commands tests (#211044)
Commit: 34436db53d3e4ad36e86019109fb5ceee9bb4d8c
https://github.com/llvm/llvm-project/commit/34436db53d3e4ad36e86019109fb5ceee9bb4d8c
Author: Rahul <quic_rahulana at quicinc.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Sema/DeclSpec.cpp
M clang/test/SemaCXX/auto-cxx98.cpp
Log Message:
-----------
[clang] Emit diagnostic for typedef+auto missed case in C++98/C23 (#210141)
CheckTypeSpec() converted 'auto' to a storage-class specifier without
checking whether 'typedef' was already set. [dcl.stc]p1 unconditionally
forbids typedef alongside any storage-class specifier regardless of C++
version.
This change add the check for tydef in the code handling auto.
Commit: 2f5771c8ecc5a9edd4469e08255402436dc7dd31
https://github.com/llvm/llvm-project/commit/2f5771c8ecc5a9edd4469e08255402436dc7dd31
Author: Spencer Bryngelson <shb at gatech.edu>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M openmp/CMakeLists.txt
M openmp/module/CMakeLists.txt
Log Message:
-----------
[openmp][cmake] Match GPU triples consistently in openmp/module (#211138)
Fixes #211135.
`openmp/module/CMakeLists.txt:29` gates the GPU-only Fortran compile
options on `"^amdgcn|^nvptx"`, while `openmp/CMakeLists.txt:176-177`
selects host-vs-device layout for the same build using
`"^amdgpu|^amdgcn|^nvptx|^spirv64"` against both
`LLVM_DEFAULT_TARGET_TRIPLE` and `CMAKE_CXX_COMPILER_TARGET`.
All four offload cache files use the triple `amdgpu-amd-amdhsa`, which
`^amdgcn` does not match, so `-nogpulib -flto` are silently not applied
to `libomp-mod` in the recommended AMDGPU offload configurations.
Compute the test once as `LIBOMP_TARGET_IS_GPU` in
`openmp/CMakeLists.txt` and use it at both sites, rather than
duplicating a widened regex. The conditions differ, not just the
patterns: copying the regex alone would leave a build that sets
`CMAKE_CXX_COMPILER_TARGET` without `LLVM_DEFAULT_TARGET_TRIPLE` still
taking the device path in `openmp/` while `libomp-mod` misses the flags.
`libomp-mod` compiles Fortran, so `CMAKE_Fortran_COMPILER_TARGET` is
also consulted; neither site did before.
Evaluated with CMake's regex engine:
| triple | before | after |
|---|---|---|
| `amdgpu-amd-amdhsa` | 0 | 1 |
| `amdgcn-amd-amdhsa` | 1 | 1 |
| `nvptx64-nvidia-cuda` | 1 | 1 |
| `spirv64-amd-amdhsa` | 0 | 1 |
| `x86_64-unknown-linux-gnu` | 0 | 0 |
`^spirv64` only brings `module/` in line with
`openmp/CMakeLists.txt:176`, which already routes spirv64 to `device/`.
Host builds are unaffected.
Roughly five other sites carry the same `amdgcn`-only pattern
(`offload/CMakeLists.txt:30`, `flang-rt/CMakeLists.txt:126`,
`flang-rt/lib/runtime/CMakeLists.txt:317`,
`flang-rt/cmake/modules/AddFlangRT.cmake:298`,
`cmake/Modules/GetToolchainDirs.cmake:118`) and are left for a
follow-up.
No test: configure-time logic, no test mechanism exists in `openmp/`.
This affects performance-critical applications on large AMD GPU
supercomputers, including [MFC](https://github.com/MFlowCode/MFC).
All numbers above come from the validated reproducers included with this
report and are independently reproducible; they stand on their own.
This was found and root-caused with the assistance of AI tools.
Commit: 958f9ff83ea9aa071df1c84c6a467b17d6b8dadf
https://github.com/llvm/llvm-project/commit/958f9ff83ea9aa071df1c84c6a467b17d6b8dadf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/fma-fmuladd-mix.ll
Log Message:
-----------
[SLP][NFC]Add a test for mixed fma/fmuladd scalars, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211280
Commit: 77981e39b5fa26ab43a3a3611fbb247321e33d78
https://github.com/llvm/llvm-project/commit/77981e39b5fa26ab43a3a3611fbb247321e33d78
Author: Trung Nguyen <git at trungnt2910.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrInfo.td
A llvm/test/CodeGen/ARM/Windows/chkstk-cpsr-clobber.ll
Log Message:
-----------
[ARM] Fix chkstk definition (#210940)
Commit: 15e5b04009155408b559cda5272dc95ac979ea85
https://github.com/llvm/llvm-project/commit/15e5b04009155408b559cda5272dc95ac979ea85
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/RDFGraph.h
M llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
M llvm/test/CodeGen/Hexagon/autohvx/xqf-postra-subreg2.ll
M llvm/test/CodeGen/Hexagon/autohvx/xqf-postra-subreg3.ll
Log Message:
-----------
[Hexagon] Drop NodeAddr::operator<, fix bad asserts directives (#210192)
Removed NodeAddr::operator< that was added by mistake in #207082.
Nothing needed it once HexagonPostRAHandleQFP.cpp's containers went back
to keying on NodeId.
Also removed the contradictory UNSUPPORTED+REQUIRES asserts in two
tests; subreg2 still crashes so it's XFAIL'd for now.
Commit: 930cd75aa341776565af08cc098c9270e9a16623
https://github.com/llvm/llvm-project/commit/930cd75aa341776565af08cc098c9270e9a16623
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][OpenACC] Support static multi-rank OpenACC array reduction accumulators (#210853)
Example:
```fortran
!$acc parallel loop reduction(+:a)
do i = 1, n
a(i,:) = a(i,:) + input(i,:)
end do
```
In this code, the reduction accumulator can have rank greater than one,
but GPU lowering assumes rank one.
Fix: initialize rank-N accumulators with nested loops and delinearize
flattened indices before loading, reducing, and storing each element.
Commit: da26ba882abda45fa8e4799470730ceb0cbfd5a8
https://github.com/llvm/llvm-project/commit/da26ba882abda45fa8e4799470730ceb0cbfd5a8
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSBundle.py
Log Message:
-----------
[LLDB] Disable Foundation test on newer versions of macOS (#211127)
On macOS >= 27 Foundation caches the path of a URL-initialized
NSBundle as a native Swift String. We cannot format that without the
Swift language plugin.
Add a requiresSwiftPlugin() decorator in decorators.py and use it for
the NSBundle formatter test. It expects failure only when LLDB lacks the
Swift plugin, and only on Apple targets at or after a given OS version
(checked against the target platform, so it is correct for
iOS/tvOS/watchOS/visionOS as well as macOS). Builds with the plugin are
expected to pass.
Assisted-by: claude
Commit: 9ca28bddf624eefd9ebd29a5296b4c6d979d88bb
https://github.com/llvm/llvm-project/commit/9ca28bddf624eefd9ebd29a5296b4c6d979d88bb
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h
A llvm/test/ExecutionEngine/RuntimeDyld/X86/COFF_x86_64_SECREL.s
Log Message:
-----------
[RuntimeDyld][COFF] Apply addend for IMAGE_REL_AMD64_SECREL (#211015)
`IMAGE_REL_AMD64_SECREL` currently falls through the default case. Its
`Addend` is built using the target symbol's section offset. This is
incorrect: for a SECREL against a section symbol (offset 0), the real
value is stored as the addend in the relocated field. This results in
the SECREL writer always writing 0, which is wrong.
This patch reads the 4-byte field addend for SECREL, as `REL32` and
`ADDR64` already do. It also adds a test which fails without this.
Source: https://learn.microsoft.com/en-us/windows/win32/debug/pe-format
Commit: 0769e6d05a0fa7bc8e9b1a453ec4dc62ce5bd8f4
https://github.com/llvm/llvm-project/commit/0769e6d05a0fa7bc8e9b1a453ec4dc62ce5bd8f4
Author: Scott Todd <scott.todd0 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/tools/offload-arch/AMDGPUArchByHIP.cpp
Log Message:
-----------
[offload-arch] Fix amdgpu HIP DLL search path on Windows (#209898)
## Motivation
This follows up on https://github.com/llvm/llvm-project/pull/194063 to
fix https://github.com/ROCm/TheRock/issues/6571, where `offload-arch`
distributed as part of ROCm has been failing with:
```diff
D:\projects\TheRock (main -> upstream)
λ .\build\dist\rocm\lib\llvm\bin\offload-arch.exe --verbose
Found HIP runtime: D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll
-note: priming LoadLibraryExW failed for D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll (error 126)
Failed to load D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll: D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll: Can't open: The specified module could not be found. (0x7E)
Failed to 'dlopen' libcuda.so.1
Unable to load library 'libze_loader.so': libze_loader.so: Can't open: The specified module could not be found. (0x7E)
```
## Fix details
The relevant code path in offload-arch is this:
```c++
int printGPUsByHIP() {
auto [DynamicHIPPath, IsFallback] = findNewestHIPDLL();
// Prime DLL load so transitive deps resolve from its directory.
primeLibraryLoad(DynamicHIPPath);
// ... then load the library and use it
```
Here's where the relevant files are located on disk in both build and
package directories:
```
rocm/
bin/
amdhip64_7.dll
rocm_kpack.dll (amdhip64_7.dll newly depends on this!)
lib/
llvm/
bin/
offload-arch.exe
```
The documentation for the
[`LoadLibraryExW`](https://learn.microsoft.com/en-us/windows/win32/api/libloaderapi/nf-libloaderapi-loadlibraryexw)
API that this code was calling says:
> If the string specifies a fully qualified path, the function searches
only that path for the module. When specifying a path, be sure to use
backslashes (`\`), not forward slashes (`/`). For more information about
paths, see [Naming Files, Paths, and
Namespaces](https://learn.microsoft.com/en-us/windows/desktop/FileIO/naming-a-file).
the `primeLibraryLoad()` function has been receiving a path with forward
slashes in it though, leading to the `error 126`.
## Testing performed
* Built `offload-arch` with and without this fix and ran it locally on
Windows
* Added new unit tests asserting that `LoadLibraryExW` is called with
backslashes and not forward slashes (we could add more "real" tests that
actually exercise library loading but I'm not sure if LLVM unit tests
are the right spot for that)
* Ran a "real" test that uses `offload-arch` to list GPUs, compile some
code, and run a printf function over in TheRock:
https://github.com/ROCm/TheRock/blob/a20ab791d74c94354704b791a85343babb83409b/tests/test_rocm_sanity.py#L85-L154
(this test was disabled back in
https://github.com/ROCm/TheRock/pull/5346 due to suspected machine
issues, now we'll be able to re-enable it)
Commit: 8aa808457c6aeba25ec0e17139c3fcab59923c3c
https://github.com/llvm/llvm-project/commit/8aa808457c6aeba25ec0e17139c3fcab59923c3c
Author: Xing Xue <xingxue at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind][AIX] Handle VAPI-based return addresses in stack unwinding for LLU (#209280)
In AIX's implementation of LLU (Live Library Update), the caller of a
Virtual API (VAPI) interface instead calls VAPI glue and the
implementation for a VAPI function is entered from the VAPI glue. If a
VAPI is not already active on the thread, the VAPI calls the
implementation of the VAPI function with the link register (LR) value
set to a return address in the VAPI glue. In this case, the LR (return
address) value on entry to the VAPI glue is saved in the VAPI control
block. This PR checks whether the return address in a stack frame falls
within the VAPI address range. If it does, the unwinder retrieves the LR
value from the VAPI control block and uses it as the return address
during stack unwinding. In addition, before transferring control to a
landing pad, this PR executes the VAPI return glue to clear the VAPI
control block if the VAPI glue was used.
---------
Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
Commit: eec8ff8aee140d9098480ec98c421f43557e1623
https://github.com/llvm/llvm-project/commit/eec8ff8aee140d9098480ec98c421f43557e1623
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
Log Message:
-----------
[gn build] Port c2a39ea72dc1 (#211292)
Commit: aee6075b75f6d26684215f7353270a3e701d5288
https://github.com/llvm/llvm-project/commit/aee6075b75f6d26684215f7353270a3e701d5288
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port fdae383abe62 (#211293)
Commit: 06a6c5eed88dd449576ad001a7d7cd6536b20b10
https://github.com/llvm/llvm-project/commit/06a6c5eed88dd449576ad001a7d7cd6536b20b10
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
Log Message:
-----------
[gn] port acb8fbe83ff12 more (#211295)
Commit: 6f3328e869b4d3f11d1b37808fbffab6d822d9aa
https://github.com/llvm/llvm-project/commit/6f3328e869b4d3f11d1b37808fbffab6d822d9aa
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/include/__configuration/namespace.h
Log Message:
-----------
[libc++] Don't add #pragma clang attribute with GCC (#206989)
GCC doesn't support `#pragma clang attribute`, which causes a bunch of
diagnostics. Since we have it behind a macro anyways we can simply
define the macro as empty with GCC.
Commit: 0590a36b312b950cb16dadfe349d07e73be1809a
https://github.com/llvm/llvm-project/commit/0590a36b312b950cb16dadfe349d07e73be1809a
Author: adams381 <adams at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
Log Message:
-----------
[CIR] Convert byval/sret/byref arg-attr types when lowering to LLVM (#210764)
The CallConvLowering pass lowers an indirectly-passed aggregate to a pointer argument and records the pointee record type on the `llvm.byval`, `llvm.sret`, or `llvm.byref` argument attribute. That type payload is still a CIR record after the pass runs, so once the module reaches the LLVM dialect and is translated to LLVM IR, the translation hits a CIR type inside the attribute and fails.
LowerToLLVM already routes every operand and result type through the type converter. It now does the same for the type carried by those three argument attributes, in the attribute lowering shared by the function definition and by the call and invoke sites. With the conversion in place, a byval or sret parameter translates to `byval(%struct.X)` / `sret(%struct.X)` carrying the lowered LLVM struct type, and byref does the same. CallConvLowering does not classify `cir.try_call` yet, so no invoke carries these attributes today, but the shared path already covers the invoke once it is classified.
The test injects the three attributes directly, lowers to the LLVM dialect, and translates to LLVM IR, checking the emitted attributes carry the LLVM struct type. It uses no aggregate classifier, so it stands alone from the x86_64 classifier stack.
Commit: 3486c5d48a78f5e132d05245f775fc6e27bdcaee
https://github.com/llvm/llvm-project/commit/3486c5d48a78f5e132d05245f775fc6e27bdcaee
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/HLFIR/HLFIRDialect.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIRDialect.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
A flang/test/HLFIR/bufferize-conditional.fir
M flang/test/HLFIR/invalid.fir
M flang/test/Lower/HLFIR/conditional-expr.f90
Log Message:
-----------
[flang] Region-based HLFIR operation for conditional expressions lowering (#194411)
Implements `hlfir.conditional`, a region-based HLFIR operation that
represents Fortran 2023 conditional expressions (10.1.2.3) with lazy
branch evaluation.
Issue #176999
Assisted-by: Claude Sonnet 4.5
Commit: e2052579d43e2813d2e3429a9aa092023cbf0c5f
https://github.com/llvm/llvm-project/commit/e2052579d43e2813d2e3429a9aa092023cbf0c5f
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
Log Message:
-----------
[MLIR][Python] Remove stale Python module naming status message (#211243)
`PYTHON_MODULE_PREFIX`, `PYTHON_MODULE_SUFFIX`, and
`PYTHON_MODULE_EXTENSION` are remnants of the previous pybind11-based
Python discovery path and are no longer populated or used by the
nanobind build.
The relevant Python SOABI is already reported through `Python3_SOABI`,
so we can remove the redundant status message, which currently prints
only empty values.
Commit: 5e860ee7025db82c1921c9e149cc8a6a68cb9909
https://github.com/llvm/llvm-project/commit/5e860ee7025db82c1921c9e149cc8a6a68cb9909
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
M llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog.ll
Log Message:
-----------
[AArch64] Set NoPHIs for outlined functions (#209852)
Commit: e0ec5391088426b55a5fe61137e1b76dd92e8c5e
https://github.com/llvm/llvm-project/commit/e0ec5391088426b55a5fe61137e1b76dd92e8c5e
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
Log Message:
-----------
[MLIR][Python] Remove stale NumPy detection message (#211235)
NumPy stopped being requested as a CMake Python component when its
unused build-time dependency was removed in #108465 . Remove the
remaining status message, which now prints empty version and include
directory values.
Commit: 22351c74e21ff19633cc101c6d92c7c179e5a4a3
https://github.com/llvm/llvm-project/commit/22351c74e21ff19633cc101c6d92c7c179e5a4a3
Author: Sunil Shrestha <sunil.shrestha at hpe.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
R flang/test/Lower/OpenMP/Todo/interop-construct.f90
A flang/test/Lower/OpenMP/Todo/interop-prefer-type-selector-list.f90
A flang/test/Lower/OpenMP/Todo/interop-prefer-type-unknown-fr.f90
A flang/test/Lower/OpenMP/interop.f90
A flang/test/Semantics/OpenMP/interop-construct-v60.f90
A flang/test/Semantics/OpenMP/interop-prefer-type.f90
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPAttrDefs.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/openmp-interop-depend.mlir
A mlir/test/Target/LLVMIR/openmp-interop.mlir
M openmp/module/omp_lib.F90.var
M openmp/module/omp_lib.h.var
Log Message:
-----------
[Flang][OpenMP] Add support for interop construct (#203959)
This adds support for the OpenMP interop construct, which enables
interoperability with foreign runtime environments (e.g., CUDA, HIP).
The init, use, and destroy action clauses are lowered from the Fortran
parse tree to MLIR interop ops and translated to the appropriate runtime
calls. The omp_lib module is extended with interop query API interfaces,
property constants, and return code constants. A semantics fix relaxes
the depend/targetsync constraint for use/destroy directives where the
interop type was established at a separate init site. Unsupported depend
clauses and prefer_type selector-list forms emit explicit diagnostics
instead of being silently dropped.
Assisted-by: Claude Opus 4.6
Commit: 65c377bfc5c297cc9477369407790282abb5db51
https://github.com/llvm/llvm-project/commit/65c377bfc5c297cc9477369407790282abb5db51
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/SourceMgr.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Support/SourceMgr.cpp
A llvm/test/MC/AsmParser/macro-like-diagnostic.s
A llvm/test/tools/llvm-ml/macro_diagnostic.asm
Log Message:
-----------
[MC][NFC] Share some code between MasmParser and AsmParser
Factor out printIncludeStackForDiagnostic() to SourceMgr in preparation
for a follow-up commit that changes the output here. This avoids needing
to update both of them. Also add two more tests for the current output.
Pull Request: https://github.com/llvm/llvm-project/pull/210731
Commit: 4e0a25590ef9770f6dcee407a92980b3489b414e
https://github.com/llvm/llvm-project/commit/4e0a25590ef9770f6dcee407a92980b3489b414e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/modules/CrossCompile.cmake
M llvm/runtimes/CMakeLists.txt
M offload/CMakeLists.txt
M offload/test/lit.cfg
M offload/test/lit.site.cfg.in
Log Message:
-----------
[LLVM] Remove 'LLVM_LIBC_GPU_BUILD' logic (#211265)
Summary:
This is a holdover from how we used to handle this stuff. We should just
dirctly check the triple for setting the cross-compiling emulator and we
can directly introspect into the build tree for the lit config like we
already do for flang-rt.
Commit: f38a23b66886cdcc79d986339687a9fb84003314
https://github.com/llvm/llvm-project/commit/f38a23b66886cdcc79d986339687a9fb84003314
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
Exclude another coro test from profcheck (#211296)
Coro aren't yet fixed for profcheck.
(related: #207799)
Commit: 2a874aa79690f4dda574d06aa31c16602eec422d
https://github.com/llvm/llvm-project/commit/2a874aa79690f4dda574d06aa31c16602eec422d
Author: theSK2005 <73001618+theSK2005 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Move SGPR Count Queries into TargetParser (#209848)
Relocated SGPR queries from AMDGPU backend into the public TargetParser.
Part of resolving a comgr issue
(https://github.com/ROCm/llvm-project/issues/3298) to reduce
comgr-isa-metadata.def duplication.
Assisted by: Claude Code
Commit: 9d2000c24d7b5b1072e15bb083d2b76328b54763
https://github.com/llvm/llvm-project/commit/9d2000c24d7b5b1072e15bb083d2b76328b54763
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/TestWasHit.py
M lldb/test/API/functionalities/memory/find/TestMemoryFind.py
M lldb/test/API/lang/cpp/global_operators/TestCppGlobalOperators.py
M lldb/test/API/lang/cpp/static_members/TestCPPStaticMembers.py
M lldb/test/API/python_api/exprpath_register/TestExprPathRegisters.py
M lldb/test/API/python_api/process/address-masks/TestAddressMasks.py
M lldb/test/API/python_api/process/read-mem-cstring/TestReadMemCString.py
Log Message:
-----------
[lldb][test] Skip more WebAssembly-unsupported API tests (#211305)
Skip tests that exercise features WebAssembly does not provide:
expression evaluation, registers, an ABI plugin, and unmapped memory
pages.
Commit: 9286c58841cb1dbebe92873afafe745d4c58868b
https://github.com/llvm/llvm-project/commit/9286c58841cb1dbebe92873afafe745d4c58868b
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/ArraySectionAnalyzer.cpp
M flang/lib/Optimizer/Builder/Character.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
Log Message:
-----------
[Flang] Return APInt from getIntIfConstant (#211233)
Preserve the full bit width of integer attributes when extracting
constants from FIR values. Return llvm::APInt directly and update
fixed-width consumers to use checked signed extraction.
This avoids truncating or asserting on constants wider than 64 bits
while retaining existing fallback behavior at int64_t boundaries.
This should be NFC everywhere we didn't have a latent overflow bug. I
didn't go so far as updating the interfaces of every function built on
top of getIntIfConstant: this is mostly to make an APInt version
available because it looks useful for another PR. Fixing the builder API
to use APInt would be a larger change - let me know if anyone wants to
see that.
Assisted-by: Codex
Commit: c416cc1b3af401ebb9cc2abfc502ef84edc2297c
https://github.com/llvm/llvm-project/commit/c416cc1b3af401ebb9cc2abfc502ef84edc2297c
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocDelay.cpp
M flang/test/Transforms/CUF/cuf-alloc-delay.fir
Log Message:
-----------
[flang][cuda] Fix cuf-alloc-delay for host-associated allocatables (#211103)
`cuf-alloc-delay` sinks a managed descriptor's `cuf.alloc` group
(`{cuf.alloc, fir.store, fir.declare}`) to just before its first use, to
defer the managed allocation. It special-cased the store of the descriptor
into a host-association tuple slot (`fir.store` to a `fir.llvm_ptr`): it did
not count that store (nor the call that consumes the tuple) as a use, and moved
the store along with the group. As a result, when a managed allocatable descriptor
is stored into a host-association tuple and passed to an internal procedure, the group
could be sunk **past** the internal-procedure call that reads the tuple, so the
callee observed an uninitialized descriptor. On more complex tuples, moving the
host-association store also broke SSA dominance, producing
`operand #1 does not dominate this use`.
With this PR, `findDelayTarget` now treats **every** use of the
descriptor as a real use, including the host-association store. The group is only ever sunk to
*before* the first use, and the host-association store is never moved (it reads
its own `fir.coordinate_of` slot). This keeps the descriptor initialized before
the tuple is consumed and is dominance-safe by construction.
Commit: 743f03189fa76a5daf8211f00f98e81f18e6ecfb
https://github.com/llvm/llvm-project/commit/743f03189fa76a5daf8211f00f98e81f18e6ecfb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libcxx/docs/conf.py
M libcxxabi/include/cxxabi.h
M libunwind/include/__libunwind_config.h
Log Message:
-----------
[runtimes] LLVM 24 version bumps (#211262)
This patch bumps the version of libc++abi and libunwind, and libc++ in
the documentation.
Commit: 0cd942fa1b6de94fd6d7fa7ba73f0233293115f8
https://github.com/llvm/llvm-project/commit/0cd942fa1b6de94fd6d7fa7ba73f0233293115f8
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/test/API/functionalities/data-formatter/builtin-formats/TestBuiltinFormats.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
M lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
M lldb/unittests/Core/DumpDataExtractorTest.cpp
Log Message:
-----------
[lldb] Fix Unicode code point formatting to use proper notation (#211131)
- use uppercase hex digits
- only emit "U+" notation for valid code points (<= U+10FFFF),
zero-padded to a minimum of four digits.
rdar://173817553
Assisted-by: claude
Commit: badd93d5dfac6eb92e9e99220be09dfdca65c9e9
https://github.com/llvm/llvm-project/commit/badd93d5dfac6eb92e9e99220be09dfdca65c9e9
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
Log Message:
-----------
[CIR][NFC] Remove unreachable code and add missing NYIs (#211084)
Remove unreachable code and add missing NYIs for Matrix row and elt
Commit: 85fa1af9c39e3af2d53093ba441d3a1ebb99a9d5
https://github.com/llvm/llvm-project/commit/85fa1af9c39e3af2d53093ba441d3a1ebb99a9d5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
Log Message:
-----------
[SLP] Vectorize select-addressed loads as masked-load blends
Recognize loads whose address is chosen per lane via
select(cond, A, B) and vectorize them as two masked loads blended
by a select, instead of gathering.
Fixes case 6 from #206367
Reviewers: hiraditya, RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/210455
Commit: 861efe03d96d93cd7e475d15bbc676f6d521f4fd
https://github.com/llvm/llvm-project/commit/861efe03d96d93cd7e475d15bbc676f6d521f4fd
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libunwind/test/CMakeLists.txt
A libunwind/test/aix_vapi_unw_resume.pass.cpp
M libunwind/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
[libunwind][test][AIX] Add C API test for unwinding from AIX VAPI (non-signal-handler case) (#209306)
Test detection, during stepping, of the backchain mutation introduced by
a VAPI call (see https://github.com/llvm/llvm-project/pull/209280).
Further, test resumption of contexts using cursors obtained while a VAPI
is active on the thread.
Testing is done via FileCheck inspection of trace output enabled by
`LIBUNWIND_PRINT_UNWINDING=1`. When Live Library Update is not enabled,
synthetic trace output is generated by the test program itself.
---------
Assisted-by: IBM Bob
Commit: 95ffe166e19a5aaffa583fe5944fa0e9103d5dda
https://github.com/llvm/llvm-project/commit/95ffe166e19a5aaffa583fe5944fa0e9103d5dda
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
Log Message:
-----------
[AMDGPU] Support i16 element types for tbuffer D16 load/store (#201420)
Detect D16 by element bit width rather than matching f16 specifically,
so integer i16 elements take the same packed/unpacked path
Commit: f266ca172cf30187791f541b56af441c2bb26777
https://github.com/llvm/llvm-project/commit/f266ca172cf30187791f541b56af441c2bb26777
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A llvm/docs/DirectX/SemanticSignatures.md
M llvm/docs/DirectXUsage.rst
Log Message:
-----------
[HLSL][Docs] Add metadata description of semantic signatures (#206804)
Adds docs of semantic signatures from the proposal.
Resolves https://github.com/llvm/llvm-project/issues/204877
Commit: dbaabbc920fcd60aeed5109c3c6353830e7605c5
https://github.com/llvm/llvm-project/commit/dbaabbc920fcd60aeed5109c3c6353830e7605c5
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A libunwind/test/aix_vapi_signal_unwind.pass.cpp
Log Message:
-----------
[libunwind][test][AIX] Add C API test for unwinding from AIX VAPI (as signal handler) (#209662)
Further to https://github.com/llvm/llvm-project/pull/209306, test a case
where a signal handler is a Virtual API function triggered synchronously
while the VAPI is not active. Resuming an ancestor context of the signal
frame should call the VAPI return glue.
---------
Assisted-by: IBM Bob
Commit: 045c8987eceb67c80a0423fc62dce9acc75f6cb0
https://github.com/llvm/llvm-project/commit/045c8987eceb67c80a0423fc62dce9acc75f6cb0
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
R libcxx/test/std/ranges/range.adaptors/range.transform/iterator/sentinel.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.transform/sentinel/sentinel.pass.cpp
Log Message:
-----------
[libc++][NFC] Format and move `transform_view`'s `sentinel.pass.cpp` (#211252)
As a pre-requisite to: https://github.com/llvm/llvm-project/pull/193891
Commit: 58d2ec68ca7752c10035bc3394bc18e8d678efd8
https://github.com/llvm/llvm-project/commit/58d2ec68ca7752c10035bc3394bc18e8d678efd8
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/include/mlir-c/Rewrite.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/test/CAPI/rewrite.c
Log Message:
-----------
[mlir-c] Add TypeConverter materialization; use a status enum for the type conversion callback (#208934)
Continues the buildout of the dialect-conversion C bindings (follows
#206146 and #206161).
- Exposes `TypeConverter::addSourceMaterialization` and
`addTargetMaterialization` through the MLIR C API.
- Introduces `MlirTypeConverterConversionStatus`
(`Success`/`Failure`/`Declined`) and switches
`MlirTypeConverterConversionCallback` to return it, replacing the old
`MlirLogicalResult` + `MlirType{NULL}` dual sentinel. The old convention
could not distinguish the C++ decline (`std::nullopt`, try the next
conversion) and hard-failure (`failure()`, stop) states; the enum maps
cleanly to all three. The Python binding and C API test are updated
accordingly.
Assisted by: Claude
Commit: e19eb38d6f9eb78113c44783ed69e1ae6639783e
https://github.com/llvm/llvm-project/commit/e19eb38d6f9eb78113c44783ed69e1ae6639783e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
Log Message:
-----------
RuntimeLibcalls: Drop artificial __aeabi_?cmpeq suffixes (#211251)
Avoid defining synthetic LibcallImpls just to match the use
case of the legalizer. __aeabi_?cmpeq returns a boolean for
ordered-equal and was defined twice with __oeq/__une enum
suffixes so the one symbol could serve both OEQ and UNE.
Replace each pair with a single unsuffixed impl providing only
OEQ. The legalizer can directly invert it without the dummy entry.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 7f1aca578c26409aa831049611ef66ff344515cd
https://github.com/llvm/llvm-project/commit/7f1aca578c26409aa831049611ef66ff344515cd
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/test/Bitcode/DIGlobalVariableExpression.ll
M llvm/test/Bitcode/DIGlobalVariableExpression2.ll
Log Message:
-----------
[DebugInfo] Avoid duplicate DIGlobalVariableExpression during upgrade (#190616)
During bitcode upgrades, if an old DIGlobalVariable is encountered that
contained a DIExpression, a DIGlobalVariableExpression is created for
it. This could happen multiple times. As described in
https://reviews.llvm.org/D26769, it is valid for a DIGlobalVariable to
have multiple DIGlobalVariableExpressions, but the use case for this is
a location that cannot be represented in a single DIExpression, not a
redundant restatement of the same DIExpression.
Commit: 9659d3a8aef9b610eaf496201a5fb9c904d701fa
https://github.com/llvm/llvm-project/commit/9659d3a8aef9b610eaf496201a5fb9c904d701fa
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir
Log Message:
-----------
[mlir][OpenACC] Forward dynamic boxed reduction extents (#211318)
Example:
```fortran
subroutine reduce(a, x, n)
integer :: n, i
real :: a(:), x(:)
!$acc parallel loop reduction(+:a)
do i = 1, n
a(:) = a(:) + x(i)
end do
end subroutine
```
`ACCCGToGPU` represents each gang/thread-private array as a dynamically
offset `memref.subview`. Converting this subview directly to a FIR
pointer-like type loses the memref offset, causing different private
copies to alias the same storage.
Fix: extract the selected subview’s element offset, convert it to bytes,
and create a zero-offset view at that address before converting to the
FIR pointer-like type. This preserves the selected gang/thread-private
slice.
Before:
```mlir
%subview = memref.subview %view[%block_id, 0] [1, %extent] [1, 1]
: memref<?x?xf64> to memref<?xf64, strided<[1], offset: ?>>
%result = fir.convert %subview
: (memref<?xf64, strided<[1], offset: ?>>) ->
!fir.heap<!fir.array<?xf64>>
```
After:
```mlir
%subview = memref.subview %view[%block_id, 0] [1, %extent] [1, 1]
: memref<?x?xf64> to memref<?xf64, strided<[1], offset: ?>>
%base, %offset, %sizes, %strides =
memref.extract_strided_metadata %subview
: memref<?xf64, strided<[1], offset: ?>> ->
memref<f64>, index, index, index
%c8 = arith.constant 8 : index
%byte_offset = arith.muli %offset, %c8 : index
%private_view = memref.view %buffer[%byte_offset][%extent]
: memref<?xi8> to memref<?xf64>
%result = fir.convert %private_view
: (memref<?xf64>) -> !fir.heap<!fir.array<?xf64>>
```
Commit: 30878c15a6116712db726bf4906620fd8ee571d4
https://github.com/llvm/llvm-project/commit/30878c15a6116712db726bf4906620fd8ee571d4
Author: David Young <davidayoung at meta.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Add os select for plugin process on Initialization target to add windows (#211276)
Another small piece of windows build support for LLDB in bazel.
Internally at Meta, our buck2 rule for this has a split for mac/linux
with PluginProcessPOSIX and windows with PluginProcessWindowsCommon. So
this should be a no-op for existing linux & mac builds while setting up
a bit more for windows.
I have no bazel build set up locally, so will wait on CI to confirm no
regression.
bazel rule creation assisted with claude
Commit: 9b0e63af7c1026d7f4a1550753b7e1294af46d29
https://github.com/llvm/llvm-project/commit/9b0e63af7c1026d7f4a1550753b7e1294af46d29
Author: adams381 <adams at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
Log Message:
-----------
[CIR] Rewire byref args to the incoming pointer (#210836)
The CallConvLowering body rewrite for Indirect arguments treats byval
and
byref the same way: it inserts a cir.load at function entry and reroutes
body
uses to the loaded value. For byref — a non-trivially-copyable type
passed by
pointer — that entry load is a byte-copy, so the callee works on a local
copy
instead of the caller's storage. That breaks types whose representation
embeds
self-referential pointers: libstdc++'s SSO std::string keeps _M_p
pointing at
its own _M_local_buf, and a byte-copy leaves the copy's _M_p aliasing
the
source's buffer.
This mirrors the sret return fix in insertSRetStores. For byref only,
rewire
the CIRGen param-slot alloca to the incoming pointer and drop the spill
store,
so the body operates on the caller's storage in place. byval keeps the
load-at-entry copy, which is correct there.
The rewrite is exercised through the classification-injection driver in
clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir, covering a
byref
field access on the incoming pointer and a byval control case that
retains the
copy. The call site still copies a value operand into a fresh alloca
before
passing it by reference; forwarding existing storage in place is left
for a
follow-up.
Commit: 54a0f730d9f8df4e7f5e4bfd4c03acbc182eb3cf
https://github.com/llvm/llvm-project/commit/54a0f730d9f8df4e7f5e4bfd4c03acbc182eb3cf
Author: David Green <david.green at arm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Processors.td
A llvm/test/tools/llvm-mca/AArch64/Cortex/A76-basic-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/A78-basic-instructions.s
Log Message:
-----------
[AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (#211209)
We do not have native scheduling models for some of the Cortex-A
generations of CPUs, so they were still using the old Cortex-A57 model.
Whilst not perfectly accurate, the NeoverseN1 and NoeverseN2 scheduling
models should be a better fit for these CPUs. I mostly just tried to
make sure the number of pipelines matches between the neoverse core and
the cortex core. If we need something more accurate then we can start
adding new models for the CPUs.
Commit: 7d39826fbe9e1b248fcdb0bdd68626b3deb88d1e
https://github.com/llvm/llvm-project/commit/7d39826fbe9e1b248fcdb0bdd68626b3deb88d1e
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Fix indentation (#211319)
Introduced by 8ad500f6f7d7347ca097d9c442fbf4a0f604dc26.
Commit: e00944c8d800c3ebc78d22a04ed7c3ce0bf162a1
https://github.com/llvm/llvm-project/commit/e00944c8d800c3ebc78d22a04ed7c3ce0bf162a1
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/EHScopeStack.h
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/CodeGen/loop-cond-var-cleanup.cpp
Log Message:
-----------
[CIR] Generate cleanup region for loops when needed (#211158)
This adds support for generating a cleanup region in loops that declare
destructed variables in the loop condition. These variables need to be
destructed on a per-iteration basis, so it's not possible to have a
cleanup scope that properly encloses the variable without losing the
loop structure elements in the initial CIR representation.
The CFG flatteneing of these loops was added in a previous PR, and the
lowering to LLVM IR follows directly from the flattened form.
Assisted-by: Cursor / various models
Commit: 0e9b8c3dfa73fc3d5d0a87241b4d979f9115cf38
https://github.com/llvm/llvm-project/commit/0e9b8c3dfa73fc3d5d0a87241b4d979f9115cf38
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/Attr.td
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/ParserHLSL/hlsl_is_ms_attr.hlsl
A clang/test/ParserHLSL/hlsl_is_ms_attr_error.hlsl
Log Message:
-----------
[HLSL] Add IsMultiSampled HLSL resource attribute (#211125)
This PR completes the frontend work for adding the IsMultiSampled HLSL
resource attribute (addressing
https://github.com/llvm/llvm-project/issues/194933)
The DirectX and SPIR-V backend work will be completed alongside the
implementation Texture2DMS
(https://github.com/llvm/llvm-project/issues/194955) so that the
functionality can be exercised.
Assisted by: Claude Opus 4.8
Commit: e1af868257eb4a49db9149cc239ca9b9338d6419
https://github.com/llvm/llvm-project/commit/e1af868257eb4a49db9149cc239ca9b9338d6419
Author: jimingham <jingham at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/include/lldb/Expression/ExpressionVariable.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Expression/ExpressionVariable.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionVariable.cpp
M lldb/source/Target/ABI.cpp
R lldb/test/API/functionalities/expr-result-var/Makefile
R lldb/test/API/functionalities/expr-result-var/TestCPPExprResult.py
R lldb/test/API/functionalities/expr-result-var/two-bases.cpp
Log Message:
-----------
Revert "Make result variables obey their dynamic values in subsequent expressions" (#211321)
This reverts commit 8b9cce358bef26ae4cb9275dd6a43f903bafbaa0.
This causes failures running expressions that return ObjC types on
x86-64 macOS but not on arm64 macOS.
Reverting till I can figure out why that's happening.
Commit: 50563d22356cd68f5d134027ff594308d273f4be
https://github.com/llvm/llvm-project/commit/50563d22356cd68f5d134027ff594308d273f4be
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-07-15.md
Log Message:
-----------
[flang] Add Flang Call Notes for 7/15/26 meeting (#211284)
Commit: 4e833e21cce5966ff9617f048ad40226ed60ca70
https://github.com/llvm/llvm-project/commit/4e833e21cce5966ff9617f048ad40226ed60ca70
Author: lntue <lntue at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/FPExceptMatcher.cpp
M libc/test/UnitTest/FPMatcher.h
M libc/test/UnitTest/RoundingModeUtils.cpp
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/smoke/CanonicalizeTest.h
M libc/test/src/math/smoke/FModTest.h
M libc/test/src/math/smoke/NearbyIntTest.h
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
Log Message:
-----------
[libc] Add missing functions in FEnvImpl.h under LIBC_MATH_USE_SYSTEM_FENV config. (#211303)
Commit: 8c556564a2199e13f59dc43bfa5ef4345a89ae3b
https://github.com/llvm/llvm-project/commit/8c556564a2199e13f59dc43bfa5ef4345a89ae3b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/test/Transforms/LowerMatrixIntrinsics/phi.ll
Log Message:
-----------
[Matrix] Use incoming terminator as insert point in visitPHI. (#211211)
For some instructions, like invoke, getInsertionPointAfterDef may return
an std::nullopt. Using the insert point after the phi is then incorrect.
Use the incoming terminator as default insert point to fix a crash in
the added test cases.
PR: https://github.com/llvm/llvm-project/pull/211211
Commit: 8ae7803bede98cca73e6fd6a8fabbf95da9d0b46
https://github.com/llvm/llvm-project/commit/8ae7803bede98cca73e6fd6a8fabbf95da9d0b46
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Target/Cpp/common-cpp.mlir
Log Message:
-----------
[mlir][emitc] Add compound assignment ops (#210233)
Commit: b47174d1d1adca974494d12ba54bd793075c930a
https://github.com/llvm/llvm-project/commit/b47174d1d1adca974494d12ba54bd793075c930a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (#210543)
Add member functions to create wide load/store and migrate various sites
to use them.
It also updates makeMemOpWideningDecisions to use it. For consistency,
ReplaceWith has been updated to always require inserted recipes.
PR: https://github.com/llvm/llvm-project/pull/210543
Commit: 6f2ba122cbd047c77ec6ab26598523c7aa4ef853
https://github.com/llvm/llvm-project/commit/6f2ba122cbd047c77ec6ab26598523c7aa4ef853
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
A lldb/test/Shell/SymbolFile/DWARF/wasm-data-symbol.yaml
Log Message:
-----------
[lldb] Synthesize data symbols for plain C globals on WebAssembly (#211301)
The Wasm name section names functions but not data, so LLDB recovers
data symbols from the DWARF. It only did so for variables with a linkage
name, such as a C++ vtable, so a plain C global, which has only a
DW_AT_name, got no symbol and its address did not resolve back to a
name. Use the source name when there is no linkage name.
Commit: 543160345be41f399c142f51355408362988f44e
https://github.com/llvm/llvm-project/commit/543160345be41f399c142f51355408362988f44e
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
R llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll
Log Message:
-----------
Revert "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (#211341)
Reverts llvm/llvm-project#206597
Causes verifier issues:
https://github.com/llvm/llvm-project/pull/206597#issuecomment-5049789740
Commit: 255d0013789d75187179264e8b026b04fd109bc3
https://github.com/llvm/llvm-project/commit/255d0013789d75187179264e8b026b04fd109bc3
Author: Spencer Bryngelson <shb at gatech.edu>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
A flang/test/Lower/OpenMP/implicit-map-flat-allocatable-no-mapper.f90
M flang/test/Lower/OpenMP/implicit-map-pointer-no-default-mapper.f90
Log Message:
-----------
[flang][OpenMP] Don't emit implicit default mapper for flat allocatable derived types (#209645)
An allocatable or pointer capture of a derived type in a `target` region
triggers
synthesis of an implicit default declare mapper for the type. The gate
keyed only on
whether the captured *variable* was allocatable, not on whether the
*type* needs a
mapper:
```cpp
if (!isPointer && (hasDefaultMapper || isAllocatable)) {
```
For a flat type -- all components trivially mappable, no
allocatable/pointer/nested
record members -- the mapper is unnecessary. The object maps as a plain
bulk copy.
Emitting a mapper anyway lowers to a per-element, per-component mapper
walk in the
offload runtime (`targetDataBegin` -> `targetDataMapper` ->
`targetDataBegin`, and the
mirror walk in `targetDataEnd`), which is `O(num_elements *
num_components)` per kernel
invocation. On a large device-resident allocatable array this busy-loops
the host for
minutes with the GPU idle.
`Fortran::lower::omp::requiresImplicitDefaultDeclareMapper()` already
answers whether a
type requires a mapper (allocatable/pointer/nested-record components, or
ISO-C interop),
but the allocatable-capture path never consulted it. This gates on it:
```cpp
if (!isPointer &&
(hasDefaultMapper ||
(isAllocatable && requiresImplicitDefaultDeclareMapper(*typeSpec)))) {
```
Pointer captures and user/pre-existing declare mappers are unaffected. A
flat allocatable
now maps as descriptor + base-address + attach entries with no
`mapper()` attribute --
identical to the pointer path.
### Reproducing the runtime cost
Reported against the AMD ROCm flang runtime as ROCm/llvm-project#3385. A
flat derived type
(`ghost_point`-like) in a device-resident allocatable array, mapped
implicitly across many
kernel invocations, hangs for minutes. `perf` on the hang shows all time
in per-component
work: `DenseMap` insert into the mapping-state tables, `targetDataEnd`'s
mirror walk, and
`SourceInfo` construction -- each `O(1)`/`O(log M)` per entry, so the
total is linear in
`M = num_elements * num_components * kernel_invocations` with a large
constant. Suppressing
the mapper collapses `M` to one bulk entry.
### Tests
- `implicit-map-flat-allocatable-no-mapper.f90`: new; a flat allocatable
capture emits no
mapper.
- `implicit-map-pointer-no-default-mapper.f90`: the type now has an
allocatable component
so it still requires a mapper (keeps the pointer-vs-allocatable
distinction meaningful).
- `derived-type-map.f90`, `defaultmap.f90`: updated; these asserted a
mapper for a flat
allocatable capture, which is the behavior being removed.
### AI tool usage
Per the [LLVM AI Tool Use
Policy](https://llvm.org/docs/AIToolPolicy.html): this change was
developed with substantial assistance from Claude (Opus 4.8) and
reviewed by the author. The
root-cause analysis, the patch, the tests, and this description were
AI-assisted; the reproducer
and the offload-runtime `gdb`/`perf` profiling on an AMD Instinct MI250X
(HPC Fund) that confirmed
the runtime cost is linear (not a runtime bug) were part of that
workflow. Also noted as an
`Assisted-by:` trailer in the commit.
Commit: a9a25dfa49e1c8c1e16d36872fa55e0f1a37718b
https://github.com/llvm/llvm-project/commit/a9a25dfa49e1c8c1e16d36872fa55e0f1a37718b
Author: Nikhil Kotikalapudi <Nikhil.Kotikalapudi at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/RegisterClassInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/CodeGen/FEntryInserter.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/IfConversion.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/KCFI.cpp
M llvm/lib/CodeGen/LiveRangeShrink.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PatchableFunction.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PostRASchedulerList.cpp
M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TailDuplication.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp
M llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
M llvm/lib/Target/AArch64/AArch64SRLTDefineSuperRegs.cpp
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/ARM/A15SDOptimizer.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/MLxExpansionPass.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86CallFrameOptimization.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86DynAllocaExpander.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/Target/X86/X86SuppressAPXForReloc.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
A llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-invalidate-rci.mir
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
Log Message:
-----------
[CodeGen] Add MachineRegisterClassInfo analysis pass (#210826)
Which is a wrapper of RegisterClassInfo.
This can cache the result of RegisterClassInfo and hence
we can reduce compile time.
Supercedes https://github.com/llvm/llvm-project/pull/120690,
https://github.com/llvm/llvm-project/pull/164877
---------
Co-authored-by: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Co-authored-by: Patrick Simmons <patrick.simmons at amd.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: be34b478bf3b82ac3b447b17e2b7e73447c9c8dd
https://github.com/llvm/llvm-project/commit/be34b478bf3b82ac3b447b17e2b7e73447c9c8dd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Dialect/Math/canonicalize.mlir
Log Message:
-----------
[mlir][math] Fold FPowIOp with square-and-multiply to match powi expansion (#210982)
Fold math.fpowi using the base's own floating-point semantics via
iterative
square-and-multiply, matching the multiply sequence ExpandPowI builds in
SelectionDAGBuilder. The prior pow/powf-based fold computed in
float/double
and rounded differently from the runtime expansion, disagreeing with
x**n by ~1 ULP.
Commit: 3e6d5937389ff34243b58b70af0282c6c9174021
https://github.com/llvm/llvm-project/commit/3e6d5937389ff34243b58b70af0282c6c9174021
Author: Tshaka Lekholoane <mail+git at tshaka.dev>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
Log Message:
-----------
[Clang] Add C++11/C23-style spellings for Swift import attributes (#183484)
Swift interop attributes such as `swift_name`, `swift_attr`, and
`swift_private` previously only supported GNU-style spelling. Add the
missing `[[]]` attribute spellings for C++11 and C23 compatibility,
bringing them in line with other Clang attributes.
Commit: 7e9782bad19c1995d350415f5e68c6d68330f69f
https://github.com/llvm/llvm-project/commit/7e9782bad19c1995d350415f5e68c6d68330f69f
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
R clang/test/ParserHLSL/hlsl_contained_type_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_is_array_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_is_ms_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_resource_dimension_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_contained_type_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_array_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_ms_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_rov_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_raw_buffer_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_resource_class_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_resource_dimension_attr_error.hlsl
Log Message:
-----------
[HLSL] Move sema tests out of ParserHLSL into SemaHLSL/Attributes (#211353)
This PR moves sema tests that were misplaced in `clang/test/ParserHLSL`
into a more appropriate location: `clang/test/SemaHLSL/Attributes`
These tests exercise `[[hlsl::...]]` attribute (resource_class,
contained_type, is_array, is_ms, is_rov, raw_buffer, dimension)
diagnostics from `DiagnosticSemaKinds.td`, relating to:
- 'hlsl::X' attribute cannot be applied to a declaration
- attribute takes one argument / takes no arguments
- can be used only on HLSL intangible type '__hlsl_resource_t'
- attribute is already applied / applied with different arguments
- ResourceClass attribute argument not supported
Which are appropriately related to semantics rather than parsing.
Commit: 3140a6478c782dcf9e26dbaedb7dd684be571bdf
https://github.com/llvm/llvm-project/commit/3140a6478c782dcf9e26dbaedb7dd684be571bdf
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/atomic.ll
R llvm/test/Assembler/invalid-atomicrmw-xchg-fp-vector.ll
A llvm/test/Assembler/invalid-atomicrmw-xchg.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/Transforms/AtomicExpand/Mips/atomicrmw-vector.ll
M llvm/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[IR] Allow vector atomicrmw xchg (#208510)
Previously, we only allowed vector `atomicrmw xchg` for `elementwise`
`atomicrmw`. Relax this restriction. By default, expand these by casting
to integer.
This is a follow-up on: https://github.com/llvm/llvm-project/pull/190716
Assisted by AI.
Commit: c8b363e4cdc31be8fd842f60430d66827af6ab15
https://github.com/llvm/llvm-project/commit/c8b363e4cdc31be8fd842f60430d66827af6ab15
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenACC/acc-routine-generic.f90
Log Message:
-----------
[flang][acc] Reject generic interface name in acc routine (#211269)
OpenACC ties the named argument of a ROUTINE directive to a subroutine
or function. A generic interface name is therefore not a valid target.
Thus adding an explicit check for this plus informational error message.
Commit: 5b614d16bff2d78854f9f2683a84eec51ce2dcb4
https://github.com/llvm/llvm-project/commit/5b614d16bff2d78854f9f2683a84eec51ce2dcb4
Author: PiJoules <leonardchan at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
A llvm/test/Instrumentation/AddressSanitizer/instrument-initializer-dbgloc.ll
Log Message:
-----------
[asan] Add !dbg metadata to __asan_after/before_dynamic_init calls (#211086)
We get this error when linking the kernel with a custom asan runtime
```
= note: inlinable function call in a function with debug info must have a !dbg location
call void @__asan_after_dynamic_init()
```
The verifier throws this because __asan_after_dynamic_init doesn't have
!dbg but it is inlinable into the module ctor that invokes it which does
have !dbg. Normally, these functions aren't inlinable because they're
provided by some prebuilt library, but for Fuchsia's kernel, we provide
a custom runtime defining these and it's built with LTO which does make
it inlinable.
The fix in this patch is just adding the !dbg metadata to these calls
which I think should be non-intrusive.
NOTE: Gemini was used to make the test.
Commit: c85d1c54c5fba6344b117e369328a4b9b5a1386b
https://github.com/llvm/llvm-project/commit/c85d1c54c5fba6344b117e369328a4b9b5a1386b
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/ARM/coalesce-copy-undef.ll
A llvm/test/CodeGen/ARM/coalesce-copy-undef.mir
Log Message:
-----------
[CodeGen] Ensure `undef` propagation when an undef copy is eliminated if used as a subregister def (#204039)
If we eliminate an `undef` copy and there is a use of the copy that
`isDef` on just a sub-register, mark it as `undef`.
Fixes #204036.
Commit: dc698fa68ce1bd513cefa69cc21b113e754b8173
https://github.com/llvm/llvm-project/commit/dc698fa68ce1bd513cefa69cc21b113e754b8173
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/test/Fir/CUDA/cuda-device-global-cycle.fir
Log Message:
-----------
[flang][cuda] Break circular global init when copying them to the GPU module (#211100)
PTX does not support cycle in globals.
```
error: Circular dependency found in global variable set
```
To avoid cycle in type descriptor, check if there is a cycle and break
it.
The algorithm uses Tarjan’s strongly connected components algorithm for
finding strongly connected components in a directed graph.
- Each fir.global is a graph node.
- Each fir.address_of in a global initializer is an edge to another
global.
- An SCC containing multiple globals—or a self-edge—represents a
circular initializer dependency.
Commit: fd5af7efad7ff39a14d49702de4377117e741f51
https://github.com/llvm/llvm-project/commit/fd5af7efad7ff39a14d49702de4377117e741f51
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
Log Message:
-----------
[MLIR][Python] Avoid printing an unset nanobind include directory (#211240)
`nanobind_INCLUDE_DIR` is only populated when MLIR discovers nanobind
through the Python package. When `nanobind_DIR` is supplied explicitly,
the variable remains unset and the configuration output contains an
empty path:
```
Found nanobind v2.13.0:
```
The nanobind CMake package location is already reported by both
discovery paths.
We can only print the detected nanobind version in the final status
message. Or maybe if we want we can find the include dir for the
explicit path too and merge them to `nanobind_INCLUDE_DIR` but I think
this is better.
Commit: 410dad05ab02a246112d5cb03d27ed87a5e9e607
https://github.com/llvm/llvm-project/commit/410dad05ab02a246112d5cb03d27ed87a5e9e607
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
Log Message:
-----------
[BranchFolding] Refactor AreConditionalsEqual to Helper (#211270)
As suggested in
https://github.com/llvm/llvm-project/pull/203110#discussion_r3628548201.
Commit: d33e8d81ac5ccb5164fe11cd38885ca5cfbaed91
https://github.com/llvm/llvm-project/commit/d33e8d81ac5ccb5164fe11cd38885ca5cfbaed91
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/wide-store.ll
Log Message:
-----------
[SLP][NFC]Add a test with non-profitable wide vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/211367
Commit: 3093d8c577d71a98ec4d9a2bdf26b196cc7a0f8d
https://github.com/llvm/llvm-project/commit/3093d8c577d71a98ec4d9a2bdf26b196cc7a0f8d
Author: Paulius Velesko <pvelesko at pglc.io>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/test/Driver/hipspv-toolchain.hip
Log Message:
-----------
[HIPSPV] Preserve device debug info requested via -g
HIPSPVToolChain::adjustDebugInfoKind() unconditionally forced NoDebugInfo,
so compiling HIP device code with -g produced SPIR-V with no debug metadata.
Debuggers such as Intel's gdb-oneapi could therefore not resolve source
lines or local variables in offloaded kernels. The stated reason for
disabling it (the SPIRV-LLVM-Translator aborting on DW_OP_LLVM_convert) no
longer applies, as the translator now lowers that operation.
Stop clobbering the requested debug level, and when -g is given emit debug
info in the NonSemantic.Shader.DebugInfo form
(--spirv-debug-info-version=nonsemantic-shader-200), enabling the required
SPV_KHR_non_semantic_info extension. The default (no -g) output is
unchanged.
Also enable SPV_INTEL_optnone when -g is requested. At -O0 Clang marks
functions optnone; preserving that attribute lets gdb-oneapi inspect kernel
arguments and locals instead of reporting them as <optimized out>. The
extension is a no-op at -O1 and above.
Reported downstream: CHIP-SPV/chipStar#1004
Commit: 252f31a6893b6a3dcb8b2a404e13933e376bf36b
https://github.com/llvm/llvm-project/commit/252f31a6893b6a3dcb8b2a404e13933e376bf36b
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/test/Analysis/dangling-ptr-deref.cpp
Log Message:
-----------
[analyzer] Detect dangling pointers passed to function calls (#211045)
In order to detect if a dangling pointer is passed to a function the
analyzer has to inspect each call argument. For that reason I have
implemented the `checkPostCall` for the `DanglingPtrDeref` checker to
check if an argument passed to a function is dangling. Since
`checkLocation` only catches dereferences and cannot reason about
whether an argument passed to a function is dangling it cannot detect
these type of bugs alone.
Commit: f1483ea484bafdf5e7ec6f17e94f7200256aa0e5
https://github.com/llvm/llvm-project/commit/f1483ea484bafdf5e7ec6f17e94f7200256aa0e5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/ptrtoint.ll
R llvm/test/Transforms/IndVarSimplify/AArch64/expand-ptrtoaddr-reuse-ptrtoint.ll
A llvm/test/Transforms/IndVarSimplify/AArch64/ptrtoaddr-ptrtoint.ll
A llvm/test/Transforms/IndVarSimplify/X86/ptrtoaddr-narrow-pointer.ll
A llvm/test/Transforms/LoopStrengthReduce/AArch64/expand-ptrtoaddr-reuse-ptrtoint.ll
A llvm/test/Transforms/PhaseOrdering/X86/ptrtoaddr-ptrtoint.ll
Log Message:
-----------
[PhaseOrdering] Add more tests for expanding ptr SCEVs (NFC) (#211360)
Add more test cases requiring pointer-based SCEVs for
https://github.com/llvm/llvm-project/pull/180244.
Commit: b4a12eb394f195d9f98a20727638a1cb52ce6727
https://github.com/llvm/llvm-project/commit/b4a12eb394f195d9f98a20727638a1cb52ce6727
Author: adams381 <adams at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/CIR/CIRToCIRPasses.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64.c
Log Message:
-----------
[CIR] Add opt-in flag to run x86_64 call-conv lowering (#211335)
The x86_64 System V classifier and the CallConvLowering pass that drives
it are already in the tree, but nothing runs them: the -fclangir
pipeline never adds the pass, so CIR still emits uncoerced aggregate
signatures on x86_64 and its LLVM output diverges from classic CodeGen
for anything passed or returned in registers.
This adds the cc1 flag -clangir-enable-call-conv-lowering, off by
default like -clangir-enable-idiom-recognizer, and runs the pass in
runCIRToCIRPasses right after CXXABILowering, which has already reduced
C++ ABI types to plain records the classifier can handle. The flag is
gated on x86_64. On other targets it is a silent no-op, so a driver can
set it unconditionally without breaking non-x86_64 builds. The AVX level
is fixed at None because the classifier's current supported subset has
no >128-bit vector aggregate where the level would change the result.
With the flag on, supported scalars and small aggregates are coerced to
match classic CodeGen: sign/zero-extended narrow integers, SSE scalars,
one- and two-eightbyte INTEGER/SSE struct coercion, ignored empty
structs, sret returns, and byval arguments. Types the classifier does
not yet handle — unions, long double, and float aggregates that classify
to an SSE vector — still errorNYI when the flag is on. CIR does emit
noalias on byval parameters where classic CodeGen does not, which the
test documents with split prefixes.
Commit: 8eb0419275536508701246b7e7c47efb5a4fbe1f
https://github.com/llvm/llvm-project/commit/8eb0419275536508701246b7e7c47efb5a4fbe1f
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
A llvm/test/CodeGen/SPIRV/structurizer/merge-exit-switch.ll
Log Message:
-----------
[SPIRV] Support switch terminators when merging region exits (#209859)
fixes #209310
This change fixes the `llvm_unreachable("Unhandled terminator type.")`
crash in `createExitVariable` when a convergence region's exit block
ends in a switch instruction.
To handle the SwitchInst properly we needed to:
1. Build a select chain keyed on the switch condition, using the default
destination as the fallback value and skipping successors that are
internal to the region. This is an almost exact copy of what already
exists for `CondBrInst`.
2. Modify the SPIRVStructurizer.cpp `splitSwitchCases`to removes a case
whose target is the default destination instead of splitting it into a
new successor block.
Assisted by Claude Opus 4.8
Commit: 2bc3ca68d169e7c67db6ad5f364e1488f0c2abeb
https://github.com/llvm/llvm-project/commit/2bc3ca68d169e7c67db6ad5f364e1488f0c2abeb
Author: David Young <davidayoung at meta.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Set up windows specific cmake defines for lldb bazel build and config for LZMA (#205823)
Adds an @platforms//os:windows branch to the ConfigHeader
expand_template OS select(), alongside the
existing macos/linux branches. On Windows the POSIX-oriented features
are disabled (HAVE_PTSNAME_R,
LLDB_ENABLE_POSIX, LLDB_ENABLE_TERMIOS → 0) and the platform-detection
macros (HAVE_LIBCOMPRESSION,
HAVE_*_PROCESS_VM_READV, HAVE_PPOLL, HAVE_SYS_EVENT_H,
LLDB_ENABLE_LIBXML2, LLDB_HAVE_EL_RFUNC_T) are
set to their Windows values. This complements the recently added Windows
process plugin (#203146) so a
Windows-configured lldb gets a correct Config.h. Python stays disabled
on Windows (base default
LLDB_ENABLE_PYTHON 0).
Continuing to work backwards from Meta's internally working buck2 build
that is translated from this bazel. This lacked windows select entirely,
so porting back what we ended up needing. There are still some changes
needed on the build targets, but leave those to a follow up diff as I
would hope build signals should be clean with this?
https://github.com/llvm/llvm-project/pull/201173 originally started full
windows support and there were more changes to get it working on a
remote build in
https://github.com/hermeticbuild/hermetic-llvm/pull/582/changes#diff-da3f010352329507a9e1e3f1dc911ae4ba69ba9747ce15e5eb76fbefe5f829b3.
If we look at
3rd_party/llvm-project/22.x/patches/lldb-windows-config-header.patch in
the previous patch, it lines up with what we have here.
Meta does package LZMA support into our windows build, so switching to a
config to control that.
Commit: 9b4b8773a15c90ffdcb5826f886495c106a12211
https://github.com/llvm/llvm-project/commit/9b4b8773a15c90ffdcb5826f886495c106a12211
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2.ll
Log Message:
-----------
[SLP][AArch64]Support masked div/rem on non-pow-2 vectors
For fixed-width integer div/rem on AArch64 SVE, a non-power-of-2 vector
cannot execute as a single whole-register operation. When profitable,
pad the vector to the next full register and use the masked div/rem
intrinsics.
Fixes #207880
Reviewers: RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/210623
Commit: f2a284b4732b2b568315d5b8f2e36a96eed23f8a
https://github.com/llvm/llvm-project/commit/f2a284b4732b2b568315d5b8f2e36a96eed23f8a
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M .github/workflows/release-sources.yml
Log Message:
-----------
workflows/release-sources: Add missing checkout for composite action (#211079)
We need to explicitly checkout
.github/workflows/validate-release-version if we are going to use it.
Commit: 2662e2e3ff1d7912bdcd02c3733b6c7c8e2b6a97
https://github.com/llvm/llvm-project/commit/2662e2e3ff1d7912bdcd02c3733b6c7c8e2b6a97
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/abseil/cleanup-ctad.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/cleanup-ctad.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-addition.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-addition.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-float.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/duration-factory-float.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/no-internal-dependencies.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/no-internal-dependencies.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/no-namespace.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/no-namespace.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/redundant-strcat-calls.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/redundant-strcat-calls.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/str-cat-append.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/str-cat-append.rst
A clang-tools-extra/docs/clang-tidy/checks/abseil/time-comparison.md
R clang-tools-extra/docs/clang-tidy/checks/abseil/time-comparison.rst
A clang-tools-extra/docs/clang-tidy/checks/altera/id-dependent-backward-branch.md
R clang-tools-extra/docs/clang-tidy/checks/altera/id-dependent-backward-branch.rst
A clang-tools-extra/docs/clang-tidy/checks/altera/kernel-name-restriction.md
R clang-tools-extra/docs/clang-tidy/checks/altera/kernel-name-restriction.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-accept.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-accept.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-accept4.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-accept4.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-creat.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-creat.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-dup.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-dup.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-epoll-create.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-epoll-create.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-epoll-create1.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-epoll-create1.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-fopen.md
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A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-inotify-init.md
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R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-memfd-create.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-open.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-open.rst
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R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-pipe.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-pipe2.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-pipe2.rst
A clang-tools-extra/docs/clang-tidy/checks/android/cloexec-socket.md
R clang-tools-extra/docs/clang-tidy/checks/android/cloexec-socket.rst
A clang-tools-extra/docs/clang-tidy/checks/boost/use-to-string.md
R clang-tools-extra/docs/clang-tidy/checks/boost/use-to-string.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-if-condition.md
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A clang-tools-extra/docs/clang-tidy/checks/bugprone/bad-signal-to-kill-thread.md
R clang-tools-extra/docs/clang-tidy/checks/bugprone/bad-signal-to-kill-thread.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/bool-pointer-implicit-conversion.md
R clang-tools-extra/docs/clang-tidy/checks/bugprone/bool-pointer-implicit-conversion.rst
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A clang-tools-extra/docs/clang-tidy/checks/bugprone/copy-constructor-mutates-argument.md
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A clang-tools-extra/docs/clang-tidy/checks/bugprone/default-operator-new-on-overaligned-type.md
R clang-tools-extra/docs/clang-tidy/checks/bugprone/default-operator-new-on-overaligned-type.rst
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R clang-tools-extra/docs/clang-tidy/checks/bugprone/dynamic-static-initializers.rst
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R clang-tools-extra/docs/clang-tidy/checks/bugprone/forward-declaration-namespace.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/inaccurate-erase.md
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Log Message:
-----------
[clang-tidy][docs] Rename short check docs to Markdown (#210466)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 30d892e8159b4103f0f171439c05479cbc50d917
https://github.com/llvm/llvm-project/commit/30d892e8159b4103f0f171439c05479cbc50d917
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
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M clang-tools-extra/docs/clang-tidy/checks/modernize/shrink-to-fit.md
M clang-tools-extra/docs/clang-tidy/checks/modernize/unary-static-assert.md
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-bool-literals.md
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-default.md
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-starts-ends-with.md
M clang-tools-extra/docs/clang-tidy/checks/mpi/buffer-deref.md
M clang-tools-extra/docs/clang-tidy/checks/mpi/type-mismatch.md
M clang-tools-extra/docs/clang-tidy/checks/objc/assert-equals.md
M clang-tools-extra/docs/clang-tidy/checks/objc/avoid-nserror-init.md
M clang-tools-extra/docs/clang-tidy/checks/objc/dealloc-in-category.md
M clang-tools-extra/docs/clang-tidy/checks/objc/forbidden-subclassing.md
M clang-tools-extra/docs/clang-tidy/checks/objc/missing-hash.md
M clang-tools-extra/docs/clang-tidy/checks/objc/super-self.md
M clang-tools-extra/docs/clang-tidy/checks/openmp/exception-escape.md
M clang-tools-extra/docs/clang-tidy/checks/performance/faster-string-find.md
M clang-tools-extra/docs/clang-tidy/checks/performance/implicit-cast-in-loop.md
M clang-tools-extra/docs/clang-tidy/checks/performance/implicit-conversion-in-loop.md
M clang-tools-extra/docs/clang-tidy/checks/performance/inefficient-algorithm.md
M clang-tools-extra/docs/clang-tidy/checks/performance/move-constructor-init.md
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-destructor.md
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-move-constructor.md
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.md
M clang-tools-extra/docs/clang-tidy/checks/performance/trivially-destructible.md
M clang-tools-extra/docs/clang-tidy/checks/performance/type-promotion-in-math-fn.md
M clang-tools-extra/docs/clang-tidy/checks/performance/use-std-move.md
M clang-tools-extra/docs/clang-tidy/checks/portability/no-assembler.md
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-const-params-in-decls.md
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-nested-conditional-operator.md
M clang-tools-extra/docs/clang-tidy/checks/readability/container-data-pointer.md
M clang-tools-extra/docs/clang-tidy/checks/readability/convert-member-functions-to-static.md
M clang-tools-extra/docs/clang-tidy/checks/readability/delete-null-pointer.md
M clang-tools-extra/docs/clang-tidy/checks/readability/implicit-bool-cast.md
M clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.md
M clang-tools-extra/docs/clang-tidy/checks/readability/misplaced-array-index.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-function-ptr-dereference.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-smartptr-get.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-cstr.md
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-subscript-expr.md
M clang-tools-extra/docs/clang-tidy/checks/readability/static-definition-in-anonymous-namespace.md
M clang-tools-extra/docs/clang-tidy/checks/readability/use-std-min-max.md
M clang-tools-extra/docs/clang-tidy/checks/zircon/temporary-objects.md
Log Message:
-----------
[clang-tidy][docs] Rewrite short check docs to Markdown (#210467)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #210466 , which will be a standalone
commit that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
I chose to do 211 files at once in this large batch because they were
all short, i.e. less than 30 lines, so they all have very uncomplicated
reST, which doesn't require much review, or fancy rewriting.
This was prepared with rst2myst plus LLM-assisted cleanup, and the
changes are broken into two commits, mechanical, and LLM cleanup.
Commit: d7544537bce1e3247b563b75206733752f10338b
https://github.com/llvm/llvm-project/commit/d7544537bce1e3247b563b75206733752f10338b
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/docs/UsersManual.md
Log Message:
-----------
[clang][docs] Fix markdown migration defects in the user manual (#210785)
First, replace all the `{eval-rst}` blocks for option documentation with
`:::{option}` fences. This means authors won't have to bounce between
markup languages within one file, and removes more semantic indentation,
which has been a recurring problem.
Second, remove blockquotes that seem unintentional. None of these are
real quotes, and they seem like artifacts of unintended indentation
before the Markdown migration (#208310).
---------
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: a8228369cae4a84150d19f4193206249b76187a0
https://github.com/llvm/llvm-project/commit/a8228369cae4a84150d19f4193206249b76187a0
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A bolt/docs/NewBackend.md
M bolt/docs/index.md
Log Message:
-----------
[BOLT][docs] New backend guide (#211382)
Add a brief doc with BOLT-specific guidance for adding a new backend.
Commit: 5f88e49e8c24c5b799872b4331d35b5406d3c213
https://github.com/llvm/llvm-project/commit/5f88e49e8c24c5b799872b4331d35b5406d3c213
Author: Usama Hameed <u_hameed at apple.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
A llvm/test/Transforms/GVN/pre-no-hoist-across-lifetime.ll
Log Message:
-----------
[MemDep] Treat partial-overlap lifetime.start as a clobber (#211167)
When getSimplePointerDependencyFrom scans backward and reaches a
@llvm.lifetime.start, it only treated the marker as a barrier when the
query location MustAliased the lifetime's argument, and otherwise fell
through to `continue`. For a load through a GEP into part of an alloca
the alias result is PartialAlias, so the scan walked past lifetime.start
as if it weren't there, and GVN Load PRE would hoist the load above it.
Inspect the full alias result instead of just isMustAlias: MustAlias
still returns Def and NoAlias still continues, but any partial/may
overlap now returns a Clobber so lifetime.start acts as a barrier and
the access cannot be moved above it.
Fixes #194940
Commit: 11542f5bf4aedcc15bf37a02a3cb44f187ce588c
https://github.com/llvm/llvm-project/commit/11542f5bf4aedcc15bf37a02a3cb44f187ce588c
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb][test] Reinforce formatter bytecode unit tests (#211042)
rdar://176903081
Assisted-by: claude
Commit: 1ba2d936971c52b5fd8741fc980c7c11c7522597
https://github.com/llvm/llvm-project/commit/1ba2d936971c52b5fd8741fc980c7c11c7522597
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/test/CAPI/rewrite.c
Log Message:
-----------
[mlir-c] Fix pattern-set leak in rewrite.c materialization tests (#211358)
The `TypeConverter` materialization tests added in #208934 (`testTypeConverterSourceMaterialization` / `testTypeConverterTargetMaterialization`) freeze their `MlirRewritePatternSet` but never destroy it.
This was caught by LeakSanitizer on the aarch64 HWASan bootstrap bot ([builder 55, build
30763](https://lab.llvm.org/buildbot/#/builders/55/builds/30763)):
Fix: call `mlirRewritePatternSetDestroy(patterns)` after freezing in both tests, matching existing usage.
Assisted by: Claude
Commit: 46a493beaafa82219d796b4150662257af232a5b
https://github.com/llvm/llvm-project/commit/46a493beaafa82219d796b4150662257af232a5b
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/IR/Instruction.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
A llvm/test/Transforms/ArgumentPromotion/call_memprof.ll
A llvm/test/Transforms/Attributor/call_memprof.ll
A llvm/test/Transforms/DeadArgElim/call_memprof.ll
A llvm/test/Transforms/ExpandVariadics/call_memprof.ll
Log Message:
-----------
[MemProf] Fix memprof metadata propagation issue (#211373)
Fixes a few places where optimizations were dropping memprof related
metadata when creating new calls. Adds a new facility that can be used
to propagate profile and debug metadata, and employs that in the passes
that were manually specifying just MD_prof and MD_dbg.
Commit: 37879dc3049378443c156db0f5e01e97c859b5bf
https://github.com/llvm/llvm-project/commit/37879dc3049378443c156db0f5e01e97c859b5bf
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine-mixed-scope.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine.mlir
Log Message:
-----------
[mlir][OpenACC] Preserve worker rows when combining reductions (#210804)
Example:
```fortran
!$acc parallel loop gang worker reduction(+:sum)
do j = 1, n
!$acc loop vector reduction(+:sum)
do i = 1, n
sum = sum + a(i, j)
end do
end do
```
In this code, each worker has a private partial result, but combine
predication previously allowed only ThreadY row zero to contribute.
Fix: keep ThreadY active only for proven atomic worker combines, while
preserving legacy predication or reporting NYI for unsafe combinations.
Commit: c1cd7d16fa689dfcb08df24652c0de3fa5b68c43
https://github.com/llvm/llvm-project/commit/c1cd7d16fa689dfcb08df24652c0de3fa5b68c43
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenACC/acc-routine-generic.f90
Log Message:
-----------
[flang][acc] Permit acc routine for specific name (#211386)
After https://github.com/llvm/llvm-project/pull/211269 a generic
interface name is rejected in acc routine. This PR relaxes this by
allowing it when the interface name and the specific are the same - and
attaches the information to the specific itself.
Commit: d1c59832255332b3442c24b5cc1cb51664a23382
https://github.com/llvm/llvm-project/commit/d1c59832255332b3442c24b5cc1cb51664a23382
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
Log Message:
-----------
[mlir][OpenACC] Support dynamic multi-rank array reductions (#211336)
Example:
```fortran
integer :: r(:,:)
!$acc parallel loop reduction(+:r)
```
In this code, the reduction accumulator has dynamic dimensions and rank
greater than one.
Fix: use runtime dimension sizes to delinearize flattened
array-reduction indices.
Commit: c832c386ad09091f926f5a6c7e087ca127cde1b2
https://github.com/llvm/llvm-project/commit/c832c386ad09091f926f5a6c7e087ca127cde1b2
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
M llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
Log Message:
-----------
[NVPTX] Move addrspacecast Isel to TableGen (#211306)
Commit: 9bdf7b60cfc6d02a943004729210b429630e3d26
https://github.com/llvm/llvm-project/commit/9bdf7b60cfc6d02a943004729210b429630e3d26
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
Log Message:
-----------
[AMDGPU] Fix legalization of V_PK_*64 SGPR to VGPR change (#211357)
Special case for V_PK_*64 instructions: these do not have OPSEL but SGPR
sources behave like OPSEL is set replicating low 64-bits into high. VGPR
sources in turn read actual 4 registers. To move operand from an SGPR to
a VGPR we need to replicate low half.
Commit: 9521d0c03324fb5950727522cdf71d94fd3f68b1
https://github.com/llvm/llvm-project/commit/9521d0c03324fb5950727522cdf71d94fd3f68b1
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_code_completion.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Unify CompletionChunkKind.__str__ representation (#210676)
This completes the first step of
https://github.com/llvm/llvm-project/issues/156680
This change is a follow-up to
https://github.com/llvm/llvm-project/pull/176631, following the release
branching, to ensure a one release-cycle deprecation period.
Commit: b66aac64ed3fdb50ce47dd7bbb0ded13c326a132
https://github.com/llvm/llvm-project/commit/b66aac64ed3fdb50ce47dd7bbb0ded13c326a132
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR][NFC] Remove unused LLVM lowering for cir.await (#211143)
`cir.await` is always eliminated by the FlattenCFG pass before the
DirectToLLVM conversion. Since the operation never reaches LLVM
lowering, remove the unused lowering implementation.
Commit: f5f64f81f686b3af7a9ec103e995dffecb10b1bf
https://github.com/llvm/llvm-project/commit/f5f64f81f686b3af7a9ec103e995dffecb10b1bf
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A llvm/test/tools/llvm-profgen/X86/Inputs/invalid-short-lbr.perfscript
A llvm/test/tools/llvm-profgen/X86/invalid-short-lbr.test
M llvm/tools/llvm-profgen/PerfReader.cpp
Log Message:
-----------
[llvm-profgen] Fix isLBRSample check for 1-deep brstack (#211182)
`isLBRSample` in `checkPerfScriptType` currently don't differentiate the
LBR records in hybrid sample (LBR+Stack) or an LBR sample. It checks
"0x" and "/" for the second pair as a unified way to tell whether the
record is an LBR pair. However, this requires a minimal of 2 pairs of
hybrid LBR samples, otherwise, even a valid LBR record will fail the
`isLBRSample` check. This fix adds an initial check for "0x" and "/" for
the first LBR record so we can handle the case where only 1 pair of LBR
record exists in the hybrid sample.
Commit: 04f124f6151e8c8410e28aba28dc38e590e34c58
https://github.com/llvm/llvm-project/commit/04f124f6151e8c8410e28aba28dc38e590e34c58
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[github] Move BOLT reviewers to team (#211422)
Use https://github.com/orgs/llvm/teams/reviewers-bolt in place of
reviewers list, similar to runtimes.
Commit: f90fca77facb3af3069216d9def535bdb3a08c83
https://github.com/llvm/llvm-project/commit/f90fca77facb3af3069216d9def535bdb3a08c83
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-07-01.md
Log Message:
-----------
[flang] Add Flang Community Call Notes for July 1 (#207055)
Commit: 8eca60b49ada8d62e53a3c20dfd157adbe4e4e04
https://github.com/llvm/llvm-project/commit/8eca60b49ada8d62e53a3c20dfd157adbe4e4e04
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/add_new_check.py
Log Message:
-----------
[clang-tidy] Generate Markdown documentation for new checks (#210574)
Update `add_new_check.py` to generate MyST Markdown documentation for
new checks.
Part of https://github.com/llvm/llvm-project/issues/201242
Commit: d0ec2ec1f2f7f265d07026cefa73956ddce5e87f
https://github.com/llvm/llvm-project/commit/d0ec2ec1f2f7f265d07026cefa73956ddce5e87f
Author: hehuan <111408804+xxxxbc at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/NamedParameterCheck.cpp
M clang-tools-extra/clang-tidy/readability/NamedParameterCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/named-parameter.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/named-parameter-ignored-types.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/named-parameter.cpp
Log Message:
-----------
[clang-tidy] Ignore standard tag dispatch types in readability-named-parameter (#208730)
Parameters whose type is a standard tag type (e.g. std::in_place_t,
std::nothrow_t,
iterator tags, lock tags) are used purely for overload resolution and
don't need
a name. This patch skips them.
Added an IgnoredTypes option so users can customize the list. Default
covers 24
standard tag types.
Fixes #208448.
AI Usage: This commit is AI-assisted, reviewed and verified by me.
Commit: 3b057c340fd148fed95df1cb56dc4c2ab45ab0e2
https://github.com/llvm/llvm-project/commit/3b057c340fd148fed95df1cb56dc4c2ab45ab0e2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M mlir/include/mlir-c/Rewrite.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/test/CAPI/rewrite.c
Log Message:
-----------
[mlir-c] Add 1:N TypeConverter conversion and materialization bindings (#208935)
Builds on the source/target materialization C bindings (#208934) to
expose the 1:N dialect-conversion functionality through the MLIR C API.
Continues the buildout of the dialect-conversion C bindings (follows
#206146 and #206161).
Assisted by: Claude
Commit: 21a38909729b5c117b3936eeed640f4054906443
https://github.com/llvm/llvm-project/commit/21a38909729b5c117b3936eeed640f4054906443
Author: Sophia Herrmann <herrmann15 at llnl.gov>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M offload/liboffload/API/Device.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfo.cpp
M offload/unittests/OffloadAPI/device/olGetDeviceInfoSize.cpp
Log Message:
-----------
[Offload] Add numLanes device info to liboffload (#211380)
This adds `OL_DEVICE_INFO_NUM_LANES` to the Offload API device-info enum
and wires it through `olGetDeviceInfo`.
Commit: 8bd1cdad89d8cf70928cf4b043177f484c40c469
https://github.com/llvm/llvm-project/commit/8bd1cdad89d8cf70928cf4b043177f484c40c469
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyOptimizeLiveIntervalsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/209958
Commit: 70235228b16b9e4ed5d38ab0b733ec43c2c3ba71
https://github.com/llvm/llvm-project/commit/70235228b16b9e4ed5d38ab0b733ec43c2c3ba71
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
A .github/workflows/compiler-rt-libc-builtins-tests.yml
Log Message:
-----------
[CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (#200196)
Add Pre-commit CI to test compiler-rt builtins with libc to check it
works without issues
Split from #197950
Part of #197824
---------
Co-authored-by: Michael Jones <michaelrj at google.com>
Commit: 5efe31fae4264659bd4ff5c071a68637e1ac1704
https://github.com/llvm/llvm-project/commit/5efe31fae4264659bd4ff5c071a68637e1ac1704
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
Log Message:
-----------
[Analysis][NFC] Remove redundant include SCCIterator.h from BranchProbabilityInfo (#211259)
It becomes redundant after 35d69e3fe344.
Commit: 580604f1f3cbdd643a53e086265140a0b2805c5c
https://github.com/llvm/llvm-project/commit/580604f1f3cbdd643a53e086265140a0b2805c5c
Author: Nikita Taranov <nikita.taranov at clickhouse.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/test/CodeGen/X86/lea-opt-cse1.ll
M llvm/test/CodeGen/X86/lea-opt-cse2.ll
M llvm/test/CodeGen/X86/lea-opt-cse4.ll
M llvm/test/CodeGen/X86/lea-recursion.ll
A llvm/test/CodeGen/X86/pr51707.ll
Log Message:
-----------
[X86] Reuse already-materialized values when forming LEAs (#210739)
For code like
``` cpp
int f(int &a, const int &b) {
a += b + 17;
return a + b;
}
```
the x86 backend emitted three LEAs, rematerializing `a+b` instead of
reusing the value it had just computed and stored:
``` asm
leal (%rdi,%rsi), %eax # a+b (recomputed)
leal 17(%rdi,%rsi), %ecx # a+b+17 (stored)
movl %ecx, (%rdx)
leal 17(%rsi,%rax), %eax # (a+b)+b+17
```
Reason being that when selecting a LEA address for `add2 = add1 + b`
where `add1 = (a+b)+17` is multi-use (it feeds a store), `matchAdd`
looks through `add1` to sink its `+17` into the displacement,
decomposing an already-materialized value and forcing `a+b` to be
recomputed.
The proposed fix: when forming a LEA, if an operand is a value that the
matcher would decompose into several address components **and is already
materialized in a register** (so reusing it is free), use it directly as
a base/index register instead of splitting it.
``` asm
leal 17(%rdi,%rsi), %eax # a+b+17
movl %eax, (%rdx)
addl %esi, %eax # + b — reuses the stored value
```
A value is treated as materialized when it has a use that puts it in a
register **as a value** — a stored value operand, or a `CopyToReg` (a
return value, call argument, or a value live out of the block) — as
opposed to address-only uses (a GEP index, or a load/store pointer)
which fold it for free. This reuses existing idioms: the
`CopyToReg`-means-liveout reasoning mirrors `hasOnlyLiveOutUses`, and
the stored value of a machine store is the operand at
`X86::AddrNumOperands` (as in `X86AvoidStoreForwardingBlocks`).
Identifying whether a value is already materialized is inherently a
heuristic; this PR uses the lightweight use-based check above. The
backend already does this differently for different Ops with varying
levels of sophistication (e.g. the `SUB` case carries a full cost
model). If expert opinion is that this warrants a proper cost model
rather than the boolean check — or a more thorough analysis step — I
will be happy to discuss it and implement if my help is wanted.
No regressions were found on the existing tests.
---
Test changes & MCA
Changed tests: new pr51707.ll; regenerated lea-recursion.ll,
lea-opt-cse1.ll, lea-opt-cse2.ll, lea-opt-cse4.ll. Whole test/CodeGen +
test/DebugInfo sweep: 0 net-new failures (32,757 tests).
`llvm-mca` `Block RThroughput` (cycles/iteration, lower = better),
master → patched, per -mcpu:
```
┌───────────────┬─────────┬─────────┬─────────┬─────────┬─────────┬─────────┬───────────┬───────────┐
│ fn \ μarch │ core2 │ nehalem │ sandyb │ haswell │ skylake │ icelake │ alderlake │ sprrapids │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ reduced │ 1.5→1.0 │ 1.5→1.0 │ 1.5→1.0 │ 1.5→1.0 │ 1.0→1.0 │ 1.5→0.5 │ 2.0→1.0 │ 3.0→1.0 │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ f │ 1.5→1.5 │ 1.5→1.5 │ 2.0→1.5 │ 2.0→1.5 │ 1.3→1.0 │ 1.5→1.0 │ 1.5→1.2 │ 3.0→1.0 │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ shl_reuse │ 1.0→1.0 │ 1.0→1.0 │ 1.0→1.0 │ 1.0→1.0 │ 1.0→1.0 │ 1.0→0.7 │ 2.0→1.0 │ 2.0→1.0 │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ lea-opt-cse1 │ 2.0→2.0 │ 2.0→2.0 │ 2.3→2.0 │ 2.3→2.0 │ 2.0→2.0 │ 1.5→1.0 │ 2.0→1.5 │ 3.0→1.3 │
├───────────────┼─────────┼─────────┼─────────┼─────────┼─────────┼─────────┼───────────┼───────────┤
│ lea-recursion │ 7.5→7.5 │ 7.5→7.5 │ 7.5→7.5 │ 7.5→7.0 │ 7.0→7.0 │ 6.5→4.0 │ 12.0→5.2 │ 12.0→7.0 │
└───────────────┴─────────┴─────────┴─────────┴─────────┴─────────┴─────────┴───────────┴───────────┘
```
Improvement or neutral on every μarch, growing on newer cores (which
have fewer LEA ports and penalize the 3-source LEAs the patch removes).
Closes #51707.
Commit: 647a5fcae7aa7c953495675fd40b94043888228e
https://github.com/llvm/llvm-project/commit/647a5fcae7aa7c953495675fd40b94043888228e
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/MachineInstr.cpp
A llvm/test/CodeGen/RISCV/lifetime-licm.mir
Log Message:
-----------
[CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (#211179)
PR #210028 added a run of EarlyMachineLICM before StackColoring removed
LIFETIME_START/LIFETIME_END markers, and it ended up hoisting them which
led to miscompiles. This marks them as not safe to move in
`MachineInstr::isSafeToMove`.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: eb05d2657b0130a1db130b0cb0d7cfe1d354300e
https://github.com/llvm/llvm-project/commit/eb05d2657b0130a1db130b0cb0d7cfe1d354300e
Author: Wijkqwe <WZYqwe2004 at outlook.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M offload/libomptarget/interface.cpp
Log Message:
-----------
[Offload][OpenMP] Skip RPC callback registration when plugin has no devices (#211447)
`__tgt_register_rpc_callback` unconditionally called
`Plugin::getRPCServer()` which asserts if the RPC server pointer is
null. When a plugin is initialized but its RPC server has not been
created (e.g., `NumDevices == 0` in `GenericPluginTy::init()`), this
triggers a crash.
Rather than introducing a nullable accessor, guard the call by also
checking that the plugin has at least one device. A zero-device plugin
has no RPC server to register callbacks with, so the extra check is both
correct and sufficient.
Suggested by @jhuber6 in the review of the previous attempt (#210215).
Commit: 48f1a20589b9b1da2ab211f8bf95e89ed5c10576
https://github.com/llvm/llvm-project/commit/48f1a20589b9b1da2ab211f8bf95e89ed5c10576
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/docs/Frontend/PerformanceTips.md
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (#207613)
Each Loop stored its blocks twice: the Blocks vector and a DenseBlockSet
used only for O(1) contains(BlockT *). Block lists are inclusive, so building
LoopInfo inserted every block into that set once per enclosing loop --
an O(blocks * depth) cost.
Drop DenseBlockSet and answer contains(BlockT *) from the innermost loop
in LoopInfoBase's block-number-indexed map. This removes the per-build
set maintenance and shrinks sizeof(Loop) from 160 to 72 bytes. Each Loop
keeps a back-pointer to its LoopInfo for the lookup; contains() stays
total for a block from another function (e.g. a global's use).
Note: A pass restructuring the loop nest must not rely on
`contains(BlockT *)` while the block lists and the map are transiently
out of sync, and should scan getBlocks() instead (as FixIrreducible and
LoopSimplifyCFG do). LoopInfoBase::verify() checks the block lists
rather than contains() for the same reason.
Aided by Claude Opus 4.8
Commit: a812f33a20922c85f26f99bc7e46d0eb214d9277
https://github.com/llvm/llvm-project/commit/a812f33a20922c85f26f99bc7e46d0eb214d9277
Author: chandan singh <36783761+chandankds at users.noreply.github.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
A llvm/test/Transforms/LoopVersioningLICM/pseudoprobe.ll
Log Message:
-----------
[LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (#209684)
`LoopVersioningLICM::instructionSafeForVersioning()` rejects any call
that is
not proven to not access memory. `llvm.pseudoprobe` is declared
`IntrInaccessibleMemOnly` (so the optimizer will not delete or sink it),
so
`AA->doesNotAccessMemory()` returns false and the probe is treated as an
unsafe
call site. This disables loop-versioning LICM for essentially every hot
loop
in a sample-based / CSSPGO profile-guided build (in the presence of
`-fpseudo-probe-for-profiling`), since a pseudo probe is inserted on
every basic block.
Pseudo probes are pure profiling placeholders with no observable effect
on the
loop's memory accesses, so skip them in the call-safety check.
RFC:
https://discourse.llvm.org/t/csspgo-unblocking-pseudo-probe-safe-optimizations/90946
Commit: 07456880699368e1f90ce5b5900a6fb6e96e14ae
https://github.com/llvm/llvm-project/commit/07456880699368e1f90ce5b5900a6fb6e96e14ae
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[SampleProfile] Support Eytzinger layout in SecNameTable (#211027)
This patch supports writing SecNameTable in Eytzinger layout for
ExtBinary MD5 sample profiles via a hidden command-line option,
-sample-profile-write-eytzinger-name-tables.
Specifically, this patch partitions function GUIDs in SecNameTable into
three mutually exclusive sets:
- CSKeys: Those GUIDs used as keys in context-sensitive SecLBRProfile.
- FlatKeys: Those GUIDs used as keys in flat SecLBRProfile.
- Inlinees: Those GUIDs mentioned in SecLBRProfile but not as keys.
Each set is constructed as an independent Eytzinger array using
llvm::EytzingerTable. The section starts out with the three element
counts followed by the three successive spans.
A subsequent patch will add FuncOffsetTable as arrays parallel to
CSKeys and FlatKeys. It will introduce binary search into the
Eytzinger name table, taking advantage of the cache-friendly layout.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: 2c8d11e8d46ce90e09d5e9b0deec210f03199bba
https://github.com/llvm/llvm-project/commit/2c8d11e8d46ce90e09d5e9b0deec210f03199bba
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M flang/docs/ParameterizedDerivedTypes.md
M flang/docs/ProcedurePointer.md
M flang/docs/fstack-arrays.md
R flang/include/flang/Lower/ComponentPath.h
R flang/include/flang/Lower/ConvertExpr.h
M flang/include/flang/Lower/DirectivesCommon.h
R flang/include/flang/Lower/IterationSpace.h
M flang/include/flang/Lower/Support/Utils.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Factory.h
M flang/include/flang/Optimizer/Builder/LowLevelIntrinsics.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/CMakeLists.txt
R flang/lib/Lower/ComponentPath.cpp
R flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/IO.cpp
R flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Optimizer/Builder/BoxValue.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/LowLevelIntrinsics.cpp
Log Message:
-----------
[flang][NFC] Delete the legacy expression lowering (ConvertExpr.cpp) and its support files (#210873)
The legacy (non-HLFIR) lowering was removed in cc4922b27694 (#196205),
but ConvertExpr.cpp and its ComponentPath/IterationSpace support files
were left behind. Their last callers have since been migrated or removed
(#210385: OpenMP iterator subscripts via genExprValue; #210621: initial
values via ConvertConstant; #210639: unreachable FORALL/WHERE machinery
deleted from Bridge.cpp), so nothing outside these files references them
anymore.
- Delete ConvertExpr.{cpp,h}, ComponentPath.{cpp,h},
IterationSpace.{cpp,h}. (createArrayLoads/createArrayMergeStores are
declared in IterationSpace.h but were defined in ConvertExpr.cpp - they
die together; no external callers.)
- CMakeLists.txt: drop the three sources and the ConvertExpr.h /
IterationSpace.h PRECOMPILE_HEADERS entries.
- Remove stale includes (verified symbol-free): IO.cpp,
OpenMP/OpenMP.cpp, DirectivesCommon.h (ConvertExpr.h); Allocatable.cpp,
Support/Utils.cpp (IterationSpace.h).
- Support/Utils.{h,cpp}: remove the ExplicitSpaceArrayBases alias and
its getHashValue/isEqual overloads; the SomeExpr* and Component*
variants stay (live via ExprToValueMap and HLFIR lowering).
This also deletes six small Optimizer/Builder helpers whose last callers
were in ConvertExpr.cpp — fir::factory::genLenOfCharacter,
getNonDeferredLenParams, getExtentFromTriplet (FIRBuilder),
getExtentAtDimension (BoxValue), fir::factory::getRealloc
(LowLevelIntrinsics), and the genCharacterCopy template (Factory.h).
Their removal orphans nothing further; Factory.h and LowLevelIntrinsics
retain their live content.
- Docs: drop the ConvertExpr.cpp section from fstack-arrays.md and the
stale ConvertExpr.cpp TODO inventories from ParameterizedDerivedTypes.md
and ProcedurePointer.md.
No functional change: everything removed is unreachable. Downstream
forks using the deleted entry points will break at compile time; this is
intended (precedent: cc4922b27694).
Assisted-by: AI
Commit: 192d8800e186ce0f4f80fb685e27b5327bb8c4ee
https://github.com/llvm/llvm-project/commit/192d8800e186ce0f4f80fb685e27b5327bb8c4ee
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M orc-rt/lib/executor/Session.cpp
Log Message:
-----------
[orc-rt] Add comment to clarify intended control flow. NFC. (#211454)
Commit: 116dd2b7c81fc04685842cd1dbe65ae57d9bc861
https://github.com/llvm/llvm-project/commit/116dd2b7c81fc04685842cd1dbe65ae57d9bc861
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyMemIntrinsicResultsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/209959
Commit: 244d48473501cb00124d3315bd938dc1ed734cdf
https://github.com/llvm/llvm-project/commit/244d48473501cb00124d3315bd938dc1ed734cdf
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyRegStackifyPass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210224
Commit: 0f2b9a12943dfde66c1bc5720bba95a07a27c027
https://github.com/llvm/llvm-project/commit/0f2b9a12943dfde66c1bc5720bba95a07a27c027
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyRegColoringPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210225
Commit: 45ea33c65ed3c01a3f08584ffc36c53720a1bc68
https://github.com/llvm/llvm-project/commit/45ea33c65ed3c01a3f08584ffc36c53720a1bc68
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Refactor WebAssemblyExceptionInfo into Wrapper Pass
This is to match the standard style adopted by generic CodeGen analyses
like MachineBlockFrequencyInfo. This makes WebAssemblyExceptionInfo its
own class that we then get through the wrapper pass.
The primary aim of this patch is to add enough modularity such that we
can also provide this analysis through the NewPM in a follow up patch.
Reviewers: dschuff, sbc100, aheejin
Reviewed By: dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210245
Commit: 8a7cedc6b30d8adb1928f5306660ed9f412f04b6
https://github.com/llvm/llvm-project/commit/8a7cedc6b30d8adb1928f5306660ed9f412f04b6
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
A llvm/test/CodeGen/RISCV/rvv/vl-opt-licm.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
Log Message:
-----------
Reapply "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (#210937) (#211452)
This reverts commit acfaabebcfd10d4dbabeb54cf0c60509648fb82f.
The miscompile with LIFETIME_START/END markers should be fixed now
after #211179
Commit: c974ee99b34b034c8b7d233f50b07f2b77324224
https://github.com/llvm/llvm-project/commit/c974ee99b34b034c8b7d233f50b07f2b77324224
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-22 (Wed, 22 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
Log Message:
-----------
[WebAssembly] Port WebAssemblyExceptionAnalysis
Similar to the LegacyPM version, but we need to add a move constructor
to WebAssemblyExceptionInfo and set up some invalidation for the NewPM
given we don't need to invalidate if the CFG doesn't change.
Reviewers: sbc100, aheejin, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210246
Commit: ea0a8e0b8f64541398facb6f1ec534bfc534ce56
https://github.com/llvm/llvm-project/commit/ea0a8e0b8f64541398facb6f1ec534bfc534ce56
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-23 (Thu, 23 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .github/CODEOWNERS
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
A .github/workflows/compiler-rt-libc-builtins-tests.yml
M .github/workflows/containers/libc/Dockerfile
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/premerge.yaml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/require-team-membership/action.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/subscriber.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/validate-release-version/action.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
M .mailmap
M bolt/docs/BOLTAArch64OptimizationStatus.md
M bolt/docs/GettingStarted.md
A bolt/docs/NewBackend.md
M bolt/docs/index.md
M bolt/docs/profiles.md
M bolt/include/bolt/Profile/DataReader.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/lib/Profile/DataReader.cpp
M bolt/test/RISCV/reloc-tls.s
R bolt/test/X86/instrument-funcs-file.s
A bolt/test/X86/profile-symbols-mode.s
M bolt/test/X86/register-fragments-bolt-symbols.s
M clang-tools-extra/clang-tidy/add_new_check.py
M clang-tools-extra/clang-tidy/readability/NamedParameterCheck.cpp
M clang-tools-extra/clang-tidy/readability/NamedParameterCheck.h
M clang-tools-extra/clangd/CMakeLists.txt
A clang-tools-extra/clangd/LSPBinder.cpp
M clang-tools-extra/clangd/LSPBinder.h
M clang-tools-extra/docs/ReleaseNotes.rst
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M clang/include/clang/AST/OpenMPClause.h
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M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
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M clang/include/clang/Basic/ExpressionTraits.h
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M clang/include/clang/Basic/Specifiers.h
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M clang/include/clang/CIR/LowerToLLVM.h
M clang/include/clang/CIR/LoweringHelpers.h
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M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/include/clang/ExtractAPI/DeclarationFragments.h
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/include/clang/Frontend/FrontendActions.h
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M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/StaticLibrary.h
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/TUSummaryEncoding.h
A clang/include/clang/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaConcept.h
M clang/include/clang/Sema/SemaOpenMP.h
R clang/include/clang/Sema/TemplateInstCallback.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
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M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/include/module.modulemap
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtPrinter.cpp
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M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/Analysis/AnalysisDeclContext.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LiveVariables.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/ExpressionTraits.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
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M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Basic/TypeTraits.cpp
M clang/lib/CIR/CodeGen/CIRGenAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/CodeGen/EHScopeStack.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/PassDetail.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Interfaces/CIRLoopOpInterface.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Clang.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Serenity.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/ASTConsumers.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Frontend/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/CheckObjCDealloc.cpp
A clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/ReportDanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdVariantChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TraversalChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/MemRegion.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/test/AST/ast-dump-decl.cpp
A clang/test/AST/ast-dump-deleted-defaulted-range.cpp
M clang/test/AST/ast-dump-funcs.cpp
M clang/test/AST/ast-dump-record-definition-data-json.cpp
M clang/test/AST/ast-print-enum-decl.c
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/empty-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/two-function-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/lit.local.cfg
A clang/test/Analysis/Scalable/source-edit-generation/cli-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
A clang/test/Analysis/Scalable/source-edit-generation/downgradable-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
A clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-explicit-triple.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-namespace-override.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libempty.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libtwo.json
M clang/test/Analysis/Scalable/ssaf-linker/help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-create.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-time.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-verbose.test
M clang/test/Analysis/dangling-ptr-deref.cpp
M clang/test/Analysis/initializer.cpp
M clang/test/Analysis/inlining/Inputs/expected-plists/path-notes.cpp.plist
A clang/test/Analysis/issue-210183.cpp
M clang/test/Analysis/lifetime-bound.cpp
M clang/test/Analysis/logical-ops.c
M clang/test/Analysis/mig.mm
A clang/test/Analysis/std-c-library-functions-non-integral-ssize_t.cpp
M clang/test/Analysis/std-variant-checker.cpp
A clang/test/Analysis/z3/z3-bitint-arithmetic.c
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
M clang/test/C/C11/n1518.c
M clang/test/C/C23/n2836_n2939.c
M clang/test/CIR/CodeGen/anonymous-nested-init.c
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/bitfield-init-values.c
A clang/test/CIR/CodeGen/bitint-memory.c
A clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
M clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/CodeGen/builtins-x86.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64.c
A clang/test/CIR/CodeGen/loop-cond-var-cleanup.cpp
M clang/test/CIR/CodeGen/pointer-to-empty-data-member.cpp
M clang/test/CIR/CodeGen/record-with-padded-union.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
A clang/test/CIR/CodeGen/trivial-union-assign-nyi.cpp
A clang/test/CIR/CodeGen/unions-with-zero-init.cpp
M clang/test/CIR/CodeGen/var_arg.c
M clang/test/CIR/CodeGenBuiltins/X86/avx-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx-shuffle-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
A clang/test/CIR/CodeGenCUDA/builtins-nvvm-atomic.cu
A clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenHIP/target-features.hip
M clang/test/CIR/CodeGenOpenMP/omp-module-attrs.c
A clang/test/CIR/CodeGenOpenMP/target-host-op-filtering.c
A clang/test/CIR/IR/invalid-loop-cleanup.cir
A clang/test/CIR/IR/loop-cleanup.cir
M clang/test/CIR/Lowering/global-var-simple.cpp
A clang/test/CIR/Transforms/abi-lowering/byval-sret-arg-attr-lowering.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-empty-record.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-lang-addrspace-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
A clang/test/CIR/Transforms/flatten-loop-cleanup.cir
M clang/test/CMakeLists.txt
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct.default/p3.cpp
A clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general/p2.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-ldst-one.c
A clang/test/CodeGen/AArch64/neon/store.c
M clang/test/CodeGen/AArch64/poly64.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/CodeGen/SystemZ/systemz-module.flags.c
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/arm-neon-vst.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/CodeGen/call-graph-section-callback.cpp
M clang/test/CodeGen/call-graph-section-internal.cpp
M clang/test/CodeGen/call-graph-section-templates.cpp
M clang/test/CodeGen/call-graph-section-virtual-methods.cpp
M clang/test/CodeGen/call-graph-section.c
M clang/test/CodeGen/call-graph-section.cpp
M clang/test/CodeGen/linking-bitcode-postopt.cpp
A clang/test/CodeGen/ptr-subtract-stable.c
M clang/test/CodeGen/sysv_abi.c
A clang/test/CodeGen/target-avx-function-abi.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
R clang/test/CodeGenCXX/gh196469-default-member-init-lambda-cleanup.cpp
M clang/test/CodeGenCXX/pragma-followup_inner.cpp
M clang/test/CodeGenCXX/pragma-followup_outer.cpp
M clang/test/CodeGenCXX/pragma-loop-distribute.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
A clang/test/CodeGenCXX/target-avx-method-abi.cpp
A clang/test/CodeGenCoroutines/gh188230-coro-await-elidable-suspend-never-final.cpp
M clang/test/CodeGenHLSL/resources/RWBuffer-imageformat.hlsl
M clang/test/CodeGenHLSL/resources/TypedBuffers-constructor.hlsl
A clang/test/CodeGenHLSL/semantics/flat-decoration.ps.hlsl
A clang/test/CodeGenOpenCL/amdgpu-module-flag-xnack-sramecc.cl
A clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
M clang/test/CoverageMapping/default-method.cpp
A clang/test/Driver/Inputs/resource_dir/lib/cygwin/libclang_rt.builtins-x86_64.a
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-pc-windows-cygnus/libclang_rt.builtins.a
M clang/test/Driver/amdgpu-features.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/amdgpu-xnack-sramecc-flags.c
A clang/test/Driver/cygwin-print-file-name.c
A clang/test/Driver/darwin-hip-spirv-version.hip
M clang/test/Driver/darwin-target-variant-sdk-version.c
M clang/test/Driver/dxc_debug.hlsl
M clang/test/Driver/dxc_section_emission.hlsl
M clang/test/Driver/freebsd-mips-as.c
M clang/test/Driver/freebsd.c
M clang/test/Driver/hexagon-toolchain-linux.c
A clang/test/Driver/hip-fpie-option-freebsd.hip
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-features.hip
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/Driver/target-id.cl
A clang/test/ExtractAPI/availability_typedef_anonymous_record.c
A clang/test/ExtractAPI/objc_nullability.m
M clang/test/FixIt/fixit-unicode.c
M clang/test/Lexer/escape_newline_unicode.c
M clang/test/Lexer/unicode.c
M clang/test/Misc/diag-template-diffing-cxx11.cpp
A clang/test/Modules/gmf-internal-linkage-in-template.cppm
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/test/OpenMP/declare_reduction_ast_print.cpp
A clang/test/OpenMP/dims_modifier_ast_print.cpp
A clang/test/OpenMP/dims_modifier_messages.cpp
M clang/test/OpenMP/for_ast_print.cpp
M clang/test/OpenMP/ompx_bare_messages.c
A clang/test/OpenMP/openmp_offload_weak_vtables.cpp
M clang/test/OpenMP/parallel_ast_print.cpp
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/test/PCH/cxx-explicit-specifier.cpp
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
A clang/test/Parser/cxx2c-expansion-statements-non-compound-stmt-body.cpp
R clang/test/ParserHLSL/hlsl_contained_type_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_is_array_attr_error.hlsl
A clang/test/ParserHLSL/hlsl_is_ms_attr.hlsl
R clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
R clang/test/ParserHLSL/hlsl_resource_dimension_attr_error.hlsl
M clang/test/ParserHLSL/semantic_parsing.hlsl
M clang/test/Preprocessor/ucn-allowed-chars.c
M clang/test/Preprocessor/ucn-pp-identifier.c
M clang/test/Preprocessor/utf8-allowed-chars.c
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target.c
M clang/test/Sema/warn-thread-safety-analysis.c
M clang/test/SemaCXX/attr-no-specializations.cpp
M clang/test/SemaCXX/auto-cxx98.cpp
A clang/test/SemaCXX/builtin-dependent-call.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
R clang/test/SemaCXX/gh196469-default-member-init-lambda-capture.cpp
M clang/test/SemaCXX/source_location.cpp
M clang/test/SemaCXX/static-assert.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
A clang/test/SemaHLSL/Attributes/hlsl_contained_type_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_array_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_ms_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_is_rov_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_raw_buffer_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_resource_class_attr_error.hlsl
A clang/test/SemaHLSL/Attributes/hlsl_resource_dimension_attr_error.hlsl
M clang/test/SemaOpenACC/compute-construct-reduction-clause.cpp
M clang/test/SemaOpenACC/loop-construct.cpp
M clang/test/SemaTemplate/destructor-template.cpp
M clang/test/SemaTemplate/instantiate-requires-clause.cpp
M clang/test/SemaTemplate/instantiate-requires-expr.cpp
R clang/test/Templight/templight-deduced-func.cpp
R clang/test/Templight/templight-default-arg-inst.cpp
R clang/test/Templight/templight-default-func-arg.cpp
R clang/test/Templight/templight-default-template-arg.cpp
R clang/test/Templight/templight-empty-entries-fix.cpp
R clang/test/Templight/templight-exception-spec-func.cpp
R clang/test/Templight/templight-explicit-template-arg.cpp
R clang/test/Templight/templight-memoization.cpp
R clang/test/Templight/templight-nested-memoization.cpp
R clang/test/Templight/templight-nested-template-instantiation.cpp
R clang/test/Templight/templight-one-instantiation.cpp
R clang/test/Templight/templight-prior-template-arg.cpp
M clang/test/lit.cfg.py
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
M clang/tools/clang-ssaf-linker/CMakeLists.txt
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.h
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/offload-arch/AMDGPUArchByHIP.cpp
M clang/unittests/AST/SourceLocationTest.cpp
M clang/unittests/AST/StmtPrinterTest.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/CIR/CMakeLists.txt
M clang/unittests/CIR/ControlFlowTest.cpp
A clang/unittests/CIR/GetFloatingPointTypeTest.cpp
A clang/unittests/CIR/IntTypeABIAlignTest.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
A clang/unittests/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangTraitsEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
A compiler-rt/docs/ASanABI.md
R compiler-rt/docs/ASanABI.rst
A compiler-rt/docs/BuildingCompilerRT.md
R compiler-rt/docs/BuildingCompilerRT.rst
A compiler-rt/docs/TestingGuide.md
R compiler-rt/docs/TestingGuide.rst
M compiler-rt/lib/CMakeLists.txt
M compiler-rt/lib/asan/CMakeLists.txt
R compiler-rt/lib/asan/asan_ignorelist.txt
M compiler-rt/lib/cfi/CMakeLists.txt
R compiler-rt/lib/cfi/cfi_ignorelist.txt
M compiler-rt/lib/hwasan/CMakeLists.txt
R compiler-rt/lib/hwasan/hwasan_ignorelist.txt
M compiler-rt/lib/msan/CMakeLists.txt
R compiler-rt/lib/msan/msan_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/CMakeLists.txt
A compiler-rt/lib/sanitizer_ignorelists/asan_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/cfi_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/hwasan_ignorelist.txt
A compiler-rt/lib/sanitizer_ignorelists/msan_ignorelist.txt
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/mem_map_linux.cpp
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/error_info_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_mach_vm.cpp
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/profile/Linux/counter_promo_for.c
M compiler-rt/test/profile/Linux/counter_promo_while.c
M compiler-rt/test/rtsan/deduplicate_errors.cpp
M compiler-rt/test/rtsan/halt_on_error.cpp
M compiler-rt/test/rtsan/lit.cfg.py
M compiler-rt/test/rtsan/unrecognized_flags.cpp
M compiler-rt/test/sanitizer_common/android_commands/android_common.py
A compiler-rt/test/tsan/Darwin/mach_vm_deallocate_race.c
M compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
M cross-project-tests/dtlto/remote-options.test
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/CMakeLists.txt
M flang-rt/lib/cuda/allocator.cpp
M flang/docs/CMakeLists.txt
A flang/docs/CommandGuide/index.md
R flang/docs/CommandGuide/index.rst
A flang/docs/MeetingNotes/2026/2026-07-01.md
A flang/docs/MeetingNotes/2026/2026-07-15.md
M flang/docs/ParameterizedDerivedTypes.md
M flang/docs/ProcedurePointer.md
M flang/docs/fstack-arrays.md
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Lower/CUDA.h
R flang/include/flang/Lower/ComponentPath.h
M flang/include/flang/Lower/ConvertConstant.h
R flang/include/flang/Lower/ConvertExpr.h
M flang/include/flang/Lower/DirectivesCommon.h
R flang/include/flang/Lower/IterationSpace.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Lower/Support/Utils.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Factory.h
M flang/include/flang/Optimizer/Builder/LowLevelIntrinsics.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/include/flang/Optimizer/HLFIR/HLFIRDialect.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
R flang/lib/Lower/ComponentPath.cpp
M flang/lib/Lower/ConvertConstant.cpp
R flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/IO.cpp
R flang/lib/Lower/IterationSpace.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Optimizer/Analysis/ArraySectionAnalyzer.cpp
M flang/lib/Optimizer/Builder/BoxValue.cpp
M flang/lib/Optimizer/Builder/Character.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/LowLevelIntrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIRDialect.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocDelay.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Driver/fakeflang.F
M flang/test/Driver/linker-options.f90
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor.f90
A flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
A flang/test/Fir/CUDA/cuda-device-global-cycle.fir
M flang/test/Fir/FirToSCF/do-loop.fir
A flang/test/Fir/OpenACC/acc-declare-gpu-module-insertion.fir
M flang/test/Fir/array-coor-canonicalization.fir
M flang/test/Fir/basic-program.fir
A flang/test/Fir/box-dims-folding.fir
M flang/test/Fir/boxaddr-folding.fir
A flang/test/Fir/create-box-codegen.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
M flang/test/Fir/loop01.fir
M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
A flang/test/HLFIR/bufferize-conditional.fir
M flang/test/HLFIR/invalid.fir
M flang/test/HLFIR/optional_dummy.f90
A flang/test/Integration/OpenMP/declare-target-funcs.f90
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M flang/test/Integration/ivdep.f90
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-derived.cuf
A flang/test/Lower/CUDA/cuda-gpu-unified.cuf
R flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/HLFIR/conditional-expr.f90
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/MIF/change_team2.f90
M flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-terminator.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/interop-construct.f90
A flang/test/Lower/OpenMP/Todo/interop-prefer-type-selector-list.f90
A flang/test/Lower/OpenMP/Todo/interop-prefer-type-unknown-fr.f90
A flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
A flang/test/Lower/OpenMP/collapse-labeled-do-host-eval.f90
A flang/test/Lower/OpenMP/collapse-loop-transform.f90
A flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/depend-iterator.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
A flang/test/Lower/OpenMP/implicit-map-flat-allocatable-no-mapper.f90
M flang/test/Lower/OpenMP/implicit-map-pointer-no-default-mapper.f90
A flang/test/Lower/OpenMP/interop.f90
M flang/test/Lower/OpenMP/loop-compound.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
A flang/test/Lower/OpenMP/reduction-array-section.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/task-affinity.f90
M flang/test/Lower/OpenMP/unstructured.f90
A flang/test/Lower/OpenMP/wsloop-computed-goto.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
A flang/test/Lower/OpenMP/wsloop-select-case.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/branching-directive.f90
M flang/test/Lower/call-copy-in-out.f90
A flang/test/Lower/common-block-derived-initialization.f90
M flang/test/Lower/components.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_loop.f90
A flang/test/Lower/do_loop_execute_region_wrap.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/fail_image.f90
A flang/test/Lower/global-initialization-parens.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/identical-block-merge-disable.f90
A flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/ifconvert.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/ivdep.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Lower/pointer-assignments.f90
A flang/test/Lower/pre-fir-tree-assigned-goto.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/variable-inquiries.f90
M flang/test/Lower/while_loop.f90
M flang/test/Parser/acc-unparse.f90
M flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
A flang/test/Semantics/OpenACC/acc-routine-generic.f90
A flang/test/Semantics/OpenMP/declare-variant-restriction.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
A flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
A flang/test/Semantics/OpenMP/interop-construct-v60.f90
A flang/test/Semantics/OpenMP/interop-prefer-type.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
A flang/test/Semantics/OpenMP/teams_loop.f90
M flang/test/Transforms/CUF/cuf-alloc-delay.fir
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-create-box.fir
M flang/tools/fakeflang/fakeflang.cpp
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/math/index.rst
R libc/docs/headers/time.rst
M libc/fuzzing/stdio/CMakeLists.txt
M libc/fuzzing/stdio/printf_parser_fuzz.cpp
M libc/hdr/CMakeLists.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_group_req.h
A libc/hdr/types/struct_group_source_req.h
M libc/include/CMakeLists.txt
A libc/include/langinfo.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/langinfo-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/nl_item.h
A libc/include/llvm-libc-types/struct_group_req.h
A libc/include/llvm-libc-types/struct_group_source_req.h
M libc/include/llvm-libc-types/struct_sockaddr_storage.h
M libc/include/math.yaml
M libc/include/netinet/in.yaml
M libc/shared/math.h
A libc/shared/math/lgammaf16.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/type_traits/is_floating_point.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/FPUtil/cast.h
M libc/src/__support/FPUtil/dyadic_float.h
A libc/src/__support/FPUtil/float128.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/OSUtil/linux/CMakeLists.txt
M libc/src/__support/OSUtil/linux/auxv.h
M libc/src/__support/macros/properties/types.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/hypot.h
A libc/src/__support/math/lgammaf16.h
A libc/src/__support/printf_core/CMakeLists.txt
A libc/src/__support/printf_core/char_converter.h
A libc/src/__support/printf_core/converter.h
A libc/src/__support/printf_core/converter_atlas.h
A libc/src/__support/printf_core/converter_utils.h
A libc/src/__support/printf_core/core_structs.h
A libc/src/__support/printf_core/error_mapper.h
A libc/src/__support/printf_core/fixed_converter.h
A libc/src/__support/printf_core/float_dec_converter.h
A libc/src/__support/printf_core/float_dec_converter_limited.h
A libc/src/__support/printf_core/float_hex_converter.h
A libc/src/__support/printf_core/float_impl.cpp
A libc/src/__support/printf_core/float_inf_nan_converter.h
A libc/src/__support/printf_core/generic/CMakeLists.txt
A libc/src/__support/printf_core/generic/error_mapper.h
A libc/src/__support/printf_core/int_converter.h
A libc/src/__support/printf_core/linux/CMakeLists.txt
A libc/src/__support/printf_core/linux/error_mapper.h
A libc/src/__support/printf_core/parser.h
A libc/src/__support/printf_core/printf_config.h
A libc/src/__support/printf_core/printf_main.h
A libc/src/__support/printf_core/ptr_converter.h
A libc/src/__support/printf_core/strerror_converter.h
A libc/src/__support/printf_core/string_converter.h
A libc/src/__support/printf_core/vasprintf_internal.h
A libc/src/__support/printf_core/vfprintf_internal.h
A libc/src/__support/printf_core/write_int_converter.h
A libc/src/__support/printf_core/write_modes.def
A libc/src/__support/printf_core/writer.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/err/CMakeLists.txt
M libc/src/err/report.cpp
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/lgammaf16.cpp
A libc/src/math/lgammaf16.h
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/semaphore/linux/CMakeLists.txt
M libc/src/semaphore/linux/named_semaphore.cpp
M libc/src/semaphore/linux/semaphore.h
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/asprintf.cpp
M libc/src/stdio/asprintf_modular.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/vfprintf_internal.h
M libc/src/stdio/generic/CMakeLists.txt
M libc/src/stdio/generic/fprintf.cpp
M libc/src/stdio/generic/printf.cpp
M libc/src/stdio/generic/vfprintf.cpp
M libc/src/stdio/generic/vprintf.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/stdio/linux/stdin.cpp
M libc/src/stdio/linux/stdout.cpp
R libc/src/stdio/printf_core/CMakeLists.txt
R libc/src/stdio/printf_core/char_converter.h
R libc/src/stdio/printf_core/converter.h
R libc/src/stdio/printf_core/converter_atlas.h
R libc/src/stdio/printf_core/converter_utils.h
R libc/src/stdio/printf_core/core_structs.h
R libc/src/stdio/printf_core/error_mapper.h
R libc/src/stdio/printf_core/fixed_converter.h
R libc/src/stdio/printf_core/float_dec_converter.h
R libc/src/stdio/printf_core/float_dec_converter_limited.h
R libc/src/stdio/printf_core/float_hex_converter.h
R libc/src/stdio/printf_core/float_impl.cpp
R libc/src/stdio/printf_core/float_inf_nan_converter.h
R libc/src/stdio/printf_core/generic/CMakeLists.txt
R libc/src/stdio/printf_core/generic/error_mapper.h
R libc/src/stdio/printf_core/int_converter.h
R libc/src/stdio/printf_core/linux/CMakeLists.txt
R libc/src/stdio/printf_core/linux/error_mapper.h
R libc/src/stdio/printf_core/parser.h
R libc/src/stdio/printf_core/printf_config.h
R libc/src/stdio/printf_core/printf_main.h
R libc/src/stdio/printf_core/ptr_converter.h
R libc/src/stdio/printf_core/strerror_converter.h
R libc/src/stdio/printf_core/string_converter.h
R libc/src/stdio/printf_core/vasprintf_internal.h
R libc/src/stdio/printf_core/vfprintf_internal.h
R libc/src/stdio/printf_core/write_int_converter.h
R libc/src/stdio/printf_core/write_modes.def
R libc/src/stdio/printf_core/writer.h
M libc/src/stdio/snprintf.cpp
M libc/src/stdio/snprintf_modular.cpp
M libc/src/stdio/sprintf.cpp
M libc/src/stdio/sprintf_modular.cpp
M libc/src/stdio/vasprintf.cpp
M libc/src/stdio/vasprintf_modular.cpp
M libc/src/stdio/vsnprintf.cpp
M libc/src/stdio/vsnprintf_modular.cpp
M libc/src/stdio/vsprintf.cpp
M libc/src/stdio/vsprintf_modular.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/linux/CMakeLists.txt
M libc/src/stdlib/linux/realpath.cpp
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/sys/ipc/linux/CMakeLists.txt
M libc/src/sys/ipc/linux/ftok.cpp
R libc/src/sys/ipc/linux/kernel_statx.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_unlink.cpp
M libc/src/sys/time/linux/CMakeLists.txt
M libc/src/sys/time/linux/utimes.cpp
M libc/src/time/CMakeLists.txt
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/composite_converter.h
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
M libc/src/time/strftime_core/strftime_main.h
M libc/src/time/strftime_l.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
M libc/startup/linux/x86_64/tls.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/FEnvSafeTest.cpp
M libc/test/UnitTest/FPExceptMatcher.cpp
M libc/test/UnitTest/FPMatcher.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/PrintfMatcher.h
M libc/test/UnitTest/RoundingModeUtils.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/FPUtil/CMakeLists.txt
A libc/test/src/__support/FPUtil/float128_test.cpp
A libc/test/src/__support/printf_core/CMakeLists.txt
A libc/test/src/__support/printf_core/converter_test.cpp
A libc/test/src/__support/printf_core/parser_test.cpp
A libc/test/src/__support/printf_core/writer_test.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RoundToIntegerTest.h
A libc/test/src/math/lgammaf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/CanonicalizeTest.h
M libc/test/src/math/smoke/FModTest.h
M libc/test/src/math/smoke/NearbyIntTest.h
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/test/src/math/smoke/hypot_test.cpp
A libc/test/src/math/smoke/lgammaf16_test.cpp
M libc/test/src/netinet/CMakeLists.txt
M libc/test/src/netinet/in_test.cpp
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
M libc/test/src/stdfix/DiviFxTest.h
M libc/test/src/stdio/CMakeLists.txt
R libc/test/src/stdio/printf_core/CMakeLists.txt
R libc/test/src/stdio/printf_core/converter_test.cpp
R libc/test/src/stdio/printf_core/parser_test.cpp
R libc/test/src/stdio/printf_core/writer_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/connect_accept_test.cpp
M libc/test/src/sys/socket/linux/listen_test.cpp
M libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
M libc/test/src/sys/socket/linux/sockatmark_test.cpp
M libc/test/src/sys/socket/linux/socket_test_support.h
M libc/test/src/sys/socket/linux/sockname_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
A libc/utils/docgen/time.yaml
M libclc/clc/lib/generic/math/clc_sincos_helpers.cl
M libclc/clc/lib/generic/math/clc_sincos_helpers.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp16.inc
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp64.inc
M libclc/clc/lib/generic/math/clc_trigpi_helpers.cl
M libclc/clc/lib/generic/math/clc_trigpi_helpers.inc
M libclc/test/math/cos.cl
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/docs/conf.py
M libcxx/include/__algorithm/comp.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__atomic/support.h
M libcxx/include/__atomic/support/c11.h
M libcxx/include/__atomic/support/gcc.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__configuration/namespace.h
M libcxx/include/__functional/function.h
M libcxx/include/__numeric/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__ranges/lazy_split_view.h
M libcxx/include/__utility/cmp.h
M libcxx/include/__vector/layout.h
M libcxx/include/__vector/vector.h
M libcxx/include/atomic
M libcxx/include/system_error
M libcxx/include/version
M libcxx/modules/std/atomic.inc
M libcxx/src/include/overridable_function.h
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
M libcxx/test/CMakeLists.txt
M libcxx/test/benchmarks/algorithms/lexicographical_compare_three_way.bench.cpp
M libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
M libcxx/test/benchmarks/containers/string.bench.cpp
M libcxx/test/configs/amdgpu-libc++-shared.cfg.in
M libcxx/test/configs/apple-libc++-shared.cfg.in
M libcxx/test/configs/apple-libc++-system.cfg.in
M libcxx/test/configs/armv7m-picolibc-libc++.cfg.in
R libcxx/test/configs/cmake-bridge.cfg.in
A libcxx/test/configs/harness-configuration.cfg.in
M libcxx/test/configs/ibm-libc++-shared.cfg.in
A libcxx/test/configs/libcxx-substitutions.cfg.in
A libcxx/test/configs/lit.site.cfg.in
M libcxx/test/configs/llvm-libc++-android.cfg.in
M libcxx/test/configs/llvm-libc++-llvm-libc.cfg.in
M libcxx/test/configs/llvm-libc++-mingw.cfg.in
M libcxx/test/configs/llvm-libc++-shared-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-shared-gcc.cfg.in
M libcxx/test/configs/llvm-libc++-shared-no-vcruntime-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-shared.cfg.in
M libcxx/test/configs/llvm-libc++-static-clangcl.cfg.in
M libcxx/test/configs/llvm-libc++-static.cfg.in
M libcxx/test/configs/nvptx-libc++-shared.cfg.in
M libcxx/test/configs/stdlib-libstdc++.cfg.in
M libcxx/test/configs/stdlib-native.cfg.in
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/allocation_size.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
A libcxx/test/libcxx/containers/sequences/vector/incomplete_type.compile.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.enumerate/nodiscard.verify.cpp
M libcxx/test/libcxx/text/text_encoding/environment.pass.cpp
M libcxx/test/libcxx/type_traits/desugars_to.compile.pass.cpp
A libcxx/test/selftest/if-else.sh.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.all_of/all_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.any_of/any_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.none_of/none_of.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
A libcxx/test/std/atomics/atomics.ref/fetch_max.pass.cpp
A libcxx/test/std/atomics/atomics.ref/fetch_min.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_max.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_max_explicit.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_min.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_min_explicit.pass.cpp
M libcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.distance/iterator_sentinel.pass.cpp
R libcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.distance/lwg3664.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/atomic.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/numerics/numeric.ops/adjacent.difference/pstl.adjacent_difference.pass.cpp
A libcxx/test/std/numerics/numeric.ops/adjacent.difference/pstl.adjacent_difference_op.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating.bitint.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/helpers.h
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/iterator/member_types.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.elements/iterator/base.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.elements/sentinel/ctor.convert.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.transform/iterator/sentinel.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.transform/sentinel/sentinel.pass.cpp
A libcxx/test/support/atomic_fetch_max_helper.h
A libcxx/test/support/atomic_fetch_min_helper.h
A libcxx/test/support/runway_sample.h
A libcxx/test/support/test.support/runway_sample.pass.cpp
M libcxx/utils/ci/images/libcxx_release_runners.txt
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/format.py
M libcxx/utils/test-at-commit
M libcxxabi/include/cxxabi.h
M libsycl/CMakeLists.txt
A libsycl/docs/CodingGuidelines.md
R libsycl/docs/CodingGuidelines.rst
A libsycl/docs/index.md
R libsycl/docs/index.rst
M libsycl/src/event.cpp
M libsycl/test/README.md
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/lit.cfg.py
M libsycl/test/usm/alloc_functions.cpp
M libsycl/unittests/event/event.cpp
A libunwind/docs/BuildingLibunwind.md
R libunwind/docs/BuildingLibunwind.rst
M libunwind/docs/conf.py
A libunwind/docs/index.md
R libunwind/docs/index.rst
M libunwind/include/__libunwind_config.h
M libunwind/src/DwarfInstructions.hpp
M libunwind/src/DwarfParser.hpp
M libunwind/src/UnwindCursor.hpp
M libunwind/src/UnwindRegistersSave.S
M libunwind/test/CMakeLists.txt
A libunwind/test/aix_vapi_signal_unwind.pass.cpp
A libunwind/test/aix_vapi_unw_resume.pass.cpp
M libunwind/test/configs/cmake-bridge.cfg.in
A libunwind/test/ra_sign_state.pass.cpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/LTO.cpp
M lld/COFF/LTO.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/ELF/Relocations.h
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
M lld/ELF/Symbols.cpp
A lld/test/COFF/link-dll-arm64x.s
M lld/test/ELF/amdgpu-abi-version-err.s
M lld/test/ELF/amdgpu-abi-version.s
M lld/test/ELF/amdgpu-duplicate-sym.s
M lld/test/ELF/amdgpu-elf-flags-err.s
M lld/test/ELF/amdgpu-elf-flags.s
M lld/test/ELF/amdgpu-globals.s
M lld/test/ELF/amdgpu-relocs.s
M lld/test/ELF/amdgpu-relocs2.s
M lld/test/ELF/amdgpu-tid.s
M lld/test/ELF/emulation-amdgpu.s
M lld/test/ELF/lto/amdgcn-oses.ll
A lld/test/ELF/lto/amdgpu.ll
M lld/test/ELF/riscv-feature-zicfilp-unlabeled.s
M lld/test/ELF/version-script-symver-extern.s
M lld/test/ELF/version-script-symver.s
A lld/test/wasm/relocatable-segment-flags.s
M lld/wasm/OutputSegment.cpp
M lldb/bindings/interfaces.swig
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/CMakeLists.txt
M lldb/docs/index.md
A lldb/docs/resources/addingtargetsupport.md
M lldb/docs/resources/lldbgdbremote.md
M lldb/docs/use/variable.md
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
A lldb/examples/python/templates/scripted_stackframe_recognizer.py
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBProtocolServer.h
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/Core/Diagnostics.h
M lldb/include/lldb/Core/ModuleSpec.h
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/Host/common/DomainSocket.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStackFrameRecognizerInterface.h
M lldb/include/lldb/Interpreter/OptionValue.h
M lldb/include/lldb/Interpreter/OptionValueArch.h
M lldb/include/lldb/Interpreter/OptionValueArray.h
M lldb/include/lldb/Interpreter/OptionValueBoolean.h
M lldb/include/lldb/Interpreter/OptionValueChar.h
M lldb/include/lldb/Interpreter/OptionValueDictionary.h
M lldb/include/lldb/Interpreter/OptionValueEnumeration.h
M lldb/include/lldb/Interpreter/OptionValueFileColonLine.h
M lldb/include/lldb/Interpreter/OptionValueFileSpec.h
M lldb/include/lldb/Interpreter/OptionValueFileSpecList.h
M lldb/include/lldb/Interpreter/OptionValueFormat.h
M lldb/include/lldb/Interpreter/OptionValueFormatEntity.h
M lldb/include/lldb/Interpreter/OptionValueLanguage.h
M lldb/include/lldb/Interpreter/OptionValuePathMappings.h
M lldb/include/lldb/Interpreter/OptionValueProperties.h
M lldb/include/lldb/Interpreter/OptionValueRegex.h
M lldb/include/lldb/Interpreter/OptionValueSInt64.h
M lldb/include/lldb/Interpreter/OptionValueString.h
M lldb/include/lldb/Interpreter/OptionValueUInt64.h
M lldb/include/lldb/Interpreter/OptionValueUUID.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectSynthetic.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/source/API/CMakeLists.txt
M lldb/source/API/SBAddressRangeList.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
A lldb/source/API/SBProtocolServer.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointLocationList.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Breakpoint/Watchpoint.cpp
M lldb/source/Breakpoint/WatchpointList.cpp
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Commands/CommandObjectHelp.cpp
M lldb/source/Commands/CommandObjectPlatform.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Commands/CommandOptionArgumentTable.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Diagnostics.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandler.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Core/SearchFilter.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/source/DataFormatters/FormattersHelpers.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/DataFormatters/TypeCategory.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Host/common/DomainSocket.cpp
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Interpreter/CommandAlias.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Interpreter/OptionArgParser.cpp
M lldb/source/Interpreter/OptionValue.cpp
M lldb/source/Interpreter/OptionValueBoolean.cpp
M lldb/source/Interpreter/OptionValueFileSpecList.cpp
M lldb/source/Interpreter/OptionValueFormatEntity.cpp
M lldb/source/Interpreter/OptionValueLanguage.cpp
M lldb/source/Interpreter/OptionValuePathMappings.cpp
M lldb/source/Interpreter/OptionValueProperties.cpp
M lldb/source/Interpreter/OptionValueRegex.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Interpreter/embedded_interpreter.py
M lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntime.cpp
R lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
R lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/CMakeLists.txt
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_x86.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Plugins/TraceExporter/common/TraceHTR.h
A lldb/source/Plugins/TraceExporter/docs/htr.md
R lldb/source/Plugins/TraceExporter/docs/htr.rst
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/LanguageRuntime.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetList.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanBase.cpp
M lldb/source/Target/ThreadPlanCallFunction.cpp
M lldb/source/Target/ThreadPlanCallFunctionUsingABI.cpp
M lldb/source/Target/ThreadPlanCallUserExpression.cpp
M lldb/source/Target/ThreadPlanRunToAddress.cpp
M lldb/source/Target/ThreadPlanStack.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepInstruction.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Target/ThreadPlanStepThrough.cpp
M lldb/source/Target/ThreadPlanStepUntil.cpp
M lldb/source/Target/ThreadPlanTracer.cpp
M lldb/source/Utility/Event.cpp
M lldb/source/Utility/ProcessInfo.cpp
M lldb/source/Utility/StructuredData.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/recognizer.py
M lldb/test/API/commands/gui/spawn-threads/TestGuiSpawnThreads.py
M lldb/test/API/commands/memory/read/TestMemoryRead.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/TestWasHit.py
M lldb/test/API/functionalities/builtin-debugtrap/TestBuiltinDebugTrap.py
M lldb/test/API/functionalities/data-formatter/builtin-formats/TestBuiltinFormats.py
M lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSBundle.py
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
A lldb/test/API/functionalities/gdb_remote_client/TestQSymbol.py
A lldb/test/API/functionalities/gdb_remote_client/test_qsymbol.yaml
M lldb/test/API/functionalities/memory/find/TestMemoryFind.py
A lldb/test/API/functionalities/scripting_extension_generate/Makefile
A lldb/test/API/functionalities/scripting_extension_generate/TestScriptingExtensionGenerate.py
A lldb/test/API/functionalities/scripting_extension_generate/main.c
M lldb/test/API/functionalities/thread/finish-from-empty-func/TestEmptyFuncThreadStepOut.py
M lldb/test/API/functionalities/thread/finish-from-empty-func/main.c
M lldb/test/API/functionalities/thread/state/TestThreadStates.py
M lldb/test/API/lang/cpp/char1632_t/TestChar1632T.py
A lldb/test/API/lang/cpp/enum-limits/Makefile
A lldb/test/API/lang/cpp/enum-limits/TestCPPEnumLimits.py
A lldb/test/API/lang/cpp/enum-limits/main.cpp
M lldb/test/API/lang/cpp/global_operators/TestCppGlobalOperators.py
M lldb/test/API/lang/cpp/static_members/TestCPPStaticMembers.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/simulator/hello.cpp
M lldb/test/API/python_api/exprpath_register/TestExprPathRegisters.py
M lldb/test/API/python_api/process/address-masks/TestAddressMasks.py
M lldb/test/API/python_api/process/read-mem-cstring/TestReadMemCString.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic/TestSBValueSetTypeSynthetic.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/library_support.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/main.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/foo_bar_synths.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/main.cpp
M lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/commands/TestDAP_commands.py
M lldb/test/API/tools/lldb-dap/completions/TestDAP_completions.py
A lldb/test/API/tools/lldb-dap/eventStatistic/TestDAP_eventStatistic.py
R lldb/test/API/tools/lldb-dap/eventStatistic/TestVSCode_eventStatistic.py
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
M lldb/test/API/tools/lldb-dap/invalidated-event/TestDAP_invalidatedEvent.py
M lldb/test/API/tools/lldb-dap/send-event/TestDAP_sendEvent.py
M lldb/test/API/tools/lldb-dap/stopped-events/TestDAP_stopped_events.py
M lldb/test/API/tools/lldb-dap/terminated-event/TestDAP_terminatedEvent.py
M lldb/test/API/tools/lldb-server/apple-simulator/TestAppleSimulatorOSType.py
A lldb/test/Shell/Diagnostics/TestDiagnosticsCollectBinaries.test
A lldb/test/Shell/SymbolFile/DWARF/wasm-data-symbol.yaml
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit
M lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
A lldb/test/Shell/SymbolFile/NativePDB/static-class-constants.cpp
M lldb/tools/lldb-dap/extension/src/debug-configuration-provider.ts
M lldb/tools/lldb-mcp/CMakeLists.txt
M lldb/tools/lldb-mcp/Multiplexer.cpp
M lldb/tools/lldb-mcp/Multiplexer.h
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBProtocolServerTest.cpp
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/DiagnosticsTest.cpp
M lldb/unittests/Core/DumpDataExtractorTest.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/CMakeLists.txt
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
A lldb/unittests/Process/gdb-remote/ProcessGDBRemoteTest.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M lldb/unittests/Symbol/JSONSymbolTest.cpp
M lldb/unittests/Symbol/SymbolTest.cpp
M lldb/unittests/Utility/UriParserTest.cpp
M lldb/unittests/tools/lldb-mcp/MultiplexerTest.cpp
A llvm-libgcc/docs/LLVMLibgcc.md
R llvm-libgcc/docs/LLVMLibgcc.rst
M llvm-libgcc/generate_version_script.py
M llvm/CMakeLists.txt
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/ImmutableMergeBM.cpp
M llvm/cmake/modules/CrossCompile.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/cmake/modules/LLVMProcessSources.cmake
A llvm/docs/AArch64SME.md
R llvm/docs/AArch64SME.rst
A llvm/docs/AMDGPUAsyncOperations.md
R llvm/docs/AMDGPUAsyncOperations.rst
M llvm/docs/AMDGPUDMAOperations.md
A llvm/docs/AMDGPUExecutionSynchronization.md
R llvm/docs/AMDGPUExecutionSynchronization.rst
A llvm/docs/AMDGPUMemoryModel.md
R llvm/docs/AMDGPUMemoryModel.rst
M llvm/docs/AMDGPUUsage.rst
A llvm/docs/AddingConstrainedIntrinsics.md
R llvm/docs/AddingConstrainedIntrinsics.rst
A llvm/docs/AdminTasks.md
R llvm/docs/AdminTasks.rst
A llvm/docs/BigEndianNEON.md
R llvm/docs/BigEndianNEON.rst
M llvm/docs/CommandGuide/lit.rst
A llvm/docs/CompileCudaWithLLVM.md
R llvm/docs/CompileCudaWithLLVM.rst
M llvm/docs/Coroutines.md
A llvm/docs/DebuggingJITedCode.md
R llvm/docs/DebuggingJITedCode.rst
M llvm/docs/DeveloperPolicy.md
A llvm/docs/DirectX/SemanticSignatures.md
M llvm/docs/DirectXUsage.rst
A llvm/docs/ExtendingLLVM.md
R llvm/docs/ExtendingLLVM.rst
M llvm/docs/Frontend/PerformanceTips.md
A llvm/docs/HowToBuildWindowsItaniumPrograms.md
R llvm/docs/HowToBuildWindowsItaniumPrograms.rst
A llvm/docs/HowToCrossCompileBuiltinsOnArm.md
R llvm/docs/HowToCrossCompileBuiltinsOnArm.rst
A llvm/docs/HowToUpdateDebugInfo.md
R llvm/docs/HowToUpdateDebugInfo.rst
A llvm/docs/Instrumentor.md
R llvm/docs/Instrumentor.rst
A llvm/docs/JITLink.md
R llvm/docs/JITLink.rst
M llvm/docs/LangRef.md
A llvm/docs/MCJITDesignAndImplementation.md
R llvm/docs/MCJITDesignAndImplementation.rst
A llvm/docs/NVPTXUsage.md
R llvm/docs/NVPTXUsage.rst
A llvm/docs/ORCv2.md
R llvm/docs/ORCv2.rst
M llvm/docs/ReleaseNotes.md
A llvm/docs/Remarks.md
R llvm/docs/Remarks.rst
A llvm/docs/SPIRVUsage.md
R llvm/docs/SPIRVUsage.rst
M llvm/docs/TestingGuide.md
M llvm/docs/WritingAnLLVMPass.md
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/ADT/Eytzinger.h
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/ADT/ImmutableMap.h
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/include/llvm/ADT/Sequence.h
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/ConstraintSystem.h
M llvm/include/llvm/Analysis/LazyBranchProbabilityInfo.h
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/include/llvm/Analysis/MemorySSAUpdater.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CFIInstBuilder.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/RDFGraph.h
M llvm/include/llvm/CodeGen/RegisterClassInfo.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/IR/AutoUpgrade.h
M llvm/include/llvm/IR/CycleInfo.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/RuntimeLibcallsImpl.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/MC/MCDXContainerWriter.h
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCSchedule.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/ObjectYAML/BBAddrMapYAML.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/Parallel.h
M llvm/include/llvm/Support/PerThreadBumpPtrAllocator.h
M llvm/include/llvm/Support/SourceMgr.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/include/llvm/Transforms/Scalar.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
A llvm/include/llvm/Transforms/Scalar/LogicalSROA.h
M llvm/include/llvm/Transforms/Scalar/LoopUnrollPass.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/include/llvm/Transforms/Utils/UnrollLoop.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/LazyBranchProbabilityInfo.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/OptimizationRemarkEmitter.cpp
M llvm/lib/Analysis/PHITransAddr.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/BranchRelaxation.cpp
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/CodeGen/DetectDeadLanes.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/CodeGen/FEntryInserter.cpp
M llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/IfConversion.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/KCFI.cpp
M llvm/lib/CodeGen/LibcallLoweringInfo.cpp
M llvm/lib/CodeGen/LiveRangeShrink.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineLateInstrsCleanup.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PatchableFunction.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PostRASchedulerList.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/ProcessImplicitDefs.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/lib/CodeGen/RemoveRedundantDebugValues.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TailDuplication.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/DTLTO/CMakeLists.txt
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
M llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
M llvm/lib/DWARFLinker/Parallel/DependencyTracker.h
M llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
M llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFUnwindTable.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/CycleInfo.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCSFrame.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/ObjectYAML/BBAddrMapYAML.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/Allocator.cpp
M llvm/lib/Support/KnownBits.cpp
M llvm/lib/Support/LSP/Transport.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Support/SourceMgr.cpp
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Z3Solver.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp
A llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
M llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
M llvm/lib/Target/AArch64/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/AArch64SRLTDefineSuperRegs.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
M llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
R llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/A15SDOptimizer.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/ARM/MLxExpansionPass.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
M llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.td
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXContainerPDB.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
M llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/lib/Target/SPIRV/SPIRVFinalizeShaderLinkage.cpp
A llvm/lib/Target/SPIRV/SPIRVFinalizeShaderLinkage.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPassRegistry.def
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
M llvm/lib/Target/X86/X86CallFrameOptimization.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86DynAllocaExpander.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrTBM.td
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/Target/X86/X86SuppressAPXForReloc.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TargetParser/XtensaTargetParser.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Coroutines/CoroElide.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/PartialInlining.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/CMakeLists.txt
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/lib/Transforms/Scalar/LogicalSROA.cpp
M llvm/lib/Transforms/Scalar/LoopDeletion.cpp
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopPredication.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
A llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
A llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/BasicAA/atomics.ll
M llvm/test/Analysis/BranchProbabilityInfo/loop.ll
M llvm/test/Analysis/CostModel/AArch64/abs.ll
M llvm/test/Analysis/CostModel/AArch64/ctpop.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ctpop.ll
M llvm/test/Analysis/CostModel/AArch64/sve-div.ll
M llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
M llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
M llvm/test/Analysis/CostModel/AMDGPU/insertelement.ll
M llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
M llvm/test/Analysis/CostModel/X86/reduce-add.ll
M llvm/test/Analysis/CostModel/X86/reduce-fadd.ll
M llvm/test/Analysis/CycleInfo/basic.ll
A llvm/test/Analysis/Delinearization/multidim_pointer_addrspace.ll
M llvm/test/Analysis/DotMachineCFG/AMDGPU/functions.mir
M llvm/test/Analysis/DotMachineCFG/AMDGPU/irreducible.mir
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Analysis/Lint/const-store.ll
A llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
M llvm/test/Analysis/LoopAccessAnalysis/pr64637.ll
M llvm/test/Analysis/MemorySSA/ptr-const-mem.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
M llvm/test/Analysis/ScalarEvolution/ptrtoint.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/atomics.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-loop-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/branch-outside-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/diverged-entry-basic-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/exit-divergence-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/irreducible/irreducible-2-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/join-loopexit-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/loads-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/hidden-diverge.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/deprecated/irreducible-1.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/irreducible-2.ll
M llvm/test/Assembler/amdgpu-image-atomic-attributes.ll
M llvm/test/Assembler/atomic.ll
R llvm/test/Assembler/invalid-atomicrmw-xchg-fp-vector.ll
A llvm/test/Assembler/invalid-atomicrmw-xchg.ll
M llvm/test/Bitcode/DIGlobalVariableExpression.ll
M llvm/test/Bitcode/DIGlobalVariableExpression2.ll
M llvm/test/Bitcode/compatibility.ll
A llvm/test/Bitcode/upgrade-loop-distribute-enable.ll
A llvm/test/Bitcode/upgrade-loop-distribute-enable.ll.bc
A llvm/test/CodeGen/AArch64/GlobalISel/combine-ctlz-cttz-zero-poison.mir
M llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-maxdepth.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vashr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/alias_mask.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable.ll
M llvm/test/CodeGen/AArch64/alias_mask_scalable_nosve2.ll
M llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog.ll
M llvm/test/CodeGen/AArch64/branch-relax-cross-section.mir
A llvm/test/CodeGen/AArch64/branch-relax-tbz.mir
M llvm/test/CodeGen/AArch64/bsl.ll
M llvm/test/CodeGen/AArch64/combine-storetomstore.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
A llvm/test/CodeGen/AArch64/fptoi-nan-guard-fold.ll
M llvm/test/CodeGen/AArch64/imm-splat-ops.ll
A llvm/test/CodeGen/AArch64/load-combine-masked.ll
A llvm/test/CodeGen/AArch64/macho-weak-alias.ll
A llvm/test/CodeGen/AArch64/merge-loads-feeding-as-shuffleops.ll
M llvm/test/CodeGen/AArch64/pr166870.ll
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
M llvm/test/CodeGen/AArch64/scalable_masked_interleaved_stores.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/test/CodeGen/AArch64/smul_fix.ll
M llvm/test/CodeGen/AArch64/smul_fix_sat.ll
R llvm/test/CodeGen/AArch64/sve-coalesce-ptrue-intrinsics.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-partial-reduce.ll
M llvm/test/CodeGen/AArch64/sve-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-ldst-zext.ll
A llvm/test/CodeGen/AArch64/sve-multivector-load-stores.ll
R llvm/test/CodeGen/AArch64/sve-multivector-loads.ll
A llvm/test/CodeGen/AArch64/sve-ptrue-coalesce.mir
M llvm/test/CodeGen/AArch64/sve-vector-compress.ll
M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll
M llvm/test/CodeGen/AArch64/umul_fix.ll
M llvm/test/CodeGen/AArch64/umul_fix_sat.ll
A llvm/test/CodeGen/AArch64/vecreduce-mul-constant-fold.ll
A llvm/test/CodeGen/AArch64/vector-deinterleave-load.ll
A llvm/test/CodeGen/AArch64/vector-interleave-store.ll
A llvm/test/CodeGen/AArch64/vselect-masked-shift.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-cse-leaves-dead-cast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-binop-s64-with-s32-mask.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ctlz-cttz-zero-poison-disable-rule.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ctlz-cttz-zero-poison.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin3-fmax3-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs-err.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctls.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-poison.mir
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M llvm/test/CodeGen/AMDGPU/ctlz.ll
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M llvm/test/CodeGen/AMDGPU/fold-imm-pk64.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
A llvm/test/CodeGen/AMDGPU/fptoi-nan-guard-fold.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
A llvm/test/CodeGen/AMDGPU/fshl-illegal-types.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
A llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma-fake16.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx902-without-xnack.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
M llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/issue196582-late-codegenprepare-crash-non-po2.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/limit-soft-clause-reg-pressure.mir
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.illegal-data-type.err.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx13.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.illegal-data-type.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load-exported.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.async.tensor.ll
R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/ba9fb078b613...ea0a8e0b8f64
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