[all-commits] [llvm/llvm-project] 12e6cd: [PPC] Constrain register in VSPLT of XXSLDWI trans...

[Nikita Popov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 12e6cd9ea166b0ed09c83aae42cb83231461f6f2
      https://github.com/llvm/llvm-project/commit/12e6cd9ea166b0ed09c83aae42cb83231461f6f2
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2026-07-22 (Wed, 22 Jul 2026)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
    M llvm/test/CodeGen/PowerPC/splat-after-xxsldwi.ll

  Log Message:
  -----------
  [PPC] Constrain register in VSPLT of XXSLDWI transform (#208005)

XXSLDWI takes a vsrc register, but the VSPLT opcodes only take vrrc.
vrrc is a subset of vsrc, so fix this by constraining the register
class.



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