[all-commits] [llvm/llvm-project] 5b46dc: [llvm-dwp] Fix endianness issues (#203424)
Jon Roelofs via All-commits
all-commits at lists.llvm.org
Mon Jul 20 11:03:11 PDT 2026
Branch: refs/heads/users/jroelofs/spr/main.llvmaarch64-enable-cfi_set_ra_state-by-default-for-pauth_lr
Home: https://github.com/llvm/llvm-project
Commit: 5b46dcf59375181dee1fbd6e1d1cdb3f0c8f5289
https://github.com/llvm/llvm-project/commit/5b46dcf59375181dee1fbd6e1d1cdb3f0c8f5289
Author: Ilya Leoshkevich <iii at linux.ibm.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/DWP/DWP.h
M llvm/lib/DWP/DWP.cpp
A llvm/test/tools/llvm-dwp/SystemZ/big_endian_info_v5.s
M llvm/test/tools/llvm-dwp/X86/compress.test
Log Message:
-----------
[llvm-dwp] Fix endianness issues (#203424)
llvm-dwp fails on SystemZ, which is big-endian, as follows:
$ cat min.c
int main() {}
$ clang -g -O0 -gsplit-dwarf min.c -o min
$ llvm-dwp -e min -o min.dwp
error: compile unit exceeds .debug_info section range: 905969668 >= 58
This is because it hardcodes IsLittleEndian=true in multiple places. Fix
by forwarding endianness of the current object file.
Add a SystemZ-specific test.
Add proper big-endian support to X86/compress.test and add an
explanation regarding what the hardcoded blobs are and how they are
generated.
Commit: c9a9737dee777f5fe19131911e8ca3c8ca3c7031
https://github.com/llvm/llvm-project/commit/c9a9737dee777f5fe19131911e8ca3c8ca3c7031
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A lld/docs/DTLTO.md
R lld/docs/DTLTO.rst
A lld/docs/ELF/large_sections.md
R lld/docs/ELF/large_sections.rst
A lld/docs/ELF/linker_script.md
R lld/docs/ELF/linker_script.rst
A lld/docs/ELF/start-stop-gc.md
R lld/docs/ELF/start-stop-gc.rst
A lld/docs/ELF/warn_backrefs.md
R lld/docs/ELF/warn_backrefs.rst
A lld/docs/MachO/index.md
R lld/docs/MachO/index.rst
A lld/docs/MachO/ld64-vs-lld.md
R lld/docs/MachO/ld64-vs-lld.rst
A lld/docs/NewLLD.md
R lld/docs/NewLLD.rst
A lld/docs/ReleaseNotes.md
R lld/docs/ReleaseNotes.rst
A lld/docs/WebAssembly.md
R lld/docs/WebAssembly.rst
A lld/docs/error_handling_script.md
R lld/docs/error_handling_script.rst
A lld/docs/index.md
R lld/docs/index.rst
A lld/docs/missingkeyfunction.md
R lld/docs/missingkeyfunction.rst
A lld/docs/windows_support.md
R lld/docs/windows_support.rst
Log Message:
-----------
[docs] Rename LLD docs to Markdown (#209894)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: f8107f628360eb0c7c4a04af98e768ffa637c1b3
https://github.com/llvm/llvm-project/commit/f8107f628360eb0c7c4a04af98e768ffa637c1b3
Author: Tim Corringham <timothy.corringham at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/Textures-AST.hlsl
M clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/SemaHLSL/Resources/RWTexture2D-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/RWTexture2D-unsupported-methods-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-GetDimensions.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
Log Message:
-----------
[HLSL] Implement RWTexture2DArray (#208725)
Add front-end support for RWTexture2DArray, and update related tests to
include coverage of this resource.
Fixes #194947
---------
Co-authored-by: Tim Corringham <tcorring at amd.com>
Commit: ab35099249433e55ba586285c2087d0bd7f65e9c
https://github.com/llvm/llvm-project/commit/ab35099249433e55ba586285c2087d0bd7f65e9c
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lld/docs/DTLTO.md
M lld/docs/ELF/large_sections.md
M lld/docs/ELF/linker_script.md
M lld/docs/ELF/start-stop-gc.md
M lld/docs/ELF/warn_backrefs.md
M lld/docs/MachO/index.md
M lld/docs/MachO/ld64-vs-lld.md
M lld/docs/NewLLD.md
M lld/docs/ReleaseNotes.md
M lld/docs/WebAssembly.md
M lld/docs/conf.py
M lld/docs/error_handling_script.md
M lld/docs/index.md
M lld/docs/missingkeyfunction.md
M lld/docs/windows_support.md
Log Message:
-----------
[docs] Rewrite LLD docs to Markdown (#209897)
Tracking issue: #201242
This is a stacked PR based on #209894 , which will be a standalone
commit that renames *.rst -> *.md before this PR lands for history
preservation purposes. See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections. Please spot check my work and approve if it looks good.
Commit: d49307497bbf9f49e6a603c605319dc39113c51c
https://github.com/llvm/llvm-project/commit/d49307497bbf9f49e6a603c605319dc39113c51c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Register allocator when cuf.allocate or cuf.deallocate are present (#210147)
Commit: fe616e4d87cfbce9317537aa95e6068ac103a373
https://github.com/llvm/llvm-project/commit/fe616e4d87cfbce9317537aa95e6068ac103a373
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/alloca.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/alloca-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/alloca_test.cpp
Log Message:
-----------
[libc] Implement alloca.h header (#210150)
Implemented the alloca.h header for LLVM libc.
* libc/include/llvm-libc-macros/alloca-macros.h: Defined alloca macro
using __builtin_alloca.
* libc/include/alloca.yaml: Added header specification.
* libc/include/CMakeLists.txt,
libc/include/llvm-libc-macros/CMakeLists.txt: Registered the new header
and macro targets.
* libc/config/linux/*/headers.txt: Enabled the header for Linux targets
(x86_64, aarch64, arm, i386, riscv).
* libc/test/include/alloca_test.cpp, libc/test/include/CMakeLists.txt:
Added and registered functional unit tests.
Tested by running the new unit and hermetic tests.
Assisted-by: Automated tooling, human reviewed.
Commit: c96a176dd15690ed8181c6764b26d0303008a40f
https://github.com/llvm/llvm-project/commit/c96a176dd15690ed8181c6764b26d0303008a40f
Author: Mauri de Souza Meneguzzo <mauri870 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface.h
Log Message:
-----------
[tsan] Enable __TSAN_HAS_INT128 on s390x and mips64 (#197319)
The s390x exclusion was added in
https://github.com/llvm/llvm-project/commit/b17673816d7f65e07015489993b22049e36b04db
(https://reviews.llvm.org/D105629)
citing lack of hardware 128-bit atomics. s390x does have the CDSG
instruction,
but `alignof(__int128) == 8` on the s390x psABI while CDSG requires
16-byte
alignment, so Clang does not define
`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16` for
this target. The mips64 exclusion has been present since
`__TSAN_HAS_INT128` was
introduced in
https://github.com/llvm/llvm-project/commit/06bbca9ec4bbc5a103c94c4973797ea4ddf944b5
(https://reviews.llvm.org/D18543) with no documented
rationale. Clang similarly does not define
`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16`
for mips64.
Both exclusions are unnecessary. When
`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16` is
not defined, all a128 operations use the SpinMutex-based emulation path,
which
serializes 128-bit accesses under a global lock without requiring any
hardware
CAS16 support.
Verified with Clang (targets: s390x-linux-gnu, mips64-linux-gnuabi64,
mips64el-linux-gnuabi64): all three produce the full set of 12
`__tsan_atomic128_*` symbols with zero `__sync_*_16 / __atomic_*_16`
libcall references.
Runtime testing has not been performed as I lack access to these
architectures.
Relates https://github.com/llvm/llvm-project/pull/196833
For https://github.com/golang/go/issues/61236
Commit: 58db4cea87114268cca4c2957232de7db9327ceb
https://github.com/llvm/llvm-project/commit/58db4cea87114268cca4c2957232de7db9327ceb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
Log Message:
-----------
[SLP][NFC]Add a test with GEPs under the same select condition, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210173
Commit: 7cfe30df768f109dbaead1ed5f7538c10ba65d2e
https://github.com/llvm/llvm-project/commit/7cfe30df768f109dbaead1ed5f7538c10ba65d2e
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/docs/TableGen/ProgRef.rst
M llvm/lib/TableGen/Record.cpp
M llvm/test/TableGen/true-false.td
Log Message:
-----------
[TableGen] Short-circuit !cond operator (#208942)
Fixes #163213
TableGen `!cond` operator currently resolves all subsequent conditions
and values even if it already found a condition that resolves to `true`.
This change short-circuits on the first `true` resolution found
iterating from left to right. It folds a new `CondOpInit` with only the
conditions and values that have already been resolved, including the
current condition and value.
Commit: f6f08fa7e5d56aa07f9ebc51500f2c9fd6df8e1b
https://github.com/llvm/llvm-project/commit/f6f08fa7e5d56aa07f9ebc51500f2c9fd6df8e1b
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
Log Message:
-----------
[flang][cuda] Use managed allocation for saved locals (#210133)
Example:
```fortran
subroutine work
real, allocatable, save :: q(:)
allocate(q(10))
end
```
`SAVE` gives the local allocatable descriptor static storage. Implicitly
attributing it as Unified causes allocation to look it up as a
registered CUDA global, but no device symbol is registered for the
descriptor.
Fix: use Managed attribution for saved subprogram-local allocatables and
pointers, avoiding the invalid CUDA symbol lookup.
Commit: aaa4ebd2ad174920ddce67c4641292a44788e879
https://github.com/llvm/llvm-project/commit/aaa4ebd2ad174920ddce67c4641292a44788e879
Author: John Paul Jepko <john.jepko at ericsson.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/pr22954.c
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/warn-fortify-source.c
A clang/test/Sema/warn-stringop-overread-fortify.c
A clang/test/Sema/warn-stringop-overread.c
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
Log Message:
-----------
[Clang][Sema] Reland -Wstringop-overread with computeDependence fix (#208012)
Reland #183004 and follow-up #205201 (reverted in #207840) which adds `-Wstringop-overread` to warn when memory functions `memcpy`, `memmove`, `memcmp`, and other related builtins read more bytes than the source buffer size.
The revert was due to a crash when a memory function is called on `&x` where `x` is a static constexpr local inside a template. The original PR exposed a bug in `computeDependence(UnaryOperator*)` where only the value-dependence bit is set for this case, when the instantiation-dependence bit should also be set. This is the root cause behind the crash.
Fix `computeDependence` to properly set both value and instantiation-dependence bits, and add a regression for this crash via `warn-stringop-overread.c`.
Commit: 68f703f3e58a52c41b39dfc654a675560b6c5614
https://github.com/llvm/llvm-project/commit/68f703f3e58a52c41b39dfc654a675560b6c5614
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/docs/UsersManual.md
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/AArch64/branch-protection-attr.c
M clang/test/CodeGen/AArch64/sign-return-address.c
M clang/test/Driver/aarch64-security-options.c
M clang/test/Preprocessor/aarch64-target-features.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
M llvm/test/CodeGen/AArch64/sign-return-address.ll
A llvm/test/CodeGen/AArch64/windows-pac-invalid-a-key.ll
M llvm/test/CodeGen/AArch64/wineh-bti.ll
Log Message:
-----------
[AArch64][COFF] Branch-protection=standard/pac-ret means "b-key" on Windows (#203989)
On AArch64 Windows the `B-key` is the only supported key for userspace,
let's make "standard" and "pac-ret" options generate "b-key".
Fixes: #203852
Commit: 95ff1fa00ed4c35b3589fa92b591e02444fcc5d5
https://github.com/llvm/llvm-project/commit/95ff1fa00ed4c35b3589fa92b591e02444fcc5d5
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/uaddsat.ll
Log Message:
-----------
[AMDGPU] Lower uniform uaddsat.i32 to SALU insts (#210168)
Map uaddsat.i32(i32 %a, i32 %b) to the following:
```
s_not_b32 s4, s17 ; s17 = %b
s_min_u32 s4, s16, s4 ; s16 = %a
s_add_u32 s4, s4, s17
```
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: 0acbbccdbd5b5a218b459acc9abc6b3dc7f338a6
https://github.com/llvm/llvm-project/commit/0acbbccdbd5b5a218b459acc9abc6b3dc7f338a6
Author: Brad Smith <brad at comstyle.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/test/Driver/aarch64-features.c
M clang/test/Driver/aarch64-fmv.c
M clang/test/Driver/linux-ld.c
Log Message:
-----------
[Android] Drop workarounds for older Android API levels pre 23 (#161893)
Drop workarounds for Android API levels pre 23.
The minimum Android API currently supported by the LTS NDK is 23.
Commit: 7812fef524a0aef0b34599c2eb81b66843fbcdd8
https://github.com/llvm/llvm-project/commit/7812fef524a0aef0b34599c2eb81b66843fbcdd8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-widening-convert-isel.ll
Log Message:
-----------
[RISCV][P-ext] Add RISCVISD::PWZIP for RV32. (#210134)
This node takes 2 32-bit vector inputs and produces a 64-bit vector
result. By extracting the subvector during lowering, we expose more
opportunities for optimizations.
Commit: 5978ac06a2cc75025703008c373fc7c94246f7a3
https://github.com/llvm/llvm-project/commit/5978ac06a2cc75025703008c373fc7c94246f7a3
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
Log Message:
-----------
[NFC] Inline DwarfExpression frame register check (#210186)
Inline DwarfExpression frame register check as it's the only call.
Tested via make check.
Assisted by AI.
Commit: bd0395ebfe9830b1e3dc9580021fb5a3ab343a51
https://github.com/llvm/llvm-project/commit/bd0395ebfe9830b1e3dc9580021fb5a3ab343a51
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/time.rst
M libc/include/sys/time.yaml
M libc/include/time.yaml
M libc/src/sys/time/CMakeLists.txt
A libc/src/sys/time/gettimeofday.h
M libc/src/sys/time/linux/CMakeLists.txt
A libc/src/sys/time/linux/gettimeofday.cpp
M libc/src/time/CMakeLists.txt
R libc/src/time/gettimeofday.h
M libc/src/time/linux/CMakeLists.txt
R libc/src/time/linux/gettimeofday.cpp
M libc/test/src/sys/time/CMakeLists.txt
A libc/test/src/sys/time/gettimeofday_test.cpp
M libc/test/src/time/CMakeLists.txt
R libc/test/src/time/gettimeofday_test.cpp
Log Message:
-----------
[libc] Move gettimeofday to sys/time.h header. (#210185)
`gettimeofday` is supposed to be declared in the `<sys/time.h>` header,
not the `<time.h>` where we've had it previously. Move the declaration
to the correct header, and move the files with implementation and unit
tests accordingly.
Note that `gettimeofday` is removed removed from POSIX-2024, but let's
keep it available for now, since there's fair amount of existing code
that still uses it.
Commit: 5ed5468f3810cd3c424eec5e9288884f67594068
https://github.com/llvm/llvm-project/commit/5ed5468f3810cd3c424eec5e9288884f67594068
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Log Message:
-----------
[NFC][LSR] Remove duplicate debug expression update (#210188)
Remove duplicate debug expression update we assigned
the same DIExpression twice so let's just remove the redundant call.
Tested via make check.
Assisted by AI.
Commit: 205a66201235c03b892e075ae548d6ea12f024a3
https://github.com/llvm/llvm-project/commit/205a66201235c03b892e075ae548d6ea12f024a3
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw-sysroot.cpp
Log Message:
-----------
[clang][mingw] Try both native and ARM64EC triples when looking for a sysroot on the ARM64EC target (#210017)
Similarly to MSVC, a MinGW toolchain may provide support for both ARM64
and ARM64EC in a single sysroot. Structuring the toolchain this way has
the additional advantage of seamlessly supporting linking ARM64X images.
Support this configuration in findClangRelativeSysroot.
Commit: 092ac9c0c776fc5a3eddf779643d004230260300
https://github.com/llvm/llvm-project/commit/092ac9c0c776fc5a3eddf779643d004230260300
Author: David Mentler <mentlerd at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/docs/resources/test.md
A lldb/packages/Python/lldbsuite/support/xcode.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
Log Message:
-----------
[lldb][test] Allow dotest.py to call for Xcode to attach (#209628)
This speeds up the debugging of API tests a little on macOS.
(AppleScript written by Claude based on Xcode.sdef)
Commit: eb819b90735b819c1afd98ab3aa14183fa57157e
https://github.com/llvm/llvm-project/commit/eb819b90735b819c1afd98ab3aa14183fa57157e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/sub-nsw-icmp-eq-zero-reorder.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect nsw in reordered sub feeding equal cmp, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210204
Commit: e5c143f96b37f2215a0b07d46df7600d06a372f4
https://github.com/llvm/llvm-project/commit/e5c143f96b37f2215a0b07d46df7600d06a372f4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/sub-nsw-icmp-eq-zero-reorder.ll
Log Message:
-----------
[SLP]Drop nsw when reordering a sub feeding icmp eq/ne 0
A sub used only by icmp eq/ne 0 is treated as commutative, so SLP may
swap its operands, and nsw does not survive a - b -> b - a (a - b can
be INT_MIN while b - a overflows).
Fixes #210177
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210205
Commit: 396d2555ddac2d6a4885ec3ad2c73fcee00f5bd3
https://github.com/llvm/llvm-project/commit/396d2555ddac2d6a4885ec3ad2c73fcee00f5bd3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/test/MC/Disassembler/WebAssembly/wasm.txt
Log Message:
-----------
[WebAssembly] Don't assert on a non-zero call_indirect table index (#210120)
WebAssemblyInstPrinter::printInst asserted that a non-symbol table
operand of call_indirect is the immediate 0, on the assumption that only
MVP single-table compilation units reach the printer. That is true for
code generated by the compiler, but the printer is shared by the
disassembler.
The disassembler must produce output for any byte sequence it is pointed
at and shouldn't abort on the operand values it decodes. A non-zero
immediate table index is both a valid encoding, from a multi-table
module, and a routine result of best-effort disassembly of a range that
is not all code, which is how I hit this in LLDB.
Print the table operand when it is a symbol or a non-zero immediate, and
omit it only for the implicit table 0. This makes the output lossless
and unambiguous, matching how a table symbol is already printed. MVP and
table-symbol output are unchanged, so there is no effect on the
compiler's assembly.
Commit: 71a7c24dec4fe7ab5eda28650cf8d9138b9ca994
https://github.com/llvm/llvm-project/commit/71a7c24dec4fe7ab5eda28650cf8d9138b9ca994
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/MC/Hexagon/relax-align.s
Log Message:
-----------
[Hexagon] Add MC lit test for dropped fixups after packet relaxation (#210157)
Test that a branch fixup is preserved when MC relaxes a packet
containing a conditional compare-and-jump due to a following .p2align
directive. Regression test for issue #163851.
Commit: 5337314b4bea4be5e86396eb21e59f4d123af175
https://github.com/llvm/llvm-project/commit/5337314b4bea4be5e86396eb21e59f4d123af175
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblySetP2AlignOperandsPass
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209871
Commit: 0fc03f0454b5a5d6d35338a6f4d1092960d63e17
https://github.com/llvm/llvm-project/commit/0fc03f0454b5a5d6d35338a6f4d1092960d63e17
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A bolt/docs/BOLTAArch64OptimizationStatus.md
R bolt/docs/BOLTAArch64OptimizationStatus.rst
A bolt/docs/GettingStarted.md
R bolt/docs/GettingStarted.rst
A bolt/docs/index.md
R bolt/docs/index.rst
Log Message:
-----------
[bolt][docs] Rename BOLT docs to Markdown (#210198)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 2494e80d1cd91911713ec8451a961e07b9da8b9c
https://github.com/llvm/llvm-project/commit/2494e80d1cd91911713ec8451a961e07b9da8b9c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixBrTableDefaults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyFixBrTableDefaultsPass
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209882
Commit: d0dd060443b657f3d96bd1b2dcd32974cccfa6fc
https://github.com/llvm/llvm-project/commit/d0dd060443b657f3d96bd1b2dcd32974cccfa6fc
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
Log Message:
-----------
[NFC] Use new target triple for some tests (#210202)
They were mistakenly reverted back to the old ones.
Commit: 565ef24d6c1b31e2fbf736b2b115d49d49b86af7
https://github.com/llvm/llvm-project/commit/565ef24d6c1b31e2fbf736b2b115d49d49b86af7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCleanCodeAfterTrap.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyCleanCodeAfterTrapPass
Standard NewPM pass porting.
Reviewers: sbc100, dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209892
Commit: 03ab16cb415ff8dc2cb06332a628b79a718c74d8
https://github.com/llvm/llvm-project/commit/03ab16cb415ff8dc2cb06332a628b79a718c74d8
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M bolt/docs/BOLTAArch64OptimizationStatus.md
M bolt/docs/GettingStarted.md
M bolt/docs/index.md
Log Message:
-----------
[docs] Finish MyST migration for BOLT docs (#210199)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #210198, which will be a standalone commit
that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections. Please spot check my work and approve if it looks good. You
can use the HTML links below to confirm it renders properly.
-----
Before/after validation links:
| Source file | Before HTML | After HTML |
| --- | --- | --- |
| `bolt/docs/BOLTAArch64OptimizationStatus.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/BOLTAArch64OptimizationStatus.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/BOLTAArch64OptimizationStatus.html)
|
| `bolt/docs/GettingStarted.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/GettingStarted.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/GettingStarted.html)
|
| `bolt/docs/index.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/index.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/index.html)
|
Commit: 611d015f0030e0d4f1b3bd2270205f6f6b6e20eb
https://github.com/llvm/llvm-project/commit/611d015f0030e0d4f1b3bd2270205f6f6b6e20eb
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/utils/gn/README.rst
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/build/buildflags.gni
M llvm/utils/gn/build/symlink_or_copy.gni
M llvm/utils/gn/build/toolchain/BUILD.gn
M llvm/utils/gn/secondary/BUILD.gn
M llvm/utils/gn/secondary/bolt/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/tool/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/xpc/framework/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ar/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cxxfilt/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwp/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-libtool-darwin/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-lipo/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-nm/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-rc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readobj/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-size/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-strings/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
Log Message:
-----------
gn build: Support building debug binaries from a release build directory.
This change makes it so that all binaries in `bin` have a corresponding
debug binary target `$TARGET.dbg` that will build a debug binary in
`bin.dbg/$TARGET`. This is implemented using a separate toolchain for
the debug builds. This has the following advantages over a separate
debug build directory:
1. Can use release mode tblgen to generate code for the debug build
binaries, which speeds up the build because it can run tblgen faster as
well as being able to reuse the tblgen binary from the release build.
2. Can reuse runtimes built in the release mode clang's resource
directory, avoiding the need to build them again with a slow debug
build of clang.
Assisted-by: gemini
Reviewers: aeubanks, nico
Reviewed By: aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/197843
Commit: a45ae4cf77776bdae8ab79c3b5b4d4ef7cbd7d99
https://github.com/llvm/llvm-project/commit/a45ae4cf77776bdae8ab79c3b5b4d4ef7cbd7d99
Author: lntue <lntue at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/math/hypot.h
M libc/test/src/math/smoke/hypot_test.cpp
Log Message:
-----------
[libc][math] Fix double-rounding errors with denormal inputs for hypot function. (#208247)
The issue was reported by Paul Zimmermann.
Solution: for denormal inputs, we use 1.0 + x trick after proper scaling
to mimick rounding at denormal scale.
Commit: eafc387c1da0620642f469fde70455c554ba3470
https://github.com/llvm/llvm-project/commit/eafc387c1da0620642f469fde70455c554ba3470
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/CCallback.h
A orc-rt/test/unit/CCallbackTest.cpp
M orc-rt/test/unit/CMakeLists.txt
Log Message:
-----------
[orc-rt] Add asCCallback utility -- C callbacks for methods. (#210048)
Adds orc_rt::asCCallback<&Class::method>, which produces a C-ABI
function pointer that forwards to the given member function. The first
parameter of the generated trampoline is an opaque context pointer (
void * for non-const methods, const void * for const methods) that is
cast back to the class type and used as the receiver:
struct Counter {
void inc(int N) { Count += N; }
int Count = 0;
};
Counter C;
void (*CB)(void *, int) = asCCallback<&Counter::inc>;
CB(asCCallbackContext<&Counter::inc>(C), 2); // C.Count == 2
asCCallbackContext produces the matching context pointer via
static_cast, so any base-class offset is applied and const-ness is
preserved; pairing it with asCCallback by the same method keeps things
correct under inheritance and const-qualification. (A raw cast of &C
would give the trampoline the wrong `this` when method's class is a base
at a non-zero offset.)
Specializations cover the const x noexcept combinations. The trampoline
is always noexcept -- a C caller cannot unwind a C++ exception, so an
escaping one terminates -- and return/argument types are restricted to
C-compatible (non-reference, trivially copyable) types via
static_assert.
Commit: 5658411aed0f610380323918ce4b02016f2df6f2
https://github.com/llvm/llvm-project/commit/5658411aed0f610380323918ce4b02016f2df6f2
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/resources/RWBuffer-imageformat.hlsl
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
Log Message:
-----------
[SPIRV] Pack 64-bit vec2 typed buffers into 4x32-bit images (#208626)
Commit: 6b9929001d0b46d087e871934e50e4783147fa7d
https://github.com/llvm/llvm-project/commit/6b9929001d0b46d087e871934e50e4783147fa7d
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M bolt/docs/profiles.md
M bolt/include/bolt/Profile/DataReader.h
M bolt/lib/Profile/DataReader.cpp
A bolt/test/X86/profile-symbols-mode.s
Log Message:
-----------
[BOLT] Add fdata symbols mode (#209932)
Add a new fdata profile mode accepting symbol names as-is.
It addresses the UX gap surfaced by #208313 that all methods of selecting
functions to process (symbolized profile types, `-funcs*` options) expect
disambiguated local symbols.
Introduce fdata mode activated by a `symbols` header line, where each subsequent
line is a (mangled) symbol name. The names are matched against restored function
names (with disambiguation suffix stripped), and every matching function gets an
execution count of 1.
This can be used to drive selective instrumentation (`--instrument-hot-only`) or
basic linker-script style optimizations.
Symbols are stored as branch entry data so matching reuses the existing default
branch profile path.
Test Plan:
Update docs/profiles.md and add profile-symbols-mode.s
Commit: 398f2117379f42764e433d19ea0d0cd65009a4aa
https://github.com/llvm/llvm-project/commit/398f2117379f42764e433d19ea0d0cd65009a4aa
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/StaticLibrary.h
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/TUSummaryEncoding.h
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-explicit-triple.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-namespace-override.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libempty.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libtwo.json
M clang/test/Analysis/Scalable/ssaf-linker/help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-create.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-time.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-verbose.test
M clang/tools/clang-ssaf-linker/CMakeLists.txt
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.h
Log Message:
-----------
[clang][ssaf] Add static-library create subcommand (#208799)
This change adds `clang-ssaf-linker static-library create` for bundling
TU summaries into a StaticLibrary archive. The linker has been
refactored to dispatch on `cl::SubCommand`; invocations without a
subcommand still run the existing linker pipeline unchanged for backward
compatibility.
rdar://181930526
Commit: 9f839a4396916283cc28e45d18d7f4742ad5094a
https://github.com/llvm/llvm-project/commit/9f839a4396916283cc28e45d18d7f4742ad5094a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Fix non-determinism in pointers comparison, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210216
Commit: a07b91d8243b8a8051dbbe5739eacc7942269c61
https://github.com/llvm/llvm-project/commit/a07b91d8243b8a8051dbbe5739eacc7942269c61
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/CMakeLists.txt
A lldb/examples/python/templates/scripted_stackframe_recognizer.py
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStackFrameRecognizerInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/recognizer.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
[lldb/script] Migrate frame recognizers onto ScriptedPythonInterface (#209805)
Give `frame recognizer add -l` a formal
ScriptedStackFrameRecognizerInterface, matching the architecture already
used by ScriptedProcess, ScriptedBreakpoint, etc.: a C++ interface
header, a Python-backed implementation built on
ScriptedPythonInterface's CreatePluginObject/Dispatch machinery,
PluginManager registration, and a generatable Python ABC template
(scripted_stackframe_recognizer.py).
get_recognized_arguments' documented contract returns a plain list of
lldb.SBValue (not an lldb.SBValueList), so it bypasses the generic
Dispatch<ValueObjectListSP>() extractor and calls the SWIG bridge
directly, matching the legacy behavior exactly.
ScriptedStackFrameRecognizer now holds a single interface object created
once in its constructor and reused across every RecognizeFrame() call,
same lifecycle as before.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 3e1948e9a528d1bc82f2a671a00c02fa8717f26f
https://github.com/llvm/llvm-project/commit/3e1948e9a528d1bc82f2a671a00c02fa8717f26f
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Add expression validation tests for DW_OP_swap (#210184)
Add DIExpression validation tests for DW_OP_swap that we noticed were
missing. The tests are based on the existing expression tests for
DW_OP_stack_value.
Tested via make check.
Assisted by AI.
Commit: b9869c8c920a7dfa983e215bc30729b13d8b353b
https://github.com/llvm/llvm-project/commit/b9869c8c920a7dfa983e215bc30729b13d8b353b
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll
Log Message:
-----------
[AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (#208744)
Add support for lowering masked loads/stores of <4 x bf16> and <8 x
bf16> when target features contain "+sve" and "+bf16".
Fixes: #201149
Commit: 464b46a73b7592c95222cf2e64b34ffe6f2cf251
https://github.com/llvm/llvm-project/commit/464b46a73b7592c95222cf2e64b34ffe6f2cf251
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/sysv_abi.c
A clang/test/CodeGen/target-avx-function-abi.c
A clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
Log Message:
-----------
[clang][CodeGen][X86_64] Honor per-function AVX ABI in C/C++ call paths, maintain old psABI for PlayStation. (#193298)
Fixes https://github.com/llvm/llvm-project/issues/64706
Wire per function x86 AVX ABI level into CodeGen arrangement methods so
__attribute(__target("avx"))) / __attribute(__target("avx512f"))) on
methods, ctors, and free-functions affects ABI lowering consistently.
Specifically:
- Added X86AVXABILevel member to CGFunctionInfo.
- Populated X86AVXABILevel member in CGFunctionInfo objects via
arrangement methods declared in CodeGenTypes.h.
- Respect CGFunctionInfo AVX Level in X86_64ABIInfo::computeInfo.
- Add/extend regression tests for:
- free-function target-attribute AVX ABI lowering
- C++ method/ctor target-attribute AVX ABI lowering
- PS4/PS5 legacy ABI behavior (no per-function AVX ABI change)
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 7fec267c9a44c76604e1135ee0ef694c4eaae784
https://github.com/llvm/llvm-project/commit/7fec267c9a44c76604e1135ee0ef694c4eaae784
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/src/stdfix/DiviFxTest.h
Log Message:
-----------
[libc][stdfix] Guard DiviFxTest shift edge cases against narrow IntType (#209970)
Fixes riscv32 buildbot failure from #206115.
Commit: 9d2181c78f4e248069e39ec0e5b899dfbfcf3d6a
https://github.com/llvm/llvm-project/commit/9d2181c78f4e248069e39ec0e5b899dfbfcf3d6a
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
Log Message:
-----------
[NFC] Reuse DwarfExpression fragment (#210181)
Reuse DwarfExpression fragment information since nothing changes it
between the outside of the loop and the inside of the loop.
Tested via make check.
Assisted by AI.
Commit: 1a3347f608394b12c5a18cb5b3457af4e85449a1
https://github.com/llvm/llvm-project/commit/1a3347f608394b12c5a18cb5b3457af4e85449a1
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel][clang][ssaf] Fix 398f2117379f42764e433d19ea0d0cd65009a4aa (#210222)
Commit: 27d7b61322f1528cc582a62d1b74683d24cc987b
https://github.com/llvm/llvm-project/commit/27d7b61322f1528cc582a62d1b74683d24cc987b
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFC] Use LoadInst::getProperties() when creating PRE load (#208605)
Use load's properties via getProperties() instead of individually
forwarding isVolatile(), getAlign(), getOrdering() and getSyncScopeID().
Reference: https://github.com/llvm/llvm-project/pull/206470
Commit: 4a75259134c72d8be7fa3ea36c9dc7bfc02640ac
https://github.com/llvm/llvm-project/commit/4a75259134c72d8be7fa3ea36c9dc7bfc02640ac
Author: hev <wangrui at loongson.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/lasx/issue207316.ll
M llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
M llvm/test/CodeGen/LoongArch/lsx/vexth.ll
Log Message:
-----------
[LoongArch] Fix invalid VEXTH combines for unsupported type extensions (#209725)
`performEXTENDCombine` could form `VEXTH`/`VEXTH_U` nodes for
unsupported type combinations, such as extending `v8i8` to `v8i32` or
`v2i64` to `v2i128`. These illegal nodes would later reach instruction
selection and trigger backend failures:
* `Cannot select: LoongArchISD::VEXTH`
* `Don't know how to legalize this operation`
Prevent these combines from firing by verifying that the destination
type is legal and has exactly twice the total bit width of the source
before forming a `VEXTH`/`VEXTH_U` node.
Apply the same checks to `performSHLCombine` for consistency.
Fixes
https://github.com/llvm/llvm-project/pull/207316#issuecomment-4978234865
Fixes
https://github.com/llvm/llvm-project/pull/207316#issuecomment-4979233899
Commit: 8aaa15e82688177db7c0c3fa06103d10f6799598
https://github.com/llvm/llvm-project/commit/8aaa15e82688177db7c0c3fa06103d10f6799598
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/BBAddrMapYAML.h
M llvm/lib/ObjectYAML/BBAddrMapYAML.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
Log Message:
-----------
[ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (#205991)
Preparatory NFC refactor to let the upcoming COFF emitter reuse the
BBAddrMap YAML encoder.
Commit: ddd21a5500bc65354211c0088520d0b331e862d7
https://github.com/llvm/llvm-project/commit/ddd21a5500bc65354211c0088520d0b331e862d7
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/include/flang/Lower/CUDA.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/CUDA/cuda-gpu-unified.cuf
R flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
Log Message:
-----------
[flang][cuda] Managed backing for -gpu=unified allocatables/pointers (#210149)
Under `-gpu=unified`, allocatables and pointers with no explicit CUDA data
attribute must be reachable from the device. Back them with CUDA managed
memory by selecting the unified allocator index at the ALLOCATE site (in
lowering), instead of stamping an implicit `Unified`/`Managed` CUDA data attribute
on the symbol in the frontend — the approach introduced in PR #209292.
This is necessary because attributing the symbol in the frontend routed every
plain allocatable/pointer through the CUDA Fortran managed descriptor
pipeline (constructor registration, `cuf.allocate`/`cuf.free`), which added
per-`ALLOCATE` overhead, forced special-casing for objects that may not legally carry a
CUDA attribute (COMMON members, derived-type components, module globals), and
changed symbol semantics used well beyond allocation. Choosing the allocator
index at the `ALLOCATE` site keeps the object a plain host allocatable/pointer while
the storage still comes from the managed allocator.
Commit: 963e226d9a6b923b10c8e328438838bd42e03d18
https://github.com/llvm/llvm-project/commit/963e226d9a6b923b10c8e328438838bd42e03d18
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M .github/workflows/release-binaries.yml
M .github/workflows/validate-release-version/action.yml
Log Message:
-----------
workflows: Fixes for release-binaries and upload-release-artifact (#209246)
There were some bugs in upload-release-artifact workflow and
release-binaries was not including this action in its checkout.
Commit: fe64fbbafc19e46ef461fac3ec0b4144a1ffc847
https://github.com/llvm/llvm-project/commit/fe64fbbafc19e46ef461fac3ec0b4144a1ffc847
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Extract mask, shuffle and AA helpers into SLUtils 3/3 (#209973)
Move the mask/shuffle construction and alias-analysis free helpers out
of SLPVectorizer.cpp into SLPVectorizer/SLPUtils.{h,cpp} (namespace
llvm::slpvectorizer).
Moved:
transformScalarShuffleIndiciesToVector
getShufflevectorNumGroups
calculateShufflevectorMask
UseMask (enum)
buildUseMask
isUndefVector
doesInTreeUserNeedToExtract
getLocation
isSimple
addMask
fixupOrderingIndices
getAltInstrMask
replicateMask
RFC: https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 3c6b4870425e7b62a966ff04f51f78920adbedb8
https://github.com/llvm/llvm-project/commit/3c6b4870425e7b62a966ff04f51f78920adbedb8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/include/orc-rt/TaskGroup.h
M orc-rt/test/unit/SessionTest.cpp
M orc-rt/test/unit/TaskGroupTest.cpp
Log Message:
-----------
[orc-rt] Add TaskGroup::TokenSource; drop raw group accessor (#210240)
Session::managedCodeTaskGroup() returned the raw
std::shared_ptr<TaskGroup> for the managed-code group, exposing the
group's full interface -- including close() and addOnComplete() -- to
callers, even though those operations are reserved for the Session.
Add TaskGroup::TokenSource, a strong handle whose sole role is to serve
as an argument to the TaskGroup::Token constructor. Session now exposes
managedCodeTokenSource() in its place, so clients can acquire tokens (to
keep managed code alive across shutdown) without gaining the ability to
close the group or register completion callbacks.
Commit: f2ef5670cf70371153caeb0ebbeae2323a61f8e0
https://github.com/llvm/llvm-project/commit/f2ef5670cf70371153caeb0ebbeae2323a61f8e0
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_dpp_lds_expected_active_lanes.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
Log Message:
-----------
[AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (#169213)
Move GFX11 SGPR VALU mask hazard waitcnt merging to the a forward scan
within the AMDGPUWaitSGPRHazard pass.
This simplifies the hazard recognizer code and allows merging of waitcnt
instructions in cases where SGPRs unaffected by pending writes are used.
In turn this greatly decreasing numbers of waits inserted in sequences
of V_CMP instructions writing SGPRs improving VALU pipeline performance.
Commit: 78ed03f555ea75d2337f618930c062f4d881a08b
https://github.com/llvm/llvm-project/commit/78ed03f555ea75d2337f618930c062f4d881a08b
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A flang/test/Lower/global-initialization-parens.f90
Log Message:
-----------
[flang] Add lowering tests for parenthesized initial values (#209664)
Add a LIT test that baselines the current lowering of parenthesized
initial values in fir.global initializer regions. Today a parenthesized
scalar or derived constant survives constant folding as a Parentheses
node and is lowered to a fir.no_reassoc operation inside the global init
region, while parentheses around characters, array named-constants, and
structure-constructor components are stripped before lowering.
This test pins that behavior so that an upcoming change to the
initializer-lowering path shows its behavior delta explicitly and has a
regression guard.
Assisted-by: AI
Commit: 15ae01dd24261bd70947aab884098e5dcd4096dd
https://github.com/llvm/llvm-project/commit/15ae01dd24261bd70947aab884098e5dcd4096dd
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/CMakeLists.txt
A clang-tools-extra/clangd/LSPBinder.cpp
M clang-tools-extra/clangd/LSPBinder.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/lib/Support/LSP/Transport.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
M utils/bazel/llvm-project-overlay/clang-tools-extra/clangd/BUILD.bazel
Log Message:
-----------
[clangd][Support] Outline LSP payload decode errors (#203121)
Move failed payload handling from `clangd::LSPBinder::parse<T>` and
`llvm::lsp::MessageHandler::parse<T>` into their non-inline
`handleParseError` functions, while keeping successful payload
conversion specialized in each `parse<T>` instantiation.
For a Darwin arm64 build, stripped clangd decreased by 32,848 bytes and
`__TEXT,__text` decreased by 25,180 bytes.
`ClangdTests --gtest_filter=LSPBinderTest.*` passes, and
`llvm/lib/Support/LSP/Transport.cpp` passes a standalone syntax compile.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Co-authored-by: OpenAI Codex <noreply at openai.com>
Commit: c488b2c2407bf29bb20f67bb8f3cf39c637d231e
https://github.com/llvm/llvm-project/commit/c488b2c2407bf29bb20f67bb8f3cf39c637d231e
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDMAOperations.md
Log Message:
-----------
[Docs][AMDGPU] Consistent use of "wave-uniform", "per-lane" and "immediate" (#209974)
When documenting DMA operations, use consistent qualifiers
(wave-uniform, per-lane, immediate) instead of referring to SGPRs and
VGPRs.
Assisted-By: Claude Opus 4.6
Commit: a376783e2ed3a44f63991c97513711faad09525b
https://github.com/llvm/llvm-project/commit/a376783e2ed3a44f63991c97513711faad09525b
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
Log Message:
-----------
[compiler-rt][ubsan] Fix suppressions for inlined functions (#206735)
Align suppression PC handling with getCallerLocation(), so function
suppressions identify the inlined function that caused a report.
Intentionally match only the innermost inline frame.
Extend suppressions-nested-calls.c coverage to -O1.
Fixes https://github.com/llvm/llvm-project/issues/209501
---------
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: 30bc042395a6cf0aa1e5de4fcc625d5b8c611767
https://github.com/llvm/llvm-project/commit/30bc042395a6cf0aa1e5de4fcc625d5b8c611767
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[compiler-rt][test] Use configured Python for lit page-size probe (#209175)
Use the same Python executable configured for the test suite, rather
than relying on python3 being on PATH.
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75
https://github.com/llvm/llvm-project/commit/c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/connect_accept_test.cpp
M libc/test/src/sys/socket/linux/listen_test.cpp
M libc/test/src/sys/socket/linux/socket_test_support.h
M libc/test/src/sys/socket/linux/sockname_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add remaining sys/socket functions and tests (#209798)
This patch adds the following sys/socket functions and syscall wrapper
libraries to BUILD.bazel:
- accept
- accept4
- bind
- connect
- getpeername
- getsockname
- listen
- sockatmark
I'm also enabling the unit tests for these functions. Running AF_UNIX
socket tests under Bazel ran into a problem where the absolute path to
the test sandbox directory exceeds the 108-byte limit of
sockaddr_un::sun_path. To work around that, I added a TestDirectoryScope
helper that temporarily chdirs into the test directory so the tests can
use short relative filenames, and restores the original working
directory on exit.
Assisted by Gemini.
Commit: 9445ad3f91d4331eead867f8b3c9c8a3818edac0
https://github.com/llvm/llvm-project/commit/9445ad3f91d4331eead867f8b3c9c8a3818edac0
Author: Rana Pratap Reddy <RanaPratapReddy.Nimmakayala at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
Log Message:
-----------
[CIR][AMDGPU] Adds `__amdgpu_buffer_rsrc_t` in the buffer-resource address space (#204782)
CIR previously lowering every AMDGPU opaque pointer to
`!cir.ptr<!void>`. Now `__amdgpu_buffer_rsrc_t` lower to
`!cir.ptr<!void, target_address_space(8)>` similar to (`ptr
addrspace(8)` in LLVM IR) matching CodeGen.
This change requires for upcoming raw buffer load/store/atomic builtins.
Those builtins `__builtin_amdgcn_raw_buffer_load/store_b*,
__builtin_amdgcn_raw_ptr_buffer_atomic_*` take a
`__amdgpu_buffer_rsrc_t` as operand, and the corresponding LLVM
intrinsics expect a `ptr addrspace(8)` resource argument.
Commit: 513ac13e7e5037af4b39c8c582dd7927f4c807fc
https://github.com/llvm/llvm-project/commit/513ac13e7e5037af4b39c8c582dd7927f4c807fc
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[Clang][RISCV] Add P extension reinterpret cast intrinsics (#210241)
Implement the "Reinterpret casts" section of the RISC-V P extension intrinsic
spec in `riscv_packed_simd.h`.
The 82 `__riscv_preinterpret_<from>_<to>` intrinsics provide
bit-pattern-preserving conversions between packed types and equal-width
scalars, and between equal-width packed types. They generate no instructions;
each is a `__builtin_bit_cast`.
Commit: 61fa8d3db491c4a864242f22ce31b730fb78ecb5
https://github.com/llvm/llvm-project/commit/61fa8d3db491c4a864242f22ce31b730fb78ecb5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/LibcallLoweringInfo.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
Log Message:
-----------
CodeGen: Rename LibcallLoweringModuleAnalysisResult to ModuleLibcallLoweringInfo (#210176)
Commit: 6f2bd9fd1a5e7c61893abf2f1e9246610e6a32f8
https://github.com/llvm/llvm-project/commit/6f2bd9fd1a5e7c61893abf2f1e9246610e6a32f8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
A flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
Log Message:
-----------
[flang][cuda] Add option to flag descriptor I/O as error (#210170)
Descriptor I/O is too expensive in some compilation mode (nordc). Add
ability to emit an error if they are found in device code.
Commit: 02f55a9e5e4775bc17cc23f9d1e7f5ee23cf63cd
https://github.com/llvm/llvm-project/commit/02f55a9e5e4775bc17cc23f9d1e7f5ee23cf63cd
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
Log Message:
-----------
[libc] add net/if.h to the list of installed headers (#210021)
on aarch64, riscv and x86_64.
Commit: c571b0bd7330a4b737ad7dec31e7f2b52edd3953
https://github.com/llvm/llvm-project/commit/c571b0bd7330a4b737ad7dec31e7f2b52edd3953
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/include/llvm-libc-types/struct_sockaddr_storage.h
M libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
Log Message:
-----------
[libc] Fix size of struct sockaddr_storage (#210037)
My cleverness with the union backfired as it introduced an
(architecture-specific) padding between before it. Drop the union to
avoid that.
This probably wouldn't break much as the structure exists just to
allocate space (and this made it larger), but we should fix it
nonetheless.
Commit: c4903855b64ee801d1b9caeb970921a63475c98b
https://github.com/llvm/llvm-project/commit/c4903855b64ee801d1b9caeb970921a63475c98b
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang/test/Driver/fakeflang.F
M flang/tools/fakeflang/fakeflang.cpp
M runtimes/cmake/config-Fortran.cmake
Log Message:
-----------
[fakeflang] Also detect CMakeTestGNU.c (#210175)
Two fixes when using CMake < 3.28 after #209482:
* In addition to `flang`, also recognize `fakeflang` to determine
whether any workaround for CMake not completely supporting Flang is
needed. `fakeflang` is used as a shim in #209482.
* For CMake < 3.24, CMake does not reognize Flang at all and tries other
methods to detect to the compiler, including the file `CMakeTestGNU.c`.
Make `fakeflang` recognize it as a probe attempt.
This should fix the
[openmp-offload-amdgpu-clang-flang](https://lab.llvm.org/buildbot/#/builders/67)
buildbot. The buildbot is currently upgrade to a newer CMake version,
and the minimum required version of CMake will become 3.31 soon.
Commit: 250f791e7002afb308e4a59dc5ef3e1f2e1c10af
https://github.com/llvm/llvm-project/commit/250f791e7002afb308e4a59dc5ef3e1f2e1c10af
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
Log Message:
-----------
[lldb] Fix tsan error in SymbolLocatorDebugSymbols (#209698)
g_dlsym_DBGCopyFullDSYMURLForUUID and g_dlsym_DBGCopyDSYMPropertyLists
are two globals that are lazily initialized when first used. TSan
complains that this lazy init code is not thread-safe as there is no
synchronization mechanism. In practice, the only race that can happen
here is that we initialize the same values concurrently, which should be
'safe' on any platform.
This patch moves the initialization code into a static local that
returns a const object. This makes this code thread-safe by construction
and fixes the TSan error.
It also fixes that we keep calling dlopen if the initialization fails.
That is, the `g_dlsym_DBGCopyFullDSYMURLForUUID == nullptr` will always
be true on systems where the framework doesn't exist, so this code will
try loading it on every function call and fail.
Commit: 89f5334990c5aa853fcbaa361aefe5b999e63dc5
https://github.com/llvm/llvm-project/commit/89f5334990c5aa853fcbaa361aefe5b999e63dc5
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/docs/CMakeLists.txt
R libc/docs/headers/time.rst
A libc/utils/docgen/time.yaml
Log Message:
-----------
[libc][docs] Dynamically generate time.h documentation (#210197)
Removed the static time.rst file.
Added time to docgen_list in libc/docs/CMakeLists.txt. Created
libc/utils/docgen/time.yaml to define the functions.
Assisted-by: Automated tooling, human reviewed.
Commit: d68dc184b1cec0a01876b3f635bce6c25a64edf6
https://github.com/llvm/llvm-project/commit/d68dc184b1cec0a01876b3f635bce6c25a64edf6
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/pre-fir-tree-assigned-goto.f90
Log Message:
-----------
[flang][PFT] record every target of an assigned GO TO (#210065)
Assigned GO TO (`go to v [, (l1, l2, ...)]`) is the third multiway
branch in the language, alongside the computed GO TO and arithmetic IF
that were addressed in PR #210012. Its PFTBuilder handler previously
did:
[&](const parser::AssignedGotoStmt &) {
eval.isUnstructured = true;
markSuccessorAsNewBlock(eval);
},
i.e. it recorded no branch targets at all -- neither `controlSuccessor`
nor `extraControlSuccessors` was populated.
Handle the assigned GO TO the same way PR #210012 handles the computed
GO TO and arithmetic IF: iterate every possible target and call
`markBranchTarget(eval, label)` for each, so that `controlSuccessor`
receives the first and `extraControlSuccessors` receives the rest.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: d134db0b2b989a2b15f91f24acca43497dfe0919
https://github.com/llvm/llvm-project/commit/d134db0b2b989a2b15f91f24acca43497dfe0919
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Remove byte-multiple trip count requirement (#210086)
The newly added carryless-multiply CRC loop optimization (#203405) does
not require a byte-multiple trip count unlike the Sarwate method which
was previously implemented. Loosen this requirement in HashRecognize and
reapply it in `optimizeCRCLoop`.
Commit: cc98c1eb84c690c65fba77b72c269a869978c898
https://github.com/llvm/llvm-project/commit/cc98c1eb84c690c65fba77b72c269a869978c898
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/IR/CycleInfo.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/IR/CycleInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[CycleInfo] Represent cycles by an opaque handle. NFC (#210117)
Consumers refer to a cycle by a GenericCycle pointer into
GenericCycleInfo's storage. Introduce GenericCycleRef, a value handle
wrapping the cycle's preorder index, and route every GenericCycleInfo
query and mutation through it. GenericCycle becomes an internal
implementation detail, so its storage representation can change without
touching callers.
Aided by Claude Opus 4.8, reviewed by Fable 5
Suggested by
https://github.com/llvm/llvm-project/pull/208614#pullrequestreview-4683378136
Commit: 90e31c46d005ae0a7f5968c38a9310bee499923c
https://github.com/llvm/llvm-project/commit/90e31c46d005ae0a7f5968c38a9310bee499923c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/LTO/LTO.cpp
A llvm/test/ThinLTO/X86/Inputs/cache-defined-globals-order.ll
A llvm/test/ThinLTO/X86/cache-defined-globals-order.ll
Log Message:
-----------
[LTO] Sort DefinedGlobals in LTO cache key (#210025)
Sort the DefindeGlobals by GUID when computing the LTO cache key, to
avoid making the cache key dependent on the insertion order. This fixes
large compile-time regressions in rust incremental builds.
Alternatively one could make collectDefinedGVSummariesPerModule() work
on the sortedRange(), but as that is also used in other places, it
probably makes sense to sort locally.
The issue was introduced in 760bb06cb3cd98832f1e4e7a4eaebd98b66d2bdd.
Commit: b69dd3366863acff56b0b2efdc4c4938097bb43e
https://github.com/llvm/llvm-project/commit/b69dd3366863acff56b0b2efdc4c4938097bb43e
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
Log Message:
-----------
[mlir][vector][nfc] Update integration tests (#210090)
Add comments, unify naming, remove redundant printing hooks.
Commit: 8b269587981fdc3b487cda5559ef75eeb475e613
https://github.com/llvm/llvm-project/commit/8b269587981fdc3b487cda5559ef75eeb475e613
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
Log Message:
-----------
[VectorCombine][X86] Add test coverage for #209714 (#210063)
Commit: 981c0f9037fc2e1e5c70ba2cfe61128557b5eeff
https://github.com/llvm/llvm-project/commit/981c0f9037fc2e1e5c70ba2cfe61128557b5eeff
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/thread/finish-from-empty-func/TestEmptyFuncThreadStepOut.py
M lldb/test/API/functionalities/thread/finish-from-empty-func/main.c
Log Message:
-----------
[lldb][test] Handle potential compiler differences in TestEmptyFuncThreadStepOut.py (#210050)
Fixes #195958
It was reported that this test sometimes failed in CI because lldb would
step out to line 6 instead of line 7.
Jim Ingham expained on the issue that both could be valid locations
(https://github.com/llvm/llvm-project/issues/195958#issuecomment-4384269846).
There's no garauntee that "step out" would go to the source line after
the call you step out of. All it does is go to the first location
outside of the call. If the compiler so chose, that could be on the same
line as the call.
I was not able to reproduce this failure mode, but I think it was
happening in CI before, and is possible. So I've made the test accept
line 6 or 7. Anything further than that we've gone too far and the test
will fail.
Commit: 9ee8b18b6c0758e57cedfa57e99ba85dfd247d35
https://github.com/llvm/llvm-project/commit/9ee8b18b6c0758e57cedfa57e99ba85dfd247d35
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
Log Message:
-----------
[mlir][vector] Fix e2e test post #210090 (#210270)
Failing bots:
* https://lab.llvm.org/buildbot/#/builders/177/builds/37626
* https://lab.llvm.org/buildbot/#/builders/116/builds/30570
Commit: 4894d4e87c332af24809b20573d880a4073b738b
https://github.com/llvm/llvm-project/commit/4894d4e87c332af24809b20573d880a4073b738b
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/Driver/darwin-target-variant-sdk-version.c
Log Message:
-----------
[clang][driver] Add a -target-variant alias for -darwin-target-variant (#208388)
Swift Build uses the `-target-variant` argument which is an alias for
-darwin-target-variant that's only present in the Xcode version of
clang. Upstream it for general support and parity with swiftc.
Co-authored-by: Alex Lorenz <arphaman at gmail.com>
Commit: 12c4c0bf0269218c6ffdddae1c895f892a3e4e75
https://github.com/llvm/llvm-project/commit/12c4c0bf0269218c6ffdddae1c895f892a3e4e75
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
Log Message:
-----------
[AMDGPU] Handle expert scheduling VA_VDST WAR hazards (#201619)
Handle WAR hazards where a VALU reading a VGPR is followed by a VMEM
writing the same VGPR. It is possible, though not very common, that the
VMEM will complete first. To guard against this the compiler must insert
a wait on VA_VDST.
Commit: 2580624091e36b85c162439513eef8e752217a1d
https://github.com/llvm/llvm-project/commit/2580624091e36b85c162439513eef8e752217a1d
Author: cqwrteur <oyzawqgcfc at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
Log Message:
-----------
[libcxx] avoid include Uppercase windows headers (#208903)
We should use unknwn.h and windows.h instead of Unknwn.h and Windows.h
because Linux and other non‑Windows systems treat filenames as
case‑sensitive. Windows does not, so mixed‑case includes work there but
break elsewhere. Both mingw‑w64‑crt and windows‑msvc‑sysroot provide all
Windows headers in fully lowercase, so using the lowercase forms ensures
consistent cross‑platform builds.
Fixes #208901
Commit: a3bcc010c7b7d5fa43ab7928a88312841c4322dd
https://github.com/llvm/llvm-project/commit/a3bcc010c7b7d5fa43ab7928a88312841c4322dd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
A lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)
In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When importing ARM64X
image, add both native and EC views to the symbol table on EC targets.
Also getMachine() on such images returns ARM64X, treat it as ARM64
instead.
Commit: f520e7083a12f0642eff8fc19fc4c90ccccc7da5
https://github.com/llvm/llvm-project/commit/f520e7083a12f0642eff8fc19fc4c90ccccc7da5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
Log Message:
-----------
[SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (#209966)
Commit: 0e1b0935ff6f326ba1b9c2d23ba9fa7b41e6941d
https://github.com/llvm/llvm-project/commit/0e1b0935ff6f326ba1b9c2d23ba9fa7b41e6941d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
Log Message:
-----------
[SPIR-V] Preserve signed i1 semantics in sitofp (#209232)
selectIToF hardcoded IsSigned=false when materializing the bool-to-int
conversion, so sitofp i1 true was miscompiled as 1.0 instead of -1.0
Commit: 5fcab35be3b450256e3b02a735900071c0b74a54
https://github.com/llvm/llvm-project/commit/5fcab35be3b450256e3b02a735900071c0b74a54
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/amdhsa-kernel-prologue.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
Log Message:
-----------
[AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (#209517)
Warn if an entrypoint does not start with the standard workaround
sequence.
Commit: 6cafa889cd398ca70992e0df518b2414a2607327
https://github.com/llvm/llvm-project/commit/6cafa889cd398ca70992e0df518b2414a2607327
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit
M lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
A lldb/test/Shell/SymbolFile/NativePDB/static-class-constants.cpp
Log Message:
-----------
[lldb][NativePDB] Use active bits for constant width (#196104)
Static constants with bit widths less than 16 (e.g. char/unsigned char)
in classes were not available. These constants are still encoded with 16
bits
([here](https://github.com/llvm/llvm-project/blob/dd145eb8997878143f648a7601741f6409330963/llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp#L341-L343))
even though they only need less bits. When we tried to create an
initializer for them, we'd check if the bit width (=16) was small enough
to fit into the target (<16). This would fail.
This was a problem in the following code:
```cpp
struct Foo {
// width(unsigned char) = 8, but 255 was encoded and read as 16 bit
static constexpr unsigned char u8_max = 255;
};
```
This PR fixes the issue by using `APSInt::getActiveBits` for unsigned
types and `APSInt::getSignificantBits` for signed types. They get the
number of bits required to encode the value. For example a constant 64
would need 7 bits in unsigned and 8 bits in signed types.
Commit: e8f9589942ecd93d94de2af2e875964693e55129
https://github.com/llvm/llvm-project/commit/e8f9589942ecd93d94de2af2e875964693e55129
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/dxc_debug.hlsl
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/test/CodeGen/DirectX/ContainerData/ContainerFlags.ll
Log Message:
-----------
[Driver][DirectX] Add `/Qstrip_debug` flag (#204832)
Add the flag that removes ILDB part from the main DXContainer.
Commit: d444e3ebb8ae69cdb628be3b3b0c632f13df9a08
https://github.com/llvm/llvm-project/commit/d444e3ebb8ae69cdb628be3b3b0c632f13df9a08
Author: Chibuoyim (Wilson) Ogbonna <ogbonnachibuoyim12 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprCXX.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
Log Message:
-----------
[Clang][Sema] Fix crash in UnresolvedMemberExpr check (#209792)
This closes https://github.com/llvm/llvm-project/issues/209427
The test currently crashes because while iterating over the candidate
members of an unresolved member expression, `decl` is a `UsingShadowDecl`
with underlying decl as `UnresolvedUsingValueDecl`.
The current `isa<UnresolvedUsingValueDecl>(decl)` guard only checks the
outer `UsingShadowDecl` and misses the unresolved-using decl hidden
inside it, so `getAsFunction()` returns nullptr and
`cast<CXXMethodDecl>(nullptr)` asserts.
This patch checks the `UnresolvedUsingValueDecl` inside by calling
`getUnderlyingDecl()` before the guard.
This used to happen before a2794f9f363361f87a3538b90b78ff13381d5ce1.
Commit: 06effa5b965f68a24dcea8550efc86225b186f54
https://github.com/llvm/llvm-project/commit/06effa5b965f68a24dcea8550efc86225b186f54
Author: mayanksolanki393 <mayanksolanki393 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/Verifier/matrix-intrinsics.ll
Log Message:
-----------
[LLVM][Verifier] Remove constant-only matrix stride check (#207665)
Remove the verifier check requiring constant column-major matrix
load/store strides to be greater than or equal to the row count.
The stride operand is not an immarg, so the verifier must not enforce
constraints that only apply when the argument happens to be constant.
Commit: afa73e4ff6db57b0416eb44127105b8092bd01f8
https://github.com/llvm/llvm-project/commit/afa73e4ff6db57b0416eb44127105b8092bd01f8
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
Log Message:
-----------
[ConstraintElimination] Handle equality predicates with signed system (#205331)
Equality predicate solving has been supported for quite a while, eq/ne
facts were extended to the signed constraint system more recently
(7fb97bee9269f0d4239908ac8def70be696991c6). When solving
eq/ne conditions, query the signed system as well on inconclusive
answers from the unsigned one.
Fixes: https://github.com/llvm/llvm-project/issues/205282.
Fixes: https://github.com/llvm/llvm-project/issues/63505.
Commit: 2b2df2677619cb0377d27d8b766b8fc265749345
https://github.com/llvm/llvm-project/commit/2b2df2677619cb0377d27d8b766b8fc265749345
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
R lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
Revert "[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)" (#210299)
This reverts commit a3bcc010c7b7d5fa43ab7928a88312841c4322dd, which
breaks in asan build.
Commit: 2a006dff821342c1726fd3137f804186851a26bb
https://github.com/llvm/llvm-project/commit/2a006dff821342c1726fd3137f804186851a26bb
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vashr.mir
Log Message:
-----------
[AArch64][GlobalISel] Add sign bits for G_VASHR (#210269)
Ports the `AArch64ISD::VASHR` case from
`ComputeNumSignBitsForTargetNode` to the GlobalISel hook: an arithmetic
right shift by K adds K copies of the sign bit, so the result has
`min(SignBits(Src) + K, ScalarSizeInBits)` sign bits. `G_VASHR`'s shift
amount is always an immediate in `[1, ElementBits]`.
Follow-up to #198314, which added the `G_FCM*` cases.
Assisted by Claude (Anthropic).
Commit: a4cad33430cf5d2d03eb91ce5e41ed1b9ef7cc4d
https://github.com/llvm/llvm-project/commit/a4cad33430cf5d2d03eb91ce5e41ed1b9ef7cc4d
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Support/KnownBits.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[KnownBits] Use X < Y identity and umin(MaxX, MaxY - 1) bound in urem (#210262)
Tightens `KnownBits::urem` with the two facts `ConstantRange::urem`
already uses:
- `L % R == L` when `MaxL < MinR`: return the LHS bits unchanged. This
can propagate known one bits, which the current leading-zeros-only
reasoning never produces.
- `L % R <= umin(MaxL, MaxR - 1)`, since a zero divisor is UB: keep that
bound's leading zeros. This is one bit stronger than the per-operand
leading-zero count when `MaxR` is a power of two, and together with
`remGetLowBits` it subsumes the power-of-two-constant special case,
which is removed.
Soundness is covered by the existing exhaustive unit test (widths 1 and
4; additionally brute-forced at width 5). Across all 6480 valid width-4
KnownBits pairs, non-optimal results drop from 3332 to 2090. The
residual is number-theoretic (e.g. the exact value of `10 % 3`), out of
reach of leading-bit/range reasoning, so `CheckOptimality` stays off for
urem, as for udiv (#209360).
Assisted by Claude (Anthropic).
Commit: 671c0a275a1f304f22855fabb299090233fdbd54
https://github.com/llvm/llvm-project/commit/671c0a275a1f304f22855fabb299090233fdbd54
Author: tyan0 <takashi.yano at nifty.ne.jp>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
A clang/test/Driver/Inputs/resource_dir/lib/cygwin/libclang_rt.builtins-x86_64.a
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-pc-windows-cygnus/libclang_rt.builtins.a
A clang/test/Driver/cygwin-print-file-name.c
Log Message:
-----------
[Clang][Driver] Fix compiler-rt library directory for cygwin (#208925)
If compiler-rt is built with `LLVM_ENABLE_PER_TARGET_RUNTIME_DIR=OFF`,
its search directory is incorrect.
Specifically, `ToolChain::getOSLibName()` returns `windows` instead of
`cygwin` in a Cygwin environment, due to falling back to getOS(). This
results in a link error against compiler-rt.
This patch makes `getOSLibName()` return `cygwin`, ensuring that
compiler-rt is linked correctly.
---------
Signed-off-by: Takashi Yano <takashi.yano at nifty.ne.jp>
Commit: 8377d59dfade3f1a4bf5779ddd90359bd4ddc249
https://github.com/llvm/llvm-project/commit/8377d59dfade3f1a4bf5779ddd90359bd4ddc249
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libsycl/src/event.cpp
M libsycl/unittests/event/event.cpp
Log Message:
-----------
[libsycl] add explicit instantiations for event::get_profiling_info (#210118)
Assisted by GH Copilot.
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 4d37b5bf3099d099302cce447168b3ece4efef5e
https://github.com/llvm/llvm-project/commit/4d37b5bf3099d099302cce447168b3ece4efef5e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
Log Message:
-----------
[LV] Add additional SCEV expansion tests with AddRecs. (NFC) (#210159)
Add additional test coverage for SCEV expansion of AddRecs, including
cases where extends are needed, different start and steps, as well as
cases where the outer header is not the plan's entry block.
Commit: a9e5bb572703780e3eea4a2759104a141ea73466
https://github.com/llvm/llvm-project/commit/a9e5bb572703780e3eea4a2759104a141ea73466
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/tools/clang-ssaf-linker/BUILD.gn
Log Message:
-----------
[gn build] Port 398f2117379f (#210308)
Commit: 9a2d9c7fef47c0af321150f75d8f21db06cccb43
https://github.com/llvm/llvm-project/commit/9a2d9c7fef47c0af321150f75d8f21db06cccb43
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/ARM/select-imm.ll
A llvm/test/Transforms/IndVarSimplify/iv-widen-addrec-flag-inferred-late.ll
Log Message:
-----------
[SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (#208805)
Move AddRec fold for ZExt & SExt before existing SCEV lookup. This can
improve results, when we constructed SCEV for a ZExt/SExt during earlier
analysis and flags on the operand AddRec have not been
refined/strengthend yet.
This improves results in some cases and fixes a regression here:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/654#discussion_r3554885279.
On a large C/C++ corpus with 32k bitcode files, ~2% more IVs get
widened, removing a large number of ZExt instructions.
Compile-time impact in the noise
https://llvm-compile-time-tracker.com/compare.php?from=167d65906cc3c636221158abe8289ab4a03dfc7d&to=381abca0d5ead4443d86287d754f47c21396a9be&stat=instructions:u
Commit: 62a932ac3e2702a5493934c6362f9e058a204557
https://github.com/llvm/llvm-project/commit/62a932ac3e2702a5493934c6362f9e058a204557
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/SystemZ/systemz-module.flags.c
M llvm/include/llvm/IR/Module.h
M llvm/lib/IR/Module.cpp
Log Message:
-----------
[SystemZ][z/OS] Fix zos_translation_time module flag (#210058)
The zos_translation_time flag needs to be 64-bit to handle the year 2038
problem.
Commit: 23b0281d75a4320a4e6e3d837edf94911d98d252
https://github.com/llvm/llvm-project/commit/23b0281d75a4320a4e6e3d837edf94911d98d252
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/tailcall-i686-pic.ll
Log Message:
-----------
[X86] Fix assertion failure for tail call on i686+pic (#210302)
The pattern for TCRETURNmi has a IsNotPIC predicate, but the
checkTCRetEnoughRegs() predicate that's part of the X86tcret_enough_regs
PatFrag is evaluated first, so we can't assert that PIC is disabled
here. We should just return false in that case.
Fixes https://github.com/llvm/llvm-project/issues/210300.
Commit: 38104cf836c3903647c917a5b251e938f4eadbb9
https://github.com/llvm/llvm-project/commit/38104cf836c3903647c917a5b251e938f4eadbb9
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
A llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
A llvm/test/CodeGen/AArch64/sve-ptrue-coalesce.mir
Log Message:
-----------
[LLVM][SVE] Add MachineInst pass to coalesce PTRUE instructions. (#204820)
SVE predicate registers contain a bit for each byte of a data register.
When operating on bigger element types the overlaping predicate bits are
grouped together but typically only the least-significant-bit is read as
part of the operation. This means the value of the other bits does not
affect the operation, making it possible to use the result of PTRUE for
a larger element typed operation, assuming the predicate patterns are
equivalent. For example:
ADD_S (PTRUE_H 31), Z0, Z1 == ADD_S (PTRUE_S 31), Z0, Z1
AArch64PTrueCoalescingPass uses this fact to reduce the number of PTRUE
instructions in a function, with the general trend towards needing a
single PTRUE based on the smallest element type in use.
NOTE: The pass will be enabled by default using a dedicated PR to make
it easier to revert if something goes wrong.
Commit: de4f929700f8d87041e0b050ec6028f0ac5276ad
https://github.com/llvm/llvm-project/commit/de4f929700f8d87041e0b050ec6028f0ac5276ad
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_x86.h
Log Message:
-----------
[lldb][x86] Remove GCC 6 workaround (#210317)
Added by 3bea7306e8669f94bacafae68748a9139cfc0b98.
We now require GCC >= 7.4 so it can be removed.
I tested a standalone reproducer with GCC 7.3 and
clang 5. Neither have the problem.
https://godbolt.org/z/3zKrT9c8s
Standalone reproducer:
```
struct Base {
Base(int) {}
};
struct Derived : virtual Base {
#ifdef WORKAROUND
Derived(int a): Base(a) {}
#endif
virtual void g() = 0;
};
struct Final : Derived {
Final(int n) : Base(n)
#ifdef WORKAROUND
, Derived(n)
#endif
{}
void g() override {}
};
```
Commit: b9f5bcbcfbe6aa4943c808afd3bb82243ecb3193
https://github.com/llvm/llvm-project/commit/b9f5bcbcfbe6aa4943c808afd3bb82243ecb3193
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/sysv_abi.c
R clang/test/CodeGen/target-avx-function-abi.c
R clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
Log Message:
-----------
Revert "[clang][CodeGen][X86_64] Honor per-function AVX ABI in C/C++ call paths, maintain old psABI for PlayStation." (#210303)
Reverts llvm/llvm-project#193298
Causes a major compile-time regression.
Commit: 75ec1a4e80a9377f8f1e2ff063b094e016787926
https://github.com/llvm/llvm-project/commit/75ec1a4e80a9377f8f1e2ff063b094e016787926
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-default-address-space.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-init-expr.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-multi-gve.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-no-backing-var.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-no-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-path-null.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-type-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugGlobalVariable (#207230)
Add emitDebugGlobalVariable to the NSDI handler, translating each
DIGlobalVariable to a
[DebugGlobalVariable](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugGlobalVariable)
ext inst.
Commit: 4f76a4c5a3f8711fe13b05c0f93ac78349396292
https://github.com/llvm/llvm-project/commit/4f76a4c5a3f8711fe13b05c0f93ac78349396292
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[NFC] RelNotes Formatting fix I screwed up in 209893 (#210325)
Commit: 40ae05d4773f5c1b2a84ea7dc908d92671b8daa9
https://github.com/llvm/llvm-project/commit/40ae05d4773f5c1b2a84ea7dc908d92671b8daa9
Author: adams381 <adams at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/IntTypeABIAlignTest.cpp
Log Message:
-----------
[CIR] Return power-of-two ABI alignment for non-fundamental int widths (#210187)
`cir::IntType::getABIAlignment` returns `width / 8` for non-`_BitInt`
integers. For a non-fundamental width such as `i24` it returns 3, which
is
not a power of two, so a consumer that builds an `llvm::Align` from it
would
hit the power-of-two assertion unless it rounds the value up itself.
This rounds the alignment up to a power of two inside `getABIAlignment`,
matching how LLVM's default DataLayout aligns these (an `i24` aligns
like
`i32`). The fundamental widths are unchanged (`i8` -> 1, `i16` -> 2,
`i32` -> 4, `i64` -> 8), `__int128` stays at 16, and a sub-byte width
like
`i1` now reports 1 instead of 0. A unit test pins these cases.
Commit: 1f2772f8e26beb909c2a559f1fb08697e3e06909
https://github.com/llvm/llvm-project/commit/1f2772f8e26beb909c2a559f1fb08697e3e06909
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP conv2d (#210054)
- Adds profile compliance support for MXFP conv2d
- Relax conv2d accumulator constraits. They are checked as part of
validation pass
and this would allow experimentation with different types.
Signed-off-by: Iliyan Georgiev <iliyan.georgiev at arm.com>
Commit: 6f64e7cf0ad7699a5f1e6b2418d4c2cdcdb26470
https://github.com/llvm/llvm-project/commit/6f64e7cf0ad7699a5f1e6b2418d4c2cdcdb26470
Author: Shreyansh Lodha <lodhashreyansh1603 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/Parser.cpp
M clang/test/AST/ast-dump-decl.cpp
A clang/test/AST/ast-dump-deleted-defaulted-range.cpp
M clang/test/AST/ast-dump-funcs.cpp
M clang/test/AST/ast-dump-record-definition-data-json.cpp
M clang/test/Analysis/inlining/Inputs/expected-plists/path-notes.cpp.plist
M clang/test/CoverageMapping/default-method.cpp
M clang/unittests/AST/SourceLocationTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
Log Message:
-----------
[Clang][AST] Add source range for deleted and defaulted functions (#205408)
Earlier wrong ranges for default and deleted functions were reported.
Post this fix all ranges for functions are reported.
Fix: Extended the declarator's source range to include the delete /
default tokens by calling
D.SetRangeEnd(PP.getLocForEndOfToken(KilLoc).getLocWithOffset(-1)) after
consuming each keyword in ParseFunctionDefinition. Previously, the range
ended at the function name, onitting the delete/default specifier
entirely.
Regression tested and no regressions found.
Assisted-by: Claude Code (Anthropic) — used in developing this patch.
Closes #64805
Commit: 7c1b00b38d7fb9eecfd345c51f9e9509e6b039ad
https://github.com/llvm/llvm-project/commit/7c1b00b38d7fb9eecfd345c51f9e9509e6b039ad
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
Log Message:
-----------
[AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (#210340)
iPTR means i64 here, but this node operates on 32-bit LDS addresses.
Commit: 499b69cf07e03a23a420ee773261fcfcfc1c3df9
https://github.com/llvm/llvm-project/commit/499b69cf07e03a23a420ee773261fcfcfc1c3df9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
Log Message:
-----------
[DWARFLinker] Fix data race on the per-unit file-name cache (#208967)
CompileUnit::getDirAndFilenameFromLineTable reads and mutates the unit's
FileNames DenseMap without synchronization. During the parallel
type-name assignment phase a unit's cache is touched both by its own
worker and, through cross-unit type-name references
(addReferencedODRDies calling addDieNameFromDeclFileAndDeclLine) by
other units' workers.
The concurrent find/insert/grow corrupts the map and trips the
assertion:
```
Assertion failed: (TheBucket), function findBucketForInsertion, DenseMap.h
```
Guard the cache with a mutex. Store each entry in a heap-allocated pair
so the StringRefs handed back to callers stay valid across a concurrent
rehash. Otherwise a short (small-string-optimized) file name would move
when another insertion grows the map, dangling a StringRef already
returned.
Commit: 2a00d50e6012e1ee31904d394c088be907b6aa8b
https://github.com/llvm/llvm-project/commit/2a00d50e6012e1ee31904d394c088be907b6aa8b
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
Log Message:
-----------
[Flang][OpenACC] Check routine level for function references in loops (#209529)
Extend the loop/routine-level compatibility check to `FunctionReference`
calls. Resolve `!$acc routine` information from procedure pointers and
interface symbols, not only `SubprogramDetails`.
Commit: f1b5b061832610e78d5be7313f0ab3e5e55d790f
https://github.com/llvm/llvm-project/commit/f1b5b061832610e78d5be7313f0ab3e5e55d790f
Author: David Young <davidayoung at meta.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/main.py
A llvm/utils/lit/tests/Inputs/pass-env/lit.cfg
A llvm/utils/lit/tests/Inputs/pass-env/test.txt
A llvm/utils/lit/tests/pass-env.py
Log Message:
-----------
Modify lit config to allow specify extra env vars to pass through to lit invocation (#208239)
lit's pass-through environment allow-list is hard-coded in
TestingConfig.py. There are cases where a particular test environment
needs an extra variable passed through (e.g. credentials or tooling
paths required to fetch dependencies during a test), but today the only
way to add one is to fork this list downstream.
This adds a --pass-env NAME option (repeatable, and also honored via
LIT_OPTS) that copies the named variable from lit's environment into the
test environment, in addition to the built-in allow-list. Since the
caller chooses exactly which variables to forward, passing through a
wrong or sensitive variable is user error rather than a default. The
default is empty, so existing behavior — only the hard-coded list is
passed through — is unchanged.
test creation help via Claude
Commit: d7aacfc940c3f1553973f1ebf7d11a6513fda1ed
https://github.com/llvm/llvm-project/commit/d7aacfc940c3f1553973f1ebf7d11a6513fda1ed
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/common/DomainSocket.h
M lldb/source/Host/common/DomainSocket.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
M lldb/unittests/Utility/UriParserTest.cpp
Log Message:
-----------
[lldb] Support Windows paths in AF_UNIX domain-socket URIs (#206985)
On Windows an `AF_UNIX` socket path is a native filesystem path. Placed
directly in a unix-connect:// URI it isn't a valid `host:port`
authority, so `URI::Parse` confuses the drive letter colon as a port
separator and connection setup fails.
This patch converts the path in the [RFC
8089](https://datatracker.ietf.org/doc/html/rfc8089) file-URI form
instead which parses as an ordinary URI with an empty host. DomainSocket
converts between the native path and this URI form at its boundaries.
Both are no-ops on POSIX: behavior is unchanged, and `URI::Parse` and
the GDB-remote consumers are left untouched.
rdar://180736036
Commit: 0b1652db8a18b336f39855fcf9b5137fa0b4b3c9
https://github.com/llvm/llvm-project/commit/0b1652db8a18b336f39855fcf9b5137fa0b4b3c9
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-xchg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv64.mir
Log Message:
-----------
[RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (#209983)
This commit makes `xchg` consistent with `add/and/or/xor` across all
type/extension combinations. Updates `legalizer-info-validation.mir` for
the newly defined rules and adds `atomicrmw-xchg.ll` and
`legalize-atomicrmw-xchg-rv{32,64}.mir` tests.
Commit: d05f7b28b6f7de6e9ca89e1b9e3aca8c8380e322
https://github.com/llvm/llvm-project/commit/d05f7b28b6f7de6e9ca89e1b9e3aca8c8380e322
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port 38104cf836c3 (#210356)
Commit: 45f76eac198fdee52d61c57e667f48a7f5e9581f
https://github.com/llvm/llvm-project/commit/45f76eac198fdee52d61c57e667f48a7f5e9581f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port 40ae05d4773f (#210357)
Commit: 30f270edb42c5d37e4c4a413ebfc7a6513565b30
https://github.com/llvm/llvm-project/commit/30f270edb42c5d37e4c4a413ebfc7a6513565b30
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
A lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210311)
In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When linking against
an ARM64X image, add both native and EC views to the symbol table on EC
targets. Also getMachine() on such images returns ARM64X, treat it as
ARM64 instead.
Commit: 4671287932028a32caa4bce6aea35f9de3f1daa8
https://github.com/llvm/llvm-project/commit/4671287932028a32caa4bce6aea35f9de3f1daa8
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Reuse preloaded exe module on launch (#210010)
# Brief
Recreating the module everytime causes the path to be canonicalized.
This does not work well with subst drives, because the newly created
module will not have the correct drive path, causing breakpoints to be
unresolved.
# Description
`ProcessWindows::OnDebuggerConnected` derives the executable module from
`GetModuleFileNameExW` on every connect. This returns the process
image's *real* path, so when the target is created via a subst'd or
mapped drive (e.g. `S:\...\a.out`, where `S:` is subst for `C:\S`) it
comes back as `C:\S\...\a.out`. `GetOrCreateModule` then fails to match
the module LLDB had already preloaded and creates a duplicate instead.
The duplicate leaves the original module's breakpoint location orphaned
unresolved while the new module's location is resolved, so a source line
breakpoint reports two locations with only one resolved. Generic tests
that assert exactly one resolved location fail with `"2 != 1"` and
`"Expecting 1 locations, got 2"`.
# Fix
This patch fixes this by first attempting to reuse the existing module
if it exists. In practice, LLDB only looks for the executable during
attach.
This is a problem in Swiftlang where we run our tests with a subst
drive. The impacted tests are:
-
`lang/c/{array_types,function_types,set_values,enum_types,anonymous,forward,local_variables}`
- `lang/cpp/{class_types,inlines}`
- `commands/{apropos/with-process,command/nested_alias,memory/write}`
- `functionalities/{memory/find,dead-strip,memory/holes}`
- `commands/expression/entry-bp`
Commit: e57b9c0761706905e42da3cfa485cebc3629d72a
https://github.com/llvm/llvm-project/commit/e57b9c0761706905e42da3cfa485cebc3629d72a
Author: Prajwal Nadig <pnadig at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
A clang/test/ExtractAPI/availability_typedef_anonymous_record.c
Log Message:
-----------
[ExtractAPI] Include availability attributes for anonymous typedefs (#209187)
When an anonymous type is defined and has availability attributes, the
attributes are attached to the typedef rather than the type being
defined. This patch updates the anonymous type handling logic to merge
the availability from the typedef in order to correctly include it in
the symbol graph.
rdar://125497949
Commit: 06340b81573a6824c0ddd54fcba5ae8ffacacd6f
https://github.com/llvm/llvm-project/commit/06340b81573a6824c0ddd54fcba5ae8ffacacd6f
Author: Prajwal Nadig <pnadig at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ExtractAPI/DeclarationFragments.h
M clang/lib/ExtractAPI/DeclarationFragments.cpp
A clang/test/ExtractAPI/objc_nullability.m
Log Message:
-----------
[ExtractAPI] Include nullability attributes (#209221)
Nullability attributes (nullable, nonnull, null_unspecified,
null_resettable) add valuable context about the type, and would be
useful when viewing declarations. This patch updates ExtractAPI to
include these attributes in the symbol graph.
rdar://139097216
Commit: 709b7d1bd4a71e484702d610f81b5cf84303386f
https://github.com/llvm/llvm-project/commit/709b7d1bd4a71e484702d610f81b5cf84303386f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Pull out isFoldableAsShuffle lamdba as helper function. NFC. (#210354)
For future reuse.
Commit: de5cef3127047836fceb416f8083942783834489
https://github.com/llvm/llvm-project/commit/de5cef3127047836fceb416f8083942783834489
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-reduce-to-contract.mlir
Log Message:
-----------
[mlir][vector] Extend `combineContractAndBroadcast` to accept `vector.shape_cast` (#208752)
`combineContractAndBroadcast` is a pattern that matches
`vector.contract` operations whose inputs are defined by
`vector.broadcast`, e.g.:
```mlir
%0 = vector.broadcast %lhs : vector<8x4xi32> to vector<1x8x4xi32>
%1 = vector.broadcast %rhs : vector<8x4xi32> to vector<1x8x4xi32>
%result = vector.contract {
indexing_maps = [#map0, #map1, #map2],
iterator_types = ["reduction", "parallel", "parallel", "reduction"],
kind = #vector.kind<add>
} %0, %1, %acc : vector<1x8x4xi32>, vector<1x8x4xi32> into vector<8x8xi32>
```
The pattern folds away the reduction over a unit dimension introduced by
the defining operations, producing a simplified `vector.contract`:
```mlir
vector.contract {
indexing_maps = [#[[$MAP0]], #[[$MAP1]], #[[$MAP2]]]
iterator_types = ["parallel", "parallel", "reduction"]
} %0, %1, %acc : vector<8x4xi32>, vector<8x4xi32> into vector<8x8xi32>
```
This change extends the pattern to also accept broadcast-like
`vector.shape_cast` operations:
```mlir
%0 = vector.shape_cast %lhs : vector<8x4xi32> to vector<1x8x4xi32>
%1 = vector.shape_cast %rhs : vector<8x4xi32> to vector<1x8x4xi32>
%result = vector.contract {
indexing_maps = [#map0, #map1, #map2],
iterator_types = ["reduction", "parallel", "parallel", "reduction"],
kind = #vector.kind<add>
} %0, %1, %acc : vector<1x8x4xi32>, vector<1x8x4xi32> into vector<8x8xi32>
```
Note that `mlir::vector::isBroadcastableTo` was only moved to make it
available to the newly introduced `ShapeCastOp` helper,
`ShapeCastOp::isBroadcastLike()`.
Commit: bcb459015e12fb03e4ae3d56393883b2974f96fb
https://github.com/llvm/llvm-project/commit/bcb459015e12fb03e4ae3d56393883b2974f96fb
Author: Zachary Henkel <zachary.henkel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/android_commands/android_common.py
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
Log Message:
-----------
Replace Python's deprecated tempfile.mktemp() with secure temp APIs (#210123)
Python's tempfile.mktemp() is deprecated and insecure: it returns a path
without creating the file, leaving a TOCTOU/symlink window before the
file is opened. Replace every use, choosing the temp API by lifetime:
- compiler-rt android_common.py adb(): tempfile.TemporaryFile
(anonymous, auto-deleted), read back via seek(0); drops manual
close()/unlink().
- compiler-rt android_common.py pull_from_device():
tempfile.TemporaryDirectory so "adb pull" writes into a private,
auto-cleaned directory.
- lldb examples delta.py / gdbremote.py start_gdb_log():
tempfile.NamedTemporaryFile(delete=False); the log must outlive the call
for a later stop_gdb_log, so it is intentionally not auto-deleted.
Reported by internal static analysis and contributed upstream for the
benefit of the wider community.
Assisted-by: GitHub Copilot CLI (Claude Opus 4.8)
I do not have commit access and will need someone to submit on my
behalf.
Commit: 5f7060ce4559c1079e850c96b106f1a43955b828
https://github.com/llvm/llvm-project/commit/5f7060ce4559c1079e850c96b106f1a43955b828
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/Sema.h
R clang/include/clang/Sema/TemplateInstCallback.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
R clang/test/Templight/templight-deduced-func.cpp
R clang/test/Templight/templight-default-arg-inst.cpp
R clang/test/Templight/templight-default-func-arg.cpp
R clang/test/Templight/templight-default-template-arg.cpp
R clang/test/Templight/templight-empty-entries-fix.cpp
R clang/test/Templight/templight-exception-spec-func.cpp
R clang/test/Templight/templight-explicit-template-arg.cpp
R clang/test/Templight/templight-memoization.cpp
R clang/test/Templight/templight-nested-memoization.cpp
R clang/test/Templight/templight-nested-template-instantiation.cpp
R clang/test/Templight/templight-one-instantiation.cpp
R clang/test/Templight/templight-prior-template-arg.cpp
Log Message:
-----------
[clang] remove templight support (#210166)
Removed as unmaintained, per discussion in
https://discourse.llvm.org/t/rfc-removing-templight-support/90777
Commit: 60846c8b0c1c47c03c25fe28ecaea00e698a3450
https://github.com/llvm/llvm-project/commit/60846c8b0c1c47c03c25fe28ecaea00e698a3450
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext][NFC] Add cross-project tests for packed zip/unzip intrinsics (#209575)
Commit: a55b011dabf8e5761d9955f98aa1138a10bd1a8a
https://github.com/llvm/llvm-project/commit/a55b011dabf8e5761d9955f98aa1138a10bd1a8a
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/test/CodeGen/SystemZ/systemz-module.flags.c
Log Message:
-----------
[SystemZ/[z/OS] Guard source-epoch related testcase to 64-bit clang targets (#210341)
This patch guards the following testcase for 64-bit clang targets Clang :: CodeGen/SystemZ/systemz-module.flags.c
Commit: d63bd842939f22fad4e29660d66b99a9bf94e4b4
https://github.com/llvm/llvm-project/commit/d63bd842939f22fad4e29660d66b99a9bf94e4b4
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/create-box-codegen.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
Log Message:
-----------
[flang] Added fir.create_box operation. (#210220)
This patch adds `fir.create_box` operation that allows
creating `!fir.box<>` values with arbitrary byte strides.
It can be used to recreate boxes describing non-contiguous
arrays from descriptor components (base_addr/lbs/extents/strides)
across offload regions.
This is just initial definition and code generation code.
The folders and passes producing this operation will be added
later.
Commit: fd55bbd6022ccb8d854f580b56c39177e80c256e
https://github.com/llvm/llvm-project/commit/fd55bbd6022ccb8d854f580b56c39177e80c256e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/profile/Linux/counter_promo_for.c
M compiler-rt/test/profile/Linux/counter_promo_while.c
Log Message:
-----------
[compiler-rt] Fix tests after #205331 (#210370)
New optimizations changed some compiler-rt tests. Update the test
expectations based on this.
Fixes #210355.
Commit: 0b666f74f94fffc2bc3380365704bcb61f2767d2
https://github.com/llvm/llvm-project/commit/0b666f74f94fffc2bc3380365704bcb61f2767d2
Author: David Young <davidayoung at meta.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
Log Message:
-----------
Add missing BigArchive container plugin to lldb's bazel build (#210304)
Another missing plugin and its libraries in the LLDB bazel build. Based
this one on source/Plugins/ObjectContainer/Big-Archive/CMakeLists.txt
and its dependecies ( {}.cpp & {}.h)
waiting on CI to confirm bazel is correct as cannot build locally.
Can confirm this library will convert to BUCK internally at Meta and
build with buck2 where we do have in the default plugin list.
bazel rule assisted with: claude
Commit: 53c048b3732610c8d2d65c1d41603de26eb6ac4e
https://github.com/llvm/llvm-project/commit/53c048b3732610c8d2d65c1d41603de26eb6ac4e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/ci/images/libcxx_release_runners.txt
Log Message:
-----------
[libc++] Update release runners to the image that was used on main at the branch point (#210378)
This will allow retaining a stable image for CI throughout the whole
LLVM 23 release.
Commit: a67eac3e141e1044dd98524a010e719b42f51f5e
https://github.com/llvm/llvm-project/commit/a67eac3e141e1044dd98524a010e719b42f51f5e
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[NFC][AMDGPU] Cleanup in SOPInstructions.td (#210367)
- Eliminate code which was accidentally merged during a merge-conflict
(https://github.com/llvm/llvm-project/pull/203155/changes#r3560059941)
- Remove comments as they are specific to usubsat.
Commit: db1f902cd6a95c9b80136dfcbe8beb7a58290641
https://github.com/llvm/llvm-project/commit/db1f902cd6a95c9b80136dfcbe8beb7a58290641
Author: Mishal Shah <mishal_shah at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .github/workflows/premerge.yaml
Log Message:
-----------
Add macOS premerge check workflow (#207435)
Added a premerge check workflow for macOS self-hosted runners to build
and test projects.
Commit: f04bf4791ae6d56b822f9bca6eb82ce4adccb989
https://github.com/llvm/llvm-project/commit/f04bf4791ae6d56b822f9bca6eb82ce4adccb989
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/OSUtil/linux/CMakeLists.txt
M libc/src/__support/OSUtil/linux/auxv.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/sys/ipc/linux/CMakeLists.txt
M libc/src/sys/ipc/linux/ftok.cpp
R libc/src/sys/ipc/linux/kernel_statx.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_unlink.cpp
M libc/src/sys/time/linux/CMakeLists.txt
M libc/src/sys/time/linux/utimes.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
M libc/startup/linux/x86_64/tls.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][NFC] Port raw syscall users to existing syscall_wrappers (#208039)
Several call sites still invoked syscall_impl directly (or carried
their own SYS_* fallback ladders) for syscalls that already have a
wrapper in src/__support/OSUtil/linux/syscall_wrappers.
This PR removes these syscalls in favor of the syscall_wrappers.
Commit: 246c752ef1b6098a7aa222f02ca09db76e17cabe
https://github.com/llvm/llvm-project/commit/246c752ef1b6098a7aa222f02ca09db76e17cabe
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add layering deps (#210380)
Not sure why CI didn't catch it, but
c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75 adds some targets that are
broken when layering checks are enabled.
Commit: c42ce32264f94a8800f4250d7b716cca55f77df6
https://github.com/llvm/llvm-project/commit/c42ce32264f94a8800f4250d7b716cca55f77df6
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A compiler-rt/docs/ASanABI.md
R compiler-rt/docs/ASanABI.rst
A compiler-rt/docs/BuildingCompilerRT.md
R compiler-rt/docs/BuildingCompilerRT.rst
A compiler-rt/docs/TestingGuide.md
R compiler-rt/docs/TestingGuide.rst
M flang/docs/CMakeLists.txt
A flang/docs/CommandGuide/index.md
R flang/docs/CommandGuide/index.rst
A libsycl/docs/CodingGuidelines.md
R libsycl/docs/CodingGuidelines.rst
A libsycl/docs/index.md
R libsycl/docs/index.rst
M libsycl/test/README.md
A libunwind/docs/BuildingLibunwind.md
R libunwind/docs/BuildingLibunwind.rst
M libunwind/docs/conf.py
A libunwind/docs/index.md
R libunwind/docs/index.rst
M lldb/source/Plugins/TraceExporter/common/TraceHTR.h
A lldb/source/Plugins/TraceExporter/docs/htr.md
R lldb/source/Plugins/TraceExporter/docs/htr.rst
A llvm-libgcc/docs/LLVMLibgcc.md
R llvm-libgcc/docs/LLVMLibgcc.rst
M llvm-libgcc/generate_version_script.py
M offload/docs/conf.py
A offload/docs/index.md
R offload/docs/index.rst
Log Message:
-----------
[docs] Rename misc rst docs to md (#210208)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit.
Many of these miscellaneous .rst files are not actually part of a real
docs build, since docs/conf.py does not exist for many of them.
Commit: 9b096bb7abf7b57182ae8556451aa34dacd535ec
https://github.com/llvm/llvm-project/commit/9b096bb7abf7b57182ae8556451aa34dacd535ec
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/bindings/interfaces.swig
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBProtocolServer.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBProtocolServer.cpp
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBProtocolServerTest.cpp
Log Message:
-----------
[lldb] Add SBProtocolServer to start protocol servers programmatically (#209923)
Starting a protocol server (such as MCP, and in the future potentially
DAP) is only possible from the command line today, via `protocol-server
start`. Add an SB API so an embedder can start one in its own process
and learn where to connect.
SBProtocolServer wraps ProtocolServer::GetOrCreate/Start/Stop and
exposes the listening connection URI. This lets a tool host the engine's
protocol server in-process and talk to it as a normal client, reusing
the server's tools rather than reimplementing them.
Assisted-by: Claude
Commit: 2b6e9d261433f5ec8c49502f91d63dd7d07346c3
https://github.com/llvm/llvm-project/commit/2b6e9d261433f5ec8c49502f91d63dd7d07346c3
Author: Artem Belevich <tra at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/atomicrmw-allow-ftz-atomics.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/CodeGen/NVPTX/atomicrmw.py
M llvm/test/CodeGen/NVPTX/atomics.ll
Log Message:
-----------
[NVPTX] Set default value of nvptx-allow-ftz-atomics to true (#206154)
This is a follow-up to https://github.com/llvm/llvm-project/pull/200732.
Setting the default value of nvptx-allow-ftz-atomics to true preserves
the status quo. It allows the NVPTX backend to emit native
floating-point atomic add instructions by default, rather than falling
back to the CAS loop required for strict FTZ compliance.
Correct FTZ handling forces a lot of existing code to emit CAS loops.
This introduces thread divergence, breaking code that relies on atomic
operations being non-divergent (for example, warp-wide atomic additions
followed by a load of the reduced value without explicit
synchronization).
While FTZ-correct atomic behavior is desirable as a long-term default,
introducing thread divergence into a common operation that previously
"happened to work" without synchronization is highly disruptive.
Defaulting to true makes the FTZ-correct behavior opt-in for now,
allowing users time to audit and adapt their code.
Test cases are updated to verify both enabled and disabled states of the
option, alongside the new default behavior.
Commit: 50c8f07e3eebf1ff5a1d9378d77aef5df9583293
https://github.com/llvm/llvm-project/commit/50c8f07e3eebf1ff5a1d9378d77aef5df9583293
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
A clang/test/Analysis/std-c-library-functions-non-integral-ssize_t.cpp
Log Message:
-----------
[clang][analyzer] Fix assertion failure in StdLibraryFunctionsChecker with non-integral ssize_t (#209655)
In StdLibraryFunctionsCheckers' `RangeConstraint::checkSpecificValidity`
asserted that the constrained argument type is integral. When user code
typedefs `ssize_t` to a non-integral type (e.g. `float`) even though
this violates POSIX.1-2017, which requires `ssize_t` to be a signed
integer type, the signature still matches (same canonical type) and the
assertion fires during constraint validation. Remove it and let
`validateByConstraints` gracefully reject the summary by returning
false.
Fixes #209436
Commit: 40c4fea67f49b841bd064624219efceab91b65e0
https://github.com/llvm/llvm-project/commit/40c4fea67f49b841bd064624219efceab91b65e0
Author: Krisitan Erik Olsen <kristian.erik at outlook.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
A llvm/test/Transforms/SROA/sroa-self-referential-load.ll
Log Message:
-----------
[SROA] Fix assertion failure when promoting self-referential load/store (#208826)
When LoadAndStorePromoter::run processes a block where a store's value
operand is defined by the load being promoted (a self-referential cycle
in unreachable code), it sets StoredValue to the load instruction. When
it then calls replaceAllUsesWith, the doRAUW assertion fires because the
replacement value contains the value being replaced.
The single-block promotion paths in promoteSingleBlockAlloca already
guard against this with a check for ReplVal == LI, replacing with poison
instead. This patch adds the same guard to the in-block load path in
LoadAndStorePromoter::run, which was missing it. Substituting poison is
correct here since this situation only arises in unreachable code.
The regression was introduced in #135609, which added the
propagateStoredValuesToLoads path in SROA that routes through
LoadAndStorePromoter::run. LoadStoreRewriter handles aggregates and is
unrelated to this path.
Fixes #204799
Commit: 714d124d0aaf3effa3e83d01783fe0ed2cd3eea9
https://github.com/llvm/llvm-project/commit/714d124d0aaf3effa3e83d01783fe0ed2cd3eea9
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
Revert "[RISCV][P-ext][NFC] Add cross-project tests for packed zip/unzip intrinsics" (#210401)
Reverts llvm/llvm-project#209575
Commit: 93b1240309309d5c2f8f94527ff7c7bd5df359af
https://github.com/llvm/llvm-project/commit/93b1240309309d5c2f8f94527ff7c7bd5df359af
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/docs/ASanABI.md
M compiler-rt/docs/BuildingCompilerRT.md
M compiler-rt/docs/TestingGuide.md
M flang/docs/CommandGuide/index.md
M libsycl/docs/CodingGuidelines.md
M libsycl/docs/index.md
M libunwind/docs/BuildingLibunwind.md
M libunwind/docs/index.md
M lldb/source/Plugins/TraceExporter/docs/htr.md
M llvm-libgcc/docs/LLVMLibgcc.md
M offload/docs/conf.py
M offload/docs/index.md
Log Message:
-----------
[docs] Finish misc MyST migration (#210209)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #210208, which is the standalone rename
commit for this miscellaneous Markdown migration batch.
This was prepared with rst2myst plus LLM-assisted cleanup. LLDB man
pages are intentionally left as reStructuredText because LLDB man-page
building should not take on Markdown parser dependencies.
Unfortunately, many of these miscellaneous docs do not have working
standalone doc build targets, so I was not able to render HTML for all
of them. I think the scope is small enough that this is reviewable by
hand.
Commit: 91bb8f4ee8452d3e2bda7544556fa66dba462414
https://github.com/llvm/llvm-project/commit/91bb8f4ee8452d3e2bda7544556fa66dba462414
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
Log Message:
-----------
[VPlan] Introduce vputils::doesGeneratePerAllLanes (#199047)
Introduce a query for recipes that produce scalar values for all VF
lanes, returning true for non-single-scalar replicates, non-first-lane
SIVSteps, and a couple of VPInstructions.
Commit: 93bce300db95e4fbb82b1a6ef69fe125c71b77f3
https://github.com/llvm/llvm-project/commit/93bce300db95e4fbb82b1a6ef69fe125c71b77f3
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN log builtins (#198032)
Adds codegen support for the following AMDGCN log builtins:
- __builtin_amdgcn_logf (float)
- __builtin_amdgcn_log_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.log` intrinsic.
Commit: 3e55f3c56e8706fa12792b5a4de05f636bf798d0
https://github.com/llvm/llvm-project/commit/3e55f3c56e8706fa12792b5a4de05f636bf798d0
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][realpath][test] Create test files/directories (#209369)
Follow-up PRs will add path validation etc to `realpath`, which will
require paths to exist in the filesystem.
This PR bumps the memory limit in `HermeticTestUtils.cpp`. The realpath
unit tests allocate quite a few strings, and since memory in hermetic
tests is never freed, the unit test quickly reaches the limit.
Commit: 4070621c866fb4156f7c7d15039d12a4295f46c2
https://github.com/llvm/llvm-project/commit/4070621c866fb4156f7c7d15039d12a4295f46c2
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-create-box.fir
Log Message:
-----------
[flang][OpenACC] Discover type descriptors referenced by fir.create_box (#210393)
Register the IndirectGlobalAccess interface for fir.create_box so
acc-implicit-declare finds the derived-type type-descriptor global a
create_box of a record array needs on the device, as it already does
for fir.embox and fir.rebox.
Assisted-by: Cursor
Commit: 5c719eeb715632b1afef6508bd6c5ac09369fc91
https://github.com/llvm/llvm-project/commit/5c719eeb715632b1afef6508bd6c5ac09369fc91
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGen/builtins-x86.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
Log Message:
-----------
[CIR] Implement support for builtin FMA (#210365)
Implement support for the _builtin_fma
Commit: 95cc83d45b1b8e4a560efb729bd7e1e16f0b8703
https://github.com/llvm/llvm-project/commit/95cc83d45b1b8e4a560efb729bd7e1e16f0b8703
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/docs/AdminTasks.md
R llvm/docs/AdminTasks.rst
Log Message:
-----------
[docs] Rename AdminTasks to markdown to preserve history (#210415)
Tracking issue: #201242
Migrating this before I make changes to it. A follow-up PR will do the
migration.
Commit: fb0547315ecf3f09fb6fc9122e40ff096a643eaa
https://github.com/llvm/llvm-project/commit/fb0547315ecf3f09fb6fc9122e40ff096a643eaa
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/AdminTasks.md
Log Message:
-----------
[docs] Rewrite AdminTasks.md as markdown (#210416)
Tracking issue: #201242
This is a stacked PR based on #210415 , which does a rename for history
preservation purposes. See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This was prepared with rst2myst.
Commit: d982e0499b7f780279c435403b8249d7c3812cae
https://github.com/llvm/llvm-project/commit/d982e0499b7f780279c435403b8249d7c3812cae
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/test/CodeGenHLSL/resources/TypedBuffers-constructor.hlsl
Log Message:
-----------
[HLSL] Enable frontend IR generation for SPIR-V in TypedBuffers-constructor.hlsl (#207421)
I found a stale `FIXME` marker while poking at SPIR-V resource lowering.
The test stated that SPIR-V codegen of
`llvm.spv.resource.handlefrombinding` and resource types was not
implemented. That codegen now exists in
`CommonSPIRTargetCodeGenInfo::getHLSLType`.
This change enables the test on SPIR-V and splits the tests to
distinguish DXIL and SPIRV expected IR patterns.
Commit: 9bae0aab8098f99dff47578546eb5bd382f919d0
https://github.com/llvm/llvm-project/commit/9bae0aab8098f99dff47578546eb5bd382f919d0
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
Log Message:
-----------
[AMDGPU] Remove unnecessary and broken sign/zero extension in fastdiv (#210348)
Remove unnecessary and broken sign/zero-extension when using float-point
reciprocal to implement division/remainder. This change is analogous to
the change done in https://github.com/llvm/llvm-project/pull/203436 but
in AMDGPUISelLowering.cpp.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: dc3b1ed3ccd10995b26fa5278cb80c45419f9457
https://github.com/llvm/llvm-project/commit/dc3b1ed3ccd10995b26fa5278cb80c45419f9457
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
TableGen: Deterministically order predicate groups by calling convention (#210409)
Commit: 6ff0ebea015e3ed984dfff941e7d8a48e4810784
https://github.com/llvm/llvm-project/commit/6ff0ebea015e3ed984dfff941e7d8a48e4810784
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Diagnostics.h
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Diagnostics.cpp
A lldb/test/Shell/Diagnostics/TestDiagnosticsCollectBinaries.test
Log Message:
-----------
[lldb] Collect the executable, symbol file, and core in diagnostics (#210391)
The diagnostics bundle already gathers logs, statistics, and a snapshot
of the first triage commands, but sometimes the binaries are required to
reproduce an issue. Collect the main executable, its symbol file, and
the core file into the bundle.
Gate this on a new global setting, diagnostics.collect-binaries, which
defaults to false: these files can be large and privacy sensitive, so
including them is opt-in.
Assisted-by: Claude
Commit: 977eced054d9de031423dee9493addd4e1fd5eaf
https://github.com/llvm/llvm-project/commit/977eced054d9de031423dee9493addd4e1fd5eaf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Expression/IRInterpreter.cpp
Log Message:
-----------
[lldb] Truncate an over-wide symbol address in the IR interpreter (#210372)
IRInterpreter::ResolveConstantValue built a pointer-width APInt directly
from the address returned by FindSymbol. That address can be wider than
a target pointer, because lldb records extra information in the high
bits on some targets, such as the code/memory address-space tag on
WebAssembly.
A 32-bit pointer then cannot hold the tagged address and the APInt
constructor asserts, aborting the debugger when a function-valued
expression is evaluated (for example `expr main`).
Truncate to the pointer width instead of asserting, matching the idiom
already used in DWARFExpression. On targets whose addresses fit in a
pointer this is a no-op.
Commit: 4e0dbfe489dcc0b057303047608cd2a909602a14
https://github.com/llvm/llvm-project/commit/4e0dbfe489dcc0b057303047608cd2a909602a14
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
Log Message:
-----------
[SCEV][NFC] Precommit test for MatchRangeCheckIdiom tightening (#210386)
Commit: 0e3852f73ab75639b76bad2c8a735d46241768f3
https://github.com/llvm/llvm-project/commit/0e3852f73ab75639b76bad2c8a735d46241768f3
Author: Patryk Stefanski <patryk.stefanski at protonmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
Log Message:
-----------
[clang][sema] Fix crash on decomposition decl missing initializer (#210151)
ActOnUninitializedDecl dereferenced the std::optional<Token> from
Lexer::findNextToken() unconditionally when diagnosing a structured
binding with no initializer. Guard the optional and fall back to the
declaration's location.
Commit: 82134c708f7ec224d86e2096d9b53c76640a490f
https://github.com/llvm/llvm-project/commit/82134c708f7ec224d86e2096d9b53c76640a490f
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
Log Message:
-----------
[CIR] Terminate conditional regions after creation; fix glvalue conditional with a throw arm (#210384)
Follow-up to #208850: @andykaylor's comments about
`CIRGenFunction::emitConditionalBlocks` also have a similar
insertion-point problem.
The PR addresses the two related problems found while looking into the
conditional branch emission path:
**1. Terminate conditional regions after creation instead of patching
yields**
`CIRGenFunction::emitConditionalBlocks` still had the save-and-patch
insertion-point machinery removed from the scalar path in #208850. The
path is unreachable, and its guard is saved only after
`cir.unreachable`, where a patched yield would generate the dead code.
The machinery is removed; regions are closed with
`terminateStructuredRegionBody` after creation.
The aggregate emitter had the reverse problem: an unconditional
cir.yield after each arm lands in the dead block a throw leaves behind
and keeps it in the final CIR:
```
struct test_s { int x; int y; };
void test_throw(bool flag) {
test_s a = flag ? throw 0 : test_s{1, 2};
}
mlir
cir.if %2 {
...
cir.throw %3 : !cir.ptr<!s32i>, @_ZTIi
cir.unreachable
^bb1: // no predecessors <-- dead block kept alive by the yield
cir.yield
} else {
...
}
```
The explicit yields are removed; `emitIfOnBoolExpr` already terminates
each region, adding a yield only where one is missing. Tests pin the
dead block's absence with CIR-NEXT after `cir.unreachable`.
**2. Fix glvalue conditionals with a throw arm using a region-local
pointer**
```
int &ref_cond(bool c, int &x) { return c ? x : throw 0; }
// error: operand #0 does not dominate this use
// fatal error: CIR module verification error
```
With one arm throwing, `emitConditionalOperatorLValue` returned the
surviving arm's LValue directly, valid in OG CodeGen's flat CFG, invalid
in CIR where the pointer is materialized inside the ternary's region:
```
%4 = cir.ternary(%3, true {
%8 = cir.load %1 ... // pointer loaded inside the region
cir.yield %8 : !cir.ptr<!s32i>
}, false { ... cir.unreachable })
cir.store %8, %2 ... // region-local %8 used outside the region
```
Existing tests missed it because a local's pointer is a function-entry
`alloca`, so dominance held by accident. The fix addresses the result
through the ternary's result value, which the yield carries out. New
tests cover a reference parameter, assignment via the conditional, and
member access, all of which previously failed verification.
Assisted-by: Cursor/Codex
Commit: ea863cb2dec8e0f040dfe22a52d3b537e4a25c29
https://github.com/llvm/llvm-project/commit/ea863cb2dec8e0f040dfe22a52d3b537e4a25c29
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/X86/dagcombine-sub-globaladdress.ll
Log Message:
-----------
[DAGCombiner] Fix APInt truncation assertion (#209914)
getConstant() would create an APInt with ImplicitTrunc = false, but the
constant here can really be anything.
Fixes #209884.
Commit: 1e37b629fbd06d922ac1216cf20114ea4ce1c88d
https://github.com/llvm/llvm-project/commit/1e37b629fbd06d922ac1216cf20114ea4ce1c88d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/libcxx/test/format.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/formats/shtest.py
Log Message:
-----------
[lit] Delete the external shell (#209571)
This was deprecated in LLVM 23 and slated for removal in LLVM 24. Now
that we have branched and everything has been updated to not set
execute_external, we can remove it.
Commit: 466503dcf2ae2e43126c1a6d8a5b204883d5b0c1
https://github.com/llvm/llvm-project/commit/466503dcf2ae2e43126c1a6d8a5b204883d5b0c1
Author: Logan <143111092+Logans-olo at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrTBM.td
M llvm/test/CodeGen/X86/tbm_patterns.ll
Log Message:
-----------
X86: Add pattern for optimized BLSIC IR form (#209814)
Add DAG pattern to recognize the optimized IR form of BLSIC: (xor (and
x, -x), -1)
Fixes #209718 - matches the IR form produced after InstCombine
optimizations
Added tests for both 32-bit and 64-bit BLSIC patterns
Assisted by: Claude Code, helped me understand
pattern-matching/intrinsics, and some file structure. As well as how
testing for LLVM works.
Commit: f97dcd05eb4be690dcfd39de9f6de937d5acfa46
https://github.com/llvm/llvm-project/commit/f97dcd05eb4be690dcfd39de9f6de937d5acfa46
Author: stephenduong1004 <stephenduong at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp
Log Message:
-----------
[llvm-libtool-darwin] Ensure filelist buffer is null-terminated (#205115)
[llvm-libtool-darwin] Ensure filelist buffer is null-terminated
In llvm-libtool-darwin.cpp, `MemoryBuffer::getFileOrSTDIN` was
previously called to load the filelist with `RequiresNullTerminator` set
to `false`. However, the retrieved buffer is subsequently passed to
`llvm::line_iterator`.
Since `llvm::line_iterator` explicitly requires its underlying buffer to
be null-terminated, omitting this requirement can result in an
out-of-bounds read/buffer overrun when parsing the file list.
This change fixes the issue by requesting a null-terminated buffer
(`RequiresNullTerminator=true`).
Co-authored-by: Alexander Shaposhnikov <ashaposhnikov at google.com>
Commit: 986cdd8618e3e105bde1d52e7d8888325a7c87b1
https://github.com/llvm/llvm-project/commit/986cdd8618e3e105bde1d52e7d8888325a7c87b1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
A llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move EVL-based transforms to VPlanEVLTransforms.cpp (NFC) (#209883)
VPlanTransforms.cpp has become quite big and is one of the top 20 most
expensive files in terms of compile-time.
https://llvm-compile-time-tracker.com/compare_clang.php?from=b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831&to=96a722a0ace661626d071166635728def97f6820&stat=instructions%3Au
Split off the mostly self-contained EVL related transforms and move them
to a new VPlanEVLTransforms.cpp.
This moves simplifyKnownEVL, optimizeEVLMasks, addExplicitVectorLength,
convertToVariableLengthStep and convertEVLExitCond together with their
EVL-specific static helpers.
Shared helpers used by the moved code (isDeadRecipe,
collectUsersRecursively, recursivelyDeleteDeadRecipes,
getOpcodeOrIntrinsicID and tryToFoldLiveIns, pullOutPermutations) are
promoted to vputils.
PR: https://github.com/llvm/llvm-project/pull/209883
Commit: a12cbbcc94a80f54714aaa253f8838fcc9ab4aae
https://github.com/llvm/llvm-project/commit/a12cbbcc94a80f54714aaa253f8838fcc9ab4aae
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractor.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
Log Message:
-----------
[SSAF] Add EntitySourceLocationExtractor (#210201)
Walks every entity-producing decl in the TU and emits
SourceLocationRecord(s) per entity-kind anchor:
* Identifier-bearing decls (FunctionDecl/VarDecl/FieldDecl/ RecordDecl):
Decl::getLocation().
* Synthetic function return-slot entity:
FD->getReturnTypeSourceRange().getBegin().
* ParmVarDecl (named or unnamed): P->getTypeSpecStartLoc().
Skips compiler-synthesized implicits and builtins via the getEntityName
gate, system-header decls via SourceManager, and silently drops records
whose location is invalid or whose file path cannot be canonicalized via
real_path.
Assisted-By: Claude Opus 4.7
Commit: 284c1a166af4c7deab55c7de2ee1bd480d44e9ff
https://github.com/llvm/llvm-project/commit/284c1a166af4c7deab55c7de2ee1bd480d44e9ff
Author: David Mentler <mentlerd at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/docs/use/variable.md
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectSynthetic.h
M lldb/source/API/SBValue.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic/TestSBValueSetTypeSynthetic.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/library_support.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/main.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/foo_bar_synths.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/main.cpp
Log Message:
-----------
[LLDB] Enable SBTypeSynthetic manipulation for SBValue instances (#209056)
Allow manipulating the scripted synthetic children frontend selection
process for individual `SBValue` instances.
The motivating use-case is supporting custom data structures, type
erasure systems, and facilitating debugging handle based C APIs. Below
is an example of such a use-case of an anonymized 3rd party C library:
```C
using ErrorCode = int;
using Handle = void*;
using FooHandle = Handle;
using BarHandle = Handle;
struct ArrayOfHandles {
int size;
Handle* data;
};
struct AllHandles {
ArrayOfHandles foos;
ArrayOfHandles bars;
};
ErrorCode GetAllHandles(AllHandles* into);
```
The current LLDB feature-set allows attaching a synthetic children
provider to `AllHandles`, but the scripted frontend has no chance to
select an appropriate alternative frontend implementation class for
`foos` and `bars` based on type information it is aware of.
Commit: 9eb2dc0930ac75494e71b16739c859fe338a3f0f
https://github.com/llvm/llvm-project/commit/9eb2dc0930ac75494e71b16739c859fe338a3f0f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/libcxx/test/format.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/formats/shtest.py
Log Message:
-----------
Revert "[lit] Delete the external shell" (#210433)
Reverts llvm/llvm-project#209571
Breaks some buildbots:
1.
https://lab.llvm.org/buildbot/#/builders/232/builds/3690/steps/11/logs/stdio
2. https://lab.llvm.org/buildbot/#/builders/222/builds/11180
Commit: 965fa410dad7294cc1c1a9632ff94558de6dfa40
https://github.com/llvm/llvm-project/commit/965fa410dad7294cc1c1a9632ff94558de6dfa40
Author: Sharjeel Khan <sharjeelkhan at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
A llvm/test/MC/AArch64/LFI/debug-info.s
Log Message:
-----------
[LFI][AArch64] Fix Segfault due to infinite recursion in LFI rewriter (#210267)
When emitting a deferred LR guard, if debug info is enabled, the
emission of the guard instruction can trigger temporary labels (e.g. for
DWARF line entries), which recursively calls onLabel. Since
DeferredLRGuard was only set to false after emission, the nested call
would re-emit the guard, causing infinite recursion which leads to a
SegFault due to stack overflow. This was detected compiling
ubsan_minimal_handlers.cpp in compiler-rt. I fixed it by using the
existing recursion guard (Guard).
Commit: 2120490a54645f9a4390605adec5509243641d29
https://github.com/llvm/llvm-project/commit/2120490a54645f9a4390605adec5509243641d29
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Diagnostics.h
M lldb/source/Core/Diagnostics.cpp
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/DiagnosticsTest.cpp
Log Message:
-----------
[lldb] Add an artifact provider mechanism to Diagnostics (#210417)
Add a hook that lets a subsystem contribute a file to the diagnostics
bundle, without breaking layering and making Core depend on it. A plugin
registers an ArtifactProvider callback and a file name via AddArtifactProvider.
Providers run when a bundle is collected, and each one that yields
content is written into the bundle and recorded in the report's
attachments.
This restores, in a simpler form, the collection point that the removed
Diagnostics callback mechanism offered. The motivating consumer is the
downstream Swift health check, which registers a provider to write its
"swift-healthcheck.log" into the bundle. Unlike the old callback, a
provider does not open or write its own file: it just returns the
contents as a string and Diagnostics handles the rest.
Commit: d592aa5a10f44164cd403257270802eb2a4b123a
https://github.com/llvm/llvm-project/commit/d592aa5a10f44164cd403257270802eb2a4b123a
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseDecl.cpp
A clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general/p2.cpp
Log Message:
-----------
[Clang] Fixed auto parsing regression with brace initialization (#210347)
The PR #208552 has introduced a regression where brace initialization
was not taken into account `auto foo{12}`. It was also breaking
`dcl.type.general` p2 rules, which is also now tested.
Commit: 32221d9ff8f4772972193ebf7b8ba4974cd8458f
https://github.com/llvm/llvm-project/commit/32221d9ff8f4772972193ebf7b8ba4974cd8458f
Author: David Green <david.green at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
Log Message:
-----------
[AArch64] Add lowering for fixed-vector bf16 masked gather/scatter. (#210273)
Similar to #208744, this makes sure that bf16 masked gather and scatter
work with fixed-length sve enabled. Without +bf16 the operations are
currently expanded pre-isel, but that will not be fixed in this patch as
it is a larger change and this patch is intended to be ported to the
branch.
Commit: b4a444ad635af70fe32f58d46fe0c08221fbcf5a
https://github.com/llvm/llvm-project/commit/b4a444ad635af70fe32f58d46fe0c08221fbcf5a
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/stdlib/linux/CMakeLists.txt
M libc/src/stdlib/linux/realpath.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][realpath] Support relative paths (#209374)
Updates realpath to call the `getcwd` linux syscall wrapper to resolve
cwd-relative queries.
Commit: 35bf12351740521f86fd406d01165e1c90b32ed8
https://github.com/llvm/llvm-project/commit/35bf12351740521f86fd406d01165e1c90b32ed8
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/test/Dialect/OpenACC/ops-cg.mlir
Log Message:
-----------
[mlir][acc] Preserve section bounds on acc.reduction_init (#210443)
When `acc.reduction_init` is created from `acc.reduction`, its bounds
are lost because they only live as values folded into the init region's
body. Those bounds describe the legal indexing of the section: the
produced view of a (possibly base-adjusted, compact) reduction temporary
must be indexed with the same bounds as the original array.
Carry the acc.bounds as optional operands on acc.reduction_init so this
indexing information is directly available. The operands are optional,
so scalar/whole-array reductions and existing IR are unaffected.
Commit: 2b68eb4d70072d4e0084c0b4113bbd209c600088
https://github.com/llvm/llvm-project/commit/2b68eb4d70072d4e0084c0b4113bbd209c600088
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV][NFCI] Refactor LoopGuards range check matching (#210362)
Parameterize MatchRangeCheckIdiom over (Predicate, LHS, RHS) so it can
be reused for other predicates discovered during guard collection.
Hoist AddRewrite / GetMaybeRewritten above it and use them in place of
the inline try_emplace, so range-check rewrites chain onto existing ones
the same way other rewrites do.
Commit: 2dbcd7d10f9462bdc30a169730919fc7da321905
https://github.com/llvm/llvm-project/commit/2dbcd7d10f9462bdc30a169730919fc7da321905
Author: adams381 <adams at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/PassDetail.h
A clang/test/CIR/Transforms/abi-lowering/x86_64-lang-addrspace-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/GetFloatingPointTypeTest.cpp
Log Message:
-----------
[CIR] Add x86_64 scalar calling-convention lowering (#209636)
CallConvLowering can already classify a function through the MLIR test
target or through a classification injected as an attribute, but it has
no
path to a real target ABI. This adds a `target=x86_64` mode that runs
the
LLVM ABI Lowering Library's System V x86_64 classifier: it maps CIR
types to
`llvm::abi` types, calls the classifier, and converts the result back
into
the `mlir::abi::FunctionClassification` that `CIRABIRewriteContext`
already
consumes.
To keep the first step small this handles scalar signatures only --
integer
up to 64 bits, pointer, bool, `f32`, and `f64`. Anything else (records,
arrays, vectors, `_Complex`, wide or uncommon floats, `_BitInt`,
`__int128`,
member pointers) is reported as not-yet-implemented through
`emitOpError`, so
an unsupported signature fails the pass instead of being silently
misclassified. Those types come in stacked follow-ups. The pass is still
only reachable from `cir-opt`; wiring it into the `-fclangir` pipeline
is a
later change.
Assisted-by: Cursor / claude-opus-4.8
Commit: 12e3d9db0088d95675a0081495122483faa7b60d
https://github.com/llvm/llvm-project/commit/12e3d9db0088d95675a0081495122483faa7b60d
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGen/var_arg.c
Log Message:
-----------
[CIR] Add support for lowering __builtin_c23_va_start in ClangIR (#208741)
C23 `va_start `expands to `__builtin_c23_va_start`, which was previously
routed to the unimplemented-builtin NYI path in ClangIR. As a result,
variadic code failed to compile with -fclangir in -std=c23 mode.
This change lowers `__builtin_c23_va_start` the same way as
`__builtin_va_start`. For both builtins, the va_list operand is always
argument 0, so the existing lowering logic can be reused directly.
Commit: fefdf74c073b0361fb9a5100f6b1f38a13d72e55
https://github.com/llvm/llvm-project/commit/fefdf74c073b0361fb9a5100f6b1f38a13d72e55
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/RISCV/rvv/vecreduce-minmax-constant-fold.ll
Log Message:
-----------
[SelectionDAG] Fold constant min/max vector reductions (#209190)
I extended constant folding to handle signed and unsigned min/max vector
reductions. Constant vectors now become scalar constants before target
lowering, while non-constant, poison, and undef behavior stays
unchanged.
Fixes #209109
Commit: 2926d18a0620a768857dce1c827d0a3da0d0b565
https://github.com/llvm/llvm-project/commit/2926d18a0620a768857dce1c827d0a3da0d0b565
Author: Pengxiang Huang <71998072+Pengxiang-Huang at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/semaphore/linux/CMakeLists.txt
M libc/src/semaphore/linux/named_semaphore.cpp
M libc/src/semaphore/linux/semaphore.h
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
Log Message:
-----------
[libc][semaphore] Add post and wait operations for internal semaphore (#198959)
This pr implements https://github.com/llvm/llvm-project/issues/190847,
adding the post and wait operations in posix semaphore for linux using
futex.
Particularly,
`sem_post`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_post.html
`sem_trywait`, `sem_wait`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_wait.html
`sem_timedwait`, `sem_clockwait`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_clockwait.html#
The implementation is assisted by Claude Code Opus 4.7, specifically for
the unit tests generations.
Commit: c1c278e7484038f1d14314f38736532975fafd20
https://github.com/llvm/llvm-project/commit/c1c278e7484038f1d14314f38736532975fafd20
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A clang/docs/ScalableStaticAnalysis/user-docs/SourceEditGeneration.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
A clang/include/clang/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/ScalableStaticAnalysis/Frontend/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/empty-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/two-function-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/lit.local.cfg
A clang/test/Analysis/Scalable/source-edit-generation/cli-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
A clang/test/Analysis/Scalable/source-edit-generation/downgradable-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
A clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
M clang/test/CMakeLists.txt
Log Message:
-----------
[clang][ssaf] Integrate source-edit-generation (#208590)
Adds the four `--ssaf-*` driver flags
(`--ssaf-source-transformation=`,
`--ssaf-global-scope-analysis-result=`, `--ssaf-src-edit-file=`,
`--ssaf-transformation-report-file=`) under `SSAF_Group`, marshalled
into `FrontendOptions`. The compilation-unit identifier flag introduced
earlier is reused. The driver forwards all four flags to `cc1`.
Adds twelve `warn_ssaf_*` diagnostics under
`-Wscalable-static-analysis-framework` (`DefaultError`) covering the
orphan-flag matrix, unknown transformation names, unknown output
formats, WPA-suite read failures, and edit/report write failures.
Adds `clang::ssaf::SourceTransformationFrontendAction` — a
`WrapperFrontendAction` that, when any source-edit flag is set,
validates the CLI as a group, loads the WPASuite from the configured
path, instantiates the named transformation, and serializes the
accumulated edits and findings through the configured formats. The
action is wrapped in `ExecuteCompilerInvocation` after the existing
TU-summary wrap so both pipelines stack as independent `ASTConsumer`s on
the same translation unit; they exchange no data.
Assisted-By: Claude Opus 4.7
Commit: 372cd15f03e49bb826a63a6c59cc7f74962ab278
https://github.com/llvm/llvm-project/commit/372cd15f03e49bb826a63a6c59cc7f74962ab278
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir
Log Message:
-----------
[openacc] Implicitly map external constant globals (#210408)
Hoist initializer-less constant globals out of OpenACC compute regions
so implicit data mapping handles them. This avoids unresolved device
symbols for PARAMETER arrays defined in separately compiled modules,
while retaining implicit declare for initialized constants. Add
regression coverage and a global initializer query to the OpenACC
interface.
Commit: 3fbb037d03e7ff1ef1cd9156363e895af7caaf98
https://github.com/llvm/llvm-project/commit/3fbb037d03e7ff1ef1cd9156363e895af7caaf98
Author: Haowei <haowei at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Adding an option to Skip LLVM and Clang exports (#209922)
Under CMake 4+, calling add_library(... SHARED IMPORTED) on a
target platform that lacks dynamic linking support triggers a fatal
error. This becomes an issue when building LLVM and runtimes for
baremetal targets like armv6m-none-eabi. This patch
adds the option "LLVM_OMIT_EXPORTS_FROM_CONFIG" in LLVM.
When used in sub builds like LLVM runtimes, it makes CMake to skip
including the LLVM and Clang exports. This mitigates the CMake 4
errors on baremetal runtimes.
Commit: dbab04510ee89e5e9ed03cb6aff63fd218fb3042
https://github.com/llvm/llvm-project/commit/dbab04510ee89e5e9ed03cb6aff63fd218fb3042
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
A llvm/test/Transforms/TailCallElim/disable-tail-call-elim-for-cold-calls.ll
Log Message:
-----------
[TailCallElim] Optionally suppress tail call elim for cold calls (#209642)
Since eliminated tail calls result in missing frames when collecting
various types of profiles, provide an option for disabling the
elimination for cold non-musttail calls. By default the new handling is
disabled.
Since the new checks require BFI to be built in more cases, I have moved
UpdateFunctionEntryCount and ForceDisableBFI (renamed to
DisableEntryCountRecompute to match the flag and description), to
actually guard the function entry count update.
Commit: c4962f5721a36e198234019b846d3788738f766a
https://github.com/llvm/llvm-project/commit/c4962f5721a36e198234019b846d3788738f766a
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/PluginManager.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Interpreter/embedded_interpreter.py
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h
A lldb/test/API/functionalities/scripting_extension_generate/Makefile
A lldb/test/API/functionalities/scripting_extension_generate/TestScriptingExtensionGenerate.py
A lldb/test/API/functionalities/scripting_extension_generate/main.c
Log Message:
-----------
[lldb/script] Add scripting extension template generator (#209647)
This patch adds a `scripting extension generate <ExtensionType>...`
command that introspects a Python extension base class and emits a
skeleton subclass with `# TODO: Implement` stubs for its abstract
methods (or, with `-a`, every method), then opens the result in an
editor.
Generated imports use `from <module> import <class>`, and the generated
`__init__` forwards its arguments to `super().__init__(...)` since every
base class relies on its constructor to set up attributes
(`self.target`, `self.process`, ...) that inherited, non-overridden
methods depend on. When the host can't open an external editor (e.g.
non-macOS), the command reports that as a message rather than an error,
since the file is already written.
To catch regressions in the generator itself instead of just checking
that a file was produced, this patch adds
`TestScriptingExtensionGenerate.py`, which generates a template for
every extension kind on the fly and drives it through a live lldb
session (`process launch -C`, `breakpoint set -P`, `target stop-hook add
-P`, etc.).
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: ccd75bb4b9c6d9c2e149d355c35193ca554c99a0
https://github.com/llvm/llvm-project/commit/ccd75bb4b9c6d9c2e149d355c35193ca554c99a0
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Interfaces/CIRLoopOpInterface.cpp
A clang/test/CIR/IR/invalid-loop-cleanup.cir
A clang/test/CIR/IR/loop-cleanup.cir
M clang/unittests/CIR/ControlFlowTest.cpp
Log Message:
-----------
[CIR] Introduce loop cleanup regions (#210212)
For loops and while loops can create variables in their condition
regions that require per-iteration cleanup. The CIR dialect previously
had no clean way to represent these cleanups while maintaining a
separate condition region for the loop operation.
This change introduces an optional cleanup region to these loop ops and
updates the relevant region successor handling to reflect the insertion
of the cleanup region in the control flow when a non-empty cleanup
region is present.
The CFG flattening pass will handle routing the control flow through the
cleanup region in both the normal and EH unwind cases, but this is not
yet implemented. That will be added in a follow-up change, as will
creation of the cleanup region when it is needed during IR generation.
Assisted-by: Cursor / various models
Commit: ab6ef5680eb79e102414740198f5aa1015c5c254
https://github.com/llvm/llvm-project/commit/ab6ef5680eb79e102414740198f5aa1015c5c254
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/unittests/Process/gdb-remote/CMakeLists.txt
A lldb/unittests/Process/gdb-remote/ProcessGDBRemoteTest.cpp
Log Message:
-----------
[lldb] Contribute the GDB-remote packet history to diagnostics bundles (#210418)
Register a Diagnostics artifact provider from ProcessGDBRemote so a
diagnostics bundle captures the GDB-remote packet history, the same data
"process plugin packet history" prints.
Commit: 03b9039147cca65e2b4fa3adcbbbf40f73e3a3c9
https://github.com/llvm/llvm-project/commit/03b9039147cca65e2b4fa3adcbbbf40f73e3a3c9
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/docs/AdminTasks.md
Log Message:
-----------
[docs] Update the commit review admin task with process details (#210420)
As discussed in the infra area team meeting. Mostly this serves as a
place to stash helpful links.
I picked an arbitrary two week timeout for requests. We can re-evaluate at any time.
It seems less than ideal that one needs issue tracker labelling
privileges to reopen the issue, but I think that's accurate.
Commit: 42eb7db188f23625872b6f1d722979a3100d170e
https://github.com/llvm/llvm-project/commit/42eb7db188f23625872b6f1d722979a3100d170e
Author: Haowei <haowei at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Revert "Skipping host target exports during cross-compilation" (#210468)
Reverts llvm/llvm-project#209922
It broke runtimes build on amdgpu-amd-amdhsa
Commit: d00710093a3d2795200dbf065836220345aa9e9d
https://github.com/llvm/llvm-project/commit/d00710093a3d2795200dbf065836220345aa9e9d
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
Log Message:
-----------
[lldb-dap][test] Avoid a hang on a test failure (#209988)
Tests in `TestDAP_server.py` create `DebugAdapterServer`, passing a
connection string. `DebugAdapterServer.__init__()` creates a socket and
passes the associated input and output streams to its parent class,
`DebugCommunication`. `DAPTestCaseBase.launch()`, which is called from
`TestDAP_server.run_debug_session()`, adds a teardown hook that
eventually calls `DebugCommunication.terminate()`. If the socket is not
closed when this hook executes, it waits indefinitely for the receiving
thread to join.
In the normal case, when a test passes, the connection is closed by
calling `self.dap_server.request_disconnect()` at the end of
`TestDAP_server.run_debug_session()`. If a test fails, the cleanup hook
is called while the connection is still active, which results in a hang.
This can be reproduced by removing the call to `request_disconnect()` or
by changing the condition in the `assertEqual()` on the previous line.
The fix passes the opened socket to 'DebugCommunication' and closes the
socket explicitly in 'DebugCommunication.terminate()'.
Commit: fb2fa0b0f0a8b061401f6cfa3c2fadd3fbfb3b35
https://github.com/llvm/llvm-project/commit/fb2fa0b0f0a8b061401f6cfa3c2fadd3fbfb3b35
Author: Lucas Ribeiro Lima <lucasribeirolima974 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
Log Message:
-----------
[clang][clangIR]: X86 upstream avx psrldqi/pslldqi (#208025)
This PR upstreams the implementation and corresponding test suites for
X86 byte-shift intrinsics (pslldqi / psrldqi) spanning 128, 256, and
512-bit vector variants from the incubator.
I consolidated both left and right shifts into a single code path since
the underlying lane topology is identical, extracting the
direction-specific index arithmetic into clean variables at the top. Let
me know if you prefer this unified data-driven approach or if explicit
split functions for left/right shifts would be preferred for local
readability.
All integrated tests from the incubator have been upstreamed and are
currently passing.
Minimal compile case
```cpp
#include <emmintrin.h>
#include <iostream>
struct DataLayout {
alignas(16) int values[4];
};
#define INDEX 1
int main(int argc, char **argv) {
DataLayout data{8, 4, 2, 1};
std::cout << "Value before: " << data.values[INDEX] << '\n';
__m128i reg128i =
_mm_load_si128(reinterpret_cast<__m128i const *>(data.values));
__m128i reg_right_shift = _mm_bsrli_si128(reg128i, 4);
__m128i reg_left_shift = _mm_bslli_si128(reg128i, 4);
DataLayout result_right;
_mm_store_si128(reinterpret_cast<__m128i *>(result_right.values),
reg_right_shift);
DataLayout result_left;
_mm_store_si128(reinterpret_cast<__m128i *>(result_left.values),
reg_left_shift);
std::cout << "Value after left: " << result_left.values[INDEX] << '\n';
std::cout << "Value after right: " << result_right.values[INDEX] << '\n';
return 0;
}
```
Addresses #167752.
Commit: b0440cb55a22e979e81934e0c031c9d46e71f9da
https://github.com/llvm/llvm-project/commit/b0440cb55a22e979e81934e0c031c9d46e71f9da
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
Log Message:
-----------
[CycleInfo] Reference cycles by preorder index, not pointer. NFC (#210271)
The block-to-innermost-cycle map (BlockMap) and each cycle's parent link
hold a GenericCycle pointer. Store the cycle's preorder index instead,
so no raw cycle pointer remains in the stored representation: BlockMap
becomes a SmallVector<unsigned>, four bytes per block rather than eight,
and the parent link becomes ParentIndex.
The flat Cycles array does not exist during construction, so both hold
creation-order indices into the temporary forest until flatten()
resolves them to preorder indices.
Aided by Claude Opus 4.8
Commit: ee5d6f537da4bc81b956b4813afbc0877f82b59d
https://github.com/llvm/llvm-project/commit/ee5d6f537da4bc81b956b4813afbc0877f82b59d
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes c1c278e (#210451)
This fixes c1c278e7484038f1d14314f38736532975fafd20.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=c1c278e7484038f1d14314f38736532975fafd20
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 1ef8ba9a00e16423d711ddbf16c7a45fb7fd570b
https://github.com/llvm/llvm-project/commit/1ef8ba9a00e16423d711ddbf16c7a45fb7fd570b
Author: Luc Forget <github at alias.lforget.fr>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Target/Wasm/TranslateFromWasm.cpp
Log Message:
-----------
[MLIR][WasmSSA] Instruction parser refactoring of WasmSSA importer (#195500)
Refactored WasmSSA importer mechanism to dispatch control flow to
relevant parser based on op code.
This is to prepare for instructions with multi-bytes opcodes (e.g.
vector instruction and some scalar instructions extensions) which will
be able to reuse the same mechanism.
It also replaces the bit tree to find the address by a jump table.
---------
Co-authored-by: Luc Forget <lforg37 at users.noreply.github.com>
Co-authored-by: Ferdinand Lemaire <ferdinand.lemaire at woven-planet.global>
Co-authored-by: Ferdinand Lemaire <flscminecraft at gmail.com>
Commit: cf11eef1c9476c8778055d7963fdac34b6628582
https://github.com/llvm/llvm-project/commit/cf11eef1c9476c8778055d7963fdac34b6628582
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/docs/AArch64SME.md
R llvm/docs/AArch64SME.rst
A llvm/docs/AMDGPUAsyncOperations.md
R llvm/docs/AMDGPUAsyncOperations.rst
A llvm/docs/AMDGPUExecutionSynchronization.md
R llvm/docs/AMDGPUExecutionSynchronization.rst
A llvm/docs/AMDGPUMemoryModel.md
R llvm/docs/AMDGPUMemoryModel.rst
A llvm/docs/AddingConstrainedIntrinsics.md
R llvm/docs/AddingConstrainedIntrinsics.rst
A llvm/docs/BigEndianNEON.md
R llvm/docs/BigEndianNEON.rst
A llvm/docs/CompileCudaWithLLVM.md
R llvm/docs/CompileCudaWithLLVM.rst
A llvm/docs/DebuggingJITedCode.md
R llvm/docs/DebuggingJITedCode.rst
A llvm/docs/ExtendingLLVM.md
R llvm/docs/ExtendingLLVM.rst
A llvm/docs/HowToBuildWindowsItaniumPrograms.md
R llvm/docs/HowToBuildWindowsItaniumPrograms.rst
A llvm/docs/HowToCrossCompileBuiltinsOnArm.md
R llvm/docs/HowToCrossCompileBuiltinsOnArm.rst
A llvm/docs/HowToUpdateDebugInfo.md
R llvm/docs/HowToUpdateDebugInfo.rst
A llvm/docs/Instrumentor.md
R llvm/docs/Instrumentor.rst
A llvm/docs/JITLink.md
R llvm/docs/JITLink.rst
A llvm/docs/MCJITDesignAndImplementation.md
R llvm/docs/MCJITDesignAndImplementation.rst
A llvm/docs/NVPTXUsage.md
R llvm/docs/NVPTXUsage.rst
A llvm/docs/ORCv2.md
R llvm/docs/ORCv2.rst
A llvm/docs/Remarks.md
R llvm/docs/Remarks.rst
A llvm/docs/SPIRVUsage.md
R llvm/docs/SPIRVUsage.rst
Log Message:
-----------
[docs] Rename selected LLVM docs to Markdown (#208800)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: cddf2069ded94cb47048ad2a5f340d12c35f1651
https://github.com/llvm/llvm-project/commit/cddf2069ded94cb47048ad2a5f340d12c35f1651
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/docs/AArch64SME.md
M llvm/docs/AMDGPUAsyncOperations.md
M llvm/docs/AMDGPUExecutionSynchronization.md
M llvm/docs/AMDGPUMemoryModel.md
M llvm/docs/AddingConstrainedIntrinsics.md
M llvm/docs/BigEndianNEON.md
M llvm/docs/CompileCudaWithLLVM.md
M llvm/docs/DebuggingJITedCode.md
M llvm/docs/ExtendingLLVM.md
M llvm/docs/HowToBuildWindowsItaniumPrograms.md
M llvm/docs/HowToCrossCompileBuiltinsOnArm.md
M llvm/docs/HowToUpdateDebugInfo.md
M llvm/docs/Instrumentor.md
M llvm/docs/JITLink.md
M llvm/docs/MCJITDesignAndImplementation.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/ORCv2.md
M llvm/docs/Remarks.md
M llvm/docs/SPIRVUsage.md
Log Message:
-----------
[docs] Rewrite 19 LLVM docs from reST to markdown (#208798)
Tracking issue: #201242
[Migration
guide](https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines)
This is a stacked PR based on #208800, which does the file rename to
preserve history.
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections.
Commit: a623e8d4381e26eceff29209e6db411617d95f83
https://github.com/llvm/llvm-project/commit/a623e8d4381e26eceff29209e6db411617d95f83
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port 2dbcd7d10f94 (#210484)
Commit: 605b6d73214cf253fc5fb9d5befe99857bd480cf
https://github.com/llvm/llvm-project/commit/605b6d73214cf253fc5fb9d5befe99857bd480cf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 986cdd8618e3 (#210485)
Commit: 56fc7bf0c364ab210c49c3b95e7130d337490b78
https://github.com/llvm/llvm-project/commit/56fc7bf0c364ab210c49c3b95e7130d337490b78
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port c1c278e74840 (#210488)
Commit: 2e1c934fea272654ab2b00f60b6d3dba93123190
https://github.com/llvm/llvm-project/commit/2e1c934fea272654ab2b00f60b6d3dba93123190
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port a12cbbcc94a8 (#210487)
Commit: 3be5663001465e74c7b879ad4d4cbfc3c94caeba
https://github.com/llvm/llvm-project/commit/3be5663001465e74c7b879ad4d4cbfc3c94caeba
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
Log Message:
-----------
[gn build] Port 9b096bb7abf7 (#210486)
Commit: 6a33b69d8bae737e5e1d60c7b7776a0b1f885bfa
https://github.com/llvm/llvm-project/commit/6a33b69d8bae737e5e1d60c7b7776a0b1f885bfa
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/test/tools/llvm-profdata/profile-symbol-list.test
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[SampleProfile] Support MD5-based ProfileSymbolList (#210235)
This patch speeds up sample profile loading by introducing an
MD5-based ProfileSymbolList (cold symbol list) in extensible binary
profiles.
The sample profile loader spends about a third of its time on loading
and decoding the symbol names in the Profile Symbol List section, yet
we use them only for membership checking purposes via
ProfileSymbolList::contains.
This patch teaches the writer to emit the section as an array of
64-bit GUIDs in the Eytzinger layout. The reader checks the
SecFlagMD5 section flag and sets up an EytzingerTableSpan
pointing into the mmap memory. This achieves both space efficiency
and runtime efficiency.
The new flag, md5-prof-sym-list, is off by default for now.
Profile merging is supported only from strings to an MD5-based
Eytzinger array.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/7
Assisted-by: Antitygravity
Commit: ea50c8cc99778825fc647cf190d8f7a8f49cdcdd
https://github.com/llvm/llvm-project/commit/ea50c8cc99778825fc647cf190d8f7a8f49cdcdd
Author: Mishal Shah <mishal_shah at apple.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
Fix macOS casing in premerge workflow (#210477)
Commit: 3fc4fcade6164fc6b9dcf0d6d0d6fa9cf6e47dfc
https://github.com/llvm/llvm-project/commit/3fc4fcade6164fc6b9dcf0d6d0d6fa9cf6e47dfc
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Crash in printArgument (#210411)
The crash was caused by missing nullptr check for Decl used to get
printing policy. Fixed the bug by replacing the use of Decl with
BugManager to get the policy.
Commit: 2730fc8a1a46ea92bbe91e3fc31897498617e076
https://github.com/llvm/llvm-project/commit/2730fc8a1a46ea92bbe91e3fc31897498617e076
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bfloat16/bfloat16.ll
Log Message:
-----------
[SPIR-V] Handle bfloat in getZeroFP/getOneFP (#202859)
Related spirv-val change:
https://github.com/KhronosGroup/SPIRV-Tools/pull/6734
---------
Co-authored-by: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Commit: ccd0e982a02fa3be39a98dd98ea6cc1ccaf24d13
https://github.com/llvm/llvm-project/commit/ccd0e982a02fa3be39a98dd98ea6cc1ccaf24d13
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
A lldb/test/API/lang/cpp/enum-limits/Makefile
A lldb/test/API/lang/cpp/enum-limits/TestCPPEnumLimits.py
A lldb/test/API/lang/cpp/enum-limits/main.cpp
Log Message:
-----------
[lldb][NativePDB] Fix width and signedness of enum constants (#210338)
Enumerator values aren't always encoded in the correct bit width and
signedness. This happens with both MSVC and Clang.
On MSVC, unsigned 64bit enumerators can be encoded as signed. For
example `ULONGLONG_MAX` will be encoded as `-1`.
Clang/LLVM will always encode the values as unsigned.
Example: https://godbolt.org/z/96YjGW48W.
I fixed this by setting the expected width and signedness when creating
the enumerator constant. We can't use a shell test like for the other
PDB tests, because no output shows the enum values.
Commit: 8c2d7cc3a9983459628c028d8537eaf79551f396
https://github.com/llvm/llvm-project/commit/8c2d7cc3a9983459628c028d8537eaf79551f396
Author: Jared Hoberock <jaredhoberock at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/include/mlir/IR/CMakeLists.txt
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/include/mlir/IR/SymbolTable.h
M mlir/lib/IR/SymbolTable.cpp
A mlir/test/IR/test-verifiers-symbol-user-type.mlir
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lib/Dialect/Test/TestTypes.cpp
M mlir/test/lib/Dialect/Test/TestTypes.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][IR] Add SymbolUserTypeInterface (#198435)
This change adds SymbolUserTypeInterface, analogous to
SymbolUserAttrInterface, and extends SymbolTable verification to check
participating types.
Verification visits the types owned by an operation, (operand/result
types, block argument types, attribute-contained types, nested type
parameters) and checks each distinct type at most once, interrupting on
the first failure. Deduplication spans the whole symbol-table walk, so a
type used by multiple operations is checked only once.
Attribute (SymbolUserAttrInterface) verification also gets deduped the
same way.
Assisted-by: Codex (OpenAI)
Assisted-by: Claude (Anthropic)
Commit: 1faa9f73119f007583ca829e07d78e82a40f1bae
https://github.com/llvm/llvm-project/commit/1faa9f73119f007583ca829e07d78e82a40f1bae
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Infer SrcTy in createScalarExtOrTrunc (NFC) (#210423)
The argument is redundant and can be inferred from Op.
Commit: d46a352ecf9708255a938e6d5e972b5221de4c2c
https://github.com/llvm/llvm-project/commit/d46a352ecf9708255a938e6d5e972b5221de4c2c
Author: David Mentler <mentlerd at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
Log Message:
-----------
[lldb] Fix TestSBValueSetTypeSyntheticOverride with libstdc++ (#210495)
My test added in #209056 assumed that a `CXXSyntheticChildren`
implementation for `std::vector` is readily available on all platforms,
that is not the case.
Do the simplest thing and remove this part of the test for now.
Fixes: https://lab.llvm.org/buildbot/#/builders/59/builds/35839
```
FAIL: test (TestSBValueSetTypeSyntheticOverride.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/llvm-project/lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py", line 22, in test
self.checkOverride(vec, before=None)
File "/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/llvm-project/lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py", line 43, in checkOverride
self.assertIsNone(impl_before)
AssertionError: <lldb.formatters.cpp.gnu_libstdcpp.StdVectorSynthProvider object at 0xfb088f787bb0> is not None
```
Commit: e96755f08bab48f1578bd70a1f55d336b5e44a69
https://github.com/llvm/llvm-project/commit/e96755f08bab48f1578bd70a1f55d336b5e44a69
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Factor vputils::getOpcodeOrIntrinsicID (NFC) (#208993)
The check for recipes in vputils::isElementWise is necessary to prevent
regressions.
Commit: 1f4d6acc935f93eca55cfef67348c8abcc1415db
https://github.com/llvm/llvm-project/commit/1f4d6acc935f93eca55cfef67348c8abcc1415db
Author: pzoln <pashka.zolnikov at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/test/Dialect/Bufferization/canonicalize.mlir
Log Message:
-----------
[mlir][bufferization] Avoid invalid memref.cast in to_buffer folding (#208973)
Fixes #202782
When folding bufferization.to_buffer(bufferization.to_tensor(...)), only
create a memref.cast if the source and destination memref types are
cast-compatible.
This avoids asserting on unranked memrefs with different memory spaces
and leaves the original bufferization ops in place instead.
Assisted-by: OpenAI Codex
Commit: c69896aa8733ceed6e8cc982eec64b97f277f926
https://github.com/llvm/llvm-project/commit/c69896aa8733ceed6e8cc982eec64b97f277f926
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
Log Message:
-----------
[mlir][interface] Use populateAndCompare cleanup compare (NFC) (#200156)
Commit: af0aa9440f1121bd5041a3dd7abef0d78b0f91cd
https://github.com/llvm/llvm-project/commit/af0aa9440f1121bd5041a3dd7abef0d78b0f91cd
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
Log Message:
-----------
[AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos (#169699)
Refactor `AArch64AsmPrinter::emitPtrauthAuthResign` to improve
readability and tune the conditions when `emitPtrauthDiscriminator` is
allowed to clobber address discriminator operands.
When resigning, do not clobber address discriminator register used for
authentication if it is also used for signing. Such clobbering would
prevent passing raw, 64-bit value as the new discriminator. Clarify
other corner cases of clobbering address discriminator operands.
Reuse `enum PtrauthCheckMode` instead of separate `ShouldCheck` and
`ShouldTrap` flags and drop its `Default` enumerator.
Commit: 0c5b2258f0b517c0822e5b2f8e6a8de311d6db9d
https://github.com/llvm/llvm-project/commit/0c5b2258f0b517c0822e5b2f8e6a8de311d6db9d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/IndVarSimplify/drop-exact.ll
M llvm/test/Transforms/IndVarSimplify/pr66066.ll
M llvm/test/Transforms/IndVarSimplify/strengthen-overflow.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
Log Message:
-----------
[SCEV] Infer no-wrap flags for shl by a constant. (#208434)
Treat `shl %a, C` as `mul %a, 1 << C` in
getStrengthenedNoWrapFlagsFromBinOp
if possible.
Only transfer NSW from shl to mul, if the shift amount is < Bitwidth -
1, otherwise the result would be more poisonous.
Alive2 proofs: https://alive2.llvm.org/ce/z/iBPpkv
Compile-time impact in noise:
https://llvm-compile-time-tracker.com/compare.php?from=a037729976f91dc11b41a76834dfca9d8812c4fe&to=2050d622aed5606774f0902b352bbb2142e654e1&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/208434
Commit: d199b284c7d3f98bb7afbbca9e79e078a1da55fe
https://github.com/llvm/llvm-project/commit/d199b284c7d3f98bb7afbbca9e79e078a1da55fe
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M orc-rt/docs/Design.md
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Drop callManagedCodeAsync; tokens guard execution (#210508)
callManagedCodeSync is renamed to callManagedCode, and
callManagedCodeAsync is removed.
callManagedCodeAsync held a ManagedCodeTaskGroup token from the initial
call until the async continuation ran -- across the gap in which the
call is suspended and no managed code is executing. A token is meant to
guard managed code that is executing on a stack, so holding one across
that gap guards nothing while blocking shutdown.
callManagedCode holds a token only for the synchronous call to the
wrapped function, including anything the function runs inline on the
same thread before returning. An async function is called the same way,
with its continuation passed as an ordinary argument. Work deferred past
the function's return -- stashed, or handed to another thread -- runs on
a stack the token no longer guards; whoever later runs it is responsible
for ensuring a token covers it, acquiring one and aborting if the
acquire is denied.
See the new "Managed code execution and shutdown" section in
docs/Design.md for the full model (what a token guards, nested entries,
context-free acquire, and the abortability obligation).
Commit: 7b446294e098c7c02bbc998da1b4a438f7270879
https://github.com/llvm/llvm-project/commit/7b446294e098c7c02bbc998da1b4a438f7270879
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
M llvm/unittests/Support/MathExtrasTest.cpp
Log Message:
-----------
[Support] Add constexpr versions of Add/Sub/MulOverflow (#210404)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 36c812f77142aa77b99b4e4d059ccba591a944c0
https://github.com/llvm/llvm-project/commit/36c812f77142aa77b99b4e4d059ccba591a944c0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Sequence.h
M llvm/unittests/ADT/SequenceTest.cpp
Log Message:
-----------
[ADT] Make enum iterators constexpr (#210405)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: fdf1adc8910ce4083d4c18205f665ef3c30cc851
https://github.com/llvm/llvm-project/commit/fdf1adc8910ce4083d4c18205f665ef3c30cc851
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
Log Message:
-----------
[orc-rt] Add comment for Session::HandlerTag type. NFC. (#210510)
Commit: af0c933eda31b6beb436026a22121ec637f3cb53
https://github.com/llvm/llvm-project/commit/af0c933eda31b6beb436026a22121ec637f3cb53
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CodeGen/TargetInfo.cpp
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Function.h
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/is_fpclass.ll
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-fmuladd.ll
M llvm/test/Transforms/EarlyCSE/replace-calls-def-attrs.ll
M llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fdim.ll
M llvm/test/Transforms/InstSimplify/disable_folding.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad.ll
M llvm/unittests/IR/VerifierTest.cpp
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[IR] Make semantics of strictfp consistent (#209465)
Although the section on constrainedfp in the LangRef clearly states "All
function definitions that use constrained floating point intrinsics must
have the strictfp attribute", indicating that a function with strictfp
calls must be marked with strictfp, the general description of strictfp
does not specify this. Refine its semantics and make it so, eliminating
the inconsistency.
Commit: 94b08b5de90dc21453a1dcde10cc1cd44ba93f7c
https://github.com/llvm/llvm-project/commit/94b08b5de90dc21453a1dcde10cc1cd44ba93f7c
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Support] Improve the logic for re-raising signals (#177864)
On most systems, checking `si_pid` is not actually valid unless
`si_code` equals one of the relevant signal codes (`SI_USER`,
`SI_QUEUE`, and on some OSs, `SI_LWP`), or the signal is `SIGCHLD`. So
on e.g. NetBSD, we would misinterpret the `SIGSEGV` fault address as the
sending PID and incorrectly conclude that the signal came from a
different process.
But as far as I can tell, there's not even a valid reason for us to be
checking `si_pid != getpid()`, because the signal could very well have
been explicitly sent by another thread in the current process. So we
really just need to check `si_code` for the aforementioned signal codes.
Darwin is the exception because it just doesn't set `si_code` at all in
the case of the `SI_*` signal codes. So keep the old logic there, even
though it misses the corner case of signals sent by a thread in the
current process.
While here, I also changed the error check for Linux
`rt_tgsigqueueinfo()` as it was not at all clear to me how we would ever
see `EPERM` from sending a signal to the current thread. Besides, it's
sensible to go to the `raise()` path as a last resort regardless of how
`rt_tgsigqueueinfo()` failed (e.g. `ENOSYS` on an old kernel).
Commit: f6d9ec41d30b453c939bbaa1c73b876ce1389ee9
https://github.com/llvm/llvm-project/commit/f6d9ec41d30b453c939bbaa1c73b876ce1389ee9
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV] Add packed narrowing convert intrinsics (#210389)
Add RISC-V P-extension packed narrowing convert header APIs for `pncvt`
and `pncvth`.
The new APIs lower through generic IR: RV32 uses truncate / logical
shift plus truncate forms, while RV64 uses existing packed unzip shuffle
forms. This reuses the existing backend lowering and TableGen aliases
rather than adding intrinsic-specific lowering.
Tests cover Clang IR generation and cross-project header assembly checks
for RV32/RV64 spec-listed mnemonics.
Commit: be68a8829d6d6a2186f962b37d83984961cedeb1
https://github.com/llvm/llvm-project/commit/be68a8829d6d6a2186f962b37d83984961cedeb1
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Sequence.h
Log Message:
-----------
[ADT] Fix non-assertion build after 36c812f771 (#210511)
E.g. https://lab.llvm.org/buildbot/#/builders/228/builds/5253
Commit: 53096b7a2d268ab92617436915bc6f9f3cf8d82e
https://github.com/llvm/llvm-project/commit/53096b7a2d268ab92617436915bc6f9f3cf8d82e
Author: AntonyCJ30 <cj6186609 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/sub.ll
Log Message:
-----------
[X86][APX] Optimize usub.sat(X,1) to cmp+adc with NDD (#208475)
When NDD is available, usub.sat(X, 1) is lowered from xor+sub+cmov (3
insns) to cmp+adc (2 insns).
All X86 tests pass.
Fixes #207888
Co-authored-by: AntonyCJ30 <cj6186609 at gmail@gmail.com>
Commit: c739ce632b1489dcdbaad72df64a9cec9a8ed359
https://github.com/llvm/llvm-project/commit/c739ce632b1489dcdbaad72df64a9cec9a8ed359
Author: Taimuraz Kaitmazov <atassikay38 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
A llvm/test/TableGen/subreg-index-overflow-allowed.td
A llvm/test/TableGen/subreg-index-overflow.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
Log Message:
-----------
[TableGen] Diagnose sub-register indices that overflow their register (#206346)
Commit: 0b5073a3cd15b942860eeb2ce18a7958bbcf9169
https://github.com/llvm/llvm-project/commit/0b5073a3cd15b942860eeb2ce18a7958bbcf9169
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_RELAX_TLS_* RelExprs (#210517)
As of 46d29d43ba8e ("[ELF] Remove unused handleTlsRelocation (#184951)")
these are never generated.
Commit: 2144ee4e19c4cf4501daed8d71aec68af1b9a8a6
https://github.com/llvm/llvm-project/commit/2144ee4e19c4cf4501daed8d71aec68af1b9a8a6
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_TLSDESC_CALL RelExpr (#210518)
As of 4ea72c1e8cbd ("[ELF] Add target-specific relocation scanning for
RISC-V (#181332)") this is never generated, and as of 46d29d43ba8e
("[ELF] Remove unused handleTlsRelocation (#184951)") this is not even
handled anywhere.
Commit: f9b7acbe7d5b6dbd1769a8d8c9cfb6de23abe48c
https://github.com/llvm/llvm-project/commit/f9b7acbe7d5b6dbd1769a8d8c9cfb6de23abe48c
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_TLS*_HINT RelExprs (#210519)
As of 5e87f8147d68 ("[ELF] Add target-specific relocation scanning for
PPC32 (#181517)") these are never generated, and as of 46d29d43ba8e
("[ELF] Remove unused handleTlsRelocation (#184951)") these are not even
handled anywhere.
Commit: acd3fcfdd6d065f914eadbe2036e703c056b4ccc
https://github.com/llvm/llvm-project/commit/acd3fcfdd6d065f914eadbe2036e703c056b4ccc
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGen/call-graph-section-callback.cpp
M clang/test/CodeGen/call-graph-section-internal.cpp
M clang/test/CodeGen/call-graph-section-templates.cpp
M clang/test/CodeGen/call-graph-section-virtual-methods.cpp
M clang/test/CodeGen/call-graph-section.c
M clang/test/CodeGen/call-graph-section.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/ARM/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/ARM/call-graph-section-assembly.ll
M llvm/test/CodeGen/ARM/call-graph-section-tailcall.ll
M llvm/test/CodeGen/ARM/call-graph-section.ll
M llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/X86/call-graph-section-assembly.ll
M llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
M llvm/test/CodeGen/X86/call-graph-section.ll
M llvm/test/Verifier/callee-type-metadata.ll
Log Message:
-----------
[clang] Emit call graph type metadata for internal linkage symbols (#210194)
Commit: 4812a67a45710531f9ac3bf2a84a1e2b278971a4
https://github.com/llvm/llvm-project/commit/4812a67a45710531f9ac3bf2a84a1e2b278971a4
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN frexp_mant builtins (#198121)
Adds codegen for the following AMDGCN frexp mantissa builtins:
- __builtin_amdgcn_frexp_mant (double)
- __builtin_amdgcn_frexp_mantf (float)
- __builtin_amdgcn_frexp_manth (half)
These are lowered to the corresponding `llvm.amdgcn.frexp.mant`
intrinsic.
Commit: 6d70017b17f967756825107c91f24769046826b9
https://github.com/llvm/llvm-project/commit/6d70017b17f967756825107c91f24769046826b9
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .mailmap
Log Message:
-----------
mailmap: Add entries for Peter Collingbourne. (#210526)
I am no longer at Google.
Commit: d89537dd93f6fba07864e3583e11996c91a794b8
https://github.com/llvm/llvm-project/commit/d89537dd93f6fba07864e3583e11996c91a794b8
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
Log Message:
-----------
[DirectX] Fix `--dx-embed-debug` flag dependency (#210513)
This patch moves the definition of `cl::opt<std::string> PdbDebugPath`
from `DXContainerGlobals.cpp` to `DXILWriter/DXILWriterPass.cpp`,
reversing the dependency.
Fixes the layering violation in #204166.
Commit: 220e8277d3ad300c094447d214f0a5a122435196
https://github.com/llvm/llvm-project/commit/220e8277d3ad300c094447d214f0a5a122435196
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/unittests/IR/PassManagerTest.cpp
Log Message:
-----------
[IR][NFC] Avoid unneccessary move of analysis results (#210540)
While benchmarking CycleAnalysis, I noticed that each analysis result is
constructed on the stack first and then moved to its final place on the
heap. This is unnecessary -- directly construct the analysis result in
its final place. Consequently, analysis results can be immovable.
Commit: bcb4e7d061ac22bce4ac65f5158a4746fb0edc0f
https://github.com/llvm/llvm-project/commit/bcb4e7d061ac22bce4ac65f5158a4746fb0edc0f
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
Log Message:
-----------
[InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (#202482)
SimplifyDemandedUseFPClass folded 0/x to a signed zero, guarded only on
the divisor being non-NaN. But when x==0, the result is is NaN, not 0!
Require the divisor to be never (logical) zero, unless a NaN result
isn't demanded.
Commit: f5c4f390a04abf63f9f4c98980df67e22544ddb7
https://github.com/llvm/llvm-project/commit/f5c4f390a04abf63f9f4c98980df67e22544ddb7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyLateEHPreparePass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/209956
Commit: 0e3d17a080646825df5cdff6997c633b6292b6ff
https://github.com/llvm/llvm-project/commit/0e3d17a080646825df5cdff6997c633b6292b6ff
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyReplacePhysRegsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/209957
Commit: 84b9da663e9c505304eac37621a56fd8e1ef7c12
https://github.com/llvm/llvm-project/commit/84b9da663e9c505304eac37621a56fd8e1ef7c12
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] Install `llvm-tools` in libc container (#210414)
Currently, the libc container doesn't contain `llvm-tools`. we need to
use them in #200196 because we are not able to use `llvm-lit` without
building clang from source
Commit: 14bf60dacab081559bedca01ab426f52793b38cb
https://github.com/llvm/llvm-project/commit/14bf60dacab081559bedca01ab426f52793b38cb
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
Log Message:
-----------
[CycleInfo] Deduplicate getExitBlocks with a set. NFC (#210557)
Fix the O(exit_blocks^2) hazard.
Commit: 617e4f54e503b54b08445a086d95a80aa72a58d0
https://github.com/llvm/llvm-project/commit/617e4f54e503b54b08445a086d95a80aa72a58d0
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
[Clang][Interpreter] Don't pass -fPIC on MSVC (#210507)
Commit: f05a649741f248e3809a6d0e7b5a8daf7bed74a8
https://github.com/llvm/llvm-project/commit/f05a649741f248e3809a6d0e7b5a8daf7bed74a8
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/lgammaf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/lgammaf16.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/lgammaf16.cpp
A libc/src/math/lgammaf16.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/lgammaf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/lgammaf16_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Implement half precision lgamma function (#192834)
The implementation uses three distinct paths based on $|x|$:
- Small ($|x| < 0.66$): Fits a degree-12 Chebyshev for $h(t) =
\frac{\text{lgamma}(t) + \log(t)}{t}$, recovering $\text{lgamma}(t) = t
\cdot h - \log(t)$.
- Medium ($|x| \in [0.66, 3.37]$): Fits a degree-20 Chebyshev for $g(t)
= \frac{\text{lgamma}(t)}{(t-1)(t-2)}$
- Stirling ($|x| > 3.37$): Uses $(x-0.5) \cdot \log(x) - x +
\frac{\log(2\pi)}{2}$ plus 1/2/4/8-term Bernoulli corrections by
sub-range.
Special cases: NaN, +/-Inf -> +Inf, +/-0 pole, negative integer pole,
lgamma(1) = lgamma(2) = 0 exactly, overflow for large positive x.
Exhaustive tests pass in all 4 rounding modes.
-- CORE-MATH reciprocal throughput --
Ntrial = 20 ; Min = 391.348 + 77.447 clc/call; Median-Min = 68.093
clc/call; Max = 540.055 clc/call;
-- System LIBC reciprocal throughput --
Ntrial = 20 ; Min = 377.829 + 81.686 clc/call; Median-Min = 64.851
clc/call; Max = 532.888 clc/call;
Commit: 81ed4d01aa5858ab3f3ffe4e5cc4f9111a8afc46
https://github.com/llvm/llvm-project/commit/81ed4d01aa5858ab3f3ffe4e5cc4f9111a8afc46
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
Log Message:
-----------
[UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (#210564)
Commit: 8043ceb7591cc1e55e699cbf8f23fffe1e90381f
https://github.com/llvm/llvm-project/commit/8043ceb7591cc1e55e699cbf8f23fffe1e90381f
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
Log Message:
-----------
[libc] Omit -fpie from the full build (#208343)
We shouldn't unconditionally set -fpie, users should be able to control
this with CMAKE_POSITION_INDEPENDENT_CODE.
Commit: 446a84a7c66eda9b945a000ccab04948f240eaaa
https://github.com/llvm/llvm-project/commit/446a84a7c66eda9b945a000ccab04948f240eaaa
Author: Brad Smith <brad at comstyle.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M openmp/runtime/src/kmp_i18n.cpp
Log Message:
-----------
[OpenMP] Simplify GNU strerror_r check for Android (#148990)
Android 6 is the baseline so simplify the Android check.
Commit: 790882669323c7255cb761755bb2d37d3b344452
https://github.com/llvm/llvm-project/commit/790882669323c7255cb761755bb2d37d3b344452
Author: Shikhar Jain <shikharj at qti.qualcomm.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M polly/include/polly/DependenceInfo.h
M polly/lib/Analysis/DependenceInfo.cpp
M polly/lib/CodeGen/IslAst.cpp
A polly/test/IstAstInfo/AstGenComputeOut.ll
Log Message:
-----------
[Polly] Guard ISL ast gen compute out (#201859)
Bounds the maximum ISL operations allowed for ISL AST Generation.
Fixes: https://github.com/llvm/llvm-project/issues/201801
Commit: f988efbef5854243f9f518e9334dfee08ff2e1de
https://github.com/llvm/llvm-project/commit/f988efbef5854243f9f518e9334dfee08ff2e1de
Author: michaelselehov <michael.selehov at amd.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
M llvm/test/Transforms/PhaseOrdering/AMDGPU/infer-address-space.ll
Log Message:
-----------
[AMDGPU] Run early-cse<memssa> at the end of the full-LTO pipeline (#208461)
The regular (non-LTO) and ThinLTO function simplification pipelines run
an
EarlyCSE-with-MemorySSA pass near the start of the function pass
sequence, but
the full-LTO postlink pipeline does not. Without it, a redundant
load/store
round-trip can survive all the way to codegen; the later GVN/DSE in the
LTO
pipeline do not catch this particular pattern.
Rather than touch the target-independent LTO pipeline, register
early-cse<memssa> through the AMDGPU FullLinkTimeOptimizationLast
extension
point, so it runs at the end of the full-LTO middle-end (before codegen)
only
for AMDGPU.
Assisted-by: Claude Opus
Commit: 4a1c00420f7e1660d509ac32ca3d02a4aef20ab2
https://github.com/llvm/llvm-project/commit/4a1c00420f7e1660d509ac32ca3d02a4aef20ab2
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCSchedule.h
M llvm/test/TableGen/CompressWriteLatencyEntry.td
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[MC] Pack scheduling class entry counts (#202649)
Generated scheduling classes currently use at most 20 write-resource
entries and 35 write-latency entries, while read-advance counts reach
504. Narrow the two write counts to `uint8_t`, order the three table
indices before the three counts, and emit target-specific compile-time
bounds assertions in generated subtarget source.
This reduces `sizeof(MCSchedClassDesc)` from 14 to 12 bytes in release
builds and from 20 to 16 bytes with debug fields. Fully stripped arm64
`llvm-mca` decreases by 544,896 bytes (1.49%), and the stripped
all-tools multicall binary decreases by 528,376 bytes (0.368%).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: ee62806354aabac85ef8c6605bdc7829d997682a
https://github.com/llvm/llvm-project/commit/ee62806354aabac85ef8c6605bdc7829d997682a
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/docs/OpenMPSupport.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/dims_modifier_ast_print.cpp
A clang/test/OpenMP/dims_modifier_messages.cpp
M clang/test/OpenMP/ompx_bare_messages.c
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[Clang][OpenMP] Add parsing/sema for dims modifier in num_teams and thread_limit (#206412)
Add parsing and sema support for `dims` modifier (OpenMP 6.1) in `num_teams` and
`thread_limit` clauses. Example:
```cpp
constexpr int N = 2;
#pragma omp teams num_teams(dims(3): x, y, z) thread_limit(dims(N): a, b)
{ ... }
```
Commit: 8042e61d6ae99347e8cab040b324b33cabfb1d4a
https://github.com/llvm/llvm-project/commit/8042e61d6ae99347e8cab040b324b33cabfb1d4a
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Fold trunc nuw/nsw (shr exact %x, %y) to i1 -> icmp ne %x, 0 (#210499)
Proof: https://alive2.llvm.org/ce/z/de6gru
Commit: 5cae63bd0d31118a15481fc7e5b063a73492d77d
https://github.com/llvm/llvm-project/commit/5cae63bd0d31118a15481fc7e5b063a73492d77d
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M polly/test/IstAstInfo/AstGenComputeOut.ll
Log Message:
-----------
[Polly][test] Add missing REQUIRES line (#210578)
The test was added by #201859. It's test uses --debug-only which
requires an LLVM_ENABLE_ASSERTIONS-build
Commit: 1d55a816c6dddfaacfd39f3235519a2389b56423
https://github.com/llvm/llvm-project/commit/1d55a816c6dddfaacfd39f3235519a2389b56423
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
Log Message:
-----------
[X86] Support apxf in attribute target (#184078)
As in title. This adds support for using apxf in attribute target.
Individual features are not supported for FMV but are supported for
enabling a feature for the function
Patch done with usage of Claude Code.
Commit: 5e1873abad44f622c7a18304b1552c233d47bd16
https://github.com/llvm/llvm-project/commit/5e1873abad44f622c7a18304b1552c233d47bd16
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/unittests/Frontend/OpenMPDirectiveNameParserTest.cpp
Log Message:
-----------
[OpenMP] Add constexpr enum ranges for all clauses and all directives (#210406)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: f25b3f62cee27d11d1491bdb10dfa955213b2064
https://github.com/llvm/llvm-project/commit/f25b3f62cee27d11d1491bdb10dfa955213b2064
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
A llvm/test/Transforms/LoopVectorize/AArch64/non-affine-monotonic-bounds.ll
A llvm/test/Transforms/LoopVectorize/non-affine-monotonic-bounds.ll
Log Message:
-----------
[LAA,LV] Add tests for non-affine monotonic pointer bounds (NFC). (#210544)
Add test cases with non-affine monotonic pointer bounds, like for
example when using std::bitset.
Initial sets of tests for
https://github.com/llvm/llvm-project/issues/207882.
Commit: cd99637821097c239b665793243d8e6a332fc719
https://github.com/llvm/llvm-project/commit/cd99637821097c239b665793243d8e6a332fc719
Author: Vito Secona <77039267+secona at users.noreply.github.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation-simplification.mlir
Log Message:
-----------
[mlir][bufferization] Fix stale BufferOriginAnalysis in BufferDeallocationSimplification (#210105)
Fixes #205228
This change fixes a use-after-free bug in the
BufferDeallocationSimplification pipeline caused by the greedy pattern
rewriter deleting operation tracked by the BufferOriginAnalysis.
BufferViewFlowAnalysis (internally used by BufferOriginAnalysis) creates
the dependencies map once during initialization. In this specific case,
the folder removed the `memref.cast` ops making later uses a
use-after-free bug.
Below is the snippet of running the pass using
`-debug-only=greedy-rewriter`. It erases a `memref.cast` and crashes in
RemoveDeallocMemrefsContainedInRetained.
```
...
[greedy-rewriter:1] //===-------------------------------------------===//
[greedy-rewriter:1] Processing operation : 'memref.cast'(0x654d43d18670) {
[greedy-rewriter:1] %4 = "memref.cast"(%3) : (memref<?x?xf32, 1>) -> memref<4x4xf32, 1>
[greedy-rewriter:1]
[greedy-rewriter:1] } -> success : operation was folded
[greedy-rewriter:1] //===-------------------------------------------===//
[greedy-rewriter:1] ** Replace : 'memref.cast'(0x654d43d18670)
[greedy-rewriter:1] ** Modified: 'scf.yield'(0x654d43c97bb0)
[greedy-rewriter:1] ** Erase : 'memref.cast'(0x654d43d18670)
...
[greedy-rewriter:1] Processing operation : 'bufferization.dealloc'(0x654d43cbd7d0) {
[greedy-rewriter:1] %5 = "bufferization.dealloc"(%4#0, %1, %3) <{operandSegmentSizes = array<i32: 1, 1, 1>}> : (memref<f32, 1>, i1, memref<4x4xf32, 1>) -> i1
[greedy-rewriter:1]
[greedy-rewriter:1]
[greedy-rewriter:1] * Pattern (anonymous namespace)::RemoveDeallocMemrefsContainedInRetained : 'bufferization.dealloc -> ()' {
```
The fix is to disable folding and split the canonicalization patterns to
run separately. This way, the patterns that rely on BufferOriginAnalysis
still work because folding was disabled and BufferOriginAnalysis never
invalidated. Then, the canonicalization patterns still benefit from
folding.
Commit: 4b4d4a61202bd960a7a72730d596e5ebe6ab71b1
https://github.com/llvm/llvm-project/commit/4b4d4a61202bd960a7a72730d596e5ebe6ab71b1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2.ll
Log Message:
-----------
[SLP][NFC]Add a test for potential masked div/rem ops, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210593
Commit: 5c7dc8e7d72e8f833e5fa4d4790e93ff76b51304
https://github.com/llvm/llvm-project/commit/5c7dc8e7d72e8f833e5fa4d4790e93ff76b51304
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M libcxx/test/libcxx/ranges/range.adaptors/range.enumerate/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Add missing test cases for `[[nodiscard]]` tests in `enumerate_view` (#209289)
Addresses missing `[[nodiscard]]` test cases for
`std::views::enumerate`.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: ab39c491430e1f327849708ababffa3458b8ff6f
https://github.com/llvm/llvm-project/commit/ab39c491430e1f327849708ababffa3458b8ff6f
Author: Feng Zou <feng.zou at intel.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-multipred.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-multipred.mir
Log Message:
-----------
[X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (#208184)
Extend optimizeCompareInstr to reuse EFLAGS produced in predecessor
blocks (including via NF variants) when a compare is redundant, covering
multi-predecessor, dominating, and cyclic CFGs. Share the NF-clobber
removal helper with FlagsCopyLowering, correctly handle swapped and
immediate-adjusted flag reuse, and simplify EFLAGS live-in marking.
Adds MIR tests exercising multi-predecessor reuse over cyclic and
dominating CFGs, including a multi-level idom walk.
Assisted-By: Claude Opus 4.8
Commit: 637506427c2062fdbbd52fe1ef6c701f799a4228
https://github.com/llvm/llvm-project/commit/637506427c2062fdbbd52fe1ef6c701f799a4228
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll
Log Message:
-----------
[SLP][NFC]Add a test with potential masked revec udiv, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210596
Commit: 9f6c84b8361133ecea5a43e34ab020384085a931
https://github.com/llvm/llvm-project/commit/9f6c84b8361133ecea5a43e34ab020384085a931
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] symlink `llvm-tools` in libc container (#210561)
Missed thing in #210414. We need to symlink the LLVM tools that are
under `/usr/lib/llvm-23/bin/` to avoid errors like this because the LLVM
tools have a `-23` suffix when they're installed inside the container
```
# RUN: at line 2
/usr/bin/clang-23 -gline-tables-only -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -DCOMPILER_RT_HAS_FLOAT16 -nobuiltininc -I/__w/llvm-project/llvm-project/compiler-rt/include -idirafter /usr/lib/llvm-23/lib/clang/23/include -resource-dir=/__w/llvm-project/llvm-project/build/compiler-rt -Wl,-rpath,/__w/llvm-project/llvm-project/build/compiler-rt/lib/linux -fno-builtin -I /__w/llvm-project/llvm-project/compiler-rt/lib/builtins -nodefaultlibs /__w/llvm-project/llvm-project/compiler-rt/test/builtins/Unit/aarch64/emupac.c -lm -Wl,--start-group /__w/llvm-project/llvm-project/build/compiler-rt/lib/linux/libclang_rt.builtins-aarch64.a -lc -Wl,--end-group -o /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp
# executed command: /usr/bin/clang-23 -gline-tables-only -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -DCOMPILER_RT_HAS_FLOAT16 -nobuiltininc -I/__w/llvm-project/llvm-project/compiler-rt/include -idirafter /usr/lib/llvm-23/lib/clang/23/include -resource-dir=/__w/llvm-project/llvm-project/build/compiler-rt -Wl,-rpath,/__w/llvm-project/llvm-project/build/compiler-rt/lib/linux -fno-builtin -I /__w/llvm-project/llvm-project/compiler-rt/lib/builtins -nodefaultlibs /__w/llvm-project/llvm-project/compiler-rt/test/builtins/Unit/aarch64/emupac.c -lm -Wl,--start-group /__w/llvm-project/llvm-project/build/compiler-rt/lib/linux/libclang_rt.builtins-aarch64.a -lc -Wl,--end-group -o /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp
# RUN: at line 3
/__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 1
# executed command: /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 1
# RUN: at line 4
/__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 2
# executed command: /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 2
# RUN: at line 5
not --crash /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 3
# executed command: not --crash /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 3
# .---command stderr------------
# | 'not': command not found
# `-----------------------------
```
Commit: dcf03fefd46ea1426475c948925c9501af2f5495
https://github.com/llvm/llvm-project/commit/dcf03fefd46ea1426475c948925c9501af2f5495
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Eytzinger.h
M llvm/unittests/ADT/EytzingerTest.cpp
Log Message:
-----------
[ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (#210478)
This patch adds iterator and const_iterator type aliases as well as
begin() and end() methods to EytzingerTableSpan and EytzingerTable.
I'm going to be using these as part of the SecNameTable in the
Eytzinger layout.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: 24942433bc8a71b8aa459f802a0962089bb4dd22
https://github.com/llvm/llvm-project/commit/24942433bc8a71b8aa459f802a0962089bb4dd22
Author: Mend Renovate <bot at renovateapp.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/premerge.yaml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/require-team-membership/action.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/subscriber.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
Log Message:
-----------
Update [Github] Update GHA Dependencies (#194274)
This PR contains the following updates:
| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
|
[EnricoMi/publish-unit-test-result-action](https://redirect.github.com/EnricoMi/publish-unit-test-result-action)
| action | minor | `v2.23.0` → `v2.24.0` | |
|
[actions/attest-build-provenance](https://redirect.github.com/actions/attest-build-provenance)
| action | patch | `v4.1.0` → `v4.1.1` | |
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | patch | `v6.0.2` → `v6.0.3` | |
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | patch | `v6.0.1` → `v6.0.3` | |
|
[actions/create-github-app-token](https://redirect.github.com/actions/create-github-app-token)
| action | minor | `v3.1.1` → `v3.2.0` | |
| [actions/labeler](https://redirect.github.com/actions/labeler) |
action | minor | `v6.0.1` → `v6.2.0` | |
| [actions/setup-node](https://redirect.github.com/actions/setup-node) |
action | minor | `v6.3.0` → `v6.5.0` | |
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | minor | `v6.2.0` → `v6.3.0` | |
|
[actions/upload-artifact](https://redirect.github.com/actions/upload-artifact)
| action | patch | `v7.0.0` → `v7.0.1` | |
| [aminya/setup-cpp](https://redirect.github.com/aminya/setup-cpp) |
action | patch | `v1.8.0` → `v1.8.1` | |
| [docker/login-action](https://redirect.github.com/docker/login-action)
| action | minor | `v4.1.0` → `v4.4.0` | |
| ghcr.io/llvm/amd64/ci-ubuntu-24.04-github-automation | container |
digest | `82b5304` → `f419363` | |
| ghcr.io/llvm/ci-ubuntu-24.04 | container | digest | `cc4fd65` →
`26c16c2` | |
| ghcr.io/llvm/ci-ubuntu-24.04-abi-tests | container | digest |
`cb3aea3` → `a948062` | |
| ghcr.io/llvm/ci-ubuntu-24.04-lint | container | digest | `91665a4` →
`416874e` | |
| ghcr.io/llvm/libc-ubuntu-24.04 | container | digest | `a902fb5` →
`b9c8ea7` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | minor | `v4.35.2` → `v4.37.0` | `v4.37.1` |
|
[hendrikmuhs/ccache-action](https://redirect.github.com/hendrikmuhs/ccache-action)
| action | patch | `v1.2.22` → `v1.2.23` | |
|
[zizmorcore/zizmor-action](https://redirect.github.com/zizmorcore/zizmor-action)
| action | minor | `v0.5.3` → `v0.6.0` | |
Commit: c45b4e4d00bed488d6ece5608560561732ae5b9e
https://github.com/llvm/llvm-project/commit/c45b4e4d00bed488d6ece5608560561732ae5b9e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Link static PIE executables against rcrt1.o (#210125)
We always selected crt1.o as the CRT start file, regardless of link
mode.
Select rcrt1.o - the self-relocating static-PIE start file when -static
and PIE are active
Commit: 32819927e0c02662a5c8aae252997748cdc94962
https://github.com/llvm/llvm-project/commit/32819927e0c02662a5c8aae252997748cdc94962
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Retire LVP::hasTailFolded (NFC). (#210598)
LVP::hasTailFolded incldued an assert that hasTailFOlded matches the
VPlan version. No divergences surfaced, so remove the assert as planned.
Commit: dae991a55eacb4f3c3382f3cba2897ceb43e1725
https://github.com/llvm/llvm-project/commit/dae991a55eacb4f3c3382f3cba2897ceb43e1725
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/test/Analysis/BasicAA/atomics.ll
Log Message:
-----------
[AA] Use the cmpxchg merged ordering in getModRefInfo (#210545)
When a cmpxchg's address is NoAlias with the queried location,
getModRefInfo still reports sync effects if the cmpxchg is stronger than
monotonic, since an ordered operation constrains code motion around
locations it never accesses.
But a cmpxchg op has two atomic orderings, and getModRefInfo looked
only at one of them.
Change it so we check the merged ordering, i.e. the stronger of the two.
Commit: ae023494fba615bb1c75292f93e4521cfe7068b5
https://github.com/llvm/llvm-project/commit/ae023494fba615bb1c75292f93e4521cfe7068b5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/splat-buildvector.ll
Log Message:
-----------
[SLP]Add umax/umin/smax/smin as main opcodes for copyables
Added umax/umin/smax/smin intrinsics in for copyables support.
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/209326
Commit: 6bcdcb39c57ea926d3082ec3ecae74bf59b4658e
https://github.com/llvm/llvm-project/commit/6bcdcb39c57ea926d3082ec3ecae74bf59b4658e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
Log Message:
-----------
[DWARFLinker] Make synthetic type names deterministic under threading (#209553)
Commit: 598f15297528855682dcf381575a9c14a7faabc3
https://github.com/llvm/llvm-project/commit/598f15297528855682dcf381575a9c14a7faabc3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
Log Message:
-----------
[ConstraintElim] Fix integer overflow when negating constraint (#210627)
Negating a coefficient (e.g. INT64_MIN) can overflow; skip adding the
inverted constraint if it wraps.
Fixes an UBSan failure for the added test.
Commit: 01683dbe7e2071e8cc3aa2874e623259079aa1ae
https://github.com/llvm/llvm-project/commit/01683dbe7e2071e8cc3aa2874e623259079aa1ae
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/QueueingRunner.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/QueueingRunnerTest.cpp
Log Message:
-----------
[orc-rt] Replace RunWrapperCall with generalized Dispatch (#210591)
RunWrapperCall dispatched wrapper-function calls, but the Session also
needs to dispatch continuations for results returned by the controller.
Replace it with a generalized Dispatch mechanism (DispatchFn) that is
handed an opaque Task for each unit of work, covering both.
QueueingRunner is correspondingly simplified: it no longer knows
anything about wrapper functions and just enqueues the Task it is given.
Tests and the noDispatch helper are updated to the new interface.
Commit: 16ffd27e3737c01cbabad6eed77b919dc977ad6c
https://github.com/llvm/llvm-project/commit/16ffd27e3737c01cbabad6eed77b919dc977ad6c
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
Log Message:
-----------
[libcxx][NFC] Address -Wmicrosoft-cast in MSVC's exception_ptr (#210570)
This was introduced as part of #94977. Rather than suppressing the
warning with `#pragma clang diagnostic ignored`, we use
`reinterpret_cast` to avoid the implicit conversion.
Commit: c6672a6fdf1469d818d0ac8aaa2c31a0f18e729a
https://github.com/llvm/llvm-project/commit/c6672a6fdf1469d818d0ac8aaa2c31a0f18e729a
Author: Benji Smith <6193112+Benjins at users.noreply.github.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/fsh.ll
Log Message:
-----------
[InstCombine] Fix invalid fshl -> lshr fold when shift is vector with constant zero lane (#210606)
For vectors, this is not valid if a subset of the lanes are constant
zero. Doing this fold introduces poison in those lanes. A similar fix
was done for fshr in 46957a138dea339799059ea5bf032e40042ff185 however
the same issue seems to apply to fshl
Fixes https://github.com/llvm/llvm-project/issues/210605
Commit: 5497f466e4fc634f91de043fc80a9cd8cc0f32a1
https://github.com/llvm/llvm-project/commit/5497f466e4fc634f91de043fc80a9cd8cc0f32a1
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-narrowing-zip.ll
Log Message:
-----------
[RISCV][P-ext] Support Packed Narrowing Zip (#210040)
Commit: 53c6ce165aef58e1885d574c1ec597d091c3c8fc
https://github.com/llvm/llvm-project/commit/53c6ce165aef58e1885d574c1ec597d091c3c8fc
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/include/__utility/cmp.h
Log Message:
-----------
[libc++][cmp][NFC] Fix: Empty namespaces should be avoided (#210624)
Context: Including `<__utility/cmp.h>` causes:
> cmp.h:25:1: error: Empty namespaces should be avoided. Move any checks
around the namespace instead.
[libcpp-avoid-empty-namespaces,-warnings-as-errors]
Commit: 8a119310dae2fd67497c8611fc3208d16a36a2c3
https://github.com/llvm/llvm-project/commit/8a119310dae2fd67497c8611fc3208d16a36a2c3
Author: Tony Varghese <tonypalampalliyil at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticIDs.h
Log Message:
-----------
[clang][NFC] Bump the maximum number of Frontend diagnostics (#210345)
The number of Frontend diagnostics in DiagnosticFrontendKinds.td is
close to the DIAG_SIZE_FRONTEND limit of 200 (195 in use), and in-flight
PRs adding frontend diagnostics (e.g. #187986) run into the static
assert in DiagnosticIDs.cpp. Increase the limit to 300, following the
precedent of #200948 which did the same for Sema diagnostics.
Co-authored-by: Tony Varghese <tony.varghese at ibm.com>
Commit: a64f7412551ae63a49dd8617f93ab89878288879
https://github.com/llvm/llvm-project/commit/a64f7412551ae63a49dd8617f93ab89878288879
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
Log Message:
-----------
[SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (#209965)
Commit: 9d2e7e6836beadbe63380f64c716df2c086ff2ea
https://github.com/llvm/llvm-project/commit/9d2e7e6836beadbe63380f64c716df2c086ff2ea
Author: Lukas <43409484+hertelukas at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/multiedge.ll
M llvm/test/Transforms/FixIrreducible/nested.ll
M llvm/test/Transforms/FixIrreducible/switch.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/FixIrreducible/unsupported-terminator.ll
M llvm/test/Transforms/UnifyLoopExits/basic.ll
M llvm/test/Transforms/UnifyLoopExits/integer_guards.ll
M llvm/test/Transforms/UnifyLoopExits/multiedge.ll
M llvm/test/Transforms/UnifyLoopExits/nested.ll
M llvm/test/Transforms/UnifyLoopExits/restore-ssa.ll
M llvm/test/Transforms/UnifyLoopExits/switch.ll
M llvm/test/Transforms/UnifyLoopExits/undef-phis.ll
Log Message:
-----------
[FixIrreducible][UnifyLoopExits] Support switch statements (#206567)
This builds on #149308, which implemented `callbr` support.
The same approach of splitting multi-branch edges entering irreducible
loops can be used for switches. It does not introduce any new switch
statements, but alleviates the requirement of having to run the
`LowerSwitch` pass first. This makes the pass usable for users other
than AMDGPU, which can handle switch statements (e.g., WebAssembly, see
[here](https://github.com/llvm/llvm-project/pull/181755#issuecomment-3936316307)).
I'm also implementing a flag into the `ControlFlowHub` to support
switches as well, for which I will open a separate PR. Currently the
`ControlFlowHub` creates a branch-sled, mimicking a `switch` (a series
of blocks consisting only of conditional branches, selectively entering
an irreducible loop at a certain point or continuing to the next
potential entry point). If the target can support switches, that should
be the clear goal here, as shown in the image below. This PR implements
the step from (a) to (b), whereas extending the `ControlFlowHub`
represents the step from (b) to (c). ((c) to (d) already exists through
`SwitchToLookup` and `SwitchToArithmetic`).
<img width="1055" height="432" alt="image"
src="https://github.com/user-attachments/assets/780b7894-1895-4137-8148-b2bbc7f73a8f"
/>
The test cases in `switch.ll` were adapted from the `callbr.ll` tests
using an LLM to ensure equivalent coverage. I've manually reviewed the
control flow and conditions for every case, and the final assertions
were generated using `update_test_checks.py`.
Commit: c34d2c30e86358bfe308558b5e0719e9f5305153
https://github.com/llvm/llvm-project/commit/c34d2c30e86358bfe308558b5e0719e9f5305153
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
Log Message:
-----------
[mlir] Fix mem2reg crash on scalable vector store/load with matching type (#209426)
Fixes #209065
`createInsertAndCast/createExtractAndCast` in `LLVMMemorySlot.cpp`
queried the bit size of the source/target types before checking whether
they were already identical. For scalable vector types (e.g.
`vector<[4]xi1>`), this size query implicitly converts a scalable
TypeSize to a scalar, which aborts. `mem2reg` hits this path for any
store or load whose value type exactly matches the slot's element type,
since `getStored/removeBlockingUses` run even when no cast is needed.
This fix adds an early return when the types are already equal, skipping
the size query, consistent with the existing short-circuit in
`areConversionCompatible/castSameSizedTypes`.
Commit: e2572b883f0b2bc7a7a3808e484039f9382aa898
https://github.com/llvm/llvm-project/commit/e2572b883f0b2bc7a7a3808e484039f9382aa898
Author: Ming-Yi Lai <ming-yi.lai at mediatek.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/test/ELF/riscv-feature-zicfilp-unlabeled.s
Log Message:
-----------
[LLD][RISCV][Zicfilp] Generate unlabeled landing pad-style PLT (#145461)
To support dynamic linking when Zicfilp is enabled, lpad insns are
inserted into PLTs. This patch generates the unlabeled landing pad-style
PLT, in which all the lpads have label `0`, when ZICFILP-unlabeled is
enabled:
--- PLT Header:
```
1: auipc t3, %pcrel_hi(.got.plt)
sub t1, t1, t2
l[w|d] t2, %pcrel_lo(1b)(t3)
addi t1, t1, -(hdr size + 16)
addi t0, t3, %pcrel_lo(1b)
srli t1, t1, log2(16/PTRSIZE)
l[w|d] t0, PTRSIZE(t0)
jr t2
```
--- PLT Entry:
```
lpad 0
1: auipc t2, %pcrel_hi(function at .got.plt)
l[w|d] t2, %pcrel_lo(1b)(t2)
jalr t1, t2
```
(The PLT format is specified in the psABI draft at
<https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/417>)
---------
Co-authored-by: Piyou Chen <piyou.chen at sifive.com>
Co-authored-by: Kito Cheng <npickito at gmail.com>
Commit: 21d537e48677c6c9f3fe679694bba7bcaece90ce
https://github.com/llvm/llvm-project/commit/21d537e48677c6c9f3fe679694bba7bcaece90ce
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
Log Message:
-----------
[LV][Test] Rename conflicting IR values to avoid FileCheck conflicts. nfc (#210293)
Commit: 99789ca18a7982a0b8d63e681d957590f67455c4
https://github.com/llvm/llvm-project/commit/99789ca18a7982a0b8d63e681d957590f67455c4
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/helpers.h
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/iterator/member_types.compile.pass.cpp
Log Message:
-----------
[libc++] Add tests for LWG3798 and mark it as Complete (#210640)
Commit: 9e2e9b33e14808541c0470b92ade34bee6608bf6
https://github.com/llvm/llvm-project/commit/9e2e9b33e14808541c0470b92ade34bee6608bf6
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcDeathTestExecutors.cpp
M libc/test/src/stdlib/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[libc] Port process utilities to hermetic mode and enable some tests (#209999)
This is achieved by calling internal libc functions in hermetic mode. In
the overlay mode I keep calling the system functions so that the tests
work even on systems which don't have these implemented.
I also needed to implement the delete operators as both the libc proper
and the test framework uses them nowadays.
This is sufficient to enable all stdlib tests in hermetic mode, except
for one, which actually exposes a bug in the implementation. I'll deal
with that in a separate patch.
Commit: ba9a115e3ba30699cafe7815d851f89f02f821ea
https://github.com/llvm/llvm-project/commit/ba9a115e3ba30699cafe7815d851f89f02f821ea
Author: Adam Scott <adamscott200322 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/vselect-masked-shift.ll
Log Message:
-----------
[AArch64] Fold vector shifts guarded against oversized amounts into USHL (#207628)
`select(icmp ult(amt, EltSize), shl(x, amt), 0)`, where EltSize is the
{8, 16, 32, 64} lane size, is the usual way to guard a variable vector
shift against shl poison. On AArch64 the guard is unnecessary because
USHL already returns zero once the shift amount reaches the lane size.
For v4i32:
Before:
```
movi v2.4s, #63
movi v3.4s, #32
and v1.16b, v1.16b, v2.16b
ushl v0.4s, v0.4s, v1.4s
cmhi v1.4s, v3.4s, v1.4s
and v0.16b, v1.16b, v0.16b
```
After:
```
movi v2.4s, #63
and v1.16b, v1.16b, v2.16b
ushl v0.4s, v0.4s, v1.4s
```
USHL reads each lane's shift amount as a signed value from its low byte
so amounts above 127 would be misread. The fold applies directly when
known bits can prove the amounts are at most 127 and otherwise the
amounts are clamped to EltSize with umin first, which is still one
instruction cheaper than the select.
NEON has no umin for 64-bit lanes so unbounded v2i64 amounts use the SVE
umin when available and otherwise keep the select.
lshr gets the same fold since it already lowers to ushl with a negated
amount.
This is the AArch64 counterpart of #86922, which added the same folds
for AVX2's variable shifts. This does the select(shift) half; the
shift(select) form will be a follow-up.
Closes #200698.
Commit: 92aded9ac802ed85971627bfa651697f960eefbf
https://github.com/llvm/llvm-project/commit/92aded9ac802ed85971627bfa651697f960eefbf
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
M flang/test/HLFIR/optional_dummy.f90
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/MIF/change_team2.f90
M flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-terminator.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
M flang/test/Lower/OpenMP/loop-compound.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/branching-directive.f90
A flang/test/Lower/do_loop_execute_region_wrap.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/fail_image.f90
A flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/ifconvert.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/while_loop.f90
Log Message:
-----------
[flang][PFT-to-MLIR] Wrap unstructured Fortran constructs in scf.execute_region (#208635)
Extend the PFT-to-MLIR (HLFIR/FIR) lowering so unstructured DO and IF
constructs are emitted inside scf.execute_region, hiding their
multi-block CFG behind a single op. OpenACC lowerings that reject
multi-block content (e.g. the "unstructured do loop in combined acc
construct" TODO in OpenACC.cpp) now see a structured op instead.
The main goal is to prevent propagating the "unstructured" property up
the evaluation tree just because one nested evaluation is unstructured;
which is the current behavior.
Flag: -mmlir --wrap-unstructured-constructs-in-execute-region (default
on).
An evaluation is wrappable iff all of the following hold:
* wrap flag on
* eval is parser::DoConstruct or parser::IfConstruct
* eval.isUnstructured
* branchesAreInternal(eval) -- every controlSuccessor in the subtree
targets a nested eval or the constructExit
* !hasIncomingBranch(eval) -- no outside eval branches into the body
(PFT's synthetic IfConstruct around `if(c) goto X` absorbs label targets
between the IF and X; the incoming-branch check excludes such wrappers
when an outer GOTO names one of those labels)
* does not contain a ReturnStmt -- its lowering creates the function's
final block in the current region, which would mis-parent func.return
* not an infinite DO and does not contain one (no LoopControl in any
nested DO): the wrap's yield is unreachable and the body has no
write-shaped side effects, so RegionDCE treats the wrap as trivially
dead and drops it. Excluding the whole enclosing construct keeps such
infinite loops visible in the parent CFG.
* not the body DO of an enclosing OpenACCLoopConstruct or
OpenACCCombinedConstruct -- nor one of the N collapsed iterator DOs
reached by walking down through `collapse(N)`. Such DOs are driven
directly into acc.loop by the OpenACC lowering, so wrapping them would
hide the iteration from the acc.loop op.
Diagnostics
-----------
Emit per-wrap and per-function diagnostics on stderr so the wrapping is
observable from a single compile invocation:
[wrap-unstructured] wrapped DO at <loc>
[wrap-unstructured] wrapped IF at <loc>
[wrap-unstructured] summary: N execute_region(s) wrapping unstructured
constructs at <loc>
The counter is reset per function and the summary is suppressed when no
wraps fire.
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
---------
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 751fca6c06e4d29b8d2a62c307afce8ba6a0a101
https://github.com/llvm/llvm-project/commit/751fca6c06e4d29b8d2a62c307afce8ba6a0a101
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/test/Driver/freebsd-mips-as.c
M clang/test/Driver/freebsd.c
Log Message:
-----------
[Driver][test] Unwrap freebsd-mips-as.c RUN lines (#210658)
Collapse 3-line RUN blocks to 2 lines and move -### immediately after
%clang, matching the prevailing style for new tests.
Commit: a4ca7f3a670c84196cad4c739114b316fed6d8f1
https://github.com/llvm/llvm-project/commit/a4ca7f3a670c84196cad4c739114b316fed6d8f1
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libc/hdr/CMakeLists.txt
Log Message:
-----------
[libc][cmake] Remove proxy header XXX_macros -> XXX.h deps (#210008)
In the full build mode, these headers do not include the main XXX.h
header, which makes sense, because they exist to allow us only to expose
a part of it. They do include it in the overlay mode, but in this case,
they are referring to the header from the libc being overlaid, which
exists outside of the build system.
Also fix float_macros by moving
libc.include.llvm-libc-macros.float_macros from DEPENDS to
FULL_BUILD_DEPENDS, as llvm-libc-macros/float-macros.h is only included
under LIBC_FULL_BUILD.
Commit: f214ce6b0a9a6af9b1d899895e29cbba68ee2726
https://github.com/llvm/llvm-project/commit/f214ce6b0a9a6af9b1d899895e29cbba68ee2726
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/arpa/inet/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add missing arpa/inet functions and tests (#210310)
Add bazel build targets for the remaining arpa/inet functions
(inet_addr, inet_aton, inet_ntoa, and inet_ntop) along with their unit
tests and supporting targets (__support_net_address, headers, and proxy
types).
Assisted by Gemini.
Commit: 72e0b55f9b1fd69030d7e9853a708bfd2fba36ec
https://github.com/llvm/llvm-project/commit/72e0b55f9b1fd69030d7e9853a708bfd2fba36ec
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ConstraintSystem.h
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/gep-arithmetic-signed-predicates.ll
Log Message:
-----------
[ConstraintSys] Solve sub-system with variables needed for query (#210432)
Update ConstraintSystem to only solve the sub-system containing all
variables relevant to a given query.
The sub-system contains the transitive closure of all variables in rows
involving the variables in the constraint to prove.
The iterative collection loop only needs very few iterations to
complete. The pruned system can significantly speed up Fourier–Motzkin
elimination and reduce the cost of copying the system.
This helps to notably decrease compile-time in cases when there are
larger numbers of variables & rows (especially during (Thin)LTO).
Highlights include
* stage1-ReleaseThinLTO: -0.16%
* stage1-ReleaseLTO-g: -0.19%
* stage1-aarch64-O3: -0.04%
https://llvm-compile-time-tracker.com/compare.php?from=1f2772f8e26beb909c2a559f1fb08697e3e06909&to=77fbe7926609da96a193254e44efd1d6f8a097de&stat=instructions%3Au
Note that we will now stop to simplify conditions in code we proved
dead/unreachable earlier; previously, unrelated constraints in the
system that form contradictions would allow proving any unrelated fact.
After pruning, unrelated facts will no longer contribute.
Commit: 4234ff65326237102157875f6ddf098355864178
https://github.com/llvm/llvm-project/commit/4234ff65326237102157875f6ddf098355864178
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/include/__functional/function.h
Log Message:
-----------
Reapply "[libc++][NFC] Inline std::function members into the class body" (#209555) (#210260)
This caused LLDB to fail, which has been fixed now.
This reverts commit 7618426138aae95561da676a1d1e10ee0392bf78.
Commit: 1ad0e6989597f550e1a5b53abd889366b65aa6c7
https://github.com/llvm/llvm-project/commit/1ad0e6989597f550e1a5b53abd889366b65aa6c7
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Serenity.cpp
M clang/test/Driver/freebsd.c
Log Message:
-----------
[Driver,FreeBSD] Fix -pie for -r and -no-pie links (#210663)
Port Gnu.cpp changes ae623d16d50c and cac82e26c642 to FreeBSD and
Serenity: -r should suppress -pie. -nopie, OpenBSD specific, should not
be used by other OSes.
Group the options selecting the link mode and place them after -m, as
gnutools::Linker does, so that -r suppresses -export-dynamic and
--hash-style as well, and -no-pie overrides the -fsanitize PIE default.
Drop --enable-new-dtags: default in modern linkers.
Change -Bstatic to -static to follow Gnu.cpp (identical in lld and older
GNU ld).
Commit: 37a2803740cc9df3d605431b2410c9d9c0bc5731
https://github.com/llvm/llvm-project/commit/37a2803740cc9df3d605431b2410c9d9c0bc5731
Author: Kamlesh Kumar <kamleshbhalui at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/scalable_masked_interleaved_stores.ll
M llvm/test/CodeGen/AArch64/sve-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-ldst-zext.ll
A llvm/test/CodeGen/AArch64/vector-deinterleave-load.ll
A llvm/test/CodeGen/AArch64/vector-interleave-store.ll
Log Message:
-----------
[AArch64] Add combine for interleave deinterleave (#208414)
These combines now can emit ldN/stN without interleaved access pass.
Commit: 6fb8d5fd507d976cb8072a7aa245c225c25ee08a
https://github.com/llvm/llvm-project/commit/6fb8d5fd507d976cb8072a7aa245c225c25ee08a
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/source/Plugins/TraceExporter/docs/htr.md
Log Message:
-----------
[lldb][docs] Remove image links from trace doc (#210664)
The document was first added in https://reviews.llvm.org/D105741 but
that did not include the images (they were not in the RFC or discussions
either).
Commit: 03b5c5285eaf0acdc1dc30c5be6e0a7cefeab16f
https://github.com/llvm/llvm-project/commit/03b5c5285eaf0acdc1dc30c5be6e0a7cefeab16f
Author: Nathan Gauër <brioche at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/InitializePasses.h
A llvm/include/llvm/Transforms/Scalar/LogicalSROA.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/CMakeLists.txt
A llvm/lib/Transforms/Scalar/LogicalSROA.cpp
A llvm/test/Transforms/LSROA/array.ll
A llvm/test/Transforms/LSROA/basictest.ll
A llvm/test/Transforms/LSROA/escaping.ll
A llvm/test/Transforms/LSROA/nesting.ll
A llvm/test/Transforms/LSROA/normal-gep.ll
A llvm/test/Transforms/LSROA/phi.ll
A llvm/test/Transforms/LSROA/select.ll
Log Message:
-----------
[LSROA] Add logical SROA pass (#192058)
This commit adds a logical-pointer compatible SROA pass. As-is, the pass
does not optimizes nested structs, arrays, or usages of structured
alloca with non-structured GEP instructions.
Adding support for both is not complex, but increase the size of the PR,
hence we can start with this.
Next step will be to allow mem2reg to apply on logical alloca/ptr, and
to add support for nesting/arrays.
---------
Co-authored-by: Nikita Popov <npopov at redhat.com>
Commit: b8300a76659d65fd9738de1c1e4bf5b71e9ef72b
https://github.com/llvm/llvm-project/commit/b8300a76659d65fd9738de1c1e4bf5b71e9ef72b
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN] Remove the "private" `llvm::gvn` namespace (NFC) (#210323)
Move `AvailableValue` and `AvailableValueInBlock` into GVNPass, similar
to other helper types.
Retain `llvm::gvn::GVNLegacyPass` as just `llvm::GVNLegacyPass` -
"legacy" is already a sufficent hint and it is not going to become more
"private" by stacking "gvn" prefixes to the name.
Ideally, `GVNLegacyPass` should be defined in an anonymous namespace,
but that is not possible because it is declared as a friend of GVNPass.
Commit: b9b454166eaa92d2e6e129f6c21ad59639d8364e
https://github.com/llvm/llvm-project/commit/b9b454166eaa92d2e6e129f6c21ad59639d8364e
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (#210522)
The previous implementation only matches
`shuffle(extract_subvector(src), extract_subvector(src), mask)`.
This patch generalizes it to `shuffle(a, b, mask)`, so we can now lower
it to `PNSRL(concat(a,b), element_bits)` if it is a deinterleave
shuffle. And we use `foldConcatVector` to handle the original pattern
with `extract_subvector`.
Commit: 023361f8ef6aa47d10cd839515c58322890367c3
https://github.com/llvm/llvm-project/commit/023361f8ef6aa47d10cd839515c58322890367c3
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
Log Message:
-----------
[lldb][AArch64][Linux][NFC] Move RegisterSetType enum into header (#207145)
I will be using this later to replace all the register specific
functions this class has (WriteSVE/ReadSVE and so on) with single
functions that use RegisterSetType to decide what to do.
While I'm here, I've made some sizeof and casts use RegisterSetType in
case the underlying type changes later.
Commit: 975c8f5a7b25f84a257ddfaf9605c62147a0913d
https://github.com/llvm/llvm-project/commit/975c8f5a7b25f84a257ddfaf9605c62147a0913d
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/ModuleSpec.h
M lldb/source/API/SBAddressRangeList.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointLocationList.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Breakpoint/Watchpoint.cpp
M lldb/source/Breakpoint/WatchpointList.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandler.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/SearchFilter.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormattersHelpers.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/DataFormatters/TypeCategory.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Utility/Event.cpp
M lldb/source/Utility/ProcessInfo.cpp
M lldb/source/Utility/StructuredData.cpp
M lldb/source/ValueObject/ValueObject.cpp
Log Message:
-----------
[lldb][NFC] Remove various Stream::Printf calls with constants (#210294)
`Stream::Printf` needs to call various other (variadic) functions, needs
to parse the input string and potentially handle too-long format
outputs. Calling in with a constant string is wasting a lot of
instruction on doing nothing.
assisted-by: claude
Commit: 1c1c0657f990b92d23067cb7367772f4c91ea32b
https://github.com/llvm/llvm-project/commit/1c1c0657f990b92d23067cb7367772f4c91ea32b
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/lshr.ll
Log Message:
-----------
[ConstraintElim] LSHR x, n <= x when n< bitwidth (#209583)
A logical right shift never increases an unsigned value:
for %r = lshr %x, %n, add the fact %r u<= %x when LSHR is not poison.
This extends the existing udiv/urem fact modeling to lshr.
https://alive2.llvm.org/ce/z/RUTMwe proof shown with constant value <
bit size
Commit: ead8fd8e29fbf3774b7a08bf7b991c2ada30112b
https://github.com/llvm/llvm-project/commit/ead8fd8e29fbf3774b7a08bf7b991c2ada30112b
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/include/__ranges/lazy_split_view.h
Log Message:
-----------
[libc++][ranges][NFC] Format `lazy_split_view` (#210644)
Pre-requisite for: https://github.com/llvm/llvm-project/pull/193891
Commit: eec2f0916d44c33beac52f4396c7a9c98b0c9cf6
https://github.com/llvm/llvm-project/commit/eec2f0916d44c33beac52f4396c7a9c98b0c9cf6
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/include/__configuration/availability.h
Log Message:
-----------
[libc++][NFC] Removed duplicated `_LIBCPP_INTRODUCED_IN_LLVM_23` macros (#210602)
Removed the redundant macros, which apparently were added by two
different patches.
Commit: 39a2c6a695f9d045b05fd5798a7cb99f3c7425a7
https://github.com/llvm/llvm-project/commit/39a2c6a695f9d045b05fd5798a7cb99f3c7425a7
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating.bitint.pass.cpp
Log Message:
-----------
[libc++][test][NFC] Removed unsupported compilers from tests (#210413)
Commit: 9cb6db4e3814fba503389aa0af16960847295fd2
https://github.com/llvm/llvm-project/commit/9cb6db4e3814fba503389aa0af16960847295fd2
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
Revert "[GVN] Remove the "private" `llvm::gvn` namespace (NFC)" (#210666)
Reverts llvm/llvm-project#210323
FAILED: lib/Transforms/Scalar/CMakeFiles/LLVMScalarOpts.dir/GVN.cpp.o
/var/llvm-compile-time-tracker/llvm-project/llvm/lib/Transforms/Scalar/GVN.cpp:4001:27:
error: qualified name does not name a class before ‘:’ token
4001 | class llvm::GVNLegacyPass : public FunctionPass {
Commit: ded79d9ddea47eb3a42da740353c16d21e890354
https://github.com/llvm/llvm-project/commit/ded79d9ddea47eb3a42da740353c16d21e890354
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
A llvm/test/CodeGen/SPIRV/constant/fp128-unsupported.ll
Log Message:
-----------
[SPIR-V] Reject fp128 and ppc_fp128 types with a diagnostic (#208397)
Introduced as a part of discussion in
https://github.com/llvm/llvm-project/pull/208219
Commit: 4caba63c698121203eea9280a392159dc6328e68
https://github.com/llvm/llvm-project/commit/4caba63c698121203eea9280a392159dc6328e68
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/test/API/commands/gui/spawn-threads/TestGuiSpawnThreads.py
Log Message:
-----------
[lldb][test] Double the timeout for TestGuiSpawnThreads.py (#210043)
If the host machine is overloaded, spawning threads may be delayed due
to lack of resources. I'm pretty sure this is the cause of failures in
GitHub CI reported in
https://github.com/llvm/llvm-project/issues/209874.
For what the test is doing, we unfortunately cannot get around needing
to wait on the test program.
We could perhaps come up with a lit mode that runs some tests in serial,
but this is a larger project than I want to get into now.
For now, let's try doubling the timeout. This test is unlikely to fail
for real, so if it's taking a long time, it'll be due to system
resources. In 99% of cases, it'll pass in a few seconds still.
Commit: 35c8e920cdd5b53dccfd669ebd92f3e06f534aae
https://github.com/llvm/llvm-project/commit/35c8e920cdd5b53dccfd669ebd92f3e06f534aae
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Use SIInstrFlags predicates in SIMemoryLegalizer and AMDGPUBaseInfo. (#209821)
Part of a series following the introduction of SIInstrFlags predicates.
Commit: 195df3d4654b43ecf35927e574a8061bfaecbb78
https://github.com/llvm/llvm-project/commit/195df3d4654b43ecf35927e574a8061bfaecbb78
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-private.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
Log Message:
-----------
[mlir][OpenACC] Privatize worker reduction accumulators per worker (#210456)
Example:
```fortran
!$acc parallel
!$acc loop gang reduction(+:sum)
do k = 1, p
!$acc loop worker reduction(+:sum)
do j = 1, n
!$acc loop vector reduction(+:sum)
do i = 1, m
sum = sum + a(i,j,k)
end do
end do
end do
```
In this code, the worker accumulator is both gang- and worker-scoped.
Shared
memory allocated only one copy, so workers raced while updating the same
value.
Fix: allocate one shared-memory accumulator per worker whenever worker
parallelism is present.
Commit: 91ad9f0ce9655eb3715c937f7d64d329bac63817
https://github.com/llvm/llvm-project/commit/91ad9f0ce9655eb3715c937f7d64d329bac63817
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-binop-s64-with-s32-mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin3-fmax3-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-sin-cos-f16-f32.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
Log Message:
-----------
AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (#208750)
Handle bitcast between i16 and f16/bf16.
For true16 this was already legal, make it legal in regbanklegalize as well.
For non-true16 widen it using G_ANYEXT to i32 and G_TRUNC to dst.
The "i32 G_ANYEXT f16/bf16" and "f16/bf16 G_TRUNC i32" are already legal,
for example these are generated by common CallLowering argument lowering.
Commit: 5ec4a236305f18f2d2d8646902ab166655f1b7f1
https://github.com/llvm/llvm-project/commit/5ec4a236305f18f2d2d8646902ab166655f1b7f1
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-derived.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Fix device-variable leaks and reset-safe cleanup (#209865)
Example:
```fortran
program main
use cudafor
integer, allocatable, device :: b(:)
integer :: istat
allocate(b(1024))
b = 2
istat = cudaDeviceReset()
end program
```
Managed descriptors and main-program allocatable data could leak. After
`cudaDeviceReset()`, compiler-generated scope-exit cleanup could also
access
stale descriptors or recreate a CUDA context.
Fix: free device data and descriptors in the correct order, and avoid
unnecessary
managed temporary descriptors. Each routine’s CUDA scope-exit cleanup is
grouped
under one `CUFDeviceIsActive()` check using
`cuDevicePrimaryCtxGetState`.
Routines without CUDA cleanup—and individual runtime frees—incur no
query.
Commit: f6b1a575b4076281cd67cf3f3a626d70363f1b9b
https://github.com/llvm/llvm-project/commit/f6b1a575b4076281cd67cf3f3a626d70363f1b9b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-legalize-range-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc-brc.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.prefetch.data.ll
Log Message:
-----------
AMDGPU/GlobalISel: Switch legalizer intrinsic lowering to extended LLTs (#209200)
Affects various buffer intrinsics.
Commit: 9428725fa09113905847decc48e8b5a731ad0ae6
https://github.com/llvm/llvm-project/commit/9428725fa09113905847decc48e8b5a731ad0ae6
Author: Ryan Thomas Lynch <me at ryanlyn.ch>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir-tblgen] Emit named result indices (#210542)
similar to https://github.com/llvm/llvm-project/pull/146839
useful for cases such as being able to programmatically update the
result segment sizes or clone an operation via `OperationState` while
editing just a few results, programmatically
Commit: 085ecff1ecc69ad022b614cfa4dc020540b6296b
https://github.com/llvm/llvm-project/commit/085ecff1ecc69ad022b614cfa4dc020540b6296b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Assert VPRegionValues are not used in VPTransformState::get(NFC) (#199420)
VPRegionValues must be replaced with concrete VPValues before execute
and never passed to VPTransformState::get. Add assert to guard against
violations.
Commit: 79e05f4aff2e5b9f0513c0539d146e44cc80193c
https://github.com/llvm/llvm-project/commit/79e05f4aff2e5b9f0513c0539d146e44cc80193c
Author: Jacob Crawley <jacob.crawley at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleave-low-vf-cost.ll
Log Message:
-----------
[AArch64][LV] Adjust costs for low-VF interleaved access (#209441)
Addressing regression introduced by #205844 in which a significantly
slower SVE tail loop is generated.
The cost model for the case where the interleave factor is larger than
the VF has been adjusted to more accurately reflect the cost of the uzp
instructions generated by the deinterleave tree, and the cost of
legalizing the type of each subvector.
Commit: d9fff42ccd58cb3d95cff60641011d72d38dc300
https://github.com/llvm/llvm-project/commit/d9fff42ccd58cb3d95cff60641011d72d38dc300
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/test/Fir/FirToSCF/do-loop.fir
M flang/test/Fir/loop01.fir
M flang/test/Integration/ivdep.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_execute_region_wrap.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/ivdep.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
Log Message:
-----------
[flang] Lower plain DO loops without a secondary-induction iter_arg (#207816)
Example:
```fortran
do i = lb, ub, step
...
end do
```
Flang lowers this with the DO variable as a redundant `iter_arg`, which
hides memory recurrences from later analyses. Simply removing it would
require converting the `index` IV to the source integer type each
iteration, potentially blocking vectorization.
Fix: allow `fir.do_loop` to use the DO variable’s integer type directly.
Trip-count and post-loop calculations remain in `index`. This removes
the redundant `iter_arg` without introducing per-iteration conversions.
`do concurrent` and unstructured loops are unaffected.
Commit: 334708eb100204edc677a546bfa77ef10df71ec9
https://github.com/llvm/llvm-project/commit/334708eb100204edc677a546bfa77ef10df71ec9
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
Log Message:
-----------
[gn build] Port 03b5c5285eaf (#210688)
Commit: 41d76f2763a53517f273c87a1a703f00cb965f09
https://github.com/llvm/llvm-project/commit/41d76f2763a53517f273c87a1a703f00cb965f09
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctls.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaximum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx7.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx8-plus.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix G_UNMERGE_VALUES lowering for extended LLTs (#209201)
Use integer type for bit twiddling instead of scalar.
Commit: b21fb937f165898c727030760f0a8ab685ef08eb
https://github.com/llvm/llvm-project/commit/b21fb937f165898c727030760f0a8ab685ef08eb
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
A clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
R clang/lib/StaticAnalyzer/Checkers/ReportDanglingPtrDeref.cpp
Log Message:
-----------
[analyzer][NFC] Correct the DanglingPtrDeref checker's filename (#209862)
The alpha `DanglingPtrDeref` checker got implemented in #209278. Since
it is under heavy development and subject to change significantly in the
near future it is in alpha stage. During the development of the
`DanglingPtrDeref` checker its name got changed from
`ReportDanglingPtrDeref` to `DanglingPtrDeref` based on the conversation
here:
https://github.com/llvm/llvm-project/pull/209278#discussion_r3578604913
While the checker's registration got updated in `Checkers.td` the same
change did not get applied to the `
clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt` and the checker's
filename. This PR addresses this issue.
Commit: 2ec66d76fde71265be83c216d0be3d16bb131fc7
https://github.com/llvm/llvm-project/commit/2ec66d76fde71265be83c216d0be3d16bb131fc7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Fix wrapper-call managed-code token lifetime (#210686)
d199b284c7d established that ManagedCodeTaskGroup tokens must bracket a
single span of execution on a stack, not a chain of asynchronous
operations (see orc-rt/docs/Design.md's "Managed code execution and
shutdown" section). Session::handleWrapperCall and sendWrapperResult
predated that policy and didn't conform to it: the token was acquired in
handleWrapperCall but only released in sendWrapperResult, holding it for
the whole call/response chain. If Fn deferred sending its result
asynchronously, Session shutdown would incorrectly wait on that deferred
completion instead of proceeding as soon as Fn's stack unwound.
Acquire the token as a TaskGroup::Token scoped to the dispatched call,
and let it release when Fn returns rather than when its result is sent.
Commit: d90634dc185da79a8eb6a993c28614f4788e368e
https://github.com/llvm/llvm-project/commit/d90634dc185da79a8eb6a993c28614f4788e368e
Author: 311Volt <41923095+311Volt at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M offload/liboffload/API/Memory.td
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
M offload/unittests/OffloadAPI/memory/olMemFill.cpp
Log Message:
-----------
[offload] support arbitrary memoryFill pattern sizes in L0 plugin (#209724)
Even though L0, CUDA and HSA do not directly support filling memory
regions with non-power-of-two-sized patterns, plugins explicitly allow
for such fills by falling back to a slow path whenever a direct API call
is not possible.
The Level Zero plugin is the odd one out, forwarding directly to
`zeCommandListAppendMemoryFill`. This fails for non-power-of-two
patterns, causing unit tests for `olMemFill` to fail when run on L0.
This PR adds fallbacks in L0 plugin's `memoryFill` implementation to
support arbitrary pattern sizes:
- if all pattern bytes are the same, substitute `1` for `patternSize`
and proceed with the native fill
- if memory is host-accessible (host or shared alloc), then simply
`std::copy_n` the pattern
- if memory is device-only, upload a seed to the device, and
`memoryCopy` O(log n) times, doubling the pattern each time, until the
entire region is filled. The seed is the input pattern, but extended on
the host to 1-2KiB to potentially eliminate several small `memoryCopy`
calls that would otherwise be almost pure overhead.
Conceptually, this approach has better worst-case overhead than the one
found in the CUDA plugin (decompose the pattern to then run multiple
strided memsets) and the AMDGPU one (call `pushMemoryCopyH2DAsync` with
the pattern, setting `NumTimes`). Aligning the fallback fill approaches
is outside the scope of this PR, however - the main intent is to fix the
unit test failures.
Commit: a8ffce42477c909908d6f45511a48fd01a24837d
https://github.com/llvm/llvm-project/commit/a8ffce42477c909908d6f45511a48fd01a24837d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
Log Message:
-----------
[Clang] Fix evaluation of fold expanded constraints for NTTP (#210005)
This is a rework of #200185 and also reflects what we did for TTP in
C++26 fold expression constraints (adc64c6e1745)
Fixes https://github.com/llvm/llvm-project/issues/199569
Commit: 14f6b9f0a3976f85d3ef509c8361991ae3702002
https://github.com/llvm/llvm-project/commit/14f6b9f0a3976f85d3ef509c8361991ae3702002
Author: Deepak Shirke <deepakshirke509 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/AArch64/bitreverse-v8i8-to-gpr.ll
Log Message:
-----------
[VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (#209037)
Add reverse direction to `foldBitOrderReverseAndSwap`:
`bitcast(bitreverse(<N x i8>)(bitcast(IntTy X)))` -->
`bitreverse(bswap(X))`
This avoids GPR<=>vector register crossings when integer ops are
cheaper. On AArch64 for example:
Before:
```asm
fmov d0, x0 ; GPR → vector crossing
rbit v0.8b, v0.8b
fmov x0, d0 ; vector → GPR crossing
```
After:
```asm
rev x8, x0 ; stays in integer registers
rbit x0, x8
```
The fold is cost-model driven and only fires when the integer version is
cheaper, so targets like X86+GFNI that prefer the vector form (single
`vgf2p8affineqb` instruction) are unaffected.
A new call site for `BitCast` instructions is added alongside the
existing `Call` instruction call site in the dispatch loop.
Fixes #201760
Commit: 06e3180cd141d9a8efdb9e9867b4a32300679038
https://github.com/llvm/llvm-project/commit/06e3180cd141d9a8efdb9e9867b4a32300679038
Author: Barbara Mitic <Barbara.Mitic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
[AMDGPU] Accept extractelement of a widening cast when folding image ops to a16 (#208207)
canSafelyConvertTo16Bit() recognizes a scalar coordinate that is a
direct sext/zext/fpext from a 16-bit value (sext gated on AllowI16SExt).
Per-dimension coordinates can instead arrive as an extractelement of a
widening vector cast (extractelement((s|z|fp)ext <N x i16/half> Vec),
Idx). When the cast has more than one use, the extractelement(cast) ->
cast(extractelement) canonicalization does not fire, so the cast is left
in place and the coordinate is not recognized.
Strip a leading extractelement before the cast check so the same logic
handles scalar and per-lane coordinates, and mirror this in
convertTo16Bit() by re-extracting from the narrow vector, allowing the
widening cast to be removed once it has no other uses.
Commit: bd38dd0ace19c3b9512da2b37bb9690ee6c9e97f
https://github.com/llvm/llvm-project/commit/bd38dd0ace19c3b9512da2b37bb9690ee6c9e97f
Author: AntonyCJ30 <cj6186609 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/CodeGen/X86/avx512-vpternlog-commute.ll
Log Message:
-----------
[X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (#209782)
Fixes #157929
VPTERNLOG231_imm8 and VPTERNLOG312_imm8 had their bodies swapped,
causing ISel to emit the wrong truth-table immediate whenever operand
reordering was needed (-O1+, not -O0).
Test changes:
- **avx512-vpternlog-commute.ll: regenerated with
update_llc_test_checks.py**
(accounts for the large diff)
- Added 4 new cases: vpternlog231_rmik, vpternlog312_rmik,
vpternlog231_rmbik, vpternlog312_rmbik
Tested: llvm-lit on llvm/test/CodeGen/X86 (no regressions), original
repro verified correct at -O0 through -O3, -Os, -Oz.
Commit: 60f8b4624badab6bec5e2600d82cf98b6a4e303b
https://github.com/llvm/llvm-project/commit/60f8b4624badab6bec5e2600d82cf98b6a4e303b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-cse-leaves-dead-cast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx8-plus.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix G_MERGE_VALUES lowering for extended LLTs (#209202)
Use integer type for bit twiddling instead of scalar.
Commit: 648aec12e5e5242c93aa73a21714553c6341ddc3
https://github.com/llvm/llvm-project/commit/648aec12e5e5242c93aa73a21714553c6341ddc3
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
Log Message:
-----------
[AArch64] NFC: Factor out code from FP_TO_INT (SVE). (#207200)
This just moves out some of the SVE lowering code from
LowerVectorFP_TO_INT into a separate function, so that we can reuse that
in LowerVectorFP_TO_INT_SAT.
Commit: 25b75a1e41c5fe71ed1f832c36c8bfb1bca1ab35
https://github.com/llvm/llvm-project/commit/25b75a1e41c5fe71ed1f832c36c8bfb1bca1ab35
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
Log Message:
-----------
AMDGPU/GlobalISel: Stop using changeTo in legalizer actions (#209203)
Use changeElementSizeTo or changeElementCountTo to preserve extended LLT.
Commit: 8abc26930cf9ee0f059228acdbd1d22cd1c325e3
https://github.com/llvm/llvm-project/commit/8abc26930cf9ee0f059228acdbd1d22cd1c325e3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr209714.ll
Log Message:
-----------
[X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (#210281)
VectorCombine may have folded:
icmp_eq(vecreduce_or(splatsign(x)),0) --> icmp_sgt(vecreduce_umax(x),-1)
which DAG folds to:
srl(vecreduce_umax(x),bw-1).
This match attempts to lower:
srl(vecreduce_umax(x),bw-1) --> icmp_ne(movmsk(x),0) "any_of negative"
srl(not(vecreduce_umax(x)),bw-1) --> icmp_eq(movmsk(x),0) "none_of negative"
The correct fix would be to improve vecreduce_or costs to prevent
VectorCombine doing this, but that change is far too big to be merged
into 23.x - so I've created the narrow backend fix.
Fixes #209714
Commit: d9c88062ecf9dc8ece4bb1482b0f1789979e3da5
https://github.com/llvm/llvm-project/commit/d9c88062ecf9dc8ece4bb1482b0f1789979e3da5
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/test/Analysis/logical-ops.c
A clang/test/Analysis/z3/z3-bitint-arithmetic.c
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
M llvm/lib/Support/Z3Solver.cpp
Log Message:
-----------
[analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (#210525)
Forces symbolic cast to be enabled for z3 symbolic execution, and
switches away from Ctx.getTypeSize for getting the bit width of integral
types.
The current patch might be a bit problematic for z3 cross-check, as this
relies on symbolic integer cast to be always on. I am not sure if
turning on ShouldSupportSymbolicIntegerCasts would cause issues for the
supported range-based solver, so I only kept it turned on when
AnalysisConstraintsOpt == Z3ConstraintsModel.
Assisted-by: Codex
Commit: 27fe16dcf920c92bcb7050e5abf4164ed3b496d1
https://github.com/llvm/llvm-project/commit/27fe16dcf920c92bcb7050e5abf4164ed3b496d1
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
A llvm/test/Instrumentation/AddressSanitizer/darwin-mte-tag-stripping.ll
Log Message:
-----------
[Darwin][ASan] Strip MTE-tags for inlined shadow translations (#204827)
https://github.com/llvm/llvm-project/pull/166453 stripped these tags
when the runtime performed the mem-to-shadow translation, but did not
account for ASan's inline translations. When an MTE-tagged address gets
translated, the tag bits are right-shifted too, resulting in a very high
address that faults when accessed.
This patch strips the MTE-tag bits before applying the translation on
Apple platforms.
rdar://180032780
Commit: 1caf9e1ef68ef85f1976e82bfc33befe1edc6eff
https://github.com/llvm/llvm-project/commit/1caf9e1ef68ef85f1976e82bfc33befe1edc6eff
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-mmt4d.mlir
Log Message:
-----------
[mlir][ArmSVE] Fix comment inconsistency for `pack_lhs` in `ArmSVE/pack-unpack-mmt4d.mlir` (NFC) (#210502)
This PR simply fix a comment inconsistency for `pack_lhs` in
[ArmSVE/pack-unpack-mmt4d.mlir](https://github.com/llvm/llvm-project/compare/main...FedericoBruzzone:nfc-armsve?expand=1#diff-7be071860c440806b8dad954ed61946e7e9f27e032ed6044a704f0c0f70e4407)
as identified in #208226.
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: c30b1fa7a08e36346f80b1798ae587bc1d5e032b
https://github.com/llvm/llvm-project/commit/c30b1fa7a08e36346f80b1798ae587bc1d5e032b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port b21fb937f165 (#210698)
Commit: 2cdd343022d4c5848281f4bb3670213f535884a2
https://github.com/llvm/llvm-project/commit/2cdd343022d4c5848281f4bb3670213f535884a2
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix legalizer lowering for G_EXTRACT/INSERT_VECTOR_ELT (#210094)
Use LLT::integer in bit twiddling lowering for extract/insert vector element.
Commit: ca276b4822b1c748aaf9ef631d887143cb03a217
https://github.com/llvm/llvm-project/commit/ca276b4822b1c748aaf9ef631d887143cb03a217
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
A llvm/test/Transforms/ExpandMemCmp/RISCV/lit.local.cfg
A llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
Log Message:
-----------
[ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (#209738)
`RISCVTTIImpl::enableMemCmpExpansion` previously disabled `memcmp`/`bcmp`
expansion whenever the target lacks unaligned scalar memory access. This is
too conservative: when both pointers are statically known to be
sufficiently aligned (e.g. `bcmp(ptr align 8, ptr align 8, 32)`), only
naturally aligned loads are needed, which are fine on strict-align
targets.
`ExpandMemCmp` now keeps a candidate load size only if, given the known
common alignment of the two pointers, the access is naturally aligned or
the target reports it via `allowsMisalignedMemoryAccesses`; otherwise it
falls back to the libcall. The query tests whether the access is
*allowed* (not *fast*), so it is a no-op for targets that already allow
unaligned access (X86, AArch64, ...).
The known alignment now also folds in the `align` attributes on the call
arguments (`CallBase::getParamAlign`), not just the pointer value.
RISCV drops the early return and only offers overlapping loads / tail
expansions when unaligned scalar access is supported.
Fixes #209511.
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
Commit: 0000fd1fc63dcc7f0fe87091fe2e5a0daf5ec727
https://github.com/llvm/llvm-project/commit/0000fd1fc63dcc7f0fe87091fe2e5a0daf5ec727
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A llvm/test/Transforms/VectorCombine/AArch64/load-widening.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
Log Message:
-----------
[VectorCombine] load-widening.ll - add test coverage for all 4 x86-64 cpu levels and aarch64 endian test coverage (#210690)
Removed x86 endianess tests which makes no sense (and are likely to misbehave) and add equivalent test coverage to aarch64
Noticed while reviewing #209775
Commit: ac41c58f7b3b26a4bd4260d05afd7c3b2ccc3c72
https://github.com/llvm/llvm-project/commit/ac41c58f7b3b26a4bd4260d05afd7c3b2ccc3c72
Author: BohdanYehorov <yehorovbohdan.work at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/docs/InternalsManual.rst
Log Message:
-----------
[clang][docs] Fix include path in InternalsManual (#209458)
The paths `include/Basic/StmtNodes.td` and `include/AST/Expr*.h` in the
Clang Internals Manual are incorrect.
Commit: a35bcaef8c1a0867af4c3b547422b4783c88fc96
https://github.com/llvm/llvm-project/commit/a35bcaef8c1a0867af4c3b547422b4783c88fc96
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-store-s16-true16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
Log Message:
-----------
AMDGPU/GlobalISel: Explicitly widen scalar to i32 for load and store (#210095)
Affects f16 and bf16. Earlier, they were widened to f32 and s32 respectively.
The actual error was the artifact combiner creating a copy between f32/i32
which fails in the machine verifier. Maybe we could create a bitcast there.
However i32 is more efficient for us and matches well with how argument
lowering keeps f16 and bf16 in i32 copies to/from physical registers.
Also starting from f16 store, G_STORE %0(f16), %1(p1) :: (store (f16),
and doing widen scalar to 32 bit type, i32 makes more sense since store
will store 16 least significant bits G_STORE %0(i32), %1(p1) :: (store (f16)
compared to G_STORE %0(f32), %1(p1) :: (store (f16), which looks incorrect if
we assume input was really in f32 format.
Commit: 16e213f7dd3b8a2ec93b3015268efb8f59c9b52d
https://github.com/llvm/llvm-project/commit/16e213f7dd3b8a2ec93b3015268efb8f59c9b52d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.shuffle.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Fix wrong half selection in wave.shuffle lowering (#210661)
selectWaveShuffleIntrin XORed ThreadID with the shifted index instead of
the original index, picking the wrong lane half on wave64 targets
without wave wide bpermute (GFX10/GFX11)
Commit: 75ee393652ca86f5d9b3670be5fa04d2bd8bb95a
https://github.com/llvm/llvm-project/commit/75ee393652ca86f5d9b3670be5fa04d2bd8bb95a
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering (#210096)
We could get away with just the type from MMO in most cases, but MMO splitting
creates MMO with LLT::scalar and we prefer integer.
Commit: 112aac39131f7fdc8b4a50cb3fb13ef293e1c620
https://github.com/llvm/llvm-project/commit/112aac39131f7fdc8b4a50cb3fb13ef293e1c620
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix extending load narrow scalar (#210097)
isAnyScalar is explicit LLT::scalar check but we want to narrow scalar
integer types as well.
Commit: 88a19bdee051ef4ce15fc4e29f50a328b80b0166
https://github.com/llvm/llvm-project/commit/88a19bdee051ef4ce15fc4e29f50a328b80b0166
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use integers for read-any-lane split type (#210098)
Commit: 92873559f90a35f89ebc5ac94a6d7e4c3a419ecb
https://github.com/llvm/llvm-project/commit/92873559f90a35f89ebc5ac94a6d7e4c3a419ecb
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/simulator/hello.cpp
M lldb/test/API/tools/lldb-server/apple-simulator/TestAppleSimulatorOSType.py
Log Message:
-----------
[lldb][test] Bump safety timeout in simulator tests to fix flakyness (#209180)
On really slow machines, the current 10 second timeout can expire and
cause the test to randomly fail. Bump the timeout to 10 minutes which 60
times the current value and should be unreachable even on the slowest of
machines.
To avoid making the tests run for 10 minutes, we now consistently kill
the test process on shutdown using the subprocess list in lldbtest which
gets killed on tearDown.
Commit: 1e18a0f4d758ff796acbb3987c2d01c02bb223a1
https://github.com/llvm/llvm-project/commit/1e18a0f4d758ff796acbb3987c2d01c02bb223a1
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/callslot.ll
Log Message:
-----------
[MemCpyOpt] Precommit tests for PR210667 (NFC) (#210708)
Commit: 92539cf3a83e22dd589fa97d223da06339dc304a
https://github.com/llvm/llvm-project/commit/92539cf3a83e22dd589fa97d223da06339dc304a
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/callslot.ll
Log Message:
-----------
[MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (#210667)
A destination alloca's alignment could have been unconditionally
overwritten, letting a lower-aligned source incorrectly undo a
previous alignment increase. This issue has been addressed by
considering the maximum alignment between the new source target
and current destination, adhering to what the existing comment
already promises.
Fixes: https://github.com/llvm/llvm-project/issues/208092.
Commit: 4f939577de61ffdf85087499b99aa3686ed362cd
https://github.com/llvm/llvm-project/commit/4f939577de61ffdf85087499b99aa3686ed362cd
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
Log Message:
-----------
GlobalISel: Use extended LLTs in f64 to f16 fptrunc lowering (#210099)
Commit: e3016ce1a9a14c690c90a343849d45837d9d95d7
https://github.com/llvm/llvm-project/commit/e3016ce1a9a14c690c90a343849d45837d9d95d7
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
Log Message:
-----------
GlobalISel: Use extended LLTs in extract lowering (#210100)
Commit: e8969304fe0ca32088120702267772a622f5f746
https://github.com/llvm/llvm-project/commit/e8969304fe0ca32088120702267772a622f5f746
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use integers for clamp i64 to i16 prelegalizer combine (#210101)
Commit: 066fba24b425211e80deb4486ba56ddf70472c37
https://github.com/llvm/llvm-project/commit/066fba24b425211e80deb4486ba56ddf70472c37
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use extended LLTs in AMDGPUCombinerHelper (#210102)
Here we also had to change comparisons to extended LLTs to avoid
matching bfloats. In the old scalar version, before the switch to extended
LLTs, s16 was treated as f16 and bf16 was combined as if it were f16.
Commit: 499fd10534993eec4aefc8f06026fc4876bbd371
https://github.com/llvm/llvm-project/commit/499fd10534993eec4aefc8f06026fc4876bbd371
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Run macOS CI on self-hosted runners instead of Github ones (#210124)
This should increase our capacity and allow better turn around times,
and potentially unblock additional test coverage.
Note that this change implies that the self-hosted runners provide a
version of Xcode that is supported by libc++ (the latest released one),
which is currently the case.
Commit: 03b780679bdb5152aef0182dfc8b2f1d182a94e0
https://github.com/llvm/llvm-project/commit/03b780679bdb5152aef0182dfc8b2f1d182a94e0
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/allocation_size.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/max_size.pass.cpp
Log Message:
-----------
[libc++][test] Fix build failure from typo in #171785 (#210552)
If `__STDCPP_DEFAULT_NEW_ALIGNMENT__` is not defined, these tests will
fail to build due to a typo that was added in #171785.
Commit: 8888665966f14abfac4f2c352846abfc1212d8e5
https://github.com/llvm/llvm-project/commit/8888665966f14abfac4f2c352846abfc1212d8e5
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix type mismatch in regbank combiner for applyD16Load (#210103)
Commit: 743813d10023a0616833062f5d448284022b8063
https://github.com/llvm/llvm-project/commit/743813d10023a0616833062f5d448284022b8063
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
Log Message:
-----------
GlobalISel: Use extended LLTs in lshr narrow combine (#210298)
Commit: a8617034c4a7cc733676a31b736d3118fec34259
https://github.com/llvm/llvm-project/commit/a8617034c4a7cc733676a31b736d3118fec34259
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A libcxx/test/selftest/if-else.sh.cpp
M libcxx/utils/libcxx/test/format.py
Log Message:
-----------
[libc++][utils] Fix LIT `%if` substitution support (#209358)
Update the applySubstitutions call in `libcxx/utils/libcxx/test/format.py` to match the
change to `llvm/utils/lit/lit/TestRunner.py` done in 1041a9642ba0.
Commit: 3fc6711ccaf60c15371402c3ee7776fde5f01b4f
https://github.com/llvm/llvm-project/commit/3fc6711ccaf60c15371402c3ee7776fde5f01b4f
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
M llvm/test/CodeGen/PowerPC/aix-crspill.ll
M llvm/test/CodeGen/PowerPC/aix32-crsave.mir
M llvm/test/CodeGen/PowerPC/cc.ll
M llvm/test/CodeGen/PowerPC/crsave.ll
M llvm/test/CodeGen/PowerPC/p10-spill-creq.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/PowerPC/ppc64-crsave.mir
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
Log Message:
-----------
[PowerPC]optimize the epilogue for restore non volatile cr fields (#202339)
For AIX and ELFv2 ABI,
1. When we only spill one non-volatile CR field , using one
mfocrf/mtocrf instruction.
2. when spill two or more non-volatile CR fields, using one mfcr/mtcr
instead of multi mfocrf/mtocrf instructions
Commit: faf7261308da236627ae8f813d17d6e1ef1e9d68
https://github.com/llvm/llvm-project/commit/faf7261308da236627ae8f813d17d6e1ef1e9d68
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libcxx/test/std/algorithms/alg.nonmodifying/alg.all_of/all_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.any_of/any_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.none_of/none_of.pass.cpp
Log Message:
-----------
[libc++] Bring std::{any,all,none}_of tests up to current standards (#209266)
The tests for these algorithms were minimal, didn't test all iterator
categories, and the constexpr coverage didn't follow our current
practice. This patch brings all three tests (which are very similar) up
to our current standards.
Assisted by Claude
Commit: 44e37579d19c7d0965166808c77f9e7ebf407df9
https://github.com/llvm/llvm-project/commit/44e37579d19c7d0965166808c77f9e7ebf407df9
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/if_construct_execute_region_wrap.f90
Log Message:
-----------
[flang][PFT-to-MLIR] reset Evaluation blocks between entry-point passes (#210681)
A subprogram with an alternate ENTRY is lowered by walking the shared
PFT once per entry. Evaluation::block is populated during each walk
(top-level createEmptyBlocks and inside wrapUnstructuredConstruct's own
createEmptyBlocks), but the second pass previously inherited stale
pointers into the first entry's function/wrap regions. For a wrappable
IfConstruct nested inside a structured container, the entry block that
genFIR(IfConstruct) starts before creating its scf.execute_region then
sent the builder into the previous entry's region, and the wrap plus its
inner load ended up in the wrong func:
subroutine foo(a)
integer a
entry bar(a)
if (a .eq. 1) then
if (a .ne. 3) stop
end if
end subroutine
produced both scf.execute_region ops in _QPfoo, with an inner fir.load
referencing bar's %arg0 — 'fir.load' op using value defined outside the
region.
Fix: null every Evaluation::block in the shared PFT at the start of each
entry-point pass, so createEmptyBlocks fills a clean tree and later
reads (in particular the landing-pad reposition in genFIR(IfConstruct))
never see a pointer from a prior pass.
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 2a33792a2ec1a980259bd9388834e3c1fa53af3d
https://github.com/llvm/llvm-project/commit/2a33792a2ec1a980259bd9388834e3c1fa53af3d
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/ExpressionTraits.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/TokenKinds.def
A clang/include/clang/Basic/Traits.td
R clang/include/clang/Basic/TransformTypeTraits.def
M clang/include/clang/Basic/TypeTraits.h
M clang/include/clang/Sema/DeclSpec.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/Basic/ExpressionTraits.cpp
M clang/lib/Basic/TypeTraits.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangTraitsEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[clang][NFC] move traits to tablegen (#201491)
This patch moves all traits to a tablegen file.
The motivation for this change is a review comment in
https://github.com/llvm/llvm-project/pull/142341 - since then about a
year has passed and we've accumulated 9 standard names that are
maintained separately from their corresponding trait definitions. For
transform type traits we keep the standard names around as well. While
this is still a reasonably low number, it is definitely going to keep
increasing.
Commit: 0549fbe55ba4f9fc172591a61b04700d4ff5045e
https://github.com/llvm/llvm-project/commit/0549fbe55ba4f9fc172591a61b04700d4ff5045e
Author: Daemon <daemonpilot at hotmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-maxdepth.mir
Log Message:
-----------
[GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (#207013)
This patch aligns the New Pass Manager (NPM) implementation of
`GISelValueTrackingAnalysis::run()` with the Legacy pass manager by
dynamically adjusting the maximum search depth based on the optimization
level. This eliminates behavioral discrepancies between the two code
paths, reducing migration risks and ensuring consistent compilation
performance and code generation quality across both code paths.
Commit: 97a105f8e681e8e9e5778b6f8bf95a8c365a05f6
https://github.com/llvm/llvm-project/commit/97a105f8e681e8e9e5778b6f8bf95a8c365a05f6
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-directive-sets.h
A flang/test/Semantics/OpenMP/teams_loop.f90
Log Message:
-----------
[Flang][OpenMP] Allow `parallel loop` inside of `teams` (#210679)
A missing `parallel_loop` directive in the `nestedTeamsAllowedSet`
currently causes code like the following to report a semantics issue:
```f90
!$omp teams
!$omp parallel loop
do i=1, 10
end do
!$omp end teams
```
This patch makes sure to accept it, since `parallel` is an allowed
construct to be immediately nested inside of `teams`, even when combined
with another construct.
Commit: e16e6077cbc2b0ab6335dd4dc67e3a6318b1ad3a
https://github.com/llvm/llvm-project/commit/e16e6077cbc2b0ab6335dd4dc67e3a6318b1ad3a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Use m_scev_AffineAddRec in get{Zero,Sign}ExtendExprImpl (NFC) (#210082)
It's a small win in number of lines, and reduces the nesting level a
bit.
Suggested in https://github.com/llvm/llvm-project/pull/208805
PR: https://github.com/llvm/llvm-project/pull/210082
Commit: 35aa7b529ebeafc9767a4c5398047a92b86bd4a8
https://github.com/llvm/llvm-project/commit/35aa7b529ebeafc9767a4c5398047a92b86bd4a8
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaCXX/attr-no-specializations.cpp
Log Message:
-----------
Ensure that we properly propagate template decl attributes to redecls (#209873)
Variable and class templates weren't forwarding their declaration
attributes that were attached directly to them (at the moment, the only
one I could find that had this issue is the no_specialization attr). The
result was that intermediate redeclarations would prevent the
diagnostics from happening.
This patch ensures we propagate them properly for variable and class
templates. It seems our function templates already do the right thing.
Fixes: #209812
Commit: b16c5f7cc88c9f41d904cc73d5618cc7453ac862
https://github.com/llvm/llvm-project/commit/b16c5f7cc88c9f41d904cc73d5618cc7453ac862
Author: yinghao <73093416+andreww0210 at users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
A llvm/test/CodeGen/NVPTX/proxy-reg-erasure-kill-flag.mir
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
Log Message:
-----------
[NVPTX] Clear unsafe kill flags in NVPTXProxyRegErasure (#198143)
Fixes #198142
After replacing regsiter, stale `killed` flags my leave on non-terminal
uses, breaking liveness and triggering MachineVerifier errors.
Fix this by conservatively dropping the `killed` flag on `ToReg`.
Commit: bb5c8d5bea4817a2447d9acfdb7ef11c4323ddac
https://github.com/llvm/llvm-project/commit/bb5c8d5bea4817a2447d9acfdb7ef11c4323ddac
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[LangRef] Add immarg attributes to memcpy, memset, memmove isvolatile args (#210669)
Commit: 1ed1ca59245bfa949919f31cef5fd5c87c20c6ec
https://github.com/llvm/llvm-project/commit/1ed1ca59245bfa949919f31cef5fd5c87c20c6ec
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
Re-commit: [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (#210712)
Re-commit of https://github.com/llvm/llvm-project/pull/210323 after
adding
a forward declaration for GVNLegacyPass class to work around GCC
compilation
failure.
Move `AvailableValue` and `AvailableValueInBlock` into GVNPass, similar
to other helper types.
Retain `llvm::gvn::GVNLegacyPass` as just `llvm::GVNLegacyPass` -
"legacy" is already a sufficent hint and it is not going to become more
"private" by stacking "gvn" prefixes to the name.
Ideally, `GVNLegacyPass` should be defined in an anonymous namespace,
but
that is not possible because it is declared as a friend of GVNPass.
Commit: 6998fd59e16026a00fee8e83243c0ec91047fee3
https://github.com/llvm/llvm-project/commit/6998fd59e16026a00fee8e83243c0ec91047fee3
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
A llvm/test/Transforms/Inline/AMDGPU/inline-max-bb-debug.ll
Log Message:
-----------
[AMDGPU] Print max-BB inline rejections
Commit: 6f744fb04cf1cf30b45ff73883566eeebb7eeb7d
https://github.com/llvm/llvm-project/commit/6f744fb04cf1cf30b45ff73883566eeebb7eeb7d
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 2a33792 (#210726)
This fixes 2a33792a2ec1a980259bd9388834e3c1fa53af3d.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=2a33792a2ec1a980259bd9388834e3c1fa53af3d
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4c5b4f40c4ac77f1b50a90451fd040356748ac6a
https://github.com/llvm/llvm-project/commit/4c5b4f40c4ac77f1b50a90451fd040356748ac6a
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/lit.cfg.py
M libsycl/test/usm/alloc_functions.cpp
Log Message:
-----------
[libsycl][E2E] Compile all E2E tests with -fsycl (#204115)
Commit: 2549a2c39b4b86b035df052948bd3f867728b075
https://github.com/llvm/llvm-project/commit/2549a2c39b4b86b035df052948bd3f867728b075
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libsycl/CMakeLists.txt
Log Message:
-----------
[libsycl][NFC] Move the cmake msvc DLL check (#193485)
Addresses a review comment from
https://github.com/llvm/llvm-project/pull/188770
Commit: 7bbed7999de1a60c790a3b0f01d965c18fd832e8
https://github.com/llvm/llvm-project/commit/7bbed7999de1a60c790a3b0f01d965c18fd832e8
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/array-coor-canonicalization.fir
A flang/test/Fir/box-dims-folding.fir
M flang/test/Fir/boxaddr-folding.fir
Log Message:
-----------
[flang] Fold reads of fir.create_box components (#210388)
Fold fir.box_addr and constant-dimension fir.box_dims of a descriptor
built by fir.create_box back to the operands that built it, so the
create_box can die when nothing consumes it as a real descriptor.
fir.array_coor is intentionally not folded through create_box, since
that would drop its explicit byte strides.
Assisted-by: Cursor
Commit: b2d3db9bfb01ceb821b38dfc57f7965b09f602cf
https://github.com/llvm/llvm-project/commit/b2d3db9bfb01ceb821b38dfc57f7965b09f602cf
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/Delinearization/multidim_pointer_addrspace.ll
Log Message:
-----------
[SCEV] Derive element size from the access's own pointer address space (#209824)
ScalarEvolution::getElementSize always derived the element-size SCEV
using a generic address-space-0 pointer index type. On targets whose
data layout uses different pointer index widths per address space (for
example, where some address spaces use 32-bit pointers and others
64-bit), a load/store through a narrow address space produced an access
function SCEV of one width but an element-size SCEV of another.
Delinearization then called SCEVDivision::divide with numerator and
denominator of mismatched types, tripping the assertion added in
a9d295d615a8 once the implicit sign-extension was removed in
23a32bcedb91.
Derive the index type from the memory access's actual pointer operand
address space so the element-size SCEV matches the width of the access
function's SCEV.
Commit: 9c024f3a83cf2469b27ae42c1a8d3ab635da3dc1
https://github.com/llvm/llvm-project/commit/9c024f3a83cf2469b27ae42c1a8d3ab635da3dc1
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M bolt/lib/Passes/Instrumentation.cpp
R bolt/test/X86/instrument-funcs-file.s
Log Message:
-----------
[BOLT] Drop option --instrument-funcs-file (#210217)
Commit: 34aefe9744fa83fa222d7f28e073c693c2c4ff5b
https://github.com/llvm/llvm-project/commit/34aefe9744fa83fa222d7f28e073c693c2c4ff5b
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M clang/cmake/caches/hexagon-unknown-linux-musl-clang-dist.cmake
M clang/cmake/caches/hexagon-unknown-linux-musl-clang-dylib-dist.cmake
Log Message:
-----------
[Hexagon] Fix compiler-rt install dir type, scope sanitizers (#209375)
COMPILER_RT_INSTALL_LIBRARY_DIR must be CACHE STRING, not CACHE PATH: a
relative PATH-typed cache entry resolves against the runtimes sub-build
directory instead of CMAKE_INSTALL_PREFIX, misplacing sanitizer libs.
Replace the explicit COMPILER_RT_BUILD_* ON list with
COMPILER_RT_SANITIZERS_TO_BUILD=all, since those options already default
ON upstream and infeasible sanitizers self-exclude via their own
ALL_<X>_SUPPORTED_ARCH lists.
Add FORCE to the dylib overrides so they take effect after
hexagon-unknown-linux-musl-clang-dist.cmake has already cached them OFF.
Commit: c84d20b18026fc230a7957c8faf3cf3a40d9cb55
https://github.com/llvm/llvm-project/commit/c84d20b18026fc230a7957c8faf3cf3a40d9cb55
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/sockatmark_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[libc] Fix sockatmark test (#210655)
When writing the test, I assumed that (linux) domain sockets do not
support OOB data, and that sockatmark returns 0, because it can never
read it.
In fact, as of 2021, linux does support OOB on domain sockets, but this
feature can be turned off at build time (CONFIG_AF_UNIX_OOB). In this
case (or in the case of older kernels), the kernel returns an error (and
the test fails).
Armed with this knowledge, I modify the test to test both "1" (OOB
present) and "0" (no OOB data) cases by actually sending OOB data into
the socket. I use the send call to determine the presence of OOB
support, and have the test skip itself if it is absent. OOB data only
makes sense on stream sockets, so change the socketpair type to that.
---------
Co-authored-by: Jeff Bailey <jbailey at raspberryginger.com>
Commit: 5a19a3a4b9915d19fff1b8298e723ee2b24ebc6a
https://github.com/llvm/llvm-project/commit/5a19a3a4b9915d19fff1b8298e723ee2b24ebc6a
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/resources/build.md
Log Message:
-----------
[lldb][Windows] Only embed Python home in Debug config (#209464)
On Windows, we used to embed `PYTHONHOME` by default on Windows. In the
documentation, we say
> This is most useful for developers who simply want to run LLDB after
they build it.
Since we use the limited/stable API now, we're less restricted in the
Python version, so I think it's less of an issue that LLDB won't find
Python. The only configuration where it might cause issues is the debug
configuration, since, when installing Python, you usually don't include
the debug libraries. Thus, you might not have the debug version
(`python3_d.py`) of Python in your PATH.
Commit: 0c0d9ff3b01b5709bda34198a01da2f19b88650e
https://github.com/llvm/llvm-project/commit/0c0d9ff3b01b5709bda34198a01da2f19b88650e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-add-part.ll
Log Message:
-----------
[SLP][NFC]Add a test with fmuladd copyables candidates, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210744
Commit: b7810e97d6281f65e255b36af7b39af18d3d2006
https://github.com/llvm/llvm-project/commit/b7810e97d6281f65e255b36af7b39af18d3d2006
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M .github/workflows/release-documentation.yml
Log Message:
-----------
workflows/release-documentation: Add missing secrets (#210421)
Commit: 9ba8a3c8ebf0dee73c7e3e1aa8ae0a81dd6439c7
https://github.com/llvm/llvm-project/commit/9ba8a3c8ebf0dee73c7e3e1aa8ae0a81dd6439c7
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Use simpler form of applyWaitcnt. NFC. (#210736)
Commit: 95f39100f1c1dab2aefbdc42d6e9ca26955535d1
https://github.com/llvm/llvm-project/commit/95f39100f1c1dab2aefbdc42d6e9ca26955535d1
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
A flang/test/Lower/OpenMP/collapse-labeled-do-host-eval.f90
A flang/test/Lower/OpenMP/collapse-loop-transform.f90
A flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
A flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
Log Message:
-----------
Redo [flang][OpenMP] Implement collapse for imperfectly nested loops (#208528)
Relands https://github.com/llvm/llvm-project/pull/202435, reverted in
https://github.com/llvm/llvm-project/pull/208456 because it broke
lowering of labeled DO loops under collapse with host-evaluated bounds.
Commit: 5fef5f6d27046d5e24118511050be6b5bdfcba0a
https://github.com/llvm/llvm-project/commit/5fef5f6d27046d5e24118511050be6b5bdfcba0a
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-20 (Mon, 20 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/containers/libc/Dockerfile
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/premerge.yaml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/require-team-membership/action.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/subscriber.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/validate-release-version/action.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
M .mailmap
A bolt/docs/BOLTAArch64OptimizationStatus.md
R bolt/docs/BOLTAArch64OptimizationStatus.rst
A bolt/docs/GettingStarted.md
R bolt/docs/GettingStarted.rst
A bolt/docs/index.md
R bolt/docs/index.rst
M bolt/docs/profiles.md
M bolt/include/bolt/Profile/DataReader.h
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Profile/DataReader.cpp
R bolt/test/X86/instrument-funcs-file.s
A bolt/test/X86/profile-symbols-mode.s
M clang-tools-extra/clangd/CMakeLists.txt
A clang-tools-extra/clangd/LSPBinder.cpp
M clang-tools-extra/clangd/LSPBinder.h
M clang/cmake/caches/hexagon-unknown-linux-musl-clang-dist.cmake
M clang/cmake/caches/hexagon-unknown-linux-musl-clang-dylib-dist.cmake
M clang/docs/InternalsManual.rst
M clang/docs/OpenMPSupport.md
M clang/docs/ReleaseNotes.md
A clang/docs/ScalableStaticAnalysis/user-docs/SourceEditGeneration.rst
M clang/docs/UsersManual.md
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/ExpressionTraits.h
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/TokenKinds.def
A clang/include/clang/Basic/Traits.td
R clang/include/clang/Basic/TransformTypeTraits.def
M clang/include/clang/Basic/TypeTraits.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.td
M clang/include/clang/ExtractAPI/DeclarationFragments.h
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/StaticLibrary.h
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/TUSummaryEncoding.h
A clang/include/clang/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaOpenMP.h
R clang/include/clang/Sema/TemplateInstCallback.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/Basic/ExpressionTraits.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/TypeTraits.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/PassDetail.h
M clang/lib/CIR/Interfaces/CIRLoopOpInterface.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/Serenity.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Frontend/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
A clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
R clang/lib/StaticAnalyzer/Checkers/ReportDanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/HLSL/Textures-AST.hlsl
M clang/test/AST/ast-dump-decl.cpp
A clang/test/AST/ast-dump-deleted-defaulted-range.cpp
M clang/test/AST/ast-dump-funcs.cpp
M clang/test/AST/ast-dump-record-definition-data-json.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/empty-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/two-function-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/lit.local.cfg
A clang/test/Analysis/Scalable/source-edit-generation/cli-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
A clang/test/Analysis/Scalable/source-edit-generation/downgradable-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
A clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-explicit-triple.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-namespace-override.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libempty.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libtwo.json
M clang/test/Analysis/Scalable/ssaf-linker/help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-create.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-time.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-verbose.test
M clang/test/Analysis/bstring.c
M clang/test/Analysis/inlining/Inputs/expected-plists/path-notes.cpp.plist
M clang/test/Analysis/logical-ops.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/pr22954.c
A clang/test/Analysis/std-c-library-functions-non-integral-ssize_t.cpp
A clang/test/Analysis/z3/z3-bitint-arithmetic.c
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
M clang/test/CIR/CodeGen/builtins-x86.c
M clang/test/CIR/CodeGen/ternary-throw.cpp
M clang/test/CIR/CodeGen/var_arg.c
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
A clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
A clang/test/CIR/IR/invalid-loop-cleanup.cir
A clang/test/CIR/IR/loop-cleanup.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-lang-addrspace-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
M clang/test/CMakeLists.txt
A clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general/p2.cpp
M clang/test/CodeGen/AArch64/branch-protection-attr.c
M clang/test/CodeGen/AArch64/sign-return-address.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/CodeGen/SystemZ/systemz-module.flags.c
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/CodeGen/call-graph-section-callback.cpp
M clang/test/CodeGen/call-graph-section-internal.cpp
M clang/test/CodeGen/call-graph-section-templates.cpp
M clang/test/CodeGen/call-graph-section-virtual-methods.cpp
M clang/test/CodeGen/call-graph-section.c
M clang/test/CodeGen/call-graph-section.cpp
M clang/test/CodeGenHLSL/resources/RWBuffer-imageformat.hlsl
M clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/CodeGenHLSL/resources/TypedBuffers-constructor.hlsl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CoverageMapping/default-method.cpp
A clang/test/Driver/Inputs/resource_dir/lib/cygwin/libclang_rt.builtins-x86_64.a
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-pc-windows-cygnus/libclang_rt.builtins.a
M clang/test/Driver/aarch64-features.c
M clang/test/Driver/aarch64-fmv.c
M clang/test/Driver/aarch64-security-options.c
A clang/test/Driver/cygwin-print-file-name.c
M clang/test/Driver/darwin-target-variant-sdk-version.c
M clang/test/Driver/dxc_debug.hlsl
M clang/test/Driver/freebsd-mips-as.c
M clang/test/Driver/freebsd.c
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/linux-ld.c
M clang/test/Driver/mingw-sysroot.cpp
A clang/test/ExtractAPI/availability_typedef_anonymous_record.c
A clang/test/ExtractAPI/objc_nullability.m
A clang/test/OpenMP/dims_modifier_ast_print.cpp
A clang/test/OpenMP/dims_modifier_messages.cpp
M clang/test/OpenMP/ompx_bare_messages.c
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target.c
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/warn-fortify-source.c
A clang/test/Sema/warn-stringop-overread-fortify.c
A clang/test/Sema/warn-stringop-overread.c
M clang/test/SemaCXX/attr-no-specializations.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
M clang/test/SemaHLSL/Resources/RWTexture2D-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/RWTexture2D-unsupported-methods-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-GetDimensions.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
R clang/test/Templight/templight-deduced-func.cpp
R clang/test/Templight/templight-default-arg-inst.cpp
R clang/test/Templight/templight-default-func-arg.cpp
R clang/test/Templight/templight-default-template-arg.cpp
R clang/test/Templight/templight-empty-entries-fix.cpp
R clang/test/Templight/templight-exception-spec-func.cpp
R clang/test/Templight/templight-explicit-template-arg.cpp
R clang/test/Templight/templight-memoization.cpp
R clang/test/Templight/templight-nested-memoization.cpp
R clang/test/Templight/templight-nested-template-instantiation.cpp
R clang/test/Templight/templight-one-instantiation.cpp
R clang/test/Templight/templight-prior-template-arg.cpp
M clang/tools/clang-ssaf-linker/CMakeLists.txt
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.h
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/SourceLocationTest.cpp
M clang/unittests/CIR/CMakeLists.txt
M clang/unittests/CIR/ControlFlowTest.cpp
A clang/unittests/CIR/GetFloatingPointTypeTest.cpp
A clang/unittests/CIR/IntTypeABIAlignTest.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangTraitsEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
A compiler-rt/docs/ASanABI.md
R compiler-rt/docs/ASanABI.rst
A compiler-rt/docs/BuildingCompilerRT.md
R compiler-rt/docs/BuildingCompilerRT.rst
A compiler-rt/docs/TestingGuide.md
R compiler-rt/docs/TestingGuide.rst
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/profile/Linux/counter_promo_for.c
M compiler-rt/test/profile/Linux/counter_promo_while.c
M compiler-rt/test/sanitizer_common/android_commands/android_common.py
M compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/CMakeLists.txt
M flang-rt/lib/cuda/allocator.cpp
M flang/docs/CMakeLists.txt
A flang/docs/CommandGuide/index.md
R flang/docs/CommandGuide/index.rst
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Lower/CUDA.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Descriptor.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/CUDA/descriptor.h
M flang/include/flang/Semantics/openmp-directive-sets.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Driver/fakeflang.F
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
A flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
M flang/test/Fir/FirToSCF/do-loop.fir
M flang/test/Fir/array-coor-canonicalization.fir
A flang/test/Fir/box-dims-folding.fir
M flang/test/Fir/boxaddr-folding.fir
A flang/test/Fir/create-box-codegen.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
M flang/test/Fir/loop01.fir
M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
M flang/test/HLFIR/optional_dummy.f90
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M flang/test/Integration/ivdep.f90
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-derived.cuf
A flang/test/Lower/CUDA/cuda-gpu-unified.cuf
R flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/MIF/change_team2.f90
M flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
M flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-terminator.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
A flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
A flang/test/Lower/OpenMP/collapse-labeled-do-host-eval.f90
A flang/test/Lower/OpenMP/collapse-loop-transform.f90
A flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/loop-compound.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/branching-directive.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_loop.f90
A flang/test/Lower/do_loop_execute_region_wrap.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/fail_image.f90
A flang/test/Lower/global-initialization-parens.f90
A flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/ifconvert.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/ivdep.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/nsw.f90
A flang/test/Lower/pre-fir-tree-assigned-goto.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/while_loop.f90
M flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
A flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
A flang/test/Semantics/OpenMP/teams_loop.f90
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-create-box.fir
M flang/tools/fakeflang/fakeflang.cpp
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/math/index.rst
R libc/docs/headers/time.rst
M libc/hdr/CMakeLists.txt
M libc/include/CMakeLists.txt
A libc/include/alloca.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/alloca-macros.h
M libc/include/llvm-libc-types/struct_sockaddr_storage.h
M libc/include/math.yaml
M libc/include/sys/time.yaml
M libc/include/time.yaml
M libc/shared/math.h
A libc/shared/math/lgammaf16.h
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/OSUtil/linux/CMakeLists.txt
M libc/src/__support/OSUtil/linux/auxv.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/hypot.h
A libc/src/__support/math/lgammaf16.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/lgammaf16.cpp
A libc/src/math/lgammaf16.h
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/semaphore/linux/CMakeLists.txt
M libc/src/semaphore/linux/named_semaphore.cpp
M libc/src/semaphore/linux/semaphore.h
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/stdlib/linux/CMakeLists.txt
M libc/src/stdlib/linux/realpath.cpp
M libc/src/sys/ipc/linux/CMakeLists.txt
M libc/src/sys/ipc/linux/ftok.cpp
R libc/src/sys/ipc/linux/kernel_statx.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_unlink.cpp
M libc/src/sys/time/CMakeLists.txt
A libc/src/sys/time/gettimeofday.h
M libc/src/sys/time/linux/CMakeLists.txt
A libc/src/sys/time/linux/gettimeofday.cpp
M libc/src/sys/time/linux/utimes.cpp
M libc/src/time/CMakeLists.txt
R libc/src/time/gettimeofday.h
M libc/src/time/linux/CMakeLists.txt
R libc/src/time/linux/gettimeofday.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
M libc/startup/linux/x86_64/tls.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcDeathTestExecutors.cpp
M libc/test/include/CMakeLists.txt
A libc/test/include/alloca_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/lgammaf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/hypot_test.cpp
A libc/test/src/math/smoke/lgammaf16_test.cpp
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
M libc/test/src/stdfix/DiviFxTest.h
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/connect_accept_test.cpp
M libc/test/src/sys/socket/linux/listen_test.cpp
M libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
M libc/test/src/sys/socket/linux/sockatmark_test.cpp
M libc/test/src/sys/socket/linux/socket_test_support.h
M libc/test/src/sys/socket/linux/sockname_test.cpp
M libc/test/src/sys/time/CMakeLists.txt
A libc/test/src/sys/time/gettimeofday_test.cpp
M libc/test/src/time/CMakeLists.txt
R libc/test/src/time/gettimeofday_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
A libc/utils/docgen/time.yaml
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__configuration/availability.h
M libcxx/include/__functional/function.h
M libcxx/include/__ranges/lazy_split_view.h
M libcxx/include/__utility/cmp.h
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/allocation_size.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.enumerate/nodiscard.verify.cpp
A libcxx/test/selftest/if-else.sh.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.all_of/all_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.any_of/any_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.none_of/none_of.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating.bitint.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/helpers.h
M libcxx/test/std/ranges/range.adaptors/range.adjacent.transform/iterator/member_types.compile.pass.cpp
M libcxx/utils/ci/images/libcxx_release_runners.txt
M libcxx/utils/libcxx/test/format.py
M libsycl/CMakeLists.txt
A libsycl/docs/CodingGuidelines.md
R libsycl/docs/CodingGuidelines.rst
A libsycl/docs/index.md
R libsycl/docs/index.rst
M libsycl/src/event.cpp
M libsycl/test/README.md
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/lit.cfg.py
M libsycl/test/usm/alloc_functions.cpp
M libsycl/unittests/event/event.cpp
A libunwind/docs/BuildingLibunwind.md
R libunwind/docs/BuildingLibunwind.rst
M libunwind/docs/conf.py
A libunwind/docs/index.md
R libunwind/docs/index.rst
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.h
A lld/docs/DTLTO.md
R lld/docs/DTLTO.rst
A lld/docs/ELF/large_sections.md
R lld/docs/ELF/large_sections.rst
A lld/docs/ELF/linker_script.md
R lld/docs/ELF/linker_script.rst
A lld/docs/ELF/start-stop-gc.md
R lld/docs/ELF/start-stop-gc.rst
A lld/docs/ELF/warn_backrefs.md
R lld/docs/ELF/warn_backrefs.rst
A lld/docs/MachO/index.md
R lld/docs/MachO/index.rst
A lld/docs/MachO/ld64-vs-lld.md
R lld/docs/MachO/ld64-vs-lld.rst
A lld/docs/NewLLD.md
R lld/docs/NewLLD.rst
A lld/docs/ReleaseNotes.md
R lld/docs/ReleaseNotes.rst
A lld/docs/WebAssembly.md
R lld/docs/WebAssembly.rst
M lld/docs/conf.py
A lld/docs/error_handling_script.md
R lld/docs/error_handling_script.rst
A lld/docs/index.md
R lld/docs/index.rst
A lld/docs/missingkeyfunction.md
R lld/docs/missingkeyfunction.rst
A lld/docs/windows_support.md
R lld/docs/windows_support.rst
A lld/test/COFF/link-dll-arm64x.s
M lld/test/ELF/riscv-feature-zicfilp-unlabeled.s
M lldb/bindings/interfaces.swig
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/docs/CMakeLists.txt
M lldb/docs/resources/build.md
M lldb/docs/resources/test.md
M lldb/docs/use/variable.md
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
A lldb/examples/python/templates/scripted_stackframe_recognizer.py
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBProtocolServer.h
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/Core/Diagnostics.h
M lldb/include/lldb/Core/ModuleSpec.h
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/Host/common/DomainSocket.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStackFrameRecognizerInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectSynthetic.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
A lldb/packages/Python/lldbsuite/support/xcode.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/source/API/CMakeLists.txt
M lldb/source/API/SBAddressRangeList.cpp
M lldb/source/API/SBMemoryRegionInfo.cpp
A lldb/source/API/SBProtocolServer.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointLocationList.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Breakpoint/Watchpoint.cpp
M lldb/source/Breakpoint/WatchpointList.cpp
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Diagnostics.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DumpDataExtractor.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandler.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Core/SearchFilter.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/DataFormatters/FormattersHelpers.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/DataFormatters/TypeCategory.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Host/common/DomainSocket.cpp
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Interpreter/embedded_interpreter.py
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_x86.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Plugins/TraceExporter/common/TraceHTR.h
A lldb/source/Plugins/TraceExporter/docs/htr.md
R lldb/source/Plugins/TraceExporter/docs/htr.rst
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Utility/Event.cpp
M lldb/source/Utility/ProcessInfo.cpp
M lldb/source/Utility/StructuredData.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/recognizer.py
M lldb/test/API/commands/gui/spawn-threads/TestGuiSpawnThreads.py
A lldb/test/API/functionalities/scripting_extension_generate/Makefile
A lldb/test/API/functionalities/scripting_extension_generate/TestScriptingExtensionGenerate.py
A lldb/test/API/functionalities/scripting_extension_generate/main.c
M lldb/test/API/functionalities/thread/finish-from-empty-func/TestEmptyFuncThreadStepOut.py
M lldb/test/API/functionalities/thread/finish-from-empty-func/main.c
A lldb/test/API/lang/cpp/enum-limits/Makefile
A lldb/test/API/lang/cpp/enum-limits/TestCPPEnumLimits.py
A lldb/test/API/lang/cpp/enum-limits/main.cpp
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/simulator/hello.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic/TestSBValueSetTypeSynthetic.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/library_support.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/main.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/foo_bar_synths.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/main.cpp
M lldb/test/API/tools/lldb-server/apple-simulator/TestAppleSimulatorOSType.py
A lldb/test/Shell/Diagnostics/TestDiagnosticsCollectBinaries.test
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit
M lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
A lldb/test/Shell/SymbolFile/NativePDB/static-class-constants.cpp
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBProtocolServerTest.cpp
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/DiagnosticsTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/CMakeLists.txt
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
A lldb/unittests/Process/gdb-remote/ProcessGDBRemoteTest.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M lldb/unittests/Utility/UriParserTest.cpp
A llvm-libgcc/docs/LLVMLibgcc.md
R llvm-libgcc/docs/LLVMLibgcc.rst
M llvm-libgcc/generate_version_script.py
A llvm/docs/AArch64SME.md
R llvm/docs/AArch64SME.rst
A llvm/docs/AMDGPUAsyncOperations.md
R llvm/docs/AMDGPUAsyncOperations.rst
M llvm/docs/AMDGPUDMAOperations.md
A llvm/docs/AMDGPUExecutionSynchronization.md
R llvm/docs/AMDGPUExecutionSynchronization.rst
A llvm/docs/AMDGPUMemoryModel.md
R llvm/docs/AMDGPUMemoryModel.rst
A llvm/docs/AddingConstrainedIntrinsics.md
R llvm/docs/AddingConstrainedIntrinsics.rst
A llvm/docs/AdminTasks.md
R llvm/docs/AdminTasks.rst
A llvm/docs/BigEndianNEON.md
R llvm/docs/BigEndianNEON.rst
M llvm/docs/CommandGuide/lit.rst
A llvm/docs/CompileCudaWithLLVM.md
R llvm/docs/CompileCudaWithLLVM.rst
A llvm/docs/DebuggingJITedCode.md
R llvm/docs/DebuggingJITedCode.rst
A llvm/docs/ExtendingLLVM.md
R llvm/docs/ExtendingLLVM.rst
A llvm/docs/HowToBuildWindowsItaniumPrograms.md
R llvm/docs/HowToBuildWindowsItaniumPrograms.rst
A llvm/docs/HowToCrossCompileBuiltinsOnArm.md
R llvm/docs/HowToCrossCompileBuiltinsOnArm.rst
A llvm/docs/HowToUpdateDebugInfo.md
R llvm/docs/HowToUpdateDebugInfo.rst
A llvm/docs/Instrumentor.md
R llvm/docs/Instrumentor.rst
A llvm/docs/JITLink.md
R llvm/docs/JITLink.rst
M llvm/docs/LangRef.md
A llvm/docs/MCJITDesignAndImplementation.md
R llvm/docs/MCJITDesignAndImplementation.rst
A llvm/docs/NVPTXUsage.md
R llvm/docs/NVPTXUsage.rst
A llvm/docs/ORCv2.md
R llvm/docs/ORCv2.rst
M llvm/docs/ReleaseNotes.md
A llvm/docs/Remarks.md
R llvm/docs/Remarks.rst
A llvm/docs/SPIRVUsage.md
R llvm/docs/SPIRVUsage.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/include/llvm/ADT/Eytzinger.h
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/ADT/Sequence.h
M llvm/include/llvm/Analysis/ConstraintSystem.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/DWP/DWP.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/IR/CycleInfo.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCSchedule.h
M llvm/include/llvm/ObjectYAML/BBAddrMapYAML.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/Transforms/Scalar/GVN.h
A llvm/include/llvm/Transforms/Scalar/LogicalSROA.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/LibcallLoweringInfo.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
M llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
M llvm/lib/DWP/DWP.cpp
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/IR/CycleInfo.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/ObjectYAML/BBAddrMapYAML.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/KnownBits.cpp
M llvm/lib/Support/LSP/Transport.cpp
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Z3Solver.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
A llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCleanCodeAfterTrap.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixBrTableDefaults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrTBM.td
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Scalar/CMakeLists.txt
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/lib/Transforms/Scalar/LogicalSROA.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/BasicAA/atomics.ll
A llvm/test/Analysis/Delinearization/multidim_pointer_addrspace.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
A llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-maxdepth.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vashr.mir
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/is_fpclass.ll
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
M llvm/test/CodeGen/AArch64/scalable_masked_interleaved_stores.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-ldst-zext.ll
A llvm/test/CodeGen/AArch64/sve-ptrue-coalesce.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
A llvm/test/CodeGen/AArch64/vector-deinterleave-load.ll
A llvm/test/CodeGen/AArch64/vector-interleave-store.ll
A llvm/test/CodeGen/AArch64/vselect-masked-shift.ll
A llvm/test/CodeGen/AArch64/windows-pac-invalid-a-key.ll
M llvm/test/CodeGen/AArch64/wineh-bti.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-cse-leaves-dead-cast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-binop-s64-with-s32-mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
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M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.shuffle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/ARM/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/ARM/call-graph-section-assembly.ll
M llvm/test/CodeGen/ARM/call-graph-section-tailcall.ll
M llvm/test/CodeGen/ARM/call-graph-section.ll
M llvm/test/CodeGen/ARM/select-imm.ll
M llvm/test/CodeGen/DirectX/ContainerData/ContainerFlags.ll
A llvm/test/CodeGen/LoongArch/lasx/issue207316.ll
M llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
M llvm/test/CodeGen/LoongArch/lsx/vexth.ll
M llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir
M llvm/test/CodeGen/NVPTX/atomicrmw-allow-ftz-atomics.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/CodeGen/NVPTX/atomicrmw.py
M llvm/test/CodeGen/NVPTX/atomics.ll
A llvm/test/CodeGen/NVPTX/proxy-reg-erasure-kill-flag.mir
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
M llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
M llvm/test/CodeGen/PowerPC/aix-crspill.ll
M llvm/test/CodeGen/PowerPC/aix32-crsave.mir
M llvm/test/CodeGen/PowerPC/cc.ll
M llvm/test/CodeGen/PowerPC/crsave.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/p10-spill-creq.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crgt.ll
M llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
M llvm/test/CodeGen/PowerPC/ppc64-crsave.mir
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
M llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
A llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-xchg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv64.mir
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
A llvm/test/CodeGen/RISCV/rvp-narrowing-zip.ll
A llvm/test/CodeGen/RISCV/rvp-widening-convert-isel.ll
M llvm/test/CodeGen/RISCV/rvp-zip.ll
A llvm/test/CodeGen/RISCV/rvv/vecreduce-minmax-constant-fold.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
A llvm/test/CodeGen/SPIRV/constant/fp128-unsupported.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-default-address-space.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-init-expr.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-multi-gve.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-no-backing-var.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-no-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-path-null.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-type-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bfloat16/bfloat16.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-fmuladd.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-multipred.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-multipred.mir
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/avx512-vpternlog-commute.ll
M llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/X86/call-graph-section-assembly.ll
M llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
M llvm/test/CodeGen/X86/call-graph-section.ll
A llvm/test/CodeGen/X86/dagcombine-sub-globaladdress.ll
A llvm/test/CodeGen/X86/pr209714.ll
A llvm/test/CodeGen/X86/tailcall-i686-pic.ll
M llvm/test/CodeGen/X86/tbm_patterns.ll
A llvm/test/Instrumentation/AddressSanitizer/darwin-mte-tag-stripping.ll
A llvm/test/MC/AArch64/LFI/debug-info.s
A llvm/test/MC/AMDGPU/amdhsa-kernel-prologue.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/Disassembler/WebAssembly/wasm.txt
A llvm/test/MC/Hexagon/relax-align.s
M llvm/test/TableGen/CompressWriteLatencyEntry.td
A llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
A llvm/test/TableGen/subreg-index-overflow-allowed.td
A llvm/test/TableGen/subreg-index-overflow.td
M llvm/test/TableGen/true-false.td
A llvm/test/ThinLTO/X86/Inputs/cache-defined-globals-order.ll
A llvm/test/ThinLTO/X86/cache-defined-globals-order.ll
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/gep-arithmetic-signed-predicates.ll
A llvm/test/Transforms/ConstraintElimination/lshr.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
M llvm/test/Transforms/EarlyCSE/replace-calls-def-attrs.ll
A llvm/test/Transforms/ExpandMemCmp/RISCV/lit.local.cfg
A llvm/test/Transforms/ExpandMemCmp/RISCV/memcmp-strict-align.ll
M llvm/test/Transforms/FixIrreducible/bug45623.ll
M llvm/test/Transforms/FixIrreducible/multiedge.ll
M llvm/test/Transforms/FixIrreducible/nested.ll
M llvm/test/Transforms/FixIrreducible/switch.ll
M llvm/test/Transforms/FixIrreducible/unreachable.ll
M llvm/test/Transforms/FixIrreducible/unsupported-terminator.ll
M llvm/test/Transforms/IndVarSimplify/drop-exact.ll
A llvm/test/Transforms/IndVarSimplify/iv-widen-addrec-flag-inferred-late.ll
M llvm/test/Transforms/IndVarSimplify/pr66066.ll
M llvm/test/Transforms/IndVarSimplify/strengthen-overflow.ll
A llvm/test/Transforms/Inline/AMDGPU/inline-max-bb-debug.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fdim.ll
M llvm/test/Transforms/InstCombine/fsh.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstSimplify/disable_folding.ll
A llvm/test/Transforms/LSROA/array.ll
A llvm/test/Transforms/LSROA/basictest.ll
A llvm/test/Transforms/LSROA/escaping.ll
A llvm/test/Transforms/LSROA/nesting.ll
A llvm/test/Transforms/LSROA/normal-gep.ll
A llvm/test/Transforms/LSROA/phi.ll
A llvm/test/Transforms/LSROA/select.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopVectorize/AArch64/non-affine-monotonic-bounds.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleave-low-vf-cost.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
A llvm/test/Transforms/LoopVectorize/non-affine-monotonic-bounds.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
M llvm/test/Transforms/MemCpyOpt/callslot.ll
M llvm/test/Transforms/PhaseOrdering/AMDGPU/infer-address-space.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
A llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-add-part.ll
A llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/splat-buildvector.ll
A llvm/test/Transforms/SLPVectorizer/sub-nsw-icmp-eq-zero-reorder.ll
A llvm/test/Transforms/SROA/sroa-self-referential-load.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad.ll
A llvm/test/Transforms/TailCallElim/disable-tail-call-elim-for-cold-calls.ll
M llvm/test/Transforms/UnifyLoopExits/basic.ll
M llvm/test/Transforms/UnifyLoopExits/integer_guards.ll
M llvm/test/Transforms/UnifyLoopExits/multiedge.ll
M llvm/test/Transforms/UnifyLoopExits/nested.ll
M llvm/test/Transforms/UnifyLoopExits/restore-ssa.ll
M llvm/test/Transforms/UnifyLoopExits/switch.ll
M llvm/test/Transforms/UnifyLoopExits/undef-phis.ll
A llvm/test/Transforms/VectorCombine/AArch64/bitreverse-v8i8-to-gpr.ll
A llvm/test/Transforms/VectorCombine/AArch64/load-widening.ll
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
M llvm/test/Verifier/callee-type-metadata.ll
M llvm/test/Verifier/matrix-intrinsics.ll
A llvm/test/tools/llvm-dwp/SystemZ/big_endian_info_v5.s
M llvm/test/tools/llvm-dwp/X86/compress.test
M llvm/test/tools/llvm-profdata/profile-symbol-list.test
M llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp
M llvm/unittests/ADT/EytzingerTest.cpp
M llvm/unittests/ADT/SequenceTest.cpp
M llvm/unittests/Frontend/OpenMPDirectiveNameParserTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/IR/PassManagerTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
M llvm/unittests/Support/MathExtrasTest.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/gn/README.rst
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/build/buildflags.gni
M llvm/utils/gn/build/symlink_or_copy.gni
M llvm/utils/gn/build/toolchain/BUILD.gn
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M llvm/utils/gn/secondary/bolt/tools/driver/BUILD.gn
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M llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/xpc/framework/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
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M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/clang-ssaf-linker/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
M llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ar/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cxxfilt/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwp/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-libtool-darwin/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-lipo/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-nm/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-rc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readobj/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-size/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-strings/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/main.py
A llvm/utils/lit/tests/Inputs/pass-env/lit.cfg
A llvm/utils/lit/tests/Inputs/pass-env/test.txt
A llvm/utils/lit/tests/pass-env.py
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/IR/CMakeLists.txt
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/include/mlir/IR/SymbolTable.h
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/IR/SymbolTable.cpp
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
M mlir/lib/Target/Wasm/TranslateFromWasm.cpp
M mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation-simplification.mlir
M mlir/test/Dialect/Bufferization/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-private.mlir
M mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir
M mlir/test/Dialect/OpenACC/ops-cg.mlir
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/Vector/vector-reduce-to-contract.mlir
A mlir/test/IR/test-verifiers-symbol-user-type.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lib/Dialect/Test/TestTypes.cpp
M mlir/test/lib/Dialect/Test/TestTypes.h
M mlir/test/mlir-tblgen/op-result.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M offload/docs/conf.py
A offload/docs/index.md
R offload/docs/index.rst
M offload/liboffload/API/Memory.td
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
M offload/unittests/OffloadAPI/memory/olMemFill.cpp
M openmp/runtime/src/kmp_i18n.cpp
M orc-rt/docs/Design.md
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/CCallback.h
M orc-rt/include/orc-rt/QueueingRunner.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/include/orc-rt/TaskGroup.h
M orc-rt/lib/executor/Session.cpp
A orc-rt/test/unit/CCallbackTest.cpp
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/QueueingRunnerTest.cpp
M orc-rt/test/unit/SessionTest.cpp
M orc-rt/test/unit/TaskGroupTest.cpp
M polly/include/polly/DependenceInfo.h
M polly/lib/Analysis/DependenceInfo.cpp
M polly/lib/CodeGen/IslAst.cpp
A polly/test/IstAstInfo/AstGenComputeOut.ll
M runtimes/cmake/config-Fortran.cmake
M utils/bazel/llvm-project-overlay/clang-tools-extra/clangd/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/arpa/inet/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/67e6d3abc7bb...5fef5f6d2704
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