[all-commits] [llvm/llvm-project] 559571: [Flang][MIF] Allocation of NON-ALLOCATABLE SAVE co...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Sun Jul 19 13:51:38 PDT 2026
Branch: refs/heads/users/boomanaiden154/main.llvm-reduce-unconditionally-initialize-targets
Home: https://github.com/llvm/llvm-project
Commit: 5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
https://github.com/llvm/llvm-project/commit/5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Lower/MultiImageFortran.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/EmitMIFGlobalCtors.cpp
M flang/test/Fir/basic-program.fir
M flang/test/Lower/MIF/coarray_allocation4.f90
M flang/test/Lower/MIF/coarray_allocation5.f90
Log Message:
-----------
[Flang][MIF] Allocation of NON-ALLOCATABLE SAVE coarray (#205847)
The goal of this PR is to add support for allocating NON-allocatable
coarrays that are not in the `Main` program.
All allocations will be performed in a function called
`__mif_save_coarrays_allocate`. If this function exists, then
LLVM::GlobalCtors is created (or modified).
The initialization of the MIF with `mif.init` is moved too in a
GlobalCtors with a priority of 0 to ensure that the initialization takes
place before any MIF allocations.
---------
Co-authored-by: Dan Bonachea <dobonachea at lbl.gov>
Commit: 40f2fda52c4b3b110f38acded24521217473d106
https://github.com/llvm/llvm-project/commit/40f2fda52c4b3b110f38acded24521217473d106
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
Log Message:
-----------
[lldb-dap] Migrate all DAP variables test. (#208215)
migrate TestDAP_variables and TestDAP_variables_children.
Commit: fff064e93d144a6499efcf091e1f226d144e514f
https://github.com/llvm/llvm-project/commit/fff064e93d144a6499efcf091e1f226d144e514f
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/test/Interpreter/cxx20-modules.cppm
M clang/test/Interpreter/execute-pch.cpp
A clang/test/Interpreter/pch-pic-mismatch.cpp
A clang/test/Interpreter/pcm-pic-mismatch.cpp
Log Message:
-----------
[Clang][Interpreter] Enable PIC to avoid 32-bit relocation overflows (#201286)
In clang-repl, R_*_32 relocations are emitted as direct 32-bit
PC-relative references. A conventional static linker can resolve
references to external symbols through the GOT or copy relocations, but
clang-repl directly mmaps shared objects into memory, bypassing the
static linker.
As a result, these relocations may exceed their 32-bit range if a
referenced symbol is located more than 2 GB away from the JIT
allocation, which can occur on FreeBSD.
Enable PIC to force accesses to external data through the GOT, avoiding
the generation of direct 32-bit relocations that are subject to the 2 GB
addressing limit.
Commit: a624d9999cf1ac83aa1fe0820c9311de8106175e
https://github.com/llvm/llvm-project/commit/a624d9999cf1ac83aa1fe0820c9311de8106175e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/AllocAction.h
Log Message:
-----------
[orc-rt] Remove redundant [[nodiscard]] from runFinalizeActions. NFC. (#209163)
runFinalizeActions returns an Expected, which already carries a
nodiscard attribute.
Commit: 9325f22f1cf17a6f192519163dd449d684700d2a
https://github.com/llvm/llvm-project/commit/9325f22f1cf17a6f192519163dd449d684700d2a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/cmake/modules/CMakeLists.txt
Log Message:
-----------
[MLIR] Normalize path separator in MLIRConfig.cmake (#208659)
Under Windows, the paths may contain `\` path separators.
`MLIR_TABLEGEN_EXE` is added into MLIRConfig.cmake where backslashes are
interpreted as escape characters. This results in syntax errors during
`find_package(MLIR)`.
Fix by using CMake-normalized paths (`/` separator under all platforms).
LLVM/Clang do not put their tablegen paths in their config files.
Commit: 1884c7565155b603ec3946718801f53b276876bb
https://github.com/llvm/llvm-project/commit/1884c7565155b603ec3946718801f53b276876bb
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-invalid.mlir
Log Message:
-----------
[mlir][tosa] Validate variable element types (#205873)
I changed the TOSA validation path so unsupported types report a normal
diagnostic instead of crashing.
Fixes #205710
Commit: 0f69d2804b9b2542fde2ecafbb23f1e8a8b48d86
https://github.com/llvm/llvm-project/commit/0f69d2804b9b2542fde2ecafbb23f1e8a8b48d86
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/include/__iterator/segmented_iterator.h
Log Message:
-----------
[libc++][NFC] Remove unused includes from <__iterator/segmented_iterator.h> (#209105)
Commit: d4c6c8623e9bf9aa75ad049f55423223228116b3
https://github.com/llvm/llvm-project/commit/d4c6c8623e9bf9aa75ad049f55423223228116b3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP] Support memory runtime alias checks
Vectorize straight-line code blocked by runtime-checkable may-alias
dependencies by versioning the block. Drop the deps, and if the tree is
profitable, emit base-object address-range overlap checks branching to a
vector fast path or an original-order scalar fallback.
Fixes #201534
Reviewers: RKSimon, bababuck, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/203631
Commit: 7f35300f0deb972606082122e4c7d76dda03203c
https://github.com/llvm/llvm-project/commit/7f35300f0deb972606082122e4c7d76dda03203c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Compiler.h
M orc-rt/include/orc-rt/Error.h
Log Message:
-----------
[orc-rt] Replace ORC_RT_NODISCARD with [[nodiscard]]. NFCI. (#209169)
The ORC runtime requires C++17, so we can use the C++17 [[nodiscard]]
attribute directly, rather than going through a macro.
Commit: dc1273beba1c70cb74d03c760958ee625d8aecf5
https://github.com/llvm/llvm-project/commit/dc1273beba1c70cb74d03c760958ee625d8aecf5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (#209135)
Previously the link compatibilty was based on a raw string match of the
triple + cpu name. Start parsing the triple, and use the compatibility
function. Start using AMDGPU::TargetID from TargetParser, as a step
towards removing clang's redundant TargetID handling.
Co-authored-by: Claude (Opus 4.8)
Commit: 254472bc2edd6d8ec536656368869e36c386a339
https://github.com/llvm/llvm-project/commit/254472bc2edd6d8ec536656368869e36c386a339
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[Flang][CMake] Use LLVM-declared LLVM_EXTERNAL_LIT (#208680)
LLVM_EXTERNAL_LIT is already declared by
https://github.com/llvm/llvm-project/blob/99fb741b6e0da866bf3c6000531104bff347d787/llvm/cmake/modules/AddLLVM.cmake#L2175.
Flang's redeclaration in standalone builds is redundant and breaks on
Windows because the filename there is `llvm-lit.py`.
Commit: a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931
https://github.com/llvm/llvm-project/commit/a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
Revert "[SLP] Support memory runtime alias checks"
This reverts commit d4c6c8623e9bf9aa75ad049f55423223228116b3 to address
postcommit review https://github.com/llvm/llvm-project/pull/203631?email_source=notifications&email_token=ABI45DXYNFIHECEWI5IGYJT5ETMNLA5CNFSNUABKM5UWIORPF5TWS5BNNB2WEL2QOVWGYUTFOF2WK43UKJSXM2LFO4XTINRYGQ4TAMRWGAZ2M4TFMFZW63VMON2GC5DFL5RWQYLOM5S2KZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#pullrequestreview-4684902603
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209173
Commit: da0045a12dbc6cc5b07534ca9ddcceaef49f05de
https://github.com/llvm/llvm-project/commit/da0045a12dbc6cc5b07534ca9ddcceaef49f05de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx1030.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll
M llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
M llvm/test/CodeGen/AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir
M llvm/test/CodeGen/AMDGPU/greedy-broken-ssa-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/greedy-global-heuristic.mir
M llvm/test/CodeGen/AMDGPU/greedy-instruction-split-subrange.mir
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll
M llvm/test/CodeGen/AMDGPU/gws-hazards.mir
M llvm/test/CodeGen/AMDGPU/gws_agpr.ll
M llvm/test/CodeGen/AMDGPU/half-alloca-promotion.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hard-clause-limit-attr.mir
M llvm/test/CodeGen/AMDGPU/hard-clause-limit.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx10.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx12.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-load-monitor.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses.mir
M llvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
M llvm/test/CodeGen/AMDGPU/hazard-flat-instruction-valu-check.mir
M llvm/test/CodeGen/AMDGPU/hazard-getreg-waitalu.mir
M llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir
M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
M llvm/test/CodeGen/AMDGPU/hazard-kill.mir
M llvm/test/CodeGen/AMDGPU/hazard-lds-addtid.mir
M llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir
M llvm/test/CodeGen/AMDGPU/hazard-pseudo-machineinstrs.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-src-shared-base.ll
M llvm/test/CodeGen/AMDGPU/hazard-setreg-vgpr-msb-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hazard-shift64.mir
M llvm/test/CodeGen/AMDGPU/hazard.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/high-bits-zeroed-16-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hsa-func-align.ll
M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
M llvm/test/CodeGen/AMDGPU/hsa-group-segment.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-small.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-func-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-funcarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-kernarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel-.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-present-asan.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-images.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-uniform-workgroup-size-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/i128-add-carry-chain.ll
M llvm/test/CodeGen/AMDGPU/i1_copy_phi_with_phi_incoming_value.mir
M llvm/test/CodeGen/AMDGPU/i8-extract-cost-comparison.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (15) (#209118)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b719e2e27ce121bec3afcf96f4806c0592ce95a1
https://github.com/llvm/llvm-project/commit/b719e2e27ce121bec3afcf96f4806c0592ce95a1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2-test.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4-test.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/iglp-no-clobber.ll
M llvm/test/CodeGen/AMDGPU/iglp.opt.reentry.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-block-count.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernel-argument-alignment.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.mir
M llvm/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/infer-uniform-load-shader.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-agpr-negative-tests.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-large.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-leaf.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-use-inactive.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-av-constraint-err.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-av-constraint.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-range-unsupported-width.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inline-maxbb.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16-fake16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16-true16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-branch-w32.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-attr.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-parse.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-wmma-xdl.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert-handle-flat-vmem-ds.mir
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-callee.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-fence-soft.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
M llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
M llvm/test/CodeGen/AMDGPU/inst-prefetch-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (16) (#209119)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx>
to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa),
dropping the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: db87fc87c7fd70f9e429439aeebbf9cd014dde54
https://github.com/llvm/llvm-project/commit/db87fc87c7fd70f9e429439aeebbf9cd014dde54
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
Log Message:
-----------
[libc][RISC-V] Enable additional entrypoints and headers (#208927)
Bring most of the already enabled libs for x86_64 to riscv.
Also, move two libs in x86_64 entrypoints.txt to keep the file sorted
alphabetically.
Commit: 62b7c7f547da4af492e85aa09b6feafc9b513f23
https://github.com/llvm/llvm-project/commit/62b7c7f547da4af492e85aa09b6feafc9b513f23
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Passes/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 5595710 (#209165)
This fixes 5595710093f7f8b9cdb0ff4f8d7400e58bde09b2.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 9e014de2d3cc674b548e321013bfe42e6f5485ab
https://github.com/llvm/llvm-project/commit/9e014de2d3cc674b548e321013bfe42e6f5485ab
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/attr-sentinel.cpp
Log Message:
-----------
[Clang] Fixed missing sentinel attribute diagnostic discrepancy with explicit object parameters (#208842)
When using the sentinel attribute on a variadic function with an
explicit object parameter, the missing sentinel attribute diagnostic
takes into account the explicit object parameter as an argument. It was
diagnosing `missing sentinel in function call` instead of `not enough
variable arguments in '%0' declaration to fit a sentinel`, compared to
other similar variadic functions.
Fixes #200007
Commit: 90d8af8caac360dca0fa28abbb5804dcbe694ef1
https://github.com/llvm/llvm-project/commit/90d8af8caac360dca0fa28abbb5804dcbe694ef1
Author: Kieran B <kieran.bailey at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
Log Message:
-----------
[Clang][AArch64] Add ACLE _n variants for svdot intrinsics (#208694)
Add missing _n variants for the svdot ACLE
intrinsics in arm_sve.td
Add CodeGen tests in acle_sve2p1_dot.c to verify
correct intrinsics are generated
List of Intrinsics:
- svdot_n_s32_s16
- svdot_n_u32_u16
- svdot_n_f32_f16
Commit: 7a8b26271b273ea36c1d68c97f4c87b63de4a2bd
https://github.com/llvm/llvm-project/commit/7a8b26271b273ea36c1d68c97f4c87b63de4a2bd
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[libunwind][Hexagon] Save/restore full r0-r7 in getcontext/jumpto (#208753)
The Hexagon save and restore routines dropped GPRs, producing an
incomplete context.
UnwindRegistersSave.S (__unw_getcontext): save r0-r7 (stores began at
__r[8]), drop a dead "r1 = memw(r30)" before the PC store, and return
UNW_ESUCCESS instead of a stale non-zero value.
UnwindRegistersRestore.S (jumpto): restore the missing r2-r7 (r0/r1 and
r8-r31 were already handled), and fix the stale "pointer is in r2"
comment (it is r0).
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: ff599bba9d370bf58e4a34f9f29b4fb6234013f0
https://github.com/llvm/llvm-project/commit/ff599bba9d370bf58e4a34f9f29b4fb6234013f0
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-picolibc.c
Log Message:
-----------
[Hexagon] Enable init-array by default for picolibc (#208639)
Picolibc uses the modern .init_array/.fini_array mechanism rather than
legacy .init/.fini sections. Extend UseInitArrayDefault in
HexagonToolChain::addClangTargetOptions to also return true when
--cstdlib=picolibc is selected, preventing -fno-use-init-array from
being passed to cc1.
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: fc9a4afa9bdc406f1ce4e0dbc078734025ab2d9d
https://github.com/llvm/llvm-project/commit/fc9a4afa9bdc406f1ce4e0dbc078734025ab2d9d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port SelectionDAGISel to NewPM
Similar to other targets, for getting the NewPM rolling.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/208982
Commit: c31455cd07c43ed02445f5b1f1057037f0503552
https://github.com/llvm/llvm-project/commit/c31455cd07c43ed02445f5b1f1057037f0503552
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/src/filesystem/operations.cpp
A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/bad_perms_parent.pass.cpp
Log Message:
-----------
[libc++] Fix filesystem::remove_all bug with read-only nested directory (#197104)
Consider a directory `parent/child`, where `parent` has read-only
permissions. Calling `remove_all` on `parent` is expected to fail with a
permission error, however it fails with a different error depending on
the platform (such as "error file exists" on AIX).
During the recursive removal, `unlinkat` is first called on the child
and fails with a permission error. Rather than returning, the function
continues and tries `unlinkat` on the parent and fails with a different
error depending on the platform. This error is returned instead of the
permission error. This PR makes the first encountered error be returned
instead.
According to the standard [fs.op.remove.all]:
> Effects: Recursively deletes the contents of p if it exists, then
> deletes file p itself, as if by POSIX remove.
The word "then" implies an ordering where deleting the contents of p
should be successful before deleting file p itself.
Fixes #197100.
Commit: 52511761bc80e96b7d07b4da71bb08c8f498dee1
https://github.com/llvm/llvm-project/commit/52511761bc80e96b7d07b4da71bb08c8f498dee1
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/av-invalid-scope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
Log Message:
-----------
[AMDGPU] Fix SSID merge in SIMemoryLegalizer to use smallest inclusiv… (#208300)
…e scope
SIMemOpAccess::constructFromMIWithMMO merged multiple MMO sync scopes by
calling isSyncScopeInclusion(A, B) and blindly overwriting SSID with B
when it returned false. This was correct when B strictly subsumes A, but
isSyncScopeInclusion returned false for both "A < B" and "A and B are
incomparable" -- e.g. agent-one-as (one-AS, agent level) vs workgroup
(cross-AS, workgroup level) live on different branches of the
two-dimensional scope lattice and neither subsumes the other. In the
incomparable case the resulting SSID depended on MMO order, silently
dropping agent-scope cache-management requirements.
Fix: replace isSyncScopeInclusion (std::optional<bool>) with
getMergedSyncScopeID (std::optional<SyncScope::ID>) which returns the
smallest scope inclusive of both inputs. The merged level is
max(level_A, level_B); if either input is cross-AS the result is also
cross-AS, since dropping cross-AS ordering would silently lose the
ordering guarantee for address spaces not covered by a one-AS scope.
Add tests in memory-legalizer-multiple-mem-operands-atomics.mir
verifying that a FLAT_ATOMIC_ADD with agent-one-as and workgroup MMOs
produces agent-scope cache ops (BUFFER_WBINVL1_VOL) regardless of MMO
order.
Commit: c42c7b47a634ab3f4455b0e8b17f2bbc3be022af
https://github.com/llvm/llvm-project/commit/c42c7b47a634ab3f4455b0e8b17f2bbc3be022af
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Lex/PPDirectives.cpp
Log Message:
-----------
[clang][NFC] Skip macro source-location check for names that can't warn (#208862)
While profiling Linux headers, I noticed that
`Preprocessor::CheckMacroName` performs expensive source-location
queries for every macro, even when no diagnostic is possible. We can
avoid this overhead by only performing these checks when the macro name
is actually a reserved identifier or keyword, skipping them entirely for
ordinary macros.
| | basket Ir |
| --- | --- |
| before | 10,690,004,315 |
| after | 10,649,181,540 |
| **Δ** | **−40.8M (−0.38%)** |
this is a follow up to #137306 and #139492
Commit: aab2ff0b9096df1d5168e293c81b6653e759890d
https://github.com/llvm/llvm-project/commit/aab2ff0b9096df1d5168e293c81b6653e759890d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
M llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
Log Message:
-----------
[SDAG][X86] Form pseudo fmin/fmax from select_cc (#208717)
Create PSEUDO_FMIN/PSEUDO_FMAX from SELECT_CC in addition to
SELECT/VSELECT.
Unfortunately we can't just do this in the common SimplifySelectCC()
helper because of the StrictFP handling and need to handle all three
cases explicitly.
I ran into this trying to use the ops on s390x, but there are also some
avx512 cases that benefit, so I split out this generalization.
Commit: 592953beff733a1e28f6c6e5e39f948fb035a329
https://github.com/llvm/llvm-project/commit/592953beff733a1e28f6c6e5e39f948fb035a329
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/Preprocessor.cpp
Log Message:
-----------
[clang][Diagnostics] Only record lexer check points when colors are enabled (#204926)
Only build lexer check points when colored diagnostics are enabled,
since that's the only case where they're ever used,
This should reduce the cost on larger builds.
| Commit | Basket Ir | Delta |
|---|---|---|
| 863b2c84 (Parent) | 30,240,576,150 | — |
| 718aac9f (Commit) | 30,336,607,185 | +0.318% |
| **+ this pr** | **30,279,772,621** | **+0.130%** |
**synthetic error file (12.3k lines, 300 errors):**
| Build | Error-TU Ir (colors on) | Δ vs commit |
|---|---|---|
| 718aac9f (Commit) | 1,386,488,658 | — |
| **+ this pr** | **1,387,140,588** | **+0.05%** |
Resolves #203764
---------
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: ee71eb831b6090897df8ae4f843f4b14370131d5
https://github.com/llvm/llvm-project/commit/ee71eb831b6090897df8ae4f843f4b14370131d5
Author: StoeckOverflow <95052643+StoeckOverflow at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.apinotes
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/where-parameters-sema.cpp
Log Message:
-----------
[APINotes] Match function-like Where.Parameters in Sema (#205307)
This PR teaches Sema to apply function-like `Where.Parameters` selectors
for API notes.
It builds on #204147 by using the serialized `Where.Parameters` selector
keys in Sema. For each `FunctionDecl` / `CXXMethodDecl`, Sema derives an
exact parameter selector from the declaration’s `FunctionProtoType`.
Broad name-only API notes lookup still runs first, preserving existing
behavior. If Clang can form a parameter selector, Sema then performs an
exact selector lookup and applies that result second, allowing
overload-specific notes to refine same-name broad notes.
Tests:
- Adds end-to-end module APINotes Sema coverage (`.apinotes` source ->
binary APINotes -> reader lookup -> Sema matching -> AST result)
- Covers core matching behavior for global functions and C++ methods,
including same-name overloads, exact empty selectors, broad-plus-exact
coexistence and mismatched selectors
- Covers important edge cases: default arguments, static methods, alias
spellings remaining non-canonicalized, by-value `const`, namespaced
functions, and overloaded operators.
This PR does not add duplicate-selector or unmatched-selector
diagnostics. Those remain for a follow-up diagnostics PR.
**Note**: this PR was originally stacked on top of #204147. It has now
been rebased on top of main containing those changes, so the remaining
diff should reflect only the top commit specific to this PR.
Reviewers: @Xazax-hun @j-hui @egorzhdan
---------
Co-authored-by: John Hui <updog at j-hui.com>
Commit: 42aaca2c4a6d69b6334be102e41d185526915f8b
https://github.com/llvm/llvm-project/commit/42aaca2c4a6d69b6334be102e41d185526915f8b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add ReportErrorsViaSession utility. (#209177)
ReportErrorsViaSession is a function object constructed from a Session&
that forwards Errors to that Session's reportError method. It will be
used in upcoming patches to simplify some error reporting plumbing.
Commit: f88150e1d5fc8591b0d71619d02e5b553161c1f8
https://github.com/llvm/llvm-project/commit/f88150e1d5fc8591b0d71619d02e5b553161c1f8
Author: Andrey Pavlenko <andrey.a.pavlenko at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
Log Message:
-----------
[MLIR][XeGPU][VectorToXeGPU] Fixed transposed transfer_read/write (#197281)
The problem was that adjustStridesForPermutation() permutes strides, but
they are required to compute base offset from transfer read indices.
Added optional argument to computeMemrefMeta() to preserve the original
strides.
Commit: 4c519c6e558a0cccf80c072ccf0822488968cbaf
https://github.com/llvm/llvm-project/commit/4c519c6e558a0cccf80c072ccf0822488968cbaf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn] port 375cc88b510150d (AMDGPU -gisel-extended-llt) (#209181)
Commit: 290601ed3e08a7e90b81b0b17cf45e1a435783a7
https://github.com/llvm/llvm-project/commit/290601ed3e08a7e90b81b0b17cf45e1a435783a7
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStoreProperties.td
M lldb/test/API/symstore/TestSymStore.py
Log Message:
-----------
[lldb] Make timeout for HTTP send/receive in SymbolLocatorSymStore configurable (#192061)
This patch adds the `plugin.symbol-locator.symstore.timeout` setting and
keeps the previously hard-coded value of 60 sections as the default. It
adds a test to check that the breakpoint doesn't resolve and we get the
correct warning message if the timeout hits.
---------
Co-authored-by: Nerixyz <nerixdev at outlook.de>
Commit: da1e5f1f6c096f360abe39ad2f7d235b6d270a70
https://github.com/llvm/llvm-project/commit/da1e5f1f6c096f360abe39ad2f7d235b6d270a70
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
Log Message:
-----------
[alpha.webkit.UncheckedLocalVarsChecker] Improve the warning text (#208855)
This PR aligns UncheckedLocalVarsChecker and its variant's warning
message with the new warning format in
https://github.com/llvm/llvm-project/pull/202724.
Commit: ac370b8e838ada3dd482560c4b8a568e760f95b5
https://github.com/llvm/llvm-project/commit/ac370b8e838ada3dd482560c4b8a568e760f95b5
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
Log Message:
-----------
[MLIR][Linalg] Fix LinalgSpecializeGenericOpsPass for scalar inputs (#208466)
The test case added would crash because the Ranked Tensor-ness of
operands was assumed but never checked. This crash only happened when there
were multiple inputs as it must bail out somewhere else when there is only
1 input.
Commit: 24df1d13d9090e075b162bf81d1a34a408e54924
https://github.com/llvm/llvm-project/commit/24df1d13d9090e075b162bf81d1a34a408e54924
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
Reapply "[Clang] Transform lambda's constraints when instantiating parameter mapping (#207966)
This reapplies https://github.com/llvm/llvm-project/pull/195995
The last approach caused a regression because sometimes we transformed
the constraints of lambda expression too aggressively when we should
have preserved it.
The basic idea of this patch is to transform constraints of lambda
expressions when we instantiate the parameter mapping, thus the
evaluation can be emancipated from preserving outer template arguments.
Claude is used to help reduce the test case from #199209
Fixes https://github.com/llvm/llvm-project/issues/193944
Fixes https://github.com/llvm/llvm-project/issues/199209
Fixes https://github.com/llvm/llvm-project/issues/202957
Commit: fb0ffb1f5131018926e46a918744868c0d07abd7
https://github.com/llvm/llvm-project/commit/fb0ffb1f5131018926e46a918744868c0d07abd7
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 1) (#207198)
The lowering code tries to implement splitting by keeping two source
values SrcVal and SrcVal2 for the Lo/Hi part respectively.
This is a bit awkward, because SrcVal2 may not be set. It makes more
sense to generating new DAG nodes that will be lowered separately by the
lowering mechanism, which revisits the newly added (split sourceval)
nodes for lowering.
Commit: ada4f7cffcff8eba94a193cf85fe1fa828ed9ec5
https://github.com/llvm/llvm-project/commit/ada4f7cffcff8eba94a193cf85fe1fa828ed9ec5
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-reverse.ll
Log Message:
-----------
[RISCV][P-ext] Improve RV64 v2i16 reverse codegen (#208664)
On RV64, v2i16 is widened to v4i16 before shuffle lowering. Recognize
the widened low-half reverse and select ppairoe.h directly instead of
rev16 followed by srli.
Commit: 695238ffaa64ac8f49e7da36d36c5170509007cc
https://github.com/llvm/llvm-project/commit/695238ffaa64ac8f49e7da36d36c5170509007cc
Author: Ariel-Burton <arielburton at yahoo.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/CodeGen/SystemZ/zos-check-lanuage.c
Log Message:
-----------
Write original source language when writing and reading AST (#208115)
FAIL: Clang :: Frontend/ast-main.c
FAIL: Clang :: Frontend/ast-main.cpp
were failing on z/OS; this change fixes these lit failures.
The issue here is that on z/OS the original source code language needs
to be passed through to the IR so that the backend can encode this
information in the PPA2 in the object file. That means that it needs to
be exported to the AST so that going from saved AST -> IR will carry the
language through.
Commit: c4cb2c0e763c304071e950e47dd0c25a7dcfbbca
https://github.com/llvm/llvm-project/commit/c4cb2c0e763c304071e950e47dd0c25a7dcfbbca
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[Flang] Multi-config CMake output paths in standalone builds (#208690)
When using a multi-config generator with CMake (such as "Ninja
Multi-Config" or any Visual Studio generator), the output path must be
specific to each config by having it include `${CMAKE_CFG_INTDIR}`.
`CMAKE_CFG_INTDIR` will just be `.` in single-config generators. Use the
same path as used by LLVM:
https://github.com/llvm/llvm-project/blob/cd662a7c4fb03a88d0e429a7fc8d8b470a812e2b/llvm/CMakeLists.txt#L562-L563
`LLVM_LIBDIR_SUFFIX` was seemingly forgotten in one of the paths.
This is not complete support (neither has LLVM). More paths would need
to be config-specific. In particular, `check-flang` does not work, but
at least one can build the executables.
Commit: cb6bccc33f46cba5bbdba5f3883acde1a1f4f83e
https://github.com/llvm/llvm-project/commit/cb6bccc33f46cba5bbdba5f3883acde1a1f4f83e
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/mdspan
M libcxx/include/span
M libcxx/test/std/containers/views/mdspan/extents/ctad.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/deduct.pass.cpp
Log Message:
-----------
[libc++] Backport P3029R1 Better `mdspan`'s CTAD to C++20/23 (#208132)
Also backport
- support for `T::value` of a reference type in `integral-constant-like`
from P2781R9 `std::constant_wrapper`, and
- LWG4351 _`integral-constant-like`_ needs more `remove_cvref_t`.
P3029R1 (and its further fixes) should be treated as a Defect Report
against C++20/23 to avoid behavior difference in different modes. Other
implementations will do or are already doing the same.
Commit: 31ccbe7007691bc6d2eb628dcd4ad1f264215322
https://github.com/llvm/llvm-project/commit/31ccbe7007691bc6d2eb628dcd4ad1f264215322
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/masked-store-with-profile-info.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
Log Message:
-----------
[LV] Extend test coverage with branch probabilities (NFC). (#209182)
Add tests with branch probabilities, including cost printing tests for
replicate regions, VPlan printing tests and masked stores with
probabilities.
Commit: a1a806bb371550661aaee787d2a3622d9e84d528
https://github.com/llvm/llvm-project/commit/a1a806bb371550661aaee787d2a3622d9e84d528
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/Transforms/Passes.td
M mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
Log Message:
-----------
[memref] Support non-scalar copies in `reinterpret_cast` elision (#203873)
Extends `memref-elide-reinterpret-cast` from scalar-only copy
transformation to also handle copies of effectively 1D and static
multidimensional regions.
The rewrite is limited to cases where each non-unit `reinterpret_cast`
result dimension maps directly to a distinct identity-layout source
dimension with the same stride and sufficient static size. This lets the
rewrite use each loop IV
directly as a source memref index. Cases where result strides do not
match source identity strides are left untouched because they would
require linearization/delinearization across source dimensions.
Assisted-by: Codex (refine implementation + tests). I reviewed all code
and tests before submission.
## Examples
Scalar copy, unchanged(*) behavior:
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [1], sizes: [1, 1], strides: [1, 1]
: memref<1x108xf32> to memref<1x1xf32, strided<[1, 1], offset: 1>>
memref.copy %src, %view : memref<1x1xf32> to memref<1x1xf32, strided<[1, 1], offset: 1>>
// AFTER
%v = memref.load %src[%c0, %c0] : memref<1x1xf32>
memref.store %v, %dst[%c0, %c1] : memref<1x108xf32>
```
Effectively 1D copy:
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [0], sizes: [1, 33, 1], strides: [1386, 42, 1]
: memref<1x33x42xf32> to memref<1x33x1xf32, strided<[1386, 42, 1]>>
memref.copy %src, %view : memref<1x33x1xf32> to memref<1x33x1xf32, strided<[1386, 42, 1]>>
// AFTER
scf.for %i = %c0 to %c33 step %c1 {
%v = memref.load %src[%c0, %i, %c0] : memref<1x33x1xf32>
memref.store %v, %dst[%c0, %i, %c0] : memref<1x33x42xf32>
}
```
Static 2D copy with offset becomes a nested loop with the static offset
folded into the `reinterpret_cast` source store indices.
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [16], sizes: [1, 33, 4], strides: [1386, 42, 1]
: memref<1x33x42xf32>
to memref<1x33x4xf32, strided<[1386, 42, 1], offset: 16>>
memref.copy %src, %view
// AFTER
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c16 = arith.constant 16 : index
%c33 = arith.constant 33 : index
scf.for %i = %c0 to %c33 step %c1 {
scf.for %j = %c0 to %c4 step %c1 {
%v = memref.load %src[%c0, %i, %j]
memref.store %v, %dst[%c0, %i, %c16 + %j]
}
}
```
## Scope
Supported:
- ranked, static-shape copy source and `reinterpret_cast` source/result
memrefs
- identity-layout `reinterpret_cast` sources
- rank-preserving `reinterpret_cast`s
- scalar copies, including dynamic result strides because all result
indices are zero
- non-scalar copies where every non-unit result dimension has a static
stride matching a distinct source dimension with sufficient static size
- static offsets, delinearized into source indices
- dynamic offsets only when the `reinterpret_cast` source has at most
one non-unit dimension and the result has at most one mapped non-unit
dimension
Not addressed:
- unranked or dynamic-shape copy/reinterpret_cast operands
- non-identity-layout `reinterpret_cast` sources
- rank-changing `reinterpret_cast`s
- dynamic strides on non-unit result dimensions
- result dimensions whose strides do not match source identity strides
- result dimensions that reuse a source dimension or cross source
dimension boundaries
- dynamic offsets requiring runtime div/rem delinearization
## Correctness
Result indices are translated to source indices by direct dimension
mapping: each non-unit result dimension must have the same stride as a
distinct source dimension.
Static offsets are delinearized into source indices before rewriting.
Dynamic offsets are only accepted when they can be used directly in the
single non-unit source dimension.
Cases assumed invalid by `reinterpret_cast`/`copy` semantics are guarded
with assertions.
(*) NFC to scalar copy case, we're now only creating zero constants for
indices once.
Commit: 158938ccba7a91e709a2bd8c607eaefd271a102b
https://github.com/llvm/llvm-project/commit/158938ccba7a91e709a2bd8c607eaefd271a102b
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/test/CodeGen/SystemZ/zos-ppa1-name.c
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
A llvm/test/CodeGen/SystemZ/zos-ppa1-name.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
Log Message:
-----------
Change zos-ppa1-name attr to be the name used in ppa1 (#208870)
Change the meaning of the `zos-ppa1-name` attribute to pass the name of
the function to use in the PPA1. The symbol name used in the PAA1 will
be:
- if the function has the `zos-ppa1-name` attribute, use that value. An
empty string will be mean don't add the name to the PPA1
- otherwise use the function name.
The behaviour for asm labels and `#pragma map` (PR coming shortly) is to
use the function name used in the source code in the PPA1. A follow on
PR for clang will set `zos-ppa1-name` to the mangled name ignoring asm
label to implement the non-empty string part of the first bullet.
Commit: ee24ac00d874ce82eaf36431f9aeb2ad744bc3b8
https://github.com/llvm/llvm-project/commit/ee24ac00d874ce82eaf36431f9aeb2ad744bc3b8
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/DeclCXX.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Allow devirtualization involving array subscripts with constant indices when the pointee type is known [CWG1504] (#207540)
By C++17 [expr.add]/6, if the array element type and the pointee type
are not similar, behavior is undefined.
Commit: 5b169798db9fc312f397e219f54253266fd518f3
https://github.com/llvm/llvm-project/commit/5b169798db9fc312f397e219f54253266fd518f3
Author: Liza Burakova <liza at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/include/__thread/thread.h
Log Message:
-----------
[libc++] Add missing include to thread.h (#208740)
Change #195509 removed unused transitive includes, but missed adding
<__type_traits/is_integral.h> to thread.h. This caused errors
to Chromium rolls for libc++ as they caught the missing import.
Commit: cc048f0d5516923ea29e9887eb92da0456eeb331
https://github.com/llvm/llvm-project/commit/cc048f0d5516923ea29e9887eb92da0456eeb331
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP.h
A flang/include/flang/Semantics/omp-declare-variant.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-variant.cpp
A flang/test/Lower/OpenMP/Todo/declare-variant-structured-trait-property.f90
A flang/test/Lower/OpenMP/Todo/declare-variant-target-device.f90
R flang/test/Lower/OpenMP/Todo/declare-variant.f90
A flang/test/Lower/OpenMP/declare-variant-call.f90
A flang/test/Lower/OpenMP/declare-variant-construct.f90
A flang/test/Lower/OpenMP/declare-variant-device.f90
A flang/test/Lower/OpenMP/declare-variant-implementation.f90
A flang/test/Lower/OpenMP/declare-variant-module.f90
A flang/test/Lower/OpenMP/declare-variant-target-device.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
Log Message:
-----------
[flang][OpenMP] Lowering support for declare variant. (#206988)
Add lowering support for OpenMP DECLARE VARIANT. Each directive is
recorded on its base procedure during the structure checks. During call
lowering, best variant is picked based on recorded selecter and context.
Note: this PR does not include module-file support for DECLARE VARIANT,
so cross-module variant resolution is not yet available; it will be
added in a follow-up PR.
Assisted by: Cursor
Commit: 6c632847812cba9b13a4e9d79187fb0026276521
https://github.com/llvm/llvm-project/commit/6c632847812cba9b13a4e9d79187fb0026276521
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
Log Message:
-----------
[analyzer] Fix stale z3 analyzer-constraints name in test z3-logicalexpr-eval.c (#209185)
z3 was recently renamed to unsupported-z3.
Change the analyzer-constraints to unsupported-z3 in the test file
z3-logicalexpr-eval.c
Commit: 13dcad3571ecf0fb72486a52db9ce2231577a457
https://github.com/llvm/llvm-project/commit/13dcad3571ecf0fb72486a52db9ce2231577a457
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
Log Message:
-----------
[clang][OpenMP][test] Use -fopenmp=libomp explicitly in clang driver test (#209082)
Explicitly pass -fopenmp=libomp in the test to make it robust against
downstream configurations where the default OpenMP runtime is set to
something else (e.g., libgomp). Seems this is in alignment with other
tests in `clang/test/Driver`.
Commit: 03801323f6d9021469c9ece5442c526fc891447a
https://github.com/llvm/llvm-project/commit/03801323f6d9021469c9ece5442c526fc891447a
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/statusline/TestStatusline.py
Log Message:
-----------
[lldb][test] Fix TestStatusline path resolution in symlinked environments (#209083)
Fixes a test timeout in TestStatusline.py introduced in commit
a35565161078 (#208609) when running in environments with symlinked
source paths.
Commit: 3c8b4f94584e6d03e8445a70e9e8d8be7912afb7
https://github.com/llvm/llvm-project/commit/3c8b4f94584e6d03e8445a70e9e8d8be7912afb7
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[analyzer][docs] CSA release notes for clang-23 (#207433)
The commits were gathered using:
```sh
git log --reverse --oneline llvmorg-23-init..llvm/main \
clang/lib/StaticAnalyzer clang/include/clang/StaticAnalyzer | \
grep -v NFC | grep -v OpenACC | grep -v -i revert | grep -v -i "webkit"
```
I used the `LLVM_ENABLE_SPHINX=ON` and `LLVM_ENABLE_DOXYGEN=ON` cmake
options to enable the `docs-clang-html` build target, which generates
the html into `build/tools/clang/docs/html/ReleaseNotes.html` of which I
attach the screenshots to let you judge if it looks all good or not.
I've swapped the PR links to the issue links when a PR was fixing an
open GitHub issue. Those issues anyway have a link to the PR inside.
Assisted-by: Claude Opus 4.8
Commit: 5e98ee7f78dd4febc473e338e929b1646082a4cb
https://github.com/llvm/llvm-project/commit/5e98ee7f78dd4febc473e338e929b1646082a4cb
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
M mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
Log Message:
-----------
[mlir][acc] Preserve shared data operations during if-clause lowering (#208771)
Example:
```fortran
!$acc kernels present(grid, c) if(offload_on)
do nc = 1, grid%rc%ncol
c(1,nc) = 0
end do
c(1,1) = 0
!$acc end kernels
```
In this code, kernels restructuring can create compute constructs that
share data-entry operations with an enclosing data region. If-clause
lowering could rewrite or erase these shared operations, producing
invalid IR or duplicate erasure.
Fix: Preserve externally owned data operations, deduplicate cleanup, and
retain duplicate operand ordering while cloning local operations once.
Commit: 8eb718e1185ff72ff9fb8944b1f3f2f6c8cde292
https://github.com/llvm/llvm-project/commit/8eb718e1185ff72ff9fb8944b1f3f2f6c8cde292
Author: Prajwal KP <prajwal.kp.1817 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandReductions.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
M llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/X86/vector-reduce-fminimum.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
Log Message:
-----------
[ExpandReductions] Expand fmaximum/fminimum reductions (#195169)
fixes #195111
Commit: 3f12bb1f25b88e338679c42ccaea11fe204a0e1c
https://github.com/llvm/llvm-project/commit/3f12bb1f25b88e338679c42ccaea11fe204a0e1c
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Add scs multilib for -fsanitize=shadow-call-stack (#208833)
musl hexagon targets already select msan/asan library variants based on
the sanitizer in use; do the same for shadow-call-stack so that
-fsanitize=shadow-call-stack picks up usr/lib/scs.
Commit: d0ad2c694caf05793b243b0b3a8425c5ef78abdf
https://github.com/llvm/llvm-project/commit/d0ad2c694caf05793b243b0b3a8425c5ef78abdf
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[clang] Reuse driver option strings in CompilerInvocation (#202632)
CompilerInvocation emits a second copy of clang/Options/Options.inc with
OPTTABLE_STR_TABLE_CODE only to implement lookupStrInTable(). The driver
OptTable already owns the identical string table.
On an arm64 Release build, fully stripped standalone clang shrinks from
94,570,224 to 94,537,216 bytes, saving 33,008 bytes (0.035%).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 3ee76834fc9484080eee38964b4ebcb60442c8f8
https://github.com/llvm/llvm-project/commit/3ee76834fc9484080eee38964b4ebcb60442c8f8
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/alloc-aligned-device.fir
A flang/test/Fir/alloc-aligned-omp.fir
A flang/test/Fir/alloc-aligned.fir
M flang/test/Fir/invalid.fir
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/custom-intrinsic.f90
M flang/test/Lower/HLFIR/intrinsic-dynamically-optional.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
Log Message:
-----------
[Flang][Fir] Set default alignment to 64 on inlineAllocation for arrays (#208781)
In https://github.com/llvm/llvm-project/pull/206525 the runtime was set
to default alloctable and pointer arrays to 64byte alignment. In this commit
the inlineallocation case is handled.
The same approach was taken and an alignment attribute was added,
with logic to promote to aligned_alloc or posixMemalign for apple
targets, when requested alignment is greater than 16.
Of note alignof(std::max_align_t)) was not used as the runtime target
may be different than the compile target, so 16 was hardcoded as when to
use aligned_alloc
Assisted-by: Opus 4.8
Commit: bd27a8dd906a0cd5c56fe2117ced98ad6eae14e6
https://github.com/llvm/llvm-project/commit/bd27a8dd906a0cd5c56fe2117ced98ad6eae14e6
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
Log Message:
-----------
[SystemZ][z/OS] Move emission of PPA1 (#208543)
There is an interesting restriction during emission: emitting debug
information closes the text section. As result, emitting the delayed
PPA1 data does not work in the current place together with emitting
debug information. Since the PPA1 information is constant data, the
solution is to emit the data in the target strreamer, in
`emitConstantPools()`.
Commit: 2a74b20bb612c3f6695f30eb3648da33bfcf10a3
https://github.com/llvm/llvm-project/commit/2a74b20bb612c3f6695f30eb3648da33bfcf10a3
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Basic/Attributes.cpp
M clang/unittests/AST/AttrTest.cpp
Log Message:
-----------
[Basic] Fix crash computing the spelling index of an unknown scoped attribute (#208909)
AttributeCommonInfo::getAttributeSpellingListIndex() aborts for an
unknown attribute that has a scope, such as [[ns::foo]]. It calls
calculateAttributeSpellingListIndex(), which runs name/scope
string-switches generated for the known attributes. Those switches
intentionally have no default: getScopeFromNormalizedScopeName() falls
off the end and hits llvm_unreachable ("Fell off the end of a
string-switch") for the unknown scope.
Any caller that asks a scoped unknown attribute for its spelling index
therefore crashes. An unrecognized attribute has no entry in those
tables and carries a single no-spelling, so short-circuit
calculateAttributeSpellingListIndex() for UnknownAttribute and return
index 0 before the switches run.
Add a unit test that constructs an unknown scoped AttributeCommonInfo
and asks for its spelling index; it aborts without the fix.
Commit: 4538987e5e9241af58246df18e625bfd7809cd04
https://github.com/llvm/llvm-project/commit/4538987e5e9241af58246df18e625bfd7809cd04
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M polly/lib/Analysis/ScopDetection.cpp
Log Message:
-----------
[Polly] Cast delinearization terms to matching types (#206711)
#204146 revealed that Polly can call `SCEVDivision::divide` with a
numerator and denominator of different types. I believe such divisions
are not meaningful and should be avoided. As far as I can tell, the root
cause is that `SCEVRemoveMax::rewrite` may collect terms whose types
differ from that of the original expression.
Before this patch, the terms gathered by `SCEVRemoveMax::rewrite` were
used for delinearization as they are. This patch applies
`getTruncateOrSignExtend` to them to matching their types with that of
the original expression.
Commit: 6ce86d47ca095f1f2c911520bc2c845ff09c5fba
https://github.com/llvm/llvm-project/commit/6ce86d47ca095f1f2c911520bc2c845ff09c5fba
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-flat-scratch-svs.mir
Log Message:
-----------
[NFC][AMDGPU] Simplify scratch address materialization in SVS frame index fallback (#208624)
The flat scratch SVS frame index fallback folded the offset in with
V_ADD_U32_e32 writing into FrameReg (an SGPR, an illegal VALU
destination) and added it to FrameReg instead of the scavenged
VGPR used as vaddr, so the offset never reached the address.
This commit asserts that there is no frame register in this block, and
simplifies code accordingly. Correctly materialize the offset into the
scavenged VGPR and emit a scratch instruction in SVS form.
Commit: 6733bc3026401bf84c391301313c7ea131bd9904
https://github.com/llvm/llvm-project/commit/6733bc3026401bf84c391301313c7ea131bd9904
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
Log Message:
-----------
[flang] Replace FlangOMPContext with OmpVariantMatchContext. (#209220)
The `FlangOMPContext` got replaced in 8e8e4e50f501b.
This fixes build after https://github.com/llvm/llvm-project/pull/206988.
Commit: ba61e4d1c110199ef07d7ef4c34c23bcc64b4b54
https://github.com/llvm/llvm-project/commit/ba61e4d1c110199ef07d7ef4c34c23bcc64b4b54
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/divrem24-assume.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
Log Message:
-----------
[AMDGPU] Implement int div/rem by fp recip more efficiently (#204950)
Integer division q = a/b can be implemented by fp reciprocal with:
`fq = fa * recip(fb)`
fq is truncated to produce q. Due to fp rounding and reciprocal accuracy
issues fq can be too small and truncation can produce a value too small
by one.
If abs(a)<=0x400000, this underestimate can be guarded more efficiently
by calculating:
`fq=fa+1ulp/b`
If abs(a)<=0x400000, adding 1 ulp will increase a by at most 0.5, so the
calculated q will be the same. Adding 1ulp can be done with one integer
add.
Incrementing `fa` by 1 ulp was exhaustively tested for all dividend and
divisor combinations with values between [-0x400000,0x3FFFFF] with no
errors.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 9d34596f7338ca057ea94078c31bde6c8c9c60af
https://github.com/llvm/llvm-project/commit/9d34596f7338ca057ea94078c31bde6c8c9c60af
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
Log Message:
-----------
[clang][UncheckedLocalVarsChecker][NFC] Add missing headers (#209217)
After #208855 this fails compiling headers standalone due to incomplete
types, e.g. `error: member access into incomplete type 'ASTContext'`. It
works fine building the `.cpp` files but is not a
[standalone](https://llvm.org/docs/CodingStandards.html#self-contained-headers)
header.
Commit: f56c5d68b19376f27da236456861a462bcd8a973
https://github.com/llvm/llvm-project/commit/f56c5d68b19376f27da236456861a462bcd8a973
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Improve the warning text (#209198)
This PR aligns webkit.UncountedLambdaCapturesChecker and its variant's
warning message with the new warning format in other checkers.
Commit: d2bf3af65d920de29a31f764959d67769f3587c6
https://github.com/llvm/llvm-project/commit/d2bf3af65d920de29a31f764959d67769f3587c6
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Lex/Lexer.cpp
A clang/test/Preprocessor/GH101342.c
Log Message:
-----------
[Clang] Detects invalid unicode characters in token formed by `##` (#208757)
When parsing identifiers with invalid (non-xid_continue), we would emit
a diagnostics and continue, in an effort to improve recovery.
However, in raw mode we would not emit a diagnostic, but still continue.
So identifiers formed in raw mode could be gibberish.
We fixed that by not-continuing on error in raw mode.
Fixes #101342
Commit: c59378289002e1d12d649ef47708b900332141c7
https://github.com/llvm/llvm-project/commit/c59378289002e1d12d649ef47708b900332141c7
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
A clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CodeGenCXX/typeid-most-derived.cpp
Log Message:
-----------
[clang][CodeGen] Evaluate `typeid` operands which are the most derived objects (#208470)
Before this patch, `typeid` operands are not evaluated if they are the
most derived objects.
Before #196544, only `typeid(non-reference-var)` is considered to be the
most derived object, which doesn't have side effects obviously. So there
was no miscompilation.
Fixes #202051.
Commit: 6c5332d2d76df720a441bbbd1b0601f01114b4e3
https://github.com/llvm/llvm-project/commit/6c5332d2d76df720a441bbbd1b0601f01114b4e3
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
Log Message:
-----------
[NFC][AMDGPU] Add tests for eliminateFrameIndex (#208612)
Add MIR tests to cover all instances where a Vgpr needs to be scavenged
and used due to Sgpr scarcity, during elimination of frame indices.
Commit: 9bf20bdfc685477e349f335d1b128403342fc361
https://github.com/llvm/llvm-project/commit/9bf20bdfc685477e349f335d1b128403342fc361
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
M clang/test/Analysis/Scalable/command-line-interface.cpp
M clang/test/Analysis/Scalable/help.cpp
Log Message:
-----------
[clang][ssaf] Add --ssaf-include-local-entities flag (#209225)
This option allows including local entities in summaries.
This means that ContributorFinder can optionally include block-scope
(function-local) variables.
Parameters are intentionally skipped: they are exposed via their parent
function's USR + a parameter-index suffix in getEntityName, so
registering
them as independent contributors would be redundant.
Part §2 of rdar://179151023
Approved in #205351.
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: fd3d20f13f4d29eb99ada5fb9c6c87c6dee6ed17
https://github.com/llvm/llvm-project/commit/fd3d20f13f4d29eb99ada5fb9c6c87c6dee6ed17
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcilo-addr-regimm26.ll
Log Message:
-----------
[RISCV] Add SelectAddrRegImm26 isel complex pattern for Xqcilo 26-bit load/store (#207363)
Introduce a dedicated SelectAddrRegImm26 ComplexPattern for the Qualcomm
Xqcilo large-offset load/store instructions (qc.e.lw/qc.e.sw), whose
offset
field is 26 bits wide, and use it in the QC48LdPat/QC48StPat patterns
instead
of the generic AddLike + simm26_nosimm12 match.
SelectAddrRegImm26 handles addresses of the form:
- simm12 offsets are left to the standard (shorter/compressible)
load/store.
- 26-bit (non-simm12) offsets fold directly into qc.e.lw/qc.e.sw.
- Offsets just outside the 26-bit range are split with ADDI plus a
folded 26-bit remainder.
Assisted by claude
Commit: 38033e2c2316dbb264264d9fb8be5c3b543b5c1e
https://github.com/llvm/llvm-project/commit/38033e2c2316dbb264264d9fb8be5c3b543b5c1e
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[clang][ssaf][NFC] Add unittests for PointerFlow and UnsafeBufferUsage about local entities (#209227)
Part §6 of rdar://179151023
Depends on #209225.
Approved in #205351.
---------
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 15d8e43e7d1efa0d0a86589e1e2c28dbe011e226
https://github.com/llvm/llvm-project/commit/15d8e43e7d1efa0d0a86589e1e2c28dbe011e226
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Analyses/CallGraph/CallGraphExtractor.cpp
A clang/test/Analysis/Scalable/call-graph-local-entities.cpp
A clang/test/Analysis/Scalable/local-entities.cpp
Log Message:
-----------
[clang][ssaf] Add FIXME that CallGraphExtractor does not honor IncludeLocalEntities (#209228)
Currently, CallGraph extractor does not honor IncludeLocalEntities and
it emits entities for block-scope callees - irrespective of what the
option is set to, such as:
- function-local declared lambdas
- function-local declared classes and their member functions
The new test file ensures that PointerFlow and UnsafeBufferUsage honors
the IncludeLocalEntities option.
Part §3 and §5 of rdar://179151023
Depends on #209225 and #209227.
Approved in #205351.
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: c5d5988520d90c77dfc279e86b1e052703d86960
https://github.com/llvm/llvm-project/commit/c5d5988520d90c77dfc279e86b1e052703d86960
Author: Rito Takeuchi <licht-t at outlook.jp>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
A llvm/test/Transforms/LoopVectorize/X86/idiv-by-const.ll
A llvm/test/Transforms/SLPVectorizer/X86/idiv-by-const.ll
Log Message:
-----------
[X86][CostModel] Add vXi64 divide/remainder-by-constant costs (#208491)
### What this does
Follow-up to #206983, which lowered `vXi64` `MULHU`/`MULHS`. Modified
the cost model to enable the vectorization:
1. `SDIV`/`SREM` for `v4i64`/`v8i64`, gated on AVX512DQ
`MULHS`'s low multiply is `vpmullq`. Without DQ, it scalarizes and can
be a performance regression. So, this PR adds
`AVX512DQ{UniformConst,Const}` tables which are consulted before the
AVX512/AVX2 ones. Then, non-DQ targets fall through to the scalarized
cost.
2. `UDIV`/`UREM` for `v4i64`/`v8i64` in the AVX2 and AVX512
For `UREM`, the multiply-back in the remainder `x - (x/C)*C` is a single
`vpmullq` with DQ, but another `vpmuludq` schoolbook without it. So, the
cheap DQ `UREM` entries in `AVX512DQ{UniformConst,Const}` overrides more
expensive AVX512/AVX2 ones.
Part of #37771.
### AI Usage Disclosure
This PR was prepared with the assistance of Claude Code.
Commit: 28366bc273fb734027a10dad2a6245665ac138f6
https://github.com/llvm/llvm-project/commit/28366bc273fb734027a10dad2a6245665ac138f6
Author: Luan Rabelo <96793857+Lu4nScr1pt1ng at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Sema/enum.c
Log Message:
-----------
[clang] [Sema] Widen enumerators that overflow a _BitInt type (C23) (#208230)
When an enumerator has no explicit value and the previous enumerator has
a
_BitInt type whose maximum is reached, incrementing should widen to a
suitably sized standard integer type (C23 6.7.3.3p12 excludes
bit-precise
types from the widening). Clang instead kept the _BitInt type and let
the
value wrap around, with a misleading "not representable in the largest
integer type" warning.
The problem is in getNextLargerIntegralType: it compared candidate types
against the storage size of the previous type. A _BitInt(33) is stored
in
64 bits, so no standard type looked larger and the widening never
happened.
Comparing against the value width (getIntWidth) fixes it: the enumerator
now gets the next standard type that can hold the value, and the
behavior
matches GCC (verified against GCC 15.2).
For standard integer types getIntWidth equals getTypeSize, so this
changes
behavior only for bit-precise types.
The new tests in enum.c check the widened type and the value from inside
the enum definition, like the reproducer in the issue; they fail without
this change. Incrementing the max of a _BitInt(64) still warns, since no
standard type can hold that value, and that case is covered too.
Fixes #208163
Commit: 46951909a77676a30a285e60426ff897684703c1
https://github.com/llvm/llvm-project/commit/46951909a77676a30a285e60426ff897684703c1
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
R clang/test/CodeGen/SystemZ/zos-check-lanuage.c
Log Message:
-----------
Revert "Write original source language when writing and reading AST (#208115)" (#209230)
This reverts commit 695238ffaa64ac8f49e7da36d36c5170509007cc.
The new test is flaky, see comment on
https://github.com/llvm/llvm-project/pull/208115
Commit: 1d9a3c069b0b882e6651ece3f05bcb492c66567b
https://github.com/llvm/llvm-project/commit/1d9a3c069b0b882e6651ece3f05bcb492c66567b
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 9bf20bd (#209238)
This fixes 9bf20bdfc685477e349f335d1b128403342fc361.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=9bf20bdfc685477e349f335d1b128403342fc361
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 633be471e811aea4c258afe4280db82393b4c484
https://github.com/llvm/llvm-project/commit/633be471e811aea4c258afe4280db82393b4c484
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
Revert "[CMake] Use minimum python version of 3.8 everywhere" (#209233)
Reverts llvm/llvm-project#208822.
We should avoid raising toolchain requirements immediately before
branching. Revert this now so it can be reapplied after branching.
Commit: c4076b002b072c73f781b191ae0ccc6c075df1d7
https://github.com/llvm/llvm-project/commit/c4076b002b072c73f781b191ae0ccc6c075df1d7
Author: Madhur Kumar <152476790+MadhurKumar004 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Combine rcp(sqrt(x)) into rsq for pseudo-scalar instructions (#198785)
This fixes "TODO: GlobalISel should generate v_s_rsq." give in file
"llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll"
Commit: ecf41975d04e0a7f5bb0d62dbafa7da6e4c9e3a3
https://github.com/llvm/llvm-project/commit/ecf41975d04e0a7f5bb0d62dbafa7da6e4c9e3a3
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/test/Verifier/arbitrary-fp-convert.ll
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[Verifier] Clarify supported storage bit width for apfloat conversions (#209174)
Allow i4 for FP4, i6 for FP6 and i8 for FP8.
Assisted-by: Claude Code Opus 4.8
Commit: 62facd1645b504c95f2a82dd8a211f1c23e13b07
https://github.com/llvm/llvm-project/commit/62facd1645b504c95f2a82dd8a211f1c23e13b07
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-debuginfod-find/timeout.test
Log Message:
-----------
[llvm][HTTP] Relax check for timeout error message (#209240)
When LLVM used curl to do HTTP requests, the timeout test failed even
though the request correctly timed out
(https://github.com/llvm/llvm-project/pull/188969#issuecomment-4960193683).
On curl, we prepend the error with `curl_easy_perform() failed: `
whereas with WinHTTP, the error is fixed as "Timeout was reached".
This PR relaxes the check to allow for the prefix in the curl case.
Commit: 83e914e56acb7795875be41bcbe9c7c036e897c4
https://github.com/llvm/llvm-project/commit/83e914e56acb7795875be41bcbe9c7c036e897c4
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[offload][test] Add fallback to legacy AMDGPU triple library dir (#209131)
After the amdgcn-amd-amdhsa -> amdgpu-amd-amdhsa rename, look up the
device runtime libraries in the legacy directory when the runtime was
built under the old triple name.
Claude assisted with this patch.
Commit: 3122e20cfc7c1b8d103b435ecba27fc3172cb581
https://github.com/llvm/llvm-project/commit/3122e20cfc7c1b8d103b435ecba27fc3172cb581
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
Log Message:
-----------
[OpenACC] add isEffectivelySerial() to acc.parallel and acc.kernels (#209192)
Mirror the isEffectivelySerial() function in acc.compute_region to
acc.parallel and acc.kernel so this check is unified anywhere it needs
to be used, namely before ACCComputeLowering. Should be NFC
Commit: 690aacbf9d15569ec26843d6367f5cf6d5b26969
https://github.com/llvm/llvm-project/commit/690aacbf9d15569ec26843d6367f5cf6d5b26969
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/ptrtoaddr.ll
Log Message:
-----------
[GVN] Reuse dominating PtrToInt for PtrToAddr. (#209164)
A ptrtoaddr and a ptrtoint of the same pointer compute the same value
when the address width equals the pointer representation width. Reuse
a dominating ptrtoint in place of a ptrtoaddr.
This fixes a few end-to-end regressions with
https://github.com/llvm/llvm-project/pull/180244.
PR: https://github.com/llvm/llvm-project/pull/209164
Commit: f3671a14e499e376709fb68ae6b2bdd76fe91fdc
https://github.com/llvm/llvm-project/commit/f3671a14e499e376709fb68ae6b2bdd76fe91fdc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/cmake/caches/FlangOffload.cmake
M offload/cmake/caches/Offload.cmake
Log Message:
-----------
[AMDGPU] Fix cache files and builds after amdgcn->amdgpu conversion (#209247)
Summary:
Quite important that this works before the fork. The problem is that
CMake takes the string literally while rewriting it to amdgpu/
internally so the amdgcn/ directories do not appear.
Commit: 9cfd0411138b33ea11bfce22e41cd026e92120ca
https://github.com/llvm/llvm-project/commit/9cfd0411138b33ea11bfce22e41cd026e92120ca
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-chained.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
A llvm/test/Transforms/LoopVectorize/interleaved-accesses-dead-member.ll
M llvm/test/Transforms/LoopVectorize/versioning-dead-load.ll
Log Message:
-----------
[VPlan] Don't bail creating interleave group if it has dead members (#208415)
This is an alternative to both #203555 and #205584.
To recap the issue:
1) The legacy cost model has the invariant that all CM_Interleave
widened groups will eventually be converted to a VPInterleaveGroup, so
it marks the addresses as uniform.
2) After #190191 a CM_Interleave isn't guaranteed to be converted to a
VPInterleaveGroup if it has dead members, and it breaks this assumption
in 1). So addresses aren't properly widened due to the uniform
assumption.
Rather than try to fix up the address, this just maintains the invariant
that a CM_Interleave will become a VPInterleaveGroup by not skipping
over groups with dead members.
While there's slightly less code involved, the main benefit of this
approach vs the others is that it keeps generating interleaved groups
instead of falling back to gathers/scatters, so we don't get a codegen
regression against 22.x.
Co-authored-by: Mel Chen <mel.chen at sifive.com>
Commit: ddd76138de9630eb018de68ef5cc0c9f486cb659
https://github.com/llvm/llvm-project/commit/ddd76138de9630eb018de68ef5cc0c9f486cb659
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/zext-add-nsw-fold.ll
Log Message:
-----------
[SCEV][NFC] Add tests for generalized A + zext(C + X) fold (#209219)
Related to #208778
Commit: 7dd8867515732d1bc4a837edf6fe0658189398d3
https://github.com/llvm/llvm-project/commit/7dd8867515732d1bc4a837edf6fe0658189398d3
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/cmake/modules/AddLLDB.cmake
Log Message:
-----------
[lldb] Enforce usage of LINK_COMPONENTS and CLANG_LIBS (#208860)
LINK_COMPONENTS and CLANG_LIBS exist to correctly support the LLVM/Clang
dylib build configuration. Failure to enforce this will break LLDB when
built against libLLVM.dylib.
Commit: fa4cbcd7e8b912a85f96c61b6d6e332822d22e7e
https://github.com/llvm/llvm-project/commit/fa4cbcd7e8b912a85f96c61b6d6e332822d22e7e
Author: Fabian Parzefall <parzefall at meta.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/DIE.h
M llvm/unittests/CodeGen/DIETest.cpp
Log Message:
-----------
[CodeGen] Fix IntrusiveBackList::deleteNode (#207783)
Issue #207411 reported that IntrusiveBackList::deleteNode does not
delete the correct node if the deleted node is the last node of the
list. Fix by not short circuiting on `Last == &N`.
Additionally, fix three other minor defects: (1) Do not loop infinitely
if node is not in list. Check for sentinel edge. (2) Reset intrusive
list on deleted node to point to itself with sentinel edge. (3) Avoid
multiple template instantiations of the implementation of deleteNode by
moving it to its base class.
Closes #207411.
Commit: 54a1ef1cceb90ac9db6639d0a400afef1328995b
https://github.com/llvm/llvm-project/commit/54a1ef1cceb90ac9db6639d0a400afef1328995b
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Report PHI as opcode in getOpcodeOrIntrinsicID (#209250)
Avoid reporting Instruction::PHI as an intrinsic ID, fixing a bug
exposed in downstream CHERIoT.
Reported-by: Owen Anderson <resistor at mac.com>
Commit: de754b87a6c57b7d5ebb4cbd0fd9ef0c8ba7512d
https://github.com/llvm/llvm-project/commit/de754b87a6c57b7d5ebb4cbd0fd9ef0c8ba7512d
Author: Umang Yadav <29876643+umangyadav at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/RocmRuntimeWrappers.cpp
Log Message:
-----------
[MLIR][ROCm] Build mlir_rocm_runtime STANDALONE (#205651)
Build `mlir_rocm_runtime` as a standalone runtime library by removing
its last
source-level dependency on LLVM support utilities.
`mlir_rocm_runtime` is intended to be loaded dynamically by tools such
as
`mlir-runner` via `--shared-libs`. However, `add_mlir_library` links
`LLVMSupport` by default unless the target is marked `STANDALONE`. The
ROCm
runtime was previously left on `DISABLE_PCH_REUSE` as a workaround
because
`RocmRuntimeWrappers.cpp` still used `llvm::SmallVector` and
`llvm::ArrayRef`
inside `mgpuMemHostRegisterMemRef`.
This patch replaces that small LLVM ADT use with equivalent plain C++
logic and
marks `mlir_rocm_runtime` `STANDALONE`, matching the CUDA runtime.
## Motivation
This follows the direction from prior upstream changes:
-
[`4edc9e2acf1d`](https://github.com/llvm/llvm-project/commit/4edc9e2acf1d9350ce4da77c93e8869f774a24e2)
/
[D108684](https://reviews.llvm.org/D108684), by Uday Bondhugula, removed
the
same `SmallVector`/`ArrayRef` dependency from CUDA's
`mgpuMemHostRegisterMemRef`, noting that the dependency on `LLVMSupport`
adds
unnecessary complexity for external users linking or loading the
runtime.
-
[`351ae0ca550c`](https://github.com/llvm/llvm-project/commit/351ae0ca550c791b0c504dfb7dcb4fd08480d98b)
/
[#182850](https://github.com/llvm/llvm-project/pull/182850) made several
dlopen-able MLIR runtime libraries `STANDALONE`, including
`mlir_cuda_runtime`, and left `mlir_rocm_runtime` on `DISABLE_PCH_REUSE`
only
because it still depended on `LLVMSupport`.
-
[`78f259fcc14b`](https://github.com/llvm/llvm-project/commit/78f259fcc14bb0a567d45ba394fcde48de2bc299)
/
[#182942](https://github.com/llvm/llvm-project/pull/182942) applied the
same
cleanup pattern to `mlir_levelzero_runtime` by removing a small
remaining LLVM
dependency and marking the runtime `STANDALONE`.
With the remaining LLVM ADT use removed from the ROCm wrapper, the
workaround is
no longer needed.
## Testing
Verified and tested downstream in rocMLIR.
No new upstream test is added. This is a build/linkage cleanup for a
runtime
library that is already exercised by the ROCm integration tests when
`MLIR_ENABLE_ROCM_RUNNER` is enabled.
The rewritten dense-stride computation in `mgpuMemHostRegisterMemRef` is
equivalent to the previous implementation and matches the existing CUDA
runtime
implementation.
## AI Assistance Disclosure
Assisted-by: GPT-5.5
I reviewed the generated content and verified the changes before
submitting,
including testing them downstream in rocMLIR.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 84804d9a0bd7fcdaf8d218d3385b58d012c1129e
https://github.com/llvm/llvm-project/commit/84804d9a0bd7fcdaf8d218d3385b58d012c1129e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/AArch64/expand-vector-rot.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/funnel-shift-rot.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/ARM/funnel-shift-rot.ll
M llvm/test/CodeGen/Mips/funnel-shift-rot.ll
M llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll
M llvm/test/CodeGen/PowerPC/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
Log Message:
-----------
[LegalizeTypes] Improve promotion of variable rotates. (#208610)
If the promoted type is at least 2x the original type, we can
concat the value with itself into the promoted bits and use a
shl/srl. This is easier than negating the shift amount for the
(or (shl), (srl)) expansion. This is what we do for promoting
funnel shifts and really a rotate is a special case of funnel shift.
Commit: 6a91acc642db38a6e214f1b917882c75d6fb728b
https://github.com/llvm/llvm-project/commit/6a91acc642db38a6e214f1b917882c75d6fb728b
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Lower/OpenMP/declare-mapper-hermetic.f90
Log Message:
-----------
[flang][OpenMP] Keep hermetic embedded module parse tree alive (#207491)
Fix a use-after-free when lowering materializes an imported declare mapper or
declare reduction owned by a module embedded in a hermetic module file
(-fhermetic-module-files).
ModFileReader::Read resolved the embedded modules from a local parser::Program
that was destroyed when Read returned, leaving the symbols resolved from it
dangling. MapperDetails and UserReductionDetails hold raw parse-tree pointers, so
a consumer that later materializes such an imported declaration dereferenced
freed memory.
Retain the embedded parse tree in the SemanticsContext with SaveParseTree, as the
primary module's tree already is, so those pointers stay valid through lowering.
The new test covers materializing an imported declare mapper from an embedded
module.
Assisted-by: Claude Opus 4.8, GPT-5.5.
Commit: 3688619bd98b36a72da219cec5f44ecbe4bbfa97
https://github.com/llvm/llvm-project/commit/3688619bd98b36a72da219cec5f44ecbe4bbfa97
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/OpenMP/declare-reduction-operator-modfile-reexport.f90
Log Message:
-----------
[flang][OpenMP] Do not emit a use-only item for an operator reduction in a module file (#207492)
Stop writing a module file that cannot be re-parsed (reading it crashes) when a
module re-exports a USE-associated user-defined operator declare reduction.
Such a reduction is represented by an internal symbol whose name is the mangled
operator (e.g. "op.remote." or "op.+"), which is not valid Fortran. The
module-file writer emitted it as a `use MODULE, only: op.remote.` item, which the
reader cannot parse. This affected both a plain re-export facade and an embedded
module in a hermetic module file.
Skip the use-only item for a reduction whose operator is itself re-exported (a
defined operator, or an intrinsic operator with a user interface): the reduction
is re-exported implicitly with that operator, which is emitted, and the reduction
resolver recovers it from there (FindUserReductionSymbol). This covers a
derived-type `operator(+)` reduction as well as a defined operator like
`.remote.`.
The test checks the re-exporting module file round-trips and that a consumer
reading it resolves the reduction through the operator.
Assisted-by: Claude Opus 4.8, GPT-5.5.
Commit: 67ebc4b221c3e94028b33004cd5cd08deee95048
https://github.com/llvm/llvm-project/commit/67ebc4b221c3e94028b33004cd5cd08deee95048
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M .github/workflows/release-binaries-all.yml
Log Message:
-----------
workflows/release-binaries-all: Test PRs that modify build_llvm_release.bat (#208769)
Commit: eb5bc2694a05229bb9270eb141cd8fa499a185c1
https://github.com/llvm/llvm-project/commit/eb5bc2694a05229bb9270eb141cd8fa499a185c1
Author: Emmett <emmettzhang2020 at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__memory/unique_ptr.h
A libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/non_pointable.single.verify.cpp
Log Message:
-----------
[libc++][unique_ptr] Implement LWG 4144: Disallow unique_ptr<T&, D> (#209018)
Implement [LWG 4144](https://cplusplus.github.io/LWG/issue4144) by
explicitly rejecting `unique_ptr<T, D>` when `T*` is not a valid type.
This adds a pointability check and tests reference and abominable
function types.
Fixes #118359
Commit: 7633d1e7a0f33630e6d10c5640bf4ad35dc2c23d
https://github.com/llvm/llvm-project/commit/7633d1e7a0f33630e6d10c5640bf4ad35dc2c23d
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/CMakeLists.txt
R clang-tools-extra/clang-doc/markdown/CMakeLists.txt
R clang-tools-extra/clang-doc/markdown/Markdown.cpp
R clang-tools-extra/clang-doc/markdown/Markdown.h
M clang-tools-extra/unittests/clang-doc/CMakeLists.txt
R clang-tools-extra/unittests/clang-doc/MarkdownParserTest.cpp
Log Message:
-----------
[clang-doc] Remove Markdown library implementation (#209257)
The current implementation is unsatisfactory in many ways, and it is now
unclear if development of this library will continue any time soon. To
reduce maintenance and build cost, we should just remove it now before
the branch point, and come up with a more thoughtful design that
addresses the requirements for clang and clang-doc more completely.
This reverts commit cc048e80b670a5262500612069d1c2d065b53f15 and commit
b6976d223eeb40091685e3b20e9c41f42f6bd6e0.
Commit: cc615d117c7f942a508ceecedd519f2fe9921493
https://github.com/llvm/llvm-project/commit/cc615d117c7f942a508ceecedd519f2fe9921493
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
Log Message:
-----------
[clang][Sema] Function effect analysis was missing the implicit call to the destructor in a CXXDeleteExpr. (#184460)
Co-authored-by: Doug Wyatt <dwyatt at apple.com>
Commit: 9c8bdc79908f9b34207caa738185f877b6cae93e
https://github.com/llvm/llvm-project/commit/9c8bdc79908f9b34207caa738185f877b6cae93e
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-doc/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 7633d1e (#209268)
This fixes 7633d1e7a0f33630e6d10c5640bf4ad35dc2c23d.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=7633d1e7a0f33630e6d10c5640bf4ad35dc2c23d
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 172464f2b665bd169658fbafb10e61c1882042ff
https://github.com/llvm/llvm-project/commit/172464f2b665bd169658fbafb10e61c1882042ff
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
R clang/test/Interpreter/emulated-tls.cpp
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
Log Message:
-----------
Revert "Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (#208413)" (#209260)
This causes the failures on various CIs with various archs a day before
branching.
Commit: 39fefb706834fa8e171b0c699b6e91e4d4a0d831
https://github.com/llvm/llvm-project/commit/39fefb706834fa8e171b0c699b6e91e4d4a0d831
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/AArch64/elf-pauthabi.c
M clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/CodeGenCXX/pfp-memcpy.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/basic-pic.ll
M llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/elf-globals-pic.ll
M llvm/test/CodeGen/AArch64/extern-weak.ll
M llvm/test/CodeGen/AArch64/got-abuse.ll
M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
M llvm/test/CodeGen/AArch64/ptrauth-elf-got-function-symbols.ll
M llvm/test/CodeGen/AArch64/tagged-globals-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-static.ll
Log Message:
-----------
[PAC][clang] Fix ptrauth module flags behavior (#204226)
The `Error` merge behavior only has effect when module flags values
mismatch, while it allows the flag being present in one module and
absent in another one. Thus, we were previously incorrectly treating
modules as compatible in case of presence of
`ptrauth-elf-got`/`ptrauth-sign-personality` in one module (meaning the
corresponding ptrauth feature is enabled) and its absence in another
module (meaning the corresponding ptrauth feature is disabled). Similar
problem was present for `aarch64-elf-pauthabi-{platform|version}` flags
as well.
This patch introduces the following.
1. Always emit `ptrauth-elf-got` module flag for AArch64 ELF targets and
`ptrauth-sign-personality` module flag for AArch64 Linux targets. The
value of the flags is either 0 or 1.
2. Always emit `aarch64-elf-pauthabi-platform` and
`aarch64-elf-pauthabi-version` module flags for AArch64 Linux targets
(with `aarch64-elf-pauthabi-platform` set to
`AARCH64_PAUTH_PLATFORM_LLVM_LINUX` constant). Previously, these were
only emitted with `aarch64-elf-pauthabi-version != 0` (0 value stands
for no ptrauth features enabled). To keep emitted binaries unchanged in
case of version value of 0, this case is filtered out by backend in
`AArch64AsmPrinter::emitStartOfAsmFile`.
Commit: d7063b00431358c0202a04e67f4824e20244b26f
https://github.com/llvm/llvm-project/commit/d7063b00431358c0202a04e67f4824e20244b26f
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a crash on triple-bracket input like `[[[a]]` (#199103)
## Summary
`clang-format` aborts on triple-bracket input like `[[[a]]` with
`Assertion 'Left.isNot(tok::l_square)' failed.` This patch fixes the
crash by rejecting the C++ attribute classification when the candidate
`[[` is itself preceded by another `[`.
## Solution
Add one defensive check to `isCppAttribute` that mirrors the existing
ObjC-array-literal exclusion: bail out when `Tok.Previous` is another
`[`.
Fixes #199010
Commit: c3452bee412e97178ab04b924300f3953b4690f5
https://github.com/llvm/llvm-project/commit/c3452bee412e97178ab04b924300f3953b4690f5
Author: lntue <lntue at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/ErrnoSetterMatcher.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/madvise_test.cpp
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/mremap_test.cpp
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
M libc/test/src/sys/socket/linux/sendrecvmmsg_test.cpp
M libc/test/src/sys/socket/linux/socketopt_test.cpp
M libc/test/src/sys/socket/linux/socketpair_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
Log Message:
-----------
[libc] Update some syscall tests to be more tolerance to QEMU behaviors. (#208920)
Also expand ErrnoSetterMatcher to allow multiple errnos.
This will allow us to enable riscv64 qemu precommit CI.
To be revisited next year to see whether those are still needed by then:
https://github.com/llvm/llvm-project/issues/209273
Assisted-by: Gemini 3.5 Flash
Commit: 69c3406d985a1d15bf537574c1a217f2b72b578e
https://github.com/llvm/llvm-project/commit/69c3406d985a1d15bf537574c1a217f2b72b578e
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-libc-runtime.py
M offload/ci/openmp-offload-amdgpu-runtime.py
Log Message:
-----------
[OpenMP][AMDGPU][CI] Update build scripts for AMDGPU bots (#209274)
This should fix the error in bot:
https://lab.llvm.org/buildbot/#/builders/10/builds/31765
Commit: a9804ae41bceff2f169affa5b35506606a965880
https://github.com/llvm/llvm-project/commit/a9804ae41bceff2f169affa5b35506606a965880
Author: arhwx <arahwrm at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
A clang/test/SemaCXX/atomic-constexpr.cpp
Log Message:
-----------
[clang] Fix crash on subobject access through _Atomic in constant evaluation (#208923)
`findSubobject()` didn't look through `AtomicType` while walking a
designator, so reaching a subobject of an object wrapped in `_Atomic`
crashed: a null `CXXRecordDecl` deref for base classes (the segfault in
the issue) and a `cast<RecordType>` assertion for fields. The value of
an atomic object is already represented like a value of the underlying
type, so it's enough to look through the wrapper before dispatching on
the subobject kind.
The crash goes back to clang 9, and the new bytecode interpreter already
handles this correctly, but the test covers both evaluators anyway, at
C++14 (the earliest standard that can hit the crash) and at C++20 (so
`constinit` can verify the initializers are indeed constant).
Fixes #203328
Commit: f049aa1e9bc071fdf366baec337baa970b6b23c4
https://github.com/llvm/llvm-project/commit/f049aa1e9bc071fdf366baec337baa970b6b23c4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
clang: Remove dead getConflictOffloadArchCombination virtual (#209271)
Commit: 3e1d5e38bd9383001a6a2abff2e0fdcdf1e8313f
https://github.com/llvm/llvm-project/commit/3e1d5e38bd9383001a6a2abff2e0fdcdf1e8313f
Author: Akshat Dalal <adalal at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-float.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-int.ll
A llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-volatile-align.ll
Log Message:
-----------
[LowerMatrixIntrinsics] Preserve volatile and alignment when flattening loads (#205759)
The dot-product flatten path rebuilt a matrix.column.major.load with
Builder.CreateLoad, dropping the volatile flag and the load's specified
alignment. Dropping volatile is a miscompile, and falling back to the
type's default ABI alignment can over-claim and fault on
alignment-sensitive targets.
We should instead use CreateAlignedLoad with the intrinsic's volatile
operand and getAlignForIndex, matching the non-fused load lowering in
loadMatrix() (the standard LowerColumnMajorLoad path), which already
preserves both.
Commit: ecac7b9e48cdc98f71c7c40c05055f7ebc652d98
https://github.com/llvm/llvm-project/commit/ecac7b9e48cdc98f71c7c40c05055f7ebc652d98
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/test/API/lit.cfg.py
M lldb/test/CMakeLists.txt
M lldb/test/Shell/lit.cfg.py
Log Message:
-----------
[lldb][Windows] Default to lldb-server when libxml2 is available (#209258)
Select the debugging backend based on libxml2 availability, which is
required to parse the gdb-remote target description XML.
At runtime, `ProcessWindows::ShouldUseLLDBServer()` now honors an
explicit `LLDB_USE_LLDB_SERVER` environment variable if set, and
otherwise defaults to lldb-server when `LLDB_ENABLE_LIBXML2` is on,
falling back to the in-process Windows process plugin when it is not.
In the test suite, `LLDB_TEST_USE_LLDB_SERVER` now defaults to `ON` when
building on Windows with libxml2 available. The lit configs set
`LLDB_USE_LLDB_SERVER` explicitly to 1 or 0 so the test configuration is
authoritative regardless of the compiled-in default.
rdar://174236280
Commit: 9879da4f929d7948fc27af56cde0bc85f1d919e3
https://github.com/llvm/llvm-project/commit/9879da4f929d7948fc27af56cde0bc85f1d919e3
Author: Dan Bonachea <dobonachea at lbl.gov>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/docs/FortranStandardsSupport.md
Log Message:
-----------
[flang][docs] Document multi-image support status (#209025)
Update `flang/docs/FortranStandardsSupport.md` to reflect the current
state of multi-image (coarray) feature support.
The previous list of multi-image features was incomplete, and several
multi-image features added in F2008 were inaccurately listed in the
F2018 section.
Recent PRs adding functionality now reflected in this document include:
* #205847
* #192944
* #182110
Older (pre-22) PRs adding functionality that was not previously
mentioned include:
* #154081
* #154166
Commit: eb3275a0c3808d2705969c7570675346737b31b8
https://github.com/llvm/llvm-project/commit/eb3275a0c3808d2705969c7570675346737b31b8
Author: David Green <david.green at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc-bf16.ll
Log Message:
-----------
[AArch64] Lower fixed width bf16 fpext (#209194)
This was previously hitting an error with a illegal
FP_EXTEND_MERGE_PASSTHRU being created but not selectable. Split
bf16->f64 fpext into bf16->f32 and f32->f64 fpext as we do elsewhere
(the first step has no rounding).
The codegen for loads is pretty inefficient because the load gets
expanded / scalarized.
Commit: 6bbd5a18f672a4e6cd19e2e2763d6877dd5f3832
https://github.com/llvm/llvm-project/commit/6bbd5a18f672a4e6cd19e2e2763d6877dd5f3832
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/abi_tag_on_virtual.cpp
M libcxx/test/tools/clang_tidy_checks/empty_namespaces.cpp
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/test/tools/clang_tidy_checks/hide_from_abi.cpp
M libcxx/test/tools/clang_tidy_checks/libcpp_module.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_adl.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_operator_ampersand.cpp
M libcxx/test/tools/clang_tidy_checks/uglify_attributes.cpp
Log Message:
-----------
[libcxx] Avoid including deprecated ClangTidyModuleRegistry.h (#208945)
Deprecated in 1bcf74006bcf528d14377173dba459759d35c961. Causes warnings
during compilation and will presumably become an error.
Commit: 612e7ca85c53e85a7444bfc23e763a756a50f69a
https://github.com/llvm/llvm-project/commit/612e7ca85c53e85a7444bfc23e763a756a50f69a
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
R clang/include/clang/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.h
A clang/include/clang/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
R clang/lib/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.cpp
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary-bad-id.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary-no-key.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-bad-id.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-empty.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-no-key.json
R clang/test/Analysis/Scalable/OperatorNewDelete/operator-new-delete.cpp
R clang/test/Analysis/Scalable/OperatorNewDelete/tu-summary-serialization.test
R clang/test/Analysis/Scalable/OperatorNewDelete/wpa-result-serialization.test
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/tu-summary-bad-id.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/tu-summary-no-key.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/tu-summary.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/wpa-result-bad-id.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/wpa-result-empty.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/wpa-result-no-key.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/tu-summary-serialization.test
A clang/test/Analysis/Scalable/TypeConstrainedPointers/type-constrained-pointers.cpp
A clang/test/Analysis/Scalable/TypeConstrainedPointers/wpa-result-serialization.test
R clang/unittests/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointersExtractorTest.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointersExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
Log Message:
-----------
[SSAF][NFC] Rename operator new/delete pointers analysis to TypeConstrainedPointers (#208577)
There will be more such pointer entities that must retain their type
during the clang-reforge transformation. Since they are extracted and
processed similarly, combining them into a single analysis simplifies
maintenance. Therefore, we are using TypeConstrainedPointers as the
umbrella name.
Commit: 7753c44fc3132e58ae3ee928958d51e2be6735e9
https://github.com/llvm/llvm-project/commit/7753c44fc3132e58ae3ee928958d51e2be6735e9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
Log Message:
-----------
clang/AMDGPU: Remove StringSwitch over r600 aliases (#209256)
This will route to getArchNameR600 which should already handle
all the aliases.
Commit: 41388b1d74d4fa973db029de6ef89c03149bcb19
https://github.com/llvm/llvm-project/commit/41388b1d74d4fa973db029de6ef89c03149bcb19
Author: lntue <lntue at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[libc] Add riscv64 qemu precommit CI for overlay mode. (#192816)
Commit: 76a21c86af48dc1f0c0fbcca33145c26a2ef328b
https://github.com/llvm/llvm-project/commit/76a21c86af48dc1f0c0fbcca33145c26a2ef328b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A .github/workflows/libcxx-benchmark-commit.yml
Log Message:
-----------
[libc++] Add a workflow to run libc++ benchmarks on historical commits (#208080)
This allows triggering a workflow that benchmarks a given commit on both
macOS and Linux, and optionally submits the results to a LNT instance
(by default lnt.llvm.org).
Triggering this workflow requires write access to the LLVM monorepo, so
the inputs can be trusted to a large extent.
The intent is for this workflow to be triggered semi-automatically by a
combination of scripts and manual intervention. For example, we can
reuse a script like libcxx/utils/ci/lnt/commit-watch to automatically
trigger the workflow on new commits, while also requesting new commits
when bisecting regressions, etc. Since workflows can be dispatched via
the Github API, this should easily be scriptable.
A few important improvements are currently missing from this workflow
and left for future patches:
- The ability to select only a subset of configurations to run
- Additional configurations, such as unstable ABI, hardening, etc.
Commit: 3287d11199c644193cbf5829d3786aec41723d28
https://github.com/llvm/llvm-project/commit/3287d11199c644193cbf5829d3786aec41723d28
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
Log Message:
-----------
[libc++] Switch PR benchmark job to llvm-premerge-libcxx-runners (#209267)
Like #208928 but for the PR benchmarking job.
Commit: 2987984f1ec8f019f99c0f9f6de1930b609caba2
https://github.com/llvm/llvm-project/commit/2987984f1ec8f019f99c0f9f6de1930b609caba2
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/include/limits.yaml
M libc/include/llvm-libc-macros/limits-macros.h
Log Message:
-----------
[libc] Define NAME_MAX in limits.h (#209296)
Defines the POSIX macro `NAME_MAX`. Will be used by `realpath` tests.
Commit: c09fc4b786a3a49c350cecc696e21473c86ba330
https://github.com/llvm/llvm-project/commit/c09fc4b786a3a49c350cecc696e21473c86ba330
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/utils/libcxx/test/dsl.py
Log Message:
-----------
[libcxx][test] Fingerprint the compiler when memoizing results (#208311)
This fixes a cache invalidation problem with flag support checks when
rebasing & re-building the just-built clang.
Commit: 9367769576a73771e227a0921b2103792c5a69a9
https://github.com/llvm/llvm-project/commit/9367769576a73771e227a0921b2103792c5a69a9
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M lld/docs/ReleaseNotes.rst
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[docs] Add ARM64X release notes (NFC) (#209249)
Commit: d90f3050c354b264c7156b8180b9ec1ab09c14c7
https://github.com/llvm/llvm-project/commit/d90f3050c354b264c7156b8180b9ec1ab09c14c7
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.h
M clang/lib/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.cpp
M clang/test/Analysis/Scalable/TypeConstrainedPointers/type-constrained-pointers.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointersExtractorTest.cpp
Log Message:
-----------
[SSAF][TypeConstrainedPointers] Add pointer parameters of 'main' as constrained pointers (#208578)
Similar to some pointer entities of operator new/delete overload
functions, pointer type parameters of the main function shall also
retain its type during clang-reforge transformation.
rdar://179151882
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: acbc7e571c3aa6f23672f84f5ea76cd41345a3a2
https://github.com/llvm/llvm-project/commit/acbc7e571c3aa6f23672f84f5ea76cd41345a3a2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
Log Message:
-----------
clang/AMDGPU: Validate -target-cpu in cc1 is valid for the subarch (#206481)
Restrict the reported list of valid target-cpus based on the triple's
subarch. This is more consistent with how other targets validate the
target CPU name. Currently we have split handling validating the target
name for the triple in both the driver and here. The driver based
diagnostic seems to be an amdgpu-ism in 2 different places (though there
is one arm validation emitting the same diagnostic). In the future we could
probably drop those.
Commit: 0661f6636a0a5a79635e99d98a239c2bba4ea2ed
https://github.com/llvm/llvm-project/commit/0661f6636a0a5a79635e99d98a239c2bba4ea2ed
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsReduction.h
M mlir/lib/Dialect/OpenACC/Utils/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsReduction.cpp
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCUtilsReductionTest.cpp
Log Message:
-----------
[mlir][acc] Add reduction utilities for acc to gpu lowering (#209316)
In preparation for the pass that converts `acc.compute_region` to GPU
dialect, this PR adds several utilities which are used in that pass
related to reductions. Doing so to simplify review and to ensure that
unit testing is added for the utilities.
---------
Co-authored-by: Scott Manley <rscottmanley at gmail.com>
Commit: 51b2a5de73637e7d93cc066ced669d5db2bd8775
https://github.com/llvm/llvm-project/commit/51b2a5de73637e7d93cc066ced669d5db2bd8775
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Fix incorrect shift mask on variable shift instructions. (#209293)
The instructions are defined to read 5 bits regardless of element size.
I think we will also need to change the C intrinsics to allow 5 bit
shift amounts, but we can do that in a separate patch.
Commit: 4743729038650237f094073ad92edaa524a9261f
https://github.com/llvm/llvm-project/commit/4743729038650237f094073ad92edaa524a9261f
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 0661f66 (#209319)
This fixes 0661f6636a0a5a79635e99d98a239c2bba4ea2ed.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=0661f6636a0a5a79635e99d98a239c2bba4ea2ed
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5801213a1baaa750dd2c0152ca0e5288d447d908
https://github.com/llvm/llvm-project/commit/5801213a1baaa750dd2c0152ca0e5288d447d908
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Check loop pred & invariance before SCEV query (NFC) (#209314)
Move cheap checks (check for loop predecessor and invariance) before
more expensive SCEV queries.
This slightly reduces the number we need to unnecessarily construct SCEV
expressions.
Commit: 8d251a44830c869feb7d7d1db4fec8474f5a7ca8
https://github.com/llvm/llvm-project/commit/8d251a44830c869feb7d7d1db4fec8474f5a7ca8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV][P-ext] Move v2i16 and v4i8 extract_subvector handling to tablegen. NFC (#208863)
Commit: c6ebd7a2ced7fa3c984a857d6dcb433d95dd014d
https://github.com/llvm/llvm-project/commit/c6ebd7a2ced7fa3c984a857d6dcb433d95dd014d
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
R clang-tools-extra/clang-doc/MDMustacheGenerator.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/basic-project.test
M clang-tools-extra/test/clang-doc/md/array-type.cpp
M clang-tools-extra/test/clang-doc/md/builtin_types.cpp
M clang-tools-extra/test/clang-doc/md/class-partial-specialization.cpp
M clang-tools-extra/test/clang-doc/md/comments-in-macros.cpp
M clang-tools-extra/test/clang-doc/md/enum.cpp
M clang-tools-extra/test/clang-doc/md/function-pointer-type.cpp
M clang-tools-extra/test/clang-doc/md/member-function-pointer-type.cpp
M clang-tools-extra/test/clang-doc/md/namespace.cpp
M clang-tools-extra/test/clang-doc/md/nested-pointer-qualifiers.cpp
M clang-tools-extra/test/clang-doc/md/templates.cpp
M clang-tools-extra/unittests/clang-doc/CMakeLists.txt
R clang-tools-extra/unittests/clang-doc/MDGeneratorTest.cpp
Log Message:
-----------
[clang-doc] Remove deprecated Markdown generator (#209071)
Commit: dd77cf572833b0ee31b9516d83cfcc0af932604d
https://github.com/llvm/llvm-project/commit/dd77cf572833b0ee31b9516d83cfcc0af932604d
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/test/Interpreter/pch-pic-mismatch.cpp
Log Message:
-----------
[Clang][Interpreter] Fix pch-pic-mismatch for darwin platforms (#209183)
Darwin enforce PIC by default and ignores all -fno-pic option. We calls
cc1 directly as its PIC level is 0 by default. This fixes the new
introduced test pch-pic-mismatch.cpp
Commit: c70795ccd5f74aad7f3af9490f8b12a92c39c709
https://github.com/llvm/llvm-project/commit/c70795ccd5f74aad7f3af9490f8b12a92c39c709
Author: Farid Zakaria <fmzakari at fb.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCTargetOptions.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
A llvm/test/CodeGen/AArch64/large-eh-encoding.ll
A llvm/test/CodeGen/X86/large-eh-encoding.ll
A llvm/test/MC/AArch64/large-eh-encoding.s
A llvm/test/MC/X86/large-eh-encoding.s
Log Message:
-----------
[MC][CodeGen] Add --large-eh-encoding flag for x86_64 & Aarch64 ELF (#174508)
Add a --large-eh-encoding option that forces 8-byte (DW_EH_PE_sdata8)
pointer encodings for all x86_64 & aarch64 ELF EH sections: FDE CFI
encoding, personality, LSDA, and TType encodings.
This is useful for large binaries where .text may exceed 2GB, causing
relocation overflows in .eh_frame and .gcc_except_table even under the
small or medium code model. The cost is purely in section size (a few
extra bytes per FDE/LSDA entry) with no runtime performance impact.
Commit: 2dcec161f68761495cbd24f50cb0f9277600a5ac
https://github.com/llvm/llvm-project/commit/2dcec161f68761495cbd24f50cb0f9277600a5ac
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[ProfileData] Remove clear() from SampleProfileFuncOffsetTable (NFC) (#209301)
This patch deletes the default constructor of
SampleProfileFuncOffsetTable and removes its clear() method.
SampleProfileFuncOffsetTable is designed to lock its operational mode
(in-memory or on-disk) strictly at construction time and remain valid
throughout its lifetime. By deleting the default constructor and
removing clear(), we ensure that an instance never enters an
uninitialized or cleared state while kept alive.
When SampleProfileReader needs to discard or reload the table, it
resets and replaces the wrapping std::optional directly instead of
clearing the table in-place.
Assisted-by: Antigravity
Commit: 2d142ad3b6c3c105356ead9575c7998c924fc64b
https://github.com/llvm/llvm-project/commit/2d142ad3b6c3c105356ead9575c7998c924fc64b
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/Host.h
M lldb/source/Host/common/Host.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
Log Message:
-----------
[lldb/Host] Add `foreground` argument to `Host::OpenFileInExternalEditor` (#209331)
Add an optional `bool foreground` parameter to
`Host::OpenFileInExternalEditor` so callers can choose whether opening
the file should bring the editor to the foreground.
The macOS implementation maps `foreground=true` to omitting
`kLSLaunchDontSwitch` in the Launch Services flags, so the editor is
brought forward on launch. On non-Apple platforms the stub still returns
`ENOTSUP`; the new parameter is added to its signature so it matches the
declaration.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: d8636be51e34eb221054b1f70f0c73a901849f31
https://github.com/llvm/llvm-project/commit/d8636be51e34eb221054b1f70f0c73a901849f31
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsGPU.h
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsGPU.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsGPUTest.cpp
Log Message:
-----------
[mlir][acc] Add utilities for acc to gpu lowering (#209313)
In preparation for the pass that converts `acc.compute_region` to GPU
dialect, this PR adds several utilities which are used in that pass.
Doing so to simplify review and to ensure that unit testing is added for
each of the utilities.
Commit: 96ad6fc9e86d7cb2dbd0ad1646b40219fd6a8fda
https://github.com/llvm/llvm-project/commit/96ad6fc9e86d7cb2dbd0ad1646b40219fd6a8fda
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
M mlir/lib/Dialect/OpenACC/Analysis/OpenACCSupport.cpp
Log Message:
-----------
[mlir][acc] Add inline implementation for emitNYI (#209337)
Commit: d3e11d415a7dd7b594a023830df71500a272a8ca
https://github.com/llvm/llvm-project/commit/d3e11d415a7dd7b594a023830df71500a272a8ca
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-libc-runtime.py
Log Message:
-----------
[OpenMP][AMDGPU][CI] Fix libc build (#209336)
This PR attempts to fix the error:
```
llvm-lit: /home/botworker/builds/openmp-offload-amdgpu-runtime-2/llvm.src/llvm/utils/lit/lit/discovery.py:273: warning: input '/home/botworker/builds/openmp-offload-amdgpu-runtime-2/build/llvm.build/runtimes/runtimes-amdgpu-amd-amdhsa-bins/libc/test' contained no tests
error: did not discover any tests for provided path(s)
```
According to lib/test/CMakeList.txt, we need to set
`CMAKE_CROSSCOMPILING_EMULATOR` to avoid early return in the cmake. It
only changes the build script instead of the parent cmake cache file.
Not sure if this is the optimal solution, but it works for us.
Commit: 71a5f82e6dcd2d544d594c21a0bebb35af621ee5
https://github.com/llvm/llvm-project/commit/71a5f82e6dcd2d544d594c21a0bebb35af621ee5
Author: Mike Kruskal <mkruskal at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_nolibc.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/test/sanitizer_common/TestCases/Linux/dlopen_image_base.c
Log Message:
-----------
[compiler-rt] [sanitizer_common] Fix SIGSEGV in ForEachMappedRegion for DSOs with custom image base (#206299)
`ForEachMappedRegion` processes dynamic linker map entries to track
loaded segments. However, it assumes map->l_addr is the address of the
ELF header. For DSOs linked with a custom preferred image base offset
(e.g. -Wl,--image-base=0x4000000), `map->l_addr` contains the relocation
bias: `map->l_addr = actual_load_address - preferred_base`
In this case, map->l_addr points below the first loaded segment in
unmapped or PROT_NONE memory. Doing a read dereference at this address
triggers a SIGSEGV. Add a call to dladdr() on the dynamic section
pointer map->l_ld to obtain the true ELF header base address.
Likely fixes #84482 - which looks like the exact same stacktrace I was
debugging that led me to this fix
Also looks it may have shown up in #21068 - my case was also flaky, and
it only shows up if you build the so with custom base address
Assisted-by: Gemini
Commit: 311c23c1c611c8677f2131943f24884e0bce7e9d
https://github.com/llvm/llvm-project/commit/311c23c1c611c8677f2131943f24884e0bce7e9d
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/Attributor.cpp
Log Message:
-----------
[Attributor][NFC] Drop unused arg `AG` from runAttributor*OnFunctions (#209103)
Commit: 68d6e2a5c3991bb87ac65958bd044d268b1f6c30
https://github.com/llvm/llvm-project/commit/68d6e2a5c3991bb87ac65958bd044d268b1f6c30
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/source/Utility/Listener.cpp
Log Message:
-----------
[lldb] update the listener logs (#195850)
Add the event mask the listener is waiting for.
Commit: b5314610b4f318a3986069f3abc65eb6cf3a86fe
https://github.com/llvm/llvm-project/commit/b5314610b4f318a3986069f3abc65eb6cf3a86fe
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/include/clang/Basic/PointerAuthOptions.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/CodeGen/ptrauth-init-fini.c
M clang/test/CodeGen/ptrauth-module-flags.c
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.h
A llvm/test/CodeGen/AArch64/ptrauth-init-fini-autoupgrade.ll
M llvm/test/CodeGen/AArch64/ptrauth-init-fini.ll
Log Message:
-----------
[AArch64][PAC] Handle signing of init/fini pointers in AsmPrinter (#193087)
Move signing of the contents of `@llvm.global_(ctors|dtors)` from Clang
frontend to the AsmPrinter at the end of the backend pipeline.
Signing of the pointers to init/fini functions in the backend fixes
registration of the constructors and destructors performed by the
optimizer or the backend.
This commit introduces two new module flags, `ptrauth-init-fini` and
`ptrauth-init-fini-address-discrimination`, mirroring corresponding
Clang options. The flags are semantically boolean, an absent flag is
treated as having the `false` value and the latter flag requires the
former one. The particular constant discriminator to use is not
configurable via module flags and is hardcoded to the value 0xD9D4 in
the `llvm/lib/Target/AArch64/AArch64PointerAuth.h` file.
Commit: 4d7e653b523027ffb67a6ee7e439392431cbee2d
https://github.com/llvm/llvm-project/commit/4d7e653b523027ffb67a6ee7e439392431cbee2d
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsGPUTest.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsReductionTest.cpp
Log Message:
-----------
[mlir][acc] Fix leaks in cg unit tests (#209339)
Newly added tests are failing valgrind --leak-check=full:
https://github.com/llvm/llvm-project/pull/209313
https://github.com/llvm/llvm-project/pull/209316
This PR resolves the problem by ensuring that the insertion point is set
into an operation that is owned and deleted by the test.
Commit: 14f8cccd02974067d81b173551bc301a33e26429
https://github.com/llvm/llvm-project/commit/14f8cccd02974067d81b173551bc301a33e26429
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/CXX/drs/cwg5xx.cpp
Log Message:
-----------
[clang] Trivial: fix test followup to #208586 (#209340)
Removes the spell-check disable from `clang/test/CXX/drs/cwg5xx.cpp`,
works around spell check noise by renaming a declaration instead.
Commit: 89fc46ec511681a8fa56974295525d960538b88c
https://github.com/llvm/llvm-project/commit/89fc46ec511681a8fa56974295525d960538b88c
Author: Richard Smith <richard at metafoo.co.uk>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
Log Message:
-----------
Exclude libc math C++ builtins from compiler-rt Bazel overlay (#208861)
In CMake, addtf3.cpp is only compiled when COMPILER_RT_USE_LIBC_MATH is
ON, replacing addtf3.c. In the Bazel overlay, builtins_generic_srcs
globbed all lib/builtins/*.cpp without excluding addtf3.cpp, causing
compile failures when not using libc math.
Assisted-by: Gemini via Antigravity
Commit: 25d50e7a0fe4cf42ca9351fc95528ac3e3c7a463
https://github.com/llvm/llvm-project/commit/25d50e7a0fe4cf42ca9351fc95528ac3e3c7a463
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
R lldb/include/lldb/Interpreter/Interfaces/ScriptedStopHookInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.h
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.cpp
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Unify `ScriptedStopHookInterface` with `ScriptedHookInterface` (#209341)
`ScriptedHookInterface` already carries a `HandleStop` entry point, so
`ScriptedStopHookInterface` is a proper subset. Delete
`ScriptedStopHookInterface`, `ScriptedStopHookPythonInterface`, and
`ScriptInterpreter::CreateScriptedStopHookInterface`, and route
`Target::StopHookScripted` through `ScriptedHookInterface` /
`CreateScriptedHookInterface` instead.
The `target stop-hook add -P <classname>` command is unchanged; it now
constructs a `ScriptedHookInterface` internally, so any existing
`ScriptedStopHook` subclass keeps working as long as it exposes a
`handle_stop` method. New scripts should subclass `ScriptedHook`
directly (which is a superset).
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 2609cdb07323adac773a1a77e42eb294cd1b815d
https://github.com/llvm/llvm-project/commit/2609cdb07323adac773a1a77e42eb294cd1b815d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFPassRegistry.def
Log Message:
-----------
[BPF][NewPM] Port SelectionDAG ISel
Similar to MSP430 (f122acf2d0b8c806bfa7be81aea0344bfd6fc225).
This is part of getting BPF to work with the NewPM.
Reviewers: yonghong-song, aeubanks, eddyz87
Pull Request: https://github.com/llvm/llvm-project/pull/207638
Commit: a718d2ad092bec5b7fe81e043ad276cb6ae97a50
https://github.com/llvm/llvm-project/commit/a718d2ad092bec5b7fe81e043ad276cb6ae97a50
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.h
M llvm/lib/Target/BPF/CMakeLists.txt
Log Message:
-----------
[BPF][NewPM] Introduce BPFCodeGenPassBuilder
Part of the transition to the NewPM for CodeGen. Similar to
f122acf2d0b8c806bfa7be81aea0344bfd6fc225.
Reviewers: eddyz87, yonghong-song, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/207643
Commit: f4d2c6e772e60a05a915b6ecda1bf12e8dd6c2d3
https://github.com/llvm/llvm-project/commit/f4d2c6e772e60a05a915b6ecda1bf12e8dd6c2d3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
M llvm/lib/Target/BPF/BPFPassRegistry.def
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/test/CodeGen/BPF/sink-min-max.ll
Log Message:
-----------
[BPF][NewPM] Port bpf-check-and-opt-ir
Standard pass porting. Part of the effort to make BPF work solely with
the new pass manager.
Reviewers: eddyz87, aeubanks, yonghong-song
Pull Request: https://github.com/llvm/llvm-project/pull/207787
Commit: ce5291e94b55bfb7d3bedd4d82684f50f9782847
https://github.com/llvm/llvm-project/commit/ce5291e94b55bfb7d3bedd4d82684f50f9782847
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
M llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
M llvm/lib/Target/BPF/BPFPassRegistry.def
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
Log Message:
-----------
[BPF][NewPM] Port BPFMISimplifyPatchablePass
Standard pass porting. Needed to get the BPF backend fully working with
the NewPM.
Reviewers: aeubanks, eddyz87, yonghong-song
Pull Request: https://github.com/llvm/llvm-project/pull/207800
Commit: e7831765ca43e689d66a6e1fea6ac19edd7cc8c7
https://github.com/llvm/llvm-project/commit/e7831765ca43e689d66a6e1fea6ac19edd7cc8c7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFPassRegistry.def
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
Log Message:
-----------
[BPF][NewPM] Port BPFMIPeephole
Standard pass porting. Needed to make BPF work fully with the NewPM.
Reviewers: eddyz87, yonghong-song, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/207805
Commit: 618b65a268a5f0df6405a18cad876f63e5721739
https://github.com/llvm/llvm-project/commit/618b65a268a5f0df6405a18cad876f63e5721739
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
Log Message:
-----------
[BPF] Split stack argument psuedo expansion into a separate pass
This will make the NewPM implementation cleaner given now the two passes
are either required/optional rather than like BPFMIPreEmitPeepholePass
before, which was partially required (for stack argument psuedo
expansion), and optional for other peephole optimizations. I think this
is also a cleaner design in general.
Reviewers: aeubanks, eddyz87, yonghong-song
Pull Request: https://github.com/llvm/llvm-project/pull/207844
Commit: a5c6a7a6a172fc47e0c608497d7e0fe1166474c1
https://github.com/llvm/llvm-project/commit/a5c6a7a6a172fc47e0c608497d7e0fe1166474c1
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/docs/CMakeLists.txt
A lldb/examples/python/templates/scripted_breakpoint.py
A lldb/examples/python/templates/scripted_hook.py
Log Message:
-----------
[lldb/script] Add scripted extension base-class templates for hooks and breakpoint resolvers (#209311)
This patch adds the Python base-class templates for `ScriptedHook` (a
unified base class that backs both `target hook add -P` and `target
stop-hook add -P`) and `ScriptedBreakpointResolver`, and wires them into
the Python bindings and docs CMake so every scriptable extension kind
has a template that the docs and future tooling can introspect.
The `ScriptedHook` template unifies what used to require separate
subclasses for target hooks and stop hooks: subclasses implement
`handle_stop` (required, so any hook is a valid stop-hook) and
optionally `handle_module_loaded` / `handle_module_unloaded`, which only
fire for hooks registered via `target hook add -P`.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 670816cf58027f1bfea39ec0745b415bea0275a9
https://github.com/llvm/llvm-project/commit/670816cf58027f1bfea39ec0745b415bea0275a9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFPassRegistry.def
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
Log Message:
-----------
[BPF][NewPM] Port BPFMIExpandStackArgPseudosPass
Standard pass porting. Required to get BPF fully working with the NewPM.
Reviewers: eddyz87, aeubanks, yonghong-song
Pull Request: https://github.com/llvm/llvm-project/pull/207845
Commit: 6cde0bcec417016c82329d55401b0717de65f36d
https://github.com/llvm/llvm-project/commit/6cde0bcec417016c82329d55401b0717de65f36d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFPassRegistry.def
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
Log Message:
-----------
[BPF][NewPM] Port BPFMIPreEmitPeepholePass
Standard pass porting. This is needed for BPF to fully support the new
pass manager.
Reviewers: eddyz87, yonghong-song, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/207847
Commit: 07a4eac758af73bf58b5ec9653a4950187774a18
https://github.com/llvm/llvm-project/commit/07a4eac758af73bf58b5ec9653a4950187774a18
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
M llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFPassRegistry.def
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
Log Message:
-----------
[BPF][NewPM] Port BPFMIPreEmitCheckingPass
Standard pass porting. Needed to make BPF fully support the NewPM.
Reviewers: yonghong-song, aeubanks, eddyz87
Pull Request: https://github.com/llvm/llvm-project/pull/207850
Commit: 7a756ba8edc8f762b26999008debd62103f8e267
https://github.com/llvm/llvm-project/commit/7a756ba8edc8f762b26999008debd62103f8e267
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.h
M llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
Log Message:
-----------
[BPF][NewPM] Port AsmPrinter
This is necessary to make the new pass manager fully supported for BPF.
This should be the last patch in the series.
Reviewers: yonghong-song, arsenm, eddyz87
Pull Request: https://github.com/llvm/llvm-project/pull/207854
Commit: 252ad2052409a33eff59a149053ec90f7fae03df
https://github.com/llvm/llvm-project/commit/252ad2052409a33eff59a149053ec90f7fae03df
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M compiler-rt/lib/gwp_asan/optional/backtrace_linux_libc.cpp
Log Message:
-----------
[compiler-rt][GWP-ASan] Use no-op backtrace if execinfo.h missing (#201266)
Guard backtrace_linux_libc.cpp with __has_include(<execinfo.h>) so that
targets without it (e.g. musl libc) get null stubs instead of a build
failure.
Commit: 2b8488ac148f06657aa6ec18f1ee38c79b241635
https://github.com/llvm/llvm-project/commit/2b8488ac148f06657aa6ec18f1ee38c79b241635
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[BPF][ProfCheck] Exclude sink-min-max.ll (#209352)
This was exposed by porting the pass to the NewPM, so just exclude it
for now.
Commit: 4058610aecb6d261f3ea1777dd5c0e531a5cc17e
https://github.com/llvm/llvm-project/commit/4058610aecb6d261f3ea1777dd5c0e531a5cc17e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
Log Message:
-----------
[Hexagon] Register MachineKCFILegacy pass in LLVMInitializeHexagonTarget (#209245)
Hexagon's target-init function never called
initializeMachineKCFILegacyPass(PR), unlike X86, ARM, AArch64, and
RISCV. Since PassRegistry is process-wide and each target's init
function registers passes as a side effect when linked into the same
binary, whether test/CodeGen/Hexagon/kcfi.ll passed depended on whether
some other target providing that registration was also built into llc,
rather than on Hexagon's own configuration.
Commit: e2c8fa09872cfacba7f73599dcf8557971ebe865
https://github.com/llvm/llvm-project/commit/e2c8fa09872cfacba7f73599dcf8557971ebe865
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Object/ArchiveWriter.cpp
A llvm/test/tools/llvm-ar/zos-write.test
M llvm/tools/llvm-ar/llvm-ar.cpp
Log Message:
-----------
[SystemZ][z/OS] Add z/OS archive writing support (#200087)
This patch implement z/OS archive writing in ArchiveWriter and adds the
option `llvm-ar --format=zos`.
Moreover, This patch teaches `llvm-ar` to emit z/OS-compatible archives
by:
- Detecting GOFF object files as z/OS members
- Writing z/OS member headers and archive magic
- Converting archive headers and symbol-name string tables to EBCDIC
- Emitting z/OS symbol table entries
- Using EBCDIC newline padding bytes
- Add a z/OS-specific workaround for empty symbol tables by emitting a
dummy blank symbol to satisfy binder requirements.
Commit: 6e5c97d417d1ec16c095aba6630995406dde1d87
https://github.com/llvm/llvm-project/commit/6e5c97d417d1ec16c095aba6630995406dde1d87
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/AllocAction.h
R orc-rt/lib/executor/AllocAction.cpp
M orc-rt/lib/executor/CMakeLists.txt
M orc-rt/lib/executor/SimpleNativeMemoryMap.cpp
M orc-rt/test/unit/AllocActionTest.cpp
M orc-rt/test/unit/CommonTestUtils.h
Log Message:
-----------
[orc-rt] Hoist run-alloc-actions functions, add error reporting. (#209356)
Hoist runFinalizeActions and runDeallocActions into AllocAction.h and
turn them into function templates with a ReportErrorFn argument that
enables error reporting. This is used to report errors from dealloc
actions.
Update SimpleNativeMemoryMap to direct such errors to the Session via
ReportErrorsViaSession.
Add unit tests covering the new error-reporting paths.
Commit: 0c19355a6b3e88fcb98a398845735c6ae19a2142
https://github.com/llvm/llvm-project/commit/0c19355a6b3e88fcb98a398845735c6ae19a2142
Author: Nicolas Miller <nicolas.pierre.miller at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/test/CodeGen/Hexagon/autohvx/conv-fp-fp.ll
Log Message:
-----------
[Hexagon] Fix fpround fp32 -> fp16 pattern (#199704)
The pattern was passing hi and lo in the wrong order to `vcvt` causing
the final output after `vdeal` to be incorrect.
Commit: 5b3fbf852e5d72d3a78ff4646a8ddad3c8d50536
https://github.com/llvm/llvm-project/commit/5b3fbf852e5d72d3a78ff4646a8ddad3c8d50536
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Core/PluginManager.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFrameProviderPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPythonInterface.h
M lldb/test/Shell/Commands/command-scripting-extension-list.test
Log Message:
-----------
[lldb] Expand ScriptedExtension coverage across scripted Python interfaces (NFC) (#209307)
Commit: 795a5a9a19bb2b356d82a46426d95f245d1d0049
https://github.com/llvm/llvm-project/commit/795a5a9a19bb2b356d82a46426d95f245d1d0049
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
Log Message:
-----------
[flang][cuda] Implicitly attribute allocatables/pointers under -gpu=unified (#209292)
When `-gpu=unified` is in effect, allocatables and pointers with no
explicit CUDA data attribute were left with no data attribute, and were allocated
as ordinary host memory. Under unified memory, such objects must be
reachable from the device; leaving them as plain host allocations makes device kernels
fault on systems that do not provide transparent host-memory access.
The existing code here already assigned `Managed` implicitly under
`-gpu=managed` (when CUDA Fortran is enabled). This extends that handling to
`-gpu=unified`: prefer the `Unified` attribute where it is legal (host subprogram, main
program, or derived-type component) so generic resolution still selects the unified
specific, and fall back to `Managed` elsewhere (module scope, device
subprograms). Both attributes route allocation through the same managed
allocator, so this keeps the allocation device-accessible while avoiding
spurious `ATTRIBUTES(UNIFIED)` legality errors.
The attribution stays gated on CUDA Fortran being enabled, preserving
the existing behavior for non-CUDA-Fortran translation units.
Commit: b15f9326d21cbd05463fcb34d989bae95982cc9b
https://github.com/llvm/llvm-project/commit/b15f9326d21cbd05463fcb34d989bae95982cc9b
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A flang/test/Evaluate/fold-kind-logical.f90
A flang/test/Evaluate/fold-kind-substring.f90
A flang/test/Evaluate/fold-kind-zero-size.f90
M flang/test/Evaluate/logical-args.f90
A flang/test/Lower/HLFIR/array-ctor-character-kind.f90
A flang/test/Semantics/modfile84.F90
A flang/test/Semantics/substring-literal-kind.f90
Log Message:
-----------
[flang] Add kind-preservation regression tests (#208760)
These tests pin currently-correct behaviors where the KIND type
parameter of a result must be preserved by constant folding, semantics,
and lowering. They all pass at head; their purpose is to guard against
silent kind loss during future refactoring of the Evaluate library's
type-parameterized machinery (see the discussion on PR #206907, where an
experimental rewrite passed check-flang while dropping kinds in several
places).
Folded LOGICAL operations: `.NOT./.AND./.OR./.EQV./.NEQV.` keep their
operand kind; ANY/ALL/PARITY and logical DOT_PRODUCT results have the
MASK/argument kind (F2023 16.9.14/16.9.16/16.9.148), including for empty
masks where there is no element value to take a kind from; MERGE and
TRANSFER keep the TSOURCE/MOLD kind; STORAGE_SIZE of folded
non-default-kind logicals folds to the right value; the default BOUNDARY
fill element of a folded EOSHIFT has the array's kind; relational
results are default logical regardless of operand kinds; and generic
resolution over LOGICAL kinds is unchanged by folding
(flang/test/Evaluate/fold-kind-logical.f90 and an extension of
flang/test/Evaluate/logical-args.f90).
Empty typed array constructors and zero-size PACK/SPREAD/RESHAPE/UNPACK
results keep the kind (and character length) of their type-spec (F2023
7.8), including across a module file into a separately compiled
consumer, and empty non-default-kind character array constructors lower
with the correct `!fir.char` element type
(flang/test/Evaluate/fold-kind-zero-size.f90,
flang/test/Semantics/modfile84.F90,
flang/test/Lower/HLFIR/array-ctor-character-kind.f90).
A substring of a character literal has the kind of the literal (F2023
9.4.1): KIND() and LEN() fold correctly, and concatenation with a
same-kind literal is accepted
(flang/test/Evaluate/fold-kind-substring.f90,
flang/test/Semantics/substring-literal-kind.f90).
Assisted-by: AI
Commit: b959f7886f0fdbf8f683c11e945cca3f1afca36a
https://github.com/llvm/llvm-project/commit/b959f7886f0fdbf8f683c11e945cca3f1afca36a
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/lit/lit/builtin_commands/cat.py
Log Message:
-----------
Add text file support for z/OS back in (#209259)
Support for auto conversion of text files was added to cat.py in
https://github.com/llvm/llvm-project/pull/90128. That was accidently
removed in https://github.com/llvm/llvm-project/pull/204711 while
removing some old win32 code. This adds the z/OS support back in.
Commit: 67f5b53995d3e8ce0b062ea73be1fbb9186d6b30
https://github.com/llvm/llvm-project/commit/67f5b53995d3e8ce0b062ea73be1fbb9186d6b30
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lld/test/ELF/retain-symbols-file.s
Log Message:
-----------
[ELF,test] Improve retain-symbols-file.s (#209366)
Commit: f18e59a195eb253573a26c118d3a09a83acb73ca
https://github.com/llvm/llvm-project/commit/f18e59a195eb253573a26c118d3a09a83acb73ca
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_nolibc.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/test/sanitizer_common/TestCases/Linux/dlopen_image_base.c
Log Message:
-----------
Revert "[compiler-rt] [sanitizer_common] Fix SIGSEGV in ForEachMappedRegion for DSOs with custom image base" (#209371)
Reverts llvm/llvm-project#206299 due to buildbot breakage
(https://github.com/llvm/llvm-project/pull/206299#issuecomment-4964804971)
Commit: c4edd8bde42cf6b1a25839601b75f3865bba6976
https://github.com/llvm/llvm-project/commit/c4edd8bde42cf6b1a25839601b75f3865bba6976
Author: ejose02 <ejose at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/Object/IRSymtab.h
A llvm/test/Object/X86/irsymtab-large-common.ll
M llvm/test/Object/X86/irsymtab.ll
Log Message:
-----------
[Object] Fix irsymtab CommonSize truncation past 4 GiB (#209085)
Fixes #208669
Issue :
With -flto, Fortran COMMON blocks larger than 4 GiB were silently
miscompiled. The linker reserved only the low 32 bits of the declared
size, so stores past that boundary could segfault with no diagnostic.
Root Cause :
storage::Uncommon::CommonSize in the LTO irsymtab was stored as 32-bit
(Word). Sizes above 2^32 bytes were truncated when the symtab was
written and read back at link time.
Fix :
Widen CommonSize to 64-bit and bump irsymtab format version to 4. Added
test to verify symtab records the full size.
Commit: a527c6f0bc9644cf8b13a9fb5a43e81257bedba6
https://github.com/llvm/llvm-project/commit/a527c6f0bc9644cf8b13a9fb5a43e81257bedba6
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M orc-rt/lib/executor/Logging.cpp
Log Message:
-----------
[orc-rt] Statically check logging category/level name array sizes. (#209372)
Add static_asserts to trigger compilation failure if the sizes of these
arrays don't match their respective enum/macro value ranges.
Commit: a70234b00d12aaa7723eb2ae5e8efe3348aeeb37
https://github.com/llvm/llvm-project/commit/a70234b00d12aaa7723eb2ae5e8efe3348aeeb37
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
A flang/test/Driver/function-attr-readonly.f90
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/Intrinsics/dconjg.f90
M flang/test/Lower/Intrinsics/dimag.f90
M flang/test/Lower/Intrinsics/dreal.f90
M flang/test/Lower/OpenMP/optional-argument-map.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/achar.f90
M flang/test/Lower/arguments.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/dispatch.f90
A flang/test/Lower/dummy-argument-readonly.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/unsigned-ops.f90
M flang/test/Lower/volatile1.f90
A flang/test/Transforms/function-attrs-readonly.fir
Log Message:
-----------
[flang] Propagate INTENT(IN) dummy arguments as readonly (#207732)
Mark eligible `INTENT(IN)` dummy data objects with a `fir.read_only`
argument attribute during lowering, and teach `FunctionAttr` to
translate the marker to LLVM `readonly` for reference arguments when
optimizing for speed.
LLVM FunctionAttrs can infer `readonly` later in the pipeline, but this
happens too late for IPSCCP function specialization.
`FunctionSpecializer::promoteConstantStackValues` requires
`onlyReadsMemory()` before promoting constant by-reference scalar
arguments. Providing `readonly` satisfies this check and allows these
arguments to be promoted, enabling function specialization, including in
non-LTO builds.
For direct-data arguments, restrict propagation to by-reference
non-character intrinsic scalars. Ordinary arrays and derived-type
arguments are excluded because compiler-generated copy-out may write
back through a forwarded dummy argument. LLVM `readonly` does not permit
such writes, even when the stored value is unchanged.
`INTENT(IN)` `POINTER` and `ALLOCATABLE` dummies are supported with
shallow descriptor semantics: `readonly` protects the descriptor
storage, but does not imply that data addressed by the descriptor is
read-only. In particular, a `POINTER` target may still be modified.
Keep `readonly` handling independent from `noalias` and `nocapture`.
`TARGET` arguments may receive `readonly`, but must not receive
`noalias` or `nocapture`. Apply `readonly` to `BIND(C)` definitions
while leaving external C declarations unannotated. `VALUE`,
`ASYNCHRONOUS`, and `VOLATILE` dummy arguments remain excluded.
In our measurements, the enabled function specialization gives a 1.5x
speedup on 548.exchange2 on NVIDIA Neoverse V2 in a non-LTO
configuration.
Update existing lowering tests to account for the new `fir.read_only`
argument attribute, and add focused coverage:
* `dummy-argument-readonly.f90` checks marker emission for supported
scalar and descriptor arguments, excluded cases, and shallow pointer
semantics.
* `function-attrs-readonly.fir` checks translation from `fir.read_only`
to LLVM `readonly`, including `TARGET`, `BIND(C)`, and descriptor
references.
* `function-attr-readonly.f90` checks the optimization-level pipeline
gate and verifies that `readonly` reaches final LLVM IR.
* `call-copy-in-out.f90` checks that ordinary array copy-out cases
remain unmarked and that pointer-target copy-out is compatible with
shallow descriptor `readonly`.
Commit: 44a42e631e5b4e01855750c371dea87fb3927550
https://github.com/llvm/llvm-project/commit/44a42e631e5b4e01855750c371dea87fb3927550
Author: Peiqi Li <voyager.lpq at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/redundant-expression.cpp
Log Message:
-----------
[clang-tidy] Fix false positive in misc-redundant-expression with type aliases (#198085)
The `misc-redundant-expression` check previously flagged expressions as
redundant if their underlying `DeclRefExpr` pointed to the same
declaration. This caused false positives when comparing identical values
accessed through distinct type aliases.
Following Clang's diagnostic `aka` logic, this patch uses the AST
Printer to stringify and compare the `NestedNameSpecifier` and
`TemplateArguments`. This safely preserves sugared types while natively
normalizing all whitespaces and newlines, ensuring robustness against
multiline formatting changes.
Fixes #145415
Commit: 6de51be4f636eda95e439db50f8463bdf8bde02e
https://github.com/llvm/llvm-project/commit/6de51be4f636eda95e439db50f8463bdf8bde02e
Author: David Green <david.green at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalization for bf16 fptosi/fptoui. (#209206)
Similar to other operations, this makes sure we can widen bf16
fptosi/fptoui correctly, promoting the value to a f32. The vector
variants have been proven by exhaustive checking.
Commit: 1bd46015ea4e842091109cd2a491c55c0b455330
https://github.com/llvm/llvm-project/commit/1bd46015ea4e842091109cd2a491c55c0b455330
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/Representation.h
R clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
R clang-tools-extra/test/clang-doc/yaml/builtin_types.cpp
R clang-tools-extra/test/clang-doc/yaml/conversion_function.cpp
R clang-tools-extra/test/clang-doc/yaml/single-file-public.cpp
R clang-tools-extra/test/clang-doc/yaml/single-file.cpp
R clang-tools-extra/test/clang-doc/yaml/templates.cpp
M clang-tools-extra/unittests/clang-doc/CMakeLists.txt
R clang-tools-extra/unittests/clang-doc/YAMLGeneratorTest.cpp
Log Message:
-----------
[clang-doc] Remove the YAML generator (#209350)
The original intent of the YAML generator was to package the
documentation information in a structured and reusable way. It has been
superseded by the JSON generator.
Commit: 05b6b4f1af9f2eb5bebc2cfd10b2fff6bbfab55d
https://github.com/llvm/llvm-project/commit/05b6b4f1af9f2eb5bebc2cfd10b2fff6bbfab55d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/lib/executor/Logging.cpp
M orc-rt/test/unit/LoggingTest.cpp
Log Message:
-----------
[orc-rt] Add new ControllerAccess logging category. (#209380)
The orc_rt_log_Category_ControllerAccess category should be used to log
messages from ControllerAccess implementations. E.g.
ORC_RT_LOG(Error, ControllerAccess, "connect() failed with <error>");
Commit: 4d5bc903c8a79fbadb62d8dd1e7cc93ad7a394fd
https://github.com/llvm/llvm-project/commit/4d5bc903c8a79fbadb62d8dd1e7cc93ad7a394fd
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/AArch64/clmul.ll
M llvm/test/CodeGen/RISCV/clmul.ll
M llvm/test/CodeGen/X86/clmul.ll
Log Message:
-----------
[SelectionDAG] Improve `CLMUL` lowering for `Promote` types wider than register width (#209265)
For `ISD::CLMUL`, add a check to `PromoteIntRes_CLMUL` to take advantage
of the cross-product expansion in `ExpandIntRes_CLMUL` when possible for
`Promote` types which are wider than the register width (e.g. `i96` for
64-bit registers).
Commit: 8eb6e260047bd2f69d9d2c1f0967ae59f7ec5374
https://github.com/llvm/llvm-project/commit/8eb6e260047bd2f69d9d2c1f0967ae59f7ec5374
Author: Martin Storsjö <martin at martin.st>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M openmp/runtime/src/kmp_utility.cpp
Log Message:
-----------
[openmp] Apply a mingw/64 bit codepath to arm64ec too (#209297)
When targeting arm64ec, neither KMP_ARCH_X86_64 nor KMP_ARCH_AARCH64 is
defined.
This fixes a compilation warning when building openmp for mingw/arm64ec.
Commit: a436e36f5e57e8daabee71fd0cb649c1633e314f
https://github.com/llvm/llvm-project/commit/a436e36f5e57e8daabee71fd0cb649c1633e314f
Author: David Green <david.green at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/round-fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/round-fptoui-sat-scalar.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalization for bf16 fptosi.sat/fptoui.sat (#209378)
This is the equivalent change to #209206 for fptoi.sat.
Commit: f60650c772485640b57520e91cec9779cc7f27dc
https://github.com/llvm/llvm-project/commit/f60650c772485640b57520e91cec9779cc7f27dc
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Log Message:
-----------
[BitcodeReader] Lazily read and cache target triple (NFC) (#208175)
Lazily read and cache the target triple from the stream, currently meant
to be used only for upgrading AArch64 memory effects from old bitcode.
Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>
Commit: 69ee6b114ac3d3c6652b39d0d57b292bcfa3a81c
https://github.com/llvm/llvm-project/commit/69ee6b114ac3d3c6652b39d0d57b292bcfa3a81c
Author: WMC <tnwilly at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[NVVM] Add FP8 (e4m3/e5m2) support to dense mma.sync (#207307)
## Motivation
I'm adding NVIDIA FP8 mma.sync support in IREE for sm_89/sm_120, and
IREE's codegen lowers through `nvgpu.mma.sync` on this path, which in
turn lowers to `nvvm.mma.sync`. This MLIR-level gap is blocking that
work, so I'm upstreaming the fix here first. This is split into two PRs
per review feedback — this one covers `nvvm.mma.sync` only; a follow-up
PR will add the corresponding `nvgpu.mma.sync` support built on top of
this.
## Description:
`nvvm.mma.sync` (warp-level, dense) don't support FP8 (e4m3/e5m2)
operands, even though the underlying PTX/NVPTX intrinsics have supported
FP8 `mma.sync.m16n8k32` since sm_89. FP8 currently only exists on the
sparse mma path and on warpgroup-level `wgmma`; the warp-level dense
path was never updated.
This adds FP8 (e4m3/e5m2) support to `nvvm.mma.sync`, covering
`m16n8k16` and `m16n8k32`.
## Verification
`$ mlir-opt mlir/test/Dialect/LLVMIR/nvvm.mlir -split-input-file
-verify-diagnostics | FileCheck mlir/test/Dialect/LLVMIR/nvvm.mlir
`
```
%0 = nvvm.mma.sync A[...] B[...] C[...]
{multiplicandAPtxType = #nvvm.mma_type<e4m3>,
multiplicandBPtxType = #nvvm.mma_type<e4m3>,
shape = #nvvm.shape<m = 16, n = 8, k = 32>}
: (i32, i32, f32) -> !llvm.struct<(f32, f32, f32, f32)>
```
`$ mlir-translate -mlir-to-llvmir mlir/test/Target/LLVMIR/nvvmir.mlir
-split-input-file -verify-diagnostics | FileCheck
mlir/test/Target/LLVMIR/nvvmir.mlir
`
```
%8 = call { float, float, float, float } @llvm.nvvm.mma.m16n8k16.row.col.f32.e4m3.e4m3.f32(i32 %0, i32 %1, i32 %2, float %3, float %4, float %5, float %6)
%11 = call { float, float, float, float } @llvm.nvvm.mma.m16n8k32.row.col.f32.e4m3.e5m2.f32(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9)
```
All existing tests in nvvm.mlir (including -verify-diagnostics error
cases) still pass — no regression.
Co-authored with Claude Sonnet 5
Signed-off-by: weimin023 <tnwilly at gmail.com>
Commit: 317efbe4496900a60de09812aa91b1f486b2e795
https://github.com/llvm/llvm-project/commit/317efbe4496900a60de09812aa91b1f486b2e795
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll
M llvm/test/CodeGen/AArch64/sve2p1-while-pn-folds.ll
Log Message:
-----------
[AArch64] Fold CSET + BR_CC into a conditional branch (#207398)
Fold CSETs into conditional branches (rather than lowering to a CSET +
TB[N]Z). This is most useful for lowering loop conditions based on
predicate-as-counter whiles to:
```
whilelo pn8.s, x0, x1, vlx4
b.mi .Lloop
```
Commit: 70496276d0f441999b61e84ca22e59d61fa43582
https://github.com/llvm/llvm-project/commit/70496276d0f441999b61e84ca22e59d61fa43582
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
M lld/docs/ld.lld.1
M lld/test/ELF/retain-symbols-file.s
M lld/test/ELF/version-script-warn.s
Log Message:
-----------
[ELF] --retain-symbols-file: keep listed symbols in .symtab, not .dynsym (#209063)
Commit c0fc25307143dd06c12fb2f5ebdb1dade7290ccf (2017) implements
--retain-symbols-file with symbol version machinery
`{local: *; global: listed;}`, which removes unlisted symbols from
.dynsym and leaves .symtab untouched. GNU ld does the opposite: it keeps
only the listed symbols in .symtab and does not touch .dynsym.
Reuse the --discard-{locals,all} mechanism to reimplement the feature,
matching GNU ld.
Use --export-dynamic-symbol or a version script to control .dynsym.
Extend `markUsedSymbols` to mark referenced globals as well, so
--emit-relocs/-r keep a valid symbol index.
Fix #91055
Commit: e8e88dbde96a75ffe0e8bf10ea9481a053292421
https://github.com/llvm/llvm-project/commit/e8e88dbde96a75ffe0e8bf10ea9481a053292421
Author: Harlen Batagelo <hbatagelo at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplateInstantiate.cpp
A clang/test/SemaTemplate/GH195988.cpp
Log Message:
-----------
[clang][sema] Fix crash on class template instantiation when a member variable partial specialization has an invalid primary template (#202006)
Fixes #195988.
For the root cause, consider this reproducer:
https://godbolt.org/z/6jTnvocs4
```cpp
template <typename> struct A {
template <typename U> static B x; // unknown type name 'B'
template <typename U> static int x<U*>;
};
A<int> a;
```
During the instantiation of `A<int>`, the variable template `x` is
skipped because it was marked as an invalid declaration due to the
unknown type `B`. When the partial specialization `x<U*>` is visited
next, the lookup for `x` finds nothing and triggers the assertion:
https://github.com/llvm/llvm-project/blob/2433b06e6dbe3ef015a226620d207a45f7b98c7c/clang/lib/Sema/SemaTemplateInstantiateDecl.cpp#L2538
Fix by instantiating invalid variable templates using the `int` fallback
instead of skipping them.
Commit: aae01919171394ed4a4bf6b2fb82cc0d70561994
https://github.com/llvm/llvm-project/commit/aae01919171394ed4a4bf6b2fb82cc0d70561994
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
[libcxx] Rename __libcpp_launder to __launder_function_pointer (#209320)
This addresses post-commit feedback raised in #208330.
Commit: 6c6ecb376a940d16e17dae2d40dc076466898860
https://github.com/llvm/llvm-project/commit/6c6ecb376a940d16e17dae2d40dc076466898860
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
M libcxx/src/new.cpp
M libcxxabi/src/stdlib_new_delete.cpp
Log Message:
-----------
[libcxx][libcxxabi] Remove OVERRIDABLE_FUNCTION macro (#209323)
This is no longer needed, we can just use [[gnu::weak]] attribute.
Commit: 9a342c137d4ed8c6d4571ebc5a62f22aa9642278
https://github.com/llvm/llvm-project/commit/9a342c137d4ed8c6d4571ebc5a62f22aa9642278
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-prune-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-access-wide-stride.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll
Log Message:
-----------
[VPlan] Use VPSCEVExpander in convertToStridedAccesses (#208939)
Expand SCEVs to VPInstructions, falling back to expanding to IR
instructions. Expanding to VPInstructions has the advantage that the
expansion would be made visible to the VPlan optimization pipeline,
allowing existing simplifications to kick in.
Commit: 5514c1eff5fe52d0bcc2c017c0210bd31fd0bf32
https://github.com/llvm/llvm-project/commit/5514c1eff5fe52d0bcc2c017c0210bd31fd0bf32
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseScopedLockCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-scoped-lock.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-scoped-lock-warn-on-single-locks-false.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-scoped-lock.cpp
Log Message:
-----------
[clang-tidy] Flag consecutive scoped_locks in use-scoped-lock (#209272)
Fixes https://github.com/llvm/llvm-project/issues/209112.
Commit: 94b7d2b4d8d7c8cfa2d09a6aa2bb1d7df81d047c
https://github.com/llvm/llvm-project/commit/94b7d2b4d8d7c8cfa2d09a6aa2bb1d7df81d047c
Author: gtrong <40399865+gtrong at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Parse/ParseDecl.cpp
M clang/test/Parser/cxx-default-args.cpp
Log Message:
-----------
[Clang] Fix error recovery for default arguments (#208868)
Fixes #205718
### Description
This PR fixes an issue where Clang incorrectly skips the creation of a
parameter when an error occurs in a default argument that involves a GNU
statement expression (`({ ... })`).
Previously, if the default expression evaluation failed within a
statement expression, the error recovery was not handled properly,
leading to the parameter being dropped. This fix ensures that the
parameter is correctly created and error recovery proceeds as expected.
### Testing
Added/Updated test cases in
`clang/test/SemaCXX/default-arg-error-recovery.cpp` to cover invalid
default arguments inside statement expressions.
Commit: 9144e3292c6caaeed2ad16b6ed2a2eba620c0257
https://github.com/llvm/llvm-project/commit/9144e3292c6caaeed2ad16b6ed2a2eba620c0257
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/include/clang/Basic/arm_neon.td
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/AArch64/v9.7a-neon-mmla-intrinsics.c
M clang/test/Sema/aarch64-neon-target.c
M clang/test/Sema/aarch64-neon-without-target-feature.cpp
Log Message:
-----------
[AArch64][llvm][clang] Rename 9.7 ACLE vmmlaq_f16_f16 to vmmlaq_f16 (#209242)
Rename Armv9.7 ACLE intrinsic `vmmlaq_f16_f16` to `vmmlaq_f16`
as it matches convention better.
See https://github.com/ARM-software/acle/pull/443 for the ACLE change.
Commit: 25ee70e271dd60978f8bfded54198dbe72009847
https://github.com/llvm/llvm-project/commit/25ee70e271dd60978f8bfded54198dbe72009847
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/simd-relaxed-fmax.ll
M llvm/test/CodeGen/WebAssembly/simd-relaxed-fmin.ll
Log Message:
-----------
[WebAssembly] Fix operands in relaxed_pmin/relaxed_pmax pattern (#209398)
After 56e62e539eb65ebe4ec9fc6de0328fea21ae86fd these should be
operands 0 and 1 instead of 1 and 2.
Also add an explicit SIMD128 check when marking these as legal.
It works fine without it (presumably because the types just aren't
legal), but this makes it more explicit when the operations are
available.
Commit: 95349af763cfc48858fdd40058bd46a11779deb2
https://github.com/llvm/llvm-project/commit/95349af763cfc48858fdd40058bd46a11779deb2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
M llvm/test/MC/AMDGPU/amdgcn-target-directive-subarch-cpu-field.s
M llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/isa-version-hsa.s
M llvm/test/MC/AMDGPU/isa-version-pal.s
M llvm/test/MC/AMDGPU/isa-version-unk.s
M llvm/test/MC/ELF/AMDGPU/cfi.s
Log Message:
-----------
AMDGPU: Defer validation of target assembler directives (#207812)
Stop immediately emitting the .amdgcn_target directive from the command
line's target, and wait until any target directives in the file are
encountered. This requires lazily emitting the target directive to before the
point anything is to be emitted. Weaken the validation that the xnack and
sramecc settings match the command line's state, and take the mode from the
target directive
(mutating the tracked target ID state). Liberalize the triple check so that after
#206480, old assembly files will not break on new assembler invocations.
For some reason we have 2 different assembler directives that indicate
the target, .amdgcn_target for amdhsa and .amd_amdgpu_isa for amdpal.
Previously, we would take the target from the command line and then error if the
directive did not exactly match. In order to move away from depending on the xnack
and sramecc subtarget features, start treating the directives as a change of
target, similar to ARM's .cpu and .arch directives.
Both .amdgcn_target and .amd_amdgpu_isa encode full triples, but unlike
.amdgcn_target, the PAL directive does not include xnack or sramecc.
Ideally we would introduce new independent directives for these.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 2d401082440f16d36a42e5b55c2992f8bab4cb5f
https://github.com/llvm/llvm-project/commit/2d401082440f16d36a42e5b55c2992f8bab4cb5f
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[GitHub] Install libedit, libxml2 and liblzma to be used in Linux LLDB builds (#209129)
In #188049 we missed some test failures because GitHub CI does not have
libxml2 installed. I checked the logs and found a couple of other things
missing.
In this change I'm adding to the Linux container:
* libedit
* libxml2
* liblzma
I am not adding ncurses because this would enable text user interface
tests that are often unstable. They do run post-commit, and don't change
that often anyway.
I am not adding Lua or TreeSitter because they are more obscure and are
tested somewhere post-commit (in Green Dragon I think).
Commit: f195f4d45dc253192270a4be3f806f2913a071d1
https://github.com/llvm/llvm-project/commit/f195f4d45dc253192270a4be3f806f2913a071d1
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/bindings/interface/SBTargetDocstrings.i
M lldb/docs/use/tutorial.md
M lldb/source/Breakpoint/Watchpoint.cpp
M lldb/test/Shell/Register/x86-db-read.test
Log Message:
-----------
[lldb] Add comma separator in watchpoint description (#209176)
I find it easier to read this way, especially the last "state = enabled type = m" which looks like "enabled type = m" at a glance:
Watchpoint 1: addr = 0xaaaaaaab1018 size = 20 state = enabled type = m
With commas:
Watchpoint 1: addr = 0xaaaaaaab1018, size = 20, state = enabled, type = m
Code breakpoints include commas already:
1: name = 'main', locations = 1, resolved = 1, hit count = 1
1.1: where = test.o`main at test.c:13:15, address = 0x0000aaaaaaaa0714, resolved, hit count = 1
Used the regex "Watchpoint [0-9]+:" to find tests and docs that needed
updating.
Commit: dad3e30521b596cade7e3c516909657c44ed2840
https://github.com/llvm/llvm-project/commit/dad3e30521b596cade7e3c516909657c44ed2840
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Fix incorrect rematerialization rollback order (#197576)
This fixes an issue in the rematerializer's rollbacker wherein adjacent
MIs that were deleted through rematerializations would
sometimes---depending on the exact order in which they were
deleted---not be re-created in their original pre-rematerialization
order. While this does not impact correctness (i.e., use-def relations
are always honored), this goes against the rollbacker's intent to
re-create the MIR exactly as it was pre-rematerializations (up to slot
index changes).
Commit: 5566c87df36cacb1f006535476108dc5e4c8c18f
https://github.com/llvm/llvm-project/commit/5566c87df36cacb1f006535476108dc5e4c8c18f
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/builtins.c
Log Message:
-----------
[Clang] Fix boolean vector bit counting on big-endian targets (#209146)
`__builtin_ctzg` and `__builtin_clzg` (count leading/trailing zeroes)
can accept boolean vectors as arguments. In this case, they operate in
logical vector lane order. However, `EmitBitCountExpr`, used to generate
the argument to those builtins, bitcasts boolean vectors directly to
integer bitfields, whose bit order is reversed on big-endian targets.
This caused libc's SIMD `find_first_set` and `find_last_set` helpers to
count lanes from the wrong end in big-endian mode. But the issue was
general and could affect any user.
This patch normalizes the integer representation with `llvm.bitreverse`
on big-endian targets before emitting bit-count intrinsics. On top of
that, the codegen test has been refactored to run on more targets and to
cover big-endian mode as well.
As a side effect of this change, and because of the way the code is
structured, the bit reverse operation also happens for
`__builtin_popcountg`. For this intrinsic, the integer bitfield's bit
order doesn't matter because it simply counts set bits. However, to make
this change only affect the count leading/trailing intrinsics would be
too intrusive, and in any case, with optimizations enabled, the
pointless bit reversing operation on popcount is optimized away. This
behaviour is covered in the test.
Assisted-by: codex. It was used for the test, not the implementation.
Commit: afac9463c13d6e44f287ee693309497cb79e1e10
https://github.com/llvm/llvm-project/commit/afac9463c13d6e44f287ee693309497cb79e1e10
Author: Mateusz Chudyk <mateusz.chudyk at intel.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-insert-vec-elt.mir
Log Message:
-----------
[GlobalISel] Fix crash in matchCombineInsertVecElts with INLINEASM-de… (#208225)
…fined base
matchCombineInsertVecElts walks the G_INSERT_VECTOR_ELT chain by
following operand 0 of the source-defining instruction. When the base
vector is defined by INLINEASM, operand 0 is the asm string (not a
register), so calling getReg() triggers an assertion:
Assertion `isReg() && "This is not a register operand!"' failed.
Fix by using the mi_match overload that takes a MachineInstr instead of
a Register, which checks the instruction opcode before accessing any
operands.
Commit: 7401694a38d9126bc910d3edf7e04331a66befa4
https://github.com/llvm/llvm-project/commit/7401694a38d9126bc910d3edf7e04331a66befa4
Author: YaFan Tao <765370813 at qq.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/atomic_optimizations_dpp_lds_expected_active_lanes.ll
A llvm/test/Verifier/amdgpu-expected-active-lanes.ll
Log Message:
-----------
[AMDGPU] Add threshold for DPP atomic optimizer on LDS atomics (#186762)
Add amdgpu.expected.active.lane metadata which can be applied to operations by a
compiler front-end. Do not apply the DPP atomic optimizer to LDS atomics where
less than five active lanes are expected.
This is an empirically derived threshold based on GFX11 and GFX12 testing.
---------
Co-authored-by: YaFan <YaFan.Tao at amd.com>
Commit: c9610acc5b1d4f49d197a4c8816fb688736963ae
https://github.com/llvm/llvm-project/commit/c9610acc5b1d4f49d197a4c8816fb688736963ae
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYTargetStreamer.h
Log Message:
-----------
[CSKY] Fix build without PCH (#209405)
Commit: 00bf3d6cf36d1c9a910d470814a76a4be1ab1634
https://github.com/llvm/llvm-project/commit/00bf3d6cf36d1c9a910d470814a76a4be1ab1634
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-doc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 1bd4601 (#209377)
This fixes 1bd46015ea4e842091109cd2a491c55c0b455330.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=1bd46015ea4e842091109cd2a491c55c0b455330
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 7c151447bc8abceefa3be9e5f1b27b83803d77af
https://github.com/llvm/llvm-project/commit/7c151447bc8abceefa3be9e5f1b27b83803d77af
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
R llvm/test/CodeGen/X86/pr142937.ll
A llvm/test/CodeGen/X86/type-tests-must-be-lowered.ll
Log Message:
-----------
[SDAG] emit error when `llvm.type.checked.load` is not lowered (#208058)
Fixes https://github.com/llvm/llvm-project/issues/164663
In rust we can enable devirtualization and LTO on a build that actually
builds a library and hence LTO does not really run. That means typed
loads are emitted, but they are not lowered (or cleaned up), which made
us hit an ICE. Giving a slightly better error message, analogous to the
existing one for `Intrinsic::type_test`, seems nice.
I'm putting this together based on
https://github.com/llvm/llvm-project/pull/179249 and
https://github.com/llvm/llvm-project/issues/164663#issuecomment-3433581033.
Commit: a31c941fa7fd9eaea855cff3bb40347c0d22243d
https://github.com/llvm/llvm-project/commit/a31c941fa7fd9eaea855cff3bb40347c0d22243d
Author: David Stuttard <david.stuttard at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr-hsa.ll
A llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr-rel32.mir
A llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr.ll
Log Message:
-----------
[AMDGPU] Support global address in V/S_MOV_B64 lowering (#203527)
Hit an issue where V_MOV_B64_PSEUDO had a global, which wasn't
previously handled.
Added support for this, and also for the S_MOV_B64_IMM_PSEUDO to make it
symmetrical.
Claude has been used for this commit, primarily assisting creating a
test.
Commit: d21d602d65bc5f6494da679d004b764e47347b49
https://github.com/llvm/llvm-project/commit/d21d602d65bc5f6494da679d004b764e47347b49
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ModuleSummaryAnalysis.h
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[NPM] Port ImmutableModuleSummaryAnalysis to NPM (#203510)
Required in LTO pipelines
Commit: d4568c9fd15235bd4545a5c57f23bfcb42673f39
https://github.com/llvm/llvm-project/commit/d4568c9fd15235bd4545a5c57f23bfcb42673f39
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
Log Message:
-----------
[mlir][SPIR-V] Collapse TanPattern/TanhPattern into DirectConversionPattern (#203830)
Commit: 6a1f23ab1333ced760666282c23a7afd2db2719e
https://github.com/llvm/llvm-project/commit/6a1f23ab1333ced760666282c23a7afd2db2719e
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBlockPlacement.h
M llvm/include/llvm/CodeGen/RegisterCoalescerPass.h
M llvm/include/llvm/CodeGen/RenameIndependentSubregs.h
M llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
M llvm/include/llvm/CodeGen/UnreachableBlockElim.h
M llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h
M llvm/include/llvm/Transforms/Utils/UnifyLoopExits.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.h
M llvm/lib/Target/AMDGPU/GCNNSAReassign.h
M llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
M llvm/lib/Target/AMDGPU/SILowerControlFlow.h
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.h
Log Message:
-----------
[NPM] Make few more passes required (#203511)
essentially a port of https://github.com/llvm/llvm-project/pull/148115.
matches legacy behaviour. MachineBlockPlacement is made optional since
it is optional in legacy as well. not sure if there was any reason to
make it required in NPM.
Commit: 37d488f15991d8c65666834a7aed14000d1393fa
https://github.com/llvm/llvm-project/commit/37d488f15991d8c65666834a7aed14000d1393fa
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
M llvm/test/Transforms/ConstraintElimination/loops-header-tested-pointer-cmps.ll
Log Message:
-----------
[ConstraintElim] Look through post-increment in header EQ/NE compare. (#209199)
Extend the header-controlled induction handling to look through a
post-increment `PN + C` (constant C) on the compared value
For now, the new path is limited to deriving unsigned facts.
Alive2 Proof: https://alive2.llvm.org/ce/z/DCNeSr
PR: https://github.com/llvm/llvm-project/pull/209199
Commit: 922b1a9da0a16e9df23c1a91203cf37c24d5c26d
https://github.com/llvm/llvm-project/commit/922b1a9da0a16e9df23c1a91203cf37c24d5c26d
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/cmake/modules/FindDIASDK.cmake
Log Message:
-----------
Revert "[cmake] Fix VSINSTALLDIR check in FindDIASDK module (#208524)" (#209137)
This reverts commit 4c5e15667fe384e434961fe44cf5950dc309fdf1.
https://github.com/llvm/llvm-project/pull/208524 fixed a flag which
enabled testing with the DIA SDK. This broke all Windows build bots,
because the SDK is not available in the PATH.
Commit: add1925e5ee942794d7d6e8b4d65b32c959d472a
https://github.com/llvm/llvm-project/commit/add1925e5ee942794d7d6e8b4d65b32c959d472a
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 2) (#207199)
This simplifies the logic a bit more, such that the flow of the lowering
is as follows:
* Try to promote if necessary (fp16/bf16 types or src < dst)
* Try to handle natively (satwidth == srcwidth == dstwidth)
* Otherwise use min/max + truncate.
Commit: dbbd4e0de70b62c2e05d8a650ddcdff954ef8d0f
https://github.com/llvm/llvm-project/commit/dbbd4e0de70b62c2e05d8a650ddcdff954ef8d0f
Author: Ralf Jung <post at ralfj.de>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[LangRef] select: describe behavior for undef and poison (#208724)
The poison semantics is based on
https://llvm.org/docs/UndefinedBehavior.html#propagation-of-poison-through-select.
IMO this definitely should appear in the "semantics" section of the
`select` instruction. If this isn't part of the `select` semantics I
don't know what is.
The undef semantics are based on what Alive does.
Commit: 8c75e8018d52ead8f97648b7b279671b89c59fa0
https://github.com/llvm/llvm-project/commit/8c75e8018d52ead8f97648b7b279671b89c59fa0
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
Log Message:
-----------
[CIR][AArc64] Add lowering for fp16 intrinsics (multiply extended) (#209222)
This PR adds lowering for the following intrinsic groups:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#multiply-extended-1
It also moves the corresponding tests from:
* clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
to:
* clang/test/CodeGen/AArch64/neon/fullfp16.c
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
Commit: 19401e09c063367a3503ae6cc1a47babfa95f243
https://github.com/llvm/llvm-project/commit/19401e09c063367a3503ae6cc1a47babfa95f243
Author: Andrew Ng <andrew.ng at sony.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/Format/CMakeLists.txt
Log Message:
-----------
[clang-format] Fix `check-format-depends` CMake for Windows (#209205)
Add `find_program` for `touch`. Convert found program paths to native
form and use these paths in the command invocation.
Commit: aa5960600ac38fcd923e69777bad1293f56658d7
https://github.com/llvm/llvm-project/commit/aa5960600ac38fcd923e69777bad1293f56658d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
Revert "clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility" (#209407)
Reverts llvm/llvm-project#209135
This shouldn't be doing logical linking compatibility
Commit: f6393d657271b632de22cdfeaff35cfb3d45bf92
https://github.com/llvm/llvm-project/commit/f6393d657271b632de22cdfeaff35cfb3d45bf92
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/main.py
M llvm/utils/lit/lit/util.py
A llvm/utils/lit/tests/Inputs/time-tests/b.txt
A llvm/utils/lit/tests/Inputs/time-tests/c.txt
M llvm/utils/lit/tests/time-tests.py
Log Message:
-----------
[lit] Add configurable slowest-test limit to --time-tests (#208444)
The PR parameterizes `--time-tests`, which was hardcoded to 20 tests. We
now allow `--time-tests=N` or `--time-tests=all`.
The changes still honor the original behavior of `--time-tests`. The
parsing logic could be slightly simpler if `--time-tests` would always
require an explicit number of tests (like `-j`), but that would be a CLI
breaking change.
Commit: 1a8e5b6f594926adaaa0417543773108b7fd737d
https://github.com/llvm/llvm-project/commit/1a8e5b6f594926adaaa0417543773108b7fd737d
Author: Xiaomeng Zhang <zhangxiaomeng at hygon.cn>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
M llvm/test/CodeGen/X86/slow-unaligned-mem.ll
M llvm/test/CodeGen/X86/x86-prefer-no-gather-no-scatter.ll
A llvm/test/Transforms/LoopVectorize/X86/x86-prefer-no-gather.ll
A llvm/test/Transforms/LoopVectorize/X86/x86-prefer-no-scatter.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-abs.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add-saddo.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add-uaddo.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add-usat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-div.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fix.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-mul-smulo.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-mul-umulo.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-mul.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-scmp.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-smax.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-smin.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssubo.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usubo.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-ucmp.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-umax.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-umin.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs.ll
M llvm/test/Transforms/SLPVectorizer/X86/fcopysign.ll
M llvm/test/Transforms/SLPVectorizer/X86/fma.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll
M llvm/test/Transforms/SLPVectorizer/X86/fminnum.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmuladd.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptoui.ll
M llvm/test/Transforms/SLPVectorizer/X86/fround.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-ashr.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-lshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-shl.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/uitofp.ll
A llvm/test/Transforms/SLPVectorizer/X86/x86-prefer-no-gather.ll
Log Message:
-----------
[X86] Add tuning features for Hygon C86-4G-M7 (#205992)
Add TuningPreferNoGather. TuningPreferNoScatter and TuningPrefer256Bit to C864GM7Tuning.
This will improve the performance of the C86-4G-M7.
Commit: 79acf12724942b687b7c777e1dc46dd56ca4d287
https://github.com/llvm/llvm-project/commit/79acf12724942b687b7c777e1dc46dd56ca4d287
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/test/Driver/msvc-link.c
Log Message:
-----------
[clang] Use lld-link by default when -marm64x is specified (#209324)
ARM64X hybrid object files require lld-link, as it is currently the only
linker that supports them.
Commit: f2ada6d997fe4f4854f15f2c880dd740cd2ebb8a
https://github.com/llvm/llvm-project/commit/f2ada6d997fe4f4854f15f2c880dd740cd2ebb8a
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-unroll.ll
Log Message:
-----------
[VPlan] Add test for convertToStridedAccess flag issue. NFC (#209425)
>From the comment in
https://github.com/llvm/llvm-project/pull/209168/changes#r3574524959
Commit: b3f5986138f2f6a65072b6822892afa5d8859cf7
https://github.com/llvm/llvm-project/commit/b3f5986138f2f6a65072b6822892afa5d8859cf7
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-fcvt-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[clang][CIR][AArch64] Add lowering for conversion intrinsics (#209252)
This PR adds lowering for intrinsic from the following groups:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions
It continues the work started in #190961, #193273 and #199990. This PR
implements the remaining conversions truncating to zero:
* vcvtd_s32_f64
* vcvtd_s64_f64
* vcvtd_u32_f64
* vcvtd_u64_f64
The corresponding tests are moved from:
* clang/test/CodeGen/AArch64/
to:
* clang/test/CodeGen/AArch64/neon/
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
Commit: 95e647c8aa180f946c83d1e6f361989442206f52
https://github.com/llvm/llvm-project/commit/95e647c8aa180f946c83d1e6f361989442206f52
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
M llvm/test/CodeGen/AMDGPU/invalid-cast-load-i1.ll
M llvm/test/CodeGen/AMDGPU/invalid-hidden-kernarg-in-kernel-signature.ll
M llvm/test/CodeGen/AMDGPU/invariant-image-load.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/issue121601-combine-concat-vectors-assumes-f16.ll
M llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
M llvm/test/CodeGen/AMDGPU/issue139317-bad-opsel-reg-sequence-fold.ll
M llvm/test/CodeGen/AMDGPU/issue153808-extract-subvector-legalize.ll
M llvm/test/CodeGen/AMDGPU/issue176966-extend-vector-inreg.ll
M llvm/test/CodeGen/AMDGPU/issue48473.mir
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir
M llvm/test/CodeGen/AMDGPU/issue98474-need-live-out-undef-subregister-def.ll
M llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/kernarg-size.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/kill-true-in-return-block.ll
M llvm/test/CodeGen/AMDGPU/known-never-nan.ll
M llvm/test/CodeGen/AMDGPU/known-never-snan.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-graphics.ll
M llvm/test/CodeGen/AMDGPU/large-avgpr-assign-last.mir
M llvm/test/CodeGen/AMDGPU/large-constant-initializer.ll
M llvm/test/CodeGen/AMDGPU/large-phi-search.ll
M llvm/test/CodeGen/AMDGPU/large-work-group-promote-alloca.ll
M llvm/test/CodeGen/AMDGPU/lds-barrier-memoperand.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-branch-vmem-hazard.mir
M llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx11.mir
M llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx12.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-hazards.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/lds-initializer.ll
M llvm/test/CodeGen/AMDGPU/lds-limit-diagnostics-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/lds-limit-diagnostics.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-agpr.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-callgraph.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-typeid.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
M llvm/test/CodeGen/AMDGPU/lds-link-time-named-barrier.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-mixed-absolute-addresses-unused.ll
M llvm/test/CodeGen/AMDGPU/lds-mixed-absolute-dynlds.ll
M llvm/test/CodeGen/AMDGPU/lds-no-realign-allocated-variables.ll
M llvm/test/CodeGen/AMDGPU/lds-reject-anonymous-kernels.ll
M llvm/test/CodeGen/AMDGPU/lds-reject-mixed-absolute-addresses.ll
M llvm/test/CodeGen/AMDGPU/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/lds-run-twice-absolute-md.ll
M llvm/test/CodeGen/AMDGPU/lds-run-twice.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-size-pal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/ldsdmacnt_sched.mir
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.dead.mir
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/licm-valu.mir
M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (17) (#209120)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: db8ea12c3918fe10912298b7acfd21269d03cab2
https://github.com/llvm/llvm-project/commit/db8ea12c3918fe10912298b7acfd21269d03cab2
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/test/regression/logging/os_log/delivery.test
M orc-rt/test/tools/orc-rt-log-check.cpp
M orc-rt/test/unit/LoggingTest.cpp
Log Message:
-----------
[orc-rt] Add ORC_RT_LOG_PUB_S for logging runtime strings. (#209401)
ORC_RT_LOG requires its format to be a string literal, so the specifier
for a runtime C string cannot be written at the call site by hand -- and
it differs by backend: os_log redacts a plain "%s" argument to <private>
unless it carries a "%{public}s" annotation, which libc's printf does
not understand.
Add ORC_RT_LOG_PUB_S, which expands to "%{public}s" on the os_log
backend and plain "%s" everywhere else. Call sites compose it into the
format by literal adjacency, so the format stays a single literal on
every backend:
ORC_RT_LOG(Info, General, "resolved " ORC_RT_LOG_PUB_S, SymbolName);
LoggingTest covers the compile/format-check path (including os_log
builds); the orc-rt-log-check delivery test confirms os_log publishes
the string rather than redacting it to <private>.
Commit: e793eee71340131b7dcbfd5fce2edde84ab4ad5a
https://github.com/llvm/llvm-project/commit/e793eee71340131b7dcbfd5fce2edde84ab4ad5a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC] Add LLLazyJIT destructor with call to endSession. (#209399)
Add an LLLazyJIT destructor with a call to ExecutionSession::endSession.
This ensures that the ExecutionSession's TaskDispatcher is shut down
(and in-flight tasks completed) before LLLazyJIT class members are
destroyed. Failure to do this could lead to use-after-free errors when
using thread-based task dispatch. This was likely the cause of flakiness
in test/ExecutionEngine/OrcLazy/multiple-compile-threads-basic.ll.
rdar://181982834
Commit: 2a6cc991cc691f2cc666483c417f01675321ce2c
https://github.com/llvm/llvm-project/commit/2a6cc991cc691f2cc666483c417f01675321ce2c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/test/CodeGen/SystemZ/vec-max-05.ll
M llvm/test/CodeGen/SystemZ/vec-max-min-zerosplat.ll
M llvm/test/CodeGen/SystemZ/vec-min-05.ll
Log Message:
-----------
[SystemZ] Support pseudo fmin/fmax (#209178)
s390x supports the pseudo fmin/fmax operations (x < y ? x : y and x > y
? x : y) as mode 2 in vfmin/vfmax. As such, we should lower
PSEUDO_FMIN/FMAX to those. Also disable formation of minnum/maxnum in
SDAGBuilder, as it's not useful if we have native support for this
operation.
Commit: a9d295d615a81574eabb3645ed5d2eb5a5f4efd9
https://github.com/llvm/llvm-project/commit/a9d295d615a81574eabb3645ed5d2eb5a5f4efd9
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolutionDivision.cpp
Log Message:
-----------
[SCEVDivision] Add assertion to check operand types match (NFCI) (#204146)
In ScalarEvolutionDivision.h, the `SCEVDivision::divide` operation is
defined as follows:
```
/// Computes the Quotient and Remainder of the division of Numerator by
/// Denominator. We are not actually performing the division here. Instead, we
/// are trying to find SCEV expressions Quotient and Remainder that satisfy:
///
/// Numerator = Denominator * Quotient + Remainder
```
Therefore, I believe it makes sense to enforce that the types of
`Numerator` and `Denominator` are the same.
This patch adds an assertion to verify that restriction.
Commit: 96dcb03caa310852329c4e7ad1d678c024c6ed94
https://github.com/llvm/llvm-project/commit/96dcb03caa310852329c4e7ad1d678c024c6ed94
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
Log Message:
-----------
[NFC][LLVM][CodeGen][SVE] Strengthen the isel definition of AArch64setcc_z. (#209170)
Making all operand types derive from the compare's LHS reduces the
number of types an isel rule must specify, which improves readability.
Commit: 16094a86a6cfe79fa50dcca39b539ab6465b8ac0
https://github.com/llvm/llvm-project/commit/16094a86a6cfe79fa50dcca39b539ab6465b8ac0
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUOps.td
M mlir/lib/Conversion/NVGPUToNVVM/CMakeLists.txt
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
A mlir/test/Conversion/NVGPUToNVVM/nvgpu-extf-large.mlir
A mlir/test/Conversion/NVGPUToNVVM/nvgpu-extf.mlir
A mlir/test/Conversion/NVGPUToNVVM/nvgpu-truncf-large.mlir
A mlir/test/Conversion/NVGPUToNVVM/nvgpu-truncf.mlir
A mlir/test/Dialect/NVGPU/nvgpu-extf-invalid.mlir
A mlir/test/Dialect/NVGPU/nvgpu-truncf-invalid.mlir
Log Message:
-----------
[MLIR][NVGPU] Add truncf and extf Ops (#199700)
This change adds the `extf` and `truncf` ops to the NVGPU dialect to
support floating-point conversion operations.
These ops support scalar and vector inputs and lower to the corresponding
NVVM ops after padding and chunking the input into `i32` registers.
Commit: c311e7b3d68cb88487c4dbc4029d101e4c19c908
https://github.com/llvm/llvm-project/commit/c311e7b3d68cb88487c4dbc4029d101e4c19c908
Author: Iurii Khosoi <aadaa_fgtaa at pm.me>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/bitcnt-false-dep.ll
A llvm/test/CodeGen/X86/bls-false-dep.ll
A llvm/test/CodeGen/X86/compress-false-deps.ll
A llvm/test/CodeGen/X86/expand-false-deps.ll
Log Message:
-----------
[X86] Break false dependencies on Zen 4 and 5 (#206849) (#207079)
Some variants of Zen 5 microarchitectures have a false dependency on the
output register of tzcnt, blsr, blsi and blsmsk instructions. This PR
splits existing tuning feature for the false dependency of tzcnt/lzcnt
and adds a new tuning feature for bls*. The tzcnt and bls* tunings are
enabled by default for Zen 5.
Furthermore, at least some variants of Zen 4 and 5 microarchitectures
appear to have a false dependency on the output register of zero-masked
compress and expand instructions. Tested on Ryzen 9 9950X, Ryzen 9 7950X
and Ryzen AI 7 350, also apparent in uops.info data from Ryzen 5 7600X
and Ryzen 7 9700X (see #206849). This PR adds a new tuning feature for
the false dependency of compress/expand. The tuning is enabled for Zen 4
and Zen 5.
Fixes #206849
Commit: 7de5af16e0e72d6325d3dd63ee619a1cb3bce783
https://github.com/llvm/llvm-project/commit/7de5af16e0e72d6325d3dd63ee619a1cb3bce783
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
M lldb/test/API/tools/lldb-dap/stackTraceCompilerGeneratedCode/TestDAP_stackTraceCompilerGeneratedCode.py
M lldb/test/API/tools/lldb-dap/stackTraceDisassemblyDisplay/TestDAP_stackTraceDisassemblyDisplay.py
M lldb/test/API/tools/lldb-dap/stackTraceMissingFunctionName/TestDAP_stackTraceMissingFunctionName.py
M lldb/test/API/tools/lldb-dap/stackTraceMissingModule/TestDAP_stackTraceMissingModule.py
Log Message:
-----------
[lldb-dap] Migrate lldb-dap stackTrace tests (#209236)
Migrate
- TestDAP_stackTrace
- TestDAP_stackTraceDisassemblyDisplay
- TestDAP_stackTraceDisassemblyDisplay
- TestDAP_stackTraceMissingFunctionName
- TestDAP_stackTraceMissingModule
Commit: c1ae9eabc8b55aa4e2a06efacca6003ccecf6249
https://github.com/llvm/llvm-project/commit/c1ae9eabc8b55aa4e2a06efacca6003ccecf6249
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Fixup possibly unused variable warning after #207199 (#209418)
Using [[maybe_unused]] as the variable is only used in asserts which
results in a diagnostic for no-assert builds.
Commit: 64de40e5cbfba35eb4118254326889dabb04bb6c
https://github.com/llvm/llvm-project/commit/64de40e5cbfba35eb4118254326889dabb04bb6c
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen][AMDGPU] Prepare rematerializer for multi-def remat support (NFC) (#197579)
This makes some NFCs to the rematerializer before adding initial support
for rematerializing registers with multiple defs. The main change is
that, in the representation of (un)rematerializable register
dependencies, we drop references to machine operand indices which lose
meaning in the multi-def case.
Other minor changes listed below.
- Removal of `DefRegion` argument to `Rematerializer::recreateReg`.
Registers are always re-created in their original region so there is no
need to set their region again.
- Removal of `InsertPos` unused argument to
`Rematerializer::postRematerialization`.
- Refactor of how AMDGPU's scheduler checks whether a given register is
rematerializable.
Commit: 9582f71a3b5f71e871bee0062e641f3587e0ae23
https://github.com/llvm/llvm-project/commit/9582f71a3b5f71e871bee0062e641f3587e0ae23
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
M llvm/test/CodeGen/X86/win64-eh-unwindv3-split-large.ll
Log Message:
-----------
[UnwinderV3] Include padding in spliting calculations (#208458)
As in title. This is achieved by making the pass count split points in
bytes and making the average instruction size a variable.
PR done with usage of Claude Code
Commit: 24c3eaa9ccaffca94e4d82a312fcc4ed13e62476
https://github.com/llvm/llvm-project/commit/24c3eaa9ccaffca94e4d82a312fcc4ed13e62476
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/limit-soft-clause-reg-pressure.mir
M llvm/test/CodeGen/AMDGPU/literal-constant-like-operand-instruction-size.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/liveout-implicit-def-subreg-redef-blender-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.add.min.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.lds.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.flat.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-agent.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-singlethread.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-system.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-wavefront.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f32.fp8.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.off.f32.i4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk16.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.pk.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dot4.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.async.barrier.arrive.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.barrier.arrive.rtn.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.fi.b32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add-errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add-unsupported.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx10.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.permute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (18) (#209121)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 23a32bcedb91f27ffdac5d6e6bc65a3b19b3b36c
https://github.com/llvm/llvm-project/commit/23a32bcedb91f27ffdac5d6e6bc65a3b19b3b36c
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolutionDivision.cpp
Log Message:
-----------
[SCEVDivision] Remove unnecessary integer casts (NFCI) (#208155)
Since #204146 requires callers of SCEVDivision to pass the numerator and
the denominator with the same type, the bitwidth check in
`visitConstant` no longer makes sense.
Commit: b1c29d83c938183a4fbd706818aa09de7e9eafec
https://github.com/llvm/llvm-project/commit/b1c29d83c938183a4fbd706818aa09de7e9eafec
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
Log Message:
-----------
[lldb][docs] Fix some formatting in the packets doc (#209440)
Commit: 03b4714611ab0aab34c7267e0946fb79bf40babe
https://github.com/llvm/llvm-project/commit/03b4714611ab0aab34c7267e0946fb79bf40babe
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang/test/Driver/function-attr-readonly.f90
Log Message:
-----------
[flang][NFC] Fix function-attr-readonly test on PowerPC (#209431)
Follow-up fix for the newly added test, which was not exercised on all
targets. PowerPC adds llvm.target_features between the function argument
list and the body. Stop requiring the opening brace to immediately
follow the argument list so that the checks remain target-independent.
Commit: 48636d19ab5e3bf82cbff593a82573e8094abed1
https://github.com/llvm/llvm-project/commit/48636d19ab5e3bf82cbff593a82573e8094abed1
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-avg.mir
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
Log Message:
-----------
[GlobalISel] Add G_UAVGFLOOR/G_UAVGCEIL/G_SAVGFLOOR/G_SAVGCEIL to computeKnownBits (#209171)
Add known-bits handling for the averaging (halving add) opcodes G_UAVGFLOOR,
G_UAVGCEIL, G_SAVGFLOOR and G_SAVGCEIL in GISelValueTracking, using the
existing `KnownBits::avg{Floor,Ceil}{S,U}` helpers. This matches
SelectionDAG's handling of the corresponding ISD::AVGFLOOR*/AVGCEIL*
nodes.
This lets GlobalISel drop the redundant masking around hadd/rhadd of
zero-extended operands on AArch64 (see aarch64-known-bits-hadd.ll, where the
GlobalISel output now matches SelectionDAG). The sign-extended cases are
unaffected, since the masking is not redundant there.
Part of #150515.
---
Assisted by Claude (Anthropic).
Commit: cba0124e3c4f0bb5eebf551b049f8e463879642b
https://github.com/llvm/llvm-project/commit/cba0124e3c4f0bb5eebf551b049f8e463879642b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.prim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.AFLCustomIRMutator.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.simple.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2b.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2c.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.noret.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.x.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (19) (#209122)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: da99ce2fe0f4a185ceb02c9a650ba5efdb208612
https://github.com/llvm/llvm-project/commit/da99ce2fe0f4a185ceb02c9a650ba5efdb208612
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libc/include/llvm-libc-macros/linux/signal-macros.h
M libc/test/src/signal/sigaction_test.cpp
Log Message:
-----------
[libc] Implement SA_NODEFER and SA_RESETHAND signal flags (#209429)
Defined SA_NODEFER and SA_RESETHAND in Linux signal-macros.h.
Added unit tests in sigaction_test.cpp to verify the behavior of the new
flags. Also added a test case for SA_SIGINFO.
Assisted-by: Automated tooling, human reviewed.
Commit: b4b19c8f0cc28c20d98fe2ebcd2e869d0835c8eb
https://github.com/llvm/llvm-project/commit/b4b19c8f0cc28c20d98fe2ebcd2e869d0835c8eb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.tr.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.gfx1251.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.u32.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.msad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.u24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.bcast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.down.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.idx.gen.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.up.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.prng.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.bf16.xfail.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.xfail.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (20) (#209211)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 5d5dd83a547ea555a8eada2dfd50413c44a3cfe9
https://github.com/llvm/llvm-project/commit/5d5dd83a547ea555a8eada2dfd50413c44a3cfe9
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Passes/Pipelines.cpp
M llvm/include/llvm/Passes/OptimizationLevel.h
M llvm/include/llvm/Transforms/IPO/ExpandVariadics.h
M llvm/lib/Passes/CMakeLists.txt
R llvm/lib/Passes/OptimizationLevel.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M polly/lib/Support/RegisterPasses.cpp
Log Message:
-----------
[Passes] Replace OptimizationLevel with an enum (#209424)
Now that OptimizationLevel no longer has a size dimension, replace it
with a simple enum class.
Commit: 367d196e5cf964a1d89d596e13c89868da8c4d8c
https://github.com/llvm/llvm-project/commit/367d196e5cf964a1d89d596e13c89868da8c4d8c
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/Lex/Preprocessor.cpp
Log Message:
-----------
[clang][Diagnostics] Fix check-point recording under default colors (#209355)
`getShowColors() != ShowColorsKind::Off` is also true for the default
Auto, so ordinary non-TTY compiles where colors are never actually
emitted kept recording check points, leaving the original 718aac9f cost
in place.
Commit: ad3c1ef174f9cac5bd0332747226740ce1b16159
https://github.com/llvm/llvm-project/commit/ad3c1ef174f9cac5bd0332747226740ce1b16159
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/Analysis/LiveVariables.cpp
Log Message:
-----------
[clang][Analysis] Speed up LiveVariables set merge (#209430)
LiveVariables' mergeSets built the union by unconditionally inserting
every element of B into A. Apply the two cheap tricks the
lifetime-safety analysis uses in its dataflow join:
* Return early when both operands are the same tree (an O(1) pointer
comparison), skipping the merge entirely. Merged liveness values are
canonicalized, so two predecessors with identical liveness share the
same tree -- common at confluence points.
* Insert the smaller set into the larger one, so the number of O(log n)
insertions is min(|A|, |B|) rather than always |B|.
The result is unchanged: set union is commutative and order-independent.
On a pathological function (1000 simultaneously-live locals across 5000
control-flow merges of identical sets) the liveness computation is ~18%
faster, essentially all from the identical-set short circuit. On real
translation units the merge is a small fraction of the analysis, so the
effect is within noise (measured neutral on DAGCombiner.cpp and
X86ISelLowering.cpp); this mainly avoids redundant work at unchanged
confluence points and brings the two dataflow analyses' merges into
line.
Assisted by: Claude Opus 4.8
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: edd94b8fbfae72059cbe31c78ac4580056b6bb9a
https://github.com/llvm/llvm-project/commit/edd94b8fbfae72059cbe31c78ac4580056b6bb9a
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/include/lldb/Utility/Log.h
M lldb/source/Commands/CommandObjectLog.cpp
M lldb/source/Utility/Log.cpp
M lldb/unittests/Utility/LogTest.cpp
Log Message:
-----------
[lldb] Return llvm::Error from DisableLogChannel (#207004)
Follow up to #206479.
llvm:Error better describes the success exor error message states that
we were previously doing with a boolean plus an error stream.
Commit: 42d52dfb9ceae5cb261b6032e50fba512479c7ce
https://github.com/llvm/llvm-project/commit/42d52dfb9ceae5cb261b6032e50fba512479c7ce
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[SelectionDAG] Update MemOp to distinguish memmove from memcpy (#206005)
Commit: 0c36950dd422b118b29621c4fc3e0c91cfcfd346
https://github.com/llvm/llvm-project/commit/0c36950dd422b118b29621c4fc3e0c91cfcfd346
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 16094a8 (#209435)
This fixes 16094a86a6cfe79fa50dcca39b539ab6465b8ac0.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=16094a86a6cfe79fa50dcca39b539ab6465b8ac0
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 269820947e948a4e4bd0b3e352b6c2bd77525e83
https://github.com/llvm/llvm-project/commit/269820947e948a4e4bd0b3e352b6c2bd77525e83
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.monitor.sleep.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.nop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sethalt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.inc.wg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt_gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.hi.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sffbh.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (21) (#209212)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: f5a55b576add124ef5350d81089eccda7103cb93
https://github.com/llvm/llvm-project/commit/f5a55b576add124ef5350d81089eccda7103cb93
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/include/mlir/TableGen/Format.h
Log Message:
-----------
[MLIR][NFC] Fix tgfmt compilation with MSVC (#209446)
Apparently older MSVC has problems with inferring template argument
types. Provide them explicitly.
Fixes https://github.com/llvm/llvm-project/issues/209303.
Commit: cd75ff08c6baf74114933a927308e8ce581efc70
https://github.com/llvm/llvm-project/commit/cd75ff08c6baf74114933a927308e8ce581efc70
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (#209132)
With the advantage that switching over the SubclassID would give better
compile-time diagnostics.
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: 4b32060e213376bf1d014ffc3a462c959d8adc0a
https://github.com/llvm/llvm-project/commit/4b32060e213376bf1d014ffc3a462c959d8adc0a
Author: disservin <disservin.social at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bitreverse.ll
Log Message:
-----------
[X86] Use BMM for bitreverse without GFNI (#209223)
For the scalar path bitreverse currently doesn't lower to vbitrevb on
AVX512-BMM unless GFNI is specified as well. However, GFNI isn't
required at all for this and only BMM needs to be present.
See https://godbolt.org/z/xr61xYzYr
Commit: 5ae6537bbaf577889fb81f5f8397463b0d0499c3
https://github.com/llvm/llvm-project/commit/5ae6537bbaf577889fb81f5f8397463b0d0499c3
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/lib/Conversion/EmitCCommon/TypeConverter.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc-dealloc.mlir
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc-load-store.mlir
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-copy.mlir
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-failed.mlir
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc.mlir
Log Message:
-----------
[mlir][EmitC] Add rank-0 MemRef conversion (#205774)
Add rank-0 memref support to MemRefToEmitC and the EmitC TypeConverter,
needed for lowering the models generated by:
- `llvm/lib/Analysis/models/gen-inline-oz-test-model.py`
- `llvm/lib/Analysis/models/gen-regalloc-eviction-test-model.py`
Rank-0 memrefs are no longer rejected by `isMemRefTypeLegalForEmitC`.
The EmitC type converter maps `memref<T>` to `!emitc.ptr<T>`, giving
rank-0 memrefs addressable scalar storage.
`memref.alloc` now allocates one element for rank-0 memrefs.
`memref.dealloc` frees the pointer-backed value. `memref.load` and
`memref.store` lower rank-0 accesses through `emitc.subscript %ptr[0]`,
followed by `emitc.load` or `emitc.assign`. `memref.copy` lowers rank-0
copies as scalar load plus assign.
`memref.alloca` still rejects rank-0 memrefs because this patch only
supports pointer-backed rank-0 lowering.
The pointer recovery helper now accepts both direct `emitc.ptr<T>`
values and pointer values behind `builtin.unrealized_conversion_cast`,
which is needed by dealloc, copy, load, and store depending on where the
value comes from in conversion.
Tests cover rank-0 alloc/dealloc, load/store, alloc-backed load/store,
and copy. Removed cases this patch adds support for (rank-0) from
`func-to-emitc-failed`.
Assisted-by: Codex (refine implementation + tests). I reviewed all code
and tests before submission.
Commit: 2d1bc4fc5d00d6c96307d5375d7259011509faf3
https://github.com/llvm/llvm-project/commit/2d1bc4fc5d00d6c96307d5375d7259011509faf3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/src/atomic.cpp
Log Message:
-----------
[libc++] Fix usage of constructive interference when we meant destructive (#208804)
We maintain a contention table to implement atomic wait/notify inside
atomic.cpp. Entries in that table are padded to avoid false sharing,
since they are expected to be accessed from multiple threads
concurrently.
However, we used std::hardware_constructive_interference_size for that,
when in reality std::hardware_destructive_interference_size is the one
we need. The semantics of constructive interference are to promote true
sharing for data that should stay colocated, while destructive
interference is to prevent false sharing.
Note that on platforms such as macOS arm64, destructive interference
size is larger than constructive interference size, which means that
this patch may regress the size of the dylib on some platforms. However,
that is required for performance purposes.
Fixes #208305
Commit: bf086335b25387ed7496577eb027531ea287f524
https://github.com/llvm/llvm-project/commit/bf086335b25387ed7496577eb027531ea287f524
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.shuffle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.fmt-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.index.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.deoptimize.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.pow-gfx9.ll
M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/lo16-hi16-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/lo16-hi16-physreg-copy.mir
M llvm/test/CodeGen/AMDGPU/lo16-lo16-physreg-copy-agpr.mir
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (22) (#209213)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 6e515cd0982dbf8db7ab3850b23994396efb40bf
https://github.com/llvm/llvm-project/commit/6e515cd0982dbf8db7ab3850b23994396efb40bf
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][Windows] add release notes for lldb-server (#209415)
As of https://github.com/llvm/llvm-project/pull/209258,
`lldb-server.exe` is now the default plugin if libxml2 is available at
build time.
This patch adds a release note for this change.
Commit: 98c4ea46bd474bff97c99be0800bd7b310185a29
https://github.com/llvm/llvm-project/commit/98c4ea46bd474bff97c99be0800bd7b310185a29
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/cmake/Modules/HandleLibCXXABI.cmake
Log Message:
-----------
[libc++] Improve diagnostic for libcxxabi missing from the runtimes (#208274)
When libc++ is configured to use libc++abi as an ABI library but
libcxxabi is not part of the runtimes, we'd end up with a confusing
build error about a missing <cxxabi.h> header. Instead, diagnose at
CMake configuration time.
Closes #136480
Commit: 23b3f21fd0fff64644cf60065b971686aab9c1b3
https://github.com/llvm/llvm-project/commit/23b3f21fd0fff64644cf60065b971686aab9c1b3
Author: inquisitivecrystal <open-source at inquisitivecrystal.addy.io>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
Log Message:
-----------
[libc++] Mark LWG3403 as complete (#208866)
LWG3403 specifies that `ranges::ssize` should work on non-range objects
for which `ranges::size` is valid. This has been true in libc++ since
6f1b10d, which first implemented `ranges::ssize` for libc++13. The tests
introduced by that commit are sufficient to verify compliance since they
test calling `ranges::ssize` with various non-range arguments.
In addition to marking LWG3403 as complete, this also updates the status
page entry for P1970R2, the paper that added `ranges::ssize`. P1970R2 was
previously marked complete in libc++15 as an approximation; however, it was
actually complete in libc++13.
Resolves #104280
Commit: cf9a244fb2216fb55b77e1df785f6535b44b3e7f
https://github.com/llvm/llvm-project/commit/cf9a244fb2216fb55b77e1df785f6535b44b3e7f
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libc/include/llvm-libc-macros/gpu/signal-macros.h
M libc/include/llvm-libc-macros/linux/signal-macros.h
M libc/include/llvm-libc-macros/netinet-in-macros.h
M libc/include/llvm-libc-types/__futex_word.h
M libc/include/sys/prctl.h.def
Log Message:
-----------
[libc] Fix non-relative includes of __llvm-libc-common.h (#209412)
This seems to work, but I ran into this problem when trying to expand
hermetic tests.
The hdrgen-generated headers already use relative includes of this file.
Commit: cd943207f38d36528a36009e55f80501da98bcef
https://github.com/llvm/llvm-project/commit/cd943207f38d36528a36009e55f80501da98bcef
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang-rt] Disable tests by default when cross-compiling (#208926)
Cross-compiled tests can't run on the build host and pull in host
dependencies (e.g. LLVMSupport's ZLIB::ZLIB) that break the build.
Fixes #208924
Commit: d64972c91369c6372e23e728881d9c645edeb37d
https://github.com/llvm/llvm-project/commit/d64972c91369c6372e23e728881d9c645edeb37d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
Log Message:
-----------
clang-linker-wrapper: Add additional amdgpu device merging tests (#209428)
Commit: 12ce00a865b09cb72a3ea9a84f9308236a4f6038
https://github.com/llvm/llvm-project/commit/12ce00a865b09cb72a3ea9a84f9308236a4f6038
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
A cross-project-tests/dtlto/cache-extraction.test
R cross-project-tests/dtlto/cache-serialization.test
M lld/test/ELF/dtlto/timetrace.test
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/lib/DTLTO/DTLTOInputFiles.cpp
Log Message:
-----------
[DTLTO] terminology - use extract rather than serialize (#208468)
Change the terminology used for DTLTO from "serialization" to
"extraction" for improved clarity.
Update the DTLTO time-trace scope and tests to match the new wording,
and rename/update related LLD and cross-project DTLTO cache tests.
I have also improved some unrelated wording in the comments and removed
a redundant comment block from the DTLTO class comment.
This terminology improvement was agreed in
https://github.com/llvm/llvm-project/pull/204104. Note that the
documentation already uses this terminology, see:
https://llvm.org/docs/DTLTO.html.
Commit: 226acaf7aeeda64a6e4e55d21f586ffe97a72fc8
https://github.com/llvm/llvm-project/commit/226acaf7aeeda64a6e4e55d21f586ffe97a72fc8
Author: Osama Abdelkader <osama.abdelkader at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/Sema/DeclSpec.cpp
M clang/test/SemaCXX/auto-cxx0x.cpp
Log Message:
-----------
Fix auto type-specifier conflict crash (#209308)
Clear owned type state when an invalid C++ auto/type-specifier conflict
is converted to an error so invalid declarations cannot trip DeclSpec
invariants.
Fixes https://github.com/llvm/llvm-project/issues/209000
Commit: 40152b8767769873a8f0d99b857f07c874cccf4a
https://github.com/llvm/llvm-project/commit/40152b8767769873a8f0d99b857f07c874cccf4a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/include/__functional/function.h
Log Message:
-----------
[libc++][NFC] Inline std::function members into the class body (#209461)
The `std::function` members are incredibly simple to the point where
they are just wrappers around internal functions. We can inline them
into the body to simplify the implementation a bit.
Commit: 8748e5e3ac5d06663c3f2057a71ef19065baebaf
https://github.com/llvm/llvm-project/commit/8748e5e3ac5d06663c3f2057a71ef19065baebaf
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Compiler.h
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/CompilerTest.cpp
Log Message:
-----------
[orc-rt] Add ORC_RT_UNREACHABLE / ORC_RT_BUILTIN_UNREACHABLE (#209466)
ORC_RT_BUILTIN_UNREACHABLE is an optimizer hint that a location is
unreachable, wrapping __builtin_unreachable / __assume(false). Executing
it is undefined behavior.
ORC_RT_UNREACHABLE(MSG) marks a point the program must never reach. It
aborts with MSG in +Asserts builds; otherwise it lowers to
ORC_RT_BUILTIN_UNREACHABLE.
Adds a CompilerTest unit test covering both the returning-function
compile path and, in +Asserts builds only, the abort behavior via a
death test.
Commit: 2e86804e612fc6d1bace4e08b8404d0ea383d368
https://github.com/llvm/llvm-project/commit/2e86804e612fc6d1bace4e08b8404d0ea383d368
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
Log Message:
-----------
[OpenACC] apply seq par dims to reduction variables (#209261)
When the acc.parallel op is "effectively sequential" apply the correct
par dims during recipe materialization of reduction variables
Commit: fba1a4b1292af3e7d08e9678e967ce12795d67d4
https://github.com/llvm/llvm-project/commit/fba1a4b1292af3e7d08e9678e967ce12795d67d4
Author: Hrólf Kraki <janmejayapanda400 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/recovery-expr-type.cpp
Log Message:
-----------
[clang] Prevent nested RecoveryExpr in BuildConvertedConstantExpression (#207072)
when BuildConvertedConstantExpression receives an expression that is
already a RecoveryExpr, return it directly instead of wrapping it in
another RecoveryExpr
Fixes #186656
Fixes #202117
Commit: 8518c74b5ef8950b9b604df588f29d9037fe1380
https://github.com/llvm/llvm-project/commit/8518c74b5ef8950b9b604df588f29d9037fe1380
Author: 1sgtpepper <cynejarviszarceno at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][llvm] Preserve function entry count metadata (#204707)
Fixes #202374.
Preserve LLVM function `!prof` metadata for:
- `synthetic_function_entry_count`
- `function_entry_count` with import GUID operands
The importer represents the entry count, count kind, and trailing import
GUID operands in a single `#llvm.function_entry_count` attribute,
validates malformed operands before mutating the operation, and exports
the metadata through `llvm::Function::setEntryCount`.
Tests cover import, export, malformed metadata operands, synthetic
counts, synthetic counts with trailing operands, import GUID
round-tripping, and raw i64 bit-pattern preservation.
Checks:
- `git diff --check`
- `git clang-format --diff origin/main -- ...`
- `llvm-as -disable-output` smoke check
Codex was used in making this PR.
Commit: 571a27629c1bdf0b63e65a884ffa35c5c3ede767
https://github.com/llvm/llvm-project/commit/571a27629c1bdf0b63e65a884ffa35c5c3ede767
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M orc-rt/test/unit/CMakeLists.txt
Log Message:
-----------
[orc-rt] Sort unit test sources in CMakeLists.txt. NFC. (#209470)
Commit: b26c417dd887aec06f4a09cd23a979b705c59fa2
https://github.com/llvm/llvm-project/commit/b26c417dd887aec06f4a09cd23a979b705c59fa2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Analysis/InlineCost.cpp
M llvm/test/Transforms/Inline/byval.ll
Log Message:
-----------
[InlineCost] Drop Requirements around ByVal Arguments
The underlying behavior was fixed in
e47359a925b88cd081ea85d10b55b0625d17b212, but given that the example
was marked alwaysinline, it bypassed any legality checks it would have
otherwise hit.
See
https://github.com/llvm/llvm-project/pull/97306#discussion_r1679306183
for discussion around which address space we should be using/legality.
This is necessary to preserve the behavior in
byval-with-non-alloca-addrspace.ll after we enable function attribute
compatibility checks in always-inline.
Reviewers: aeubanks, nikic, arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/209344
Commit: 37b8e765ce4837a7577e6f762bcdffe4b232759c
https://github.com/llvm/llvm-project/commit/37b8e765ce4837a7577e6f762bcdffe4b232759c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
A llvm/test/Transforms/Inline/X86/always-inline-incompatible-target-features.ll
M llvm/test/Transforms/Inline/always-inline-phase-ordering.ll
Log Message:
-----------
[AlwaysInliner] Do not inline on attribute mismatches
7bdca287b102ee935e982613dba2264cbc7a32ad made it so that the inliner
will not inline functions with mismatched target attributes regardless
of the presence of alwaysinline. However, always-inline never actually
called into this function so would still do the illegal thing. I believe
the motivation for not putting it here originally/recently was that
clang does some rudimentary target feature checks, but we should not be
crashing on valid IR, and we do generate IR that caused crashes in ISel
due to this (e.g., ICP in ThinLTO backend actions).
Reviewers: nikic, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/209345
Commit: c43967ca744ae2479987c1859df36fbb2fcf0866
https://github.com/llvm/llvm-project/commit/c43967ca744ae2479987c1859df36fbb2fcf0866
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/unittests/StaticAnalyzer/FalsePositiveRefutationBRVisitorTest.cpp
Log Message:
-----------
[analyzer] Uplift UnSatAtErrorNodeDueToRefinedConstraint test after smarter range inference (#209443)
Commit db28e48d67e3b0c44d88be9ea2d28eca2d239a9a taught
`SymbolicRangeInferrer` to derive the range of
`BO_Add`/`BO_Sub`/`BO_Mul` symbols from their operands via
`inferFromCorners`. This broke
`FalsePositiveRefutationBRVisitorTestBase.UnSatAtErrorNodeDueToRefinedConstraintNoReport`.
The test relied on the analyzer not being able to bound `int y = x + n;`
(with `x:[0,2]`, `n:[1,2]`), so that `reportIfCanBeTrue(y == 5)` created
a false state that only the Z3 crosscheck could refute. Now the analyzer
natively bounds y to `[1,4]`, proves `y == 5` infeasible, and never
emits `CAN_BE_TRUE`, so the non-Z3 assertion lost its second line.
Addition can never produce a gap (the sum of two intervals is a full
interval), so the test's premise is no longer achievable with '+'.
Switch to multiplication: for `x:[0,2]`, `n:[1,2]` the reachable
products are `{0,1,2,4}`, but `inferFromCorners` over-approximates `x*n`
to the contiguous range `[0,4]`. So `y == 3` is inside the inferred
range (native manager returns `UNKNOWN -> CAN_BE_TRUE` emitted without
Z3) yet is genuinely unreachable (Z3 refutes `x*n == 3` -> report
invalidated with crosscheck). This restores the exact refutation-visitor
mechanism the test exercises.
Fixes up #209048.
This issue would have been caught if we had a CI running Z3, like
proposed in #184695.
Assisted-by: Claude Opus 4.8
Commit: fb423ba07c3ff51fda3caa41d8bbb78d50f61906
https://github.com/llvm/llvm-project/commit/fb423ba07c3ff51fda3caa41d8bbb78d50f61906
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
A llvm/test/Assembler/thinlto-bad-summary-5.ll
Log Message:
-----------
[ThinLTO] Error on missing ValueInfo for function definition
We assume that these are available inside of BitcodeWriter
https://github.com/llvm/llvm-project/blob/09796808802f99c30a23bc0f2cd68243764e84ab/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp#L4927,
but do not currently validate this in input IR. This means that when
doing reductions with automated tooling in a non-asserts build, it is
pretty easy to end up with invalid IR that is not caught as invalid.
Reviewers: teresajohnson, mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/208948
Commit: 6af0a79d7a4e8558e89290df56491521c6730acd
https://github.com/llvm/llvm-project/commit/6af0a79d7a4e8558e89290df56491521c6730acd
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/docs/ReleaseNotes.md
M cmake/Modules/LLVMVersion.cmake
M flang/docs/ReleaseNotes.md
M libcxx/include/__config
M lld/docs/ReleaseNotes.rst
M llvm/docs/ReleaseNotes.md
M llvm/utils/gn/secondary/llvm/version.gni
M llvm/utils/lit/lit/__init__.py
M llvm/utils/mlgo-utils/mlgo/__init__.py
Log Message:
-----------
Bump version to 24.0.0git (#209473)
Commit: aefba88f46a6e55645c848f58f6ba56944d5ae62
https://github.com/llvm/llvm-project/commit/aefba88f46a6e55645c848f58f6ba56944d5ae62
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve-cmp-folds.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Add isel for zext(setcc(x,0,ne)) -> umin(x,1). (#209452)
Commit: c5022b53e409f68de0a21039f536d0119bb666c9
https://github.com/llvm/llvm-project/commit/c5022b53e409f68de0a21039f536d0119bb666c9
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
A llvm/test/CodeGen/SystemZ/vec-strict-pseudo-max.ll
A llvm/test/CodeGen/SystemZ/vec-strict-pseudo-min.ll
Log Message:
-----------
[SystemZ] Add support for strict_pseudo_fmin/fmax (#209434)
Mode 2 of vfmin/vfmax is also compatible with strict semantics
(producing invalid operation exception for both qNaN and sNaN and
returning RHS if masked.)
Commit: 6d12cf1389fa3ef57f880b8c0b25e66f0caa2f32
https://github.com/llvm/llvm-project/commit/6d12cf1389fa3ef57f880b8c0b25e66f0caa2f32
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/CGSCCPassManager.h
M llvm/include/llvm/CodeGen/MachinePassManager.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
Log Message:
-----------
Reapply "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208168) (#209414)
The PassConcept/PassModel vtable has a size of 64 bytes (offset to top,
RTTI pointer, complete object destructor, deleting destructor, run,
printPipeline, name, isRequired), which add up to 53kiB (all
targets)/44 kiB (single-target). As more back-end passes get ported to
the new pass manager, this size will increase.
Remove the vtables by replacing the virtual dispatch with explicit
function pointers, initialized when adding the pass to the pass manager.
While this very slightly increases the cost of adding a pass, there's
also a very slight win from avoiding the vtable indirection when
running/destructing the pass.
Use a unique_ptr with a custom deleter to store PassConcept instances.
This avoids new/delete size mismatches.
This reverts commit 6ae5965f26e53d7338a779a73725a597a4d136e5.
Commit: b1a6a90dff53b60d66f49516938ef47344a45699
https://github.com/llvm/llvm-project/commit/b1a6a90dff53b60d66f49516938ef47344a45699
Author: Vachan <vachanvy05 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
A llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
A llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
A llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
A llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
Log Message:
-----------
[X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (#208392)
fixes #193178
Commit: 3205689645eea30c9d7fde2474bdeff52629210d
https://github.com/llvm/llvm-project/commit/3205689645eea30c9d7fde2474bdeff52629210d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M orc-rt/test/unit/ErrorTest.cpp
Log Message:
-----------
[orc-rt] Move ErrorTest death tests to an ErrorDeathTest suite. (#209476)
GoogleTest recommends putting death tests in a suite whose name ends in
"DeathTest": it runs those suites before all others, which avoids the
fork-after-threads hazard that can make death tests flaky.
Move the nine EXPECT_DEATH tests in ErrorTest.cpp from the ErrorTest
suite to a new ErrorDeathTest suite. Only the suite name changes; the
test bodies are untouched.
Commit: 1b10cd91d12d783fe8754c100a3afaacfee3bf9f
https://github.com/llvm/llvm-project/commit/1b10cd91d12d783fe8754c100a3afaacfee3bf9f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
M llvm/test/Transforms/SLPVectorizer/X86/control-deps-schedule-data-recalculate.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-root-multiuse-same-opcode.ll
Log Message:
-----------
[SLP]Do not blacklist ordered-reduction operands on failed root attempt
An ordered reduction pulls its leaf operands into ReductionOps via the
fallback in matchAssociativeReduction. When such a reduction fails to
vectorize, marking every reduction op as analyzed also blocks those leaves,
which may still be valid reduction roots on their own.
Fixes https://github.com/llvm/llvm-project/pull/185320#issuecomment-4925949343
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/208511
Commit: db63c56a4f985426a0c44de4da215eb06cd5a278
https://github.com/llvm/llvm-project/commit/db63c56a4f985426a0c44de4da215eb06cd5a278
Author: Midhunesh <midhunesh.p at ibm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M compiler-rt/lib/asan/AIX/asan.link_with_main_exec.txt
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/test/asan/TestCases/AIX/vec_malloc_calloc.cpp
Log Message:
-----------
[ASan][AIX] Intercept __linux_vec_malloc/__linux_vec_calloc/__linux_realloc (#209359)
On AIX PASE, when `__VEC__` and `_ALL_SOURCE` are defined, the XL
compiler frontend lowers calls to vec_malloc/vec_calloc/realloc to
internal symbols named `__linux_vec_malloc`, `__linux_vec_calloc`, and
`__linux_realloc` instead of the standard
`vec_malloc`/`vec_calloc`/`realloc` names. These symbols were not
intercepted, so allocations made through them bypassed ASan entirely, no
redzone poisoning, no use-after-free or overflow detection.
This adds interceptors for `__linux_vec_malloc`, `__linux_vec_calloc`,
and `__linux_realloc`, following the same pattern as the existing
`vec_malloc`/`vec_calloc` interceptors (#175584): `__linux_vec_malloc`
and `__linux_vec_calloc` route through
`asan_vec_malloc`/`asan_vec_calloc` (16-byte aligned), and
`__linux_realloc` routes through the existing `asan_realloc`.
---------
Co-authored-by: Midhunesh <midhuensh.p at ibm.com>
Commit: e731908c4f84e04a5bfbe2784231f072aac90fe6
https://github.com/llvm/llvm-project/commit/e731908c4f84e04a5bfbe2784231f072aac90fe6
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaCXX/concepts-subsumption.cpp
Log Message:
-----------
[Clang] Adjust NTTP depths in IsAtLeastAsConstrained (#209445)
The default transform for NTTP, which is no-op, doesn't help if we need
to adjust their depths when comparing constraints.
Fixes https://github.com/llvm/llvm-project/issues/182671
Commit: 53da348e107f8e6a52625ceab355c6d200a9709a
https://github.com/llvm/llvm-project/commit/53da348e107f8e6a52625ceab355c6d200a9709a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
Log Message:
-----------
[LV] Add test showing incorrect trip count materialization (NFC) (#209460)
Add test case showing mis-compile for
https://github.com/llvm/llvm-project/issues/209159.
Commit: 0a5793ba557fb31ea1f847aa353397bb9b88cb18
https://github.com/llvm/llvm-project/commit/0a5793ba557fb31ea1f847aa353397bb9b88cb18
Author: ayrai-gb <ayrai at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
A llvm/test/Transforms/InstCombine/shuffle-cmp-cast-preserve-flags.ll
Log Message:
-----------
[InstCombine] Preserve IR flags when reordering icmp/fcmp/cast through a shuffle (#208627)
InstCombine's `evaluateInDifferentElementOrder` pushes a lane-reordering
`shufflevector` *through* the instruction that produced its input,
rebuilding that instruction on the reordered operands via the `buildNew`
helper — a `switch` with one case per opcode. The binary-operator case
carefully re-applies the original's poison-generating flags
(`nuw`/`nsw`, `exact`, FMF), and the `GetElementPtr` case passes through
its `getNoWrapFlags()`.
The `ICmp`, `FCmp`, and cast cases are the odd ones out. Each is a terse
`return Builder.CreateICmp/CreateFCmp/CreateCast(...)` that copies only
the predicate/opcode, returning the rebuilt instruction with default
flags. As a result a reordered `icmp samesign`, `fcmp nnan ninf`, `zext
nneg`, or `trunc nuw`/`nsw` silently loses its flag, even though the
flag held on the original.
Route each rebuilt instruction through `copyIRFlags(I)`, bringing these
cases in line with the binary-op and GEP cases. `copyIRFlags` transfers
only the flags the source instruction actually carried, so this can
never introduce an unsound promise. This is a missed-optimization fix,
not a miscompile — dropping these flags only makes later passes more
conservative.
Added
`llvm/test/Transforms/InstCombine/shuffle-cmp-cast-preserve-flags.ll`
(`icmp_samesign`, `fcmp_fmf`, `zext_nneg`), which feed the compare/cast
from `insertelement` chains so that `canEvaluateShuffled` permits the
reorder and `buildNew` actually runs, and check that the flag survives
on the rebuilt instruction after the reversing shuffle.
Found via jlebar's X86 LLVM bug-hunt / FuzzX effort:
https://github.com/SemiAnalysisAI/FuzzX/tree/master/x86/bugs/241-instcombine-buildNew-shuffle-reorder-drops-cmp-cast-flags
---------
Co-authored-by: Ayush Rai <ayrai at amd.com>
Commit: 2a1200e08cd1cb0e6744e38a7ec4611d983fb44f
https://github.com/llvm/llvm-project/commit/2a1200e08cd1cb0e6744e38a7ec4611d983fb44f
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/AutomapToTargetData.cpp
A flang/test/Lower/OpenMP/declare-target-automap.f90
M flang/test/Transforms/omp-automap-to-target-data.fir
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-host.mlir
M offload/test/offloading/fortran/declare-target-automap.f90
Log Message:
-----------
[Flang][OpenMP] Fix Fortran automap handling (#162501)
This fixes Fortran `declare target enter(automap:...)` handling for
allocatable
descriptors.
- Replace the previous `has_device_addr` target-region rewrite with
explicit
target data operations around allocation/deallocation.
- On allocation, emit:
- descriptor `map(always,to)` to keep the Fortran descriptor present
- storage `map(storage)` for the allocated array data
- `map(attach)` to update the device descriptor base address to the
device data
- On deallocation, delete both the mapped storage and descriptor.
- Add a weak visible offload-entry alias for local/hidden `declare
target to/enter`
globals so libomptarget can associate the host descriptor with the real
device
global without changing the original symbol linkage.
This fixes `offload/test/offloading/fortran/declare-target-automap.f90`
reported broken in #161265.
Co-authored-by: Codex <codex at openai.com>
Commit: e1d7480aabee9ea5b06be8f7902ff2ab23f50647
https://github.com/llvm/llvm-project/commit/e1d7480aabee9ea5b06be8f7902ff2ab23f50647
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
A clang/lib/StaticAnalyzer/Checkers/ReportDanglingPtrDeref.cpp
A clang/test/Analysis/dangling-ptr-deref.cpp
Log Message:
-----------
[analyzer] Implemented the DanglingPtrDeref checker to detect use-after-scope lifetime errors (#209278)
Commit: 8b7b61f099616a3fbeca563b7a1da34279142797
https://github.com/llvm/llvm-project/commit/8b7b61f099616a3fbeca563b7a1da34279142797
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
A llvm/test/tools/llvm-reduce/reduce-instructions-x86-amx.ll
A llvm/test/tools/llvm-reduce/reduce-operands-x86-amx.ll
M llvm/tools/llvm-reduce/deltas/ReduceInstructions.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOperands.cpp
Log Message:
-----------
[llvm-reduce] Avoid invalid replacements with x86_amx type (#209506)
It's not possible to create zero constants of this type, and even
poison constants result in a verifier error when used as an intrinsic
argument.
Commit: d6349588f34bc2f087ba6440049473ecd97853e0
https://github.com/llvm/llvm-project/commit/d6349588f34bc2f087ba6440049473ecd97853e0
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][Windows] add release notes for the Python private API removal (#209456)
The official lldb releases set `LLDB_EMBED_PYTHON_HOME` to `OFF`
https://github.com/llvm/llvm-project/blob/9582f71a3b5f71e871bee0062e641f3587e0ae23/llvm/utils/release/build_llvm_release.bat#L213
meaning that lldb on Windows does not use the private Python API by
default. Users are free to use any Python version they want. Add a
release note for this.
Commit: de4bb53abe61dec8482f91b39ce3dac6ab0d5cd9
https://github.com/llvm/llvm-project/commit/de4bb53abe61dec8482f91b39ce3dac6ab0d5cd9
Author: lntue <lntue at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
Log Message:
-----------
[libc] Fix posix_madvise_test for riscv32 bot. (#209504)
Commit: e217dcb8de5dd83b307fe8b95b43de11a7d894ab
https://github.com/llvm/llvm-project/commit/e217dcb8de5dd83b307fe8b95b43de11a7d894ab
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
Log Message:
-----------
[mlir] fix builders by moving var into assert (#209494)
non-asserts builders are failing since `vecTy` is unused aside from this
one assertion: https://lab.llvm.org/buildbot/#/builders/228/builds/4754
Since side-effects here are uninteresting, move the entire expr into the
assert, per CodingStandards.md
Fix-forward for #199700
Commit: 05aba69f4d8ee34179b0658c57280064a724f039
https://github.com/llvm/llvm-project/commit/05aba69f4d8ee34179b0658c57280064a724f039
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
A llvm/test/tools/llvm-reduce/reduce-operands-to-args-x86-amx.ll
M llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.cpp
Log Message:
-----------
[llvm-reduce] Avoid another invalid x86_amx replacement (#209509)
Commit: 7cd1a8361376525a6094b0b365d5e726f014cde6
https://github.com/llvm/llvm-project/commit/7cd1a8361376525a6094b0b365d5e726f014cde6
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/tools/lldb-dap/DAPSessionManager.cpp
Log Message:
-----------
[lldb-dap] Simplify DAPSessionManager GetInstance (#209264)
We don't need the `std::call_once` as this guaranteed to be [thread safe
and initialised
once](https://en.cppreference.com/cpp/language/storage_duration#Static_block_variables)
since c++11.
Commit: 2ff357b2e1b9aed337a50478af2469fd9fd7442d
https://github.com/llvm/llvm-project/commit/2ff357b2e1b9aed337a50478af2469fd9fd7442d
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Support/KnownBits.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sdiv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-udiv.mir
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[KnownBits] Use min non-zero divisor and quotient lower bound in udiv (#209360)
`KnownBits::udiv` was discarding information in two cases. This tightens
both:
- A zero divisor is UB, so when the divisor's known bits permit zero,
use the smallest non-zero value as the minimum divisor instead of
bailing out.
- Compute a lower bound on the quotient (`MinNum / MaxDenom`) and keep
the leading bits it shares with the upper bound, the same way
`ConstantRange::toKnownBits` does.
Both follow from the quotient being monotonic in each operand, with all
four operand bounds attainable.
`KnownBitsTest.BinaryExhaustive` passes with no unsound results, and an
exhaustive width-4 check drops suboptimal outputs from 1790 to 864.
Regenerated the affected MIR and InstCombine tests; two X86 fixed-point
tests lose now-redundant instructions.
Assisted by Claude (Anthropic).
Commit: 132ba0d21e9f53671906af6b0a8343245b4c5021
https://github.com/llvm/llvm-project/commit/132ba0d21e9f53671906af6b0a8343245b4c5021
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
Log Message:
-----------
[CIR][NFC] Update fpclass mask checks (#208975)
I updated the CIR checks to match the formatted `llvm.is.fpclass` masks
introduced by #207653. This fixes the three CIR test failures that
became visible after #208919 restored the CIR build.
Commit: 0530817558e92a99ad3a37372dc42eb165f5f69e
https://github.com/llvm/llvm-project/commit/0530817558e92a99ad3a37372dc42eb165f5f69e
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/__init__.py
R lldb/packages/Python/lldbsuite/test/tools/lldb_dap/dap_types.py
R lldb/packages/Python/lldbsuite/test/tools/lldb_dap/lldb_dap_testcase.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
A lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
A lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/utils.py
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_args.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_basic.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_cwd.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_debuggerRoot.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_disableSTDIO.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_array.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_object.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_extra_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_launch_commands_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_program.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_no_lldbinit_flag.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_disabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_enabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_sourcePath.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stopOnEntry.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_terminate_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_termination.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_version.py
M lldb/test/API/tools/lldb-dap/module-event/TestDAP_module_event.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/API/tools/lldb-dap/moduleSymbols/TestDAP_moduleSymbols.py
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
M lldb/test/API/tools/lldb-dap/stackTraceCompilerGeneratedCode/TestDAP_stackTraceCompilerGeneratedCode.py
M lldb/test/API/tools/lldb-dap/stackTraceDisassemblyDisplay/TestDAP_stackTraceDisassemblyDisplay.py
M lldb/test/API/tools/lldb-dap/stackTraceMissingFunctionName/TestDAP_stackTraceMissingFunctionName.py
M lldb/test/API/tools/lldb-dap/stackTraceMissingModule/TestDAP_stackTraceMissingModule.py
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_DAPConnection.py
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_EventHistory.py
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_Types.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
Log Message:
-----------
[NFC][lldb-dap] Simplify DAP imports. (#209442)
Expose commonly used classes in the lldb_dap package and avoid repeating
the lldb_dap namespace.
Commit: 921361839666196d5b60fc6e57836570ec86665a
https://github.com/llvm/llvm-project/commit/921361839666196d5b60fc6e57836570ec86665a
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/SymStore/CMakeLists.txt
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Add release note for SymStore and generate settings docs (#209469)
We didn't have a release note for the symstore symbol locator and the
settings weren't included on https://lldb.llvm.org/use/settings.html.
The second part is probably because both were landing at the same time,
so I missed the JSON output there.
Commit: ce72145fd034cdb8abe5d14c5f9e73b8b47a8e6b
https://github.com/llvm/llvm-project/commit/ce72145fd034cdb8abe5d14c5f9e73b8b47a8e6b
Author: Usman Nadeem <mnadeem at qti.qualcomm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[SelectionDAG] Add GET_ACTIVE_LANE_MASK to ComputeNumSignBits (#208977)
`GET_ACTIVE_LANE_MASK ` acts like `icmp ult` so code is similar to
`SETCC`.
Commit: fdc884f5a5f0921a191bfec3bdf2ac9aae21687a
https://github.com/llvm/llvm-project/commit/fdc884f5a5f0921a191bfec3bdf2ac9aae21687a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
Log Message:
-----------
[docker][Windows] install libxml2 using vcpkg (#209422)
Since https://github.com/llvm/llvm-project/pull/209258, lldb uses
`lldb-server.exe` by default if libxml2 is available at build time. This
means that lldb-server requires installing libxml2 in the CI
environments to test it.
This patch adds a step to install libxml2 in the docker container used
for lldb pre-merge testing on Windows.
Commit: 7b54498f07642eb8f243664079211528d6a3b0a6
https://github.com/llvm/llvm-project/commit/7b54498f07642eb8f243664079211528d6a3b0a6
Author: Nicolas Miller <nicolas.pierre.miller at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/test/CodeGen/Hexagon/fminmax-v67.ll
M llvm/test/CodeGen/Hexagon/fminmax.ll
Log Message:
-----------
[Hexagon] Add lowering for `{max,min}num` (#202938)
Since the floating point requirements for `{max,min}num` are less strict
than the ones for `{max,min}imumnum`, it is fine to lower them to the
same instructions that already meet the requirements for the latter.
This is similar to what the RISC-V backend does for example.
This is also a lot better than generating a standard library call.
Commit: 48c259847d186c4d773407c63393e28d0170666b
https://github.com/llvm/llvm-project/commit/48c259847d186c4d773407c63393e28d0170666b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
Log Message:
-----------
[VPlan] Use VPlan::hasTailFolded in materializeConstantVectorTC. (#209502)
The current checks in materializeConstantVectorTripCount miss
tail-folded cases when vectorizing loops with fmax without fast-math
flags. Use recently added hasTailFolded helper to ensure we always bail
out on tail-folded loops.
Fixes https://github.com/llvm/llvm-project/issues/209159.
Commit: a80e98e15a6188f2eed31a70a8834264a2319f81
https://github.com/llvm/llvm-project/commit/a80e98e15a6188f2eed31a70a8834264a2319f81
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/test/CodeGenCUDA/device-stub.cu
Log Message:
-----------
[clang][cuda] Use the source filename for module ID (#209239)
Prior to
[#184065](vscode-file://vscode-app/Applications/Visual%20Studio%20Code.app/Contents/Resources/app/out/vs/code/electron-browser/workbench/workbench.html
"https://github.com/llvm/llvm-project/issues/184065") (relanded in
[#201849](vscode-file://vscode-app/Applications/Visual%20Studio%20Code.app/Contents/Resources/app/out/vs/code/electron-browser/workbench/workbench.html
"https://github.com/llvm/llvm-project/issues/201849")), the code
introduced in https://reviews.llvm.org/D42922 was using the GUID of an
internal linkage GlobalValue to create a module id, which would then be
used in a few cuda-specific places (including creating a symbol name
suffix).
[#184065](vscode-file://vscode-app/Applications/Visual%20Studio%20Code.app/Contents/Resources/app/out/vs/code/electron-browser/workbench/workbench.html
"https://github.com/llvm/llvm-project/issues/184065") assumed the
linkage of that symbol is external - which it isn't - and, thus, all
module IDs computed for this would be identical.
The fix is to not rely on GlobalValue GUIDs in the first place. What is
needed here is a hash that's specific to this module. So we're creating
that and explicitly decoupling that calculation from GlobalValue's
notion of GUIDs.
The change should be safe wrt uniqueness / hash collisions: the old
behavior was computing a hash where the only distinguishing component
was the module's `getSourceFileName`.
FWIW, there's a stronger module ID we could compute, with
`llvm::getUniqueModuleId` (or with a trivial refactoring of it, because
it prepends a ".").
Commit: 97f76580cdb0893d0b4edc7adf703162a23c0a67
https://github.com/llvm/llvm-project/commit/97f76580cdb0893d0b4edc7adf703162a23c0a67
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/test/CodeGen/memcmp-inline-builtin-to-asm.c
M clang/test/CodeGen/memcpy-inline-builtin.c
M clang/test/CodeGen/pr9614.c
Log Message:
-----------
[Clang] Require x86 target for some tests (#209532)
These tests assert behavior about the always-inliner which now requires
a target to be present to check function attribute compatibility for
inlining.
Fix forward for 37b8e765ce4837a7577e6f762bcdffe4b232759c.
Commit: 7d511e4c9dfeed9884bc3e0b76f720e6cc1ad437
https://github.com/llvm/llvm-project/commit/7d511e4c9dfeed9884bc3e0b76f720e6cc1ad437
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
R llvm/utils/gn/secondary/clang-tools-extra/clang-doc/markdown/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-doc/BUILD.gn
Log Message:
-----------
[gn] port 7633d1e7a0f336 (no more clangDocMarkdown) (#209546)
Commit: 1f066996b7cc3715300ee9841e4000cd546d6135
https://github.com/llvm/llvm-project/commit/1f066996b7cc3715300ee9841e4000cd546d6135
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-doc/BUILD.gn
Log Message:
-----------
[gn build] Port 1bd46015ea4e (#209543)
Commit: 6f2cffb15640809fb86e27c807b366c08e790c54
https://github.com/llvm/llvm-project/commit/6f2cffb15640809fb86e27c807b366c08e790c54
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port 5d5dd83a547e (#209544)
Commit: 2eac996946092e7dc11ef4027c9202734b7e600e
https://github.com/llvm/llvm-project/commit/2eac996946092e7dc11ef4027c9202734b7e600e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/lo16-lo16-physreg-copy-sgpr.mir
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-f64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i1.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-invariant.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32-no-ds128.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-assert.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-sign-bits.ll
M llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/load-store-cnt.ll
M llvm/test/CodeGen/AMDGPU/load-store-opt-addc0.mir
M llvm/test/CodeGen/AMDGPU/load-store-opt-dlc.mir
M llvm/test/CodeGen/AMDGPU/load-store-opt-ds-regclass-constrain.mir
M llvm/test/CodeGen/AMDGPU/load-store-opt-scale-offset.mir
M llvm/test/CodeGen/AMDGPU/load-store-opt-scc.mir
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-sort-framerefs.mir
M llvm/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.mir
M llvm/test/CodeGen/AMDGPU/loop-idiom.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
M llvm/test/CodeGen/AMDGPU/loop-on-function-argument.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir
M llvm/test/CodeGen/AMDGPU/lower-brcond-with-xor.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-dead-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-intervals.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-other-terminators.mir
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-declaration.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-existing.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
M llvm/test/CodeGen/AMDGPU/lower-empty-ctor-dtor.ll
M llvm/test/CodeGen/AMDGPU/lower-i1-copies-clear-kills.mir
M llvm/test/CodeGen/AMDGPU/lower-i1-copies-implicit-def-unstructured-loop.mir
M llvm/test/CodeGen/AMDGPU/lower-indirect-lds-references.ll
M llvm/test/CodeGen/AMDGPU/lower-intrinsics-noalias-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-arguments-noalias-call-no-ptr-args.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds-constexpr.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds-super-align.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-alias-scope.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-noalias.ll
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics-threshold.ll
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (23) (#209214)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: c8c3c30d5b986450618e77ed1069232a2063a0ae
https://github.com/llvm/llvm-project/commit/c8c3c30d5b986450618e77ed1069232a2063a0ae
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port 612e7ca85c53 (#209545)
Commit: c8e2abb23d252da15fc16fcd6f43f9ab7543e02d
https://github.com/llvm/llvm-project/commit/c8e2abb23d252da15fc16fcd6f43f9ab7543e02d
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/BPF/BUILD.gn
Log Message:
-----------
[gn build] Port a718d2ad092b (#209547)
Commit: 61853bac070678debbd80acf891dd681ceb0c1eb
https://github.com/llvm/llvm-project/commit/61853bac070678debbd80acf891dd681ceb0c1eb
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-doc/BUILD.gn
Log Message:
-----------
[gn build] Port c6ebd7a2ced7 (#209548)
Commit: 26e2b0980e10001174405d4412abd0d86f2e0ff5
https://github.com/llvm/llvm-project/commit/26e2b0980e10001174405d4412abd0d86f2e0ff5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port e1d7480aabee (#209549)
Commit: 77ff300cdfdbafc1abf60a79c32da497616afc1a
https://github.com/llvm/llvm-project/commit/77ff300cdfdbafc1abf60a79c32da497616afc1a
Author: lntue <lntue at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
Log Message:
-----------
[libc] Fix a typo in posix_madvise_test. (#209523)
Commit: cb83c6a8ba2f17cfb8d01d10722b9c1aa9743328
https://github.com/llvm/llvm-project/commit/cb83c6a8ba2f17cfb8d01d10722b9c1aa9743328
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/minmax.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/search_n.bench.cpp
Log Message:
-----------
[libc++][NFC] Remove unused <cassert> from algorithm benchmarks (#209492)
A few benchmark files were including <cassert> but didn't use it.
Commit: 1a072b5f008321f22e61f744b7474fe52f0ee48c
https://github.com/llvm/llvm-project/commit/1a072b5f008321f22e61f744b7474fe52f0ee48c
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/SystemZ/zos-ppa2.ll
Log Message:
-----------
Fix test that had a check embedded which depended on the current LLVM version number. (#209530)
When the test was refactored, it embedded the current LLVM version
number in one of the check strings so that when I bumped the LLVM
version to 24, the test failed since it was expecting 23 but the
compiler was now generating 23.
Fix this issue by changing the check to a regex so it doesn't need
updating after every LLVM version change.
Commit: 83dc9c6c9a56bc90faa810512e0577e59dc46033
https://github.com/llvm/llvm-project/commit/83dc9c6c9a56bc90faa810512e0577e59dc46033
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Support/InitFIR.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M mlir/include/mlir/Target/LLVMIR/Dialect/All.h
R mlir/include/mlir/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.h
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
R mlir/lib/Target/LLVMIR/Dialect/OpenACC/CMakeLists.txt
R mlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
R mlir/test/Target/LLVMIR/openacc-llvm.mlir
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Support/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][openacc] Remove OpenACCToLLVMIRTranslation (#209295)
OpenACCToLLVMIRTranslation was designed more than 5 years ago and does
not align with the current upstreaming effort. OpenACC will be converted
to LLVM IR dialect before the translation to LLVM IR so this translation
is obsolete. Remove it to avoid confusion.
Commit: 4697832bae3f891c474fba3c58e852585bd1ff5f
https://github.com/llvm/llvm-project/commit/4697832bae3f891c474fba3c58e852585bd1ff5f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/lower-module-lds-all-indirect-accesses.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr-phi.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-inactive.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-classify.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-global-scope.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-internal-func.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-internal-multi-user.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-precise-allocate-to-module-struct.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-single-var-ambiguous.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-single-var-unambiguous.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-used-list.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds.ll
M llvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
M llvm/test/CodeGen/AMDGPU/lower-noalias-kernargs.ll
M llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-opt.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lro-coerce-v4i8-phi-loop.ll
M llvm/test/CodeGen/AMDGPU/lro-phi-samebb-nonlookthrough-store.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/lsr-cost-model-vector-iv.ll
M llvm/test/CodeGen/AMDGPU/lto-lower-module-lds.ll
M llvm/test/CodeGen/AMDGPU/machine-cp-propagation.mir
M llvm/test/CodeGen/AMDGPU/machine-cse-commute-target-flags.mir
M llvm/test/CodeGen/AMDGPU/machine-cse-ssa.mir
M llvm/test/CodeGen/AMDGPU/machine-function-info-cwsr.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-rematerialization-scoring.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-revert-slot-monotonicity.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-cycle.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-fence.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-lane-mask.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-undef-use.mir
M llvm/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-mfma-scale.gfx950.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/mai-inline.ll
M llvm/test/CodeGen/AMDGPU/make-buffer-rsrc-lds-fails.ll
M llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
M llvm/test/CodeGen/AMDGPU/mcp-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/mcp-implicit-clobber.mir
M llvm/test/CodeGen/AMDGPU/mcp-overlap-after-propagation.mir
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy-fixed-align.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memcpy-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AMDGPU/memcpy_const_compare.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memmove-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memmove-scalar-load.ll
M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (24) (#209485)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: e255003ae9a942d0d62c5c8405dc45de97f31ca4
https://github.com/llvm/llvm-project/commit/e255003ae9a942d0d62c5c8405dc45de97f31ca4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/memory-legalizer-av-none.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-av-unknown.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-barriers-mmra.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-barriers.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-lds-dma-volatile-and-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-region.mir
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/merge-buffer-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-buffer.mir
M llvm/test/CodeGen/AMDGPU/merge-consecutive-wait-alus.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-saddr-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-with-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx10.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx11.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx10.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx11.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-agpr.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.mir
M llvm/test/CodeGen/AMDGPU/merge-s-load.mir
M llvm/test/CodeGen/AMDGPU/merge-sbuffer-load.mir
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/merge-store-usedef.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/merge-tbuffer-gfx10.mir
M llvm/test/CodeGen/AMDGPU/merge-tbuffer-gfx11.mir
M llvm/test/CodeGen/AMDGPU/merge-tbuffer-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-tbuffer-gfx9.mir
M llvm/test/CodeGen/AMDGPU/merged-bfx-opt.ll
M llvm/test/CodeGen/AMDGPU/mesa3d.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-convergent.mir
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (25) (#209486)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 4a2cfd73fdb55b32c3f341b0db589cf1f22c3a70
https://github.com/llvm/llvm-project/commit/4a2cfd73fdb55b32c3f341b0db589cf1f22c3a70
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/aggressive-interleaving.ll
M llvm/test/Transforms/LoopVectorize/AArch64/alias-mask-uniforms.ll
M llvm/test/Transforms/LoopVectorize/AArch64/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-constant-ops.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-incomplete-chains.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/pr41179.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing-alias-mask.ll
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-alias-mask.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/induction-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-opaque-pointers.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/pr72969.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/alias-mask-data-tail-folding-style.ll
M llvm/test/Transforms/LoopVectorize/alias-mask-needs-freeze.ll
M llvm/test/Transforms/LoopVectorize/alias-mask-small-index.ll
M llvm/test/Transforms/LoopVectorize/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/hoist-and-sink-mem-ops-with-invariant-pointers.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-different-insert-position.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr45259.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/preserve-dbg-loc-and-loop-metadata.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-known-true.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-needed-but-empty.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
Log Message:
-----------
[VPlan] Expand SCEV ptrtoint/ptrtoaddr casts in VPSCEVExpander. (#209172)
Extend the cast handling in VPSCEVExpander::tryToExpand to also expand
scPtrToInt and scPtrToAddr SCEV expressions to PtrToInt/PtrToAddr
VPInstructions.
This allows pointer-distance expressions (e.g. the runtime-check
difference between two pointers, which contains ptrtoint of each
pointer) to be expanded directly to VPInstructions instead of falling
back to a VPExpandSCEVRecipe.
PR: https://github.com/llvm/llvm-project/pull/209172
Commit: 194f7a360c475fd7da253248a6aade878b52318c
https://github.com/llvm/llvm-project/commit/194f7a360c475fd7da253248a6aade878b52318c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-014bb.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-cfg-with-self-loop.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-phi-merge-distances.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-acyclic-cfg-with-4-self-loops.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-control-flow-11blocks.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-control-flow-15blocks.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-single-loop-a.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/complex-single-loop.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/if_else_with_loops_nested_in_2_outer_loops.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/inner_cfg_in_2_nested_loops.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/loop_nested_in_3_outer_loops_complex_cfg.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/nested-loops-with-side-exits-a.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/sequence_2_loops.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/simple-loop-3blocks.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_basic_case.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_do_not_spill_restore_inside_loop.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_common_dominator.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader1.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader2.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader3.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader4.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_keep_spilled_reg_live.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_nested_loops.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_in_common_dominator_and_optimize_restores.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_loop_livethrough_reg.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_spill_loop_value_in_exit_block.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/three-tier-ranking-nested-loops.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/triple-nested-loops.mir
M llvm/test/CodeGen/AMDGPU/NextUseAnalysis/two-sequential-loops.mir
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
M llvm/test/CodeGen/AMDGPU/mir-dynamic-vgpr-block-size-roundtrip.mir
M llvm/test/CodeGen/AMDGPU/misaligned-vgpr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir
M llvm/test/CodeGen/AMDGPU/misched-killflags.mir
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/mixed_wave32_wave64.ll
M llvm/test/CodeGen/AMDGPU/mmo-target-flags-folding.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/mode-register-fpconstrain.ll
M llvm/test/CodeGen/AMDGPU/mode-register-fptrunc.gfx11plus-fake16.mir
M llvm/test/CodeGen/AMDGPU/mode-register-fptrunc.gfx11plus.mir
M llvm/test/CodeGen/AMDGPU/mode-register-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/mode-register.mir
M llvm/test/CodeGen/AMDGPU/modf-constant-fold.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu-flat.mir
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-absdiff.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-lshl_add.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-lshlrev.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-fake16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/movreld-bug.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multi-call-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multi-dword-vgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/multi-use-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/AMDGPU/nand.ll
M llvm/test/CodeGen/AMDGPU/narrow_math_for_and.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/neg_ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/neighboring-mfma-padding.mir
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-bundle-asm.ll
M llvm/test/CodeGen/AMDGPU/no-corresponding-integer-type.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-read.mir
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (26) (#209487)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 27dce1908288eb57ce90b7c42fb7046260f39731
https://github.com/llvm/llvm-project/commit/27dce1908288eb57ce90b7c42fb7046260f39731
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-wsloop.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-unboxed-wsloop.mlir
Log Message:
-----------
[flang][OpenMP] Resolve private array source from block-arg owner in alias analysis (#208227)
Part of #208086. `fir::AliasAnalysis::getSource` fails to recognize an
OpenMP private array as an `Allocate` source when its `hlfir.declare` is
nested inside an omp.loop_nest, and conservatively returns `MayAlias`.
This changes `getSource` to resolve the clause-carrying OpenMP op from
the private block argument's owner region, so the private is correctly
classified and does not spuriously alias other objects. Assisted-by: Copilot
Commit: 9c7d1d2fe0d607b0cd5cfca1b8bb9ea6eee374ec
https://github.com/llvm/llvm-project/commit/9c7d1d2fe0d607b0cd5cfca1b8bb9ea6eee374ec
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/test/std/ranges/range.utility/view.interface/view.interface.pass.cpp
Log Message:
-----------
[libc++][ranges][NFC] Format `view.interface.pass.cpp` (#209391)
A prerequisite to #205012
Commit: 4264f9154c9ee153392cce6c90827fa4544bff7e
https://github.com/llvm/llvm-project/commit/4264f9154c9ee153392cce6c90827fa4544bff7e
Author: void_17 <61356189+void2012 at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Support/Windows/DynamicLibrary.inc
Log Message:
-----------
[NFC] Rename misleading `msvcrt` comment in `Windows/DynamicLibrary.inc` (#208884)
The comment in function `DynamicLibrary::HandleSet::DLSym` referred to
the mysterious `msvc.dll` windows standard dynamic library which simply
doesn't exist and `msvcrt.dll` was likely meant, so fix the comments.
Commit: 7618426138aae95561da676a1d1e10ee0392bf78
https://github.com/llvm/llvm-project/commit/7618426138aae95561da676a1d1e10ee0392bf78
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/include/__functional/function.h
Log Message:
-----------
Revert "[libc++][NFC] Inline std::function members into the class body" (#209555)
Reverts llvm/llvm-project#209461
This is breaking LLDB testing bots and it also failed pre-merge CI.
Commit: d454522b4140d7baa9d1be5d0ce2da327104c0d1
https://github.com/llvm/llvm-project/commit/d454522b4140d7baa9d1be5d0ce2da327104c0d1
Author: Usman Nadeem <mnadeem at qti.qualcomm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/CodeGen/AArch64/active_lane_mask.ll
M llvm/test/CodeGen/AArch64/sve-mask-partition.ll
Log Message:
-----------
[AArch64] Tighten conditions for expanding GET_ACTIVE_LANE_MASK (#208962)
Lower to whilelo in more cases.
For fixed-width even if the operands are <32 bits, expanding is going to
be more expensive compared to promoting the operands from a smaller
type.
For SVE I also added lowering for nxv1i1 type as: `nxv2i1 -> extract
nxv1i1.`
Commit: 84199dde7198eabc924e93750063a20ceef26ef2
https://github.com/llvm/llvm-project/commit/84199dde7198eabc924e93750063a20ceef26ef2
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
A libunwind/test/.clang-format
Log Message:
-----------
[libunwind][test] Add .clang-format (#209364)
Borrow from `libcxx/test/.clang-format` to avoid `clang-format`
suggestions that are incompatible with `FileCheck`.
Commit: a56f9cefd75cd12802e37a66425b1a57d761a0af
https://github.com/llvm/llvm-project/commit/a56f9cefd75cd12802e37a66425b1a57d761a0af
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
Log Message:
-----------
[AMDGPU][CodeGen] Pre-commit test for gfx1250 Setreg hazard violation (#209524)
Co-issue optimizations during placement of `S_SET_VGPR_MSB` instructions
can create a situation where a `S_SET_VGPR_MSB` appears directly after a
`S_SETREG_IMM32_B32(MODE)`, silently dropping the former and causing a
hazard violation on gfx1250.
Commit: 79d1db7e00932407c4aa1028632f2c188d14cac8
https://github.com/llvm/llvm-project/commit/79d1db7e00932407c4aa1028632f2c188d14cac8
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
A llvm/test/CodeGen/RISCV/xqcilo-xqcilia-frame-index.ll
Log Message:
-----------
[RISCV] Fold 26-bit frame-index offsets into Xqcilo/Xqcilia load/store/addi (#209315)
Extend frame-index addressing such that the sp-relative offset resolved for a stack access that fits within 26-bit and not 12-bits; folds directly into the wide Xqcilo/Xqcilia instructions. This is achieved by adding the support for the following:
- Adding support for stack accesses to complex pattern `SelectAddrRegImm26` for 26-bit loads and stores
- Adding support for frame index operand to qc.e.addi instruction
- Allowing 26-bit offsets to fold into the loads and store instructions from qcilo/qcilia extension
Commit: 8410006af686f3fb5e8af2705c8aab28c374c13a
https://github.com/llvm/llvm-project/commit/8410006af686f3fb5e8af2705c8aab28c374c13a
Author: Alex Kuleshov <0xAX at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/tools/llvm-mc/Disassembler.cpp
M llvm/tools/llvm-mc/Disassembler.h
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
[llvm-mc] Remove unused MCRegisterInfo/MCAsmInfo in Disassembler (NFC) (#208483)
Disassembler::disassemble() creates MCRegisterInfo and MCAsmInfo
instances that are no longer used.
Initially, they were introduced in a1bc0f5 to construct MCContext after
MCDisassembler began requiring one, but became dead in 2cb2707.
llvm-mc's main() already creates both objects and passes them into the
MCContext that disassemble() receives, so the error paths here are
unreachable.
Removing these objects also makes the MCTargetOptions parameter unused,
so drop it as well.
Commit: c7a0afe5049a3d4789f34a8d746c6a45d73557b4
https://github.com/llvm/llvm-project/commit/c7a0afe5049a3d4789f34a8d746c6a45d73557b4
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/source/Utility/Policy.cpp
Log Message:
-----------
[lldb] Gate `PolicyStack::Current()` log behind verbose (#209527)
`Process::GetState()` calls `PolicyStack::Get().Current()` on every
prompt redraw, so the previous unconditional LLDB_LOG at the read site
fired on every keypress once `log enable lldb process` was on, drowning
out any other process log output. Keep the dump for when it's actually
wanted, but only fire it if the log is set to verbose.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 4471a0be22e8784a7487e1ce01e9083b50c47116
https://github.com/llvm/llvm-project/commit/4471a0be22e8784a7487e1ce01e9083b50c47116
Author: David Young <davidayoung at meta.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[lldb][bazel] Generate SafeAutoloadPaths.inc in the Bazel overlay (#209454)
The auto-load-paths mechanism added in #187031 generates
SafeAutoloadPaths.inc via a CMake configure_file() of
SafeAutoloadPaths.inc.in (lldb/source/Core/CMakeLists.txt), gated by the
LLDB_SAFE_AUTO_LOAD_PATHS cache variable which defaults to empty.
Debugger.cpp #includes SafeAutoloadPaths.inc, but the Bazel overlay
never modeled the configure_file(), so the header is missing from the
Bazel build of lldb Core.
Reproduce the generation with expand_template (substituting
@SAFE_PATH_ENTRIES@ with "" to match the empty default). Emit the header
under include/ and expose it via includes = ["include"] so the bare
#include resolves, matching how Config.h and Version.inc are handled in
this overlay.
assisted with: claude
I ensured this is valid bazel that Meta can translate into valid BUCK
and build lldb with internally via buck2. This appears to match a few
other template/library pairs.
Commit: 666b87dd01d31cc80f356315c1c2d03974759138
https://github.com/llvm/llvm-project/commit/666b87dd01d31cc80f356315c1c2d03974759138
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/nofpclass-call.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/noop-shader-O0.ll
M llvm/test/CodeGen/AMDGPU/nop-data.ll
M llvm/test/CodeGen/AMDGPU/nor-divergent-lanemask.ll
M llvm/test/CodeGen/AMDGPU/nor.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.mir
M llvm/test/CodeGen/AMDGPU/nsa-vmem-hazard.mir
M llvm/test/CodeGen/AMDGPU/object-linking-local-resources.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf-and-hostcall.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf-pipeline.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf-unsupported.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/opt-exec-masking-pre-ra-update-liveness-wave32.mir
M llvm/test/CodeGen/AMDGPU/opt-exec-masking-pre-ra-update-liveness.mir
M llvm/test/CodeGen/AMDGPU/opt-vgpr-live-range-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.mir
M llvm/test/CodeGen/AMDGPU/optimize-ds-bvh-stack-pre-ra.ll
M llvm/test/CodeGen/AMDGPU/optimize-exec-copies-extra-insts-after-copy.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-alloc-failure.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-loop-phi.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-no-fold-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-non-empty-but-used-interval.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-masking-strip-terminator-bits.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking-wave32.mir
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/or3.ll
M llvm/test/CodeGen/AMDGPU/overlapping-tuple-copy-implicit-op-failure.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-dependencies.mir
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-bf16.ll
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/pal-userdata-regs.ll
M llvm/test/CodeGen/AMDGPU/partial-forwarding-hazards.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/peephole-fold-imm-multi-use.mir
M llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
M llvm/test/CodeGen/AMDGPU/peephole-opt-fold-reg-sequence-subreg.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
M llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/perfhint.ll
M llvm/test/CodeGen/AMDGPU/permlane-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permlane16_var-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/phi-av-pressure.ll
M llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
M llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
M llvm/test/CodeGen/AMDGPU/phys-partial-liveness.mir
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir
M llvm/test/CodeGen/AMDGPU/post-ra-sched-reset.mir
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir
M llvm/test/CodeGen/AMDGPU/postra-bundle-vimage-vsample-gfx12.mir
M llvm/test/CodeGen/AMDGPU/postra-machine-sink-livein-subrange.mir
M llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir
M llvm/test/CodeGen/AMDGPU/postra-norename.mir
M llvm/test/CodeGen/AMDGPU/postra-sched-attribute.ll
M llvm/test/CodeGen/AMDGPU/postra-sink-update-dependency.mir
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (27) (#209488)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 4473e5fb88c3f222e6042d0c181a113a2d92b8a0
https://github.com/llvm/llvm-project/commit/4473e5fb88c3f222e6042d0c181a113a2d92b8a0
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
[MLIR][XeGPU] Prefer the nearer consumer's layout in LayoutInfo::meet (#208365)
**Summary**
During backward layout propagation a value can be demanded by multiple
consumers with conflicting
layouts. Previously LayoutInfo::meet kept whichever demand was assigned
first, so the winner depended on
the dataflow worklist's visitation order — nondeterministic and often
not what we want.
This changes meet to prefer the layout demanded by the consumer nearer
to the producer in program order.
This tends to preserve a consumer's layout as far up the def chain as
possible, reducing layout
conversions. It is a heuristic hint, not a proven optimum.
- Each op gets a program-order index from a pre-order walk (matching
printed-IR order), so a use inside
an scf.for body is nearer than a use after the loop.
- LayoutInfo carries the demanding op's index in a new programOrder
field. visitOperation sets a
file-scoped currentProgramOrder, and the single-arg LayoutInfo
constructor stamps it automatically.
- meet keeps the smaller programOrder; ties keep lhs.
- Removes a dead LayoutInfo::transpose declaration.
- Adds truncf_prefers_nearer_user in propagate-layout-inst-data.mlir.
- Updates the multiple-use tests in propagate-layout.mlir
(scatter_ops_preserve_load_perm_layout,
binary_op_multiple_uses, if_multiple_uses) to reflect that the nearer
consumer's layout now wins.
- a minor layout fix for simple_mxfp_gemm_quantizeA_F4.mlir
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 681cc1b9f87b355c8c5f95ee35d6521e62531ceb
https://github.com/llvm/llvm-project/commit/681cc1b9f87b355c8c5f95ee35d6521e62531ceb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir
M llvm/test/CodeGen/AMDGPU/pr51516.mir
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-IR-lowering.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs-IR-lowering.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/preserve-only-inactive-lane.mir
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
M llvm/test/CodeGen/AMDGPU/printf-defined.ll
M llvm/test/CodeGen/AMDGPU/printf-existing-format-strings.ll
M llvm/test/CodeGen/AMDGPU/private-access-no-objects.ll
M llvm/test/CodeGen/AMDGPU/private-function.ll
M llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-allocation.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-cfg.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-globals.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-invariant-markers.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-lifetime.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-loadstores.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-max-regs.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-memset.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-no-opts.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-non-byte-sizes.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-non-constant-index.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-padding-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-placeholder-replacement.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-pointer-array.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-proper-value-replacement.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-scoring.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-strip-abi-opt-attributes.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-subvecs.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-constantexpr-use.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-icmp.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-phi.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-select.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-unhandled-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-use-after-erase.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-user-mult.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts-llc.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep-of-gep.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vgpr-ratio.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-volatile.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx10.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
M llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
M llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-mubuf.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-undef-poison.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
M llvm/test/CodeGen/AMDGPU/ptrmask.ll
M llvm/test/CodeGen/AMDGPU/ra-inserted-scalar-instructions.mir
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-register.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-write-register-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readlane_exec0.mir
M llvm/test/CodeGen/AMDGPU/readsteadycounter.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (28) (#209489)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b14bf6e583da3e35054bac26c5eef74ff4e717d2
https://github.com/llvm/llvm-project/commit/b14bf6e583da3e35054bac26c5eef74ff4e717d2
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
A llvm/test/Transforms/InstCombine/udiv-isknownnegative.ll
Log Message:
-----------
[InstCombine] Generalize udiv by negative constant fold to handle non-constant values (#209322)
Use isKnownNegative() to catch non constant divisors.
Commit: 6e80f6733abb83ddc0a5447829a050b0497e0fb5
https://github.com/llvm/llvm-project/commit/6e80f6733abb83ddc0a5447829a050b0497e0fb5
Author: Usman Nadeem <mnadeem at qti.qualcomm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
M llvm/test/CodeGen/AArch64/get-active-lane-mask-extract.ll
Log Message:
-----------
[DAGCombiner] Fold extract_vector(get_active_lane_mask(),0) to get_active_lane_mask (#208978)
If we are extracting from the start of the vector, then we can just
rewrite to `get_active_lane_mask` with a new type and the same operands.
Depends on https://github.com/llvm/llvm-project/pull/208962 and
https://github.com/llvm/llvm-project/pull/208977
Commit: 3d7535a03c1a036204a5347a79e9f66eb96ce4bc
https://github.com/llvm/llvm-project/commit/3d7535a03c1a036204a5347a79e9f66eb96ce4bc
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LoanPropagation.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/MovedLoans.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
M clang/include/clang/Analysis/Analyses/LiveVariables.h
M clang/lib/Analysis/LiveVariables.cpp
M llvm/benchmarks/ImmutableSetBuildBM.cpp
M llvm/benchmarks/ImmutableSetIteratorBM.cpp
M llvm/include/llvm/ADT/ImmutableMap.h
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/unittests/ADT/ImmutableSetTest.cpp
Log Message:
-----------
[ADT] Make canonicalization a compile-time parameter of ImmutableSet/Map (#209300)
ImmutableSet and ImmutableMap always carried the machinery needed for
tree canonicalization -- a per-node `prev`/`next` cache chain and cached
`digest`, plus the factory-side cache and a runtime `canonicalize` flag
-- even for the many clients that disable it (the Clang dataflow
analyses, e.g. lifetime safety and LiveVariables, for which
canonicalization is a large performance loss). Those clients paid for
state and code paths they never used.
Add a `bool Canonicalize` template parameter (defaulting to true, so
existing users are unaffected) that moves the decision to compile time:
* When disabled, the `prev`/`next` links (empty base) and `digest`
(LLVM_NO_UNIQUE_ADDRESS member) vanish, shrinking a set node from 56 to
40 bytes and a map node from 64 to 40 on 64-bit; `getCanonicalTree`, the
factory cache, and the `destroy()` unlink branch are `if constexpr`-ed
away. Node fields are ordered so the traversal-hot members come first.
* When enabled, the node layout is unchanged, and `operator==`/`!=`
become O(1) pointer comparisons (equal canonical trees share a root, as
with ImmutableList) instead of a structural walk.
The runtime `canonicalize` factory argument is now redundant and
removed; the in-tree non-canonicalizing users are switched to the
template argument.
Node microbenchmark (ImmutableSetBuildBM, non-canonicalizing, -O2):
| Benchmark | Before | After | Speedup |
|--------------------|---------:|---------:|:-------:|
| Build/256 | 20.3 us | 18.3 us | 1.11x |
| Build/4096 | 790 us | 731 us | 1.08x |
| Build/65536 | 18.8 ms | 18.4 ms | 1.02x |
| BuildRemove/256 | 40.7 us | 35.0 us | 1.16x |
| BuildRemove/4096 | 1.46 ms | 1.39 ms | 1.05x |
| BuildRemove/65536 | 34.6 ms | 33.8 ms | 1.02x |
End to end, the smaller node cuts the lifetime-safety analysis peak RSS
by up to ~23% on allocation-dense inputs with neutral-to-positive run
time, and the O(1) equality speeds up a Clang static analyzer run on
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp by ~1.3% (95.1s -> 93.9s).
Assisted by: Claude Opus 4.8
---------
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: 266c25684b32bd43d846f8de1c3a9f358066ffc4
https://github.com/llvm/llvm-project/commit/266c25684b32bd43d846f8de1c3a9f358066ffc4
Author: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
Log Message:
-----------
[CodeGen] Split determineCalleeSaves into smaller functions. (#203981)
The function `getMustPreserveRegisters` - returns the list of registers
that must be preserved by the function.
The function `determineUncondPrologCalleeSaves` - determines which of
the registers reported by `getMustPreserveRegisters` must be saved in
prolog and reloaded in epilog regardless of whether or not they were
modified by the function.
Commit: 3e706075dc1857e88a293b8104c81b31a08f4cd5
https://github.com/llvm/llvm-project/commit/3e706075dc1857e88a293b8104c81b31a08f4cd5
Author: Liza Burakova <liza at chromium.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/include/__pstl/backends/libdispatch.h
Log Message:
-----------
[libc++][pstl] Add missing #pragma GCC system_header to libdispatch.h (#209579)
This adds `#pragma GCC system_header` to libdispatch.h, as removing the
`[system]` attributes in the modulemap surfaced this gap.
Commit: e4a959ffebe24abae49fc93a4f84c58625dabbea
https://github.com/llvm/llvm-project/commit/e4a959ffebe24abae49fc93a4f84c58625dabbea
Author: Florian Mayer <fmayer at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/utils/generate-test-checks.py
Log Message:
-----------
[NFC] [MLIR] fix typo in argument desc (#209587)
Commit: 995b7229bc4a9614669fb57b76c2cddc9fb4db52
https://github.com/llvm/llvm-project/commit/995b7229bc4a9614669fb57b76c2cddc9fb4db52
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
Log Message:
-----------
[AMDGPU] Fix type for DWARF register number in SIFrameLowering (#209535)
It so happened that using MCRegister here happened to work, but
the encoded dwarf number is definitely not an MCRegister.
Commit: b43a0072fa011ec50c29b683da057730b2682ae2
https://github.com/llvm/llvm-project/commit/b43a0072fa011ec50c29b683da057730b2682ae2
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Introduce VPIRFlags::getNWFlagsOrNone (NFC) (#207176)
Similar to getFMFOrNone. Also introduce a default WrapFlagsTy
constructor to go along with it.
Commit: 527396dd7c7370b1649ade49ceb48e48f6f26de1
https://github.com/llvm/llvm-project/commit/527396dd7c7370b1649ade49ceb48e48f6f26de1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/reduce-build-vec-ext-to-ext-build-vec.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll
M llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
M llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/regalloc-fail-unsatisfiable-overlapping-tuple-hints.mir
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/regalloc-fast-dont-drop-subreg-index-issue61134.mir
M llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.mir
M llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll
M llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir
M llvm/test/CodeGen/AMDGPU/regalloc-sgpr128-partial-def.mir
M llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll
M llvm/test/CodeGen/AMDGPU/regalloc-undef-copy-fold.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-64-bit-only-regs.mir
M llvm/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir
M llvm/test/CodeGen/AMDGPU/register-coalescer--set-undef-full-reg-use-implicit-def-erase-issue109249.mir
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/regpressure_printer.mir
M llvm/test/CodeGen/AMDGPU/reject-agpr-usage-before-gfx908.ll
M llvm/test/CodeGen/AMDGPU/rel32.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs-gfx12-dvgpr.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs-gfx12.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs-spill.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs.mir
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remat-physreg-copy-subreg-extract-already-live-at-def-issue120970.mir
M llvm/test/CodeGen/AMDGPU/remat-smrd.mir
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/remat-through-copy.mir
M llvm/test/CodeGen/AMDGPU/remat-vop.mir
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-wave32-feature.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-wave64-feature.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/remove-not-short-exec-branch-on-unconditional-jump.mir
M llvm/test/CodeGen/AMDGPU/remove-register-flags.mir
M llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir
M llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-special-instructions.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs-unused-lanes.ll
M llvm/test/CodeGen/AMDGPU/reorder-stores.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/replace-store-of-insert-load.ll
M llvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/required-export-priority.ll
M llvm/test/CodeGen/AMDGPU/required-export-priority.mir
M llvm/test/CodeGen/AMDGPU/reserved-reg-in-clause.mir
M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-crash-unhandled-reg.mir
M llvm/test/CodeGen/AMDGPU/resource-usage-dead-function.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-pal.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/return-with-successors.mir
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll
M llvm/test/CodeGen/AMDGPU/rewrite-out-arguments-address-space.ll
M llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
M llvm/test/CodeGen/AMDGPU/rewrite-undef-for-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-scale-to-agpr.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-mir.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32-safe.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-buffer-load-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/s-cluster-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_cmp_0.ll
M llvm/test/CodeGen/AMDGPU/s_code_end.ll
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_or_b32_transformation.ll
M llvm/test/CodeGen/AMDGPU/s_or_saveexec_xor_combine.mir
M llvm/test/CodeGen/AMDGPU/s_uaddo_usubo_pseudo.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (29) (#209558)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: ea56bc30bdabf00e401422f49e9588f1b5ff5e73
https://github.com/llvm/llvm-project/commit/ea56bc30bdabf00e401422f49e9588f1b5ff5e73
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/same-lds-variable-multiple-use-in-one-phi-node.ll
M llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
M llvm/test/CodeGen/AMDGPU/save-fp.ll
M llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scalar-store-cache-flush.mir
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/scalarize-insert-subvector.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-hang-weak-dep.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-post-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-pre-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-group-barrier-pipeline-solver.mir
M llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/sched-image-sample-post-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-ldsdma-mask.mir
M llvm/test/CodeGen/AMDGPU/sched-no-schedmodel.mir
M llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir
M llvm/test/CodeGen/AMDGPU/sched-setprio.ll
M llvm/test/CodeGen/AMDGPU/sched.group.classification.mir
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir
M llvm/test/CodeGen/AMDGPU/schedmodel-dummywrite.mir
M llvm/test/CodeGen/AMDGPU/schedule-addrspaces.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg-crash.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-avoid-spills.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-fpmode.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/schedule-ilp-liveness-tracking.mir
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp.mir
M llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-pending-queue.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-no-unclustered-regions.mir
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scheduler-handle-move-bundle.mir
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/sdwa-commute.ll
M llvm/test/CodeGen/AMDGPU/sdwa-cse.mir
M llvm/test/CodeGen/AMDGPU/sdwa-gfx9.mir
M llvm/test/CodeGen/AMDGPU/sdwa-op64-test.ll
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-fail.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-sext.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-wave32.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-wave64.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-dst.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-src.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
M llvm/test/CodeGen/AMDGPU/sdwa-stack.mir
M llvm/test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir
M llvm/test/CodeGen/AMDGPU/select-cmp-shared-constant-fp.ll
M llvm/test/CodeGen/AMDGPU/select-cmp-shared-constant-int.ll
M llvm/test/CodeGen/AMDGPU/select-constant-xor.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.legal.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (30) (#209559)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 9035d06155596c1214f302bef2e60b631d38e73a
https://github.com/llvm/llvm-project/commit/9035d06155596c1214f302bef2e60b631d38e73a
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
A flang/test/Fir/CUDA/cuda-managed-descriptor-component.fir
Log Message:
-----------
[flang][cuda] Size managed globals with descriptor components via LLVM Type (#209577)
When we do `-cuda -gpu=unified` (or `managed`) on a derived type with an
allocatable/pointer component, recent change
https://github.com/llvm/llvm-project/pull/209292 implicitly
attributed the component making lowering place the enclosing
derived-type global
in CUF managed memory. `CUFAddConstructor` then sizes that global via
`getTypeSizeAndAlignmentOrCrash`, which has no case for the descriptor
component
(`!fir.box<...>`) and aborts.
With this change, instead of aborting, we fall back to converting the
global to its LLVM type which
inlines the fixed-size descriptors, and query the data layout.
Commit: e3227da7cdb8173c2df465e443a1dc73c71f017b
https://github.com/llvm/llvm-project/commit/e3227da7cdb8173c2df465e443a1dc73c71f017b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/crash_scatter_load_reorder.ll
Log Message:
-----------
[SLP] Fix ScatterVectorize reorder desyncing scalars from operands
Record the reorder in ReorderIndices instead of permuting the scatter node's
Scalars, keeping them aligned with the per-lane operand list the scheduler
reads.
Fixes #209444
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209594
Commit: 42b67e529c59b77c6dfac9cc5d2b263e752851f6
https://github.com/llvm/llvm-project/commit/42b67e529c59b77c6dfac9cc5d2b263e752851f6
Author: David Young <davidayoung at meta.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/lit/lit/LitConfig.py
A llvm/utils/lit/tests/unit/LitConfig.py
Log Message:
-----------
[lit] Don't crash in _write_message when getsourcefile() returns None (#206957)
LitConfig._write_message currently derives the file to report a
note()/warning()/ error() against with:
file = os.path.abspath(inspect.getsourcefile(f))
inspect.getsourcefile(f) returns None when the calling frame's source is
not on disk and not in linecache -- for example when lit is packaged
into a zip archive, or when a config is exec'd from a synthetic
filename. In that case os.path.abspath(None) raises TypeError: expected
str, bytes or os.PathLike object, not NoneType, which turns an
informational diagnostic into a fatal config-parse crash.
Fall back to inspect.getfile(f), which returns the frame's co_filename
and is always a str, so the diagnostic is emitted (tagged with
co_filename) instead of crashing. Since all tests normally pass
currently on build bots, this new code should never trigger and only
works as a backup in the case I'm running into on a different test infra
running lit tests.
Add a lit unit test covering the None case.
Assisted with- claude
Commit: e0b4701f2621d2542405830008797e3cf319a3f0
https://github.com/llvm/llvm-project/commit/e0b4701f2621d2542405830008797e3cf319a3f0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/select-i1.ll
M llvm/test/CodeGen/AMDGPU/select-load-to-load-select-ptr-combine.ll
M llvm/test/CodeGen/AMDGPU/select-nsz-known-values-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/select-phi-s16-fp.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/AMDGPU/selectcc-opt.ll
M llvm/test/CodeGen/AMDGPU/selectcc.ll
M llvm/test/CodeGen/AMDGPU/sema-v-unsched-bundle.ll
M llvm/test/CodeGen/AMDGPU/sendmsg-m0-hazard.mir
M llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/set_kill_i1_for_floation_point_comparison.ll
M llvm/test/CodeGen/AMDGPU/setcc-f64-hi32mask.ll
M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
M llvm/test/CodeGen/AMDGPU/setcc-multiple-use.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/seto.ll
M llvm/test/CodeGen/AMDGPU/setuo.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-vector-shuffle.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-count-graphics.ll
M llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
M llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-incorrect-fi-bookkeeping-bug.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-unhandled.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-empty-prolog-block.mir
M llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.ll
M llvm/test/CodeGen/AMDGPU/shader-addr64-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll
M llvm/test/CodeGen/AMDGPU/shift-select.ll
M llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
M llvm/test/CodeGen/AMDGPU/shl64_reduce_flags.ll
M llvm/test/CodeGen/AMDGPU/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/shl_add.ll
M llvm/test/CodeGen/AMDGPU/shl_add_constant.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/AMDGPU/shl_or.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/shrink-carry.mir
M llvm/test/CodeGen/AMDGPU/shrink-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/shrink-i32-kimm.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-flags.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-implicit-vcclo.mir
M llvm/test/CodeGen/AMDGPU/shrink-insts-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/shrink-mad-fma-fake16.mir
M llvm/test/CodeGen/AMDGPU/shrink-mad-fma-gfx10.mir
M llvm/test/CodeGen/AMDGPU/shrink-mad-fma.mir
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
M llvm/test/CodeGen/AMDGPU/shrink-v-cmp-wave32-dead-vcc-lo.mir
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v3bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v4bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v3f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v4f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v3i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v4i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v4i32.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (31) (#209560)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: d0775bdb7f483b8aa4700b97a65718d5f3c9cfa8
https://github.com/llvm/llvm-project/commit/d0775bdb7f483b8aa4700b97a65718d5f3c9cfa8
Author: lntue <lntue at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libc/src/__support/threads/linux/futex_utils.h
Log Message:
-----------
[libc] Fix potential timespec type mismatch for arm32 targets in futex_utils.h. (#209556)
This causes the arm32 build bots to hang.
Assisted-by: Gemini 3.5 Flash.
Commit: 226b0b59bfca58ef831bd668dcf219a79f11f957
https://github.com/llvm/llvm-project/commit/226b0b59bfca58ef831bd668dcf219a79f11f957
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/docs/LanguageExtensions.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseStmt.cpp
A clang/test/C/C2y/n3267.c
M clang/www/c_status.html
Log Message:
-----------
[Clang][C2y] Add support for if declarations (N3356 paper) (#198244)
Add support for _if declarations_ in `C2y` mode by exploiting existing
C++ code.
The only new changes to the code is narrowing the code path to `C` mode
and introduce new errors and warnings for some pitfalls with the syntax
and what is expected from the standard and old language modes.
It should be noted that the first clause in the standard paper can only
be declaration. This means we can't allow expression statement in the
first clause of the condition, and that's the goal of the new
warnings/errors. Also this is different from C++ grammar.
Commit: 21bc62e6688a5dcaf79ebd992e5e4676b287a674
https://github.com/llvm/llvm-project/commit/21bc62e6688a5dcaf79ebd992e5e4676b287a674
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v3bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v4bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v3f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v4f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v3i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v4i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v3bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4bf16.v4bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v3f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f16.v4f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v2f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v3f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4f32.v4f32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v3i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i16.v4i16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v2i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v3i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i32.v4i32.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v3i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v2p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v3p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v2p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v3p3.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v4p3.v4p3.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
M llvm/test/CodeGen/AMDGPU/si-annotatecfg-multiple-backedges.ll
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-av-constrain.mir
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
M llvm/test/CodeGen/AMDGPU/si-fold-aligned-agprs.mir
M llvm/test/CodeGen/AMDGPU/si-fold-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/si-fold-copy-kills.mir
M llvm/test/CodeGen/AMDGPU/si-fold-kimm.mir
M llvm/test/CodeGen/AMDGPU/si-fold-operands-agpr-copy-reg-sequence.mir
M llvm/test/CodeGen/AMDGPU/si-fold-operands-bundle.mir
M llvm/test/CodeGen/AMDGPU/si-fold-operands-commute-same-operands-assert.mir
M llvm/test/CodeGen/AMDGPU/si-fold-operands-gfx11.mir
M llvm/test/CodeGen/AMDGPU/si-fold-operands-requires-ssa.mir
M llvm/test/CodeGen/AMDGPU/si-fold-operands-subreg-imm.gfx942.mir
M llvm/test/CodeGen/AMDGPU/si-fold-operands-subreg-imm.mir
M llvm/test/CodeGen/AMDGPU/si-fold-reg-sequence.mir
M llvm/test/CodeGen/AMDGPU/si-fold-scalar-add-sub-imm.mir
M llvm/test/CodeGen/AMDGPU/si-fold-scalar-clamp.mir
M llvm/test/CodeGen/AMDGPU/si-init-whole-wave.mir
M llvm/test/CodeGen/AMDGPU/si-insert-hard-clauses-no-nesting.mir
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
M llvm/test/CodeGen/AMDGPU/si-instr-info-vopc-exec.mir
M llvm/test/CodeGen/AMDGPU/si-late-branch-lowering-preserve-loop-info.mir
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-preserve-dom-tree.mir
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies-order-of-phi-incomings.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-vgpr-lanes-usage.mir
M llvm/test/CodeGen/AMDGPU/si-lower-wwm-copies.mir
M llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
M llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.ll
M llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.mir
M llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs.mir
M llvm/test/CodeGen/AMDGPU/si-pre-emit-peephole-preserve-loop-info.mir
M llvm/test/CodeGen/AMDGPU/si-scheduler-exports.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (32) (#209561)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: fc0b032ba8b56f02e834847ec3e2a6375011017f
https://github.com/llvm/llvm-project/commit/fc0b032ba8b56f02e834847ec3e2a6375011017f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
R llvm/test/Transforms/SampleProfile/icp_target_feature.ll
Log Message:
-----------
Revert "[PGO][ICP] Prevent indirect call promotion to functions with incompatible target features" (#209572)
Reverts llvm/llvm-project#208774
The failure that caused the revert last time should be fixed by
37b8e765ce4837a7577e6f762bcdffe4b232759c.
Commit: 5245afc014c4d34705bf8734fc835bcbfe9b6f39
https://github.com/llvm/llvm-project/commit/5245afc014c4d34705bf8734fc835bcbfe9b6f39
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
Log Message:
-----------
[NFC][SPIR-V] Remove stale XFAIL in vk-pushconstant-layout.ll (#209447)
Commit: f69342fa200100560c689e0ccdbbc5c3249aee4b
https://github.com/llvm/llvm-project/commit/f69342fa200100560c689e0ccdbbc5c3249aee4b
Author: Mike Kruskal <mkruskal at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_nolibc.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/test/sanitizer_common/TestCases/Linux/dlopen_image_base.c
Log Message:
-----------
Reland "[compiler-rt] [sanitizer_common] Fix SIGSEGV in ForEachMappedRegion for DSOs with custom image base" (#209576)
Attempt 2 at #206299, fixing a linkage issue with gotsan on older
versions of glibc. Rather than forcing linkage of libdl (which may not
be safe with go), this just disables the dladdr usage under go builds.
This bug only affected MSAN and DFSAN anyway, and the code should be
unused by TSAN.
`ForEachMappedRegion` processes dynamic linker map entries to track
loaded segments. However, it assumes map->l_addr is the address of the
ELF header. For DSOs linked with a custom preferred image base offset
(e.g. -Wl,--image-base=0x4000000), `map->l_addr` contains the relocation
bias: `map->l_addr = actual_load_address - preferred_base`
In this case, map->l_addr points below the first loaded segment in
unmapped or PROT_NONE memory. Doing a read dereference at this address
triggers a SIGSEGV. Add a call to dladdr() on the dynamic section
pointer map->l_ld to obtain the true ELF header base address.
Likely fixes https://github.com/llvm/llvm-project/issues/84482 - which
looks like the exact same stacktrace I was debugging that led me to this
fix
Also looks it may have shown up in
https://github.com/llvm/llvm-project/issues/21068 - my case was also
flaky, and it only shows up if you build the so with custom base address
Assisted-by: Gemini
Commit: 0fae10b74b93723b4a2a53804331696c1b37fe14
https://github.com/llvm/llvm-project/commit/0fae10b74b93723b4a2a53804331696c1b37fe14
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/misaligned-vgpr-regsequence.mir
Log Message:
-----------
[AMDGPU] Add stackPtrOffsetReg to llvm/test/CodeGen/AMDGPU/misaligned-vgpr-regsequence.mir (#209533)
Prepare for this being observable to the CFA generation code.
Commit: d218bc40aba65687ddc2fb616a154b2799631f0f
https://github.com/llvm/llvm-project/commit/d218bc40aba65687ddc2fb616a154b2799631f0f
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/Assembler/thinlto-bad-summary-5.ll
Log Message:
-----------
[ThinLTO] Fix thinlto-bad-summary-5.ll in read-only environments (#209513)
The test thinlto-bad-summary-5.ll was failing in read-only environments
(such as sandboxed test runners) because it attempted to write the
output bitcode file to the same directory as the input file, resulting
in a "Permission denied" error.
Fix this by redirecting the output to /dev/null using `-o /dev/null`.
We cannot use `-disable-output` here because the error we want to
test is triggered inside the BitcodeWriter, which is bypassed when
output is disabled.
assisted by gemini
Commit: fbba327208d7f6994f9a28a51dca3e913e3b444a
https://github.com/llvm/llvm-project/commit/fbba327208d7f6994f9a28a51dca3e913e3b444a
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake] Add -Wl,-z,pack-relative-relocs if supported (#208217)
We should aim to provide a good experience by default. Enable RELR for
PIC builds (which is on by default, even in non-dylib builds) if
supported by the linker (feature-tested) and the libc (currently
hardcoded as glibc 2.36+; musl has no easy way to determine support).
RELR substantially reduces the size of the dynamic relocations in PIE
executables and shared libraries and therefore also lowers max-rss and
startup time due to fewer page faults.
Commit: fc298ccbc52a9199a2181d30fa6e7189c374c091
https://github.com/llvm/llvm-project/commit/fc298ccbc52a9199a2181d30fa6e7189c374c091
Author: firmiana <firmiana402 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Reject mixed typed DWARF binary operands (#201288)
## Summary
LLDB currently accepts and evaluates some ill-typed DWARF typed binary
operations whose two operands have different base types.
DWARF v5 typed-expression rules require arithmetic/logical and
relational binary operators to operate on operands of the same type,
either the same base type or the generic type. (see [DWARF v5
doc](https://dwarfstd.org/doc/DWARF5.pdf) Section 2.5.1.4)
This patch adds an explicit compatibility check before evaluating the
affected binary operators.
## Example
A DWARF expression illustrating the issue is:
```text
DW_OP_constu 0xff
DW_OP_convert <unsigned char>
DW_OP_constu 0x1
DW_OP_convert <short unsigned int>
DW_OP_plus
DW_OP_stack_value
```
The left operand is typed as unsigned char, while the right operand is
typed as short unsigned int. These are different DWARF base types, so
`DW_OP_plus` should reject the expression instead of evaluating it.
In differential testing, GDB rejects this kind of expression with:
```text
Incompatible types on DWARF stack
```
Before this patch, LLDB continued evaluating the expression and produced
a concrete result through the existing `Scalar` arithmetic path.
## Affected operations
The issue is not specific to DW_OP_plus. The same acceptance pattern was
observed for mixed-base-type typed operands across these binary
operations:
- Arithmetic: `DW_OP_plus`, `DW_OP_minus`, `DW_OP_div`, `DW_OP_mod`
- Bitwise: `DW_OP_and`, `DW_OP_or`, `DW_OP_xor`
- Shifts: `DW_OP_shl`, `DW_OP_shr`, `DW_OP_shra`
- Relations: `DW_OP_lt`, `DW_OP_le`, `DW_OP_gt`, `DW_OP_ge`, `DW_OP_eq`,
`DW_OP_ne`
## Implementation notes
LLDB's DWARF expression stack currently stores `Value` objects, whose
scalar payload is represented by `Scalar`. `Scalar` does not preserve
the original DWARF base type DIE, but it does carry the pieces of
base-type information used by the evaluator:
- scalar kind
- byte size
- integer signedness
This patch therefore checks those `Scalar` properties before dispatching
each affected binary operation to the existing arithmetic/comparison
logic. If the two operands do not match, evaluation now stops with an
error.
This **PR Text** was prepared with assistance from Codex. I reviewed the
PR Text and take responsibility for the contribution.
Commit: 3ba1b70dc2f4920d727ec1e678a79b744ce72b99
https://github.com/llvm/llvm-project/commit/3ba1b70dc2f4920d727ec1e678a79b744ce72b99
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
Log Message:
-----------
[AMDGPU][CodeGen] Fix `S_NOP` insertion during `S_SET_VGPR_MSB` placement (#209525)
The issue arises when co-issue optimizations move the initial insertion
position for `S_SET_VGPR_MSB` to an earlier spot, creating a mismatch
with the position used to determine whether a `S_NOP` is needed.
Commit: 0b908e100f3d88232aa3b0190e23e41ca327edf1
https://github.com/llvm/llvm-project/commit/0b908e100f3d88232aa3b0190e23e41ca327edf1
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/test/Driver/msvc-link.c
Log Message:
-----------
[clang][test] Avoid relying on `-fuse-ld=ld` default value for marm64x test (#209597)
Test case added in #209324
Commit: 2c31050a6cf609285b0561b9a7c262fa4cf790c8
https://github.com/llvm/llvm-project/commit/2c31050a6cf609285b0561b9a7c262fa4cf790c8
Author: lntue <lntue at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[libc][ci] Add qemu armhf overlay tests to precommit CI. (#203369)
Commit: eecd874fba6cef85071f8e02afc81c81e9d352e5
https://github.com/llvm/llvm-project/commit/eecd874fba6cef85071f8e02afc81c81e9d352e5
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M offload/plugins-nextgen/common/src/RecordReplay.cpp
Log Message:
-----------
[Offload] Remove unnecessary assert (#209518)
`uint32_t` is always greater than or equal to zero.
Commit: 04aa50715cafa5f205b44bc88a6f721d296ec91c
https://github.com/llvm/llvm-project/commit/04aa50715cafa5f205b44bc88a6f721d296ec91c
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/AST/DeclCXX.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
Revert "[Clang] Allow devirtualization involving array subscripts with constant indices when the pointee type is known [CWG1504] (#207540) (#209596)
It caused miscompiles, see discussion on the PR.
This reverts commit ee24ac00d874ce82eaf36431f9aeb2ad744bc3b8.
Commit: 73615e792dc3116d5c66cb8175039dd6d4840f31
https://github.com/llvm/llvm-project/commit/73615e792dc3116d5c66cb8175039dd6d4840f31
Author: Pawan Nirpal <pnirpal at qti.qualcomm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
A llvm/test/CodeGen/ARM/thumb1-copy-physreg-dbg-value-crash.ll
Log Message:
-----------
[ARM] - Fix Thumb1InstrInfo::copyPhysReg crash on debug instructions during liveness walk. (#209478)
clang asserts when compiling with -mthumb -mcpu=arm926ej-s -O0 -g
(pre-v6 Thumb1, debug info enabled). The crash occurs in
LiveRegUnits::stepBackward which unconditionally asserts that it must
never be called on a debug instruction, but Thumb1InstrInfo::copyPhysReg
walks the basic block backward without skipping DBG_VALUE instructions.
Fixes: https://github.com/llvm/llvm-project/issues/209475
Commit: d089325bad0e85c1be958d54cfbf9d44bf02fcf1
https://github.com/llvm/llvm-project/commit/d089325bad0e85c1be958d54cfbf9d44bf02fcf1
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
M llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
Log Message:
-----------
[AMDGPU] Fix CFI emission when scratch instructions are used to spill (#209534)
4b1cfc5d7c606e "[NFCI][AMDGPU] Final touch before moving to
`GET_SUBTARGETINFO_MACRO` (#177401)" (or more generally the move to
hasFlatScratchEnabled over just enableFlatScratch) was missed during the
CFI upstreaming for AMDGPU, and so we currently define the CFA
incorrectly for the architected flat scratch case.
This incorrect CFI is generated for e.g. gfx942. For such architecture,
the stack pointer (s32) holds a swizzled address (per-lane offset) but
the CFA needs to be an unswizzled address (per-wave).
In the incorrect program, we have a prologue looking like:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_mov_b32 s0, s33
s_mov_b32 s33, s32
[...]
s_add_i32 s32, s32, 16
[...]
(16 is a per-lane offset) but CFA ends up being defined as
DW_CFA_LLVM_def_aspace_cfa: SGPR32 +0 in addrspace6
with addrspace6 being DW_ASPACE_AMDGPU_private_wave. The correct CFA
should instead be:
DW_CFA_def_cfa_expression: DW_OP_regx SGPR32, DW_OP_deref_size 0x4,
DW_OP_lit6, DW_OP_shl, DW_OP_lit6, DW_OP_LLVM_user
DW_OP_LLVM_form_aspace_address
which converts from swizzled to unswizzled.
Deciding which form to use is done in SIFrameLowering::emitDefCFA which
still uses the old ST.enableFlatScratch() instead of
ST.hasFlatScratchEnabled(). This patch fixes this as well as the other
user of enableFlatScratch in createScaledCFAInPrivateWave.
The naming for the "enable-flat-scratch" feature seems unfortunate in
retrospect, although I'm not sure we can change it easily at this point?
CFI generation tested for gfx942 and gfx1031 with ROCgdb's testsuite.
Commit: db9efd93912b71e5ec200549b17391696dcae18f
https://github.com/llvm/llvm-project/commit/db9efd93912b71e5ec200549b17391696dcae18f
Author: Xi Ruoyao <xry111 at xry111.site>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/test/CodeGen/Mips/divrem.ll
Log Message:
-----------
[Mips] Do not emit teq if NoZeroDivCheck in FastISel (#204386)
Fix the issue: -mno-check-zero-division is not respected at -O0 for some
test cases.
Co-authored-by: Folkert de Vries <folkert at folkertdev.nl>
Commit: 1e4b05a1bb87a8fe3a75eb2960e11afc46c72ebb
https://github.com/llvm/llvm-project/commit/1e4b05a1bb87a8fe3a75eb2960e11afc46c72ebb
Author: firmiana <firmiana402 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Prefer DW_AT_bit_size for DW_OP_convert type width (#208478)
This PR fixes a DW_OP_convert issue where LLDB derives the conversion
width from DW_AT_byte_size * 8 before considering DW_AT_bit_size,
#208203
For base types that carry both DW_AT_byte_size and DW_AT_bit_size, such
as C _BitInt(31), DW_AT_bit_size describes the actual value width. LLDB
should therefore prefer DW_AT_bit_size when it is present, and only fall
back to DW_AT_byte_size otherwise.
## Tests
Extended DWARFExpression.DW_OP_convert coverage with a base type that
has both DW_AT_byte_size and DW_AT_bit_size, and verifies that the
conversion uses the DW_AT_bit_size width.
Commit: 05b9aa46fdb72495bb596dea621fda1f9df22880
https://github.com/llvm/llvm-project/commit/05b9aa46fdb72495bb596dea621fda1f9df22880
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
A llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-latch-counted.ll
A llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
A llvm/test/Transforms/ConstraintElimination/induction-nowrap-from-scev-not-ir.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
A llvm/test/Transforms/ConstraintElimination/or-non-negative.ll
M llvm/test/Transforms/ConstraintElimination/transfer-signed-facts-to-unsigned.ll
A llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
Log Message:
-----------
[ConstraintEim] Add tests for postinc IVs, signed reasoning. (#209612)
Extend test coverage for postinc IVs (both in header and latch), as well
as signed reasoning and transfers for upcoming patche.
Commit: 147bf7102fdcd4d016c6d214ff9924c9fa3ee215
https://github.com/llvm/llvm-project/commit/147bf7102fdcd4d016c6d214ff9924c9fa3ee215
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
Log Message:
-----------
[lldb-dap][test] Fix stackTrace test in symlink environment (#209595)
This test (edited in #209236) fails when run in an environment where
source files are symlinks. Using `realpath` breaks that, as we use the
path in assertions later. The var is already constructed as `source_file
= self.getSourcePath("main.c")` which should be sufficient for
`_RecurseSource()` to work.
Commit: ef118b5b3a617237729b010b944237c146e8d300
https://github.com/llvm/llvm-project/commit/ef118b5b3a617237729b010b944237c146e8d300
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/SharedLexicalRepresentation.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/SharedLexicalRepresentationFormat.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/Serialization/JSONFormatTest/SharedLexicalRepresentationFormatTest.cpp
Log Message:
-----------
[SSAF] Add EntitySourceLocationsSummary and JSON format (#208841)
Adds a per-entity TU-level summary recording the canonical (file, line,
column) of each declaration registered against an entity. The data feeds
a follow-on whole-program analysis that groups entities sharing a
declaration source-location into equivalence classes.
Assisted-By: Claude Opus 4.7
Commit: d9f6dbca81714fd5ee1c5aaf656fed6b0b5a4c01
https://github.com/llvm/llvm-project/commit/d9f6dbca81714fd5ee1c5aaf656fed6b0b5a4c01
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/utils/compare-benchmarks
M libcxx/utils/requirements.txt
Log Message:
-----------
[libc++] Compute a confidence interval in compare-benchmarks (#208090)
When comparing benchmark results with more than one sample per
benchmark, compute a confidence interval and flag rows that are
statistically significant. This should make the A/B comparison PR job
more robust to noise and easier to rely on. After this change, output
for a multi-sample run looks like:
```
Benchmark Baseline Candidate Difference % Difference Significant? 95% C.I. of %diff
------------------------------ ---------- ----------- ------------ -------------- -------------- -------------------
std::any_of(list<int>)/32 39.92 39.22 -0.70 -1.75% [-6.5%, +1.6%]
std::any_of(list<int>)/32768 54071.34 65395.51 11324.17 20.94% [-2.8%, +34.5%]
std::any_of(list<int>)/50 67.39 69.08 1.69 2.51% x [+0.2%, +4.7%]
std::any_of(list<int>)/8 7.21 6.46 -0.75 -10.40% x [-25.0%, -0.7%]
std::any_of(list<int>)/8192 21745.58 22299.32 553.74 2.55% [-20.3%, +38.4%]
std::any_of(vector<int>)/32 24.21 14.61 -9.60 -39.65% x [-41.2%, -38.4%]
std::any_of(vector<int>)/32768 24365.14 12498.21 -11866.93 -48.70% x [-48.9%, -48.6%]
Geomean 324.15 247.83 -76.32 -23.54%
```
The confidence interval is computed based on the mean of the N samples,
but we still present the median of N in the results. Because of that,
the result is not centered within the confidence interval, and we must
report it as [low, high] instead of a single number. The general idea is
that if 0% falls within the confidence interval, we can't really be
certain that the result changed at all. Similarly, if significant
negative and positive % diffs are in the confidence interval, we can't
be confident that we are introducing an optimization, regression, or any
change at all.
I think this approach is reasonable given the small number of samples
(usually around 3), which severely limits the statistical methods
available to us.
Assisted by Claude
Commit: 3eb929be5e17d66900020bd1caa7d2510d4f9601
https://github.com/llvm/llvm-project/commit/3eb929be5e17d66900020bd1caa7d2510d4f9601
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M libcxx/src/ios.cpp
Log Message:
-----------
Make ios_base::xalloc non-atomic with LIBCXX_ENABLE_THREADS=OFF. (#208356)
762b77a moved the definition of "xindex" out of the header, and in the
process dropped the _LIBCPP_HAS_THREADS check. Re-add the check to
maintain the status quo.
The discussion on https://github.com/llvm/llvm-project/pull/198994
indicates it's not clear whether LIBCXX_ENABLE_THREADS=OFF is actually
supposed to mean single-threaded. But it clearly does in practice:
atomic_support.h uses non-atomic ops when threads are disabled, and a
few other APIs have explicit non-atomic fallback paths.
My team ran into this trying to run libc++ tests for a RISC-V core
without the "a" extension.
Commit: 3ae8e355a288a8306bae6cd3ce635ce3de4a1359
https://github.com/llvm/llvm-project/commit/3ae8e355a288a8306bae6cd3ce635ce3de4a1359
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M orc-rt/test/unit/CommonTestUtils.h
Log Message:
-----------
[orc-rt] Make noDispatch test helper fail in -Asserts builds. (#209493)
noDispatch guards Sessions that must never dispatch a wrapper call, but
it did so with assert(false), which compiles out under NDEBUG.
Replace the assert with ADD_FAILURE(), which records a failure in every
build mode, and then complete the call via its Return continuation with
an out-of-band error. Completing the call means a caller awaiting the
result unblocks and fails too, rather than hanging, even when the
dispatch arrives on a non-test thread where ADD_FAILURE() alone may not
be observed.
Commit: 5fc69663ad4a99b8ad0f7cc11e8ba2d626cc2acc
https://github.com/llvm/llvm-project/commit/5fc69663ad4a99b8ad0f7cc11e8ba2d626cc2acc
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/declare-simd-empty.f90
A flang/test/Semantics/OpenMP/declare-simd-scope.f90
M flang/test/Semantics/OpenMP/declare-simd.f90
Log Message:
-----------
[flang][OpenMP] Check the context of the declare_simd directive (#209318)
OpenMP 6.0, 9.8 "declare_simd Directive", restricts the placement of the
directive:
Any declare_simd directive must appear in the specification part of a
subroutine subprogram, function subprogram, or interface body to which
it applies.
Flang did not enforce this, and accepted the directive in the
specification part of a module, submodule, main program or block data.
Note: the restriction requiring the argument to name the procedure to
which the directive applies is not implemented here.
Fixes #205478
Commit: 71db296bc0f847220e41bd913b6cce4031a23492
https://github.com/llvm/llvm-project/commit/71db296bc0f847220e41bd913b6cce4031a23492
Author: qyingwu <46992476+qyingwu at users.noreply.github.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseIterationToScf.cpp
M mlir/test/Dialect/SparseTensor/sparse_iteration_to_scf.mlir
Log Message:
-----------
[mlir][sparse] Handle dense iterators in sparse iteration lowering (#208963)
Fixes #205980.
`lower-sparse-iteration-to-scf` always called `linkNewScope()` when
lowering
iterators handled by `scf.for`. Dense levels are random-access
iterators, and
`linkNewScope()` asserts for random-access iterators because those
should be
traversed by coordinate.
Use `locate()` for random-access iterators and keep `linkNewScope()` for
non-random-access iterators.
Verification:
- `cmake --build /tmp/mlir-208198 --target mlir-opt`
- `/tmp/mlir-208198/bin/mlir-opt -lower-sparse-iteration-to-scf
/tmp/issue-
205980.mlir`
- `/tmp/mlir-208198/bin/llvm-lit -sv mlir/test/Dialect/SparseTensor/
sparse_iteration_to_scf.mlir mlir/test/Dialect/SparseTensor/
sparse_kernels_to_iterator.mlir mlir/test/Dialect/SparseTensor/
sparse_space_collapse.mlir`
Commit: 2e38be8333fcd9c17eb7be1b2553b85e0cd9ab15
https://github.com/llvm/llvm-project/commit/2e38be8333fcd9c17eb7be1b2553b85e0cd9ab15
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
Log Message:
-----------
[lldb] Allow generic operands in DWARF binary type check (#209641)
fc298ccbc52a's CheckScalarOperandsHaveSameType also rejects legitimate
generic-typed operands, breaking breakpad STACK WIN / raSearch unwinding
on 32-bit targets. For `DW_OP_breg7 +0, DW_OP_consts +80, DW_OP_plus`,
DW_OP_breg yields a register-sized (8-byte) scalar while DW_OP_const*
yields an address-sized (4-byte) generic one. The strict size gate ran
before the genericness escape, and the escape only checked the left
operand, so the CFA expression was rejected and the unwind failed.
Reorder so two integers that are each at least as wide as the generic
type are accepted before the size/signedness gate. The commit's own
type-check unit tests still pass.
Also fix a latent crash the failure exposed: ReadFrameAddress and
GetReturnAddressHint only consumed the error inside an UNWIND_LOG
argument, which is skipped when the log is off, so the errored Expected
was destroyed unchecked and aborted. Consume it via LLDB_LOG_ERROR /
LLDB_LOG_ERRORV instead.
Commit: 4d0a3021c01e15c473e6a515dc8498fb190e3709
https://github.com/llvm/llvm-project/commit/4d0a3021c01e15c473e6a515dc8498fb190e3709
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
A llvm/lib/Target/NVPTX/NVPTXPromoteParamAlign.cpp
R llvm/lib/Target/NVPTX/NVPTXSetByValParamAlign.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
A llvm/test/CodeGen/NVPTX/promote-param-align.ll
R llvm/test/CodeGen/NVPTX/set-byval-param-align.ll
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
Log Message:
-----------
[NVPTX] Promote internal function alignments in IR pass (#208040)
During lowering NVPTX will update the alignment of parameters and return
values if the function is internal and has only compatible direct calls.
Previously this happened within the alignment helper functions during
ISel and assembly printing making it opaque and unreliable. This change
moves that logic to an IR pass so that it can be inspected and disabled
more easily.
Commit: 68f74b7c1f648f7272f46af5d3d6e314e85601fc
https://github.com/llvm/llvm-project/commit/68f74b7c1f648f7272f46af5d3d6e314e85601fc
Author: Florian Mayer <fmayer at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
[NFC] [TableGen] mention `srcvalue` in unused input error (#209633)
Commit: e2fe51e408e097237a214f82385adf97090b3dee
https://github.com/llvm/llvm-project/commit/e2fe51e408e097237a214f82385adf97090b3dee
Author: David Young <davidayoung at meta.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
Log Message:
-----------
[lldb][bazel] Add ScriptedFrameProvider plugin to the Bazel overlay (#209634)
Adds the PluginScriptedFrameProvider cc_library for the new
SyntheticFrameProvider/ScriptedFrameProvider category and registers it
in DEFAULT_PLUGINS. Deps mirror the plugin's CMakeLists.txt (lldbCore,
lldbInterpreter, lldbTarget, lldbUtility, Support) plus the
:PluginScriptedProcess plugin dep it uses.
The ScriptedFrameProvider plugin was added upstream in PR #161870
("[lldb] Introduce ScriptedFrameProvider for real threads"), relanded as
PR #170236; this wires it into the Bazel overlay build.
bazel rule creation assisted with: claude
Can confirm this rule translates into a valid buck2 rule for Meta to
build internally, but no bazel build locally; will await CI testing.
Commit: 75fd1ca48059b26360dc961651ec9a23dccff53c
https://github.com/llvm/llvm-project/commit/75fd1ca48059b26360dc961651ec9a23dccff53c
Author: Marco Elver <elver at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Handle statement expressions in try-lock conditions (#209330)
Previously, statement expressions (`({ bool b = mu.TryLock(); b; })`)
used as try-lock conditions were not supported. Handle StmtExpr in
getTrylockCallExpr() by recursively analyzing the last statement of the
statement expression.
Commit: 514b75bbc54f751abdcd32f118f620c3dd2ce4ae
https://github.com/llvm/llvm-project/commit/514b75bbc54f751abdcd32f118f620c3dd2ce4ae
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/Interpreter/CommandCompletions.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterfaceUsages.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/PluginManager.cpp
M lldb/source/Interpreter/Interfaces/ScriptedInterfaceUsages.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
A lldb/test/API/commands/scripting/extension/TestScriptingExtensionListJSON.py
M lldb/test/Shell/Commands/command-scripting-extension-list.test
Log Message:
-----------
[lldb/script] Improve `scripting extension list` output and filtering (#209400)
This patch improves `scripting extension list` in three ways.
First, it groups the output by `ScriptedExtension`: instead of one row
per registered plugin instance, one entry per extension is printed with
a combined `Language` field.
Second, it colorizes and visually separates the output. Each entry is
preceded by a dimmed dashed separator; field labels are printed in bold
green, the extension name value in bold cyan as a mini-heading, and
`None` usage values are dimmed, all via the same
`ansi::FormatAnsiTerminalCodes(..., use_color)` idiom
`Breakpoint::GetDescription` uses elsewhere, gracefully no-op when color
is disabled or unsupported. `ScriptedInterfaceUsages::Dump` takes an
optional `use_color` parameter so its own `API Usages:` / `Command
Interpreter Usages:` labels can match.
Third, it adds `-j`/`--json` to emit a JSON array of `{name,
description, languages, api_usages, command_interpreter_usages}` per
extension, mirroring `plugin list`'s existing `-j`. `DoExecute` now
computes the extension grouping once and branches into
`OutputJsonFormat` or `OutputTextFormat`, sharing a
`GetLanguagesForExtension` helper. It also accepts optional positional
`<extension-name>` arguments to filter the listing to specific
extensions (matched via the same case-insensitive
`ScriptInterpreter::StringToExtension` used by `scripting extension
generate`), with completion wired up via `eScriptedExtensionCompletion`.
Also fix a latent lifetime bug in the shared language-collection helper
so it owns its `std::string` values instead of holding `StringRef`s to
temporaries; the JSON path made it observable.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: ef81c51cddcb7395a94da0240ec48e367a60f18c
https://github.com/llvm/llvm-project/commit/ef81c51cddcb7395a94da0240ec48e367a60f18c
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/PthreadLockChecker.cpp
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/c11lock.c
M clang/test/Analysis/fuchsia_lock.c
M clang/test/Analysis/pthreadlock-notes.c
M clang/test/Analysis/pthreadlock.c
Log Message:
-----------
[analyzer] Disable lock order reversal check by default in PthreadLoc… (#202452)
…kChecker
Lock order reversal is a real source of deadlocks, but the current
single-path intraprocedural analysis is a single-path analysis, and it
cannot reason about potentially overlapping executions.This makes this
part of the checker too imprecise for default-on.
Add a WarnOnLockOrderReversal option (default: false) for the previous
behavior.
Commit: 4a223ced16f7aec0389b4b6257a8aecfe5cf57bf
https://github.com/llvm/llvm-project/commit/4a223ced16f7aec0389b4b6257a8aecfe5cf57bf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
Log Message:
-----------
[lldb] Distinguish DWARF binary type-check error messages (#209644)
CheckScalarOperandsHaveSameType reported every operand-check failure
with the same "requires operands to have the same type" message, even
though it rejects operands for three different reasons: mismatched type
kind, mismatched size, and mismatched signedness. That made a failed
check hard to diagnose from the error alone.
Parameterize the message so each check names what actually differs
(type, size, or signedness).
Follow-up to Augusto's review of #209641.
Commit: 23040e8b2f9256cf4fba5af30a10593cb691f39d
https://github.com/llvm/llvm-project/commit/23040e8b2f9256cf4fba5af30a10593cb691f39d
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512dq-intrinsics.ll
Log Message:
-----------
[msan][NFCI] Add AVX512 DQ tests (#207059)
This adds tests for AVX512 DQ ("Doubleword and Quadword Instructions",
not to be mistaken with Dairy Queen), forked from
llvm/test/CodeGen/X86/avx512dq-intrinsics.ll.
Commit: d7e6268cf237308ff84fc1afbb5638862d5cac3f
https://github.com/llvm/llvm-project/commit/d7e6268cf237308ff84fc1afbb5638862d5cac3f
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFCI] Add forceIntegerIntrinsic option to handleIntrinsicByApplyingToShadow() (#207053)
Currently, if handleIntrinsicByApplyingToShadow() is given an
IntrinsicInst with floating-point arguments, it will cast the shadows to
floating-point, apply the intrinsic, and then cast the result back to
integer/shadow. This is inefficient, and, depending on the intrinsic,
may also result in floating-point exceptions.
The user can explicitly supply an integer variant of the intrinsic to be
applied to the shadow (shadowIntrinsicID), but this does not work if the
integer and floating-point variants are overloaded forms of the same
intrinsic ID.
This patch adds an option, 'forceIntegerIntrinsic', which will pass the
shadows as integers to the intrinsic, thus avoiding unnecessary casts.
(This is not enabled by default since some intrinsics do not support
integer arguments.)
As an example, future work can use 'forceIntegerIntrinsic' to handle
`<16 x float> @llvm.x86.avx512.mask.compress (<16 x float>, <16 x
float>, <16 x i1> %mask)`
with
`<16 x i32> @llvm.x86.avx512.mask.compress (<16 x i32>, <16 x i32>, <16
x i1> %mask)`
Commit: 3f58d3dfe808a5605c72fa812776ed6495188a6b
https://github.com/llvm/llvm-project/commit/3f58d3dfe808a5605c72fa812776ed6495188a6b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/statusline/TestStatusline.py
M lldb/test/API/functionalities/statusline/statusline_flood.py
Log Message:
-----------
[lldb][test] Deflake the statusline scripted-command output test (#209643)
test_scripted_command_output_not_eaten failed intermittently in CI on
its assertIn(b"\x1b7", data) guard because the captured window held no
statusline escape at all, only the command output and the next prompt.
The cause is a thread-scheduling race, not a bug. The statusline is
redrawn on the event thread once per progress event, but on a loaded
machine the event thread need not run until the flood command has
already returned, so it drains the queued progress events after (lldb)
was matched and the capture stopped, leaving no redraw to inspect.
Widen the flood (the line count is now an argument) so the event thread
has a larger window to redraw in, and retry until at least one complete
cursor save/restore pair is observed before checking that no output was
spliced into it. If a redraw is never seen, skip rather than fail.
I deliberately avoided a per-line sleep as it would let each redraw
finish between prints and hide the very interleaving the test looks for.
Fixes #209605
Commit: 5be3fdbc59fd78d0b86236ebc44c10c41571ce4c
https://github.com/llvm/llvm-project/commit/5be3fdbc59fd78d0b86236ebc44c10c41571ce4c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/Editline.h
M lldb/source/Host/common/Editline.cpp
Log Message:
-----------
[lldb] Use std::atomic<bool> for Editline's pending-resize flag (#209619)
TerminalSizeChanged() used a volatile std::sig_atomic_t to record that a
resize is pending. That type was chosen because the SIGWINCH handler ran
in async-signal context and could only touch an sig_atomic_t. Signals
are now handled on a dedicated thread, so the flag is written from a
normal thread and std::atomic<bool> is sufficient to handle that.
el_resize() still runs on the thread that owns libedit, in its read
loop. I discovered that it is not safe to run elsewhere, because it
resets libedit's display model without redrawing. Applying it off that
thread seems to throw it off and makes it duplicate the prompt.
Commit: 6dc5473fa6846830134f3ffe2257113382200391
https://github.com/llvm/llvm-project/commit/6dc5473fa6846830134f3ffe2257113382200391
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/X86/dwarf-inline-range-plt-shift.s
Log Message:
-----------
[BOLT] Fix shifted DWARF inline-scope ranges; track scope boundaries (#207291)
Summary:
BOLT updated DWARF lexical-scope ranges (DW_TAG_inlined_subroutine /
lexical_block low_pc/high_pc and DW_AT_ranges) via
translateInputToOutputRange(), which mapped a boundary using its input
offset relative to the start of the containing basic block:
OutAddr = BB.getOutputAddressRange().first + (InputOffset -
BB.getOffset())
This assumes intra-block byte offsets are preserved input->output. Any
pass that changes instruction sizes within a block ahead of a scope
boundary breaks that assumption. With --plt=all, each `call foo at PLT` (5
bytes, e8+rel32) is rewritten to `call *foo at GOT(%rip)` (6 bytes, ff
15+rel32); N such calls before a boundary shift its emitted low_pc/
high_pc N bytes too early, onto the preceding instruction. The range
stays within the parent so `llvm-dwarfdump --verify` does not catch it;
symbolizers then attribute samples on those instructions to the wrong
inlined frames.
Fix is to resolve scope-range boundaries through the precise
per-instruction input-to-output AddressMap (the same map BAT already
uses) instead of input-relative block offsets. Boundary instructions are
arbitrary (not just calls/branches), so they are normally absent from
that map; to make them resolvable, disassembly now keeps an offset for
the boundary instructions (only the boundaries, to keep the AddressMap
small) and those offsets are emitted as AddressMap entries whenever an
address map is required (requiresAddressMap(), which includes
--update-debug-sections via requiresPreciseAddressMap()), not only under
BAT.
Boundary collection (BinaryContext::collectDebugScopeBoundaries) runs in
readDebugInfo() after preprocessDebugInfo(). It streams the DIEs of the
CUs that will be updated directly from the already-loaded DWARFContext
with DWARFDebugInfoEntry::extractFast, decoding one DIE at a time into a
single reusable entry, so no DIE forest is materialized and no second
DWARF context is created. For split DWARF the .dwo DIEs are already
extracted by preprocessDWODebugInfo(), so the cached array is reused
instead. Boundaries are stored per function in a sorted, deduplicated
vector (BinaryFunction::DebugScopeBoundaryOffsets), queried during
disassembly with a monotonic cursor, and freed once the function is
disassembled, so the feature adds no global state.
The behavior is on by default and can be disabled with
--accurate-debug-ranges=0, which falls back to the old block-relative
mapping.
Test on big binaries with split dwarf, -lite=0:
wall Max RSS
-accurate-debug-ranges=0 1070.1s 94.91
-accurate-debug-ranges=1 1173.0s 100.07
delta +102.9s +5.16 (+4.6% CPU,
+5.4% RSS)
Test on big binaries with split dwarf, lite=1:
-accurate-debug-ranges=0 433.9s 83.23
-accurate-debug-ranges=1 434.7s 83.79 (+0.7% RSS)
--time-rewrite shows the boundary-collection phase itself is cheap:
"read debug ranges" is 5.8s of 4960s total user time on one binary
(0.1%) and 18.8s of 6307s on another binary; the feature's
cost is dominated by emitting/translating the extra AddressMap entries,
not by collection.
Commit: e2ead479f043a10e9b6d74f633346b96f37d9b2b
https://github.com/llvm/llvm-project/commit/e2ead479f043a10e9b6d74f633346b96f37d9b2b
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/MC/RISCV/xqcia-invalid.s
M llvm/test/MC/RISCV/xqciac-invalid.s
M llvm/test/MC/RISCV/xqcibi-invalid.s
M llvm/test/MC/RISCV/xqcibm-invalid.s
M llvm/test/MC/RISCV/xqcicli-invalid.s
M llvm/test/MC/RISCV/xqcicm-invalid.s
M llvm/test/MC/RISCV/xqcics-invalid.s
M llvm/test/MC/RISCV/xqcicsr-invalid.s
M llvm/test/MC/RISCV/xqciint-invalid.s
M llvm/test/MC/RISCV/xqcilb-invalid.s
M llvm/test/MC/RISCV/xqcili-invalid.s
M llvm/test/MC/RISCV/xqcilia-invalid.s
M llvm/test/MC/RISCV/xqcilo-invalid.s
M llvm/test/MC/RISCV/xqcilsm-invalid.s
M llvm/test/MC/RISCV/xqcisim-invalid.s
M llvm/test/MC/RISCV/xqcisls-invalid.s
M llvm/test/MC/RISCV/xqcisync-invalid.s
Log Message:
-----------
[RISCV][MC][NFC] Cleanup Xqci Tests (#209646)
Commit: a6d35f4715f1b6aaf1339bfa63e92685c0f46ed2
https://github.com/llvm/llvm-project/commit/a6d35f4715f1b6aaf1339bfa63e92685c0f46ed2
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Plugins/Protocol/MCP/Tool.cpp
M lldb/source/Plugins/Protocol/MCP/Tool.h
M lldb/unittests/Protocol/MCPPluginTest.cpp
Log Message:
-----------
[lldb] Add MCP tools to create and destroy debugger instances (#209288)
Add debugger_create and debugger_delete tools to the MCP server so a
client can manage debugger instances, not just command the ones that
already exist. debugger_create detaches the new debugger's stdio from
the host process (redirecting input/output/error to the null device) so
its prompt and asynchronous output cannot corrupt an MCP stream that
shares the host's stdout. Command results flow through
CommandReturnObject and are unaffected.
Factor the tool and resource registration out of
ProtocolServerMCP::Extend into a shared PopulateServer() so an embedded
in-process server (e.g. in lldb-mcp) can install the same set.
Assisted-by: Claude
rdar://181722721
Commit: f7491eae219f3f5fb5d6ebd187977fb3f9eaa89a
https://github.com/llvm/llvm-project/commit/f7491eae219f3f5fb5d6ebd187977fb3f9eaa89a
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/MetaRenamer.cpp
M llvm/test/Transforms/MetaRenamer/metarenamer.ll
M llvm/test/Transforms/MetaRenamer/opcodes.ll
Log Message:
-----------
[MetaRenamer] Change basic block naming from 'bb' to 'bbl' (#205393)
Currently, `update_test_checks.py` warns when run on MetaRenamer output
e.g., `WARNING: Change IR value name 'bb3' or use
--prefix-filecheck-ir-name to prevent possible conflict with scripted
FileCheck name.`
Avoid this conflict by changing MetaRenamer to use 'bbl' for basic
blocks.
This is similar in spirit to
https://github.com/llvm/llvm-project/commit/86a63b2ae147e5a3edc39643783acfd39b059c92,
which renamed instructions from 'tmp' to 'inst' to avoid a conflict with
automatically-generated checks.
Commit: f89a59461103fdf71bd6c69dd68476b0e568fa52
https://github.com/llvm/llvm-project/commit/f89a59461103fdf71bd6c69dd68476b0e568fa52
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenBuiltins/X86/avx10_2_512bf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx10_2bf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/keylocker.c
Log Message:
-----------
[CIR] Fix x86 builtin tests after tighter inlining (#209653)
The behavior of the AlwaysInliner was tightened in a recent change
(https://github.com/llvm/llvm-project/pull/209345) to avoid inling
functions with mismatched target attributes even when the alwaysinline
attribute was present. This exposed a few failures in CIR where we were
either running with stale target features or missing target features
that were needed for the builtins we were testing.
This change updates the run lines to use the correct feature sets.
Commit: 6ce9488de626f6e791f1d6cdce2562842f665944
https://github.com/llvm/llvm-project/commit/6ce9488de626f6e791f1d6cdce2562842f665944
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/lit/tests/Inputs/per-test-coverage-by-lit-cfg/lit.cfg
M llvm/utils/lit/tests/Inputs/per-test-coverage/lit.cfg
R llvm/utils/lit/tests/Inputs/shtest-external-shell-kill/lit.cfg
R llvm/utils/lit/tests/Inputs/shtest-external-shell-kill/test.txt
M llvm/utils/lit/tests/Inputs/shtest-readfile/lit.cfg
A llvm/utils/lit/tests/Inputs/shtest-run-at-line/basic.txt
A llvm/utils/lit/tests/Inputs/shtest-run-at-line/empty-run-line.txt
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/external-shell/basic.txt
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/external-shell/empty-run-line.txt
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/external-shell/line-continuation.txt
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/external-shell/lit.local.cfg
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/external-shell/run-line-with-newline.txt
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/internal-shell/basic.txt
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/internal-shell/empty-run-line.txt
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/internal-shell/line-continuation.txt
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/internal-shell/lit.local.cfg
R llvm/utils/lit/tests/Inputs/shtest-run-at-line/internal-shell/run-line-with-newline.txt
A llvm/utils/lit/tests/Inputs/shtest-run-at-line/line-continuation.txt
M llvm/utils/lit/tests/Inputs/shtest-run-at-line/lit.cfg
A llvm/utils/lit/tests/Inputs/shtest-run-at-line/run-line-with-newline.txt
M llvm/utils/lit/tests/Inputs/shtest-timeout/lit.cfg
M llvm/utils/lit/tests/per-test-coverage-by-lit-cfg.py
M llvm/utils/lit/tests/per-test-coverage.py
R llvm/utils/lit/tests/shtest-external-shell-kill.py
R llvm/utils/lit/tests/shtest-readfile-external.py
M llvm/utils/lit/tests/shtest-run-at-line.py
M llvm/utils/lit/tests/shtest-timeout.py
Log Message:
-----------
[lit] Remove most external shell test coverage
Now that LLVM 23 has branched, we can look at removing the external
shell.
https://discourse.llvm.org/t/rfc-removal-of-the-lit-external-shell/90951
This patch removes most test coverage that was explicitly for the
external shell as it was entirely duplicated with the internal shell.
This patch leaves out removing test coverage in shtest-format as not all
the coverage there is duplicated and it seems like there is some missing
from the internal shell and I want to give it more careful
consideration.
Reviewers: hnrklssn, ilovepi, jh7370, arichardson
Pull Request: https://github.com/llvm/llvm-project/pull/209500
Commit: e824f1ab372f09e4e9dbae9a19cd9245772b381c
https://github.com/llvm/llvm-project/commit/e824f1ab372f09e4e9dbae9a19cd9245772b381c
Author: Jim Lin <jim at andestech.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
Log Message:
-----------
[RISCV] Rename VLSU_MEM_LATENCY to Andes45VLSU_MEM_LATENCY in RISCVSchedAndes45.td (#209388)
Prefix the defvar with the Andes45 scheduler name to match the other
Andes45-local defvars (e.g. Andes45DLEN) and avoid a bare, generic name
in the shared RISC-V TableGen namespace.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: b208160cd01b220d3482f0159607d3e3855faf57
https://github.com/llvm/llvm-project/commit/b208160cd01b220d3482f0159607d3e3855faf57
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/test/Analysis/exploded-graph-rewriter/lit.local.cfg
M clang/test/Analysis/lit.local.cfg
M clang/test/Analysis/scan-build/lit.local.cfg
M clang/test/lit.cfg.py
M clang/test/utils/update_cc_test_checks/Inputs/lit.cfg.example
M clang/test/utils/update_cc_test_checks/lit.local.cfg
M clang/utils/perf-training/bolt.lit.cfg
M clang/utils/perf-training/lit.cfg
M clang/utils/perf-training/order-files.lit.cfg
Log Message:
-----------
[Clang] Drop ability to use the external shell
The external shell in lit is getting deleted soon and it will soon no
longer be possible to force enable it.
Reviewers: compnerd, petrhosek, ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/209564
Commit: 4376c0b7565895f6b936ce1fac610b92099deba7
https://github.com/llvm/llvm-project/commit/4376c0b7565895f6b936ce1fac610b92099deba7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M mlir/test/lit.cfg.py
Log Message:
-----------
[MLIR] Remove ability to use external shell
The external shell is getting removed soon, so clean up the logic here
to enable it.
Reviewers: petrhosek, jpienaar, ilovepi, joker-eph
Pull Request: https://github.com/llvm/llvm-project/pull/209565
Commit: 6e6272088e69834fde6e30f0033f36ee63806d00
https://github.com/llvm/llvm-project/commit/6e6272088e69834fde6e30f0033f36ee63806d00
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M polly/test/UnitIsl/lit.cfg
M polly/test/lit.cfg
Log Message:
-----------
[Polly] Remove ability to use external shell
The external shell is getting removed soon, so remove the ability to
force enable it for polly tests.
Reviewers: ilovepi, Meinersbur, petrhosek
Pull Request: https://github.com/llvm/llvm-project/pull/209566
Commit: b1a35022e0d7abee1b3baffa8907feca19a7daa8
https://github.com/llvm/llvm-project/commit/b1a35022e0d7abee1b3baffa8907feca19a7daa8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M bolt/test/lit.cfg.py
Log Message:
-----------
[BOLT] Remove ability to use external shell
The external shell is getting removed soon, so remove the ability to
force the use of it within BOLT.
Reviewers:
aaupov, petrhosek, maksfb, yozhu, paschalis-mpeis, yavtuk, ilovepi, rafaelauler, ayermolo
Pull Request: https://github.com/llvm/llvm-project/pull/209567
Commit: 3f6af3be1f3283aef568d1943318f90e4adae5e2
https://github.com/llvm/llvm-project/commit/3f6af3be1f3283aef568d1943318f90e4adae5e2
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/test/Analysis/CycleInfo/basic.ll
M llvm/test/Analysis/CycleInfo/unreachable-predecessor.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/branch-outside.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers-nested.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/exit-divergence.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/reducible-headers.ll
M llvm/test/CodeGen/X86/cycle-info.mir
M llvm/test/Transforms/FixIrreducible/callbr.ll
Log Message:
-----------
[CycleInfo] Store blocks using Euler tour representation (#208614)
Each GenericCycle owned a `SetVector<BlockT*>` of its blocks (its own
plus every nested cycle's), so a block nested D cycles deep is stored D
times.
Instead, store every cycle's blocks in one GenericCycleInfo::BlockLayout
array laid out as an Euler tour of the cycle forest: each cycle owns a
contiguous range [IdxBegin, IdxEnd) nested inside its parent's.
run() builds the cycle tree and the block-to-innermost-cycle map as
before, then lays the array out in `layoutBlocks`. Its DFS also moves
from a single worklist that eagerly pushed every successor (so the stack
grew with the fan-out along the current path) to a stack of (block,
successor cursor) frames bounded by the DFS depth, with each block
pushed once; successors are still visited in the same order (hence the
weird `std::reverse_iterator`), so the cycles found are unchanged.
Block iteration order within a cycle changes, so cycle-print order in
some
CycleInfo/UniformityAnalysis/FixIrreducible tests shifts (block sets are
unchanged).
Aided by Claude Opus 4.8
Commit: f6a359fe20904afe5cc899d3c2fda258322f1f71
https://github.com/llvm/llvm-project/commit/f6a359fe20904afe5cc899d3c2fda258322f1f71
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
A llvm/test/CodeGen/X86/sincos-fpmath.ll
M llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
Log Message:
-----------
[CodeGen] Teach ReplaceWithVeclib split vector llvm.sincos when only sin/cos veclib mappings exist (#194639)
Some vector math libraries provide vector sin and vector cos but no
vector sincos or no sincos with an ABI that LLVM can emit.
The one of the common case is glibc libmvec on x86: it exposes
`_ZGV{b,c,d,e}N{2,4,8,16}vvv_sincos{,f}` symbols, but those use a
vectors-of-pointers output ABI that expandMultipleResultFPLibCall does
not currently support. As a result, sincos will falls back to scalar
sincos calls even when the target has a fully working vector sin and
vector cos.
So we trying to split it into separate sin and cos calls, which will
then be replaced with vector calls if the target supports it, it
generally better than scalarized sincos calls.
Commit: 2033c4569af6ae3665a731dd276ea9795d531256
https://github.com/llvm/llvm-project/commit/2033c4569af6ae3665a731dd276ea9795d531256
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/lib/ProfileData/SampleProfReader.cpp
Log Message:
-----------
[SampleProfile] Remove ProfileHasAttribute parameter from readFuncMetadata (NFC) (#208604)
This patch removes the ProfileHasAttribute parameter from
readFuncMetadata overloads.
Because ProfileHasAttribute is set once in readImpl during section
header parsing and never modified afterward, readFuncMetadata observes
the exact same immutable value regardless of whether it is passed as a
function parameter or read from the class member variable.
Assisted-by: Antigravity
Commit: 4148172fb742eaca83b427e43b0ff5691fe28d72
https://github.com/llvm/llvm-project/commit/4148172fb742eaca83b427e43b0ff5691fe28d72
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M lld/test/lit.cfg.py
Log Message:
-----------
[lld] Remove ability to use the external shell
The external shell is going to get removed soon, so remove the ability
to force the use of it for lld tests.
Reviewers: ilovepi, MaskRay, petrhosek
Pull Request: https://github.com/llvm/llvm-project/pull/209568
Commit: 3f46a5e91cdf2ade1d8ca350f4a57af8221407ea
https://github.com/llvm/llvm-project/commit/3f46a5e91cdf2ade1d8ca350f4a57af8221407ea
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/FileCheck/lit.local.cfg
M llvm/test/lit.cfg.py
M llvm/test/tools/UpdateTestChecks/lit.local.cfg
M llvm/utils/mlgo-utils/tests/lit.cfg
Log Message:
-----------
[LLVM] Drop ability to use external shell
The external shell is getting removed soon, so drop the ability to force
the use of it for running LLVM tests.
Reviewers: ilovepi, petrhosek, arichardson
Pull Request: https://github.com/llvm/llvm-project/pull/209569
Commit: bf8924c7e10d4b0571c73f0b55274fb585a65c23
https://github.com/llvm/llvm-project/commit/bf8924c7e10d4b0571c73f0b55274fb585a65c23
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/utils/lit/tests/Inputs/shtest-define/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-output-printing/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-pushd-popd/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-run-at-line/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-ulimit-nondarwin/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-ulimit/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-umask/lit.cfg
M llvm/utils/lit/tests/lit.cfg
M llvm/utils/lit/tests/per-test-coverage-by-lit-cfg.py
Log Message:
-----------
[lit] Drop explicitly setting execute_external=False
That parameter will be going away soon.
Reviewers: jh7370, arichardson, hnrklssn, ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/209570
Commit: a2fac66e0678ecb0ffe90cbd40afbc97eb84cf70
https://github.com/llvm/llvm-project/commit/a2fac66e0678ecb0ffe90cbd40afbc97eb84cf70
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M flang-rt/test/lit.cfg.py
M flang/test/lit.cfg.py
Log Message:
-----------
[Flang] Drop option to use external shell for testing
The external shell will be deleted soon, so drop the option to enable
the use of it for testing flang/flang-rt.
Reviewers: petrhosek, clementval, ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/209624
Commit: dcbf2a9eee64a100d22d4194293e828864cbbdbc
https://github.com/llvm/llvm-project/commit/dcbf2a9eee64a100d22d4194293e828864cbbdbc
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/test/lit.cfg.py
M clang-tools-extra/include-cleaner/test/lit.cfg.py
M clang-tools-extra/test/lit.cfg.py
Log Message:
-----------
[clang-tools-extra] Drop option to use external shell
The external shell is going to be removed from lit soon, so drop the
option to enable using it.
Reviewers: petrhosek, compnerd, ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/209625
Commit: 00112b0ac171c360ae60d2f7ffabb7f22d62cdd0
https://github.com/llvm/llvm-project/commit/00112b0ac171c360ae60d2f7ffabb7f22d62cdd0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[compiler-rt] Drop support for using the external shell
The lit external shell is going to be removed soon, so drop support for
using it to run the compiler-rt tests.
Reviewers: petrhosek, ilovepi, thurstond
Pull Request: https://github.com/llvm/llvm-project/pull/209626
Commit: 7c7f62c8880c0a4d94ea9607ea038ad6690264db
https://github.com/llvm/llvm-project/commit/7c7f62c8880c0a4d94ea9607ea038ad6690264db
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
R llvm/utils/lit/tests/Inputs/shtest-format/external_shell/fail.txt
R llvm/utils/lit/tests/Inputs/shtest-format/external_shell/fail_with_bad_encoding.txt
R llvm/utils/lit/tests/Inputs/shtest-format/external_shell/fail_with_control_chars.txt
R llvm/utils/lit/tests/Inputs/shtest-format/external_shell/lit.local.cfg
R llvm/utils/lit/tests/Inputs/shtest-format/external_shell/pass.txt
R llvm/utils/lit/tests/Inputs/shtest-format/external_shell/utf8_command.txt
R llvm/utils/lit/tests/Inputs/shtest-format/external_shell/write-bad-encoding.py
R llvm/utils/lit/tests/Inputs/shtest-format/external_shell/write-control-chars.py
A llvm/utils/lit/tests/Inputs/shtest-format/fail_with_bad_encoding.txt
A llvm/utils/lit/tests/Inputs/shtest-format/fail_with_control_chars.txt
A llvm/utils/lit/tests/Inputs/shtest-format/utf8_command.txt
A llvm/utils/lit/tests/Inputs/shtest-format/write-bad-encoding.py
A llvm/utils/lit/tests/Inputs/shtest-format/write-control-chars.py
M llvm/utils/lit/tests/shtest-format.py
Log Message:
-----------
[lit] Remove external shell tests for shtest-format
fail.txt was redundant with an internal shell test.
Move the other tests into the internal shell directory as they are not
redundant.
Reviewers: arichardson, jh7370, hnrklssn, ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/209552
Commit: bd1983e7ec9fef429787997684b48644dee583c4
https://github.com/llvm/llvm-project/commit/bd1983e7ec9fef429787997684b48644dee583c4
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/TableGen/TGParser.cpp
Log Message:
-----------
[TableGen] V is always a TypedInit, so use cast (#209208)
No need to dyn_cast. It is functionally impossible for V to not be a
TypedInit at this point.
Commit: 848d409e60845352cfce85c2a23d1d262a0c68f3
https://github.com/llvm/llvm-project/commit/848d409e60845352cfce85c2a23d1d262a0c68f3
Author: Sairudra More <sairudra60 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Integration/OpenMP/target-inreduction-llvmir.f90
A flang/test/Lower/OpenMP/Todo/target-inreduction-common.f90
A flang/test/Lower/OpenMP/Todo/target-inreduction-equivalence.f90
A flang/test/Lower/OpenMP/Todo/target-inreduction-firstprivate.f90
R flang/test/Lower/OpenMP/Todo/target-inreduction.f90
A flang/test/Lower/OpenMP/target-inreduction-unused.f90
A flang/test/Lower/OpenMP/target-inreduction.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/host-op-filtering.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
A mlir/test/Target/LLVMIR/openmp-target-in-reduction-device.mlir
A mlir/test/Target/LLVMIR/openmp-target-in-reduction-multi.mlir
A mlir/test/Target/LLVMIR/openmp-target-in-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[flang][OpenMP] Lower target in_reduction (#199967)
This patch carries `in_reduction` through `omp.target` for host
execution.
The lowering looks up the task-reduction private storage with
`__kmpc_task_reduction_get_th_data` and binds the target region argument
to that private pointer. This makes uses inside the target region refer
to the task-private reduction storage instead of continuing to use the
original variable.
This also fixes the `omp::TargetOp::build(TargetOperands)` path so
`in_reduction` operands are preserved instead of being dropped.
On the Flang side, `target in_reduction` list items are added to the
target map entries when needed, giving the translation a matching mapped
value to rewrite.
### Stack / review order
This PR is related to the OpenMP task-reduction translation stack:
1. #199565 — `omp.taskgroup task_reduction` translation
2. #199670 — `omp.taskloop` `reduction` / `in_reduction` translation
3. #202611 — explicit `omp.task in_reduction` translation
This PR is a target-specific sibling follow-up:
* #199967 — `omp.target in_reduction` host lowering
The intended main review order for the task/taskloop stack is:
#199565 → #199670 → #202611
This PR should be reviewed as the `omp.target in_reduction` host-side
lowering work built on the same task-reduction runtime model, not as a
dependency of #202611.
Addresses #199904.
Assisted-by: Claude Opus 4.8 and ChatGPT 5.5
Commit: f859de88413c729166b08c00af5fcfe4f4b15b2d
https://github.com/llvm/llvm-project/commit/f859de88413c729166b08c00af5fcfe4f4b15b2d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M llvm/test/lit.cfg.py
Log Message:
-----------
[LLVM] Use kwargs for ShTest constructor (#209676)
Since extra_substitutions is not the first argument (although it will be
soon).
Fixes https://lab.llvm.org/buildbot/#/builders/223/builds/7170.
This was broken by 3f46a5e91cdf2ade1d8ca350f4a57af8221407ea.
Commit: f8d8dc1f864fa887f949418a2ebb58e1a0d239b8
https://github.com/llvm/llvm-project/commit/f8d8dc1f864fa887f949418a2ebb58e1a0d239b8
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Support/raw_ostream.cpp
M llvm/unittests/Support/raw_ostream_test.cpp
Log Message:
-----------
[Support] Treat Windows "NUL" as the null device in writeToOutput (#208179)
llvm-objcopy (via writeToOutput) only special-cased "/dev/null", so on
Windows an output path of "NUL" fell through to TempFile::create() +
rename. Windows reserves "NUL" as a device name, so the rename fails
with "permission denied". This broke clang-offload-bundler's SYCL fat
object step when the driver is invoked with `-o nul` in downstream test
https://github.com/intel/llvm/blob/sycl/sycl/test/include_deps/header_reach.cpp
Assisted by: Claude
Commit: 11ebc0e6645c8c53c75bca93e9fddf0053507cc1
https://github.com/llvm/llvm-project/commit/11ebc0e6645c8c53c75bca93e9fddf0053507cc1
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
A llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-merge-values-build-vector-s16.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Select s16 G_MERGE_VALUES into wider scalars (#207999)
With real-true16 (default on `gfx11`/`gfx12`), a scalar `s16` is a
register type, so the `G_MERGE_VALUES` legality rule started accepting
scalar merges built from `s16` pieces, e.g. `s64 = G_MERGE_VALUES(4 x
s16)`. The instruction selector has no pattern for that shape. So this
aborts with `cannot select` on something like:
```mlir
define amdgpu_kernel void @k(ptr %p) {
store i136 0, ptr %p, align 8
ret void
}
```
Make it selectable rather than restricting legalization: Pack pairs of
`s16` with `S_PACK_LL_B32_B16` then `REG_SEQUENCE`.
Assisted-by: Claude
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 454a66a65c66012004b2e1e711247f5ebf729957
https://github.com/llvm/llvm-project/commit/454a66a65c66012004b2e1e711247f5ebf729957
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[CodeGen][NPM] Disable Machine verifier at the end of default pipelines (#208357)
keeping discussions in https://github.com/llvm/llvm-project/pull/176693.
Adds target option to disable machine verifier at the end of default
pilelines (O0,O1..). Also ref.
https://github.com/llvm/llvm-project/pull/201004 for discussions
regarding why this is required (temporarily atleast) so that NPM
migration is unblocked. should be removed once we have fixed all the
latent verifier issues.
Commit: 424421a80936e1d3cb824eecce51344acbc80253
https://github.com/llvm/llvm-project/commit/424421a80936e1d3cb824eecce51344acbc80253
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
M orc-rt/lib/executor/CMakeLists.txt
Log Message:
-----------
[orc-rt] Sort header and source lists in CMakeLists. NFC. (#209685)
Commit: 74822b4ee01f168f2d9a808594abb0c8936f5bbf
https://github.com/llvm/llvm-project/commit/74822b4ee01f168f2d9a808594abb0c8936f5bbf
Author: Weibo He <NewSigma at 163.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaType.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[clang][Sema] Fix rejected-valid for explicit object parameters in dependent nested classes context (#209107)
In #89078, we banned explicit object parameters from several invalid
contexts. This patch proposes we relax the restriction and allow
entering contexts so that nested classes can be visited correctly.
Close #136472
Commit: c4830afdbbc7b16a52a05d6a5b56e6c3fc14fb98
https://github.com/llvm/llvm-project/commit/c4830afdbbc7b16a52a05d6a5b56e6c3fc14fb98
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/ConfigYAML.cpp
Log Message:
-----------
[clangd] Use unique_function for config handlers (#203008)
`ConfigYAML.cpp`'s `DictParser` owns its callbacks for one parse and
never copies them, so this replaces `std::function` with move-only
`llvm::unique_function` and removes the unused copy machinery for each
lambda.
In a matched Release AArch64 build, `ConfigYAML.cpp.o` shrank by 94,560
bytes, stripped clangd shrank by 16,848 bytes, unstripped clangd shrank
by 82,512 bytes, and dyld fixups fell by 336.
Validated with the 16 `ParseYAML` unit tests and `clangd --check`; 12
paired runs of 100,000 parses improved mean user CPU time by 3.46% (95%
CI: 1.31% to 5.61%).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: b570a7754d9b84af8ceffd8834194d559077cda5
https://github.com/llvm/llvm-project/commit/b570a7754d9b84af8ceffd8834194d559077cda5
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add recently added sys/socket functions and syscall wrappers (#209457)
This patch adds the missing functions to BUILD.bazel:
- recvmmsg
- sendmmsg
- setsockopt
- shutdown
I also add the corresponding syscall wrapper libraries that these
functions depend on, along with a couple of additional type libraries.
I'm leaving the remaining sys/socket functions and test suites out for
now since some of them require additional infrastructure or type
definitions.
Assisted by Gemini.
Commit: 36c6568b04aff4e1cf00a60570ab4a4344692920
https://github.com/llvm/llvm-project/commit/36c6568b04aff4e1cf00a60570ab4a4344692920
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libc/src/__support/StringUtil/CMakeLists.txt
M libc/src/__support/StringUtil/signal_to_string.cpp
M libc/src/__support/StringUtil/tables/CMakeLists.txt
M libc/src/__support/StringUtil/tables/linux_extension_signals.h
M libc/src/__support/StringUtil/tables/posix_signals.h
M libc/src/__support/StringUtil/tables/stdc_signals.h
M libc/src/signal/kill.h
M libc/src/signal/linux/CMakeLists.txt
M libc/src/signal/linux/kill.cpp
M libc/src/signal/linux/sigemptyset.cpp
M libc/src/signal/raise.h
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/sys/wait/linux/CMakeLists.txt
M libc/src/sys/wait/wait4Impl.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/fork.cpp
M libc/test/src/fenv/enabled_exceptions_test.cpp
M libc/test/src/signal/kill_test.cpp
M libc/test/src/signal/pthread_sigmask_test.cpp
M libc/test/src/signal/raise_test.cpp
M libc/test/src/signal/sigaddset_test.cpp
M libc/test/src/signal/sigdelset_test.cpp
M libc/test/src/signal/sigfillset_test.cpp
M libc/test/src/signal/signal_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
M libc/test/src/stdlib/abort_test.cpp
M libc/test/src/string/strsignal_test.cpp
M libc/test/src/sys/mman/linux/mprotect_test.cpp
Log Message:
-----------
[libc] Remove #include <signal.h> (#209433)
Replace it with granular includes of the appropriate type/macro proxy
headers.
Assisted by Gemini.
Commit: 7881a375884c3793d2fa7c31ab97781a43547f31
https://github.com/llvm/llvm-project/commit/7881a375884c3793d2fa7c31ab97781a43547f31
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Linalg/simplify-pack-unpack.mlir
Log Message:
-----------
[mlir][linalg] Refine pack/unpack simplification checks (NFC) (#209522)
Update `isPackOn1D`, which is used by both
`SimplifyPackToExpandShape` and `SimplifyUnPackToCollapseShape`:
* Rename it to `isPackOnEffectively1D` to better reflect its
functionality: the underlying pack can be multi-dimensional.
* Add checks to ensure that the unique non-unit inner tile is used to
tile the unique non-unit unpacked dimension (that was previously
left as an unchecked assumption).
* Add comments to the test file for these patterns, grouping the tests
according to the functionality/cases being tested.
Commit: 89fa7352a2cfd5ec498ba442de77d257475954f2
https://github.com/llvm/llvm-project/commit/89fa7352a2cfd5ec498ba442de77d257475954f2
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/arpa/inet.yaml
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_ntoa.cpp
A libc/src/arpa/inet/inet_ntoa.h
M libc/test/src/arpa/inet/CMakeLists.txt
A libc/test/src/arpa/inet/inet_ntoa_test.cpp
Log Message:
-----------
[libc] Implement inet_ntoa (#208702)
Implement inet_ntoa, reusing the internal net::ipv4_to_str helper that
backs inet_ntop.
The result is stored in a *thread-local* static buffer. A thread-local
buffer is not required for POSIX conformance, but there is some
precedent for that, both in llvm libc (e.g. `strsignal`) and in glibc
(whose `inet_ntoa` uses it). I'm doing the same for maximum
compatiblity.
Assisted by Gemini.
Commit: 69e0994c93bc56f96e5f0ef83fdd0121a829c9d0
https://github.com/llvm/llvm-project/commit/69e0994c93bc56f96e5f0ef83fdd0121a829c9d0
Author: Wendi <uwendi at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/docs/QualGroup.rst
Log Message:
-----------
[Docs] Document Qualification WG artifacts and meeting archive (#209382)
# Summary
Update the LLVM Qualification Working Group page to point readers to the
group's directory in the `llvm-wgs` repository.
The new **Working Group artifacts** section explains that the directory
is the central location for the group's public technical outputs and
working materials, including qualification guidance, templates,
analyses, and proposals.
The **Meeting Materials** section is also updated to reflect the
migration of meeting materials, agendas, and minutes to the `llvm-wgs`
repository. The repository is presented as the long-term archive, while
the existing Discourse thread remains the location where upcoming
agendas and newly published minutes are shared.
# Changes
- Add a link to the Qualification Working Group's `fusa-qual-wg`
directory.
- Explain the purpose and maturity of the artifacts stored there.
- Link directly to the meeting materials and meeting minutes
directories.
- Add a link to the repository-based meeting archive.
- Retain the Discourse thread as the communication channel for agendas
and minutes.
# Related repository
https://github.com/llvm/llvm-wgs/tree/main/fusa-qual-wg
Commit: bff9c544bd87087d1e13a7b1c6298aa9e21a313c
https://github.com/llvm/llvm-project/commit/bff9c544bd87087d1e13a7b1c6298aa9e21a313c
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/MC/RISCV/corev/XCValu-invalid.s
M llvm/test/MC/RISCV/corev/XCVbi-invalid.s
M llvm/test/MC/RISCV/corev/XCVbitmanip-invalid.s
M llvm/test/MC/RISCV/corev/XCVelw-invalid.s
M llvm/test/MC/RISCV/corev/XCVmac-invalid.s
M llvm/test/MC/RISCV/corev/XCVmem-invalid.s
M llvm/test/MC/RISCV/corev/XCVsimd-invalid.s
M llvm/test/MC/RISCV/function-call-invalid.s
M llvm/test/MC/RISCV/priv-invalid.s
M llvm/test/MC/RISCV/rv32d-invalid.s
M llvm/test/MC/RISCV/rv32f-invalid.s
M llvm/test/MC/RISCV/rv32i-aliases-invalid.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/test/MC/RISCV/rv32q-invalid.s
M llvm/test/MC/RISCV/rv32xqccmp-invalid.s
M llvm/test/MC/RISCV/rv32zcmp-invalid.s
M llvm/test/MC/RISCV/rv32zdinx-invalid.s
M llvm/test/MC/RISCV/rv32zfh-invalid.s
M llvm/test/MC/RISCV/rv32zhinx-invalid.s
M llvm/test/MC/RISCV/rv64d-invalid.s
M llvm/test/MC/RISCV/rv64f-invalid.s
M llvm/test/MC/RISCV/rv64i-aliases-invalid.s
M llvm/test/MC/RISCV/rv64q-invalid.s
M llvm/test/MC/RISCV/rv64xqccmp-invalid.s
M llvm/test/MC/RISCV/rv64xtheadfmemidx-invalid.s
M llvm/test/MC/RISCV/rv64xtheadmemidx-invalid.s
M llvm/test/MC/RISCV/rv64zcmp-invalid.s
M llvm/test/MC/RISCV/rv64zdinx-invalid.s
M llvm/test/MC/RISCV/rv64zfh-invalid.s
M llvm/test/MC/RISCV/rv64zfinx-invalid.s
M llvm/test/MC/RISCV/rv64zhinx-invalid.s
M llvm/test/MC/RISCV/rve-invalid.s
M llvm/test/MC/RISCV/rvzfbfmin-invalid.s
M llvm/test/MC/RISCV/rvzfhmin-invalid.s
M llvm/test/MC/RISCV/rvzicond-invalid.s
M llvm/test/MC/RISCV/tlsdesc.s
M llvm/test/MC/RISCV/xmips-invalid.s
M llvm/test/MC/RISCV/xqcibm-invalid.s
M llvm/test/MC/RISCV/xqcili-invalid.s
M llvm/test/MC/RISCV/xqcilo-invalid.s
M llvm/test/MC/RISCV/xqcisim-invalid.s
M llvm/test/MC/RISCV/xqcisls-invalid.s
M llvm/test/MC/RISCV/xtheadcondmov-invalid.s
M llvm/test/MC/RISCV/xtheadmac-invalid.s
Log Message:
-----------
[RISCV][MC] Improve GPR Error Messages (#209669)
- For the usual GPR RegClass
- For the GPRX0 RegClass as used by the `PseudoC_ADDI_NOP` instruction.
- For the SR07 regclass used by Zcmp and Xqccmp instructions.
Commit: 2d6692d577cfee5af4d96a0759a14b55ee58b6e1
https://github.com/llvm/llvm-project/commit/2d6692d577cfee5af4d96a0759a14b55ee58b6e1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/si-scheduler.ll
M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/si-split-load-store-alias-info.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcall-nobuiltin-def.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll
M llvm/test/CodeGen/AMDGPU/simulated-trap-pseudo-expand.ll
M llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow.mir
M llvm/test/CodeGen/AMDGPU/sink-image-sample.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-fold-regsequence.mir
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/smem-no-clause-coalesced.mir
M llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
M llvm/test/CodeGen/AMDGPU/smfmac_alloc_failure_no_agpr_O0.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/smrd-fold-offset.mir
M llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll
M llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
M llvm/test/CodeGen/AMDGPU/snippet-copy-bundle-regression.mir
M llvm/test/CodeGen/AMDGPU/soft-clause-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/speculative-execution-freecasts.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll
M llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-regpressure-less.mir
M llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-block.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-wait.mir
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/spill192.mir
M llvm/test/CodeGen/AMDGPU/spill224.mir
M llvm/test/CodeGen/AMDGPU/spill288.mir
M llvm/test/CodeGen/AMDGPU/spill320.mir
M llvm/test/CodeGen/AMDGPU/spill352.mir
M llvm/test/CodeGen/AMDGPU/spill384.mir
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.ll
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/spillv16Kernel.ll
M llvm/test/CodeGen/AMDGPU/spillv16Kernel.mir
M llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
M llvm/test/CodeGen/AMDGPU/split-mbb-lis-subrange.mir
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
M llvm/test/CodeGen/AMDGPU/splitkit-do-not-undo-subclass-split-with-remat.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/splitkit.mir
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
M llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (33) (#209562)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 162a2767d624684869d710f25096b882a32109bc
https://github.com/llvm/llvm-project/commit/162a2767d624684869d710f25096b882a32109bc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
clang-linker-wrapper: Use AMDGPU::TargetID for image compatibilty (2) (#209563)
This reverts commit aa5960600ac38fcd923e69777bad1293f56658d7.
Before the first attempt, clang-linker-wrapper inconsistently
applied linker reasoning to the target ID feature modifiers, but
not the base processor. e.g., gfx90a was considered mergable
with gfx90a:xnack+.
The first attempt at this changed introduced and used
TargetID::isCompatibleWith, which applied full linking
compatibility logic. This broke tests which combined
generic and covered non-generic targets in the build (e.g.,
gfx9-generic and gfx900). The archives would both be treated
as compatible, resulting in multiple definition errors.
Split the TargetID compatibility checks into 2 different kinds:
1 for exact target match used for archives, and 1 for logical
compatibility usable for objects. For archive purposes, this stops
treating xnack-any as the same target with an xnack specifier which
is a behavior change. It just so happens that clang would error if you
tried to compile xnack-any and xnack+/- in the same invocation, so this
behavior was only observable when directly using the binary tools.
Co-authored-by: Claude (Opus 4.8)
Commit: b790c5cd267974456806773f01dfb8936b22e4f2
https://github.com/llvm/llvm-project/commit/b790c5cd267974456806773f01dfb8936b22e4f2
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/file.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_condattr_getclock.cpp
M libc/src/pthread/pthread_condattr_getclock.h
M libc/src/pthread/pthread_condattr_setclock.cpp
M libc/src/pthread/pthread_condattr_setclock.h
M libc/src/sys/prctl/linux/CMakeLists.txt
M libc/src/sys/prctl/prctl.h
M libc/src/sys/random/getrandom.h
M libc/src/sys/random/linux/CMakeLists.txt
M libc/src/sys/resource/getrlimit.h
M libc/src/sys/resource/linux/CMakeLists.txt
M libc/src/sys/resource/setrlimit.h
M libc/src/sys/sendfile/linux/CMakeLists.txt
M libc/src/sys/sendfile/linux/sendfile.cpp
M libc/src/sys/sendfile/sendfile.h
M libc/src/sys/socket/linux/CMakeLists.txt
M libc/src/sys/socket/recv.h
M libc/src/sys/socket/send.h
M libc/src/sys/wait/linux/CMakeLists.txt
M libc/src/sys/wait/wait.h
M libc/src/sys/wait/waitpid.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/isatty.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/do_start.cpp
M libc/test/integration/src/sys/ptrace/linux/ptrace_test.cpp
M libc/test/src/fcntl/CMakeLists.txt
M libc/test/src/fcntl/creat_test.cpp
M libc/test/src/fcntl/fcntl_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fdopen_test.cpp
M libc/test/src/string/memory_utils/protected_pages.h
M libc/test/src/sys/auxv/linux/CMakeLists.txt
M libc/test/src/sys/auxv/linux/getauxval_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/mprotect_test.cpp
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
M libc/test/src/sys/mman/linux/remap_file_pages_test.cpp
M libc/test/src/sys/resource/CMakeLists.txt
M libc/test/src/sys/resource/getrlimit_setrlimit_test.cpp
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/sendfile/sendfile_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/sendto_recvfrom_test.cpp
M libc/test/src/sys/socket/linux/socket_test.cpp
M libc/test/src/sys/socket/linux/socketopt_test.cpp
M libc/test/src/sys/socket/linux/socketpair_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/chmod_test.cpp
M libc/test/src/sys/stat/fchmod_test.cpp
M libc/test/src/sys/stat/fchmodat_test.cpp
M libc/test/src/sys/stat/fstat_test.cpp
M libc/test/src/sys/stat/lstat_test.cpp
M libc/test/src/sys/stat/stat_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/access_test.cpp
M libc/test/src/unistd/chown_test.cpp
M libc/test/src/unistd/dup2_test.cpp
M libc/test/src/unistd/dup3_test.cpp
M libc/test/src/unistd/dup_test.cpp
M libc/test/src/unistd/faccessat_test.cpp
M libc/test/src/unistd/fchown_test.cpp
M libc/test/src/unistd/ftruncate_test.cpp
M libc/test/src/unistd/isatty_test.cpp
M libc/test/src/unistd/link_test.cpp
M libc/test/src/unistd/linkat_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
M libc/test/src/unistd/symlink_test.cpp
M libc/test/src/unistd/symlinkat_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/test/src/unistd/truncate_test.cpp
M libc/test/src/unistd/unlink_test.cpp
M libc/test/src/unistd/unlinkat_test.cpp
Log Message:
-----------
[libc] Remove #include <sys/whatever.h> (#209449)
and replace with granular includes of type/macro proxy headers -- where
those headers exist. I'm leaving the creation of new proxy headers for
another patch.
Assisted by Gemini.
Commit: 15776b5cddd4bfd8ff06f2aac6e9eea09cf0112c
https://github.com/llvm/llvm-project/commit/15776b5cddd4bfd8ff06f2aac6e9eea09cf0112c
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
Log Message:
-----------
[CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (#209677)
moveTopLevelCycleToNewParent maintains TopLevelCycle eagerly, rewriting
the whole re-parented subtree with depth_first. When discovery nests k
cycles one by one this is quadratic, and the df_iterator walk plus its
visited set dominate construction on deep nests (~78% of time on a
1500-deep nest).
Walk ParentCycle links in getTopLevelParentCycle instead and delete the
member. The walk is valid during construction too: parent links are
always current, and discovery queries blocks whose innermost cycle sits
at the top of the forest being merged, so the walk is short.
Aided by Claude Fable 5
Commit: af84127cbfc571f86cf7c9ac344223e190bb9970
https://github.com/llvm/llvm-project/commit/af84127cbfc571f86cf7c9ac344223e190bb9970
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
Log Message:
-----------
[SPIR-V] Remove dead typed pointer check in getArgSPIRVType (#209515)
Arg->getType() can never be a TypedPointerType since opaque pointers are
now the only pointer representation in LLVM IR
Commit: b78a0acaa964804151dd3a25eaec360baacfd631
https://github.com/llvm/llvm-project/commit/b78a0acaa964804151dd3a25eaec360baacfd631
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
Log Message:
-----------
[SPIR-V] Unify duplicated named MDNode lookup helper (#209376)
Commit: 771d152cd10a05a10023beb0ff289ea1180b1751
https://github.com/llvm/llvm-project/commit/771d152cd10a05a10023beb0ff289ea1180b1751
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
Log Message:
-----------
[SPIR-V] Preserve offset alignment in pointer cast legalization (#209251)
Splitting a load/store into per-element accesses reused the original
alignment for every element, which could wrongly strengthen or discard
alignment
Compute each split access alignment via commonAlignment with its
DataLayout derived byte offset matching SPIRVLegalizerInfo.cpp
Commit: 046acff1018f034e2a5d714c7287b9055148d1c7
https://github.com/llvm/llvm-project/commit/046acff1018f034e2a5d714c7287b9055148d1c7
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add packed saturating rounding shift codegen (#208630)
Add codegen for `pssha`, `psshar`, `psshl`, and `psshlr` on RV32 and
RV64.
Commit: 396a2d700bba0f9d4ac97198921beb7413e5ce5c
https://github.com/llvm/llvm-project/commit/396a2d700bba0f9d4ac97198921beb7413e5ce5c
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvp-insert-subvector.ll
Log Message:
-----------
[RISCV][P-ext] Fold packed insert-into-zero to zero-extend (#208006)
An insert_subvector of a 32-bit packed type (v4i8/v2i16) into a zero-filled
64-bit packed vector at index 0 is a zero-extend. Fold it so RV64 emits a
single zext.w instead of scalarizing into a byte-wise repack; RV32
concatenates with a zero half into the GPRPair.
Commit: bdd15ffec5f1e14962f86cbdb82a03016c2c5924
https://github.com/llvm/llvm-project/commit/bdd15ffec5f1e14962f86cbdb82a03016c2c5924
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/SRSRC-GIT-clobber-check.mir
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/srl64_reduce.ll
M llvm/test/CodeGen/AMDGPU/srl64_reduce_flags.ll
M llvm/test/CodeGen/AMDGPU/sroa-before-unroll.ll
M llvm/test/CodeGen/AMDGPU/sroa-phi-nodes.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/stack-passed-subdword-arg-crash-issue157997.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
M llvm/test/CodeGen/AMDGPU/stackguard.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.invalid.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/stale-livevar-in-twoaddr-pass.mir
M llvm/test/CodeGen/AMDGPU/statepoint-asm-printer.mir
M llvm/test/CodeGen/AMDGPU/statepoint-insert-waitcnts.mir
M llvm/test/CodeGen/AMDGPU/store-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/store-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/store-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll
M llvm/test/CodeGen/AMDGPU/store-global.ll
M llvm/test/CodeGen/AMDGPU/store-hi16.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-local.ll
M llvm/test/CodeGen/AMDGPU/store-private.ll
M llvm/test/CodeGen/AMDGPU/store-to-constant.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/store-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/stress-calls.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_fpext.ll
M llvm/test/CodeGen/AMDGPU/strict_fptrunc.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f64.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/sub-zext-cc-zext-cc.ll
M llvm/test/CodeGen/AMDGPU/sub.i16.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sub64-low-32-bits-known-zero.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
M llvm/test/CodeGen/AMDGPU/sub_u64.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll
M llvm/test/CodeGen/AMDGPU/subreg-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
M llvm/test/CodeGen/AMDGPU/subvector-test.mir
M llvm/test/CodeGen/AMDGPU/swdev-549940.ll
M llvm/test/CodeGen/AMDGPU/swdev282079.ll
M llvm/test/CodeGen/AMDGPU/swdev282079.mir
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
M llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
M llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
M llvm/test/CodeGen/AMDGPU/switch-unreachable.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/syncscopes.ll
M llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll
M llvm/test/CodeGen/AMDGPU/tail-call-cgp.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.waterfall.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.ll
M llvm/test/CodeGen/AMDGPU/tail-duplication-convergent.ll
M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
M llvm/test/CodeGen/AMDGPU/tgsplit.ll
M llvm/test/CodeGen/AMDGPU/threeaddr-wmma.mir
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-kd-xnack-on.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (34) (#209598)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 2af345af8dbffa975589b5f774ab006f372b4c00
https://github.com/llvm/llvm-project/commit/2af345af8dbffa975589b5f774ab006f372b4c00
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
Log Message:
-----------
[lldb-server] Add type info for qMemoryinfo reponse (#209235)
Use the name of the memory region to report the known cases where an
address points to stack/heap: "[stack]" or "[heap"].
According to [1], the "[stack]" name is the main thread's stack region:
```
[stack]
The initial process's (also known as the main
thread's) stack.
```
For other threads, we can't know their stack region because this field
got removed in newer kernels:
```
[stack:tid] (from Linux 3.4 to Linux 4.4)
A thread's stack (where the tid is a thread ID). It
corresponds to the /proc/pid/task/tid/ path. This
field was removed in Linux 4.5, since providing this
information for a process with large numbers of
threads is expensive.
```
So we can only set "isStack" to Yes in some cases, and to "No" when the
name is "[heap]". If there is no name, or the name is something else, we
keep the "don't know" answer.
[1]: https://man7.org/linux/man-pages/man5/proc_pid_maps.5.html
Commit: 06bf4bfff830207da473c06f2d90f93d777b51bb
https://github.com/llvm/llvm-project/commit/06bf4bfff830207da473c06f2d90f93d777b51bb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - enable shuffle combining of concat(extractsub(shuffle),extractsub(shuffle)) patterns (#209510)
Reuse the peekThroughBitcastsAndExtracts helper that we already use for insertsub(shuffle,extractsub(shuffle)) patterns
Commit: 13bdd50540a5365f5f25b0fff7410d5d69157a51
https://github.com/llvm/llvm-project/commit/13bdd50540a5365f5f25b0fff7410d5d69157a51
Author: Harry Ramsey <harry.ramsey at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/scalable_masked_interleaved_stores.ll
Log Message:
-----------
[AArch64][ISel] Enable masked interleaved stores for splat values (#207950)
Enable masked interleaved store combine to recognise splat values and
split them into SVE component vectors. This allows the existing stN
lowering path to handle masked stores where the stored value is a splat
rather than an explicit vector.interleave result.
Commit: 67dabeefa6271d638f548a68b20ffdc8d457e312
https://github.com/llvm/llvm-project/commit/67dabeefa6271d638f548a68b20ffdc8d457e312
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
[clang][bytecode] Fix "declared here" location of ... (#209696)
... "read outside its lifetime" diagnostics.
We should be pointing to the first decl.
Commit: 0d33149259ab717d48d8e34b6cb6eae87c28e631
https://github.com/llvm/llvm-project/commit/0d33149259ab717d48d8e34b6cb6eae87c28e631
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sroa-phi-nodes.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-invalid-any-off-on.ll
M llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
M llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll
M llvm/test/CodeGen/AMDGPU/track-spilled-vgpr-liveness.mir
M llvm/test/CodeGen/AMDGPU/trans-coexecution-hazard.mir
M llvm/test/CodeGen/AMDGPU/trans-forwarding-hazards.mir
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.ll
M llvm/test/CodeGen/AMDGPU/triton_regression_no_waterfall.mir
M llvm/test/CodeGen/AMDGPU/triv-disjoint-mem-access-neg-offset.mir
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
M llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll
M llvm/test/CodeGen/AMDGPU/true16-ra-pre-gfx11-regression-test.mir
M llvm/test/CodeGen/AMDGPU/true16-saveexec.mir
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/trunc-store.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/truncate-lshr-cast-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/tti-unroll-prefs.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-bundle.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-wmma.mir
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
M llvm/test/CodeGen/AMDGPU/unaligned-buffer.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/unallocatable-bundle-regression.mir
M llvm/test/CodeGen/AMDGPU/undef-build-vector.ll
M llvm/test/CodeGen/AMDGPU/undef-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
M llvm/test/CodeGen/AMDGPU/undef-subreg-use-after-coalesce.mir
M llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir
M llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/uniform-alignbit.ll
M llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/uniform-intrin-combine-wqm-demote.ll
M llvm/test/CodeGen/AMDGPU/uniform-load-from-tid.ll
M llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
M llvm/test/CodeGen/AMDGPU/uniform-select.ll
M llvm/test/CodeGen/AMDGPU/uniform-vgpr-to-sgpr-return.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
M llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll
M llvm/test/CodeGen/AMDGPU/unnamed-function-resource-info.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/unroll.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-store.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calling-conv-call.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calling-conv-func.ll
M llvm/test/CodeGen/AMDGPU/unsupported-code-object-version.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-sample.ll
M llvm/test/CodeGen/AMDGPU/update-lds-alignment.ll
M llvm/test/CodeGen/AMDGPU/update-phi.ll
M llvm/test/CodeGen/AMDGPU/urem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (35) (#209599)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: ba9f8e448ecd6f99664ed6b15c8d193650197845
https://github.com/llvm/llvm-project/commit/ba9f8e448ecd6f99664ed6b15c8d193650197845
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/test/Analysis/operator-calls.cpp
Log Message:
-----------
[clang][analyzer] Improved message in uninitialized.Assign at default assignment (#208173)
Commit: 1a0ddbdff9eef0257445778f36dd19b74f018487
https://github.com/llvm/llvm-project/commit/1a0ddbdff9eef0257445778f36dd19b74f018487
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
M llvm/lib/CodeGen/GlobalISel/Combiner.cpp
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[GlobalISel] Filter combiner worklists (#197693)
This follows on from #196017 which added an opcode predicate for GICombiner
matchers and used it to return from tryCombineAll before executing the match
table.
The better approach is to not add opcodes with no combines to the worklist in
the first place. This is a further -0.35% CTMark geomean improvement on
aarch64-O0-g, sqlite is -0.67%.
https://llvm-compile-time-tracker.com/compare.php?from=35f5d7ea802eae78b26a5fb2a46f072acd15f49d&to=c356bec46b68b59f37b26347f93676c9102d810c&stat=instructions%3Au
I also measured O3 locally and it's positive:
```
stage1-aarch64-O3 -fglobal-isel
instructions:u diff
old new
7zip 203863583445 203865335443 0.00%
Bullet 103920943623 103917036315 -0.00%
ClamAV 53008970261 52971646424 -0.07%
SPASS 41843361245 41815471487 -0.07%
consumer-typeset 31848080935 31816255572 -0.10%
kimwitu++ 39779892082 39733563964 -0.12%
lencod 67158153709 67134337444 -0.04%
mafft 36689364945 36675438948 -0.04%
sqlite3 33436727535 33410098701 -0.08%
tramp3d-v4 76553056559 76569825676 0.02%
geomean 57208304686 57180409869 -0.05%
```
I am a bit worried about the incurred overhead of this for other opt levels as
we add more combines, but right now at least the data is positive.
Assisted-by: codex
Commit: 3e4160fdc3d5bb0ed86480604bdfcd3130e7dd37
https://github.com/llvm/llvm-project/commit/3e4160fdc3d5bb0ed86480604bdfcd3130e7dd37
Author: Krisitan Erik Olsen <kristian.erik at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86LowerTileCopy.cpp
A llvm/test/CodeGen/X86/AMX/pr209512.ll
Log Message:
-----------
[X86] Skip debug instructions in tile copy lowering (#209640)
X86LowerTileCopy iterates over instructions in reverse to track live
registers, calling LiveRegUnits::stepBackward on every instruction
unconditionally. Since commit 16b2ef32 added an assertion that
stepBackward must not receive debug instructions, functions containing
debug info hit the assertion during tile copy lowering.
This patch skips debug instructions early in the loop, matching the
guard pattern used in RegisterScavenging.cpp and X86FixupBWInsts.cpp.
Fixes #209512
Commit: 0e877fd1a637ec2964883d324600211a6907b7bd
https://github.com/llvm/llvm-project/commit/0e877fd1a637ec2964883d324600211a6907b7bd
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-f16.cl
M llvm/lib/Target/README.txt
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/tan.ll
M llvm/test/Transforms/InstCombine/fdiv-cos-sin.ll
M llvm/test/Transforms/InstCombine/fdiv-sin-cos.ll
M llvm/test/Transforms/InstCombine/may-alias-errno.ll
A llvm/test/Transforms/InstCombine/sincos-fpmath.ll
A llvm/test/Transforms/InstCombine/sincos.ll
Log Message:
-----------
Reland "[InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos" (#194616)
This reland #184760
Fixed https://lab.llvm.org/buildbot/#/builders/123/builds/39337
The root cause is new created llvm.sincos is inserted into the right
after of the sin/cos's argument, however we didn't check if it's PHI, it
may cause it inserted into the middle of PHIs, and then fail the
verification.
Teach InstCombine to recognize pairs of `llvm.sin(x)` and `llvm.cos(x)`
intrinsic calls that share the same argument and replace them with a
single `llvm.sincos(x)` call, extracting the individual results.
The optimization works in two phases:
1. **SimplifyLibCalls**: Convert `sin`/`cos` C library calls (e.g.
`sinf`, `cosf`, `sin`, `cos`, `sinl`, `cosl`) into `llvm.sin` /
`llvm.cos` intrinsics when the call does not access memory (i.e. does
not set `errno`). This normalization step brings library calls into
the same form as compiler-generated intrinsics.
2. **InstCombineCalls**: When visiting an `llvm.sin` or `llvm.cos`
intrinsic, scan the users of the shared argument for a matching
counterpart. If found, emit a single `llvm.sincos` call placed right
after the argument definition, replace both original calls, and erase
the matched instruction.
Also remove the completed sincos TODO from Target/README.txt.
Commit: 4aa1590ad66a1bff9b3c74b4a2c7366473015b4c
https://github.com/llvm/llvm-project/commit/4aa1590ad66a1bff9b3c74b4a2c7366473015b4c
Author: Ella Ma <alansnape3058 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
A clang/test/Analysis/issue-173210-self-assign-init.c
Log Message:
-----------
[analyzer] Ignoring `T v=v;` idiom for uninitialized variable checker and dead store checker (#187530)
Closing #173210
The self-assignment initialization `Type var = var;` is an idiom in C
code. The analyzer is expected to suppress the uninitialized assignment
reports and dead store reports for this idiom. Variables that are really
uninitialized will be reported until they are actually used. Since GCC
will not generate assembly code for such usage, even if under -O0
optimization (but Clang will), this patch resolves this problem by
ignoring such self-assigned `DeclStmt`s in the `ExprEngine`, as well as
in the `DeadStoreObs` of the dead store checker.
This ignorance will be applied to C variables and non-reference C++
variables. For record types in C++, since the constructors will always
be invoked, they will not be affected by this change.
Commit: 94ef4fce34ca8bbf79729814959c0d70b4a9ba3b
https://github.com/llvm/llvm-project/commit/94ef4fce34ca8bbf79729814959c0d70b4a9ba3b
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libc/test/UnitTest/CMakeLists.txt
A libc/test/UnitTest/ConstraintHandlerCheckingTest.h
Log Message:
-----------
[libc] Annex K: Add constraint handler unit test class (#197707)
This unit test class will be useful for the tests related to Annex K.
The functions in Annex K may call a constraint handler, so this new unit
test class will facilitate the checks that the constraint handling
mechanism is working as expected.
Commit: 4b455a91141d59ace3a29870c885f5f5e4ff0506
https://github.com/llvm/llvm-project/commit/4b455a91141d59ace3a29870c885f5f5e4ff0506
Author: Dan Liew <dan at su-root.co.uk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaBoundsSafety.cpp
M clang/test/Sema/attr-sized-by-late-parsed-struct-ptrs.c
M clang/test/Sema/attr-sized-by-or-null-late-parsed-struct-ptrs.c
M clang/test/Sema/attr-sized-by-or-null-struct-ptrs.c
M clang/test/Sema/attr-sized-by-struct-ptrs.c
Log Message:
-----------
[BoundsSafety][Sema] Allow `sized_by`/`sized_by_or_null` on pointers to structs with a flexible array member (#209603)
`Sema::CheckCountedByAttrOnField()` in `SemaBoundsSafety.cpp` rejects
the `counted_by` family of attributes when the pointee is a struct that
contains a flexible array member (FAM). For example:
```
struct has_unannotated_fam {
int count;
int buffer[];
};
struct on_member_pointer_struct_with_fam {
int size;
struct has_unannotated_fam *objects __counted_by(size);
};
```
This restriction makes sense for `counted_by`/`counted_by_or_null`
because the size of a struct with a FAM is not statically known, so the
count of elements cannot be used to compute the size of the buffer.
However, the same check was incorrectly applied to `sized_by` and
`sized_by_or_null`. Unlike `counted_by`, these attributes describe the
size of the buffer in *bytes* rather than in *elements*, so the pointee
size is irrelevant and there is no ambiguity. Previously the following
would be rejected:
```
struct on_member_pointer_struct_with_fam {
int size;
struct has_unannotated_fam *objects __sized_by(size);
};
```
with the diagnostic:
```
error: 'sized_by' cannot be applied to a pointer with pointee of unknown
size because 'struct has_unannotated_fam' is a struct type with a
flexible array member
```
This patch guards the FAM check with `!CountInBytes` so that it only
applies to `counted_by`/`counted_by_or_null`. `sized_by` and
`sized_by_or_null` on such pointers are now correctly accepted.
The obsolete `expected-error` directives in the affected `sized_by` and
`sized_by_or_null` Sema tests are removed, turning those cases into
positive tests.
Assisted-by: Claude Code
rdar://182226884
Commit: 3485d8591992a967553493c53f17d9f3e8a0fc8e
https://github.com/llvm/llvm-project/commit/3485d8591992a967553493c53f17d9f3e8a0fc8e
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/test/SemaCXX/constexpr-late-instantiation.cpp
Log Message:
-----------
[Clang] Ensure correct template parameter depth for abbreviated templates (#209693)
This fixes another case of member functions where we overlooked template
depths when only abbreviated template parameters are involved.
This mirrors previous fix cfb25203c25f, but I don't intend to put it in
ParseTrailingRequiresClause because we might want the similar fix for
e.g. noexcept expressions, so let's keep it inline for future refactor.
The example comes from #205557.
Commit: a208080eff277fc4829f3519e1f918aa4eb6adeb
https://github.com/llvm/llvm-project/commit/a208080eff277fc4829f3519e1f918aa4eb6adeb
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
Log Message:
-----------
[NFC][AMDGPU] Use SIInstrFlags predicates in MC layer (#206766)
Replace raw TSFlags accesses with SIInstrFlags predicate calls in
AMDGPUInstPrinter and AMDGPUMCCodeEmitter.
Part of a series following the introduction of SIInstrFlags predicates.
Commit: f48b09bbe0654fcd7ddf6b8a8aec807d8552a816
https://github.com/llvm/llvm-project/commit/f48b09bbe0654fcd7ddf6b8a8aec807d8552a816
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/dxc_debug.hlsl
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
A llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Strip.ll
M llvm/test/CodeGen/DirectX/embed-ildb.ll
Log Message:
-----------
[Driver][DirectX] Add `/Qsource_in_debug_module` flag (#204415)
Adds a flag that embeds the source code info into `dx.source` nodes in
bitcode, for both main DXContainer and PDB file output. For the PDB
file, it also removes the `SRCI` part from the output.
Commit: 17406f7e49d45808cb828d6bc225b6f6656938b1
https://github.com/llvm/llvm-project/commit/17406f7e49d45808cb828d6bc225b6f6656938b1
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libsycl/docs/index.rst
R libsycl/include/sycl/__impl/detail/default_async_handler.hpp
M libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/exception.hpp
A libsycl/include/sycl/__impl/info/event.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/event_impl.cpp
M libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
A libsycl/src/detail/spinlock.hpp
M libsycl/src/event.cpp
M libsycl/src/exception_list.cpp
M libsycl/src/queue.cpp
M libsycl/unittests/CMakeLists.txt
M libsycl/unittests/common/device_images.hpp
A libsycl/unittests/common/scoped_binary_registration.hpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/device_selector/get_device_preference.cpp
A libsycl/unittests/event/CMakeLists.txt
A libsycl/unittests/event/async_handler.cpp
A libsycl/unittests/event/event.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/program_manager/register_and_unregister.cpp
M libsycl/unittests/queue/sycl_kernel_launch.cpp
Log Message:
-----------
[libsycl] implement methods of synchronization in event and queue classes (#205860)
Extends libsycl’s sycl::event API by adding default-constructed event
semantics, wait-list exposure and async exceptions handling. Async
exceptions handling is generic for event and queue APIs and though added
to sycl::queue API as well.
Introduces async-exception aggregation/flush infrastructure (global
associative container).
Adds/adjusts unit tests and unifies test binary registration utilities
(Scoped*Registration, namespace cleanup).
This PR was assisted by GH Copilot.
Signed-off-by: Tikhomirova, Kseniya
[kseniya.tikhomirova at intel.com](mailto:kseniya.tikhomirova at intel.com)
Commit: ffcc00a1418e623176f348830ab16ad0ececba72
https://github.com/llvm/llvm-project/commit/ffcc00a1418e623176f348830ab16ad0ececba72
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/test/API/python_api/sbplatform/TestSBPlatform.py
Log Message:
-----------
[lldb][POSIX] Correctly report error copying from remote platform (#207365)
This fixes a bug I found where copying a file from a remote Linux
platform using the API would claim that it succeeded, but it had not.
The local file was read only so it was not updated. The host Linux
platform's copy did not have this bug.
There are two tests, one which will run if the testing platform is not
already a remote. This one spawns a "remote" platform, which is actually
still on the host, but it's enough to take the remote code path in the
POSIX platform implementation.
The second uses the testing platform. If that's a remote, use that, if
it's host then we use the host platform to check local copying
behaviour.
This test is not as specific as I'd like it to be, but I wanted
something that could run on many platforms. Even if the copy fails for a
reason other than permissions, at least we are checking that the failure
is propagated.
Commit: df1838f5d961f9587ca4f90d992bef81cc6155db
https://github.com/llvm/llvm-project/commit/df1838f5d961f9587ca4f90d992bef81cc6155db
Author: Karthika Devi C <kartc at qti.qualcomm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M polly/include/polly/CodeGen/LoopGenerators.h
M polly/lib/CodeGen/IslAst.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
M polly/test/CodeGen/Metadata/basic_vec_annotate.ll
A polly/test/CodeGen/Metadata/skip_vec_annotate_fp_dist1.ll
Log Message:
-----------
[Polly] Skip vectorize.enable for FP loops with dist=1 dependences (#205756)
When -polly-annotate-metadata-vectorize is active, Polly marks its
generated loops with llvm.loop.vectorize.enable=true. This is harmful
for loops with a loop-carried dependence of distance 1 that involve
floating-point operations: the Loop Vectorizer reorders FP operations
(e.g. scalar reduction like q = factor*q), producing results that differ
from the sequential scalar reference and causing correctness failures.
Two changes are made:
1. IslAst.cpp: add PollyVectorizeMetadata to the PerformParallelTest
gate so that dependence-distance computation is performed whenever
-polly-annotate-metadata-vectorize is passed, not only when
-polly-parallel or a vectorizer is active.
2. IslNodeBuilder.cpp / LoopGenerators.cpp: when a loop has a dist=1
dependence involving FP operations, omit the vectorize.enable annotation
entirely. This lets the Loop Vectorizer apply its own cost model and
legality checks decide.
Commit: f114107e67b967de450c0e5c0acf84e70d3d1208
https://github.com/llvm/llvm-project/commit/f114107e67b967de450c0e5c0acf84e70d3d1208
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/include/lldb/Utility/Log.h
M lldb/source/Commands/CommandObjectLog.cpp
M lldb/source/Utility/Log.cpp
M lldb/unittests/Utility/LogTest.cpp
Log Message:
-----------
[lldb] Return llvm::Expected from ListChannelCategories (#209468)
Expected<string> is equivalent to bool+stream, but harder to misuse.
Commit: edbf9e3096c027b61d72df6397c2963be56b2b7b
https://github.com/llvm/llvm-project/commit/edbf9e3096c027b61d72df6397c2963be56b2b7b
Author: Dan Liew <dan at su-root.co.uk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaBoundsSafety.cpp
Log Message:
-----------
[NFC][BoundsSafety] Re-order some checks in `Sema::CheckCountedByAttrOnField` (#209713)
This is post-merge feedback for #209603
(4b455a91141d59ace3a29870c885f5f5e4ff0506).
Commit: d9b56d3e5e012a618f55318662e3e5c9ba2c4abf
https://github.com/llvm/llvm-project/commit/d9b56d3e5e012a618f55318662e3e5c9ba2c4abf
Author: Arendelle <Arendelle_ at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
Log Message:
-----------
[clang][constexpr] Move anonymous-union check before getDestructor() in HandleDestructionImpl (#197416)
When HandleDestructionImpl destroys a class object during constant
evaluation, it attempts to look up the class's destructor via
getDestructor() before checking whether the record is an anonymous
union. Anonymous unions should not have their destructors invoked
directly during constant evaluation — their lifetime is managed by the
enclosing class's destructor. Move the anonymous-union short-circuit
before the getDestructor() call so anonymous unions are handled early,
regardless of whether getDestructor() returns null or not.
This fixes cases where an object with an implicitly-defined constexpr
destructor stored inside an anonymous union member was incorrectly
rejected during constant evaluation.
Commit: 083acc3c31fd4696bbc6d4b1c647c63ac976a7ec
https://github.com/llvm/llvm-project/commit/083acc3c31fd4696bbc6d4b1c647c63ac976a7ec
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx2a.cpp
Log Message:
-----------
[clang][bytecode] Fix uninitialized diagnostics (#209702)
... if the pointer is also outside its lifetime. In that case, prefer to
diagnose it as outside its lifetime.
Commit: d0a85f53b9e6c3b7146736a6b19524d1e5f738ee
https://github.com/llvm/llvm-project/commit/d0a85f53b9e6c3b7146736a6b19524d1e5f738ee
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/use-after-free-after-cleanup-failed-vreg.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/usubsat.ll
M llvm/test/CodeGen/AMDGPU/v-cmp-cse-across-loop.mir
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16-fpdp-rounding-mode.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expand_and_shrink.mir
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expansion.mir
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard-true16.mir
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
M llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard-attrs.mir
M llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard.mir
M llvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx-set-kill.mir
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx-wrong-kill-flags.mir
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.ll
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-exec-war-hazard.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard-sdwa.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane-vgpr-msb-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane16var-hazard.mir
M llvm/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-atomic.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
M llvm/test/CodeGen/AMDGPU/vector_range_metadata.ll
M llvm/test/CodeGen/AMDGPU/vector_rebroadcast.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll
M llvm/test/CodeGen/AMDGPU/vectorize-global-local.ll
M llvm/test/CodeGen/AMDGPU/vectorize-loads.ll
M llvm/test/CodeGen/AMDGPU/vectorize-unroll-metadata.ll
M llvm/test/CodeGen/AMDGPU/verifier-sdwa-cvt.mir
M llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir
M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
M llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx12-gds.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir
M llvm/test/CodeGen/AMDGPU/verify-vopd.mir
M llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/vgpr-blocks-funcinfo.mir
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
M llvm/test/CodeGen/AMDGPU/vgpr-excess-threshold-percent-invalid.ll
M llvm/test/CodeGen/AMDGPU/vgpr-excess-threshold-percent.ll
M llvm/test/CodeGen/AMDGPU/vgpr-limit-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250-t16.mir
M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir
M llvm/test/CodeGen/AMDGPU/vgpr-remat-v_pk_mov_b32.mir
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
M llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
M llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-dead-frame-in-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (36) (#209600)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: c58ba1cf51d2886994da7e667a05c1bfe4f4396b
https://github.com/llvm/llvm-project/commit/c58ba1cf51d2886994da7e667a05c1bfe4f4396b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/vi-removed-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/visit-physreg-vgpr-imm-folding-bug.ll
M llvm/test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir
M llvm/test/CodeGen/AMDGPU/vmem-vcc-hazard.mir
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/vopc-remat.mir
M llvm/test/CodeGen/AMDGPU/vopc_dpp-true16.mir
M llvm/test/CodeGen/AMDGPU/vopc_dpp.ll
M llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
M llvm/test/CodeGen/AMDGPU/vopd-combine-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
M llvm/test/CodeGen/AMDGPU/vopd-gfx12-f64-relaxed.mir
M llvm/test/CodeGen/AMDGPU/vopd-src2acc-delay.mir
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-drain.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
M llvm/test/CodeGen/AMDGPU/wait.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-bvh.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-debug-output-crash.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-flat.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-func-global-inv.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-kmcnt-scc-different-block.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-store-barrier.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-irreducible.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-opt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-looptest.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-meta-instructions.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-multiple-funcs.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-permute.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-sample-out-order.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-sample-waw.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-skip-meta.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vmem-waw.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-wbl2.ll
M llvm/test/CodeGen/AMDGPU/waitcnt.mir
M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.ll
M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.mir
M llvm/test/CodeGen/AMDGPU/waterfall-call-target-av-register-failure.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/widen_extending_scalar_loads.ll
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx12-w32.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx12-w64.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1251-w32.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-nop-hoisting.mir
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
M llvm/test/CodeGen/AMDGPU/wqm-debug-instr-terminator.mir
M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
M llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
M llvm/test/CodeGen/AMDGPU/wqm-terminators.mir
M llvm/test/CodeGen/AMDGPU/wqm.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (37) (#209601)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 6b3b6a88905cfb7e098d3c4a790ae8a196cfeab2
https://github.com/llvm/llvm-project/commit/6b3b6a88905cfb7e098d3c4a790ae8a196cfeab2
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/StackID.h
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackID.cpp
M lldb/source/Target/ThreadPlanStepInstruction.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/source/Target/ThreadPlanStepUntil.cpp
Log Message:
-----------
[lldb][NFC] Create StackID::IsYounger (#209402)
Currently, StackIDs are compared with a custom operator <. There are
some issues with that:
1. It's not clear what "<" means in this context. It really is a test of
"frame A is on top of frame B or not comparable". But this notion is not
expressed through "<".
2. This is not a real operator "<" in the sense that if "!<" does not
imply ">=". In particular, frames may not always be comparable (i.e.
(they are not part of the same stack).
To address these issues, this commit replaces `<` with a custom function
"IsYounger", which makes explicit what is being tested.
Commit: 0f24969ade9df74b11ff70a2c0b1f49ff49e92fd
https://github.com/llvm/llvm-project/commit/0f24969ade9df74b11ff70a2c0b1f49ff49e92fd
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaAMDGPU.cpp
A clang/test/SemaOpenCL/builtins-amdgcn-cmp-deprecated.cl
Log Message:
-----------
[Clang][AMDGPU] Deprecate icmp/fcmp builtins in favor of ballot (#209416)
Deprecate these builtins with a warning recommending
__builtin_amdgcn_ballot_w32 or __builtin_amdgcn_ballot_w64 instead:
__builtin_amdgcn_uicmp
__builtin_amdgcn_uicmpl
__builtin_amdgcn_sicmp
__builtin_amdgcn_sicmpl
__builtin_amdgcn_fcmp
__builtin_amdgcn_fcmpf
Assisted-by: Claude Opus 4.8
Commit: f96628d9cab6c840ef836f3046d5d566dc620596
https://github.com/llvm/llvm-project/commit/f96628d9cab6c840ef836f3046d5d566dc620596
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Driver/OffloadBundler.cpp
Log Message:
-----------
clang-offload-bundler: Reduce include of Cuda.h to OffloadArch.h (#209723)
This was only using OffloadArch, so use that header directly.
Commit: 11cc8d876e2bb696fef7079eed0a1ff574c0770f
https://github.com/llvm/llvm-project/commit/11cc8d876e2bb696fef7079eed0a1ff574c0770f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/transfer-signed-facts-to-unsigned.ll
Log Message:
-----------
[ConstraintElim] Transfer SLE facts to unsigned (#209623)
Handle SLE analogous to SLT via getUnsignedPredicate.
Alive2 Proof: https://alive2.llvm.org/ce/z/yNjmL8
PR: https://github.com/llvm/llvm-project/pull/209623
Commit: ca71592c415c2c1e6fe8289d4bcff934279d8315
https://github.com/llvm/llvm-project/commit/ca71592c415c2c1e6fe8289d4bcff934279d8315
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/ArraySectionAnalyzer.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
A flang/test/HLFIR/inline-hlfir-assign-pointer-overlap.fir
A flang/test/HLFIR/inline-hlfir-assign-scalar-index.fir
A flang/test/HLFIR/inline-hlfir-assign-self-copy-runtime-stride.fir
A flang/test/HLFIR/inline-hlfir-assign-self-copy.fir
A flang/test/Lower/inline-hlfir-assign-forall-threadprivate.f90
A flang/test/Lower/inline-hlfir-assign-pointer-omp.f90
Log Message:
-----------
Reland "[Flang]Add support for inlining hlfir.assign operation where both LHS and RHS are slices of the same array #204532" (#208159)
Added support for inlining hlfir.assign when both LHS and RHS are slices
of the same array. When overlap between the slices cannot be determined,
the pass introduces a disjointness check:
- genIndexBasedDisjointnessCheck(..) is used when both sides are
sections of the same array.
- genAddressBasedDisjointnessCheck(..) used as a fallback for more
complex cases.
At runtime:
- If the slices are disjoint, a direct element-wise copy is performed
without allocating a temporary buffer.
- If overlap is possible, a temporary buffer is allocated, the RHS is
first copied into it and then the data is copied from the temporary
buffer to the LHS.
Fixes https://github.com/llvm/llvm-project/issues/203228
Commit: 1d4148821bf96bef23ea77952031e3e7bec26d3a
https://github.com/llvm/llvm-project/commit/1d4148821bf96bef23ea77952031e3e7bec26d3a
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-unroll.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
Log Message:
-----------
[VPlan] Fix nowrap flags for strided access pointers from SCEV (#209453)
This patch addresses two things. First, the offset calculation
(canonical IV * stride) should not reuse the NSW flag of the add
recurrence. The NSW property from SCEV for the original scalar
recurrence does not necessarily hold for the reconstructed
multiplication using the vector canonical IV. The NUW flag, however, can
still be safely propagated.
Second, because vputils::getGEPFlagsForPtr currently doesn't support
recipes other than VPInstruction, and to avoid relying on LLVM IR
function (like calling stripPointerCasts()), we change
VPVectorPointerRecipe's GEP flags to use the add recurrence's flags to
prevent propagating unprovable GEP flags like inbounds.
Commit: 54e36d6ba68c3c5f91bd36c1c9bf8d8af6f8940b
https://github.com/llvm/llvm-project/commit/54e36d6ba68c3c5f91bd36c1c9bf8d8af6f8940b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/vk-ext-builtin-input.ll
Log Message:
-----------
[SPIR-V] Emit UniformId decoration as OpDecorateId with a Scope id operand (#207958)
Per spec, UniformId operand is a Scope `<id>`, not a literal
Previously it was printed via `printSymbolicOperand<ScopeOperand>`,
which asserts on a real id operand, and never emitted correctly
Commit: dadccf8e6ddb9d87f5b48431a0417dc7b39d9742
https://github.com/llvm/llvm-project/commit/dadccf8e6ddb9d87f5b48431a0417dc7b39d9742
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/LifetimeSafety/dangling-field.cpp
Log Message:
-----------
[LifetimeSafety] Suppress false field-escape warnings in destructors (#209614)
Commit: 96a53b1c5356754b4708c0fee8517fd0d69cb1fd
https://github.com/llvm/llvm-project/commit/96a53b1c5356754b4708c0fee8517fd0d69cb1fd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP] Support memory runtime alias checks
Vectorize straight-line code blocked by runtime-checkable may-alias
dependencies by versioning the block. Drop the deps, and if the tree is
profitable, emit base-object address-range overlap checks branching to a
vector fast path or an original-order scalar fallback.
Fixes #201534
Original Pull Request: https://github.com/llvm/llvm-project/pull/203631
Recommit after revert in a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931,
related to late commit before the release and small after-commit change
request
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209305
Commit: 0dccfdc051a5865f4f0ef0e988084e70d317727e
https://github.com/llvm/llvm-project/commit/0dccfdc051a5865f4f0ef0e988084e70d317727e
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
Log Message:
-----------
[clang][Driver] Remove duplicate KernelAddress sanitizer kind. NFC. (#209079)
Remove the duplicate `SanitizerKind::KernelAddress` entry from the list
of sanitizers incompatible with `TypeSanitizer`.
Found using clang-tidy, with check `misc-redundant-expression`
Commit: d3f58ce0cc1c3533a3085671978ded2e0e867e16
https://github.com/llvm/llvm-project/commit/d3f58ce0cc1c3533a3085671978ded2e0e867e16
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
Log Message:
-----------
[flang][openacc][NFC] remove useAccReductionCombine cl switch (#208756)
Follow-up of https://github.com/llvm/llvm-project/pull/208473 to remove
the switch altogether to simplify the compiler code.
Commit: 8c9a6fd876677a69b3a08ce8d868f21730dd6915
https://github.com/llvm/llvm-project/commit/8c9a6fd876677a69b3a08ce8d868f21730dd6915
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDowngrade1p1To1p0.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-downgrade-1-1-to-1-0.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add support for block scaled types in matmul_t (#207851)
Builds on https://github.com/llvm/llvm-project/pull/203894 to enable
MXFP block scaled fotmats within matmul_t.
Commit: 5b3b76e77386b6e91c7627edb3beab64077e379f
https://github.com/llvm/llvm-project/commit/5b3b76e77386b6e91c7627edb3beab64077e379f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes.rst
A libcxx/docs/ReleaseNotes/24.rst
Log Message:
-----------
[libc++] Create libc++ 24 release notes (#208814)
Now that the LLVM 23 branch has been created, this adds LLVM 24 release
notes. The release notes contain a few TODOs which will be easy to
address in separate PRs.
Commit: eb2163a5d116a2834844b035684a43c8ee765fc1
https://github.com/llvm/llvm-project/commit/eb2163a5d116a2834844b035684a43c8ee765fc1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/wqm.mir
M llvm/test/CodeGen/AMDGPU/write-register-invalid-register.ll
M llvm/test/CodeGen/AMDGPU/write-register-vgpr-into-sgpr.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
M llvm/test/CodeGen/AMDGPU/wwm-reg-shift-down-gfx11plus.mir
M llvm/test/CodeGen/AMDGPU/wwm-regalloc-error.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/wwm-spill-superclass-pseudo.mir
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
M llvm/test/CodeGen/AMDGPU/xnor.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
M llvm/test/CodeGen/AMDGPU/xor3.ll
M llvm/test/CodeGen/AMDGPU/xor_add.ll
M llvm/test/CodeGen/AMDGPU/zero_extend.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38) (#209602)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: c8c0877e60c847ec81a4e469ec25a30fcf1aa46e
https://github.com/llvm/llvm-project/commit/c8c0877e60c847ec81a4e469ec25a30fcf1aa46e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-prelegalizer-combiner-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-concat-vectors.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-cse-leaves-dead-cast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-add-sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-xchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-xor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/br-constant-invalid-sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-byte-short.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug_shuffle_vector_to_scalar.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-add-to-ptradd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-amdgpu-cvt-f32-ubyte.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-binop-s64-with-s32-mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ext-legalizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fdiv-sqrt-to-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-pre-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-foldable-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fpneg-one-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-s64-s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-trunc-sextinreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.prelegal.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-zext-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combiner-crash.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/compute-num-sign-bits-med3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (39) (#209729)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: f10eda428d5c4d21e57b5809805a5554922f851d
https://github.com/llvm/llvm-project/commit/f10eda428d5c4d21e57b5809805a5554922f851d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/Driver/clang-offload-bundler-multi-compress.c
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/test/OffloadTools/clang-offload-bundler/fat-archive-unbundle-ext.c
M clang/test/OffloadTools/clang-offload-bundler/standardize.c
M clang/test/OffloadTools/clang-offload-bundler/zlib.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
Log Message:
-----------
clang-offload-bundler: Fix host dependency of tests (#209720)
Use an explicit linux triple for the host target instead of using the
default/host target and marking most every other system as unsupported.
Fixes not running these tests on macos.
Co-authored-by: Claude (Opus 4.8)
Commit: e41f5aa4d656ed16b8f9890ee7f30fb1845d4a03
https://github.com/llvm/llvm-project/commit/e41f5aa4d656ed16b8f9890ee7f30fb1845d4a03
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[runtimes] Add explicit offload arch tool dependencies (#206076)
Needed for the offload unittests which detect the target arch at
configure time if not forced by OFFLOAD_TESTS_FORCE_AMDGPU_ARCH. Bug had
been masked by the dependency on flang, which we recently removed in
https://github.com/llvm/llvm-project/pull/198205.
Claude assisted with this patch.
Commit: 1980283edd2155bb058b58fbc97fb02d3e78c301
https://github.com/llvm/llvm-project/commit/1980283edd2155bb058b58fbc97fb02d3e78c301
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin3-fmax3-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value-addrspaces.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.illegal.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/i1-copy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/icmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.i16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.u16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.i16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.u16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ds.swizzle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.groupstaticsize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mbcnt.lo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mul.u24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mulhi.i24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mulhi.u24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (40) (#209730)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: f48200029bf6277d4fe3915b480a5c87c8f172c9
https://github.com/llvm/llvm-project/commit/f48200029bf6277d4fe3915b480a5c87c8f172c9
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1c.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-a16.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-a17.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-m5.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.7-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.8-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv8.9-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.2-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.3-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-c1-nano.c
M clang/test/Driver/print-enabled-extensions/aarch64-c1-premium.c
M clang/test/Driver/print-enabled-extensions/aarch64-c1-pro.c
M clang/test/Driver/print-enabled-extensions/aarch64-c1-ultra.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a320.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a720.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a720ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a725.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-x4.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-x925.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Driver/print-enabled-extensions/aarch64-gb10.c
M clang/test/Driver/print-enabled-extensions/aarch64-hip12.c
M clang/test/Driver/print-enabled-extensions/aarch64-neoverse-n3.c
M clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v3.c
M clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v3ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-olympus.c
M clang/test/Driver/print-enabled-extensions/aarch64-rigel.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/test/MC/AArch64/armv8.7a-hcx.s
M llvm/test/MC/Disassembler/AArch64/armv8.7a-hcx.txt
Log Message:
-----------
[AArch64] Remove HCX feature flag from backend (#209477)
This patch removes +hcx option from the llvm and removes guarding of
HCRX_EL2 system register on it.
Commit: cceae35fc91ad84baaa046e65961bd49de89a6e6
https://github.com/llvm/llvm-project/commit/cceae35fc91ad84baaa046e65961bd49de89a6e6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.reloc.constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sffbh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-wave-address.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy-scc-vcc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy-scc-vcc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.gfx11plus-fake16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.gfx11plus.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fconstant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-i1-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-old-legalization.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.s96.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (41) (#209731)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 52eb0512237be5b1a58a82cad84caaddab4e04aa
https://github.com/llvm/llvm-project/commit/52eb0512237be5b1a58a82cad84caaddab4e04aa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
A clang/test/Driver/openmp-invalid-target-id.c
Log Message:
-----------
clang: Add OpenMP driver test for invalid target IDs (#209740)
Submit test that already exists in the rocm fork. This stresses
the error cases when using the legacy OpenMP -march target specifier,
which appears to be missing upstream.
Commit: 9744b475e28e180599fd1a42d956f74b0a1aaed8
https://github.com/llvm/llvm-project/commit/9744b475e28e180599fd1a42d956f74b0a1aaed8
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN rsq and rsq_clamp builtins (#197349)
Adds codegen for the following AMDGCN reciprocal square root builtins:
- __builtin_amdgcn_rsq (double)
- __builtin_amdgcn_rsqf (float)
- __builtin_amdgcn_rsqh (half)
- __builtin_amdgcn_rsq_bf16 (bfloat16)
- __builtin_amdgcn_rsq_clamp (double)
- __builtin_amdgcn_rsq_clampf (float)
These are lowered to the corresponding `llvm.amdgcn.rsq` and
`llvm.amdgcn.rsq.clamp` intrinsic calls.
Commit: 567c6a7589fe9f29882d60ac2ddedc2f33bd80c1
https://github.com/llvm/llvm-project/commit/567c6a7589fe9f29882d60ac2ddedc2f33bd80c1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-returnaddress.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sopc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-packed.xfail.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sextload-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.invalid.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.s96.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin-64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zextload-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslate-bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces-vectors.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/known-bits-sbfe.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/known-fpclass-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if-invalid.mir
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (42) (#209732)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 2746fc6981516c9e26dbdaa7ba254279d391b534
https://github.com/llvm/llvm-project/commit/2746fc6981516c9e26dbdaa7ba254279d391b534
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if.xfail.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.rsq.clamp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.workitem.id.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg-with-success.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-fadd-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-fadd-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-max.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-min.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-block-addr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-splat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctls.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp-s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fconstant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaximum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminimum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (43) (#209733)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 42605e7b341ccbc6b2486e2ced82386f099c476a
https://github.com/llvm/llvm-project/commit/42605e7b341ccbc6b2486e2ced82386f099c476a
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
Log Message:
-----------
[mlir][memref] Support truncating copied dims to non-unit in reinterpret_cast elision (#209536)
Relax the `memref.copy`through `memref.reinterpret_cast` rewrite to
support same-dimension slices where strictly one non-unit source
dimension size is truncated to a smaller non-unit result dimension.
Previously, the rewrite only supported truncating to unit size:
```mlir
memref<1xMxNxf32>
to memref<1xMx1xf32, strided<[M*N, N, 1], offset: OFF>>
```
This change relaxes constraints to also support:
```mlir
memref<1xMxNxf32>
to memref<1xMxKxf32, strided<[M*N, N, 1], offset: OFF>>
```
where `K < N`.
The rewrite remains conservative:
* source must have identity layout,
* result strides must match the source identity strides,
* offset must be static for non-scalar results, and
* copied slice must be in bounds.
Assisted-by: Codex (refine PR description).
Commit: 0350a23a8bbc091e646406a2aaeafa35dc0216d3
https://github.com/llvm/llvm-project/commit/0350a23a8bbc091e646406a2aaeafa35dc0216d3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/WrapperFunction.h
M orc-rt/test/unit/WrapperFunctionBufferTest.cpp
Log Message:
-----------
[orc-rt] Fix WrapperFunctionBuffer empty range construction (#209751)
orc_rt_CreateWrapperFunctionBufferFromRange(const char *, size_t) left
the constructed buffer's data member uninitialized when the size
argument was zero. This could result in the returned buffer having a
non-null data field and a zero size field, which is a (malformed)
out-of-band error value, not an empty buffer.
Update orc_rt_CreateWrapperFunctionBufferFromRange to zero-initialize
the data field so that the size == 0 case yields a correctly formed
empty buffer.
Commit: 653c1dab3774d0cf02bb9fc8c469bbd356aff885
https://github.com/llvm/llvm-project/commit/653c1dab3774d0cf02bb9fc8c469bbd356aff885
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - enable shuffle combining of insertsub(extractsub(shuffle),extractsub(shuffle)) patterns (#209735)
Allows combineX86ShuffleChainWithExtract to more consistently fold
patterns from wider sources
Commit: 4b66bacd1fdf02803509b744034f3ab09945157c
https://github.com/llvm/llvm-project/commit/4b66bacd1fdf02803509b744034f3ab09945157c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/PropertiesBase.td
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/AST/ByteCode/virtual-bases-codegen.cpp
A clang/test/AST/ByteCode/virtual-bases.cpp
M clang/test/CXX/drs/cwg16xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[clang][ExprConst] Support virtual bases in C++26 (#204289)
Add support for virtual bases in constant expressions (P3533R2) to both the current constant interpreter as well as the bytecode interpreter.
Commit: 706db1e0959f45d6392edd2ad196a4ea38bb99d3
https://github.com/llvm/llvm-project/commit/706db1e0959f45d6392edd2ad196a4ea38bb99d3
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP row_gather (#207933)
Adds profile compliance support for MXFP row_gather.
Commit: 4584a6489341b4fe7762991e65f98467ffe4c699
https://github.com/llvm/llvm-project/commit/4584a6489341b4fe7762991e65f98467ffe4c699
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.cpp
Log Message:
-----------
[lldb][AArch64][NFC] Make watchpoint adjustment more clear (#209483)
NativeRegisterContextDBReg_arm64::AdjustWatchpoint has a way of
adjusting the range of a watchpoint but it took me a while to figure out
how it worked. I've rewritten it in a way I think is easier to follow,
with more explanatory comments.
It turns out that this adjustment results in us only using a subset of
what the hardware allows.
* You don't have to select a continuous range of bytes (1, 2, 3). You
can select (1, 4) for example.
* The address can be 4 byte aligned, in which case only 4 bits of the
byte select apply (though you can set up an equivalent watch with 8 byte
alignment and a different 8 bit BAS value).
Commit: 2c978fa06d19095c0003508b8dac084689b12e78
https://github.com/llvm/llvm-project/commit/2c978fa06d19095c0003508b8dac084689b12e78
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/lib/Lower/Support/Utils.cpp
M flang/test/Integration/OpenMP/copyprivate.f90
M flang/test/Integration/OpenMP/private-global.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-distribute-private-adjustable-array.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/delayed-privatization-array.f90
M flang/test/Lower/OpenMP/lastprivate-equivalence.f90
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
A flang/test/Lower/OpenMP/private-array-boxing.f90
M flang/test/Lower/OpenMP/private-commonblock.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
Log Message:
-----------
[flang][OpenMP] Avoid boxing constant-size trivial private arrays (#208315)
Part of #208086. `privatizeSymbol` (used for both OpenMP privatization
and `do concurrent` locals) currently boxes every array as a workaround
for `fir.array` not being directly `alloca`-able in the OpenMP→LLVMIR
translation. This PR carves out the common case: a constant-shape array
of trivial intrinsic elements (e.g. `real(8) :: xx(3)`) is now
privatized unboxed, as a plain `fir.array`.
Commit: 2975dac23e684748ae1051e6c1112aa53d7aea2c
https://github.com/llvm/llvm-project/commit/2975dac23e684748ae1051e6c1112aa53d7aea2c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.cfg.py
Log Message:
-----------
[lldb] Drop support for using the external shell
The lit external shell is going to be removed soon, so drop support for
using it to run the LLDB tests.
Reviewers: DavidSpickett, JDevlieghere, petrhosek, ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/209627
Commit: a4d12bf0c2ab2acfd772a8fd6ad216e3a17e5c49
https://github.com/llvm/llvm-project/commit/a4d12bf0c2ab2acfd772a8fd6ad216e3a17e5c49
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/cmake/modules/FindPythonAndSwig.cmake
Log Message:
-----------
[lldb][Windows] Enforce Python 3.11 (#209759)
https://github.com/llvm/llvm-project/pull/191159 recommended Python 3.11
or later. Now that llvm 23 has branched, we can enforce Python 3.11 as
the minimum requirement.
Commit: 25682c3470410534c59708d7d3e2c9248802485f
https://github.com/llvm/llvm-project/commit/25682c3470410534c59708d7d3e2c9248802485f
Author: Access <ShootingStarDragons at protonmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
Log Message:
-----------
[clangd] highlight import and export keywords for C++20 modules (#204511)
Add syntax highlighting for C++20 module `import` and `export` keywords.
Note: Highlighting of the `export` keyword in a module export statement is not possible, because such statements don't appear in the AST
Commit: 9a4deccf90ae914aa6d99acfff44b24bc5dfcb5c
https://github.com/llvm/llvm-project/commit/9a4deccf90ae914aa6d99acfff44b24bc5dfcb5c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/CMakeLists.txt
A llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
A llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
Log Message:
-----------
[WebAssembly] Introduce CodeGenPassBuilder
This is the equivalent of TargetPassConfig for the NewPM. This currently
mirrors the existing TargetPassConfig as close as possible, but with
TODOs for passes that have not been ported to the NewPM.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/208983
Commit: f4452848f0a5e827f5732ab390099d7d90084ca0
https://github.com/llvm/llvm-project/commit/f4452848f0a5e827f5732ab390099d7d90084ca0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/test/CodeGen/WebAssembly/add-prototypes.ll
Log Message:
-----------
[WebAssembly] Port WebAssemblyAddMissingPrototypesPass to NewPM
Standard pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/208985
Commit: f69748cd80db74bcd81834b4bba8749fc508f99f
https://github.com/llvm/llvm-project/commit/f69748cd80db74bcd81834b4bba8749fc508f99f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyFixFunctionBitcastsPass to NewPM
Standard pass porting.
Reviewers: aheejin, dschuff, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/208986
Commit: 80314ec06f15e7a0bb4b55380e50b2e529c5b0f7
https://github.com/llvm/llvm-project/commit/80314ec06f15e7a0bb4b55380e50b2e529c5b0f7
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/fenv/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/mman/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 36c6568 (#209689)
This fixes 36c6568b04aff4e1cf00a60570ab4a4344692920.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=36c6568b04aff4e1cf00a60570ab4a4344692920
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 491539a8b801aad5706cc32fc54a319791d57a91
https://github.com/llvm/llvm-project/commit/491539a8b801aad5706cc32fc54a319791d57a91
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyOptimizeReturnedPass
Standard pass porting for the NewPM.
Reviewers: sbc100, dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209036
Commit: 0d93f2aec0b4847761bd8458b7847ce37b85cf03
https://github.com/llvm/llvm-project/commit/0d93f2aec0b4847761bd8458b7847ce37b85cf03
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/enable_if.cpp
Log Message:
-----------
Fix references to complete types in attribute references (#209537)
This is a regression from #197215.
Attributes are not REALLY in the body of a function (though the name of
said function is... awkwardly inaccurate at best), but still need to pay
attention to the completeness of their references. As a result, we
weren't marking the expression as invalid, but were also trying to
evaluate it.
This patch fixes this in 2 ways. First, we re-add the
CXXThisTypeOverride check, but except constant substitution, since that
has some additional 'this' behavior from #197215. x
Secondly, we also make the constant evaluator give up on incomplete
types when handling an L value member. This stops us from trying to
evaluate the value if it is incomplete during template instantiation,
when the type is incomplete. We don't diagnose, since it is still
potentially a constant expression, but isn't currently one.
Fixes: #199527
Commit: 5fcfb4d168eae3e78da8d0f7649bf08a338eff42
https://github.com/llvm/llvm-project/commit/5fcfb4d168eae3e78da8d0f7649bf08a338eff42
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/test/CodeGen/WebAssembly/lower-em-exceptions-allowed.ll
Log Message:
-----------
[WebAssembly] Port WebAssemblyLowerEmscriptenEHSjLjImpl
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209040
Commit: c2da010159cc318b5fdba4a1fc7deef9438e749d
https://github.com/llvm/llvm-project/commit/c2da010159cc318b5fdba4a1fc7deef9438e749d
Author: David Young <davidayoung at meta.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/mman/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/resource/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add missing hdr/*_macros deps to test targets (#209761)
Commit b790c5cd2679 (#209449) switched several libc tests to include the
hdr/*_macros.h proxy headers and updated the CMake build accordingly,
but did not update the Bazel overlay. As a result, the Bazel libc test
targets include hdr/*_macros.h (and, via shared headers,
hdr/sys_mman_macros.h) without declaring the corresponding
//libc:hdr_*_macros dependencies, breaking the Bazel build with 'file
not found' / module layering errors.
Mirror the CMake dependency additions into the Bazel overlay so each
test target that includes an hdr macro header depends on the matching
//libc:hdr_*_macros (and //libc:types_struct_rlimit) target.
First found trying to land (#209747).
bazel changes assisted with: claude
cannot build with bazel locally so relying on CI to confirm green
Commit: 044f8a1f151f935d2e718faa5b1d7cb8e8f52bec
https://github.com/llvm/llvm-project/commit/044f8a1f151f935d2e718faa5b1d7cb8e8f52bec
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyReduceToAnyAllTruePass
Standard NewPM pass porting. Made a little bit annoying by the module
caching that I'm not sure helps much, but I've left it in.
Reviewers: aheejin, dschuff, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/209043
Commit: 868e3b898dcf243f97885ce0d857a2827f4d1fa3
https://github.com/llvm/llvm-project/commit/868e3b898dcf243f97885ce0d857a2827f4d1fa3
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
Log Message:
-----------
[AMDGPU] Fix set_inactive known bits to intersect both operands (#201817)
SimplifyDemandedBitsForTargetNode grouped amdgcn_set_inactive with the
single-source readfirstlane/readlane/wwm, taking known bits from operand
1 only
Handle the data from the operand 2 inactive lanes as well
Commit: 8396c758875a11a57a4b6a2b6b06b719c1b2ab1b
https://github.com/llvm/llvm-project/commit/8396c758875a11a57a4b6a2b6b06b719c1b2ab1b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyRefTypeMem2Local.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyRefTypeMem2LocalPass
Standard NewPM pass porting.
Reviewers: sbc100, aheejin, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/209044
Commit: 7e80bca9c9130a49ded8ac500d19942928c3564b
https://github.com/llvm/llvm-project/commit/7e80bca9c9130a49ded8ac500d19942928c3564b
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libsycl/test/basic/parallel_for_indexers.cpp
Log Message:
-----------
[libsycl] Add missing include to test (#209722)
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 8a41c1f77732d18eae12409b572fc926df29062b
https://github.com/llvm/llvm-project/commit/8a41c1f77732d18eae12409b572fc926df29062b
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP reshape (#207944)
Adds profile compliance support for MXFP reshape.
Commit: 2375505c7c19cf521b9ed5acaf7f359ddd9f216b
https://github.com/llvm/llvm-project/commit/2375505c7c19cf521b9ed5acaf7f359ddd9f216b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/CMakeLists.txt
M llvm/lib/Target/WebAssembly/WebAssembly.h
A llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[NFC][WebAssembly] Move WebAssemblyCoalesceFeaturesAndStripAtomics
Move WebAssemblyCoalesceFeaturesAndStripAtomics to a separate file.
Having a pass implemented directly in the TargetMachine file is a bit
weird.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209046
Commit: a2b6a1bae7904be696d8283b9bb34331c39a54ef
https://github.com/llvm/llvm-project/commit/a2b6a1bae7904be696d8283b9bb34331c39a54ef
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyCoalesceFeaturesAndStripAtomicsPass
Standard NewPM pass porting.
Reviewers: sbc100, aheejin, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/209054
Commit: 9d28ea2432d4ac2d4f79d5c2a87117a678b74720
https://github.com/llvm/llvm-project/commit/9d28ea2432d4ac2d4f79d5c2a87117a678b74720
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyNullifyDebugValueLists.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyNullifyDebugValueListsPass
Standard NewPM pass porting.
Reviewers: sbc100, aheejin, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/209055
Commit: 66766179575d3193139df7f0c9fc36c414cc84c6
https://github.com/llvm/llvm-project/commit/66766179575d3193139df7f0c9fc36c414cc84c6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyFixIrreducibleControlFlowPass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/209077
Commit: 8bc9dae5c79d418ee96d920eef9a858f58e71530
https://github.com/llvm/llvm-project/commit/8bc9dae5c79d418ee96d920eef9a858f58e71530
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyArgumentMovePass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/209368
Commit: 543e714713566ca08c2701973f2c1eafb9757b1a
https://github.com/llvm/llvm-project/commit/543e714713566ca08c2701973f2c1eafb9757b1a
Author: David Young <davidayoung at meta.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[lldb][bazel] Add the lldb-mcp binary to the Bazel overlay (#209498)
#143628 added the lldb-mcp tool (an MCP server multiplexer for LLDB),
built by lldb/tools/lldb-mcp/CMakeLists.txt. The Bazel overlay already
models the ProtocolMCP library and the MCP protocol-server plugin, but
not the lldb-mcp executable itself, so it is missing from the Bazel
build.
Add an lldb-mcp cc_binary modeled on the existing lldb-dap target: glob
tools/lldb-mcp/**, expand the macOS Info.plist via expand_template, and
depend on liblldb.wrapper, Host, Utility, ProtocolMCP, and the LLVM
Option/Support libraries. lldb-mcp has no Options.td, so unlike lldb-dap
no gentbl_cc_library is needed.
This properly translates into BUCk internally at Meta and then builds
with buck2, but I cannot validate the bazel build of this new target
directly.
bazel rule generation assisted with: claude
Commit: 426a44a7780c72e523e29218ec89155f97bf5c78
https://github.com/llvm/llvm-project/commit/426a44a7780c72e523e29218ec89155f97bf5c78
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
R clang/test/AST/HLSL/Texture2D-AST.hlsl
R clang/test/AST/HLSL/Texture2D-scalar-AST.hlsl
R clang/test/AST/HLSL/Texture2D-shorthand-AST.hlsl
R clang/test/AST/HLSL/Texture2D-vector-AST.hlsl
R clang/test/AST/HLSL/Texture2DArray-scalar-AST.hlsl
R clang/test/AST/HLSL/Texture2DArray-shorthand-AST.hlsl
R clang/test/AST/HLSL/Texture2DArray-vector-AST.hlsl
A clang/test/AST/HLSL/Textures-AST.hlsl
A clang/test/AST/HLSL/Textures-scalar-AST.hlsl
A clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
A clang/test/AST/HLSL/Textures-vector-AST.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-CalculateLevelOfDetail.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Gather.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-GetDimensions.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Load.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Mips.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Sample.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleBias.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleCmp.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleCmpLevelZero.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleGrad.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleLevel.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Subscript.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-default-explicit-binding.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-default.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-shorthand-contexts.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-CalculateLevelOfDetail.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Gather.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Load.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Mips.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Sample.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleBias.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleCmp.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleCmpLevelZero.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleGrad.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleLevel.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Subscript.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-default-explicit-binding.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-default.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-shorthand-contexts.hlsl
A clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Gather.hlsl
A clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
A clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
A clang/test/CodeGenHLSL/resources/Textures-default.hlsl
A clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-CalculateLevelOfDetail.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-GetDimensions.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-Load-errors.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleBias.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleCmp.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleCmpLevelZero.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleGrad.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleLevel.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-Sema.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-Subscript.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-CalculateLevelOfDetail.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-GetDimensions.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleBias.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleCmp.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleCmpLevelZero.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleGrad.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleLevel.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-Sema.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-Subscript.hlsl
A clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
A clang/test/SemaHLSL/Resources/Textures-GetDimensions.hlsl
A clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleCmp.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleCmpLevelZero.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
A clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
A clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
R clang/test/SemaHLSL/Texture2D-Gather.hlsl
R clang/test/SemaHLSL/Texture2D-GatherCmp-Vulkan.hlsl
R clang/test/SemaHLSL/Texture2D-mips-errors.hlsl
R clang/test/SemaHLSL/Texture2DArray-Gather.hlsl
R clang/test/SemaHLSL/Texture2DArray-GatherCmp-Vulkan.hlsl
R clang/test/SemaHLSL/Texture2DArray-mips-errors.hlsl
A clang/test/SemaHLSL/Textures-Gather.hlsl
A clang/test/SemaHLSL/Textures-GatherCmp-Vulkan.hlsl
A clang/test/SemaHLSL/Textures-mips-errors.hlsl
Log Message:
-----------
[HLSL] Consolidate texture tests (#209348)
Fixes #205878
This PR consolidates all the current texture tests into files that all
texture types can extend by adding new RUN lines.
This should greatly reduce the amount of effort required to implement
and review tests for new texture types.
Assisted by: Claude Opus 4.8
Commit: 43394198cf089eb054c25e141ddb293f502f9948
https://github.com/llvm/llvm-project/commit/43394198cf089eb054c25e141ddb293f502f9948
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add missing header deps (#209767)
For stat/ioctl/size headers
Not sure which commit exactly broke this, maybe #209449
Commit: 469794e66f86f11ae50015f6199179ca83efc58b
https://github.com/llvm/llvm-project/commit/469794e66f86f11ae50015f6199179ca83efc58b
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIFunctionClassifier.cpp
M clang/test/Analysis/MPIMock.h
M clang/test/Analysis/mpichecker.cpp
Log Message:
-----------
[analyzer] Recognize missing MPI collectives in MPI-Checker (#209263)
Fixes a false positive in the `optin.mpi.MPI-Checker` where legitimate
code was flagged with "Request 'X' has no matching nonblocking call."
Background for reviewers unfamiliar with MPI or this checker
------------------------------------------------------------
MPI (Message Passing Interface) is the standard API for communication
between processes in HPC/cluster programs (C/C++/Fortran). Many MPI
operations come in a *nonblocking* form, prefixed with "I" (for
"immediate"): e.g. `MPI_Isend`, `MPI_Iscatter`. A nonblocking call
returns immediately and hands back an `MPI_Request` handle; the caller
must later complete it with `MPI_Wait` (or `MPI_Waitall`). Forgetting to
wait, or reusing a request before waiting, are real bugs (buffer reuse
races, leaked requests).
The MPI-Checker (originally contributed as a GSoC 2016 project, and is a
domain-specific check - hence it's in "optin").
It tracks each `MPI_Request` region through a small state machine and
reports: three misuse patterns:
* **missing wait**: a nonblocking call whose request is never waited on
* **double nonblocking**: a request reused by a second nonblocking call
before being waited on
* **unmatched wait**: `MPI_Wait` on a request with no originating
nonblocking call
Root cause
----------
`MPIFunctionClassifier` maintains a hand-written list of known MPI
functions. That list was incomplete: several standard collectives --
notably the vector variants (`MPI_Iscatterv`, `MPI_Igatherv`, ...), the
scans, the reduce-scatter family, and `MPI_Ibarrier` -- were entirely
absent. Because `isNonBlockingType()` returned `false` for them,
`checkDoubleNonblocking()` never recorded the request as Nonblocking, so
the matching `MPI_Wait` looked unmatched and produced a FP.
Note that only
`isNonBlockingType()`/`isWaitType()`/`isMPI_Wait()`/`isMPI_Waitall()`
actually drive the checker; the per-shape predicates (`isScatterType`,
`isGatherType`, `isCollToColl`, etc.) and their backing containers are
currently unused. `checkDoubleNonblocking()` also reads the request from
the *last* argument, which is generic since every nonblocking MPI
function places `MPI_Request*` last -- so no per-function argument
handling is needed.
Fix
---
Register the remaining standard collectives and mark the nonblocking
("I") variants as nonblocking:
* **vector variants**: `MPI_Scatterv`/`Iscatterv`,
`MPI_Gatherv`/`Igatherv`, `MPI_Allgatherv`/`Iallgatherv`,
`MPI_Alltoallv`/`Ialltoallv`, `MPI_Alltoallw`/`Ialltoallw`
* **nonblocking barrier**: `MPI_Ibarrier`
* **scans**: `MPI_Scan`/`Iscan`, `MPI_Exscan`/`Iexscan`
* **reduce-scatter**: `MPI_Reduce_scatter`/`Ireduce_scatter`,
`MPI_Reduce_scatter_block`/`Ireduce_scatter_block`
These functions are not referenced by any per-shape predicate, so they
are added directly to the classification containers without a dedicated
`IdentifierInfo` member. Neighborhood collectives (`MPI_Ineighbor_*`)
and the wait-family beyond `Wait`/`Waitall`
(`Waitany`/`Waitsome`/`Test*`) remain out of scope.
Adds regression tests covering the reported repro (no warning), and
confirms double-nonblocking and missing-wait are still detected for the
new functions.
Fixes #208107
---------
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: 00f263b209a834eca2092d4a91d25b5413caea39
https://github.com/llvm/llvm-project/commit/00f263b209a834eca2092d4a91d25b5413caea39
Author: Marcos Maronas <mmaronas at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/test/Driver/spirv-amd-toolchain.c
Log Message:
-----------
[HIP][SPIR-V] Enable -spirv-preserve-auxdata (#209520)
Function attributes such as `convergent` are only kept through SPIRV if
`-spirv-preserve-auxdata` is enabled. This is important to keep the
translation as accurate as possible. Also, this aligns with the
translator path.
Commit: 0d6013c30572faddfb03d165cfb33f658c313716
https://github.com/llvm/llvm-project/commit/0d6013c30572faddfb03d165cfb33f658c313716
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-store-s16-true16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-rotl-rotr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-s16-true16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-strict_fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap-gfx11.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx7.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx8-plus.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (44) (#209734)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 957b6635060d85200d985797eaac8c4dccfd8825
https://github.com/llvm/llvm-project/commit/957b6635060d85200d985797eaac8c4dccfd8825
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.live.mask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mul24.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.integer-minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.strictwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (45) (#209753)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: f8f37a65d472e65561994fb7ae55f6b539c357d4
https://github.com/llvm/llvm-project/commit/f8f37a65d472e65561994fb7ae55f6b539c357d4
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
A mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-barrier-gang-private-init.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-private-local-gang-redundant.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-local.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-routine-seq.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array-shared.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-block-combine-no-reload.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-combine-region-private-dest.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reuse-barrier-sibling-region-privatize.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-call-nested-if.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-worker-call-with-thread-y-reduction.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-dynamic-nw.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-reuse-barrier.mlir
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-subgroup-align.mlir
Log Message:
-----------
[mlir][acc] Introduce acc to gpu codegen pass (#209606)
Introduce pass that lowers `acc.compute_region` to the GPU dialect. For
host-side kernels it wraps the region in `gpu.launch`; for specialized
ACC routines already inside a `gpu.func`, the body is lowered in place.
The pass maps nested `scf.parallel` / `scf.for` loops carrying
`acc.par_dims` to GPU block and thread parallelism, materializes
privatization and reductions for the device, and handles
synchronization.
Example input IR:
```
func.func @two_sibling_loops() {
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
%grid = acc.par_width %c4 {par_dim = #acc.par_dim<block_x>}
%block = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
acc.kernel_environment {
%priv = acc.privatize [#acc<par_dims[block_x]>] : () ->
!acc.private_type<memref<32xi32>>
acc.compute_region launch(%g = %grid, %t = %block) ins(%p = %priv)
: (!acc.private_type<memref<32xi32>>) {
%slot = acc.private_local %p : (!acc.private_type<memref<32xi32>>)
-> memref<32xi32>
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
%c32_len = arith.constant 32 : index
scf.parallel (%tx) = (%c0) to (%t) step (%c1) {
scf.parallel (%i) = (%c0) to (%c32_len) step (%c1) {
%v = arith.index_cast %i : index to i32
memref.store %v, %slot[%i] : memref<32xi32>
scf.reduce
} {acc.par_dims = #acc<par_dims[sequential]>}
scf.reduce
} {acc.par_dims = #acc<par_dims[thread_x]>}
scf.parallel (%bx) = (%c0) to (%g) step (%c1) {
scf.parallel (%tx2) = (%c0) to (%t) step (%c1) {
scf.parallel (%j) = (%c0) to (%c32_len) step (%c1) {
%loaded = memref.load %slot[%j] : memref<32xi32>
memref.store %loaded, %slot[%j] : memref<32xi32>
scf.reduce
} {acc.par_dims = #acc<par_dims[sequential]>}
scf.reduce
} {acc.par_dims = #acc<par_dims[thread_x]>}
scf.reduce
} {acc.par_dims = #acc<par_dims[block_x]>}
acc.yield
} {origin = "acc.parallel"}
}
return
}
```
Output IR:
```
module {
func.func @two_sibling_loops() {
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
acc.kernel_environment {
%0 = acc.privatize [#acc<par_dims[block_x]>] : () ->
!acc.private_type<memref<32xi32>>
%c1 = arith.constant 1 : index
gpu.launch blocks(%arg0, %arg1, %arg2) in (%arg6 = %c4, %arg7 =
%c1, %arg8 = %c1)
threads(%arg3, %arg4, %arg5) in (%arg9 = %c32, %arg10
= %c1, %arg11 = %c1) {
%grid_dim_x = gpu.grid_dim x
%grid_dim_y = gpu.grid_dim y
%grid_dim_z = gpu.grid_dim z
%block_dim_x = gpu.block_dim x
%block_dim_y = gpu.block_dim y
%block_dim_z = gpu.block_dim z
%1 = acc.gpu_shared_memory {num_copies = 1 : i64,
static_upper_bound_bytes = 128 : i64}
: () -> memref<32xi32, #gpu.address_space<workgroup>>
%memspacecast = memref.memory_space_cast %1
: memref<32xi32, #gpu.address_space<workgroup>> to
memref<32xi32>
%c0 = arith.constant 0 : index
%c1_0 = arith.constant 1 : index
%c32_1 = arith.constant 32 : index
scf.parallel (%arg12) = (%c0) to (%c32_1) step (%c1_0) {
%2 = arith.index_cast %arg12 : index to i32
memref.store %2, %memspacecast[%arg12] : memref<32xi32>
scf.reduce
} {acc.par_dims = #acc<par_dims[sequential]>}
gpu.barrier
scf.parallel (%arg12) = (%c0) to (%c32_1) step (%c1_0) {
%2 = memref.load %memspacecast[%arg12] : memref<32xi32>
memref.store %2, %memspacecast[%arg12] : memref<32xi32>
scf.reduce
} {acc.par_dims = #acc<par_dims[sequential]>}
gpu.barrier
gpu.terminator
}
}
return
}
}
```
---------
Co-authored-by: Matsu <kmatsumura at nvidia.com>
Commit: f829df1bf55e674aad2d90390b7b53dd141c2c8b
https://github.com/llvm/llvm-project/commit/f829df1bf55e674aad2d90390b7b53dd141c2c8b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.atomic.cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant32bit.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-legalize-range-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer-wrong-insert-point.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/min3-max3-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mmra.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-cse-nonlocal-convergent-instrs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-legalize-atomic.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-buildvector-identities.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-divrem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-sextload-from-sextinreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-trunc-bitcast-buildvector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-unmerge-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-zextload-from-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-load-and-mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-fptrunc_fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-redundant-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-sext_inreg-to-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-shuffle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/promote-dependency-on-invariant-result.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-fmed3-const.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-clamp-minmax-const.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-fmed3-minmax-const.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-ignore-copies-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-smed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-umed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.subdword.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp-compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.class.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpermute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.permute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.swizzle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (46) (#209754)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 703e9b3b79f1520d05fceebabfacf31af4ad4e14
https://github.com/llvm/llvm-project/commit/703e9b3b79f1520d05fceebabfacf31af4ad4e14
Author: Phoebe Linck <phoebe.linck at hpe.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/Todo/taskwait-depend.f90
A flang/test/Lower/OpenMP/taskwait-depend.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[Flang][OpenMP] Implement DEPEND clause for TASKWAIT directive (#193568)
Implements support for the `DEPEND` clause on `TASKWAIT`, added in
OpenMP 5.0.
Commit: f1cb3d330c03827247468b4c0437e86ad0b286ad
https://github.com/llvm/llvm-project/commit/f1cb3d330c03827247468b4c0437e86ad0b286ad
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fmul.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groupstaticsize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.live.mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx90a.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx942.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memrealtime.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.vote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-align.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomic-cmpxchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-add-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.v2f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-max.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-min.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-minmax-uminmax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-uinc-udec-wrap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-flog2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi-sat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui-sat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (47) (#209755)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: c78147a9198c45ac1020dfc1d5524d158470309e
https://github.com/llvm/llvm-project/commit/c78147a9198c45ac1020dfc1d5524d158470309e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-merge.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-roundeven.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-reg-sequence.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-whole-wave-functions.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sbfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-merge-values-build-vector-s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-divergent-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-uniform-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/true16-merge-values-s16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc-brc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ubfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-ptr-add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (48) (#209756)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 649466a54f920970e99574d0d982b8ed35465c8f
https://github.com/llvm/llvm-project/commit/649466a54f920970e99574d0d982b8ed35465c8f
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
Log Message:
-----------
[NFC][OpenACC] fix doc formatting for reduction ops (#209739)
Was not printing correctly due to the matching `$`
Commit: 1725c53752c84cc19c656413b0e75e1dbe9e154b
https://github.com/llvm/llvm-project/commit/1725c53752c84cc19c656413b0e75e1dbe9e154b
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGAttributes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant.mlir
Log Message:
-----------
[mlir][acc] Add attribute for redundant execution marking (#209784)
Adds `acc.gpu_block_redundant` attribute for correct gang-redundant
lowering.
OpenACC gang-redundant regions execute on every gang rather than
partitioning work across gangs. When lowering to the GPU dialect, such
regions must not be assigned block-level par dims; only thread-level
parallelism applies. This marks loops with this attribute to ensure
proper execution and to avoid incorrect predication.
Co-authored-by: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Commit: 15a20079696696162af6aa532bd95f8cd010aaa5
https://github.com/llvm/llvm-project/commit/15a20079696696162af6aa532bd95f8cd010aaa5
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN sqrt builtins (#197342)
Adds codegen for the following AMDGCN square root builtins:
- __builtin_amdgcn_sqrt (double)
- __builtin_amdgcn_sqrtf (float)
- __builtin_amdgcn_sqrth (half)
- __builtin_amdgcn_sqrt_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.sqrt` intrinsic calls.
Commit: 35182ec363a6943bd4c6c4158b0de17f7799b6b7
https://github.com/llvm/llvm-project/commit/35182ec363a6943bd4c6c4158b0de17f7799b6b7
Author: David Young <davidayoung at meta.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[lldb][bazel] Add PlatformWasm plugin library to the Bazel overlay (#209749)
Adds the PluginPlatformWasm cc_library plus its PlatformWasmProperties
gentbl_cc_library (settings .td, modeled on PlatformQemuUserProperties)
to the lldb Bazel overlay. Deps mirror
source/Plugins/Platform/WebAssembly/CMakeLists.txt (lldbCore, lldbHost,
lldbTarget, lldbUtility, Support) plus the :PluginPlatformGDB and
:PluginProcessWasm plugin deps its GDB-remote/Web-Inspector sources use.
The library is intentionally left out of DEFAULT_PLUGINS.
bazel rule assisted with: claude
Can confirm this library will convert to BUCK internally at Meta and
build with buck2 where we do have in the default plugin list. I left it
out here, unless there's a desire to add it in.
Commit: 78c8cf7ef90cb0bca766d07a221977fbe2a2a69f
https://github.com/llvm/llvm-project/commit/78c8cf7ef90cb0bca766d07a221977fbe2a2a69f
Author: David Young <davidayoung at meta.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[lldb][bazel] Add ObjectFileXCOFF plugin library to the Bazel overlay (#209747)
Adds the PluginObjectFileXCOFF cc_library to the lldb Bazel overlay,
modeled on PluginObjectFileELF/PluginObjectFileCOFF and mirroring
source/Plugins/ObjectFile/XCOFF/CMakeLists.txt (lldbCore, lldbHost,
lldbSymbol, lldbTarget; llvm BinaryFormat/Object/Support). The library
is intentionally left out of DEFAULT_PLUGINS.
bazel rule assisted with: claude
Can confirm this library will convert to BUCK internally at Meta and
build with buck2 where we do have in the default plugin list. I left it
out here, unless there's a desire to add it in.
Commit: 6526c5ba127123f2c81b21b3f27bfa69dd623f9e
https://github.com/llvm/llvm-project/commit/6526c5ba127123f2c81b21b3f27bfa69dd623f9e
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/sdivrem64.r600.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/udivrem64.r600.ll
Log Message:
-----------
[AMDGPU] Avoid errors with 24-bit div/rem (#209711)
Avoid errors when using floating-point reciprocal to calculate Y/X when
Y = (0x7FFFFF/X)*X-1. Limit expansion to 23-bit signed and 22-bit
unsigned to avoid this issue.
This change is analogous to the change done in
https://github.com/llvm/llvm-project/pull/202753, but in
AMDGPUISelLowering.cpp.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 4b415b168494b2cbf814db3305ec236aae1562c6
https://github.com/llvm/llvm-project/commit/4b415b168494b2cbf814db3305ec236aae1562c6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
A clang/test/Driver/Inputs/resource_dir_with_amdgpu_per_target_subdir/lib/amdgpu-amd-amdhsa/libclang_rt.profile.a
M clang/test/Driver/amdgpu-toolchain.c
Log Message:
-----------
[Clang][AMDGPU] Search both amdgcn and amdgpu libraries (#209770)
Summary:
Temporary workaround as we transition triples from amdgcn to amdgpu.
Commit: 2cd090afbe1eddfe8f781d5ccae391e1f69e8ee4
https://github.com/llvm/llvm-project/commit/2cd090afbe1eddfe8f781d5ccae391e1f69e8ee4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Fix amdgcn -> amdgpu conversion for compiler-rt (#209765)
Summary:
We are apparently transitioning to using `amdgpu` everywhere, so these
need to be updated.
Commit: 4279d524cc78d0bac294bb29257c62665121d9f1
https://github.com/llvm/llvm-project/commit/4279d524cc78d0bac294bb29257c62665121d9f1
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
A llvm/test/CodeGen/AMDGPU/vgpr-setreg-pred-block.mir
Log Message:
-----------
[AMDGPU][CodeGen] Place `S_NOP` after `S_SETREG_IMM32_B32` in predecessor MBB (#209620)
When placing a `S_SET_VGPR_MSB` at the beginning of a block, check
whether there exists a `S_SETREG_IMM32_B32(MODE)` in the predecessor
block that falls-through into it; if there is one a `S_NOP` has to be
inserted in between them.
Commit: ea9175f63571dda7efbdbeff9b6eed33879307ac
https://github.com/llvm/llvm-project/commit/ea9175f63571dda7efbdbeff9b6eed33879307ac
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
Revert "[SLP] Support memory runtime alias checks"
This reverts commit 96a53b1c5356754b4708c0fee8517fd0d69cb1fd to fix
buildbots https://lab.llvm.org/buildbot/#/builders/223/builds/7209
reported in https://github.com/llvm/llvm-project/pull/209305?email_source=notifications&email_token=ABI45DXMMB4TIQHXXWA6NYD5E57EVA5CNFSNUABFM5UWIORPF5TWS5BNNB2WEL2JONZXKZKDN5WW2ZLOOQXTIOJYGA4TIMZVGU3KM4TFMFZW63VMON2GC5DFL5RWQYLOM5S2KZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#issuecomment-4980943556
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209793
Commit: 6352d8437c41915ebdb03537660f3bb48a1bc02a
https://github.com/llvm/llvm-project/commit/6352d8437c41915ebdb03537660f3bb48a1bc02a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (49) (#209757)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 7d638b4dbcb10c224741cdd4634a768c7bc6d305
https://github.com/llvm/llvm-project/commit/7d638b4dbcb10c224741cdd4634a768c7bc6d305
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/allow-check.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-function-calls-option.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/coalescer-identical-values-undef.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf-broken.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/combine-sreg64-inits.mir
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copyprop_regsequence_with_undef.mir
M llvm/test/CodeGen/AMDGPU/cttz-elts.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dce-disjoint-intervals.mir
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug_frame.ll
M llvm/test/CodeGen/AMDGPU/default_amdhsa_code_object_version.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bitreverse.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-min-max.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-not-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/enable-no-signed-zeros-fp-math.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/endpgm-dce.mir
M llvm/test/CodeGen/AMDGPU/extload-align.ll
M llvm/test/CodeGen/AMDGPU/extract-load-i1.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/fold-cndmask.mir
M llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir
M llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
M llvm/test/CodeGen/AMDGPU/fold-implicit-operand.mir
M llvm/test/CodeGen/AMDGPU/fold-over-exec.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address-codegen.ll
M llvm/test/CodeGen/AMDGPU/fp-to-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/frame-lowering-entry-all-sgpr-used.mir
M llvm/test/CodeGen/AMDGPU/freeze-other-uses-issue-198094.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-deduced-arg-attr.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-1.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-3.ll
M llvm/test/CodeGen/AMDGPU/huge-number-operand-folds.mir
M llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invalid-inline-asm-constraint-crash.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (50) (#209776)
Fold the explicit -mcpu subtarget into the amdgpu subarch triple on
llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 ->
-mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu
following the default-subtarget pinning. Codegen output is unchanged.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 5699900ae02272a558761b6de3f18a790abe763f
https://github.com/llvm/llvm-project/commit/5699900ae02272a558761b6de3f18a790abe763f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/AST/ByteCode/virtual-bases.cpp
Log Message:
-----------
[clang][bytecode] Fix virtual-bases.cpp on 32 bit hosts (#209766)
It currently fails on clang-armv8-quick with:
```console
# | error: diagnostics with 'error' severity seen but not expected:
# | File /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/clang/test/AST/ByteCode/virtual-bases.cpp Line 441: static assertion failed due to requirement '((__builtin_constant_p((char *)&c.c) ? ((char *)&c.c) : ((char *)&c.c)) - (__builtin_constant_p((char *)&c) ? ((char *)&c) : ((char *)&c))) == 12'
# | File /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/clang/test/AST/ByteCode/virtual-bases.cpp Line 442: static assertion failed due to requirement '((__builtin_constant_p((char *)&c.b) ? ((char *)&c.b) : ((char *)&c.b)) - (__builtin_constant_p((char *)&c) ? ((char *)&c) : ((char *)&c))) == 8'
# | File /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/clang/test/AST/ByteCode/virtual-bases.cpp Line 443: static assertion failed due to requirement '((__builtin_constant_p((char *)&c.a) ? ((char *)&c.a) : ((char *)&c.a)) - (__builtin_constant_p((char *)&c) ? ((char *)&c) : ((char *)&c))) == 20'
# | File /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/clang/test/AST/ByteCode/virtual-bases.cpp Line 444: static assertion failed due to requirement '((__builtin_constant_p((char *)&c.x) ? ((char *)&c.x) : ((char *)&c.x)) - (__builtin_constant_p((char *)&c) ? ((char *)&c) : ((char *)&c))) == 16'
# | error: diagnostics with 'note' severity seen but not expected:
# | File /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/clang/test/AST/ByteCode/virtual-bases.cpp Line 441: expression evaluates to '8 == 12'
# | File /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/clang/test/AST/ByteCode/virtual-bases.cpp Line 442: expression evaluates to '4 == 8'
# | File /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/clang/test/AST/ByteCode/virtual-bases.cpp Line 443: expression evaluates to '16 == 20'
# | File /home/tcwg-buildbot/worker/clang-armv8-quick/llvm/clang/test/AST/ByteCode/virtual-bases.cpp Line 444: expression evaluates to '12 == 16'
# | 8 errors generated.
```
Commit: 0429183bd83dee21b7e074160e241129ca1cde25
https://github.com/llvm/llvm-project/commit/0429183bd83dee21b7e074160e241129ca1cde25
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
Log Message:
-----------
[gn build] Port 2375505c7c19 (#209797)
Commit: 21db8e9e2ad0ba161d5939de39119951c61e64ec
https://github.com/llvm/llvm-project/commit/21db8e9e2ad0ba161d5939de39119951c61e64ec
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
Log Message:
-----------
[gn build] Port 9a4deccf90ae (#209799)
Commit: bfc2d553401bfd69c57f848d35d5ec5952298cbb
https://github.com/llvm/llvm-project/commit/bfc2d553401bfd69c57f848d35d5ec5952298cbb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/kernel_code_t_recurse.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/knownbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/lcssa-optnone.ll
M llvm/test/CodeGen/AMDGPU/lds-alignment.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/liveness.mir
M llvm/test/CodeGen/AMDGPU/livevars-implicitdef.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdiv.fast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.ptr.buffer.hsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getpc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
M llvm/test/CodeGen/AMDGPU/lower-range-metadata-intrinsic-call.ll
M llvm/test/CodeGen/AMDGPU/machinelicm-convergent.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-copy-like-instrs.mir
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/madak-inline-constant.mir
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mcp-use-before-def.mir
M llvm/test/CodeGen/AMDGPU/mem-builtins.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
M llvm/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir
M llvm/test/CodeGen/AMDGPU/movrels-bug.mir
M llvm/test/CodeGen/AMDGPU/new-pm-machine-analysis.mir
M llvm/test/CodeGen/AMDGPU/no-hsa-graphics-shaders.ll
M llvm/test/CodeGen/AMDGPU/no-limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/nullptr-long-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/opt_exec_copy_fold.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
M llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
M llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/reduce-saveexec.mir
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-cannot-join-failures.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-prune.mir
M llvm/test/CodeGen/AMDGPU/regcoalescer-resolve-lane-conflict-by-subranges.mir
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
M llvm/test/CodeGen/AMDGPU/remat-dead-subreg.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-dbg.mir
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-gen.mir
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses.mir
M llvm/test/CodeGen/AMDGPU/sched.barrier.inverted.mask.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-physregdeps.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/set-wave-priority.ll
M llvm/test/CodeGen/AMDGPU/setcc-select-hi32mask.ll
M llvm/test/CodeGen/AMDGPU/setcc-select.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
M llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.mir
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/si-i1-copies.mir
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (51) (#209777)
Fold the explicit -mcpu subtarget into the amdgpu subarch triple on
llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 ->
-mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu
following the default-subtarget pinning. Codegen output is unchanged.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: ff58fb1cef69c6d9e2e8889f2e72b962858a5475
https://github.com/llvm/llvm-project/commit/ff58fb1cef69c6d9e2e8889f2e72b962858a5475
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
M llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
M llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/splitkit-copy-live-lanes.mir
M llvm/test/CodeGen/AMDGPU/splitkit-nolivesubranges.mir
M llvm/test/CodeGen/AMDGPU/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/AMDGPU/stop-tail-duplicate-cfg-intrinsic.mir
M llvm/test/CodeGen/AMDGPU/subreg-intervals.mir
M llvm/test/CodeGen/AMDGPU/subreg_interference.mir
M llvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-regsequence-keep-copy-on-use.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
M llvm/test/CodeGen/AMDGPU/verify-sop.mir
M llvm/test/CodeGen/AMDGPU/vgpr_constant64_to_sgpr.mir
M llvm/test/CodeGen/AMDGPU/virtregrewrite-undef-identity-copy.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-debug-non-first-terminators.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-no-redundant.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-trailing.mir
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wqm-debug-instr.mir
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
M llvm/test/CodeGen/AMDGPU/zext-lid.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (52) (#209778)
Fold the explicit -mcpu subtarget into the amdgpu subarch triple on
llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 ->
-mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu
following the default-subtarget pinning. Codegen output is unchanged.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 4596278ca49b13280176c6ae25ab673772185d56
https://github.com/llvm/llvm-project/commit/4596278ca49b13280176c6ae25ab673772185d56
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port ef118b5b3a61 (#209800)
Commit: d0231d2195976b5b091b8e55f4d4fd2b55875ee5
https://github.com/llvm/llvm-project/commit/d0231d2195976b5b091b8e55f4d4fd2b55875ee5
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i16-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i8-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-gather-i32-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-gather-i64-with-i8-index.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
Log Message:
-----------
[LV] Fix LoopVectorize/X86/CostModel tests when regenerated with UTC. NFC (#209802)
Some of the cost model tests were passing, but their UTC arguments
were outdated and CHECK lines disappeared when regenerating them.
- Add additional --filter lines for VPlan cost model CHECK lines,
which were manually written previously
- Update the --filter argument for the updated INTERLEAVE-GROUP print
output
- Regenerate strided-load-*.ll tests with UTC
- Pass -vplan-print-metadata=false for tests that were using
hand-written regexes in CHECK lines
Commit: ee08b1c5553cd558458b9570646038b9422ca397
https://github.com/llvm/llvm-project/commit/ee08b1c5553cd558458b9570646038b9422ca397
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-add-nullptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ashr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-extract-vector-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsub-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-redundant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-neg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-amount-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-illegal-types.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shifts.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shift.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.barrier.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-br.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/knownbits-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extractelement-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-amdgcn-fdiv-fast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memsetinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-reassoc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/selected-inst-flags.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
Log Message:
-----------
AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (53) (#209779)
Fold the explicit -mcpu subtarget into the amdgpu subarch triple on
llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 ->
-mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu
following the default-subtarget pinning. Codegen output is unchanged.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 42c2980c7c632d7a45776d3e2c51627100f6e763
https://github.com/llvm/llvm-project/commit/42c2980c7c632d7a45776d3e2c51627100f6e763
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
A llvm/test/Transforms/LoopUnroll/full-unroll-scev-invalidation.ll
Log Message:
-----------
[LoopUnroll] Invalidate SCEV after full unrolling (#208874)
Full unrolling may leave stale ScalarEvolution loop and disposition
caches around the loop pass boundary. A later IndVars pass can then use
stale exit count information and incorrectly fold reachable exits.
Invalidate SCEV loop and disposition caches after successful full
unrolling before preserving `ScalarEvolutionAnalysis.`
Fixes #207744.
Commit: c57f88d5178861974c8bcd61657d87275c835aa5
https://github.com/llvm/llvm-project/commit/c57f88d5178861974c8bcd61657d87275c835aa5
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
M flang/unittests/Semantics/OpenMPUtils.cpp
Log Message:
-----------
[flang][OpenMP] Fix metadirective loop semantic checks (#208844)
This is a follow-up to https://github.com/llvm/llvm-project/pull/207088.
Post-merge review feedback:
* Rename mayVariantBeSelected to MayVariantBeSelected and move it to
the shared OpenMP semantic utilities so declare-variant checking can
reuse it.
* Explain why a WHEN selector is recorded only when its modifier list
contains exactly one element.
* Diagnose loop-associated variants that end a declaration-only
program unit, such as a module with no execution part.
Additional correctness fixes:
* Handle consecutive metadirectives and modules or submodules with
contained procedures without silently dropping an earlier
loop-associated variant.
* Prevent a loop-associated variant in an interface, BLOCK construct,
conditional branch, or nested body from being checked against an
unrelated loop outside that scope.
* Avoid false or missing loop diagnostics when match_any or match_none
combines target selectors with user or construct selectors.
Assisted with codex.
Commit: 36dd090234dff6a9059bf9288e4c61ec77a42d82
https://github.com/llvm/llvm-project/commit/36dd090234dff6a9059bf9288e4c61ec77a42d82
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP] Support memory runtime alias checks
Vectorize straight-line code blocked by runtime-checkable may-alias
dependencies by versioning the block. Drop the deps, and if the tree is
profitable, emit base-object address-range overlap checks branching to a
vector fast path or an original-order scalar fallback.
Fixes #201534
Original Pull Request: https://github.com/llvm/llvm-project/pull/203631
Recommit after revert in a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931,
related to late commit before the release and small after-commit change
request
Recommit after revert in ea9175f63571dda7efbdbeff9b6eed33879307ac, fixed
testing with PROFCHECK=ON
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209820
Commit: 816a5eacc4407e091a76d0205a8221ade044f439
https://github.com/llvm/llvm-project/commit/816a5eacc4407e091a76d0205a8221ade044f439
Author: Vineet Kumar <173554+vntkmr at users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/call.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Semantics/expression.h
M flang/lib/Evaluate/call.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/expression.cpp
A flang/test/Evaluate/fold-conditional-arg.f90
M flang/test/Semantics/conditional-arg.f90
Log Message:
-----------
[flang] Add semantics support for Fortran 2023 conditional arguments (F2023 R1526-R1528) (#195345)
This PR
- Adds semantic analysis for F2023 conditional arguments (F2023
R1526-R1528), enforcing constraints F2023 C1538-C1545.
- Adds shape handling and folding for conditional args.
- Adds semantic tests.
(More details in commit messages)
This PR does not implement lowering to HLFIR; That will be a separate
PR.
AI use disclaimer: The changes in this PR were substantially
generated with the assistance of AI (claude opus 4.6 via Github
CoPilot). In accordance with the LLVM project’s AI use policy, I have
reviewed and tested the code to the best of my ability.
Commit: f10ede511119d7f31f2c6aaca3cbcb1ea00164ce
https://github.com/llvm/llvm-project/commit/f10ede511119d7f31f2c6aaca3cbcb1ea00164ce
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/examples/python/templates/operating_system.py
M lldb/examples/python/templates/scripted_breakpoint.py
M lldb/examples/python/templates/scripted_frame_provider.py
M lldb/examples/python/templates/scripted_hook.py
M lldb/examples/python/templates/scripted_platform.py
M lldb/examples/python/templates/scripted_process.py
M lldb/examples/python/templates/scripted_thread_plan.py
Log Message:
-----------
[lldb/script] Add type hints to scripted extension base classes (#209680)
This patch adds type annotations to every method (parameters and return
types) and every `self.<name>` attribute of the scripted extension base
classes shipped under `lldb/examples/python/templates/`. Extension
authors reading the base classes -- or an IDE navigating them -- can now
see the `lldb.SB*` contract each method exposes without having to
cross-reference the docstring.
`scripting extension generate` also picks the annotations up: derived
class docstrings advertise each inherited attribute together with its
declared type, and the generated method signatures carry their parameter
and return annotations too.
The classes covered are `ScriptedProcess`, `ScriptedThread`,
`ScriptedFrame`, `PassthroughScriptedProcess`,
`PassthroughScriptedThread`, `ScriptedFrameProvider`,
`ScriptedBreakpointResolver`, `ScriptedThreadPlan`, `ScriptedHook`,
`ScriptedPlatform`, and `OperatingSystem`.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 2c2e43675910603bab1b163655786e4850569d74
https://github.com/llvm/llvm-project/commit/2c2e43675910603bab1b163655786e4850569d74
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaTemplate/class-template-spec.cpp
Log Message:
-----------
Create a Template member to be the MemberSpec of a failed TemplVarDecl (#209604)
Patch #200092 changed to no longer check the previous var template when
setting whether the current one is a member specialization. However, if
the previous one was actually an error case (see the example here and in
the report), we ended up trying to do that anyway, which caused an
assertion.
This patch puts in a 'fake' declaration for the not-found declaration after we
emit the 'not found' error for the purposes of allowing our diagnostics to
continue evaluating these without causing problems.
Fixes: #209432
Commit: edea055ee85427ad700e74cfa074d6c5ed5e6d39
https://github.com/llvm/llvm-project/commit/edea055ee85427ad700e74cfa074d6c5ed5e6d39
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-constructor.f90
A flang/test/Fir/CUDA/cuda-register-allocator-0.f90
A flang/test/Fir/CUDA/cuda-register-allocator-1.f90
Log Message:
-----------
[flang][cuda] Register allocator only when needed (#208355)
Register allocator only when needed to avoid bringing in symbol when not
strictly needed.
Commit: 67df1e0f664b85c08d4281e465d3502495bfa035
https://github.com/llvm/llvm-project/commit/67df1e0f664b85c08d4281e465d3502495bfa035
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir][acc] Fix f8f37a65d472e65561994fb7ae55f6b539c357d4 (#209809)
Add missing deps
Commit: bad82c1af5198267f44bba363e20b24dd23d2a24
https://github.com/llvm/llvm-project/commit/bad82c1af5198267f44bba363e20b24dd23d2a24
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel][lldb] Add layering deps (#209813)
Extra deps needed for #209749 and #209747
Commit: a57c590c159c934d3759703a3f773eb09d3ffb09
https://github.com/llvm/llvm-project/commit/a57c590c159c934d3759703a3f773eb09d3ffb09
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/Driver/openmp-invalid-target-id.c
Log Message:
-----------
[clang][OpenMP][test] Specify libomp flag (#209804)
The test added in #209740 assumes that `-fopenmp=libomp` is the default
value, and does not work when the build is configured w/ `libgomp` as
the default instead.
Commit: 2c57ae5efb0159521287c80255e3a604f3b0dcfe
https://github.com/llvm/llvm-project/commit/2c57ae5efb0159521287c80255e3a604f3b0dcfe
Author: Faijul Amin <md.faijul.amin at intel.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
A llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
Log Message:
-----------
[SPIRV] Sign-extend operands of sign-sensitive ops on sub-pow2 widths (#203661)
## Problem
Without extensions, `SPIRVPreLegalizer` widens sub-pow2 scalars (`s4`,
`s24`, ...) to the next legal width by relabeling the LLT only — no
sign-extension is inserted. Sign-sensitive ops (signed `G_ICMP`,
`G_ASHR`, `G_SDIV`, `G_SREM`) then read the sign bit at the wrong
position. As a result `icmp slt i4 %x, 0` always returned `false` even
for negative `i4`.
## Fix
- `SPIRVLegalizerInfo.cpp`: declare `G_SEXT_INREG.lower()` so the
legalizer expands it to `(x << k) ashr k`.
- `SPIRVPreLegalizer.cpp`: before the widening loop, emit `G_SEXT_INREG`
on each value operand of a sign-sensitive MI whose original width is
sub-pow2.
## Test
`llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll` covers `icmp
slt`/`ashr`/`sdiv`/`srem` on `i4`, `icmp slt` on `i24`, and negative
cases (`icmp ult`, `lshr`) that must not emit sign-extension shifts
Commit: b61b45f30cb1d7e88a6877080978aa95b83b7f87
https://github.com/llvm/llvm-project/commit/b61b45f30cb1d7e88a6877080978aa95b83b7f87
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
M lldb/source/Plugins/ObjectFile/ELF/ELFHeader.h
Log Message:
-----------
[lldb] Convert ELFSymbol dump methods to use StringRef (#209650)
I'm working on changing how Section stores its own name (currently a
ConstString). I broke this change out into its own small PR because of
the complexity of rewriting the format string in ELFSymbol::Dump.
Commit: e956df27dfaf556f54a96ed22e85f1e16c7a38e3
https://github.com/llvm/llvm-project/commit/e956df27dfaf556f54a96ed22e85f1e16c7a38e3
Author: Markos Horro <marcosh at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/BitVector.h
M llvm/include/llvm/ADT/SmallBitVector.h
M llvm/unittests/ADT/BitVectorTest.cpp
Log Message:
-----------
[LLVM][ADT] Adding range-based test_all and test_any methods for BitVector (#209790)
Commit: 0cf914adef4b0f1f5251354b91f5c709b95b1b1e
https://github.com/llvm/llvm-project/commit/0cf914adef4b0f1f5251354b91f5c709b95b1b1e
Author: Michael Jones <michaelrj at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libcxx/cmake/caches/Generic-llvm-libc.cmake
M libcxx/test/configs/llvm-libc++-llvm-libc.cfg.in
M libcxx/test/libcxx/language.support/support.dynamic/assert.nothrow_new_not_overridden_fno_exceptions.pass.cpp
M libcxx/test/libcxx/language.support/support.dynamic/new_dont_return_nullptr.pass.cpp
M libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp
M libcxx/test/libcxx/thread/thread.threads/thread.thread.class/thread.thread.member/native_handle.pass.cpp
M libcxx/test/std/depr/depr.c.headers/wchar_h.compile.pass.cpp
M libcxx/test/std/depr/depr.c.headers/wctype_h.compile.pass.cpp
M libcxx/test/std/input.output/syncstream/osyncstream/thread/several_threads.pass.cpp
M libcxx/test/std/numerics/complex.number/complex.member.ops/divide_equal_complex.pass.cpp
M libcxx/test/std/numerics/complex.number/complex.ops/complex_divide_complex.pass.cpp
M libcxx/test/std/numerics/complex.number/complex.ops/scalar_divide_complex.pass.cpp
M libcxx/test/std/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.bin/eval.PR44847.pass.cpp
M libcxx/test/std/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.bin/io.pass.cpp
M libcxx/test/std/strings/c.strings/cwchar.pass.cpp
M libcxx/test/std/strings/c.strings/cwctype.pass.cpp
M libcxx/test/std/strings/string.conversions/to_wstring.pass.cpp
M libcxx/test/std/thread/thread.condition/notify_all_at_thread_exit_lwg3343.pass.cpp
M libcxx/test/std/thread/thread.threads/thread.thread.this/sleep_for.signals.pass.cpp
M libcxx/test/std/time/time.hash/time.hash_enabled.pass.cpp
M libcxxabi/test/configs/llvm-libc++abi-llvm-libc.cfg.in
Log Message:
-----------
[libcxx][libc] update LLVM-libc test status (#201236)
This update removes some unnecessary carveouts, marks some newly
XFAILing tests, and unmarks some now passing tests.
With this change the status of tests is:
Total Discovered Tests: 11471
Unsupported : 2098 (18.29%)
Passed : 9260 (80.73%)
Expectedly Failed: 113 (0.99%)
Assisted-by: Automated tooling, human reviewed.
Commit: 547e9d0c9175f37c9ddd367bbe443a2fd7d6ab7a
https://github.com/llvm/llvm-project/commit/547e9d0c9175f37c9ddd367bbe443a2fd7d6ab7a
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M openmp/runtime/src/kmp_barrier.cpp
Log Message:
-----------
[OpenMP] Fix endian bug in hierarchical barrier code (#117073)
The "oncore" flavor of the hierarchical barrier code uses a single
uint64 to hold both a barrier state *and* a set of flags for the current
node's "leaf kids" in the tree.
To make this work, the barrier state is placed in the least-significant
byte of the uint64, and the flags for leaf kids are placed in other
bytes of the uint64 starting from the most-significant byte to represent
the first child.
At least, this is how it works on little-endian systems. On big-endian
hosts, the current code unfortunately places the leaf kid flags starting
from the *least* significant byte of the uint64, where they will overlap
and clobber the barrier state byte, resulting in corrupted barrier
behavior.
To fix this, this PR changes the child flag offsets to always start with
the MSB, on both big- and little- endian hosts. This was complicated a
bit by the following issues:
- The byte offset was stored "off-by-one" for some reason. This makes it
impossible to represent the MSB on big- endian systems (i.e. byte 0,
which would have to be represented by -1 if offset by one, which does
not fit into the uint8 offset field).
Fixed by storing and using the "offset" field as the actual byte number,
not off-by-one.
- The "offset" field was never used for the master node, but it was
still computed. That computed value was also invalid as it pointed
outside the target uint64, but that didn't matter as it was unused. For
big-endian systems, however, the computation would have resulted in a
*negative* value, which again cannot be stored in the uint8 field.
Fixed by skipping the (unused) computation on the master node and
setting the "offset" field to a dummy value.
This is intended to be NFC on little-endian machines.
Commit: 0639fe182414f04d767175a195a8a26da5d48159
https://github.com/llvm/llvm-project/commit/0639fe182414f04d767175a195a8a26da5d48159
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineINSERT_SUBVECTOR - use peekThroughBitcastsAndExtracts helper to match target shuffles as well. NFC. (#209803)
We were always checking if the result of peekThroughBitcastsAndExtracts
was a target shuffle - so let the helper do it for us.
Makes it easier for future handling of faux shuffles as well.
Commit: d55259aa61b703ce63613a022c5cb14f6b588b46
https://github.com/llvm/llvm-project/commit/d55259aa61b703ce63613a022c5cb14f6b588b46
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[CycleInfo] Move representation-dependent queries to GenericCycleInfo. NFC
With the Euler tour representation (#208614), blocks live in
GenericCycleInfo::BlockLayout and GenericCycle keeps a `CI` back-pointer just
so the out-of-line contains(BlockT *) and blocks() can reach it.
Adopt the design suggested by @aengelke, move the
representation-dependent queries to GenericCycleInfo, taking the cycle
as an argument (contains, getBlocks, getExitBlocks, getExitingBlocks,
getCyclePreheader, getCyclePredecessor, verifyCycle, verifyCycleNest,
and per-cycle print), and delete GenericCycle::CI.
- GenericCycleInfo's move operations become defaulted, dropping the
CI re-pointing walk, and sizeof(GenericCycle) shrinks by a pointer.
- isCycleInvariant gains a MachineCycleInfo parameter, and
GenericUniformityInfo gains getCycleInfo() for callers that only hold the
uniformity result.
Aided by Claude Fable 5
Pull Request: https://github.com/llvm/llvm-project/pull/209665
Commit: a16f3a09415d28928b1e5133ad63ad3d2d97fa99
https://github.com/llvm/llvm-project/commit/a16f3a09415d28928b1e5133ad63ad3d2d97fa99
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/modifying/replace_copy.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::replace_copy and std::replace_copy_if (#207070)
Assisted by Claude
Commit: 0a933be62ea9fb3c6835ffa37852ef9a0288bccf
https://github.com/llvm/llvm-project/commit/0a933be62ea9fb3c6835ffa37852ef9a0288bccf
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/sorting/binary_search.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/equal_range.bench.cpp
M libcxx/test/benchmarks/algorithms/sorting/lower_upper_bound.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::binary_search and std::equal_range (#207268)
The found and not-found paths are measured as separate benchmarks. For
equal_range we additionally cover a unique match, a large equal range,
and an absent key.
As a drive-by, add a predicate variation to the existing lower_bound and
upper_bound benchmarks.
Commit: f4120c4a1d0daaac81983df10a809df883b25173
https://github.com/llvm/llvm-project/commit/f4120c4a1d0daaac81983df10a809df883b25173
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/copy_n.h
M libcxx/include/__algorithm/for_each_n.h
M libcxx/include/__algorithm/generate_n.h
M libcxx/include/__algorithm/ranges_for_each_n.h
M libcxx/include/__bit_reference
A libcxx/test/libcxx/algorithms/alg.nonmodifying/alg.foreach/assert.for_each_n.pass.cpp
A libcxx/test/libcxx/algorithms/alg.nonmodifying/alg.foreach/assert.ranges.for_each_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/copy_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ranges.copy_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.generate/generate_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.generate/ranges_generate_n.pass.cpp
Log Message:
-----------
[libc++] Treat negative counts in copy_n & friends as no-ops (#207086)
The standard specifies copy_n, fill_n and generate_n (both std and
ranges) to be no-ops when passed a negative count. This patch fixes
libc++ to abide by that requirement, with tests.
It's worth noting that std::for_each_n makes n > 0 a precondition
instead: we add the check and tests for it.
Fixes #193613
Commit: dccdacc2dc49c708a8fde04b04ae76b552aaf122
https://github.com/llvm/llvm-project/commit/dccdacc2dc49c708a8fde04b04ae76b552aaf122
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Canonicalize `addf(negf(x), y)` to `subf(y, x)` (#209277)
`arith.addf` had no canonicalization patterns at all. This adds a
canonicalizer rewriting `addf(negf(x), y) -> subf(y, x)` (and the
commuted operand order).
The rewrite is valid under any rounding mode, which is propagated to the
`subf`: `negf` is an exact sign flip, IEEE addition is commutative, and
`y - x` is the correctly rounded `y + (-x)`, so `subf(y, x)` and
`addf(negf(x), y)` are bit-identical for every rounding mode. Fast-math
flags are propagated to the new `subf`.
----
Code partially generated with Claude Code.
Signed-off-by: Víctor Pérez Carrasco <victorperez at fb.com>
Co-authored-by: Víctor Pérez Carrasco <victorperez at fb.com>
Commit: 15cd911154b5712e37187c4507ee7b29c412b998
https://github.com/llvm/llvm-project/commit/15cd911154b5712e37187c4507ee7b29c412b998
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/BPF/sink-min-max.ll
Log Message:
-----------
[BPF] Use UTC for sink-min-max.ll
The assertions were providing a similar level of coverage. Autogenerate
them to make maintenance easier.
Reviewers: mtrofin, yonghong-song, eddyz87
Pull Request: https://github.com/llvm/llvm-project/pull/209681
Commit: c102184cbdcb8467ce1caf384ecd4e36d97fa37c
https://github.com/llvm/llvm-project/commit/c102184cbdcb8467ce1caf384ecd4e36d97fa37c
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
M lld/test/ELF/local-symbols-order.s
M lld/test/ELF/lto/parallel-internalize.ll
M lld/test/ELF/ppc64-local-entry.s
M lld/test/ELF/relocatable-comdat-multiple.s
M lld/test/ELF/relocatable-comdat2.s
M lld/test/ELF/relocatable-discard-locals.s
M lld/test/ELF/relocatable-gc.s
M lld/test/ELF/relocatable.s
M lld/test/ELF/strtab-nodedup.s
Log Message:
-----------
[ELF] Synthesize STT_FILE if necessary (#209087)
lld groups local symbols in .symtab by input file, appending a symbol
converted to STB_LOCAL (hidden visibility, version script `local:`, or
--exclude-libs) to its file's group. The nearest preceding STT_FILE then
claims the symbol, but the attribution can be wrong: the file may
contain multiple STT_FILE symbols (-r output), or lack an STT_FILE for
the symbol's unit.
```
FILE LOCAL DEFAULT ABS a.c
NOTYPE LOCAL DEFAULT 7 a_local
FILE LOCAL DEFAULT ABS b.c
NOTYPE LOCAL DEFAULT 7 b_local
NOTYPE LOCAL DEFAULT 7 a_localized
```
Follow GNU ld:
- If the output contains an STT_FILE symbol, place at the end of the
local part, after a synthetic STT_FILE with an empty name, every local
that cannot be attributed to a file: symbols converted to STB_LOCAL,
linker-synthesized symbols such as `_DYNAMIC`, and range-extension
thunks (parented to the internal file, which has no STT_FILE).
- For -r output, synthesize an STT_FILE named after the input file for
an input that outputs local symbols but no STT_FILE, so that its locals
are not attributed to a preceding file. We use the basename instead of
the full name for local determinism (#47367).
GNU ld synthesizes this per-input STT_FILE for executable and
shared-object output as well. Restrict it to -r for now to minimize test
updates.
Close #47367 and #191478
Commit: 521d3e375ecb81d8b7c2d501496be11bdbd8cec0
https://github.com/llvm/llvm-project/commit/521d3e375ecb81d8b7c2d501496be11bdbd8cec0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/test/CodeGen/BPF/sink-min-max.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[BPF][ProfCheck] Fix sink-min-max.ll
In bpf-check-and-opt-ir, llvm.umax and llvm.umin are lowered into
explicit comparisons/i1 bitwise operations involving select. Make sure
to mark the selects as having an explicitly unknown profile given we
cannot infer what is likely/unlikely to avoid profcheck failures.
Reviewers: yonghong-song, mtrofin, eddyz87
Pull Request: https://github.com/llvm/llvm-project/pull/209682
Commit: 7cef6a72a1641cf3841b401782c4434635bf3d73
https://github.com/llvm/llvm-project/commit/7cef6a72a1641cf3841b401782c4434635bf3d73
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
Log Message:
-----------
[CycleInfo] Number cycles and move the exit-block cache to GenericCycleInfo. NFC
Assign each cycle a preorder ID in layoutBlocks's Euler-tour walk and
move the caches into a lazily allocated table indexed by ID, shrinking
sizeof(GenericCycle) from 128 to 80. appendEntry/setSingleEntry no
longer invalidate: the exit-block set does not depend on entries. Delete
the unused GenericCycle::clear.
Aided by Claude Fable 5
Pull Request: https://github.com/llvm/llvm-project/pull/209666
Commit: 50d9b2768f4cf224ed7c3d15703aa2d5190f9b4a
https://github.com/llvm/llvm-project/commit/50d9b2768f4cf224ed7c3d15703aa2d5190f9b4a
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Lower/OpenMP/Todo/declare-reduction-allocatable-trivial.f90
R flang/test/Lower/OpenMP/Todo/declare-reduction-operator-multiple-types.f90
R flang/test/Lower/OpenMP/Todo/declare-reduction-operator-use-assoc.f90
R flang/test/Lower/OpenMP/Todo/multiple-types-declare_reduction.f90
M flang/test/Lower/OpenMP/declare-reduction-character-allocatable.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-component.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-defined-assign.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-rhs-call.f90
M flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
A flang/test/Lower/OpenMP/declare-reduction-intrinsic-same-name-different-scope.f90
M flang/test/Lower/OpenMP/declare-reduction-logical-init.f90
A flang/test/Lower/OpenMP/declare-reduction-merge-hermetic.f90
A flang/test/Lower/OpenMP/declare-reduction-merge-version-skew.f90
A flang/test/Lower/OpenMP/declare-reduction-name-type-token-collision.f90
A flang/test/Lower/OpenMP/declare-reduction-named-renamed.f90
A flang/test/Lower/OpenMP/declare-reduction-named-separate-rename.f90
A flang/test/Lower/OpenMP/declare-reduction-named-use-assoc.f90
M flang/test/Lower/OpenMP/declare-reduction-no-initializer-derived.f90
M flang/test/Lower/OpenMP/declare-reduction-no-initializer-intrinsic.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-collide.f90
M flang/test/Lower/OpenMP/declare-reduction-operator-derived.f90
M flang/test/Lower/OpenMP/declare-reduction-operator-host-assoc.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-merged.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-multiple-types.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-renamed.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-collide-unused.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-combiners.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-hermetic.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-intrinsic-all.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-intrinsic-collide.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-intrinsic.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-multitype-partial.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-reexport.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-remerge.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-rename-remerge.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-submodule.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-unused-unsupported.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-use-assoc.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-use-only-nonreduction.f90
M flang/test/Lower/OpenMP/declare-reduction-operator.f90
M flang/test/Lower/OpenMP/declare-reduction-same-name-different-scope.f90
A flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic-multiple-types.f90
A flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic-separate.f90
A flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic-use-assoc.f90
M flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic.f90
A flang/test/Lower/OpenMP/declare-reduction-special-separate-reexport.f90
M flang/test/Lower/OpenMP/declare-reduction-target-intrinsic.f90
A flang/test/Lower/OpenMP/multiple-types-declare_reduction.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction.f90
A flang/test/Semantics/OpenMP/declare-reduction-ambiguous.f90
Log Message:
-----------
[flang][OpenMP] Lower cross-module user-defined declare reduction (#207493)
Lower a reduction clause naming a USE-associated, renamed, or merged-generic
user-defined reduction, which currently aborts lowering with a "not yet
implemented" TODO. Semantics already accepts these programs (since #200329).
This covers the defined-operator, intrinsic-operator, and named forms, each for
one or several types in a single declare reduction. One shape is still deferred.
A reduction on an allocatable or pointer operand of a trivial intrinsic element
type (integer, real, complex, or logical) is not lowered yet and reaches a clean
TODO, tracked by #186765. Character and derived-type allocatable reductions do
lower.
Fixes #207255.
Fixes #207489.
An imported reduction is materialized lazily. Its `omp.declare_reduction` op is
created on demand, only when a reduction clause has resolved the exact reduction
it references, through the same lowering path a local declare reduction uses.
There is no separate eager pass that walks accessible scopes to pre-create ops.
The module only-list property is therefore structural. A program using
`use m, only: <non-reduction>` never emits m's reduction, because nothing
references it. One path handles every import form: plain and renamed USE, nested
and merged generic operators, submodules, and intrinsic operators.
Resolve the use-site reduction to its source symbol through the shared semantic
resolver (`Fortran::semantics::omp::FindUserReductionSymbol`), extracted from
check-omp-structure.cpp into Semantics/openmp-utils so lowering and the semantic
checks share one resolution authority. Name the op from the resolved symbol's
ultimate name and owning scope via `getScopedUserReductionName`, on both the
clause and directive sides so the two cannot drift.
For a multi-type declare reduction, the same-file directive emits one op per
listed type and binds each variable to the op for its type. Lazy materialization
is stricter, emitting only the per-type op a clause requests, so an unsupported
sibling type does not block a supported one. The per-type lists advance in
lockstep: type, combiner, and initializer. The type suffix is unconditional,
including for a single-type reduction, so a multi-type per-type op cannot collide
with a single-type op sharing the same type-suffixed spelling.
Intrinsic-operator user reductions are named by their defining scope and ultimate
symbol, matching the defined-operator and named forms. Previously they used a
global name derived from the operator and element type, so two declare reductions
for the same operator and type in different scopes (two modules, or two
procedures in one file) could collide onto one op and silently bind the wrong
combiner. Builtin intrinsic reductions keep their global names.
For separate compilation the imported directive carries bound names but no typed
expressions, because mod-file reading runs only ResolveNames. The materializer
therefore runs expression analysis over the directive before lowering. Creating
the op from an imported module directive during lowering follows the imported
declare-mapper precedent.
An operator-less declare reduction (a special function such as max or min, or an
intrinsic operator such as `+` on an intrinsic type) has an internal mangled name
that is not valid Fortran, and no re-exported operator to recover through. When
such a reduction is re-exported through a facade, emitting it as a `use, only`
item produced a module file that failed to re-parse. The module-file writer
instead re-exports the defining module with a plain `use`, because a mangled name
cannot appear in an only-list. Entities the facade renames or makes private keep
their own use, rename, or private items, so the plain `use` does not widen their
visibility. The reduction then arrives as one shared use-association owned by the
defining module, binding the user's combiner rather than a facade-owned duplicate
that would fall back to the intrinsic. A private reduction is not re-exported.
When a reduction identifier resolves to more than one distinct user-defined
reduction for the list item's type, the clause is rejected as ambiguous rather
than selecting a combiner silently by USE order. Distinctness is by canonical
identity, the defining module and reduction name, so one reduction reached
through several USE, rename, or facade paths collapses to one candidate while
reductions from different modules stay separate. One case is not distinguished.
A same-named module loaded at two versions (a stale hermetic embed versus a
rebuilt copy) collapses to one candidate and is still resolved by USE order,
matching the prior behavior.
Assisted-by: Claude Opus 4.8, GPT-5.5.
Commit: 693ded3ecc9c18178c7fc7fc1186d624edb5e62f
https://github.com/llvm/llvm-project/commit/693ded3ecc9c18178c7fc7fc1186d624edb5e62f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[LLVM] Fix not passing CMAKE_CROSSCOMPILING_EMULATOR for amdgpu (#209828)
Summary:
This only matches on amdgcn, just add amdgpu
Commit: 3a10c3aa3c2087ca4e6f0a18e182ced84a8a7fd0
https://github.com/llvm/llvm-project/commit/3a10c3aa3c2087ca4e6f0a18e182ced84a8a7fd0
Author: Rashmi Mudduluru <r_mudduluru at apple.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
A clang/test/Analysis/Scalable/PointerFlow/system-header-opt-out.cpp
M clang/test/Analysis/Scalable/help.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowTest.cpp
Log Message:
-----------
[clang][SSAF] Optionally skip system-header contributors (#205446)
A new —ssaf-no-extract-from-system-headers switch that gates the
contributor finder so contributors located inside system headers are
dropped from the per-TU summary.
rdar://179151040
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 5979f7c96f44d225219d3c637773455e51190ad2
https://github.com/llvm/llvm-project/commit/5979f7c96f44d225219d3c637773455e51190ad2
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
Log Message:
-----------
[CIR][NFC] Update stale elementwise handler (#207530)
A follow up of https://github.com/llvm/llvm-project/pull/204974
Clean up stale code of https://github.com/llvm/llvm-project/pull/169424
Add two missing CIR elementwise tests
Add three missing elementwise builtins as NYI
Assisted-by: Codex
Commit: b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831
https://github.com/llvm/llvm-project/commit/b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831
Author: Reinhard Stahn <rainij36 at proton.me>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
A mlir/include/mlir/Conversion/SCFToAffine/SCFToAffine.h
M mlir/lib/Conversion/CMakeLists.txt
A mlir/lib/Conversion/SCFToAffine/CMakeLists.txt
A mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
A mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
Log Message:
-----------
[mlir][SCFToAffine] Raise scf.for to affine.for (#200851)
Add a pass `-raise-scf-to-affine` that rewrites `scf.for` into
`affine.for` when the bounds and step are valid affine quantities. It
handles constant and dynamic steps, and integer-typed loops (by a
lossless cast of the bounds to `index`).
This is a first step; raising further scf ops to affine will follow.
Assisted-by: Claude Code (Anthropic)
Co-authored-by: Ming Yan <nexming7 at gmail.com>
Co-authored-by: Julian Farnsteiner <jcf96 at proton.me>
Commit: ea612545644d1e3f238ac4cd053758f569f9bf3b
https://github.com/llvm/llvm-project/commit/ea612545644d1e3f238ac4cd053758f569f9bf3b
Author: Karthika Devi C <kartc at qti.qualcomm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
A polly/test/CodeGen/issue205732.ll
Log Message:
-----------
[Polly] Fix codegen assertions to account for DefinedBehaviorContext (#209188)
DeLICM may produce new read access relations whose domain is restricted
to the DefinedBehaviorContext (e.g., only valid when a parameter ensures
no UB). The validation in setNewAccessRelation already accounts for
this, but the debug assertions in createNewAccesses and
generateScalarLoads did not, causing false assertion failures during
code generation.
Intersect the checked domains with getBestKnownDefinedBehaviorContext()
to match the contract that DeLICM relies on.
Fixes #205732
Commit: 378629b2200b092fa33e6171e7c749c95ff92e9c
https://github.com/llvm/llvm-project/commit/378629b2200b092fa33e6171e7c749c95ff92e9c
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
Log Message:
-----------
[flang] Derive target-specific data layout from triple in TargetRewrite (#209649)
When target-rewrite runs without an explicit llvm.data_layout attribute,
it falls back to hardcoded generic default in MLIR (kDefaultDataLayout)
which specifies f128 ABI alignment as 16 bytes. This is incorrect for
targets where f128 ABI alignment differs from its size, such as SystemZ
which requires 8 bytes per the ELF ABI.
The target triple is available in the target-rewrite pass. Fix by
deriving the data layout from the target triple using
triple.computeDataLayout() before falling back to the generic default,
ensuring target-specific alignments are correctly reflected in
dlti.dl_spec.
@uweigand @dominik-steenken
---------
Co-authored-by: anoop.kumar6 at ibm.com <anoopk at b35lp63.lnxne.boe>
Commit: 09a947e3d02cbd8a7afd273bddbcf9fe489bfe9c
https://github.com/llvm/llvm-project/commit/09a947e3d02cbd8a7afd273bddbcf9fe489bfe9c
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/driver/longpath/TestLongPathDriver.py
M lldb/test/API/functionalities/longpath/TestLongPath.py
M lldb/test/API/tools/lldb-dap/longpath/TestDAP_launch_longPath.py
M lldb/test/Shell/helper/toolchain.py
Log Message:
-----------
[lldb][Windows] Use extended path prefix for rmtree (#209409)
The test suite previously only warned when a test build directory or
artifact path exceeded Windows' `MAX_PATH (260)` limit, and
`shutil.rmtree` could fail to clean up such directories. This replaces
the warnings with actual long-path support.
This is a recurring problem in Swiftlang.
Commit: c4c4f207590a1569b5c30ffe2f204f5d0d535a68
https://github.com/llvm/llvm-project/commit/c4c4f207590a1569b5c30ffe2f204f5d0d535a68
Author: Schrodinger ZHU Yifan <yfzhu at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libc/src/__support/freelist.cpp
Log Message:
-----------
[libc][baremetal][NFC] cache away redundant freelist memory access during push and pop (#208282)
By explicitly caching Node *next = node->next; and Node *prev =
node->prev; at function entry:
#### Before (Original):
```llvm
13: ; preds = %6
%14 = load ptr, ptr %1, align 8 ; Load node->prev
%15 = getelementptr inbounds nuw i8, ptr %14, i64 8
store ptr %8, ptr %15, align 8 ; Store next to prev->next
%16 = load ptr, ptr %7, align 8 ; <--- REDUNDANT LOAD of node->next
store ptr %14, ptr %16, align 8 ; Store prev to next->prev
%17 = icmp eq ptr %3, %1
br i1 %17, label %18, label %20
18: ; preds = %13, %10
%19 = phi ptr [ null, %10 ], [ %16, %13 ]
store ptr %19, ptr %0, align 8
```
#### After (Manual GVN in remove ):
```llvm
13: ; preds = %6
%14 = load ptr, ptr %1, align 8 ; Load node->prev
%15 = getelementptr inbounds nuw i8, ptr %14, i64 8
store ptr %8, ptr %15, align 8 ; Store next to prev->next
store ptr %14, ptr %8, align 8 ; <--- REUSES CACHED %8 DIRECTLY
%16 = icmp eq ptr %3, %1
br i1 %16, label %17, label %19
17: ; preds = %13, %10
%18 = phi ptr [ null, %10 ], [ %8, %13 ] ; <--- REUSES CACHED %8 IN PHI NODE
store ptr %18, ptr %0, align 8
```
### 2. Compiler Optimization Remarks & LTO Impact
1. GVN Diagnostics:
• Before: freelist.cpp:41:11: remark: load of type ptr not eliminated
[-Rpass-missed=gvn]
• After: Clean (0 missed GVN remarks).
2. LTO (Link-Time Optimization) & Code Size:
Eliminates 1 memory read ( MOV64rm ) and 1 memory store ( MOV64mr ) at
every inlined call site in malloc / free.
Assisted-by: Gemini based automation tool (human-in-the-loop)
Commit: 27329918bf4c9430104449b9a5c0354f138417db
https://github.com/llvm/llvm-project/commit/27329918bf4c9430104449b9a5c0354f138417db
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Limit unclaused VMEM w/a to specific targets (#209843)
Fixes: LCOMPILER-2448
Commit: be1b1a77732ce65d8de5f8316f0ce65e2be818ba
https://github.com/llvm/llvm-project/commit/be1b1a77732ce65d8de5f8316f0ce65e2be818ba
Author: Brandon Correa <bwancor at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/LineEditor/LineEditor.cpp
Log Message:
-----------
Turn signal handling on in LineEditor (#203616)
This PR was created to address
https://github.com/jank-lang/jank/issues/801.
Without signal handling, `CLRL+C` / `CTRL+Z` leaves the terminal in an
awkward state, breaking other command line tasks and forcing the user to
open a new/clean terminal window.
cc: @jeaye
### Edit
#### AI
Per the contribution policies and review practices, AI was used to
locate the root cause of the issue I was seeing. From there, I
personally wrote the code and manually tested the build to verify that
the change fixed the problem I was seeing.
#### Testing
Since there were no pre-existing unit tests for this module, no
additional unit tests were added for this PR. I validated the existing
build/tests locally and validated the change propagated through
manually.
Commit: 889b2d651a530952339e4992a2b5a891c7dd0af0
https://github.com/llvm/llvm-project/commit/889b2d651a530952339e4992a2b5a891c7dd0af0
Author: Dan Brown <61992655+danbrown-amd at users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/HLSLControlFlowHint.hlsl
M clang/test/AST/HLSL/matrix-alias.hlsl
M clang/test/AST/HLSL/matrix-constructors.hlsl
M clang/test/AST/HLSL/matrix-elementexpr-tree-transform.hlsl
M clang/test/AST/HLSL/matrix-general-initializer.hlsl
M clang/test/AST/HLSL/matrix-member-access-scalar.hlsl
M clang/test/AST/HLSL/matrix-member-access-swizzle.hlsl
M clang/test/AST/HLSL/resources-in-structs-errors.hlsl
M clang/test/AST/HLSL/resources-in-structs.hlsl
M clang/test/AST/HLSL/vector-alias.hlsl
M clang/test/AST/HLSL/vector-constructors.hlsl
M clang/test/AST/HLSL/vk.spec-constant.usage.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/frem_modulo.hlsl
M clang/test/CodeGenHLSL/builtins/AllMemoryBarrier.hlsl
M clang/test/CodeGenHLSL/builtins/AllMemoryBarrierWithGroupSync.hlsl
M clang/test/CodeGenHLSL/builtins/DeviceMemoryBarrier.hlsl
M clang/test/CodeGenHLSL/builtins/DeviceMemoryBarrierWithGroupSync.hlsl
M clang/test/CodeGenHLSL/builtins/GroupMemoryBarrier.hlsl
M clang/test/CodeGenHLSL/builtins/GroupMemoryBarrierWithGroupSync.hlsl
M clang/test/CodeGenHLSL/builtins/InterlockedAdd.hlsl
M clang/test/CodeGenHLSL/builtins/InterlockedOr.hlsl
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossDiagonal.hlsl
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossX.hlsl
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossY.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveAllEqual.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveAllTrue.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBallot.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBitAnd.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBitOr.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBitXor.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveCountBits.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveMax.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveMin.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveProduct.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveSum.hlsl
M clang/test/CodeGenHLSL/builtins/WavePrefixCountBits.hlsl
M clang/test/CodeGenHLSL/builtins/WavePrefixProduct.hlsl
M clang/test/CodeGenHLSL/builtins/WavePrefixSum.hlsl
M clang/test/CodeGenHLSL/builtins/WaveReadLaneAt.hlsl
M clang/test/CodeGenHLSL/builtins/acos-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/acos.hlsl
M clang/test/CodeGenHLSL/builtins/all.hlsl
M clang/test/CodeGenHLSL/builtins/any.hlsl
M clang/test/CodeGenHLSL/builtins/asdouble.hlsl
M clang/test/CodeGenHLSL/builtins/asin-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/asin.hlsl
M clang/test/CodeGenHLSL/builtins/atan-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/atan.hlsl
M clang/test/CodeGenHLSL/builtins/atan2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/atan2-overloads_mat.hlsl
M clang/test/CodeGenHLSL/builtins/atan2.hlsl
M clang/test/CodeGenHLSL/builtins/atan2_mat.hlsl
M clang/test/CodeGenHLSL/builtins/clamp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/clamp.hlsl
M clang/test/CodeGenHLSL/builtins/clip.hlsl
M clang/test/CodeGenHLSL/builtins/cosh-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/cosh.hlsl
M clang/test/CodeGenHLSL/builtins/cross.hlsl
M clang/test/CodeGenHLSL/builtins/ddx-coarse-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/ddx-coarse.hlsl
M clang/test/CodeGenHLSL/builtins/ddx-fine-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/ddx-fine.hlsl
M clang/test/CodeGenHLSL/builtins/ddx.hlsl
M clang/test/CodeGenHLSL/builtins/ddy-coarse-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/ddy-coarse.hlsl
M clang/test/CodeGenHLSL/builtins/ddy-fine-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/ddy-fine.hlsl
M clang/test/CodeGenHLSL/builtins/ddy.hlsl
M clang/test/CodeGenHLSL/builtins/degrees-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/degrees.hlsl
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/dot.hlsl
M clang/test/CodeGenHLSL/builtins/dot2add.hlsl
M clang/test/CodeGenHLSL/builtins/f16tof32-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/f16tof32.hlsl
M clang/test/CodeGenHLSL/builtins/f32tof16-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/f32tof16.hlsl
M clang/test/CodeGenHLSL/builtins/faceforward.hlsl
M clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
M clang/test/CodeGenHLSL/builtins/firstbitlow.hlsl
M clang/test/CodeGenHLSL/builtins/fma.hlsl
M clang/test/CodeGenHLSL/builtins/fmod.hlsl
M clang/test/CodeGenHLSL/builtins/frac-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/frac.hlsl
M clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/isinf.hlsl
M clang/test/CodeGenHLSL/builtins/isnan.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/lerp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/lerp.hlsl
M clang/test/CodeGenHLSL/builtins/mad.hlsl
M clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/normalize.hlsl
M clang/test/CodeGenHLSL/builtins/radians-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/radians.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/refract.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
M clang/test/CodeGenHLSL/builtins/sinh.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/step.hlsl
M clang/test/CodeGenHLSL/builtins/tan-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/tan.hlsl
M clang/test/CodeGenHLSL/builtins/tanh-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/tanh.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-ps.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.vs.hlsl
M clang/test/Driver/dxc_hlsl-rootsig-ver.hlsl
M clang/test/ParserHLSL/access_specifiers.hlsl
M clang/test/ParserHLSL/hlsl_contained_type_attr.hlsl
M clang/test/ParserHLSL/hlsl_contained_type_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_is_array_attr.hlsl
M clang/test/ParserHLSL/hlsl_is_array_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_raw_buffer_attr.hlsl
M clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_dimension_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_dimension_attr_error.hlsl
M clang/test/ParserHLSL/semantic_parsing.hlsl
M clang/test/ParserHLSL/semantic_parsing_define.hlsl
M clang/test/SemaHLSL/Availability/attr-deprecated.hlsl
M clang/test/SemaHLSL/BuiltIns/binary-compat-overload-warnings.hlsl
M clang/test/SemaHLSL/BuiltIns/fma-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ternary-compat-overload-warnings.hlsl
M clang/test/SemaHLSL/BuiltIns/unary-compat-overload-warnings.hlsl
M clang/test/SemaHLSL/BuiltIns/vec-scalar-compat-overload-warnings.hlsl
M clang/test/SemaHLSL/BuiltIns/vector-constructors-errors.hlsl
M clang/test/SemaHLSL/Language/InitIncompleteArrays.hlsl
M clang/test/SemaHLSL/Language/InitLists.hlsl
M clang/test/SemaHLSL/Language/NoVirtual.hlsl
M clang/test/SemaHLSL/Language/OutputParameters.hlsl
M clang/test/SemaHLSL/Language/TemplateOutArg.hlsl
M clang/test/SemaHLSL/Resources/ConstantBuffers.hlsl
M clang/test/SemaHLSL/Semantics/semantic.explicit-mix-builtin-vs.hlsl
M clang/test/SemaHLSL/Semantics/semantic.explicit-mix-location-2.hlsl
M clang/test/SemaHLSL/Semantics/semantic.explicit-mix-location.hlsl
M clang/test/SemaHLSL/Semantics/valid_entry_parameter.hlsl
M clang/test/SemaHLSL/Semantics/vertexid.vs.hlsl
M clang/test/SemaHLSL/Types/short-errors.hlsl
M clang/test/SemaHLSL/entry_shader.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/prohibit_reference.hlsl
M clang/test/SemaHLSL/vk.spec-constant.error.hlsl
Log Message:
-----------
[HLSL] Adds diagnostics for missing/ambiguous shader entry function. (#184892)
Addresses #119260.
Commit: 2dac2abaff714c099880d1d41066d2609563242e
https://github.com/llvm/llvm-project/commit/2dac2abaff714c099880d1d41066d2609563242e
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir] Port b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831 (#209854)
Add SCFToAffine target + deps
Commit: 0256ff92c9e1033270a73ba83d0f34865ef63202
https://github.com/llvm/llvm-project/commit/0256ff92c9e1033270a73ba83d0f34865ef63202
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][test][AIX] Set OBJECT_MODE=any for all clang test (#209531)
This patch sets OBJECT_MODE=any to have tools able to handle 32-bit or
64-bit objects.
Commit: b74c800578a06bba7b3bacc690cbe493759836a2
https://github.com/llvm/llvm-project/commit/b74c800578a06bba7b3bacc690cbe493759836a2
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[compiler-rt][tsan] Fix -Wunused-template in tsan_interface_atomic.cpp (NFC) (#209621)
Commit: 4e1a6091623a4d3b28132b6b4940a264511f5d0e
https://github.com/llvm/llvm-project/commit/4e1a6091623a4d3b28132b6b4940a264511f5d0e
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/ExternalSemaSource.h
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/PCH/unused-local-typedef-determinism.cpp
A clang/test/SemaCXX/warn-unused-local-typedef-deterministic-order.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ASTUtils.h
Log Message:
-----------
[Sema][Serialization] Emit unused local typedefs in a deterministic order (#209639)
Sema::UnusedLocalTypedefNameCandidates is populated while iterating a
Scope's
DeclsInScope, which is a SmallPtrSet whose iteration order depends on
pointer
values and is therefore not stable across runs. The candidates are
serialized
into the AST file -- both to assign declaration IDs and to write the
UNUSED_LOCAL_TYPEDEF_NAME_CANDIDATES record -- and are also used to emit
the
deferred -Wunused-local-typedef warnings, so neither the emitted PCH/AST
file
nor the diagnostics were reproducible. With deterministic compilation
caching
this surfaces as a "cache poisoned" error, because two builds of the
same PCH
produce different bytes.
Sort the candidates by source location at the point they are consumed,
via
Sema::getSortedUnusedLocalTypedefNameCandidates(), so that both the
diagnostics
and the serialized declarations are deterministic.
Commit: 26194d4623650fd3f9b58cda34b318197613e702
https://github.com/llvm/llvm-project/commit/26194d4623650fd3f9b58cda34b318197613e702
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/docs/LFI.rst
M llvm/include/llvm/MC/MCLFIRewriter.h
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
M llvm/test/MC/AArch64/LFI/guard-elim.s
M llvm/test/MC/AArch64/LFI/mem-lr.s
A llvm/test/MC/AArch64/LFI/pac-errors.s
A llvm/test/MC/AArch64/LFI/pac.s
M llvm/test/MC/AArch64/LFI/return.s
Log Message:
-----------
[LFI][AArch64] Add PAC support for LFI (#207915)
This patch adds support for PAC instructions that sign `x30` by deferring
the LFI mask until the next control-flow instruction or label, allowing
an authentication instruction to run before the mask, which overwrites
the PAC signature bits in the top bits of the pointer. This relies on
FEAT_FPAC to provide a security benefit, which requires authentication
failure to cause a trap, rather than expecting the branch on an invalid
pointer to cause the trap.
Commit: 725f644a31627c08f6cec25a7eb2396ad690d08e
https://github.com/llvm/llvm-project/commit/725f644a31627c08f6cec25a7eb2396ad690d08e
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Improve requires clause parsing (#207542)
We did not consider dependent templates and thus ended the parsing after
template and forcing a line break there. The tests was formatted as:
template <typename T> struct S {
template <typename Foo>
requires T::template
Has<Foo> void func(Foo);
};
Commit: 105261293d6763055cecf7e37aced21de94eaefc
https://github.com/llvm/llvm-project/commit/105261293d6763055cecf7e37aced21de94eaefc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/fmaddsub-combine.ll
M llvm/test/CodeGen/X86/fmsubadd-combine.ll
Log Message:
-----------
[X86] fmaddsub-combine.ll + fmsubadd-combine.ll - cleanup 512-bit buildvector tests (#209850)
Followup to #207436 - the full buildvector and partial buildvector tests
are covered by PhaseOrdering/X86/fmaddsub.ll which outputs the (still
poor) vectorized shuffle patterns
Ensure the current middle-end IR is tested by the backend, even though
its still not optimal (and divergent between SSE and AVX targets) - I've
kept the buildvector backend patterns for now (and moved the buildvector
fmsubadd patterns to fmsubadd-combine.ll for consistency).
Next step will be to investigate why the middle-end IR result isn't
optimal.
Minor cleanup for #144489
Commit: f41f334bff98866aefa33f09ae67b61532afa4a5
https://github.com/llvm/llvm-project/commit/f41f334bff98866aefa33f09ae67b61532afa4a5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/sin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-log.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-uniform-waterfall.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-uniform-temporal-divergence.ll
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-promote-i8.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimization_split_dt_update.ll
M llvm/test/CodeGen/AMDGPU/disable-preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/do-not-unify-divergent-exit-nodes-with-musttail.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
M llvm/test/CodeGen/AMDGPU/loop-vector-sink.ll
M llvm/test/CodeGen/AMDGPU/lower-intrinsics-barriers.ll
M llvm/test/CodeGen/AMDGPU/lower-intrinsics-cluster-barrier.ll
M llvm/test/CodeGen/AMDGPU/lower-intrinsics-split-barriers.ll
M llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
M llvm/test/CodeGen/AMDGPU/printf_builtin.ll
M llvm/test/CodeGen/AMDGPU/printf_nobuiltin.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-budget-exhausted.ll
M llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll
M llvm/test/Transforms/AggressiveInstCombine/AMDGPU/fold-consecutive-loads.ll
M llvm/test/Transforms/AggressiveInstCombine/AMDGPU/fold-loads-multiple-uses.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i64-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i64-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-private-gas.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-integer-ops-0-to-add-0.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/phinode-address-infer.ll
M llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
M llvm/test/Transforms/InstCombine/AMDGPU/fmed3.ll
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.shuffle.ll
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wavefrontsize.ll
M llvm/test/Transforms/InstCombine/AMDGPU/mbcnt.ll
M llvm/test/Transforms/InstCombine/AMDGPU/rcp-contract-rsq.ll
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/trivially-uniform.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/load-i1-misaligned.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/exp2-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/external-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/extract-ordering.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/vectorize-i8.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/zext-duplicate-shift.ll
M llvm/test/Transforms/SandboxVectorizer/AMDGPU/basic.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/amdgpu-large-lds-offset.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/rebuild-trunc.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reorder-gep-inbounds.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reorder-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reunite-exts-source-types.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reunite-exts.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/combine-scalar-selects.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-i8.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/shuffles-of-length-changing-shuffles.ll
Log Message:
-----------
AMDGPU: Migrate tests with regenerated checks to amdgpu subarch triple (54) (#209780)
Fold the explicit -mcpu subtarget into the amdgpu subarch triple on
autogenerated tests where the folded triple changes output relative to
the previous default subtarget (e.g. cost-model BASE lines, scheduling).
CHECK lines were regenerated with the update_*_test_checks.py scripts.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 27836a16cd229d25413e23d7d14ebe2678385121
https://github.com/llvm/llvm-project/commit/27836a16cd229d25413e23d7d14ebe2678385121
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-addressing-mode-loops.ll
Log Message:
-----------
AMDGPU: Migrate uniform target-cpu attribute tests to subarch triple (55) (#209815)
Commit: 96a722a0ace661626d071166635728def97f6820
https://github.com/llvm/llvm-project/commit/96a722a0ace661626d071166635728def97f6820
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-flat-scratch-init-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-intrinsic-missing-nocallback.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-min-agpr-alloc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-nocallback-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-trap-leaf.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-wwm.ll
M llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll
M llvm/test/CodeGen/AMDGPU/propagate-amdgpu-cluster-dims.ll
Log Message:
-----------
AMDGPU: Fold -mcpu into subarch triple for attributor tests (56) (#209816)
Commit: 90a2e5010fa88627cd21bd0311833c786be8a213
https://github.com/llvm/llvm-project/commit/90a2e5010fa88627cd21bd0311833c786be8a213
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
Log Message:
-----------
[msan] Handle AVX512 mask.compress (#209654)
mask.compress selects elements from the first two operands according to
the mask; thus, we can propagate the shadow by applying the intrinsic to
the input shadows (with the mask unchanged i.e., trailingVerbatimArgs ==
1), using the forceIntegerIntrinsic option that was added in
https://github.com/llvm/llvm-project/pull/207053
Commit: d48f3ca0dc9027fd892336f7b4f046a6c5887c02
https://github.com/llvm/llvm-project/commit/d48f3ca0dc9027fd892336f7b4f046a6c5887c02
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn-codegen.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-sgmask.ll
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
M llvm/test/CodeGen/AMDGPU/madmk-madak-encoding-size.ll
M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
M llvm/test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-def-after-use.mir
M llvm/test/CodeGen/AMDGPU/permlane-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permlane16_var-op-sel.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-shufflevector.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/unpack-non-coissue-insts-post-ra-scheduler.mir
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
Log Message:
-----------
AMDGPU: Migrate more tests to using subarch triple commands (57) (#209817)
Mostly mechanical updates with some light cleanups manually
applied.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: c40401dd8d28e88519433531c041b0b7e5ada8a9
https://github.com/llvm/llvm-project/commit/c40401dd8d28e88519433531c041b0b7e5ada8a9
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Object/GOFFObjectFile.cpp
Log Message:
-----------
[Object][GOFF] Recognize RLD and LEN records (#207118)
This patch adds explicit cases for RT_RLD and RT_LEN records when
parsing GOFF objects. These record types are not handled yet, but
recognizing them allows us to diagnose them and avoids teating them as
unexpected records.
Commit: 9d09c774832bc99cde76ecb4847bb01680da533d
https://github.com/llvm/llvm-project/commit/9d09c774832bc99cde76ecb4847bb01680da533d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Make VPBlockTy enum protected (NFC) (#209863)
VPBlockTy is an implementation detail, that is only needed in sub-types.
Make protected.
Commit: 0b18869a684febeb4144cd0213cef3163b8cb37e
https://github.com/llvm/llvm-project/commit/0b18869a684febeb4144cd0213cef3163b8cb37e
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/bindings/python/tests/cindex/test_diagnostics.py
M clang/include/clang/Basic/Diagnostic.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaType.cpp
Log Message:
-----------
[Clang] [Diagnostic] Extend DiagCompat() to C language modes (#209241)
This expands the compatibility warnings infrastructure added in #132348
to support C mode as well. Implementing this was actually fairly
straight-forward because we are only ever in C _or_ C++ mode, i.e.
during a single compilation we either emit only C compatibility warnings
or only C++ compatibility warnings. This means we can simply reuse the
existing code and just check for different LangOpts depending on whether
we're in C or C++ mode.
Concretely, this means that instead of e.g.
```
def ext_c2y_alignof_incomplete_array : Extension<
"'alignof' on an incomplete array type is a C2y extension">,
InGroup<C2y>;
def warn_c2y_compat_alignof_incomplete_array : Warning<
"'alignof' on an incomplete array type is incompatible with C standards "
"before C2y">, InGroup<CPre2yCompat>, DefaultIgnore;
```
you can now simply write
```
defm alignof_incomplete_array : C2yCompat<"'alignof' on an incomplete array type is">;
```
And when emitting the warning(s), code such as
```
Diag(OpLoc, getLangOpts().C2y
? diag::warn_c2y_compat_alignof_incomplete_array
: diag::ext_c2y_alignof_incomplete_array);
```
can now be replaced with
```
DiagCompat(OpLoc, diag_compat::alignof_incomplete_array);
```
I've also migrated the C compatibility warnings in
DiagnosticSemaKinds.td to use the new system to make sure that
everything is working properly.
Commit: 0f494fc6576600f79bbcdb5314fbed6c13da7395
https://github.com/llvm/llvm-project/commit/0f494fc6576600f79bbcdb5314fbed6c13da7395
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/attr-nomerge.cpp
A clang/test/CodeGen/builtin-trap.c
M clang/test/CodeGen/pr53127.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-vararg.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/trap-fnattr.cpp
M clang/test/CodeGenCXX/vararg-non-pod.cpp
M clang/test/DebugInfo/CXX/verbose-trap.cpp
M clang/test/Headers/gpuintrin.c
M clang/test/OpenMP/spirv_target_codegen_noexceptions.cpp
M compiler-rt/test/profile/gcov-__gcov_flush-terminate.c
Log Message:
-----------
[codegen]Ensure __builtin_trap() has an unreachable (#197789)
```
void test2() {
__builtin_trap();
}
```
Previously, this would generate this:
```
; Function Attrs: mustprogress noinline nounwind optnone uwtable
define dso_local void @test2()() #2 !dbg !14 {
call void @llvm.trap(), !dbg !15
ret void, !dbg !16
}
```
Now we'll have `unreachable` after the trap
```
; Function Attrs: noinline nounwind optnone uwtable
define dso_local void @test2() #0 {
call void @llvm.trap()
unreachable
}
```
Commit: 23ead65310da314ae04a1c30137f279beaac1a4f
https://github.com/llvm/llvm-project/commit/23ead65310da314ae04a1c30137f279beaac1a4f
Author: Patrik Dokoupil <61749375+pdokoupil at users.noreply.github.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
A compiler-rt/test/msan/Linux/syscalls_setgroups.cpp
Log Message:
-----------
[compiler-rt][sanitizer_common] Fix setgroups syscall pre-hook to check its input (#209207)
# About
`PRE_SYSCALL(setgroups)`/`setgroups16` called `POST_WRITE` on their
`grouplist` argument, but grouplist is a read-only input the kernel
never writes. Under MSan, `POST_WRITE` maps to `__msan_unpoison`, so
annotating a raw setgroups(2) via the documented
`__sanitizer_syscall_pre_setgroups` hook silently marked an
uninitialized group list as initialized -- before the syscall even ran,
and even on failure -- masking a real use-of-uninitialized-value bug.
Under TSan it recorded a write range where a read belongs.
Use PRE_READ, matching every other input-only argument in this file
(e.g. sched_setparam). Add an MSan regression test.
Commit: 09599503b1314a0394e57adbd6279d9a220bfdb8
https://github.com/llvm/llvm-project/commit/09599503b1314a0394e57adbd6279d9a220bfdb8
Author: Arda Serdar Pektezol <arda at pektezol.dev>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
A llvm/test/Transforms/LowerTypeTests/icall-branch-funnel-invalid-operand.ll
Log Message:
-----------
[LowerTypeTests] Avoid null dereference on invalid branch funnel operand (#204951)
On the linked issue, a null dereference happens when looping over`
ArrayRef<GlobalTypeMember *> Globals` at
`LowerTypeTestsModule::buildBitSetsFromDisjointSet()`. This stems from
the external globals in the IR which don't enter GlobalTypeMembers.
Following that, operator[] over the DenseMap returns null and it
propagates to the looped over GlobalTypeMember.
Prevent the null dereference via `.find()` and reporting fatal usage
error if it is not present. Add a negative regression test.
Additionally, the LangRef for the `@llvm.icall.branch.funnel` intrinsic
is missing (see #133635). It would also be nice to have a Verifier entry
for this intrinsic, and get rid of most report_fatal_error() in this
file since it's deprecated.
Fixes #191985
---------
Co-authored-by: Vitaly Buka <vitalybuka at google.com>
Commit: ce586b57f4a8e32d47df58dc1b11730f07ffc834
https://github.com/llvm/llvm-project/commit/ce586b57f4a8e32d47df58dc1b11730f07ffc834
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512dq-intrinsics.ll
Log Message:
-----------
[msan] Handle AVX512 fpclass (floating-point classification) for packed double/float (#209652)
Each bit of the classifier constant specifies whether a particular
classifier is enabled. If Classifiers == 0 (no classifiers are enabled),
the output is trivially known to be zero, thus the output is fully
initialized.
Otherwise, each bit of the output is the bitwise OR of one or more
classifications; we approximate each bit of the output shadow based on
whether the corresponding input element is fully initialized (without
which the classification is potentially unknown). This is only
approximate, because some classifications do not rely on all the bits of
the input element.
This patch only handles packed double/single-precision floating-point.
Handling the scalar equivalents is more complicated because those
intrinsics encode a mask.
Commit: 835ae525713e27aa98c46469792cee980669c6ca
https://github.com/llvm/llvm-project/commit/835ae525713e27aa98c46469792cee980669c6ca
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
Log Message:
-----------
[compiler-rt] Fix asan_interceptors.cpp build warning -Wunused-template (#209750)
mmap_interceptor/munmap_interceptor template functions are instantiated
in sanitizer_common_interceptors.inc only under `#if
SANITIZER_INTERCEPT_MMAP`. Fix `unused function template
'mmap_interceptor'` warning on Windows, which is error under -Werror.
Commit: 7021b428656d283626e9ab3c1a81795c1f6c7086
https://github.com/llvm/llvm-project/commit/7021b428656d283626e9ab3c1a81795c1f6c7086
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/induction-nowrap-from-scev-not-ir.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-wrapping.ll
Log Message:
-----------
[ConstraintElim] Try to get induction step/start/flags from IR (NFC-ish) (#209284)
Handle the common integer inductions where the increment is plain add
PN, C by looking at IR instead of querying SCEV. There's effectively no
re-use between SCEV expression created in ConstraintElimination, and
handling simple cases in IR can avoid unnecessary, expensive SCEV
queries.
Should be NFC-ish. We miss trivial folding of the start value (see
regressed test), but that should not happen in end-to-end pipeline.
Improves compile-time for some workloads, ClamAV, mafft:
https://llvm-compile-time-tracker.com/compare.php?from=b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831&to=2bede223d3ec3ed6e2e9654b635258c50e4e90df&stat=instructions%3Au
I am working on follow-up changes that will handle more cases, where
avoiding unnecessary queries will be more important.
PR: https://github.com/llvm/llvm-project/pull/209284
Commit: 85204d0bce5b24fba24baa0b440b051b6d040f4c
https://github.com/llvm/llvm-project/commit/85204d0bce5b24fba24baa0b440b051b6d040f4c
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
Log Message:
-----------
[libcxx] Mark test unsupported in clang-24 (#209794)
After the version bump, we started seeing this test fail. For now mark
it unsupported in newer LLVM versions, until the underlying issue can be
addressed. More details can be found in #209787.
Commit: 5c0dfced1adc55429e32b1db08570abd3a219d85
https://github.com/llvm/llvm-project/commit/5c0dfced1adc55429e32b1db08570abd3a219d85
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-object-size.cpp
Log Message:
-----------
[clang][bytecode] Fix tail padding with __builtin_object_size (#209771)
This fixes the new libcxx/atomics/builtin_clear_padding.pass.cpp
Commit: 50f2b9443d23eba757c3c0f42eef71e0f9721b15
https://github.com/llvm/llvm-project/commit/50f2b9443d23eba757c3c0f42eef71e0f9721b15
Author: David Green <david.green at arm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-bf16.ll
R llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc-bf16.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-fp-trunc-bf16.ll
Log Message:
-----------
[AArch64] Lower fixed width bf16 fpround (#209411)
Similar to #209194, this was previously hitting an error with an illegal
FP_ROUND_MERGE_PASSTHRU. This time we lower the fptrunc to a scalable
fptrunc and let it legalize naturally. On SVE systems a f64->bf16
fptrunc will fail to legalize, but lowers successfully with sve2 with
fcvtn. A store(fptrunc) -> truncstore combine was disabled too as it
fails with bf16.
Commit: ebd969054197c4767b0f47db0370ed26ac04c990
https://github.com/llvm/llvm-project/commit/ebd969054197c4767b0f47db0370ed26ac04c990
Author: Thurston Dang <thurston at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFCI] Add maybe_unused annotation for #209652 (#209878)
Fix compile error for non-assertion builds
(https://lab.llvm.org/buildbot/#/builders/228/builds/4987) after #209652
Commit: 03e3a6273adc16450c814a68444c1ca9e9768ce3
https://github.com/llvm/llvm-project/commit/03e3a6273adc16450c814a68444c1ca9e9768ce3
Author: Augusto Noronha <anoronha at apple.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
Log Message:
-----------
[lldb] Skip the prologue before reading `this` when stepping into std::function (#209629)
Commit 40152b8 broke CPPLanguageRuntime::GetStepThroughTrampolinePlan by
changing operator() from a multi-line function to a single line
function.
This used to work by accident, because the fallback step-in plan first
advanced past the prologue and the trampoline detection was re-invoked
there with a valid `this`. Once operator() became a one-line inline
definition that intermediate step no longer happened.
Run past the prologue when stopped at the function entry and let the
step-through machinery re-invoke the plan, so the thread plan has a
valid `this` to read from.
Commit: 77e9b8cc155911b5a1378b20cd5e98784ab8a365
https://github.com/llvm/llvm-project/commit/77e9b8cc155911b5a1378b20cd5e98784ab8a365
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
Log Message:
-----------
[flang][cuda] Skip implicit managed/unified attribution for COMMON objects (#209855)
Objects in Fortran `COMMON` blocks may not carry `ATTRIBUTES(MANAGED)`
or `ATTRIBUTES(UNIFIED)`. The implicit attribution added in
[#209292](https://github.com/llvm/llvm-project/pull/209292) did not
account for this, causing a spurious semantic error when a pointer in a
`COMMON` block was implicitly attributed. This change adds a
`!object->commonBlock()` guard to `SetImplicitCUDADataAttr` so that
COMMON members are left unattributed.
Commit: 2cffd1922d06ec79f3c602c4434280450f50f8ba
https://github.com/llvm/llvm-project/commit/2cffd1922d06ec79f3c602c4434280450f50f8ba
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Log Message:
-----------
[NFC][PowerPC] Delete redundant ISD::TRUNCATE from setTargetDAGCombine (#200902)
there is
```
setTargetDAGCombine({ISD::TRUNCATE, ISD::VECTOR_SHUFFLE});
if (Subtarget.useCRBits()) {
setTargetDAGCombine({ISD::TRUNCATE, ISD::SETCC, ISD::SELECT_CC}); }
```
we do not need to set the (ISD::TRUNCATE again when
Subtarget.useCRBits()
Commit: cf293b069a6a1938bcef9271b04b6abc9e3292f8
https://github.com/llvm/llvm-project/commit/cf293b069a6a1938bcef9271b04b6abc9e3292f8
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M .github/new-prs-labeler.yml
A clang/docs/AMDGPUSupport.md
R clang/docs/AMDGPUSupport.rst
A clang/docs/APINotes.md
R clang/docs/APINotes.rst
A clang/docs/AllocToken.md
R clang/docs/AllocToken.rst
A clang/docs/BoundsSafety.md
R clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyAdoptionGuide.md
R clang/docs/BoundsSafetyAdoptionGuide.rst
A clang/docs/BoundsSafetyImplPlans.md
R clang/docs/BoundsSafetyImplPlans.rst
A clang/docs/CIR/index.md
R clang/docs/CIR/index.rst
A clang/docs/CXXTypeAwareAllocators.md
R clang/docs/CXXTypeAwareAllocators.rst
A clang/docs/ClangPlugins.md
R clang/docs/ClangPlugins.rst
A clang/docs/CommandGuide/index.md
R clang/docs/CommandGuide/index.rst
A clang/docs/ControlFlowIntegrity.md
R clang/docs/ControlFlowIntegrity.rst
A clang/docs/DebuggingCoroutines.md
R clang/docs/DebuggingCoroutines.rst
A clang/docs/ExternalClangExamples.md
R clang/docs/ExternalClangExamples.rst
A clang/docs/FAQ.md
R clang/docs/FAQ.rst
A clang/docs/IntroductionToTheClangAST.md
R clang/docs/IntroductionToTheClangAST.rst
A clang/docs/LibClang.md
R clang/docs/LibClang.rst
A clang/docs/LibFormat.md
R clang/docs/LibFormat.rst
A clang/docs/LibTooling.md
R clang/docs/LibTooling.rst
A clang/docs/RISCVSupport.md
R clang/docs/RISCVSupport.rst
A clang/docs/Tooling.md
R clang/docs/Tooling.rst
Log Message:
-----------
[docs] Rename selected Clang docs to Markdown (#209281)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 1514df333358c221db20f841ecdbcc217409e89f
https://github.com/llvm/llvm-project/commit/1514df333358c221db20f841ecdbcc217409e89f
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/docs/AMDGPUSupport.md
M clang/docs/APINotes.md
M clang/docs/AllocToken.md
M clang/docs/BoundsSafety.md
M clang/docs/BoundsSafetyAdoptionGuide.md
M clang/docs/BoundsSafetyImplPlans.md
M clang/docs/CIR/index.md
M clang/docs/CXXTypeAwareAllocators.md
M clang/docs/ClangPlugins.md
M clang/docs/CommandGuide/index.md
M clang/docs/ControlFlowIntegrity.md
M clang/docs/DebuggingCoroutines.md
M clang/docs/ExternalClangExamples.md
M clang/docs/FAQ.md
M clang/docs/IntroductionToTheClangAST.md
M clang/docs/LibClang.md
M clang/docs/LibFormat.md
M clang/docs/LibTooling.md
M clang/docs/RISCVSupport.md
M clang/docs/Tooling.md
Log Message:
-----------
[docs] Rewrite selected Clang docs to Markdown (#209283)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections.
I noticed that there is a large block of literal rst text in APINotes.md, but I will defer that for later cleanup.
Commit: b1cf1e5719c4673fc464083a8e93a585497a9f8b
https://github.com/llvm/llvm-project/commit/b1cf1e5719c4673fc464083a8e93a585497a9f8b
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/lib/IR/Globals.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/Utils/AssignGUID.cpp
M llvm/lib/Transforms/Utils/CloneModule.cpp
Log Message:
-----------
[NFC] rename `MD_unique_id` to `MD_guid` for consistency (#209880)
Commit: 195991885bce0b232b4f5aab16ff87d34473f464
https://github.com/llvm/llvm-project/commit/195991885bce0b232b4f5aab16ff87d34473f464
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenBuiltins/builtin-call.cpp
M clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
Log Message:
-----------
[CIR] Fix a pair of CIR Build failures: (#209896)
HLSL added a bunch of diagnostics for entry functions that messed with
the matrix test, see here:
https://github.com/llvm/llvm-project/pull/184892/
The solution is to just mark the test as a library triple.
Builtin-trap stopped translating in classic codegen, so the call after
it is now missing (and there is an unreachable after it),w hich actually
better matches our behavior see:
https://github.com/llvm/llvm-project/pull/197789
This patch fixes both tests.
Commit: bfcea5d5f5c36097963c338b3609aee93242a573
https://github.com/llvm/llvm-project/commit/bfcea5d5f5c36097963c338b3609aee93242a573
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
Log Message:
-----------
[VPlan] Add VPlan print test for expanding SCEV with AddRec (NFC). (#209886)
Commit: 1ffd509c4b109fd894f67b2f1d8159d281e0f13a
https://github.com/llvm/llvm-project/commit/1ffd509c4b109fd894f67b2f1d8159d281e0f13a
Author: Nikhil Kalra <nikhil.kalra at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/utils/TableGen/Common/GlobalISel/MatchTable/Matchers.cpp
M llvm/utils/TableGen/Common/GlobalISel/MatchTable/Matchers.h
Log Message:
-----------
[TableGen][GISel] Fix Matcher Creation for C++23 libc++ (#209783)
libc++ in C++23 mode evaluates make_unique eagerly, which requires
InstructionMatcher to be defined at the constexpr call to make_unique.
Currently, it's defined later in the file.
This patch moves the call to make_unique to the C++ file so that
InstructionMatcher is fully defined at time of instantiation.
Commit: c63bfe581cad89409e711a4c62fbf3de6cd42b40
https://github.com/llvm/llvm-project/commit/c63bfe581cad89409e711a4c62fbf3de6cd42b40
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Lower/CUDA/cuda-init.cuf
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang][cuda] Decouple CUFInit from CUDA language features (#209846)
In some cases, we do not want to emit the CUFInit function in the main.
Add a specific language feature for it so we can decouple it.
Commit: e5c19b0ebc54206348273fc2f7cf67cb195908ed
https://github.com/llvm/llvm-project/commit/e5c19b0ebc54206348273fc2f7cf67cb195908ed
Author: nitro <nitro123 at outlook.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
A bolt/test/X86/jump-table-failed-reanalysis.s
Log Message:
-----------
[BOLT] Skip function instead of aborting on jump table analysis failure (#206742)
`analyzeJumpTable()` runs twice on a candidate jump table: once from
`analyzeMemoryAt` while the referencing function is being disassembled,
and
again from `populateJumpTables()` after disassembly. The second run is
stricter,
because the check that an entry points at an instruction
(`getInstructionAtOffset`) only fires once the target function reaches
the
`Disassembled` state. A table can therefore be accepted the first time
and
rejected the second -- for instance when an entry lands at an address
with no
instruction (a symbol whose declared size is larger than its
disassembled
extent). `populateJumpTables()` reached `llvm_unreachable("jump table
heuristic
failure")` and aborted in that case.
Handle it the way BOLT already handles indirect branches it can't
analyze: drop
the table and skip the owning function(s) via `addFragmentsToSkip()`.
The
`JumpTable` is deliberately left in the maps so it is still freed by
`~BinaryContext` (an earlier attempt at this, 52cd00ca, was reverted in
468d4f6d
because it erased the table without deallocating it).
New test `jump-table-failed-reanalysis.s` builds such a table; before
this change
BOLT aborts, after it the function is skipped and the rest of the binary
is
processed normally.
Commit: f7c4b05863cd9ffdcedf95c03480f1e6198c9bb7
https://github.com/llvm/llvm-project/commit/f7c4b05863cd9ffdcedf95c03480f1e6198c9bb7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M flang-rt/lib/runtime/cudadevice.f90
Log Message:
-----------
[flang][cuda] Add PURE to time intrinsic so it can be used in DO CONCURRENT (#209901)
Commit: 1b5eb9b48dddd17b88f61f4718db357fbd2f8ed4
https://github.com/llvm/llvm-project/commit/1b5eb9b48dddd17b88f61f4718db357fbd2f8ed4
Author: Schrodinger ZHU Yifan <yfzhu at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/src/__support/freelist_heap.h
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/baremetal/CMakeLists.txt
A libc/src/stdlib/baremetal/malloc_usable_size.cpp
A libc/src/stdlib/malloc_usable_size.h
M libc/test/src/__support/freelist_heap_test.cpp
Log Message:
-----------
[libc][baremetal] expose `malloc_usable_size` from freelist heap (#208337)
Expose the `malloc_usable_size` API by reconstruct the `BlockRef` from a
pointer to the head of user payload. The operation is cheap as we only
do a query to the block header to obtain the metadata.
Assisted-by: Gemini based automation tools (human-in-the-loop)
Commit: 18d2b47a0d3b6bb5d55260e69bf51c47de8e0dc6
https://github.com/llvm/llvm-project/commit/18d2b47a0d3b6bb5d55260e69bf51c47de8e0dc6
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCObjectFileInfo.h
Log Message:
-----------
[NFC] Remove unused MCObjectFileInfo methods (#209906)
Commit: ba2be3f8add2e63266686cb1bcd40c9fab07de7b
https://github.com/llvm/llvm-project/commit/ba2be3f8add2e63266686cb1bcd40c9fab07de7b
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[Offload][AMDGPU] Make compiler-rt libs visible (#209849)
Fixed the failure in offload test after
https://github.com/llvm/llvm-project/pull/209765
Commit: b6059b6ce21886c3f8644355ae9017cf3ba04aad
https://github.com/llvm/llvm-project/commit/b6059b6ce21886c3f8644355ae9017cf3ba04aad
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetSchedule.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/X86/X86CmovConversion.cpp
A llvm/test/CodeGen/RISCV/sched-model-load-latency.ll
A llvm/test/CodeGen/RISCV/sched-model-mispredict-penalty.ll
Log Message:
-----------
[MCSched] Allow tuning LoadLatency/MispredictPenalty (#203139)
This means an existing scheduling model can be tweaked at runtime to
support an unknown processor rather than adding an entirely new model.
This is done with TargetSubtargetInfo so that specific targets can
override the relevant callbacks and the mechanism can eventually work
with LTO.
Commit: 670841415d3d5d1f85eb5859096880678967fd4e
https://github.com/llvm/llvm-project/commit/670841415d3d5d1f85eb5859096880678967fd4e
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_logpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setFunctionBreakpoints.py
Log Message:
-----------
[lldb-dap] Migrate lldb-dap tests in `lldb-dap/breakpoint` (#208166)
migrate breakpointLocations, logpoints, setBreakpoints
exceptionBreakpoints and functionBreakpoints test
Commit: f9bda52e57a759d20224cd581f73f61ee3220e74
https://github.com/llvm/llvm-project/commit/f9bda52e57a759d20224cd581f73f61ee3220e74
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/bmi.ll
M llvm/test/CodeGen/X86/bmi2.ll
Log Message:
-----------
[X86][APX] Add EVEX BMI opcodes to isDefConvertible (#209699)
To remove redundant test instructions.
Fixes: #207912
Assisted-by: Claude Sonnet 4.6
Commit: ff1a4d3c197c6210941caaa639edfa722fc8896c
https://github.com/llvm/llvm-project/commit/ff1a4d3c197c6210941caaa639edfa722fc8896c
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
A llvm/test/TableGen/CodeEmitterBaseEncodingPool.td
M llvm/test/TableGen/HwModeEncodeAPInt.td
M llvm/utils/TableGen/CodeEmitterGen.cpp
Log Message:
-----------
[TableGen] Pool duplicate code-emitter base encodings (#202619)
Pool duplicate multiword instruction base encodings across the default
encoding table and all hardware-mode encoding tables as unique `APInt`
rows, then emit a pointer-free fixed-width `uint64_t` row table and one
smallest-width opcode-to-row index table per mode. Use the pooled
representation only when the combined values and indices are smaller
than the original tables.
On a Release build, the AMDGPU base-encoding payload shrinks by 440,888
bytes, `llvm-mc` and `llc` each shrink by 445,632 bytes, and the LLVM
driver shrinks by 429,120 bytes.
All 421 TableGen tests passed.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 2ac025b406e9b62ca3ae0af42a3d9d5dc649c234
https://github.com/llvm/llvm-project/commit/2ac025b406e9b62ca3ae0af42a3d9d5dc649c234
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
Log Message:
-----------
Make Multiversion Function Resolvers set CurFn (#209918)
Commit #197789 manages to try to reference CurFn while generating a
trap, which some of the multiversion resolvers do. This patch makes sure
we set it to the resolver so we are inserting stuff into the right
places.
This somewhat shockingly causes no tests to fail, but it SHOULD stop the
UBSan failures.
Commit: f020acfd395d9094303e78c807bc168a46a783fa
https://github.com/llvm/llvm-project/commit/f020acfd395d9094303e78c807bc168a46a783fa
Author: Fei Peng <pengfei.02 at bytedance.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
Log Message:
-----------
[tsan] Add 47-bit VMA mapping for linux/aarch64 (#205949)
Add 47-bit VMA mapping to support TSan on the latest Android
emulator(16kb page size and 47 va bits).
Fixes https://github.com/llvm/llvm-project/issues/151931
Android kernel config:
https://android.googlesource.com/kernel/build/+/refs/heads/main-kernel-2026/kleaf/impl/defconfig/arm64_16k_defconfig#6
Commit: d4676e649ba86d7c389e1afe6d9ed4d8443e23ef
https://github.com/llvm/llvm-project/commit/d4676e649ba86d7c389e1afe6d9ed4d8443e23ef
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M clang/test/AST/ByteCode/builtin-object-size.cpp
Log Message:
-----------
[clang][bytecode] long double on arm64 darwin is 8 bytes (NFC) (#209930)
This test was failing on arm64 darwin targets. Generalise the #if so
that the win32 branch is also taken by arm64 darwin.
rdar://182340494
Commit: 047f12725a95425195f96b246300e782808322a3
https://github.com/llvm/llvm-project/commit/047f12725a95425195f96b246300e782808322a3
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/launch/io/DAP_launch_io.py
M lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_integratedTerminal.py
M lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_internalConsole.py
M lldb/test/API/tools/lldb-dap/launch/io/main.cpp
Log Message:
-----------
[lldb-dap] Migrate DAP io tests. (#209538)
the launch_io* tests now allow testing args, input, and environment
together.
Previously, these test configurations were mutually exclusive. They are
now combined, removing the need to create a separate test for each input
source.
Migrated Tests:
- TestDAP_io.py
- TestDAP_launch_io_integratedTerminal.py
- TestDAP_launch_io_internalConsole.py
Commit: cc79c8cdc4e7f0a8a968e1d8c5b91b14ce1e183a
https://github.com/llvm/llvm-project/commit/cc79c8cdc4e7f0a8a968e1d8c5b91b14ce1e183a
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zihintntl.c
Log Message:
-----------
[CIR][RISCV] Support Zihintntl builtins (#205468)
Include __builtin_riscv_ntl_load and __builtin_riscv_ntl_store.
Commit: 071b86797f62e827bf18e83667b0d1875a5ee446
https://github.com/llvm/llvm-project/commit/071b86797f62e827bf18e83667b0d1875a5ee446
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
A llvm/test/CodeGen/Mips/fake-use.ll
Log Message:
-----------
[Mips] Did not put fake_use into delay slot (#201537)
When compiling with -fextend-variable-liveness, the compiler generates FAKE_USE instructions that are not handled by the Mips assembly printer. This causes a fatal error: "Unsupported instruction : <MCInst 44 >" when using clang with -target mipsel-gnu-linux -Og.
The issue occurs because MipsDelaySlotFiller attempts to process FAKE_USE instructions (which are meta instructions) when searching for instructions to fill delay slots, eventually leading to the assembly printer trying to emit an unsupported instruction.
This patch fixes the crash by treating meta instructions (including FAKE_USE) the same way as debug instructions in the delay slot filler's searchRange function. Meta instructions should be skipped during delay slot filling.
Specifically, the fix:
1.Moves the terminateSearch check before debug/meta instruction checks to ensure proper search termination.
2.Adds isMetaInstruction() check alongside existing isDebugInstr() and isJumpTableDebugInfo() checks.
Fix #198835.
Commit: 1f9891c05cd1faa3c1d27af444180fe2cb5f7786
https://github.com/llvm/llvm-project/commit/1f9891c05cd1faa3c1d27af444180fe2cb5f7786
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCSchedule.h
Log Message:
-----------
[MCSchedule][NFC] Use constexpr for static constants (#209934)
Hopefully fixes a compilation error seen in llvm/llvm-project#203139.
Commit: 31b3a0ab54e21a5d38fa83bdcce3e3aa07e2cb1e
https://github.com/llvm/llvm-project/commit/31b3a0ab54e21a5d38fa83bdcce3e3aa07e2cb1e
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Target/Cpp/common-cpp.mlir
Log Message:
-----------
[mlir][emitc] Add increment and decrement ops (#208648)
Commit: 503c44707051a2c1b804013e40c26714030dfc18
https://github.com/llvm/llvm-project/commit/503c44707051a2c1b804013e40c26714030dfc18
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[CycleInfo] Drop GraphTraits and df_iterator. NFC (#209847)
depth_first uses SmallPtrSet visited-set, which is pure overhead on a
tree. Replace them with explicit child-stack walks and delete the unused
GraphTraits specializations to prevent misuse.
Commit: fc77e9da83e7b850edc336d1d6c4e4c50ff8ac43
https://github.com/llvm/llvm-project/commit/fc77e9da83e7b850edc336d1d6c4e4c50ff8ac43
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/COFFYAML.h
M llvm/include/llvm/ObjectYAML/yaml2obj.h
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/yaml2obj.cpp
A llvm/test/tools/yaml2obj/COFF/output-limit.yaml
M llvm/tools/yaml2obj/yaml2obj.cpp
Log Message:
-----------
[yaml2obj] Apply output size limit to COFF (#209695)
Route the yaml2obj max-size setting through the COFF emitter and
buffer COFF output with ContiguousBlobAccumulator. This rejects
oversized YAML descriptions consistently with ELF.
Commit: bedbc79101106c143bfee9049ba74317dfa8b417
https://github.com/llvm/llvm-project/commit/bedbc79101106c143bfee9049ba74317dfa8b417
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Inline EVL pattern into single match call in optimizeLatchExitInductionUser. NFC (#209953)
This was waiting on m_HeaderMask to be introduced at the time it was
added.
Commit: 48607d29847349a617d4416c7be820032881a5a0
https://github.com/llvm/llvm-project/commit/48607d29847349a617d4416c7be820032881a5a0
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/stdfix.rst
M libc/include/stdfix.yaml
M libc/src/__support/fixed_point/CMakeLists.txt
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/__support/fixed_point/fx_rep.h
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/divik.cpp
A libc/src/stdfix/divik.h
A libc/src/stdfix/divilk.cpp
A libc/src/stdfix/divilk.h
A libc/src/stdfix/divilr.cpp
A libc/src/stdfix/divilr.h
A libc/src/stdfix/divir.cpp
A libc/src/stdfix/divir.h
A libc/src/stdfix/diviuk.cpp
A libc/src/stdfix/diviuk.h
A libc/src/stdfix/diviulk.cpp
A libc/src/stdfix/diviulk.h
A libc/src/stdfix/diviulr.cpp
A libc/src/stdfix/diviulr.h
A libc/src/stdfix/diviur.cpp
A libc/src/stdfix/diviur.h
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/DiviFxTest.h
A libc/test/src/stdfix/divik_test.cpp
A libc/test/src/stdfix/divilk_test.cpp
A libc/test/src/stdfix/divilr_test.cpp
A libc/test/src/stdfix/divir_test.cpp
A libc/test/src/stdfix/diviuk_test.cpp
A libc/test/src/stdfix/diviulk_test.cpp
A libc/test/src/stdfix/diviulr_test.cpp
A libc/test/src/stdfix/diviur_test.cpp
Log Message:
-----------
[libc][stdfix] Implement divifx functions in LLVM libc (#206115)
Fixes #129124
Commit: 0216376fc192256a434d9eeb5c2782cdbdcdb1f6
https://github.com/llvm/llvm-project/commit/0216376fc192256a434d9eeb5c2782cdbdcdb1f6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
[clang][bytecode] Diagnose pointer subtractions of elements of different arrays (#209496)
Commit: 687fbfae778ac2953c35920fb042446ef967c239
https://github.com/llvm/llvm-project/commit/687fbfae778ac2953c35920fb042446ef967c239
Author: Alok Kumar Sharma <AlokKumar.Sharma at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/MergeFunctions.h
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
A llvm/test/Transforms/MergeFunc/merge-functions-branch-weights.ll
A llvm/test/Transforms/MergeFunc/merge-functions-reordered-blocks-branch-weights.ll
A llvm/test/Transforms/MergeFunc/merge-functions-select-weights.ll
A llvm/test/Transforms/MergeFunc/merge-functions-value-profile.ll
M llvm/unittests/Transforms/IPO/MergeFunctionsTest.cpp
Log Message:
-----------
[MergeFunctions] Preserve instruction-level profile metadata during merging (#208009)
Merge branch weights and value profile metadata when equivalent
functions are folded. Branch weights are relative, so we scale them
to absolute counts via BlockFrequencyInfo before combining. Value
profile counts are already absolute, so we just sum them directly.
Commit: 75403b0b186f492b57bcb64f4a4b1c7716b11d98
https://github.com/llvm/llvm-project/commit/75403b0b186f492b57bcb64f4a4b1c7716b11d98
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Eytzinger.h
M llvm/unittests/ADT/EytzingerTest.cpp
Log Message:
-----------
[ADT] Introduce EytzingerTable (#209343)
This patch introduces EytzingerTable, an owning container that stores
elements in a complete binary search tree formatted in Eytzinger
(breadth-first) order.
EytzingerTable::create is templated on the input container's value type,
allowing heterogeneous table construction such as building an
EytzingerTable<support::ulittle64_t> directly from a vector of native
uint64_t keys.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/7
Assisted-by: Antigravity
Commit: 6705f3d3d2e6e9a151505375ab567ec82c54a637
https://github.com/llvm/llvm-project/commit/6705f3d3d2e6e9a151505375ab567ec82c54a637
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][Modularisation][NFC] Extract commutativity and ordering helpers into SLPUtils 2/3 (#209080)
Please refer to RFC:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Move into SLPVectorizer/SLPUtils.{h,cpp} (namespace
llvm::slpvectorizer):
- UsesLimit (constant)
- isCommutative(Instruction *, Value *, bool)
- isCommutative(Instruction *) (overload)
- isCommutableOperand
- getNumberOfPotentiallyCommutativeOps
- getElementIndex
- inversePermutation
- reorderScalars
- shortBundleName (debug-only, #if !defined(NDEBUG))
- areAllOperandsNonInsts
- isUsedOutsideBlock
- doesNotNeedToBeScheduled
- doesNotNeedToSchedule
(Please note that the move is intended to be verbatim. I welcome
comments about latents issues/comment changes and any other simple
things but will take them in a separate patch.)
Assisted by Cursor.
Commit: 2b1a6e1857ccedb2f006721412177f4be45581b0
https://github.com/llvm/llvm-project/commit/2b1a6e1857ccedb2f006721412177f4be45581b0
Author: Pranav Kant <prka at google.com>
Date: 2026-07-15 (Wed, 15 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix Bazel build for 48607d2 (#209960)
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=48607d29847349a617d4416c7be820032881a5a0
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: ed0ea836f6cc029b3c8ec9b2308f5e94038dac03
https://github.com/llvm/llvm-project/commit/ed0ea836f6cc029b3c8ec9b2308f5e94038dac03
Author: WMC <tnwilly at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
A mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm-mma-fp8.mlir
Log Message:
-----------
[NVGPU] Add FP8 (e4m3/e5m2) support to nvgpu.mma.sync (#207342)
This PR is stacked on #207307
## Description
Add FP8 E4M3/E5M2 support for `nvgpu.mma.sync`, building on the
NVVM-level
support in #207307. This adds NVGPU verification and lowering support,
registers
the supported `m16n8k16`/`m16n8k32` MMA variants, and adds coverage for
NVGPU
lowering and NVVM verification.
## Test
```sh
mlir-opt mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm-fp8.mlir \
-convert-nvgpu-to-nvvm -split-input-file
```
Co-authored with Claude Sonnet 5
---------
Signed-off-by: weimin023 <tnwilly at gmail.com>
Commit: 745b946cbbf30708044b4a2c4a7726d0c02ca0de
https://github.com/llvm/llvm-project/commit/745b946cbbf30708044b4a2c4a7726d0c02ca0de
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx11.cpp
Log Message:
-----------
Revert "[clang][bytecode] Diagnose pointer subtractions of elements of different arrays" (#209969)
Reverts llvm/llvm-project#209496
Breaks the new virtual-bases.cpp test
Commit: 89a4b2f880a7b852cb9b4ff20a1e38a6b3a037a5
https://github.com/llvm/llvm-project/commit/89a4b2f880a7b852cb9b4ff20a1e38a6b3a037a5
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_select_macros.h
A libc/hdr/sys_wait_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/fd_set.h
A libc/hdr/types/struct_rusage.h
A libc/hdr/types/struct_utsname.h
M libc/src/sys/select/linux/CMakeLists.txt
M libc/src/sys/select/linux/select.cpp
M libc/src/sys/select/select.h
M libc/src/sys/utsname/linux/CMakeLists.txt
M libc/src/sys/utsname/linux/uname.cpp
M libc/src/sys/utsname/uname.h
M libc/src/sys/wait/linux/CMakeLists.txt
M libc/src/sys/wait/wait4.h
M libc/src/sys/wait/wait4Impl.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/gethostname.cpp
Log Message:
-----------
[libc] Replace sys/select.h, sys/utsname.h and sys/wait.h includes with proxy headers (#209851)
I'm replacing system includes of <sys/select.h>, <sys/utsname.h>, and
<sys/wait.h> in non-test and non-proxy code with granular proxy headers.
- add proxy headers for sys/select.h and sys/wait.h macros as well as
fd_set, struct rusage, and struct utsname types
- switch select, uname, gethostname, and wait4 internal headers and
implementations to include the proxy headers instead of system headers
- update cmake dependencies for the affected entry points
Assisted by Gemini.
Commit: 5a530a22fae4aaa41da79779cd56db57f8de55f8
https://github.com/llvm/llvm-project/commit/5a530a22fae4aaa41da79779cd56db57f8de55f8
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/include/llvm-libc-macros/netinet-in-macros.h
M libc/test/include/netinet_in_test.cpp
Log Message:
-----------
[libc] Reimplement IN6_IS_ADDR_* macros using statement expressions (#209772)
This patch fixes three issues with the previous implementation:
- the macro argument was being evaluated more than once
- casting to other types (uint32_t in particular) was an aliasing
violation
- it was casting to non-const pointers, resulting in compiler errors in
cases where the user passes a const ptr.
A statement expression fixes the first issue by using a temporary
variable. The second issue is fixed by using the appropriate members of
struct in6_addr. The last issue is fixed by dropping the cast
completely. This requires the user to pass a correctly types pointer (as
POSIX requires). Implementations keep it for compatibility with old code
passing void * and similar, but a quick survey shows that most modern
code passes the correct types. If this turns out to be an issue, we can
easily add the cast (to a const type) back.
Implementation notes:
- IN6_IS_ADDR_MULTICAST doesn't use the statement expression because the
argument is evaluated only once
- I use private helper macros (__IN6_IS_ADDR_UNSPECIFIED and
__IN6_IS_ADDR_LOOPBACK) so IN6_IS_ADDR_V4COMPAT does not nest statement
expressions
- I considered using private entrypoints (like we do with cpuset macros)
instead of statement expressions, but decided against it because these
macros are simpler and would thus result in a higher
boilerplate-to-useful-code ratio (particularly given our restriction on
calling other entrypoints)
Assisted by Gemini.
Commit: 762941070b1824ba5dc0a6b6a9e8c9dc4b5911e8
https://github.com/llvm/llvm-project/commit/762941070b1824ba5dc0a6b6a9e8c9dc4b5911e8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M orc-rt/lib/executor/StandaloneMachOUnwindInfoRegistrar.cpp
M orc-rt/lib/executor/Unix/NativeDylibAPIs.inc
M orc-rt/lib/executor/Unix/NativeMemoryAPIs.inc
M orc-rt/lib/executor/sps-ci/MemoryAccessSPSCI.cpp
M orc-rt/test/unit/AllocActionTest.cpp
M orc-rt/test/unit/CompilerTest.cpp
M orc-rt/test/unit/ErrorCAPITest.cpp
M orc-rt/test/unit/ErrorExceptionInteropTest.cpp
M orc-rt/test/unit/ErrorTest.cpp
M orc-rt/test/unit/LockedAccessTest.cpp
M orc-rt/test/unit/QueueingRunnerTest.cpp
M orc-rt/test/unit/RTTITest.cpp
M orc-rt/test/unit/SPSWrapperFunctionTest.cpp
M orc-rt/test/unit/ThreadPoolRunnerTest.cpp
M orc-rt/test/unit/WrapperFunctionBufferTest.cpp
Log Message:
-----------
[orc-rt] Close with "// namespace" consistently. NFC. (#209979)
Commit: ac067a7e1366f1a9fca74b2cb69d6b005c6b732e
https://github.com/llvm/llvm-project/commit/ac067a7e1366f1a9fca74b2cb69d6b005c6b732e
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-bf16.ll
Log Message:
-----------
[AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (#209128)
Targets with packed bf16 instructions can do a scalar bf16 fadd with a
single `v_pk_add_bf16` operating on the low half, instead of promoting
to f32 and going through `v_fma_mix_f32_bf16 + v_cvt_pk_bf16_f32`.
Commit: 76ee189f61dfbe249159ed7e0e772b50b4eb7aeb
https://github.com/llvm/llvm-project/commit/76ee189f61dfbe249159ed7e0e772b50b4eb7aeb
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/MergeFunctions.h
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
R llvm/test/Transforms/MergeFunc/merge-functions-branch-weights.ll
R llvm/test/Transforms/MergeFunc/merge-functions-reordered-blocks-branch-weights.ll
R llvm/test/Transforms/MergeFunc/merge-functions-select-weights.ll
R llvm/test/Transforms/MergeFunc/merge-functions-value-profile.ll
M llvm/unittests/Transforms/IPO/MergeFunctionsTest.cpp
Log Message:
-----------
Revert "[MergeFunctions] Preserve instruction-level profile metadata during merging" (#209987)
Reverts llvm/llvm-project#208009
Causes unit test failures.
Commit: 4ffab8581b9f35ed3934762aa9b9baf0fd84084f
https://github.com/llvm/llvm-project/commit/4ffab8581b9f35ed3934762aa9b9baf0fd84084f
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
Log Message:
-----------
[Mips] Fix test after #201537 (#209993)
Commit: ab1c8f643667ce85ec11dcfbdadac13e06291ce2
https://github.com/llvm/llvm-project/commit/ab1c8f643667ce85ec11dcfbdadac13e06291ce2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/HIPSupport.md
Log Message:
-----------
clang/HIP: Update documentation for class name (#209992)
Commit: f5dfaa6dc5e85b6fbd4eb9f7eadef3ee010894d8
https://github.com/llvm/llvm-project/commit/f5dfaa6dc5e85b6fbd4eb9f7eadef3ee010894d8
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/mul.ll
Log Message:
-----------
[InstCombine] Teach takeLog2 log2(X + 1) IIF X[0,1] -> X (#209741)
proof: https://alive2.llvm.org/ce/z/B7WjCg
Commit: 29cf2fb0116d6e13f81913440a41f577d11de664
https://github.com/llvm/llvm-project/commit/29cf2fb0116d6e13f81913440a41f577d11de664
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Fine-grained LIS updates on remat and dead-def handling (#202673)
This replaces the rematerializer's manual bulk LIS update paradigm in
favor of an automated fine-grained one that
1. performs LIS updates as rematerializations happen and
2. handles the removal of dead-definitions properly (this replaces the
prior partial handling of live interval splitting).
The new approach should be less error-prone (clients do not have to
periodically update the LIS, which is now up-to-date at all times from
the client's perspective) and faster in general (live intervals aren't
fully re-created every time a def or use of a register changes).
Handling dead-definitions (through a `LiveRangeEditor`) adds some
complexity to the rematerializer since unrematerializable MIs can now
also be deleted. This is exposed to listeners through a new event.
Furthermore, rematerializable registers can now become "permanently
dead" if all their users were unrematerializable MIs that became dead as
a result of other rematerializations.
The combination of these two improvements makes handling live-interval
splitting unnecessary. Rematerializable registers have a single-def by
construction so cannot ever have multiple disconnected components. On
the other hand, if we remove dead definitions as they appear,
unrematerializable registers's live interval cannot become made up of
multiple disconnected components purely as a result of
rematerializations. It is the rematerializer's client responsibility to
ensure that the LIS is in a valid state before the rematerializer
analyses the function.
Commit: 4536b1c44ebb54780f04e1ec992547d70a2d9700
https://github.com/llvm/llvm-project/commit/4536b1c44ebb54780f04e1ec992547d70a2d9700
Author: Mateusz Chudyk <mateusz.chudyk at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-fdiv-inlineasm-operand.mir
M llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
Log Message:
-----------
[GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-register operands
isConstantOrConstantSplatVectorFP unconditionally accessed operand 0 as
a register, which causes a crash when the instruction is INLINEASM
(whose operand 0 is the asm string, not a register def).
This can happen when matchRepeatedFPDivisor walks the use-def chain of a
G_FDIV operand and reaches an INLINEASM instruction that defines the
dividend.
Commit: 09f8509bec1fec4636c8e592dcd55a80f39f2667
https://github.com/llvm/llvm-project/commit/09f8509bec1fec4636c8e592dcd55a80f39f2667
Author: ilia-cher <30845429+ilia-cher at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
Log Message:
-----------
[AMDGPU] Fix speculative register pressure queries (#208574)
There are two issues with the way we currently speculate register
pressure:
1. GCNDownwardRPTracker::advance(with UseInternalIterator=false), which
is called by the scheduler in schedNode, resets LastTrackedMI, so the
tracker (bumpDownwardPressure) doesn't know where the last scheduled
instruction is and falls back to the beginning of the basic block. As a
result, when we estimate RP impact for a given MI, we tend to find uses
that are often already scheduled and should be skipped.
2. When looking for the remaining uses between LastTrackedMI and the
candidate MI we should skip already scheduled instruction.
Commit: ca6fe413daa538440cf47d4734051e3be7293600
https://github.com/llvm/llvm-project/commit/ca6fe413daa538440cf47d4734051e3be7293600
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[LangRef] State that the memory model is an axiomatic one (#208710)
Currently, one could read large parts of the memory model without learning for
sure whether it is meant as an operational model that describes how individual
operations change some notion of state or if it is an axiomatic model (like the
C++ memory model) that lists constraints that a candidate execution must
satisfy to be allowed.
While the description of what a read returns sounds somewhat operational,
aspects like the definition of fence instructions, the monotonic modification
order, and the total order of sequentially consistent operations place it in
the realm of axiomatic models.
This is an attempt to make the nature of the model more explicit (and maybe a
place to discuss the nature of the model), as suggested by RalfJung in the
reviews for #204329.
Commit: aa199a3bc9d4ecdf87026d4db8dbb52bffa40605
https://github.com/llvm/llvm-project/commit/aa199a3bc9d4ecdf87026d4db8dbb52bffa40605
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
Log Message:
-----------
AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (#209976)
This should always be queried from the pass manager
Co-authored-by: Claude (Claude Opus 4.8) <noreply at anthropic.com>
Commit: 2bc2229f40028c66f6fe5956659570b55133035c
https://github.com/llvm/llvm-project/commit/2bc2229f40028c66f6fe5956659570b55133035c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/DebugInfo/AMDGPU/bitcast-store-combine-debugloc.ll
M llvm/test/DebugInfo/AMDGPU/cfi.ll
M llvm/test/DebugInfo/AMDGPU/code-pointer-size.ll
M llvm/test/DebugInfo/AMDGPU/dbg-value-sched-crash.ll
M llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
M llvm/test/DebugInfo/AMDGPU/dwarfdump-relocs.ll
M llvm/test/DebugInfo/AMDGPU/heterogeneous-dwarf-cfi-directives.s
M llvm/test/DebugInfo/AMDGPU/pointer-address-space.ll
M llvm/test/DebugInfo/AMDGPU/print-reg-name.s
M llvm/test/DebugInfo/AMDGPU/variable-locations.ll
M llvm/test/DebugInfo/AMDGPU/wqm-wwm-debug-loc.ll
Log Message:
-----------
AMDGPU: Migrate DebugInfo tests to new subarch triples (58) (#209818)
Mostly mechanical by script
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 0f6a60fd6a2f54e5af99bb5c7c85e794b2ff3841
https://github.com/llvm/llvm-project/commit/0f6a60fd6a2f54e5af99bb5c7c85e794b2ff3841
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir
M llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
M llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
M llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
M llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
Log Message:
-----------
AMDGPU: Migrate MIR parser tests to new subarch triples (59) (#209819)
Mechanical migration by script.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 041149970208fd709524e3b19c6aff4b41b58813
https://github.com/llvm/llvm-project/commit/041149970208fd709524e3b19c6aff4b41b58813
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize-with-call.ll
M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize.ll
M llvm/test/tools/llvm-split/AMDGPU/declarations.ll
M llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm-debug.ll
M llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-cost-ranking.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-duplication.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-external.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect-callee-md.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-overridable.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables-noexternal.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-load-balancing.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-no-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging-weak_odr.ll
M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging.ll
M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependency-indirect.ll
M llvm/test/tools/llvm-split/AMDGPU/preserve-globals.ll
M llvm/test/tools/llvm-split/AMDGPU/recursive-search-2.ll
M llvm/test/tools/llvm-split/AMDGPU/recursive-search-8.ll
Log Message:
-----------
AMDGPU: Use amdgpu triples in llvm-split tests (60) (#209866)
Update by regex
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: dab4c918c2453cc5650563571c35c6949bf5c611
https://github.com/llvm/llvm-project/commit/dab4c918c2453cc5650563571c35c6949bf5c611
Author: roman1741941 <rdivacky at vlakno.cz>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/RegisterBankEmitter.cpp
Log Message:
-----------
[TableGen] Optimize register bank and info emission. (#208297)
Don't go via a BitVector just to a read a single value out of it.
Commit: 88acd428fd72f44312408c3fb6165992fb3b043a
https://github.com/llvm/llvm-project/commit/88acd428fd72f44312408c3fb6165992fb3b043a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/Analysis/KernelInfo/enable-kernel-info/amdgpu.test
M llvm/test/Analysis/KernelInfo/flat-addrspace/amdgpu.test
M llvm/test/Analysis/KernelInfo/launch-bounds/amdgpu.ll
M llvm/test/Analysis/KernelInfo/openmp/README.md
M llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll
Log Message:
-----------
AMDGPU: Migrate KernelInfo tests to new subarch triples (61) (#209867)
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 36d2fb92bcac253e2e1bb20b7ea7b22033027691
https://github.com/llvm/llvm-project/commit/36d2fb92bcac253e2e1bb20b7ea7b22033027691
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
Log Message:
-----------
[AMDGPU] Reject sub-dword format buffer loads and stores (#209703)
An i8 `buffer.{load,store}.format` has no corresponding hardware
instruction so diagnose it in SelectionDAG and fail legalization in
GlobalISel instead of emitting invalid format opcodes
Commit: 65d3601c44632bd0b5b90d559953cbd47442c0e2
https://github.com/llvm/llvm-project/commit/65d3601c44632bd0b5b90d559953cbd47442c0e2
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
A llvm/test/CodeGen/RISCV/short-forward-branch-opt-zibi.ll
Log Message:
-----------
[RISC-V] Make Short Forward Branches capable of matching Zibi instructions (#208637)
Add new SFB patterns to make `PseudoCCMOVGPR` capable of matching `beqi`
and `bnei`, so that it can be folded into `PseudoCC*` of `SFBALU_rr`
variants
Commit: 8a77787a526e31f48dd4d6f4cd9d68b982d8b772
https://github.com/llvm/llvm-project/commit/8a77787a526e31f48dd4d6f4cd9d68b982d8b772
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
Log Message:
-----------
Revert "[X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt`" (#210006)
Reverts #208392 - while we investigate a miscompile due to CF/ZF mismatch
Commit: bf397be011e2cecce6ca0c1d0342eef217a06059
https://github.com/llvm/llvm-project/commit/bf397be011e2cecce6ca0c1d0342eef217a06059
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/atomic.ll
A llvm/test/Assembler/invalid-load-store-atomic-elementwise.ll
A llvm/test/Bitcode/atomic-load-store-elementwise.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[IR] Add elementwise modifier to atomic loads (#204556)
Add an `elementwise` modifier to atomic loads to represent
per-element atomic semantics for fixed-vector loads.
Without the modifier, a vector atomic load remains a whole-value
atomic operation. With `elementwise`, the load behaves as if it were
expanded into one scalar atomic load per fixed-vector element, without
providing atomicity for the vector value as a whole.
Discussion:
https://discourse.llvm.org/t/rfc-add-elementwise-modifier-to-atomic-loads-and-stores/91100
Commit: 9c6a9f5fa37ffc21d4561301772bc600bd344d4c
https://github.com/llvm/llvm-project/commit/9c6a9f5fa37ffc21d4561301772bc600bd344d4c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-exit-thunks.ll
Log Message:
-----------
[CodeGen][ARM64EC] Copy first four arguments to FP registers in vararg exit thunks (#209581)
ARM64EC vararg functions receive all types of the first four arguments
in x0-x3. Because x86_64 expects floating-point arguments in FP
registers, always copy x0-x3 to d0-d3 in the exit thunks, matching
MSVC's behavior.
Commit: c012610ab9924f465baea5e62397056ea9594567
https://github.com/llvm/llvm-project/commit/c012610ab9924f465baea5e62397056ea9594567
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M cross-project-tests/CMakeLists.txt
A cross-project-tests/dtlto/remote-options.test
Log Message:
-----------
[DTLTO] Add remote compiler option forwarding coverage (#208589)
Add a cross-project DTLTO test that checks the existing LTO
configuration state serialized into the remote Clang command line. The
test uses the validate.py distributor to inspect the generated DTLTO
JSON.
Cover all the existing forwarded options.
Add paired negative checks for optional flags so the test also verifies
they are not emitted when the corresponding configuration state is not
set.
Commit: d94df008e71552fe5e07fa789bfa7f097cfdb0d9
https://github.com/llvm/llvm-project/commit/d94df008e71552fe5e07fa789bfa7f097cfdb0d9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-reduce/mir/drop-ir-references.mir
M llvm/test/tools/llvm-reduce/mir/generic-vreg.mir
M llvm/test/tools/llvm-reduce/mir/infer-triple.mir
M llvm/test/tools/llvm-reduce/mir/input-file-does-not-exist.mir
M llvm/test/tools/llvm-reduce/mir/instr-reduce-dead-def.mir
M llvm/test/tools/llvm-reduce/mir/multiple-functions.mir
M llvm/test/tools/llvm-reduce/mir/preserve-block-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-frame-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-amdgpu.mir
M llvm/test/tools/llvm-reduce/mir/preserve-max-call-frame-size.mir
M llvm/test/tools/llvm-reduce/mir/preserve-mem-operands.mir
M llvm/test/tools/llvm-reduce/mir/preserve-reg-hints.mir
M llvm/test/tools/llvm-reduce/mir/reduce-instruction-flags.mir
M llvm/test/tools/llvm-reduce/mir/reduce-instruction-unreachable-block.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-hints.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-uses-generic.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-uses.mir
M llvm/test/tools/llvm-reduce/mir/remove-frame-destroy.mir
M llvm/test/tools/llvm-reduce/mir/subreg-def0.mir
M llvm/test/tools/llvm-reduce/mir/subreg-def1.mir
M llvm/test/tools/llvm-reduce/mir/tracks-reg-liveness.mir
M llvm/test/tools/llvm-reduce/mir/undef-virt-reg.mir
Log Message:
-----------
AMDGPU: Convert llvm-reduce tests to new subarch triples (62) (#209868)
Pick arbitrary real subarch
Commit: fb2feebb64a6975f993791d86f00b085d6cd3bca
https://github.com/llvm/llvm-project/commit/fb2feebb64a6975f993791d86f00b085d6cd3bca
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
Log Message:
-----------
[RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (#209387)
A vp.merge is lowered to a PseudoVMERGE_VVM on RISC-V, and
RISCVVectorPeehole usually folds away PseudoVMERGE_VVMs when its true
operand is a binary op.
This accounts for this in the cost model and plumbs it through the loop
vectorizer. The following reduction loop was previously considered
unprofitable to vectorize, but after this change is now vectorized, and
folds away all its vp.merges:
void three_gathers(const long *a, const long *c, const long *d,
const long *b, long n, long *out) {
long s1 = 0, s2 = 0, s3 = 0;
for (long i = 0; i < n; i++) {
long j = b[i];
s1 += a[j];
s2 += c[j];
s3 += d[j];
}
out[0] = s1;
out[1] = s2;
out[2] = s3;
}
Some vp.merges have only phis for their operands which can't be folded
away, coming from FindLastIV reductions. So this extends and reuses the
VectorInstrContext hint to limit the discount when one of the operands
is a binary op.
Also see the commit message in 9e77f59005917e32f09136fa43018f471267f5bd
which mentions the vp.merge cost should be updated.
Commit: c1ba7d0aaad6baa898c6735f71a99791839a1847
https://github.com/llvm/llvm-project/commit/c1ba7d0aaad6baa898c6735f71a99791839a1847
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/virtual-bases.cpp
Log Message:
-----------
Reapply "[clang][bytecode] Diagnose pointer subtractions of elements … (#209998)
…of different arrays" (#209969)
This reverts commit 745b946cbbf30708044b4a2c4a7726d0c02ca0de.
Use only one `fold()` for the virtual base offset assertions.
The pointer subtraction _is_ invalid, but the current interpreter
doesn't diagnose it since the `LValueDesignator`s are invalid.
Commit: 2b8125c686614ffc5c5f8cde007cd6ddcf6649d8
https://github.com/llvm/llvm-project/commit/2b8125c686614ffc5c5f8cde007cd6ddcf6649d8
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/OpenCLExtensions.def
A clang/test/Misc/amdgcn.unsupported_core_3.1.cl
M clang/test/SemaOpenCL/extension-version.cl
Log Message:
-----------
[Clang][OpenCL] Promote a few extensions to OpenCL 3.1 core (#204330)
Following 6 OpenCL extensions are promoted to core features in 3.1:
https://github.com/KhronosGroup/OpenCL-Docs/commit/9fff1a87a975
- cl_khr_extended_bit_ops
- cl_khr_integer_dot_product
- cl_khr_subgroup_extended_types
- cl_khr_subgroup_rotate
- cl_khr_subgroup_shuffle
- cl_khr_subgroup_shuffle_relative
A target claiming OpenCL C 3.1 conformance without supporting one of
these features is now diagnosed.
Updated release notes for the change.
Assisted-by: Claude
Commit: adc0f685fe94e66e68698ac87a8595e878477a61
https://github.com/llvm/llvm-project/commit/adc0f685fe94e66e68698ac87a8595e878477a61
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-llvm-debuginfo-analyzer.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-adjustSchedDependency.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-revertScheduling.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-scheduleRegion.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-attributes.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-check-metadata.ll
M llvm/test/CodeGen/AMDGPU/pr155452.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-graphics-chain.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-graphics.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
Log Message:
-----------
AMDGPU: Convert tests to use subarch from triples in the file (#209869)
This set was using target triple in the source rather than command
line arguments.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 9277129afc6be0e4cf919bce1e0d2c56521af654
https://github.com/llvm/llvm-project/commit/9277129afc6be0e4cf919bce1e0d2c56521af654
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/convergent.mir
M llvm/test/CodeGen/AMDGPU/generic-targets-require-v6.ll
M llvm/test/CodeGen/AMDGPU/hsa-generic-target-features.ll
Log Message:
-----------
AMDGPU: Use subarch in tests using generic arches (#209870)
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 65180a50117244b4758e03175bed2dc34fc74f91
https://github.com/llvm/llvm-project/commit/65180a50117244b4758e03175bed2dc34fc74f91
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
Log Message:
-----------
[VPlan] Relax address constraints during stride analysis (#209168)
VPlanTransforms::convertToStridedAccesses() only handled loads whose
address was a VPWidenGEPRecipe, missing pointer-induction loops where
the address is computed differently. Analyze the address VPValue
directly so these cases are also converted to strided loads.
Fixed #207171
Commit: 9b5ad6ee5dc5139f2a156350da64a84df8145fc6
https://github.com/llvm/llvm-project/commit/9b5ad6ee5dc5139f2a156350da64a84df8145fc6
Author: 311Volt <41923095+311Volt at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M offload/liboffload/API/Program.td
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/unittests/OffloadAPI/common/Environment.cpp
M offload/unittests/OffloadAPI/common/Environment.hpp
M offload/unittests/OffloadAPI/program/olCreateProgram.cpp
Log Message:
-----------
[offload] add translation of plugin-specific error codes to Offload API ECs (#207208)
liboffload plugins would not always exhaustively map the underlying
API's error values to ol_errc_t, resulting in unintended behavior - e.g.
olCreateProgram, given an invalid binary, would return OL_ERRC_UNKNOWN
instead of OL_ERRC_INVALID_BINARY.
This patch largely eliminates the most glaring cases of this by
assigning an ol_errc_t value to every error code of the underlying API
in every plugin. The proper granularity for this mapping is per-API
call, but that is a large rework that belongs in a separate patch.
Assisted-by: Claude
Commit: 83582cfcdb4973a337195c1f59d6a3468d135434
https://github.com/llvm/llvm-project/commit/83582cfcdb4973a337195c1f59d6a3468d135434
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/c11atomics.c
Log Message:
-----------
[clang][CodeGen] Do not use atomicrmw in compound assignments with FP conversions (#209114)
Per C11 6.5.16.2p1, when the left operand of operator `+=` has atomic
type, the right shall have arithmetic type. Do not try the `atomicrmw`
fast-path when FP conversion, arithmetic and truncation are required, as
a single atomic operation may not correctly capture the combined
semantics.
Fixes: https://github.com/llvm/llvm-project/issues/208997.
Commit: 59d7709ee9352df286bfb9b7a3b97c38deae5495
https://github.com/llvm/llvm-project/commit/59d7709ee9352df286bfb9b7a3b97c38deae5495
Author: Shikhar Jain <shikharj at qti.qualcomm.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M polly/lib/Transform/DeLICM.cpp
A polly/test/DeLICM/outofquota-greedycollapse.ll
Log Message:
-----------
Bound ISL operations during DeLICM scalar collapsing (#203073)
The IslMaxOperationsGuard in DeLICM previously covered only the zone
analysis performed in computeZone(). The subsequent greedyCollapse() ->
collapseScalarsToStore() path calls computeScalarReachingOverwrite(),
which performs an unbounded ISL lexmin().
Share a single[already present], dormant IslMaxOperationsGuard across
both regions and arm it narrowly around each operation intensive
computation via IslQuotaScope, so the same operations budget covers both
computeZone() and the scalar collapsing. When the quota is exceeded
during scalar collapsing, bail out cleanly: increment DeLICMOutOfQuota
and emit an "OutOfQuota" analysis remark.
Fixes: https://github.com/llvm/llvm-project/issues/202045
Commit: ad792fafbe64b3889ffac6e06bdd2a91ab8591bb
https://github.com/llvm/llvm-project/commit/ad792fafbe64b3889ffac6e06bdd2a91ab8591bb
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
Log Message:
-----------
[SLP][NFC] Address follow-up cleanups in SLPUtils (#210016)
Follow-up to #206881, addressing deferred review comments:
- Assert VL is non-empty in allSameType before consume_front.
- Use llvm::all_of instead of std::all_of in allSameOpcode.
- Rewrite isVectorLikeInstWithConstOps as a dyn_cast + opcode switch.
---------
Co-authored-by: Antonio Frighetto <me at antoniofrighetto.com>
Commit: 20a86a2fb7a793a59d7535ceb4d0f67c07b2f10e
https://github.com/llvm/llvm-project/commit/20a86a2fb7a793a59d7535ceb4d0f67c07b2f10e
Author: 311Volt <41923095+311Volt at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M offload/unittests/OffloadAPI/program/olCreateProgram.cpp
Log Message:
-----------
[offload] fix failure of olCreateProgramTest.TruncatedBinary (#210024)
https://github.com/llvm/llvm-project/pull/207208 caused a CI failure on
openmp-offload-amdgpu-clang-flang in the
olCreateProgramTest.TruncatedBinary test.
This PR removes this test case, as it's unclear whether guarding against
such cases is worth it.
Commit: 83eac376c5dfc4e730955f37a48f24850e0b5a52
https://github.com/llvm/llvm-project/commit/83eac376c5dfc4e730955f37a48f24850e0b5a52
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/pre-fir-tree-multiway-branch.f90
M flang/test/Lower/pre-fir-tree02.f90
Log Message:
-----------
[flang][PFT] record every target of multiway branches (#210012)
The Evaluation node stored branch targets in a single `Evaluation *`
(`controlSuccessor`). `markBranchTarget` therefore silently dropped
every target after the first when lowering a computed `GO TO` or
arithmetic `IF`, so any analysis that consulted `controlSuccessor` to
enumerate branch targets saw only the first label.
Add `extraControlSuccessors` alongside
`controlSuccessor`. `markBranchTarget` still fills `controlSuccessor`
with the first target, but appends each subsequent distinct target to
`extraControlSuccessors`. Extend the PFT dumper to print the extra
targets after the first ("-> N, M, K"), so PFT dumps expose every branch
target.
Co-Authored-By: Claude Sonnet 4.6 <noreply at anthropic.com>
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 5a98e96135e223890cbf0640584e30c0db695ecf
https://github.com/llvm/llvm-project/commit/5a98e96135e223890cbf0640584e30c0db695ecf
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/test/Driver/fakeflang.F
M flang/tools/CMakeLists.txt
M flang/tools/fakeflang/CMakeLists.txt
R flang/tools/fakeflang/ensure_flang_exists.cmake
M flang/tools/fakeflang/fakeflang.cpp
M flang/tools/flang-driver/CMakeLists.txt
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
Log Message:
-----------
[Flang][CMake] Use fakeflang as dispatcher (#209482)
With #203481 where `runtimes-configure` does not depend on `flang`
anymore, the following race could happen in incremental builds: While
ninja/make builds some of the libFortran*.so libraries in a
BUILD_SHARED_LIBS=ON build, CMake tries to execute flang which tries to
load the .so libraries while they are linked. This race condition can
only happen in incremental builds because before the real bin/flang is
built completely the first time, it points to fakeflang which would be
working. Only in an incremental build, would the real bin/flang already
been built created before, pointing to the currently re-built flang.
I did not think this would be possible because CMake only needs to probe
flang once and thereafter (in the incremental build) remembers the probe
result in `CMakeFiles/<version>/CMakeFortranCompiler.cmake`. CMake does
not support changing the compiler once configured and errors-out if you
try to change `CMAKE_Fortran_COMPILER`. I do not know why/when CMake is
re-probing the compiler in some incremental builds, but has been
reported to do so in #205360.
This patch avoids any replacement of build artifacts and instead decides
in fakeflang when to call real flang or to emulate the Flang
preprocessor. The decision is made based of on the FLANG_BOOTSTRAP_PROBE
environment variable that is set only in the configure step. The feature
that allows this is unfortunately only available starting in CMake 4.2.
All suppported CMake versions before CMake 4.2 use the filename
`CMakeFortranCompilerId.F`, so make the decision based on that when
using earlier versions of CMake.
Tested with CMake 3.20, 3.28, 3.31, 4.1, and 4.2.
Fixes #205360
Commit: 57ceb12780157d68f7c14d5ed8f18bc87dc768fd
https://github.com/llvm/llvm-project/commit/57ceb12780157d68f7c14d5ed8f18bc87dc768fd
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/PDB/Native/LinePrinter.h
Log Message:
-----------
[DebugInfo][NFC] Fix PDB/Native/LinePrinter.h build warning -Wmicrosoft-unqualified-friend (#209715)
Fix build warning on Windows, which is error under -Werror: unqualified
friend declaration referring to type outside of the nearest enclosing
namespace is a Microsoft extension; add a nested name specifier
[-Wmicrosoft-unqualified-friend]
Commit: 5e4f44041d32234ea8227cbb2473173bd5edfc1c
https://github.com/llvm/llvm-project/commit/5e4f44041d32234ea8227cbb2473173bd5edfc1c
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/MC/AMDGPU/gfx13_asm_vds.s
Log Message:
-----------
[AMDGPU] Clean up GFX13 feature list (#208416)
GFX13 features were previously mostly inherited from GFX12/GFX1250.
- define an explicit gfx13 target parser feature list, including
gfx13-insts and cvt-pknorm-vop3-insts.
- remove transpose load F4/F6 support from gfx13 (previously copied from
gfx12)
Commit: 3faf46d218d3cb888c818b3e99d7e05b06ca68fa
https://github.com/llvm/llvm-project/commit/3faf46d218d3cb888c818b3e99d7e05b06ca68fa
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Session::OnCallControllerReturnFn, comments. NFC. (#210035)
Rename Session::OnCallHandlerCompleteFn to
Session::OnControllerCallReturnFn and add a comment to clarify its
purpose: This callback is used to handle retured values from calls to
the controller.
Commit: 8866215f30953c7df146276ac10753de941b1fcb
https://github.com/llvm/llvm-project/commit/8866215f30953c7df146276ac10753de941b1fcb
Author: mkovacevic99 <mkovacevic at baylibre.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm-c/Orc.h
Log Message:
-----------
[Orc] Update the comment so it doesn't mention TargetTriple argument that no longer exists (#210023)
Completes the fix for the
https://github.com/llvm/llvm-project/issues/80097
Commit: 3d87de86a24d1bff2821e4eb2f2d28e58605a394
https://github.com/llvm/llvm-project/commit/3d87de86a24d1bff2821e4eb2f2d28e58605a394
Author: Philip742 <philip.wilkinson at arm.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP in CONCAT (#209719)
Adds support to profile compliance for MXFP variants of CONCAT
Signed-off-by: Philip Wilkinson <philip.wilkinson at arm.com>
Commit: 18fc5a8adbe5dba7dc281bacdb149e95dc7dc1be
https://github.com/llvm/llvm-project/commit/18fc5a8adbe5dba7dc281bacdb149e95dc7dc1be
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (#209394)
Teach `MacroFusionPredicatorEmitter` to emit `Statistic` counters
recording how often each macro fusion is matched, and wire them
up for RISC-V.
This is based on the idea in #186499, generalized so counters are
generated automatically for any target using the emitter.
Because both the pre-RA and post-RA schedulers run MacroFusion,
a single counter would conflate the two. Counters are split into
pre-RA/post-RA variants, distinguished by the `NoVRegs` property,
addressing the double-counting concern from #186499:
```cpp
STATISTIC(NumTuneLDADDFusionPreRA, "Times TuneLDADDFusion Triggered (pre-ra)");
STATISTIC(NumTuneLDADDFusionPostRA, "Times TuneLDADDFusion Triggered (post-ra)");
...
if (SecondMI.getMF()->getProperties().hasNoVRegs())
++NumTuneLDADDFusionPostRA;
else
++NumTuneLDADDFusionPreRA;
```
Besides, RISC-V counters use the `riscv-macro-fusion` debug type.
Co-authored-by: Sam Elliott <aelliott at qti.qualcomm.com>
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
Commit: db7356dde8312a86e79ec0d7b7f844878a1a743c
https://github.com/llvm/llvm-project/commit/db7356dde8312a86e79ec0d7b7f844878a1a743c
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
M libcxx/src/new.cpp
M libcxxabi/src/stdlib_new_delete.cpp
Log Message:
-----------
[libc++] Partially revert #208330 (#209928)
We found out that the new mechanism for detecting overriden functions
does not support Arm Pointer Authentication (PAuth). Addressing this
limitation is going to require changes to Clang. In the meantime, we
switched back to the old mechanism when PAuth is enabled.
Commit: 3bf897eaac63ea4e6b8c4f77d84f833f63167e3d
https://github.com/llvm/llvm-project/commit/3bf897eaac63ea4e6b8c4f77d84f833f63167e3d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
Log Message:
-----------
[SLP][NFC]Add a test with the non-profitable instcount check across the loops, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210045
Commit: ee5cff53cf4f0c23254bda94c7249e4ea008d457
https://github.com/llvm/llvm-project/commit/ee5cff53cf4f0c23254bda94c7249e4ea008d457
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libsycl/unittests/mock/helpers.cpp
Log Message:
-----------
[libsycl] Fix mock error in unittest helper (#209726)
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 66e8cc5ec83d7ec5e506c53b11c1d22887c0c418
https://github.com/llvm/llvm-project/commit/66e8cc5ec83d7ec5e506c53b11c1d22887c0c418
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/or-non-negative.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
Log Message:
-----------
[ConstraintElim] Handle (X | Y) >s -1 as X >s -1 && Y >s -1. (#209743)
InstCombine canonicalizes X >=s 0 && Y >=s 0 as (X | Y) >=s 0. Teach
ConstraintElimination to recover the signed-positive information by
looking through compares of binary ORs.
Alive2 Proof: https://alive2.llvm.org/ce/z/sqNF8M
Compile-time impact is neutral
https://llvm-compile-time-tracker.com/compare.php?from=88acd428fd72f44312408c3fb6165992fb3b043a&to=a2aa4cacb953b32d6319939b9aee3226a7294334&stat=instructions%3Au
PR: https://github.com/llvm/llvm-project/pull/209743
Commit: 6388cfc492e82702dfc1aa965adab7e85c7ad3d8
https://github.com/llvm/llvm-project/commit/6388cfc492e82702dfc1aa965adab7e85c7ad3d8
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/reduction.ll
Log Message:
-----------
[AMDGPU] Add missing FMF flags in tests (NFC) (#210055)
The flags should be on the select, not the fcmp for nsz to have
any effect.
Commit: 424fec2368d615dff78b4167e78e9bbb06fc4214
https://github.com/llvm/llvm-project/commit/424fec2368d615dff78b4167e78e9bbb06fc4214
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/Analysis/AliasSet/memset.ll
Log Message:
-----------
[NFC][test][AliasSet] Canonicalise memset.ll's overload suffices (#210059)
The second overload suffix here corresponds to the type of the length,
the third argument, which is an i64 not an i32. Canonicalise this to
avoid confusion from inconsistency.
Whilst here, fix the whitespace used to align the arguments in the
intrinsic declarations, a remnant of losing the two characters in "i8"
when migrating to opaque pointers.
Fixes: 9f0916129024 ("[AST] Add test coverage of memsets")
Fixes: ac924305793c ("[AliasSet] Convert tests to opaque pointers
(NFC)")
Commit: 006d13e206401545c011028d85749071acdc5326
https://github.com/llvm/llvm-project/commit/006d13e206401545c011028d85749071acdc5326
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[OFFLOAD][L0][NFC] Cleanup dead code (#210060)
As we have done several refactorings lately, some dead code/data was
left behind inadvertedly. This is just cleaning it up.
Commit: 6ba12f1878384fa0d5be092b511f67e7e808772b
https://github.com/llvm/llvm-project/commit/6ba12f1878384fa0d5be092b511f67e7e808772b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
Log Message:
-----------
[X86] fold-signbit-reduction-cmp.ll - test for each x86-64 cpu level (#210051)
Commit: 26c200d88e720fa88e8692ace13a493696ac591f
https://github.com/llvm/llvm-project/commit/26c200d88e720fa88e8692ace13a493696ac591f
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN sin builtins (#197784)
Adds codegen for the following AMDGCN sin builtins:
- __builtin_amdgcn_sinf (float)
- __builtin_amdgcn_sinh (half)
- __builtin_amdgcn_sin_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.sin` intrinsic.
Commit: 8739d89c4c2475eefc4638882311515fc67f9f9b
https://github.com/llvm/llvm-project/commit/8739d89c4c2475eefc4638882311515fc67f9f9b
Author: Yuan Suo <suoyuan666 at s5n.xyz>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Introduce buildOriginFlowChain to use-after-invalidation (#208891)
After completing the implementation of `buildOriginFlowChain`, we should
integrate it into the remaining diagnostics. I started with
`use-after-invalidation` because there is already an overload of
`buildOriginFlowChain` for `UseFact`.
While testing, I noticed the following diagnostics:
```txt
test.cpp:9:23: note: result of call to 'begin<std::vector<int>>' aliases the storage of parameter 'v'
9 | auto it = std::find(std::begin(v), std::end(v), 3); // expected-warning {{parameter 'v' is later invalidated}} \
| ^~~~~~~~~~~~~
test.cpp:9:13: note: result of call to 'find<__gnu_cxx::__normal_iterator<int *, std::vector<int>>, int>' aliases the storage of parameter 'v'
9 | auto it = std::find(std::begin(v), std::end(v), 3); // expected-warning {{parameter 'v' is later invalidated}} \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
I think these diagnostics could be made clearer, but I'd prefer to
address that in a separate PR.
---------
Signed-off-by: Yuan Suo <suoyuan666 at s5n.xyz>
Commit: 19595357e32b36383a025fddaaf8c38f90658b7b
https://github.com/llvm/llvm-project/commit/19595357e32b36383a025fddaaf8c38f90658b7b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vpdpwssd.ll
Log Message:
-----------
[X86] combineAdd - remove unnecessary add(a,concat(vpmaddwd(x,y),vpmaddwd(z,w))) -> vpdpwssd(a,concat(x,z),concat(y,w)) fold (#209838)
We already handle vpmaddwd concatenation in combineConcatVectorOps - but
512-bit vpmaddwd is only available on BWI targets, which was missing
from the tests
Technically if there's a target that has AVX512VNNI but not BWI, then
this fold would be useful, but there's no such target and there's a
limit to "what if" optimisations we really need.
A small attempt at cleaning out some not very useful code from
X86ISelLowering.cpp - I'm intending to do a lot more of this for 24.x / #143088
Commit: e3d3b3b0cf3672480d6f781a9726cec1e7983d14
https://github.com/llvm/llvm-project/commit/e3d3b3b0cf3672480d6f781a9726cec1e7983d14
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/simd.h
M libc/src/__support/mathvec/CMakeLists.txt
A libc/src/__support/mathvec/acosf.h
A libc/src/__support/mathvec/acoshf.h
A libc/src/__support/mathvec/acospif.h
A libc/src/__support/mathvec/asinf.h
A libc/src/__support/mathvec/asinhf.h
A libc/src/__support/mathvec/asinpif.h
A libc/src/__support/mathvec/atanf.h
A libc/src/__support/mathvec/atanhf.h
A libc/src/__support/mathvec/cbrtf.h
M libc/src/__support/mathvec/common_constants.h
A libc/src/__support/mathvec/cosf.h
A libc/src/__support/mathvec/coshf.h
A libc/src/__support/mathvec/cospif.h
A libc/src/__support/mathvec/erff.h
A libc/src/__support/mathvec/exp10f.h
A libc/src/__support/mathvec/exp10m1f.h
A libc/src/__support/mathvec/exp2f.h
A libc/src/__support/mathvec/exp2m1f.h
M libc/src/__support/mathvec/expf.h
M libc/src/__support/mathvec/expf_utils.h
A libc/src/__support/mathvec/expm1f.h
A libc/src/__support/mathvec/log10f.h
A libc/src/__support/mathvec/log1pf.h
A libc/src/__support/mathvec/log2f.h
A libc/src/__support/mathvec/logf.h
A libc/src/__support/mathvec/rsqrtf.h
A libc/src/__support/mathvec/sinf.h
A libc/src/__support/mathvec/sinhf.h
A libc/src/__support/mathvec/sinpif.h
A libc/src/__support/mathvec/sqrtf.h
A libc/src/__support/mathvec/tanf.h
A libc/src/__support/mathvec/tanhf.h
A libc/src/__support/mathvec/tanpif.h
M libc/src/mathvec/CMakeLists.txt
A libc/src/mathvec/abi_prefix.h
A libc/src/mathvec/acosf.h
A libc/src/mathvec/acoshf.h
A libc/src/mathvec/acospif.h
A libc/src/mathvec/asinf.h
A libc/src/mathvec/asinhf.h
A libc/src/mathvec/asinpif.h
A libc/src/mathvec/atanf.h
A libc/src/mathvec/atanhf.h
A libc/src/mathvec/cbrtf.h
A libc/src/mathvec/cosf.h
A libc/src/mathvec/coshf.h
A libc/src/mathvec/cospif.h
A libc/src/mathvec/erff.h
A libc/src/mathvec/exp10f.h
A libc/src/mathvec/exp10m1f.h
A libc/src/mathvec/exp2f.h
A libc/src/mathvec/exp2m1f.h
M libc/src/mathvec/expf.h
A libc/src/mathvec/expm1f.h
M libc/src/mathvec/generic/CMakeLists.txt
A libc/src/mathvec/generic/acosf.cpp
A libc/src/mathvec/generic/acoshf.cpp
A libc/src/mathvec/generic/acospif.cpp
A libc/src/mathvec/generic/asinf.cpp
A libc/src/mathvec/generic/asinhf.cpp
A libc/src/mathvec/generic/asinpif.cpp
A libc/src/mathvec/generic/atanf.cpp
A libc/src/mathvec/generic/atanhf.cpp
A libc/src/mathvec/generic/cbrtf.cpp
A libc/src/mathvec/generic/cosf.cpp
A libc/src/mathvec/generic/coshf.cpp
A libc/src/mathvec/generic/cospif.cpp
A libc/src/mathvec/generic/erff.cpp
A libc/src/mathvec/generic/exp10f.cpp
A libc/src/mathvec/generic/exp10m1f.cpp
A libc/src/mathvec/generic/exp2f.cpp
A libc/src/mathvec/generic/exp2m1f.cpp
M libc/src/mathvec/generic/expf.cpp
A libc/src/mathvec/generic/expm1f.cpp
A libc/src/mathvec/generic/log10f.cpp
A libc/src/mathvec/generic/log1pf.cpp
A libc/src/mathvec/generic/log2f.cpp
A libc/src/mathvec/generic/logf.cpp
A libc/src/mathvec/generic/rsqrtf.cpp
A libc/src/mathvec/generic/sinf.cpp
A libc/src/mathvec/generic/sinhf.cpp
A libc/src/mathvec/generic/sinpif.cpp
A libc/src/mathvec/generic/sqrtf.cpp
A libc/src/mathvec/generic/tanf.cpp
A libc/src/mathvec/generic/tanhf.cpp
A libc/src/mathvec/generic/tanpif.cpp
A libc/src/mathvec/log10f.h
A libc/src/mathvec/log1pf.h
A libc/src/mathvec/log2f.h
A libc/src/mathvec/logf.h
A libc/src/mathvec/rsqrtf.h
A libc/src/mathvec/sinf.h
A libc/src/mathvec/sinhf.h
A libc/src/mathvec/sinpif.h
A libc/src/mathvec/sqrtf.h
A libc/src/mathvec/tanf.h
A libc/src/mathvec/tanhf.h
A libc/src/mathvec/tanpif.h
M libc/test/src/mathvec/CMakeLists.txt
A libc/test/src/mathvec/UnitTestWrappers.h
A libc/test/src/mathvec/acosf_test.cpp
A libc/test/src/mathvec/acoshf_test.cpp
A libc/test/src/mathvec/acospif_test.cpp
A libc/test/src/mathvec/asinf_test.cpp
A libc/test/src/mathvec/asinhf_test.cpp
A libc/test/src/mathvec/asinpif_test.cpp
A libc/test/src/mathvec/atanf_test.cpp
A libc/test/src/mathvec/atanhf_test.cpp
A libc/test/src/mathvec/cbrtf_test.cpp
A libc/test/src/mathvec/cosf_test.cpp
A libc/test/src/mathvec/coshf_test.cpp
A libc/test/src/mathvec/cospif_test.cpp
A libc/test/src/mathvec/erff_test.cpp
M libc/test/src/mathvec/exhaustive/CMakeLists.txt
A libc/test/src/mathvec/exhaustive/acosf_test.cpp
A libc/test/src/mathvec/exhaustive/acoshf_test.cpp
A libc/test/src/mathvec/exhaustive/acospif_test.cpp
A libc/test/src/mathvec/exhaustive/asinf_test.cpp
A libc/test/src/mathvec/exhaustive/asinhf_test.cpp
A libc/test/src/mathvec/exhaustive/asinpif_test.cpp
A libc/test/src/mathvec/exhaustive/atanf_test.cpp
A libc/test/src/mathvec/exhaustive/atanhf_test.cpp
A libc/test/src/mathvec/exhaustive/cbrtf_test.cpp
A libc/test/src/mathvec/exhaustive/cosf_test.cpp
A libc/test/src/mathvec/exhaustive/coshf_test.cpp
A libc/test/src/mathvec/exhaustive/cospif_test.cpp
A libc/test/src/mathvec/exhaustive/erff_test.cpp
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
A libc/test/src/mathvec/exhaustive/exp10f_test.cpp
A libc/test/src/mathvec/exhaustive/exp10m1f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2m1f_test.cpp
M libc/test/src/mathvec/exhaustive/expf_test.cpp
A libc/test/src/mathvec/exhaustive/expm1f_test.cpp
A libc/test/src/mathvec/exhaustive/log10f_test.cpp
A libc/test/src/mathvec/exhaustive/log1pf_test.cpp
A libc/test/src/mathvec/exhaustive/log2f_test.cpp
A libc/test/src/mathvec/exhaustive/logf_test.cpp
A libc/test/src/mathvec/exhaustive/rsqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/sinf_test.cpp
A libc/test/src/mathvec/exhaustive/sinhf_test.cpp
A libc/test/src/mathvec/exhaustive/sinpif_test.cpp
A libc/test/src/mathvec/exhaustive/sqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/tanf_test.cpp
A libc/test/src/mathvec/exhaustive/tanhf_test.cpp
A libc/test/src/mathvec/exhaustive/tanpif_test.cpp
A libc/test/src/mathvec/exp10f_test.cpp
A libc/test/src/mathvec/exp10m1f_test.cpp
A libc/test/src/mathvec/exp2f_test.cpp
A libc/test/src/mathvec/exp2m1f_test.cpp
M libc/test/src/mathvec/expf_test.cpp
A libc/test/src/mathvec/expm1f_test.cpp
A libc/test/src/mathvec/log10f_test.cpp
A libc/test/src/mathvec/log1pf_test.cpp
A libc/test/src/mathvec/log2f_test.cpp
A libc/test/src/mathvec/logf_test.cpp
A libc/test/src/mathvec/rsqrtf_test.cpp
A libc/test/src/mathvec/sinf_test.cpp
A libc/test/src/mathvec/sinhf_test.cpp
A libc/test/src/mathvec/sinpif_test.cpp
A libc/test/src/mathvec/sqrtf_test.cpp
A libc/test/src/mathvec/tanf_test.cpp
A libc/test/src/mathvec/tanhf_test.cpp
A libc/test/src/mathvec/tanpif_test.cpp
Log Message:
-----------
[libc][mathvec] Add loop over scalar for unary FP32 (#199273)
Adds all FP32 unary functions currently supported in scalar LLVM LIBM to
LIBMVEC as loop over scalars.
Includes some cleanup of existing mathvec testing infrastructure
Commit: 1cb7e838cd47ecad4050948c0c907ecb1f466ac3
https://github.com/llvm/llvm-project/commit/1cb7e838cd47ecad4050948c0c907ecb1f466ac3
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Simplify some isVALU calls. NFC. (#210057)
Commit: 122efb26893f7e214d0223615c3a4abcc0ac7796
https://github.com/llvm/llvm-project/commit/122efb26893f7e214d0223615c3a4abcc0ac7796
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/is_heap_until.h
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/ranges_is_heap_until.pass.cpp
Log Message:
-----------
[libc++] Optimize std::is_heap_until (#209141)
Fixes #208299
Commit: 6e7ff09291652cc784a095707029852e249902f9
https://github.com/llvm/llvm-project/commit/6e7ff09291652cc784a095707029852e249902f9
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Improve debug printing of regunits in SIInsertWaitcnts (#210066)
Use the standard printRegUnit helper.
Commit: c7a5b9c0ddd1a5e89a3e8b5a79a916f03e0689b7
https://github.com/llvm/llvm-project/commit/c7a5b9c0ddd1a5e89a3e8b5a79a916f03e0689b7
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/HashRecognize.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/AArch64/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/RISCV/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/X86/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[LoopIdiomRecognize] Enable clmul optimization for CRC loops (#203405)
The current `optimizeCRCLoop` function always optimizes CRC loops to use
a 256-entry Sarwate lookup table to process a byte at a time (except on
Hexagon and with optsize). However, some targets are able to process
larger chunks of CRC data with carry-less/polynomial multiplication
instructions. Implement this approach in IR for such targets using the
`llvm.clmul` intrinsic. (Only with optsize for the moment, though.)
Like the current CRC loop optimization, this does not apply to the
Hexagon target, despite it having a `pmpyw` instruction.
Assisted-by: Claude Opus 4.8
Commit: 73aa9102362f07e2f8fc537b3d2f72062d4a1e68
https://github.com/llvm/llvm-project/commit/73aa9102362f07e2f8fc537b3d2f72062d4a1e68
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
A libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
A libsycl/include/sycl/__impl/group.hpp
A libsycl/include/sycl/__impl/memory_enums.hpp
A libsycl/include/sycl/__impl/nd_item.hpp
A libsycl/include/sycl/__impl/nd_range.hpp
M libsycl/include/sycl/__impl/queue.hpp
A libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__spirv/spirv_vars.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/detail/queue_impl.cpp
A libsycl/test/basic/group.cpp
A libsycl/test/basic/group_local_id.cpp
A libsycl/test/basic/linear_sub_group.cpp
A libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/sub_group_by_value_semantics.cpp
A libsycl/test/basic/sub_group_common.cpp
M libsycl/unittests/queue/sycl_kernel_launch.cpp
Log Message:
-----------
[libsycl] Implement nd_range kernel submissions (#206505)
This PR adds core SYCL 2020 nd_range kernel submissions (including
nd_item, group, and sub_group).
Assisted with GH Copilot.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 0852ac5649a0ac6959af6fbc2e4cf6cf4bad7238
https://github.com/llvm/llvm-project/commit/0852ac5649a0ac6959af6fbc2e4cf6cf4bad7238
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCSchedule.td
M llvm/lib/Target/PowerPC/PPCSchedule440.td
M llvm/lib/Target/PowerPC/PPCScheduleA2.td
M llvm/lib/Target/PowerPC/PPCScheduleE500.td
M llvm/lib/Target/PowerPC/PPCScheduleE500mc.td
M llvm/lib/Target/PowerPC/PPCScheduleE5500.td
M llvm/lib/Target/PowerPC/PPCScheduleG3.td
Log Message:
-----------
[PowerPC] Remove itinerary IIC_LdStDCBA (#207227)
The itinerary IIC_LdStDCBA is defined and used in scheduling models, but
no instruction is assigned to it. However, since the instruction is
basically retired (not part of the portable Power ISA), and all
scheduling models model it similar to IIC_LdStDCBF, the itinerary can be
removed.
Commit: 96cab305c0402e051d16e748911bd469b4ad57fe
https://github.com/llvm/llvm-project/commit/96cab305c0402e051d16e748911bd469b4ad57fe
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/test/Assembler/callbr.ll
Log Message:
-----------
[AMDGPU] Improve amdgcn_kill verification (#208220)
Commit: 8c22bbde747ce8c577318c3fb6cafaae6f1b8aec
https://github.com/llvm/llvm-project/commit/8c22bbde747ce8c577318c3fb6cafaae6f1b8aec
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Replace lowerBuildVectorAsRV32PNarrowingShift with shuffle lowering. (#209088)
Add an implementation of isExtractSubvectorCheap for extracting
v2i16/v4i8 from a v4i16/v8i8 vector on RV32. This allows the
build_vector+extract_elt pattern to be turned into
shuffle_vector+extract_subvectors.
Assisted-by: Claude
Commit: 00674044ab7111ce25ac9a613fefeace7dff1125
https://github.com/llvm/llvm-project/commit/00674044ab7111ce25ac9a613fefeace7dff1125
Author: Benjamin Jurk <106487517+bnjmnjrk at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Add m_SpecificType(Type*) matcher (#208427)
Fixes #208401.
Commit: d333df5aeb31ecf867e1a7908a7814485f4aa7f0
https://github.com/llvm/llvm-project/commit/d333df5aeb31ecf867e1a7908a7814485f4aa7f0
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[LLDB] Print stderr in HandleStop (#208875)
There are some testcases silently fail in stopping hook without
returning anything on FreeBSD. We dump the error from the handler to
make it easier to debug.
Commit: 7fc7d8d5d2c10db1cff7f53175ad4cb158f0890d
https://github.com/llvm/llvm-project/commit/7fc7d8d5d2c10db1cff7f53175ad4cb158f0890d
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes e3d3b3b (#210068)
This fixes e3d3b3b0cf3672480d6f781a9726cec1e7983d14.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=e3d3b3b0cf3672480d6f781a9726cec1e7983d14
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 638d6736400891b03f211487ccb643a49f14f743
https://github.com/llvm/llvm-project/commit/638d6736400891b03f211487ccb643a49f14f743
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaLifetimeSafety.h
A clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.c
Log Message:
-----------
[LifetimeSafety] Add better lifetimebound fix-it spelling for C (#209967)
Use `__attribute__((lifetimebound))` as the default lifetimebound fix-it
spelling in pre-C23 C.
C++ and C23 continue to use `[[clang::lifetimebound]]` as the default
spelling.
When no explicit lifetimebound macro is configured, pre-C23 C only looks
for `__attribute__((lifetimebound))`, C++ and C23 keep looking for
`[[clang::lifetimebound]]` macros first, then
`__attribute__((lifetimebound))`.
Follow up of https://github.com/llvm/llvm-project/pull/204045
Commit: 9ec7974432975674b0128ea85a54cb3e5b0ffa75
https://github.com/llvm/llvm-project/commit/9ec7974432975674b0128ea85a54cb3e5b0ffa75
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[AMDGPU] Update libc/runtime target to use amdgpu (#210032)
Update libc/runtime targets to use "amdgpu" instead of "amdgcn". This
change is necessary to do libc testing with a
check-libc-amdgpu-amd-amdhsa target. The previous
check-libc-amdgcn-amd-amdhsa target already stopped working after
https://github.com/llvm/llvm-project/pull/209247.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: dfa1360735f5a834ce96c8c63594e2cdc3bfe0ea
https://github.com/llvm/llvm-project/commit/dfa1360735f5a834ce96c8c63594e2cdc3bfe0ea
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN cos builtins (#197806)
Adds codegen for the following AMDGCN cos builtins:
- __builtin_amdgcn_cosf (float)
- __builtin_amdgcn_cosh (half)
- __builtin_amdgcn_cos_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.cos` intrinsic.
Commit: 8f0a479f46c98e1a098319786d0848e4b9e0a98d
https://github.com/llvm/llvm-project/commit/8f0a479f46c98e1a098319786d0848e4b9e0a98d
Author: jandrovins <46629861+jandrovins at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/Instrumentor.cpp
A llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.json
A llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll
Log Message:
-----------
[Instrumentor] Fix indirect arguments on gpu targets (#209835)
When an argument is passed indirectly,
`IRTCallDescription::createLLVMCall` spills it into a temporary alloca
and passes that alloca address to the runtime call. The alloca is
created in the target's alloca address space. On GPUs it is not address
space 0, which is what the runtime expects for indirect parameters. The
alloca pointer was passed as the argument, so its type didn't match the
call's declared parameter type, causing a "bad signature" assertion in
`CallInst::init` when instrumenting GPU code that requires indirection.
The solution is therefore to cast this pointer to address space 0 before
passing it the the instrumentor call.
Commit: 689fa1d6d74a465130ad0b1705813e14d1cd5b1a
https://github.com/llvm/llvm-project/commit/689fa1d6d74a465130ad0b1705813e14d1cd5b1a
Author: Hardik Kumar <hardikxk at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/AST/CommentLexer.h
Log Message:
-----------
Fix Unintialised char *CommentLexer resulting in potential UB. (#210067)
The patch intialised the pointer to a .
Previously the pointer would have some garbage value which might have
resulted in UB.
closes #210034
Commit: f57bdc62619417a2ee9076ac05db9d115c3ba464
https://github.com/llvm/llvm-project/commit/f57bdc62619417a2ee9076ac05db9d115c3ba464
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/and-negative.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
Log Message:
-----------
[ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (#210033)
InstCombine canonicalizes X <s 0 && Y <s 0 as (X & Y) <s 0. Teach
ConstraintElimination to recover the signed-negative information by
looking through compares of binary ANDs.
Alive2 Proof: https://alive2.llvm.org/ce/z/R6DWqD
Depends on https://github.com/llvm/llvm-project/pull/209743
PR: https://github.com/llvm/llvm-project/pull/210033
Commit: c9ec54a8a781166546c1001a8bfb2448fbacda44
https://github.com/llvm/llvm-project/commit/c9ec54a8a781166546c1001a8bfb2448fbacda44
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV] Add DUMMY_REG_PAIR_WITH_X0->GPR copy to copyPhysReg. (#209964)
The register coalescer can convert (extract_subreg x0_pair, sub_gpr_odd)
to a read of DUMMY_REG_PAIR_WITH_X0. This patch treats it the same as a
copy from X0.
I don't know if this is a good long term fix, but I think it's ok for
now. I will continue to look for other options.
Commit: a5b70908d9cacd0aa1c918c920e8a6118b4340ce
https://github.com/llvm/llvm-project/commit/a5b70908d9cacd0aa1c918c920e8a6118b4340ce
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-store.ll
Log Message:
-----------
[AMDGPU] Guard more intrinsics with target features (#203956)
Commit: 53dae32b8a3e973a1677bd2745b9128741d69f59
https://github.com/llvm/llvm-project/commit/53dae32b8a3e973a1677bd2745b9128741d69f59
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libsycl/include/sycl/__impl/queue.hpp
Log Message:
-----------
[libsycl] fix nd_range template resolution (#210081)
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: d76f5249eaca89f73ff8e55783153a8376938abf
https://github.com/llvm/llvm-project/commit/d76f5249eaca89f73ff8e55783153a8376938abf
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/tools/lldb-server/lldb-gdbserver.cpp
Log Message:
-----------
[lldb][Windows] Don't let the inferior inherit the --pipe handle (#207024)
`lldb-server` writes its listening socket id to the `--pipe` handle and
then closes it. The parent process that spawned it reads the pipe until
EOF purely as a synchronization point (`"the server is now listening"`).
On Windows the inferior is launched with `bInheritHandles=TRUE` (it
needs the ConPTY handles), so it also inherited the pipe's write end.
That kept the write end open after `lldb-server` closed its own handle,
so the parent never saw EOF: it blocked until its read timeout and the
client's connection handshake timed out first.
This patch clears `HANDLE_FLAG_INHERIT` on the `--pipe` handle so the
inferior cannot keep the write end open, while leaving it valid for
lldb-server's own use.
rdar://180736036
Commit: 694c561cf73e81943395e18b2d96621baf68efe5
https://github.com/llvm/llvm-project/commit/694c561cf73e81943395e18b2d96621baf68efe5
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[CycleInfo] Store cycles in a flat preorder array. NFC (#209981)
Store cycles by value in one array in cycle-forest preorder, each cycle
immediately followed by its descendants, instead of heap-allocating each
cycle and holding its children in a std::vector<std::unique_ptr<>>.
Child and top-level iteration become pointer arithmetic that skips a
subtree via a new NumDescendants count, and sizeof(GenericCycle) drops
from 72 to 48. GenericCycleInfoCompute builds the forest with temporary
nodes, then flatten() moves it into the array.
GenericCycle still exposes raw pointers into this array. The eventual
goal is to replace them with an opaque handle, so all access goes
through GenericCycleInfo and the storage stays an implementation detail.
Aided by Fable 5
Commit: 16c6374250a465204e067b518577a2b4fd655f93
https://github.com/llvm/llvm-project/commit/16c6374250a465204e067b518577a2b4fd655f93
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M .github/workflows/llvm-abi-tests.yml
Log Message:
-----------
workflows/llvm-abi-tests: Fix typo (#209917)
Introduced by 9bd8bbb2b76c55ca83ddb6e0aa8a3a79b65706d4.
Commit: be1728c99d806654d4ce4e7ad17aa89885e8053c
https://github.com/llvm/llvm-project/commit/be1728c99d806654d4ce4e7ad17aa89885e8053c
Author: Rithik Sharma <rithiksh02 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
A clang/include/clang/CIR/Dialect/IR/CIRStdOps.td
M clang/include/clang/CIR/Dialect/Passes.h
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/IdiomRecognizer.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
A clang/test/CIR/CodeGen/func-identity-attr.c
A clang/test/CIR/CodeGen/func-identity-attr.cpp
A clang/test/CIR/IR/func-identity-attr.cir
A clang/test/CIR/Transforms/idiom-recognizer-guards-void-result.cpp
A clang/test/CIR/Transforms/idiom-recognizer-guards.cpp
A clang/test/CIR/Transforms/idiom-recognizer-inline-namespace.cpp
A clang/test/CIR/Transforms/idiom-recognizer.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/tools/cir-opt/cir-opt.cpp
Log Message:
-----------
[CIR] Add support for the IdiomRecognizer pass (#208854)
This patch adds the `IdiomRecognizer` pass, which raises calls to known
standard library functions into dedicated operations that later passes
can optimize. The implementation follows the ClangIR incubator, and
upstream had only the pass skeleton and the frontend wiring.
The pass recognizes the standard find algorithm and raises it to the new
operation `cir.std.find`. A call is raised when its callee carries the
matching identity tag, the argument count and the types line up, the
callee is not variadic, and the call is not `musttail`. LoweringPrepare
lowers the operation back to the original call with its attributes, so
behavior never changes when no transform fires.
The tag is the new `func_identity` form under the `func_info` union on
`cir.func`. It holds one entry from an enum naming the entities the
recognizer knows, so the tag itself carries no names. `CIRGen` attaches
it by the plain name, the std membership with inline namespaces looked
through, and whether the function is free, so members, static members,
operators, and functions outside std never match, while the recognizer
checks the shape of each call.
The pass reads facts from the operations alone, so the AST requirement
and its wiring are gone, the pass is registered with `cir-opt`, and a
test drives it over parsed CIR assembly.
Commit: 3736a7bed1baae7c4b461062f89ddd76f799480d
https://github.com/llvm/llvm-project/commit/3736a7bed1baae7c4b461062f89ddd76f799480d
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/docs/dil-expr-lang.ebnf
M lldb/source/ValueObject/DILEval.cpp
M lldb/test/API/commands/frame/var-dil/expr/Literals/TestFrameVarDILLiterals.py
M lldb/test/API/commands/frame/var-dil/expr/Literals/main.cpp
A lldb/test/API/commands/frame/var-dil/expr/NullptrVar/Makefile
A lldb/test/API/commands/frame/var-dil/expr/NullptrVar/TestFrameVarDILNullptrVar.py
A lldb/test/API/commands/frame/var-dil/expr/NullptrVar/main.c
Log Message:
-----------
[lldb] Add `nullptr` literal to DIL (#208831)
DIL will first attempt resolving `nullptr` as a variable, and if there
is none, `nullptr` will be resolved as a null pointer.
Commit: ab5e01593562aa25bd104118ff42192d4a6ea80f
https://github.com/llvm/llvm-project/commit/ab5e01593562aa25bd104118ff42192d4a6ea80f
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (#209990)
Move member functions off GenericCycle onto GenericCycleInfo.
GenericCycle now holds only data and the child-iterator type, and all
cycle queries go through GenericCycleInfo. This prepares replacing the
GenericCycle pointer with an opaque handle.
Aided by Claude Opus 4.8
Commit: 0d37efa88b64ee83230599c13587b06ec43e06c0
https://github.com/llvm/llvm-project/commit/0d37efa88b64ee83230599c13587b06ec43e06c0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
Log Message:
-----------
SPIRV: Fix constructing temporary TTI in SPIRVPrepareFunctions (#209977)
Passes should obtain TargetTransformInfo from the analysis manager
and never construct one. It may contain pipeline configuration state
(e.g., TargetLibraryInfo).
Co-authored-by: Claude (Claude Opus 4.8) <noreply at anthropic.com>
Commit: 4a578be311736c684214e87aa07800cd76dd2471
https://github.com/llvm/llvm-project/commit/4a578be311736c684214e87aa07800cd76dd2471
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Log Message:
-----------
PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (#209972)
PPCTTIImpl::isHardwareLoopProfitable constructed a throwaway
TargetTransformInfo only to call CodeMetrics::analyzeBasicBlock. TTI
may contain pipeline configuration state, and should only be queried
from the PassManager. It was also particularly ugly to construct one
here given that we're inside a TTIImpl.
Most of what analyzeBasicBlock computes was not used here. Directly
sum the instruction code size costs, which was the only used component
of the analysis.
Co-authored-by: Claude (Claude Opus 4.8) <noreply at anthropic.com>
Commit: 2fc864be4c7b254d61a0d2c397660951ac108cb7
https://github.com/llvm/llvm-project/commit/2fc864be4c7b254d61a0d2c397660951ac108cb7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/FuzzMutate/StrategiesTest.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.h
M llvm/unittests/Target/AMDGPU/CSETest.cpp
M llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp
M llvm/unittests/Target/AMDGPU/PALMetadata.cpp
M llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
Log Message:
-----------
AMDGPU: Use subarch triples in more unit tests (#210011)
Avoid looking up the target by the cpu name with the legacy
amdgcn name.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 49744c0cc07c85f201267d75ec064eab743270d4
https://github.com/llvm/llvm-project/commit/49744c0cc07c85f201267d75ec064eab743270d4
Author: Ron Green [NVIDIA] <rogreen at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/lib/Parser/openacc-parsers.cpp
M flang/test/Parser/acc-unparse.f90
Log Message:
-----------
[flang][OpenACC] Allow blanks around ':' in a gang-arg (#210089)
The parsers for the STATIC, DIM, and NUM forms of an OpenACC gang-arg
used the token strings "STATIC: ", "DIM: ", and "NUM: ", none of which
permit a blank between the keyword and the ':' separator. A space in a
TokenStringMatch pattern is the only place a blank is accepted in the
source (outside the leading/trailing skip), so a directive such as
!$acc loop gang(static : 1)
was rejected with "expected end of OpenACC directive", even though
free-form Fortran allows optional blanks around the separator.
Move the blank in each token string to before the ':' ("STATIC :", etc.)
so zero or more blanks are accepted on either side of the separator. The
_tok form keeps the blank optional, so the no-space spelling still
parses without a warning.
Add parser/unparse coverage for the spaced spellings of the static, dim,
and num gang arguments.
Commit: 4180e2bb885271956e80344354b046a9b4cf3031
https://github.com/llvm/llvm-project/commit/4180e2bb885271956e80344354b046a9b4cf3031
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
Log Message:
-----------
[UniformityAnalysis] Make divergent-exit cycle print order deterministic (#210107)
Once the set spills to the heap its iteration order follows allocation
addresses, so the printed order is nondeterministic.
Fix https://reviews.llvm.org/D130746 ("RFC: Uniformity Analysis for
Irreducible Control Flow")
Commit: 74dee943ac272caa4cd80a2a23c7f866dd96b4ec
https://github.com/llvm/llvm-project/commit/74dee943ac272caa4cd80a2a23c7f866dd96b4ec
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/tools/llvm-reduce/remove-funcs-inline-history.ll
M llvm/tools/llvm-reduce/deltas/ReduceFunctions.cpp
Log Message:
-----------
[llvm-reduce] Fix !inline_history verifier issues (#199373)
We'd RAUW a function which would cause !inline_history metadata nodes to
be `ptr null` which doesn't pass the verifier.
Instead we can keep around metadata usages of the function with
replaceNonMetadataUsesWith().
Commit: 8da6ab53c7533b9bc1e8eb5a2c8eaf195c45c0b3
https://github.com/llvm/llvm-project/commit/8da6ab53c7533b9bc1e8eb5a2c8eaf195c45c0b3
Author: UebelAndre <github at uebelandre.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M utils/bazel/.bazelrc
M utils/bazel/llvm-project-overlay/clang-tools-extra/include-cleaner/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/lit_test.bzl
A utils/bazel/llvm-project-overlay/llvm/utils/lit/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/utils/lit/tests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/tblgen.bzl
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Updated lit_test to work from external workspaces (#204489)
This change should not change the behavior of tests but instead ensure
that no matter where a test is run (either as an external repo or as an
overlay from `./utils/bazel`) that the rendered source paths are correct
for that context.
Commit: 202cb24d246a871e7ae0b5ebf900582d76e7a334
https://github.com/llvm/llvm-project/commit/202cb24d246a871e7ae0b5ebf900582d76e7a334
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/lib/Serialization/ASTReader.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
Log Message:
-----------
[clang][Modules] Adding Specific Diagnostics when a Finalized PCM is Out-of-date due to Input File Changes (#209857)
We have good diagnostics coverage when a pcm cannot be dropped in
`ASTReader::readASTCore`, because we call `canRecoverFromOutOfDate` to
check if the pcm is finalized or not. This check is missing for input
file changes.
This PR fixes the diagnostics, so we do not fall to the generic error
`err_module_rebuild_finalized`, which is hard to reason and act on.
Commit: a730dda7d520cff562e77efbe02b5bba470a2b36
https://github.com/llvm/llvm-project/commit/a730dda7d520cff562e77efbe02b5bba470a2b36
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/Basic/AtomicLineLogger.h
M clang/include/clang/DependencyScanning/DependencyScanningService.h
M clang/include/clang/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/DependencyScanning/InProcessModuleCache.h
M clang/include/clang/Serialization/InMemoryModuleCache.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/InMemoryModuleCache.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
A clang/test/ClangScanDeps/logging-drop-pcm.c
A clang/test/ClangScanDeps/logging-simple-by-name.c
A clang/test/ClangScanDeps/logging-simple.c
A clang/test/ClangScanDeps/logging-two-threads.c
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-scan-deps/Opts.td
M clang/unittests/Basic/AtomicLineLoggerTest.cpp
M clang/unittests/DependencyScanning/InProcessModuleCacheTest.cpp
M clang/unittests/Serialization/InMemoryModuleCacheTest.cpp
Log Message:
-----------
[clang][DependencyScanning] Logging Dependency Scanning Events (#195896)
This PR sets up an `AtomicLineLogger` (added by
https://github.com/llvm/llvm-project/pull/205395) to log the sequence of
dependency scanning events. The logging is triggered by a new `LogPath`
option in `DependencyScanningServiceOptions`. This PR adds an option
`-log-path=` to `clang-scan-deps` to trigger the log.
We are logging 16 events during dependency scanning.
| Event | Logged In | When |
|-------|-----------|------|
| `starting scanning command: <args>` | `DependencyScanningWorker.cpp` |
Start of each TU scan |
| `finished scanning command: <args>` | `DependencyScanningWorker.cpp` |
End of each TU scan |
| `init_compiler_instance_with_context: <args>` |
`DependencyScanningTool.cpp` | CompilerInstanceWithContext created for
by-name scanning |
| `start scan_by_name: <module name>` | `DependencyScanningTool.cpp` |
Start of a by-name module query |
| `finish scan_by_name: <module name>` | `DependencyScanningTool.cpp` |
End of a by-name module query |
| `module_compile_thread: parent=<TID> pcm_compile: <pcm path>` |
`CompilerInstance::compileModule` | A new thread is created to compile a
pcm |
| `timestamp_read: <pcm path>` |
`InProcessModuleCache::getModuleTimestamp` | Validation timestamp read |
| `timestamp_write: <pcm path>` |
`InProcessModuleCache::updateModuleTimestamp` | Validation timestamp
update |
| `pcm_write: <pcm path>` | `InProcessModuleCache::write` | PCM write to
disk attempted |
| `pcm_read_disk: <pcm path>` | `InProcessModuleCache::read` | PCM read
from disk attempted |
| `pcm_read_cached: <pcm path>` | `InMemoryModuleCache::lookupPCM` | PCM
looked up in in-memory cache |
| `pcm_add: <pcm path>` | `InMemoryModuleCache::addPCM` | PCM added to
cache (not validated) |
| `pcm_add_built: <pcm path>` | `InMemoryModuleCache::addBuiltPCM` | PCM
added to cache (final) |
| `pcm_finalized: <pcm path>` | `InMemoryModuleCache::finalizePCM` | PCM
marked as validated/final |
| `pcm_dropped: <pcm path>` | `InMemoryModuleCache::tryToDropPCM` | PCM
dropped (validation failed) |
| `pcm_not_dropped: <pcm path>` | `InMemoryModuleCache::tryToDropPCM` |
PCM not dropped (validation failed, but already final) |
In addition to checking the logger's functionality,
`clang/test/ClangScanDeps/logging-simple.c` checks against the change
committed by https://github.com/llvm/llvm-project/pull/177062. Without
https://github.com/llvm/llvm-project/pull/177062,
`clang/test/ClangScanDeps/logging-simple.c` fails.
This implementation adds a single instance of `AtomicLineLogger` to the
`DependencyScanningService`. Most of the plumbing goes into the
`ModuleCache` and its derived classes.
Assisted-by: claude-opus-4.6
rdar://39907408
Commit: 908b5931ce3d9630ae3b897bd4c523945038fdcd
https://github.com/llvm/llvm-project/commit/908b5931ce3d9630ae3b897bd4c523945038fdcd
Author: Nikita Terentev <svet58585 at mail.ru>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/test/CodeGen/PowerPC/builtins-ppc-fma.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fpconstrained.c
Log Message:
-----------
[NFC][Clang][PowerPC] Fix suspicious unsequenced volatile accesses in codegen tests (#199338)
When trying to add new Sema check in PR
https://github.com/llvm/llvm-project/pull/180955 some tests failed.
The following pattern is observed in these tests:
```
volatile x;
x = __builtinXXX(x, x, x);
```
For C and C++ standards order of evaluate funcall argument is
unsequence(or indeterminate sequence) and unsequence access for same
volatile variable is UB(because read volatile qualified variable is
side-effects).
As far as I undestand, unsequenced accesses is unwanted and new warning
is correct.
This PR try to fix it for tests:
```
\clang\test\CodeGen\PowerPC\builtins-ppc-fma.c
\clang\test\CodeGen\PowerPC\builtins-ppc-fpconstrained.c
```
Topics on discourse:
https://discourse.llvm.org/t/suspicious-use-volatile-qualified-variable-in-clang-codegen-tests/90837
Closed similar issue for SystemZ :
https://github.com/llvm/llvm-project/issues/186584
Commit: dd2e6e03c75918dce69e9d1f46e7b356ef31c60d
https://github.com/llvm/llvm-project/commit/dd2e6e03c75918dce69e9d1f46e7b356ef31c60d
Author: Alexander Richardson <mail at alexrichardson.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV][RVY] Fix DwarfRegAlias for X10_Y to X15_Y (#210104)
The initial commit had typos here missing the leading 1.
This was not noticed since we don't have any tests yet that
emit .cfi_offset etc.
Fixes 5eb3969c7a0b192d74bf4730f854d4cfc25a6c77
Commit: 409f15dbb1d3853fb563e6ac902a1067411c8b9f
https://github.com/llvm/llvm-project/commit/409f15dbb1d3853fb563e6ac902a1067411c8b9f
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Section.h
M lldb/source/API/SBSection.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Target/SectionLoadList.cpp
M lldb/source/Target/Target.cpp
M lldb/tools/lldb-test/lldb-test.cpp
Log Message:
-----------
[lldb] Section::GetName should return a StringRef (#209926)
Section currently owns a ConstString to hold onto its name. I plan on
changing this in the future, but first I want to remove ConstString from
its API. This commit starts with `GetName`.
Commit: 03c539c79af2d917be5f5120fb49e714d0f23101
https://github.com/llvm/llvm-project/commit/03c539c79af2d917be5f5120fb49e714d0f23101
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
Log Message:
-----------
[RISCV] Use MCRegister. NFC (#210110)
Commit: 5d99b0a9a79dd72ae45b88a7815edaf600808698
https://github.com/llvm/llvm-project/commit/5d99b0a9a79dd72ae45b88a7815edaf600808698
Author: Mauri de Souza Meneguzzo <mauri870 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Log Message:
-----------
[tsan][go]: add a128 store, load, compare_exchange (#196833)
This commit adds a128 load, store and compare_exchange to the Go
sanitizer functions. This is needed for a new Go atomic type that
operate on 16-byte values.
The SANITIZER_GO macro was gating a128 and is now lifted. Based on the
__TSAN_HAS_INT128 macro definition, the only architecture excluded by it
that intersects with [Go race support
](https://go.dev/doc/articles/race_detector#Requirements) is s390x.
For https://github.com/golang/go/issues/61236
Commit: fb908ede5170c8eadb4ff86b491ca48a23f23c17
https://github.com/llvm/llvm-project/commit/fb908ede5170c8eadb4ff86b491ca48a23f23c17
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/temp/temp.param/p10-2a.cpp
Log Message:
-----------
Add fallback type for Constrained placeholders other than plain auto. (#209893)
We were diagnosing this and leave the type in place, but that broke
invariants when
looking it up later. This patch just sets a fallback type to just the
'auto' (or a supported
type at least) instead, so that we gracefully continue.
Fixes: #208658
Commit: 55fc45605710c642cf49a732f7d96a95c120db9f
https://github.com/llvm/llvm-project/commit/55fc45605710c642cf49a732f7d96a95c120db9f
Author: Farid Zakaria <farid.m.zakaria at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Log Message:
-----------
[NFC] Refactor when selecting x86-64 EH encoding to be less prone to error (#210109)
Use a case-scoped local (EHCM) rather than mutating the object file's
code model, so only the EH encoding selection is affected.
Commit: f6ed48325939e40940fccce886e5414d26b7114e
https://github.com/llvm/llvm-project/commit/f6ed48325939e40940fccce886e5414d26b7114e
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acos.h
M libc/src/__support/math/acosbf16.h
M libc/src/__support/math/acosf.h
M libc/src/__support/math/acospif.h
M libc/src/__support/math/asin.h
M libc/src/__support/math/asin_utils.h
M libc/src/__support/math/asinbf16.h
M libc/src/__support/math/asinf.h
M libc/src/__support/math/asinpi.h
M libc/src/__support/math/asinpif.h
M libc/src/__support/math/atan2f.h
M libc/src/__support/math/atan2f16.h
M libc/src/__support/math/atan_utils.h
M libc/src/__support/math/atanf.h
R libc/src/__support/math/inv_trigf_utils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] reduce duplicated inv trig helpers (#191364)
Instead of duplicate inv trig helpers for float and double. we can unify
them when that is possible and drop inv_trigf_utils after moving helpers
to asin_utils and atan_utils. That makes everything clean.
Commit: dce66b626c98c2c85b77b6b77cef24adc4f01460
https://github.com/llvm/llvm-project/commit/dce66b626c98c2c85b77b6b77cef24adc4f01460
Author: Damian Rouson <rouson at lbl.gov>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/docs/FortranStandardsSupport.md
Log Message:
-----------
[Flang] [Docs] Update DO CONCURRENT status (#209299)
Update the documentation of
1. `reduce` locality support
2. `do concurrent` support (link to implementation details).
---------
Co-authored-by: Dan Bonachea <dobonachea at lbl.gov>
Co-authored-by: Tarun Prabhu <tarunprabhu at gmail.com>
Commit: 37cf7d04a3a7ec460aabed51a9a383d60bc63572
https://github.com/llvm/llvm-project/commit/37cf7d04a3a7ec460aabed51a9a383d60bc63572
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
A flang/test/Lower/CUDA/cuda-managed-func-result.cuf
Log Message:
-----------
[flang][cuda] Fix invalid host free of managed allocatable function results (#209945)
An allocatable function result with a CUDA data attribute is allocated
with the CUDA allocator, but the caller freed the temporary with a host
`free` (via `hlfir.destroy` → `fir.freemem`), corrupting the heap.
Release it through the CUDA-aware deallocation (`cuf.deallocate`)
instead.
Commit: 5f371b2add3e2784e6e9921b42842e2a6622e24e
https://github.com/llvm/llvm-project/commit/5f371b2add3e2784e6e9921b42842e2a6622e24e
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-flat-scratch-svs.mir
Log Message:
-----------
[AMDGPU] Fold constant offset into SV form addressing in SVS frame index fallback (#208629)
Depends on #208624 (which depends on #208612).
In the SVS fallback path of `SIRegisterInfo::eliminateFrameIndex` for
flat scratch, the scratch address was materialized by moving the full
frame offset into the scavenged vaddr VGPR and forcing the
instruction's immediate offset to `0`, which also silently dropped
any pre-existing immediate offset on the instruction.
This splits the full constant offset with `TII->splitFlatOffset`, folding
as much as possible into the SV form instruction's immediate offset
field and materializing only the remainder (plus the frame register,
if any) into the vaddr VGPR.
Test: adds `scratch_{store,load}_svs_split_offset` to
`eliminate-frame-index-flat-scratch-svs.mir` (non-zero instruction
offset, now preserved and folded) and regenerates the existing checks.
Made with [Cursor](https://cursor.com)
Resolves https://github.com/llvm/llvm-project/issues/178968
Commit: d4f4524291d734c4b3ddb55d205c6fffeefbea6a
https://github.com/llvm/llvm-project/commit/d4f4524291d734c4b3ddb55d205c6fffeefbea6a
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN exp2 builtins (#198025)
Adds codegen support for the following AMDGCN exp2 builtins:
- __builtin_amdgcn_exp2f (float)
- __builtin_amdgcn_exp2_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.exp2` intrinsic.
Commit: 4c50e41095b36cfa2e362a4f1990c4df59533836
https://github.com/llvm/llvm-project/commit/4c50e41095b36cfa2e362a4f1990c4df59533836
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/src/mathvec/abi_prefix.h
Log Message:
-----------
[libc][mathvec] Fix missing ABI-prefix from causing errors (#210127)
abi_prefix.h throws errors for unsupported ABI targets. This patch
modifies that behaviour to instead fall back onto a default
naming scheme instead, as to not break non-vfabi supporting targets.
Commit: 6563d2500c82deb27c7dab9bc17334de777f8cbc
https://github.com/llvm/llvm-project/commit/6563d2500c82deb27c7dab9bc17334de777f8cbc
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_internal.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_symbolizer_test.cpp
Log Message:
-----------
[sanitizer_common] fix shadowed ret hiding symbolizer read failures. (#209971)
The inner `bool ret` from ReadFromFile shadowed the outer one that is
returned, so a dead/closed symbolizer (0-byte read or read error) was
reported as success: SendCommand never restarted the crashed process,
and the addr2line path aborted on a CHECK over an empty buffer.
Regression from acfeb1a6c244. Add a regression test that feeds an EOF fd
through ReadFromSymbolizer and expects failure.
Commit: e1fa984ae0a87cf6de3b656496ced466b35995c0
https://github.com/llvm/llvm-project/commit/e1fa984ae0a87cf6de3b656496ced466b35995c0
Author: Mariusz Borsa <wrotki at msn.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A compiler-rt/test/asan/TestCases/Darwin/atos-canary-symbolize.cpp
Log Message:
-----------
[Sanitizers][Darwin] Add atos-canary test (#209338)
We've observed tests using atos symbolizer ocasionally failing for
several test runs on x86_64 machines, then stabilizing again. We were
unable to reproduce
this with local builds, so it's unclear what the root cause is.
To help investigate similar failures in the future, we're adding a test
exercising atos itself. Should atos start to fail again, this test
should fail too, and provide way more info helping debugging than other
tests do
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
---------
Co-authored-by: Mariusz Borsa <m_borsa at apple.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 5fc5c2e4cde7ca12cbbd3868a8c24e0bbfcf570a
https://github.com/llvm/llvm-project/commit/5fc5c2e4cde7ca12cbbd3868a8c24e0bbfcf570a
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
A clang/test/CodeGenCXX/msvc-global-delete-forwarding-at-delete-site.cpp
M clang/test/CodeGenCXX/msvc-global-delete-scalar-array-split.cpp
M clang/test/CodeGenCXX/msvc-global-delete-scope-no-dtor.cpp
M clang/test/CodeGenCXX/msvc-no-global-delete-forwarding.cpp
Log Message:
-----------
[clang][win] Fix __global_delete wrappers for Arm64EC and cross-TU ::delete (#209585)
PR #188372 made Clang's MSVC-ABI deleting-destructor path route global
deletes
through compiler-generated __global_delete / __global_array_delete
wrappers
instead of referencing ::operator delete directly. This lets a deleting
destructor be emitted in environments (e.g. kernel mode) where no global
::operator delete exists: each wrapper defaults to a trapping
__empty_global_delete fallback, and a real forwarding body that calls
::operator delete is materialized only when the program actually uses
::delete.
This change refines how those wrappers and their fallbacks are emitted,
fixing
two problems that made the #188372 mechanism fail in practice.
New behavior:
- The trapping fallback is now emitted as a weak GlobalAlias to
__empty_global_delete rather than via an /alternatename directive. This
lowers
to a COFF weak-external-with-default -- exactly what MSVC emits -- so a
real
__global_delete defined in any TU overrides the fallback in every other
TU at
link time.
- A ::delete expression now registers the wrapper for its resolved
global
operator delete directly (in EmitCXXDeleteExpr), so the strong
forwarding body
is emitted in that TU regardless of where the class's deleting
destructor is
defined. This matches MSVC, which emits the forwarder at every ::delete
site.
Bugs fixed:
1. Arm64EC (miscompile -> LNK2019). /alternatename only names the plain
symbol,
not the backend-generated "$$h" hybrid EC symbol referenced by the exit
thunk, so Arm64EC images left __global_delete$exit_thunk unresolved. The
weak
GlobalAlias correctly produces the "$$h" symbol, exit thunk, and plain
alias
(verified on both x64 and Arm64EC).
2. Cross-TU ::delete (runtime crash). Previously the forwarding body was
only
emitted in a TU that *both* emitted a matching vector deleting
destructor and
contained a ::delete. A TU that only performed `::delete p` -- with the
class
defined elsewhere -- emitted no forwarder, so nothing overrode the
weak-alias
trap and the program executed a trapping __empty_global_delete at
runtime
(STATUS_ILLEGAL_INSTRUCTION). Registering the wrapper at the ::delete
site
fixes this.
To share wrapper-creation logic between the deleting-destructor path and
the
delete-expression path, getOrCreateMSVCGlobalDeleteWrapper is promoted
from a
static helper in CGClass.cpp to a CodeGenModule method.
Verified end-to-end: a weak alias in one TU and a strong forwarder in
another
resolve to the forwarder under both lld-link and MSVC link.exe, and the
previously-crashing delete-only TU now runs cleanly.
Commit: db43e54c966ce9146a05bc0e8cb1550f65f89e35
https://github.com/llvm/llvm-project/commit/db43e54c966ce9146a05bc0e8cb1550f65f89e35
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/reproducer-remarks.ll
M llvm/test/Transforms/ConstraintElimination/trunc.ll
Log Message:
-----------
[ConstraintElim] Add trunc nuw support to condition checks (#209844)
Adding support for trunc nuw %x to i1 by using the m_ICmpLike pattern in
conditions the same way as icmp ne %x, 0
proof: https://alive2.llvm.org/ce/z/ZyDWZ2
Commit: da6f3e6cc2565e4c6cf720931845c8eee132ce86
https://github.com/llvm/llvm-project/commit/da6f3e6cc2565e4c6cf720931845c8eee132ce86
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
A llvm/test/CodeGen/Hexagon/rdfopt-liveins-hang.mir
Log Message:
-----------
[Hexagon] Fix HexagonRDFOpt hang during live-in recomputation (#209986)
After HexagonRDFOpt, the compiler recomputed live-in registers for every
block in one batch. On large inputs (e.g. kernel builds) this was slow,
and on some functions each pass changed the live-in values of other
blocks, triggering more passes until the compiler hung (PR #207422).
Fix: process blocks one at a time in post-order (successors before
predecessors) and stop as soon as nothing changes. Add a pass limit as a
safety net to keep compile time bounded in all cases.
Commit: c0b8c59b65afd268f286f56ef71f6433ac47dfd1
https://github.com/llvm/llvm-project/commit/c0b8c59b65afd268f286f56ef71f6433ac47dfd1
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M compiler-rt/lib/memprof/memprof_allocator.cpp
A compiler-rt/test/memprof/TestCases/memprof_histogram_tail_clear.cpp
A compiler-rt/test/memprof/TestCases/memprof_nonhistogram_tail_clear.cpp
Log Message:
-----------
[compiler-rt][memprof] clear histogram tail granule on allocation. (#208911)
ClearShadow rounded the size down, leaving the partial tail counter
(ceil(size/8)-th) uncleared, so a recycled chunk leaked a stale count
into the last histogram bucket. Round up instead.
Commit: e59415baa96d15415a230d1c438c722dca71516e
https://github.com/llvm/llvm-project/commit/e59415baa96d15415a230d1c438c722dca71516e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
[SLP][NFC]Add tests with incorrect nsw propagation in shl/mul, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210145
Commit: 909ba8d3508cf7177da65a4d1399f7bc5a3a4b98
https://github.com/llvm/llvm-project/commit/909ba8d3508cf7177da65a4d1399f7bc5a3a4b98
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
Log Message:
-----------
[AMDGPU] Select upper 16-bits for inline constants in packed BF16 (#209861)
>From gfx1250 software programming guide, v_pk_*_bf16 instructions using
inline constants must use OPSEL to select the upper 16-bits.
Fixes: LCOMPILER-2445
Commit: 8116ab2889d74f25b8c5c0f0dbd7f6bb3aabfc8c
https://github.com/llvm/llvm-project/commit/8116ab2889d74f25b8c5c0f0dbd7f6bb3aabfc8c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/sincos.ll
Log Message:
-----------
[InstCombine] Use getInsertionPointAfterDef to get sin/cos InsertPt. (#210130)
The current logic added in
https://github.com/llvm/llvm-project/pull/194616
picks an incorrect insert point for the argument is an invoke.
Use getInsertionPointAfterDef and bail out if there is no such insert
point.
Fixes crashes in the added tests.
Fixes https://github.com/llvm/llvm-project/issues/210111
Commit: 85cc99660cf051157f0ce50e3a976312b1f829bd
https://github.com/llvm/llvm-project/commit/85cc99660cf051157f0ce50e3a976312b1f829bd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
[SLP]Drop nsw when shl by BW-1 is converted to mul
shl nsw X, BW-1 is valid at X = -1, but mul X, INT_MIN is not nsw-safe
there. Drop nsw on the vector mul when a shl lane with shift amount
BW-1 is unified into mul during opcode interchange.
Fixes #210093
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210152
Commit: e78a880505ca0c9ed102fc48100b4cdb280f4e34
https://github.com/llvm/llvm-project/commit/e78a880505ca0c9ed102fc48100b4cdb280f4e34
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Make undef vectors Legal. (#210106)
Add a few additional isel patterns to avoid false dependencies. We may
want to enable the BreakFalseDep pass in the future.
Commit: 152fdb8ae8725dab7e529c5cedec1d5151506307
https://github.com/llvm/llvm-project/commit/152fdb8ae8725dab7e529c5cedec1d5151506307
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
Log Message:
-----------
[OpenACC] emit NYI for multi-rank or non-memref type array reduction (#210143)
This should be an NYI and not an assertion
Commit: 1387002dc6bee9b9f4b430afebc4141a0f603bb1
https://github.com/llvm/llvm-project/commit/1387002dc6bee9b9f4b430afebc4141a0f603bb1
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseStmt.cpp
Log Message:
-----------
[Clang][NFC] Update diagnostic handling for C2y compatibility in parser (#209920)
Follow-up on #198244 after #209241
Commit: a11e3727f82f1395e7554f348c76a9af5f05b0b5
https://github.com/llvm/llvm-project/commit/a11e3727f82f1395e7554f348c76a9af5f05b0b5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Remove redundant shuffle lowering for packed widening high-half convert. (#210128)
The more general lowerVECTOR_SHUFFLEAsPZip can handle this case.
Commit: d9d1d919de92b1086b583168b4edccfa19bc854d
https://github.com/llvm/llvm-project/commit/d9d1d919de92b1086b583168b4edccfa19bc854d
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
Log Message:
-----------
[OFFLOAD][L0] Don't return error on initImpl if library/drivers are missing (#210083)
When a Level Zero driver is not present in the environment the current
behavior makes olInit fail if the level_zero plugin is requested. This
changes the behavior to match other plugins where it doesn't fail but
return 0 supported devices.
Commit: 44e3f3cb248de5c1a071182367ee719baf3683df
https://github.com/llvm/llvm-project/commit/44e3f3cb248de5c1a071182367ee719baf3683df
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
Log Message:
-----------
[CIR] Fix use-after-free when emitting ternary with a throw-expression arm (#208850)
Fixes #208848.
When a conditional operator arm is a noreturn expression, such as
`throw`, `VisitAbstractConditionalOperator` saved an insertion point in
the empty dead-code block created after the expression. The intent was
to insert a `cir.yield` later, once the types of both arms were known.
However, `LexicalScope::cleanup()` removes that empty block when the
arm’s scope exits, leaving the deferred insertion point with a dangling
block pointer.
Avoid saving the insertion point for noreturn arms. These regions
already terminate with `cir.unreachable` and do not require a
`cir.yield`. The CIR verifier accepts ternary regions that terminate
with `cir.unreachable`.
Extended `ternary-throw.cpp` with scalar-rvalue cases covering `throw`
in either arm and in both arms. The existing tests only covered glvalue
conditionals, which take the LValue emission path and never reach this
code.
Commit: b74a97cae97a7732df5bcdef3d09f08a2e586468
https://github.com/llvm/llvm-project/commit/b74a97cae97a7732df5bcdef3d09f08a2e586468
Author: firmiana <firmiana402 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Produce generic results for DWARF relational operations (#210122)
DWARF relational operations produce a generic result, whose width is the
target address size. LLDB currently assigns the C++ `bool` comparison
result directly to `Scalar`; because `Scalar` has no `bool` constructor,
this creates a 32-bit integer even on 64-bit targets.
The stricter binary operand checks added in #201288 exposed this in
x86-64 `_sigtramp` CFI. A later `DW_OP_plus` combines a 64-bit generic
address with the 32-bit relational result, so evaluation fails and
signal-frame unwinding stops. The generic-operand relaxation in #209641
does not cover this case because the relational result is narrower than
the address size.
Convert the results of `DW_OP_eq`, `DW_OP_ge`, `DW_OP_gt`, `DW_OP_le`,
`DW_OP_lt`, and `DW_OP_ne` through the existing `to_generic` helper.
## Testing
Add a unit test that evaluates each relational opcode with an 8-byte
address size and then consumes its result with `DW_OP_plus`.
Commit: 5b46dcf59375181dee1fbd6e1d1cdb3f0c8f5289
https://github.com/llvm/llvm-project/commit/5b46dcf59375181dee1fbd6e1d1cdb3f0c8f5289
Author: Ilya Leoshkevich <iii at linux.ibm.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/DWP/DWP.h
M llvm/lib/DWP/DWP.cpp
A llvm/test/tools/llvm-dwp/SystemZ/big_endian_info_v5.s
M llvm/test/tools/llvm-dwp/X86/compress.test
Log Message:
-----------
[llvm-dwp] Fix endianness issues (#203424)
llvm-dwp fails on SystemZ, which is big-endian, as follows:
$ cat min.c
int main() {}
$ clang -g -O0 -gsplit-dwarf min.c -o min
$ llvm-dwp -e min -o min.dwp
error: compile unit exceeds .debug_info section range: 905969668 >= 58
This is because it hardcodes IsLittleEndian=true in multiple places. Fix
by forwarding endianness of the current object file.
Add a SystemZ-specific test.
Add proper big-endian support to X86/compress.test and add an
explanation regarding what the hardcoded blobs are and how they are
generated.
Commit: c9a9737dee777f5fe19131911e8ca3c8ca3c7031
https://github.com/llvm/llvm-project/commit/c9a9737dee777f5fe19131911e8ca3c8ca3c7031
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A lld/docs/DTLTO.md
R lld/docs/DTLTO.rst
A lld/docs/ELF/large_sections.md
R lld/docs/ELF/large_sections.rst
A lld/docs/ELF/linker_script.md
R lld/docs/ELF/linker_script.rst
A lld/docs/ELF/start-stop-gc.md
R lld/docs/ELF/start-stop-gc.rst
A lld/docs/ELF/warn_backrefs.md
R lld/docs/ELF/warn_backrefs.rst
A lld/docs/MachO/index.md
R lld/docs/MachO/index.rst
A lld/docs/MachO/ld64-vs-lld.md
R lld/docs/MachO/ld64-vs-lld.rst
A lld/docs/NewLLD.md
R lld/docs/NewLLD.rst
A lld/docs/ReleaseNotes.md
R lld/docs/ReleaseNotes.rst
A lld/docs/WebAssembly.md
R lld/docs/WebAssembly.rst
A lld/docs/error_handling_script.md
R lld/docs/error_handling_script.rst
A lld/docs/index.md
R lld/docs/index.rst
A lld/docs/missingkeyfunction.md
R lld/docs/missingkeyfunction.rst
A lld/docs/windows_support.md
R lld/docs/windows_support.rst
Log Message:
-----------
[docs] Rename LLD docs to Markdown (#209894)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: f8107f628360eb0c7c4a04af98e768ffa637c1b3
https://github.com/llvm/llvm-project/commit/f8107f628360eb0c7c4a04af98e768ffa637c1b3
Author: Tim Corringham <timothy.corringham at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/Textures-AST.hlsl
M clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
M clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
M clang/test/SemaHLSL/Resources/RWTexture2D-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/RWTexture2D-unsupported-methods-errors.hlsl
M clang/test/SemaHLSL/Resources/Textures-GetDimensions.hlsl
M clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
Log Message:
-----------
[HLSL] Implement RWTexture2DArray (#208725)
Add front-end support for RWTexture2DArray, and update related tests to
include coverage of this resource.
Fixes #194947
---------
Co-authored-by: Tim Corringham <tcorring at amd.com>
Commit: ab35099249433e55ba586285c2087d0bd7f65e9c
https://github.com/llvm/llvm-project/commit/ab35099249433e55ba586285c2087d0bd7f65e9c
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lld/docs/DTLTO.md
M lld/docs/ELF/large_sections.md
M lld/docs/ELF/linker_script.md
M lld/docs/ELF/start-stop-gc.md
M lld/docs/ELF/warn_backrefs.md
M lld/docs/MachO/index.md
M lld/docs/MachO/ld64-vs-lld.md
M lld/docs/NewLLD.md
M lld/docs/ReleaseNotes.md
M lld/docs/WebAssembly.md
M lld/docs/conf.py
M lld/docs/error_handling_script.md
M lld/docs/index.md
M lld/docs/missingkeyfunction.md
M lld/docs/windows_support.md
Log Message:
-----------
[docs] Rewrite LLD docs to Markdown (#209897)
Tracking issue: #201242
This is a stacked PR based on #209894 , which will be a standalone
commit that renames *.rst -> *.md before this PR lands for history
preservation purposes. See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections. Please spot check my work and approve if it looks good.
Commit: d49307497bbf9f49e6a603c605319dc39113c51c
https://github.com/llvm/llvm-project/commit/d49307497bbf9f49e6a603c605319dc39113c51c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Register allocator when cuf.allocate or cuf.deallocate are present (#210147)
Commit: fe616e4d87cfbce9317537aa95e6068ac103a373
https://github.com/llvm/llvm-project/commit/fe616e4d87cfbce9317537aa95e6068ac103a373
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/alloca.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/alloca-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/alloca_test.cpp
Log Message:
-----------
[libc] Implement alloca.h header (#210150)
Implemented the alloca.h header for LLVM libc.
* libc/include/llvm-libc-macros/alloca-macros.h: Defined alloca macro
using __builtin_alloca.
* libc/include/alloca.yaml: Added header specification.
* libc/include/CMakeLists.txt,
libc/include/llvm-libc-macros/CMakeLists.txt: Registered the new header
and macro targets.
* libc/config/linux/*/headers.txt: Enabled the header for Linux targets
(x86_64, aarch64, arm, i386, riscv).
* libc/test/include/alloca_test.cpp, libc/test/include/CMakeLists.txt:
Added and registered functional unit tests.
Tested by running the new unit and hermetic tests.
Assisted-by: Automated tooling, human reviewed.
Commit: c96a176dd15690ed8181c6764b26d0303008a40f
https://github.com/llvm/llvm-project/commit/c96a176dd15690ed8181c6764b26d0303008a40f
Author: Mauri de Souza Meneguzzo <mauri870 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interface.h
Log Message:
-----------
[tsan] Enable __TSAN_HAS_INT128 on s390x and mips64 (#197319)
The s390x exclusion was added in
https://github.com/llvm/llvm-project/commit/b17673816d7f65e07015489993b22049e36b04db
(https://reviews.llvm.org/D105629)
citing lack of hardware 128-bit atomics. s390x does have the CDSG
instruction,
but `alignof(__int128) == 8` on the s390x psABI while CDSG requires
16-byte
alignment, so Clang does not define
`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16` for
this target. The mips64 exclusion has been present since
`__TSAN_HAS_INT128` was
introduced in
https://github.com/llvm/llvm-project/commit/06bbca9ec4bbc5a103c94c4973797ea4ddf944b5
(https://reviews.llvm.org/D18543) with no documented
rationale. Clang similarly does not define
`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16`
for mips64.
Both exclusions are unnecessary. When
`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16` is
not defined, all a128 operations use the SpinMutex-based emulation path,
which
serializes 128-bit accesses under a global lock without requiring any
hardware
CAS16 support.
Verified with Clang (targets: s390x-linux-gnu, mips64-linux-gnuabi64,
mips64el-linux-gnuabi64): all three produce the full set of 12
`__tsan_atomic128_*` symbols with zero `__sync_*_16 / __atomic_*_16`
libcall references.
Runtime testing has not been performed as I lack access to these
architectures.
Relates https://github.com/llvm/llvm-project/pull/196833
For https://github.com/golang/go/issues/61236
Commit: 58db4cea87114268cca4c2957232de7db9327ceb
https://github.com/llvm/llvm-project/commit/58db4cea87114268cca4c2957232de7db9327ceb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
Log Message:
-----------
[SLP][NFC]Add a test with GEPs under the same select condition, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210173
Commit: 7cfe30df768f109dbaead1ed5f7538c10ba65d2e
https://github.com/llvm/llvm-project/commit/7cfe30df768f109dbaead1ed5f7538c10ba65d2e
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/docs/TableGen/ProgRef.rst
M llvm/lib/TableGen/Record.cpp
M llvm/test/TableGen/true-false.td
Log Message:
-----------
[TableGen] Short-circuit !cond operator (#208942)
Fixes #163213
TableGen `!cond` operator currently resolves all subsequent conditions
and values even if it already found a condition that resolves to `true`.
This change short-circuits on the first `true` resolution found
iterating from left to right. It folds a new `CondOpInit` with only the
conditions and values that have already been resolved, including the
current condition and value.
Commit: f6f08fa7e5d56aa07f9ebc51500f2c9fd6df8e1b
https://github.com/llvm/llvm-project/commit/f6f08fa7e5d56aa07f9ebc51500f2c9fd6df8e1b
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
Log Message:
-----------
[flang][cuda] Use managed allocation for saved locals (#210133)
Example:
```fortran
subroutine work
real, allocatable, save :: q(:)
allocate(q(10))
end
```
`SAVE` gives the local allocatable descriptor static storage. Implicitly
attributing it as Unified causes allocation to look it up as a
registered CUDA global, but no device symbol is registered for the
descriptor.
Fix: use Managed attribution for saved subprogram-local allocatables and
pointers, avoiding the invalid CUDA symbol lookup.
Commit: aaa4ebd2ad174920ddce67c4641292a44788e879
https://github.com/llvm/llvm-project/commit/aaa4ebd2ad174920ddce67c4641292a44788e879
Author: John Paul Jepko <john.jepko at ericsson.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/pr22954.c
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/warn-fortify-source.c
A clang/test/Sema/warn-stringop-overread-fortify.c
A clang/test/Sema/warn-stringop-overread.c
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
Log Message:
-----------
[Clang][Sema] Reland -Wstringop-overread with computeDependence fix (#208012)
Reland #183004 and follow-up #205201 (reverted in #207840) which adds `-Wstringop-overread` to warn when memory functions `memcpy`, `memmove`, `memcmp`, and other related builtins read more bytes than the source buffer size.
The revert was due to a crash when a memory function is called on `&x` where `x` is a static constexpr local inside a template. The original PR exposed a bug in `computeDependence(UnaryOperator*)` where only the value-dependence bit is set for this case, when the instantiation-dependence bit should also be set. This is the root cause behind the crash.
Fix `computeDependence` to properly set both value and instantiation-dependence bits, and add a regression for this crash via `warn-stringop-overread.c`.
Commit: 68f703f3e58a52c41b39dfc654a675560b6c5614
https://github.com/llvm/llvm-project/commit/68f703f3e58a52c41b39dfc654a675560b6c5614
Author: Daniel Kiss <daniel.kiss at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/docs/UsersManual.md
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/AArch64/branch-protection-attr.c
M clang/test/CodeGen/AArch64/sign-return-address.c
M clang/test/Driver/aarch64-security-options.c
M clang/test/Preprocessor/aarch64-target-features.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
M llvm/test/CodeGen/AArch64/sign-return-address.ll
A llvm/test/CodeGen/AArch64/windows-pac-invalid-a-key.ll
M llvm/test/CodeGen/AArch64/wineh-bti.ll
Log Message:
-----------
[AArch64][COFF] Branch-protection=standard/pac-ret means "b-key" on Windows (#203989)
On AArch64 Windows the `B-key` is the only supported key for userspace,
let's make "standard" and "pac-ret" options generate "b-key".
Fixes: #203852
Commit: 95ff1fa00ed4c35b3589fa92b591e02444fcc5d5
https://github.com/llvm/llvm-project/commit/95ff1fa00ed4c35b3589fa92b591e02444fcc5d5
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/uaddsat.ll
Log Message:
-----------
[AMDGPU] Lower uniform uaddsat.i32 to SALU insts (#210168)
Map uaddsat.i32(i32 %a, i32 %b) to the following:
```
s_not_b32 s4, s17 ; s17 = %b
s_min_u32 s4, s16, s4 ; s16 = %a
s_add_u32 s4, s4, s17
```
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: 0acbbccdbd5b5a218b459acc9abc6b3dc7f338a6
https://github.com/llvm/llvm-project/commit/0acbbccdbd5b5a218b459acc9abc6b3dc7f338a6
Author: Brad Smith <brad at comstyle.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/test/Driver/aarch64-features.c
M clang/test/Driver/aarch64-fmv.c
M clang/test/Driver/linux-ld.c
Log Message:
-----------
[Android] Drop workarounds for older Android API levels pre 23 (#161893)
Drop workarounds for Android API levels pre 23.
The minimum Android API currently supported by the LTS NDK is 23.
Commit: 7812fef524a0aef0b34599c2eb81b66843fbcdd8
https://github.com/llvm/llvm-project/commit/7812fef524a0aef0b34599c2eb81b66843fbcdd8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-widening-convert-isel.ll
Log Message:
-----------
[RISCV][P-ext] Add RISCVISD::PWZIP for RV32. (#210134)
This node takes 2 32-bit vector inputs and produces a 64-bit vector
result. By extracting the subvector during lowering, we expose more
opportunities for optimizations.
Commit: 5978ac06a2cc75025703008c373fc7c94246f7a3
https://github.com/llvm/llvm-project/commit/5978ac06a2cc75025703008c373fc7c94246f7a3
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
Log Message:
-----------
[NFC] Inline DwarfExpression frame register check (#210186)
Inline DwarfExpression frame register check as it's the only call.
Tested via make check.
Assisted by AI.
Commit: bd0395ebfe9830b1e3dc9580021fb5a3ab343a51
https://github.com/llvm/llvm-project/commit/bd0395ebfe9830b1e3dc9580021fb5a3ab343a51
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/time.rst
M libc/include/sys/time.yaml
M libc/include/time.yaml
M libc/src/sys/time/CMakeLists.txt
A libc/src/sys/time/gettimeofday.h
M libc/src/sys/time/linux/CMakeLists.txt
A libc/src/sys/time/linux/gettimeofday.cpp
M libc/src/time/CMakeLists.txt
R libc/src/time/gettimeofday.h
M libc/src/time/linux/CMakeLists.txt
R libc/src/time/linux/gettimeofday.cpp
M libc/test/src/sys/time/CMakeLists.txt
A libc/test/src/sys/time/gettimeofday_test.cpp
M libc/test/src/time/CMakeLists.txt
R libc/test/src/time/gettimeofday_test.cpp
Log Message:
-----------
[libc] Move gettimeofday to sys/time.h header. (#210185)
`gettimeofday` is supposed to be declared in the `<sys/time.h>` header,
not the `<time.h>` where we've had it previously. Move the declaration
to the correct header, and move the files with implementation and unit
tests accordingly.
Note that `gettimeofday` is removed removed from POSIX-2024, but let's
keep it available for now, since there's fair amount of existing code
that still uses it.
Commit: 5ed5468f3810cd3c424eec5e9288884f67594068
https://github.com/llvm/llvm-project/commit/5ed5468f3810cd3c424eec5e9288884f67594068
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Log Message:
-----------
[NFC][LSR] Remove duplicate debug expression update (#210188)
Remove duplicate debug expression update we assigned
the same DIExpression twice so let's just remove the redundant call.
Tested via make check.
Assisted by AI.
Commit: 205a66201235c03b892e075ae548d6ea12f024a3
https://github.com/llvm/llvm-project/commit/205a66201235c03b892e075ae548d6ea12f024a3
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw-sysroot.cpp
Log Message:
-----------
[clang][mingw] Try both native and ARM64EC triples when looking for a sysroot on the ARM64EC target (#210017)
Similarly to MSVC, a MinGW toolchain may provide support for both ARM64
and ARM64EC in a single sysroot. Structuring the toolchain this way has
the additional advantage of seamlessly supporting linking ARM64X images.
Support this configuration in findClangRelativeSysroot.
Commit: 092ac9c0c776fc5a3eddf779643d004230260300
https://github.com/llvm/llvm-project/commit/092ac9c0c776fc5a3eddf779643d004230260300
Author: David Mentler <mentlerd at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/docs/resources/test.md
A lldb/packages/Python/lldbsuite/support/xcode.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
Log Message:
-----------
[lldb][test] Allow dotest.py to call for Xcode to attach (#209628)
This speeds up the debugging of API tests a little on macOS.
(AppleScript written by Claude based on Xcode.sdef)
Commit: eb819b90735b819c1afd98ab3aa14183fa57157e
https://github.com/llvm/llvm-project/commit/eb819b90735b819c1afd98ab3aa14183fa57157e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/sub-nsw-icmp-eq-zero-reorder.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect nsw in reordered sub feeding equal cmp, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210204
Commit: e5c143f96b37f2215a0b07d46df7600d06a372f4
https://github.com/llvm/llvm-project/commit/e5c143f96b37f2215a0b07d46df7600d06a372f4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/sub-nsw-icmp-eq-zero-reorder.ll
Log Message:
-----------
[SLP]Drop nsw when reordering a sub feeding icmp eq/ne 0
A sub used only by icmp eq/ne 0 is treated as commutative, so SLP may
swap its operands, and nsw does not survive a - b -> b - a (a - b can
be INT_MIN while b - a overflows).
Fixes #210177
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210205
Commit: 396d2555ddac2d6a4885ec3ad2c73fcee00f5bd3
https://github.com/llvm/llvm-project/commit/396d2555ddac2d6a4885ec3ad2c73fcee00f5bd3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/test/MC/Disassembler/WebAssembly/wasm.txt
Log Message:
-----------
[WebAssembly] Don't assert on a non-zero call_indirect table index (#210120)
WebAssemblyInstPrinter::printInst asserted that a non-symbol table
operand of call_indirect is the immediate 0, on the assumption that only
MVP single-table compilation units reach the printer. That is true for
code generated by the compiler, but the printer is shared by the
disassembler.
The disassembler must produce output for any byte sequence it is pointed
at and shouldn't abort on the operand values it decodes. A non-zero
immediate table index is both a valid encoding, from a multi-table
module, and a routine result of best-effort disassembly of a range that
is not all code, which is how I hit this in LLDB.
Print the table operand when it is a symbol or a non-zero immediate, and
omit it only for the implicit table 0. This makes the output lossless
and unambiguous, matching how a table symbol is already printed. MVP and
table-symbol output are unchanged, so there is no effect on the
compiler's assembly.
Commit: 71a7c24dec4fe7ab5eda28650cf8d9138b9ca994
https://github.com/llvm/llvm-project/commit/71a7c24dec4fe7ab5eda28650cf8d9138b9ca994
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/MC/Hexagon/relax-align.s
Log Message:
-----------
[Hexagon] Add MC lit test for dropped fixups after packet relaxation (#210157)
Test that a branch fixup is preserved when MC relaxes a packet
containing a conditional compare-and-jump due to a following .p2align
directive. Regression test for issue #163851.
Commit: 5337314b4bea4be5e86396eb21e59f4d123af175
https://github.com/llvm/llvm-project/commit/5337314b4bea4be5e86396eb21e59f4d123af175
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblySetP2AlignOperandsPass
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209871
Commit: 0fc03f0454b5a5d6d35338a6f4d1092960d63e17
https://github.com/llvm/llvm-project/commit/0fc03f0454b5a5d6d35338a6f4d1092960d63e17
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A bolt/docs/BOLTAArch64OptimizationStatus.md
R bolt/docs/BOLTAArch64OptimizationStatus.rst
A bolt/docs/GettingStarted.md
R bolt/docs/GettingStarted.rst
A bolt/docs/index.md
R bolt/docs/index.rst
Log Message:
-----------
[bolt][docs] Rename BOLT docs to Markdown (#210198)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 2494e80d1cd91911713ec8451a961e07b9da8b9c
https://github.com/llvm/llvm-project/commit/2494e80d1cd91911713ec8451a961e07b9da8b9c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixBrTableDefaults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyFixBrTableDefaultsPass
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209882
Commit: d0dd060443b657f3d96bd1b2dcd32974cccfa6fc
https://github.com/llvm/llvm-project/commit/d0dd060443b657f3d96bd1b2dcd32974cccfa6fc
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
Log Message:
-----------
[NFC] Use new target triple for some tests (#210202)
They were mistakenly reverted back to the old ones.
Commit: 565ef24d6c1b31e2fbf736b2b115d49d49b86af7
https://github.com/llvm/llvm-project/commit/565ef24d6c1b31e2fbf736b2b115d49d49b86af7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCleanCodeAfterTrap.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyCleanCodeAfterTrapPass
Standard NewPM pass porting.
Reviewers: sbc100, dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/209892
Commit: 03ab16cb415ff8dc2cb06332a628b79a718c74d8
https://github.com/llvm/llvm-project/commit/03ab16cb415ff8dc2cb06332a628b79a718c74d8
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M bolt/docs/BOLTAArch64OptimizationStatus.md
M bolt/docs/GettingStarted.md
M bolt/docs/index.md
Log Message:
-----------
[docs] Finish MyST migration for BOLT docs (#210199)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #210198, which will be a standalone commit
that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections. Please spot check my work and approve if it looks good. You
can use the HTML links below to confirm it renders properly.
-----
Before/after validation links:
| Source file | Before HTML | After HTML |
| --- | --- | --- |
| `bolt/docs/BOLTAArch64OptimizationStatus.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/BOLTAArch64OptimizationStatus.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/BOLTAArch64OptimizationStatus.html)
|
| `bolt/docs/GettingStarted.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/GettingStarted.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/GettingStarted.html)
|
| `bolt/docs/index.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/bolt/docs-old/index.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/bolt/docs/index.html)
|
Commit: 611d015f0030e0d4f1b3bd2270205f6f6b6e20eb
https://github.com/llvm/llvm-project/commit/611d015f0030e0d4f1b3bd2270205f6f6b6e20eb
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/utils/gn/README.rst
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/build/buildflags.gni
M llvm/utils/gn/build/symlink_or_copy.gni
M llvm/utils/gn/build/toolchain/BUILD.gn
M llvm/utils/gn/secondary/BUILD.gn
M llvm/utils/gn/secondary/bolt/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/tool/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/xpc/framework/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
M llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ar/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cxxfilt/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod-find/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-debuginfod/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwp/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-libtool-darwin/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-lipo/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-nm/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-objdump/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-rc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readobj/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-size/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-strings/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-symbolizer/BUILD.gn
Log Message:
-----------
gn build: Support building debug binaries from a release build directory.
This change makes it so that all binaries in `bin` have a corresponding
debug binary target `$TARGET.dbg` that will build a debug binary in
`bin.dbg/$TARGET`. This is implemented using a separate toolchain for
the debug builds. This has the following advantages over a separate
debug build directory:
1. Can use release mode tblgen to generate code for the debug build
binaries, which speeds up the build because it can run tblgen faster as
well as being able to reuse the tblgen binary from the release build.
2. Can reuse runtimes built in the release mode clang's resource
directory, avoiding the need to build them again with a slow debug
build of clang.
Assisted-by: gemini
Reviewers: aeubanks, nico
Reviewed By: aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/197843
Commit: a45ae4cf77776bdae8ab79c3b5b4d4ef7cbd7d99
https://github.com/llvm/llvm-project/commit/a45ae4cf77776bdae8ab79c3b5b4d4ef7cbd7d99
Author: lntue <lntue at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/math/hypot.h
M libc/test/src/math/smoke/hypot_test.cpp
Log Message:
-----------
[libc][math] Fix double-rounding errors with denormal inputs for hypot function. (#208247)
The issue was reported by Paul Zimmermann.
Solution: for denormal inputs, we use 1.0 + x trick after proper scaling
to mimick rounding at denormal scale.
Commit: eafc387c1da0620642f469fde70455c554ba3470
https://github.com/llvm/llvm-project/commit/eafc387c1da0620642f469fde70455c554ba3470
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/CCallback.h
A orc-rt/test/unit/CCallbackTest.cpp
M orc-rt/test/unit/CMakeLists.txt
Log Message:
-----------
[orc-rt] Add asCCallback utility -- C callbacks for methods. (#210048)
Adds orc_rt::asCCallback<&Class::method>, which produces a C-ABI
function pointer that forwards to the given member function. The first
parameter of the generated trampoline is an opaque context pointer (
void * for non-const methods, const void * for const methods) that is
cast back to the class type and used as the receiver:
struct Counter {
void inc(int N) { Count += N; }
int Count = 0;
};
Counter C;
void (*CB)(void *, int) = asCCallback<&Counter::inc>;
CB(asCCallbackContext<&Counter::inc>(C), 2); // C.Count == 2
asCCallbackContext produces the matching context pointer via
static_cast, so any base-class offset is applied and const-ness is
preserved; pairing it with asCCallback by the same method keeps things
correct under inheritance and const-qualification. (A raw cast of &C
would give the trampoline the wrong `this` when method's class is a base
at a non-zero offset.)
Specializations cover the const x noexcept combinations. The trampoline
is always noexcept -- a C caller cannot unwind a C++ exception, so an
escaping one terminates -- and return/argument types are restricted to
C-compatible (non-reference, trivially copyable) types via
static_assert.
Commit: 5658411aed0f610380323918ce4b02016f2df6f2
https://github.com/llvm/llvm-project/commit/5658411aed0f610380323918ce4b02016f2df6f2
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenHLSL/resources/RWBuffer-imageformat.hlsl
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
M llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
Log Message:
-----------
[SPIRV] Pack 64-bit vec2 typed buffers into 4x32-bit images (#208626)
Commit: 6b9929001d0b46d087e871934e50e4783147fa7d
https://github.com/llvm/llvm-project/commit/6b9929001d0b46d087e871934e50e4783147fa7d
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M bolt/docs/profiles.md
M bolt/include/bolt/Profile/DataReader.h
M bolt/lib/Profile/DataReader.cpp
A bolt/test/X86/profile-symbols-mode.s
Log Message:
-----------
[BOLT] Add fdata symbols mode (#209932)
Add a new fdata profile mode accepting symbol names as-is.
It addresses the UX gap surfaced by #208313 that all methods of selecting
functions to process (symbolized profile types, `-funcs*` options) expect
disambiguated local symbols.
Introduce fdata mode activated by a `symbols` header line, where each subsequent
line is a (mangled) symbol name. The names are matched against restored function
names (with disambiguation suffix stripped), and every matching function gets an
execution count of 1.
This can be used to drive selective instrumentation (`--instrument-hot-only`) or
basic linker-script style optimizations.
Symbols are stored as branch entry data so matching reuses the existing default
branch profile path.
Test Plan:
Update docs/profiles.md and add profile-symbols-mode.s
Commit: 398f2117379f42764e433d19ea0d0cd65009a4aa
https://github.com/llvm/llvm-project/commit/398f2117379f42764e433d19ea0d0cd65009a4aa
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/StaticLibrary.h
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/TUSummaryEncoding.h
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-explicit-triple.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-namespace-override.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libempty.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libtwo.json
M clang/test/Analysis/Scalable/ssaf-linker/help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-create.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-time.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-verbose.test
M clang/tools/clang-ssaf-linker/CMakeLists.txt
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.h
Log Message:
-----------
[clang][ssaf] Add static-library create subcommand (#208799)
This change adds `clang-ssaf-linker static-library create` for bundling
TU summaries into a StaticLibrary archive. The linker has been
refactored to dispatch on `cl::SubCommand`; invocations without a
subcommand still run the existing linker pipeline unchanged for backward
compatibility.
rdar://181930526
Commit: 9f839a4396916283cc28e45d18d7f4742ad5094a
https://github.com/llvm/llvm-project/commit/9f839a4396916283cc28e45d18d7f4742ad5094a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Fix non-determinism in pointers comparison, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210216
Commit: a07b91d8243b8a8051dbbe5739eacc7942269c61
https://github.com/llvm/llvm-project/commit/a07b91d8243b8a8051dbbe5739eacc7942269c61
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/CMakeLists.txt
A lldb/examples/python/templates/scripted_stackframe_recognizer.py
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStackFrameRecognizerInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/recognizer.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
[lldb/script] Migrate frame recognizers onto ScriptedPythonInterface (#209805)
Give `frame recognizer add -l` a formal
ScriptedStackFrameRecognizerInterface, matching the architecture already
used by ScriptedProcess, ScriptedBreakpoint, etc.: a C++ interface
header, a Python-backed implementation built on
ScriptedPythonInterface's CreatePluginObject/Dispatch machinery,
PluginManager registration, and a generatable Python ABC template
(scripted_stackframe_recognizer.py).
get_recognized_arguments' documented contract returns a plain list of
lldb.SBValue (not an lldb.SBValueList), so it bypasses the generic
Dispatch<ValueObjectListSP>() extractor and calls the SWIG bridge
directly, matching the legacy behavior exactly.
ScriptedStackFrameRecognizer now holds a single interface object created
once in its constructor and reused across every RecognizeFrame() call,
same lifecycle as before.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 3e1948e9a528d1bc82f2a671a00c02fa8717f26f
https://github.com/llvm/llvm-project/commit/3e1948e9a528d1bc82f2a671a00c02fa8717f26f
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Add expression validation tests for DW_OP_swap (#210184)
Add DIExpression validation tests for DW_OP_swap that we noticed were
missing. The tests are based on the existing expression tests for
DW_OP_stack_value.
Tested via make check.
Assisted by AI.
Commit: b9869c8c920a7dfa983e215bc30729b13d8b353b
https://github.com/llvm/llvm-project/commit/b9869c8c920a7dfa983e215bc30729b13d8b353b
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll
Log Message:
-----------
[AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (#208744)
Add support for lowering masked loads/stores of <4 x bf16> and <8 x
bf16> when target features contain "+sve" and "+bf16".
Fixes: #201149
Commit: 464b46a73b7592c95222cf2e64b34ffe6f2cf251
https://github.com/llvm/llvm-project/commit/464b46a73b7592c95222cf2e64b34ffe6f2cf251
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/sysv_abi.c
A clang/test/CodeGen/target-avx-function-abi.c
A clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
Log Message:
-----------
[clang][CodeGen][X86_64] Honor per-function AVX ABI in C/C++ call paths, maintain old psABI for PlayStation. (#193298)
Fixes https://github.com/llvm/llvm-project/issues/64706
Wire per function x86 AVX ABI level into CodeGen arrangement methods so
__attribute(__target("avx"))) / __attribute(__target("avx512f"))) on
methods, ctors, and free-functions affects ABI lowering consistently.
Specifically:
- Added X86AVXABILevel member to CGFunctionInfo.
- Populated X86AVXABILevel member in CGFunctionInfo objects via
arrangement methods declared in CodeGenTypes.h.
- Respect CGFunctionInfo AVX Level in X86_64ABIInfo::computeInfo.
- Add/extend regression tests for:
- free-function target-attribute AVX ABI lowering
- C++ method/ctor target-attribute AVX ABI lowering
- PS4/PS5 legacy ABI behavior (no per-function AVX ABI change)
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 7fec267c9a44c76604e1135ee0ef694c4eaae784
https://github.com/llvm/llvm-project/commit/7fec267c9a44c76604e1135ee0ef694c4eaae784
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/src/stdfix/DiviFxTest.h
Log Message:
-----------
[libc][stdfix] Guard DiviFxTest shift edge cases against narrow IntType (#209970)
Fixes riscv32 buildbot failure from #206115.
Commit: 9d2181c78f4e248069e39ec0e5b899dfbfcf3d6a
https://github.com/llvm/llvm-project/commit/9d2181c78f4e248069e39ec0e5b899dfbfcf3d6a
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
Log Message:
-----------
[NFC] Reuse DwarfExpression fragment (#210181)
Reuse DwarfExpression fragment information since nothing changes it
between the outside of the loop and the inside of the loop.
Tested via make check.
Assisted by AI.
Commit: 1a3347f608394b12c5a18cb5b3457af4e85449a1
https://github.com/llvm/llvm-project/commit/1a3347f608394b12c5a18cb5b3457af4e85449a1
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel][clang][ssaf] Fix 398f2117379f42764e433d19ea0d0cd65009a4aa (#210222)
Commit: 27d7b61322f1528cc582a62d1b74683d24cc987b
https://github.com/llvm/llvm-project/commit/27d7b61322f1528cc582a62d1b74683d24cc987b
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFC] Use LoadInst::getProperties() when creating PRE load (#208605)
Use load's properties via getProperties() instead of individually
forwarding isVolatile(), getAlign(), getOrdering() and getSyncScopeID().
Reference: https://github.com/llvm/llvm-project/pull/206470
Commit: 4a75259134c72d8be7fa3ea36c9dc7bfc02640ac
https://github.com/llvm/llvm-project/commit/4a75259134c72d8be7fa3ea36c9dc7bfc02640ac
Author: hev <wangrui at loongson.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/lasx/issue207316.ll
M llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
M llvm/test/CodeGen/LoongArch/lsx/vexth.ll
Log Message:
-----------
[LoongArch] Fix invalid VEXTH combines for unsupported type extensions (#209725)
`performEXTENDCombine` could form `VEXTH`/`VEXTH_U` nodes for
unsupported type combinations, such as extending `v8i8` to `v8i32` or
`v2i64` to `v2i128`. These illegal nodes would later reach instruction
selection and trigger backend failures:
* `Cannot select: LoongArchISD::VEXTH`
* `Don't know how to legalize this operation`
Prevent these combines from firing by verifying that the destination
type is legal and has exactly twice the total bit width of the source
before forming a `VEXTH`/`VEXTH_U` node.
Apply the same checks to `performSHLCombine` for consistency.
Fixes
https://github.com/llvm/llvm-project/pull/207316#issuecomment-4978234865
Fixes
https://github.com/llvm/llvm-project/pull/207316#issuecomment-4979233899
Commit: 8aaa15e82688177db7c0c3fa06103d10f6799598
https://github.com/llvm/llvm-project/commit/8aaa15e82688177db7c0c3fa06103d10f6799598
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/BBAddrMapYAML.h
M llvm/lib/ObjectYAML/BBAddrMapYAML.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
Log Message:
-----------
[ObjectYAML][NFC] Hoist BBAddrMap yaml2obj encoder into a shared helper (#205991)
Preparatory NFC refactor to let the upcoming COFF emitter reuse the
BBAddrMap YAML encoder.
Commit: ddd21a5500bc65354211c0088520d0b331e862d7
https://github.com/llvm/llvm-project/commit/ddd21a5500bc65354211c0088520d0b331e862d7
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/include/flang/Lower/CUDA.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Lower/CUDA/cuda-gpu-unified.cuf
R flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
Log Message:
-----------
[flang][cuda] Managed backing for -gpu=unified allocatables/pointers (#210149)
Under `-gpu=unified`, allocatables and pointers with no explicit CUDA data
attribute must be reachable from the device. Back them with CUDA managed
memory by selecting the unified allocator index at the ALLOCATE site (in
lowering), instead of stamping an implicit `Unified`/`Managed` CUDA data attribute
on the symbol in the frontend — the approach introduced in PR #209292.
This is necessary because attributing the symbol in the frontend routed every
plain allocatable/pointer through the CUDA Fortran managed descriptor
pipeline (constructor registration, `cuf.allocate`/`cuf.free`), which added
per-`ALLOCATE` overhead, forced special-casing for objects that may not legally carry a
CUDA attribute (COMMON members, derived-type components, module globals), and
changed symbol semantics used well beyond allocation. Choosing the allocator
index at the `ALLOCATE` site keeps the object a plain host allocatable/pointer while
the storage still comes from the managed allocator.
Commit: 963e226d9a6b923b10c8e328438838bd42e03d18
https://github.com/llvm/llvm-project/commit/963e226d9a6b923b10c8e328438838bd42e03d18
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M .github/workflows/release-binaries.yml
M .github/workflows/validate-release-version/action.yml
Log Message:
-----------
workflows: Fixes for release-binaries and upload-release-artifact (#209246)
There were some bugs in upload-release-artifact workflow and
release-binaries was not including this action in its checkout.
Commit: fe64fbbafc19e46ef461fac3ec0b4144a1ffc847
https://github.com/llvm/llvm-project/commit/fe64fbbafc19e46ef461fac3ec0b4144a1ffc847
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][modularisation][NFC] Extract mask, shuffle and AA helpers into SLUtils 3/3 (#209973)
Move the mask/shuffle construction and alias-analysis free helpers out
of SLPVectorizer.cpp into SLPVectorizer/SLPUtils.{h,cpp} (namespace
llvm::slpvectorizer).
Moved:
transformScalarShuffleIndiciesToVector
getShufflevectorNumGroups
calculateShufflevectorMask
UseMask (enum)
buildUseMask
isUndefVector
doesInTreeUserNeedToExtract
getLocation
isSimple
addMask
fixupOrderingIndices
getAltInstrMask
replicateMask
RFC: https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
Commit: 3c6b4870425e7b62a966ff04f51f78920adbedb8
https://github.com/llvm/llvm-project/commit/3c6b4870425e7b62a966ff04f51f78920adbedb8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/include/orc-rt/TaskGroup.h
M orc-rt/test/unit/SessionTest.cpp
M orc-rt/test/unit/TaskGroupTest.cpp
Log Message:
-----------
[orc-rt] Add TaskGroup::TokenSource; drop raw group accessor (#210240)
Session::managedCodeTaskGroup() returned the raw
std::shared_ptr<TaskGroup> for the managed-code group, exposing the
group's full interface -- including close() and addOnComplete() -- to
callers, even though those operations are reserved for the Session.
Add TaskGroup::TokenSource, a strong handle whose sole role is to serve
as an argument to the TaskGroup::Token constructor. Session now exposes
managedCodeTokenSource() in its place, so clients can acquire tokens (to
keep managed code alive across shutdown) without gaining the ability to
close the group or register completion callbacks.
Commit: f2ef5670cf70371153caeb0ebbeae2323a61f8e0
https://github.com/llvm/llvm-project/commit/f2ef5670cf70371153caeb0ebbeae2323a61f8e0
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_dpp_lds_expected_active_lanes.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
Log Message:
-----------
[AMDGPU] Refactor GFX11 VALU Mask Hazard Waitcnt Merging (#169213)
Move GFX11 SGPR VALU mask hazard waitcnt merging to the a forward scan
within the AMDGPUWaitSGPRHazard pass.
This simplifies the hazard recognizer code and allows merging of waitcnt
instructions in cases where SGPRs unaffected by pending writes are used.
In turn this greatly decreasing numbers of waits inserted in sequences
of V_CMP instructions writing SGPRs improving VALU pipeline performance.
Commit: 78ed03f555ea75d2337f618930c062f4d881a08b
https://github.com/llvm/llvm-project/commit/78ed03f555ea75d2337f618930c062f4d881a08b
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A flang/test/Lower/global-initialization-parens.f90
Log Message:
-----------
[flang] Add lowering tests for parenthesized initial values (#209664)
Add a LIT test that baselines the current lowering of parenthesized
initial values in fir.global initializer regions. Today a parenthesized
scalar or derived constant survives constant folding as a Parentheses
node and is lowered to a fir.no_reassoc operation inside the global init
region, while parentheses around characters, array named-constants, and
structure-constructor components are stripped before lowering.
This test pins that behavior so that an upcoming change to the
initializer-lowering path shows its behavior delta explicitly and has a
regression guard.
Assisted-by: AI
Commit: 15ae01dd24261bd70947aab884098e5dcd4096dd
https://github.com/llvm/llvm-project/commit/15ae01dd24261bd70947aab884098e5dcd4096dd
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/CMakeLists.txt
A clang-tools-extra/clangd/LSPBinder.cpp
M clang-tools-extra/clangd/LSPBinder.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/lib/Support/LSP/Transport.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
M utils/bazel/llvm-project-overlay/clang-tools-extra/clangd/BUILD.bazel
Log Message:
-----------
[clangd][Support] Outline LSP payload decode errors (#203121)
Move failed payload handling from `clangd::LSPBinder::parse<T>` and
`llvm::lsp::MessageHandler::parse<T>` into their non-inline
`handleParseError` functions, while keeping successful payload
conversion specialized in each `parse<T>` instantiation.
For a Darwin arm64 build, stripped clangd decreased by 32,848 bytes and
`__TEXT,__text` decreased by 25,180 bytes.
`ClangdTests --gtest_filter=LSPBinderTest.*` passes, and
`llvm/lib/Support/LSP/Transport.cpp` passes a standalone syntax compile.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Co-authored-by: OpenAI Codex <noreply at openai.com>
Commit: c488b2c2407bf29bb20f67bb8f3cf39c637d231e
https://github.com/llvm/llvm-project/commit/c488b2c2407bf29bb20f67bb8f3cf39c637d231e
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDMAOperations.md
Log Message:
-----------
[Docs][AMDGPU] Consistent use of "wave-uniform", "per-lane" and "immediate" (#209974)
When documenting DMA operations, use consistent qualifiers
(wave-uniform, per-lane, immediate) instead of referring to SGPRs and
VGPRs.
Assisted-By: Claude Opus 4.6
Commit: a376783e2ed3a44f63991c97513711faad09525b
https://github.com/llvm/llvm-project/commit/a376783e2ed3a44f63991c97513711faad09525b
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
Log Message:
-----------
[compiler-rt][ubsan] Fix suppressions for inlined functions (#206735)
Align suppression PC handling with getCallerLocation(), so function
suppressions identify the inlined function that caused a report.
Intentionally match only the innermost inline frame.
Extend suppressions-nested-calls.c coverage to -O1.
Fixes https://github.com/llvm/llvm-project/issues/209501
---------
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: 30bc042395a6cf0aa1e5de4fcc625d5b8c611767
https://github.com/llvm/llvm-project/commit/30bc042395a6cf0aa1e5de4fcc625d5b8c611767
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[compiler-rt][test] Use configured Python for lit page-size probe (#209175)
Use the same Python executable configured for the test suite, rather
than relying on python3 being on PATH.
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75
https://github.com/llvm/llvm-project/commit/c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/connect_accept_test.cpp
M libc/test/src/sys/socket/linux/listen_test.cpp
M libc/test/src/sys/socket/linux/socket_test_support.h
M libc/test/src/sys/socket/linux/sockname_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add remaining sys/socket functions and tests (#209798)
This patch adds the following sys/socket functions and syscall wrapper
libraries to BUILD.bazel:
- accept
- accept4
- bind
- connect
- getpeername
- getsockname
- listen
- sockatmark
I'm also enabling the unit tests for these functions. Running AF_UNIX
socket tests under Bazel ran into a problem where the absolute path to
the test sandbox directory exceeds the 108-byte limit of
sockaddr_un::sun_path. To work around that, I added a TestDirectoryScope
helper that temporarily chdirs into the test directory so the tests can
use short relative filenames, and restores the original working
directory on exit.
Assisted by Gemini.
Commit: 9445ad3f91d4331eead867f8b3c9c8a3818edac0
https://github.com/llvm/llvm-project/commit/9445ad3f91d4331eead867f8b3c9c8a3818edac0
Author: Rana Pratap Reddy <RanaPratapReddy.Nimmakayala at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
Log Message:
-----------
[CIR][AMDGPU] Adds `__amdgpu_buffer_rsrc_t` in the buffer-resource address space (#204782)
CIR previously lowering every AMDGPU opaque pointer to
`!cir.ptr<!void>`. Now `__amdgpu_buffer_rsrc_t` lower to
`!cir.ptr<!void, target_address_space(8)>` similar to (`ptr
addrspace(8)` in LLVM IR) matching CodeGen.
This change requires for upcoming raw buffer load/store/atomic builtins.
Those builtins `__builtin_amdgcn_raw_buffer_load/store_b*,
__builtin_amdgcn_raw_ptr_buffer_atomic_*` take a
`__amdgpu_buffer_rsrc_t` as operand, and the corresponding LLVM
intrinsics expect a `ptr addrspace(8)` resource argument.
Commit: 513ac13e7e5037af4b39c8c582dd7927f4c807fc
https://github.com/llvm/llvm-project/commit/513ac13e7e5037af4b39c8c582dd7927f4c807fc
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[Clang][RISCV] Add P extension reinterpret cast intrinsics (#210241)
Implement the "Reinterpret casts" section of the RISC-V P extension intrinsic
spec in `riscv_packed_simd.h`.
The 82 `__riscv_preinterpret_<from>_<to>` intrinsics provide
bit-pattern-preserving conversions between packed types and equal-width
scalars, and between equal-width packed types. They generate no instructions;
each is a `__builtin_bit_cast`.
Commit: 61fa8d3db491c4a864242f22ce31b730fb78ecb5
https://github.com/llvm/llvm-project/commit/61fa8d3db491c4a864242f22ce31b730fb78ecb5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/LibcallLoweringInfo.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
Log Message:
-----------
CodeGen: Rename LibcallLoweringModuleAnalysisResult to ModuleLibcallLoweringInfo (#210176)
Commit: 6f2bd9fd1a5e7c61893abf2f1e9246610e6a32f8
https://github.com/llvm/llvm-project/commit/6f2bd9fd1a5e7c61893abf2f1e9246610e6a32f8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
A flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
Log Message:
-----------
[flang][cuda] Add option to flag descriptor I/O as error (#210170)
Descriptor I/O is too expensive in some compilation mode (nordc). Add
ability to emit an error if they are found in device code.
Commit: 02f55a9e5e4775bc17cc23f9d1e7f5ee23cf63cd
https://github.com/llvm/llvm-project/commit/02f55a9e5e4775bc17cc23f9d1e7f5ee23cf63cd
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
Log Message:
-----------
[libc] add net/if.h to the list of installed headers (#210021)
on aarch64, riscv and x86_64.
Commit: c571b0bd7330a4b737ad7dec31e7f2b52edd3953
https://github.com/llvm/llvm-project/commit/c571b0bd7330a4b737ad7dec31e7f2b52edd3953
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/include/llvm-libc-types/struct_sockaddr_storage.h
M libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
Log Message:
-----------
[libc] Fix size of struct sockaddr_storage (#210037)
My cleverness with the union backfired as it introduced an
(architecture-specific) padding between before it. Drop the union to
avoid that.
This probably wouldn't break much as the structure exists just to
allocate space (and this made it larger), but we should fix it
nonetheless.
Commit: c4903855b64ee801d1b9caeb970921a63475c98b
https://github.com/llvm/llvm-project/commit/c4903855b64ee801d1b9caeb970921a63475c98b
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang/test/Driver/fakeflang.F
M flang/tools/fakeflang/fakeflang.cpp
M runtimes/cmake/config-Fortran.cmake
Log Message:
-----------
[fakeflang] Also detect CMakeTestGNU.c (#210175)
Two fixes when using CMake < 3.28 after #209482:
* In addition to `flang`, also recognize `fakeflang` to determine
whether any workaround for CMake not completely supporting Flang is
needed. `fakeflang` is used as a shim in #209482.
* For CMake < 3.24, CMake does not reognize Flang at all and tries other
methods to detect to the compiler, including the file `CMakeTestGNU.c`.
Make `fakeflang` recognize it as a probe attempt.
This should fix the
[openmp-offload-amdgpu-clang-flang](https://lab.llvm.org/buildbot/#/builders/67)
buildbot. The buildbot is currently upgrade to a newer CMake version,
and the minimum required version of CMake will become 3.31 soon.
Commit: 250f791e7002afb308e4a59dc5ef3e1f2e1c10af
https://github.com/llvm/llvm-project/commit/250f791e7002afb308e4a59dc5ef3e1f2e1c10af
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
Log Message:
-----------
[lldb] Fix tsan error in SymbolLocatorDebugSymbols (#209698)
g_dlsym_DBGCopyFullDSYMURLForUUID and g_dlsym_DBGCopyDSYMPropertyLists
are two globals that are lazily initialized when first used. TSan
complains that this lazy init code is not thread-safe as there is no
synchronization mechanism. In practice, the only race that can happen
here is that we initialize the same values concurrently, which should be
'safe' on any platform.
This patch moves the initialization code into a static local that
returns a const object. This makes this code thread-safe by construction
and fixes the TSan error.
It also fixes that we keep calling dlopen if the initialization fails.
That is, the `g_dlsym_DBGCopyFullDSYMURLForUUID == nullptr` will always
be true on systems where the framework doesn't exist, so this code will
try loading it on every function call and fail.
Commit: 89f5334990c5aa853fcbaa361aefe5b999e63dc5
https://github.com/llvm/llvm-project/commit/89f5334990c5aa853fcbaa361aefe5b999e63dc5
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/docs/CMakeLists.txt
R libc/docs/headers/time.rst
A libc/utils/docgen/time.yaml
Log Message:
-----------
[libc][docs] Dynamically generate time.h documentation (#210197)
Removed the static time.rst file.
Added time to docgen_list in libc/docs/CMakeLists.txt. Created
libc/utils/docgen/time.yaml to define the functions.
Assisted-by: Automated tooling, human reviewed.
Commit: d68dc184b1cec0a01876b3f635bce6c25a64edf6
https://github.com/llvm/llvm-project/commit/d68dc184b1cec0a01876b3f635bce6c25a64edf6
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/pre-fir-tree-assigned-goto.f90
Log Message:
-----------
[flang][PFT] record every target of an assigned GO TO (#210065)
Assigned GO TO (`go to v [, (l1, l2, ...)]`) is the third multiway
branch in the language, alongside the computed GO TO and arithmetic IF
that were addressed in PR #210012. Its PFTBuilder handler previously
did:
[&](const parser::AssignedGotoStmt &) {
eval.isUnstructured = true;
markSuccessorAsNewBlock(eval);
},
i.e. it recorded no branch targets at all -- neither `controlSuccessor`
nor `extraControlSuccessors` was populated.
Handle the assigned GO TO the same way PR #210012 handles the computed
GO TO and arithmetic IF: iterate every possible target and call
`markBranchTarget(eval, label)` for each, so that `controlSuccessor`
receives the first and `extraControlSuccessors` receives the rest.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: d134db0b2b989a2b15f91f24acca43497dfe0919
https://github.com/llvm/llvm-project/commit/d134db0b2b989a2b15f91f24acca43497dfe0919
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Remove byte-multiple trip count requirement (#210086)
The newly added carryless-multiply CRC loop optimization (#203405) does
not require a byte-multiple trip count unlike the Sarwate method which
was previously implemented. Loosen this requirement in HashRecognize and
reapply it in `optimizeCRCLoop`.
Commit: cc98c1eb84c690c65fba77b72c269a869978c898
https://github.com/llvm/llvm-project/commit/cc98c1eb84c690c65fba77b72c269a869978c898
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/IR/CycleInfo.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/IR/CycleInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[CycleInfo] Represent cycles by an opaque handle. NFC (#210117)
Consumers refer to a cycle by a GenericCycle pointer into
GenericCycleInfo's storage. Introduce GenericCycleRef, a value handle
wrapping the cycle's preorder index, and route every GenericCycleInfo
query and mutation through it. GenericCycle becomes an internal
implementation detail, so its storage representation can change without
touching callers.
Aided by Claude Opus 4.8, reviewed by Fable 5
Suggested by
https://github.com/llvm/llvm-project/pull/208614#pullrequestreview-4683378136
Commit: 90e31c46d005ae0a7f5968c38a9310bee499923c
https://github.com/llvm/llvm-project/commit/90e31c46d005ae0a7f5968c38a9310bee499923c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/LTO/LTO.cpp
A llvm/test/ThinLTO/X86/Inputs/cache-defined-globals-order.ll
A llvm/test/ThinLTO/X86/cache-defined-globals-order.ll
Log Message:
-----------
[LTO] Sort DefinedGlobals in LTO cache key (#210025)
Sort the DefindeGlobals by GUID when computing the LTO cache key, to
avoid making the cache key dependent on the insertion order. This fixes
large compile-time regressions in rust incremental builds.
Alternatively one could make collectDefinedGVSummariesPerModule() work
on the sortedRange(), but as that is also used in other places, it
probably makes sense to sort locally.
The issue was introduced in 760bb06cb3cd98832f1e4e7a4eaebd98b66d2bdd.
Commit: b69dd3366863acff56b0b2efdc4c4938097bb43e
https://github.com/llvm/llvm-project/commit/b69dd3366863acff56b0b2efdc4c4938097bb43e
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/expand.mlir
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedload.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
Log Message:
-----------
[mlir][vector][nfc] Update integration tests (#210090)
Add comments, unify naming, remove redundant printing hooks.
Commit: 8b269587981fdc3b487cda5559ef75eeb475e613
https://github.com/llvm/llvm-project/commit/8b269587981fdc3b487cda5559ef75eeb475e613
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
Log Message:
-----------
[VectorCombine][X86] Add test coverage for #209714 (#210063)
Commit: 981c0f9037fc2e1e5c70ba2cfe61128557b5eeff
https://github.com/llvm/llvm-project/commit/981c0f9037fc2e1e5c70ba2cfe61128557b5eeff
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/thread/finish-from-empty-func/TestEmptyFuncThreadStepOut.py
M lldb/test/API/functionalities/thread/finish-from-empty-func/main.c
Log Message:
-----------
[lldb][test] Handle potential compiler differences in TestEmptyFuncThreadStepOut.py (#210050)
Fixes #195958
It was reported that this test sometimes failed in CI because lldb would
step out to line 6 instead of line 7.
Jim Ingham expained on the issue that both could be valid locations
(https://github.com/llvm/llvm-project/issues/195958#issuecomment-4384269846).
There's no garauntee that "step out" would go to the source line after
the call you step out of. All it does is go to the first location
outside of the call. If the compiler so chose, that could be on the same
line as the call.
I was not able to reproduce this failure mode, but I think it was
happening in CI before, and is possible. So I've made the test accept
line 6 or 7. Anything further than that we've gone too far and the test
will fail.
Commit: 9ee8b18b6c0758e57cedfa57e99ba85dfd247d35
https://github.com/llvm/llvm-project/commit/9ee8b18b6c0758e57cedfa57e99ba85dfd247d35
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/Vector/CPU/gather.mlir
Log Message:
-----------
[mlir][vector] Fix e2e test post #210090 (#210270)
Failing bots:
* https://lab.llvm.org/buildbot/#/builders/177/builds/37626
* https://lab.llvm.org/buildbot/#/builders/116/builds/30570
Commit: 4894d4e87c332af24809b20573d880a4073b738b
https://github.com/llvm/llvm-project/commit/4894d4e87c332af24809b20573d880a4073b738b
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/Driver/darwin-target-variant-sdk-version.c
Log Message:
-----------
[clang][driver] Add a -target-variant alias for -darwin-target-variant (#208388)
Swift Build uses the `-target-variant` argument which is an alias for
-darwin-target-variant that's only present in the Xcode version of
clang. Upstream it for general support and parity with swiftc.
Co-authored-by: Alex Lorenz <arphaman at gmail.com>
Commit: 12c4c0bf0269218c6ffdddae1c895f892a3e4e75
https://github.com/llvm/llvm-project/commit/12c4c0bf0269218c6ffdddae1c895f892a3e4e75
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
Log Message:
-----------
[AMDGPU] Handle expert scheduling VA_VDST WAR hazards (#201619)
Handle WAR hazards where a VALU reading a VGPR is followed by a VMEM
writing the same VGPR. It is possible, though not very common, that the
VMEM will complete first. To guard against this the compiler must insert
a wait on VA_VDST.
Commit: 2580624091e36b85c162439513eef8e752217a1d
https://github.com/llvm/llvm-project/commit/2580624091e36b85c162439513eef8e752217a1d
Author: cqwrteur <oyzawqgcfc at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
Log Message:
-----------
[libcxx] avoid include Uppercase windows headers (#208903)
We should use unknwn.h and windows.h instead of Unknwn.h and Windows.h
because Linux and other non‑Windows systems treat filenames as
case‑sensitive. Windows does not, so mixed‑case includes work there but
break elsewhere. Both mingw‑w64‑crt and windows‑msvc‑sysroot provide all
Windows headers in fully lowercase, so using the lowercase forms ensures
consistent cross‑platform builds.
Fixes #208901
Commit: a3bcc010c7b7d5fa43ab7928a88312841c4322dd
https://github.com/llvm/llvm-project/commit/a3bcc010c7b7d5fa43ab7928a88312841c4322dd
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
A lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)
In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When importing ARM64X
image, add both native and EC views to the symbol table on EC targets.
Also getMachine() on such images returns ARM64X, treat it as ARM64
instead.
Commit: f520e7083a12f0642eff8fc19fc4c90ccccc7da5
https://github.com/llvm/llvm-project/commit/f520e7083a12f0642eff8fc19fc4c90ccccc7da5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
Log Message:
-----------
[SPIR-V][NewPM] Fix SPIRVEmitIntrinsics registration with the new pass manager (#209966)
Commit: 0e1b0935ff6f326ba1b9c2d23ba9fa7b41e6941d
https://github.com/llvm/llvm-project/commit/0e1b0935ff6f326ba1b9c2d23ba9fa7b41e6941d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
Log Message:
-----------
[SPIR-V] Preserve signed i1 semantics in sitofp (#209232)
selectIToF hardcoded IsSigned=false when materializing the bool-to-int
conversion, so sitofp i1 true was miscompiled as 1.0 instead of -1.0
Commit: 5fcab35be3b450256e3b02a735900071c0b74a54
https://github.com/llvm/llvm-project/commit/5fcab35be3b450256e3b02a735900071c0b74a54
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/amdhsa-kernel-prologue.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
Log Message:
-----------
[AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (#209517)
Warn if an entrypoint does not start with the standard workaround
sequence.
Commit: 6cafa889cd398ca70992e0df518b2414a2607327
https://github.com/llvm/llvm-project/commit/6cafa889cd398ca70992e0df518b2414a2607327
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit
M lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
A lldb/test/Shell/SymbolFile/NativePDB/static-class-constants.cpp
Log Message:
-----------
[lldb][NativePDB] Use active bits for constant width (#196104)
Static constants with bit widths less than 16 (e.g. char/unsigned char)
in classes were not available. These constants are still encoded with 16
bits
([here](https://github.com/llvm/llvm-project/blob/dd145eb8997878143f648a7601741f6409330963/llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp#L341-L343))
even though they only need less bits. When we tried to create an
initializer for them, we'd check if the bit width (=16) was small enough
to fit into the target (<16). This would fail.
This was a problem in the following code:
```cpp
struct Foo {
// width(unsigned char) = 8, but 255 was encoded and read as 16 bit
static constexpr unsigned char u8_max = 255;
};
```
This PR fixes the issue by using `APSInt::getActiveBits` for unsigned
types and `APSInt::getSignificantBits` for signed types. They get the
number of bits required to encode the value. For example a constant 64
would need 7 bits in unsigned and 8 bits in signed types.
Commit: e8f9589942ecd93d94de2af2e875964693e55129
https://github.com/llvm/llvm-project/commit/e8f9589942ecd93d94de2af2e875964693e55129
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/dxc_debug.hlsl
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/test/CodeGen/DirectX/ContainerData/ContainerFlags.ll
Log Message:
-----------
[Driver][DirectX] Add `/Qstrip_debug` flag (#204832)
Add the flag that removes ILDB part from the main DXContainer.
Commit: d444e3ebb8ae69cdb628be3b3b0c632f13df9a08
https://github.com/llvm/llvm-project/commit/d444e3ebb8ae69cdb628be3b3b0c632f13df9a08
Author: Chibuoyim (Wilson) Ogbonna <ogbonnachibuoyim12 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprCXX.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
Log Message:
-----------
[Clang][Sema] Fix crash in UnresolvedMemberExpr check (#209792)
This closes https://github.com/llvm/llvm-project/issues/209427
The test currently crashes because while iterating over the candidate
members of an unresolved member expression, `decl` is a `UsingShadowDecl`
with underlying decl as `UnresolvedUsingValueDecl`.
The current `isa<UnresolvedUsingValueDecl>(decl)` guard only checks the
outer `UsingShadowDecl` and misses the unresolved-using decl hidden
inside it, so `getAsFunction()` returns nullptr and
`cast<CXXMethodDecl>(nullptr)` asserts.
This patch checks the `UnresolvedUsingValueDecl` inside by calling
`getUnderlyingDecl()` before the guard.
This used to happen before a2794f9f363361f87a3538b90b78ff13381d5ce1.
Commit: 06effa5b965f68a24dcea8550efc86225b186f54
https://github.com/llvm/llvm-project/commit/06effa5b965f68a24dcea8550efc86225b186f54
Author: mayanksolanki393 <mayanksolanki393 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/Verifier/matrix-intrinsics.ll
Log Message:
-----------
[LLVM][Verifier] Remove constant-only matrix stride check (#207665)
Remove the verifier check requiring constant column-major matrix
load/store strides to be greater than or equal to the row count.
The stride operand is not an immarg, so the verifier must not enforce
constraints that only apply when the argument happens to be constant.
Commit: afa73e4ff6db57b0416eb44127105b8092bd01f8
https://github.com/llvm/llvm-project/commit/afa73e4ff6db57b0416eb44127105b8092bd01f8
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/eq.ll
M llvm/test/Transforms/ConstraintElimination/ne.ll
Log Message:
-----------
[ConstraintElimination] Handle equality predicates with signed system (#205331)
Equality predicate solving has been supported for quite a while, eq/ne
facts were extended to the signed constraint system more recently
(7fb97bee9269f0d4239908ac8def70be696991c6). When solving
eq/ne conditions, query the signed system as well on inconclusive
answers from the unsigned one.
Fixes: https://github.com/llvm/llvm-project/issues/205282.
Fixes: https://github.com/llvm/llvm-project/issues/63505.
Commit: 2b2df2677619cb0377d27d8b766b8fc265749345
https://github.com/llvm/llvm-project/commit/2b2df2677619cb0377d27d8b766b8fc265749345
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
R lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
Revert "[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)" (#210299)
This reverts commit a3bcc010c7b7d5fa43ab7928a88312841c4322dd, which
breaks in asan build.
Commit: 2a006dff821342c1726fd3137f804186851a26bb
https://github.com/llvm/llvm-project/commit/2a006dff821342c1726fd3137f804186851a26bb
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vashr.mir
Log Message:
-----------
[AArch64][GlobalISel] Add sign bits for G_VASHR (#210269)
Ports the `AArch64ISD::VASHR` case from
`ComputeNumSignBitsForTargetNode` to the GlobalISel hook: an arithmetic
right shift by K adds K copies of the sign bit, so the result has
`min(SignBits(Src) + K, ScalarSizeInBits)` sign bits. `G_VASHR`'s shift
amount is always an immediate in `[1, ElementBits]`.
Follow-up to #198314, which added the `G_FCM*` cases.
Assisted by Claude (Anthropic).
Commit: a4cad33430cf5d2d03eb91ce5e41ed1b9ef7cc4d
https://github.com/llvm/llvm-project/commit/a4cad33430cf5d2d03eb91ce5e41ed1b9ef7cc4d
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Support/KnownBits.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[KnownBits] Use X < Y identity and umin(MaxX, MaxY - 1) bound in urem (#210262)
Tightens `KnownBits::urem` with the two facts `ConstantRange::urem`
already uses:
- `L % R == L` when `MaxL < MinR`: return the LHS bits unchanged. This
can propagate known one bits, which the current leading-zeros-only
reasoning never produces.
- `L % R <= umin(MaxL, MaxR - 1)`, since a zero divisor is UB: keep that
bound's leading zeros. This is one bit stronger than the per-operand
leading-zero count when `MaxR` is a power of two, and together with
`remGetLowBits` it subsumes the power-of-two-constant special case,
which is removed.
Soundness is covered by the existing exhaustive unit test (widths 1 and
4; additionally brute-forced at width 5). Across all 6480 valid width-4
KnownBits pairs, non-optimal results drop from 3332 to 2090. The
residual is number-theoretic (e.g. the exact value of `10 % 3`), out of
reach of leading-bit/range reasoning, so `CheckOptimality` stays off for
urem, as for udiv (#209360).
Assisted by Claude (Anthropic).
Commit: 671c0a275a1f304f22855fabb299090233fdbd54
https://github.com/llvm/llvm-project/commit/671c0a275a1f304f22855fabb299090233fdbd54
Author: tyan0 <takashi.yano at nifty.ne.jp>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
A clang/test/Driver/Inputs/resource_dir/lib/cygwin/libclang_rt.builtins-x86_64.a
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-pc-windows-cygnus/libclang_rt.builtins.a
A clang/test/Driver/cygwin-print-file-name.c
Log Message:
-----------
[Clang][Driver] Fix compiler-rt library directory for cygwin (#208925)
If compiler-rt is built with `LLVM_ENABLE_PER_TARGET_RUNTIME_DIR=OFF`,
its search directory is incorrect.
Specifically, `ToolChain::getOSLibName()` returns `windows` instead of
`cygwin` in a Cygwin environment, due to falling back to getOS(). This
results in a link error against compiler-rt.
This patch makes `getOSLibName()` return `cygwin`, ensuring that
compiler-rt is linked correctly.
---------
Signed-off-by: Takashi Yano <takashi.yano at nifty.ne.jp>
Commit: 8377d59dfade3f1a4bf5779ddd90359bd4ddc249
https://github.com/llvm/llvm-project/commit/8377d59dfade3f1a4bf5779ddd90359bd4ddc249
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libsycl/src/event.cpp
M libsycl/unittests/event/event.cpp
Log Message:
-----------
[libsycl] add explicit instantiations for event::get_profiling_info (#210118)
Assisted by GH Copilot.
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 4d37b5bf3099d099302cce447168b3ece4efef5e
https://github.com/llvm/llvm-project/commit/4d37b5bf3099d099302cce447168b3ece4efef5e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
Log Message:
-----------
[LV] Add additional SCEV expansion tests with AddRecs. (NFC) (#210159)
Add additional test coverage for SCEV expansion of AddRecs, including
cases where extends are needed, different start and steps, as well as
cases where the outer header is not the plan's entry block.
Commit: a9e5bb572703780e3eea4a2759104a141ea73466
https://github.com/llvm/llvm-project/commit/a9e5bb572703780e3eea4a2759104a141ea73466
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/tools/clang-ssaf-linker/BUILD.gn
Log Message:
-----------
[gn build] Port 398f2117379f (#210308)
Commit: 9a2d9c7fef47c0af321150f75d8f21db06cccb43
https://github.com/llvm/llvm-project/commit/9a2d9c7fef47c0af321150f75d8f21db06cccb43
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/ARM/select-imm.ll
A llvm/test/Transforms/IndVarSimplify/iv-widen-addrec-flag-inferred-late.ll
Log Message:
-----------
[SCEV] Try to fold ZExt/SExt of AddRec before existing lookup. (#208805)
Move AddRec fold for ZExt & SExt before existing SCEV lookup. This can
improve results, when we constructed SCEV for a ZExt/SExt during earlier
analysis and flags on the operand AddRec have not been
refined/strengthend yet.
This improves results in some cases and fixes a regression here:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/654#discussion_r3554885279.
On a large C/C++ corpus with 32k bitcode files, ~2% more IVs get
widened, removing a large number of ZExt instructions.
Compile-time impact in the noise
https://llvm-compile-time-tracker.com/compare.php?from=167d65906cc3c636221158abe8289ab4a03dfc7d&to=381abca0d5ead4443d86287d754f47c21396a9be&stat=instructions:u
Commit: 62a932ac3e2702a5493934c6362f9e058a204557
https://github.com/llvm/llvm-project/commit/62a932ac3e2702a5493934c6362f9e058a204557
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/SystemZ/systemz-module.flags.c
M llvm/include/llvm/IR/Module.h
M llvm/lib/IR/Module.cpp
Log Message:
-----------
[SystemZ][z/OS] Fix zos_translation_time module flag (#210058)
The zos_translation_time flag needs to be 64-bit to handle the year 2038
problem.
Commit: 23b0281d75a4320a4e6e3d837edf94911d98d252
https://github.com/llvm/llvm-project/commit/23b0281d75a4320a4e6e3d837edf94911d98d252
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/tailcall-i686-pic.ll
Log Message:
-----------
[X86] Fix assertion failure for tail call on i686+pic (#210302)
The pattern for TCRETURNmi has a IsNotPIC predicate, but the
checkTCRetEnoughRegs() predicate that's part of the X86tcret_enough_regs
PatFrag is evaluated first, so we can't assert that PIC is disabled
here. We should just return false in that case.
Fixes https://github.com/llvm/llvm-project/issues/210300.
Commit: 38104cf836c3903647c917a5b251e938f4eadbb9
https://github.com/llvm/llvm-project/commit/38104cf836c3903647c917a5b251e938f4eadbb9
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
A llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
A llvm/test/CodeGen/AArch64/sve-ptrue-coalesce.mir
Log Message:
-----------
[LLVM][SVE] Add MachineInst pass to coalesce PTRUE instructions. (#204820)
SVE predicate registers contain a bit for each byte of a data register.
When operating on bigger element types the overlaping predicate bits are
grouped together but typically only the least-significant-bit is read as
part of the operation. This means the value of the other bits does not
affect the operation, making it possible to use the result of PTRUE for
a larger element typed operation, assuming the predicate patterns are
equivalent. For example:
ADD_S (PTRUE_H 31), Z0, Z1 == ADD_S (PTRUE_S 31), Z0, Z1
AArch64PTrueCoalescingPass uses this fact to reduce the number of PTRUE
instructions in a function, with the general trend towards needing a
single PTRUE based on the smallest element type in use.
NOTE: The pass will be enabled by default using a dedicated PR to make
it easier to revert if something goes wrong.
Commit: de4f929700f8d87041e0b050ec6028f0ac5276ad
https://github.com/llvm/llvm-project/commit/de4f929700f8d87041e0b050ec6028f0ac5276ad
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_x86.h
Log Message:
-----------
[lldb][x86] Remove GCC 6 workaround (#210317)
Added by 3bea7306e8669f94bacafae68748a9139cfc0b98.
We now require GCC >= 7.4 so it can be removed.
I tested a standalone reproducer with GCC 7.3 and
clang 5. Neither have the problem.
https://godbolt.org/z/3zKrT9c8s
Standalone reproducer:
```
struct Base {
Base(int) {}
};
struct Derived : virtual Base {
#ifdef WORKAROUND
Derived(int a): Base(a) {}
#endif
virtual void g() = 0;
};
struct Final : Derived {
Final(int n) : Base(n)
#ifdef WORKAROUND
, Derived(n)
#endif
{}
void g() override {}
};
```
Commit: b9f5bcbcfbe6aa4943c808afd3bb82243ecb3193
https://github.com/llvm/llvm-project/commit/b9f5bcbcfbe6aa4943c808afd3bb82243ecb3193
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/CodeGen/CodeGenABITypes.h
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenTypes.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/sysv_abi.c
R clang/test/CodeGen/target-avx-function-abi.c
R clang/test/CodeGenCXX/target-avx-method-abi.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/CodeGen/TestCompiler.h
Log Message:
-----------
Revert "[clang][CodeGen][X86_64] Honor per-function AVX ABI in C/C++ call paths, maintain old psABI for PlayStation." (#210303)
Reverts llvm/llvm-project#193298
Causes a major compile-time regression.
Commit: 75ec1a4e80a9377f8f1e2ff063b094e016787926
https://github.com/llvm/llvm-project/commit/75ec1a4e80a9377f8f1e2ff063b094e016787926
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-default-address-space.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-init-expr.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-multi-gve.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-no-backing-var.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-no-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-path-null.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-skip-type-not-in-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable-static-member.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-global-variable.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugGlobalVariable (#207230)
Add emitDebugGlobalVariable to the NSDI handler, translating each
DIGlobalVariable to a
[DebugGlobalVariable](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugGlobalVariable)
ext inst.
Commit: 4f76a4c5a3f8711fe13b05c0f93ac78349396292
https://github.com/llvm/llvm-project/commit/4f76a4c5a3f8711fe13b05c0f93ac78349396292
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[NFC] RelNotes Formatting fix I screwed up in 209893 (#210325)
Commit: 40ae05d4773f5c1b2a84ea7dc908d92671b8daa9
https://github.com/llvm/llvm-project/commit/40ae05d4773f5c1b2a84ea7dc908d92671b8daa9
Author: adams381 <adams at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/IntTypeABIAlignTest.cpp
Log Message:
-----------
[CIR] Return power-of-two ABI alignment for non-fundamental int widths (#210187)
`cir::IntType::getABIAlignment` returns `width / 8` for non-`_BitInt`
integers. For a non-fundamental width such as `i24` it returns 3, which
is
not a power of two, so a consumer that builds an `llvm::Align` from it
would
hit the power-of-two assertion unless it rounds the value up itself.
This rounds the alignment up to a power of two inside `getABIAlignment`,
matching how LLVM's default DataLayout aligns these (an `i24` aligns
like
`i32`). The fundamental widths are unchanged (`i8` -> 1, `i16` -> 2,
`i32` -> 4, `i64` -> 8), `__int128` stays at 16, and a sub-byte width
like
`i1` now reports 1 instead of 0. A unit test pins these cases.
Commit: 1f2772f8e26beb909c2a559f1fb08697e3e06909
https://github.com/llvm/llvm-project/commit/1f2772f8e26beb909c2a559f1fb08697e3e06909
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP conv2d (#210054)
- Adds profile compliance support for MXFP conv2d
- Relax conv2d accumulator constraits. They are checked as part of
validation pass
and this would allow experimentation with different types.
Signed-off-by: Iliyan Georgiev <iliyan.georgiev at arm.com>
Commit: 6f64e7cf0ad7699a5f1e6b2418d4c2cdcdb26470
https://github.com/llvm/llvm-project/commit/6f64e7cf0ad7699a5f1e6b2418d4c2cdcdb26470
Author: Shreyansh Lodha <lodhashreyansh1603 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/Parser.cpp
M clang/test/AST/ast-dump-decl.cpp
A clang/test/AST/ast-dump-deleted-defaulted-range.cpp
M clang/test/AST/ast-dump-funcs.cpp
M clang/test/AST/ast-dump-record-definition-data-json.cpp
M clang/test/Analysis/inlining/Inputs/expected-plists/path-notes.cpp.plist
M clang/test/CoverageMapping/default-method.cpp
M clang/unittests/AST/SourceLocationTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
Log Message:
-----------
[Clang][AST] Add source range for deleted and defaulted functions (#205408)
Earlier wrong ranges for default and deleted functions were reported.
Post this fix all ranges for functions are reported.
Fix: Extended the declarator's source range to include the delete /
default tokens by calling
D.SetRangeEnd(PP.getLocForEndOfToken(KilLoc).getLocWithOffset(-1)) after
consuming each keyword in ParseFunctionDefinition. Previously, the range
ended at the function name, onitting the delete/default specifier
entirely.
Regression tested and no regressions found.
Assisted-by: Claude Code (Anthropic) — used in developing this patch.
Closes #64805
Commit: 7c1b00b38d7fb9eecfd345c51f9e9509e6b039ad
https://github.com/llvm/llvm-project/commit/7c1b00b38d7fb9eecfd345c51f9e9509e6b039ad
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
Log Message:
-----------
[AMDGPU] Fix type of SIlds / AMDGPUISD::LDS node (#210340)
iPTR means i64 here, but this node operates on 32-bit LDS addresses.
Commit: 499b69cf07e03a23a420ee773261fcfcfc1c3df9
https://github.com/llvm/llvm-project/commit/499b69cf07e03a23a420ee773261fcfcfc1c3df9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
Log Message:
-----------
[DWARFLinker] Fix data race on the per-unit file-name cache (#208967)
CompileUnit::getDirAndFilenameFromLineTable reads and mutates the unit's
FileNames DenseMap without synchronization. During the parallel
type-name assignment phase a unit's cache is touched both by its own
worker and, through cross-unit type-name references
(addReferencedODRDies calling addDieNameFromDeclFileAndDeclLine) by
other units' workers.
The concurrent find/insert/grow corrupts the map and trips the
assertion:
```
Assertion failed: (TheBucket), function findBucketForInsertion, DenseMap.h
```
Guard the cache with a mutex. Store each entry in a heap-allocated pair
so the StringRefs handed back to callers stay valid across a concurrent
rehash. Otherwise a short (small-string-optimized) file name would move
when another insertion grows the map, dangling a StringRef already
returned.
Commit: 2a00d50e6012e1ee31904d394c088be907b6aa8b
https://github.com/llvm/llvm-project/commit/2a00d50e6012e1ee31904d394c088be907b6aa8b
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
Log Message:
-----------
[Flang][OpenACC] Check routine level for function references in loops (#209529)
Extend the loop/routine-level compatibility check to `FunctionReference`
calls. Resolve `!$acc routine` information from procedure pointers and
interface symbols, not only `SubprogramDetails`.
Commit: f1b5b061832610e78d5be7313f0ab3e5e55d790f
https://github.com/llvm/llvm-project/commit/f1b5b061832610e78d5be7313f0ab3e5e55d790f
Author: David Young <davidayoung at meta.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestingConfig.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/main.py
A llvm/utils/lit/tests/Inputs/pass-env/lit.cfg
A llvm/utils/lit/tests/Inputs/pass-env/test.txt
A llvm/utils/lit/tests/pass-env.py
Log Message:
-----------
Modify lit config to allow specify extra env vars to pass through to lit invocation (#208239)
lit's pass-through environment allow-list is hard-coded in
TestingConfig.py. There are cases where a particular test environment
needs an extra variable passed through (e.g. credentials or tooling
paths required to fetch dependencies during a test), but today the only
way to add one is to fork this list downstream.
This adds a --pass-env NAME option (repeatable, and also honored via
LIT_OPTS) that copies the named variable from lit's environment into the
test environment, in addition to the built-in allow-list. Since the
caller chooses exactly which variables to forward, passing through a
wrong or sensitive variable is user error rather than a default. The
default is empty, so existing behavior — only the hard-coded list is
passed through — is unchanged.
test creation help via Claude
Commit: d7aacfc940c3f1553973f1ebf7d11a6513fda1ed
https://github.com/llvm/llvm-project/commit/d7aacfc940c3f1553973f1ebf7d11a6513fda1ed
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/common/DomainSocket.h
M lldb/source/Host/common/DomainSocket.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
M lldb/unittests/Utility/UriParserTest.cpp
Log Message:
-----------
[lldb] Support Windows paths in AF_UNIX domain-socket URIs (#206985)
On Windows an `AF_UNIX` socket path is a native filesystem path. Placed
directly in a unix-connect:// URI it isn't a valid `host:port`
authority, so `URI::Parse` confuses the drive letter colon as a port
separator and connection setup fails.
This patch converts the path in the [RFC
8089](https://datatracker.ietf.org/doc/html/rfc8089) file-URI form
instead which parses as an ordinary URI with an empty host. DomainSocket
converts between the native path and this URI form at its boundaries.
Both are no-ops on POSIX: behavior is unchanged, and `URI::Parse` and
the GDB-remote consumers are left untouched.
rdar://180736036
Commit: 0b1652db8a18b336f39855fcf9b5137fa0b4b3c9
https://github.com/llvm/llvm-project/commit/0b1652db8a18b336f39855fcf9b5137fa0b4b3c9
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-xchg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv64.mir
Log Message:
-----------
[RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (#209983)
This commit makes `xchg` consistent with `add/and/or/xor` across all
type/extension combinations. Updates `legalizer-info-validation.mir` for
the newly defined rules and adds `atomicrmw-xchg.ll` and
`legalize-atomicrmw-xchg-rv{32,64}.mir` tests.
Commit: d05f7b28b6f7de6e9ca89e1b9e3aca8c8380e322
https://github.com/llvm/llvm-project/commit/d05f7b28b6f7de6e9ca89e1b9e3aca8c8380e322
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port 38104cf836c3 (#210356)
Commit: 45f76eac198fdee52d61c57e667f48a7f5e9581f
https://github.com/llvm/llvm-project/commit/45f76eac198fdee52d61c57e667f48a7f5e9581f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port 40ae05d4773f (#210357)
Commit: 30f270edb42c5d37e4c4a413ebfc7a6513565b30
https://github.com/llvm/llvm-project/commit/30f270edb42c5d37e4c4a413ebfc7a6513565b30
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
A lld/test/COFF/link-dll-arm64x.s
Log Message:
-----------
[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210311)
In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When linking against
an ARM64X image, add both native and EC views to the symbol table on EC
targets. Also getMachine() on such images returns ARM64X, treat it as
ARM64 instead.
Commit: 4671287932028a32caa4bce6aea35f9de3f1daa8
https://github.com/llvm/llvm-project/commit/4671287932028a32caa4bce6aea35f9de3f1daa8
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Reuse preloaded exe module on launch (#210010)
# Brief
Recreating the module everytime causes the path to be canonicalized.
This does not work well with subst drives, because the newly created
module will not have the correct drive path, causing breakpoints to be
unresolved.
# Description
`ProcessWindows::OnDebuggerConnected` derives the executable module from
`GetModuleFileNameExW` on every connect. This returns the process
image's *real* path, so when the target is created via a subst'd or
mapped drive (e.g. `S:\...\a.out`, where `S:` is subst for `C:\S`) it
comes back as `C:\S\...\a.out`. `GetOrCreateModule` then fails to match
the module LLDB had already preloaded and creates a duplicate instead.
The duplicate leaves the original module's breakpoint location orphaned
unresolved while the new module's location is resolved, so a source line
breakpoint reports two locations with only one resolved. Generic tests
that assert exactly one resolved location fail with `"2 != 1"` and
`"Expecting 1 locations, got 2"`.
# Fix
This patch fixes this by first attempting to reuse the existing module
if it exists. In practice, LLDB only looks for the executable during
attach.
This is a problem in Swiftlang where we run our tests with a subst
drive. The impacted tests are:
-
`lang/c/{array_types,function_types,set_values,enum_types,anonymous,forward,local_variables}`
- `lang/cpp/{class_types,inlines}`
- `commands/{apropos/with-process,command/nested_alias,memory/write}`
- `functionalities/{memory/find,dead-strip,memory/holes}`
- `commands/expression/entry-bp`
Commit: e57b9c0761706905e42da3cfa485cebc3629d72a
https://github.com/llvm/llvm-project/commit/e57b9c0761706905e42da3cfa485cebc3629d72a
Author: Prajwal Nadig <pnadig at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
A clang/test/ExtractAPI/availability_typedef_anonymous_record.c
Log Message:
-----------
[ExtractAPI] Include availability attributes for anonymous typedefs (#209187)
When an anonymous type is defined and has availability attributes, the
attributes are attached to the typedef rather than the type being
defined. This patch updates the anonymous type handling logic to merge
the availability from the typedef in order to correctly include it in
the symbol graph.
rdar://125497949
Commit: 06340b81573a6824c0ddd54fcba5ae8ffacacd6f
https://github.com/llvm/llvm-project/commit/06340b81573a6824c0ddd54fcba5ae8ffacacd6f
Author: Prajwal Nadig <pnadig at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ExtractAPI/DeclarationFragments.h
M clang/lib/ExtractAPI/DeclarationFragments.cpp
A clang/test/ExtractAPI/objc_nullability.m
Log Message:
-----------
[ExtractAPI] Include nullability attributes (#209221)
Nullability attributes (nullable, nonnull, null_unspecified,
null_resettable) add valuable context about the type, and would be
useful when viewing declarations. This patch updates ExtractAPI to
include these attributes in the symbol graph.
rdar://139097216
Commit: 709b7d1bd4a71e484702d610f81b5cf84303386f
https://github.com/llvm/llvm-project/commit/709b7d1bd4a71e484702d610f81b5cf84303386f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Pull out isFoldableAsShuffle lamdba as helper function. NFC. (#210354)
For future reuse.
Commit: de5cef3127047836fceb416f8083942783834489
https://github.com/llvm/llvm-project/commit/de5cef3127047836fceb416f8083942783834489
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-reduce-to-contract.mlir
Log Message:
-----------
[mlir][vector] Extend `combineContractAndBroadcast` to accept `vector.shape_cast` (#208752)
`combineContractAndBroadcast` is a pattern that matches
`vector.contract` operations whose inputs are defined by
`vector.broadcast`, e.g.:
```mlir
%0 = vector.broadcast %lhs : vector<8x4xi32> to vector<1x8x4xi32>
%1 = vector.broadcast %rhs : vector<8x4xi32> to vector<1x8x4xi32>
%result = vector.contract {
indexing_maps = [#map0, #map1, #map2],
iterator_types = ["reduction", "parallel", "parallel", "reduction"],
kind = #vector.kind<add>
} %0, %1, %acc : vector<1x8x4xi32>, vector<1x8x4xi32> into vector<8x8xi32>
```
The pattern folds away the reduction over a unit dimension introduced by
the defining operations, producing a simplified `vector.contract`:
```mlir
vector.contract {
indexing_maps = [#[[$MAP0]], #[[$MAP1]], #[[$MAP2]]]
iterator_types = ["parallel", "parallel", "reduction"]
} %0, %1, %acc : vector<8x4xi32>, vector<8x4xi32> into vector<8x8xi32>
```
This change extends the pattern to also accept broadcast-like
`vector.shape_cast` operations:
```mlir
%0 = vector.shape_cast %lhs : vector<8x4xi32> to vector<1x8x4xi32>
%1 = vector.shape_cast %rhs : vector<8x4xi32> to vector<1x8x4xi32>
%result = vector.contract {
indexing_maps = [#map0, #map1, #map2],
iterator_types = ["reduction", "parallel", "parallel", "reduction"],
kind = #vector.kind<add>
} %0, %1, %acc : vector<1x8x4xi32>, vector<1x8x4xi32> into vector<8x8xi32>
```
Note that `mlir::vector::isBroadcastableTo` was only moved to make it
available to the newly introduced `ShapeCastOp` helper,
`ShapeCastOp::isBroadcastLike()`.
Commit: bcb459015e12fb03e4ae3d56393883b2974f96fb
https://github.com/llvm/llvm-project/commit/bcb459015e12fb03e4ae3d56393883b2974f96fb
Author: Zachary Henkel <zachary.henkel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/sanitizer_common/android_commands/android_common.py
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
Log Message:
-----------
Replace Python's deprecated tempfile.mktemp() with secure temp APIs (#210123)
Python's tempfile.mktemp() is deprecated and insecure: it returns a path
without creating the file, leaving a TOCTOU/symlink window before the
file is opened. Replace every use, choosing the temp API by lifetime:
- compiler-rt android_common.py adb(): tempfile.TemporaryFile
(anonymous, auto-deleted), read back via seek(0); drops manual
close()/unlink().
- compiler-rt android_common.py pull_from_device():
tempfile.TemporaryDirectory so "adb pull" writes into a private,
auto-cleaned directory.
- lldb examples delta.py / gdbremote.py start_gdb_log():
tempfile.NamedTemporaryFile(delete=False); the log must outlive the call
for a later stop_gdb_log, so it is intentionally not auto-deleted.
Reported by internal static analysis and contributed upstream for the
benefit of the wider community.
Assisted-by: GitHub Copilot CLI (Claude Opus 4.8)
I do not have commit access and will need someone to submit on my
behalf.
Commit: 5f7060ce4559c1079e850c96b106f1a43955b828
https://github.com/llvm/llvm-project/commit/5f7060ce4559c1079e850c96b106f1a43955b828
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/Sema.h
R clang/include/clang/Sema/TemplateInstCallback.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
R clang/test/Templight/templight-deduced-func.cpp
R clang/test/Templight/templight-default-arg-inst.cpp
R clang/test/Templight/templight-default-func-arg.cpp
R clang/test/Templight/templight-default-template-arg.cpp
R clang/test/Templight/templight-empty-entries-fix.cpp
R clang/test/Templight/templight-exception-spec-func.cpp
R clang/test/Templight/templight-explicit-template-arg.cpp
R clang/test/Templight/templight-memoization.cpp
R clang/test/Templight/templight-nested-memoization.cpp
R clang/test/Templight/templight-nested-template-instantiation.cpp
R clang/test/Templight/templight-one-instantiation.cpp
R clang/test/Templight/templight-prior-template-arg.cpp
Log Message:
-----------
[clang] remove templight support (#210166)
Removed as unmaintained, per discussion in
https://discourse.llvm.org/t/rfc-removing-templight-support/90777
Commit: 60846c8b0c1c47c03c25fe28ecaea00e698a3450
https://github.com/llvm/llvm-project/commit/60846c8b0c1c47c03c25fe28ecaea00e698a3450
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext][NFC] Add cross-project tests for packed zip/unzip intrinsics (#209575)
Commit: a55b011dabf8e5761d9955f98aa1138a10bd1a8a
https://github.com/llvm/llvm-project/commit/a55b011dabf8e5761d9955f98aa1138a10bd1a8a
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/test/CodeGen/SystemZ/systemz-module.flags.c
Log Message:
-----------
[SystemZ/[z/OS] Guard source-epoch related testcase to 64-bit clang targets (#210341)
This patch guards the following testcase for 64-bit clang targets Clang :: CodeGen/SystemZ/systemz-module.flags.c
Commit: d63bd842939f22fad4e29660d66b99a9bf94e4b4
https://github.com/llvm/llvm-project/commit/d63bd842939f22fad4e29660d66b99a9bf94e4b4
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/create-box-codegen.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
Log Message:
-----------
[flang] Added fir.create_box operation. (#210220)
This patch adds `fir.create_box` operation that allows
creating `!fir.box<>` values with arbitrary byte strides.
It can be used to recreate boxes describing non-contiguous
arrays from descriptor components (base_addr/lbs/extents/strides)
across offload regions.
This is just initial definition and code generation code.
The folders and passes producing this operation will be added
later.
Commit: fd55bbd6022ccb8d854f580b56c39177e80c256e
https://github.com/llvm/llvm-project/commit/fd55bbd6022ccb8d854f580b56c39177e80c256e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/test/profile/Linux/counter_promo_for.c
M compiler-rt/test/profile/Linux/counter_promo_while.c
Log Message:
-----------
[compiler-rt] Fix tests after #205331 (#210370)
New optimizations changed some compiler-rt tests. Update the test
expectations based on this.
Fixes #210355.
Commit: 0b666f74f94fffc2bc3380365704bcb61f2767d2
https://github.com/llvm/llvm-project/commit/0b666f74f94fffc2bc3380365704bcb61f2767d2
Author: David Young <davidayoung at meta.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
Log Message:
-----------
Add missing BigArchive container plugin to lldb's bazel build (#210304)
Another missing plugin and its libraries in the LLDB bazel build. Based
this one on source/Plugins/ObjectContainer/Big-Archive/CMakeLists.txt
and its dependecies ( {}.cpp & {}.h)
waiting on CI to confirm bazel is correct as cannot build locally.
Can confirm this library will convert to BUCK internally at Meta and
build with buck2 where we do have in the default plugin list.
bazel rule assisted with: claude
Commit: 53c048b3732610c8d2d65c1d41603de26eb6ac4e
https://github.com/llvm/llvm-project/commit/53c048b3732610c8d2d65c1d41603de26eb6ac4e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/ci/images/libcxx_release_runners.txt
Log Message:
-----------
[libc++] Update release runners to the image that was used on main at the branch point (#210378)
This will allow retaining a stable image for CI throughout the whole
LLVM 23 release.
Commit: a67eac3e141e1044dd98524a010e719b42f51f5e
https://github.com/llvm/llvm-project/commit/a67eac3e141e1044dd98524a010e719b42f51f5e
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[NFC][AMDGPU] Cleanup in SOPInstructions.td (#210367)
- Eliminate code which was accidentally merged during a merge-conflict
(https://github.com/llvm/llvm-project/pull/203155/changes#r3560059941)
- Remove comments as they are specific to usubsat.
Commit: db1f902cd6a95c9b80136dfcbe8beb7a58290641
https://github.com/llvm/llvm-project/commit/db1f902cd6a95c9b80136dfcbe8beb7a58290641
Author: Mishal Shah <mishal_shah at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .github/workflows/premerge.yaml
Log Message:
-----------
Add macOS premerge check workflow (#207435)
Added a premerge check workflow for macOS self-hosted runners to build
and test projects.
Commit: f04bf4791ae6d56b822f9bca6eb82ce4adccb989
https://github.com/llvm/llvm-project/commit/f04bf4791ae6d56b822f9bca6eb82ce4adccb989
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/OSUtil/linux/CMakeLists.txt
M libc/src/__support/OSUtil/linux/auxv.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/sys/ipc/linux/CMakeLists.txt
M libc/src/sys/ipc/linux/ftok.cpp
R libc/src/sys/ipc/linux/kernel_statx.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_unlink.cpp
M libc/src/sys/time/linux/CMakeLists.txt
M libc/src/sys/time/linux/utimes.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
M libc/startup/linux/x86_64/tls.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][NFC] Port raw syscall users to existing syscall_wrappers (#208039)
Several call sites still invoked syscall_impl directly (or carried
their own SYS_* fallback ladders) for syscalls that already have a
wrapper in src/__support/OSUtil/linux/syscall_wrappers.
This PR removes these syscalls in favor of the syscall_wrappers.
Commit: 246c752ef1b6098a7aa222f02ca09db76e17cabe
https://github.com/llvm/llvm-project/commit/246c752ef1b6098a7aa222f02ca09db76e17cabe
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add layering deps (#210380)
Not sure why CI didn't catch it, but
c5837b469c6d6f35eb0822cd9ebd7c2aa7e2ab75 adds some targets that are
broken when layering checks are enabled.
Commit: c42ce32264f94a8800f4250d7b716cca55f77df6
https://github.com/llvm/llvm-project/commit/c42ce32264f94a8800f4250d7b716cca55f77df6
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A compiler-rt/docs/ASanABI.md
R compiler-rt/docs/ASanABI.rst
A compiler-rt/docs/BuildingCompilerRT.md
R compiler-rt/docs/BuildingCompilerRT.rst
A compiler-rt/docs/TestingGuide.md
R compiler-rt/docs/TestingGuide.rst
M flang/docs/CMakeLists.txt
A flang/docs/CommandGuide/index.md
R flang/docs/CommandGuide/index.rst
A libsycl/docs/CodingGuidelines.md
R libsycl/docs/CodingGuidelines.rst
A libsycl/docs/index.md
R libsycl/docs/index.rst
M libsycl/test/README.md
A libunwind/docs/BuildingLibunwind.md
R libunwind/docs/BuildingLibunwind.rst
M libunwind/docs/conf.py
A libunwind/docs/index.md
R libunwind/docs/index.rst
M lldb/source/Plugins/TraceExporter/common/TraceHTR.h
A lldb/source/Plugins/TraceExporter/docs/htr.md
R lldb/source/Plugins/TraceExporter/docs/htr.rst
A llvm-libgcc/docs/LLVMLibgcc.md
R llvm-libgcc/docs/LLVMLibgcc.rst
M llvm-libgcc/generate_version_script.py
M offload/docs/conf.py
A offload/docs/index.md
R offload/docs/index.rst
Log Message:
-----------
[docs] Rename misc rst docs to md (#210208)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit.
Many of these miscellaneous .rst files are not actually part of a real
docs build, since docs/conf.py does not exist for many of them.
Commit: 9b096bb7abf7b57182ae8556451aa34dacd535ec
https://github.com/llvm/llvm-project/commit/9b096bb7abf7b57182ae8556451aa34dacd535ec
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/bindings/interfaces.swig
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBProtocolServer.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBProtocolServer.cpp
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBProtocolServerTest.cpp
Log Message:
-----------
[lldb] Add SBProtocolServer to start protocol servers programmatically (#209923)
Starting a protocol server (such as MCP, and in the future potentially
DAP) is only possible from the command line today, via `protocol-server
start`. Add an SB API so an embedder can start one in its own process
and learn where to connect.
SBProtocolServer wraps ProtocolServer::GetOrCreate/Start/Stop and
exposes the listening connection URI. This lets a tool host the engine's
protocol server in-process and talk to it as a normal client, reusing
the server's tools rather than reimplementing them.
Assisted-by: Claude
Commit: 2b6e9d261433f5ec8c49502f91d63dd7d07346c3
https://github.com/llvm/llvm-project/commit/2b6e9d261433f5ec8c49502f91d63dd7d07346c3
Author: Artem Belevich <tra at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/atomicrmw-allow-ftz-atomics.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/CodeGen/NVPTX/atomicrmw.py
M llvm/test/CodeGen/NVPTX/atomics.ll
Log Message:
-----------
[NVPTX] Set default value of nvptx-allow-ftz-atomics to true (#206154)
This is a follow-up to https://github.com/llvm/llvm-project/pull/200732.
Setting the default value of nvptx-allow-ftz-atomics to true preserves
the status quo. It allows the NVPTX backend to emit native
floating-point atomic add instructions by default, rather than falling
back to the CAS loop required for strict FTZ compliance.
Correct FTZ handling forces a lot of existing code to emit CAS loops.
This introduces thread divergence, breaking code that relies on atomic
operations being non-divergent (for example, warp-wide atomic additions
followed by a load of the reduced value without explicit
synchronization).
While FTZ-correct atomic behavior is desirable as a long-term default,
introducing thread divergence into a common operation that previously
"happened to work" without synchronization is highly disruptive.
Defaulting to true makes the FTZ-correct behavior opt-in for now,
allowing users time to audit and adapt their code.
Test cases are updated to verify both enabled and disabled states of the
option, alongside the new default behavior.
Commit: 50c8f07e3eebf1ff5a1d9378d77aef5df9583293
https://github.com/llvm/llvm-project/commit/50c8f07e3eebf1ff5a1d9378d77aef5df9583293
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
A clang/test/Analysis/std-c-library-functions-non-integral-ssize_t.cpp
Log Message:
-----------
[clang][analyzer] Fix assertion failure in StdLibraryFunctionsChecker with non-integral ssize_t (#209655)
In StdLibraryFunctionsCheckers' `RangeConstraint::checkSpecificValidity`
asserted that the constrained argument type is integral. When user code
typedefs `ssize_t` to a non-integral type (e.g. `float`) even though
this violates POSIX.1-2017, which requires `ssize_t` to be a signed
integer type, the signature still matches (same canonical type) and the
assertion fires during constraint validation. Remove it and let
`validateByConstraints` gracefully reject the summary by returning
false.
Fixes #209436
Commit: 40c4fea67f49b841bd064624219efceab91b65e0
https://github.com/llvm/llvm-project/commit/40c4fea67f49b841bd064624219efceab91b65e0
Author: Krisitan Erik Olsen <kristian.erik at outlook.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
A llvm/test/Transforms/SROA/sroa-self-referential-load.ll
Log Message:
-----------
[SROA] Fix assertion failure when promoting self-referential load/store (#208826)
When LoadAndStorePromoter::run processes a block where a store's value
operand is defined by the load being promoted (a self-referential cycle
in unreachable code), it sets StoredValue to the load instruction. When
it then calls replaceAllUsesWith, the doRAUW assertion fires because the
replacement value contains the value being replaced.
The single-block promotion paths in promoteSingleBlockAlloca already
guard against this with a check for ReplVal == LI, replacing with poison
instead. This patch adds the same guard to the in-block load path in
LoadAndStorePromoter::run, which was missing it. Substituting poison is
correct here since this situation only arises in unreachable code.
The regression was introduced in #135609, which added the
propagateStoredValuesToLoads path in SROA that routes through
LoadAndStorePromoter::run. LoadStoreRewriter handles aggregates and is
unrelated to this path.
Fixes #204799
Commit: 714d124d0aaf3effa3e83d01783fe0ed2cd3eea9
https://github.com/llvm/llvm-project/commit/714d124d0aaf3effa3e83d01783fe0ed2cd3eea9
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
Revert "[RISCV][P-ext][NFC] Add cross-project tests for packed zip/unzip intrinsics" (#210401)
Reverts llvm/llvm-project#209575
Commit: 93b1240309309d5c2f8f94527ff7c7bd5df359af
https://github.com/llvm/llvm-project/commit/93b1240309309d5c2f8f94527ff7c7bd5df359af
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M compiler-rt/docs/ASanABI.md
M compiler-rt/docs/BuildingCompilerRT.md
M compiler-rt/docs/TestingGuide.md
M flang/docs/CommandGuide/index.md
M libsycl/docs/CodingGuidelines.md
M libsycl/docs/index.md
M libunwind/docs/BuildingLibunwind.md
M libunwind/docs/index.md
M lldb/source/Plugins/TraceExporter/docs/htr.md
M llvm-libgcc/docs/LLVMLibgcc.md
M offload/docs/conf.py
M offload/docs/index.md
Log Message:
-----------
[docs] Finish misc MyST migration (#210209)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #210208, which is the standalone rename
commit for this miscellaneous Markdown migration batch.
This was prepared with rst2myst plus LLM-assisted cleanup. LLDB man
pages are intentionally left as reStructuredText because LLDB man-page
building should not take on Markdown parser dependencies.
Unfortunately, many of these miscellaneous docs do not have working
standalone doc build targets, so I was not able to render HTML for all
of them. I think the scope is small enough that this is reviewable by
hand.
Commit: 91bb8f4ee8452d3e2bda7544556fa66dba462414
https://github.com/llvm/llvm-project/commit/91bb8f4ee8452d3e2bda7544556fa66dba462414
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
Log Message:
-----------
[VPlan] Introduce vputils::doesGeneratePerAllLanes (#199047)
Introduce a query for recipes that produce scalar values for all VF
lanes, returning true for non-single-scalar replicates, non-first-lane
SIVSteps, and a couple of VPInstructions.
Commit: 93bce300db95e4fbb82b1a6ef69fe125c71b77f3
https://github.com/llvm/llvm-project/commit/93bce300db95e4fbb82b1a6ef69fe125c71b77f3
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN log builtins (#198032)
Adds codegen support for the following AMDGCN log builtins:
- __builtin_amdgcn_logf (float)
- __builtin_amdgcn_log_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.log` intrinsic.
Commit: 3e55f3c56e8706fa12792b5a4de05f636bf798d0
https://github.com/llvm/llvm-project/commit/3e55f3c56e8706fa12792b5a4de05f636bf798d0
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][realpath][test] Create test files/directories (#209369)
Follow-up PRs will add path validation etc to `realpath`, which will
require paths to exist in the filesystem.
This PR bumps the memory limit in `HermeticTestUtils.cpp`. The realpath
unit tests allocate quite a few strings, and since memory in hermetic
tests is never freed, the unit test quickly reaches the limit.
Commit: 4070621c866fb4156f7c7d15039d12a4295f46c2
https://github.com/llvm/llvm-project/commit/4070621c866fb4156f7c7d15039d12a4295f46c2
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-create-box.fir
Log Message:
-----------
[flang][OpenACC] Discover type descriptors referenced by fir.create_box (#210393)
Register the IndirectGlobalAccess interface for fir.create_box so
acc-implicit-declare finds the derived-type type-descriptor global a
create_box of a record array needs on the device, as it already does
for fir.embox and fir.rebox.
Assisted-by: Cursor
Commit: 5c719eeb715632b1afef6508bd6c5ac09369fc91
https://github.com/llvm/llvm-project/commit/5c719eeb715632b1afef6508bd6c5ac09369fc91
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGen/builtins-x86.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
Log Message:
-----------
[CIR] Implement support for builtin FMA (#210365)
Implement support for the _builtin_fma
Commit: 95cc83d45b1b8e4a560efb729bd7e1e16f0b8703
https://github.com/llvm/llvm-project/commit/95cc83d45b1b8e4a560efb729bd7e1e16f0b8703
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/docs/AdminTasks.md
R llvm/docs/AdminTasks.rst
Log Message:
-----------
[docs] Rename AdminTasks to markdown to preserve history (#210415)
Tracking issue: #201242
Migrating this before I make changes to it. A follow-up PR will do the
migration.
Commit: fb0547315ecf3f09fb6fc9122e40ff096a643eaa
https://github.com/llvm/llvm-project/commit/fb0547315ecf3f09fb6fc9122e40ff096a643eaa
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/docs/AdminTasks.md
Log Message:
-----------
[docs] Rewrite AdminTasks.md as markdown (#210416)
Tracking issue: #201242
This is a stacked PR based on #210415 , which does a rename for history
preservation purposes. See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This was prepared with rst2myst.
Commit: d982e0499b7f780279c435403b8249d7c3812cae
https://github.com/llvm/llvm-project/commit/d982e0499b7f780279c435403b8249d7c3812cae
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/test/CodeGenHLSL/resources/TypedBuffers-constructor.hlsl
Log Message:
-----------
[HLSL] Enable frontend IR generation for SPIR-V in TypedBuffers-constructor.hlsl (#207421)
I found a stale `FIXME` marker while poking at SPIR-V resource lowering.
The test stated that SPIR-V codegen of
`llvm.spv.resource.handlefrombinding` and resource types was not
implemented. That codegen now exists in
`CommonSPIRTargetCodeGenInfo::getHLSLType`.
This change enables the test on SPIR-V and splits the tests to
distinguish DXIL and SPIRV expected IR patterns.
Commit: 9bae0aab8098f99dff47578546eb5bd382f919d0
https://github.com/llvm/llvm-project/commit/9bae0aab8098f99dff47578546eb5bd382f919d0
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
Log Message:
-----------
[AMDGPU] Remove unnecessary and broken sign/zero extension in fastdiv (#210348)
Remove unnecessary and broken sign/zero-extension when using float-point
reciprocal to implement division/remainder. This change is analogous to
the change done in https://github.com/llvm/llvm-project/pull/203436 but
in AMDGPUISelLowering.cpp.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: dc3b1ed3ccd10995b26fa5278cb80c45419f9457
https://github.com/llvm/llvm-project/commit/dc3b1ed3ccd10995b26fa5278cb80c45419f9457
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/test/TableGen/RuntimeLibcallEmitter-predicate-cc-sort.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
TableGen: Deterministically order predicate groups by calling convention (#210409)
Commit: 6ff0ebea015e3ed984dfff941e7d8a48e4810784
https://github.com/llvm/llvm-project/commit/6ff0ebea015e3ed984dfff941e7d8a48e4810784
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Diagnostics.h
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Diagnostics.cpp
A lldb/test/Shell/Diagnostics/TestDiagnosticsCollectBinaries.test
Log Message:
-----------
[lldb] Collect the executable, symbol file, and core in diagnostics (#210391)
The diagnostics bundle already gathers logs, statistics, and a snapshot
of the first triage commands, but sometimes the binaries are required to
reproduce an issue. Collect the main executable, its symbol file, and
the core file into the bundle.
Gate this on a new global setting, diagnostics.collect-binaries, which
defaults to false: these files can be large and privacy sensitive, so
including them is opt-in.
Assisted-by: Claude
Commit: 977eced054d9de031423dee9493addd4e1fd5eaf
https://github.com/llvm/llvm-project/commit/977eced054d9de031423dee9493addd4e1fd5eaf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Expression/IRInterpreter.cpp
Log Message:
-----------
[lldb] Truncate an over-wide symbol address in the IR interpreter (#210372)
IRInterpreter::ResolveConstantValue built a pointer-width APInt directly
from the address returned by FindSymbol. That address can be wider than
a target pointer, because lldb records extra information in the high
bits on some targets, such as the code/memory address-space tag on
WebAssembly.
A 32-bit pointer then cannot hold the tagged address and the APInt
constructor asserts, aborting the debugger when a function-valued
expression is evaluated (for example `expr main`).
Truncate to the pointer width instead of asserting, matching the idiom
already used in DWARFExpression. On targets whose addresses fit in a
pointer this is a no-op.
Commit: 4e0dbfe489dcc0b057303047608cd2a909602a14
https://github.com/llvm/llvm-project/commit/4e0dbfe489dcc0b057303047608cd2a909602a14
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
Log Message:
-----------
[SCEV][NFC] Precommit test for MatchRangeCheckIdiom tightening (#210386)
Commit: 0e3852f73ab75639b76bad2c8a735d46241768f3
https://github.com/llvm/llvm-project/commit/0e3852f73ab75639b76bad2c8a735d46241768f3
Author: Patryk Stefanski <patryk.stefanski at protonmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
Log Message:
-----------
[clang][sema] Fix crash on decomposition decl missing initializer (#210151)
ActOnUninitializedDecl dereferenced the std::optional<Token> from
Lexer::findNextToken() unconditionally when diagnosing a structured
binding with no initializer. Guard the optional and fall back to the
declaration's location.
Commit: 82134c708f7ec224d86e2096d9b53c76640a490f
https://github.com/llvm/llvm-project/commit/82134c708f7ec224d86e2096d9b53c76640a490f
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
Log Message:
-----------
[CIR] Terminate conditional regions after creation; fix glvalue conditional with a throw arm (#210384)
Follow-up to #208850: @andykaylor's comments about
`CIRGenFunction::emitConditionalBlocks` also have a similar
insertion-point problem.
The PR addresses the two related problems found while looking into the
conditional branch emission path:
**1. Terminate conditional regions after creation instead of patching
yields**
`CIRGenFunction::emitConditionalBlocks` still had the save-and-patch
insertion-point machinery removed from the scalar path in #208850. The
path is unreachable, and its guard is saved only after
`cir.unreachable`, where a patched yield would generate the dead code.
The machinery is removed; regions are closed with
`terminateStructuredRegionBody` after creation.
The aggregate emitter had the reverse problem: an unconditional
cir.yield after each arm lands in the dead block a throw leaves behind
and keeps it in the final CIR:
```
struct test_s { int x; int y; };
void test_throw(bool flag) {
test_s a = flag ? throw 0 : test_s{1, 2};
}
mlir
cir.if %2 {
...
cir.throw %3 : !cir.ptr<!s32i>, @_ZTIi
cir.unreachable
^bb1: // no predecessors <-- dead block kept alive by the yield
cir.yield
} else {
...
}
```
The explicit yields are removed; `emitIfOnBoolExpr` already terminates
each region, adding a yield only where one is missing. Tests pin the
dead block's absence with CIR-NEXT after `cir.unreachable`.
**2. Fix glvalue conditionals with a throw arm using a region-local
pointer**
```
int &ref_cond(bool c, int &x) { return c ? x : throw 0; }
// error: operand #0 does not dominate this use
// fatal error: CIR module verification error
```
With one arm throwing, `emitConditionalOperatorLValue` returned the
surviving arm's LValue directly, valid in OG CodeGen's flat CFG, invalid
in CIR where the pointer is materialized inside the ternary's region:
```
%4 = cir.ternary(%3, true {
%8 = cir.load %1 ... // pointer loaded inside the region
cir.yield %8 : !cir.ptr<!s32i>
}, false { ... cir.unreachable })
cir.store %8, %2 ... // region-local %8 used outside the region
```
Existing tests missed it because a local's pointer is a function-entry
`alloca`, so dominance held by accident. The fix addresses the result
through the ternary's result value, which the yield carries out. New
tests cover a reference parameter, assignment via the conditional, and
member access, all of which previously failed verification.
Assisted-by: Cursor/Codex
Commit: ea863cb2dec8e0f040dfe22a52d3b537e4a25c29
https://github.com/llvm/llvm-project/commit/ea863cb2dec8e0f040dfe22a52d3b537e4a25c29
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/X86/dagcombine-sub-globaladdress.ll
Log Message:
-----------
[DAGCombiner] Fix APInt truncation assertion (#209914)
getConstant() would create an APInt with ImplicitTrunc = false, but the
constant here can really be anything.
Fixes #209884.
Commit: 1e37b629fbd06d922ac1216cf20114ea4ce1c88d
https://github.com/llvm/llvm-project/commit/1e37b629fbd06d922ac1216cf20114ea4ce1c88d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/libcxx/test/format.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/formats/shtest.py
Log Message:
-----------
[lit] Delete the external shell (#209571)
This was deprecated in LLVM 23 and slated for removal in LLVM 24. Now
that we have branched and everything has been updated to not set
execute_external, we can remove it.
Commit: 466503dcf2ae2e43126c1a6d8a5b204883d5b0c1
https://github.com/llvm/llvm-project/commit/466503dcf2ae2e43126c1a6d8a5b204883d5b0c1
Author: Logan <143111092+Logans-olo at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrTBM.td
M llvm/test/CodeGen/X86/tbm_patterns.ll
Log Message:
-----------
X86: Add pattern for optimized BLSIC IR form (#209814)
Add DAG pattern to recognize the optimized IR form of BLSIC: (xor (and
x, -x), -1)
Fixes #209718 - matches the IR form produced after InstCombine
optimizations
Added tests for both 32-bit and 64-bit BLSIC patterns
Assisted by: Claude Code, helped me understand
pattern-matching/intrinsics, and some file structure. As well as how
testing for LLVM works.
Commit: f97dcd05eb4be690dcfd39de9f6de937d5acfa46
https://github.com/llvm/llvm-project/commit/f97dcd05eb4be690dcfd39de9f6de937d5acfa46
Author: stephenduong1004 <stephenduong at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp
Log Message:
-----------
[llvm-libtool-darwin] Ensure filelist buffer is null-terminated (#205115)
[llvm-libtool-darwin] Ensure filelist buffer is null-terminated
In llvm-libtool-darwin.cpp, `MemoryBuffer::getFileOrSTDIN` was
previously called to load the filelist with `RequiresNullTerminator` set
to `false`. However, the retrieved buffer is subsequently passed to
`llvm::line_iterator`.
Since `llvm::line_iterator` explicitly requires its underlying buffer to
be null-terminated, omitting this requirement can result in an
out-of-bounds read/buffer overrun when parsing the file list.
This change fixes the issue by requesting a null-terminated buffer
(`RequiresNullTerminator=true`).
Co-authored-by: Alexander Shaposhnikov <ashaposhnikov at google.com>
Commit: 986cdd8618e3e105bde1d52e7d8888325a7c87b1
https://github.com/llvm/llvm-project/commit/986cdd8618e3e105bde1d52e7d8888325a7c87b1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
A llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Move EVL-based transforms to VPlanEVLTransforms.cpp (NFC) (#209883)
VPlanTransforms.cpp has become quite big and is one of the top 20 most
expensive files in terms of compile-time.
https://llvm-compile-time-tracker.com/compare_clang.php?from=b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831&to=96a722a0ace661626d071166635728def97f6820&stat=instructions%3Au
Split off the mostly self-contained EVL related transforms and move them
to a new VPlanEVLTransforms.cpp.
This moves simplifyKnownEVL, optimizeEVLMasks, addExplicitVectorLength,
convertToVariableLengthStep and convertEVLExitCond together with their
EVL-specific static helpers.
Shared helpers used by the moved code (isDeadRecipe,
collectUsersRecursively, recursivelyDeleteDeadRecipes,
getOpcodeOrIntrinsicID and tryToFoldLiveIns, pullOutPermutations) are
promoted to vputils.
PR: https://github.com/llvm/llvm-project/pull/209883
Commit: a12cbbcc94a80f54714aaa253f8838fcc9ab4aae
https://github.com/llvm/llvm-project/commit/a12cbbcc94a80f54714aaa253f8838fcc9ab4aae
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractor.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
Log Message:
-----------
[SSAF] Add EntitySourceLocationExtractor (#210201)
Walks every entity-producing decl in the TU and emits
SourceLocationRecord(s) per entity-kind anchor:
* Identifier-bearing decls (FunctionDecl/VarDecl/FieldDecl/ RecordDecl):
Decl::getLocation().
* Synthetic function return-slot entity:
FD->getReturnTypeSourceRange().getBegin().
* ParmVarDecl (named or unnamed): P->getTypeSpecStartLoc().
Skips compiler-synthesized implicits and builtins via the getEntityName
gate, system-header decls via SourceManager, and silently drops records
whose location is invalid or whose file path cannot be canonicalized via
real_path.
Assisted-By: Claude Opus 4.7
Commit: 284c1a166af4c7deab55c7de2ee1bd480d44e9ff
https://github.com/llvm/llvm-project/commit/284c1a166af4c7deab55c7de2ee1bd480d44e9ff
Author: David Mentler <mentlerd at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/docs/use/variable.md
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectSynthetic.h
M lldb/source/API/SBValue.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic/TestSBValueSetTypeSynthetic.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/library_support.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/main.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/foo_bar_synths.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/main.cpp
Log Message:
-----------
[LLDB] Enable SBTypeSynthetic manipulation for SBValue instances (#209056)
Allow manipulating the scripted synthetic children frontend selection
process for individual `SBValue` instances.
The motivating use-case is supporting custom data structures, type
erasure systems, and facilitating debugging handle based C APIs. Below
is an example of such a use-case of an anonymized 3rd party C library:
```C
using ErrorCode = int;
using Handle = void*;
using FooHandle = Handle;
using BarHandle = Handle;
struct ArrayOfHandles {
int size;
Handle* data;
};
struct AllHandles {
ArrayOfHandles foos;
ArrayOfHandles bars;
};
ErrorCode GetAllHandles(AllHandles* into);
```
The current LLDB feature-set allows attaching a synthetic children
provider to `AllHandles`, but the scripted frontend has no chance to
select an appropriate alternative frontend implementation class for
`foos` and `bars` based on type information it is aware of.
Commit: 9eb2dc0930ac75494e71b16739c859fe338a3f0f
https://github.com/llvm/llvm-project/commit/9eb2dc0930ac75494e71b16739c859fe338a3f0f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libcxx/utils/libcxx/test/format.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/formats/shtest.py
Log Message:
-----------
Revert "[lit] Delete the external shell" (#210433)
Reverts llvm/llvm-project#209571
Breaks some buildbots:
1.
https://lab.llvm.org/buildbot/#/builders/232/builds/3690/steps/11/logs/stdio
2. https://lab.llvm.org/buildbot/#/builders/222/builds/11180
Commit: 965fa410dad7294cc1c1a9632ff94558de6dfa40
https://github.com/llvm/llvm-project/commit/965fa410dad7294cc1c1a9632ff94558de6dfa40
Author: Sharjeel Khan <sharjeelkhan at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
A llvm/test/MC/AArch64/LFI/debug-info.s
Log Message:
-----------
[LFI][AArch64] Fix Segfault due to infinite recursion in LFI rewriter (#210267)
When emitting a deferred LR guard, if debug info is enabled, the
emission of the guard instruction can trigger temporary labels (e.g. for
DWARF line entries), which recursively calls onLabel. Since
DeferredLRGuard was only set to false after emission, the nested call
would re-emit the guard, causing infinite recursion which leads to a
SegFault due to stack overflow. This was detected compiling
ubsan_minimal_handlers.cpp in compiler-rt. I fixed it by using the
existing recursion guard (Guard).
Commit: 2120490a54645f9a4390605adec5509243641d29
https://github.com/llvm/llvm-project/commit/2120490a54645f9a4390605adec5509243641d29
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Diagnostics.h
M lldb/source/Core/Diagnostics.cpp
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/DiagnosticsTest.cpp
Log Message:
-----------
[lldb] Add an artifact provider mechanism to Diagnostics (#210417)
Add a hook that lets a subsystem contribute a file to the diagnostics
bundle, without breaking layering and making Core depend on it. A plugin
registers an ArtifactProvider callback and a file name via AddArtifactProvider.
Providers run when a bundle is collected, and each one that yields
content is written into the bundle and recorded in the report's
attachments.
This restores, in a simpler form, the collection point that the removed
Diagnostics callback mechanism offered. The motivating consumer is the
downstream Swift health check, which registers a provider to write its
"swift-healthcheck.log" into the bundle. Unlike the old callback, a
provider does not open or write its own file: it just returns the
contents as a string and Diagnostics handles the rest.
Commit: d592aa5a10f44164cd403257270802eb2a4b123a
https://github.com/llvm/llvm-project/commit/d592aa5a10f44164cd403257270802eb2a4b123a
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseDecl.cpp
A clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general/p2.cpp
Log Message:
-----------
[Clang] Fixed auto parsing regression with brace initialization (#210347)
The PR #208552 has introduced a regression where brace initialization
was not taken into account `auto foo{12}`. It was also breaking
`dcl.type.general` p2 rules, which is also now tested.
Commit: 32221d9ff8f4772972193ebf7b8ba4974cd8458f
https://github.com/llvm/llvm-project/commit/32221d9ff8f4772972193ebf7b8ba4974cd8458f
Author: David Green <david.green at arm.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
Log Message:
-----------
[AArch64] Add lowering for fixed-vector bf16 masked gather/scatter. (#210273)
Similar to #208744, this makes sure that bf16 masked gather and scatter
work with fixed-length sve enabled. Without +bf16 the operations are
currently expanded pre-isel, but that will not be fixed in this patch as
it is a larger change and this patch is intended to be ported to the
branch.
Commit: b4a444ad635af70fe32f58d46fe0c08221fbcf5a
https://github.com/llvm/llvm-project/commit/b4a444ad635af70fe32f58d46fe0c08221fbcf5a
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/stdlib/linux/CMakeLists.txt
M libc/src/stdlib/linux/realpath.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/realpath_test.cpp
Log Message:
-----------
[libc][realpath] Support relative paths (#209374)
Updates realpath to call the `getcwd` linux syscall wrapper to resolve
cwd-relative queries.
Commit: 35bf12351740521f86fd406d01165e1c90b32ed8
https://github.com/llvm/llvm-project/commit/35bf12351740521f86fd406d01165e1c90b32ed8
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/test/Dialect/OpenACC/ops-cg.mlir
Log Message:
-----------
[mlir][acc] Preserve section bounds on acc.reduction_init (#210443)
When `acc.reduction_init` is created from `acc.reduction`, its bounds
are lost because they only live as values folded into the init region's
body. Those bounds describe the legal indexing of the section: the
produced view of a (possibly base-adjusted, compact) reduction temporary
must be indexed with the same bounds as the original array.
Carry the acc.bounds as optional operands on acc.reduction_init so this
indexing information is directly available. The operands are optional,
so scalar/whole-array reductions and existing IR are unaffected.
Commit: 2b68eb4d70072d4e0084c0b4113bbd209c600088
https://github.com/llvm/llvm-project/commit/2b68eb4d70072d4e0084c0b4113bbd209c600088
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV][NFCI] Refactor LoopGuards range check matching (#210362)
Parameterize MatchRangeCheckIdiom over (Predicate, LHS, RHS) so it can
be reused for other predicates discovered during guard collection.
Hoist AddRewrite / GetMaybeRewritten above it and use them in place of
the inline try_emplace, so range-check rewrites chain onto existing ones
the same way other rewrites do.
Commit: 2dbcd7d10f9462bdc30a169730919fc7da321905
https://github.com/llvm/llvm-project/commit/2dbcd7d10f9462bdc30a169730919fc7da321905
Author: adams381 <adams at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/PassDetail.h
A clang/test/CIR/Transforms/abi-lowering/x86_64-lang-addrspace-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/GetFloatingPointTypeTest.cpp
Log Message:
-----------
[CIR] Add x86_64 scalar calling-convention lowering (#209636)
CallConvLowering can already classify a function through the MLIR test
target or through a classification injected as an attribute, but it has
no
path to a real target ABI. This adds a `target=x86_64` mode that runs
the
LLVM ABI Lowering Library's System V x86_64 classifier: it maps CIR
types to
`llvm::abi` types, calls the classifier, and converts the result back
into
the `mlir::abi::FunctionClassification` that `CIRABIRewriteContext`
already
consumes.
To keep the first step small this handles scalar signatures only --
integer
up to 64 bits, pointer, bool, `f32`, and `f64`. Anything else (records,
arrays, vectors, `_Complex`, wide or uncommon floats, `_BitInt`,
`__int128`,
member pointers) is reported as not-yet-implemented through
`emitOpError`, so
an unsupported signature fails the pass instead of being silently
misclassified. Those types come in stacked follow-ups. The pass is still
only reachable from `cir-opt`; wiring it into the `-fclangir` pipeline
is a
later change.
Assisted-by: Cursor / claude-opus-4.8
Commit: 12e3d9db0088d95675a0081495122483faa7b60d
https://github.com/llvm/llvm-project/commit/12e3d9db0088d95675a0081495122483faa7b60d
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGen/var_arg.c
Log Message:
-----------
[CIR] Add support for lowering __builtin_c23_va_start in ClangIR (#208741)
C23 `va_start `expands to `__builtin_c23_va_start`, which was previously
routed to the unimplemented-builtin NYI path in ClangIR. As a result,
variadic code failed to compile with -fclangir in -std=c23 mode.
This change lowers `__builtin_c23_va_start` the same way as
`__builtin_va_start`. For both builtins, the va_list operand is always
argument 0, so the existing lowering logic can be reused directly.
Commit: fefdf74c073b0361fb9a5100f6b1f38a13d72e55
https://github.com/llvm/llvm-project/commit/fefdf74c073b0361fb9a5100f6b1f38a13d72e55
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/RISCV/rvv/vecreduce-minmax-constant-fold.ll
Log Message:
-----------
[SelectionDAG] Fold constant min/max vector reductions (#209190)
I extended constant folding to handle signed and unsigned min/max vector
reductions. Constant vectors now become scalar constants before target
lowering, while non-constant, poison, and undef behavior stays
unchanged.
Fixes #209109
Commit: 2926d18a0620a768857dce1c827d0a3da0d0b565
https://github.com/llvm/llvm-project/commit/2926d18a0620a768857dce1c827d0a3da0d0b565
Author: Pengxiang Huang <71998072+Pengxiang-Huang at users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M libc/src/semaphore/linux/CMakeLists.txt
M libc/src/semaphore/linux/named_semaphore.cpp
M libc/src/semaphore/linux/semaphore.h
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
Log Message:
-----------
[libc][semaphore] Add post and wait operations for internal semaphore (#198959)
This pr implements https://github.com/llvm/llvm-project/issues/190847,
adding the post and wait operations in posix semaphore for linux using
futex.
Particularly,
`sem_post`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_post.html
`sem_trywait`, `sem_wait`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_wait.html
`sem_timedwait`, `sem_clockwait`:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_clockwait.html#
The implementation is assisted by Claude Code Opus 4.7, specifically for
the unit tests generations.
Commit: c1c278e7484038f1d14314f38736532975fafd20
https://github.com/llvm/llvm-project/commit/c1c278e7484038f1d14314f38736532975fafd20
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A clang/docs/ScalableStaticAnalysis/user-docs/SourceEditGeneration.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
A clang/include/clang/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/ScalableStaticAnalysis/Frontend/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/empty-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/two-function-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/lit.local.cfg
A clang/test/Analysis/Scalable/source-edit-generation/cli-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
A clang/test/Analysis/Scalable/source-edit-generation/downgradable-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
A clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
M clang/test/CMakeLists.txt
Log Message:
-----------
[clang][ssaf] Integrate source-edit-generation (#208590)
Adds the four `--ssaf-*` driver flags
(`--ssaf-source-transformation=`,
`--ssaf-global-scope-analysis-result=`, `--ssaf-src-edit-file=`,
`--ssaf-transformation-report-file=`) under `SSAF_Group`, marshalled
into `FrontendOptions`. The compilation-unit identifier flag introduced
earlier is reused. The driver forwards all four flags to `cc1`.
Adds twelve `warn_ssaf_*` diagnostics under
`-Wscalable-static-analysis-framework` (`DefaultError`) covering the
orphan-flag matrix, unknown transformation names, unknown output
formats, WPA-suite read failures, and edit/report write failures.
Adds `clang::ssaf::SourceTransformationFrontendAction` — a
`WrapperFrontendAction` that, when any source-edit flag is set,
validates the CLI as a group, loads the WPASuite from the configured
path, instantiates the named transformation, and serializes the
accumulated edits and findings through the configured formats. The
action is wrapped in `ExecuteCompilerInvocation` after the existing
TU-summary wrap so both pipelines stack as independent `ASTConsumer`s on
the same translation unit; they exchange no data.
Assisted-By: Claude Opus 4.7
Commit: 372cd15f03e49bb826a63a6c59cc7f74962ab278
https://github.com/llvm/llvm-project/commit/372cd15f03e49bb826a63a6c59cc7f74962ab278
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
M mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir
Log Message:
-----------
[openacc] Implicitly map external constant globals (#210408)
Hoist initializer-less constant globals out of OpenACC compute regions
so implicit data mapping handles them. This avoids unresolved device
symbols for PARAMETER arrays defined in separately compiled modules,
while retaining implicit declare for initialized constants. Add
regression coverage and a global initializer query to the OpenACC
interface.
Commit: 3fbb037d03e7ff1ef1cd9156363e895af7caaf98
https://github.com/llvm/llvm-project/commit/3fbb037d03e7ff1ef1cd9156363e895af7caaf98
Author: Haowei <haowei at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Adding an option to Skip LLVM and Clang exports (#209922)
Under CMake 4+, calling add_library(... SHARED IMPORTED) on a
target platform that lacks dynamic linking support triggers a fatal
error. This becomes an issue when building LLVM and runtimes for
baremetal targets like armv6m-none-eabi. This patch
adds the option "LLVM_OMIT_EXPORTS_FROM_CONFIG" in LLVM.
When used in sub builds like LLVM runtimes, it makes CMake to skip
including the LLVM and Clang exports. This mitigates the CMake 4
errors on baremetal runtimes.
Commit: dbab04510ee89e5e9ed03cb6aff63fd218fb3042
https://github.com/llvm/llvm-project/commit/dbab04510ee89e5e9ed03cb6aff63fd218fb3042
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
A llvm/test/Transforms/TailCallElim/disable-tail-call-elim-for-cold-calls.ll
Log Message:
-----------
[TailCallElim] Optionally suppress tail call elim for cold calls (#209642)
Since eliminated tail calls result in missing frames when collecting
various types of profiles, provide an option for disabling the
elimination for cold non-musttail calls. By default the new handling is
disabled.
Since the new checks require BFI to be built in more cases, I have moved
UpdateFunctionEntryCount and ForceDisableBFI (renamed to
DisableEntryCountRecompute to match the flag and description), to
actually guard the function entry count update.
Commit: c4962f5721a36e198234019b846d3788738f766a
https://github.com/llvm/llvm-project/commit/c4962f5721a36e198234019b846d3788738f766a
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/PluginManager.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Interpreter/embedded_interpreter.py
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h
A lldb/test/API/functionalities/scripting_extension_generate/Makefile
A lldb/test/API/functionalities/scripting_extension_generate/TestScriptingExtensionGenerate.py
A lldb/test/API/functionalities/scripting_extension_generate/main.c
Log Message:
-----------
[lldb/script] Add scripting extension template generator (#209647)
This patch adds a `scripting extension generate <ExtensionType>...`
command that introspects a Python extension base class and emits a
skeleton subclass with `# TODO: Implement` stubs for its abstract
methods (or, with `-a`, every method), then opens the result in an
editor.
Generated imports use `from <module> import <class>`, and the generated
`__init__` forwards its arguments to `super().__init__(...)` since every
base class relies on its constructor to set up attributes
(`self.target`, `self.process`, ...) that inherited, non-overridden
methods depend on. When the host can't open an external editor (e.g.
non-macOS), the command reports that as a message rather than an error,
since the file is already written.
To catch regressions in the generator itself instead of just checking
that a file was produced, this patch adds
`TestScriptingExtensionGenerate.py`, which generates a template for
every extension kind on the fly and drives it through a live lldb
session (`process launch -C`, `breakpoint set -P`, `target stop-hook add
-P`, etc.).
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: ccd75bb4b9c6d9c2e149d355c35193ca554c99a0
https://github.com/llvm/llvm-project/commit/ccd75bb4b9c6d9c2e149d355c35193ca554c99a0
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Interfaces/CIRLoopOpInterface.cpp
A clang/test/CIR/IR/invalid-loop-cleanup.cir
A clang/test/CIR/IR/loop-cleanup.cir
M clang/unittests/CIR/ControlFlowTest.cpp
Log Message:
-----------
[CIR] Introduce loop cleanup regions (#210212)
For loops and while loops can create variables in their condition
regions that require per-iteration cleanup. The CIR dialect previously
had no clean way to represent these cleanups while maintaining a
separate condition region for the loop operation.
This change introduces an optional cleanup region to these loop ops and
updates the relevant region successor handling to reflect the insertion
of the cleanup region in the control flow when a non-empty cleanup
region is present.
The CFG flattening pass will handle routing the control flow through the
cleanup region in both the normal and EH unwind cases, but this is not
yet implemented. That will be added in a follow-up change, as will
creation of the cleanup region when it is needed during IR generation.
Assisted-by: Cursor / various models
Commit: ab6ef5680eb79e102414740198f5aa1015c5c254
https://github.com/llvm/llvm-project/commit/ab6ef5680eb79e102414740198f5aa1015c5c254
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/unittests/Process/gdb-remote/CMakeLists.txt
A lldb/unittests/Process/gdb-remote/ProcessGDBRemoteTest.cpp
Log Message:
-----------
[lldb] Contribute the GDB-remote packet history to diagnostics bundles (#210418)
Register a Diagnostics artifact provider from ProcessGDBRemote so a
diagnostics bundle captures the GDB-remote packet history, the same data
"process plugin packet history" prints.
Commit: 03b9039147cca65e2b4fa3adcbbbf40f73e3a3c9
https://github.com/llvm/llvm-project/commit/03b9039147cca65e2b4fa3adcbbbf40f73e3a3c9
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/docs/AdminTasks.md
Log Message:
-----------
[docs] Update the commit review admin task with process details (#210420)
As discussed in the infra area team meeting. Mostly this serves as a
place to stash helpful links.
I picked an arbitrary two week timeout for requests. We can re-evaluate at any time.
It seems less than ideal that one needs issue tracker labelling
privileges to reopen the issue, but I think that's accurate.
Commit: 42eb7db188f23625872b6f1d722979a3100d170e
https://github.com/llvm/llvm-project/commit/42eb7db188f23625872b6f1d722979a3100d170e
Author: Haowei <haowei at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Revert "Skipping host target exports during cross-compilation" (#210468)
Reverts llvm/llvm-project#209922
It broke runtimes build on amdgpu-amd-amdhsa
Commit: d00710093a3d2795200dbf065836220345aa9e9d
https://github.com/llvm/llvm-project/commit/d00710093a3d2795200dbf065836220345aa9e9d
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
Log Message:
-----------
[lldb-dap][test] Avoid a hang on a test failure (#209988)
Tests in `TestDAP_server.py` create `DebugAdapterServer`, passing a
connection string. `DebugAdapterServer.__init__()` creates a socket and
passes the associated input and output streams to its parent class,
`DebugCommunication`. `DAPTestCaseBase.launch()`, which is called from
`TestDAP_server.run_debug_session()`, adds a teardown hook that
eventually calls `DebugCommunication.terminate()`. If the socket is not
closed when this hook executes, it waits indefinitely for the receiving
thread to join.
In the normal case, when a test passes, the connection is closed by
calling `self.dap_server.request_disconnect()` at the end of
`TestDAP_server.run_debug_session()`. If a test fails, the cleanup hook
is called while the connection is still active, which results in a hang.
This can be reproduced by removing the call to `request_disconnect()` or
by changing the condition in the `assertEqual()` on the previous line.
The fix passes the opened socket to 'DebugCommunication' and closes the
socket explicitly in 'DebugCommunication.terminate()'.
Commit: fb2fa0b0f0a8b061401f6cfa3c2fadd3fbfb3b35
https://github.com/llvm/llvm-project/commit/fb2fa0b0f0a8b061401f6cfa3c2fadd3fbfb3b35
Author: Lucas Ribeiro Lima <lucasribeirolima974 at gmail.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
Log Message:
-----------
[clang][clangIR]: X86 upstream avx psrldqi/pslldqi (#208025)
This PR upstreams the implementation and corresponding test suites for
X86 byte-shift intrinsics (pslldqi / psrldqi) spanning 128, 256, and
512-bit vector variants from the incubator.
I consolidated both left and right shifts into a single code path since
the underlying lane topology is identical, extracting the
direction-specific index arithmetic into clean variables at the top. Let
me know if you prefer this unified data-driven approach or if explicit
split functions for left/right shifts would be preferred for local
readability.
All integrated tests from the incubator have been upstreamed and are
currently passing.
Minimal compile case
```cpp
#include <emmintrin.h>
#include <iostream>
struct DataLayout {
alignas(16) int values[4];
};
#define INDEX 1
int main(int argc, char **argv) {
DataLayout data{8, 4, 2, 1};
std::cout << "Value before: " << data.values[INDEX] << '\n';
__m128i reg128i =
_mm_load_si128(reinterpret_cast<__m128i const *>(data.values));
__m128i reg_right_shift = _mm_bsrli_si128(reg128i, 4);
__m128i reg_left_shift = _mm_bslli_si128(reg128i, 4);
DataLayout result_right;
_mm_store_si128(reinterpret_cast<__m128i *>(result_right.values),
reg_right_shift);
DataLayout result_left;
_mm_store_si128(reinterpret_cast<__m128i *>(result_left.values),
reg_left_shift);
std::cout << "Value after left: " << result_left.values[INDEX] << '\n';
std::cout << "Value after right: " << result_right.values[INDEX] << '\n';
return 0;
}
```
Addresses #167752.
Commit: b0440cb55a22e979e81934e0c031c9d46e71f9da
https://github.com/llvm/llvm-project/commit/b0440cb55a22e979e81934e0c031c9d46e71f9da
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
Log Message:
-----------
[CycleInfo] Reference cycles by preorder index, not pointer. NFC (#210271)
The block-to-innermost-cycle map (BlockMap) and each cycle's parent link
hold a GenericCycle pointer. Store the cycle's preorder index instead,
so no raw cycle pointer remains in the stored representation: BlockMap
becomes a SmallVector<unsigned>, four bytes per block rather than eight,
and the parent link becomes ParentIndex.
The flat Cycles array does not exist during construction, so both hold
creation-order indices into the temporary forest until flatten()
resolves them to preorder indices.
Aided by Claude Opus 4.8
Commit: ee5d6f537da4bc81b956b4813afbc0877f82b59d
https://github.com/llvm/llvm-project/commit/ee5d6f537da4bc81b956b4813afbc0877f82b59d
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes c1c278e (#210451)
This fixes c1c278e7484038f1d14314f38736532975fafd20.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=c1c278e7484038f1d14314f38736532975fafd20
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 1ef8ba9a00e16423d711ddbf16c7a45fb7fd570b
https://github.com/llvm/llvm-project/commit/1ef8ba9a00e16423d711ddbf16c7a45fb7fd570b
Author: Luc Forget <github at alias.lforget.fr>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Target/Wasm/TranslateFromWasm.cpp
Log Message:
-----------
[MLIR][WasmSSA] Instruction parser refactoring of WasmSSA importer (#195500)
Refactored WasmSSA importer mechanism to dispatch control flow to
relevant parser based on op code.
This is to prepare for instructions with multi-bytes opcodes (e.g.
vector instruction and some scalar instructions extensions) which will
be able to reuse the same mechanism.
It also replaces the bit tree to find the address by a jump table.
---------
Co-authored-by: Luc Forget <lforg37 at users.noreply.github.com>
Co-authored-by: Ferdinand Lemaire <ferdinand.lemaire at woven-planet.global>
Co-authored-by: Ferdinand Lemaire <flscminecraft at gmail.com>
Commit: cf11eef1c9476c8778055d7963fdac34b6628582
https://github.com/llvm/llvm-project/commit/cf11eef1c9476c8778055d7963fdac34b6628582
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
A llvm/docs/AArch64SME.md
R llvm/docs/AArch64SME.rst
A llvm/docs/AMDGPUAsyncOperations.md
R llvm/docs/AMDGPUAsyncOperations.rst
A llvm/docs/AMDGPUExecutionSynchronization.md
R llvm/docs/AMDGPUExecutionSynchronization.rst
A llvm/docs/AMDGPUMemoryModel.md
R llvm/docs/AMDGPUMemoryModel.rst
A llvm/docs/AddingConstrainedIntrinsics.md
R llvm/docs/AddingConstrainedIntrinsics.rst
A llvm/docs/BigEndianNEON.md
R llvm/docs/BigEndianNEON.rst
A llvm/docs/CompileCudaWithLLVM.md
R llvm/docs/CompileCudaWithLLVM.rst
A llvm/docs/DebuggingJITedCode.md
R llvm/docs/DebuggingJITedCode.rst
A llvm/docs/ExtendingLLVM.md
R llvm/docs/ExtendingLLVM.rst
A llvm/docs/HowToBuildWindowsItaniumPrograms.md
R llvm/docs/HowToBuildWindowsItaniumPrograms.rst
A llvm/docs/HowToCrossCompileBuiltinsOnArm.md
R llvm/docs/HowToCrossCompileBuiltinsOnArm.rst
A llvm/docs/HowToUpdateDebugInfo.md
R llvm/docs/HowToUpdateDebugInfo.rst
A llvm/docs/Instrumentor.md
R llvm/docs/Instrumentor.rst
A llvm/docs/JITLink.md
R llvm/docs/JITLink.rst
A llvm/docs/MCJITDesignAndImplementation.md
R llvm/docs/MCJITDesignAndImplementation.rst
A llvm/docs/NVPTXUsage.md
R llvm/docs/NVPTXUsage.rst
A llvm/docs/ORCv2.md
R llvm/docs/ORCv2.rst
A llvm/docs/Remarks.md
R llvm/docs/Remarks.rst
A llvm/docs/SPIRVUsage.md
R llvm/docs/SPIRVUsage.rst
Log Message:
-----------
[docs] Rename selected LLVM docs to Markdown (#208800)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: cddf2069ded94cb47048ad2a5f340d12c35f1651
https://github.com/llvm/llvm-project/commit/cddf2069ded94cb47048ad2a5f340d12c35f1651
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/docs/AArch64SME.md
M llvm/docs/AMDGPUAsyncOperations.md
M llvm/docs/AMDGPUExecutionSynchronization.md
M llvm/docs/AMDGPUMemoryModel.md
M llvm/docs/AddingConstrainedIntrinsics.md
M llvm/docs/BigEndianNEON.md
M llvm/docs/CompileCudaWithLLVM.md
M llvm/docs/DebuggingJITedCode.md
M llvm/docs/ExtendingLLVM.md
M llvm/docs/HowToBuildWindowsItaniumPrograms.md
M llvm/docs/HowToCrossCompileBuiltinsOnArm.md
M llvm/docs/HowToUpdateDebugInfo.md
M llvm/docs/Instrumentor.md
M llvm/docs/JITLink.md
M llvm/docs/MCJITDesignAndImplementation.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/ORCv2.md
M llvm/docs/Remarks.md
M llvm/docs/SPIRVUsage.md
Log Message:
-----------
[docs] Rewrite 19 LLVM docs from reST to markdown (#208798)
Tracking issue: #201242
[Migration
guide](https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines)
This is a stacked PR based on #208800, which does the file rename to
preserve history.
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections.
Commit: a623e8d4381e26eceff29209e6db411617d95f83
https://github.com/llvm/llvm-project/commit/a623e8d4381e26eceff29209e6db411617d95f83
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port 2dbcd7d10f94 (#210484)
Commit: 605b6d73214cf253fc5fb9d5befe99857bd480cf
https://github.com/llvm/llvm-project/commit/605b6d73214cf253fc5fb9d5befe99857bd480cf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 986cdd8618e3 (#210485)
Commit: 56fc7bf0c364ab210c49c3b95e7130d337490b78
https://github.com/llvm/llvm-project/commit/56fc7bf0c364ab210c49c3b95e7130d337490b78
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Frontend/BUILD.gn
Log Message:
-----------
[gn build] Port c1c278e74840 (#210488)
Commit: 2e1c934fea272654ab2b00f60b6d3dba93123190
https://github.com/llvm/llvm-project/commit/2e1c934fea272654ab2b00f60b6d3dba93123190
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port a12cbbcc94a8 (#210487)
Commit: 3be5663001465e74c7b879ad4d4cbfc3c94caeba
https://github.com/llvm/llvm-project/commit/3be5663001465e74c7b879ad4d4cbfc3c94caeba
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
Log Message:
-----------
[gn build] Port 9b096bb7abf7 (#210486)
Commit: 6a33b69d8bae737e5e1d60c7b7776a0b1f885bfa
https://github.com/llvm/llvm-project/commit/6a33b69d8bae737e5e1d60c7b7776a0b1f885bfa
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-17 (Fri, 17 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/test/tools/llvm-profdata/profile-symbol-list.test
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[SampleProfile] Support MD5-based ProfileSymbolList (#210235)
This patch speeds up sample profile loading by introducing an
MD5-based ProfileSymbolList (cold symbol list) in extensible binary
profiles.
The sample profile loader spends about a third of its time on loading
and decoding the symbol names in the Profile Symbol List section, yet
we use them only for membership checking purposes via
ProfileSymbolList::contains.
This patch teaches the writer to emit the section as an array of
64-bit GUIDs in the Eytzinger layout. The reader checks the
SecFlagMD5 section flag and sets up an EytzingerTableSpan
pointing into the mmap memory. This achieves both space efficiency
and runtime efficiency.
The new flag, md5-prof-sym-list, is off by default for now.
Profile merging is supported only from strings to an MD5-based
Eytzinger array.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/7
Assisted-by: Antitygravity
Commit: ea50c8cc99778825fc647cf190d8f7a8f49cdcdd
https://github.com/llvm/llvm-project/commit/ea50c8cc99778825fc647cf190d8f7a8f49cdcdd
Author: Mishal Shah <mishal_shah at apple.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
Fix macOS casing in premerge workflow (#210477)
Commit: 3fc4fcade6164fc6b9dcf0d6d0d6fa9cf6e47dfc
https://github.com/llvm/llvm-project/commit/3fc4fcade6164fc6b9dcf0d6d0d6fa9cf6e47dfc
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Crash in printArgument (#210411)
The crash was caused by missing nullptr check for Decl used to get
printing policy. Fixed the bug by replacing the use of Decl with
BugManager to get the policy.
Commit: 2730fc8a1a46ea92bbe91e3fc31897498617e076
https://github.com/llvm/llvm-project/commit/2730fc8a1a46ea92bbe91e3fc31897498617e076
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bfloat16/bfloat16.ll
Log Message:
-----------
[SPIR-V] Handle bfloat in getZeroFP/getOneFP (#202859)
Related spirv-val change:
https://github.com/KhronosGroup/SPIRV-Tools/pull/6734
---------
Co-authored-by: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Commit: ccd0e982a02fa3be39a98dd98ea6cc1ccaf24d13
https://github.com/llvm/llvm-project/commit/ccd0e982a02fa3be39a98dd98ea6cc1ccaf24d13
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
A lldb/test/API/lang/cpp/enum-limits/Makefile
A lldb/test/API/lang/cpp/enum-limits/TestCPPEnumLimits.py
A lldb/test/API/lang/cpp/enum-limits/main.cpp
Log Message:
-----------
[lldb][NativePDB] Fix width and signedness of enum constants (#210338)
Enumerator values aren't always encoded in the correct bit width and
signedness. This happens with both MSVC and Clang.
On MSVC, unsigned 64bit enumerators can be encoded as signed. For
example `ULONGLONG_MAX` will be encoded as `-1`.
Clang/LLVM will always encode the values as unsigned.
Example: https://godbolt.org/z/96YjGW48W.
I fixed this by setting the expected width and signedness when creating
the enumerator constant. We can't use a shell test like for the other
PDB tests, because no output shows the enum values.
Commit: 8c2d7cc3a9983459628c028d8537eaf79551f396
https://github.com/llvm/llvm-project/commit/8c2d7cc3a9983459628c028d8537eaf79551f396
Author: Jared Hoberock <jaredhoberock at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/include/mlir/IR/CMakeLists.txt
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/include/mlir/IR/SymbolTable.h
M mlir/lib/IR/SymbolTable.cpp
A mlir/test/IR/test-verifiers-symbol-user-type.mlir
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lib/Dialect/Test/TestTypes.cpp
M mlir/test/lib/Dialect/Test/TestTypes.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][IR] Add SymbolUserTypeInterface (#198435)
This change adds SymbolUserTypeInterface, analogous to
SymbolUserAttrInterface, and extends SymbolTable verification to check
participating types.
Verification visits the types owned by an operation, (operand/result
types, block argument types, attribute-contained types, nested type
parameters) and checks each distinct type at most once, interrupting on
the first failure. Deduplication spans the whole symbol-table walk, so a
type used by multiple operations is checked only once.
Attribute (SymbolUserAttrInterface) verification also gets deduped the
same way.
Assisted-by: Codex (OpenAI)
Assisted-by: Claude (Anthropic)
Commit: 1faa9f73119f007583ca829e07d78e82a40f1bae
https://github.com/llvm/llvm-project/commit/1faa9f73119f007583ca829e07d78e82a40f1bae
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Infer SrcTy in createScalarExtOrTrunc (NFC) (#210423)
The argument is redundant and can be inferred from Op.
Commit: d46a352ecf9708255a938e6d5e972b5221de4c2c
https://github.com/llvm/llvm-project/commit/d46a352ecf9708255a938e6d5e972b5221de4c2c
Author: David Mentler <mentlerd at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
Log Message:
-----------
[lldb] Fix TestSBValueSetTypeSyntheticOverride with libstdc++ (#210495)
My test added in #209056 assumed that a `CXXSyntheticChildren`
implementation for `std::vector` is readily available on all platforms,
that is not the case.
Do the simplest thing and remove this part of the test for now.
Fixes: https://lab.llvm.org/buildbot/#/builders/59/builds/35839
```
FAIL: test (TestSBValueSetTypeSyntheticOverride.TestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/llvm-project/lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py", line 22, in test
self.checkOverride(vec, before=None)
File "/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/llvm-project/lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py", line 43, in checkOverride
self.assertIsNone(impl_before)
AssertionError: <lldb.formatters.cpp.gnu_libstdcpp.StdVectorSynthProvider object at 0xfb088f787bb0> is not None
```
Commit: e96755f08bab48f1578bd70a1f55d336b5e44a69
https://github.com/llvm/llvm-project/commit/e96755f08bab48f1578bd70a1f55d336b5e44a69
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Factor vputils::getOpcodeOrIntrinsicID (NFC) (#208993)
The check for recipes in vputils::isElementWise is necessary to prevent
regressions.
Commit: 1f4d6acc935f93eca55cfef67348c8abcc1415db
https://github.com/llvm/llvm-project/commit/1f4d6acc935f93eca55cfef67348c8abcc1415db
Author: pzoln <pashka.zolnikov at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/test/Dialect/Bufferization/canonicalize.mlir
Log Message:
-----------
[mlir][bufferization] Avoid invalid memref.cast in to_buffer folding (#208973)
Fixes #202782
When folding bufferization.to_buffer(bufferization.to_tensor(...)), only
create a memref.cast if the source and destination memref types are
cast-compatible.
This avoids asserting on unranked memrefs with different memory spaces
and leaves the original bufferization ops in place instead.
Assisted-by: OpenAI Codex
Commit: c69896aa8733ceed6e8cc982eec64b97f277f926
https://github.com/llvm/llvm-project/commit/c69896aa8733ceed6e8cc982eec64b97f277f926
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
Log Message:
-----------
[mlir][interface] Use populateAndCompare cleanup compare (NFC) (#200156)
Commit: af0aa9440f1121bd5041a3dd7abef0d78b0f91cd
https://github.com/llvm/llvm-project/commit/af0aa9440f1121bd5041a3dd7abef0d78b0f91cd
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
Log Message:
-----------
[AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos (#169699)
Refactor `AArch64AsmPrinter::emitPtrauthAuthResign` to improve
readability and tune the conditions when `emitPtrauthDiscriminator` is
allowed to clobber address discriminator operands.
When resigning, do not clobber address discriminator register used for
authentication if it is also used for signing. Such clobbering would
prevent passing raw, 64-bit value as the new discriminator. Clarify
other corner cases of clobbering address discriminator operands.
Reuse `enum PtrauthCheckMode` instead of separate `ShouldCheck` and
`ShouldTrap` flags and drop its `Default` enumerator.
Commit: 0c5b2258f0b517c0822e5b2f8e6a8de311d6db9d
https://github.com/llvm/llvm-project/commit/0c5b2258f0b517c0822e5b2f8e6a8de311d6db9d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/IndVarSimplify/drop-exact.ll
M llvm/test/Transforms/IndVarSimplify/pr66066.ll
M llvm/test/Transforms/IndVarSimplify/strengthen-overflow.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
Log Message:
-----------
[SCEV] Infer no-wrap flags for shl by a constant. (#208434)
Treat `shl %a, C` as `mul %a, 1 << C` in
getStrengthenedNoWrapFlagsFromBinOp
if possible.
Only transfer NSW from shl to mul, if the shift amount is < Bitwidth -
1, otherwise the result would be more poisonous.
Alive2 proofs: https://alive2.llvm.org/ce/z/iBPpkv
Compile-time impact in noise:
https://llvm-compile-time-tracker.com/compare.php?from=a037729976f91dc11b41a76834dfca9d8812c4fe&to=2050d622aed5606774f0902b352bbb2142e654e1&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/208434
Commit: d199b284c7d3f98bb7afbbca9e79e078a1da55fe
https://github.com/llvm/llvm-project/commit/d199b284c7d3f98bb7afbbca9e79e078a1da55fe
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M orc-rt/docs/Design.md
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Drop callManagedCodeAsync; tokens guard execution (#210508)
callManagedCodeSync is renamed to callManagedCode, and
callManagedCodeAsync is removed.
callManagedCodeAsync held a ManagedCodeTaskGroup token from the initial
call until the async continuation ran -- across the gap in which the
call is suspended and no managed code is executing. A token is meant to
guard managed code that is executing on a stack, so holding one across
that gap guards nothing while blocking shutdown.
callManagedCode holds a token only for the synchronous call to the
wrapped function, including anything the function runs inline on the
same thread before returning. An async function is called the same way,
with its continuation passed as an ordinary argument. Work deferred past
the function's return -- stashed, or handed to another thread -- runs on
a stack the token no longer guards; whoever later runs it is responsible
for ensuring a token covers it, acquiring one and aborting if the
acquire is denied.
See the new "Managed code execution and shutdown" section in
docs/Design.md for the full model (what a token guards, nested entries,
context-free acquire, and the abortability obligation).
Commit: 7b446294e098c7c02bbc998da1b4a438f7270879
https://github.com/llvm/llvm-project/commit/7b446294e098c7c02bbc998da1b4a438f7270879
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
M llvm/unittests/Support/MathExtrasTest.cpp
Log Message:
-----------
[Support] Add constexpr versions of Add/Sub/MulOverflow (#210404)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 36c812f77142aa77b99b4e4d059ccba591a944c0
https://github.com/llvm/llvm-project/commit/36c812f77142aa77b99b4e4d059ccba591a944c0
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Sequence.h
M llvm/unittests/ADT/SequenceTest.cpp
Log Message:
-----------
[ADT] Make enum iterators constexpr (#210405)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: fdf1adc8910ce4083d4c18205f665ef3c30cc851
https://github.com/llvm/llvm-project/commit/fdf1adc8910ce4083d4c18205f665ef3c30cc851
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
Log Message:
-----------
[orc-rt] Add comment for Session::HandlerTag type. NFC. (#210510)
Commit: af0c933eda31b6beb436026a22121ec637f3cb53
https://github.com/llvm/llvm-project/commit/af0c933eda31b6beb436026a22121ec637f3cb53
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CodeGen/TargetInfo.cpp
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Function.h
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/is_fpclass.ll
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-fmuladd.ll
M llvm/test/Transforms/EarlyCSE/replace-calls-def-attrs.ll
M llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fdim.ll
M llvm/test/Transforms/InstSimplify/disable_folding.ll
M llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad.ll
M llvm/unittests/IR/VerifierTest.cpp
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[IR] Make semantics of strictfp consistent (#209465)
Although the section on constrainedfp in the LangRef clearly states "All
function definitions that use constrained floating point intrinsics must
have the strictfp attribute", indicating that a function with strictfp
calls must be marked with strictfp, the general description of strictfp
does not specify this. Refine its semantics and make it so, eliminating
the inconsistency.
Commit: 94b08b5de90dc21453a1dcde10cc1cd44ba93f7c
https://github.com/llvm/llvm-project/commit/94b08b5de90dc21453a1dcde10cc1cd44ba93f7c
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Support] Improve the logic for re-raising signals (#177864)
On most systems, checking `si_pid` is not actually valid unless
`si_code` equals one of the relevant signal codes (`SI_USER`,
`SI_QUEUE`, and on some OSs, `SI_LWP`), or the signal is `SIGCHLD`. So
on e.g. NetBSD, we would misinterpret the `SIGSEGV` fault address as the
sending PID and incorrectly conclude that the signal came from a
different process.
But as far as I can tell, there's not even a valid reason for us to be
checking `si_pid != getpid()`, because the signal could very well have
been explicitly sent by another thread in the current process. So we
really just need to check `si_code` for the aforementioned signal codes.
Darwin is the exception because it just doesn't set `si_code` at all in
the case of the `SI_*` signal codes. So keep the old logic there, even
though it misses the corner case of signals sent by a thread in the
current process.
While here, I also changed the error check for Linux
`rt_tgsigqueueinfo()` as it was not at all clear to me how we would ever
see `EPERM` from sending a signal to the current thread. Besides, it's
sensible to go to the `raise()` path as a last resort regardless of how
`rt_tgsigqueueinfo()` failed (e.g. `ENOSYS` on an old kernel).
Commit: f6d9ec41d30b453c939bbaa1c73b876ce1389ee9
https://github.com/llvm/llvm-project/commit/f6d9ec41d30b453c939bbaa1c73b876ce1389ee9
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV] Add packed narrowing convert intrinsics (#210389)
Add RISC-V P-extension packed narrowing convert header APIs for `pncvt`
and `pncvth`.
The new APIs lower through generic IR: RV32 uses truncate / logical
shift plus truncate forms, while RV64 uses existing packed unzip shuffle
forms. This reuses the existing backend lowering and TableGen aliases
rather than adding intrinsic-specific lowering.
Tests cover Clang IR generation and cross-project header assembly checks
for RV32/RV64 spec-listed mnemonics.
Commit: be68a8829d6d6a2186f962b37d83984961cedeb1
https://github.com/llvm/llvm-project/commit/be68a8829d6d6a2186f962b37d83984961cedeb1
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Sequence.h
Log Message:
-----------
[ADT] Fix non-assertion build after 36c812f771 (#210511)
E.g. https://lab.llvm.org/buildbot/#/builders/228/builds/5253
Commit: 53096b7a2d268ab92617436915bc6f9f3cf8d82e
https://github.com/llvm/llvm-project/commit/53096b7a2d268ab92617436915bc6f9f3cf8d82e
Author: AntonyCJ30 <cj6186609 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/sub.ll
Log Message:
-----------
[X86][APX] Optimize usub.sat(X,1) to cmp+adc with NDD (#208475)
When NDD is available, usub.sat(X, 1) is lowered from xor+sub+cmov (3
insns) to cmp+adc (2 insns).
All X86 tests pass.
Fixes #207888
Co-authored-by: AntonyCJ30 <cj6186609 at gmail@gmail.com>
Commit: c739ce632b1489dcdbaad72df64a9cec9a8ed359
https://github.com/llvm/llvm-project/commit/c739ce632b1489dcdbaad72df64a9cec9a8ed359
Author: Taimuraz Kaitmazov <atassikay38 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
A llvm/test/TableGen/subreg-index-overflow-allowed.td
A llvm/test/TableGen/subreg-index-overflow.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
Log Message:
-----------
[TableGen] Diagnose sub-register indices that overflow their register (#206346)
Commit: 0b5073a3cd15b942860eeb2ce18a7958bbcf9169
https://github.com/llvm/llvm-project/commit/0b5073a3cd15b942860eeb2ce18a7958bbcf9169
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_RELAX_TLS_* RelExprs (#210517)
As of 46d29d43ba8e ("[ELF] Remove unused handleTlsRelocation (#184951)")
these are never generated.
Commit: 2144ee4e19c4cf4501daed8d71aec68af1b9a8a6
https://github.com/llvm/llvm-project/commit/2144ee4e19c4cf4501daed8d71aec68af1b9a8a6
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_TLSDESC_CALL RelExpr (#210518)
As of 4ea72c1e8cbd ("[ELF] Add target-specific relocation scanning for
RISC-V (#181332)") this is never generated, and as of 46d29d43ba8e
("[ELF] Remove unused handleTlsRelocation (#184951)") this is not even
handled anywhere.
Commit: f9b7acbe7d5b6dbd1769a8d8c9cfb6de23abe48c
https://github.com/llvm/llvm-project/commit/f9b7acbe7d5b6dbd1769a8d8c9cfb6de23abe48c
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M lld/ELF/Relocations.h
Log Message:
-----------
[NFC][ELF] Remove unused R_TLS*_HINT RelExprs (#210519)
As of 5e87f8147d68 ("[ELF] Add target-specific relocation scanning for
PPC32 (#181517)") these are never generated, and as of 46d29d43ba8e
("[ELF] Remove unused handleTlsRelocation (#184951)") these are not even
handled anywhere.
Commit: acd3fcfdd6d065f914eadbe2036e703c056b4ccc
https://github.com/llvm/llvm-project/commit/acd3fcfdd6d065f914eadbe2036e703c056b4ccc
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGen/call-graph-section-callback.cpp
M clang/test/CodeGen/call-graph-section-internal.cpp
M clang/test/CodeGen/call-graph-section-templates.cpp
M clang/test/CodeGen/call-graph-section-virtual-methods.cpp
M clang/test/CodeGen/call-graph-section.c
M clang/test/CodeGen/call-graph-section.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/ARM/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/ARM/call-graph-section-assembly.ll
M llvm/test/CodeGen/ARM/call-graph-section-tailcall.ll
M llvm/test/CodeGen/ARM/call-graph-section.ll
M llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
M llvm/test/CodeGen/X86/call-graph-section-assembly.ll
M llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
M llvm/test/CodeGen/X86/call-graph-section.ll
M llvm/test/Verifier/callee-type-metadata.ll
Log Message:
-----------
[clang] Emit call graph type metadata for internal linkage symbols (#210194)
Commit: 4812a67a45710531f9ac3bf2a84a1e2b278971a4
https://github.com/llvm/llvm-project/commit/4812a67a45710531f9ac3bf2a84a1e2b278971a4
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN frexp_mant builtins (#198121)
Adds codegen for the following AMDGCN frexp mantissa builtins:
- __builtin_amdgcn_frexp_mant (double)
- __builtin_amdgcn_frexp_mantf (float)
- __builtin_amdgcn_frexp_manth (half)
These are lowered to the corresponding `llvm.amdgcn.frexp.mant`
intrinsic.
Commit: 6d70017b17f967756825107c91f24769046826b9
https://github.com/llvm/llvm-project/commit/6d70017b17f967756825107c91f24769046826b9
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .mailmap
Log Message:
-----------
mailmap: Add entries for Peter Collingbourne. (#210526)
I am no longer at Google.
Commit: d89537dd93f6fba07864e3583e11996c91a794b8
https://github.com/llvm/llvm-project/commit/d89537dd93f6fba07864e3583e11996c91a794b8
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
Log Message:
-----------
[DirectX] Fix `--dx-embed-debug` flag dependency (#210513)
This patch moves the definition of `cl::opt<std::string> PdbDebugPath`
from `DXContainerGlobals.cpp` to `DXILWriter/DXILWriterPass.cpp`,
reversing the dependency.
Fixes the layering violation in #204166.
Commit: 220e8277d3ad300c094447d214f0a5a122435196
https://github.com/llvm/llvm-project/commit/220e8277d3ad300c094447d214f0a5a122435196
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/unittests/IR/PassManagerTest.cpp
Log Message:
-----------
[IR][NFC] Avoid unneccessary move of analysis results (#210540)
While benchmarking CycleAnalysis, I noticed that each analysis result is
constructed on the stack first and then moved to its final place on the
heap. This is unnecessary -- directly construct the analysis result in
its final place. Consequently, analysis results can be immovable.
Commit: bcb4e7d061ac22bce4ac65f5158a4746fb0edc0f
https://github.com/llvm/llvm-project/commit/bcb4e7d061ac22bce4ac65f5158a4746fb0edc0f
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
Log Message:
-----------
[InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (#202482)
SimplifyDemandedUseFPClass folded 0/x to a signed zero, guarded only on
the divisor being non-NaN. But when x==0, the result is is NaN, not 0!
Require the divisor to be never (logical) zero, unless a NaN result
isn't demanded.
Commit: f5c4f390a04abf63f9f4c98980df67e22544ddb7
https://github.com/llvm/llvm-project/commit/f5c4f390a04abf63f9f4c98980df67e22544ddb7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyLateEHPreparePass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/209956
Commit: 0e3d17a080646825df5cdff6997c633b6292b6ff
https://github.com/llvm/llvm-project/commit/0e3d17a080646825df5cdff6997c633b6292b6ff
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port WebAssemblyReplacePhysRegsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/209957
Commit: 84b9da663e9c505304eac37621a56fd8e1ef7c12
https://github.com/llvm/llvm-project/commit/84b9da663e9c505304eac37621a56fd8e1ef7c12
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] Install `llvm-tools` in libc container (#210414)
Currently, the libc container doesn't contain `llvm-tools`. we need to
use them in #200196 because we are not able to use `llvm-lit` without
building clang from source
Commit: 14bf60dacab081559bedca01ab426f52793b38cb
https://github.com/llvm/llvm-project/commit/14bf60dacab081559bedca01ab426f52793b38cb
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
Log Message:
-----------
[CycleInfo] Deduplicate getExitBlocks with a set. NFC (#210557)
Fix the O(exit_blocks^2) hazard.
Commit: 617e4f54e503b54b08445a086d95a80aa72a58d0
https://github.com/llvm/llvm-project/commit/617e4f54e503b54b08445a086d95a80aa72a58d0
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
[Clang][Interpreter] Don't pass -fPIC on MSVC (#210507)
Commit: f05a649741f248e3809a6d0e7b5a8daf7bed74a8
https://github.com/llvm/llvm-project/commit/f05a649741f248e3809a6d0e7b5a8daf7bed74a8
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/lgammaf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/lgammaf16.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/lgammaf16.cpp
A libc/src/math/lgammaf16.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/lgammaf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/lgammaf16_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Implement half precision lgamma function (#192834)
The implementation uses three distinct paths based on $|x|$:
- Small ($|x| < 0.66$): Fits a degree-12 Chebyshev for $h(t) =
\frac{\text{lgamma}(t) + \log(t)}{t}$, recovering $\text{lgamma}(t) = t
\cdot h - \log(t)$.
- Medium ($|x| \in [0.66, 3.37]$): Fits a degree-20 Chebyshev for $g(t)
= \frac{\text{lgamma}(t)}{(t-1)(t-2)}$
- Stirling ($|x| > 3.37$): Uses $(x-0.5) \cdot \log(x) - x +
\frac{\log(2\pi)}{2}$ plus 1/2/4/8-term Bernoulli corrections by
sub-range.
Special cases: NaN, +/-Inf -> +Inf, +/-0 pole, negative integer pole,
lgamma(1) = lgamma(2) = 0 exactly, overflow for large positive x.
Exhaustive tests pass in all 4 rounding modes.
-- CORE-MATH reciprocal throughput --
Ntrial = 20 ; Min = 391.348 + 77.447 clc/call; Median-Min = 68.093
clc/call; Max = 540.055 clc/call;
-- System LIBC reciprocal throughput --
Ntrial = 20 ; Min = 377.829 + 81.686 clc/call; Median-Min = 64.851
clc/call; Max = 532.888 clc/call;
Commit: 81ed4d01aa5858ab3f3ffe4e5cc4f9111a8afc46
https://github.com/llvm/llvm-project/commit/81ed4d01aa5858ab3f3ffe4e5cc4f9111a8afc46
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
Log Message:
-----------
[UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (#210564)
Commit: 8043ceb7591cc1e55e699cbf8f23fffe1e90381f
https://github.com/llvm/llvm-project/commit/8043ceb7591cc1e55e699cbf8f23fffe1e90381f
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-18 (Sat, 18 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
Log Message:
-----------
[libc] Omit -fpie from the full build (#208343)
We shouldn't unconditionally set -fpie, users should be able to control
this with CMAKE_POSITION_INDEPENDENT_CODE.
Commit: 446a84a7c66eda9b945a000ccab04948f240eaaa
https://github.com/llvm/llvm-project/commit/446a84a7c66eda9b945a000ccab04948f240eaaa
Author: Brad Smith <brad at comstyle.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M openmp/runtime/src/kmp_i18n.cpp
Log Message:
-----------
[OpenMP] Simplify GNU strerror_r check for Android (#148990)
Android 6 is the baseline so simplify the Android check.
Commit: 790882669323c7255cb761755bb2d37d3b344452
https://github.com/llvm/llvm-project/commit/790882669323c7255cb761755bb2d37d3b344452
Author: Shikhar Jain <shikharj at qti.qualcomm.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M polly/include/polly/DependenceInfo.h
M polly/lib/Analysis/DependenceInfo.cpp
M polly/lib/CodeGen/IslAst.cpp
A polly/test/IstAstInfo/AstGenComputeOut.ll
Log Message:
-----------
[Polly] Guard ISL ast gen compute out (#201859)
Bounds the maximum ISL operations allowed for ISL AST Generation.
Fixes: https://github.com/llvm/llvm-project/issues/201801
Commit: f988efbef5854243f9f518e9334dfee08ff2e1de
https://github.com/llvm/llvm-project/commit/f988efbef5854243f9f518e9334dfee08ff2e1de
Author: michaelselehov <michael.selehov at amd.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
M llvm/test/Transforms/PhaseOrdering/AMDGPU/infer-address-space.ll
Log Message:
-----------
[AMDGPU] Run early-cse<memssa> at the end of the full-LTO pipeline (#208461)
The regular (non-LTO) and ThinLTO function simplification pipelines run
an
EarlyCSE-with-MemorySSA pass near the start of the function pass
sequence, but
the full-LTO postlink pipeline does not. Without it, a redundant
load/store
round-trip can survive all the way to codegen; the later GVN/DSE in the
LTO
pipeline do not catch this particular pattern.
Rather than touch the target-independent LTO pipeline, register
early-cse<memssa> through the AMDGPU FullLinkTimeOptimizationLast
extension
point, so it runs at the end of the full-LTO middle-end (before codegen)
only
for AMDGPU.
Assisted-by: Claude Opus
Commit: 4a1c00420f7e1660d509ac32ca3d02a4aef20ab2
https://github.com/llvm/llvm-project/commit/4a1c00420f7e1660d509ac32ca3d02a4aef20ab2
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCSchedule.h
M llvm/test/TableGen/CompressWriteLatencyEntry.td
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[MC] Pack scheduling class entry counts (#202649)
Generated scheduling classes currently use at most 20 write-resource
entries and 35 write-latency entries, while read-advance counts reach
504. Narrow the two write counts to `uint8_t`, order the three table
indices before the three counts, and emit target-specific compile-time
bounds assertions in generated subtarget source.
This reduces `sizeof(MCSchedClassDesc)` from 14 to 12 bytes in release
builds and from 20 to 16 bytes with debug fields. Fully stripped arm64
`llvm-mca` decreases by 544,896 bytes (1.49%), and the stripped
all-tools multicall binary decreases by 528,376 bytes (0.368%).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: ee62806354aabac85ef8c6605bdc7829d997682a
https://github.com/llvm/llvm-project/commit/ee62806354aabac85ef8c6605bdc7829d997682a
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/docs/OpenMPSupport.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/dims_modifier_ast_print.cpp
A clang/test/OpenMP/dims_modifier_messages.cpp
M clang/test/OpenMP/ompx_bare_messages.c
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[Clang][OpenMP] Add parsing/sema for dims modifier in num_teams and thread_limit (#206412)
Add parsing and sema support for `dims` modifier (OpenMP 6.1) in `num_teams` and
`thread_limit` clauses. Example:
```cpp
constexpr int N = 2;
#pragma omp teams num_teams(dims(3): x, y, z) thread_limit(dims(N): a, b)
{ ... }
```
Commit: 8042e61d6ae99347e8cab040b324b33cabfb1d4a
https://github.com/llvm/llvm-project/commit/8042e61d6ae99347e8cab040b324b33cabfb1d4a
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Fold trunc nuw/nsw (shr exact %x, %y) to i1 -> icmp ne %x, 0 (#210499)
Proof: https://alive2.llvm.org/ce/z/de6gru
Commit: 5cae63bd0d31118a15481fc7e5b063a73492d77d
https://github.com/llvm/llvm-project/commit/5cae63bd0d31118a15481fc7e5b063a73492d77d
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M polly/test/IstAstInfo/AstGenComputeOut.ll
Log Message:
-----------
[Polly][test] Add missing REQUIRES line (#210578)
The test was added by #201859. It's test uses --debug-only which
requires an LLVM_ENABLE_ASSERTIONS-build
Commit: 1d55a816c6dddfaacfd39f3235519a2389b56423
https://github.com/llvm/llvm-project/commit/1d55a816c6dddfaacfd39f3235519a2389b56423
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
Log Message:
-----------
[X86] Support apxf in attribute target (#184078)
As in title. This adds support for using apxf in attribute target.
Individual features are not supported for FMV but are supported for
enabling a feature for the function
Patch done with usage of Claude Code.
Commit: 5e1873abad44f622c7a18304b1552c233d47bd16
https://github.com/llvm/llvm-project/commit/5e1873abad44f622c7a18304b1552c233d47bd16
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/unittests/Frontend/OpenMPDirectiveNameParserTest.cpp
Log Message:
-----------
[OpenMP] Add constexpr enum ranges for all clauses and all directives (#210406)
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Commit: f25b3f62cee27d11d1491bdb10dfa955213b2064
https://github.com/llvm/llvm-project/commit/f25b3f62cee27d11d1491bdb10dfa955213b2064
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
A llvm/test/Transforms/LoopVectorize/AArch64/non-affine-monotonic-bounds.ll
A llvm/test/Transforms/LoopVectorize/non-affine-monotonic-bounds.ll
Log Message:
-----------
[LAA,LV] Add tests for non-affine monotonic pointer bounds (NFC). (#210544)
Add test cases with non-affine monotonic pointer bounds, like for
example when using std::bitset.
Initial sets of tests for
https://github.com/llvm/llvm-project/issues/207882.
Commit: cd99637821097c239b665793243d8e6a332fc719
https://github.com/llvm/llvm-project/commit/cd99637821097c239b665793243d8e6a332fc719
Author: Vito Secona <77039267+secona at users.noreply.github.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/test/Dialect/Bufferization/Transforms/buffer-deallocation-simplification.mlir
Log Message:
-----------
[mlir][bufferization] Fix stale BufferOriginAnalysis in BufferDeallocationSimplification (#210105)
Fixes #205228
This change fixes a use-after-free bug in the
BufferDeallocationSimplification pipeline caused by the greedy pattern
rewriter deleting operation tracked by the BufferOriginAnalysis.
BufferViewFlowAnalysis (internally used by BufferOriginAnalysis) creates
the dependencies map once during initialization. In this specific case,
the folder removed the `memref.cast` ops making later uses a
use-after-free bug.
Below is the snippet of running the pass using
`-debug-only=greedy-rewriter`. It erases a `memref.cast` and crashes in
RemoveDeallocMemrefsContainedInRetained.
```
...
[greedy-rewriter:1] //===-------------------------------------------===//
[greedy-rewriter:1] Processing operation : 'memref.cast'(0x654d43d18670) {
[greedy-rewriter:1] %4 = "memref.cast"(%3) : (memref<?x?xf32, 1>) -> memref<4x4xf32, 1>
[greedy-rewriter:1]
[greedy-rewriter:1] } -> success : operation was folded
[greedy-rewriter:1] //===-------------------------------------------===//
[greedy-rewriter:1] ** Replace : 'memref.cast'(0x654d43d18670)
[greedy-rewriter:1] ** Modified: 'scf.yield'(0x654d43c97bb0)
[greedy-rewriter:1] ** Erase : 'memref.cast'(0x654d43d18670)
...
[greedy-rewriter:1] Processing operation : 'bufferization.dealloc'(0x654d43cbd7d0) {
[greedy-rewriter:1] %5 = "bufferization.dealloc"(%4#0, %1, %3) <{operandSegmentSizes = array<i32: 1, 1, 1>}> : (memref<f32, 1>, i1, memref<4x4xf32, 1>) -> i1
[greedy-rewriter:1]
[greedy-rewriter:1]
[greedy-rewriter:1] * Pattern (anonymous namespace)::RemoveDeallocMemrefsContainedInRetained : 'bufferization.dealloc -> ()' {
```
The fix is to disable folding and split the canonicalization patterns to
run separately. This way, the patterns that rely on BufferOriginAnalysis
still work because folding was disabled and BufferOriginAnalysis never
invalidated. Then, the canonicalization patterns still benefit from
folding.
Commit: 4b4d4a61202bd960a7a72730d596e5ebe6ab71b1
https://github.com/llvm/llvm-project/commit/4b4d4a61202bd960a7a72730d596e5ebe6ab71b1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2.ll
Log Message:
-----------
[SLP][NFC]Add a test for potential masked div/rem ops, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210593
Commit: 5c7dc8e7d72e8f833e5fa4d4790e93ff76b51304
https://github.com/llvm/llvm-project/commit/5c7dc8e7d72e8f833e5fa4d4790e93ff76b51304
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M libcxx/test/libcxx/ranges/range.adaptors/range.enumerate/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Add missing test cases for `[[nodiscard]]` tests in `enumerate_view` (#209289)
Addresses missing `[[nodiscard]]` test cases for
`std::views::enumerate`.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: ab39c491430e1f327849708ababffa3458b8ff6f
https://github.com/llvm/llvm-project/commit/ab39c491430e1f327849708ababffa3458b8ff6f
Author: Feng Zou <feng.zou at intel.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-multipred.ll
A llvm/test/CodeGen/X86/apx/optimize-compare-multipred.mir
Log Message:
-----------
[X86][APX] Reuse EFLAGS across multi-predecessor blocks via NF in optimizeCompareInstr (#208184)
Extend optimizeCompareInstr to reuse EFLAGS produced in predecessor
blocks (including via NF variants) when a compare is redundant, covering
multi-predecessor, dominating, and cyclic CFGs. Share the NF-clobber
removal helper with FlagsCopyLowering, correctly handle swapped and
immediate-adjusted flag reuse, and simplify EFLAGS live-in marking.
Adds MIR tests exercising multi-predecessor reuse over cyclic and
dominating CFGs, including a multi-level idom walk.
Assisted-By: Claude Opus 4.8
Commit: 637506427c2062fdbbd52fe1ef6c701f799a4228
https://github.com/llvm/llvm-project/commit/637506427c2062fdbbd52fe1ef6c701f799a4228
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/masked-div-rem-non-pow2-revec.ll
Log Message:
-----------
[SLP][NFC]Add a test with potential masked revec udiv, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210596
Commit: 9f6c84b8361133ecea5a43e34ab020384085a931
https://github.com/llvm/llvm-project/commit/9f6c84b8361133ecea5a43e34ab020384085a931
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M .github/workflows/containers/libc/Dockerfile
Log Message:
-----------
[Github] symlink `llvm-tools` in libc container (#210561)
Missed thing in #210414. We need to symlink the LLVM tools that are
under `/usr/lib/llvm-23/bin/` to avoid errors like this because the LLVM
tools have a `-23` suffix when they're installed inside the container
```
# RUN: at line 2
/usr/bin/clang-23 -gline-tables-only -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -DCOMPILER_RT_HAS_FLOAT16 -nobuiltininc -I/__w/llvm-project/llvm-project/compiler-rt/include -idirafter /usr/lib/llvm-23/lib/clang/23/include -resource-dir=/__w/llvm-project/llvm-project/build/compiler-rt -Wl,-rpath,/__w/llvm-project/llvm-project/build/compiler-rt/lib/linux -fno-builtin -I /__w/llvm-project/llvm-project/compiler-rt/lib/builtins -nodefaultlibs /__w/llvm-project/llvm-project/compiler-rt/test/builtins/Unit/aarch64/emupac.c -lm -Wl,--start-group /__w/llvm-project/llvm-project/build/compiler-rt/lib/linux/libclang_rt.builtins-aarch64.a -lc -Wl,--end-group -o /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp
# executed command: /usr/bin/clang-23 -gline-tables-only -Wthread-safety -Wthread-safety-reference -Wthread-safety-beta -DCOMPILER_RT_HAS_FLOAT16 -nobuiltininc -I/__w/llvm-project/llvm-project/compiler-rt/include -idirafter /usr/lib/llvm-23/lib/clang/23/include -resource-dir=/__w/llvm-project/llvm-project/build/compiler-rt -Wl,-rpath,/__w/llvm-project/llvm-project/build/compiler-rt/lib/linux -fno-builtin -I /__w/llvm-project/llvm-project/compiler-rt/lib/builtins -nodefaultlibs /__w/llvm-project/llvm-project/compiler-rt/test/builtins/Unit/aarch64/emupac.c -lm -Wl,--start-group /__w/llvm-project/llvm-project/build/compiler-rt/lib/linux/libclang_rt.builtins-aarch64.a -lc -Wl,--end-group -o /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp
# RUN: at line 3
/__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 1
# executed command: /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 1
# RUN: at line 4
/__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 2
# executed command: /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 2
# RUN: at line 5
not --crash /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 3
# executed command: not --crash /__w/llvm-project/llvm-project/build/compiler-rt/test/builtins/Unit/AARCH64LinuxConfig/aarch64/Output/emupac.c.tmp 3
# .---command stderr------------
# | 'not': command not found
# `-----------------------------
```
Commit: dcf03fefd46ea1426475c948925c9501af2f5495
https://github.com/llvm/llvm-project/commit/dcf03fefd46ea1426475c948925c9501af2f5495
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/Eytzinger.h
M llvm/unittests/ADT/EytzingerTest.cpp
Log Message:
-----------
[ADT] Add begin and end to EytzingerTableSpan and EytzingerTable (NFC) (#210478)
This patch adds iterator and const_iterator type aliases as well as
begin() and end() methods to EytzingerTableSpan and EytzingerTable.
I'm going to be using these as part of the SecNameTable in the
Eytzinger layout.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/8
Assisted-by: Antigravity
Commit: 24942433bc8a71b8aa459f802a0962089bb4dd22
https://github.com/llvm/llvm-project/commit/24942433bc8a71b8aa459f802a0962089bb4dd22
Author: Mend Renovate <bot at renovateapp.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/premerge.yaml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/require-team-membership/action.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/subscriber.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
Log Message:
-----------
Update [Github] Update GHA Dependencies (#194274)
This PR contains the following updates:
| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
|
[EnricoMi/publish-unit-test-result-action](https://redirect.github.com/EnricoMi/publish-unit-test-result-action)
| action | minor | `v2.23.0` → `v2.24.0` | |
|
[actions/attest-build-provenance](https://redirect.github.com/actions/attest-build-provenance)
| action | patch | `v4.1.0` → `v4.1.1` | |
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | patch | `v6.0.2` → `v6.0.3` | |
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | patch | `v6.0.1` → `v6.0.3` | |
|
[actions/create-github-app-token](https://redirect.github.com/actions/create-github-app-token)
| action | minor | `v3.1.1` → `v3.2.0` | |
| [actions/labeler](https://redirect.github.com/actions/labeler) |
action | minor | `v6.0.1` → `v6.2.0` | |
| [actions/setup-node](https://redirect.github.com/actions/setup-node) |
action | minor | `v6.3.0` → `v6.5.0` | |
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | minor | `v6.2.0` → `v6.3.0` | |
|
[actions/upload-artifact](https://redirect.github.com/actions/upload-artifact)
| action | patch | `v7.0.0` → `v7.0.1` | |
| [aminya/setup-cpp](https://redirect.github.com/aminya/setup-cpp) |
action | patch | `v1.8.0` → `v1.8.1` | |
| [docker/login-action](https://redirect.github.com/docker/login-action)
| action | minor | `v4.1.0` → `v4.4.0` | |
| ghcr.io/llvm/amd64/ci-ubuntu-24.04-github-automation | container |
digest | `82b5304` → `f419363` | |
| ghcr.io/llvm/ci-ubuntu-24.04 | container | digest | `cc4fd65` →
`26c16c2` | |
| ghcr.io/llvm/ci-ubuntu-24.04-abi-tests | container | digest |
`cb3aea3` → `a948062` | |
| ghcr.io/llvm/ci-ubuntu-24.04-lint | container | digest | `91665a4` →
`416874e` | |
| ghcr.io/llvm/libc-ubuntu-24.04 | container | digest | `a902fb5` →
`b9c8ea7` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | minor | `v4.35.2` → `v4.37.0` | `v4.37.1` |
|
[hendrikmuhs/ccache-action](https://redirect.github.com/hendrikmuhs/ccache-action)
| action | patch | `v1.2.22` → `v1.2.23` | |
|
[zizmorcore/zizmor-action](https://redirect.github.com/zizmorcore/zizmor-action)
| action | minor | `v0.5.3` → `v0.6.0` | |
Commit: c45b4e4d00bed488d6ece5608560561732ae5b9e
https://github.com/llvm/llvm-project/commit/c45b4e4d00bed488d6ece5608560561732ae5b9e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Link static PIE executables against rcrt1.o (#210125)
We always selected crt1.o as the CRT start file, regardless of link
mode.
Select rcrt1.o - the self-relocating static-PIE start file when -static
and PIE are active
Commit: 268bd17c41866be37811d6ec0c6e58b1de4ce63d
https://github.com/llvm/llvm-project/commit/268bd17c41866be37811d6ec0c6e58b1de4ce63d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-19 (Sun, 19 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .github/new-prs-labeler.yml
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/containers/libc/Dockerfile
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
A .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/premerge.yaml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/require-team-membership/action.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/subscriber.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/validate-release-version/action.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
M .mailmap
A bolt/docs/BOLTAArch64OptimizationStatus.md
R bolt/docs/BOLTAArch64OptimizationStatus.rst
A bolt/docs/GettingStarted.md
R bolt/docs/GettingStarted.rst
A bolt/docs/index.md
R bolt/docs/index.rst
M bolt/docs/profiles.md
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Profile/DataReader.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Profile/DataReader.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/X86/dwarf-inline-range-plt-shift.s
M bolt/test/X86/dwarf4-cross-cu-ranges.test
M bolt/test/X86/dwarf5-debug-names-cross-cu.s
A bolt/test/X86/jump-table-failed-reanalysis.s
M bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
A bolt/test/X86/profile-symbols-mode.s
M bolt/test/X86/pseudoprobe-decoding-inline.test
M bolt/test/X86/pseudoprobe-decoding-noinline.test
M bolt/test/lit.cfg.py
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
R clang-tools-extra/clang-doc/MDMustacheGenerator.cpp
M clang-tools-extra/clang-doc/Representation.h
R clang-tools-extra/clang-doc/YAMLGenerator.cpp
R clang-tools-extra/clang-doc/markdown/CMakeLists.txt
R clang-tools-extra/clang-doc/markdown/Markdown.cpp
R clang-tools-extra/clang-doc/markdown/Markdown.h
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseScopedLockCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clangd/CMakeLists.txt
M clang-tools-extra/clangd/ConfigYAML.cpp
A clang-tools-extra/clangd/LSPBinder.cpp
M clang-tools-extra/clangd/LSPBinder.h
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/test/lit.cfg.py
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-scoped-lock.rst
M clang-tools-extra/include-cleaner/test/lit.cfg.py
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/basic-project.test
M clang-tools-extra/test/clang-doc/md/array-type.cpp
M clang-tools-extra/test/clang-doc/md/builtin_types.cpp
M clang-tools-extra/test/clang-doc/md/class-partial-specialization.cpp
M clang-tools-extra/test/clang-doc/md/comments-in-macros.cpp
M clang-tools-extra/test/clang-doc/md/enum.cpp
M clang-tools-extra/test/clang-doc/md/function-pointer-type.cpp
M clang-tools-extra/test/clang-doc/md/member-function-pointer-type.cpp
M clang-tools-extra/test/clang-doc/md/namespace.cpp
M clang-tools-extra/test/clang-doc/md/nested-pointer-qualifiers.cpp
M clang-tools-extra/test/clang-doc/md/templates.cpp
R clang-tools-extra/test/clang-doc/yaml/builtin_types.cpp
R clang-tools-extra/test/clang-doc/yaml/conversion_function.cpp
R clang-tools-extra/test/clang-doc/yaml/single-file-public.cpp
R clang-tools-extra/test/clang-doc/yaml/single-file.cpp
R clang-tools-extra/test/clang-doc/yaml/templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/redundant-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-scoped-lock-warn-on-single-locks-false.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-scoped-lock.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/.clang-tidy
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/include/macro.h
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/subdir/.clang-tidy
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-macro-argument.cpp
M clang-tools-extra/test/lit.cfg.py
M clang-tools-extra/unittests/clang-doc/CMakeLists.txt
R clang-tools-extra/unittests/clang-doc/MDGeneratorTest.cpp
R clang-tools-extra/unittests/clang-doc/MarkdownParserTest.cpp
R clang-tools-extra/unittests/clang-doc/YAMLGeneratorTest.cpp
M clang/bindings/python/tests/cindex/test_diagnostics.py
A clang/docs/AMDGPUSupport.md
R clang/docs/AMDGPUSupport.rst
A clang/docs/APINotes.md
R clang/docs/APINotes.rst
A clang/docs/AllocToken.md
R clang/docs/AllocToken.rst
A clang/docs/BoundsSafety.md
R clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyAdoptionGuide.md
R clang/docs/BoundsSafetyAdoptionGuide.rst
A clang/docs/BoundsSafetyImplPlans.md
R clang/docs/BoundsSafetyImplPlans.rst
A clang/docs/CIR/index.md
R clang/docs/CIR/index.rst
A clang/docs/CXXTypeAwareAllocators.md
R clang/docs/CXXTypeAwareAllocators.rst
A clang/docs/ClangPlugins.md
R clang/docs/ClangPlugins.rst
A clang/docs/CommandGuide/index.md
R clang/docs/CommandGuide/index.rst
A clang/docs/ControlFlowIntegrity.md
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A clang/docs/DebuggingCoroutines.md
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A clang/docs/ExternalClangExamples.md
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A clang/docs/FAQ.md
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M clang/docs/HIPSupport.md
A clang/docs/IntroductionToTheClangAST.md
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M clang/docs/LanguageExtensions.md
A clang/docs/LibClang.md
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A clang/docs/LibFormat.md
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A clang/docs/LibTooling.md
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M clang/docs/OpenMPSupport.md
A clang/docs/RISCVSupport.md
R clang/docs/RISCVSupport.rst
M clang/docs/ReleaseNotes.md
A clang/docs/ScalableStaticAnalysis/user-docs/SourceEditGeneration.rst
A clang/docs/Tooling.md
R clang/docs/Tooling.rst
M clang/docs/UsersManual.md
M clang/docs/analyzer/checkers.rst
M clang/include/clang/APINotes/APINotesReader.h
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/CommentLexer.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LiveOrigins.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LoanPropagation.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/MovedLoans.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
M clang/include/clang/Analysis/Analyses/LiveVariables.h
M clang/include/clang/Basic/AArch64CodeGenUtils.h
M clang/include/clang/Basic/AtomicLineLogger.h
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/Diagnostic.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/OpenCLExtensions.def
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Basic/PointerAuthOptions.h
M clang/include/clang/Basic/TokenKinds.h
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
A clang/include/clang/CIR/Dialect/IR/CIRStdOps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.h
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/Interfaces/CIRLoopOpInterface.td
M clang/include/clang/DependencyScanning/DependencyScanningService.h
M clang/include/clang/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/DependencyScanning/InProcessModuleCache.h
M clang/include/clang/ExtractAPI/DeclarationFragments.h
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
R clang/include/clang/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.h
A clang/include/clang/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/SharedLexicalRepresentation.h
A clang/include/clang/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/StaticLibrary.h
M clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/TUSummaryEncoding.h
A clang/include/clang/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.h
M clang/include/clang/Sema/ExternalSemaSource.h
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Sema/Template.h
R clang/include/clang/Sema/TemplateInstCallback.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/InMemoryModuleCache.h
M clang/include/clang/Serialization/ModuleCache.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LiveVariables.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/IdiomRecognizer.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/PassDetail.h
M clang/lib/CIR/Interfaces/CIRLoopOpInterface.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Format/CMakeLists.txt
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseAST.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
M clang/lib/ScalableStaticAnalysis/Analyses/CallGraph/CallGraphExtractor.cpp
R clang/lib/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractor.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/SharedLexicalRepresentationFormat.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Frontend/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaBase.cpp
M clang/lib/Sema/SemaBoundsSafety.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/InMemoryModuleCache.cpp
M clang/lib/Serialization/ModuleCache.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIFunctionClassifier.cpp
M clang/lib/StaticAnalyzer/Checkers/PthreadLockChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/ReportDanglingPtrDeref.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UseAfterLifetimeEnd.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BasicValueFactory.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.apinotes
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/where-parameters-sema.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/builtin-object-size.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/typeid.cpp
M clang/test/AST/ByteCode/unions.cpp
A clang/test/AST/ByteCode/virtual-bases-codegen.cpp
A clang/test/AST/ByteCode/virtual-bases.cpp
M clang/test/AST/HLSL/HLSLControlFlowHint.hlsl
R clang/test/AST/HLSL/Texture2D-AST.hlsl
R clang/test/AST/HLSL/Texture2D-scalar-AST.hlsl
R clang/test/AST/HLSL/Texture2D-shorthand-AST.hlsl
R clang/test/AST/HLSL/Texture2D-vector-AST.hlsl
R clang/test/AST/HLSL/Texture2DArray-scalar-AST.hlsl
R clang/test/AST/HLSL/Texture2DArray-shorthand-AST.hlsl
R clang/test/AST/HLSL/Texture2DArray-vector-AST.hlsl
A clang/test/AST/HLSL/Textures-AST.hlsl
A clang/test/AST/HLSL/Textures-scalar-AST.hlsl
A clang/test/AST/HLSL/Textures-shorthand-AST.hlsl
A clang/test/AST/HLSL/Textures-vector-AST.hlsl
M clang/test/AST/HLSL/matrix-alias.hlsl
M clang/test/AST/HLSL/matrix-constructors.hlsl
M clang/test/AST/HLSL/matrix-elementexpr-tree-transform.hlsl
M clang/test/AST/HLSL/matrix-general-initializer.hlsl
M clang/test/AST/HLSL/matrix-member-access-scalar.hlsl
M clang/test/AST/HLSL/matrix-member-access-swizzle.hlsl
M clang/test/AST/HLSL/resources-in-structs-errors.hlsl
M clang/test/AST/HLSL/resources-in-structs.hlsl
M clang/test/AST/HLSL/vector-alias.hlsl
M clang/test/AST/HLSL/vector-constructors.hlsl
M clang/test/AST/HLSL/vk.spec-constant.usage.hlsl
M clang/test/AST/ast-dump-decl.cpp
A clang/test/AST/ast-dump-deleted-defaulted-range.cpp
M clang/test/AST/ast-dump-funcs.cpp
M clang/test/AST/ast-dump-record-definition-data-json.cpp
M clang/test/Analysis/ArrayBound/assumption-reporting.c
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
M clang/test/Analysis/MPIMock.h
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary-bad-id.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary-no-key.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-bad-id.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-empty.json
R clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-no-key.json
R clang/test/Analysis/Scalable/OperatorNewDelete/operator-new-delete.cpp
R clang/test/Analysis/Scalable/OperatorNewDelete/tu-summary-serialization.test
R clang/test/Analysis/Scalable/OperatorNewDelete/wpa-result-serialization.test
A clang/test/Analysis/Scalable/PointerFlow/system-header-opt-out.cpp
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/tu-summary-bad-id.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/tu-summary-no-key.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/tu-summary.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/wpa-result-bad-id.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/wpa-result-empty.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/Inputs/wpa-result-no-key.json
A clang/test/Analysis/Scalable/TypeConstrainedPointers/tu-summary-serialization.test
A clang/test/Analysis/Scalable/TypeConstrainedPointers/type-constrained-pointers.cpp
A clang/test/Analysis/Scalable/TypeConstrainedPointers/wpa-result-serialization.test
A clang/test/Analysis/Scalable/call-graph-local-entities.cpp
M clang/test/Analysis/Scalable/command-line-interface.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/local-entities.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/empty-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Inputs/two-function-suite.json
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
A clang/test/Analysis/Scalable/source-edit-generation/Plugins/lit.local.cfg
A clang/test/Analysis/Scalable/source-edit-generation/cli-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
A clang/test/Analysis/Scalable/source-edit-generation/downgradable-errors.cpp
A clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
A clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-explicit-triple.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/lib-namespace-override.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libempty.json
A clang/test/Analysis/Scalable/ssaf-linker/Outputs/libtwo.json
M clang/test/Analysis/Scalable/ssaf-linker/help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-create.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-help.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-time.test
A clang/test/Analysis/Scalable/ssaf-linker/static-library-verbose.test
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/bitwise-shift-common.c
M clang/test/Analysis/bstring.c
M clang/test/Analysis/c11lock.c
M clang/test/Analysis/constant-folding.c
A clang/test/Analysis/dangling-ptr-deref.cpp
M clang/test/Analysis/debug-lifetime-bound.cpp
M clang/test/Analysis/exploded-graph-rewriter/lit.local.cfg
M clang/test/Analysis/fuchsia_lock.c
M clang/test/Analysis/inlining/Inputs/expected-plists/path-notes.cpp.plist
A clang/test/Analysis/issue-173210-self-assign-init.c
M clang/test/Analysis/lifetime-bound.cpp
M clang/test/Analysis/lit.local.cfg
M clang/test/Analysis/malloc.c
M clang/test/Analysis/mpichecker.cpp
M clang/test/Analysis/operator-calls.cpp
M clang/test/Analysis/pr22954.c
M clang/test/Analysis/pthreadlock-notes.c
M clang/test/Analysis/pthreadlock.c
M clang/test/Analysis/scan-build/lit.local.cfg
A clang/test/Analysis/std-c-library-functions-non-integral-ssize_t.cpp
A clang/test/Analysis/string-search-modeling.c
M clang/test/Analysis/string.c
A clang/test/Analysis/z3/z3-logicalexpr-eval.c
M clang/test/Analysis/z3/z3-unarysymexpr.c
A clang/test/C/C2y/n3267.c
M clang/test/CIR/CodeGen/builtins-x86.c
A clang/test/CIR/CodeGen/func-identity-attr.c
A clang/test/CIR/CodeGen/func-identity-attr.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
M clang/test/CIR/CodeGen/var_arg.c
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zihintntl.c
M clang/test/CIR/CodeGenBuiltins/X86/avx10_2_512bf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx10_2bf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/keylocker.c
M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtin-call.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
M clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
A clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
A clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
A clang/test/CIR/IR/func-identity-attr.cir
A clang/test/CIR/IR/invalid-loop-cleanup.cir
A clang/test/CIR/IR/loop-cleanup.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-lang-addrspace-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-scalars.cir
A clang/test/CIR/Transforms/idiom-recognizer-guards-void-result.cpp
A clang/test/CIR/Transforms/idiom-recognizer-guards.cpp
A clang/test/CIR/Transforms/idiom-recognizer-inline-namespace.cpp
A clang/test/CIR/Transforms/idiom-recognizer.cir
M clang/test/CIR/Transforms/idiom-recognizer.cpp
M clang/test/CMakeLists.txt
A clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general/p2.cpp
M clang/test/CXX/drs/cwg16xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/temp/temp.param/p10-2a.cpp
A clang/test/ClangScanDeps/logging-drop-pcm.c
A clang/test/ClangScanDeps/logging-simple-by-name.c
A clang/test/ClangScanDeps/logging-simple.c
A clang/test/ClangScanDeps/logging-two-threads.c
M clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
M clang/test/CodeGen/AArch64/branch-protection-attr.c
M clang/test/CodeGen/AArch64/elf-pauthabi.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_reinterpret.c
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-extract.c
M clang/test/CodeGen/AArch64/neon-fcvt-intrinsics.c
M clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
M clang/test/CodeGen/AArch64/neon-ldst-one.c
M clang/test/CodeGen/AArch64/neon-misc.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
M clang/test/CodeGen/AArch64/neon-vcmla.c
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/sign-return-address.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
M clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
M clang/test/CodeGen/AArch64/v9.7a-neon-mmla-intrinsics.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fma.c
M clang/test/CodeGen/PowerPC/builtins-ppc-fpconstrained.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/CodeGen/SystemZ/systemz-module.flags.c
M clang/test/CodeGen/SystemZ/zos-ppa1-name.c
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/arm-neon-vst.c
M clang/test/CodeGen/arm64_vdupq_n_f64.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/attr-nomerge.cpp
M clang/test/CodeGen/attr-target-mv.c
M clang/test/CodeGen/attr-target-x86.c
A clang/test/CodeGen/builtin-trap.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/c11atomics.c
M clang/test/CodeGen/call-graph-section-callback.cpp
M clang/test/CodeGen/call-graph-section-internal.cpp
M clang/test/CodeGen/call-graph-section-templates.cpp
M clang/test/CodeGen/call-graph-section-virtual-methods.cpp
M clang/test/CodeGen/call-graph-section.c
M clang/test/CodeGen/call-graph-section.cpp
M clang/test/CodeGen/cx-complex-range-real.c
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/memcmp-inline-builtin-to-asm.c
M clang/test/CodeGen/memcpy-inline-builtin.c
M clang/test/CodeGen/pr53127.cpp
M clang/test/CodeGen/pr9614.c
M clang/test/CodeGen/ptrauth-init-fini.c
M clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/CodeGenCUDA/device-stub.cu
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-vararg.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
A clang/test/CodeGenCXX/msvc-global-delete-forwarding-at-delete-site.cpp
M clang/test/CodeGenCXX/msvc-global-delete-scalar-array-split.cpp
M clang/test/CodeGenCXX/msvc-global-delete-scope-no-dtor.cpp
M clang/test/CodeGenCXX/msvc-no-global-delete-forwarding.cpp
M clang/test/CodeGenCXX/pfp-memcpy.cpp
M clang/test/CodeGenCXX/trap-fnattr.cpp
M clang/test/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CodeGenCXX/vararg-non-pod.cpp
M clang/test/CodeGenHLSL/BasicFeatures/frem_modulo.hlsl
M clang/test/CodeGenHLSL/builtins/AllMemoryBarrier.hlsl
M clang/test/CodeGenHLSL/builtins/AllMemoryBarrierWithGroupSync.hlsl
M clang/test/CodeGenHLSL/builtins/DeviceMemoryBarrier.hlsl
M clang/test/CodeGenHLSL/builtins/DeviceMemoryBarrierWithGroupSync.hlsl
M clang/test/CodeGenHLSL/builtins/GroupMemoryBarrier.hlsl
M clang/test/CodeGenHLSL/builtins/GroupMemoryBarrierWithGroupSync.hlsl
M clang/test/CodeGenHLSL/builtins/InterlockedAdd.hlsl
M clang/test/CodeGenHLSL/builtins/InterlockedOr.hlsl
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossDiagonal.hlsl
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossX.hlsl
M clang/test/CodeGenHLSL/builtins/QuadReadAcrossY.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveAllEqual.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveAllTrue.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveAnyTrue.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBallot.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBitAnd.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBitOr.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBitXor.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveCountBits.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveMax.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveMin.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveProduct.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveSum.hlsl
M clang/test/CodeGenHLSL/builtins/WavePrefixCountBits.hlsl
M clang/test/CodeGenHLSL/builtins/WavePrefixProduct.hlsl
M clang/test/CodeGenHLSL/builtins/WavePrefixSum.hlsl
M clang/test/CodeGenHLSL/builtins/WaveReadLaneAt.hlsl
M clang/test/CodeGenHLSL/builtins/acos-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/acos.hlsl
M clang/test/CodeGenHLSL/builtins/all.hlsl
M clang/test/CodeGenHLSL/builtins/any.hlsl
M clang/test/CodeGenHLSL/builtins/asdouble.hlsl
M clang/test/CodeGenHLSL/builtins/asin-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/asin.hlsl
M clang/test/CodeGenHLSL/builtins/atan-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/atan.hlsl
M clang/test/CodeGenHLSL/builtins/atan2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/atan2-overloads_mat.hlsl
M clang/test/CodeGenHLSL/builtins/atan2.hlsl
M clang/test/CodeGenHLSL/builtins/atan2_mat.hlsl
M clang/test/CodeGenHLSL/builtins/clamp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/clamp.hlsl
M clang/test/CodeGenHLSL/builtins/clip.hlsl
M clang/test/CodeGenHLSL/builtins/cosh-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/cosh.hlsl
M clang/test/CodeGenHLSL/builtins/cross.hlsl
M clang/test/CodeGenHLSL/builtins/ddx-coarse-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/ddx-coarse.hlsl
M clang/test/CodeGenHLSL/builtins/ddx-fine-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/ddx-fine.hlsl
M clang/test/CodeGenHLSL/builtins/ddx.hlsl
M clang/test/CodeGenHLSL/builtins/ddy-coarse-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/ddy-coarse.hlsl
M clang/test/CodeGenHLSL/builtins/ddy-fine-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/ddy-fine.hlsl
M clang/test/CodeGenHLSL/builtins/ddy.hlsl
M clang/test/CodeGenHLSL/builtins/degrees-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/degrees.hlsl
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/dot.hlsl
M clang/test/CodeGenHLSL/builtins/dot2add.hlsl
M clang/test/CodeGenHLSL/builtins/f16tof32-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/f16tof32.hlsl
M clang/test/CodeGenHLSL/builtins/f32tof16-builtin.hlsl
M clang/test/CodeGenHLSL/builtins/f32tof16.hlsl
M clang/test/CodeGenHLSL/builtins/faceforward.hlsl
M clang/test/CodeGenHLSL/builtins/firstbithigh.hlsl
M clang/test/CodeGenHLSL/builtins/firstbitlow.hlsl
M clang/test/CodeGenHLSL/builtins/fma.hlsl
M clang/test/CodeGenHLSL/builtins/fmod.hlsl
M clang/test/CodeGenHLSL/builtins/frac-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/frac.hlsl
M clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/isinf.hlsl
M clang/test/CodeGenHLSL/builtins/isnan.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/lerp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/lerp.hlsl
M clang/test/CodeGenHLSL/builtins/mad.hlsl
M clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/normalize.hlsl
M clang/test/CodeGenHLSL/builtins/radians-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/radians.hlsl
M clang/test/CodeGenHLSL/builtins/rcp.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/refract.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
M clang/test/CodeGenHLSL/builtins/sign.hlsl
M clang/test/CodeGenHLSL/builtins/sinh.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/step.hlsl
M clang/test/CodeGenHLSL/builtins/tan-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/tan.hlsl
M clang/test/CodeGenHLSL/builtins/tanh-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/tanh.hlsl
M clang/test/CodeGenHLSL/resources/RWBuffer-imageformat.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-ps.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-CalculateLevelOfDetail.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Gather.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-GetDimensions.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Load.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Mips.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Sample.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleBias.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleCmp.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleCmpLevelZero.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleGrad.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-SampleLevel.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-Subscript.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-default-explicit-binding.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-default.hlsl
R clang/test/CodeGenHLSL/resources/Texture2D-shorthand-contexts.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-CalculateLevelOfDetail.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Gather.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Load.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Mips.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Sample.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleBias.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleCmp.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleCmpLevelZero.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleGrad.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-SampleLevel.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-Subscript.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-default-explicit-binding.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-default.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-shorthand-contexts.hlsl
A clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Gather.hlsl
A clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
A clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
A clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
A clang/test/CodeGenHLSL/resources/Textures-default-explicit-binding.hlsl
A clang/test/CodeGenHLSL/resources/Textures-default.hlsl
A clang/test/CodeGenHLSL/resources/Textures-shorthand-contexts.hlsl
M clang/test/CodeGenHLSL/resources/TypedBuffers-constructor.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
M clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.vs.hlsl
M clang/test/CodeGenOpenCL/builtins-f16.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CoverageMapping/default-method.cpp
M clang/test/DebugInfo/CXX/verbose-trap.cpp
A clang/test/Driver/Inputs/resource_dir/lib/cygwin/libclang_rt.builtins-x86_64.a
A clang/test/Driver/Inputs/resource_dir_with_amdgpu_per_target_subdir/lib/amdgpu-amd-amdhsa/libclang_rt.profile.a
A clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-pc-windows-cygnus/libclang_rt.builtins.a
M clang/test/Driver/aarch64-features.c
M clang/test/Driver/aarch64-fmv.c
M clang/test/Driver/aarch64-security-options.c
M clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/clang-offload-bundler-multi-compress.c
A clang/test/Driver/cygwin-print-file-name.c
M clang/test/Driver/darwin-target-variant-sdk-version.c
M clang/test/Driver/dxc_debug.hlsl
M clang/test/Driver/dxc_hlsl-rootsig-ver.hlsl
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/hexagon-toolchain-picolibc.c
M clang/test/Driver/linux-ld.c
M clang/test/Driver/mingw-sysroot.cpp
M clang/test/Driver/msvc-link.c
A clang/test/Driver/openmp-invalid-target-id.c
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
M clang/test/Driver/print-enabled-extensions/aarch64-ampere1c.c
M clang/test/Driver/print-enabled-extensions/aarch64-apple-a16.c
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M clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c
M clang/test/Driver/print-enabled-extensions/aarch64-c1-nano.c
M clang/test/Driver/print-enabled-extensions/aarch64-c1-premium.c
M clang/test/Driver/print-enabled-extensions/aarch64-c1-pro.c
M clang/test/Driver/print-enabled-extensions/aarch64-c1-ultra.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a320.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a720.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a720ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-a725.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-x4.c
M clang/test/Driver/print-enabled-extensions/aarch64-cortex-x925.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Driver/print-enabled-extensions/aarch64-gb10.c
M clang/test/Driver/print-enabled-extensions/aarch64-hip12.c
M clang/test/Driver/print-enabled-extensions/aarch64-neoverse-n3.c
M clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v3.c
M clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v3ae.c
M clang/test/Driver/print-enabled-extensions/aarch64-olympus.c
M clang/test/Driver/print-enabled-extensions/aarch64-rigel.c
M clang/test/Driver/print-enabled-extensions/riscv-spacemit-a100.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/spirv-amd-toolchain.c
A clang/test/ExtractAPI/availability_typedef_anonymous_record.c
A clang/test/ExtractAPI/objc_nullability.m
M clang/test/Headers/gpuintrin.c
M clang/test/Interpreter/cxx20-modules.cppm
R clang/test/Interpreter/emulated-tls.cpp
M clang/test/Interpreter/execute-pch.cpp
A clang/test/Interpreter/pch-pic-mismatch.cpp
A clang/test/Interpreter/pcm-pic-mismatch.cpp
A clang/test/Misc/amdgcn.unsupported_core_3.1.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
M clang/test/OffloadTools/clang-offload-bundler/basic.c
M clang/test/OffloadTools/clang-offload-bundler/fat-archive-unbundle-ext.c
M clang/test/OffloadTools/clang-offload-bundler/standardize.c
M clang/test/OffloadTools/clang-offload-bundler/zlib.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
A clang/test/OpenMP/dims_modifier_ast_print.cpp
A clang/test/OpenMP/dims_modifier_messages.cpp
M clang/test/OpenMP/ompx_bare_messages.c
M clang/test/OpenMP/spirv_target_codegen_noexceptions.cpp
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/test/PCH/cxx20-template-args.cpp
A clang/test/PCH/unused-local-typedef-determinism.cpp
M clang/test/Parser/cxx-default-args.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/ParserHLSL/access_specifiers.hlsl
M clang/test/ParserHLSL/hlsl_contained_type_attr.hlsl
M clang/test/ParserHLSL/hlsl_contained_type_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_is_array_attr.hlsl
M clang/test/ParserHLSL/hlsl_is_array_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_raw_buffer_attr.hlsl
M clang/test/ParserHLSL/hlsl_raw_buffer_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_dimension_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_dimension_attr_error.hlsl
M clang/test/ParserHLSL/semantic_parsing.hlsl
M clang/test/ParserHLSL/semantic_parsing_define.hlsl
A clang/test/Preprocessor/GH101342.c
M clang/test/Preprocessor/aarch64-target-features.c
A clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.c
M clang/test/Sema/LifetimeSafety/dangling-field.cpp
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/Sema/aarch64-neon-target.c
M clang/test/Sema/aarch64-neon-without-target-feature.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
M clang/test/Sema/attr-sized-by-late-parsed-struct-ptrs.c
M clang/test/Sema/attr-sized-by-or-null-late-parsed-struct-ptrs.c
M clang/test/Sema/attr-sized-by-or-null-struct-ptrs.c
M clang/test/Sema/attr-sized-by-struct-ptrs.c
M clang/test/Sema/attr-target-mv.c
M clang/test/Sema/attr-target.c
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/enum.c
M clang/test/Sema/warn-fortify-source.c
A clang/test/Sema/warn-stringop-overread-fortify.c
A clang/test/Sema/warn-stringop-overread.c
A clang/test/SemaCXX/atomic-constexpr.cpp
M clang/test/SemaCXX/attr-sentinel.cpp
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/concepts-subsumption.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
M clang/test/SemaCXX/constexpr-late-instantiation.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/enable_if.cpp
M clang/test/SemaCXX/recovery-expr-type.cpp
M clang/test/SemaCXX/using-decl-templates.cpp
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
A clang/test/SemaCXX/warn-unused-local-typedef-deterministic-order.cpp
M clang/test/SemaHLSL/Availability/attr-deprecated.hlsl
M clang/test/SemaHLSL/BuiltIns/binary-compat-overload-warnings.hlsl
M clang/test/SemaHLSL/BuiltIns/fma-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/matrix-constructors-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/ternary-compat-overload-warnings.hlsl
M clang/test/SemaHLSL/BuiltIns/unary-compat-overload-warnings.hlsl
M clang/test/SemaHLSL/BuiltIns/vec-scalar-compat-overload-warnings.hlsl
M clang/test/SemaHLSL/BuiltIns/vector-constructors-errors.hlsl
M clang/test/SemaHLSL/Language/InitIncompleteArrays.hlsl
M clang/test/SemaHLSL/Language/InitLists.hlsl
M clang/test/SemaHLSL/Language/NoVirtual.hlsl
M clang/test/SemaHLSL/Language/OutputParameters.hlsl
M clang/test/SemaHLSL/Language/TemplateOutArg.hlsl
M clang/test/SemaHLSL/Resources/ConstantBuffers.hlsl
M clang/test/SemaHLSL/Resources/RWTexture2D-mips-errors.hlsl
M clang/test/SemaHLSL/Resources/RWTexture2D-unsupported-methods-errors.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-CalculateLevelOfDetail.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-GetDimensions.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-Load-errors.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleBias.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleCmp.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleCmpLevelZero.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleGrad.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-SampleLevel.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-Sema.hlsl
R clang/test/SemaHLSL/Resources/Texture2D-Subscript.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-CalculateLevelOfDetail.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-GetDimensions.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleBias.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleCmp.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleCmpLevelZero.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleGrad.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-SampleLevel.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-Sema.hlsl
R clang/test/SemaHLSL/Resources/Texture2DArray-Subscript.hlsl
A clang/test/SemaHLSL/Resources/Textures-CalculateLevelOfDetail.hlsl
A clang/test/SemaHLSL/Resources/Textures-GetDimensions.hlsl
A clang/test/SemaHLSL/Resources/Textures-Load-errors.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleBias.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleCmp.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleCmpLevelZero.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleGrad.hlsl
A clang/test/SemaHLSL/Resources/Textures-SampleLevel.hlsl
A clang/test/SemaHLSL/Resources/Textures-Sema.hlsl
A clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
M clang/test/SemaHLSL/Semantics/semantic.explicit-mix-builtin-vs.hlsl
M clang/test/SemaHLSL/Semantics/semantic.explicit-mix-location-2.hlsl
M clang/test/SemaHLSL/Semantics/semantic.explicit-mix-location.hlsl
M clang/test/SemaHLSL/Semantics/valid_entry_parameter.hlsl
M clang/test/SemaHLSL/Semantics/vertexid.vs.hlsl
R clang/test/SemaHLSL/Texture2D-Gather.hlsl
R clang/test/SemaHLSL/Texture2D-GatherCmp-Vulkan.hlsl
R clang/test/SemaHLSL/Texture2D-mips-errors.hlsl
R clang/test/SemaHLSL/Texture2DArray-Gather.hlsl
R clang/test/SemaHLSL/Texture2DArray-GatherCmp-Vulkan.hlsl
R clang/test/SemaHLSL/Texture2DArray-mips-errors.hlsl
A clang/test/SemaHLSL/Textures-Gather.hlsl
A clang/test/SemaHLSL/Textures-GatherCmp-Vulkan.hlsl
A clang/test/SemaHLSL/Textures-mips-errors.hlsl
M clang/test/SemaHLSL/Types/short-errors.hlsl
M clang/test/SemaHLSL/entry_shader.hlsl
M clang/test/SemaHLSL/num_threads.hlsl
M clang/test/SemaHLSL/prohibit_reference.hlsl
M clang/test/SemaHLSL/vk.spec-constant.error.hlsl
A clang/test/SemaOpenCL/builtins-amdgcn-cmp-deprecated.cl
M clang/test/SemaOpenCL/extension-version.cl
A clang/test/SemaTemplate/GH195988.cpp
M clang/test/SemaTemplate/class-template-spec.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts.cpp
R clang/test/Templight/templight-deduced-func.cpp
R clang/test/Templight/templight-default-arg-inst.cpp
R clang/test/Templight/templight-default-func-arg.cpp
R clang/test/Templight/templight-default-template-arg.cpp
R clang/test/Templight/templight-empty-entries-fix.cpp
R clang/test/Templight/templight-exception-spec-func.cpp
R clang/test/Templight/templight-explicit-template-arg.cpp
R clang/test/Templight/templight-memoization.cpp
R clang/test/Templight/templight-nested-memoization.cpp
R clang/test/Templight/templight-nested-template-instantiation.cpp
R clang/test/Templight/templight-one-instantiation.cpp
R clang/test/Templight/templight-prior-template-arg.cpp
M clang/test/lit.cfg.py
M clang/test/utils/update_cc_test_checks/Inputs/lit.cfg.example
M clang/test/utils/update_cc_test_checks/lit.local.cfg
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-scan-deps/Opts.td
M clang/tools/clang-ssaf-linker/CMakeLists.txt
M clang/tools/clang-ssaf-linker/SSAFLinker.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.cpp
A clang/tools/clang-ssaf-linker/StaticLibraryCreateCLI.h
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/AttrTest.cpp
M clang/unittests/AST/SourceLocationTest.cpp
M clang/unittests/Basic/AtomicLineLoggerTest.cpp
M clang/unittests/CIR/CMakeLists.txt
M clang/unittests/CIR/ControlFlowTest.cpp
A clang/unittests/CIR/GetFloatingPointTypeTest.cpp
A clang/unittests/CIR/IntTypeABIAlignTest.cpp
M clang/unittests/DependencyScanning/InProcessModuleCacheTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Lex/PPMemoryAllocationsTest.cpp
R clang/unittests/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointersExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowTest.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/SharedLexicalRepresentation/EntitySourceLocationExtractorTest.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointersExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/Serialization/JSONFormatTest/SharedLexicalRepresentationFormatTest.cpp
M clang/unittests/Serialization/InMemoryModuleCacheTest.cpp
M clang/unittests/Serialization/ModuleCacheTest.cpp
M clang/unittests/StaticAnalyzer/FalsePositiveRefutationBRVisitorTest.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/perf-training/bolt.lit.cfg
M clang/utils/perf-training/lit.cfg
M clang/utils/perf-training/order-files.lit.cfg
M clang/www/c_status.html
M clang/www/cxx_status.html
M cmake/Modules/LLVMVersion.cmake
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/cmake/builtin-config-ix.cmake
A compiler-rt/docs/ASanABI.md
R compiler-rt/docs/ASanABI.rst
A compiler-rt/docs/BuildingCompilerRT.md
R compiler-rt/docs/BuildingCompilerRT.rst
A compiler-rt/docs/TestingGuide.md
R compiler-rt/docs/TestingGuide.rst
M compiler-rt/lib/asan/AIX/asan.link_with_main_exec.txt
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/gwp_asan/optional/backtrace_linux_libc.cpp
M compiler-rt/lib/memprof/memprof_allocator.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_nolibc.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
M compiler-rt/lib/sanitizer_common/sanitizer_dl.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_internal.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_symbolizer_test.cpp
M compiler-rt/lib/tsan/go/buildgo.sh
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/asan/TestCases/AIX/vec_malloc_calloc.cpp
A compiler-rt/test/asan/TestCases/Darwin/atos-canary-symbolize.cpp
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
A compiler-rt/test/memprof/TestCases/memprof_histogram_tail_clear.cpp
A compiler-rt/test/memprof/TestCases/memprof_nonhistogram_tail_clear.cpp
A compiler-rt/test/msan/Linux/syscalls_setgroups.cpp
M compiler-rt/test/profile/Linux/counter_promo_for.c
M compiler-rt/test/profile/Linux/counter_promo_while.c
M compiler-rt/test/profile/gcov-__gcov_flush-terminate.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/dlopen_image_base.c
M compiler-rt/test/sanitizer_common/android_commands/android_common.py
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/make_signed.h
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/wrappers.h
A compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
M cross-project-tests/CMakeLists.txt
A cross-project-tests/dtlto/cache-extraction.test
R cross-project-tests/dtlto/cache-serialization.test
A cross-project-tests/dtlto/remote-options.test
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/CMakeLists.txt
M flang-rt/lib/runtime/cudadevice.f90
M flang-rt/test/lit.cfg.py
M flang/CMakeLists.txt
M flang/docs/CMakeLists.txt
A flang/docs/CommandGuide/index.md
R flang/docs/CommandGuide/index.rst
M flang/docs/FortranStandardsSupport.md
M flang/docs/ReleaseNotes.md
M flang/include/flang/Evaluate/call.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Lower/CUDA.h
M flang/include/flang/Lower/MultiImageFortran.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/include/flang/Optimizer/Analysis/ArraySectionAnalyzer.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Semantics/expression.h
A flang/include/flang/Semantics/omp-declare-variant.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/call.cpp
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M flang/lib/Optimizer/OpenMP/AutomapToTargetData.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Optimizer/Support/InitFIR.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
A flang/lib/Optimizer/Transforms/EmitMIFGlobalCtors.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/mod-file.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Support/Fortran-features.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-wsloop.mlir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-unboxed-wsloop.mlir
M flang/test/Driver/fakeflang.F
A flang/test/Driver/function-attr-readonly.f90
A flang/test/Evaluate/fold-conditional-arg.f90
A flang/test/Evaluate/fold-kind-logical.f90
A flang/test/Evaluate/fold-kind-substring.f90
A flang/test/Evaluate/fold-kind-zero-size.f90
M flang/test/Evaluate/logical-args.f90
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-constructor.f90
A flang/test/Fir/CUDA/cuda-device-func-transform-aio.mlir
A flang/test/Fir/CUDA/cuda-managed-descriptor-component.fir
A flang/test/Fir/CUDA/cuda-register-allocator-0.f90
A flang/test/Fir/CUDA/cuda-register-allocator-1.f90
A flang/test/Fir/alloc-aligned-device.fir
A flang/test/Fir/alloc-aligned-omp.fir
A flang/test/Fir/alloc-aligned.fir
M flang/test/Fir/basic-program.fir
A flang/test/Fir/create-box-codegen.fir
A flang/test/Fir/derived-type-aliases.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
A flang/test/HLFIR/inline-hlfir-assign-pointer-overlap.fir
A flang/test/HLFIR/inline-hlfir-assign-scalar-index.fir
A flang/test/HLFIR/inline-hlfir-assign-self-copy-runtime-stride.fir
A flang/test/HLFIR/inline-hlfir-assign-self-copy.fir
M flang/test/Integration/OpenMP/copyprivate.f90
M flang/test/Integration/OpenMP/private-global.f90
A flang/test/Integration/OpenMP/target-inreduction-llvmir.f90
M flang/test/Lower/CUDA/cuda-allocatable.cuf
A flang/test/Lower/CUDA/cuda-gpu-unified.cuf
M flang/test/Lower/CUDA/cuda-init.cuf
A flang/test/Lower/CUDA/cuda-managed-func-result.cuf
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
A flang/test/Lower/HLFIR/array-ctor-character-kind.f90
M flang/test/Lower/HLFIR/custom-intrinsic.f90
M flang/test/Lower/HLFIR/intrinsic-dynamically-optional.f90
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/Intrinsics/dconjg.f90
M flang/test/Lower/Intrinsics/dimag.f90
M flang/test/Lower/Intrinsics/dreal.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/MIF/coarray_allocation4.f90
M flang/test/Lower/MIF/coarray_allocation5.f90
M flang/test/Lower/MIF/image_index.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-distribute-private-adjustable-array.f90
A flang/test/Lower/OpenMP/Todo/declare-reduction-allocatable-trivial.f90
R flang/test/Lower/OpenMP/Todo/declare-reduction-operator-multiple-types.f90
R flang/test/Lower/OpenMP/Todo/declare-reduction-operator-use-assoc.f90
A flang/test/Lower/OpenMP/Todo/declare-variant-structured-trait-property.f90
A flang/test/Lower/OpenMP/Todo/declare-variant-target-device.f90
R flang/test/Lower/OpenMP/Todo/declare-variant.f90
R flang/test/Lower/OpenMP/Todo/multiple-types-declare_reduction.f90
A flang/test/Lower/OpenMP/Todo/target-inreduction-common.f90
A flang/test/Lower/OpenMP/Todo/target-inreduction-equivalence.f90
A flang/test/Lower/OpenMP/Todo/target-inreduction-firstprivate.f90
R flang/test/Lower/OpenMP/Todo/target-inreduction.f90
R flang/test/Lower/OpenMP/Todo/taskwait-depend.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/copyprivate.f90
A flang/test/Lower/OpenMP/declare-mapper-hermetic.f90
M flang/test/Lower/OpenMP/declare-reduction-character-allocatable.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-component.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-defined-assign.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-rhs-call.f90
M flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
A flang/test/Lower/OpenMP/declare-reduction-intrinsic-same-name-different-scope.f90
M flang/test/Lower/OpenMP/declare-reduction-logical-init.f90
A flang/test/Lower/OpenMP/declare-reduction-merge-hermetic.f90
A flang/test/Lower/OpenMP/declare-reduction-merge-version-skew.f90
A flang/test/Lower/OpenMP/declare-reduction-name-type-token-collision.f90
A flang/test/Lower/OpenMP/declare-reduction-named-renamed.f90
A flang/test/Lower/OpenMP/declare-reduction-named-separate-rename.f90
A flang/test/Lower/OpenMP/declare-reduction-named-use-assoc.f90
M flang/test/Lower/OpenMP/declare-reduction-no-initializer-derived.f90
M flang/test/Lower/OpenMP/declare-reduction-no-initializer-intrinsic.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-collide.f90
M flang/test/Lower/OpenMP/declare-reduction-operator-derived.f90
M flang/test/Lower/OpenMP/declare-reduction-operator-host-assoc.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-merged.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-multiple-types.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-renamed.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-collide-unused.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-combiners.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-hermetic.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-intrinsic-all.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-intrinsic-collide.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-intrinsic.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-multitype-partial.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-reexport.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-remerge.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-rename-remerge.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-submodule.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate-unused-unsupported.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-separate.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-use-assoc.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-use-only-nonreduction.f90
M flang/test/Lower/OpenMP/declare-reduction-operator.f90
M flang/test/Lower/OpenMP/declare-reduction-same-name-different-scope.f90
A flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic-multiple-types.f90
A flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic-separate.f90
A flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic-use-assoc.f90
M flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic.f90
A flang/test/Lower/OpenMP/declare-reduction-special-separate-reexport.f90
M flang/test/Lower/OpenMP/declare-reduction-target-intrinsic.f90
A flang/test/Lower/OpenMP/declare-target-automap.f90
A flang/test/Lower/OpenMP/declare-variant-call.f90
A flang/test/Lower/OpenMP/declare-variant-construct.f90
A flang/test/Lower/OpenMP/declare-variant-device.f90
A flang/test/Lower/OpenMP/declare-variant-implementation.f90
A flang/test/Lower/OpenMP/declare-variant-module.f90
A flang/test/Lower/OpenMP/declare-variant-target-device.f90
M flang/test/Lower/OpenMP/delayed-privatization-array.f90
M flang/test/Lower/OpenMP/lastprivate-equivalence.f90
M flang/test/Lower/OpenMP/loop-directive.f90
A flang/test/Lower/OpenMP/multiple-types-declare_reduction.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction.f90
M flang/test/Lower/OpenMP/optional-argument-map.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
A flang/test/Lower/OpenMP/private-array-boxing.f90
M flang/test/Lower/OpenMP/private-commonblock.f90
A flang/test/Lower/OpenMP/target-inreduction-unused.f90
A flang/test/Lower/OpenMP/target-inreduction.f90
A flang/test/Lower/OpenMP/taskwait-depend.f90
A flang/test/Lower/OpenMP/unroll-partial01.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/achar.f90
M flang/test/Lower/arguments.f90
M flang/test/Lower/call-copy-in-out.f90
M flang/test/Lower/dispatch.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
A flang/test/Lower/dummy-argument-readonly.f90
A flang/test/Lower/global-initialization-parens.f90
A flang/test/Lower/inline-hlfir-assign-forall-threadprivate.f90
A flang/test/Lower/inline-hlfir-assign-pointer-omp.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic.f90
A flang/test/Lower/pre-fir-tree-assigned-goto.f90
A flang/test/Lower/pre-fir-tree-multiway-branch.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/unsigned-ops.f90
M flang/test/Lower/volatile1.f90
M flang/test/Parser/acc-unparse.f90
M flang/test/Semantics/OpenACC/acc-loop-routine-call.f90
A flang/test/Semantics/OpenMP/declare-reduction-ambiguous.f90
A flang/test/Semantics/OpenMP/declare-reduction-operator-modfile-reexport.f90
M flang/test/Semantics/OpenMP/declare-simd-empty.f90
A flang/test/Semantics/OpenMP/declare-simd-scope.f90
M flang/test/Semantics/OpenMP/declare-simd.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
M flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
M flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/call48.f90
M flang/test/Semantics/conditional-arg.f90
A flang/test/Semantics/modfile84.F90
A flang/test/Semantics/substring-literal-kind.f90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-create-box.fir
A flang/test/Transforms/function-attrs-readonly.fir
M flang/test/Transforms/omp-automap-to-target-data.fir
M flang/test/lit.cfg.py
M flang/tools/CMakeLists.txt
M flang/tools/bbc/bbc.cpp
M flang/tools/fakeflang/CMakeLists.txt
R flang/tools/fakeflang/ensure_flang_exists.cmake
M flang/tools/fakeflang/fakeflang.cpp
M flang/tools/flang-driver/CMakeLists.txt
M flang/unittests/Semantics/OpenMPUtils.cpp
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/i386/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/math/index.rst
M libc/docs/headers/stdfix.rst
R libc/docs/headers/time.rst
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_select_macros.h
A libc/hdr/sys_wait_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/fd_set.h
A libc/hdr/types/struct_rusage.h
A libc/hdr/types/struct_utsname.h
M libc/include/CMakeLists.txt
A libc/include/alloca.yaml
M libc/include/arpa/inet.yaml
M libc/include/limits.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/alloca-macros.h
M libc/include/llvm-libc-macros/gpu/signal-macros.h
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/signal-macros.h
M libc/include/llvm-libc-macros/netinet-in-macros.h
M libc/include/llvm-libc-types/__futex_word.h
M libc/include/llvm-libc-types/struct_sockaddr_storage.h
M libc/include/math.yaml
M libc/include/stdfix.yaml
M libc/include/sys/prctl.h.def
M libc/include/sys/time.yaml
M libc/include/time.yaml
M libc/shared/math.h
A libc/shared/math/lgammaf16.h
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/expected.h
M libc/src/__support/CPP/simd.h
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/OSUtil/linux/CMakeLists.txt
M libc/src/__support/OSUtil/linux/auxv.h
M libc/src/__support/StringUtil/CMakeLists.txt
M libc/src/__support/StringUtil/signal_to_string.cpp
M libc/src/__support/StringUtil/tables/CMakeLists.txt
M libc/src/__support/StringUtil/tables/linux_extension_signals.h
M libc/src/__support/StringUtil/tables/posix_signals.h
M libc/src/__support/StringUtil/tables/stdc_signals.h
M libc/src/__support/fixed_point/CMakeLists.txt
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/__support/fixed_point/fx_rep.h
M libc/src/__support/freelist.cpp
M libc/src/__support/freelist_heap.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acos.h
M libc/src/__support/math/acosbf16.h
M libc/src/__support/math/acosf.h
M libc/src/__support/math/acospif.h
M libc/src/__support/math/asin.h
M libc/src/__support/math/asin_utils.h
M libc/src/__support/math/asinbf16.h
M libc/src/__support/math/asinf.h
M libc/src/__support/math/asinpi.h
M libc/src/__support/math/asinpif.h
M libc/src/__support/math/atan2f.h
M libc/src/__support/math/atan2f16.h
M libc/src/__support/math/atan_utils.h
M libc/src/__support/math/atanf.h
M libc/src/__support/math/hypot.h
R libc/src/__support/math/inv_trigf_utils.h
A libc/src/__support/math/lgammaf16.h
M libc/src/__support/mathvec/CMakeLists.txt
A libc/src/__support/mathvec/acosf.h
A libc/src/__support/mathvec/acoshf.h
A libc/src/__support/mathvec/acospif.h
A libc/src/__support/mathvec/asinf.h
A libc/src/__support/mathvec/asinhf.h
A libc/src/__support/mathvec/asinpif.h
A libc/src/__support/mathvec/atanf.h
A libc/src/__support/mathvec/atanhf.h
A libc/src/__support/mathvec/cbrtf.h
M libc/src/__support/mathvec/common_constants.h
A libc/src/__support/mathvec/cosf.h
A libc/src/__support/mathvec/coshf.h
A libc/src/__support/mathvec/cospif.h
A libc/src/__support/mathvec/erff.h
A libc/src/__support/mathvec/exp10f.h
A libc/src/__support/mathvec/exp10m1f.h
A libc/src/__support/mathvec/exp2f.h
A libc/src/__support/mathvec/exp2m1f.h
M libc/src/__support/mathvec/expf.h
M libc/src/__support/mathvec/expf_utils.h
A libc/src/__support/mathvec/expm1f.h
A libc/src/__support/mathvec/log10f.h
A libc/src/__support/mathvec/log1pf.h
A libc/src/__support/mathvec/log2f.h
A libc/src/__support/mathvec/logf.h
A libc/src/__support/mathvec/rsqrtf.h
A libc/src/__support/mathvec/sinf.h
A libc/src/__support/mathvec/sinhf.h
A libc/src/__support/mathvec/sinpif.h
A libc/src/__support/mathvec/sqrtf.h
A libc/src/__support/mathvec/tanf.h
A libc/src/__support/mathvec/tanhf.h
A libc/src/__support/mathvec/tanpif.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/futex_utils.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_ntoa.cpp
A libc/src/arpa/inet/inet_ntoa.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/lgammaf16.cpp
A libc/src/math/lgammaf16.h
M libc/src/mathvec/CMakeLists.txt
A libc/src/mathvec/abi_prefix.h
A libc/src/mathvec/acosf.h
A libc/src/mathvec/acoshf.h
A libc/src/mathvec/acospif.h
A libc/src/mathvec/asinf.h
A libc/src/mathvec/asinhf.h
A libc/src/mathvec/asinpif.h
A libc/src/mathvec/atanf.h
A libc/src/mathvec/atanhf.h
A libc/src/mathvec/cbrtf.h
A libc/src/mathvec/cosf.h
A libc/src/mathvec/coshf.h
A libc/src/mathvec/cospif.h
A libc/src/mathvec/erff.h
A libc/src/mathvec/exp10f.h
A libc/src/mathvec/exp10m1f.h
A libc/src/mathvec/exp2f.h
A libc/src/mathvec/exp2m1f.h
M libc/src/mathvec/expf.h
A libc/src/mathvec/expm1f.h
M libc/src/mathvec/generic/CMakeLists.txt
A libc/src/mathvec/generic/acosf.cpp
A libc/src/mathvec/generic/acoshf.cpp
A libc/src/mathvec/generic/acospif.cpp
A libc/src/mathvec/generic/asinf.cpp
A libc/src/mathvec/generic/asinhf.cpp
A libc/src/mathvec/generic/asinpif.cpp
A libc/src/mathvec/generic/atanf.cpp
A libc/src/mathvec/generic/atanhf.cpp
A libc/src/mathvec/generic/cbrtf.cpp
A libc/src/mathvec/generic/cosf.cpp
A libc/src/mathvec/generic/coshf.cpp
A libc/src/mathvec/generic/cospif.cpp
A libc/src/mathvec/generic/erff.cpp
A libc/src/mathvec/generic/exp10f.cpp
A libc/src/mathvec/generic/exp10m1f.cpp
A libc/src/mathvec/generic/exp2f.cpp
A libc/src/mathvec/generic/exp2m1f.cpp
M libc/src/mathvec/generic/expf.cpp
A libc/src/mathvec/generic/expm1f.cpp
A libc/src/mathvec/generic/log10f.cpp
A libc/src/mathvec/generic/log1pf.cpp
A libc/src/mathvec/generic/log2f.cpp
A libc/src/mathvec/generic/logf.cpp
A libc/src/mathvec/generic/rsqrtf.cpp
A libc/src/mathvec/generic/sinf.cpp
A libc/src/mathvec/generic/sinhf.cpp
A libc/src/mathvec/generic/sinpif.cpp
A libc/src/mathvec/generic/sqrtf.cpp
A libc/src/mathvec/generic/tanf.cpp
A libc/src/mathvec/generic/tanhf.cpp
A libc/src/mathvec/generic/tanpif.cpp
A libc/src/mathvec/log10f.h
A libc/src/mathvec/log1pf.h
A libc/src/mathvec/log2f.h
A libc/src/mathvec/logf.h
A libc/src/mathvec/rsqrtf.h
A libc/src/mathvec/sinf.h
A libc/src/mathvec/sinhf.h
A libc/src/mathvec/sinpif.h
A libc/src/mathvec/sqrtf.h
A libc/src/mathvec/tanf.h
A libc/src/mathvec/tanhf.h
A libc/src/mathvec/tanpif.h
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_condattr_getclock.cpp
M libc/src/pthread/pthread_condattr_getclock.h
M libc/src/pthread/pthread_condattr_setclock.cpp
M libc/src/pthread/pthread_condattr_setclock.h
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/semaphore/linux/CMakeLists.txt
M libc/src/semaphore/linux/named_semaphore.cpp
M libc/src/semaphore/linux/semaphore.h
M libc/src/signal/kill.h
M libc/src/signal/linux/CMakeLists.txt
M libc/src/signal/linux/kill.cpp
M libc/src/signal/linux/sigemptyset.cpp
M libc/src/signal/raise.h
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdfix/CMakeLists.txt
A libc/src/stdfix/divik.cpp
A libc/src/stdfix/divik.h
A libc/src/stdfix/divilk.cpp
A libc/src/stdfix/divilk.h
A libc/src/stdfix/divilr.cpp
A libc/src/stdfix/divilr.h
A libc/src/stdfix/divir.cpp
A libc/src/stdfix/divir.h
A libc/src/stdfix/diviuk.cpp
A libc/src/stdfix/diviuk.h
A libc/src/stdfix/diviulk.cpp
A libc/src/stdfix/diviulk.h
A libc/src/stdfix/diviulr.cpp
A libc/src/stdfix/diviulr.h
A libc/src/stdfix/diviur.cpp
A libc/src/stdfix/diviur.h
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/baremetal/CMakeLists.txt
A libc/src/stdlib/baremetal/malloc_usable_size.cpp
M libc/src/stdlib/linux/CMakeLists.txt
M libc/src/stdlib/linux/realpath.cpp
A libc/src/stdlib/malloc_usable_size.h
M libc/src/sys/ipc/linux/CMakeLists.txt
M libc/src/sys/ipc/linux/ftok.cpp
R libc/src/sys/ipc/linux/kernel_statx.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_unlink.cpp
M libc/src/sys/prctl/linux/CMakeLists.txt
M libc/src/sys/prctl/prctl.h
M libc/src/sys/random/getrandom.h
M libc/src/sys/random/linux/CMakeLists.txt
M libc/src/sys/resource/getrlimit.h
M libc/src/sys/resource/linux/CMakeLists.txt
M libc/src/sys/resource/setrlimit.h
M libc/src/sys/select/linux/CMakeLists.txt
M libc/src/sys/select/linux/select.cpp
M libc/src/sys/select/select.h
M libc/src/sys/sendfile/linux/CMakeLists.txt
M libc/src/sys/sendfile/linux/sendfile.cpp
M libc/src/sys/sendfile/sendfile.h
M libc/src/sys/socket/linux/CMakeLists.txt
M libc/src/sys/socket/recv.h
M libc/src/sys/socket/send.h
M libc/src/sys/time/CMakeLists.txt
A libc/src/sys/time/gettimeofday.h
M libc/src/sys/time/linux/CMakeLists.txt
A libc/src/sys/time/linux/gettimeofday.cpp
M libc/src/sys/time/linux/utimes.cpp
M libc/src/sys/utsname/linux/CMakeLists.txt
M libc/src/sys/utsname/linux/uname.cpp
M libc/src/sys/utsname/uname.h
M libc/src/sys/wait/linux/CMakeLists.txt
M libc/src/sys/wait/wait.h
M libc/src/sys/wait/wait4.h
M libc/src/sys/wait/wait4Impl.h
M libc/src/sys/wait/waitpid.h
M libc/src/time/CMakeLists.txt
R libc/src/time/gettimeofday.h
M libc/src/time/linux/CMakeLists.txt
R libc/src/time/linux/gettimeofday.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/fork.cpp
M libc/src/unistd/linux/gethostname.cpp
M libc/src/unistd/linux/isatty.cpp
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M libc/startup/linux/do_start.cpp
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A libc/test/UnitTest/ConstraintHandlerCheckingTest.h
M libc/test/UnitTest/ErrnoSetterMatcher.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/include/CMakeLists.txt
A libc/test/include/alloca_test.cpp
M libc/test/include/netinet_in_test.cpp
M libc/test/integration/src/sys/ptrace/linux/ptrace_test.cpp
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M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/CPP/CMakeLists.txt
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M libc/test/src/__support/freelist_heap_test.cpp
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A libc/test/src/arpa/inet/inet_ntoa_test.cpp
M libc/test/src/fcntl/CMakeLists.txt
M libc/test/src/fcntl/creat_test.cpp
M libc/test/src/fcntl/fcntl_test.cpp
M libc/test/src/fenv/enabled_exceptions_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/lgammaf16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/hypot_test.cpp
A libc/test/src/math/smoke/lgammaf16_test.cpp
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A libc/test/src/mathvec/UnitTestWrappers.h
A libc/test/src/mathvec/acosf_test.cpp
A libc/test/src/mathvec/acoshf_test.cpp
A libc/test/src/mathvec/acospif_test.cpp
A libc/test/src/mathvec/asinf_test.cpp
A libc/test/src/mathvec/asinhf_test.cpp
A libc/test/src/mathvec/asinpif_test.cpp
A libc/test/src/mathvec/atanf_test.cpp
A libc/test/src/mathvec/atanhf_test.cpp
A libc/test/src/mathvec/cbrtf_test.cpp
A libc/test/src/mathvec/cosf_test.cpp
A libc/test/src/mathvec/coshf_test.cpp
A libc/test/src/mathvec/cospif_test.cpp
A libc/test/src/mathvec/erff_test.cpp
M libc/test/src/mathvec/exhaustive/CMakeLists.txt
A libc/test/src/mathvec/exhaustive/acosf_test.cpp
A libc/test/src/mathvec/exhaustive/acoshf_test.cpp
A libc/test/src/mathvec/exhaustive/acospif_test.cpp
A libc/test/src/mathvec/exhaustive/asinf_test.cpp
A libc/test/src/mathvec/exhaustive/asinhf_test.cpp
A libc/test/src/mathvec/exhaustive/asinpif_test.cpp
A libc/test/src/mathvec/exhaustive/atanf_test.cpp
A libc/test/src/mathvec/exhaustive/atanhf_test.cpp
A libc/test/src/mathvec/exhaustive/cbrtf_test.cpp
A libc/test/src/mathvec/exhaustive/cosf_test.cpp
A libc/test/src/mathvec/exhaustive/coshf_test.cpp
A libc/test/src/mathvec/exhaustive/cospif_test.cpp
A libc/test/src/mathvec/exhaustive/erff_test.cpp
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
A libc/test/src/mathvec/exhaustive/exp10f_test.cpp
A libc/test/src/mathvec/exhaustive/exp10m1f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2m1f_test.cpp
M libc/test/src/mathvec/exhaustive/expf_test.cpp
A libc/test/src/mathvec/exhaustive/expm1f_test.cpp
A libc/test/src/mathvec/exhaustive/log10f_test.cpp
A libc/test/src/mathvec/exhaustive/log1pf_test.cpp
A libc/test/src/mathvec/exhaustive/log2f_test.cpp
A libc/test/src/mathvec/exhaustive/logf_test.cpp
A libc/test/src/mathvec/exhaustive/rsqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/sinf_test.cpp
A libc/test/src/mathvec/exhaustive/sinhf_test.cpp
A libc/test/src/mathvec/exhaustive/sinpif_test.cpp
A libc/test/src/mathvec/exhaustive/sqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/tanf_test.cpp
A libc/test/src/mathvec/exhaustive/tanhf_test.cpp
A libc/test/src/mathvec/exhaustive/tanpif_test.cpp
A libc/test/src/mathvec/exp10f_test.cpp
A libc/test/src/mathvec/exp10m1f_test.cpp
A libc/test/src/mathvec/exp2f_test.cpp
A libc/test/src/mathvec/exp2m1f_test.cpp
M libc/test/src/mathvec/expf_test.cpp
A libc/test/src/mathvec/expm1f_test.cpp
A libc/test/src/mathvec/log10f_test.cpp
A libc/test/src/mathvec/log1pf_test.cpp
A libc/test/src/mathvec/log2f_test.cpp
A libc/test/src/mathvec/logf_test.cpp
A libc/test/src/mathvec/rsqrtf_test.cpp
A libc/test/src/mathvec/sinf_test.cpp
A libc/test/src/mathvec/sinhf_test.cpp
A libc/test/src/mathvec/sinpif_test.cpp
A libc/test/src/mathvec/sqrtf_test.cpp
A libc/test/src/mathvec/tanf_test.cpp
A libc/test/src/mathvec/tanhf_test.cpp
A libc/test/src/mathvec/tanpif_test.cpp
M libc/test/src/semaphore/linux/CMakeLists.txt
M libc/test/src/semaphore/linux/semaphore_test.cpp
M libc/test/src/signal/kill_test.cpp
M libc/test/src/signal/pthread_sigmask_test.cpp
M libc/test/src/signal/raise_test.cpp
M libc/test/src/signal/sigaction_test.cpp
M libc/test/src/signal/sigaddset_test.cpp
M libc/test/src/signal/sigdelset_test.cpp
M libc/test/src/signal/sigfillset_test.cpp
M libc/test/src/signal/signal_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/DiviFxTest.h
A libc/test/src/stdfix/divik_test.cpp
A libc/test/src/stdfix/divilk_test.cpp
A libc/test/src/stdfix/divilr_test.cpp
A libc/test/src/stdfix/divir_test.cpp
A libc/test/src/stdfix/diviuk_test.cpp
A libc/test/src/stdfix/diviulk_test.cpp
A libc/test/src/stdfix/diviulr_test.cpp
A libc/test/src/stdfix/diviur_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fdopen_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/abort_test.cpp
M libc/test/src/stdlib/realpath_test.cpp
M libc/test/src/string/memory_utils/protected_pages.h
M libc/test/src/string/strsignal_test.cpp
M libc/test/src/sys/auxv/linux/CMakeLists.txt
M libc/test/src/sys/auxv/linux/getauxval_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/madvise_test.cpp
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/mprotect_test.cpp
M libc/test/src/sys/mman/linux/mremap_test.cpp
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
M libc/test/src/sys/mman/linux/remap_file_pages_test.cpp
M libc/test/src/sys/resource/CMakeLists.txt
M libc/test/src/sys/resource/getrlimit_setrlimit_test.cpp
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/sendfile/sendfile_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/connect_accept_test.cpp
M libc/test/src/sys/socket/linux/listen_test.cpp
M libc/test/src/sys/socket/linux/sendrecvmmsg_test.cpp
M libc/test/src/sys/socket/linux/sendto_recvfrom_test.cpp
M libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
M libc/test/src/sys/socket/linux/socket_test.cpp
M libc/test/src/sys/socket/linux/socket_test_support.h
M libc/test/src/sys/socket/linux/socketopt_test.cpp
M libc/test/src/sys/socket/linux/socketpair_test.cpp
M libc/test/src/sys/socket/linux/sockname_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/chmod_test.cpp
M libc/test/src/sys/stat/fchmod_test.cpp
M libc/test/src/sys/stat/fchmodat_test.cpp
M libc/test/src/sys/stat/fstat_test.cpp
M libc/test/src/sys/stat/lstat_test.cpp
M libc/test/src/sys/stat/stat_test.cpp
M libc/test/src/sys/time/CMakeLists.txt
A libc/test/src/sys/time/gettimeofday_test.cpp
M libc/test/src/time/CMakeLists.txt
R libc/test/src/time/gettimeofday_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/access_test.cpp
M libc/test/src/unistd/chown_test.cpp
M libc/test/src/unistd/dup2_test.cpp
M libc/test/src/unistd/dup3_test.cpp
M libc/test/src/unistd/dup_test.cpp
M libc/test/src/unistd/faccessat_test.cpp
M libc/test/src/unistd/fchown_test.cpp
M libc/test/src/unistd/ftruncate_test.cpp
M libc/test/src/unistd/isatty_test.cpp
M libc/test/src/unistd/link_test.cpp
M libc/test/src/unistd/linkat_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
M libc/test/src/unistd/symlink_test.cpp
M libc/test/src/unistd/symlinkat_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/test/src/unistd/truncate_test.cpp
M libc/test/src/unistd/unlink_test.cpp
M libc/test/src/unistd/unlinkat_test.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
A libc/utils/docgen/time.yaml
M libcxx/cmake/Modules/HandleLibCXXABI.cmake
M libcxx/cmake/caches/Generic-llvm-libc.cmake
M libcxx/docs/ReleaseNotes.rst
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/ReleaseNotes/23.rst
A libcxx/docs/ReleaseNotes/24.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__algorithm/copy_n.h
M libcxx/include/__algorithm/for_each_n.h
M libcxx/include/__algorithm/generate_n.h
M libcxx/include/__algorithm/is_heap_until.h
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__algorithm/ranges_for_each_n.h
M libcxx/include/__bit_reference
M libcxx/include/__config
M libcxx/include/__iterator/segmented_iterator.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__thread/thread.h
M libcxx/include/mdspan
M libcxx/include/span
M libcxx/src/atomic.cpp
M libcxx/src/filesystem/operations.cpp
M libcxx/src/include/overridable_function.h
M libcxx/src/ios.cpp
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
M libcxx/test/benchmarks/algorithms/min.bench.cpp
M libcxx/test/benchmarks/algorithms/minmax.bench.cpp
A libcxx/test/benchmarks/algorithms/modifying/replace_copy.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/search_n.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/binary_search.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/equal_range.bench.cpp
M libcxx/test/benchmarks/algorithms/sorting/lower_upper_bound.bench.cpp
M libcxx/test/benchmarks/containers/string.bench.cpp
M libcxx/test/configs/llvm-libc++-llvm-libc.cfg.in
A libcxx/test/libcxx/algorithms/alg.nonmodifying/alg.foreach/assert.for_each_n.pass.cpp
A libcxx/test/libcxx/algorithms/alg.nonmodifying/alg.foreach/assert.ranges.for_each_n.pass.cpp
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
M libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
M libcxx/test/libcxx/language.support/support.dynamic/assert.nothrow_new_not_overridden_fno_exceptions.pass.cpp
M libcxx/test/libcxx/language.support/support.dynamic/new_dont_return_nullptr.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.enumerate/nodiscard.verify.cpp
M libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp
M libcxx/test/libcxx/thread/thread.threads/thread.thread.class/thread.thread.member/native_handle.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/copy_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ranges.copy_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/ranges.fill_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.generate/generate_n.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.generate/ranges_generate_n.pass.cpp
A libcxx/test/std/algorithms/alg.modifying.operations/alg.reverse/pstl.reverse_copy.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/ranges_is_heap_until.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/ctad.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/deduct.pass.cpp
M libcxx/test/std/depr/depr.c.headers/wchar_h.compile.pass.cpp
M libcxx/test/std/depr/depr.c.headers/wctype_h.compile.pass.cpp
A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/bad_perms_parent.pass.cpp
M libcxx/test/std/input.output/syncstream/osyncstream/thread/several_threads.pass.cpp
M libcxx/test/std/numerics/complex.number/complex.member.ops/divide_equal_complex.pass.cpp
M libcxx/test/std/numerics/complex.number/complex.ops/complex_divide_complex.pass.cpp
M libcxx/test/std/numerics/complex.number/complex.ops/scalar_divide_complex.pass.cpp
M libcxx/test/std/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.bin/eval.PR44847.pass.cpp
M libcxx/test/std/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.bin/io.pass.cpp
M libcxx/test/std/ranges/range.utility/view.interface/view.interface.pass.cpp
M libcxx/test/std/strings/c.strings/cwchar.pass.cpp
M libcxx/test/std/strings/c.strings/cwctype.pass.cpp
M libcxx/test/std/strings/string.conversions/to_wstring.pass.cpp
M libcxx/test/std/thread/thread.condition/notify_all_at_thread_exit_lwg3343.pass.cpp
M libcxx/test/std/thread/thread.threads/thread.thread.this/sleep_for.signals.pass.cpp
M libcxx/test/std/time/time.hash/time.hash_enabled.pass.cpp
A libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/non_pointable.single.verify.cpp
M libcxx/test/tools/clang_tidy_checks/abi_tag_on_virtual.cpp
M libcxx/test/tools/clang_tidy_checks/empty_namespaces.cpp
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/test/tools/clang_tidy_checks/hide_from_abi.cpp
M libcxx/test/tools/clang_tidy_checks/libcpp_module.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_adl.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_operator_ampersand.cpp
M libcxx/test/tools/clang_tidy_checks/uglify_attributes.cpp
M libcxx/utils/ci/images/libcxx_release_runners.txt
M libcxx/utils/ci/images/libcxx_runners.txt
M libcxx/utils/compare-benchmarks
M libcxx/utils/libcxx/test/dsl.py
M libcxx/utils/requirements.txt
M libcxxabi/test/configs/llvm-libc++abi-llvm-libc.cfg.in
A libsycl/docs/CodingGuidelines.md
R libsycl/docs/CodingGuidelines.rst
A libsycl/docs/index.md
R libsycl/docs/index.rst
R libsycl/include/sycl/__impl/detail/default_async_handler.hpp
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
A libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
M libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/exception.hpp
A libsycl/include/sycl/__impl/group.hpp
A libsycl/include/sycl/__impl/info/event.hpp
A libsycl/include/sycl/__impl/memory_enums.hpp
A libsycl/include/sycl/__impl/nd_item.hpp
A libsycl/include/sycl/__impl/nd_range.hpp
M libsycl/include/sycl/__impl/queue.hpp
A libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__spirv/spirv_vars.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/detail/event_impl.cpp
M libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
A libsycl/src/detail/spinlock.hpp
M libsycl/src/event.cpp
M libsycl/src/exception_list.cpp
M libsycl/src/queue.cpp
M libsycl/test/README.md
A libsycl/test/basic/group.cpp
A libsycl/test/basic/group_local_id.cpp
A libsycl/test/basic/linear_sub_group.cpp
A libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/parallel_for_indexers.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/sub_group_by_value_semantics.cpp
A libsycl/test/basic/sub_group_common.cpp
M libsycl/unittests/CMakeLists.txt
M libsycl/unittests/common/device_images.hpp
A libsycl/unittests/common/scoped_binary_registration.hpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/device_selector/get_device_preference.cpp
A libsycl/unittests/event/CMakeLists.txt
A libsycl/unittests/event/async_handler.cpp
A libsycl/unittests/event/event.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/program_manager/register_and_unregister.cpp
M libsycl/unittests/queue/sycl_kernel_launch.cpp
A libunwind/docs/BuildingLibunwind.md
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M libunwind/docs/conf.py
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M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
A libunwind/test/.clang-format
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
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M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/RelocScan.h
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/SymbolTable.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
A lld/docs/DTLTO.md
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A lld/docs/ELF/large_sections.md
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M lld/docs/conf.py
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M lld/include/lld/Common/BPSectionOrdererBase.inc
A lld/test/COFF/link-dll-arm64x.s
M lld/test/ELF/aarch64-reloc-pauth.s
M lld/test/ELF/bp-section-orderer.s
M lld/test/ELF/dtlto/timetrace.test
M lld/test/ELF/emit-relocs-discard-locals.s
A lld/test/ELF/gnu-build-attributes.s
M lld/test/ELF/i386-tls-ie-shared.s
A lld/test/ELF/linkerscript/tbss-addr-expr.s
M lld/test/ELF/local-symbols-order.s
M lld/test/ELF/lto/parallel-internalize.ll
M lld/test/ELF/pack-dyn-relocs-relr-loop.s
M lld/test/ELF/ppc64-local-entry.s
M lld/test/ELF/relocatable-comdat-multiple.s
M lld/test/ELF/relocatable-comdat2.s
M lld/test/ELF/relocatable-discard-locals.s
M lld/test/ELF/relocatable-gc.s
M lld/test/ELF/relocatable.s
M lld/test/ELF/retain-symbols-file.s
M lld/test/ELF/retain-und.s
M lld/test/ELF/strtab-nodedup.s
M lld/test/ELF/version-script-warn.s
M lld/test/MachO/bp-section-orderer-errs.s
M lld/test/lit.cfg.py
M lld/unittests/AsLibELF/CMakeLists.txt
A lld/unittests/AsLibELF/OutputStream.cpp
M lldb/bindings/interface/SBTargetDocstrings.i
M lldb/bindings/interfaces.swig
M lldb/bindings/python/CMakeLists.txt
M lldb/bindings/python/python-wrapper.swig
M lldb/cmake/modules/AddLLDB.cmake
M lldb/cmake/modules/FindPythonAndSwig.cmake
M lldb/docs/CMakeLists.txt
M lldb/docs/dil-expr-lang.ebnf
M lldb/docs/resources/build.md
M lldb/docs/resources/lldbgdbremote.md
M lldb/docs/resources/test.md
M lldb/docs/use/tutorial.md
M lldb/docs/use/variable.md
M lldb/examples/python/delta.py
M lldb/examples/python/gdbremote.py
M lldb/examples/python/templates/operating_system.py
A lldb/examples/python/templates/scripted_breakpoint.py
M lldb/examples/python/templates/scripted_frame_provider.py
A lldb/examples/python/templates/scripted_hook.py
M lldb/examples/python/templates/scripted_platform.py
M lldb/examples/python/templates/scripted_process.py
A lldb/examples/python/templates/scripted_stackframe_recognizer.py
M lldb/examples/python/templates/scripted_thread_plan.py
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBProtocolServer.h
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/Core/Diagnostics.h
M lldb/include/lldb/Core/Opcode.h
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/Core/Section.h
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/Host/Editline.h
M lldb/include/lldb/Host/Host.h
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Host/common/DomainSocket.h
M lldb/include/lldb/Interpreter/CommandCompletions.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterfaceUsages.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStackFrameRecognizerInterface.h
R lldb/include/lldb/Interpreter/Interfaces/ScriptedStopHookInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Protocol/MCP/Client.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Target/MemoryRegionInfo.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/StackID.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/Log.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectSynthetic.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-forward.h
A lldb/packages/Python/lldbsuite/support/xcode.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/dotest_args.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/__init__.py
R lldb/packages/Python/lldbsuite/test/tools/lldb_dap/dap_types.py
R lldb/packages/Python/lldbsuite/test/tools/lldb_dap/lldb_dap_testcase.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
A lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
A lldb/packages/Python/lldbsuite/test/tools/lldb_dap/types.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/utils.py
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBProtocolServer.cpp
M lldb/source/API/SBSection.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Breakpoint/Watchpoint.cpp
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Commands/CommandObjectLog.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/Diagnostics.cpp
M lldb/source/Core/DumpRegisterValue.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Host/common/DomainSocket.cpp
M lldb/source/Host/common/Editline.cpp
M lldb/source/Host/common/Host.cpp
M lldb/source/Host/freebsd/Host.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Interpreter/Interfaces/ScriptedInterfaceUsages.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Interpreter/embedded_interpreter.py
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ASTUtils.h
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
M lldb/source/Plugins/ObjectFile/ELF/ELFHeader.cpp
M lldb/source/Plugins/ObjectFile/ELF/ELFHeader.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86.cpp
M lldb/source/Plugins/Process/Utility/LinuxProcMaps.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_x86.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Plugins/Protocol/MCP/Tool.cpp
M lldb/source/Plugins/Protocol/MCP/Tool.h
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/OperatingSystemPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFrameProviderPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFramePythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStackFrameRecognizerPythonInterface.h
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.cpp
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPlanPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedThreadPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/CMakeLists.txt
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStoreProperties.td
M lldb/source/Plugins/TraceExporter/common/TraceHTR.h
A lldb/source/Plugins/TraceExporter/docs/htr.md
R lldb/source/Plugins/TraceExporter/docs/htr.rst
M lldb/source/Protocol/MCP/Client.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/SectionLoadList.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Target/StackID.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/ThreadPlanStepInstruction.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/source/Target/ThreadPlanStepUntil.cpp
M lldb/source/Utility/Listener.cpp
M lldb/source/Utility/Log.cpp
M lldb/source/Utility/Policy.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectSynthetic.cpp
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
M lldb/test/API/commands/frame/recognizer/recognizer.py
M lldb/test/API/commands/frame/var-dil/expr/Literals/TestFrameVarDILLiterals.py
M lldb/test/API/commands/frame/var-dil/expr/Literals/main.cpp
A lldb/test/API/commands/frame/var-dil/expr/NullptrVar/Makefile
A lldb/test/API/commands/frame/var-dil/expr/NullptrVar/TestFrameVarDILNullptrVar.py
A lldb/test/API/commands/frame/var-dil/expr/NullptrVar/main.c
A lldb/test/API/commands/scripting/extension/TestScriptingExtensionListJSON.py
M lldb/test/API/driver/longpath/TestLongPathDriver.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/longpath/TestLongPath.py
A lldb/test/API/functionalities/scripting_extension_generate/Makefile
A lldb/test/API/functionalities/scripting_extension_generate/TestScriptingExtensionGenerate.py
A lldb/test/API/functionalities/scripting_extension_generate/main.c
M lldb/test/API/functionalities/statusline/TestStatusline.py
M lldb/test/API/functionalities/statusline/statusline_flood.py
M lldb/test/API/functionalities/thread/finish-from-empty-func/TestEmptyFuncThreadStepOut.py
M lldb/test/API/functionalities/thread/finish-from-empty-func/main.c
A lldb/test/API/lang/cpp/enum-limits/Makefile
A lldb/test/API/lang/cpp/enum-limits/TestCPPEnumLimits.py
A lldb/test/API/lang/cpp/enum-limits/main.cpp
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/lit.cfg.py
M lldb/test/API/python_api/sbplatform/TestSBPlatform.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic/TestSBValueSetTypeSynthetic.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/library_support.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic/main.cpp
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/Makefile
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/TestSBValueSetTypeSyntheticOverride.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/foo_bar_synths.py
A lldb/test/API/python_api/sbvalue_set_type_synthetic_override/main.cpp
M lldb/test/API/symstore/TestSymStore.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_breakpointLocations.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_logpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setFunctionBreakpoints.py
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
M lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_args.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_basic.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_cwd.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_debuggerRoot.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_disableSTDIO.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_array.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_object.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_extra_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_launch_commands_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_program.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_no_lldbinit_flag.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_disabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_enabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_sourcePath.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stopOnEntry.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_terminate_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_termination.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_version.py
M lldb/test/API/tools/lldb-dap/launch/io/DAP_launch_io.py
M lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_integratedTerminal.py
M lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_internalConsole.py
M lldb/test/API/tools/lldb-dap/launch/io/main.cpp
M lldb/test/API/tools/lldb-dap/longpath/TestDAP_launch_longPath.py
M lldb/test/API/tools/lldb-dap/module-event/TestDAP_module_event.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/API/tools/lldb-dap/moduleSymbols/TestDAP_moduleSymbols.py
M lldb/test/API/tools/lldb-dap/stackTrace/TestDAP_stackTrace.py
M lldb/test/API/tools/lldb-dap/stackTraceCompilerGeneratedCode/TestDAP_stackTraceCompilerGeneratedCode.py
M lldb/test/API/tools/lldb-dap/stackTraceDisassemblyDisplay/TestDAP_stackTraceDisassemblyDisplay.py
M lldb/test/API/tools/lldb-dap/stackTraceMissingFunctionName/TestDAP_stackTraceMissingFunctionName.py
M lldb/test/API/tools/lldb-dap/stackTraceMissingModule/TestDAP_stackTraceMissingModule.py
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_DAPConnection.py
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_EventHistory.py
M lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_Types.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/test/CMakeLists.txt
M lldb/test/Shell/Commands/command-scripting-extension-list.test
A lldb/test/Shell/Diagnostics/TestDiagnosticsCollectBinaries.test
M lldb/test/Shell/Register/x86-db-read.test
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/globals-fundamental.lldbinit
M lldb/test/Shell/SymbolFile/NativePDB/globals-fundamental.cpp
A lldb/test/Shell/SymbolFile/NativePDB/static-class-constants.cpp
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.cfg.py
M lldb/tools/lldb-dap/DAPSessionManager.cpp
M lldb/tools/lldb-mcp/Multiplexer.cpp
M lldb/tools/lldb-mcp/Multiplexer.h
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M lldb/tools/lldb-test/lldb-test.cpp
M lldb/unittests/API/CMakeLists.txt
A lldb/unittests/API/SBProtocolServerTest.cpp
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/DiagnosticsTest.cpp
M lldb/unittests/Disassembler/CMakeLists.txt
A lldb/unittests/Disassembler/x86/TestGetOpcodeOversized.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
M lldb/unittests/Process/gdb-remote/CMakeLists.txt
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
A lldb/unittests/Process/gdb-remote/ProcessGDBRemoteTest.cpp
M lldb/unittests/Protocol/MCPPluginTest.cpp
M lldb/unittests/Protocol/MCPServerInfoTest.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M lldb/unittests/Utility/LogTest.cpp
M lldb/unittests/Utility/UriParserTest.cpp
M lldb/unittests/tools/CMakeLists.txt
A lldb/unittests/tools/lldb-mcp/CMakeLists.txt
A lldb/unittests/tools/lldb-mcp/MultiplexerTest.cpp
A llvm-libgcc/docs/LLVMLibgcc.md
R llvm-libgcc/docs/LLVMLibgcc.rst
M llvm-libgcc/generate_version_script.py
M llvm/CMakeLists.txt
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/ImmutableSetBuildBM.cpp
M llvm/benchmarks/ImmutableSetIteratorBM.cpp
M llvm/cmake/modules/FindDIASDK.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
A llvm/docs/AArch64SME.md
R llvm/docs/AArch64SME.rst
A llvm/docs/AMDGPUAsyncOperations.md
R llvm/docs/AMDGPUAsyncOperations.rst
M llvm/docs/AMDGPUDMAOperations.md
A llvm/docs/AMDGPUExecutionSynchronization.md
R llvm/docs/AMDGPUExecutionSynchronization.rst
A llvm/docs/AMDGPUMemoryModel.md
R llvm/docs/AMDGPUMemoryModel.rst
M llvm/docs/AMDGPUUsage.rst
A llvm/docs/AddingConstrainedIntrinsics.md
R llvm/docs/AddingConstrainedIntrinsics.rst
A llvm/docs/AdminTasks.md
R llvm/docs/AdminTasks.rst
A llvm/docs/BigEndianNEON.md
R llvm/docs/BigEndianNEON.rst
M llvm/docs/CommandGuide/lit.rst
A llvm/docs/CompileCudaWithLLVM.md
R llvm/docs/CompileCudaWithLLVM.rst
A llvm/docs/DebuggingJITedCode.md
R llvm/docs/DebuggingJITedCode.rst
A llvm/docs/ExtendingLLVM.md
R llvm/docs/ExtendingLLVM.rst
A llvm/docs/HowToBuildWindowsItaniumPrograms.md
R llvm/docs/HowToBuildWindowsItaniumPrograms.rst
A llvm/docs/HowToCrossCompileBuiltinsOnArm.md
R llvm/docs/HowToCrossCompileBuiltinsOnArm.rst
A llvm/docs/HowToUpdateDebugInfo.md
R llvm/docs/HowToUpdateDebugInfo.rst
A llvm/docs/Instrumentor.md
R llvm/docs/Instrumentor.rst
A llvm/docs/JITLink.md
R llvm/docs/JITLink.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.md
A llvm/docs/MCJITDesignAndImplementation.md
R llvm/docs/MCJITDesignAndImplementation.rst
A llvm/docs/NVPTXUsage.md
R llvm/docs/NVPTXUsage.rst
A llvm/docs/ORCv2.md
R llvm/docs/ORCv2.rst
M llvm/docs/QualGroup.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
A llvm/docs/Remarks.md
R llvm/docs/Remarks.rst
A llvm/docs/SPIRVUsage.md
R llvm/docs/SPIRVUsage.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/include/llvm-c/Orc.h
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/BitVector.h
A llvm/include/llvm/ADT/Eytzinger.h
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/GenericUniformityInfo.h
M llvm/include/llvm/ADT/ImmutableMap.h
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/include/llvm/ADT/Sequence.h
M llvm/include/llvm/ADT/SmallBitVector.h
M llvm/include/llvm/Analysis/CGSCCPassManager.h
M llvm/include/llvm/Analysis/HashRecognize.h
M llvm/include/llvm/Analysis/ModuleSummaryAnalysis.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/DIE.h
M llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
M llvm/include/llvm/CodeGen/MachineBlockPlacement.h
M llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
M llvm/include/llvm/CodeGen/MachinePassManager.h
M llvm/include/llvm/CodeGen/RegisterCoalescerPass.h
M llvm/include/llvm/CodeGen/Rematerializer.h
M llvm/include/llvm/CodeGen/RenameIndependentSubregs.h
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
M llvm/include/llvm/CodeGen/UnreachableBlockElim.h
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/DWP/DWP.h
M llvm/include/llvm/DebugInfo/PDB/Native/LinePrinter.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/CycleInfo.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/MC/MCLFIRewriter.h
M llvm/include/llvm/MC/MCObjectFileInfo.h
M llvm/include/llvm/MC/MCSchedule.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/include/llvm/Object/IRSymtab.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/ObjectYAML/BBAddrMapYAML.h
M llvm/include/llvm/ObjectYAML/COFFYAML.h
M llvm/include/llvm/ObjectYAML/yaml2obj.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/OptimizationLevel.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/Transforms/IPO/ExpandVariadics.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
M llvm/include/llvm/Transforms/Scalar/StructurizeCFG.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/include/llvm/Transforms/Utils/UnifyLoopExits.h
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Analysis/CFG.cpp
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionDivision.cpp
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/DwarfEHPrepare.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/ExpandReductions.cpp
M llvm/lib/CodeGen/GlobalISel/Combiner.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/LibcallLoweringInfo.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/Rematerializer.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetSchedule.cpp
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/lib/DTLTO/DTLTOInputFiles.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
M llvm/lib/DWP/DWP.cpp
M llvm/lib/Debuginfod/BuildIDFetcher.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
M llvm/lib/Frontend/OpenMP/OMP.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/HTTP/HTTPClient.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/CycleInfo.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LineEditor/LineEditor.cpp
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCTargetOptions.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/GOFFObjectFile.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/ObjectYAML/BBAddrMapYAML.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/yaml2obj.cpp
M llvm/lib/Passes/CMakeLists.txt
R llvm/lib/Passes/OptimizationLevel.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/KnownBits.cpp
M llvm/lib/Support/LSP/Transport.cpp
M llvm/lib/Support/Unix/Signals.inc
M llvm/lib/Support/Windows/DynamicLibrary.inc
M llvm/lib/Support/raw_ostream.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
A llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.h
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.h
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.h
M llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerControlFlow.h
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
M llvm/lib/Target/BPF/BPFAsmPrinter.h
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
A llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFMIChecking.cpp
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
M llvm/lib/Target/BPF/BPFPassRegistry.def
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.h
M llvm/lib/Target/BPF/CMakeLists.txt
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYTargetStreamer.h
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
A llvm/lib/Target/NVPTX/NVPTXPromoteParamAlign.cpp
R llvm/lib/Target/NVPTX/NVPTXSetByValParamAlign.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCSchedule.td
M llvm/lib/Target/PowerPC/PPCSchedule440.td
M llvm/lib/Target/PowerPC/PPCScheduleA2.td
M llvm/lib/Target/PowerPC/PPCScheduleE500.td
M llvm/lib/Target/PowerPC/PPCScheduleE500mc.td
M llvm/lib/Target/PowerPC/PPCScheduleE5500.td
M llvm/lib/Target/PowerPC/PPCScheduleG3.td
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/README.txt
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrFormatsSpacemitV.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSpacemiT.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/WebAssembly/CMakeLists.txt
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCleanCodeAfterTrap.cpp
A llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
A llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixBrTableDefaults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyNullifyDebugValueLists.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
A llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
M llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRefTypeMem2Local.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrTBM.td
M llvm/lib/Target/X86/X86LowerTileCopy.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/AssignGUID.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneModule.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/MetaRenamer.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/VPlan.h
A llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/AliasSet/memset.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/AMDGPU/sin.ll
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
M llvm/test/Analysis/CycleInfo/basic.ll
M llvm/test/Analysis/CycleInfo/unreachable-predecessor.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Analysis/KernelInfo/enable-kernel-info/amdgpu.test
M llvm/test/Analysis/KernelInfo/flat-addrspace/amdgpu.test
M llvm/test/Analysis/KernelInfo/launch-bounds/amdgpu.ll
M llvm/test/Analysis/KernelInfo/openmp/README.md
M llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll
A llvm/test/Analysis/LoopAccessAnalysis/non-affine-monotonic-bounds.ll
A llvm/test/Analysis/LoopAccessAnalysis/wide-pointer-index-distance.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
A llvm/test/Analysis/ScalarEvolution/ptrtoint-special-pointers.ll
M llvm/test/Analysis/ScalarEvolution/zext-add-nsw-fold.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/branch-outside.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers-nested.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/diverged-entry-headers.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/exit-divergence.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/reducible-headers.ll
M llvm/test/Assembler/atomic.ll
M llvm/test/Assembler/callbr.ll
A llvm/test/Assembler/invalid-load-store-atomic-elementwise.ll
M llvm/test/Assembler/thinlto-bad-summary-5.ll
A llvm/test/Bitcode/atomic-load-store-elementwise.ll
M llvm/test/Bitcode/compatibility.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-fdiv-inlineasm-operand.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-insert-vec-elt.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-avg.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sdiv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-udiv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vashr.mir
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/aarch64-known-bits-hadd.ll
M llvm/test/CodeGen/AArch64/active_lane_mask.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64ec-exit-thunks.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/basic-pic.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll
M llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/clmul.ll
M llvm/test/CodeGen/AArch64/elf-globals-pic.ll
M llvm/test/CodeGen/AArch64/expand-vector-rot.ll
M llvm/test/CodeGen/AArch64/extern-weak.ll
M llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/funnel-shift-rot.ll
M llvm/test/CodeGen/AArch64/get-active-lane-mask-extract.ll
M llvm/test/CodeGen/AArch64/got-abuse.ll
M llvm/test/CodeGen/AArch64/is_fpclass.ll
A llvm/test/CodeGen/AArch64/large-eh-encoding.ll
M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
M llvm/test/CodeGen/AArch64/peephole-insert-subreg.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/ptrauth-elf-got-function-symbols.ll
A llvm/test/CodeGen/AArch64/ptrauth-init-fini-autoupgrade.ll
M llvm/test/CodeGen/AArch64/ptrauth-init-fini.ll
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
M llvm/test/CodeGen/AArch64/round-fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/round-fptoui-sat-scalar.ll
M llvm/test/CodeGen/AArch64/scalable_masked_interleaved_stores.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sve-cmp-folds.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-bf16.ll
A llvm/test/CodeGen/AArch64/sve-fixed-length-fp-trunc-bf16.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-mask-partition.ll
A llvm/test/CodeGen/AArch64/sve-ptrue-coalesce.mir
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-int-to-fp.ll
M llvm/test/CodeGen/AArch64/sve2p1-while-pn-folds.ll
M llvm/test/CodeGen/AArch64/tagged-globals-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-static.ll
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/516cff384157...268bd17c4186
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