[all-commits] [llvm/llvm-project] f6d9ec: [RISCV] Add packed narrowing convert intrinsics (#...

[陈子昂 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f6d9ec41d30b453c939bbaa1c73b876ce1389ee9
      https://github.com/llvm/llvm-project/commit/f6d9ec41d30b453c939bbaa1c73b876ce1389ee9
  Author: 陈子昂 <2802328816 at qq.com>
  Date:   2026-07-18 (Sat, 18 Jul 2026)

  Changed paths:
    M clang/lib/Headers/riscv_packed_simd.h
    M clang/test/CodeGen/RISCV/rvp-intrinsics.c
    M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c

  Log Message:
  -----------
  [RISCV] Add packed narrowing convert intrinsics (#210389)

Add RISC-V P-extension packed narrowing convert header APIs for `pncvt`
and `pncvth`.

The new APIs lower through generic IR: RV32 uses truncate / logical
shift plus truncate forms, while RV64 uses existing packed unzip shuffle
forms. This reuses the existing backend lowering and TableGen aliases
rather than adding intrinsic-specific lowering.

Tests cover Clang IR generation and cross-project header assembly checks
for RV32/RV64 spec-listed mnemonics.



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