[all-commits] [llvm/llvm-project] 1ef8ba: [MLIR][WasmSSA] Instruction parser refactoring of ...

[Luc Forget via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1ef8ba9a00e16423d711ddbf16c7a45fb7fd570b
      https://github.com/llvm/llvm-project/commit/1ef8ba9a00e16423d711ddbf16c7a45fb7fd570b
  Author: Luc Forget <github at alias.lforget.fr>
  Date:   2026-07-18 (Sat, 18 Jul 2026)

  Changed paths:
    M mlir/lib/Target/Wasm/TranslateFromWasm.cpp

  Log Message:
  -----------
  [MLIR][WasmSSA] Instruction parser refactoring of WasmSSA importer (#195500)

Refactored WasmSSA importer mechanism to dispatch control flow to
relevant parser based on op code.
This is to prepare for instructions with multi-bytes opcodes (e.g.
vector instruction and some scalar instructions extensions) which will
be able to reuse the same mechanism.

It also replaces the bit tree to find the address by a jump table.

---------

Co-authored-by: Luc Forget <lforg37 at users.noreply.github.com>
Co-authored-by: Ferdinand Lemaire <ferdinand.lemaire at woven-planet.global>
Co-authored-by: Ferdinand Lemaire <flscminecraft at gmail.com>



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications