[all-commits] [llvm/llvm-project] d982e0: [HLSL] Enable frontend IR generation for SPIR-V in...

[Diego Novillo via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d982e0499b7f780279c435403b8249d7c3812cae
      https://github.com/llvm/llvm-project/commit/d982e0499b7f780279c435403b8249d7c3812cae
  Author: Diego Novillo <dnovillo at nvidia.com>
  Date:   2026-07-17 (Fri, 17 Jul 2026)

  Changed paths:
    M clang/test/CodeGenHLSL/resources/TypedBuffers-constructor.hlsl

  Log Message:
  -----------
  [HLSL] Enable frontend IR generation for SPIR-V in TypedBuffers-constructor.hlsl (#207421)

I found a stale `FIXME` marker while poking at SPIR-V resource lowering.

The test stated that SPIR-V codegen of
`llvm.spv.resource.handlefrombinding` and resource types was not
implemented. That codegen now exists in
`CommonSPIRTargetCodeGenInfo::getHLSLType`.

This change enables the test on SPIR-V and splits the tests to
distinguish DXIL and SPIRV expected IR patterns.



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